# Patent

## Title
Voltage reference generator circuit using low-beta effect of a CMOS bipolar transistor

## Abstract

A voltage reference generator has been discovered that generates a stable reference voltage that is less than the bandgap voltage of silicon for power supply voltages less than 2V, yet provides sufficient voltage headroom to operate a cascaded current mirror. In one embodiment, the voltage reference generator has a power supply rejection ratio of at least 60 dB and has improved noise performance as compared to traditional bandgap circuits. These advantages are achieved by leveraging the low-beta effect of a CMOS bipolar transistor to generate a current proportional to an absolute temperature.

## Background
CROSS-REFERENCE TO RELATED APPLICATION(S)
BACKGROUND
1. Field of the Invention
The present invention relates to generating a reference voltage in integrated circuits, and more particularly to reference voltage circuits for low-power applications.
2. Description of the Related Art
A bangap reference circuit has improved temperature stability and is less dependent on power supply voltage than other known voltage reference circuits. Bandgap reference circuits typically generate a reference voltage approximately equal to the bandgap voltage of silicon extrapolated to zero degrees Kelvin, i.e., VG0=1.205V. Typical voltage reference circuits include a current mirror coupled to the power supply and the voltage reference node to provide a current proportional to the absolute temperature to the voltage reference node.
Integrated circuits having 3V power supplies can easily meet the demands of operating devices included in a cascoded current mirror and generate the reference voltage without compromising stability of the reference voltage. For example, a voltage reference generator with a power supply of 3V provides a reference voltage of 1.2V. The VDS of a MOSFET included in the current mirror has a magnitude of 3V−1.2V=1.8V, which is sufficient to operate the device under typical conditions with an acceptable power supply rejection ratio (PSRR) (i.e., the ability of the voltage reference generator to reject noise on the power supply). However, as the power supply voltage drops, e.g., for low-power applications, available voltage headroom required to operate the devices included in the current mirror is reduced, the PSRR becomes more critical, and the voltage reference generator is less likely to provide a sufficiently stable reference voltage with respect to variations on the power supply.
Accordingly, improved techniques for generating stable reference voltages for low-power applications are desired.
SUMMARY
A voltage reference generator has been discovered that generates a stable reference voltage that is less than the bandgap voltage of silicon for power supply voltages less than 2V, yet provides sufficient voltage headroom to operate a current mirror. In one embodiment, the voltage reference generator has a power supply rejection ratio of at least 60 dB and has improved noise performance as compared to traditional bandgap circuits. These advantages are achieved by leveraging the low-beta effect of a bipolar transistor formed in a CMOS process to generate a current proportional to an absolute temperature.
In some embodiments of the present invention, a voltage reference generator includes a bipolar transistor configured to amplify a base current of the bipolar transistor, the base current being proportional to an absolute temperature. The base current may be proportional to a voltage difference between two base-emitter voltages biased at different current densities, the voltage difference formed across a resistor coupled to the base of the bipolar transistor. A reference voltage produced by the voltage reference generator may be proportional to a parabolic function of temperature.
In some embodiments of the present invention, an integrated circuit includes a first bipolar transistor, a second bipolar transistor, and a resistor coupled to a base of the second bipolar transistor. A voltage difference between a base-emitter voltage of the first bipolar transistor and a base-emitter voltage of the second bipolar transistor forms across the resistor. A voltage reference node receives a voltage based at least in part on the voltage difference.
In some embodiments of the present invention, a method includes developing a base current of a first bipolar transistor. The base current is proportional to absolute temperature. The method includes amplifying the base current. The method includes generating a reference voltage based at least in part on the amplified base current. The base current may be proportional to a voltage difference between a base-emitter voltage of a second bipolar transistor and a base-emitter voltage of the first bipolar transistor. The voltage difference may be formed across a first resistor coupled to a base of the first bipolar transistor.
In some embodiments of the present invention, a method of manufacturing an integrated circuit includes forming a first bipolar transistor, a second bipolar transistor, and a resistor coupled to a base of the second bipolar transistor. A voltage difference between a base-emitter voltage of the first bipolar transistor and a base-emitter voltage of the second bipolar transistor forms across the resistor. The method includes forming a voltage reference node that receives a voltage based at least in part on the voltage difference.



BRIEF DESCRIPTION OF THE DRAWINGS
The present invention may be better understood, and its numerous objects, features, and advantages made apparent to those skilled in the art by referencing the accompanying drawings.
FIG. 1 illustrates a voltage reference generator circuit.
FIG. 2 illustrates a voltage reference generator circuit in accordance with some embodiments of the present invention.
FIG. 3 illustrates a voltage reference generator circuit in accordance with some embodiments of the present invention.



The use of the same reference symbols in different drawings indicates similar or identical items.
DESCRIPTION OF THE PREFERRED EMBODIMENT(S)
A typical voltage reference circuit (e.g., voltage reference generator 100 of FIG. 1) is designed to provide a temperature stable reference voltage (i.e., VREF). In general, voltage reference circuits take advantage of two electrical characteristics to achieve the desired VREF: the VBE of a bipolar transistor is nearly complementary to absolute temperature, e.g., VBE=(−1.5 mV/°K*T+1.22)V, and VT is proportional to absolute temperature, i.e, VT=kT/q.
A voltage proportional to absolute temperature (i.e., a ptat voltage) may be obtained by taking the difference between two VBES biased at different current densities:




  
    
      Δ
      ⁢
      
        
      
      ⁢
      
        V
        BE
      
    
    =
    
      
        V
        T
      
      ⁢
      
        ln
        ⁡
        
          (
          
            
              J
              1
            
            
              J
              2
            
          
          )
        
      
    
  
  ,




where J1 and J2 are saturation currents of corresponding bipolar transistors. Accordingly, voltage reference circuit 100 includes a pair of pnp bipolar transistors (i.e., transistors 106 and 108) that are connected in a diode configuration (i.e., the collectors and bases of these transistors are coupled together) and coupled to ground. Transistor 108 has an area that is M times larger than the area of transistor 106. Thus, the saturation currents of transistor 108 and transistor 106 vary by a factor of M. The emitter of transistor 106 is coupled to an inverting input of operational amplifier 116. The emitter of transistor 108 is coupled, via resistor R1, to the non-inverting input of operational amplifier 116. Operational amplifier 116 maintains equivalent voltages at nodes 118 and 120, i.e., V118=V120=VBE106. Hence, the difference between VBE106 and VBE108 (i.e., ΔVBE106,108) forms across resistor R1. Operational amplifier 116 and transistors 102 and 104 convert this voltage difference into a current (i.e., current I1) proportional to the voltage difference:





  
    I
    1
  
  =
  
    
      
        Δ
        ⁢
        
          
        
        ⁢
        
          V
          
            BE106
            ,
            108
          
        
      
      
        NR
        1
      
    
    =
    
      
        
          V
          T
        
        ⁢
        
          ln
          ⁡
          
            (
            
              M
              N
            
            )
          
        
      
      
        NR
        1
      
    
  




Since the thermal voltage VT has a positive temperature coefficient of k/q, k=1.38*10−23J/K and q=1.6*10−19C, the current proportional to the voltage difference is proportional to an absolute temperature, i.e., I1 is a ‘ptat’ current.

Transistor 114 provides a voltage nearly complementary to absolute temperature (i.e., a ‘ctat’ voltage) because the VBE of a bipolar transistor is nearly complementary to absolute temperature. By compensating the ptat current with a ctat voltage, transistors 102, 104, 106, 108, 112, and 114, and resistors R1 and R2, may be appropriately sized to generate a particular reference voltage output having a zero temperature coefficient:



  
    
      
        
          
            V
            REF
          
          -
          
            V
            BE114
          
        
        
          R
          2
        
      
      =
      
        PI
        1
      
    
    ;
  




  
    
      
        V
        REF
      
      =
      
        
          V
          BE114
        
        +
        
          
            PI
            1
          
          ⁢
          
            R
            2
          
        
      
    
    ;
  




  
    
      
        V
        REF
      
      =
      
        
          V
          BE114
        
        +
        
          
            
              PR
              2
            
            ⁢
            
              V
              T
            
            ⁢
            
              ln
              ⁡
              
                (
                
                  M
                  N
                
                )
              
            
          
          
            NR
            1
          
        
      
    
    ;
  




  
    
      
        d
        
          V
          REF
        
      
      
        d
        T
      
    
    =
    
      
        
          d
          
            V
            BE114
          
        
        
          d
          T
        
      
      +
      
        
          
            
              PR
              2
            
            ⁢
            
              kln
              ⁡
              
                (
                
                  M
                  N
                
                )
              
            
          
          
            
              NR
              1
            
            ⁢
            q
          
        
        .
      
    
  



Setting





  
    
      
        d
        
          V
          REF
        
      
      
        d
        T
      
    
    =
    0
  
  ,




for VREF to have a zero temperature coefficient,





  
    
      
        PR
        2
      
      ⁢
      
        kln
        ⁡
        
          (
          
            M
            N
          
          )
        
      
    
    
      
        NR
        1
      
      ⁢
      q
    
  
  =
  
    
      -
      
        
          d
          
            V
            BE114
          
        
        
          d
          T
        
      
    
    =
    
      
        
          1.5
          ⁢
          
            
          
          ⁢
          mV
        
        
          °
          ⁢
          
            
          
          ⁢
          K
        
      
      .
    
  




VBE114=VBE106=0.74 at 300°K for an exemplary process and choosing M=8, N=1⁄4P/N ̃4, and R2/R1 ̃1.2:




  
    
      
        V
        REF
      
      =
      
        
          V
          BE114
        
        +
        
          
            
              PR
              2
            
            ⁢
            
              V
              T
            
            ⁢
            
              ln
              ⁡
              
                (
                
                  M
                  N
                
                )
              
            
          
          
            NR
            1
          
        
      
    
    ;
  




  
    
      
        V
        REF
      
      =
      
        
          0.74
          ⁢
          
            
          
          ⁢
          V
        
        +
        
          
            
              1.5
              ⁢
              
                
              
              ⁢
              mV
            
            
              °
              ⁢
              
                
              
              ⁢
              K
            
          
          ⁢
          T
        
      
    
    ;
  



at 300° K, VREF=0.74V+0.45V=1.19V≈1.2V.

VREF is approximately equal to, VG0=1.205V, i.e., the bandgap voltage of silicon extrapolated to zero degrees Kelvin.

When the power supply is 3V, the VDS of transistor 112 has a magnitude of 3V−1.2V=1.8V, which is sufficient to operate the device to provide a current independent of fluctuations in VDS. Thus power supply noise will have minimal effect on I1. However, for an exemplary low-power application, the power supply voltage is 1.62V. Voltage reference generator 100 provides only a VDS of 0.42V for device 112. Transistor 112 may be operating in a linear/quasi-saturation current region and noise on the power supply will cause significant noise in PI1, thereby generating a noisy VREF and degrading the accuracy of VREF. The PSRR is typically determined empirically by presenting a varying signal on the power supply and measuring variations exhibited at the VREF node. At a 1.62V power supply, voltage reference generator 100 is unable to provide a desired 60 dB PSRR. The poor power supply rejection of voltage reference generator 100 makes voltage reference generator 100 inoperable for the purpose of providing a stable voltage reference. A desired voltage reference generator PSRR for a low-power application is at least 60 dB over process and temperature variations. In addition, noise from operational amplifier 116, which dominates the circuit noise of voltage reference generator 100, is amplified by the current mirror thus amplifying noise on VREF.
Referring to FIG. 2, voltage reference generator 200 improves the power supply rejection ratio and noise performance of voltage reference generator 100 by removing emitter resistor R1 of voltage reference generator 100 and instead, including base resistor R3. Voltage reference circuit 200 includes a bipolar transistor (i.e., transistor 206) that is coupled in a diode configuration and coupled to ground. A second pnp bipolar transistor (i.e., transistor 208) is configured as an amplifier. Referring to FIG. 3, in another embodiment of the present invention, instead of coupling the base of transistor 206 to ground, transistor 206 may be coupled to node 330 and biased by transistors 332 and 334. Similarly, base resistor R3 may be coupled to node 330 to receive the bias voltage generated by transistors 332 and 334.
Referring back to FIG. 2, transistor 208 has an area that is M times larger than the area of transistor 206. Thus, the saturation currents of transistor 208 and transistor 206 vary by a factor of M. The emitter of transistor 206 is coupled to an inverting input of operational amplifier 214. The emitter of transistor 208 is coupled to the non-inverting input of operational amplifier 214. Operational amplifier 214 maintains equivalent voltages at nodes 218 and 220, i.e., V218=V220=VBE206. Hence, the difference between VBE206 and VBE208, i.e., ΔVBE206,208, forms across resistor R3:



  
    
      I
      B208
    
    =
    
      
        
          
            V
            BE206
          
          -
          
            V
            BE208
          
        
        
          R
          3
        
      
      ⁢
      
        
      
      ⁢
      and
    
  




  
    
      
        
          
            I
            2
          
          =
          
          ⁢
          
            I
            E208
          
        
      
    
    
      
        
          =
          
          ⁢
          
            
              (
              
                
                  β
                  208
                
                +
                1
              
              )
            
            ⁢
            
              I
              B208
            
          
        
      
    
    
      
        
          =
          
          ⁢
          
            
              (
              
                
                  β
                  208
                
                +
                1
              
              )
            
            ⁢
            
              
                
                  V
                  BE206
                
                -
                
                  V
                  BE208
                
              
              
                R
                3
              
            
          
        
      
    
    
      
        
          
            =
            
            ⁢
            
              
                (
                
                  
                    β
                    208
                  
                  +
                  1
                
                )
              
              ⁢
              
                
                  
                    V
                    T
                  
                  ⁢
                  
                    ln
                    ⁡
                    
                      (
                      
                        M
                        N
                      
                      )
                    
                  
                
                
                  R
                  3
                
              
            
          
          ,
        
      
    
  



where N=W204/W202, W204 being the width of transistor 204 and W202 being the width of transistor 202 and the channel lengths of transistor 204 and transistor 202 being substantially equal. Since the thermal voltage VT has a positive temperature coefficient k/q, the current proportional to the voltage difference is proportional to an absolute temperature, i.e., I2 is a ptat current.

Transistor 212 provides a ctat voltage, VBE212. By compensating the ptat current with a ctat voltage, transistors 202, 204, 206, 208, and 212, and resistors R and R2, may be appropriately sized to generate a substantially constant reference voltage output, i.e., VREF:



  
    
      
        
          V
          REF
        
        -
        
          V
          BE212
        
      
      
        R
        4
      
    
    =
    
      I
      2
    
  




  
    
      V
      REF
    
    =
    
      
        V
        BE212
      
      +
      
        
          I
          2
        
        ⁢
        
          R
          4
        
      
    
  




  
    
      V
      REF
    
    =
    
      
        V
        BE212
      
      +
      
        
          (
          
            
              β
              208
            
            +
            1
          
          )
        
        ⁢
        
          
            
              
                R
                4
              
              ⁢
              
                V
                T
              
              ⁢
              
                ln
                ⁡
                
                  (
                  
                    M
                    N
                  
                  )
                
              
            
            
              R
              3
            
          
          .
        
      
    
  



In other embodiments, a ctat current may be formed and summed with I2 to create a substantially constant current. For a supply voltage of 1.62V and a target reference voltage of 0.96V, the following parameters are chosen: M=8, N=1⁄4, R3=16 kΩ, R4=5.5 kΩ. Note that the beta of a bipolar transistor has a dependence on temperature. In an exemplary process, the quantity β+1 is (9.6*10−3T+0.152) and VBE212 is (−1.4*10−3T+1.118)V. Thus VREF may be modeled as a quadratic function of temperature:

VREF=aT2+bT+c, 

where a, b, and c are greater than zero. In general, a, b, and c are determined according to target process technology, supply voltage, and reference voltage. Note that in a typical CMOS process, parasitic substrate pnp transistors (e.g., in the case of an n-well process) and parasitic substrate npn transistors (e.g., in the case of a p-well process) may be used as bipolar transistors. These transistors have a low-beta (e.g., β<10) as compared to transistors formed in a bipolar process (e.g., β>100). Thus currents produced by amplifying a base current of the CMOS bipolar transistor are manageable by typical CMOS devices.

Voltage reference generator 200 benefits from the low-beta of parasitic bipolar transistors by reducing noise on VREF. In voltage reference generator 100, transistors 104 and 110 amplify the ptat current, i.e., current NI1 is amplified by P/N, which is approximately 4, thus amplifying the noise contributions of the operational amplifier on VREF. In voltage reference 200, the ptat current, i.e., current I2, is generated by amplifying the base current of transistor 208, which is a ptat current. Current I2 itself is not amplified, thus the noise of the operational amplifier is not amplified and noise performance of voltage reference generator 200 is significantly improved as compared to voltage reference generator 100.
Although the reference voltage has a non-zero temperature coefficient, total variation of the reference voltage over the combination of variations in process and in temperature is less than for voltage reference generator 100. The effect on β of variations in process counteract the effect of variations in process on VBE of the bipolar transistor and decreases the overall effect of process variations on voltage reference generator 200. The decrease in variations in VREF for voltage reference generator 200 as a function of process is greater than the increase in variation as a function of temperature. Thus, voltage reference generator 200 has overall reduced variations in VREF as compared to variations in VREF for voltage reference generator 100 over process and temperature. At 1.62V, the PSRR of an exemplary voltage reference generator 200 is 60 dB over all process and temperature conditions, and 70 dB at nominal process and temperature conditions.
In some exemplary applications, it may be advantageous to generate a VREF that varies with temperature. The ratio of R4/R3 may be adjusted to provide a slope appropriate to the typical application by strategically positioning the center of the parabola. For example, by appropriately positioning a vertex of the parabola, the slope of VREF as a function of temperature may be adjusted to generate a VREF that always increases or always decreases as a function of temperature under particular operating conditions. The exemplary embodiment of circuit 200 was designed for a supply voltage of 1.62V and a reference voltage of 0.96V, however, this circuit is not limited thereto. Voltage reference generator 200 may be operated at lower supply voltages and reference voltages, and remains operable so long as VDD−VREF>400 mV (i.e., the current mirror remains operable).
While circuits and physical structures are generally presumed, it is well recognized that in modern semiconductor design and fabrication, physical structures and circuits may be embodied in computer readable descriptive form suitable for use in subsequent design, test, or fabrication stages. Accordingly, claims directed to traditional circuits or structures may, consistent with particular language thereof, read upon computer readable encodings and representations of same, whether embodied in media or combined with suitable reader facilities to allow fabrication, test, or design refinement of the corresponding circuits and/or structures. Structures and functionality presented as discrete components in the exemplary configurations may be implemented as a combined structure or component. The invention is contemplated to include circuits, systems of circuits, related methods, and computer-readable medium encodings of such circuits, systems, and methods, all as described herein, and as defined in the appended claims. As used herein, a computer readable medium includes at least disk, tape, or other magnetic, optical, semiconductor (e.g., flash memory cards, ROM), or electronic medium and a network, wireline, wireless or other communications medium.

## Claims

1. A voltage reference generator comprising:
a first bipolar transistor configured to amplify a base current of the first bipolar transistor, the base current being proportional to an absolute temperature,
a resistor coupled to the base of the first bipolar transistor,
the base current being proportional to a voltage difference between two base-emitter voltages of bipolar transistors configured to have different current densities, the voltage difference being formed across the resistor coupled to the base and the base current being at least partially based on a resistance of the resistor coupled to the base, and
a current mirror circuit configured to mirror a first current at least partially based on the amplified base current and configured to provide the mirrored current to a voltage reference node.

2. A voltage reference generator comprising:
a first bipolar transistor configured to amplify a base current of the first bipolar transistor, the base current being proportional to an absolute temperature, and
a resistor coupled to the base of the first bipolar transistor,
wherein the base current is proportional to a voltage difference between two base-emitter voltages of bipolar transistors configured to have different current densities, the voltage difference being formed across the resistor,
wherein a reference voltage produced by the voltage reference generator is proportional to a parabolic function of temperature.

3. The voltage reference generator, as recited in claim 1, wherein a power supply coupled to the voltage reference generator is less than 1 .7V.

4. The voltage reference generator, as recited in claim 3, wherein a power supply rejection ratio of the voltage reference generator is at least 60 dB.

5. The voltage reference generator, as recited in claim 1, wherein a reference voltage generated by the voltage reference generator is less than the bandgap voltage of silicon.

6. The voltage reference generator, as recited in claim 1, comprising:
a second bipolar transistor, providing one of the two base-emitter voltages; and
a voltage reference node receiving a voltage based at least in part on the first current.

7. The voltage reference generator, as recited in claim 6, wherein the first bipolar transistor provides the other of the two base-emitter voltages, and the second bipolar transistor operates at a current density different from the current density of the first bipolar transistor.

8. The voltage reference generator, as recited in claim 6, wherein the first bipolar transistor is a low-beta transistor.

9. The voltage reference generator, as recited in claim 8, wherein beta is less than ten.

10. The voltage reference generator, as recited in claim 8, wherein beta is less than five.

11. The voltage reference generator, as recited in claim 6, further comprising:
a circuit coupled to the voltage reference node, the circuit generating a first voltage, the first voltage being proportional to a complement of the absolute temperature.

12. The voltage reference generator, as recited in claim 6, further comprising:
an operational amplifier maintaining effective equivalence of a voltage on a node coupled to the first bipolar transistor and a node coupled to the second bipolar transistor.

13. The voltage reference generator, as recited in claim 12, wherein a noise component on the voltage reference node is substantially equivalent to noise of the operational amplifier.

14. The voltage reference generator, as recited in claim 6, wherein the integrated circuit includes a maximum of one feedback path.

15. The voltage reference generator, as recited in claim 1, wherein the current mirror mirrors the first current without substantially amplifying the first current.

16. The voltage reference generator, as recited in claim 6, wherein the voltage is proportional to a parabolic function of temperature.

17. The voltage reference generator, as recited in claim 16, wherein the resistor has a value adjusting an effective slope of the reference voltage as a function of temperature.

18. The voltage reference generator, as recited in claim 6, wherein a power supply coupled to the voltage reference node is less than 1.7V.

19. The voltage reference generator, as recited in claim 18, wherein the power supply rejection ratio is at least 60 dB.

20. The voltage reference generator, as recited in claim 6, wherein the voltage is less than the bandgap voltage of silicon.

21. A method for generating a reference voltage comprising:
developing a base current of a first bipolar transistor, the base current being proportional to absolute temperature;
amplifying the base current;
the base current being proportional to a voltage difference between a base-emitter voltage of a second bipolar transistor and a base-emitter voltage of the first bipolar transistor, the voltage difference being formed across a first resistor coupled to a base of the first bipolar transistor, the base current being at least partially based on a resistance of the first resistor;
mirroring a first current at least partially based on the amplified base current; and
generating a reference voltage at least partially based on the minored current.

22. A method for generating a reference voltage comprising:
developing a base current of a first bipolar transistor, the base current being proportional to absolute temperature;
amplifying the base current; and
generating a reference voltage based at least in part on the amplified base current,
wherein the base current is proportional to a voltage difference between a base-emitter voltage of a second bipolar transistor and a base-emitter voltage of the first bipolar transistor, the voltage difference being formed across a first resistor coupled to a base of the first bipolar transistor,
wherein the reference voltage is proportional to a parabolic function of temperature.

23. The method, as recited in claim 22, further comprising:
adjusting an effective slope of the reference voltage as a function of temperature according to the first resistor.

24. The method, as recited in claim 21, further comprising:
maintaining substantial equivalence of a voltage on a first node and a voltage on a second node with an operational amplifier, the first and second nodes being used to develop the base current.

25. The method, as recited in claim 21,
wherein the mirroring has an effective gain of one.

26. The method, as recited in claim 21, wherein the first bipolar transistor is a low-beta transistor.

27. The method, as recited in claim 26, wherein beta is less than ten.

28. The method, as recited in claim 26, wherein beta is less than five.

29. The method, as recited in claim 21, wherein the reference voltage is less than the bandgap voltage of silicon.

30. The method, as recited in claim 21, wherein a power supply coupled to the voltage reference node is less than 1.7V.

31. The method, as recited in claim 30, wherein the power supply rejection ratio is at least 60 dB.

32. An apparatus comprising:
means for developing a current proportional to absolute temperature;
means for generating a reference voltage based at least in part on the current,
wherein the means for developing the current proportional to absolute temperature includes a resistor, a first bipolar transistor configured to have a first current density, and a second bipolar transistor configured to have a second current density different from the first current density,
wherein a voltage difference between base-emitter voltages of the first and second bipolar transistors is formed across the resistor, the resistor being coupled to the base of the first bipolar transistor, and current through the resistor being substantially equal to the base current of the first bipolar transistor.

33. The apparatus, as recited in claim 32, wherein the reference voltage varies according to a parabolic function of temperature.

34. The apparatus, as recited in claim 32, further comprising:
means for adjusting an effective slope of the reference voltage as a function of temperature.

35. The apparatus, as recited in claim 32, wherein the means for developing the current proportional to absolute temperature includes the means for amplifying current and the means for amplifying provides one of the two base-emitter voltages of bipolar transistors.

36. A voltage reference generator comprising:
a first bipolar transistor configured to amplify a base current of the first bipolar transistor, the base current being proportional to an absolute temperature,
wherein a base-collector voltage of the first bipolar transistor equals a voltage difference between two base-emitter voltages biased at different current densities.

37. The method, as recited in claim 21, wherein the first and second bipolar transistors are configured to have different current densities.

38. The voltage reference generator, as recited in claim 36, wherein a reference voltage generated by the voltage reference generator varies according to a parabolic function of temperature.

39. The voltage reference generator, as recited in claim 1, wherein the base current is inversely proportional to the resistance of the resistor.

40. The voltage reference generator, as recited in claim 1, wherein the resistor is coupled between the base of the first bipolar transistor and a power supply node.

41. The voltage reference generator, as recited in claim 6, wherein the first bipolar transistor provides the other of the two base-emitter voltages and the first and second bipolar transistors are pnp transistors configured in common-collector configurations.

42. The voltage reference generator, as recited in claim 41, wherein the resistor is coupled between the base of the first bipolar transistor and the base of the second bipolar transistor.

43. The voltage reference generator, as recited in claim 42, wherein the base of the second bipolar transistor is coupled to a voltage bias node.