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NIST

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NIST SPECIAL PUBLICATION 400-88

U.S. DEPARTMENT OF COMMERCE/Technology Administration

National Institute of Standards and Technology

Semiconductor Measurement Technolog

INSTANT - IGBT Network Simulatio

and Transient ANalysis Toe
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Semiconductor Measurement Technology:

INSTANT - IGBT Network Simulation

and Transient ANalysis Tool

A. R. Hefner, Jr.

Semiconductor Electronics Division

Electronics and Electrical Engineering Laboratory

National Institute of Standards and Technology

Gaithersburg, MD 20899

June 1992

U.S. DEPARTMENT OF COMMERCE, Barbara Hackman Franklin, Secretary

TECHNOLOGY ADMINISTRATION, Robert M. White, Under Secretary for Technology

NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY, John W. Lyons, Director
National Institute of Standards and Technology Special Publication 400-88

Natl. Inst. Stand. Technol. Spec. Publ. 400-88, 159 pages (June 1992)

CODEN: NSPUE2

U.S. GOVERNMENT PRINTING OFFICE

WASHINGTON: 1992

For sale by the Superintendent of Documents, U.S. Government Printing Office, Washington, DC 20402-9325
TABLE OF CONTENTS

Page

Abstract 1

I. INTRODUCTION 2

II. IGBT DYNAMIC MODEL 5

MOSFET Input Characteristics 10

Bipolar Output Characteristics 11

IGBT State Equations 13

Conductivity-Modulated Base Resistance 15

HI. INTERACTION WITH EXTERNAL CIRCUITS 16

Series Resistor-Inductor Load 18

Polarized Turn-Off Snubber 18

Polarized Active Feedback Snubber 21

Paralleled IGBT Operation 23

IV. INSTANT - IGBT NETWORK SIMULATION AND TRANSIENT

ANALYSIS TOOL 23

INSTANT Operation 26

Using INSTANT 29

V. PARAMETER EXTRACTION ALGORITHMS 34

Tail Decay Rate 37

Tail Size Versus Anode Current and Voltage 41

Saturation Current Versus Gate Voltage 45

On-State Voltage Versus Gate Voltage 50

Gate and Gate-Drain Charge 54

VI. MODEL VERIFICATION 54

Steady-State Characteristics 58

Dynamic Characteristics 58

Interaction With Load Circuit 66

Interaction With Drive Circuit 72

VII. CONCLUSIONS 81

REFERENCES 85

Appendix 1 Ambipolar Transport 87

Appendix 2 Transient Bipolar Collector Current 90

Appendix 3 Bipolar Emitter-Base Voltage 96

Appendix 4 INSTANT Document File 99

Appendix 5 INSTANT Main Program 108

Appendix 6 Subroutine IGBTSEQ 110

Appendix 7 Subroutine IGBTVeb 113

Appendix 8 Subroutines IGBTINP, IGBTSTO and IGBTREC 116

Appendix 9 Function Decs H9

Appendix 10 Function Spachg 121

Appendix 11 Circuit File: Rlload.for 123

Appendix 12 Circuit File: Clamp.for 129

iii
Appendix 13 Circuit File: Actsnub.for 136

Appendix 14 Circuit File: Paralel.for 142

NOMENCLATURE . 149

LIST OF FIGURES

Page

1. A diagram of two of the diffused cells of an n-channel IGBT 3

2. The basic equivalent circuit model of the IGBT 4

3. The configuration of the MOSFET and bipolar equivalent circuit components

superimposed on a schematic of one-half of the symmetric IGBT cell 9

4. The coordinate system used to develop the IGBT bipolar transistor model ... 12

5. Simplified circuit element transformations for use in deriving external circuit

state equations from Kirchhoff's laws 17

6. The circuit configuration of an IGBT with a series resistor-inductor load

and a resistive gate drive 19

7. The circuit configuration of an IGBT with a series resistor-inductor load, a resistive gate drive, and a polarized turn-off snubber or soft clamp

protection circuit 20

8. The circuit configuration of an IGBT with a series resistor-inductor load, a

polarized gate drive resistance, and a series resistor-capacitor feedback

circuit 22

9. The circuit configuration of two paralleled IGBTs, with a common series

resistor-inductor load, and separate resistive gate drive circuits .24

10. A simplified schematic representation of figure 9 obtained using the element

transformations indicated in figure 5 25

11. Simplified flowchart of the INSTANT circuit simulation program where the

three user-defined subroutines are explained on the right 27

12. An example of the user-defined subroutine STATEQ for the circuit of

figure 6 30

13. File organization of the INSTANT software package indicating the use of

Linkcirc.bat to create a circuit simulation program from the three

user-defined subroutines 31

14. Example device and circuit input files for the series resistor-inductor load

with a resistive gate drive 32

15. Example of the user input and real-time graphics output of the INSTANT

software for the example of a series resistor-inductor load with a

resistive gate drive 33

16. Configuration of laboratory equipment necessary to extract the IGBT model

parameters for the high voltage and high current steady-state characteristics

and the dynamic characteristics 35

17. Circuit configuration and example turn-off switching waveforms for the

clamped large inductive load, and the constant anode supply voltage 39

iv
18. Experimental values of the current decay time constant versus current,

calculated from digitized waveforms for different device base lifetimes

and different initial currents 40

19. The graphics output of the tail decay rate automated extraction routine

indicating that the extrapolated zero current intercept is equal to

the 1/thl . . . 42

20. Constant anode voltage turn-off current waveform, indicating the current

before and after the initial rapid fall, and a diagram of the redistribution

phase on an expanded scale, showing the extrapolated value of Jt(0+

) 43

21. Measured values of the relative size of the extrapolated current decay tail

fltr,v versus current for two different values of constant anode voltage 44

22. Measured values and linear least-squares fit to l/f}t r,V versus Jt(0+

), indicating quantities obtained from slope and intercept 46

23. An oscillogram of the steady-state characteristics of the IGBT, denning the

value of the IGBT saturation current at a given gate voltage 47

24. The steady-state common collector current gain versus anode current for the

bipolar transistor of IGBTs with different base lifetimes 48

25. The square root of the MOSFET saturation current indicating that the slope is used to extract Kpaa t and the zero current intercept is used to extract Vt .... 49

26. Graphics output of the automated extraction procedure used to extract the

MOSFET threshold voltage and saturation transconductance 51

27. An oscillogram of the on-state characteristics of the IGBT, indicating the

on-state voltages versus gate voltage for a constant current 52

28. Graphics output of the automated extraction procedure used to extract the

MOSFET linear region transconductance and series resistance 53

29. Measured gate and gate-drain charging characteristics for a low anode current

and a relatively constant ~20-mA gate current pulse 55

30. The measured input capacitance versus gate voltage characteristics for

Vaa — 300 V obtained from digitized gate current and gate voltage

waveforms similar to those in figure 29 56

31. The measured gate-drain feedback capacitance versus anode-gate voltage

obtained from digitized gate current, gate voltage, and anode voltage

waveforms similar to those in figure 29 57

32. The measured and predicted values of the IGBT saturation current versus

gate voltage for IGBTs with different lifetimes 59

33. Predicted and measured on-state voltage versus current at Vg

„ — Vt = 35 V

for devices with different base lifetimes 60

34. The charge control current decay path obtained by superimposing nine

digitized current decay waveforms taken at different initial currents 62

35. Predicted infinite inductive load switching voltage and current waveforms

for a 7.1-/X5 device at different clamp voltages 63

36. A comparison of the theoretical and measured 10-A infinite inductive load

switching voltage waveforms for devices with different base lifetimes 64

v
37. A comparison of the theoretical and measured infinite inductive load switching

voltage waveforms for a 7.1-//S device at 5 A and 10 A 65

38. A comparison of the theoretical (solid curves) and measured values (symbols) of

fitr versus current for both constant anode supply voltage switching (circles)

and clamped inductive load switching (triangles) at 50 V (solid symbols)

and 150 V (open symbols) for a 7.1-ixs device 67

39. The measured and simulated series 31-0 resistor, 5.5-/zH inductor load

current and voltage waveforms for devices with different lifetimes 68

40. The measured and simulated series resistor-inductor load voltage and current

waveforms for a 7.1-/zs device and inductances from 0 to 80 /xH 69

41. The measured and simulated series resistor-inductor load voltage and current

waveforms for a 2.4-/zs device and inductances from 0 to 40 fiB. 70

42. The measured and simulated series resistor-inductor load current and voltage

waveforms for a 0.3-/zs device and inductances of 0.1 to 1.4 /xH . 71

43. The simulated and measured snubbed series resistor-inductor load current and

voltage waveforms for a 7.1-//S device, a 200-/xH inductance, and two

different snubber capacitances . 73

44. The simulated and measured snubbed series resistor-inductor load current and

voltage waveforms for a 2.4-/xs device, a 100-tzH inductance, and two different

snubber capacitances 74

45. The simulated and measured snubbed series resistor-inductor load current and

voltage waveforms for a 0.3-/zs device and a 10-/zH inductance 75

46. Comparison of the measured and simulated, gate and anode, current and voltage

turn-off waveforms for the circuit of figure 6 with different values of gate

resistance for a 7.1-/xs device, a 2.5-/zs device, and for a 0.3-its device 76

47. Comparison of the measured and simulated anode voltage, anode current, gate

voltage, and gate current turn-on waveforms for the circuit of figure 6 with

different values of gate resistance 78

48. The emitter-base voltage and base charge for the same turn-on conditions as the

Rg — 10 waveform of figure 47 and for two different device base lifetimes ... 80

49. Comparison of the measured and simulated, anode voltage turn-off waveforms

for the circuit of figure 8 with different values of gate resistance, external

gate-to-anode feedback capacitances, and different series feedback resistances . . 82

50. Comparison of the measured and simulated, anode voltage turn-on waveforms

for the circuit of figure 8 with different values of series feedback

resistances 83

A2.1. A simplified excess carrier distribution in the base indicating the change in

local excess carrier concentration with time due to the moving quasi-neutral

base width boundary 92

A2.2. A simplified excess carrier distribution in the base indicating the change in

local excess carrier concentration due to a change in total base charge .... 93

A2.3. The excess carrier distribution in the base for a given quasi-neutral base

width boundary velocity 94

vi
A3.1. The band diagram from the emitter to base contacts for an IGBT with the

physical parameters listed in tables 4 and 5, and a base lifetime of tb = 1 /^s,

indicating the electron quasi-fermi potential drops in the emitter ((f)nej ~ <f>pej)

and across the base (<j) nb — <f>nej) 97

LIST OF TABLES

Page

1. IGBT State Equations 6

2. Functions of IGBT State Variables 7

3. Anode Terminal Voltage 8

4. Characteristics Used to Extract Device Model Parameters 38

5. Physical Constants of Si at T = 25 °C 38

vii

Semiconductor Measurement Technology:

INSTANT - IGBT Network Simulation and

Transient ANalysis Tool

Allen R. Hefner, Jr. Semiconductor Electronics Division

National Institute of Standards and Technology

Gaithersburg, MD 20899

Abstract

The IGBT (Insulated Gate Bipolar Transistor) is a power semiconductor device that has

gained acceptance among power electronic circuit design engineers for motor drive and

power converter applications. These devices have the best features of both power MOSFETs and power bipolar transistors, i.e., efficient voltage gate drive requirements and high

current density capability. When designing circuits and systems that utilize IGBTs or other power semiconductor devices, circuit simulations are needed to examine how the

devices affect the behavior of the circuit. However, the semiconductor device models available in most circuit simulators were originally intended to describe microelectronic devices

and cannot adequately describe the characteristics of power devices.

In this publication, a compact IGBT model suitable for incorporation in circuit simulators is described, and a circuit simulation program called INSTANT is presented that

simulates the dynamic behavior of IGBTs within any external drive, load, and feedback

circuit configuration. The INSTANT simulator solves the systems of differential equations

(state equations) that describe each component of the circuit, where the equations for the

individual components are coupled by the circuit configuration. The INSTANT software

package is designed to provide the flexibility to change the external circuit configuration

and model equations. The device and circuit parameters are also readily accessible, and

the graphics output provides a real-time display of the waveforms as they are calculated.

This publication also describes the automated measurement methods developed to extract

the IGBT device model parameters from terminal electrical measurements. It is shown that

unlike parameter extraction for microelectronic devices, the dynamic characteristics must

be used to characterize IGBTs and to extract the model parameters. This occurs because

the devices exhibit non-quasi-static behavior and because the dynamic waveforms contain

many features that isolate different physical mechanisms, whereas the physical mechanisms

are convoluted in the relatively simple steady-state characteristics. The unique features

1
of the IGBT electrical characteristics are explained using the model, and the procedures

used to verify the IGBT model are given.

Key words: circuit simulator; dynamic model; FORTRAN; power transistor; software.

I. INTRODUCTION

The Insulated Gate Bipolar Transistor (IGBT) is a relatively new power device with an

insulated gate input like that of a power MOSFET but with the low on-state resistance of a power bipolar transistor. A schematic of the structure of two of the many thousand cells

of an n-channel IGBT is shown in figure 1. The IGBT functions as a bipolar transistor

that is supplied base current by the drain of a MOSFET where the source of the MOSFET

is shorted to the collector of the bipolar transistor (fig. 2). The regions of each of these

components are labeled on the right half of figure 1.

The bipolar transistor of the IGBT consists of a lightly doped wide base with the base

virtual contact (MOSFET drains) near the collector end of the base. This bipolar transistor has a low gain and is in the high-level injection condition for the practical current

density range of the IGBT. Consequently, the IGBT bipolar transistor cannot be described in traditional ways [1,2], The MOSFET portion of the IGBT behaves similarly to

the structurally equivalent power VDMOSFET (Vertical double Diffused MOSFET), with

the exception that the resistance of the lightly doped epitaxial layer is replaced by the

conductivity-modulated base resistance of the bipolar transistor.

An analytical model has been developed for the IGBT that is applicable for general external circuit conditions [3,4]. The analytical model for the IGBT is based upon ambipolar

transport theory and accurately describes the IGBT steady-state current-volt age characteristics [1-7]. The IGBT model does not assume the quasi-static condition for the

transient analysis and accurately describes the output current and voltage turn-off switching waveform for general loading conditions [1-5]. It was shown in reference [2] that the

traditional quasi-static approach of modeling bipolar transistors is not adequate for the

low-gain, high-level injection bipolar transistor of the IGBT. An analytical model for the

VDMOSFET characteristics has also been included in the non-quasi-static IGBT model,

and this model accurately describes the input and output, current and voltage, turn-on

and turn-off switching waveforms for general external drive, load, and feedback circuit

conditions [3].

The standard models available in most commercial circuit simulators (e.g., SPICE) were

originally intended to describe microelectronic devices and cannot readily be used to describe the internal bipolar transistors or internal MOSFETs of power devices such as the

IGBT [8-10]. The purpose of this publication is to describe the circuit simulation program

developed to simulate the behavior of IGBTs within the circuit [4], to present the complete

IGBT model in a form that is suitable for implementation in commercial circuit simulators

[8,9], and to describe the procedures used to extract the IGBT model parameters from

terminal electrical measurements [4,10]. The circuit simulation program described in this

2
Polysilicon

IGBT gate

Metal IGBT

cathode

MOSFET

source

MOSFET

drain

Oxide — "

P+

t

y body j—

-^"Bipolar"V

-^collectorj

MOSFET

channel -

-10nm- 20Mm

n- 93 Mm "Bipolar" base

Epitaxial layer

(2x1014cm~3

)

P+

Substrate

"Bipolar" emitter

f IGBT anode

Figure 1. A diagram of two of the diffused cells of an n-channel IGBT.

3
I

Cathode

mos

Gate

J

1

MOSFET f Ip (W)

In(W)

Anode

P-N-P

Figure 2. The basic equivalent circuit model of the IGBT.

4
publication is called INSTANT [4]: IGBT Network Simulation and Transient ANalysis

Tool. INSTANT* is written in generally portable FORTRAN code and is available with

graphics libraries for various PC, VAX,** and Sun** FORTRAN compilers and graphics

Windows environments [11].

II. IGBT DYNAMIC MODEL

In this section, an analytical model is presented that describes the dynamic behavior of

the IGBT including the drive circuit dependence and the load circuit dependence. The

IGBT model is formulated as the three state equations given in table 1 that describe

the evolution of the state of the base-collector voltage Vf,c , the base charge Q, and the

gate-source voltage Vg8 , where the symbols are denned in the nomenclature. These state

equations are expressed in terms of functions of the instantaneous values of the state

variables of the IGBT and the external circuit. The functions of the IGBT state variables

are listed in table 2, and the functions of the external circuit state variables, It and

Ig , depend upon the external circuit configuration as described below. To describe the

interaction of the IGBT with the external circuit, the IGBT state equations are integrated

simultaneously with the state equations of the external circuit. The circuit state equations

are expressed in terms of the IGBT state variables as well as the circuit state variables

using the expressions in table 3 to calculate the IGBT anode terminal voltage.

Figure 3 shows the configuration of the MOSFET and bipolar equivalent circuit components of the IGBT superimposed on a schematic of one-half of the symmetric diffused

IGBT cell. The MOSFET portion of the IGBT studied in this work behaves similarly

to the power VDMOSFET [12-15], with the exception that the resistance of the lightly

doped epitaxial layer is accounted for as the conductivity-modulated base resistance of the

bipolar transistor, R^. In addition, the drain-source and gate-drain depletion capacitances

coincide with the base-collector depletion capacitance of the bipolar transistor and hence

are only included in the MOSFET. In the remainder of this section, the mathematical

model for these internal components is described and is used to derive the IGBT state

equations.

* The INSTANT software package can be obtained by sending a letter of request along with a blank floppy disk(s) (total of at least 1 Mb) to the author of this publication, or by sending an e-mail message requesting the software with a return address to: hefner@sed.eeel.nist.

gov. The INSTANT software package contains the complete IGBT modeling source code, a graphics library for the specified FORTRAN compiler, example model parameter sets for several commercially available IGBT part numbers, and example input files for several

external circuit configurations.

** Certain commercial equipment, instruments, or materials are identified in this paper in or- der to specify adequately the experimental procedure. Such identification does not imply

recommendation or endorsement by the National Institute of Standards and Technology, nor does it imply that the materials or equipment identified are necessarily the best available for the purpose.

5
Table 1. IGBT State Equations

dV,9»

+

>gd dVbc dt Cgf + Cgd Cga + Cgd dt

(Tl.l)

be dt

It-M-

' jIt 2D

+ I Cga + Cgd

(T1.2)

—dQ =M • (7moa +/3en _Q_ 4N?cl

,) + (M-l).Jp (^) +

(T1.3)

6
Table 2. Functions of IGBT State Variables

W. yj2eai {Vd8 - Vga + VTd )/qNacl Wdej = y/2e.i(Vd. + Vbi )/qNacl Wbcj = y/2eai {Vbc + Vbi )/qNacl W = WB -Wb CJ

QB = gAWNacl

i = QI{Q + Qb)

D = DnDp(2Q + QB )/[Dn {Q + QB ) + QDP] Cbcj = A.€a i/Wbcj

Cdaj = {A - Agd )ea i/Wd8j

C'gdj Agd € a i /lVgdj

cgd

for Vda <Vga -VTd

( CoxdCgdj /(Coxd + Cgdj ) for vda > - VTd

BVcbo = BVf 5.34 x 1013

• Nj'75 M = 1/[1 - {Vcb /BVcbo ) BV*}

L gen

for Vga < VT

KPlin

Imoa — ^

(Vga - VT)Vda

KpiinVda

2KPtat

[i + e{vgB - vT)]

for Vda < {Vga - VT) KPsat Kpu

KPtat {Vga - VT ) 2

2[1 + 6(Vga - VT)\

for Vda > (Vga - VT)^p^ J^Plin

(T2.1;

(T2.2)

(T2.3]

(T2A)

(T2.5)

(T2.6]

(T2.7)

(T2.8]

(T2.9)

(T2.10;

(T2.ll]

(T2.12;

(T2.13;

(T2.14;

(T2.15)

7
Table 3. Anode Terminal Voltage

Mnc = 1/(1//-^ + 1/a*c)

flpe = 1 1

{I Itip + 1 1He)

+ HpcQ/{Q + Qb)

Decs = (kT/q)fJ,nctlpe/(Hnc + Hpc)

L = y/Dcca THL

W P0 =Q/{qALtanh—)

6p = P0 sinh(W/2L)/ sinh(^/X)

Q0 = A^2e8i qNB Vbi

w

2L

neff =

yOv* +P0

2 csch2 (£)

arctanh

y^+^csch^fj-tanhC^)

NB +P0 csch{f )tanh(^)

(T3.1)

(T3.2)

(T3.3)

(T3.4)

(T3.5)

(T3.6)

(T3.7)

(T3.8)

(T3.9)

Pb =

W/{qfinc ANB ) for Q < 0

W/(q/j,effAneff ) for Q > 0

Ve6i = Vw - (Q - Q0 ) 2 /{2qNB eMi A

2

)

Ve bd = In &+ as)(» + *) —ln

P° +Nb

Hi

(T3.10)

(T3.ll)

(T3.12)

' Vebj for Q < 0

I imn(Vebj ,Vebd ) for Q0 > Q > 0

> Vebd for Q > Q0

(T3.13)

8
Figure 3. The configuration of the MOSFET and bipolar equivalent circuit components

superimposed on a schematic of one-half of the symmetric IGBT cell.

9
MOSFET Input Characteristics

The basic expressions describing the equivalent circuit MOSFET of the IGBT are listed

among the functions of the IGBT state variables in table 2. To describe IGBTs made with

power MOSFET structures other than the VDMOSFET structure, the expressions in table

2 can be replaced with the expressions for the appropriate structurally equivalent power

MOSFET. The MOSFET channel current consists of the linear and saturation regions,

where the linear region transconductance parameter Kpun is different from the saturation

region transconductance parameter Kpaat due to the graded channel dopant density for the

diffused channel MOSFET [8,13]. This difference exists for all VDMOSFET structures,

but the linear region transconductance is not as important for the high-voltage power

VDMOSFETs due to the high series resistance of the thick, lightly doped epitaxial layer.

The MOSFET channel current expression also includes the reduction in channel mobility

due to high transverse electric fields using the parameter 6 [13,16].

The dominant components of the VDMOSFET gate-source capacitance Cgs are due to the

gate oxide capacitance of the source overlap COX9 and the source metallization capacitance

Cm indicated on figure 3. The dominant component of the MOSFET gate-drain capacitance Cgd is the gate oxide capacitance of the drain overlap Cox d for Vd8 < VgB — Vrd or the

series combination of the gate-drain overlap oxide capacitance and the gate-drain overlap

depletion capacitance Cgdj for Vj, > VgB — Vfd- The gate-to-channel and gate-to-body ca- pacitances are neglected in this publication for simplicity [15]. The effect of the inversion

of the silicon beneath the gate-drain overlap on the gate-drain capacitance for negative

gate voltages is also neglected. However, the simplified expressions for the capacitances in

table 2 can readily be changed to include these effects, if necessary.

The gate-drain overlap depletion capacitance Cgdj and the drain-source depletion capacitance Cd8 j are voltage dependent due to the voltage dependencies of the respective depletion widths. The drain-source depletion width Wd8j is proportional to the square-root of

the drain-source voltage plus the built-in potential of the junction Vn « 0.6 V. The gatedrain depletion width Wgdj is proportional to the square-root of the gate-drain voltage

where the threshold voltage for the depletion of the epitaxial layer V?d is approximately

zero for most devices due to the low doping concentration of the epitaxial layer. The

gate-drain capacitance is also proportional to the area of the gate-drain overlap Agd- The

drain-source capacitance is proportional to the area of the body region Ada (fig- 3), where

the sum of Agd and Ada is the active area of the chip A.

The depletion widths in table 2 and the corresponding capacitances are obtained by solving

Poisson's equation, assuming a one-sided step junction with the space charge concentration

Naci. The expression for the space charge concentration,

Nad = nb + -4451 - JTM22-* CO qAvpaat qAvn3at

is used to evaluate the equations in table 1 [1]. This expression consists of the sum of the

uncompensated dopant concentration Nb and the mobile carriers in the depletion region

10
due to the saturated velocity of holes and electrons in silicon vpBat and vnBat , respectively.

In general, the expression for Ntci must be solved implicitly during simulations because it depends upon the values of Ip (W) (described below) and Jmo« which are calculated using

the value of N8Ci.

Bipolar Output Characteristics

The transient behavior of the lightly doped wide base bipolar transistor of the IGBT (and

other conductivity-modulated devices) was analyzed in references [1,2]. The transient carrier distribution and currents in the base are obtained by solving the ambipolar transport

equations and charge continuity equations given in appendix 1 for the boundary conditions

of the bipolar transistor. Figure 4 shows the coordinate system used to develop the IGBT

bipolar transistor model. Because the base-collector voltage changes with time during

transient conditions, the base-collector depletion width changes with time and the excess

carrier charge stored in the base is swept into a neutral base width W that changes with

time. It is shown in appendix 2 that the ambipolar diffusion equation must be solved

for the moving boundary condition to obtain the non-quasi-static transient carrier distribution and collector current when the base width changes faster than the base transit

speed for excess carriers. It is also shown below that this condition exists during typical

IGBT transient operation and that the moving boundary redistribution effect dominates

the transient behavior.

The hole current at the collector edge of the neutral base (collector current of fig. 2 except

for the multiplication current) for the moving boundary condition is derived in appendix

2. The expression for the collector current is given in terms of the functions of the state

variables in table 2 by substituting eq (A2.3) into eq (A2.6) and using the expression for

the background base charge Qb in table 2:

r <vm ( ? \ t 2D n

Ct'i Q

dVt< f>\ ''W'yTTZJ 17, +

vn Q + I" •^\1T' (2)

where the expressions in table 2 for 7 and D are used so that the expression for the collector

current also describes the low-level injection condition. It is shown in appendix 2 that the

redistribution current (third term on the right-hand side of eq (2)) becomes larger than

the charge control current (second term) when the base width changes faster than the base

transit speed. Because the third term as expressed in eq (2) is proportional to the time

rate-of- change of base-collector voltage, it can be construed as a capacitive term where

the capacitance is proportional to the instantaneous charge in the base Q [1-3,7]. This

is indicated by the charge-dependent collector-emitter redistribution capacitance Ccer in

figure 3. Because the ratio Q/Qb is much larger that unity for high level injection, the

redistribution capacitance is much larger than the depletion capacitances and dominates

the output capacitance of the IGBT.

In addition to the components of current indicated on figure 3, a component of current:

Imult = M Igen + (M — 1) • (Imo. + IP(W)) (3)

11
©

E

yj

0

(0

CO CO

0

GC

c

oan

*-» Q)

CL

CD a

o

"o

o

0

I

w WB

Figure 4. The coordinate system used to develop the IGBT bipolar transistor model. The

emitter, base, and collector regions correspond to those indicated on the right half of figure

1.

12
flows between the collector and base regions due to carrier multiplication and thermal

generation within the base-collector depletion region. The holes generated within the basecollector depletion region drift toward the collector edge of the depletion region x — Wb,

and the electrons drift toward the base edge of the depletion region x = W. Therefore,

the electron-hole pairs generated within the depletion region constitute a component of

base current that flows from the collector. The electron current at the collector edge of

the neutral base x = W (base current of fig. 2) is equal to the sum of 1) the MOSFET

channel current multiplied by the multiplication factor M, 2) the current due to thermal

generation of carriers within the base-collector depletion region Igen multiplied by M, 3)

the component of multiplication current due to the hole current entering the depletion

region Jp (W), and 4) the displacement currents from the drain-source and gate-drain

capacitances:

dVj dV

In(W) = M • (Imo. + Igen ) + (M — 1) • IP (W) + {Cdaj + Cgd )^± - Cgd -^, (4)

where /mo4 , Igen, and M are given in terms of the state variables of the IGBT (e.g., see table 2).

IGBT State Equations

In this subsection, the expressions for the individual components of currents described

above are combined to form the IGBT state equations in table 1. These state equations

are expressed in terms of the instantaneous values of the state variables of the IGBT

(through the expressions in table 2) and in terms of the instantaneous values of the state

variables of the external circuit (through the expressions for Ig and It described below).

Thus the IGBT state equations are integrated simultaneously with the state equations

of the external circuit to simulate the transient waveforms of the IGBT including the

interaction with the external circuit. In the next subsection, it is shown how the external

circuit state equations are expressed in terms of the state variables of the IGBT and those

of the external circuit.

The state equation for the IGBT gate-source voltage, eq (Tl.l), is obtained by equating

the gate current Ig to the sum of the gate-source and gate-drain displacement currents,

and by then solving the resulting expressions for the time rate-of- change of the gate-source

voltage where Vda = Vj,c is used (see fig. 3). The state equation for the base-collector

voltage T1.2 is obtained by equating the total anode current It to the sum of the electron

and hole components at x — W (eqs (2) and (4) ), by substituting eq (Tl.l) for dVga /dt,

and by then solving for the time rate-of-change of base-collector voltage where Vda = V&c . In integrating the IGBT state equations, eq (Tl.2) is evaluated first so that the value of

dVbc/dt can be used to evaluate eq Tl.l.

The state equation eq (Tl.3) is obtained from the conservation of total base charge Q.

The conservation relation is obtained by integrating the continuity equation, eq (A1.6),

across the bipolar neutral base (between x = 0 and x = W):

^ = In(W) Jn (0), (5)

dt rHL

13
where Q is the integrated excess carrier electron charge in the bipolar transistor base which

is required to be equal to the excess hole charge in the bipolar transistor base to maintain

the quasi-neutrality condition. This expression indicates that the excess carrier electron

charge in the bipolar base is supplied by the electron current entering the base at (a; == W),

and is depleted by the electron current leaving the base at x = 0 and by recombination

of electrons with holes in the base Q/thl- Equation (T1.3) is then obtained using the

expression for the base current In {W) given by eq (4) and the expression for the boundary

condition of the electron current at the emitter edge of the base In {0) given in eq (A1.9)

where eq (A2.5) is used to express Pq in terms of the total integrated charge Q.

To analyze the behavior of the IGBT state equations, first consider the stiff gate drive

conditions in which the gate voltage is switched rapidly and the switching characteristics are determined by the output characteristics of the power switching device [1,2,7]. For the

IGBT, the output capacitance and thus the anode voltage rate-of-rise at turn-off is dominated by the moving boundary redistribution capacitance (last term in the denominator

in eq (Tl.2)). The redistribution capacitance dominates at turn-off because the ratio of

the excess carrier charge to the background mobile carrier charge in the base, Q/Qb> is much larger than unity for high-level injection (this capacitance also varies with device

base lifetime because Q varies with bas lifetime). However, because the base charge Q is zero at the initialization of turn-on, the redistribution capacitance is negligible, and the

IGBT can be turned on as rapidly as the structurally equivalent power MOSFET.

Next, consider the dependency of the IGBT switching waveforms upon the gate drive

conditions [3]. For gate currents below a critical value, the anode voltage turn-off switching

waveforms of the IGBT are determined by the gate current that charges the gate-drain

feedback capacitance. Otherwise, for gate current above the critical value determined by

Ig/Cgd > ItI^ouu the anode voltage switching waveforms are determined by the IGBT

output capacitance Cout. Because the output capacitance of the IGBT is several orders

of magnitude larger than that of the MOSFET, the gate current that begins to influence

the voltage rate-of-rise at turn-off is several orders of magnitude smaller than that for

the MOSFET. This critical value of gate current depends upon the value of base lifetime

because the output capacitance depends upon the IGBT base lifetime.

Equations (Tl.l) and (Tl.2) reduce to those for the structurally equivalent power MOSFET for Q = 0 (i.e., for tHl sufficiently small that Q remains zero). In the INSTANT

program described in section IV, the IGBT state equations can be used to describe the

structurally equivalent power MOSFET by assigning thl < 0- This option sets Q = 0 and

does not evaluate eq (Tl.3). In addition, the emitter-base diffusion potential described

below is set to zero for the MOSFET. Although the IGBT model equations mathematically reduce to those for the MOSFET at arbitrarily small thl, the MOSFET option of

INSTANT prevents the overflows that would occur in the numerical calculations if the

lifetime were set to zero to describe the MOSFET.

14
Conductivity-Modulated Base Resistance

In order to express the external circuit state equations in terms of the IGBT state variables

and the external circuit state variables, the IGBT anode-cathode terminal voltage VA must

be expressed in terms of the internal IGBT state variables. The anode-cathode voltage

of the IGBT is given by the sum of the emitter-base voltage, the MOSFET drain-source

voltage (equal to the base-collector voltage), and a series resistive drop due to the resistance

of the bond wire, the spreading resistance at the bond, and metallization resistance:

VA =Veb + Vbc +IT Ra . (6)

The base-collector voltage is an IGBT state variable and the series resistive drop is calculated from the anode current It which is determined by the external circuit. The IGBT

emitter-base voltage is analyzed in appendix 3 using the ambipolar transport equations of

appendix 1 [1,7],

The emitter-base voltage consists of three components as indicated in figure 3: the potential drop across the conductivity-modulated base resistance, the diffusion capacitance

potential, and the depletion capacitance potential, which is important for reverse blocking.

The emitter-base voltage can be expressed in the form:

Veb = Vebq (Vbc , Q) + IT - Rb(Vbc , Q), (7)

where the conductivity-modulated base resistance Rb and the potential drop across the

emitter-base capacit ance Vebq are functions of the instantaneous values of Vbc and Q [3,4].

The expression given in table 3 for Rb in the forward bias case (Q > 0) is obtained by

identifying the second term in eq (7) as the first term in eq (A3.4), where the expression for

fj-eff is used so that Rb reduces to the low-level injection, non-conductivity-modulated base

resistance for small values of Q. The expression for the emitter-base diffusion potential

Vebd (equal to Vebq in the forward bias injection regime Q ^> 0) is obtained by identifying

the first term in eq 7 as the sum of eq (A3. 2) and the second term in eq (A3.4). In the

INSTANT program, the series resistance RB of eq (6) is included in the evaluation of Rb for simplicity.

The values of electron and hole mobilities used for the forward-bias emitter-base voltage

fj, nc and fipc are functions of bias due to the carrier-carrier scattering effect [17]. The

carrier-carrier scattering component of mobility is accounted for by adding the scattering

frequencies (or equivalently inverse mobilities) due to carrier-carrier scattering [i c and due

to ionized impurity scattering and lattice \i n and fxp

. The inverse mobility due to carriercarrier scattering is given in terms of the free carrier level by [17]: = |?pln(l + a2 (5)-2 /

3 )]/a1} (8)

where the excess carrier concentration at the center of the base 8p is used to represent the

average free carrier density in the base. In general, the expression for /xc must be solved

15
implicitly during simulations because it depends upon the value of Sp which is calculated

using the value of fic .

In the dynamic model, the expression for Ve t> (eq (7)) depends upon the instantaneous

values of both Q and It independently of each another. This becomes important for rapid

turn-on conditions where the MOSFET portion of the device is switched on rapidly and

the total load current It flows through the base before sufficient excess carrier charge Q

is present to modulate the conductivity of the base. The emitter-base voltage at turn-on

may be as large as the on-state voltage of the structurally equivalent power MOSFET,

because Q is zero at the initiation of the turn-on and Rb is equal to the non-conductivitymodulated epitaxial layer resistance for Q < Qb- However, Q rapidly approaches a value

that is sufficient to modulate the resistance, because the steady-state charge is typically

several orders of magnitude larger than the background concentration.

The emitter-base junction depletion capacitance Ce bj indicated on figure 3 is important

when the emitter-base junction is reverse biased or has a small forward bias, but for larger

forward biases, the emitter-base diffusion capacitance Ce bd is dominant. In the model,

Ce bj is accounted for using the same state variable Q that accounts for Ce bd> For negative

values of Q, the emitter-base junction is reverse biased (reverse blocking) and the state

variable Q describes the space charge of the emitter-base depletion region. For this case, Veb is given by the sum of the potential across the non-conductivity-modulated epitaxial

layer resistance and the potential across the emitter-base junction depletion capacitance.

A continuous transition between Ce bj and Ce bd is imposed by using the larger of the two

capacitances (or equivalently the minimum of the capacitor voltages) for small forward

biases. The base and collector current expressions also differ for reverse blocking (not

indicated in the state equations of table 1).

III. INTERACTION WITH EXTERNAL CIRCUITS

To describe the dynamic behavior of IGBTs in different circuits, the IGBT state equations

are combined with the state equations of the external circuit. To evaluate the IGBT state

equations, the anode current and the gate current must be expressed in terms of the state

variables of the system. The state variables of the system consist of the state variables of

each IGBT (Q, Vg9 , Vbc ) and the state variables of the external circuit (inductor currents

and capacitor voltages). The external circuit state equations are obtained by expressing the

inductor voltages and the capacitor currents in terms of the state variables of the system.

The inductor voltages are used to form the state equations for the inductor currents using

All, I At = Vl/L, and the capacitor currents are used to form the state equations for the

capacitor voltages using dVc/dt = Ic/C. In general, the expressions for the gate and

anode currents of the IGBTs, the external circuit inductor voltages, and the external

circuit capacitor currents are obtained by applying Kirchhoff's current and voltage laws

assuming that the state variables of the system are known.

To simplify this process, the circuit can be represented schematically using the simplified

elements shown in figure 5. In this representation, the IGBTs within the circuit are

16
17
replaced by a known voltage source between the gate and cathode terminals and a known

voltage source in series with a known resistor between the anode and cathode terminals.

The values of Vf,c and Vga are assumed to be known because they are state variables, and

the values of Rb and Vebq are assumed to be known because they are evaluated directly

in term of the IGBT state variables, using the expressions in table 3. In addition, the

external circuit capacitors are replaced by a known voltage source, and the external circuit

inductors are replaced by known current source. Using the resulting simplified circuit,

Kirchhoff's current and voltage laws are then applied to obtain the expressions needed to

evaluate the IGBT state equations and to form the external circuit state equations.

Series Resistor-Inductor Load

As an example, consider the dynamic behavior of the IGBT for the series resistor-inductor

load circuit and the resistive drive circuit shown in figure 6. The load circuit state equation

for the circuit of figure 6 is: ^ = -^(VAA -RL -IL -VA ), (9)

where It = II for this circuit and VA is given by eqs (6) and (7). The gate current for the

circuit of figure 6 is given by:

I9 = (Vgg -Vg.)/Rg , (10)

where the gate pulse generator voltage is given by:

i 0 for t < ton

V^or»(^ — t on ) /triae f°r ton t <C t on + t rise Vgon for ton +iriae <t < tQ ff . (11)

Vgon {toff + tfall - t) /tfall for tQ ff <t < t Q ff + tfall ,0 for t > t 0 ff + tfall

The pulse generator rise and fall times are described by the second and fourth cases in eq

(11). The initial conditions of the state variables before the initiation of the gate pulse are

Vga — 0, Q — 0, Vbc = VAA , and II = 0. To simulate the dynamic operation of the IGBT

in different circuits, only the circuit state equations need to be changed.

Polarized Turn-Off Snubber

To include the protection circuit shown in figure 7, the state equation

yaa = <

dVs

dt

Vs - Vss

RB CS

VA - Vs - Vbi Vs - Vss

CsRd RbCs

for VA <VS + Vbi

for VA >VS + Vbi

(12)

18
19
Figure 7. The circuit configuration of an IGBT with a series resistor-inductor load, a

resistive gate drive, and a polarized turn-off snubber or soft clamp protection circuit.

20
is added. The anode current for this loading condition is given in terms of the state

variables 7^, VA , and V5 by

II for VA <VS + Vbi

Il _ VA Vs Vbi ^yA> ys + ybi

(13a)

and the anode voltage is given by

VA

Vebq + Vbc + IL -Rb

IL Rb RD + (VS + Vbi )Rb + (Vebq + Vbc)Rp

Rb + Rd

for VA <VS + Vbi

for VA >VS + Vbi

(136)

where #5 is the conductivity-modulated base resistance of the IGBT including the series

resistance Ra (see eqs (6) and (7)). Because the diode is modeled by a voltage offset Vbi and a small resistance Rd for the forward-bias condition and by an open circuit for the

reverse-bias condition, the two cases require the two different expressions in both eq (12)

and eq (13).

The bleeder resistor Rb is used to determine the initial condition of the snubber voltage

at the time the turn-off transient is initiated. If the bleeder resistor is connected to VA

instead of to the constant voltage supply, the protection circuit is commonly referred to as a polarized turn-off snubber (or shunt snubber) [18,19]. In this case, the initial condition

of Vs depends on the frequency and the duty cycle for a given Rb, but for long onstate times, it approaches the IGBT on-state voltage. If the snubber supply voltage is connected as shown in figure 7, the protection circuit reduces to a voltage clamping circuit

[20]. For this configuration, the initial condition of V5 depends on the frequency for a given

bleeder resistor, but it approaches V55 for single pulses (low frequencies) and V55 > VAA. For a repetitive waveform, the initial condition is obtained by iterating the solution until

Vs(t + T) = Vs(t) where T is the period of the repetitive waveform.

Polarized Active Feedback Snubber

Figure 8 shows the circuit configuration for the IGBT with a series resistor-inductor load, a polarized gate drive resistance, and a series resistor-capacitor external feedback circuit.

For this protection circuit, an additional state equation for the potential across the external

feedback capacitor Vc f

is necessary:

^sL = i (14)

21
22
where the feedback current is given by:

If = {Va - Vcf - Vg9 )/Rf. (15)

For this circuit, the IGBT anode current is given by It = II — If, and the anode voltage

is obtained in terms of the state variables by combining this expression with eqs (6) and

(7). The expression for the gate current of eq (10) is replaced by:

(If + (Vgg -Vga )/Rg for Vgg <Vga + Vhi I

° =

\lf + (Vgg - Vg.)/Rg

' < 16>

I +(V99 ~ V9S - Vbi )/Rg0n for Vgg > Vg9 + Vbi

where the diode is modeled as a voltage offset Vbi and a 1-Ct effective series resistance that

is included in Rgon - The initial condition for the feedback capacitor voltage before the

initiation of the gate voltage pulse is Vc f = Vaa~

Paralleled IGBT Operation

Finally, the circuit configuration of two paralleled IGBTs is shown in figure 9, where the

lead inductances are not considered in this particular example. A simplified schematic

representation of figure 9 is shown in figure 10 using the element transformations indicated

in figure 5. By applying Kirchhoff's current and voltage laws to the circuit of figure 10,

the necessary expressions are obtained for the inductor voltage and the gate and anode

currents for the two IGBTs. The anode voltage of the IGBTs is given by:

yA — (jL

_j_ ^>cl + Vebql Vbc2 + Kbg2 \ RblRb2

\ Rbl Rb2 ) Rbl + Rb2

The IGBT anode currents for this circuit are given by:

VA — Vbc i - Vebqi VA — Vbc2 — Ve bq2 /1Q v Iti = — and iT2 = ^ • (18)

n-bl -ttb2 The IGBT gate currents are given by:

j VSi -V

s:L

^Ig2=

V99-V9.2

(19)

Kgl Kg2

These equations in conjunction with eqs (9) and (11) form the state equations for the circuit

of figure 10, where each IGBT contributes three state equations. The initial conditions for

each of the IGBTs are the same as for the single IGBT described above.

IV. INSTANT - IGBT NETWORK SIMULATION AND TRANSIENT ANALYSIS

TOOL

In this section, a general overview of the operation and use of the INSTANT software

package is given. The INSTANT program is based upon the IGBT device model presented

23
Figure 9. The circuit configuration of two paralleled IGBTs, with a common series resistorinductor load, and separate resistive gate drive circuits.

24
IGBT1

r^W—-©-^>VM

II

\ /

\

/

\

/

\ /

i

'

i

i

V

gg

0Vebq1+Vbd/ ' 'g2

y \ — I - / V —

v Y

Rg2

s v gsi

/ \

IGBT2

\vgsa

Vebq2+Vbc2 /

Figure 10. A simplified schematic representation of figure 9 obtained using the element

transformations indicated in figure 5. This schematic is used to obtain the external circuit

state equations.

25
in section II and is applicable to general external circuits as described in section III. INSTANT is written in generally portable FORTRAN code and is available with graphics

libraries for various PC, VAX, and Sun FORTRAN compilers and graphics Windows en- vironments [11]. The INSTANT software package contains the complete software source

code, a graphics library for the specified FORTRAN compiler, and executable programs

for the example circuits described in section III along with example input files for the device and circuit parameters. The INSTANT software package also contains the document

file given in appendix 4 that describes each of the files on the disk, the variable names

used in the source code, and the procedure used to execute the programs and to generate

executable programs for different circuits.

INSTANT Operation

The INSTANT program (appendices 5-10) simulates the interaction of the IGBT with

the external drive, load, and feedback circuits. This is accomplished by simultaneously

integrating the state equations of the IGBT with those of the external circuit, where

the expressions for the IGBT anode current It and gate current Ig are determined by

the external circuit configuration and where the expression for the IGBT anode-cathode

terminal voltage is obtained in terms of the state variables using eqs (6) and (7) (e.g., see sec. III). The simultaneous integration of the state equations is performed using the

readily available RKF45 subroutine [21] where the initial conditions are obtained from a known steady-state condition. The RKF45 subroutine uses an automatic Runge-KuttaFehlberg method to evaluate iteratively a user-defined subroutine that contains the state

equations. To simplify the implementation of different circuits and circuits with multiple

IGBTs, the IGBT model within INSTANT is implemented in two subroutines [4]; the

first subroutine IGBTSEQ* is given in appendix 6 and evaluates the IGBT state equations

(tables 1 and 2), and the second subroutine IGBTVeb is given in appendix 7 and evaluates

the emitter-base capacitor voltage Ve f, q and the conductivity-modulated base resistance i2&

(tables 2 and 3) which includes the series resistance Rs .

Figure 11 shows the simplified flowchart for the INSTANT program where the user-defined

subroutines for a given circuit are explained on the right. The INSTANT main program is also given appendix 5. To simulate a given circuit, the user needs only to create the three

user-defined subroutines and to link them with the INSTANT software package as described

below. The program begins by calling the user-defined subroutine INPUT. This subroutine

reads the IGBT parameters from a parameter input file by calling the subroutine IGBTINP

provided within the INSTANT software package, and reads the circuit parameters for the

given circuit from the circuit parameter input file. Subroutine INPUT then sets the initial

conditions for the state variables and sets the output and plotting parameters to be used

by subroutine OUTPUT. The parameters initialized within subroutine INPUT are passed

to the other user-defined subroutines using the common blocks /lOpar/, /CIRCpar/, and

/IGBTpar/. If circuits contain multiple IGBTs with different parameters, each parameter

set that is read from disk with IGBTINP can be stored in a different model parameter

t The "sans serif symbols throughout the text represent computer mnemonics.

26
Subroutine INPUT

Subroutine RKF45

Next Time

Step

Subroutine STATEQ

Time Step

Reached

Subroutine OUTPUT

Call IGBTINP

Read Circuit Parameters

Set Initial Conditions

Set Output Parameters

Call IGBTVEB

Circuit State Equations

Call IGBTSEQ

Write Data

Plot Data

Increment Time

If (time .gt. tfinal) Stop

Figure 11. Simplified flowchart of the INSTANT circuit simulation program where the

three user-defined subroutines are explained on the right.

27
array using subroutine IGBTSTO, and the parameters can be recalled to the common block

/IGBTpar/ when the IGBT model is evaluated for each device using IGBTREC. Subroutines

IGBTINP, IGBTSTO and IGBTREC are given in appendix 8.

After returning from subroutine INPUT, INSTANT calls subroutine RKF45 which repetitively evaluates the user-defined subroutine STATEQ to advance the system state variables

to the next time step within the specified precision. The user-defined subroutine STATEQ

evaluates the device and circuit state equations for the given circuit. This subroutine first

calls the subroutine IGBTVeb supplied within the INSTANT software package to evaluate the emitter-base capacitor voltage and the base resistance for each IGBT in terms of

the instantaneous values of the state variables of each IGBT. These values are used to

evaluate the circuit expressions for the gate currents, the anode currents, the capacitor

currents, and the inductor voltages, so that the state equations of the external circuit and

the state equations of the IGBTs can be evaluated, as described in section III. The IGBT

state equations are evaluated by calling IGBTS EQ which requires as its input the gate and

anode currents as well as the instantaneous values of the IGBT state variables.

As previously mentioned, the model equations that describe carrier- carrier scattering in

the neutral base and velocity saturation in the collector base depletion region must be

solved implicitly. The mobility reduction due to high free-carrier levels has a second-order

effect on the on-state emitter-base voltage [l] and is implemented iteratively within the

IGBTVeb subroutine [4]. The implicit equation is evaluated using the readily available

function ROOT (subroutine ZEROIN in ref. [21]) which iteratively evaluates the function

Decs given in appendix 9 to calculate the value of diffusivity including the carrier- carrier

effect. Using the parameter ccsflg in the device input parameter list, the carrier-carrier

scattering effect can be neglected (ccsflg < 0) for faster computation speed, or included

for more accuracy of on-state voltage (ccsflg > 0). The space charge concentration due

to velocity saturation within the base-collector depletion region has a second-order effect

on the time rate-of- change of the base-collector voltage [l] and is implemented iteratively

within IGBTSEQ [4]. This implicit equation is evaluated using the function ROOT which

evaluates iteratively the function spachg given in appendix 10 to calculate the base-collector

space charge density including the velocity saturation. The effect of the velocity saturation

in the base-collector depletion region can be included or neglected using the parameter

selfIg.

Once RKF45 has reached the next time step, subroutine OUTPUT is called (see fig. 11).

This subroutine writes and plots the data at that time step. The time step is then incremented within subroutine OUTPUT, and control is returned to the INSTANT main

program which continues the process of alternately calling subroutines RKF45 and OUTPUT until subroutine OUTPUT detects that the final time step has been reached. For the

given circuit to be simulated, the user must supply a file containing subroutines INPUT,

STATEQ, and OUTPUT which in turn reference the INSTANT-supplied subroutines

IGBTINP, IGBTVeb, and IGBTSEQ to describe the IGBTs. In effect, the three user-defined

subroutines completely describe the device and circuit equations, the model parameters,

and the program control for the simulation, where the IGBT equations are implemented

28
by simply calling subroutines.

Using INSTANT

Figure 12 shows an example of subroutine STATEQ for the circuit of figure 6. The inputs

from RKF45 are the time and the instantaneous values of the system state variables (Y),

and the outputs are the time rate- of- change of the state variables (YP) as evaluated by

the system state equations. This example has four state variables: one for the inductor

current and the three IGBT state variables. The circuit parameters that are designated

within subroutine INPUT are obtained through the common block /CIRCpar/, but the

IGBT parameters are not needed in this subroutine because they are passed directly from

subroutine iGBTINP to subroutines IGBTVeb and IGBTSEQ through the common block

/IGBTpar/. In the "Evaluate functions of state variables" segment of the subroutine in

figure 12, IGBTVeb is called to evaluate Rb and Ve b q so that the values of Va, Ig

, and It can

be evaluated in terms of the instantaneous values of the state variables using the circuit

equations. These values are used in the "Evaluate state equations" segment to evaluate the

state equations for the inductor current and to evaluate the IGBT state equations using

IGBTSEQ.

Figure 13 shows the file organization of the INSTANT software package. For a given circuit

the user must create the file called, for example, Circuit. for that contains the three user- defined subroutines: INPUT, STATEQ, and OUTPUT. Appendices 11 through 14 contain

user- defined circuit source code files for the example circuits discussed in section III, figures

6 through 9, respectively. The user then executes the batch file Linkcirc.bat with the

circuit source code file name (e.g., Circuit in this example) as a batch file parameter to

create an executable program called in this example Circuit.exe. The Linkcirc.bat batch file compiles the user-defined circuit subroutines and links them with the INSTANT-supplied

subroutines and the graphics library. Finally, the user executes the circuit program and

enters the names of the device parameter input file, the circuit parameter input file, and

the output data file. Figure 14 shows typical device and circuit input files for a 7.1-/zs base

lifetime IGBT, a 30-1), 80-/xH load, and a 500-fi gate resistance. These parameters can be

changed with an ASCII text editor without recompiling the circuit routines.

As an example, figure 15 demonstrates the typical user input (a) and real-time graphics

output (b) of INSTANT for an IGBT being switched on and off for the circuit of figure

6. When the circuit program name is entered (e.g., Circuit.exe), the program first requests

the names of the input and output files. After the file names are entered by the user (e.g.,

Device. IGT, Circuit. inp, and Output.dat), the plot of figure 15b appears on the computer

graphics screen and the curves are drawn as they are computed at each time step of the

integration. The curves of figure 15b are scaled in subroutine output so that the expected

range of the curves will fit on the plot, and the gate current is offset to the center of

the vertical axis because it is negative at turn-off. This simulation takes about 30 s on

a 12-MHz, 386 microcomputer and takes about 2 s on a Sun SPARC station 2. Because

the waveforms are drawn as they are calculated, the simulations can be interrupted at any

point of the integration to speed the design process. When the simulation is complete,

29
Q **********************************************************

cC *** Subroutine to evaluate the state equations of the device and circuit.

C

SUBROUTINE STATEQ (Time, Y, YP)

C

C *** Designate the number of state equations and declare the calling

C arrays for the state variables and their time derivatives.

C

INTEGER NEQN

PARAMETER (NEQN=4

)

REAL Y (NEQN) , YP (NEQN) , time

C

C *** Designate external functions.

C

REAL Pulsgen

EXTERNAL Pulsgen

C

C *** Declare labeled common block for circuit parameters.

C

REAL LL, RL, Vaa, Rg, Vggon, ton, toff, trise

COMMON /CIRCpar/ LL, RL, Vaa, Rg, Vggon, ton, toff , trise

CC *** Declare names for state variables and their time derivatives.

C

REAL Vcb, Qte6, IL, Vgs

REAL DVcb, DQte6, DIL, DVgs

C

C *** Declare names for functions of state variables.

C

REAL Va, Ig,Vgg, It,Rb, Vebq

C

C *** Define names for state variables in terms of the calling array.

C Vcb =Y(1)

Qte6 =Y(2)

IL =Y(3)

Vgs =Y(4)

CC *** Evaluate functions of state variables.

C

call IGBTVeb (Qte6, Vcb, Rb, Vebq)

Va= IL*Rb + Vcb + Vebq

C

It=IL

Vgg=Pulsgen (time, ton, toff , trise, trise , Vggon)

Ig=(Vgg-Vgs) /Rg

C

C *** Evaluate the state equations.

C

call IGBTSEQ (Vgs, Vcb, Qte6, Ig, It, DVgs, DVcb, DQte6)

DIL=1 . 0/LL* (-IL*RL-Va+VAA)

C

C *** Define return array for time derivatives of state variables.

C

YP (1) =DVcb

YP (2) =DQte6

YP (3) =DIL

YP (4) =DVgs

C

RETURN

END

C

Q *************************************************************************

Figure 12. An example of the user-defined subroutine STATEQ for the circuit of figure 6.

30
Circuit.for

Subroutine STATEQ

Subroutine INPUT

Subroutine OUTPUT

C:> Linkcirc Circuit^

C:> Circuit.exe

Enter: Circuit.inp

Enter: Device.lGT

Enter: Output.dat

Linkcirc.bat

Fortran %1

Link %1 + Instant.obj, %1

Graph.lib + Fortran.lib

Instant.obj

Main

Subroutine

Subroutine

Subroutine

Subroutine

INSTANT

RKF45

IGBTINP

IGBTVEB

IGBTSEQ

Figure 13. File organization of the INSTANT software package indicating the use of

Linkcirc.bat to create a circuit simulation program from the three user-defined subroutines.

31
Device. IGT

7 1o.fi tL Mlni_ (s)

U.UUczO lAf W RD Vcm) MIN RD {GUI -O C~ I U

j

0.1 A

6!5e-14 Isne (A)

4.7 Vt (V)

0.38 Kpsat (A/V**2)

0.7 Kplin (A/V**2)

0.02 Rs (ohm)

0.01 theta (1/V)

0.62e-9 Cgs (F)

0.05 Agd (cm**2)

1.75e-9 Coxd (F)

0.0 Vtd (V)

4.0 BVn

2.0 BVf

-1.0 ccsflg (+/-)

-1.0 sclflg (+/-)

Circuit.inp

30.0 RL

80.e-6 LL

300.0 Vaa

500.0 Rg

20.0 Vgon

1.0e-6 ton

20.0e-6 toff

0.1 e-6 trise

30.0e-6 tfinal

0.0e-6 tplot

Figure 14. Example device and circuit input files for the series resistor-inductor load with

a resistive gate drive.

32
C:> Circuit.exe

Enter file to read device input parameters from:

Device. IGT

Enter file to read circuit input parameters from:

Circuit. inp

Enter file to write data to:

Figure 15. Example of the user input (a) and real-time graphics output (b) of the INSTANT software for the example of a series resistor-inductor load with a resistive gate

drive.

33
the plot can be printed directly on a graphics-compatible dot-matrix printer or Postscript

laser printer.

Initially at t = 0, the gate voltage is zero and the IGBT is in the off-state. Because

the IGBT is in the off-state, the anode current is zero, and the anode voltage is equal

to the anode supply voltage (300 V). At t = 1 /zs, the pulse generator is switched on

so gate current begins to flow into the gate and the gate voltage begins to rise. Once

the gate voltage exceeds the threshold voltage, the anode voltage falls rapidly to near its

on-state value, and the anode current begins to rise at a rate that is determined by the

load inductance. At t = 20 /xs, the device and circuit have nearly reached the steady-state

condition. At this point, the gate voltage pulse generator is switched off so current begins

to flow out of the gate, and the gate voltage begins to fall. Once the gate voltage has

fallen to the value where the MOSFET enters the saturation region, the anode voltage

begins to rise slowly, and the gate voltage remains constant as the gate-drain overlap oxide

capacitance is discharged. Once the gate-drain overlap becomes depleted, the gate-drain

capacitance is reduced by about two orders of magnitude, and the anode voltage rises at a rate that is determined by the IGBT effective output capacitance. The anode voltage

overshoots the supply voltage due to the large load inductance. The anode current initially

falls at a rate that is determined by the load inductance and then tails off at a slower decay

rate due to the slowly decaying excess carrier charge in the base.

V. PARAMETER EXTRACTION ALGORITHMS

In this section, the algorithms that have been developed to extract the IGBT model parameters from computer-controlled measurements are discussed. Because the characteristics of

the internal MOSFETs and bipolar transistors are convoluted in the steady-state terminal

characteristics of merged power devices such as the IGBT, and because the conductivitymodulated devices exhibit non-quasi-static behavior, the dynamic characteristics must in

general be examined to characterize the devices and to extract model parameters. This

is in contrast to microelectronic devices where the steady-state current-voltage terminal

characteristics in conjunction with interelectrode capacitance-voltage characteristics are

sufficient to extract most of the device model parameters.

The dynamic measurements require high precision and the ability to make calculations on

waveforms obtained from computer-controlled measurements. In addition, calculations are required to separate the measured characteristics into the characteristics of the internal

MOSFETs and bipolar transistors. The basic measurement system used to do this is shown in figure 16a and consists of a computer that controls power supplies, a waveform

digitizer, a temperature controller, and a curve tracer. Figure 16b shows an example

of a circuit configuration used to measure the high-voltage and high-current steady-state

characteristics which require a pulsing capability to avoid excess heating for the high-power

measurements. Figure 16c shows an example of a circuit configuration used to measure

the dynamic characteristics which require a high current gate pulse generator, a highresolution single event transient digitizer, and a low-inductance bypass capacitor for the

anode power supply. Various software tools and programmable electronic instruments are

34
Computer

IEEE 488 BUS

Waveform

Digitizer

Temperature

Controller

Figure 16 (a). Configuration of laboratory equipment necessary to extract the IGBT

model parameters.

Tektronics 370 Digital Curve Tracer

Anode Voltage

Kelvin Sense

Step Generator

0-20V Gate Voltage

80 or 300 us Pulse

Gate voltage

Kelvin Sense

Collector Supply

2000V, 20A

Anode Current

Sense Resistor

Data Output Converter

Analog to Digital

IEEE 488 Computer Interface

Figure 16 (b). Circuit configuration used to measure the high voltage and high current

steady-state characteristics.

35
DYNAMIC WAVEFORM ANALYSIS TEST SYSTEM

Other Power j Supplies i

Other Power]

Supplies i

IGBT

HP214A

2A, 100V

Pulse Generator

5

Drive

Circuit

Vg VA

Load

Circuit

Kepco BOP 500M

500V, 80mA

Power Supply

Large Valued

Low Inductance

Bypass Capacitor

TEK7912

Transient Waveform

Digitizer Advanced and

Delayed Trigger

Computer Interface

Figure 16 (c). Circuit configuration used to measure the dynamic characteristics.

36
available to facilitate the development of automated parameter extraction procedures [10].

In this publication, the basic IGBT parameter extraction sequence is discussed, but the

specific hardware and programming details will be the topic of a future publication.

Table 4 gives a list of the IGBT model parameters indicating their nominal values and

the device characteristics that are used to extract each parameter. The physical constants

of silicon listed in table 5 are not expected to change from one IGBT device to another.

The device active area is extracted by decapsulation and visual inspection of the active

chip size. Five basic types of electrical measurements are used to extract the remaining

model parameters: 1) The turn-off current tail decay rate versus anode current is used

to extract the base lifetime thl- 2) The relative size of the turn-off current tail versus anode current, and anode voltage is used to extract the emitter electron saturation current

I8nei the metallurgical base width Wg, and the base doping concentration Nb- 3) The

saturation current versus gate voltage is used to extract the MOSFET channel saturation

region transconductance parameter Kpsa t and the MOSFET channel threshold voltage

Vt. 4) The on-state voltage versus gate voltage at a constant anode current is used to

extract the MOSFET channel linear region transconductance parameter Kpnn and the

series resistance R8 . 5) The gate charge and the gate-drain charge characteristics are used

to extract the gate-source capacitance, the gate-drain overlap oxide capacitance, and the

gate-drain overlap area. The five measurements are performed in the indicated sequence

because the calculations made using measured data to extract the parameters require the

values of the parameters extracted from the preceding extraction steps.

Tail Decay Rate

The constant anode voltage turn-off current tail decay rate can be measured using either

the clamped large inductive load (1-mH) test circuit (fig. 17a) or the constant anode supply

voltage test circuit (fig. 17b). The clamped inductive load technique is most suitable for

small base lifetimes because it results in a larger tail size. When the gate voltage is turned

off or when the anode clamp voltage is reached for the clamped inductive load case, the

anode current initially falls rapidly and then tails off slowly as the anode voltage remains

constant. It is shown theoretically in reference [l] that the decay time constant of the

slowly decaying portion of the current waveform for a constant anode voltage is given by:

dln/r =

d7Wd< = _ W1+ M

(20)

dt ~ IT tHL V III k

where

n

2 A2 D n

2 q A ^P '

, (21)

IlTHL

Figure 18 shows the measured current decay time constant versus instantaneous tail current

for devices with five different base lifetimes. Each curve is composed of several segments

measured at different initial currents because the current scales of the measurement equipment need to be changed to maintain adequate precision. The measured values of the

37
Table 4. Characteristics Used to Extract Device Model Parameters

A fl 1 rm2 nU.O — sO.Un 1X0 /#Q J.CU1 needy rale

T c n w i n — 14 a 0.0 X 1U A Tail size vs. current

WB 93 fim Tail size vs. Va

Nb 2 x 10 14 cm-3 Tail size vs. Vt 5.0 V Saturation current vs. Vg8

Kpsat (14 A /V2

o.oi v-1 oaturaiion current vs. e Saturation current vs. Kpiin 0.75 A/V2 On-state voltage vs. Vgt

Rs 30 mft On-state voltage vs. Vga Cg3 0.6 nF Gate charge

Coxd 1.6 nF Gate charge

Agd 0.05 cm2 Gate-drain charge

vTd 0.0 V Gate-drain charge

Table 5. Physical Constants of Si at T = 25 °C

rii 1.45 x 10 10 cm~3 1500 cm2 /V-s

450 cm2 /V-s

e« 1.05 x 10- 12 F/cm

«i 1.428 x 1020 (cm-V-s)

4.54 x 10 11 cm"2

1.1 x 107 cm/s

Vpsat 0.95 x 107 cm/s

38
Ix(t)

VA = V0n

VA = Vc|amp

! a)

VA

b)

VG

i T (t)

•Vaa

G ii^^-^ ^Vdamp

K I

1

I

Va

time

Figure 17. Circuit configuration and example turn-off switching waveforms for (a)

clamped large inductive load, and (b) the constant anode supply voltage.

39
i-

<

H

CO

z

o

O v

LLI T

i= £

"D

<

o

LU

Q

HZ

LU

DC

O

9

8

7

6

5

4

3

2

1

0

10-2

HL T HL=8.1 |as

2.45

0.3

10"1 10°

ANODE CURRENT (A)

10 1

Figure 18. Experimental values of the current decay time constant versus current, calculated from digitized waveforms for different device base lifetimes and different initial

currents. The value of base lifetime extracted for the 8.1-/zs device is indicated.

40
current decay time constant are obtained by taking the negative time derivative of the log

of the digitized current waveforms as indicated on figure 18. From eq (20), it is expected

that the maximum value of this decay rate is equal to the device base lifetime as indicated

on figure 18. However, the decay time constant decreases at low currents due to recombination in the emitter-base junction, due to surface recombination, and because the base

enters the low-level injection condition. Therefore, the value of base lifetime is extracted

from the least-squares fit of eq 20 to the measured values of the inverse current decay

time constant versus current. The graphics output of this automated extraction routine

is shown in figure 19, where it is indicated that the extrapolated zero current intercept is equal to the 1/thl and that the slope can be used to extract the value of Isne using eq

(21).

Tail Size Versus Anode Current and Voltage

Figure 20a shows a typical constant anode voltage turn-off current waveform, which consists

of an initial rapid fall followed by a slowly decaying current tail. It was shown in reference

[1] that a finite time is required after the initial rapid fall in current for the excess carriers

to assume a distribution that can be described by a simple model. However, if the current

tail is extrapolated back past the redistribution phase to the time of the initial rapid fall in

current using the current tail of a larger initial current waveform, as shown in figure 20b,

then the relative size of the extrapolated current tail for constant anode supply voltage

switching is given by [l]:

0tr,V

It(0+)

Jt(0-)-/t(0+)

Va — const.

max

tr,V 1 + h J

(22)

where omax

Ptr,V

W

~L

COth(?)

2tanh(^) - 1

-l

(23)

anc

tanh2 (|9 f ^qmADpf

(f)4 V + J PZtfh

(24)

The current tail of the larger current waveform is used for the extrapolation because the

current decay rate is a function of the instantaneous tail current, and the model parameters

that describe the tail are not known at this point in the extraction sequence.

Figure 21 shows the measured values of the relative size of the extrapolated current tail

(3trjV for two different values of constant anode supply voltage. The extrapolations are performed using a larger initial current waveform which is automatically aligned with the

41
ANODE CURRENT (A)

Figure 19. The graphics output of the tail decay rate automated extraction routine

indicating that the extrapolated zero current intercept is equal to the I/thl42
Figure 20. (a) Constant anode voltage turn-off current waveform, indicating the current

before and after the initial rapid fall, and (b) a diagram of the redistribution phase on an

expanded scale, showing the extrapolated value of It{0+

).

43
</) c

oO

+

o

+

o

>

101

I I I 1 1 1

1 1—I

I I I 1 1

1

1—I—I I I 1 1

VA =50V

10 01

10-2

From least squares fit of 1/ptr,v

• Measured values using

automatic extrapolation

I i i i i 1 1 1 1

1

i i i i 1 1 1

10"1 10°

l T (0

+

) (A)

101

Figure 21. Measured values of the relative size of the extrapolated current decay tail (3tr ,v versus current for two different values of constant anode voltage.

44
current tail by a computer-fitting algorithm. Figure 22 shows the measured values of

1/Ar,v versus the initial tail current, which is expected from eq (22) to be linear with

a slope of l/(fiTM°$Ik ) and with a zero current intercept of l//?TMay. The solid curves in

figures 21 and 22 are obtained from a least-squares linear fit to the l/(3tr ,v data. The

slope of the least-squares fit is used with eq (24) to extract the parameter Jsne , and the

zero current intercept is used to obtain the value of W at the given anode voltage from eq

(23). The method of using the slope of figure 22 to extract Iane is preferred over using the

slope of figure 19, because the variation of /3tr,v with current is larger than that of tjjlThe inputs to this automated extraction routine are the values of thl and A obtained

from the previous extraction steps, and the outputs are the values of Iane and the value

of W for the voltage at which the measurement was made. Because the base width W is expected to be given in terms of anode voltage by [1]: W^WB - V^siVA /qNB , (25)

the values of W versus the square root of anode voltage can be used to extract the values

of Wb and Nb- The values of Wb and Nb obtained using the extraction algorithms are

consistent with the values previously obtained from spreading resistance measurements [1].

Saturation Current Versus Gate Voltage

Figure 23 defines the IGBT saturation current at a given gate voltage. The IGBT an- ode current saturates because the internal MOSFET channel current saturates where the

MOSFET saturation current is magnified (gain enhancement) by the steady-state common collector current gain of the bipolar transistor (1 + f3aa ). Figure 24 shows the bipolar

transistor common collector current gain versus anode current predicted using the bipolar

transistor parameters that were isolated and extracted from the dynamic characteristics

described in the previous paragraphs. Hence, the saturation characteristics of the internal

MOSFET are obtained from IGBT saturation characteristics by dividing out the bipolar

transistor current gain [1]: Jmo.= Jf°7(l+/W (26)

For Vgt — Vt <C 1 the square root of the saturation current is linearly related to the gate

voltage with a zero current intercept of Vt and with a slope of y/Kpaat /2 (see eq (T2.15)):

VW. = ~ Vt). (27)

The value of 6 « 0.01 V

-1 can be extracted from the saturation current at high gate

voltages.

Figure 25 shows the square root of the MOSFET saturation current versus gate-source

voltage obtained by dividing the measured IGBT saturation current by the common collector current gain for devices with different base lifetimes. The values of Kpaat and Vt

are extracted from the slope and the zero-current intercept of these curves. This method

45
0.9

0.8

0.7

I I I I I I I I I I I I I VA = Constant = 1 0 Vi i i i i i i i i i i i

Q max

Ptr.V

n max

.

Ptr.V 'k

From least squares fit

to 1/ptr,V data

Measured values using

automatic extrapolation

' ' i» ' ' i i i i i i i » i i » i i 0 0.4 0.8 1.2 1.6 2.0 2.4 2.8

l T (0+) (A)

Figure 22. Measured values and linear least-squares fit to l//3tr,v versus It(0+

), indicating

quantities obtained from slope and intercept.

46
CI

<u

u

u

53

o

O

53

*SAT

•VG=6V

•5.8

5.4

Anode Voltage (V)

Figure 23. An oscillogram of the steady-state characteristics of the IGBT, defining the

value of the IGBT saturation current at a given gate voltage.

47
o

9: 1.0 I 1 1 1 — 1 1 m 10~ 3 10~ 2 10~ 1 10° 10 1 10 2

TOTAL CURRENT l T (A)

Figure 24. The steady-state common collector current gain versus anode current for th

bipolar transistor of IGBTs with different base lifetimes.

48
GATE VOLTAGE (V)

Figure 25. The square root of the MOSFET saturation current indicating that the slope

is used to extract Kp8at and the zero current intercept is used to extract Vj<.

49
results in similar values of Kp8at and Vr before and after the bipolar transistor current

gain of each device is reduced by neutron exposure, which is not expected to change the

values of the MOSFET parameters [6]. Figure 26 shows the graphics output of this automated parameter extraction procedure indicating the measured IGBT saturation current,

the MOSFET saturation current calculated from the measured data using the parameters

obtained from the previous extraction steps, and the least-squares fit to the MOSFET

saturation current.

On-State Voltage Versus Gate Voltage

Figure 27 is an oscillogram of the output characteristics of the IGBT, indicating the onstate voltage for different gate voltages at a constant anode current. As indicated in eq (6),

the IGBT anode-cathode voltage consists of the sum of the bipolar emitter-base voltage

(due to conductivity-modulated base resistance and the emitter-base junction voltage), the

voltage drop across the series resistance and the voltage across the MOSFET channel.

For the IGBT on-state, the MOSFET channel current is in the linear region, and this

MOSFET channel current is magnified by the steady-state common collector current gain

of the bipolar transistor (fig. 24): = (28)

Using eqs (6) and (28), and assuming that the MOSFET channel current is given by the

first term in the linear region expression of eq (T2.15), the IGBT on-state voltage is given

by:

v-^ +

{ i + i:)KPlin (ct)- (29)

where

Vr ee Veb + R..IT + / (30)

and Vbc — Vd8 has been used (see fig. 3).

From eq (29), it is expected that the on-state voltage versus l/(Vga — Vr) at a constant

anode current is linear with a slope of It/ Kpun (l + (3aa ) and with an infinite gate voltage

intercept of Vr given by eq (30). Figure 28 shows the graphics output of the automated

extraction procedure used to extract the MOSFET linear region transconductance and

series resistance. As indicated on figure 28, the values of Vr and Kpun are obtained

from the slope and intercept of the least-squares fit to the measured on-state voltage

versus l/{Vgs — Vr) at a constant anode current over the range of gate voltages where the

MOSFET channel current is given by the first term in the linear region expression of eq

(T2.15). The values of Kpnn and Ra are thus obtained from this extraction step using the

values of Vr, 0aa , Ve b, Kpun , and 6 calculated from model parameters obtained in previous

extraction steps.

50
VT GATE VOLTAGE (V)

Figure 26. Graphics output of the automated extraction procedure used to extract th

MOSFET threshold voltage and saturation transconductance.

51
ANODE VOLTAGE (V)

Figure 27. An oscillogram of the on-state characteristics of the IGBT, indicating the

on-state voltages versus gate voltage for a constant current.

52
2.6

< 2.4

>

in

(D 22

g 2.0

LU

Q

9 1.8

1.6

I I I I I i i i 4

1 i/

- Vr = 1 .58 V

_ Kplin = 0.97 A/V**2

it - in n a

Temp = 25°C

" xmaxfit = 1.2 V**-1

"t

(1 + Pss) Kplin

+ Measured data — Least-squares fit

vr

i 'i i i i i i i i i 0.04 0.08 0.12 0.16 0.20

Figure 28. Graphics output of the automated extraction procedure used to extract the

MOSFET linear region transconductance and series resistance.

53
Gate and Gate-Drain Charge

Figure 29 shows typical IGBT turn-on gate and anode voltage waveforms for a nearlyconstant gate current and for a load that results in a low anode current. These waveforms

are used to examine the gate and gate-drain charge characteristics [3]. For the low anode

current, Q « 0 and the gate charge characteristics are similar to those of the structurallyequivalent power MOSFET [12,13]. The gate voltage waveform consists of three phases,

as indicated in figure 29. During the first phase, Vgs rises with a constant slope as the

constant gate current charges the constant gate-source capacitance. Therefore, the gate- source capacitance is extracted from this phase, as indicated in figure 30, by dividing the

digitized values of the gate current waveform by the time rate-of-change of gate voltage

computed from the digitized values of the gate voltage waveform. During the second

phase, Vga remains virtually constant, and Va falls as the gate current charges the voltagedependent gate-drain feedback capacitance. Therefore, the voltage dependence of the

gate-drain depletion capacitance is ascertained by dividing the digitized values of the gate

current waveform by the time rate-of-change of gate-to-anode voltage computed from the

digitized values of the gate and anode voltage waveforms as shown on figure 31. For the

VDMOSFET structure, the gate-drain depletion capacitance is expected to be given in

terms of gate-to-anode voltage by [3]:

C a- ~ Agd^si / 2g

s 9 3 ~ y/2eai (VA - Vbi - Vgs + VTd)/qNB

'

Therefore, the measured values of Cg dj for high anode voltages are used to extract Agd,

and 1/Cgdj versus Va — Vga can be used to extract V"^. During the third phase of the

gate voltage waveform, Va remains relatively constant, and the gate-source voltage rises as the gate current charges the sum of the gate-drain overlap oxide capacitance and the

gate-source capacitance. Therefore, the value of Cox d is extracted by subtracting the value

of the input capacitance during the first phase from that during the third phase.

VI. MODEL VERIFICATION

In this section, it is shown that the IGBT model presented in section II and implemented

in INSTANT gives accurate results when the parameters are extracted as described in

section V. Results are shown for IGBTs with the parameters listed in tables 4 and 5 and

for devices with different base lifetimes (an exception to table 4 is that the base width of

the 0.3-/XS device is 110 ^m). Comparisons of the IGBT model with experiments are made

for different device base lifetimes, different external circuit configurations, and different

circuit component values.

The validity of the model for both steady-state and transient conditions is examined. The

dynamic model is first examined for the constant gate current condition, the constant anode

current condition, and the constant anode voltage condition to verify each of the IGBT

state equations independently. The model is then verified for external circuit operating

conditions representative of those for which the device is intended to be operated. It

54
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6

TIME (|is)

Figure 29. Measured gate and gate-drain charging characteristics for a low anode current

and a relatively constant ~ 20-mA gate current pulse.

55
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14

Vgs

Figure 30. The measured input capacitance versus gate voltage characteristics for Yaa

300 V obtained from digitized gate current and gate voltage waveforms similar to those

figure 29.

56
1 .0 r 1 '

i i 1 1 1

1

1

1—i—i i 1 1 1

1

1

1—i—i i 1 1 1

Figure 31. The measured gate-drain feedback capacitance versus anode-gate voltage

obtained from digitized gate current, gate voltage, and anode voltage waveforms similar

to those in figure 29. The data is obtained from waveforms with several different anode

supply voltages, 30 V, 100 V, and 300 V, to maintain adequate precision over the voltage

range of the measurements. The beginning of each waveform is evident by the high-voltage

portion that does not lie along the dashed line due to the increasing gate voltage before

phase 2 of figure 29 is reached. The low-voltage portion does not lie on the dashed line

because of the voltage offset of Vj,; and VtcL57
is shown that the model accurately describes the turn-on and turn-off waveforms for a

series resistor-inductor load both with and without snubber capacitors and active feedback circuits. The performance of the model is evaluated for different load resistances,

load inductances, gate resistances, snubber capacitances, feedback snubber capacitances,

and series feedback resistances.

Steady-State Characteristics

The saturation characteristics as denned in figure 23 are shown in figure 32 versus gate

voltage for devices with different base lifetimes. The saturation current versus gate voltage

is important during transient conditions when both a high anode current and a high anode

voltage occur at the same time. The steady-state value of the IGBT anode voltage for a

high gate voltage is important in determining the energy losses in the IGBT during the

on-state. The on-state characteristics of the IGBT were measured for gate drive voltages

from 10 V to 40 V. The on-state voltage has a significant gate drive voltage dependence

for on-state currents above 1 A due to the finite value of the MOSFET channel resistance.

Therefore, to demonstrate the accuracy of the wide base bipolar transistor model, the

theoretical and experimental values of the on-state voltage versus current at Vga — Vt — 35

V are shown in figure 33.

Dynamic Characteristics

The behavior of the gate charge and gate-drain charge characteristics of figure 29 are determined by eq (Tl.l) and are independent of eq (T1.2) and eq (Tl.3), because the

MOSFET channel current and bipolar transistor base charge are small for the low anode

current conditions. Therefore, eq (Tl.l) is independently verified by the good correspondence between the voltage dependencies of the measured capacitances of figures 30 and 31

and the theoretical expressions in table 2. To verify the remainder of the IGBT dynamic

model, both constant anode voltage and constant anode current turn-off conditions are ex- amined for a rapid gate voltage transition. Because the gate voltage is switched off rapidly

and then remains zero during the remainder of the transient, the IGBT state equations

T1.2 and Tl.3 are verified independently of eq (Tl.l). The constant current condition is obtained by using a clamped inductive load with a large (~ 1-mH) inductance. Before

the clamp voltage is reached, the large inductance requires the anode current to remain

constant at the initial value determined by the steady-state conditions. The constant an- ode voltage condition is obtained for two different load circuits: 1) For clamped inductive

load switching with a large clamp capacitor, the voltage remains constant after the clamp

voltage is reached. 2) For constant anode supply voltage switching (R = 0 and L = 0), the

anode voltage is held constant with a large- valued, low-inductance capacitor connected to

the anode, and the current is determined by varying the steady-state gate voltage.

Constant Voltage Current Decay: First consider the current waveform for constant anode

supply voltage switching which is shown in figure 20. The current waveform consists of an

initial rapid fall due to (but not equal to) the removal of the MOSFET current, followed

by a slowly decaying phase due to the remaining slowly decaying excess carriers in the

58
Theory

0 12 3

<Vgs -V T

)

Figure 32. The measured and predicted values of the IGBT saturation current versus gate

voltage for IGBTs with different lifetimes.

59
1.0 2.0 3.0 4.0 5.0

ON-STATE VOLTAGE (V)

Figure 33. Predicted and measured on-state voltage versus current at Vgs — V? = 35 V

for devices with different base lifetimes.

60
base. After the gate voltage reaches its off-state value and the MOSFET portion of the

current is removed, the current waveform is described by eq (Tl.2) and eq (Tl.3). For the

constant voltage condition, eq (Tl.2) reduces to an algebraic equation for the current in

terms of charge

JT « ^Q, (30)

where W is constant for constant anode voltages which are much larger than the emitterbase voltage, neglecting the effect of mobile carriers on the depletion region space charge

concentration. The current versus time is then obtained by integrating eq (Tl.3) where

only the last two terms are non-zero. Because the current is equal to a constant times

the charge, eq (Tl.3) indicates that the current decays exponentially with a time constant

of thl at low currents and that at high currents the rate is increased due to injection of

electrons into the emitter.

Figure 34 shows the measured slowly decaying portion of the current decay waveform over

several decades on a semi-log scale. This figure was obtained by overlapping the current

decay waveforms with different values of initial currents. After a short redistribution phase

[t > 0.5/zs), the current decay waveform follows a path independent of the initial current.

The redistribution portion of the waveform at each initial current is evident from the

beginning of each waveform, which does not lie on the continuous curve. The independence

of the decay rate on the initial current after the redistribution phase means that the decay

rate depends only on the instantaneous value of current and can be described by the

charge control model. Notice that the charge control current decay rate is nearly constant

in the intermediate current range and that it increases at both low and high currents. The

increased decay rate at high currents is due to injection of electrons into the emitter. The

linearity of the data of figure 19 verifies that the model accurately describes the charge

decay rate over the practical current range of the IGBT and thus verifies eq (Tl.3). The

increased decay rate for current below the practical current density range is not included

in the model.

Constant Current Voltage Rise: Next, consider the clamped inductive load with a large

inductor (~1 mH) and a large clamp capacitor. As an example, figure 35 shows the

predicted It — 10 A, large inductive load, turn-off current and voltage waveforms at different clamp voltages for a device with the parameters listed in tables 4 and 5, and a base lifetime of 7.1 /zs. Before the clamp voltage is reached, the large inductance keeps

the anode current constant at the initial value determined by the steady-state conditions.

Measured and simulated voltage waveforms for a large inductor load are compared in figure

36 for devices with different base lifetimes at a current of 10 A. The simulated voltage rateof-rise is primarily determined by eq (Tl.2), and the agreement with experiment verifies

this expression. Notice that the voltage rate of rise varies significantly with device base

lifetime. This is caused by the effective increase in the output capacitance due to the

moving boundary redistribution current. Because the depletion layer width is large for the

voltages in the curves in figure 36, the effect of mobile carrier charge on the depletion layer

space charge concentration is significant. For example, figure 37 shows the measured and

simulated large inductor voltage waveforms for two values of initial anode current and a

61
TIME (ps)

Figure 34. The charge control current decay path obtained by superimposing nine digitized

current decay waveforms taken at different initial currents.

62
400

S 300

LUo

> 200

LUQO

z

< 100

1 1 1 T

1 1 VC lamp=400V

Theory

_ THL

= 7' 1

liS - 300V

/

200V

=

100V

/ i i i i i i i

10

o 8

-

z

LU

CC

QC

D

O

LUQO

Z

<

6

-

4

-

2

-

0

4x10

-7 8x10" 7

TIME (S)

12x10 16x10

Figure 35. Predicted infinite inductive load switching voltage (a) and current (b) wave- forms for a 7.1-/zs device at different clamp voltages.

63
i

1 1 1 1 r

T|_|. =0.3 \is 2.4 7.1

TIME (s)

Figure 36. A comparison of the theoretical and measured 10-A infinite inductive load

switching voltage waveforms for devices with different base lifetimes.

64
TIME (s)

Figure 37. A comparison of the theoretical and measured infinite inductive load switching

voltage waveforms for a 7.1-fis device at 5 A and 10 A. The dashed lines indicate the

theoretical values neglecting the effect of mobile carriers on the collector-base space charge

concentration.

65
device base lifetime of 7.1 fxs. The dashed curves show the calculated values neglecting

this effect, and the solid curves account for this effect using eq (1).

Relative Size of the Current Tail: The ratio of the initial value of the slowly decaying

portion of the current decay waveform to the magnitude of the initial rapid fall in current

is denned as: Ir(0+) . . " It(0-)-7t(0+)'

(31)

where It(0~) is the steady-state anode current, and It(0+

) is the initial value of the slowly

decaying portion (see fig. 20). Figure 38 compares the measured and calculated values of

fitr for constant anode supply voltage switching (fttr,v) and /3tr for large inductor load

switching {fltr,L) versus current, both at two different voltages. The values of fitr,L differ

from the values of fltr,v because the excess carrier base charge is swept into a narrower base

(narrower than for steady-state) during the voltage rise, and because some of the charge

decays during the voltage rise. The dashed curves in figure 38 show the effects of neglecting

this decay by using the steady-state charge in calculating It(0+ ). The agreement between

the model and the experiment for /3tr,v indicates that the value of steady-state charge used

by the model is adequate for an initial condition of the transient. The agreement between

the theory and experiment for Ptr,L a^ different voltages indicates that the charge decay is properly accounted for during anode voltage transitions.

Interaction With Load Circuit

In this subsection, the interaction of the IGBT with external loading circuits is examined

by considering the turn-off anode voltage and anode current waveforms for various loading

conditions and for a stiff gate drive condition. For the stiff gate drive condition, the gate

voltage is rapidly switched to its off-state value so that the drive circuit has negligible

influence on the anode current and voltage switching behavior.

Series Resistor-Inductor Load: Figure 39a shows the measured current and volt age-switching waveforms for a series resistor-inductor load circuit of figure 6 with R == 31 f2,

Ll = 5.5 /zH, and Vaa — 150 V. A stiff gate drive circuit is used so that the drive

circuit parameters do not influence the output waveforms. Figure 39b shows the simulated

results for the same conditions as the measurements of figure 39a. The theoretical and

experimental waveforms are in good quantitative agreement with the exception that the

ringing is damped more in the experiment. Notice in figures 39a and 39b that the voltage

overshoots more and that the current approaches zero faster for the lower lifetime devices.

The overshoot results from the stored energy in the inductor which is transferred to the

effective output capacitance of the IGBT. It is evident from figure 36 that the effective

output capacitance of the IGBT (proportional to the time rate-of- change of anode voltage)

varies significantly with lifetime and that it is well described by the model.

The combinations of values of R, Ll, Vaa-, and thl which are suitable for unprotected

series resistor-inductor load switching with a fast gate voltage transition are limited. For

example, figures 40 through 42 show the simulated and measured series resistor-inductor

66
Figure 38. A comparison of the theoretical (solid curves) and measured values (symbols) of

fltr versus current for both constant anode supply voltage switching (circles) and clamped

inductive load switching (triangles) at 50 V (solid symbols) and 150 V (open symbols) for a 7.1-/xs device. The dashed curves are the calculated values of /3tr ,L neglecting the loss of

charge during the voltage transition.

67
Figure 39. The measured (a) and simulated (b) series 31-J7 resistor, 5.5-^H inductor load

current and voltage waveforms for devices with different lifetimes.

68
i i 1 1 1 1 1 1 r

LL = 80 nH

(a

(b

4x10"6 6x10"6

TIME (s)

8x10" 10x10-6

Figure 40. The measured and simulated series resistor-inductor load voltage (a) and

current (b) waveforms for a 7.1-fis device and inductances from 0 to 80 /zH.

69
450

400 h

i 1 -i 1 1 1 1 r

\ LL = 40|lH

Theory —— Experiment

t Hl=2.4 us

RL = 30 Q

VAA =300V

(a

L|_ = 40

20

Theory

Experiment

t Hl=2.4 gs

RL =30C2

VAA = 300V

' i j

1x10"6 2x10"6 3x10~6 4x10"6 5x10"6

TIME (s)

(b

Figure 41. The measured and simulated series resistor-inductor load voltage (a) and

current (b) waveforms for a 2.4-/zs device and inductances from 0 to 40 fiH.

70
500 I

1 1— i i— i i

TIME (s)

Figure 42. The measured and simulated series resistor-inductor load current and voltage

waveforms for a 0.3-/is device and inductances of 0.1 to 1.4 fiR.

71
load current and voltage-switching waveforms for values of inductance that can be safely

switched. Each figure is for a different device lifetime. For inductances larger than 40 /zH,

the peak overshoot voltage for the 2.4-/zs device (fig. 41) approaches the BVceo of the

IGBT (500 V), and the voltage will be clamped by the avalanche current. This is potentially

destructive, so a protection circuit must be added to the 2.4-/xs device for load inductances

larger than 40 /iH. For otherwise identical conditions, the 7.1-fxs device can switch 80 //H

(fig. 40) and the 0.3-/zs device can switch 1 /xH (fig. 42) without excessive voltage overshoot.

Polarized Turn-off Snubber: The simulated and measured series resistor-inductor load cur- rent and voltage waveforms including the protection circuit of figure 7 are shown in figures

43 through 45 for inductances which are too large to be switched without a protection circuit. The simulations are performed using eqs (9), (15), and (16) to describe the external

circuit. Each figure is for a different device lifetime and load inductance. Figures 43 and

44 include two different values of Cs- For lower values of Cs or larger Ll, the overshoot

approaches the device voltage rating. These figures demonstrate that the IGBT model

in INSTANT can be used to determine the values of the protection circuit components

needed for a given load circuit inductance. The simulations can also be used to examine

other quantities of importance in the design of a snubber circuit, such as the switching

energy of the device and the efficiency of the circuit.

Interaction With Drive Circuit

In this subsection, the interaction of the IGBT with external drive, load, and feedback

circuits is examined. For small gate drive currents, a significant time is required to charge

the gate-source and gate-drain capacitances. This results in a switching delay time and a reduced time rate-of- change of anode voltage. The small gate currents occur for large gate

drive resistances and for external gate-drain feedback capacitors.

Turn-Off Transient: Figures 46a through 46c show the measured and simulated, gate and

anode, current and voltage turn-off waveforms for the circuit of figure 6 with different

values of gate resistance, where figures 46a, 46b, and 46c are each for a different device

base lifetime and load inductance. The load inductances are chosen for each device so that

the anode voltage overshoot will not exceed the device voltage rating of 500 V. The gate

voltage pulse amplitude of Vgon — 20 V is chosen so that the plateau in gate current occurs

at approximately the same magnitude for turn-on as for turn-off. The 15-ns fall time of the

gate pulse generator is also included in the simulations. The gate voltage pulse widths for

the simulations and measurements are chosen so that a steady-state condition is reached

before the devices are switched off. The load resistance of 30 results in a steady-state

current of 10 A for the anode supply voltage of 300 V.

The turn-off sequence of figures 46a through 46c begins when Vgg is switched rapidly to

zero. Initially, Vga begins to fall as the gate capacitance is discharged through the gate

resistance, and Vja rises a few volts so that the current through the MOSFET channel

(linear region of eq (T2.15)) remains relatively constant. Once Vg8 has fallen and VdB has

risen to the point where the MOSFET enters the current saturation region Vd8 > Vga — Vr,

72
TIME (s)

Figure 43. The simulated and measured snubbed series resistor-inductor load current and

voltage waveforms for a 7.1-fis device, a 200-/zH inductance, and two different snubber

capacitances.

73
1 1 1 1 1 1 r

TIME(S)

Figure 44. The simulated and measured snubbed series resistor-inductor load current and

voltage "waveforms for a 2A-fxs device, a 100-^H inductance, and two different snubber

capacitances.

74
- 10.0 <

LU

DC

DC

O

LUQO

z

<

I—

DO

O

0 0.4X10"6 0.8x10"6 1.2x10" 6 1.6x10" 6

TIME (s)

Figure 45. The simulated and measured snubbed series resistor-inductor load current and

voltage waveforms for a 0.3-/xs device and a 10-/zH inductance.

75
1 1 1 1

1

ll v&

—i—i 1—i—i

Theory

Experiment

Ll -80p.H R L -30Q

Vaa-300V

„Q Ln \*° \ \

A »Q

Ji»o

II

1 Theory

IIh ExpGrinwnt 1^-71(1$ - U-80I1H

Hi., son

Vaa-300V

j i I i.... j i a

5

0

-5

1-10 i «(EK3 "20

tu

-30

-35

•40

—1 1 1 1 1

l ""T r i l

J won

Theory

Experiment t^^s -

Li. = 40|XH

i i i i

VM -300V .

J l i t i

100

o

-200 i

iii DC -300

cc13o

-400 I

•500

-600

-700

r l l l l r i i r i

ne -non

' /~4 50O

ll j

I ft H

j BO Theory

Experiment U - 1 J(lH Rl-300 -

i

i i i i Vaa- 300Vi i i i i 10 20 30 40 50 TIME (lis)

2 4 6 8 10 12 14 16 18 20 TIME (|1S) 0 0.1 0.2 0.3 0.4 0.5 0.8 0.7 0.8 0.9 1.0 TIME ( lit)

(a (b (c

Figure 46. Comparison of the measured and simulated, gate and anode, current and

voltage turn-off waveforms for the circuit of figure 6 with different values of gate resistance,

where (a) is for a 7.1-fis device, (b) is for a 2.5-^s device, and (c) is for a 0.3-//S device.

76
the gate voltage remains constant at Vga = VT+y/2Imo8 l

K

paat and the gate current charges

the large gate-drain overlap oxide capacitance as Vds rises slightly faster. This plateau in

Vgt continues until Vda rises to the point where the gate-drain overlap capacitance becomes

depleted, V&B > Vga — Vpd- Beyond this point, the gate-drain feedback capacitance is reduced by about two orders of magnitude and the anode voltage rate-of-rise increases

sharply. Because Va rises only slightly during the first two phases (from the on-state

voltage to about 10 V), they are perceived as a delay in the turn-off where the delay time

is nearly proportional to the gate resistance.

After the turn-off delay, the anode voltage rate-of-rise is determined by the effective output

capacitance Cout (denominator of eq (Tl.2)) if Ig /Cgdj » It/Couu otherwise, the anode

voltage rate-of-rise is limited by the gate current that charges the high-voltage gate-drain

feedback capacitance Cgdj. For a power MOSFET with a structure similar to that of the

IGBT in figure 1, Cout is on the same order of magnitude as Cgdj because Agd ~ Ad8 and the gate current limits the anode voltage rate-of-rise for Ig < It, i.e., for Rg > 2 ft. However, as mentioned above, the effective output capacitance of the IGBT is several

orders of magnitude larger than that of the structurally equivalent power MOSFET and

depends upon the device base lifetime. Thus, the rate-of-rise of anode voltage and the

anode voltage overshoot are not affected by gate resistances below 1 kfl for the 1.1-fxs

IGBT of figure 46a, below 500 Vt for the 2.5-/zs IGBT of figure 46b, or below 25 £1 for the

0.3-^s IGBT of figure 46c. For gate resistances larger than these values, though, the anode

voltage rate-of-rise and the voltage overshoot are reduced (active snubbing).

Turn-On Transient: Figure 47 shows the measured and simulated, gate and anode, cur- rent and voltage turn-on waveforms for the circuit of figure 6 with different values of gate

resistance. The disagreement between the simulated and measured gate current and gate

voltage waveforms is due to the source lead inductance which is not included in the simulations for simplicity. The small value of load inductances is chosen for this example to show

that both the anode current and anode voltage can change rapidly at turn-on. Because the

turn-on waveforms are relatively independent of device base lifetime, they are only shown

for the 2.5-/zs device. The gate voltage pulse amplitude of Vgon = 20 V is the same as for

the turn-off results, and the rise time of the gate pulse generator is also 15 ns.

The turn-on sequence of figure 47 begins when Vgg is switched rapidly to Vgon . Initially,

Vga rises as the gate capacitance is charged through the gate resistance, and Va remains

relatively constant at Vaa while Vga < Vr. This phase appears as a short turn-on delay

that is proportional to the gate resistance. Once Vga exceeds Vp, the MOSFET enters its

saturation region and the anode current increases as Vgs continues to increase. During this

phase, the gate current charges the gate-source capacitance and discharges the gate-drain

capacitance as Va decreases rapidly. Once Vga has risen and Vda has fallen to the point

where the gate-drain overlap depletion region vanishes, Vd» < Vga — Vrd, the gate-drain

capacitance increases by approximately two orders of magnitude, so Vga remains relatively

constant at Vga — Vr + ^2lmoa /Kpaat and the gate current charges the large gate-drain

overlap oxide capacitance as Va falls slowly. Once Vd8 is reduced to the point where the

MOSFET enters the linear region Vda < Vga - VT , the gate voltage begins to rise again

77
(c (d

Figure 47. Comparison of the measured and simulated anode voltage (a), anode current

(b), gate voltage (c), and gate current (d) turn-on waveforms for the circuit of figure 6

with different values of gate resistance.

78
and Vda continues to fall slowly so that the current through the MOSFET channel (linear

region of Imo8 in table 1) remains relatively constant.

Comparing figures 46 and 47, it is evident that the anode voltage rate-of-fall at turn-on

is influenced by much smaller gate resistances than those that influence the anode voltage

rate-of-rise at turn-off. This occurs because Q is zero at the beginning of the turn-on

sequence and the effective output capacitance depends upon Q (denominator of eq (Tl.2)).

Thus, the anode voltage rate-of-fall at turn-on is as rapid for the IGBT as it is for the

structurally equivalent power MOSFET. The speed of the low anode voltage portion of the

IGBT turn-on waveform (lower than the MOSFET on-state voltage) is limited, though,

for Rg < 30 Q by the finite time required to supply the base charge that modulates the

base resistance (dynamic saturation). For Rg > 30 O, the turn-on speed at low anode

voltages is limited by the time required for the gate current to discharge the gate-drain

overlap oxide capacitance.

Figure 48 shows the instantaneous emitter-base voltage and base charge for the same turn- on conditions as the Rg = 10 ft waveform of figure 47 and for two different device base

lifetimes. For small load inductances and small gate resistances, the anode current can rise

much faster than the base charge so that the base resistance is not conductivity-modulated

and the potential across the base resistance may initially be as large as the potential across the nonconductivity-modulated epitaxial layer resistance of the structurally equivalent

power MOSFET (~ 15 V). But, the base resistance rapidly becomes modulated, because

ImoB is initially nearly as large as the total current (10 A), and Q approaches ten times the

background base charge (Qb ~ 30 nC) in approximately 30 ns (see eq (Tl.3) and the time

rate-of-change of Q on fig. 48). The turn-on speed is relatively independent of the device

base lifetime because the time required to modulate the base resistance depends primarily

upon the MOSFET current and the base transit time.

Active Snubbing: It has been proposed by others (e.g., ref. [22]) that the gate resistance can be used to control the voltage rate-of-rise at turn-off for the IGBT (active snubbing).

However, as can be seen from figure 46, a large value of gate resistance is required to have

an influence on the voltage rate-of-rise at turn-off for the IGBTs. Therefore, it is beneficial

to use a polarized gate drive resistance in this instance so that the turn-on time is not also

increased. In addition, a very long, possibly unacceptable turn-off delay time results for

gate resistances large enough to have an influence on the IGBT anode voltage rate-of-rise

at turn-off (e.g., 30-fj.s turn-off delay for the Rg = 9 kf2 waveform in fig. 46a). This occurs because the gate-drain overlap oxide capacitance is much larger than the high-voltage

gate-drain overlap depletion capacitance.

It has been suggested by others [23], though, that the time rate-of-change of drain voltage

for power VDMOSFETs can be controlled independently of the delay time by inserting a

small capacitor from gate-to-drain. This occurs because the ratio of the net gate-to-drain

feedback capacitance at high voltages to that at low voltages is increased by inserting the

external feedback capacitor. This technique is especially beneficial for the IGBT due to

the excessively long delay times incurred [3]. It is proposed by Hefner [3] that a large

79
LU

O

o

>

co 3

<

CO

DC 2

LJJ

LU 1

i r

/THL= 7,1 |1S

Q

T|_|l= 0.3JLIS

T HL=0.3|XS

T HL=7.1|LIS

J I J L

2 O

LU

(D

DC

<

X

o

1 m

<

00

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0

TIME (jlls)

Figure 48. The emitter-base voltage and base charge for the same turn-on conditions as the Rg = 10 O waveform of figure 47 and for two different device base lifetimes.

80
gate-to- anode feedback resistor be placed in series with the external gate-to-anode feedback capacitor when used with the polarized gate resistance, so that the turn-on speed

is not significantly reduced by the feedback network for a given turn-on gate resistance.

A minimal value of series feedback resistance is also necessary to suppress high frequency

oscillations [24]. The circuit configuration of the IGBT with this polarized active feedback

snubber and a series resistor-inductor load is shown in figure 8 and the external circuit

equations are given by eqs (9), (11), (14), (15) and (16).

As an example, figure 49 compares the simulated and measured turn-off anode voltage

waveforms for circuit conditions similar to those of figure 46a with the exception that the

external feedback circuit components of figure 49 are included in two of the waveforms.

The Rg = 1-kfi and 9-kfi waveforms of figure 46a (i.e., Cf = 0) are repeated on figure

49 for comparison. It is evident from this figure that if a 0.2-nF external gate-to-anode

capacitor is inserted, the 1-kfi gate resistor results in a time rate-of-change of anode voltage

and voltage overshoot similar to the 9-kfi waveform of figure 46a, but with a turn-off delay

similar to that of the 1-kfi waveform of figure 46a. It is also evident from figure 49 that

values of series feedback resistance as large as Rf = It) kfi do not diminish the effect of

the feedback capacitor for the 1-kfi gate resistor.

However, the effect of the feedback capacitor at turn-on is diminished by a series feedback

resistance of 10 kfi, because the turn-on gate current is larger than the turn-off gate current

for the polarized gate resistance, and the feedback current becomes negligible if Va/R/

is much less than the gate current. For example, figure 50 compares the simulated and

measured turn-on anode voltage waveforms for the same circuit conditions as for figure 49

and for a turn-on gate resistance of Rgon = 100 fi. For Rf < 100 fi, the anode voltage

rate-of-fall is determined by the gate current charging the external gate-to-anode feedback

capacitor. However, for Rf > 10 kfi, the turn-on anode voltage waveform is similar to the

Rg = 100 fi waveform of figure 47 (i.e., Cf = 0). Thus, the rate-of-rise of anode voltage

at turn-off is controlled independently of the turn-off delay time and independently of

the rate-of-fall of anode voltage at turn-on without increasing the drive circuit current

requirements; i.e., it is not necessary to reduce Rgon to compensate for the addition of the

external gate-to-anode feedback capacitor.

VII. CONCLUSIONS

An analytical model has been developed for the IGBT that is applicable for general external

circuit conditions and is suitable for incorporation into circuit simulators. The analytical

model is based upon ambipolar transport theory and does not assume the quasi-static

condition for the transient analysis. To implement the IGBT model in the INSTANT

circuit simulator described in this publication, the model is formulated as three state

equations that describe the state of the base-collector voltage, the gate-source voltage, and

the excess carrier base charge. The INSTANT program simulates the interaction of the

IGBT with the external circuit by simultaneously integrating the IGBT state equations

with those of the external circuit. A simplified procedure has been described for deriving

the external circuit state equations by applying Kirchhoff's current and voltage laws to a

81
Theory

TIME (|is)

Figure 49. Comparison of the measured and simulated, anode voltage turn-off waveforms

for the circuit of figure 8 with different values of gate resistance, external gate-to-anode

feedback capacitances, and different series feedback resistances.

82
I I I I I

I I I I !_

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0

TIME (|is)

Figure 50. Comparison of the measured and simulated, anode voltage turn-on waveforms

for the circuit of figure 8 with different values of series feedback resistances.

83
simplified schematic representation of the IGBTs and the external circuit.

A general overview of the operation and use of the INSTANT software package has been

given, and the INSTANT source code has been described. The INSTANT software package

is designed to provide the flexibility to change the external circuit configuration and model

equations. The device and circuit parameters are also readily accessible, and the graphics

output provides a real-time display of the waveforms as they are calculated. INSTANT is written in generally portable FORTRAN code and is available with graphics libraries for

various PC, VAX, and Sun FORTRAN compilers and graphics Windows environments.

The INSTANT software package contains the complete software source code, a graphics

library for the specified FORTRAN compiler, and executable programs for several example

circuits. The INSTANT software package also contains the document file that describes

each of the files in the software package, the variable names used in the source code, and

the procedure used to generate executable programs for different circuits.

The automated measurement methods developed to extract the IGBT device model parameters from terminal electrical measurements have also been described. It has been

shown that unlike parameter extraction for microelectronic devices, the dynamic characteristics must be used to characterize the IGBTs and to extract the model parameters. The

dynamic characteristics must be used because the conductivity-modulated power devices

such as the IGBT exhibit non-quasi-static behavior, and because the characteristics of

the internal MOSFETs and bipolar transistors are convoluted in the steady-state terminal

characteristics of merged power devices such as the IGBT, whereas the dynamic waveforms

contain many features that isolate different model parameters. The device model parameters are obtained sequentially by selecting features of the device characteristics that isolate

parameters, and using the parameters obtained from previous extraction steps to calculate

the model parameters from the measured characteristics.

The unique features of the IGBT electrical characteristics have been explained using the

model, and the procedures used to verify the IGBT model have been given. The effective

output capacitance of the IGBT at turn-off is several orders of magnitude larger than that

of the structurally equivalent power MOSFET and depends upon the device base lifetime,

because the base charge at turn-off depends upon the device base lifetime. However, the

gate-drain feedback capacitance is unchanged from the value for the structurally equivalent

power MOSFET. Thus, the load inductance that results in excessive voltage overshoot is several orders of magnitude larger than that for the structurally equivalent power MOSFET

and varies with device base lifetime. The minimum gate resistance that influences the

anode voltage rate-of-rise at turn-off is also several orders of magnitude larger than that

for the power MOSFET and varies with device base lifetime. However, the anode voltage

rate-of-fall at turn-on is influenced by gate resistance as small as those that influence the

structurally equivalent power MOSFET, because the base charge is zero at the initiation

of turn-on.

84
REFERENCES

[1] Hefner, A. R., and Blackburn, D. L., An Analytical Model for the Steady-State and

Transient Characteristics of the Power Insulated Gate Bipolar Transistor, Solid-State

Electronics 31, 1513-1532 (1988).

[2] Hefner, A. R., An Improved Understanding for the Transient Operation of the Power

Insulated Gate Bipolar Transistor (IGBT), in Conf. Rec. IEEE Power Electronics

Specialists Conf., 303-313, (1989); also in IEEE Trans. Power Electronics PE-5, 459-

468 (October 1990).

[3] Hefner, A. R., An Investigation of the Drive Circuit Requirements for the Power

Insulated Gate Bipolar Transistor (IGBT), in Conf. Rec. IEEE Power Electronic Specialists Conf., 126-137, (1990); also in Special Issue of IEEE Trans. Power Electronics

on Modeling Power Electronics Circuits and Systems PE-6, 208-219 (April 1991).

[4] Hefner, A. R., Device Models, Circuit Simulation, and Computer-Controlled Measurements for the IGBT, in Record of 2nd IEEE Workshop on Computers in Power

Electronics, 233-243 (1990).

[5] Hefner, A. R., and Blackburn, D. L., A Performance Trade-Off for the Insulated Gate

Bipolar Transistor: Buffer Layer versus Base Lifetime Reduction, in Conf. Rec. IEEE

Power Electronics Specialists Conf., 27-38 (1986); also in IEEE Trans. Power Electronics PE-2, 194-207 (1987).

[6] Hefner, A. R., Blackburn, D. L., and Galloway, K. F., The Effect of Neutrons on the

Characteristics of the Insulated Gate Bipolar Transistor (IGBT), IEEE Trans. Nucl. Sci.

NS-33, 1428-1434 (1986).

[7] Hefner, A. R., Analytical Modeling of Device- Circuit Interactions for the Power In- sulated Gate Bipolar Transistor (IGBT), in Conf. Rec. IEEE Industry Applications

Society Meet., 606-614 (1988); also in IEEE Trans. Industry Applications IA-26, 995-

1005 (1990).

[8] Hefner, A. R., and Diebolt, D. M., An Experimentally Verified IGBT Model Implemented in the Saber Circuit Simulator, in Conf. Rec. IEEE Power Electronics

Specialists Conf., 10-19, (1991).

[9] Mitter, C. S., Hefner, A. R., Chen, D. Y., and Lee, F. C, Insulated Gate Bipolar Transistor (IGBT) Modeling Using IG-SPICE, in Conf. Rec. IEEE Industry Applications

Society Meet., 1515-1521 (1991).

[10] Lauritzen, P. O., Franz, G. A., and Hefner, A. R., Modeling Devices Used in Circuit

Simulators, PESC91 Tutorial Course sponsored by the Educational Committee of the

IEEE Power Electronics Society.

85
[11] Kahaner, D. K., and Anderson, W. E., Volksgrapher: A FORTRAN Plotting Package

Users Guide, Version 3.0, NISTIR 4238 (1990).

[12] Gauen, K., The Effects of MOSFET Output Capacitance in High Frequency Applications, in Conf. Rec. IEEE Industry Applications Society Meet., 1227-1234 (1989).

[13] Grant, D. A., and Gowar, J., Power MOSFETs - Theory and Applications (Wiley,

New York, 1989).

[14] Stein, E., and Schroder, D., Computer Aided Design of Circuits for Power Controlling with the New Power Elements MOSFET and SIT, in Conf. Rec. IEEE Industry

Applications Society Meet., 766-771 (1984).

[15] Castro Simas, M. I., Piedade, M. S., and Freire, J. C, Experimental Characterization

of Power VDMOS Transistors in Commutation and a Derived Model for ComputerAided Design, in IEEE Trans. Power Electronics PE-4, 371-378 (1989).

[16] Divekar, D. A., FET Modeling for Circuit Simulation (Lluwer Academic Publishers,

Boston, Mass., 1988), pp. 70-141.

[17] Selberherr, S., Analysis and Simulation of Semiconductor Devices, (Springer-Verlag,

New York, 1984).

[18] Mc Murray, W., Selection of Snubbers and Clamps to Optimize the Design of Transistor Switching Converters, in Conf. Rec. IEEE Power Electronics Specialists Conf.,

62-74 (1979).

[19] Ferraro, A., An Overview of Low-Loss Snubber Technology for Transistor Converters,

in Conf. Rec. IEEE Power Electronics Specialists Conf., 466-477 (1982).

[20] Nair, B. R., and Sen, P. C, Voltage Clamp Circuits for a Power MOSFET PWM

Inverter, in Conf. Rec. IEEE Industry Applications Society Meet., 797-806 (1984).

[21] Forsythe, G. E., Malcolm, M. A., and Moler, C. B., Computer Methods for Mathematical Computations (Prentice-Hall, New Jersey, 1977).

[22] Baliga, B. J., Chang, M., Shafer, P., and Smith, M. W., The Insulated Gate Transistor

(IGT) - A New Power Switching Device, in Conf. Rec. IEEE Industry Applications

Society Meet., 1-10 (1983).

[23] Korn, S. R., and Nelson, W. D., Optimization of Power MOSFET Drive Circuitry, in

Proc. of IEEE International Electrical, Electronics Conf., 96-103 (1983).

[24] Ronan, H. R., and Wheatley, C. F., Circuit Influences on COMFET (IGT) Dynamic

Latching Current, in Conf. Rec. IEEE Power Electronics Specialists Conf., 73-80

(1986).

86
Appendix 1 Ambipolar Transport

Because the base is wide and the base doping concentration is low for the bipolar transistor

of the IGBT, the concentration of injected carriers in most of the base becomes larger than

the base background doping concentration at a small current density. When the excess

carrier concentration is greater than the background doping concentration, the transport of

electrons and the transport of holes are coupled by the electric field in the drift terms of the

respective transport equations, and they cannot be treated separately. In this appendix,

it is shown that the transport of electrons and holes in the base of the bipolar transistor

of the IGBT must be described by ambipolar transport and cannot be described by the

traditional approach of decoupling the transport equations for electrons and holes.

In general, the electron and hole currents are given by:

dn

In = nqAfinE + qADn — (Al.l)

Ip = pqA}ip E - qADp ^-. (A1.2)

ox

The first terms in eqs (Al.l) and (A1.2) are due to drift, and the second terms are due

to diffusion. Under the high-gain conditions of the traditional bipolar transistor analysis,

these equations can be decoupled, and the transport of minority carriers in the base is described by a simple expression for both high- and low-level injection conditions. For

a high-gain pnp transistor in low-level injection (p < n in the base), the high-gain condition requires a negligible hole drift current, and the transport of holes is by diffusion

only (second term in eq (A1.2)). For a high-gain pnp transistor in high-level injection,

quasi-neutrality gives n « p, and the high-gain condition requires that the drift of electrons is approximately that required to cancel the electron diffusion so the electric field is obtained approximately by setting In = 0. Using this electric field and the Einstein relation, Dntp = (kT/q)fin<p , an expression is obtained for the hole current which resembles

low-level injection diffusion except with Dp replaced by 2Dp

[Al.l].

However, for the low-gain, high-level injection conditions of the bipolar transistor of the

IGBT, the difference between the electron drift and diffusion currents is significant, and

the net electron current cannot be set to zero to approximate the electric field. In this case, the net electron current has a significant effect on the hole drift current, and the

electron and hole transport equations cannot be decoupled. Assuming quasi-neutrality

(i.e., 6n — 8p) and a high excess carrier level (i.e., 6n ^> Nb), the ambipolar electron and

hole transport equations are obtained by eliminating the electric field between eqs (Al.l)

and (A1.2) [A1.2,A1.3]:

In = ~—7~T^T + qAD^ (41.3)

dx

dp

1 + b'* " dx

Ip = z^It - qAD^. (41.4)

87
Notice that both of these expressions depend on the total current so that the transport of

electrons and holes are coupled. For negligible electron current (high-gain case), the total

current is approximately equal to the hole current, and eq (Al.4) reduces to the traditional

high-gain, high-injection model described above.

The hole and electron continuity equations are given by:

d8p 6p 1 dlp

dt thl qA dx

dSn 8n 1 dln , . ~nr = + -ttt^ A1 ' 6

Ot THL qA OX

From eqs (A1.5) and (Al.4), the time- dependent ambipolar diffusion equation is obtained:

d

2 8p 8p 1 d8p

~dx~*~ =L*~

+

D~dT' ( >

A requirement in deriving this expression is that the total current (It) is independent of

position in the base. This is satisfied in the IGBT because the base current (electrons)

flows from the collector through the base in the same direction as the injected hole current.

Equation (A1.7) does not hold for the traditional bipolar transistor for which the base

current enters from the side in the middle of the base.

To determine the distribution of excess carriers in the base of the bipolar transistor of the

IGBT, eq (A1.7) is solved for the boundary conditions and initial condition of the bipolar

transistor. This distribution is then used in eqs (Al.3) and (Al.4) to express the electron

and hole currents in terms of the total current and the carrier concentration. The boundary

condition for the excess carrier concentration at the emitter edge of the quasi-neutral base

(aj = 0) is 8p(x = 0) EE P0 , (A1.8a)

where Pq is used as a parameter for the development of the model, and at the collector

edge of the quasi-neutral base (x = W), the boundary condition is

6p{x = W) = 0 (41.86)

because the collector-base junction is reverse biased for forward operation of the IGBT

(anode positive).

The component of bipolar transistor base current that is injected into the emitter is determined by the boundary condition for the electron current at the emitter-base junction

(7n (x = 0)). The electron current injected into the emitter is given in terms of Pq by:

/ (0) - SneoNE _ Pi

Lane — o * ane ; IJlL.a

J

71- Tl- te t

88
where 6ne o is the excess electron concentration at the emitter edge of the emitter-base

junction, Ne is the doping concentration in the emitter, and nje is the intrinsic carrier

concentration in the emitter. The first equality represents a solution to the low-level

injection semiconductor transport and conductivity equations in the emitter where Iane is the measured emitter electron saturation current which accounts for the emitter parameters

(similar to the emitter Gummel number). The second equality is obtained using the quasiequilibrium simplification for the high-level injection condition to relate the excess carrier

concentrations on both sides of the emitter-base junction.

References

[Al.l] Webster, W. M., On the Variation of Junction- Transistor Current-Amplification

Factor with Emitter Current, Proc. IRE 42, 914-920 (1954).

[A1.2] Berz, F., A Simplified Theory of the p-i-n Diode, Solid-State Electron. 20, 709-714

(1977).

[A1.3] van Roosbroeck, W., The Transport of Added Current Carriers in a Homogeneous

Semiconductor, Physical Review 91, 282-289 (1953).

89
Appendix 2

Transient Bipolar Collector Current

The analysis of the bipolar transistor portion of the IGBT is described using the coordinate

system defined in figure 4 and the symbols defined in the nomenclature. The collector-base

junction of the bipolar transistor of the IGBT is reverse biased for forward conduction, and

the depletion region of the collector-base junction extends into the base. The collector-base

junction depletion width is given by

and the width of the quasi-neutral base is given by

W = WB - Wbcj . (A2.2)

Because of the IGBT structure (fig. 1), the bipolar transistor base current (electrons)

supplied by the MOSFET is introduced at the collector end of the base. In the model, the

region of the device at the epitaxial layer edge of the reverse-biased epitaxial layer-body

junction (a; = W) is designated as the contact between the bipolar transistor base and

the MOSFET drain. The electron current that enters this region In (W) is the bipolar

transistor base current which is supplied by the MOSFET drain, and the hole current

there Ip (W) is the collector current of the bipolar transistor (see fig. 2).

For the voltage transitions of typical IGBT transient operation, the quasi-neutral base

width (W of eq (A2.2)) changes in a time on the order of the base transit time, and the

solution to eq (A1.7) must account for the moving boundary condition. From eq (A2.1), the

time rate-of- change of quasi-neutral base width is given in terms of the time rate-of-change

of collector-base voltage by:

(A2.Z)

dW -Cbcj dVbc dt ~ qN,cl A dt

'

where Cbcj = Aea i/Wbcj is the collector-base depletion capacitance. This moving quasineutral base width boundary condition results in an additional component of non-quasistatic collector current. This component of current is larger than the displacement current

through the collector-base junction depletion-capacitance for the high-level injection condition, and is a significant component of the total collector current for the low-gain condition.

This non-quasi-static effect is unimportant, though, for the low-level injection or high-gain

conditions of "signal" transistors.

It is assumed in the quasi-static approach that the collector current, during the transient,

is determined exclusively by the instantaneous base charge and terminal voltages using the

steady-state relationships. However, for the bipolar transistor of the IGBT, the collector

current during the transient also depends upon 1) the instantaneous total current, because

the transport of electrons and holes are coupled, and 2) the time rate-of-change of the

quasi-neutral base width because it changes faster than the base transit speed. In the

90
following analysis, expressions are presented for the non-quasi-static transient excess carrier

distribution and collector current.

Because the quasi-neutral base width changes with the changing collector-base voltage, eq

(A2.3), the excess carrier base charge Q is swept into a quasi-neutral base that becomes

narrower as the voltage is increased. This is illustrated in figure A2.1 for a simplified excess

carrier distribution where the change in local excess carrier concentration Ap that results

throughout the base for a change in base width AW is indicated. For comparison, figure

A2.2 shows the change in local excess carrier concentration that results for a change in

total base charge AQ which is important for high-speed operation of "signal" transistors

[A2.1, pp. 222]. It is clear from figure A2.1 that the time rate-of-change of local excess

carrier concentration dSp/dt depends upon the quasi-neutral base width boundary velocity

dW/dt. Therefore, because dSp/dt appears in the second term on the right-hand side of

eq (A1.7), a curvature in the carrier distribution given by the left-hand side of eq (A1.7) is required to bring about the redistribution of carriers for the moving boundary condition.

Thus, in general, eq (A1.7) must be solved for the conditions of a moving boundary to

describe the non-quasi-static transient carrier distribution and collector current. A firstorder solution to eq (Al.7) for the moving quasi-neutral base width boundary condition is given by [1]:

6p(x) = Po [1 - —j - WD 3W (A2A)

dt

This carrier distribution is shown in figure A2.3 and consists of a linear component (first

term) and a moving boundary redistribution component (second term). For a constant

anode voltage, only the first term on the right-hand side of eq (A2.4) remains. The second

term provides the curvature in the carrier distribution necessary to redistribute the excess

carriers for a given quasi-neutral base width boundary velocity dW/dt.

By integrating eq (A2.4) through the base, the total base charge is given in terms of Po

for the transient conditions by:

Q = (A2.5)

The non-quasi-static transient collector current is then obtained by evaluating eq (A1.4)

at x = W using the non-quasi-static carrier distribution of eq (A2.4):

wv

> \l + b) T W2 ^ ZW dt ' v )

where the Einstein relations, Dn>p = (kT/q)fintP , and the expressions for b and D in the

nomenclature have been used. The first term on the right-hand side of eq (A2.6) is a

non-quasi-static term that shows the explicit dependence of the collector current upon

the instantaneous total current due to the coupling between the transport of electrons

and holes. The second term is a charge-control component of current {Ice) because it is directly related to the charge that remains in the base and to the applied collector-base

91
0 w

DISTANCE IN BASE FROM EMITTER (x)

Figure A2.1. A simplified excess carrier distribution in the base indicating the change in

local excess carrier concentration with time due to the moving quasi-neutral base width

boundary.

92
DISTANCE IN BASE FROM EMITTER (x)

Figure A2.2. A simplified excess carrier distribution in the base indicating the change in

local excess carrier concentration due to a change in total base charge.

93
1 1 1 1 1 1 1— 1 1 r

0 0.2 0.4 0.6 0 6 1.0

RELATIVE DISTANCE IN BASE FROM EMITTER (x/w)

Figure A2.3. The excess carrier distribution in the base for a given quasi-neutral base

width boundary velocity.

94
voltage using eqs (A2.1) and (A2.2). The third term is necessary to bring about the re- distribution of carriers for the moving quasi-neutral base width boundary condition. This

moving boundary redistribution component of current (Ir) is a non-quasi-static component because it depends upon the time rate- of- change of base width in addition to the

instantaneous value of base width.

The non-quasi-static expression for collector current, eq (A2.6), differs substantially from

the traditional quasi-static models, in that it depends upon 1) the instantaneous total

current and 2) the time rate-of-change of the quasi-neutral base width. The explicit dependence upon the total current is important for the low-gain condition where the base

current In {W) is a significant component of the total current It, so that the collector

current Ip (W) is significantly affected by changes in instantaneous base current. Otherwise, for a high-gain condition, the total current is approximately equal to the collector

current, and the first term can be combined with the left-hand side of eq (A2.6), resulting

in the usual expression for the high-gain, high-level injection charge control component

of collector current (Ip (W) = 4Dp Q/W2

). The physical significance of the redistribution

component of current is ascertained by dividing the third term of eq (A2.6), Ir, by the

second term, IceIr h- + l\ n dW

Ice \ 3 / W dt

(A2.7)

where = W2 /4Dpis the high-gain, high-level injection base transit time. This indicates

that the redistribution component of current becomes comparable to the charge control

component when the base width changes as fast as the base transit speed W/tj, .

References

[A2.1] Grove, A. S., Physics and Technology of Semiconductor Devices (Wiley, New York,

1967).

95
Appendix 3

Bipolar Emitter-Base Voltage

The base contact of the bipolar transistor of the IGBT is defined to be at the collector

edge . of the neutral base x = W, where the MOSFET channel current supplies electrons to

the base (see fig. 2). Figure A3.1 shows the band diagram including quasi-fermi potentials

from the emitter to base contacts. Because the excess carrier concentration is zero at the collector edge of the neutral base x = W and at the emitter contact, the electron

quasi-fermi potential coincides with its charge-neutral, thermal-equilibrium value relative

to the electrostatic potential at both the emitter and base contacts. Thus, the applied

emitter-base voltage is equal to the electron quasi-fermi potential difference between the

emitter and base contacts:

Veb = {4>pej - <j>nej) + {<t>nej ~ <f>nb), (AS.l)

where (<f>pej — <j>nej) is the electron quasi-fermi potential drop in the emitter (the hole quasifermi potential is constant in the heavily doped emitter and coincides with the electron

quasi-fermi potential at the emitter contact) and (<f>nej — <l>nb) is the electron quasi-fermi

potential drop across the quasi-neutral base.

Because the hole quasi-fermi potential is constant in the heavily doped emitter (i.e., the

ohmic drop is negligible), the electron quasi-fermi potential drop in the emitter is equal

to the difference between the electron and hole quasi-fermi potentials at the emitter-base

junction. Using the quasi-equilibrium simplification [A1.2, pp. 184] (i.e., the difference

between the electron and hole quasi-fermi potentials is the same on both sides of the

forward biased emitter-base junction), this difference is given in terms of the excess carrier

concentration at the emitter edge of the neutral base Pq by

{4>pej - 4>nej ) = *pln [(^- + J-) (nb + P0 )]

(A3.2)

from the definition of the electron and hole quasi-fermi potentials [A3.1].

The electron quasi-fermi potential drop across the conductivity-modulated base is a result

of both drift and diffusion. In general, the electron quasi-fermi potential gradient is related

to the electron current and the electron concentration by [A3. 1, A3.2]:

dMx) =

^(z)

dec qA(j,nn(x)

The electron quasi-fermi potential drop across the quasi-neutral base is determined by

integrating this equation between the emitter and the collector edges of the quasi-neutral

base, x = 0 and x = W, respectively. In doing this, the electron current In(x) is given by

eq (Al.l), and the carrier concentration is given by n(x) = Nb + Sp(x), where 6p(x) is the

excess carrier distribution in the base. The result of the integration of eq (A3.3) has the

form:

ItW D\ Pq + Nb tA9Ay Kej - Kb = 77—n

-

A —ln —^ {A3A)

(1 + ^)fin Aqneff

fin NB

96
-0 6 1 1 1 i i I I I i I I I I I I I I -60 -40 -20 0 20 40 60 80 100

DISTANCE FROM EMITTER-BASE JUNCTION (pm)

Figure A3.1. The band diagram from the emitter to base contacts for an IGBT with the

physical parameters listed in tables 4 and 5, and a base lifetime of tb — 1 Ms ? indicating

the electron quasi-fermi potential drops in the emitter ((f> nej — <t>pej) and across the base

{4>nb — 4>nej)-

97
where

nf wj0

w 6.x

eff W Jo NB + Sp{x)

(A3.5)

accounts for the conductivity-modulation in the base of the bipolar transistor and for the

nonuniformity of the excess carrier distribution.

Because the emitter-base voltage is most important for on-state conditions, the steadystate shape of the carrier distribution for the instantaneous charge is used to integrate

eq (A3.5). This distribution is obtained by solving the steady-state diffusion equation

(eq (A1.7) with dSp/dt) for the boundary conditions of eq (Al.8). The excess carrier

distribution is sinh(^)

sinh(f-)

where Pq is given in terms of the total excess carrier concentration in the base by integrating

the carrier distribution of eq (A3.6) across the base:

Po Q

qAL tanh |^

(43.7)

Using the carrier distribution of eq (A3.6) in the integral of eq (A3.5), ne ff has the

analytical solution:

neff = w

2L

arctanh

^

+ P0

2 csch2 (f)tanh(^)

iVB + P0 csch(f )tanh(f£)

(43.8)

For Pocsch(^-) <C Nb, neff ~ Nb and the first term in eq (A3.4) reduces to the resistance

of the unmodulated epitaxial base times the current; and for Pocsch(^) Nb, the

quantity ne ff increases approximately as Po/ ln( -^-csch(^)). Thus, the first term in eq

(A3.4) describes the conductivity modulation of the epitaxial layer. The second term of

eq (A3.4) is due to the majority carrier concentration difference between the emitter and

collector edges of the quasi-neutral base and is zero for low-level injection. The first and

second terms of eq (A3.4) cancel in a high-gain narrow base transistor, but the second

term is always less than the first for the wide-base transistor.

References

[A3.1] Sze, S. M., Physics of Semiconductor Devices (Wiley, New Jersey, 1981), pp. 85.

[A3. 2] Shockley, W., Electrons and Holes in Semiconductors (D. Van Nostrand, New York,

1956), pp. 302-308.

98
Appendix 4

INSTANT Document File

***********************************************************

Software Documentation for the IGBT Circuit Simulation Software

INSTANT

IGBT Network Simulation and Transient ANalysis Tool.

Version 1.0

August 1991

by

Allen R. Hefner

National Institute of Standards and Technology

(301) 975-2071 **************************************************************************

CONTENTS

1) Introduction

2) Directory of Instant Software Disk

3) Execution of Precompiled Examples

4) Creating Your Own Circuit Files

5) Description of IGBT Model Routines

6) References

**************************+*********************

1) Introduction

The enclosed disk contains the IGBT simulation software (INSTANT) . The source code: INSTANT. FOR contains the IGBT model subroutines IGBTVeb and

IGBTSEQ, and the numerical routines to simulate transients. The disk also

contains circuit file source code for several circuit configurations and

executable programs for two example circuits 1) RLLOAD for figure 5 of

reference [A4.1] and 2) ACTSNUB for figure 12 of reference [A4.1].

The theoretical IGBT model in the subroutines IGBTVeb and IGBTSEQ was derived and verified for several circuit configurations and for different

device and circuit parameters in references [A4.1-A4.5]. The description

of the INSTANT simulation software program flow and file organization is

presented in references [A4.6,A4.7]. The purpose of this document is to

orient the user with the software and to provide a description of the IGBT

model routines.

99
***********************************************************

2) Directory of the INSTANT Software Disk

The enclosed floppy disk contains the following files:

INSTANT . DOC This document.

INSTANT. FOR

INSTANT. OB

J

LINKCIRC.BAT

RGRAPH . LIB

RLLOAD . FOR

RLLOAD . EXE

RLLOAD . INP

ACTSNUB .FOR

ACTSNUB . EXE

ACTSNUB . INP

CLAMP . FOR

CLAMP . INP

PARALEL . FOR

PARALEL . INP

APT35g60BN.IGT

IRGBC20S . IGT

IRGBC20U. IGT

IRGBC30U . IGT

IRGBC40U . IGT

IRGBC50U. IGT

IXHS20n60A.IGT

MGM20n50.IGT

MPM6002.IGT

Source code for the IGBT circuit simulation

software. This includes the main program that

calls subroutines INPUT, OUTPUT, and RKF45, and

the IGBT model subroutines IGBTVeb and IGBTSEQ.

Object code compiled with the specific FORTRAN

compiler.

Command file that compiles the circuit file source

code and links it with the INSTANT object code to

create the executable circuit simulation programs.

Graphics library for specified FORTRAN compiler.

Example circuit file source code for an IGBT with a series resistor-inductor load and a resistive gate

drive (fig. 5 of reference [A4 . 1] )

.

Executable circuit simulation program for the IGBT

with a series resistor-inductor load and a resistive

gate drive. This program was created from RLLOD . FOR

using LINKCIRC.BAT.

Circuit parameter input file for RLLOAD . EXE . The

circuit parameters can be changed by editing this

file or by creating different input files without

recompiling RLLOAD. FOR.

Additional precompiled circuit example for the

series resistor-inductor load with a series

resistor-capacitor feedback and a polarized gate

drive resistance.

Additional circuit file source code examples and

example circuit parameter input files for the

circuits of figures 7 and 9 of reference [A4.7],

respectively

.

Example IGBT parameter input files. The device

parameters can be changed by editing or creating

new IGBT input files. These files can be used for

any of the circuit simulation programs because

the parameters are read using the IGBTINP subroutine

provided in INSTANT.

100
T7 . IGT

T7KP6.IGT

T2P5.IGT

TP3.IGT *********************************************************

3) Execution of Precompiled Examples

The disk contains two precompiled example circuit simulation programs: 1)

RLLOAD for figure 5 in reference [A4.1] and 2) ACTSNUB for figure 12 in

reference [A4.1]. When these programs are executed, they will ask for the

device parameter input file, the circuit parameter input file, and the

output file names. Example circuit parameter input files for the two

programs are in the files RLLOAD. INP and ACTSNUB. INP, respectively. The

disk also contains several example device parameter input files.

Upon execution of the example programs and entry of the input and output

file names, the program will begin to simulate the transient. The gate

current, gate voltage, anode current, and anode voltage waveforms will

appear on the graphics computer screen as each time step is computed. When

the waveforms reach the final time step, the graph of the waveforms

remains on the screen as the program awaits further input from the user. At this point, the entry of a "P" will generate a Postscript file

containing the graphics output, or the entry of a "D" will dump the graph

to a graphics compatible dot matrix printer. Upon termination, the output

file will contain the output guantities computed at each time step in

subroutine OUTPUT.

The device and circuit parameters can be changed for the two example

circuit simulation programs by editing or creating new device and circuit

input files. For example, the circuit input file RLLOAD. INP contains the

following list of input parameters:

30.0 RL load resistance

80. e- 6 LL load inductance

300.0 Vaa anode supply voltage

1000. 0 RG gate resistance

20.0 Vgon gate pulse generator amplitude

l.Oe- 6 ton time when gate pulse generator turns on

20. Oe-6 toff time when gate pulse generator turns off

O.le- 6 trise rise/fall time of the pulse generator

30. Oe-6 tfinal final time step for the simulation

O.Oe- 6 tplot starting time for the plot window

The first five (5) parameters are component values, the next three (3)

parameters define the timing of the pulse generator, and the last two (2)

parameters define the plot window and output time step resolution. For a description of the device parameters in the IGBT input files T7.IGT,

T2p5.inp, etc., see section 5) below on Description of IGBT Model

Routines

**************************************************************************

4) Creating Your Own Circuit Files

You can change the input parameters without recompiling the program, but

to change the external circuit, you must create a new FORTRAN circuit file

similar to RLLOAD. FOR and ACTSNUB. FOR called, for example, CIRCUIT. FOR.

101
You then compile and link it with INSTANT using the command file

LINKCIRC.BAT. For example, the command:

C:> LINKCIRC CIRCUIT

creates an executable program called CIRCUIT.EXE from the FORTRAN circuit

file called CIRCUIT. FOR. The INSTANT. OBJ and RGRAPH.LIB on this disk are

for a given FORTRAN compiler and Windows environment. You must also

specify the paths to the FORTRAN and Windows libraries on your machine

within LINKCIRC.BAT when first installed.

The FORTRAN circuit file CIRCUIT. FOR contains the circuit equations, the

circuit parameter input read statements, the initial conditions of the

device and circuit state variables, the graphics commands, and the program

control tests. Essentially, the three routines within CIRCUIT. FOR:

subroutine STATEQ, subroutine INPUT, and subroutine OUTPUT describe the

entire circuit simulation using the subroutines within INSTANT.

To describe the operation of IGBTs within different circuits, the circuit

state equations are combined with the IGBT state equations within the

"Device and Circuit State Equations" segment of subroutine STATEQ.

The IGBT state equations are evaluated using subroutine IGBTSEQ provided

within INSTANT. This routine requires the input of the instantaneous gate

and anode currents as well as the instantaneous values of the IGBT state

variables. Thus, the anode and gate currents must be expressed in terms of

the instantaneous values of the device and circuit state variables before

subroutine IGBTSEQ is called. Likewise, the IGBT anode voltage must be

expressed in terms of the instantaneous values of the state variables

before the external load circuit state equations can be evaluated.

A general procedure is given in reference [A4.7] for expressing the IGBT

anode voltage, anode current, and gate current in terms of the

instantaneous values of the device and circuit state variables using

Kirchhoff's voltage and current laws. These expressions are implemented

into the "Functions of State Variables" segment of subroutine STATEQ, by

first calling subroutine IGBTVeb to calculate the base resistance Rb and

the emitter-base capacitor voltage Vebq in terms of the instantaneous

values of the IGBT state variables. The expressions for the anode voltage

Va=It *Rb+Vebq+Vcb, anode current, and gate current are then evaluated. The

"Functions of State Variables" segment may also be included in subroutine

OUTPUT to calculate output and plot quantities at each output time step.

Next, the parameters for the circuit equations that are to be read from the

parameter file CIRCUIT. INP must be included in the labeled common

statement: COMMON /CIRCpar/. This common statement should be included in

the STATEQ, INPUT, and OUTPUT. The circuit parameter read statements are then entered into the respective segment of subroutine INPUT. The IGBT

model parameters in the file DEVICE. IGT are read using subroutine

IGBTINP provided within INSTANT, so the device parameter common statement,

COMMON /IGBTpar/, need not be included in the CIRCUIT. FOR file. If

multiple IGBTs with different model parameter sets are to be included in

the circuit, subroutine IGBTSTO can be used to store the model parameters

from the IGBTpar common block into an IGBT model parameter array, and

subroutine IGBTREC can then be used to recall the parameters back into the

IGBTpar common block before calling the IGBT model routines for each

device

.

Finally, the device and circuit state variable initial conditions are defined within subroutine INPUT at a known state, e.g., the off-state

before the devices are switched on. All of the circuit and device

102
variables should be declared as to their variable type in each subroutine.

The state variables and the time rate-of-change of the state variables are passed to and from the main program through the parameter list via Y and

YP, so the names used for each of the state variables must be defined in

terms of the array Y at the beginning of each subroutine, and the array YP

must be defined in terms of the variables that represent the evaluated

state equations at the end of subroutine STATEQ.

5) Description of IGBT Model Routines

The IGBT model within INSTANT is invoked by calling subroutine IGBTVeb and

subroutine IGBTSEQ. The IGBT model parameters are passed to the IGBT model

routines via the labeled common statement:

COMMON /IGBTpar/ t, wb, nb, A, isne, Vt, Kpsat, Kplin, Rs, theta,

& Cgs, Agd, Coxd, Vtd,BVn,BVf,

& ccsflg, selflg, vpsat, vnsat,

& Un, Up, Ut, epsi, ni,

q

Therefore, the model parameter values for the IGBT being modeled must be

in the common block when the IGBT model routines IGBTVeb and IGBTSEQ are invoked. This common block does not need to be included in the circuit

file source code, because subroutine IGBTINP reads the IGBT model

parameters from the IGBT model parameter input file, and assigns the

values to the common block variables. However, if multiple IGBTs with

different parameter values are used, subroutine IGBTSTO can be used to

store the parameters in a variable array for each IGBT after the model

parameters are read by IGBTINP. Then the model parameters can be recalled

to the common block using subroutine IGBTREC just before the IGBT model

subroutines IGBTSEQ and IGBTVeb are called. Hence, the circuit file source

code only needs to define a single variable array for each IGBT model

parameter set

5a) Subroutine IGBTINP

The first eighteen (18) parameters in the /IGBTpar/ common block are read

from the device input file by IGBTINP and the remaining eight (8) physical

constants of silicon are designated within subroutine IGBTINP. Several

example IGBT model parameter input files are given on the INSTANT disk.

For example, the File T7.IGT contains the following input:

7 .le-6 t HL (s) base high-level lifetime

0 .0093 W B (cm) metallurgical base width

2 .0e4 N B (cm**-3 * E10) base doping concentration

0 .1 A (cm**2) device active area

6 .5e-14 Isne (A) emitter electron saturation current

4 .7 Vt (V) MOSFET channel threshold

0 .38 Kpsat (A/V**2) MOSFET saturation transconductance

0 .7 Kplin (A/V**2) MOSFET linear transconductance

0 .02 Rs (Ohm) series anode resistance

0 .01 theta (1/V) transverse field mobility reduction

0 . 62e-9 Cgs (F) gate-source capacitance

0 .05 Agd (cm**2) gate-drain overlap area

1 .75e-9 Coxd (F) gate-drain oxide capacitance

0 .0 vtd (V) gate-drain depletion threshold

103
4.0

0.9

-1.0

-1.0

BVn

BVf

ccsf'lg (+/-)

sclflg (+/-)

avalanche multiplication exponent

junction curvature factor

carrier-carrier scattering flag

velocity saturation flag

which correspond to the first eighteen (18) device parameters in the

common block /IGBTpar/. The remaining eight (8) physical constants of

silicon are designated within IGBTINP as:

Ut = 0.0259

ni = 1.45

Un = 1500.0

Up = 450.0

q = 1.6E-9

epsi=8.854e-14*11.9

vpsat=0 . 95e7

vnsat=l . Ie7

thermal potential

intrinsic carrier concentration

electron mobility

hole mobility

electronic charge

dielectric constant of silicon

hole saturation velocity

electron saturation velocity

where all of the densities are normalized to E-10 and the electronic

charge is normalized to E10, to prevent overflows for single precision

calculations

.

5b) SUBROUTINE IGBTSEQ

The subroutine IGBTSEQ evaluates the IGBT state equations using the

instantaneous values of the IGBT state variables and the gate and anode

current and returns the values of the time rate-of-change of the state

variables. This function is invoked by the command:

CALL IGBTSEQ (Vgs, Vcb, Qte6, Ig, It, DVgs, DVcb, DQte6)

where the parameter list is defined as follows:

Vgs —- IGBT gate-source voltage

Vcb IGBT collector-base voltage

Qte6 IGBT base charge * 1.0E6

ig IGBT gate current

It IGBT anode current

DVgs time rate-of-change of Vgs

DVcb time rate-of-change of Vcb

DQte6 time rate-of-change of Qte6

The IGBT base charge is normalized to 1.0E6 so that all of the IGBT state

variables will be of the same order of magnitude: Qt=Qte6*l . 0e-6 . The

first five (5) parameters in this list are inputs from the calling

routine, and the values of the remaining three (3) parameters in the list are calculated within IGBTSEQ and returned to the calling routine.

Subroutine IGBTSEQ also calculates values for the following variables

which are functions of the parameter list and the IGBTpar common variables

D ambipolar diffusivity

b ambipolar mobility ratio

W quasi-neutral base width

Wcbj collector-base depletion width

Wgdj gate-drain overlap depletion width

Imos MOSFET channel current

104
Ccbj collector-base depletion capacitance

Cds drain-source depletion capacitance

Cgd gate-drain capacitance

Qb background carrier charge in undepleted base

Ip hole current at x=W

M avalanche multiplication factor

BV open emitter collector-base breakdown voltage

Igen thermally generated collector-base current

gama high-level injection coefficient

These functions are only used locally within IGBTSEQ to express the IGBT

state equations. The IGBT routine also contains a few variables which are used to iterate the effective collector-base junction space charge

concentration including the effect of the saturation velocity of mobile

carriers

ROOT function that finds the root of the external

function spachg(Nscl)

spachg function that describes c-b space charge

Nscl collector-base space charge density

sclmin lower bound on Nscl

sclmax upper bound on Nscl

TOL tolerance for Nscl

sclvar variables passed to the external function

spachg through labeled common statvr

The iteration for the inclusion of the space charge due to saturation

limited velocity in the collector-base depletion region is only carried

out if sclflg is positive. Otherwise, if sclflg is negative, this effect

is not included and Nscl=Nb.

5c) Subroutine IGBTVeb

The subroutine IGBTVeb evaluates the IGBT conductivity-modulated base

resistance Rb and the emitter-base capacitor voltage Vebq using the

instantaneous values of two of the IGBT state variables, Qte6 and Vcb, and

the common IGBT model parameters. This subroutine is invoked by the

command

CALL IGBTVeb (Qte6, Vcb, Rb, Vebq)

where the parameter list is defined as follows:

Vcb IGBT collector-base voltage

Qte6 IGBT base charge * 1.0E6

Rb conductivity-modulated base resistance

Vebq emitter-base capacitor voltage

The first two (2) parameters in this list are inputs from the calling

routine, and the values of the remaining two parameters in the list are calculated in IGBTVeb and returned to the calling routine.

Subroutine IGBTVeb also calculates values for the following variables in

addition to those for IGBTSEQ which are functions of the parameter list

and the IGBTpar common variables:

W quasi-neutral base width

Wcbj collector-base depletion width

105
L ambipolar diffusion length

P carrier concentration at emitter edge of base

Pmid carrier concentration in center of base

Unc electron mobility including carrier-carrier

scattering

Upc hole mobility including carrier-carrier scattering

Ucinv component of inverse mobility due to

carrier-carrier scattering

wl w/1

cosch hyperbolic cosecant of w/1

tnh hyperbolic tangent of w/1/2

cth hyperbolic cotangent of w/1

Ueff low-, high-level injection effective mobility

Navg radical in the neff expression

x used to evaluate arctnh using log identity

arctnh inverse hyperbolic tangent in Neff expression

Vdep emitter-base capacitance voltage for depletion

capacitance dominant

Vdif emitter-base capacitance voltage for diffusion

capacitance dominant

QO equilibrium emitter-base junction depletion charge

neff effective excess carrier concentration in base

These functions are only used locally within IGBTVeb to calculate the Rb

and Vebq. The IGBTVeb routine also contains a few variables which are used

to iterate the effective base mobility including the effect of

carrier-carrier scattering for high free carrier levels:

ROOT function that finds the root of the external

function Decs (D)

D Ambipolar diffusivity including carrier-carrier

scattering

Dhi upper bound on Decs

Dlo lower bound on Decs

TOL tolerance for Decs

ccsvar variables passed to the external function

Decs through common block statvr

The iteration for the inclusion of carrier-carrier scattering is carried

out if ccsflg is positive. Otherwise, if ccsflg is negative, this effect

is not included and Unc=Un and Upc=Up.

**********************************************************

6) References

Hefner, A. R., An Investigation of the Drive Circuit Requirements

for the Power Insulated Gate Bipolar Transistor (IGBT), in Conf.

Rec. IEEE Power Electronic Specialists Conf., 126-137, (1990);

also in Special Issue of IEEE Trans. Power Electronics on Modeling

Power Electronics Circuits and Systems PE-6, 208-219 (April 1991)

.

Hefner, A. R. and Blackburn, D. L., An Analytical Model for the

Steady-State and Transient Characteristics of the Power Insulated

Gate Bipolar Transistor, Solid-state Electronics 31, 1513-1532

(1988) .

Hefner, A. R., Blackburn, D. L., and Galloway, K. F., The Effect

of Neutrons on the Characteristics of the Insulated Gate Bipolar

106
Transistor (IGBT), IEEE Trans. Nucl. Sci. NS-33, 1428-1434 (1986).

[A4.4] Hefner, A. R. , Analytical Modeling of Device-Circuit Interactions

for the Power Insulated Gate Bipolar Transistor (IGBT), in Conf.

Rec. IEEE Industry Applications Society Meet., 606-614 (1988);

also in IEEE Trans. Industry Applications IA-26, 995-1005 (1990)

[A4.5] Hefner, A. R., An Improved Understanding for the Transient

Operation of the Power Insulated Gate Bipolar Transistor (IGBT),

in Conf. Rec. IEEE Power Electronics Specialists Conf., 303-313,

(1989); also in IEEE Trans. Power Electronics PE-5, 459-468

(October 1990)

[A4.6] Hefner, A. R., Device Models, Circuit Simulation, and Computer

Controlled Measurements for the IGBT, in Rec. of the 2nd IEEE

Workshop on Computers in Power Electronics, (July 1990)

[A4.7] This paper, sections III and IV.

107
Appendix 5

INSTANT Main Program

£****************************************************************************

c

C INSTANT

C

C IGBT Network Simulation and Transient ANalysis Tool.

C

C Version 1.0

C August 1991

C

C by

C Allen R. Hefner

C National Institute of Standards and Technology

C (301) 975-2071

C

C

C

C The following code is part of the INSTANT (IGBT Network

C Simulation and Transient ANalysis Tool) Software package.

C The INSTANT software package is described in the INSTANT . doc

C file and in the publication: NIST SP 400-88.

C

C

C

Q ***************************************************************************

c

cc

c

C Program INSTANT

C

C

C Program to integrate the device and circuit state eguations

C for external subroutine STATEQ.

C

C

EXTERNAL STATEQ

REAL Y (100) , time, TOUT

REAL RELERR, ABSERR, WORK (3+6*100)

INTEGER IWORK(5), IFLAG, NEQN

C

C

C

CALL INPUT (time, Y, NEQN, RELERR, ABSERR)

C

C

C

IFLAG = 1 TOUT = time

10 continue

CALL RKF45 (STATEQ, NEQN, Y, time, TOUT, RELERR, ABSERR, IFLAG, WORK, IWORK)

GOTO (80,20,30,40,50, 60,70,80), IFLAG

20 continue

C

C

C

108
CALL OUTPUT ( TOUT, Y)

GO TO 10

C

C Error messages from RKF45

C

30 WRITE (99, 31) RELERR, ABSERR

GO TO 10

40 WRITE (99, 41) time

GO TO 10

50 ABSERR = 1.0E-9

WRITE (99, 31) RELERR, ABSERR

GO TO 10

60 RELERR = 10 . 0*RELERR

WRITE (99, 31) RELERR, ABSERR

I FLAG = 2

GO TO 10

70 WRITE (99, 71) time

I FLAG = 2

GO TO 10

80 WRITE (99, 81)

STOP

C

11 FORMAT (F5.1, 2F15.9)

31 FORMAT (17H TOLERANCES RESET, 2E12.3)

41 FORMAT (11H MANY STEPS,E12.3)

71 FORMAT (12H MUCH OUTPUT, E12 . 3)

81 FORMAT (14H IMPROPER CALL)

end

C

C

cQ* ***************************************************************************

109
Appendix 6

Subroutine IGBTSEQ

*****************************************************

Subroutine to evaluate the state equations for the IGBT

Subroutine IGBTSEQ (Vgs, Vcb, Qte6, Ig, It, DVgs, DVcb, DQte6)

Declare external function that evaluates collector-base

space charge due to velocity saturation.

REAL spachg

External spachg

Declare common IGBT model parameters

.

REAL t,wb,nb,A, isne,Vt,Kpsat,Kplin,Rs,theta,

& Cgs, Agd, Coxd, vtd, BVn,BVf,

& ccsflg, selflg, vpsat, vnsat,

& Un, Up, Ut, epsi, ni,

q

COMMON /IGBTpar/ t, wb, nb, A, isne, Vt , Kpsat, Kplin, Rs, theta,

& Cgs, Agd, Coxd, Vtd, BVn,BVf,

& ccsflg, selflg, vpsat, vnsat,

& Un, Up, Ut, epsi, ni,

q

Declare parameter list variables and functions of model variables.

REAL Vgs, Vcb, Qt, Ig, It, DVgs, DVcb, DQt,Qte6,DQte6

REAL D,b, W, Wcbj, Wgdj, Imos, Ccb j, Cds, Cgd, Qb, Ip

REAL gama,M, BV, I gen

Declare common variables for space charge limited velocity routine

COMMON /Statvr/ sclvar

REAL TOL,ROOT,Nscl, sclmin, sclmax, sclvar (5)

Qt=Qte6*1.0e-6

sclvar (1) =Vgs

sclvar (2) =Vcb

sclvar (3) =Qt

sclvar (4) =It

sclvar (5) =Ig

Test flag for inclusion of effect of Scl velocity in c-b junction.

If(sclflg .gt. 0.0) then

** Call root to get the value of space charge in collector-base

depletion region including saturation limited velocity.

nscl = Nb - spachg (Nb)

TOL = 1.0E-4*Nb

sclmin=min (nscl, nb)

sclmax=max (nscl, nb)

nscl=root (sclmin, sclmax, spachg, Tol)

110
ELSE

nscl=Nb

ENDIF

C

C *** Evaluate functions of model variables:

C

C breakdown voltage and multiplication coefficient,

C

BV=BVf*5.34E13/ (nscl*l . 0E10) **(3. 0/4.0)

If(Vcb .gt. BV*0.999) then

M=1.0/ (l-0.999**BVn)

else

if(Vcb .It. 0.0) M=1.0

if(Vcb .ge. 0.0) M=l . 0/ (1- (Vcb/BV) **BVn)

endif

Igen=g/t*ni*A*sqrt (2 . 0*epsi*abs ( (Vcb) /q/Nscl) ) If (Vcb .It. 0)lgen=0.0

C

C depletion widths and capacitances,

C

Web j=sqrt (2 . 0*epsi*abs ( (Vcb+0 . 6) /q/Nscl)

)

if (Vcb .It. -0.999*0.6)

& Web j=sqrt (2 . 0*epsi*abs ( ( ( 1 . 0-0 . 999) *0 . 6) /q/Nscl)

)

W= (Wb-Wcbj)

if(W .It. 0.05*Wb)W=0.05*Wb

Ccb j=A*epsi/Wcb

j

Cds= (A-Agd) *epsi/Wcb

j

Cgd=Coxd

If (Vcb .gt. Vgs-Vtd) then

Wgdj=sqrt (2 . 0*epsi*abs ( (Vcb-Vgs+Vtd) /q/nscl)

)

Cgd=Coxd/ (1 . 0+Coxd/Agd/epsi*Wgdj

)

endif

C

C diffusivity, mobility ratio, functions of charge

C

Qb=Nscl*W*A*q

gama=0 .

0

If (Qt .gt. 0) gama=Qt/ (Qt+Qb)

D=Ut*Up

If(Qt .ge. 0)D=Ut*Un*Up* (2*Qt+Qb) / (Un* (Qt+Qb) +Qt*Up)

b = Un/Up

C

C and MOSFET channel current

.

C

If(vgs .ge. Vt) then

If (abs(Vcb) .le. (Vgs-Vt) *Kpsat/Kplin)

& Imos=Kplin* ( (Vgs-Vt) *Vcb-0 . 5*Kplin/Kpsat*abs (Vcb) *Vcb)

& / (l+theta*abs (Vgs-Vt)

)

If (abs(Vcb) .gt. (Vgs-Vt) *Kpsat/Kplin)

& Imos=0.5*Kpsat* (Vgs-Vt) **2

& / ( l+theta*abs (Vgs-Vt )

)

If (abs(Vcb) .gt. (Vgs-Vt) *Kpsat/Kplin .and. Vcb .It. 0.0)

& Imos=-Imos

Else

lmos=0 .

0

Endif

C

C *** Evaluate the IGBT state equations.

Ill
DVcb = ( It - M* (gama*It/ (1+b) + 2 . 0*D*Qt/W**2 + Imos + Igen)

& + Cgd/ (Cgs+Cgd) *Ig

& )/(' Cds + Cgs/ (Cgs+Cgd) *Cgd + M*Ccbj/3 . 0*Qt/Qb ) C

DVgs = Ig/ (Cgs+Cgd) + Cgd/ (Cgs+Cgd) *DVcb

C

C *** Test if MOSFET, else evaluate IGBT base charge state equation.

C

If(t .It. 0.0) then

DQt=0 .

0

ELSE

Ip=gama*It/ (1+b) + 2 . 0*D/W**2*Qt + Ccb j/3 . 0*Qt/Qb*DVcb

DQt= M* (Imos+Igen) + (M-1.0)*Ip + (Cds+Cgd) *Dvcb - Cgd*DVgs

& - Qt/t - 4 .0* (Qt*Nscl/ni/Qb) **2*Isne

END IF

C

DQte6=DQt*l . 0E6

RETURN

END

C

C

C

Q* ***************************************************************************

112
Appendix 7

Subroutine IGBTVeb

c ******************************************************************

c

c

c

C Function to evaluate the transient IGBT emitter-base voltage

C

SUBROUTINE IGBTVeb (Qte6, Vcb, Rb, Vebq)

C

C

C

C *** Declare external function to iterate the high free carrier

C level mobility.

C

Real Decs

External Decs

C

C *** Declare common IGBT model parameters.

C

REAL t, wb, nb, A, isne, Vt, Kpsat, Kplin, Rs, theta,

& Cgs,Agd, Coxd, Vtd, BVn, BVf

,

& ccsflg, sclflg, vpsat, vnsat,

& Un,Up,Ut,epsi,ni,q

COMMON /IGBTpar/ t, wb, nb, A, isne, Vt, Kpsat , Kplin, Rs, theta,

& Cgs,Agd, Coxd, Vtd, BVn, BVf,

& ccsflg, sclflg, vpsat , vnsat,

& Un,Up,Ut,epsi,ni,q

C

C *** Declare parameter list variables and functions of model variables.

C

REAL Qte6, Qt , Vcb, Rb, Vebq, W, Web j , L, P, Pmid, Unc, Upc, Ucinv, wl

REAL cosch, tnh, cth, Ueff , Navg, x, arctnh, Vdep, Vdif , QO, nef

f

C

C *** Declare common variables for high free carrier level mobility routine.

C

REAL ccsvar(5)

COMMON /Statvr/ ccsvar

REAL TOL,ROOT,D,Dhi,Dlo

Qt=Qte6*1.0E-6

ccsvar (2) =Vcb ccsvar (3) =Qt

C

C *** Evaluate functions of model variables.

C

Web j=sqrt (2 . 0*epsi*abs ( (Vcb+0 . 6) /q/Nb)

)

if (Vcb .It. -0.999*0.6)

& Web j=sqrt (2 . 0*epsi*abs ( ( (1-0 . 999) *0 . 6) /q/Nb)

)

W= (Wb-Wcbj)

if(W .It. 0.05*Wb)W=0.05*Wb

Q0=A*sqrt (epsi) *sqrt (2 . 0*q*Nb*0 . 6)

C

C *** Test if case of MOSFET.

C

If(t .It. 0.0) then

113
Rb=W/Un/A/q/Nb + Rs

Vebq=0 .

0

return

endif

Test if case of emitter-base junction reverse biased (reverse blocking)

.

If(Qt .It. 0.0) then

Rb=W/Un/A/q/Nb +Rs

Vebq= -0.5* (Qt-QO) /q/Nb/A**2/epsi* (Qt-QO) +0.6

Return

ENDIF

ELSE: Emitter-base voltage for case of forward biased IGBT.

Test if flag for carrier-carrier scattering is set.

If (ccsflg .gt. 0.0) then

** Call root to iterate the high free carrier level mobility.

D = 2.0*Ut*Un*Up/(Un+Up)

Dhi=D

Dlo=D +Dccs(D)

TOL = 1.0E-4*D

D=root (Dlo, Dhi, Decs, Tol)

** Evaluate functions of the model variables.

L = sqrt(t*D)

wl=w/L

cosch=l . 0/sinh (wl)

tnh=Tanh(wl/2.0)

cth=1.0/tanh(wl)

P=Qt/A/L/tnh/q

pmid =P*sinh (wl/2 . 0) /sinh (wl)

** l/Uc=Ucinv : the reciprocal component of mobility due to high

free carrier level (carrier-carrier) scattering.

Ucinv= sqrt (Pmid* (Pmid+Nb) ) *LOG( 1.0+ 4 . 54E11/10 . 0** (20 . 0/3 . 0)

& /( (Pmid+Nb) * (Pmid+ni**2.0/Nb) )**(1. 0/3.0) ) /1.428E10

Uc=l . 428E10/ (sqrt (Pmid* (Pmid+Nb) ) *LOG (1 . 0+ 4 . 54E11

& /10.0** (20.0/3.0) / ( (Pmid+Nb) *Pmid) ** (1 . 0/3 . 0) )

)

Unc = 1.0/ (1.0/Un+Ucinv)

Upc = 1.0/ (1.0/Up+Ucinv)

** ELSE: case neglecting carrier-carrier scattering.

else

Unc=Un

Upc=Up

D = 2.0*Ut*Un*Up/(Un+Up)

** Evaluate functions of model variables.

L = sqrt(t*D)

wl=w/L

114
cosch=l . O/sinh (wl)

tnh=Tanh(wl/2.0)

cth=1.0/tanh(wl)

P=Qt/A/L/tnh/q

endif

C

C *** Evaluate the forward biased IGBT emitter base junction voltage.

C

Ueff=Unc+Upc*Qt/ (Qt+Nb)

Navg=sqrt (Nb**2 . 0+P**2*cosch**2 .0)

x=(Navg*tnh/ (Nb+P*cosch*tnh)

ARCTNH=0.5*LOG( (1.0+x) / (1.0-x)

neff=wl/2 . 0*Navg/ARCTNH

Rb=w/q/Ueff/neff/A + Rs

Vdep= - 0.5* (Qt-QO) /q/Nb/A**2/epsi* (Qt-QO) +0.6

Vdif= Ut*LOG( (P+Nb) * (P/ni**2+1.0/Nb) ) - D/Unc*LOG ( (Nb+P) /Nb)

If (Vdif .It. Vdep .or. Qt .gt. Q0) then

Vebq= Vdif

else

Vebq= Vdep

endif

return

end

C

C

C

Q**** ******** ****************************************************************

115
Appendix 8

Subroutines IGBTINP, IGBTSTO and IGBTREC

£******* **************************** *****************************************

c

cc

C Subroutine to input the IGBT model parameters from the input

C File already opened under unit IUNIT.

C

C

Subroutine IGBTINP (IUNIT)

C

C *** Declare common IGBT model parameters.

C

REAL t, wb, nb, A, isne, Vt, Kpsat, Kplin, Rs, theta,

& Cgs,Agd, Coxd, Vtd, BVn, BVf,

& ccsflg, selflg, vpsat , vnsat,

& Un,Up,Ut,epsi,ni,q

COMMON /IGBTpar/ t, wb, nb, A, isne, Vt, Kpsat, Kplin, Rs, theta,

& Cgs, Agd, Coxd, Vtd, BVn, BVf

,

& ccsflg, selflg, vpsat, vnsat,

& Un,Up,Ut, epsi, ni, q

INTEGER IUNIT

C

C *** Read the device model parameters.

C

read (iunit, *)

t

read ( iunit , * ) wb

read (iunit, *) Nb

read (iunit, *)

read (iunit, *) Isne

read (iunit, *) Vt

read (iunit, *) Kpsat

read (iunit, *) Kplin

read (iunit, *) Rs

read (iunit, *) theta

read (iunit, *) Cgs

read ( iunit , * ) Agd

read ( iunit , * ) Coxd

read (iunit, *) Vtd

read ( iunit , * ) BVn

read (iunit, *)BVf

C

C *** Read the second order effect flags.

C

read (iunit, *) ccsflg

read(iunit, *) sclflg

C

C *** Designate the physical constants of silicon.

C

Ut = 0.0259

ni = 1.45

Un = 1500.0

Up = 450.0

116
q = 1.6E-9

epsi=8.854e-14*11.9

vpsat=C . 95e7

vnsat=l

.

lei

Return

End

**************************************************************************

Subroutine to store the IGBT model parameters from the labeled common block IGBTpar into a device parameter array IGBTNAM.

Subroutine IGBTSTO (IGBTNAM) *** Declare common IGBT model parameters.

REAL IGBTNAM (20)

REAL t, wb, nb, A, isne, Vt, Kpsat, Kplin, Rs, theta,

& Cgs,Agd, Coxd, Vtd, BVn, BVf,

& ccsflg, selflg, vpsat, vnsat,

& Un, Up, Ut, epsi, ni,

q

COMMON /IGBTpar/ t, wb, nb, A, isne, Vt, Kpsat , Kplin, Rs, theta,

& Cgs,Agd, Coxd, Vtd, BVn, BVf,

& ccsflg, selflg, vpsat, vnsat,

& Un,Up,Ut,epsi,ni,q

*** Read the device model parameters.

IGBTNAM (1)=

IGBTNAM (2) =

IGBTNAM (3)=

IGBTNAM (4)

IGBTNAM (5)=

IGBTNAM (6) = IGBTNAM (7)=

IGBTNAM (8)

IGBTNAM (9) = IGBTNAM (10)

IGBTNAM (11)

IGBTNAM (12)

IGBTNAM (13)

IGBTNAM (14)

IGBTNAM (15)

IGBTNAM (16)

IGBTNAM (17)

IGBTNAM (18)

t

wb

Nb

A

Isne

vt

Kpsat

Kplin

Rs

=theta

=Cgs

=Agd

=Coxd

=Vtd

=BVn

=BVf

=ccsflg

=sclflg

Return

End

C

C

C

Q **************************************************

117
Subroutine to recall IGBT model parameters from a device parameter

array IGBTNAM into the labeled common block IGBTpar

.

Subroutine IGBTREC (IGBTNAM)

* Declare common IGBT model parameters.

REAL IGBTNAM (20)

REAL t, wb, nb, A, isne, Vt, Kpsat, Kplin, Rs, theta,

Cgs, Agd, Coxd, Vtd, BVn, BVf

,

ccsflg, selflg, vpsat, vnsat,

Un, Up, Ut, epsi, ni,

q

COMMON /IGBTpar/ t, wb, nb, A, isne, Vt, Kpsat, Kplin, Rs, theta,

Cgs, Agd, Coxd, vtd, BVn, BVf,

ccsflg, sclflg, vpsat, vnsat,

Un,Up,Ut,epsi,ni,q

* Read the device model parameters.

t=IGBTNAM(l)

wb=IGBTNAM (2)

Nb=IGBTNAM (3)

A=IGBTNAM ( 4

)

Isne=IGBTNAM (5)

Vt=IGBTNAM ( 6)

Kpsat=IGBTNAM(7)

Kplin=IGBTNAM(8)

Rs=IGBTNAM(9)

theta=IGBTNAM (10)

Cgs=IGBTNAM(ll)

Agd=IGBTNAM ( 12

)

Coxd=IGBTNAM(13)

Vtd=IGBTNAM ( 14

)

BVn=IGBTNAM (15)

BVf=IGBTNAM (16)

CCSflg=IGBTNAM(17)

SClflg=IGBTNAM(18)

Return

End

:**************************** **********+*************************

118
Appendix 9

Function Decs

Function to iterate the ccs dif fusivity

real function Dccs(D)

Declare common IGBT model parameters

REAL t , wb, nb, A, isne, Vt, Kpsat, Kplin, Rs, theta,

& Cgs, Agd, Coxd, Vtd,BVn,BVf,

& ccsflg, sclflg, vpsat, vnsat,

& Un,Up,Ut, epsi,ni, q

COMMON /IGBTpar/ t, wb, nb, A, isne, Vt, Kpsat, Kplin, Rs, theta,

& Cgs , Agd, Coxd, Vtd, BVn, BVf

& ccsflg, selflg,vpsat, vnsat,

& Un,Up,Ut,epsi,ni,q

Declare common variables and functions of the variables.

REAL Vgs, It,Qt, Vcb, Ig

COMMON /Statvr/ Vgs, Vcb, Qt, It, Ig

REAL W, Web j , D, L, P, Pmid, Unc, Upc, Ucinv, wl

Evaluate functions of model variables.

Web j=sqrt (2 . 0*epsi*abs ( (Vcb+0 . 6) /q/Nb)

if (Vcb .It. -0.999*0.6)

& Web j=sqrt (2 . 0*epsi*abs ( ( (1-0 . 999) *0 . 6) /q/Nb)

W= (Wb-Wcbj)

if(W .It. 0.05*Wb) W=0.05*Wb

L = sqrt (t*D)

wl=w/l

P=Qt/A/L/Tanh (wl/2 . 0) /q

pmid =P*sinh (wl/2 .0) /sinh(wl)

l/Uc=Ucinv : the reciprocal component of mobility due to high

free carrier level (carrier-carrier) scattering.

Ucinv= sqrt (Pmid* (Pmid+Nb) ) *LOG( 1.0+ 4 . 54E11/10 . 0** (20 . 0/3 . 0)

& /( (Pmid+Nb) * (Pmid+ni**2.0/Nb) )** (1.0/3.0) ) /1.428E10

Uc=1.428E10/ (sqrt (Pmid* (Pmid+Nb) ) *LOG(1.0+ 4.54E11

& /10.0** (20.0/3.0) / ( (Pmid+Nb) *Pmid) ** (1 . 0/3 . 0) )

Unc = 1.0/ (1.0/Un+Ucinv)

Upc = 1.0/ (1.0/Up+Ucinv)

Calculate the next iteration carrier-carrier scattering diffusivity

Decs - 2 .0*Ut*Unc*Upc/ (Unc+Upc) - D

return

end

119
cc *********

120
Appendix 10

Function Spachg

Q *********************************************************************

C

c

c

C Function to iterate the effective space charge density in the

C collector-base depletion region including the saturation limited velocity.

C

REAL FUNCTION spachg(Nscl)

C

C *** Declare common IGBT model parameters.

C

REAL t,wb, nb, A, isne, Vt, Kpsat, Kplin, Rs, theta,

& Cgs,Agd, Coxd, Vtd, BVn,BVf,

& ccsflg, selflg, vpsat, vnsat,

& Un, Up, Ut, epsi, ni,

q

COMMON /IGBTpar/ t, wb, nb, A, isne, Vt, Kpsat, Kplin, Rs, theta,

& Cgs,Agd, Coxd, Vtd, BVn,BVf,

& ccsflg, selflg, vpsat, vnsat,

& Un, Up, Ut, epsi, ni,

q

C

C *** Declare common variables for space charge limited velocity routine

C and for functions of the model variables.

C

REAL Vgs, Vcb,Qt, lg, It,Nscl

COMMON /Statvr/ Vgs, Vcb, Qt, It , lg

REAL D,b, W, Wcbj, Wgdj, Imos, Ccb j, Cds, Cgd, Qb

REAL gama, M, BV, Igen

REAL Ip,DVcb

C

C *** Evaluate functions of model variables.

C

C breakdown voltage,

C

BV=BVf*5.34E13/ (abs (nscl) *1.0E10) ** (3.0/4.0)

If (Vcb .gt. BV*0.999) then

M=1.0/(l-0.999**BVn)

else

if (Vcb .It. 0.0) M=1.0

if (Vcb .ge. 0.0) M=l . 0/ (1- (Vcb/BV) **BVn)

endif

Igen=q/t*ni*A*sqrt (2 . 0*epsi*abs ( (Vcb) /q/Nscl)

)

If (Vcb .It. 0)lgen=0.0

C

C depletion widths and capacitances,

C

Web j=sqrt (2 . 0*epsi*abs ( (Vcb+0 . 6) /q/Nscl)

)

if (Vcb .It. -0.999*0.6)

& Web j=sqrt (2 . 0*epsi*abs ( ( (1 . 0-0 . 999) *0 . 6) /q/Nscl)

)

W=(Wb-Wcbj)

if(W .It. 0.05*Wb)W=0.05*Wb

Ccb j=A*epsi/Wcb

j

Cds= (A-Agd) *epsi/Wcb

j

121
Cgd=Coxd

If (Vcb .gt. Vgs-Vtd) then

Wgdj=sqft (2 . 0*epsi*abs ( (Vcb-Vgs+Vtd) /q/nscl)

)

Cgd=Coxd/ (1 . 0+Coxd/Agd/epsi*Wgdj)

endif

C

C diffusivity, mobility ratio, functions of charge

C

Qb=Nscl*W*A*q

gama=0 .

0

If (Qt .gt. 0)gama=Qt/ (Qt+Qb)

D=Ut*Up

If(Qt .ge. 0)D=Ut*Un*Up* (2*Qt+Qb) / (Un* (Qt+Qb) +Qt*Up)

b = Un/Up

C

C and MOSFET channel current

.

C

If(vgs .ge. Vt) then

If (abs(Vcb) .le. (Vgs-Vt) *Kpsat/Kplin)

& Imos=Kplin* ( (Vgs-Vt) *Vcb-0.5*Kplin/Kpsat*abs (Vcb) *Vcb)

& / (l+theta*abs (Vgs-Vt)

)

If (abs(Vcb) .gt. (Vgs-Vt) *Kpsat/Kplin)

& lmos=0 . 5*Kpsat* (Vgs-Vt) **2

& / (l+theta*abs (Vgs-Vt)

)

If (abs(Vcb) .gt. (Vgs-Vt) *Kpsat/Kplin .and. Vcb .It. 0.0)

& Imos=-Imos

Else

lmos=0 .

0

Endif

C

C *** Evaluate the collector current.

C q

DVcb = ( It - M* (gama*It/ (1+b) + 2 . 0*D*Qt/W**2 + Imos + Igen)

& + Cgd/ (Cgs+Cgd) *Ig

& )/( Cds + Cgs/ (Cgs+Cgd) *Cgd + M*Ccbj/3 . 0*Qt/Qb ) Ip=gama*It/ (1+b) + 2*D/W**2*Qt + Ccb j/3 . 0*Qt/Qb*DVcb

C

C *** Calculate the next iteration of space charge concentration

C

spachg = Nscl-Nb-Ip/q/A/vpsat + Imos/q/A/vnsat

RETURN

END

C

C

C

Q* ***************************************************************************

122
Appendix 11

Circuit File: Rlload.for

C **********************************************^

C

C State Equations, Input Routine, and Output Routine

C for the Series Resistor-Inductor Load with a Resistive

C Gate Drive.

C

Q *************************************************

c

c

C *** Subroutine to evaluate the state equations of the device and circuit.

C

SUBROUTINE STATEQ (Time, Y, YP)

C

C *** Designate the number of state equations and declare the calling

C arrays for the state variables and their time derivatives.

C

INTEGER NEQN

PARAMETER (NEQN=4)

REAL Y (NEQN) ,YP (NEQN) , time

C

C *** Designate external functions.

C

REAL Pulsgen

EXTERNAL Pulsgen

C

C *** Declare labeled common block for circuit parameters.

C

REAL LL, RL, Vaa, Rg, Vggon, ton, toff, trise

COMMON /CIRCpar/ LL, RL, Vaa, Rg, Vggon, ton, toff, trise

C

C *** Declare names for state variables and their time derivatives.

C

REAL Vcb,Qte6, IL,Vgs

REAL DVcb, DQte6, DIL, DVgs

C

C *** Declare names for functions of state variables.

C

REAL Va, Ig, Vgg, It,Rb,Vebq

C

C *** Define names for state variables in terms of the calling array.

C

Vcb =Y(1)

Qte6 =Y(2)

IL =Y(3)

Vgs =Y(4)

C

C *** Evaluate functions of state variables.

C

call IGBTVeb (Qte6, Vcb, Rb, Vebq)

Va= IL*Rb + Vcb + Vebq

C

It=IL

Vgg=Pulsgen (time, ton, toff, trise, trise, Vggon)

Ig=(Vgg-Vgs) /Rg

C

123
C *** Evaluate the state equations.

C

call IGBTSEQ (Vgs, Vcb, Qte6, Ig, It, DVgs, DVcb, DQte6)

DIL=1 . 0/LL* (-IL*RL-Va+VAA)

C

C

*'** Define return array for time derivatives of state variables.

C

YP (l)=DVcb

YP (2)=DQte6

YP (3)=DIL

YP (4) =DVgs

C

RETURN

END

C

C

C

C

C

Q ********************************************************

c

c

C *** Subroutine to input device and circuit parameters, initialize

C state variables, and to set up the plot and the data file.

C

SUBROUTINE INPUT (time, Y, NSTATE, ABSERR, RELERR)

C

C *** Designate the number of state variables and declare the

C calling parameters.

C

INTEGER NEQN

PARAMETER (NEQN=4)

REAL time, Y (NEQN) , ABSERR, RELERR

INTEGER NSTATE

C

C *** Declare labeled common block for circuit parameters.

C

REAL LL, RL, Vaa, Rg, Vggon, ton, toff, trise

COMMON /CIRCpar/ LL, RL, Vaa, Rg, Vggon, ton, toff, trise

C

C *** Declare labeled common block for data output parameters

C and plotting arrays.

C

REAL tplot,tfinal,dltat

REAL Xax(400) ,Ylax(400) ,Y2ax(400) ,Y3ax(400) ,Y4ax(400)

REAL WX(400) , WY(400)

INTEGER outunit , nout , iout

COMMON /DATAOUT/ tplot , t final, dltat,

& Xax, Ylax, Y2ax, Y3ax, Y4ax,WX,WY,

& outunit, nout, iout

C

CHARACTER* 4 0 tlable, viable, right, head

C

C *** Declare variable for input file names and logical units.

C

CHARACTER* 4 0 filname

INTEGER cirunit, devunit

C

C *** Open files to read parameter values from and write waveforms to.

C

124
outunit=10

devunit=ll

cirunit=12

format (a)

write (6, *)

& 'Enter file to read device input parameters from: ' read (5, 2) filname

open (unit=devunit, f ile=filname, status=' old' , ERR=97)

write ( 6, *)' Enter file to read circuit input parameters from: ' read (5, 2) filname

open (unit=cirunit, file=filname, status=' old' , ERR=98)

write (6,*) 'Enter file to write data to: ' read (5, 2) filname

open (unit=outunit, f ile=filname, status=' new' , ERR=99)

Set Error Tolerances and number of state equations.

NSTATE=NEQN

ABSERR=1 . Oe-5

RELERR =1 . Oe-5

Input device parameters.

CALL IGBTINP (devunit)

Input external circuit parameters;

load parameters,

read (cirunit, *) RL

read (cirunit, *) LL

read ( cirunit , * ) Vaa

and drive parameters.

read (cirunit, *) RG

read ( cirunit , * ) Vggon

read (cirunit, *) ton

read (cirunit, *) tof

f

read (cirunit, *) trise

Also, input plotting parameters.

read (cirunit, *) tfinal

read (cirunit, *) tplot

Initialize the state variables and time.

time=0 .

0

Y(l) = Vaa

Y(2) = 0.0

Y(3) = 0.0

Y(4) = 0.0

Write number of points at top of output file and calculate increment.

iout=0

125
nout=400

write (outunit, *) nout

dltat= (tfihal-tplot) /float (nout)

C

C *** Set up graphics screen.

C

tlable=' TIME (US) ' vlable='VA * IA * VG * IG ' head=' ' right=' ' call SIDTEX(head, 0,tlable, 1, viable, 1, RIGHT, 0)

C top bottom left right 0=color=default

C

C

RETURN

END

C

C

C

C

Q ************************************************************************

C

c

C *** Subroutine to write and plot the output quantities.

C

SUBROUTINE OUTPUT (time, Y)

C

C *** Designate the number of state variables and declare the

C calling parameters.

C

INTEGER NEQN

PARAMETER (NEQN=4)

REAL Y (NEQN) , time

C

C *** Designate external functions.

C

REAL Pulsgen

EXTERNAL Pulsgen

C

C *** Declare labeled common block for circuit parameters.

C

REAL LL, RL, Vaa, Rg, Vggon, ton, toff, trise

COMMON /CIRCpar/ LL, RL, Vaa, Rg, Vggon, ton, toff , trise

C

C *** Declare labeled common block for data output parameters

C and plotting arrays.

C

REAL tplot, tfinal, dltat

REAL Xax(400) , Ylax(400) , Y2ax (400) , Y3ax (4 00) , Y4ax(400)

REAL WX(400) , WY(400)

INTEGER outunit, nout, iout, nplt, loopin

COMMON /DATAOUT/ tplot, tfinal, dltat,

& Xax, Ylax, Y2ax, Y3ax, Y4ax, WX,WY,

& outunit, nout, iout

C

C *** Declare names for state variables.

C

REAL Vcb,Qte6, IL,Vgs

C

C *** Declare names for functions of state variables.

126
REAL Va, Ig,.Vgg, It,Rb, Vebq,Qt

If time is greater than or equal to tplot then:

Write out the anode voltage, gate voltage, anode current,

gate current, and charge at each time step, and plot

the device current and voltages. Otherwise, increment

the time and do another step.

If (time .It. tplot) then

time=time+dltat

return

endif

Define state variables.

Vcb =Y(1)

Qte6 =Y(2)

IL =Y(3)

Vgs =Y(4)

Calculate functions of state variables for output quantities.

call IGBTVeb (Qte6, Vcb, Rb, Vebq)

Va= IL*Rb + Vcb+Vebq

It=IL

Vgg=Pulsgen (time, ton, toff, trise, trise, Vggon)

Ig=(Vgg-Vgs) /Rg

Qt=Qte6*l . OE-6

Write output quantities to logical unit.

write (outunit, 10) Time-tplot,

& Va, It, Vgs, Ig, Qt, Vebq, rb

format (8 (lx,E10.4)

Store normalized quantities for graphics output.

iout=iout+l

nplt=iout

xax (iout ) =time*l . 0e6

ylax (iout) =Va

y2ax (iout) =Vaa*2 . 0/Vggon*Vgs

y3ax (iout) =Vaa+ Vaa/Vggon*Rg*Ig

y4ax (iout) =It*2*RL

Increment the integration time and decide if is final plot.

time=time + dltat

If (time .It. tfinaDthen

return

else

Interactive graphics loop,

continue

call HOWPLK0, 1, 1)

call curv (nplt, xax, ylax)

127
call HOWPLT(0, 1, 3)

call curv (nplt, xax, y2ax)

C

call HOWPLT(0, 1,7)

call curv (nplt, xax, y3ax)

C

call HOWPLT(0,1,4)

call curv (nplt, xax, y4ax)

C

call vg

if (loopin () .eq. 1) goto 99

stop

endif

C

END

C

C

C

C

Q *******************************!

c

C Function to generate a single pulse,

C

C

C

C

REAL function pulsgen (time, ton, toff, trise, tfall, Vggon)

REAL Vgg, time, ton, toff, trise, tfall, Vggon

Vgg=0 .

0

If (time . gt. ton .and. time .It. ton+trise)

& Vgg=Vggon* (time-ton) /trise

If (time .ge. ton+trise .and. time .It. toff) Vgg=Vggon

If (time .ge. toff .and. time .It. toff+t fall)

& Vgg=Vggon* (1 . 0- (time-toff ) /tfall)

pulsgen=Vgg

RETURN

END

128
Appendix 12

Circuit File: Clamp.for

Q ******************************************* *******************************

C

C State Equations, Input Routine, and Output Routine

C for the Series Resistor-Inductor Load with a Resistive

C Gate Drive, and a Soft Clamping Circuit.

C

Q ***************************************************

c

cC *** Subroutine to evaluate the state equations of the device and circuit.

C

SUBROUTINE STATEQ (Time, Y, YP)

C

C *** Designate the number of state equations and declare the calling

C arrays for the state variables and their time derivatives.

C

INTEGER NEQN

PARAMETER (NEQN=5)

REAL Y (NEQN) , YP (NEQN) , time

C

C *** Designate external functions.

C

REAL Pulsgen

EXTERNAL Pulsgen

C

C *** Declare labeled common block for circuit parameters.

C

REAL LL, RL, Vaa, Rg, Vggon, ton, toff, trise, Rblead,

& Cs,Rd,Vss

COMMON /CIRCpar/ LL, RL, Vaa, Rg, Vggon, ton, toff, trise, Rblead,

& Cs,Rd,Vss

C

C *** Declare names for state variables and their time derivatives.

C

REAL Vcb,Qte6, IL,Vgs,Vs

REAL DVcb,DQte6,DIL,DVgs,DVs

C

C *** Declare names for functions of state variables.

C

REAL Va, Ig, Vgg, It,Rb,Vebq

C

C *** Define names for state variables in terms of the calling array.

C

Vcb =Y(1)

Qte6 =Y(2)

IL =Y(3)

Vgs =Y(4)

Vs =Y(5)

C

C *** Evaluate functions of state variables.

C

call IGBTVeb (Qte6,Vcb,Rb, Vebq)

Va= IL*Rb + Vcb + Vebq

if(Va .gt. Vs+0.6)Va=(IL*Rb*Rd+(Vs+0.6) *Rb+ (Vcb+Vebq) *Rd) /(Rb+Rd)

C

129
It«IL

if (Va .gt. Vs + 0.6) It=IL- (Va-Vs-0 . 6) /Rd

C

Vgg=Pulsgen (time, ton, toff, trise, trise, Vggon)

Ig=(Vgg-Vgs) /Rg

C

C *** Evaluate the state equations.

C

call IGBTSEQ (Vgs, Vcb, Qte6, Ig, It, DVgs, DVcb, DQte6)

DIL=1 . 0/LL* (~IL*RL-Va+VAA)

DVs=(Va-Vs-0.6) /Cs/Rd - (Vs-Vss) /Rblead/Cs

if(Va .It. Vs +0.6)DVs=- (Vs-Vss) /Rblead/Cs

C

C *** Define return array for time derivatives of state variables.

C

YP (l)=DVcb

YP (2)=DQte6

YP (3)=DIL

YP (4)=DVgs

YP (5)=DVs

C

RETURN

END

C

C

C

C

C

r +************+*************+**+***************

C

C

C *** Subroutine to input device and circuit parameters, initialize

C state variables, and to set up the plot and the data file.

C

SUBROUTINE INPUT (time, Y, NSTATE, ABSERR, RELERR)

C

C *** Designate the number of state variables and declare the

C calling parameters.

C

INTEGER NEQN

PARAMETER (NEQN=5)

REAL time, Y (NEQN) , ABSERR, RELERR

INTEGER NSTATE

C

C *** Declare labeled common block for circuit parameters.

C

REAL LL, RL, Vaa, Rg, Vggon, ton, toff, trise, Rblead,

& Cs,Rd,Vss

COMMON /CIRCpar/ LL, RL, Vaa, Rg, Vggon, ton, toff, trise, Rblead,

& Cs,Rd,Vss

C

C *** Declare labeled common block for data output parameters

C and plotting arrays.

C

REAL tplot,tfinal,dltat

REAL Xax(400) , Ylax(400) , Y2ax(400) , Y3ax(400) ,Y4ax(400)

REAL WX(400) ,WY(400)

INTEGER outunit , nout , iout

COMMON /DATAOUT/ tplot , tfinal, dltat,

& Xax, Ylax, Y2ax, Y3ax, Y4ax,WX,WY,

130
& outunit, nout, iout

CHARACTER*4 0 tlable, viable, right, head

Declare variable for input file names and logical units.

CHARACTER* 4 0 filname

INTEGER cirunit, devunit

Open files to read parameter values from and write waveforms

outunit=10

devunit=ll

cirunit=12

format (a)

write (6, *)

& 'Enter file to read device input parameters from: ' read (5, 2) filname

open (unit=devunit, f ile=filname, status=' old' , ERR=97)

write (6, *) 'Enter file to read circuit input parameters from:

read (5, 2) filname

open (unit=cirunit, f ile=filname, status=' old' , ERR=98)

write (6,*) 'Enter file to write data to: ' read (5, 2) filname

open (unit=outunit, file=filname, status=' new' , ERR=99)

Set Error Tolerances and number of state equations.

NSTATE=NEQN

ABSERR=1 . Oe-5

RELERR =1 . Oe-5

Input device parameters.

CALL IGBTINP (devunit)

Input external circuit parameters;

load parameters,

read (cirunit, *) RL

read (cirunit, *) LL

read (cirunit, *) Vaa

snubber parameters,

read (cirunit, *) Vss

read (cirunit, *) Rblead

read (cirunit, *) Cs

read (cirunit, *) Rd

and drive parameters.

read (cirunit, *) RG

read ( cirunit , * ) Vggon

read (cirunit, *) ton

read (cirunit, *) tof

131
read (cirunit, *) trise

C

C *** Also, input plotting parameters.

C

read (cirunit, *) tfinal

read (cirunit, *) tplot

C

C *** Initialize the state variables and time.

C

time=0 .

0

Y(l) = Vaa

Y(2) = 0.0

Y(3) = 0.0

Y(4) = 0.0

Y(5) = Vss

C

C *** Write number of points at top of output file and calculate increment.

C

iout=0

nout=400

write (outunit, *) nout

dltat= (tfinal-tplot) /float (nout)

C

C *** Set up graphics screen.

C

tlable=' TIME (US) ' vlable='VA * IA * VG * IG ' head=' ' right=' ' call SIDTEX (head, 0, tlable, 1, viable, 1, RIGHT, 0)

C top bottom left right 0=color=default

C

C

RETURN

END

C

C

C

C

Q ************+*********************^

C

c

C *** Subroutine to write and plot the output quantities.

C

SUBROUTINE OUTPUT (time, Y)

C

C *** Designate the number of state variables and declare the

C calling parameters.

C

INTEGER NEQN

PARAMETER (NEQN=5)

REAL Y (NEQN) , time

C

C *** Designate external functions.

C

REAL Pulsgen

EXTERNAL Pulsgen

C

C *** Declare labeled common block for circuit parameters.

132
c REAL LL, RL, Vaa, Rg, Vggon, ton, toff, trise, Rblead,

& Cs,Rd,Vss

COMMON /CIRCpar/ LL, RL, Vaa, Rg, Vggon, ton, toff , trise, Rblead,

& Cs,Rd, Vss

C

C *** Declare labeled common block for data output parameters

C and plotting arrays.

C

REAL tplot,tfinal,dltat

REAL Xax(400) , Ylax(400) , Y2ax(400) , Y3ax(400) , Y4ax(400)

REAL WX(400) ,WY(400)

INTEGER outunit, nout, iout, nplt, loopin

COMMON /DATAOUT/ tplot , t final, dltat,

& Xax, Ylax, Y2ax, Y3ax, Y4ax,WX,WY,

& outunit , nout , iout

C

C *** Declare names for state variables.

C

REAL Vcb,Qte6, IL,Vgs,Vs

C

C *** Declare names for functions of state variables.

C

REAL Va, Ig, Vgg, It,Rb, Vebq,Qt

C

C

C *** If time is greater than or equal to tplot then:

C Write out the anode voltage, gate voltage, anode current,

C gate current, and charge at each time step, and plot

C the device current and voltages. Otherwise, increment

C the time and do another step.

C

If (time .It. tplot) then

time=time+dltat

return

endif

C

C *** Define state variables.

C

Vcb =Y ( 1

)

Qte6 =Y(2)

IL =Y (3)

Vgs =Y(4)

Vs =Y(5)

C

C *** Calculate functions of state variables for output quantities.

C

call IGBTVeb (Qte6, Vcb, Rb, Vebq)

Va= lL*Rb + vcb + Vebq

if(Va .gt. Vs+0.6)Va=(IL*Rb*Rd+(Vs+0.6)*Rb+(Vcb+Vebq)*Rd)/(Rb+Rd)

C

It=IL

if (Va .gt. Vs + 0.6) It=IL- (Va-Vs-0 . 6) /Rd

C

Vgg=Pulsgen (time, ton, toff, trise, trise, Vggon)

Ig=(Vgg-Vgs) /Rg

Qt=Qte6*1.0E-6

C

C *** Write output quantities to logical unit.

C

133
write (outunit, 10) Time-tplot,

& Va, It, Vgs, Ig,Qt, Vebq, rb, Vs

format (8 (lx,E10.4)

)

Store normalized quantities for graphics output.

iout=iout+l

nplt=iout

xax (iout ) =time*l . 0e6

ylax (iout ) =Va

y2ax (iout) =Vaa*2 . 0/Vggon*Vgs

y3ax (iout) =Vaa+ Vaa/Vggon*Rg*Ig

y4ax(iout)=It*2*RL

Increment the integration time and decide if is final plot

time=time + dltat

If (time .It. tfinal)then

return

else

Interactive graphics loop,

continue

call HOWPLT(0, 1, 1)

call curv (nplt, xax, ylax)

call HOWPLT(0, 1, 3)

call curv (nplt, xax, y2ax)

call HOWPLT(0, 1,7)

call curv (nplt, xax, y3ax)

call HOWPLKO, 1, 4)

call curv (nplt, xax, y4ax)

call vg

if (loopin () .eq. 1) goto 99

stop

endif

END

Function to generate a single pulse.

REAL function pulsgen (time, ton, toff, trise, tfall, Vggon)

REAL Vgg, time, ton, toff, trise, tfall, Vggon

Vgg=0 .

0

If (time .gt. ton .and. time .It. ton+trise)

& Vgg=Vggon* (time-ton) /trise

134
If (time .ge. ton+trise .and. time .It. tof f ) Vgg=Vggon

If (time .ge. toff .and. time .It. toff+tfall)

& Vgg=Vggon* (1 . 0- (time-toff ) /tfall)

pulsgen=Vgg

RETURN

END

135
Appendix 13

Circuit File: Actsnub.for

Q **********************************************************

C

C State Equations, Input Routine, and Output Routine

C for the Series Resistor-Inductor Load, a Polarized

C Gate Resistance, and a series Resistor-Capacitor Feedback.

C

r **************************************************************************

C

C

C *** Subroutine to evaluate the state equations of the device and circuit.

C

SUBROUTINE STATEQ (Time, Y, YP)

C

C *** Designate the number of state equations and declare the calling

C arrays for the state variables and their time derivatives.

C

INTEGER NEQN

PARAMETER (NEQN=5)

REAL Y (NEQN) , YP (NEQN) , time

C

C *** Designate external functions.

C

REAL Pulsgen

EXTERNAL Pulsgen

C

C *** Declare labeled common block for circuit parameters.

C

REAL LL, RL, Vaa, Rg, Vggon, ton, toff, trise, Cf , Rf, rgon

COMMON /CIRCpar/ LL, RL, Vaa, Rg, Vggon, ton, toff , trise, Cf, Rf, rgon

C

C *** Declare names for state variables and their time derivatives.

C

REAL Vcb,Qte6, IL, Vgs, Vcf

REAL DVcb,DQte6,DIL,DVgs,DVcf

C

C *** Declare names for functions of state variables.

C

REAL Va, Ig, Vgg, It, Rb, Vebq

C

C *** Define names for state variables in terms of the calling array.

C

Vcb =Y(1)

Qte6 =Y(2)

IL =Y(3)

Vgs =Y(4)

Vcf =Y(5)

C - C *** Evaluate functions of state variables.

C

call IGBTVeb (Qte6, Vcb, Rb, Vebq)

Va=( IL*Rb*Rf + (Vcb+Vebq) *Rf + (Vgs+Vcf ) *Rb ) / (Rb+Rf)

It=IL- (Va-Vgs-Vcf ) /Rf

Vgg=Pulsgen (time, ton, toff, trise, trise, Vggon)

Ig= ( Vgg-Vgs ) /Rg+ ( Va-Vcf-Vgs ) /Rf

If( Vgg .ge. (Vgs+0.6) ) Ig=Ig + (Vgg-Vgs-0 . 6) /Rgon

136
Evaluate the state equations.

call IGBTSEQ (Vgs, Vcb, Qte6, Ig, It, DVgs, DVcb, DQte6)

DIL=1 . 0/LL* (-IL*RL-Va+VAA)

DVcf-1 . 0/ (Rf *Cf ) * (Va-Vgs-Vcf

)

Define return array for time derivatives of state variables.

YP (l)=DVcb

YP (2)=DQte6

YP (3) =DIL

YP (4)=DVgs

YP (5) =DVcf

RETURN

END

*************************************************************

Subroutine to input device and circuit parameters, initialize

state variables, and to set up the plot and the data file.

SUBROUTINE INPUT (time, Y, NSTATE, ABSERR, RELERR)

Designate the number of state variables and declare the

calling parameters.

INTEGER NEQN

PARAMETER (NEQN=5)

REAL time, Y( NEQN) , ABSERR, RELERR

INTEGER NSTATE

Declare labeled common block for circuit parameters.

REAL LL, RL, Vaa, Rg, Vggon, ton, toff, trise, Cf , Rf , rgon

COMMON /CIRCpar/ LL, RL, Vaa, Rg, Vggon, ton, toff, trise, Cf, Rf, rgon

Declare labeled common block for data output parameters

and plotting arrays.

REAL tplot, tfinal, dltat

REAL Xax(4 00) , Ylax(4 00) ,Y2ax(400) , Y3ax(400) , Y4ax(400)

REAL WX(400) ,WY(400)

INTEGER outunit, nout, iout

COMMON /DATAOUT/ tplot , tfinal, dltat,

& Xax, Ylax, Y2ax, Y3ax, Y4ax,WX,WY,

& outunit, nout, iout

CHARACTER* 4 0 tlable, viable, right, head

Declare variable for input file name and logical units.

CHARACTERS 0 filname

INTEGER cirunit, devunit

137
C *** Open files to read parameter values from and write waveforms to.

C

outunit=10

devunit=ll

cirunit=12

2 format (a)

97 write (6,*)

& 'Enter file to read device input parameters from: ' read (5, 2) filname

open (unit=devunit, file=filname, status=' old' , ERR=97)

C

98 write (6,*)

& 'Enter file to read circuit input parameters from: ' read (5, 2) filname

open (unit=cirunit, file=filname, status=' old' , ERR=98)

C

99 write (6,*) 'Enter file to write data to: ' read (5, 2) filname

open (unit=outunit, file=filname, status=' new' , ERR=99)

C

C *** Set error tolerances and number of state equations.

C

NSTATE=NEQN

ABSERR=1 . Oe-5

RELERR=1 . Oe-5

C

C *** Input device parameters.

C

C Note: normalize all charges to 1.0E10 and distances are in cm

C

CALL IGBTINP (devunit)

C

C *** Input external circuit parameters;

C

C load parameters,

C

read (cirunit , *) RL

read (cirunit, *) LL

read (cirunit, *) Vaa

C

C drive parameters,

C

read (cirunit, *) RG

read (cirunit, *) Vggon

read (cirunit, *) ton

read (cirunit, *) tof

read (cirunit, *) trise

C

C and feedback parameters.

C

read (cirunit, *) Cf

read ( cirunit , * ) Rf

read (cirunit, *) Rgon

C

C *** Also, input data and plotting parameters.

C

read (cirunit, *) tfinal

read (cirunit, *) tplot

C

138
C *** Initialize the state variables and time.

C

C

time=0 .

0

Y(l) = Vaa

Y(2) = 0.0

Y(3) = 0.0

Y(4) = 0.0

Y(5) = Vaa

C

C *** Write number of points at top of output file and calculate increment.

C

iout=0

nout=400

write (outunit, *) nout

dltat= (tfinal-tplot) /float (nout)

C

C *** Set up graphics screen.

C

tlable=' TIME (US) ' vlable='VA * IA * VG * IG ' head=' ' right-' ' call SIDTEX (head, 0, tlable, 1, viable, 1, RIGHT, 0)

C top bottom left right 0=color=default

C

C

RETURN

END

C

C

c

c

c

c

c

C *** Subroutine to write and plot the output quantities.

C

SUBROUTINE OUTPUT (time, Y)

C

C *** Designate the number of state variables and declare the

C calling parameters.

C

INTEGER NEON

PARAMETER (NEQN=5)

REAL Y(NEQN) , time

C

C *** Designate external functions.

C

REAL Pulsgen

EXTERNAL Pulsgen

C

C *** Declare labeled common block for circuit parameters.

C

REAL LL, RL, Vaa, Rg, Vggon, ton, toff, trise, Cf , Rf , rgon

COMMON /CIRCpar/ LL, RL, Vaa, Rg, Vggon, ton, toff, trise, Cf, Rf, rgon

C

C *** Declare labeled common block for data output parameters

C and plotting arrays.

139
REAL tplot,tfinal,dltat

REAL Xax(400) , Ylax(400) , Y2ax (400) , Y3ax (400) , Y4ax(400)

REAL WX(400) ,WY(400)

INTEGER outunit, nout, iout, nplt, loopin

COMMON /DATAOUT/ tplot , tfinal, dltat,

& Xax, Ylax, Y2ax, Y3ax, Y4ax,WX,WY,

& outunit, nout, iout

Declare names for state variables.

REAL Vcb,Qte6, IL,Vgs, Vcf

Declare names for functions of state variables.

REAL Va, Ig, Vgg, It,Rb, Vebq,Qt

If time is greater than or equal to tplot then:

Write out the anode voltage, gate voltage, anode current,

gate current, and charge at each time step, and plot

the device current and voltages . Otherwise, increment

the time and do another step.

If (time .It. tplot) then

t ime=t ime+dlt at

return

endif

Define state variables.

Vcb =Y(1)

Qte6 =Y(2)

IL =Y(3)

Vgs =Y(4)

Vcf =Y(5)

Calculate functions of state variables for output quantities,

call IGBTVeb (Qte6, Vcb,Rb, Vebq)

Va=( IL*Rb*Rf + (Vcb+Vebq) *Rf + (Vgs+Vcf ) *Rb ) / (Rb+Rf)

It=IL- (Va-Vgs-Vcf ) /Rf

Vgg=Pulsgen (time, ton, toff, trise, trise, Vggon)

Ig= ( Vgg-Vgs ) /Rg+ ( Va-Vcf-Vgs ) /Rf

If( Vgg .ge. (Vgs+0.6) ) Ig=Ig + (Vgg-Vgs-0 . 6) /Rgon

Qt=Qte6*1.0E-6

Write output quantities to logical unit.

write (outunit, 10) Time-tplot,

& Va, Vgs, IL, Ig, Vcf, (Va-Vgs-Vcf) /Rf

format (7 (lx,E10.4)

)

Store normalized quantities for graphics output.

iout=iout+l

nplt=iout

xax (iout) =time*l . 0e6

y lax (iout) =Va

y2ax (iout) =Vaa*2 . 0/Vggon*Vgs

140
y3ax (iout) =Vaa+ Vaa/Vggon*Rgon*Ig

y4ax (iout) =It*2*RL

Increment the integration time and decide if is final plot

time=time + dltat

If (time .It. t final) then

return

else

Interactive graphics loop,

continue

call HOWPLT(0, 1, 1)

call curv (nplt, xax, ylax)

call HOWPLT(0, 1, 3)

call curv (nplt, xax, y2ax)

call HOWPLT(0, 1, 7)

call curv (nplt, xax, y3ax)

call HOWPLT(0, 1,4)

call curv (nplt, xax, y4ax)

call vg

if (loopin () .eq. 1) goto 99

stop

endif

END

***********************************************************

Function to generate a single pulse.

REAL function pulsgen (time, ton, toff , trise, t fall, Vggon)

REAL Vgg, time, ton, toff, trise, tfall, Vggon

Vgg=0 .

0

If (time .gt. ton .and. time .It. ton+trise)

& Vgg=Vggon* (time-ton) /trise

If (time .ge. ton+trise .and. time .It. t of f) Vgg=Vggon

If (time .ge. toff .and. time .It. toff+tfall)

& Vgg=Vggon* (1 . 0- (time-toff ) /tfall)

pulsgen=Vgg

RETURN

END

141
Appendix 14

Circuit File: Paralel.for

r **********************************************************

C

C State Equations, Input Routine, and Output Routine

C for Paralleled IGBTs with a Series Resistor-Inductor Load and

C a Resistive Gate Drive.

C

Q *********************************************************

C

C

C *** Subroutine to evaluate the state equations of the device and circuit.

C

SUBROUTINE STATEQ (Time, Y, YP)

C

C *** Designate the number of state equations and declare the calling

C arrays for the state variables and their time derivatives.

C

INTEGER NEQN

PARAMETER (NEQN=7)

REAL Y (NEQN) ,YP (NEQN) , time

C

C *** Designate external functions.

C

REAL Pulsgen

EXTERNAL Pulsgen

C

C *** Declare labeled common block for circuit parameters.

C

REAL LL, RL, Vaa, Rgl, Rg2, Vggon, ton, toff, trise,

& IGBT1 (20) , IGBT2 (20)

COMMON /CIRCpar/ LL, RL, Vaa, Rgl, Rg2, Vggon, ton, toff, trise,

& IGBT1, IGBT2

C

C *** Declare names for state variables and their time derivatives.

C

REAL II, Vcbl,Qte61, Vgl, Vcb2,Qte62, Vg2

REAL DIL, DVcbl, DQte61, DVgl, DVcb2, DQte62, DVg2

C

C *** Declare names for functions of state variables.

C

REAL Vgg, Va, Igl, Itl, Rbl, Vebql, Ig2, It2,Rb2, Vebq2

C

C *** Define names for state variables in terms of the calling array.

C

IL =Y(1)

vcbl =Y(2)

Qte61 =Y(3)

Vgl =Y(4)

Vcb2 =Y(5)

Qte62 =Y(6)

Vg2 =Y(7)

c

C *** Evaluate functions of state variables.

C

call IGBTREC ( IGBT1

)

call IGBTVeb (Qte61, Vcbl, Rbl, Vebql)

142
call IGBTREC (IGBT2)

call IGBTVeb (Qte62, Vcb2, Rb2, Vebq2)

Va= ( IL + (Vcbl+Vebql) /Rbl + (Vcb2+Vebq2) /Rb2 ) & * Rbl*Rb2/ (Rbl+Rb2)

Itl= (Va-Vcbl-Vebql) /Rbl

It2=(Va-Vcb2-Vebq2) /Rb2

Vgg=Pulsgen (time, ton, toff, trise, trise, Vggon)

Igl-(Vgg-Vgl) /Rgl

Ig2=(Vgg-Vg2) /Rg2

Evaluate the state equations.

CALL IGBTREC (IGBT1)

call IGBTSEQ (Vgl, Vcbl, Qte61, Igl, Itl, DVgl, DVcbl, DQte61)

CALL IGBTREC (IGBT2)

call IGBTSEQ (Vg2,Vcb2,Qte 62, Ig2, It2, DVg2, DVcb2, DQte62)

DIL=1 . 0/LL* (-IL*RL-Va+VAA)

Define return array for time derivatives of state variables.

YP(1) =DIL

YP (2) =DVcbl

YP (3) =DQte61

YP (4) =DVgl

YP(5) =DVcb2

YP(6) =DQte62

YP(7) =DVg2

RETURN

END

*************************************************************

Subroutine to input device and circuit parameters, initialize

state variables, and to set up the plot and the data file.

SUBROUTINE INPUT (time, Y, NSTATE, ABSERR, RELERR)

Designate the number of state variables and declare the

calling parameters.

INTEGER NEON

PARAMETER (NEQN=7)

REAL time, Y(NEQN) , ABSERR, RELERR

INTEGER NSTATE

Declare labeled common block for circuit parameters.

REAL LL, RL, Vaa, Rgl, Rg2, Vggon, ton, toff, trise,

143
& IGBT1 (20) , IGBT2 (20)

COMMON /CIRCpar/ LL, RL, Vaa, Rgl, Rg2, Vggon, ton, toff, trise,

& IGBT1, IGBT2

C

C *+* Declare labeled common block for data output parameters

C and plotting arrays.

C

REAL tplot,tfinal f dltat

REAL Xax(400) , Ylax(400) , Y2ax(400) ,Y3ax(400) , Y4ax(400)

REAL Y5ax(400) ,Y6ax(400) , Y7ax(400)

REAL WX(400) ,WY(400)

INTEGER outunit, nout, iout

COMMON /DATAOUT/ tplot, tfinal, dltat,

& Xax, Ylax, Y2ax, Y3ax, Y4ax, WX,WY,

& Y5ax, Y6ax, Ylax,

& outunit, nout, iout

C

CHARACTER* 4 0 tlable, viable, right, head

C

C *** Declare variable for input file names and logical units.

C

CHARACTER* 40 filname

INTEGER cirunit, devunit

outunit=10

devunit=ll

cirunit=12

2 format (a)

C

C *** Input device parameters and store in parameter arrays.

C

96 write (6,*)

& 'Enter file name of device parameters for IGBT #1: ' read (5, 2) filname

open (unit=devunit, f ile=filname, status=' old' , ERR=96)

CALL IGBTINP (devunit)

CALL IGBTSTO ( IGBT1

)

close (devunit)

C

97 write (6,*)

& 'Enter file name of device parameters for IGBT #2: ' read (5, 2) filname

open (unit=devunit , f ile=filname, status=' old' , ERR=97

)

CALL IGBTINP (devunit)

CALL IGBTSTO (IGBT2)

close (devunit)

C

C *** Open files to read parameter values from and write waveforms to.

C

98 write ( 6, *)' Enter file to read circuit input parameters from: ' read (5, 2) filname

open (unit=cirunit, file=filname, status=' old' , ERR=98)

C

99 write (6,*) 'Enter file to write data to: ' read (5, 2) filname

open (unit=outunit, file=filname, status=' new' , ERR=99)

C

C *** Set Error Tolerances and number of state equations.

C

NSTATE=NEQN

ABSERR=1 . Oe-4

144
RELERR =1 . Oe-4

Input external circuit parameters;

load parameters,

read (cirunit, *) RL

read (cirunit, *) LL

read ( cirunit , * ) Vaa

and drive parameters

.

read (cirunit, *) Rgl

read (cirunit, *) Rg2

read (cirunit, *) Vggon

read (cirunit, *) ton

read (cirunit, *) tof

f

read (cirunit, *) trise

Also, input plotting parameters.

read (cirunit, *) tfinal

read (cirunit, *) tplot

Initialize the state variables and time.

time=0 .

0

Y(l) =0.0

Y(2) =Vaa

Y(3) =0.0

Y(4) =0.0

Y(5) =Vaa

Y(6) =0.0

Y(7) =0.0

Write number of points at top of output file and calculate increment.

iout=0

nout=400

write (outunit, *) nout

dltat= (tf inal-tplot) /float (nout)

Set up graphics screen.

tlable=' TIME (US) ' vlable='VA * IA * VG * IG ' head=' ' right=' ' call SIDTEX (head, 0, tlable, 1, viable, 1, RIGHT, 0)

top bottom left right 0=color=default

RETURN

END

*********************************************************************

145
cc

C *** Subroutine to write and plot the output quantities.

C

SUBROUTINE OUTPUT (time, Y)

C

C *** Designate the number of state variables and declare the

C calling parameters.

C

INTEGER NEQN

PARAMETER (NEQN=7)

REAL Y (NEQN) , time

C

C *** Designate external functions.

C

REAL Pulsgen

EXTERNAL Pulsgen

C

C *** Declare labeled common block for circuit parameters.

C

REAL LL, RL, Vaa, Rgl, Rg2, Vggon, ton, toff, trise,

& IGBT1 (20) , IGBT2 (20)

COMMON /CIRCpar/ LL, RL, Vaa, Rgl, Rg2, Vggon, ton, toff, trise,

& IGBT1, IGBT2

C

C *** Declare labeled common block for data output parameters

C and plotting arrays.

C

REAL tplot, tfinal, dltat

REAL Xax(400) , Ylax(400) , Y2ax(400) , Y3ax(400) , Y4ax(400)

REAL Y5ax(400) , Y6ax(400) , Y7ax(400)

REAL WX(400) ,WY(400)

INTEGER outunit , nout , iout , nplt

COMMON /DATAOUT/ tplot, t final, dltat

,

& Xax, Ylax, Y2ax, Y3ax, Y4ax,WX, WY,

& Y5ax, Y6ax, Y7ax,

& outunit, nout, iout

C

C *** Declare names for state variables and their time derivatives.

C

REAL II, Vcbl, Qte61, Vgl, Vcb2, Qte62, Vg2

C

C *** Declare names for functions of state variables.

C

REAL Vgg,Va, Igl, Itl, Rbl, Vebql, Ig2, It2, Rb2, Vebq2

C

C *** If time is greater than or equal to tplot then:

C Write out the anode voltage, gate voltage, anode current,

C gate current, and charge at each time step, and plot

C the device current and voltages. Otherwise, increment

C the time and do another step.

C

If (time .It. tplot) then

time=time+dltat

return

endif

C

C *** Define names for state variables in terms of the calling array.

146
IL =Y(1)

Vcbl =Y(2)

Qte61 =Y(3)

Vgl =Y(4)

Vcb2 =Y(5)

Qte62 =Y(6)

Vg2 =Y (7)

Calculate functions of state variables for output quantities.

call IGBTREC (IGBT1)

call IGBTVeb (Qte61, Vcbl,Rbl, Vebql)

call IGBTREC (IGBT2)

call IGBTVeb (Qte62 / Vcb2,Rb2, Vebq2)

Va= ( IL + (Vcbl+Vebql) /Rbl + (Vcb2+Vebq2) /Rb2 ) & * Rbl*Rb2/ (Rbl+Rb2)

Itl=(Va-Vcbl-Vebql) /Rbl

It 2= (Va-Vcb2-Vebq2) /Rb2

Vgg=Pulsgen (time, ton, toff, trise, trise, Vggon)

Igl=(Vgg-Vgl) /Rgl

Ig2=(Vgg-Vg2) /Rg2

Write output quantities to logical unit.

write (outunit, 10) Time-tplot,

& Va, Itl, It2,Vgl,Vg2, Igl, Ig2

format (8 (lx,E10.4)

)

Store normalized quantities for graphics output.

iout=iout+l

nplt=iout

xax (iout) =time*l . 0e6

ylax (iout) =Va

y2ax (iout) =Vaa*2 . 0/Vggon*Vgl

y3ax (iout) =Vaa+ Vaa/Vggon*Rgl*Igl

y4ax (iout) =Itl*2*RL

y5ax(iout)=Vaa*2 .0/Vggon*Vg2

y6ax (iout) =Vaa+ Vaa/Vggon*Rg2*Ig2

y7ax (iout) =It2*2*RL

Increment the integration time and decide if is final plot.

time=time + dltat

If (time .It. tfinal)then

return

else

Interactive graphics loop,

continue

call HOWPLT(0, 1, 1)

call curv (nplt, xax, ylax)

147
call HOWPLT(0, 1, 3)

call curv (nplt, xax, y2ax)

call curv (nplt, xax, y5ax)

call HOWPLT(0, 1,7)

call curv (nplt, xax, y3ax)

call curv (nplt, xax, y6ax)

call HOWPLT(0, 1, 4)

call curv (nplt, xax, y4ax)

call curv (nplt, xax, y7ax)

call vg

if (loopin ( ) . eq. 1) goto 99

stop

endif

END

*******************************************************

Function to generate a single pulse.

REAL function pulsgen (time, ton, toff, trise, tfall, Vggon)

REAL Vgg, time, ton, toff, trise, tfall, Vggon

Vgg=0 .

0

If (time .gt. ton .and. time .It. ton+trise)

& Vgg=Vggon* (time-ton) /trise

If (time .ge. ton+trise .and. time .It. t of f) Vgg=Vggon

If (time .ge. toff .and. time .It. toff+tfall)

& Vgg=Vggon* (1.0- (time-toff) /tfall)

pulsgen=Vgg

RETURN

END

148
NOMENCLATURE

4.<i« — " ^-gd

Agd

b = /x„//iP

Cdsj

Ce bj

Ce bd

Ce bq

Of

Cgd

C9. Cox d

Cs D = 2Dn Dp /{Dn + Dp ) Dec.

Dn ,Dp

If

h

h

II

Ifnoa

jaat

mot

I*ne

It

T»at 1 T

Kplin

Kpsat

L = ^Dthl

Ll

Device active area (cm2

) Body region area (cm2

) Gate-drain overlap area (cm2

) Ambipolar mobility ratio

Base- collect or depletion capacitance (F)

Drain-source depletion capacitance (F)

Emitter-base depletion capacitance (F)

Emitter-base diffusion capacitance (F)

Emitter-base capacitance (F)

External feedback capacitor (F)

Gate-drain capacitance (F)

Gate-drain overlap depletion capacitance (F)

Gate-source capacitance (F)

Gate-drain overlap oxide capacitance (F)

Snubber capacitance (F)

Ambipolar diffusivity (cm2 /s)

Carrier-carrier scattering diffusivity (cm2 /s)

Electron, hole diffusivity (cm2 /s)

Feedback current (A)

Gate current (A)

Tail size knee current (A)

Tail decay rate knee current (A)

Load inductor current (A)

MOSFET channel current (A)

MOSFET channel saturation current (A)

Electron, hole current (A)

Emitter electron saturation current (A)

IGBT anode current (A)

IGBT anode saturation current (A)

MOSFET linear transconductance (A/V2

) MOSFET saturation transconductance (A/V2

) Ambipolar diffusion length (cm)

Series load inductance (H)

149
n,p Electron, hole carrier concentration (cm-3

) 8n,8p Excess carrier concentrations (cm-3

) ne ff Effective base carrier concentration (cm-3

) Ui Intrinsic carrier concentration (cm-3

) NBCi Collector-base space charge concentration (cm-3

) Nb Base doping concentration (cm-3

) Pq Excess carriers at emitter edge of base (cm-3

) q Electronic charge (1.6 x 10 -19 C)

Q Instantaneous excess carrier base charge (C)

Qb Background mobile carrier base charge (C)

Qo Built-in emitter-base depletion charge (C)

Rb Conductivity modulated base resistance (ft)

Rb Snubber bleeder resistance (ft)

Rd Diode resistance (ft)

Rf Series feedback resistance (ft)

Rg Gate drive resistance (ft)

Rg0n Turn-on gate resistance (ft)

Rl Series load resistance (ft)

Ra Device series resistance (ft)

Va Device anode voltage (V)

Vaa Anode supply voltage (V)

He Applied base- collector voltage (V)

Vn Built-in junction potential (V)

Vc f External feedback capacitor voltage (V)

Vda = Vf,c Applied drain-source voltage (V)

Veb Applied emitter-base voltage (V)

Ve iq Emitter-base capacitor voltage (V)

Vebd Emitter-base diffusion potential (V)

Ve bj Emitter-base depletion potential (V)

Vgg Gate pulse generator voltage (V)

Vgon Gate pulse voltage amplitude (V)

Vga Gate-source voltage (V)

Vr On-state voltage at high gate voltage (V)

150
Vs Snubber voltage (V)

VSS Snubber supply voltage (V)

VT MOSFET channel threshold voltage (V)

vTd Gate-drain overlap depletion threshold (V)

Vniat Electron saturation velocity (cm/s)

Vpaat Hole saturation velocity (cm/s)

W Quasi-neutral base width (cm)

wB Metallurgical base width (cm)

wbcj Base-collector depletion width (cm)

wdtj Drain-source depletion width (cm)

wgdj Gate-drain overlap depletion width (cm)

X Distance in base from emitter (cm)

Carrier-carrier scattering coefficient ((cm-V-s) -1

) a2 Carrier-carrier scattering coefficient (cm-2

) A. Steady-state common emitter current gain

Ptr,L Clamped inductive load tail size

Ptr,V Constant anode supply voltage tail size

7 High-level injection coeificent

Dielectric constant of silicon (F/cm)

t**ff Effective ambipolar mobility (cm2 /V-s)

Electron, hole mobility (cm2 /V-s)

Carrier-carrier scattering mobilities (cm2 /V-s)

fyrxAp Electron, hole quasi-fermi potential (V)

THL Base high-level lifetime (s)

n = W2 /4DP High-gain, high-level injection base transit

time (s)

U.S. G.P.O. : 1992-31 1-891 :60486 151

WST-1 14A U.S. DEPARTMENT OF COMMERCE

|(REV. 3-90) NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY

BIBLIOGRAPHIC DATA SHEET

1. PUBLICATION OR REPORT NUMBER

NIST/SP-400/88

2. PERFORMING ORGANIZATION REPORT NUMBER

3. PUBLICATION DATE June 1992

TITLE AMD SUBTITLE Semiconductor Measurement Technology: INSTANT — IGBT Network Simulation and Transient ANalysis

Tool

II AUTHOR(S)

A. R. Hefner, Jr.

i. PERFORMING ORGANIZATION (IF JOINT OR OTHER THAN NIST, SEE INSTRUCTIONS)

U.S. DEPARTMENT OF COMMERCE

NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY

GAITHERSBURG, MD 20899

7. CONTRACT/GRANT NUMBER

8. TYPE OF REPORT AND PERIOD COVERED

Final

SPONSORING ORGANIZATION NAME AND COMPLETE ADDRESS (STREET, CITY, STATE, ZIP)

Same as item #6

10. SUPPLEMENTARY NOTES

W. ABSTRACT (A 200-WORD OR LESS FACTUAL SUMMARY OF MOST SIGNIFICANT INFORMATION. IF DOCUMENT INCLUDES A SIGNIFICANT BIBLIOGRAPHY OR

UTERATURE SURVEY, MENTION IT HERE.)

The IGBT (Insulated Gate Bipolar Transistor) is a power semiconductor device that has gained acceptance among power

electronic circuit design engineers for motor drive and power converter applications. These devices have the best features of both power MOSFETs and power bipolar transistors, i.e., efficient voltage gate drive requirements and high current

density capability. When designing the circuits and systems that utilize IGBTs or other power semiconductor devices,

circuit simulations are needed to examine how the devices affect the behavior of the circuit. However, the semiconductor

device models available in most circuit simulators were originally intended to describe microelectronic devices and cannot

adequately describe the characteristics of power devices. In this publication, a compact IGBT model suitable for incorporation in circuit simulators is described, and a circuit simulation program called INSTANT is presented that simulates the dynamic behavior of IGBTs within any external drive, load, and feedback circuit configuration. The

INSTANT simulator solves the systems of differential equations (state equations) that describe each component of the

circuit, where the equations for the individual components are coupled by the circuit configuration. The INSTANT

software package is designed to provide the flexibility to change the external circuit configuration and model equations.

The device and circuit parameters are also readily accessible, and the graphics output provides a real-time display of the

waveforms as they are calculated. This publication also describes the automated measurement methods developed to

extract the IGBT device model parameters from terminal electrical measurements. It is shown that unlike parameter

extraction for microelectronic devices, the dynamic characteristics must be used to characterize the IGBTs and to extract the model parameters. This occurs because the devices exhibit non-quasi-static behavior and because the dynamic

waveforms contain many features that isolate different physical mechanisms, whereas the physical mechanisms are convoluted in the relatively simple steady-state characteristics. The unique features of the IGBT electrical characteristics are explained using the model, and the procedures used to verify the IGBT model are given.

12. KEY WORDS (6 TO 12 ENTRIES; ALPHABETICAL ORDER; CAPITALIZE ONLY PROPER NAMES; AND SEPARATE KEY WORDS BY SEMICOLONS)

circuit simulator; dynamic model; FORTRAN; power transistor; software

13. AVAILABILITY 14. NUMBER OF PRINTED PAGES X UNLIMITED FOR OFFICIAL DISTRIBUTION. DO NOT RELEASE TO NATIONAL TECHNICAL INFORMATION SERVICE (NTIS). 159

X ORDER FROM SUPERINTENDENT OF DOCUMENTS, U.S. GOVERNMENT PRINTING OFFICE, WASHINGTON, DC 20402.

15. PRICE

X ORDER FROM NATIONAL TECHNICAL INFORMATION SERVICE (NTIS), SPRINGFIELD, VA 22161. ELECTRONIC FORM



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