NATL INST. OF STAND & TECH

A3.11D7 SSIfl^b

U.S. DEPARTMENT OF COMMERCE

National Bureau of Standards

NBS

PUBLICATIONS

NBS Special Publication 707

Digital Methods in Waveform

Metrology

Barry A, Bell, Editor

Proceedings of a Seminar

f-QC100

• U57

No- 707

1985

C 2
TM he National Bureau of Standards' was established by an act of Congress on March 3, 1901. The M Bureau's overall goal is to strengthen and advance the nation's science and technology and facilitate their effective application for public benefit. To this end, the Bureau conducts research and provides: (1) a

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NBS Special Publication 707

NATIONAL BUREAU OF STANDARDS

LIBRARY

Digital Methods in Waveform

Metrology

Proceedings of the Seminar on

Digital Methods in Waveform

Metrology, held at the National Bureau of Standards,

Gaithersburg, MD. October 18 and 19. 1983

Barry A. Bell. Editor

Center for Electronics and Electrical Engineering

National Engineering Laboratory

National Bureau of Standards

Gaithersburg, MD 20899

October 1985

U.S. Department of Commerce

Malcolm Baldrige, Secretary

National Bureau of Standards

Ernest Ambler, Director
Library of Congress U.S. Government Printing Office Catalog Card Number: 85-600591 Washington: 1985 National Bureau of Standards

Special Publication 707

Natl. Bur. Stand. (U.S.), Spec. Publ. 707

177 pages (Oct. 1985) CODEN: XNBSAV

For sale by the Superintendent

of Documents,

U.S. Government Printing Office, Washington, DC 20402
FOREWORD

On September 23 and 24, 1974, a workshop was held at the NBS,

Gaithersburg facility to identify critical problem areas and metrology needs

associated with modern electronic instrumentation. At that time the

Electricity Division had begun to institute a new program in the general area

of dynamic electrical measurements and standards in support of such

instrumentation. An important concern was how well NBS is addressing the

metrology needs vital to the growth of automatic test and measurement systems,

and the development of new generations of automatic test equipment (ATE) which

have become a significant part of the electronics industry. Representatives

of twenty-five leading instrument manufacturers and users discussed the

present and projected future requirements for improved physical standards, new measurement methodologies, better calibration and measurement assurance

services, and systems performance validation. The discussion topics, session

notes, feedback reports, and conclusions of the workshop are well documented

in NBS Technical Note 865, "Critical Electrical Measurement Needs and

Standards for Modern Electronic Instrumentation," issued in May 1975.

In following up on a number of the specific project activities that were recommended by the 1974 workshop, the Electronic Instrumentation and Metrology

Group of the Electrosystems Division has designed and developed:

1. An audio frequency phase angle calibration standard.

a. Continuous 2 Hz to 50 kHz frequency range.

b. Programmable 0.1 volt to 100 volt rms dual output channels.

c. Phase difference resolution of 1 part in 2 , or approximately

0. 0014 degrees.

d. Systematic uncertainty of ±(0.005-0.030) degrees.

2. Precision digital-to-analog (D/A) reference converter standards.

a. 18 and 20 bit resolution.

b. Voltage (±10V) and current (±100 ma) outputs.

c. Linearity of 1 to 2 ppm of full scale.

d. 100 to 50,000 conversions per second.

e. Low noise and thermal drifts (< 0.5 ppm/°C).

3. Accurate measurement standards using sampled-data techniques.

a. Low frequency (0.1 - 120 Hz) sampling ac voltmeter with four

decade (0.01, 0.1, 1.0, and 10 volt rms) ranges.

1. Two cycle measurement interval (e.g., 20 second reading of

0.1 Hz input signal).

i i i
ii. Rms measurement accuracy of ±0.2% of reading.

iii. Fast Fourier Transform computation to display total harmonic

distortion (THD).

b. Wideband (dc to 100 kHz) sampling wattmeter.

i. Based on earlier ac (to 5 kHz) sampling wattmeter prototype.

ii. Accuracy to ±0.1% of full scale range or better.

4. An automatic calibration system for ac voltage and ac/dc difference

measurements.

a. Desktop computer-based, automatic system using the GPI8

(IEEE-488) interface.

b. Elimination of a thermoelement (TE) comparator with ac/dc difference measurements accurate to better than 50 ppm (20 Hz - 20 kHz) and 100 ppm (20 kHz - 100 kHz).

c. Use of accurate, low noise TE measurement circuitry for higher

accuracy (10 ppm or better), and faster measurement cycles (under

development)

.

d. Documented software with the use of digital and graphical

displ ays.

In all of the above developments, a considerable amount of new or improved measurement methodology has already been achieved. This work on sophisticated electronic laboratory standards has led to more convenient ways

of testing the parameters of associated instrumentation. New NBS calibration

services are now available for audio frequency phase meters, low frequency

(0.1 - 10 Hz) ac voltmeters and sources, and 12-18 bit data converters.

It should also be noted that there have been several developments related

to the aforementioned items such as means for characterizing sample/hold (S/H)

amplifiers, gating and "viewing" circuits useful for making settling time

measurements, and dynamic test methods for analog-to-digital (A/D) converters

and transient recorders. The amplitude parameters (e.g., dynamic gain error,

and sample-to-hold offset) of S/H amplifiers can now be measured using

transformer bridge techniques with an accuracy of 50 ppm for signal

frequencies up to 50 kHz. Aperture time (or, the sample time delay) and other

time parameters can be determined with uncertainties of 4 ns, absolute, and

1 ns, relative, between two units under test. Present NBS diode bridge

sampling gate and viewing circuit designs allow detection of voltage settling

time errors of ±200 yV within 400 ns and ±2 mV(2000 yV) within 20 ns. The

measurement of current settling time to within ±1 mA can be made in as short

as 35 ns. Static tests developed so far for precision data converters

(available as a routine calibration) include complete transfer function errors

due to gain, offset, integral and differential linearity, with uncertainties

on the order of 2-4 ppm. Dynamic testing for A/D converters (available on a

i v
Special Test basis) provides a measure of the additional dynamic linearity

errors caused by both electrical and thermal settling times in the measurement

circuits of A/D converters. Also, the equivalent rms input noise for A/D

converters can readily be measured to an uncertainty of about 20 percent.

All of these efforts are establishing a foundation on which to provide better

metrology and calibration support for measurement systems and automatic test

equipment (ATE). The work to develop more versatile NBS laboratory standards

and associated test methods is being augmented by efforts to develop rigorous

testing and calibration strategies by which to minimize the number of test

points required in order to achieve the required level of confidence. Thus,

both designers and users of ATE can have a systematic, time-efficient approach

to the test and calibration process.

The papers contained in this special publication describe some of the

measurement techniques, physical standards , and associated apparatus that

have been developed by the staff of the Electronic Instrumentation and

Metrology Group, and were the subjects of the presentations of the 1983

seminar on Digital Methods in Waveform Metrology. Our work continues in most

of these efforts, and we look forward to being able to present and publish

additional results in the future.

Barry A. Bell

Group Leader

Electronic Instrumentation and Metrology

Electrosystems Division

v
TABLE OF CONTENTS

Page

Foreword iii

Preface vii

Seminar Agenda viii

List of Attendees x Abstract xii

SEMINAR PAPERS

Digital Waveform Synthesis Techniques 1 - N. M. Oldham

Phase Angle Standards and Calibration Methods 15

- R. S. Turgel

Characterization of Waveform Recorders 31

- D. R. Flach

Dual -Channel Sampling Systems 55

- G. N. Stenbakken

Data Converter Test Methods 75

- T. M. Souders

Settling Time Measurements 87

- H. K. Schoenwetter

APPENDICES

An Automatic AC/DC Thermal Voltage Converter and

AC Voltage Calibration System A-1

- K. J. Lentner, D. R. Flach, and B. A. Bell

Gallium Arsenide (GaAs)-Based Photoconductive Switches for Pulse Generation

and Sampling Applications in the Nanosecond Regime A-28

- B. A. Bell, A. G. Perrey, and R. A. Sadler

An Approach to ATE Calibration Via Performance Verification at the

System Inteface A-50

- T. F. Leedy
PREFACE

ELECTRONIC INSTRUMENTATION AND METROLOGY GROUP

ELECTROSYSTEMS DIVISION

The Electrosystems Division is a part of the Center for Electronics and

Electrical Engineering in the National Engineering Laboratory of NBS. The

mission of the Division is to develop methods for measuring and analyzing

electrical and electronic components, modules, instruments, systems, and the

materials used in their construction in terms of performance and functional

parameters as they affect the measurement capabilities of equipment in

practical applications.

The Electronic Instrumentation and Metrology Group of the Division carries out

projects which involve the development of standards and measurement

methodology to support modern, high-speed electronic instrumentation that

generally covers signals in the frequency range from dc to 1-10 MHz. New

physical reference standards and associated test methods are being developed

for directly evaluating the performance of data converters and transient

waveform recorders, phase angle meters, RMS AC voltmeters and calibrators,

precision function generators, and wideband signal analyzers. This work

requires the design of experimental techniques and the construction of

prototype circuits, subassemblies, instrument standards, and test/calibration

systems. Staff of the Electronic Instrumentation and Metrology Group are prepared to provide the following services in these technical areas.

CALIBRATION - New NBS calibration services are available for low frequency

(0.1 Hz - 10 Hz) ac rms voltage, phase angle measurements (2 Hz - 50 kHz),

and transfer function parameters of 12-18 bit data converters.

RESEARCH AND DEVELOPMENT - In dc and low frequency electronic instrumentation,

metrology to meet your special needs; assistance in solving measurement

problems and improving your metrological capability.

DESIGN AND CONSTRUCTION - Special prototype instrumentation standards in

limited quantities when there are no commercial sources.

TRAINING AND COOPERATIVE PROGRAMS - Seminars and individual training in

appropriate aspects of dc and low frequency measurements, cooperative R&D

projects with industry, postdoctoral research associateships.

vi i
SEMINAR AGENDA

DIGITAL METHODS IN WAVEFORM METROLOGY

OCTOBER 18, 1983

8:00 am Registration (B162)

8:30 an Welcome and Overview (A62)

SESSION I:

PRECISION WAVEFORM SYNTHESIS

9:00 am Digital Waveform Synthesis Techniques (A62)

N. M. Oldham - Electrosystems Division

9:45 am Phase Angle Standards and Calibration Methods (A62)

R. S. Turgel - Electrosystems Division

10:30 am Coffee Break

10:45 am Waveform Synthesis Lab (A132) and (B157)

(Discussion and Demonstration)

12:00 pm Lunch

SESSION II:

PRECISION WAVEFORM SAMPLING

1:00 pm Characterization of Waveform Recorders (A62)

D. R. Flach - Electrosystems Division

1:45 pm Dual -Channel Sampling Systems (A62)

G. N. Stenbakken - Electrosystems Division

2:30 pm Break

2:45 pm Waveform Measurement Lab (B157) and (A158)

(Discussion and Demonstration)

4:30 pm End of Session

6:45 pm Dinner for Participants

NOTE: All sessions will be held in the Metrology Building (Bldg. 220)

The room number for each session is indicated in parenthesis.

vi i i
SEMINAR AGENDA (Continued)

DIGITAL METHODS IN WAVEFORM METROLOGY

OCTOBER 19, 1983

SESSION III:

DATA CONVERTER CHARACTERIZATION

8:30 am Static/Dynamic Data Converter Testing (A62)

T. M. Souders - Electrosystems Division

9:15 am Settling Time Measurements (A62)

H. K. Schoenwetter - Electrosystems Division

10:00 am Coffee Break

10:15 am Data Acquisition/Conversion Lab (A158) and (A132)

(Discussion and demonstration)

11:45 am Lunch

SESSION IV:

INSTRUMENTATION METROLOGY

1:00 pm Informal Laboratory Presentations

Automatic Thermal Voltage Converter Calibration (A166)

. Conductance Measurements of GaAs Switches (A154]___

. ATE Performance Measurements and Standards (A132)

. Conducted EMI Effects on Test Equipment (A132)

2:30 pm Break

2:45 pm Informal Laboratory Discussions (all labs)

4:00 pm Wrap-Up Session/Feedback

5:00 pm Adjournment

1 x
LIST OF ATTENDEES

DIGITAL METHODS IN WAVEFORM METROLOGY

A. Agoston

Tektronix, Inc.

P.O. Box 500, D.S. 39-170

Beaverton, OR 97077

(503) 627-1722

D. Andriuk

Applied Communications

9125 Gaither Road

Gaithersburg, MD 20877

(301) 948-5210 x309

C. K. Brown

Naval Research Laboratory

Underwater Sound Reference Detachment

P.O. Box 8337

Orlando, FL 32856

(305) 859-5120

C. Eubanks

Metrology Laboratory

Portsmouth Naval Shipyard

Portsmouth, NH 03801

(207) 439-1000 x 2317

D. R. Fogel

Dynalectron Corp.

191-D Shangri La Drive

Lexington Park, MD 20653

(301) 921-3357

E. Greer

Naval Air Test Center

Patuxent River, MD

(301) 921-3357

R. Groom

Naval Weapons Station, Seal Beach

Code 063

Seal Beach, CA 90740

(714) 620-0525

0. Kawauchi

Lockheed Missile

and Space Co., Inc.

P.O. Box 504

0/48-72 B157-2E

Sunnyvale, CA 94086

(408) 756-2366

J. Ketseas

Bendix Test Systems Division

Teterboro, NJ 07608

(201) 393-3385

R. Lawton

Electromagnetic Fields Div.

723.05

National Bureau of Standards

(303) 497-3339

J. Mayo Wells

Center for Electronics

and Electrical Engineering

National Bureau of Standards

Gaithersburg, MD 20899

(301) 921-3357

J. Orogo

Naval Weapons Station,

Seal Beach

Code 063

Seal Beach, CA 90740

(174) 620-0525

S. Paquette

Applied Communications

9125 Gaither Road

Gaithersburg, MD 20877

(301) 948-5210 x309

0. Petersons

Electrosystems Division

National Bureau of Standards

Gaithersburg, MD 20899

(301) 921-2328

x
LIST OF ATTENDEES (Continued)

R. Powell

Center for Electronics

and Electrical Engineering

National Bureau of Standards

Gaithersburg, MD 20899

(301) 921-3357

J. J. Rede

McDonnell Douglas

MAC Dept. 112E

Rm. 250, Level 2 St. Louis, MO 63166

(314) 234-2757

K. Rush

Hewlett-Packard

1900 Garden of the Gods Road

Colorado Springs, CO 80907

(303) 590-2766

K. Seymore

Naval Weapons Station, Seal Beach

Code 063

Seal Beach, CA 90740

(714) 620-0525

F. W. Schimmel

Naval Research Laboratory

Underwater Sound Reference Detachment

P.O. Box 8337

Orlando, FL 32856

(305) 859-5120

F. Smith

North Atlantic Industries, Inc.

60 Plant Avenue

Hauppage, NY 11788

(516) 582-6500

R. V. Smith

52-11, B/203

Lockheed Palo Alto Research Laboratory

Palo Alto, CA 94304

(415) 493-4411 x4-5146

H. Stoddard

Metrology Laboratory

Portsmouth Naval Shipyard

Portsmouth, NH 03801

(207) 439-1000 x2317

R. Swerlein

Hewlett-Packard Co.

Loveland, CO 80537

(303) 667-5000 x2029

P. Sylvan

Teradyne Inc.

Boston, MA 02111

(617) 482-2700

R. Wachnik

Semiconductor Materials

and Processes Division

National Bureau of Standards

Gaithersburg, MD 20899

(301) 921-3628

G. Witkowski

General Dynamics

6000 E. 17 Mile

Sterling Heights, MI 48077

(313) 978-4313

xi
ABSTRACT

Modern electronic instrumentation metrology in the low frequency regime

(dc-10 MHz) was discussed in lecture talks and papers presented at NBS,

Gai thersburg, MD on October 18-19, 1983. The seminar program was organized

into four main session topics, as outlined in the Seminar Agenda (see pp. viii

and ix).

This special publication contains complete papers providing more

technical details of the subjects presented at the seminar. For the sessions

on Precision Waveform Synthesis, Precision Waveform Sampling, and Data

Converter Characterization, six formal papers are given describing the

hardware and software techniques used for developing NBS laboratory standards

and apparatus for testing ac sources and voltmeters, phase angle meters,

transient waveform recorders, wideband wattmeters, and digital-to-analog and

analog-to-digital converters. For the informal session on Instrumentation

Metrology, three subsequent papers have been written for publication. These

have been included in the Appendices for completeness.

Key Words: Analog/digital converters; ATE; automatic test systems; conducted

EMI; calibration methods; digital /analog converters; digital synthesis; phase

angle; photoconductance ; sample/hold amplifiers; sampling techniques; settling

time; thermal voltage converters.

Disclaimer:

Certain trade names and company products are identified in order to

specify the experimental procedure adequately. In no case does such

identification imply recommendation or endorsement by the National Bureau of

Standards, nor does it imply that the products are necessarily the best

available for the purpose. Views expressed by the various authors are their

own and do not necessarily represent those of the National Bureau of

Standards.

xi i
DIGITAL WAVEFORM SYNTHESIS TECHNIQUES

N. Michael Oldham

Electronic Instrumentation and Metrology

Electrosystems Division

National Bureau of Standards

Gaithersburg, MD 20899

1. Introduction

The theory describing Digital Waveform Synthesis (waveform generation from

digital data) was first described in the 1940s [1,2]. Applications at that time

were generally limited to digital communications. With the advent of economical

semiconductor memory and high resolution digital-to-analog converters (DACs),

waveform synthesizers found wide application in many areas, including the audio

industry. Progammable arbitrary waveform generators are now commercially

available from several manufacturers.

2. Generation Technique

The most commonly used technique of digital waveform synthesis is shown in

figure 1, where samples of the waveform of interest are stored in memory.

The programmable clock and counter provide the memory with sequential addresses

which are updated at the clock frequency. The memory address may be thought of

as angular displacement, while the data corresponding to each address represents

the amplitude of the function at equally spaced sample points. Data is applied

to a DAC which generates a voltage step proportional to the digital code. Each

step is held for one clock period, at which point new digital data is applied to

the DAC. The resulting waveform is a staircase approximation of the "sampled

waveform", reconstructed from stored data (the term "sampled waveform" is used

throughout this text to identify the ideal waveform from which digital data was obtained). The sample-hold process may be described mathematically by a zero order polynomial thus; the reconstruction process is often referred to as a "zero-order-hold .

3. Frequency Response

The impulse response of a zero-order-hold is shown in figure 2. Its

corresponding Fourier transform, given by equation (1), describes the frequency

response of the reconstruction process [3,4],

6[ h (t)] =l^MlflL = Tsinc(TrfT), (1)

where f = the frequency of interest

T = 1/Fs = the period of the sampling frequency Fs.

1
CLOCK

MEMORY >///, DAC

/

/

/

/

COUNTER

Figure 1. Block diagram of a digital waveform generator.

AMPLITUDE

h(t) = 1 for -T/2< t < T/2

=0 elsewhere

-T/2 T/2

Figure 2. Impulse response of the zero-order-hold.

2
Equation (1) defines the amplitude envelope within which frequency components

generated by a zero-order-hold are constrained. The reconstruction contains

frequency components not present in the original signal (sampled waveform).

These additional components are generated when the sampling frequency and its

harmonics are mixed with the signal, forming sum and difference pairs around

harmonics of the sampling frequency [5]. If the sampling frequency and the

signal are correlated, (an integral number of samples per period of the signal)

the frequency components become regular sampling harmonics, F

- ^ and,

F ik. i-e.,

F~ = iFs - kF and F +

. = iFs + kF (2)

ik ik v '

for i = 0 to 00 (sampling frequency harmonics)

k = 1 to h (signal harmonics)

where Fs is the sampling frequency, and F is the fundamental component of the

signal. Rewriting equation 1 to include the peak value of each frequency

component of the sampled waveform, V|<, the peak value of each reconstructed

component, V-j|<, is given by

sin(TrF.

k T)

ik

While equations (l)-(3) hold for any complex signal, the analysis given here

will be limited to the synthesis of sinusoidal waveforms where k = 1.

To demonstrate the relationship of the sine function to the harmonic

components in a sampled system, consider the example shown in figure 3. In this

example the first sampling component occurs at the 19th harmonic, and has a peak

amplitude of approximately 5.2% of the fundamental. Other pairs of sampling

components occur about harmonics of the sampling frequency as shown. If all of

the sampling harmonics are eliminated with a perfect low pass filter, the

remainder is a pure sinewave with a peak amplitude of approximately 99.6% of the

original sampled sinewave.

As the number of samples per period is reduced the first sampling harmonic

approaches the fundamental and actually appears below the fundamental if there

are less than two samples per period. This condition, where the sampling

component is folded into the signal bandwidth, is known as aliasing [5], and the

signal can no longer be recovered with a low pass filter. This concept is

described by the sampling theorem which states that any band-limited signal is

uniquely represented by its samples if the sampling rate is at least twice the

signal bandwidth [2].

4. RMS Value

The rms value of a pure sinewave is related to the peak value, Vp, by

V

2

2tt 1/2 V

V = [J. J sin 2xdx] = & - 0.707 V . (4) rms l 2t: -q

J /2 p

v '

3
The rms value of a reconstructed sinewave may be expressed in terms of the sum of the squares of the individual voltage steps, V-j

.

1=1

where i is the step number, and m is the number of steps. Or, by definition

[6], the rms value may be expressed as the sum of the squares of the peak value

of each harmonic.

VTMs U Jl (6)

where h is the harmonic number.

The general solution for equation (4) may also be obtained from the

trapezoidal rule of integration (which is identical to zero-order-hold sampling

for functions having a period of 2tt). The trapezoidal rule, which is normally

an approximation of the integral of a function, provides an exact solution for

the sin function [7]. Therefore, the rms value of the reconstruction

(including sampling harmonics) is equal to the rms value of the sampled

sinewave, Vp//2. The only constraint on this relationship is that the

reconstruction consist of at least 3 steps equally spaced within one period (see

appendix)

.

5. Total Harmonic Distortion

The total harmonic distortion (THD) of the reconstructed sinewave is, by

definition, [6]

oo l/2 00 l/2 TM= (1 I V

2

j "=f( I V

2 -V2

j, (7)

V

2 h=2

n

1 h=l

n 1

where h and Vn are the harmonic numbers and the respective peak values of

individual harmonics in the reconstruction. Vi is the peak value of the

fundamental component of the reconstruction.

From equations (4) and (6), the expression for THD may be simplified to

THD = A ( 2V

2

c - V

2

J

1 /

2 = A (V

2 - V

2

)

lJ

2 (8)

V

v rms 1

' vr p 1

1

where Vp is the peak value of the original sampled waveform.

Table 1 on the next page shows the relationship between two sinewave

reconstructions, one composed of 20 steps and another composed of 200 steps.

4
Table 1 Compari son of rms error and Ul IU THD MIL/

Unf i 1 tered Fi Itered

Reconstruction Reconstruction

No. of steps rms rms

Per Period Error THD Error THD

20 0 8.9% -0.4% 0

200 0 0.9% -0.004% 0

The rms error of the reconstruction is zero from equations (4), (5), and

(6), while the THD is inversely proportional to the number of steps per period.

If the distortion is removed with a perfect low pass filter, the remaining

sinewave will have an rms error which is inversely proportional to the square of

the number of steps per period.

The properties of synthesized sinusoidal waveforms described above

represent theoretical limitations based upon ideal sampling. In practice, the

reconstruction accuracy is further limited by a number of hardware parameters,

some of which are described below.

6. Quantization

Although the sampled data which describes the waveform can be calculated

with very high precision, they are ultimately rounded to a resolution of one

least significant bit (LSB) of the generating DAC. The normalized magnitude of

this quantization level is given by q = l/2n

, where n is the number of bits in

the DAC. The result of quantization is an error at each step in the

reconstruction which varies randomly between ±q/2 and adds noise to the

synthesized waveform. The noise is wideband and falls within the signal

bandwidth [1]. The noise power P n is given by

' 1 r q/2

2 P

n m i /-q/2 x dx = q/12 >

< 9 >

where x is the quantization error which varies from -q/2 to + q/2. The actual

noise power, Pn , depends on the bandwidth of the low pass filter used to

eliminate sampling components. Hence,

p iL_ . filter bandwidth

n 12 1/2 sampling frequency' '

5
SPECTRUM OF 20 STEP SAMPLED SINEWAVE

AMPLITUDE

F

SIN TTfT

20T 20T 20T

AMPLITUDES:

SIN(tt/20) = 0.996

Fo-F =

SIN( 1 9tt7 20)

1 9 n /20

0.052

Figure 3. Example of a reconstructed sinewave composed of exactly 20 equally

spaced steps per period, where F is the fundamental component,

F s = 1/T = 20F is the sampling frequency, and V

p is the peak

value of the original sampled sinewave.

n1 1 1

1

011

1

1000

a. b

.

Figure 4, a.b.

Glitch caused by switching skews at the major transition

Typical glitches encountered in sinewave generation.
The signal power, P s , is the square of the rms value which may be expressed in

terms of n [8]. Thus,

2 1

2

Ps

. £ , jq> , iyi . (no

where Vp_p is the peak-to-peak value, which may be described in terms of the

full scale range of the DAC (2 n q).

From (10) and (11), the power signal to noise ratio (SNR) for a waveform

generated by an n bit DAC (followed by a typical low pass filter with a bandwidth of 3/8 of the sampling frequency) is

2 2 SNR - ?S - ( 2 V / 3cl -7 ( 2n+1 ) V ~8~~ 1 W ~ 1

' (12)

n

'

The SNR, expressed in dB, is 10 times the logarithm of this number, which may be

simplified to

SNR = 6n + 3. (13)

Quantization errors are compounded if the DAC output is not a linear

representation of its input. Nonlinearity is caused by individual bit errors

and by superposition (summation) errors. Worst case SNR may be predicted from

equation (13) by expressing the DAC in terms of equivalent bits. For example, a 12 bit DAC with 2 LSB nonlinearity is equivalent to a perfect 10 bit DAC (if the

nonlinearity errors are randomly distributed), and will thus provide a SNR of 63

dB instead of the ideal 12 bit value of 75 dB.

7. Glitches

The term "glitch" refers to an unwanted pulse which is quite often

difficult to capture and measure. In digital-to-analog converters, the largest

glitches are caused by skews in switching times. Figure 4 shows how a full-scale pulse may occur if the most significant switch is slightly faster

than the other switches.

Other glitches are caused by capacitive coupling between the digital and

analog portions of each switch which provides paths for transferring charge from

the logic signal to the analog output. Glitch energy is often expressed in

coulombs (ampere-seconds) or volt-seconds.

Glitches introduce wideband harmonics

reconstructed waveform. Glitch distortion

output after the glitch has occurred (with

that value through the next transition.

which reduce the fidelity of the

may be reduced by sampling the DAC

a sample-hold amplifier) and holding

7
8. Timing Jitter

Cycle-to-cycle instability of the sampling frequency will cause fluctuations in the step width of the reconstructed waveform which, like

quantization, results in wideband noise. It has been shown [8] that the SNR,

expressed in dB, of a synthesized sinewave followed by a low pass filter of

bandwidth F is given by

(2 sin(u>/2) J 2 (AT/T) 2 FT ' (14)

where w = 2-rrf (fundamental frequency)

T = sampling period

AT = peak jitter.

For audio frequency applications, transi stor-transitor logic (TTL) jitter

is sufficiently small to produce a SNR of 100 dB. At higher frequencies, or when using a slower family of logic circuits, jitter noise may become

significant.

9. Amplifier Limitations

Conventional DACs provide a current output which is generally converted to

a proportional output voltage with an operational amplifier. If the

reconstructed waveform is unfiltered, the amplifier step response may seriously

degrade fidelity. Slew-limiting, overshoot, and ringing may alter the rms value

and introduce significant distortion. If however, the reconstructed waveform is

filtered and the current to voltage conversion is performed by an active low

pass filter, many of the amplifier limitations disappear. For example,

sufficient band limiting by the filter will slow the amplifier response to the

point that its slew limit is never exceeded. Noise introduced by the amplifier

is generally more than 100 dB below the signal and may be negligible compared to

quantization noise.

10. Other Techniques

A number of other techniques for synthesizing waveforms have been described

in the literature. These vary from simple circuits which switch weighted

voltage sources in a zero-order-hold reconstruction, to a rather complicated

approach which synthesizes sinusoids from Walsh functions [9]. The latter uses

a series of weighted Walsh functions to construct a sinewave in much the same way that a square wave can be constructed from a Fourier series. The frequency

response of this approach differs from the sine look-up table method in that the

sampling harmonics are defined by the sine function, while the fundamental

component is defined by the sine function.

The techniques described so far have employed a zero-order-hold

reconstruction filter which does not interpolate between samples. The desired

signal may be recovered by removing the sampling harmonics with a low pass

filter (as long as the sampling theorem is satisfied).

8
In theory, a better initial approximation of continuous waveforms can be

made by a first-order-hold which provides linear interpolation between samples.

A special case of the first-order-hold, with a delay of one sample period is

known as the linear-point-connector [4] (shown in figure 5). Its impulse

response, h(t), shown in figure 5b, is a triangular function with the following

fourier transform;

G [h(t)] = [Aial^IL ]

2

. (is)

2The frequency response of the linear-point-connector is thus described by a sine envelope which greatly attenuates the sampling harmonics. Table 2 shows

the magnitudes of the fundamental and first pair of sampling harmonics of a sinewave reconstructed from a zero-order-hold (ZOH) and a linear-point-connector

(LPC).

Table 2

Magnitude of the frequency components generated by 20 and 5 step ZOH and

LPC reconstructions, expressed as a percentage of the sampled sinewave.

Harmonics 20 Steps 5 Steps

ZOHLPC ZOH LPC

Fundamental 99.6 99.2 93.5 87.5

1st Sampling Harmonic 5.2 0.3 23.4 5.5

2nd Sampling Harmonic 4.7 0.2 15.6 2.4

The implication is that the LPC can produce a sinewave of similar fidelity

with one quarter the number of steps required by the ZOH, thus quadrupling the

output frequency capability of the generator. In practice, the LPC is much more

difficult to implement, and any increase in frequency range must be traded for

increased circuit complexity. NBS is currently investigating several techniques

for implementing the LPC, as well as a novel approach for describing arbitrary

waveforms using an orthogonal set of Triangular Basis functions (not discussed

in this paper).

11. NBS Sinewave Generator

To investigate the merits of digital synthesis techniques, a microcomputer

controlled prototype ac voltage generator was developed at NBS [10]. The

practical limitations in predicting the rms value (one of the calculable

parameters) of the generated sinewave were evaluated using a thermal voltage

converter, and errors of less than 50 ppm were observed between 10 Hz and

1 KHz. At higher sinewave frequencies, dynamic errors in the generator become

significant, causing rms uncertainties of 100-200 ppm through the audio

frequency range. However, because of the inherent amplitude stability of

digital generators, it is possible to characterize the frequency response and

apply software corrections based upon a least squares fit. The resulting

9
a.

b.

Figure 5. a. Linear-point-connector reconstruction.

b. Impulse response of the linear-point-connector.

SINE

TABLE

DAC &

FILTER

s s ; ; / / /CONTROL

CONTROLLER

RMS-TO-DIGITAL

CONVERTER

AMPLITUDE

SCALING

Block diagram of the AC Reference

THERMAL CONVERTER ( RMS "TO ~D I 6 I T AL

AMPLITUDE SCALINGStandard including an internal

converter) and high accuracy

Figure 6. Programmable NBS ac source.

10
enerator produces a 7 volt rms sinewave with 50 ppm rms uncertainty over a requency range of 1 Hz to 50 kHz. High resolution dividers scale the waveform

between 0-7 volts rms with little degradation in accuracy, providing a programmable ac source as shown in figure 6. Since the generator retains its

frequency response characteristic for long periods, a daily gain calibration is

sufficient to maintain the 50 ppm uncertainty. The source will ultimately

provide fast, automated calibration support for a variety of rms responding

voltmeters.

While the above described source has a number of advantages over conventional generators, its frequency range is somewhat limited. The frequency

of digitally generated sinewaves is dependent upon the DAC speed and the number

of steps per period used in the reconstruction. In practice, a 16 bit DAC

cannot be operated at sampling frequencies much higher than 500 kHz. To

maintain a THD of less than 1.4% (less than, 100 ppm of the signal power is

contained in the harmonics)requires 128 (2 ) steps per period, allowing an upper

sinewave frequency of about 4 kHz. For higher frequencies, 12 bit converters

can be operated at 10 MHz to generate sinewave frequencies of 78 kHz (128 steps)

to 2.5 MHz (4 steps). Below 4 steps per period, the digital generator has

little advantage over a conventional function generator.

12. Conclusions

Digital waveform generators provide an economical means for producing

stable, high fidelity signals over a limited frequency range. Some theoretical

properties and practical limitations have been described, with emphasis on sinewave reconstruction.

Digital synthesis, however, is particularly suited to the construction of

complex waveforms which are extremely difficult to produce by conventional

analog means. Instrumentation is commercially available which allows the user

to program arbitrary waveforms with 8-12 bit resolution at sampling frequencies

up to 5 MHz.

References

1. W. R. Bennett, "Spectra of Quantized Signals," Bell Systems Technical

Journal, 27:446-72, July 1948.

2. B. M. Oliver, J. R. Pierce, and C. E. Shannon, "The Philosophy of PCM,

Proceedings of IRE, Nov. 1948.

3. Lawrence R. Rabiner and Bernard Gold, "Theory and Application of Digital

Signal Processing," Prentice-Hall, Inc., Englewood Cliffs, NJ, 1975.

4. Steven A. Tretter, "Introduction to Discrete-Time Signal Processing," John

Wiley & Sons, NY, 1976

11
References (cont.)

5. Alan V. Oppenheim and Alan S. Will sky, "Signals and Systems," Prentice

Hall, Inc., Englewood Cliffs, NY, 1983.

6. IEEE Standard Dictionary of Electrical and Electronics Terms, IEEE,

New York, NY, 1977.

7. P. J. Davis and P. Rabinowitz, "Numerical Integration,"

Waltham, MA:Blaisdel 1 , 1967, Ch. 2, pp. 53-57.

8. R. P. Taiambiras, "Digital -to-Analog Converters: Some Problems in

Producing High-Fidelity Signals," Computer Design, January 1976.

9. R. Kitai, "Synthesis of Periodic Sinusoids from Walsh Waves," IEEE

Trans, on Instr. and Meas., Vol. IM-24, No. 4, Dec. 1975.

10. N. M. Oldham, "A 50-ppm AC Reference Standard Which Spans 1 Hz to 50 kHz,"

IEEE Trans, on Instr. and Meas., Vol. IM-32, No. 1, March 1983.

12
APPENDIX

The rms value of a pure sinewave is given by

V rms = ( g /f sin2 x dxj = (Jf 1/2 (l-cos2x)dxj = ^ . (16)

The trapezoidal rule of integration provides a means for evaluating the integral

of a function by dividing it into a finite number of trapezoids of equal width.

The sum of the areas of each trapezoid represents an approximation of the

integral which may be expressed as

jb

f( x )dx « h(^|l + f(a+h) + ...+ ^ ) (17)

where h = -^-

a

, n = number of integration intervals.

For functions of period 2ir, f(a) = f(b) so equation (17) may be rewritten

b

/ f(x)dx - h(f(a) + f(a+h) + ...+ f(a+(n-l)h)J . (18)

a

The second term of (18) represents a summation of rectangular areas identical to

a perfect zero-order-hold reconstruction. In addition, equation (18) provides

an exact solution for the class of functions sinx, cosx, sin2x,

cos2x. . . .sin(n-l)x, cos(n-l)x, sinx [7].

From (16), the rms value of a pure sinewave requires an evaluation of a cos2x

term and the trapezoidal rule gives an exact solution for (n-l)>_ 2. Therefore

the rms value of the reconstructed sinewave equals the rms value of a pure

sinewave (V

p

//2") where the reconstruction consists of at least 3 equally

spaced steps.

13

PHASE ANGLE STANDARDS AND CALIBRATION METHODS

Raymond S. Turgel

Electronic Instrumentation and Metrology

Electrosystems Division

National Bureau of Standards

Gaithersburg, MD 20899

1. Introduction

Phase angle is one of the quantities that describes the properties of ac circuits. Its measurement is important in a wide variety of applications which

include analysis of feed-back amplifiers, servo-systems, communications

circuits, oscillator and filter circuits, transformer characteristics, and other

applications ranging from navigation to power systems and even to plasma physics

experiments. Accuracy requirements differ widely for many of these

applications, but from the point of view of the standards laboratory,

calibration accuracy must be sufficient to handle precision commercial phaseangle meters with typical measurement uncertainties of 0.05 degrees and

resolution of 0.01 degrees [1,2].

2. Definition

Phase angle is a measure of the time delay between two periodic signals

expressed as a fraction of the period in units of angle. In theory, a phase

angle is defined only if both signals have identical waveform and frequency.

In practice, the waveforms are never completely identical, but usually only the

phase angle between the fundamental component of each waveform is of interest.

The extent to which harmonic distortion and noise influence the measurement

depends somewhat on the operating principle and construction of the phase

meter. For instance, zero-crossing type phase meters can be made to be

insensitive to even harmonics and to in-phase odd harmonics under certain

circumstances [3,4].

3. Measurement Principles

The measurement of phase angle is essentially a time ratio measurement,

i.e., determining the delay between corresponding points on two waveforms

relative to the signal period. Various methods to accomplish this are described

in the literature. For example, a variable delay line can be used in

conjunction with a phase detector [5]. Another method first translates all

test signal frequencies to a chosen fixed frequency, with a heterodyne mixer

which preserves the phase relationships, and then adjusts for a null in a phase

detector using a calibrated phase shifter in one signal path [6]. Probably the

most widely used method in precision laboratory phase meters relies on zero-crossing detectors in combination with a counter-timer or a pulse-width

modulation scheme. The counter-timer method is relatively simple (see figure

1), but resolution is limited by the clock frequency of the timer. For

instance, to obtain a resolution of 0.01 degrees with a 20 MHz clock, the

frequency of the signals to be measured cannot exceed 550 Hz. At the cost of

considerable complication, this limitation can be overcome by using fractional

pulse-counting and pulse-averaging techniques [7,8,9].

15
Tsst OXsro Cross lag

Dstsetor

aock

Csnsrstor

Ssro Cross lag

Detsetor

0«Cs OoimCsr

Figure 1. Counter-Timer Method.

The time elapsed between zero crossings of the "test"

and "reference" signals is determined by counting

clock pulses gated by the zero-crossing detectors.

16
In the pulse-width modulation scheme, the width of the pulse is made equal

to the phase delay between the signals being measured with the period of the

pulse equal to the period of the signal. In this case, high-frequency

limitations occur only when the pulse rise time is no longer small with respect

to the pulse width. Normally, many pulses are averaged to reduce the effects of

jitter and noise.

Other phase-measuring instruments are often referred to as phase-angle

voltmeters, vector voltmeters, or gain-phase meters. These instruments measure

the magnitude of a signal as well as its phase angle with respect to a reference

signal or, in the case of gain-phase meters, the ratio of the two input signals

and the phase difference between them. The phase-measuring principle may either

use zero-crossing phase sensitive detectors or phase shifting circuitry. The

phase-measuring capabilities of these instruments are generally designed to be

less accurate by an order of magnitude or more than those of high precision

phase meters.

In recent years a completely different approach has also been used to

measure phase. It is based on sampling the input signals periodically,

digitizing the values obtained and storing them in memory. The phase angle is

then determined from the data using a Fourier transform algorithm [10]. If the

sampling frequency is an exact multiple of the fundamental of the signal

frequency, a discrete Fourier transform can be used to calculate the phase

angle. In this case the solutions are exact, and the algorithm does not

contribute to the error. In the more general case, using asynchronous sampling,

a fast Fourier transform is required and exact solutions are not always

possible. The computation then contributes to the overall error of the

determination. Commercial instruments based on this method have not yet been

developed to the full accuracy possible with these techniques.

4. Sources of Error

4.1 Timing Errors

In practical zero-crossing type phase meters, the trigger levels of the

zero-crossing detectors are never quite identical, which can lead to errors. In figure 2 (a), two input waveforms are shown displaced by a phase angle $ and

with an angular frequency w. The time delay between the "true" zero crossings

is If one of the detector levels is offset relative to the other by a voltage E,j c then a timing error, At, is introduced (figure 2 (a,b)) which is

equivalent to an apparent phase shift A<f> = wAt, and this phase shift leads to an error in the measurement. It will be noted from figure 2 (a) that the timing

errors At have opposite signs at the zero crossings with rising and falling

slopes. It is possible, therefore, by averaging measurements made at both zero crossings to compensate for this type of error, as indicated in figure 2 (c).

A second source of such timing errors is distortion in the input

waveforms. Harmonic components cause shifts in the zero-crossing points which,

unless they are identical in both waveforms, will result in apparent phase

shifts. Even harmonics cause symmetrical timing errors similar to those

resulting from voltage offsets and can be compensated by averaging measurements

at rising and falling zero crossings. However, components of odd order

harmonics, which are not in phase with the fundamental, produce timing errors which cannot easily be eliminated and, therefore, limit the accuracy of the

measurement.

17
Figure 2. Offset Phase Errors.

Unequal voltage offsets in the zero-crossing detectors

results in timing errors with opposite sign at the

positive-and negative-going zero crossing.

18
Other timing errors arise from unequal propagation delays through the input

amplifiers. To reduce the time taken to trigger the zero-crossing detectors,

input amplifiers are generally over-driven. However, in practice, especially

when the difference of the amplitudes of the input signals is large, it is not

possible to have identical delays in both channels. Unequal delays produce

spurious phase shifts, and the effect increases with signal frequency. For

highest accuracy, therefore, both input signals should have almost equal

ampl itudes.

4.2 Stray Coupling

Combining part of the signal from one channel with that of the other causes

an apparent phase shift, the magnitude of which is usually phase angle as well

as frequency dependent. Careful design in the isolation of the signal paths and

power supplies in the input stages of the phase meter, as well as in the

external circuit, is required to minimize this effect.

4.3 Readout Offset and Linearity

In phase meters using pulse-width modulation, a dc level proportional to

phase angle is produced that is often displayed on a digital panel meter.

Offsets in the zero- and full-scale values of the panel meter, as well as non-linearities can contribute significantly to the phase meter error. Usually,

the zero- and full-scale point are adjustable, but non-linearity errors cannot

easily be eliminated.

5. Phase-Angle Calibration Standards

From a theoretical point of view there is really no need for a phase

standard, because a phase angle is essentially a ratio and, therefore, not tied

to fundamental units. A bootstrap procedure is possible by which a phase-angle

calibration could be accomplished [11,12]. In practice, however, the cumulative

errors inherent in such a procedure make attainment of high accuracy

difficult. There is, unfortunately, no one simple way to verify accuracy, and a variety of approaches have to be relied upon to gain confidence in the

measurement. A phase calibration standard, therefore, is a very useful tool

from a practical point of view.

Traditional designs of phase calibration standards are based on two output

signals in quadrature, established by means of auxiliary adjustments of

inductive or capacitive circuit elements, or active equivalents. Calibrated

voltage dividers are then connected between these outputs and the signals are mixed to provide the desired phase shift. This approach has been successful,

but there are drawbacks. The frequency sensitive adjustments that are required

for each calibration point can drift with time and temperature, making time

consuming readjustments necessary. Accuracy specifications typically vary from

0.015 degrees to 0.060 degrees, depending on frequency range [13].

6. NBS Phase-Angle Calibration Standard

The design objectives for a new phase-angle calibration standard at NBS were aimed at an instrument that was intrinsically very stable, but at the same

time, one which would respond and settle quickly to a new set of operating

19
Figure 3. Waveform synthesis with uniform sampling.

Two sine waves with a known relative phase displacement

are synthesized by calculating the appropriate values

of the sine function at regular time intervals and

converting the calculated values to voltages.

20
>» CO <D O

Figure 4. NBS Phase Standard Block Diagram.

Separate microprocessors are used for control and waveform

generati on

.

21
conditions [14,15]. Ease of operation for the user was another important

consideration. These goals were met with a method that synthesized two signals

with a known phase angle between them, using digital techniques. The method has

the advantage that the desired phase angle is primarily determined by

calculation and not by frequency sensitive circuit elements.

The NBS Phase Standard is a calibrator which produces two sinusoidal output

signals with a phase angle that can be set to an accurately known value. The

signals, which can range from 2 to 5000 hertz and 0.1 to 100 volts, can be

applied directly to the phas^ meter under test during calibration. The phase

resolution is one part in 2 , or approximately 0.0013 degrees. The resulting

phase angles have an uncertainty of ±0.005 degrees, with somewhat larger

uncertainties when the amplitudes of the output signals are unequal. The output

phase angle, frequency, and amplitudes are microprocessor controlled, and are adjustable from the front panel keyboard, or via an IEEE-488 bus interface

(which is being developed).

6.1 Method of Signal Generation

The sinusoidal output signals are generated by simultaneously calculating

points at equal intervals along both waveforms (tl, t2, t3, etc., see figure 3)

and by converting these sets of numerical data points to analog output voltages,

using dual channel digital-to-analog converters with appropriate filtering.

Referring to the block diagram of figure 4, operating parameters such as phase angle, signal frequency, and amplitudes are entered from the keyboard,

converted to binary information by an 8-bit microprocessor, and transmitted to a 20-bit microprocessor which generates the numerical data for the desired

waveforms. The phase angle (phase difference) between the two waveforms is

determined by the computed relative signal magnitudes of the two waveforms at

each of the sample points (figure 3).

The phase angle and frequency information from the keyboard is latched into

registers of the arithmetic-logic unit (ALU) which also calculates the sample

locations along the time axis (figure 3) in terms of the corresponding angles.

These angles are then transformed into their sine function values using a combination look-up table and interpolation method. At the same time, the

values calculated for the previous sample point are applied to a pair of 16-bit

digital-to-analog converters.

The resulting 7-volt rms analog signals are filtered to remove harmonics

introduced by the sampling process. A programmable gain stage and a high-voltage amplifier provide outputs from 0 to 100 volts, independently

variable for each channel.

To compensate for possible differential phase shifts in the two channels,

an auto-zero circuit is provided that measures and corrects relative phase errors under software control. The method is based on a quadrature detector and

a sequence of measurements that compensates for internal phase and dc offsets.

The output of the quadrature detector is digitized and fed back to the waveform

generating hardware.

22
180° BRIDGE CIRCUIT

PHASE_J

ADJUST

V

AMPLITUDE

ADJUST

90 QUADRATURE DETECTOR

PHASE J

ADJUST

±90°

REVERSING

SWITCH

Figure 5. Test Methods

Two independent null methods are used to check fixed points on the phase angle scale (180° and 90°) of the Phase Standard.

23
6.2 Frequency Range Extension

The upper frequency limit of the Phase Standard is currently being extended

to 50 kHz. The same principle of digital -waveform generation is used beyond

5 kHz, except that calculations are not carried out in real time. Calculated

values for each waveform are stored in high-speed memory when setting up each

range, and are then strobed to the converters to produce the higher-frequency

output signal at a rate ten times faster than the data transfer during "low"

frequency operation. For practical purposes, however, the change in the

operating mode is not noticeable to the user. The price paid for the increase

in speed is a reduction in the angular resolution as well as in accuracy.

Angular resolution is a function of the number of possible voltage levels of the

converter, as well as the number of sample points for each waveform. With

present technology, the best compromise appeared to be the retention of the same number of sample points per waveform at the upper-frequency limit combined with

an increase of the digital-to-analog conversion speed by a factor of ten. To

gain speed, a reduction of the word size from 16 to 12 bits was necessary. This

resulted in a loss of phase resolution by a factor of approximately 5 as determined by computer simulation. In practice, the uncertainty of the phase

angle is related not only to the resolution but also to other factors, including

the techniques available to make precision phase measurements at these higher

audio frequencies.

6.3 Performance Evaluation

Analysis shows that for a 16-bit word, the quantization signal-to-noise

ratio is close to -100 dB [16]. This noise amplitude at the zero crossing is

roughly equivalent to an uncertainty of the phase of the zero crossing of just

under one millidegree. In practice, actual converter characteristics will

degrade this value. Experimental verification shows that the linearity of the

NBS Phase Standard varies from better than 0.002 degrees at low frequencies to

0.005 degrees at 5 kHz.

Fixed points on the phase scale can be calibrated by two independent

methods as shown in figure 5. In the 180-degree bridge circuit, the two outputs

from the phase standard are set to a nominal phase angle of 180 degrees and

applied to the ends of an inductive divider. The center tap of the divider is

connected to a tuned null detector (M). The bridge circuit is balanced by

adjusting the amplitude ratio with the divider tap, and the phase deviation by

offsetting the Phase Standard from the nominal value.

A similar calibration test can be carried out at a nominal phase angle of

90 degrees by using an (external) quadrature detector [17]. Since at quadrature, the null reading is independent of signal amplitudes, only a phase-balancing adjustment is necessary. By interchanging inputs to the

quadrature detector, voltage and phase offsets in the quadrature circuit can be

compensated and so provide a high-accuracy quadrature measurement with an uncertainty of the order of 1 or 2 mi 1 1 idegrees.

7. Other Digital Phase Standards

Phase standards, using digital synthesis of sinusoidal waveform, but

different principles to obtain phase displacement between the output signals,

have been developed by the National Physical Laboratory in Britain and by the

Japan Electric Meters Inspection Corporation (figures 6,7). The British design

24
CLOCK

PRESCALER

ROM ADDRESS

COUNTER

SINE WAVE

ROM

COARSE PHASE

ADJUSTMENT

SINE WAVE

ROM

VERNIER PHASE

ADJUSTMENT

Reference Output Variable Output

NPL Digital Phase Standard

Figure 6. NPL Phase Calibration Standard.

Phase shifts are obtained by time delays equal to whole numbers

and fractions of clock periods.

25
I

VARIABLE DELAY

0-359 CLOCK PERIODS

FIXED DELAY

1 CLOCK PERIOD

ROfl

SINE WAVE GEN.

ROM

SINE WAVE GEN.

D/A

Variable Output Reference Output

JEMIC Digital Phase Calibration Standard

Figure 7. JEMIC Phase Calibration Standard.

Three waveforms are generated two of which have

difference and can be displaced relative to the

Fine adjustment is obtained by analog mixing of

1° apart.

a fixed 1° phase

third by 1° steps

the two signals

26
roi O<Qz<

to

IxJ <I

CLtomz Q

a.

x < i/)

u

QQ

s> LJ QL QL

O Ct 27

COQ

(3

to

CO

to < ^Lo i , bJ UJ o o < z H <

-J a: ^ > ;x

UJoz

>-> C7 r ro E

-(->

O 1 O^=K' o S- </)

n3 +J 'cu £1 fO >

cn OJ

•r— "D r—

cy) 0)

<T3 E

OJ o +J

a>

-t-> 00 uc i/) o c °l

Ll_ o i- «3 Ct >

CO CD

«3 J_

O

S_ H- c o o u 00

•1— OJ

+-> S- U CD cn

O) -S-J s_ QJ

S- E o cu o 00 O

S- _c

0,1 <D a. -M£ E 0J

fO -)-> cu X U

CD CD

fO .c

C QJ Q. <

CO

OJ

CD
uses time delays equal to integer and fractional clock periods to provide a set

of phase angles with a resolution that is frequency dependent [18]. The

Japanese design uses three synthesized sine wave outputs two of which are switchable through 360 deqrees with a 1-degree resolution and arranged so that

there is a fixed one deqree difference between them. Angular fine adjustment

can then be obtained by connecting a voltage divider across the two variable

outputs that are one degree apart [19].

8. Calibration Strategies

Phase-angle measurements of electrical waveforms involve three parameters:

phase, frequency, and amplitude. To perform a complete calibration over this

three-dimensional "measurement space" would require a large number of test

points, an uneconomical procedure in most cases. Therefore, two different

approaches must be considered, depending on the purpose of the calibration.

When detailed corrections are required over a limited number of ranges, then

measurements at a representative set of phase angles are made at the amplitude

and frequency parameters specified. It is good practice to select phase angles

to be measured in a random order, from a set of test points that are fairly

evenly distributed over the range from 0 to 360 degrees. It is also advisable

to take several readings at each phase angle to establish the repeatability of

the measurement process and then to fit the data points to a model, linear or non-linear. This procedure not only provides calibration values between actual

test points, but also improves the basis for the uncertainty statement.

Quite often, the purpose of the calibration is to determine whether the

phase meter is within its specifications on various ranges. As pointed out,

checking each range fully becomes uneconomical, and a different strategy is

necessary. This approach involves a trade-off of detailed knowledge of the

corrections for every possible range for a composite picture of measurement

uncertainties. Such a composite picture is obtained by varying one parameter,

e.g., amplitude, and measuring a limited number of randomly selected phase

angles at each value of the parameter. The phase error can then be plotted

against the value of the parameter (amplitude). Similarly, the relationship of

the phase error bounds vs. frequency can be determined. A typical plot of this

kind is shown in figure 8.

References

1. Specification, Model 6500, Krohn-Hite Corporation, Avon, Mass.

2. Specification, Series 305, Dranetz Engineering Laboratories,

South Plainfield, NJ.

3. A. M. Rudkin, "A New Approach to Phase Measurement" Marconi

Instrumentation, Vol. 14, No. 5, pp. 105-108, 1977.

4. J. E. McKinney, "Digitized Low-Frequency Phasemeter Assembled from

Logic Modules," NBS Journal of Research, Vol. 71C No. 3, pp. 227-237,

1967.

5. J. Azencot, R. Prost, "Phasemetre Large Bande A Detection Synchrone

Utilisant Une Ligne a Retard Comme Etalon De Temps," (Broadband Phase

Meter with Synchronous Detection Utilizing a Delay Line as Time Standard)

L'onde Electrique, Vol. 55, No. 6, pp. 341-346, 1975.

28
References (cont.)

6. G. D. Haynie, P. E. Rosenfeld, "An Automated 20-20, 000-cps Transmission

Measuring Set for Laboratory Use," Bell System Technical Journal,

Vol. 42, "No. 6, pp. 2501-2531, November 1963.

7. R. Schmidhauser, "Measuring Nanosecond Time Intervals by Averaging,"

Hewlett-Packard Journal, Vol. 21, No. 8, pp. 11-13, April 1970.

8. G. A. Reeser, "An Electronic. Counter for the 1970' s," Hewlett-Packard

Journal, Vol. 20, No. 9, pp. 9-12, May 1969.

9. D. C. Chu, M. S. Allen, A. S. Foster, "Universal Counter Resolves

Picoseconds in Time Interval Measurement," Hewlett-Packard Journal,

Vol. 29, No. 12, pp. 2-10, August 1978.

10. V. K. Jain, W. L. Collins, Jr., D. C. Davis, "High Accuracy Analog

Measurements via Interpolated FFT," IEEE Trans. Instrum. Meas.,

Vol. IM-28, No. 2, pp. 113-121, June 1979.

11. J. Kritz, "Precision Phasemeter for Audio Frequencies," Electronics,

Vol. 23, No. 10 , pp. 102-106, October 1950.

12. 0. E. Maxwell, "A 5 to 50 MHz Direct Reading Phase Meter with HundredthDegree Precision," IEEE Trans. Instrum. Meas., Vol. IM-15, No. 4,

pp. 304-310, December 1966.

13. Specifications, Model 311, Dytronics Company, Columbus, OH.

14. R. S. Turgel, N. M. Oldham, "High-Precision Audio-Frequency Phase

Calibration Standard," IEEE Trans. Instrum. Meas., Vol. IM-27,

No. 4, pp. 460-464, December 1978.

15. R. S. Turgel, N. M. Oldham, G. N. Stenbakken, T. H. Kibalo,

"NBS Phase Angle Calibration Standard," NBS Technical Note 1144,

July 1981.

16. D. Flach, "Characterization of Waveform Recorders," part of a NBS Special

Publication to be published at a later date.

17. L. A. Marzetta, "A High Performance Phase-Sensitive Detector,"

IEEE Trans. Instrum. Meas., Vol. IM-20, No. 4, pp. 296-301.

18. R. A. White, R. W. Yell, "Precise Differential Phase Generator,"

IEEE Trans. Instrum. Meas., Vol. IM-29, No. 4, pp. 373-375,

December 1980.

19. H. Kitagawa, M. Inoue, "A Phase Angle Standard," JEMIC Technical Report,

Vol. 8, No. 3, pp. 108-116, (In Japanese with English abstract).

29

CHARACTERIZATION OF WAVEFORM RECORDERS

Donald R. Flach

Electronic Instrumentation and Metrology

Electrosystems Division

National Bureau of Standards

Gaithersburg, MD 20899

1. Introduction

Although transient waveform recorders have been in use for more than 15

years, no commonly accepted test procedures were in use for these instruments,

particularly for the evaluation of errors associated with dynamic input

signals. Within the past few years, however, manufacturers and others have

begun to use test methods which involve the application of steady state,

repetitive waveforms to evaluate the dynamic performance characteristics of

these instruments. Parameters measured with these procedures include quantizing

errors, differential linearity errors, integral linearity errors, missing codes,

and aperture uncertainty. An advantage of the above method is that a sinusoidal

waveform is employed for many of the tests, and these are easily generated and

well characterized for frequencies up to 1 MHz. Some disadvantages include the

necessity for generating low distortion sine waves at frequencies above 1 MHz,

and the difficulty of generating linear ramp-like waveforms with the required

linearity at repetition frequencies greater than a few kilohertz.

The tests described herein are essentially those in which the final output

of the test is the result of digital signal processing on the waveform

recorder's digital output, as shown in figure 1. Other types of tests, some of

which don't require digital signal processing, are described in [1-4].

Different interpretations of the results of some of the tests described in this

paper are also given in [4]. Figure 2 shows a test system similar to figure 1,

except that the waveform recorder is partitioned into a series of functional

modules. The tests described in this paper can also be applied to

analog-to-digital (A/D) converters, if the functional modules shown in figure 2 can be provided. By the addition of a ranging amplifier, a sample-hold (S/H)

amplifier, digital memory, and control logic, the A/D converter is configured to

emulate a waveform recorder, one of whose properties is that the digital output

is available only as a complete record, and random access to the individual

codewords is usually not possible. A summary of the errors measured with the

continuous waveform tests is given on page 28 of [21].

One test procedure to be described gives a "global" description of the

waveform recorder errors already mentioned —a nonlinear, least squares, fitted

sine wave test. Other test procedures described include a histogram test which measures differential linearity errors and missing codes, a fast Fourier

transform test which measures integral linearity errors, and an aperture

uncertainty test.

However, waveform recorders are often used to measure non-repetitive,

transient input signals. Commonly accepted test procedures for characterizing

the performance of waveform recorders with transient input signals are almost

non-existent. One of the reasons for this situation is the difficulty of

31
Analog

input

Reference

waveform

source

Waveform

recorder

Digital

output

Computer

Figure 1. General measurement approach.

Signal L°*

° pass

source

f||t

> S/H

amplifier

A

-> a/d

J V

D

0 > 1 1 -> 1

1

amplifier Time

base

Memory |

I

Waveform recorder

Figure 2. Test measurement system for sine wave inputs.

32
generating well characterized transient waveforms [5]. Also, the interpretation

and application of the test results obtained from steady-state test procedures

to the measurment of a transient input signal proves to be difficult. One test

derived at NBS is described which measures the difference in the sample sets

obtained between a steady state sine wave and a transient single-cycle sine wave

[19]. The initial results of a transient step response test set under

development is also described.

2. Sine Wave Curve Fit

One test method developed in the past several years for the

characterization of waveform recorders is the "effective number of bits" test

[1,2,6-10]. In this test, a high quality, low distortion, cyclically repeatable

sine wave source is used at a frequency less than one-half of the sampling rate

of the waveform recorder (to satisfy the sampling theorem), and uncorrelated

with the sampling rate. For all of these tests, it is assumed that the sampling

frequency is uniform and there are no missed samples. The requirement that the

frequency of the applied sinusoidal input be uncorrelated with the recorder's

sampling rate is extremely important, since this criteria establishes a randomness that allows the test procedure to be modeled as a Gaussian-like

process. In the diagram of figure 2, the low pass filter (in this case functioning as an anti-aliasing filter) removes from the sine wave source

harmonic components with a frequency greater than one-half of the sampling

frequency of the recorder that could be aliased into the spectrum of the

waveform recorder's output. Harmonic components with an amplitude greater than

one-half of a least significant bit (LSB) of the test recorder can cause significant test errors and should be eliminated.

The sine wave test can be considered to be a "global" description of the

sampling errors in a waveform recorder. This means that the recorder's errors

are all averaged together to compute one numerical value, the effective number

of bits, that is representative of the overall performance accuracy of the

recorder

.

The effective number of bits is computed using the waveform recorder's

digital output record obtained with the sine wave source (and filter) applied to

the input. A sine wave is then generated in software that is a best fit to the

recorder's output record. Differences between the best fit software-generated

sine wave and the digital output record are assumed to be errors in the waveform

recorder. Normally, a digital record of 1024 points or less is transferred to

the computer for signal processing. Using a technique that makes use of a nonlinear least squares curve fit routine [1,2,10], a sine wave of the form

Y = A + B sin(CX + D) is fitted to the recorder's digital output data. A,B,C,

and D are constants determined by the software fit routine from the X and Y data

to obtain a best fit sine wave. The fit routine minimizes the expression

E = I [Y

k

- A - B sin(CX

k + D)]

2

, (1)

where M = number of data points, k is the index for the kth data point pair

( x k> Y k)> \ is the time the sample was captured, Y|< is the value of the

sample, and E is the error function.

33
The error, E, is minimized by varying the parameters A, B, C, and D which

correspond to offset, gain, frequency, and phase, respectively. The error minimum occurs when the four equations for the partial derivative of E with

respect to A, B, C, and D are equal to zero:

3F M

gjj. = -2 1 (Y

k

-A-B sin(CX

k + D)) = 0

k -~ X

or,

or,

M

I (Y

k - A - B sin(CX. + D) ) = 0

k=l (2)

M

|| = -2B I sin(CX

k + D) (Y

k

- A - B sin(CX

k + D)) = 0

k —

X

M

I sin(CX

k + D)(Yk

- A - B sin(CX

k + D)) = 0 (3)

k ~ X

3F M

-g£ = -2B I X

k cos(CX

k + D)(y

k

- A - B sin(CX

k + D)) =0

k ~ X or,

M

I X

k cos(CXk + D)(Yk

- A - Bsin(CX

k + D)) = 0 (4)

k ~ X

3F M

|| = -2B I cos(CX

k + D)(Yk

- A - B sin(CX

k + D)) - 0

or

M

I cos(CX

k + D)(Yk

- A - B sin(CX

k + D)) = 0. (5)

k ~ X

The solution of equations (2), (3), (4), and (5) for A, B, C, and D is

complicated and generally involves iterative processes [11,12]. A solution is

outlined in [1], and software to implement it is given in [2]. Gain, offset and

phase errors are not measured by the curvefit method because these parameters

are determined from the waveform recorder's output data.

The rms value of E, which contains the global description of the waveform

recorder's errors, is considered to be the "noise" of the system, and since the rms value of the signal S is B//Z, the rms signal-to-noise (S/N) ratio can

34
be computed. From this measurement of the S/N ratio, the effective number of

bits, ni, of the waveform recorder is calculated using the formula

n x = (S/N - 1.8)/6 , (6)

where the S/N ratio in (6) is expressed in decibels [1].

To be meaningful, this value of S/N ratio must be compared with the one for

an ideal n-bit recorder. The theoretical S/N ratio in the ideal case is based

on the quantization noise of the internal A/D converter, which results from the

uncertainty existing in the digitization of any unknown input to the A/D

converter. Figure 3 depicts the quantizing error of an ideal 3-bit A/D

converter. The quantity E shown in this figure is the quantizing error function

of the ideal A/D converter. The rms value of the sawtooth waveform represented

by E is thus the rms error of the ideal recorder. Figure 4 shows the

calculation of the rms quantizing error in the ideal case. In terms of LSB's,

where Q is one LSB = (full scale range (FSR))/2n, then E rms (ideal) = Q//T2". In calculating this ideal rms noise, the assumption is made that the

(uncorrel ated with the sampling frequency) sine wave input frequency causes a probability distribution of the sine wave values that is uniform throughout the

± 0.5 LSB interval. If this criterion is satisfied, then the S/N ratio for a full scale sine wave input is

Expressed in decibels,

S/N - (Q?

n "W = 2

n-l^

m (7)

Q//T2

20 log (S/N) = 6.02n + 1.8, (8)

for the ideal n bit recorder. As an alternative to the computation of effective

bits given in (6), another expression often used is [1]

n, = n - log

? (— ) . (9)

Figure 5 is a graphical representation of a portion of a sine wave curve fit.

The residuals (data minus fitted curve) for the ideal case will all be within

± 0.5 LSB, and the rms value of the residuals will be Q//TF.

Figure 6 shows the residuals from a computer simulation of an ideal 10 bit,

offset binary coded A/D converter with 512 sample points. The fit in this case

was done using a commercial regression analysis package based on Marquardt's

nonlinear least squares method. The value of the rms error was 0.292, which

compares favorably with the theoretical value of Q//TZ = 0.289.

Figure 7 shows the residuals from a 500 point test on an actual 10 bit

recorder, sampling at 50 kHz. Note that many of the residuals are well beyond

the ± 0.5 LSB limit. The magnitude of the rms error, E, is increased by these

residuals, and as equation (9) shows, a larger value of E results in the

effective number of bits becoming smaller. In the above case, the effective

number of bits was about 7, rather than 10, the resolution of the waveform

recorder.

35
QUANTIZING ERROR

IDEAL 3-bit A/D CONVERTER

111

0.5 1.5 2.5 3.5

INPUT VOLTAGE

i I

-Q/2

CO

UJ3

-J<

>

<

>

(I E

'(-T/2.Q/2)

(T/2-Q/2)i

ONE QUANTIZING

INTERVAL

E - QX/T for X from

-T/2 to T/2

r T/2 _ E

rms

=(1/T)

J

E

2 dX = Q2/12

'-T/2

Figure 3. Quantizing error of ideal 3 bit

analog-to-digital converter.

Figure 4. Quantizing error calculation

TIME

Residuals

+ 0.5

-0.5

• • •

_• *_ ».

•• •

Figure 5. Sine wave nonlinear least squares curve fit to waveform recorder

output data and the resulting residuals.

36
LSB'S

0.5

CO lo

CD

1

1

»

*4

t «

4 *

1 4

• «»

1 . • •

14 < « * . 4 *

«

* I '

1 « 4 , <

« 1<

»

' 4 " O f * * *

4* I ^ 4 1 4 « » * *

t ' • ^ ,

1

* ,1 « « « ' .

' ' *

-0.5

1

OUTPUT CODE

Figure 6. Computer simulation, of the residuals calculated using a nonlinear

sine wave durve fit to a 512 sample data point record. Test

instrument is a software modeled 10 bit errorless waveform recorder.

7

OUTPUT CODE

Figure 7. Residuals calculated using

sample data point record,

waveform recorder sampling

a nonlinear sine wave curvefit to a 500

Test instrument was a real 10 bit

at 50 kHz.

37
A plot of the effective number of bits vs. applied sine wave frequency for

an 8 bit, 100 MHz sampling rate recorder at an applied voltage of 0.9 of FSR is

shown in figure 8. The rapid fall off of effective bits vs. frequency is often

observed in waveform recorders. For the recorder used to obtain the plot of

figure 8, as the frequency of the input was increased, codes started to be

skipped, which reduced the effective number of bits rapidly. These skipped

codes, rather than uniform random noise, accounted for much of the decrease in

effective bits.

When calculating the S/N ratio and effective number of bits, the amplitude

of the applied sine wave has been taken into account. For a peak signal, V,

(less than full scale),

S/N = 2V(2

n_1 /6)/(FSR). (10)

The repeatability of the effective number of bits tests is described in

[13]. Test conditions were that a 1 MHz and then 2 MHz sine wave at 0.5 of FSR was applied to a 9 bit recorder sampling at a rate of 20 MHz. Twenty

computations of the effective number of bits were made. For the 1 MHz case, the mean value was 8.33 bits with a maximum value of 8.50 and a minimum value of

8.17, while in the 2 MHz case the values were 7.93, 7.77, and 8.07,

respectively.

3. Fast Fourier Transform Test

The Fourier transform of a real time continuous signal x(t) is defined as

X(f) = / x(t)e"

27rift

dt . (11)

For waveform recorders, the continuous function, x(t), becomes sampled data at

uniform time intervals. The implementation of the Fourier transform for a signal, x(t), sampled at a finite number of data points M, and spaced At apart,

is given by M _ 1 X

H (f) = ' I x(kAt)e"

2lTif(kAt)

At , (12)

a k=0

and is often called the discrete Fourier transform (DFT). For real data, M data

points gives M/2 discrete spectral lines with a frequency resolution of

Af = 1/MAt. An implementation that greatly speeds up the computation of the UFT

are the various algorithms usually grouped under the title of fast Fourier

transforms (FFT). Use of these algorithms also brings restrictions on the

number of sample points; for the more common implementations, the number of data

points must be a power of two as in 1024=2 1 o

.

The FFT test, with a sinusoidal input [1,2,10,14], can be used to compute a S/N ratio, and thus determine the effective number of bits, as described

previously. Details of the computation of the S/N ratios with the FFT test and

a series of corrective factors which were needed to make the results from the

FFT tests approximately equal to the fitted sine wave test are given in [10].

38
Compared with the fitted sine wave test, the FFT procedure is faster and does

not require any initial values for the parameters A,B,C, and D, nor are there

any problems with the convergence of the curvefit. Balanced against this

advantage is the need to use a window function (Hanning window used for these

tests), and the application of a series of correction factors (as explained in

[10]) to make the results of the FFT method nearly equal to the curvefit

method.

The FFT test is sometimes referred to as an integral linearity error test,

since linearity errors in the input amplifiers, attenuators, and internal A/D

converter cause harmonics of the input frequency to appear in the output Fourier

spectrum. Figures 9(a) and 9(b) are representations of the linearity errors in

the functional modules of a waveform recorder. Figure 9(a) depicts an S-shaped

transfer characteristic that is typical of many amplifiers. The S-shaped

characteristic, if it can be modeled by a series of polynominal terms of degree

n (n odd), will generate odd harmonics in the output spectrum up to order n. Figure 9(b) shows a linearity error modeled with an even order polynominal of

degree two. Transfer characteristics of this type will generate even harmonics

of order n in the output spectrum. Figure 10 is a graph of a FFT spectrum

obtained with a computer simulation of a 10 bit recorder with a 0.5 LSB

quadratic nonlinearity (n = 2) of the type shown in figure 9(b). This

nonlinearity resulted in the second harmonic spectral line shown in figure 10,

and reduced the effective number of bits from 10 to 9.35. Figure 11 shows the

results of a differential linearity error (wide or narrow code) on the FFT

spectrum. On this figure there are five spikes visible in the output spectrum,

which are a result of bit 3 of the A/D converter having a code width 0.5 LSB

narrower than the ideal case. This condition has reduced the effective number

of bits from 10 to 9.35.

The FFT spectrum will also be affected by wide band noise sources which

will raise the level of the noise floor. The quantizing noise, a result of the

inherent quantization of the input signal by the internal A/D converter, sets a lower limit to the noise floor. The S/N ratio is calculated by taking the rms value of the signal and dividing by the rms value of the remaining spectral

lines after allowance for the leakage phenomena [10].

Figure 12 is a plot of an FFT test on a waveform recorder constructed from

the functional modules, (see figure 2) which consisted of a S/H amplifier, a 12

bit successive approximation A/D converter, and a 12-bit wide 1024 word random

access memory. The large third and fifth harmonics observed in the spectrum

were caused primarily by integral linearity errors in the transfer

characteristic of the S/H amplifier, like those shown in figure 9(a).

Independent measurements on the S/H amplifier verified this nonlinearity in its

transfer characteristic, which was still within its linearity specifications.

4. Histogram Test

A histogram is a compilation of the number of occurrences of each codeword

in a digital output record [1,2,15-17]. If a triangular or sawtooth waveform of

excellent linearity is applied, as shown in figure 13 (with the condition of no correlation of its fundamental frequency and the recorder's sampling rate), then

the probability of the occurrence of each code is equal. This result is

equivalent to saying that the input waveform has a uniform probability density

function.

39
COt

m

u_O

<r

co

LU>

O

LU

Si

Li. ILU

8

10

kHz

100

kHz

1 mHz10

mHz

Figure 8. Eight bit recorder with maximum sampling rate of 100 MHz,

H

D

0.

H

:

CDo

_l

z

1/4 1/2 3/4

ANALOG INPUT

(a) S/H amplifier

Error = jQ-QX 2

1/8 2/8 3/8 4/8 5/8 6/8 7/8

ANALOG INPUT

(b) A/D converter

Figure 9. Examples of integral linearity errors in the functional modules of

a waveform recorder. 40
AMPLITUDE

DECIBELS

-20-

-40-

-100

FAST FOURIER TRANSFORM MAGNITUDE SPECTRUM

10 BIT SIMULATION

1 LSB QUADRATIC NONLINEARITY

INPUT: QQ'/, OF FULL SCALE

PERIODS: 59.78

S/N RATIO= 60.68 DB

EFFECTIVE BITS= 9.80

SPECTRUM LINE NUMBER

Figure 10. Spectrum from a 10 bit waveform recorder having the quadratic

nonlinearity error shown in figure 9(b).

AMPLITUDE

DECIBELS

• rFAST FOURIER TRANSFORM MAGNITUDE SPECTRUM

10 BIT A/D SIMULATION

BIT 3 OF DAC 0.5 LSB LOW

OR E(3)= 0.25-2T-10

FS RANGE 2 VOLTS

INPUT .99 VOLTS

\ .98 VOLTS FS

PERIOD SOR (093)

S/N 5S.3

EOUIV BITS = 9.35

SPECTRAL LINE NUMBER

Figure 11, Computer simulation of a 0.5 least significant bit differential

linearity error in bit 3 of a 10 bit recorder.

41
AMPLITUDE

DECIBELS

0 r

-20 -

FAST FOURIER TRANSFORM MAGNITUDE SPECTRUM

-40 -

-60 -

-se

-180

HARMONIC NUMBER

Figure 12. Sample/hold amplifier plus 12 bit analog-to-digital converter with

a 1024 word memory.

Triangular waveform input

Voltage

Time

Output code

~7 Input

o o

> o

o c

St

ul o

Q Q Q Q

000 0 -- - 111 Codeword

Width of 1 th codeword

Q,= FSR(£)

M = Total number of

sample points

001 011

Figure 13. Histogram test using a triangular waveform as the input

42
In an actual histogram test, the distribution of the number of occurrences

of each codeword will not be equal, due to the statistical aspects of the test.

If the test is repeated a number of times, however, the number of occurrences of

a particular codeword will have an average value with a scatter about this

value.

When an experiment is performed such that it has the properties listed

below (see [18]), it qualifies as a Binominal experiment:

a. ) a fixed number of trials,

b. ) each trial must result in a "success" or a "failure" (a Binominal

trial, also frequently called a Bernoulli trial),

c. ) all trials must have identical probabilities,

d. ) the trials must be independent.

The histogram test, as outlined above and in figure 13, meets the criteria for a Binominal experiment. The number of sample points is fixed, each sample point

results in a codeword occurring or not occurring, the probability of a codeword

occurring remains identical for each sample point, and the condition of no correlation between the applied fundamental frequency and the recorder's

sampling rate meets the criteria for independence of the trials.

Thus, the probability of m "successes" out of M trials (or m occurrences of a particular codeword out of M sample data points for a n bit recorder) is

represented by the Binominal distribution function

B(m » M) = ml(M-m)! (13)

In equation (13), p is the probability of a "success" (equal to 2~ n for a n bit recorder) and q is the probability of a "failure" (equal to l-2~ n

). For

large values of M, it is cumbersome to calculate the factorial terms in equation

(13), and approximations to the Binominal distribution are used. It can be

shown that when p is much less than one and M is large, the Binominal

distribution is represented by the Poisson distribution function [19]

,m -X

P(x, m ) = -

i » (14)

where X = Mp. The average value of the Poisson distribution is X, and the

standard deviation is /x.

An important use of histogram tests is the detection of missing codes. A

missing code means that a codeword has zero occurrences and is easily detected

from a frequency of occurrence vs. codeword plot of the type shown in figure

14. However, a sufficient number of data points must be taken to ensure that

the test does not register a false missing code. A complete solution to the

problem of the random distribution of M things into R places is given in [24].

For the case of large M and R, it is shown that a suitable approximation results

in a Poisson distribution. When applied to the missing code problem, the value

of X in equation (14) is equal to Re _M/ R , with R = 2

n . With this value of

X = Re"M/% the probability of m missing codes occurring over R = 2

n codewords, when tested with M sample points, is given by equation (14). Note

that M/R is the average number of code occurrences of each codeword. No missing

43
codes means that m = 0, and the probability of that event occurring is simply

e-A. For a 10 bit recorder tested with 20,480 sample data points, the

probability of no missing codes is calculated to be approximately 0.999998.

A second important use of histogram tests is the measurement of

differential linearity errors (DLE), which are the variations in code width from

the ideal value of one LSB. The width of a given codeword, Q-j , is determined

from the data point record by the relationship

"l

= (FSR

» TT ' (1!

where M is the total number of sample data points, and X-j is the number of

occurrences of the designated codeword. If Qi = one LSB, then the width of a one LSB wide code in terms of X-j is given by

and

0 - ( pSR ) 2

n

M

X, = — 1 2

n

(FSR) ^1

M

(16)

The codeword distribution, Xi , is described by the Poisson distribution given

in equation (14) with X = mp. Again, a sufficient number of data points must be

taken to ensure that the statistical variations in code width are small compared

with the errors being measured. An example is the histogram test of a perfect

10 bit recorder using 102,400 sample data points. The average number of

occurrences of each codeword is M/2 n or 100. In terms of the Poisson

distribution, the average value A = Mp; when p = probability of the occurrence

of one codeword, then A = M/2 n = 100. Recall that the standard deviation of

the Poisson distribution is /A; thus, the standard deviation of the codeword

distribution is 10.

The probability that all codes will lie within a certain code width is

obtained by multiplying together the probabilities for each individual code

being within that range. Still using the previous example, the width of a one

LSB wide code is numerically equal to 100 occurrences of a codeword. To

determine the probability that all codes lie within the range 0.5 to 1.5 LSB's

(i.e., 50 to 150 occurrences of a codeword), first the following summation of

the Poisson distribution is calculated:

150 1nnm -100

D

, x _ v 100 e P(m) " * ml . (17)

m=50

The value of P(m) calculated from equation (17) is the probability of one particular codeword being within the 0.5 to 1.5 LSB range. For all 1024

codewords, the probability that all codes lie within the 0.5 to 1.5 LSB range is

calculated to be 0.9987.

44
Figure 14 is a frequency of occurrence vs. codeword plot of a histogram

test on a 10 bit, 10 MHz maximum sampling rate waveform recorder. For this

test, a triangular waveform with a fundamental frequency of 9.9 kHz was applied,

the sampling rate was 2 MHz, and 100,000 sample data points were captured. The

nominal one LSB code width is 97.6 code occurrences. One-half of the recorder's

range is shown, from octal code 1000 to 1777 (decimal code 512 to 1023). The

results at the highest codes were disregarded due to slight overranging by the

input signal. The 0.7 to 1.3 LSB code width (68.3 to 126.9 code occurrences on the vertical axis in figure 14 is exceeded by a number of codewords which are in excess of the total calculated for the ideal test. Calculations similar to

those described using equation (17), but using 100,000 data points and a 0.7 to

1.3 LSB code width, indicate approximately 3 codes outside the 0.7 to 1.3 LSB

range.

The histogram test can also be performed using a sine wave as the input

stimulus. Sine waves are easier to generate and measure over a wide frequency

range than are triangular-like waveforms of the required linearity. However,

the probability density function of a sine wave is not uniform, but is described

by the equation

P(V) = h -

»

where B is the peak amplitude of the waveform and P(V) is the probability of an occurrence at a voltage V. The ideal probability of a code occurrence is

obtained by integrating P(V) over a code width and is given by

P(I, 4 [sin" 1

i

( FSR)(I-2"- 1)

} . s1n

.l

(

( FSR)(I-l- 2 "- 1

) }]

B2

n B2n (19)

where FSR = full scale range, B = peak amplitude of the input, I = offset binary

code in decimal, and n = number of bits. The computation of the DLE is given by

_ (Actual occurrences Ith code) / (total number of sample points)

^ Ideal probability of occurrence of Ith code

(20)

A computer simulated sine wave histogram test using 10,000 sample points on

an 8 bit recorder is shown in figure 15. The shape of the frequency of

occurrences vs. codeword plot clearly reflects the probability density function

of a sine wave that is described by equation (18). Application of equations

(19) and (20) to the data results in a linear plot of the DLE vs. codeword

curve. This application of equations (19) and (20) is shown in figure 16 for an actual 100,000 sample point test on a 10 bit recorder. For this test, the

applied sine wave frequency was 12 kHz, with 10 volts FSR applied voltage, and

sampling rate of 10 MHz (maximum for this recorder). Evident from the DLE vs. codeword plot in figure 16 are a series of wide codes at the upper portion of

the voltage range, some with DLEs greater than 2 LSBs.

45
Figure 14. Portion of a histogram from a 100,000 sample point test. Ten bit

waveform recorder tested with a 9.9 kHz triangular waveform input,

and sampling at 2 MHz.

45
Figure 15. Computer simulation of a histogram test on a 10 bit recorder with a sine wave input.

LSB ERROR

4 _

3 -

DIFFERENTIAL LINEARITY ERROR

Ten Bit Recorder Sampling at

10 MHz , +/-5 Volt Input at

12 KHz, 5X Overrange

2 .

0

-i

mm

-2

0 CODEWORD 1023

Figure 16. Histogram test on a 10 bit recorder with sine wave input, 100,000

sample points.

47
5. Aperture Uncertainty Test

Aperture uncertainty (jitter) is the random variations in the timing of the

encode commands of the waveform recorder [20]. Figure 17 shows the effect of a random aperture uncertainty on the voltage measurement of a sine wave. The

aperture error is given by

e = At (dy/dt), (21)

where At = aperture uncertainty, and dy/dt is the slope of the signal being

measured. If a Gaussian distribution is assumed for the aperture uncertainty,

then the rms value of the aperture uncertainty corresponds to the distribution's

o value (standard deviation). Figure 18 shows a procedure for measuring

aperture uncertainty [2,3]. If the encode command to the waveform recorder can

be phase locked to the analog input waveform (whose time instabilities must be

substantially less than that of the waveform recorder), then the waveform

recorder should sample the input waveform at the same point, and in the ideal case of no aperture uncertainty, only one output codeword will occur. Since the

aperture uncertainty is modeled as a Gaussian distribution, a histogram of the

output codes with a Gaussian distribution will result from this test, as shown

in figure 18. The o calculated for the resultant distribution corresponds to

the rms error voltage e produced by the rms aperture uncertainty At. Then, the

jitter is calculated as

At = e/(dy/dt). (22)

6. Transient Tests

Waveform recorders are often used to record and store transient phenomena,

not repetitive waveforms like the steady state sine waves used in the test

methods just described. In an effort to compare a steady-state test response

with a transient response, a test method [21] was devised at NBS which measures

the difference between a continuous sine wave test response and a transient

response. The transient signals used are single period sinusoids derived from

the steady state sine wave by a S/H amplifier. Figure 19 shows the derivation

of the single period sinusoid from the steady state sine wave with the use of a S/H amplifier. Every 20th period, with an appropriate fixed phase shift, a single cycle is taken from the steady state sine wave and applied to the

waveform recorder.

The test is performed as depicted in figure 20 by first applying the steady

state sine wave and capturing a data record, then switching the S/H amplifier to

a mode where every 20th period a single cycle is captured, and a second data

record stored. The portion of the data records where the single period

sinusoidal occurred is subtracted from the corresponding portion of the data

record in the steady state mode. Any residuals remaining, after the

subtraction, are a measurement of the difference in the transient vs. steady

state response, provided the conditions set out below are met:

48
Figure 17. Effect of aperture uncertainty on the measurement of a sine wave.

Analog

input

t

Encode

command

t

o

>> o

o z. 3 i- ® O

t- o

LU O I

O CM CO ^ tf5 to ia to m io io

Histogram of

codewords

10 bit decimal

codewords

Figure 18. Aperture uncertainty test.

49
L Trigger Transient

out

Steady

o state

Mode

control

Steady state

output

¥V\A <•

Sine

wave

source

Output S/H

amplifier Out to

waveform

recorder

(b)

Transient output

(zero phase)

Figure 19. Single period transient sine wave generation.

(a) /\/Y/\ Waveform

recorder 3

Store

and

process

(a)-(b)

\>f k/

Plot

Figure 20. Transient vs. steady state basic test method,

+12.8

-12.8

ure 21.

TIME

Transient minus steady-state response of a 8 bit, 100 MHz waveform

recorder on ±0.5 volt range, with 100 nS sampling intervals. Input

waveform is one cycle of a full scale 100 kHz sine wave as shown.

Time skew and offset errors are present.

50
920

LUG

O

O

D

CL

900

15 uS/DIVISION 150

Figure 22. Step response of a 10 bit waveform recorder. Positive rise time

step of -3.9 to +3.9 volts applied on ±5 volt range. Sampling rate

was 5 MHz.

51
Transient and steady-state waveforms are identical.

The sine wave source is stable with no changes in amplitude and phase

during application of the transient and steady state signals.

The two data records are taken from identical segments of the two

waveforms with no timing skew between them. A time skew of AT

between the two records results in an error signal of the form

E(t) = BooAT cos cot, (23)

that is superimposed on the difference between the two records.

Averaging a number of record differences will reduce this effect,

assuming that it is random.

Figure 21 shows the results of a test taken on an 8 bit, 100 MHz (maximum

sampling rate) waveform recorder. The voltage range was ±0.5 volt, with 100 ns sampling intervals. Time skew and offset errors are present and further

averaging is needed. Nevertheless, significant errors (>1 LSB) can be observed

to occur over the full period of the transient sine pulse relative to the

steady-state waveform.

A second type of transient test under development at NBS is a fast settling

step response test. The details of the step-like generator used in these tests

and methods of evaluating its peformance are given in [22]. This test system

uses a step-like generator which rises (or falls) in a few nanoseconds from the

first programmed voltage level to a second programmed voltage level. Once at the second voltage level, it settles within 40 ns to ± 0.02 percent of its

final value with negligible overshoot. The length of time at the second level

is programmable also, and the repetition rate at which the unit will run is a few megahertz. Voltage range levels are ± 5 volts on the high impedance input

range and ± 1 volt on the 50 ohm input range. Figure 22 shows the results of a test on a 10 bit, 10 MHz maximum sampling rate recorder. A positive rise time

step from -3.9 to +3.9 volts was applied on the ±5 volt range at a sampling rate

of 5 MHz. The portion of the record shown is 20 LSB's from decimal code 900 to

920, and the graph covers a range of 300 sample points. The data were smoothed

with a moving point average of 7 points. A relatively large transient overshoot

of 6 LSB's is observable from this graph. About 70 ms were needed before the

recorder had settled to its final value. These errors are possibly caused by a combination of dielectric and thermal effects at the instrument's input

ampl if iers.

52
References

1. 8. E. Peetz, "Dynamic Testing of Waveform Recorders", IEEE Transactions on Instrumentation and Measurement, IM-32, No. 1, pp. 12-17, March 1983.

2. "Dynamic Peformance Testing of A to D Converters", Product Note 5180A-2,

Hewlett-Packard Corporation.

3. W. Kester, "Test Video A/D Converters Under Dynamic Conditions", EDN, pp.

103-112, Aug. 18, 1982.

4. R. A. Malewski, T. R. McComb, and M.M.C. Collins, "Measuring Properties of

Fast. Digitizers Employed for Recording HV Impulses", IEEE Transactions on on Instrumentation and Measurement, IM-32, No. 1, pp. 17-22, March 1983.

5. J. R. Andrews, B. A. Bell, N. S. Nahman, and E. E. Baldwin, "Reference

Waveform Flat Pulse Generator", IEEE Transactions on Instrumentation and

Measurement, IM-32, No. 1, pp. 27-32, March 1983.

6. L. Ochs, "Measurement and Enhancement of Waveform Digitizer Performance",

IEEE International Convention, Boston, MA, May 1976.

7. L. DeWitt, "Dynamic Testing Reveals Overall Digitizer Performance",

Handshake, pp. 9-12, Spring/Summer 1981, Tektronix, Inc.

8. R. W. Ramirez, "Digitizer Specifications and Their Applications to

Waveforms", Electronics Test, pp. 74-80, September 1981.

9. K. Schon, H. Korff, and R. Malewski, "On the Dynamic Performance of Digital

Recorders for HV Impulse Measurement", Fourth International Symposium on High Voltage Engineering, Paper 65.05, Athens, Greece, September 1983.

10. D. R. Flach, "Steady State Tests of Waveform Recorders", Proceedings of the

Waveform Recorder Seminar, NBS Special Publication 634, pp. 7-21, June

1982.

11. N. R. Draper, and H. Smith, "Applied Regression Analysis", John Wiley and

Sons, Inc. (1966), Chapter 10.

12. P. Bloomfield, "Fourier Analysis of Time Series: An Introduction", John

Wiley ?< Sons ( 1976), Chapter 2.

13. K. Uchida, "Testing the Dynamic Performance of High-Speed A/D Converters",

Digest of Papers, 1982 International Test Conference", pp. 435-440, IEEE

Press.

14. B. Pratt, "Test A/D Converters Digitally", Electronic Design 25, pp. 86-88,

December 6, 1975.

15. G. Pretzel, "Dynamic Testing of High-Speed A/D Converters", IEEE J. of

Solid-State Circuits, SC-13, No. 3, pp. 368-70, June 1978.

53
References (cont.)

16. D. P. Burton, "Checking A/D Converter Linearity Without a Precision

Reference. Statistical Technique Finds Missing Codes Quickly", Analog

Devices Analog Dialogue, 13-2, 1979.

17. M. Neil, and A. Muto, "Tests Unearth A-D Converter's Real-World

Performance", Electronics, pp. 127-132, February 24, 1982.

18. F. Mosteller, R.E.K. Rouke and G. B. Thomas, "Probability and Statistics",

Addison-Wesley (1961), Chapter 7.

19. H. D. Young, "Statistical Treatment of Experimental Data", McGraw-Hill

(1962), Chapter 3.

20. B. Liu, and T. P. Stanley, "Error Bounds for Jittered Sampling", IEEE

Transactions on Automatic Control, AC-10, No. 4, pp. 449-454,

October 1965.

21. T. M. Souders, and D. R. Flach, "Measurement of the Transient versus Steady State Response of Waveform Recorders", Proceedings of the Waveform

Recorder Seminar, NBS Special Publication 634, pp. 27-34, June 1982.

22. H. K. Schoenwetter , "A Programmable Voltage-Step Generator for Testing

Waveform Recorders", IEEE Trans. Instrum. Meas., vol. IM-33, no. 3,

pp. 196-200, Sept. 1984.

23. B. E. Peetz, A. S. Muto, and J. M. Neil, "Measuring Waveform Recorder

Performance", Hewlett-Packard Journal, p. 28, November 1982.

24. W. Feller, "An Introduction to Probability Theory and Its Applications",

John Wiley and Sons (1950), Chapters 3-4.

54
DUAL-CHANNEL SAMPLING SYSTEMS

Gerard N. Stenbakken

Electronic Instrumentation and Metrology

Electrosystems Division

National Bureau of Standards

Gaithersburg, MD 20899

1. Introduction

Measuring two signals simultaneously with a dual-channel sampling system

allows for the calculation of many quantities which cannot be calculated with a single channel instrument. For instance, if the voltage and current in a signal

path are measured, the power in the signal (both real and reactive) can be

calculated; or, if the stimulus and response waveforms for a circuit are measured, the circuit's transfer function can be determined. Since the

dual-channel sampling approach preserves phase information, the transfer

function data available from such systems includes both the frequency response

and phase delay data.

As with single-channel sampling, the errors associated with dual-channel

sampling arise from signal quantization effects, timing jitter, limited sampling

rate, converter nonl inearities, truncation and signal processing algorithm.

However, an important additional error source for the dual -channel system is

differential time delay. This error source can result not only from a difference in timing of the strobe signals to the two sampling converters, but more significantly, from differences in the time delay of the input amplifiers.

This paper will concentrate mainly on the application of dual-channel

sampling technicues to the measurement of electrical power and, to a lesser

extent, on the application to electrical phase angle measurements. Theoretical

relationships are developed for describing these sampling measurements and their

associated errors. The procedures that can be used to calibrate such

dual -channel instruments for these applications will be described as well.

Figure 1 is a diagram of the basic dual-channel sampling system to be analyzed

in this paper.

2. Sampled Power Measurements

Electrical power can be measured by sampling both the voltage and current

waveforms applied to a given load. The product of these waveforms is the

instantaneous power being drawn by the load. The average power going to the

load can be determined by time averaging these products. The errors that are encountered in doing this measurement will be considered only for the case of

periodic input signals. Most of the equations that follow apply to the more

limited case of the voltage and current signals having only a single frequency.

However, the method of extending these equations to waveforms with many

harmonics are described in [1].

For sinusoidal voltage and current waveforms, the sampled signals can be

represented by

55
Q

LU

CsL OO

ZD LU

OO ZD

=C _J UJ <Z A

o

o

CJ3

_l OO

<t oo

I— UJ

i—i O

CD O i—

<

Q CI.

56
and

V

k = V sin(o)kT + a)

I k = I sin(^kT + a + 3),

(1)

(2)

where k is the sample number, to is the signal frequency in radians per second,

is the sample interval, a is the voltage starting phase angle, 3 is relative

current phase angle, and V and I are the peak voltage and current values. The

product of the two quantities represents the sampled power, P|<, and the

average power in the signal can be approximated by averaging these products as [2]

1 n-1

W = -

n

I K

k=0

k ^ cos(3) - ^- I cos(2wkT + 2a + 3),L ^ k=0

(3)

where W is the indicated power and n is the number of samples averaged. The

first term on the right is the true power so the sum term can be interpreted as the error E, that is

n-1

E = -I

k=0

U

2n

cos(2wkT + 2a + 3).

(4)

Expressing the cosine term as the real part of a complex exponential, the sum

can be recognized as a geometric progression. Thus, the sum can be written as [1]

E = - VI sin(no)T)

2n sin( wT) cos(2a + 3 + n^T - u>T). (5)

This equation can be put into a more useful form by letting Y = wT be the sample

interval expressed in radians of the input signal, and <$ be the difference in

radians between the summation interval ny and an integer number, c, of cycles of

the input signal in the summation interval, i.e., <S = 2t:c - ny. Define c' to be

the number of cycles and partial cycles of the input signal in the summation

interval, or 2ttc' = ny. Figure 2 shows the relation between these parameters

for an example of sampling one cycle of sinusoidal voltage and current signals.

Using these variables the error E becomes [1]

E =

2 Y sin 5 2ttc' sin Y

COS(2a + 3 - 6 - y) . (6)

Equation 6 represents the error in the indicated power measurement

resulting from the sampling approach. This error is usually referred to as the

truncation error. The maximum error, Emax , will occur when the cosine term

and sin <5 term in (6) are ±1; thus,

E

. VlY 1 i max 4ttc 1 sin y|

(7)

57

When the signal

angle and sin r frequency is much less than the sampling rate, y will be a small

y. Then the maximum error becomes

P U I * -rA- , (8)

I max I 2 ire ' '

v ;

where P u is the power at unity power factor, P u

= VI/2. In this case the error is inversely proportional to the number of cycles of the signal in the

summation interval, nY. This means that high accuracy measurements of low

frequency signals require a very long summation time.

2.1 Reducing Truncation Error

There are several methods which can be used to reduce the truncation

error. One method is to approximately synchronize the summation interval with

the signal. This is done by adjusting the number of samples, n, in the

summation interval such that the difference between the summation interval and

the time to complete an integral number of cycles of the input signal is less

than one sample interval (6 < y) . The maximum error then occurs when sin 6 = sin

Y, provided that y < fi/2 and the cosine term in (6) is ±1; thus,

|E' I - V- - - O) max 2n n

v '

The maximum error in this case is inversely proportional to the number of

samples and independent of the signal frequency. Thus, the truncation error is

reduced for signals sampled more than four times per cycle. As an illustration,

consider a dual -channel system that samples at 300,000 samples per second and uses a summation interval of one half second, or about 150,000 samples. The

maximum truncation error, without adjusting the summation interval for a 100Hz

input signal, is ±0.3 percent of the power at unity power factor, P u

. When

the sampling interval is approximately synchronized with the input signal, the error is reduced to 0.0007 percent of P u

. Since this latter error is

independent of frequency, it applies to any input signal which is sampled for one half second, with the exception of signals whose frequency is near to a multiple of half the sampling rate.

Another method that can be used to reduce the truncation error is to

estimate and correct for the truncation angle <5. The method described below is

good if 6 is small so it should be used together with the approximate

synchronization method. Defining the truncation factor, a, as the ratio of the

truncation angle to the sampling angle a = <$/y, an estimate of the true power,

P, can be calculated by

59
Finally the truncation error can be eliminated by synchronizing the

sampling with the input signal. Then if m samples are taken in n cycles, where

m and n are integers, the truncation angle <5 will be zero and thus (6) shows

that the truncation error will be zero. While this approach has the advantage

of no truncation error, a disadvantage is that the quantization errors are correlated. The effect of this correlation and a way to reduce the effect are described in a later section.

2.2 Noise, Jitter and Quantization

The three main sources of noise for the typical dual -channel system are the

input amplifiers, the timing uncertainty or jitter of the clock and sample hold

circuits, and the analog-to-digital (A/D) converters. A detailed discussion of

these noise signals as they relate to single channel accuracy is given in [3].

In general, all three are broadband noise signals, where the amplifier noise has

a constant Gaussian distribution, the jitter noise has a Gaussian distribution

and an amplitude proportional to the rate of change of the input signal, and the

A/D or quantization noise has a generally constant uniform distribution.

These noise sources can be considered as error signals added to the true

input signal. Thus, the measured voltage, V|< m , and current, I|< m , signals

can be represented as

V, = V. + e . + e . + e .. = V. + e . , (11) km k vak vqk vjk k vk v

'

I. = I, + e. . + e. . + e. .. = I. + e.. , (12) km k lak i qk ljk k ik v 1

where k indicates the sample number, the ev

's and e-j's are random error signals in the voltage and current channels, and the a, q, and j subscript

represent the noise source as amplifier noise, A/D quantization, and clock

jitter respectively. For the expression on the far right, the three noise terms

have been combined. Then, the measured power terms are given by

P, = V, I. = P. + V, e.. + I, e , + e., e . . (13) km km km k k ik k vk ik vk v '

In general, the last error term is negligible. If the noise signals are uncorrel ated, then when the samples are averaged the error will be reduced

proportional to n~^/^, where n is the number of samples taken. However, if

the sampling is synchronized with the input signal, then averaging will not

reduce the quantization error because they will be correlated. The significance

of the correlation depends on the number of independent nj versions of the

sampled signals which are present in the data. Consider a signal that is

uniformly sampled 1024 times during an integral number of cycles, n c , of the

signal. If n c is 32, then every cycle of the incoming signal is sampled 32

times at the same phase angles. Thus, there is only one independent set of 32

samples of the signal (nj = 1). The other 31 sets are not independent but are

at the same phase angles. If nc is 31, however, then all 31 cycles are sampled at different phase angles; thus nj = 31. If nc is 30, there are 15

independent sets of data (nj = 15). The quantization error is reduced by

approximately the reciprocal of the square root of the total number of

independent samples v\\ where

n n (14)

60
ooco

-l-> fa

a) 10

ve -a 2

CU (

00

-)_> 00

WO

QJ +-> r~

on

ES

'1

on , 1 f0 +j 2: QJD_ N

CO CL °f

ro +->

C\J CU ro 0 00 Z3 O

cr

sz +-> 1—1

-C) uo 0

LU rTM co 1 +-> fO en

>- fsl <zz CJ • 1

•1

4-> 00 Lu C= O 3 CO ca cr +-) LU c

CO -O cu

a> E

ZD +-> cu sr fD s-=5

O) CO

S- ITS S- CU 0 E u

^- M— cu O OW

00 CL

+-> 0 "O

cu cu

<+- +-> 4- 03

CU

CU E 1

1! 00 I CO

cu

en o

COo

C\J o oo

HOcJHB IN33cJ3d

61
Since for a sinewave the data points are not truly independent, the above

relationship is only an approximation. The effects of correlated quantization

noise can be shown by data taken from a computer simulation of sampled power

measurements. In figure 3 the standard deviations of 20 simulated power

measurements are plotted versus the number of cycles of the input signal which

are in 1024 samples. The 20 simulated signals used to calculate each point had

a random starting phase angle and random power factor. The error calculated is

the percent of the power for a unity power-factor signal. Note how the standard

deviations of the error are high for 32 cycles and low for those values of n that have no common factors with the total number of samples, 1024. This effect

shows up most dramatically here because it is a simulation; thus, there is no random noise on the original signal. If the simulation is run with a random

noise of about one least significant bit (LSB), most of this effect disappears.

In the graph of figure 3 the data points have been connected with a straight

line to better show the relative magnitudes, but this is not to imply that the

data in-between follows this line. The in-between points represent

nonsynchronized sampling, and the trend for these points is shown later in the

section on phase angle measurements.

One method of determining the frequency response of a dual-channel sampling

instrument is to compare its response to that of a more accurate instruument.

For dual-channel instruments which can indicate the root-mean-square (rms) value

of each channel, these values can be compared to an accurate ac voltmeter. For

wattmeters, where one channel must be a current input, then that channel must be

compared to an accurate ac current meter. Finally, for wattmeters which cannot

indicate the rms values of each channel, their frequency response can be

determined by comparing it with a more accurate wattmeter.

Figure 4 shows the results of the NBS sampling wattmeter using a slight

variation on the above approach. Instead of comparing the wattmeter output with

the reading of a voltmeter, the wattmeter was compared to the output of an ac calibrator. The plot shows the frequency response for each channel and for the

product ("power") mode where the same voltage is applied to both channels.

When measuring power, any difference between the time delay of the two

channels has the effect of changing the measured power factor. Let t be the

time delay of the voltage channel and t + T d be the time delay of the current

channel, where T d is the differential time delay. Then the delayed voltage

and current samples will be

2.3 Frequency Response

2.4 Differential Time Delay

V kdV sin[w(kT + t) + a], (15)

I kdI sin[w(kT + t + t ) + a (16)

and the indicated power, w^, will be

62
1 n-1

W

d

= F

k iQ

Vkd W < 17 >

or n-1 t W

d

= cos(3 + u)Td

) - ^ J cos[2u)k(T + x +-£)+ 2a + e]. (18)

Now, the first term on the right is not the true power, but is the power for

signals with the same amplitudes and a power factor angle of 3 + un^. Thus,

the error for a wattmeter which has such a differential delay increases in

magnitude with frequency. This effect can be seen very clearly in figure 5,

which is a plot of the errors measured for a commercial wattmeter which has a time delay error. If the truncation error part of (18) is not significant

(i.e., it has been reduced by the methods described above or is zero because the

sampling is synchronized), then the error due the differential time delay

can be determined by expanding the cosine term in (18). Then

Ed

= ^ cos(3) - ^ [cos(3)cos(o)i

d

) - sin(3)sin(uiT )], (19)

Ed

= cos(3) [1 - cos(wT

d

)] + ^ sin(3)sin(u)i

d

). (20)

In general, the differential time delay will be small compared to the time delay

of the amplifiers which is related to the frequency response of the instrument.

Thus, for signals within the frequency range of the instrument, wTd

is a small

angle and cos(wTd ) « 1 and sin(o>T cj) « urrj then the error due to the

differential time delay can be written as

Ed

" "T ^d sin(3) ' (21)

This relationship shows that the differential time delay error is approximately

zero at unity power-factor, 3=0°, and is most significant at zero power-factor, 3 = 90°. Equation (21) also shows the error to be proportional to

frequency, as was seen in the calibration curve of figure 5.

For power measurements in the audio frequency range, the error due to

differential time delays can be very significant when low power-factor signals

are being measured. As an example, if the power factor is 0.5 (3 = 60°) for a 10 kHz signal, then a differential time delay of only 18 ns will cause a 0.1% error in the measured power.

For wattmeters which will accept two equal voltage inputs and give the

average product ("power") of these signals, the differential time delay of that

portion of the wattmeter can be determined independent of the time constant of

the current shunt. The procedure for determining the time constant of the

63
current shunt will not be covered here but is described in [4]. Figure 6 shows

the test setup for determining the time delay of a dual -channel sampling

instrument. The phase source must provide nearly equal voltages and be able to

provide stable phase angles near 90° and 270°. The variables for the voltage

and phase angles of the source are defined in table 1. The average product

("power") reading for the normal, N, switch position witti phase near 90° is

TABLE 1

PHASE SOURCE ERRORS

Channel

Phase

Angle

Phase

Error

Output

Voltage

Reference any 0 VR

Vari able 90° 9 A Va

Variable 270° 9 B

V V

P N90

= C0S(a)T - \

"

eA

" WT" UT

d

)» (22)

where Vr is the amplitude of the reference channel, V/\ is the amplitude of

the variable channel at 90° and 0/\ is the phase error at 90°. For 8a and

wTd small, this equation becomes

P N90 " - PA

< 9A

+ UV> (23)

V

R

V

A

where P^ = —^ • The readings at the other three combinations of switch

settings and phase angle are approximately

PR90 " " PA<

9A

" UT

d>> < 24 >

P N270

a P B<

eB+MT

d>'

(25)

and

P R270 * P

B<

8 B

" "T d)> (26)

V R

VB where P

g

= —^—» v

b

is the ^P^^11016 °f tne variable channel at 270° and 9 g

64
O

00

_iUJ

<c

in0

0

(XI OF

EL FlUL f

TZD

21 O

< =£ O

3: n: C£ 0 0 D_

11 11 II O O

COo

N

o

c

cu

=3CT

CD

CMO

Q-

%

COa

c

00

CO

JZ

COco

Cl

to<D

o

c:

QJ3

D"

<D

SCT)

. °

O)

So

o o

o

o

luaojad ul aoaj^ 111129

65
is the phase error at 270°. Combining these four readings in the following manner gives

P N90 " PR90 " P N270

+ PR270 * " 2 UT

d

(P

A

+ PB>- < 27 >

This result gives a value for the time delay which is independent of the

accuracy of the phase source angle. If the voltage from the variable channel of

the phase source is independent of phase angle, then P/\ = Pq and this value can be measured at unity power factor.

These values can also be used to check the accuracy of the phase source

by combining the readings as follows:

P N90

+ PR90 " P N270 " PR270 * " 2P

A

9A

" 2P

B

9 B

= P PS* ^ 28 ^

Then for a phase source such as a digitally synthesized phase generator, which

has high differential linearity, 9a = 9 B

= 6 (the phase changes are very

accurate) and stable voltages, Pa = Pb> (28) becomes

P ps

= - 4P

A

e . (29)

This equation gives the error in the phase source and is independent of the

accuracy of the product ("power") meter.

3. Phase Angle Measurement

A dual channel sampling instrument can measure the phase angle between two

signals using several algorithms. Four techniques will be described in this

section, and their accuracies will be compared using a computer simulation

program. These techniques are the fast Fourier transform (FFT), the

interpolated fast Fourier transform (IFFT), the discrete Fourier transform using

the correct frequency (DFTCF), and the corrected discrete Fourier transform

(CDFT)

.

The FFT is a widely used algorithm for converting sampled data from the

time domain to the frequency domain. Implicit in the "fast" part of the name is

that the number of samples used, Nf, is highly factorable and in most cases is

restricted to be a power of two. The complex frequency components calculated by

the FFT can be expressed as [5]

V1

. N X,(k) = I v.(nT)e"

lkaJ

s nTk = 0, 1, . . . , -t , (30)

J n=0 J

66
>>uc

CD

CD- CD

CD

c~ j_ T3 CD

CD ^_

"O

rO oo

co t ;Q A

V 1 u

QJ

S- 14- QJ CD

4-»CD QJ

4-3

ro

<> —

^_

<T3 '..0

(_) 0 1 C f)

£^QJ

crCc QJ

(J It-CD

ro

"4-O

CD S~

1/5 CD e 4-J o QJ Q E

(/) .._> QJ +J

S> r02 >, >> ro U cr c C QJ <D TD

cr Q. CD CD E E

i- rn •i

U 00

LT3

CD

5-cr

O

CVI c\ji

'j-uaDJBd ul jojj3 iueg

67
where j, which designates the channel, is 0 or 1, T is the time between samples,

w

s is related to the total sample interval by ws = 2ff/NfT, and vj(nT) are the sampled voltages for the input channel. If the input voltage is a sinewave of frequency u>, the sampled values can be expressed as

v.(nT) = V sin(wnT + <j> ), (31)

where Vj is the peak voltage, and <j>j is the phase of the sinewave relative

to the start of the sampling interval. Then the real and imaginary parts of the

frequency components can be written as

N

f

-1

Re[X.(k)] = V. I sin(wnT + cj).)sin(kw T - tt/2), (32)

and

N f

-1

Im[X.(k)] = V. }' sin(conT + <j>.)sin(kw T). (33)

J J n _Q J s

These equations can be expressed in polar coordinates with an amplitude, A, and

phase, <*>, given by

Ajf (k) = [Re

2 [X

d (k)] + Im^X^k)]] 172

, (34)

and

Re[X (k)]

V

(k) = arCtan

I mLX (k)J '

< 35 ) 3

If the sampling is synchronized with the input frequency such that an integral

number of cycles c of the input signal are sampled in the sample interval, then

w = cws , and it can be shown [5] that

N V. k = c A

jf

(k) = { o

J k * c

' < 36 >

and

4>^. + tt/2 k = c V

(k) =

1 undefined k * c. (37)

However, if the sampling is not synchronized with the input frequency, then c' cycles of the input signal will be in the sample interval where c' is not an integer. Many of the frequency components will be nonzero and the two largest

68
amplitude components will be for k = c, and k = c+1, where c is the integer part

of c

1 . This phenomenon of spreading the single frequency to many frequency

components is referred to as leakage in the FFT literature. In this case, none

of the amplitudes or phases of the frequency components are related to the input

signal as in (36) and (37); the amplitude and phase measured by the FFT is

assigned the amplitude of the largest line and its corresponding phase. The

results of the simulation show that this phase, which is the phase of the signal

relative to the start of the sampling interval, can be in error by as much as

30° to 40°; however, for two channels, the difference in the phase of the

largest line in each channel, *i-*2» is a good measure of the phase between the

two channels. Thus, although this method gives a large error for the phase of

each channel, if the two channels are sampled simultaneously both will have

close to the same error. Figure 7 shows that the differential errors for the

FFT method are, at most, a few tenth of a degree (note that 10" percent is

0.36 degrees)

The interpolated FFT ( IFFT) [6] method makes use of the amplitudes and phase

angles of the two frequency components with the largest amplitudes, Aj(c), and

A-; (c+1) . Define

A^c+l)

j

°J

= CTc-]-'

°- a

j - U (38)

and

6

i = rrV » 0 <

6

i < l' 2 > ( 39 ) j

and

(N f

-1)

a' = tt —J . (40)

Then, the interpolated phase angle, is given by [6]

•j! = •jf (c) - a'Sj + \ , Aj(c) > Aj(c + 1), (41)

or

•dI

= *jf

(c + 1) - a' (6-1) + \ , A..(c) < Aj(c + 1). (42)

The simulation showed this phase angle to have a much smaller error than the FFT

derived 4>j. However, the interpolated differences phase angle, $n-*2I»

in general had a larger error than the FFT difference phase angle (see

figure 7).

69
CJ3 _J 21 UJ 1—

1

5r

2: ._J UJ

1 Q- h- < CO

in < >- o O CO 00

C\J 0

03E

S- 2 4

4— S_ CD CC >

UJ CE

en < IDOOO

o

s0)

CU 00

t/1 E ("0 cu JC +-> O 00>i

"O CO

I'D CT) >J

1

1 QCD E

TI <T3

CUE 1 CU

CId

r

<"0

<V>

"i

CJ +jc

CD To

s_ 13

a-> "O 4-

M_ 4-O

"O

00 cr >i c rc

°»

S- CU 3 -0

t/1 T3 CU

CD E

E

+J

s_O -0

4- c

ro Q

3 CU +J 0

CU s_ 00 13O

00 in

a- 4- I— O

CD

CD3

70
The DFTCF method uses the same formula for calculating a frequency

component as the FFT, but uses only the number of samples Nd which cover almost c cyles of the input signal. That is, N<j is selected such that the

truncation period, which as before is the difference between the summation

interval, N^T, and an integral number of cycles of the input signal, is less

than one sample period T. The DFTCF method also assumes that the frequency, w, of the input is known. The complex frequency component is then calculated as V1

X

id

= Tl v.(nT)eluJnT

. (43)

J Q

n =o J

If the input signal is written as (31), then the real and imaginary parts of

(43) are given by

N

d

-1

Re[X. .] = V.T I sin(wnT + A.)(u>nT - tt/2), (44) ja J n=Q J

and

V1 Im[X ] = V.T I sin(u)T + <j>. )sin(o>nT) . (45) ja J n=0 3

These equations have the same form as the power equations discussed in the first

section and can be rewritten in a form like (3), with a constant term and a truncation error term. The phase angle, ^-jd, is calculated using the above

real and imaginary parts in (35). Figure 7 shows this method gives accurate

results for nonsynchroni zed sample sets.

The final phase calculation method is the corrected DFT (CDFT). This

approach uses the same method as the DFTCF above, with the addition of a truncation correction similar to the one used in the power case (10). The

fractional sample factor, a, is estimated from the known frequency and sample

rate. This fraction can be estimated by measuring the number of samples, Nj,

in a long sample interval, where Nj » N<j as described in [2].

The accuracies of these four phase angle algorithms were compared using a computer program that simulates a dual-channel sampling system. This is the

same simulator used to demonstrate the effects of quantization correlation on power measurements (see figure 2). Figure 7 shows the results of simulation

where between 31 and 33 cycles of the input signal are sampled in 1024 samples

with an 8 bit quantizer. Each point is the standard deviation of the errors for

20 simulations at random phase angles. All four methods give the same result

for integral numbers of cycles. These points represent the condition where the

input signal is synchronized with the sampling rate. As with th2 power

simulation, the errors are larger for 32 cycles than for 31 or 33 because of the

effects of correlation in the quantization errors. The in-between points

71
NUMBER OF CYCLES IN 1024 SAMPLES

Figure 7. The standard deviation of the error in the

calculated phase angle using four algorithms.

Twenty simulations were made with random phase

angles of two sine waves using 8 bit quantization.

Note that 10" percent is equal to 0.36 degrees.

72
represent nonsynchronous sampling. The errors for the FFT and IFFT are larger

for these values than the errors for the DFTCF and CDFT method. Thus, if the

correct frequency is known or accurately measured, this information can be used

to improve the accuracy of phase angle measurements for nonsynchronous

sampling. Also, repeated measurements can be averaged to further reduce these errors and, as might be expected, the averaging process will reduce the error

for the nonsynchronized cases but not for the synchronized cases. In the

nonsynchronized cases, these standard deviations represent random error,

whereas, in the synchronized cases they represent a bias value for each fixed

phase angle.

References

1. Gerard N. Stenbakken, "A Wideband Sampling Wattmeter," IEEE Trans, on Power

Apparatus and Systems, vol PAS-103, no 10, pp. 2919-2926, October 1984.

2. F.J.J. Clark and J.R. Stockton, "Principles and Theory of Wattmeters

Operating on the Basis of Regularly Spaced Sample Pairs," J. Phys. E: Scientific Instruments, vol 15, no 6, pp 645-652, June 1982.

3. Robert P. Talambiras, "Digital -to-Analog Converters: Some Problems in

Producing High-Fidelity Signals," Computer 'Design, pp 117-123, January,

1976.

4. T. M. Souders, "An Audio-Frequency Four-Terminal Resistance Bridge," IEEE

Trans, on Instrumentation and Measurement, vol IM-26, no 4, pp 342-345,

December 1974.

5. Steven A. Tretter, "Introduction to Discrete-Time Signal Processing,"

John Wiley and Sons, New York, N.Y., 1976.

6. Vijay K. Jain, William A. Collins, and David C. Davis, "High-Accuracy

Analog Measurements via Interpolated FFT," IEEE Trans, on instrumentation

and Measurement, vol IM-28, no 2, June 1979.

73

DATA CONVERTER TEST METHODS

T. M. Souders

Electronic Instrumentation and Metrology

Electrosystems Division

National Bureau of Standards

Gaithersburg, MD 20899

1. Introduction

A/D and D/A converters are presently being produced in a vast array of

types and models, exhibiting a wide range of design approaches, operating

speeds, and accuracies for a wide variety of applications. As might be

expected, an equally large number of test methods has been developed, with

each addressing the measurement of some specific characteristics of one or more of these types or models. It is the intent of this tutorial to review

the more useful, and hence more widely used, test methods pertinent to the

characterization of data converters for use in measurement or control

instrumentation applications. With a few exceptions, little will be said, for

example, about testing converters for applications such as audio and video

recording and playback, or communications. The focus has been narrowed by

concentrating mostly on static or quasistatic test methods, partly because

relatively few dynamic test methods have been proposed, and in part because

some dynamic test methods are being addressed in other presentations of this

seminar [1, 2].

With this focus in mind, test methods have been included which measure

one or more of the following characteristics:

L Integral Linearity M Monotonicity

DL Differential Linearity MC Missing Codes

S Superposition N Input Noise

0 Offset H Hysteresis

G Gain AC Alternating Codes

SNR Signal -to-Noi se Ratio or SR Step Response

THD Total Harmonic Distortion

Characteristics listed in the first column are those generally applicable to

both A/D and D/A converters, while those listed in the second column all apply

to A/D converters only, with the exception of monotonicity, which usually only

applies to D/A converters. Discussion and definitions of these terms can be

found in references 4, 6, 8, 11, 12, and 13.

Somewhat arbitrarily, all pertinent test methods have been assigned to

eight general approaches, divided equally among approaches for D/A and A/D

converters. These eight measurement approaches are discussed below, and are represented schematically in the accompanying figures, along with a listing of

the characteristics (keyed to the abbreviations in the above table) which they

address, brief indications of their relative strengths and weaknesses, a list

of references for further discussion and detail, and other brief comments.

75
TEST METHODS FOR A/D CONVERTERS

Par ameters

Measured Advantages Pi sadvantages Comments Ref

s

L Simple to setup. Very slow and Used as bench 3

DL tedious to per- setup for very 6

S form. Requires limited testing.

0 operator judgeG ment in locating

H transition levels.

L Gives rapid visual Requires manual Often used in 3

DL identification of operation and production testing 6

0 differential lin- visual quanti- or manual

G earity errors, fication of per- tweaking, and

H hysteresis, noise formance. detection of hysN problems, etc. teresis and noise

Does not require problems.

accurate ref.

except for meas.

of 0. and G.

L Well suited for Some output infor- Becoming indus- 5 DL fast, automatic mation in terms try standard 8

S testing. Elim- of specific codeword for automated 10

0 inates operator occurances and testing. Used in 11

G judgement. Can distributions is not NBS calibration 7 H be adapted for available to operator, service. 12

SR dynamic step

N response testing.

L Potentially fastest Requires accurate Useful for audio, 13

DL method. All hard- S/H amplifier. video, communi- 14

0 ware commercially Difficult to cations, and 15

G available for many derive detailed dynamic testing 17

SNR versions. linearity infor- applications. 18

THD mation. Diffi- 20

cult to correlate

results with

other methods.

76
TEST METHODS FOR A/D CONVERTERS

f

L$ DVM

j DUT

CODE

DISPLAY

LEDS, ETC. _ . . : i

DIRECT METHOD

DITHER

GEN.

PROGRAMMABLE

REF. V

DUT

DECODER

FOR LSB'S

2-BIT DAC

CROSSPLOT

FEEDBACK

CONTROLLED

INPUT

SOURCE

DUT 3

DIGITAL

COMPARATOR c

REFERENCE

CODEWORD

DVM OR

OTHER

MEAS. CKT.

FEEDBACK METHOD

REFERENCE

WAVEFORM

GEN.

/V A/V

S/H DUT

REF. DAC

3

DIGITAL

PROCESSING

4 ALU CU

PROCESSI. JG

REFERENCE WAVEFORM TESTS

77
TEST METHODS FOR D/A CONVERTERS

Parameters

Measured Advantages Disadvantages Comments Ref

s

L Simple to imple- Very slow, Used as bench 3

DL ment in either particularly for setup for very

0 manual or high resolution limited testing.

G automatic form. converters.

M

L Requires no Limited capability. Used in production 3

DL accurate standard Assumes low testing for manual 6 or reference superposition errors, tweaking, and used 9

instrument. in self-calibration

Simple to implement. schemes.

L Automated versions Requires indepen- Standard method for 3

DL capable of very dently calibrated automated volume 6

S fast operation. reference DAC with testing. Used in 8

0 All codes tests 3-4 bits more NBS calibration

G feasible for high accuracy. service.

M resolution converters.

SNR Fast, simple to Not versatile. 3

THD implement. Useful

for audio parameters.

78
TEST METHODS FOR D/A CONVERTERS

DIRECT MEASUREMENT

D-1, D DUT

VD-1. v d

PROGRAMMABLE

SUPPLY

ERROR

AMP. DVM,

SCOPE,

ETC.

D-1

D-1 D

0000 0001

0001 0010

0011 0100

0111 1000

DIFFERENTIAL LINEARITY ERROR METHOD

DUT

REF.

mc 0

TERMINAL,

PLOTTER

COMPARISON METHOD

ROM —

\

SINE

TABLE

DUT

DISTORTION/

SPECTRUM

ANALYZER

SINEWAVE TESTS

79
2. Test Methods for D/A Converters

A D/A converter accepts digital input codewords, D, and outputs discrete

voltage (or current) levels, according to some codeword/output level

correspondence. The purpose of a test method for D/A converters is to

accurately measure this correspondence. Perhaps the most obvious approach to

this task is the DIRECT METHOD, in which codewords of interest are sequentially input to the converter under test, and the corresponding output

levels are measured using an accurate digital voltmeter. If only a relatively

few codewords are to be considered, then they can be entered manually via a toggle switch register, and the DVM readings can also be logged by hand. If

many codewords are to be tested however, the process can easily be automated

by interfacing the converter and DVM to a microcomputer. Even so, as the

resolution of the converter under test increases to 12 or more bits the time

required to perform a complete test becomes prohibitively long using this

method. For example, a complete^test of a 12 bit converter, with measurement

accuracy of 0.1 LSB, requires 2 measurements to be made to an accuracy of 24

ppm. If one measurement can be made each second, the complete test will take over one hour. Similarly, a 16 bit converter would require an 18 hour test.

Therefore, this method is generally limited to bench setups where relatively

few codewords are to be tested. Such limited tests can be made, for example,

when it has been determined that the test converters will have negligible

superposition errors, i.e., that the linearity errors at any given codeword

are the simple sum of the errors of the individual bits activated by that

codeword. Thus, for such a converter having n bits of resolution it suffices

to measure each bit individually, and all bits off, for a total of only n + 1 measurements. Limited test plans of this type are discussed in [3].

For situations where superposition errors are assumed to be negligible,

as well as for general measurements of differential linearity errors, the

DIFFERENTIAL LINEARITY ERROR METHOD is also useful. With this method, DLE

measurements are made without requiring an accurate reference instrument such

as the DVM in the previous method. The accuracy requirement is avoided by

making only differential measurements of the small changes in output levels

corresponding to adjacent codes. The changes are measured by subtracting a constant level nominally equal to the output corresponding to codeword D-l,

from both the D-l level and the D level, amplifying the resulting differences,

and displaying them for example, on an oscilloscope. The change in the

amplified differences when switching from code D-l to code D, is simply the

amplified change between the two levels. If codes D-l and D are chosen to

represent the major digital code transitions as indicated in the diagram, then

the weight of each bit can be measured in terms of the total weight of all

bits of lower order. For converters with negligible superposition errors, n pairs of measurements then provides all the information required to compute

linearity errors at all codes [9]. Many implementations of this method exist,

ranging from simple manual setups to fully automated systems. The DLE METHOD

is frequently used on the production line for final adjustment of the bit

weights.

When more complete testing is required, especially when superposition

errors are significant, the COMPARISON METHOD is most widely used. With this

method the device under test is compared directly with a wel 1 -character i zed

reference converter, at many or all input codes. The difference in outputs at each code is amplified, and either displayed directly on an oscilloscope, or

80
digitized and processed by a microcomputer. Offset and gain differences can

be measured and adjusted either with hardware or software. Automated versions

are capable of very high speed operation, making extensive (and sometimes all

codes) testing feasible. The major disadvantage of this method is the

requirement of a reference DAC having substantially greater accuracy

(generally by 3 or more bits) than the test unit, and the necessity of

providing an independent calibration for it. Nevertheless, this method has

found wide usage, and is employed by the NBS data converter calibration

service (for D/A converters) using, as the reference standard, an NBS-built

20-bit DAC [8].

For some applications, more global specifications such as total harmonic

distortion, may be more useful than the typical linearity specifications, and

in these cases, SINE WAVE TESTS are often performed. These tests use digitally generated "sinusoidal" test sequences, which can be strobed into the

converter at the specified test frequencies. The converter under test outputs

a zero-order hold approximation to a sine wave, and either analog or digital

signal processing techniques are then used to evaluate the converter's

response. This method differs from the others in that the measurements are inherently dynamic, since the converter's glitches and settling time

contribute to the measured distortion. For this reason, however, it is

difficult or impossible to directly compare the results of this method with

the determinations of static linearity error produced by the other three

methods.

3. Test Methods for A/D Converters

As opposed to the case of D/A converters, there is not a unique

one-to-one mapping of voltage to codeword for A/D converters. Instead, the

quantization process maps a continuous range of input voltages onto each

output codeword. The analog levels which define an A/D converter's transfer

characteristic are then the extremes of the quantization intervals, i.e., the

voltage levels which correspond to transitions between adjacent output

codewords. For this reason the testing of A/D converters is more complex, and

generally requires means for locating the transition levels prior to their

measurement. In the DIRECT METHOD, the operator accomplishes this process by

adjusting the input voltage slowly until the desired code transition is

detected by viewing a display of the output code states. After the

appropriate code-transition level has been set, then the driving input voltage

is measured, usually with a (higher precision) digital voltmeter. As with the

direct method for D/A converters, this method is very slow and tedious.

Furthermore it requires operator judgement in locating transition levels when

significant noise is present. On the other hand, it is simple to implement as

a bench setup for very limited testing.

A more comprehensive test method, and one that is often used in

production testing, is the CROSSPLOT. With this method, a region of interest

on the A/D transfer characteristic is first selected by setting a programmable

voltage source to bias the input to the desired level, e.g., to the vicinity

of a major code transition. A corresponding bias code is then generated by

the test converter. The last two or three bits of this code are decoded with

a simple resistor network (i.e., a two or three bit DAC), so that the least

significant bits can be displayed on an oscilloscope. Codewords on either

81
side of the bias code will be generated if the input voltage is swept above

and below the bias level, and in this manner, all of the code transitions in

the vicinity of the bias code can be observed on the decoded output. A low

frequency, low amplitude sine wave or triangular wave "dither" generator is

commonly used to perform the sweeping operation, and to drive the x-axis sweep

of the oscilloscope. The resulting output is a plot of the local code states

around the selected code. The code transition levels and their spacings are readily observed, giving rapid visual identification of differential linearity

errors, hysteresis, and noise problems. With care and the use of a calibrated, programmable bias voltage source, the system can be calibrated so that offset, gain, and integral linearity errors can be measured as well.

Because the method relies on visual quantification of performance, however,

the results are still operator-dependent, and the method is suitable for

examining only a limited number of test regions, these being typically the

major transitions where differential linearity errors, glitches, and

hysteresis problems are greatest.

Most of these limitations are eliminated with the FEEDBACK METHOD. This

technique is essentially an automated version of the DIRECT METHOD, and the

function of the operator in seeking code transition levels is replaced by a feedback loop. Thus, the input voltage source is automatically controlled by

the relationship of the converter's output code to a designated reference

code. The control loop is designed to drive the input voltage to the code

transition level bounded (on one side) by the reference code. Once the

transition level has been reached, then it is measured using a digital

voltmeter or other suitable equipment. The entire process is easily

automated, with the controller generating the reference codewords and logging

the voltage measurement data. The controlled input source is generally either

a high resolution D/A converter, or an analog integrator whose input can be

switched between positive and negative sources. This latter method is

implemented in the NBS test system used in the data converter calibration

service [8], and a reference DAC and comparison circuit are used to make the

voltage measurements.

The FEEDBACK METHOD is well suited for fast, comprehensive testing and

completely eliminates operator judgement. In addition to offset, gain, and

differential and integral linearity errors, the general method can be adapted

as well to measure equivalent input noise and hysteresis, to detect missing

codes, and to perform dynamic step response testing [7, 8, 11]. On the other

hand, for high resolution converters, an all codes test using the feedback

method can still be time consuming. For accurate measurements to be made in

the presence of significant transition noise, the feedback loop must be locked

for as many as 100-200 conversion cycles of the test converter for each code

transition level measured, and more time must be allowed to seek and lock on

to each transition.

Finally, A/D converters may also be characterized using REFERENCE

WAVEFROM TESTS. This approach is analogous to the sine wave tests described

for testing D/A converters. The method relies on the ability to generate

reference waveforms having very well defined amplitude and waveshape. For

this reason, sinewaves are particularly well suited since they can be filtered

rather easily to produce very low distortion signals. To obtain reasonable

results the A/D converter under test must generally be preceded by a Sample/Hold amplifier to freeze the signal during the conversion process.

32
This requirement necessarily introduces the errors of the S/H amplifier into

the measurement, however.

The digital output data from the test converter can be processed using

either analog or digital techniques, the first with an accurate decoding DAC

followed by a spectrum analyzer, and the second using direct digital signal

processing methods. Typical test results include total harmonic distortion or signal-to-noise ratio, and differential linearity errors. As with the sine

wave tests for D/A converters, the results from REFERENCE WAVEFORM TESTS

include dynamic error sources such as timing jitter, and cannot be directly

compared with the results from the other test methods described above.

However, REFERENCE WAVEFORM TESTS are potentially very fast and can often be

implemented using commercially available hardware. They are used primarily in

testing components for communications applications.

4. Conclusion

In choosing the most appropriate test method for a given situation, a number of criteria should be considered. These include the work load to be

handled, the number of different converter types to be accomodated, the

resolution and accuracy requirements, the specific measurement parameters of

interest, and the testing strategies to be implemented.

With so many codestates possible, the issue of a good testing strategy

is especially important, particularly for high volume testing. An effective

testing strategy depends on the kind of test information required, the

measurement confidence needed, and the availability of adequate error models

for describing the converters to be tested. With care and sufficient error modeling information, limited test plans can often be developed which are both

efficient and effective in accurately predicting errors for all codes. This

is especially true for D/A converters, since their superposition errors are generally small and very systematic.

Finally, if it has been decided that a flexible, fully automated test

system is required, then a decision remains as to whether to buy one of the

many commercial test systems now available, or to assemble your own. Almost

all of the commercial systems make use of the COMPARISON METHOD for D/A

converters, and the FEEDBACK METHOD for A/D converters, and are generally

suitable for testing converters of up to at least 12 bits of resolution.

References

1. D.R. Flach, "Characterization of Waveform Recorders," NBS Special Publication Proceedings of the Digital Methods in Waveform Metrology Seminar,

Oct. 18-19, 1983.

2. H.K. Schoenwetter, "Settling Time Measurements," NBS Special Publications

Proceedings of the Digital Methods in Waveform Metrology Seminar,

Oct. 18-19, 1983.

3. J.R. Naylor, "Testing Digital/Analog and Analog/Digital Converters," IEEE

Trans. Cir. & Syst., Vol. CAS-25, No. 7, July 1978.

83
References (cont.)

4. S.K. Tewsksbury, et.al., "Terminology Related to the Performance of S/H,

A/D and D/A Circuits," IEEE Trans. Cir. & Syst., Vol. CAS-25, No. 7, July

1978.

5. J.J. Corcoran, et.al., "A High-Resolution Error Plotter for

Analog-to-Digital Converters," IEEE Trans. Instrum. Meas., Vol. IM-24,

Dec. 1974.

6. D. Sheingold, ed . , Analog-Digital Conversion Handbook, Analog Devices,

Norwoord, MA, 1972.

7. T.M. Souders and J. A. Lechner, "A Technique for Measuring the Equivalent

RMS Imput Noise of A/D Converters," IEEE Trans. Instrum. Meas., Vol.

IM-29, Dec. 1980.

8. T.M. Souders, et.al., "A Calibration Service for Analog-to-Digital and

Digital -to-Analog Converters," NBS Tech Note 1145, July 1981.

9. T.B. Williams, "The Calibration of a DAC Using Differential Linearity

Measurements," IEEE Trans. Instrum. Meas., Vol. IM-31, Dec. 1982.

10. T.M. Souders, "A Dynamic Test Method for High-Resolution A/D Converters,"

IEEE Trans. Instrum. Meas., Vol. IM-31, March 1982.

11. T.M. Souders, et.al., "An Automatic Test Set for the Dynamic

Characterization of A/D Converters," IEEE Trans. Instrum. Meas., Vol.

IM-32, March 1983.

12. S. Max, "Testing High-Speed Analog-to-Digital Converters," Electronics

Test, Jan. 1982.

13. B. Peetz, "Dynamic Testing of Waveform Recorders," IEEE Trans. Instrum.

Meas., Vol. IM-32, March 1983.

14. M. Neil and A. Muto, "Tests Unearth A-D Converter's Real-World

Performance," Electronics, Feb. 24, 1982.

15. D.P. Burton, "Checking A/D Converter Linearity Without a Precision

Reference, Statistical Technique Finds Missing Codes Quickly," Analog

Devices Analog Dialogue, 13-2, 1979.

16. J. Mattern, "A Multipurpose Test Set for A/D Converters," Proceedings of

1980 GOMAC Conference.

17. D. Flach, "Steady State Tests of Waveform Recorders," NBS Special

Publication 634, Proceedings of the Waveform Recorder Seminar, June 1982.

18. G. Pretzl, "Dynamic Testing of High-Speed A/D Converters," IEEE J. of

Sol id-State Circuits, Vol. SC- 13, June 1978.

84
References (cont.)

19. M. Mahoney, "Automated Measurement of 12 to 16-bit Converters," Digest of

1981 International Test Conference, IEEE Computer Society Press.

20. E.A. Sloane, "A System for Converter Testing Using Walsh Transform

Techniques," Digest of 1981 International Test Conference, IEEE Computer

Society Press.

85

SETTLING TIME MEASUREMENTS

Howard K. Schoenwetter

Electronic Instrumentation and Metrology

Electrosystems Division

National Bureau of Standards

Gaithersburg, MD 20899

1. Introduction

Methods of measuring device settling times (STs) from 5 ms to less than

20 ns with corresponding accuracies of 1 ppm and 0.1% are described in this

paper. Most of these methods are thought to represent state-of-the-art

techniques, developed at NBS and in industry. Some of the ST measurement

methods discussed are described in a March, 1983 paper [1]. Only a brief review

of these methods will be given, showing only the salient features. Some of the

NBS work has been concerned with measuring thermally induced transients and

offsets in devices under test (DUTs). Methods of measuring these effects with

ST measuring circuits are described.

2. Performance Criteria

Settling time (ST) is an important measure of the dynamic performance of

D/A converters (DACs), operational amplifiers, precision voltage-step

generators, analog multiplexers, and progammable power supplies. Settling time

for these devices can be defined as follows (see figure 1). Following a prescribed input change, usually full-scale range (FSR), the settling time of

the device is the time required for the output to reach and remain within a given error band whose center coincides with the final value. The settling

error is equal to 1/2 the error band. For DACs, the error band is usually ±1/2

of a least significant bit (LSB). Note that part of the settling time is the

time interval t 2

- ti, the delay of the output relative to the input. This

definition is also applicable to voltage step generators, triggered at time

ti. In some applications, the time interval t 2 - ti may be neglected, e.g.,

when a fast DAC or voltage-step generator is used to provide the stimulus for

measuring the ST of an amplifier or the response of a waveform recorder.

An additional measure of the dynamic performance of these devices is the

thermally induced transients and offsets caused by changes in repetition (or

switching) rate, duty cycle, and output amplitude. These effects, as well as ST, cause the device accuracy to be different under severe dynamic conditions

than under, say, quasi-static conditions.

3. Measurement Methods

3.1. Settling Time Circuit Problems

Common problems encountered in designing ST measuring circuits and systems

are

87

(1) Overdrive of the ST circuit or oscilloscope connected to the output

of the ST circuit,

(2) Thermally induced transients and offsets, caused by self-heating of

components -- particularly transistors,

(3) Capacitive loading of the ST circuit, caused by an oscilloscope,

connectors, cables, etc., and

(4) Insufficient gain-bandwidth of the ST circuit or associated

osci 1 loscope.

These problems are not mutually exclusive. For example, increasing the

bandwidth or using an active probe (or other buffer) to minimize capacitive

loading usually increases thermal transients and offsets, and improving the

voltage or current limiting to decrease circuit or oscilloscope overdrive may

decrease gain-bandwidth.

If items (1) and (2) are very small, the ST measuring system can be used to measure thermally induced transients and offsets in the DUT. Also, if (1) and

(2) are very small, items (3) and (4) largely determine the settling time Tt

of the ST measuring system itself. Methods used to minimize the four types of

problems listed above and the possible tradeoffs will be discussed in the

following sections.

Use of a Schottky diode voltage-step generator to measure the settling

time, including thermal effects, of ST measuring circuits is described in [1].

A step generator of this type is useful in determining the magnitude of each of

the above problems. (Also, see reference 2 for a discussion on this type of

pulse generator.)

3.2. Settling Time of the Test Circuit

In general, the ST of the test circuit (Tt) is not small enough to be

ignored when measuring Tj, the ST of a DUT. However, if Tm is the observed

settling time, i.e., the combined ST of the test circuit and the DUT, the value

of Td can usually be approximated by either

or

T

d

" V - T

t

2 (D

T. * T - T. . (2)

d m t The last relationship applies if the settling of the test circuit largely

follows the DUT settling, rather than occurring simultaneously.

3.3. High Resolution Settling Time Measurements

The most detailed "real-time" examination of voltage steps can be made

using a wide-band oscilloscope with a sensitive vertical amplifier.

Oscilloscopes designed for real-time measurements are available with maximum

vertical deflection sensitivities ranging from 10 yV/cm to 2 mV/cm.

Corresponding bandwidths are typically 1 MHz and 200 MHz. Deflection

89
sensitivities as high as 20 - 50 uV/cm are useful for settling time

measurements. Since the voltage step illustrated in figure 1 can be as large as 20 V, devices for measuring settling time often employ a biased voltage divider

to shift level V2 to near zero potential and use various circuits to limit the

output signal prior to the voltage transition. This shifting and limiting

ideally permits accurate measurement of voltage variations near the V2 level and

avoids overdrive of the oscilloscope prior to the transition.

These techniques are represented generically by Circuit A of figure 2. In addition to the voltage limiting at terminal p, this type of circuit further

limits the voltage applied to the oscilloscope through use of either (or both)

series current or shunt voltage limiters. A number of circuits used in industry

employ this technique (e.g., see [3], [4]). NBS has used versions of this

circuit to measure settling times in the range of 50 ns to 1 ms with

corresponding settling errors of ±50 ppm and ±2 ppm of 10 V FSR. Circuit B employs carefully timed gate pulses which close switch S after voltage Vn has

settled to within several millivolts of 0 V. Diode bridge or transistor

switches are usually used for this circuit [5], For both circuits, time ti

represents the start of the negative voltage transition from the device under

test (OUT) and t 2 is the time when the voltage enters the selected error band

(not shown).

Before discussing detailed applications of these techniques, it should be

mentioned that Circuits A and B can be dispensed with if the variable dc

reference is replaced with a square wave generator whose output levels

complement the DUT output levels [6]. This technique minimizes voltage Vp

sufficiently to permit a direct connection to an oscilloscope. However, the ST

measurement accuracy tends to be reduced by the generator waveform

imperfections.

An ST circuit which incorporates both circuit techniques of figure 2 into

its design is shown in figure 3. This circuit was designed to measure DAC

settling times in the 1-5 ms range to within a settling error of ±2 ppm of 20 V FSR. This circuit was also required for measuring the settling time of the

voltage step generator employed in the NBS Data Converter Test Facility to

dynamically test A/D converters [7], The circuit basically consists of the

following: 1) a precision voltage divider for comparing input signal levels,

V2, up to ±10 V with reference voltages, Vr , of the same nominal magnitude but

of opposite polarity; 2) a wide-band amplifier (AR1), which has a gain of 10 for

very small values of |V s (t) + Vr divider center tap; and 3) trans

, for amplifying the signal output from the

stor series and shunt switches (Si and S2),

which connect the oscilloscope to either the amplifier output or signal ground

(0 V), respectively. These switches are controlled by a window comparator which senses the magnitude of the output voltage from the amplifier, thus avoiding

overdrive of the measuring device by excessively large signals. Switch SI

closes and S2 opens when the magnitude of the voltage at node d decreases to

~10 mV. Use of AR1 permits a relatively low sensitivity (1 mV/cm), wide

bandwidth (100 MHz) oscilloscope to be used.

The next circuit (figure 4) was designed to work with very sensitive

oscilloscopes without causing overdrive. It can be used to measure settling

times as small as 5 ms to a settling error of ±1 ppm of 20 V FSR. The amplifier

is used to limit the signal to the oscilloscope during the time intervals when

the signal is not being viewed. If the settling time following the DAC voltage

1 The circuits shown in figures 3, 4, 5, 8, 9, 14, and 15 were developed at NBS.

More information may be obtained on these circuits from [1], or by contacting

the author.

90
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Figure 3. Circuit for measuring settling times in the 1-5 us range to a settling error of ±2 ppm of 20 V FSR.

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transition from Vi to V 2 is to be examined, and reference voltage \l i (opposite

in polarity to V 2 ) is adjusted so that |V 2 is slightly larger than IvJ, the

the circuit operation is then as follows: 'Prior to the positive voltage step,

Dl and D2 conduct. Diode D2 holds terminal q within microvolts of ground

potential, and Dl holds terminal p within a few millivolts of ground. After

V s (t) makes the transition to V 2 , the output of the amplifier swings negative,

reverse biasing Dl and D2. Thus, terminal p is isolated from the amplifier

circuit, leaving only resistance in the signal path to the oscilloscope. To

view negative going steps, the switch is changed to position 2. The

oscilloscope most suitable for use with this circuit had a bandwidth of 1 MHz

and a sensitivity ranging up to 10 uV/cm. (A 50-100 uV/cm sensitivity was usually used.) This test circuit was used to measure the settling time and

recovery time effects of the NBS DAC-18 (18 bit D/A converter standard)[8], now used as a check standard for the NBS Data Converter Test Facility [9]. The

circuit has also been used to test a number of commercial 16- and 18-bit DACs.

A sensitive analog comparator, designed for a special application to detect

input imbalances as small as ±1.5 mV [10], can also be used as a very sensitive

ST measuring circuit. The measured settling time T^ of this comparator with

minimum noise filtering is 15 ys, to a settling error of ±0.4 ppm of 20 V FSR.

3.4. High Speed Settling Time Measurements

The remainder of this paper will be used to describe high speed ST test

circuits. In most of these circuits, the ST measuring circuit is packaged in a small shielded container having a male BNC output connector that can be

connected directly to the oscilloscope (or other measuring device) input

connector, without the use of a coaxial cable. The effect of interconnecting

cable attenuation will be shown in a later section.

A high speed ST circuit with current and voltage limiting is shown in

figure 5. The bridge circuit and "zero bias" diodes D7 and D8 (or D9 and D10)

function as current and voltage limiters, respectively. The maximum bridge

output current is ±50 uA and the maximum voltage developed across D7 or D8 is

~±50 mV. The zero bias diodes are special high frequency Schottky diodes

designed to rectify at very low signal levels. The purpose of buffer Q1-Q2 is

to minimize the effect of oscilloscope capacitance. Transistor Q2 is used to

shift the output voltage to approximately the input voltage level of Ql. If the

wide-band amplifier AR1 is used instead of buffer Q1-Q2, the gain for the DUT

input is increased from 2/3 to 2. Gain is determined by changing the reference

voltage a known amount and measuring the output voltage change. With the Q1-Q2

buffer, this circuit can be used to measure STs as small as 50 ns to within

±0.01% of 10 V FSR. With AR1, STs as small as 70 ns can be measured to ±0.02%

of 2 V FSR. The maximum measured self-heating effect of these circuits is

approximately ±0.3 mV, referred to the input.

Figure 6 shows some types of current limiters that have been employed in ST

measuring circuits. Maximum computed self-heating effects, using discrete

transistors and diodes, is in the order of ±0.02, ±2 and ±10 mV (referred to the

input) for circuits (A), (B), and (C), respectively. The corresponding

ST-measuring capabilities range roughly from 50 ns to 15 ns. Circuit (C) is

usually cascaded with a complementary stage for additional gain and to shift the

output voltage level to ~0 V.

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Maximum computed thermal effects referred to input, using discrete

transistors and diodes, is in the order of ±0.02, ±2, and ±10 mV,

for circuits in figures (A), (B) and (C). ST-measuring capability

ranges (roughly) from 50 ns to 15 ns.

96
The use of a coaxial cable for interconnections can be a source of error in

ST measurements. If the DUT is connected to the ST measuring circuit with an unterminated cable, cable capacitance or voltage reflections may increase the

ST. If the cable is terminated in its characteristic impedance, high frequency

attenuation will affect the ST measurement. Figure 7(a) shows the settling of a +5 V to -5 V transition from a state-of-the-art 12-bit DAC, using the

measurement circuit shown in figure 5 (with buffer Q1-Q2). The lowest trace is

the digital input to the DAC and the upper three traces (from bottom to top)

are the ST circuit outputs for:

(1) A direct connection between DAC and ST circuit (no cable) and using

a high impedance termination

(2) Same as (1), except that a 50 il termination is used and

(3) Two feet of RG-58/U cable, terminated in 50 n, is used to

connect between the DAC and the ST circuit.

The measurement sensitivity for these three traces was 0.1%(of 10 V FSR)/cm. It

is seen that high frequency attenuation in the terminated cable increases the

settling error by approximately 0.07% and 0.04% at 200 ns and 300 ns,

respectively, after the digital input to the DAC. The measurements were repeated using a peak detector with a 0.15%(ofl0 V FSR)/cm sensitivity (see

figure 7(b)). High frequency attenuation in much longer transmission lines is

treated in reference 11. The peak detector is described in a later section.

3.4.1. Current Output Devices

Current-output devices generally have a smaller ST and a smaller output

voltage than voltage-output devices. Wide-band amplification is sometimes

employed in Circuit A of figure 2, increasing the sensitivity sufficiently for

ST measurements of current-output devices. (The DUT is connected directly to

terminal p.) STs as short as 35 ns to within ±0.012% of 10 mA FSR have been

reported using this technique [12]. Another type of test circuit for measuring

the ST of current-output devices is shown in figure 8. The circuit employs a current-balancing technique to minimize the voltage applied to the

oscilloscope. Switches SI and S2 are in position 1 prior to time ti, and in

position 2 after ti. Thus, the current in R|_ is essentially zero except for

the time interval between ti and t2 when the DUT output current is settling.

This technique is applied to the testing of a 12-bit DAC in figure 9. The

TTL-to-ECL translator is used to switch the test DAC between all bits off to all

bits on. The translator also supplies the drive current for transistor Q, which

is turned off when the DAC bits are turned on. Turning Q off transfers I 2 from

D3 to D4. Currents Ii and 1 2 are adjusted to be approximately equal to the DAC

current with all bits on. Therefore, the value of V|_(t) at the output is

approximately 0 V before and after switching I2. The intervening switching

transient can be adjusted for minimum average value by the delay adjustment.

Since thermal effects are negligible in this test circuit, it is well suited to

measuring recovery time effects in the DUT. A unity-gain FET probe can be used

to reduce the capacitive loading at the output to 3 pF. Thermal effects in the

probe can be isolated from those of the DUT [1].

97
(b)

Figure 7. ST measurements for a 10 V transition from a voltage-output DAC.

The sweep speed is 100 ns/cm. A limiter type of ST circuit with

±0.1%(of 10 V FSR)/cm sensitivity was used for Fig. 7(a); a peak

detector with ±0.15%(of 10 V FSR)/cm sensitivity was used for Fig.

7(b). The upper two traces are for a 50 n termination using V of

cable and no cable, respectively. The lowest of the three traces was for a high impedance termination.

98
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3.4.2. Comparator Circuits

Window comparators have been used to measure the ST of very high speed 6

and 8 bit current-output DACs [13]. These comparator circuits have also found

application in automatic systems for measuring the ST of higher resolution

voltage-output DACs [14]. These "real-time" measuring circuits have resolutions

of 2-3 mV, typically. "Equivalent-time" measuring circuits, employing a sampling comparator, have been used recently to measure STs of approximately

5 ns to within 100 mV in the test of 8-bit video DACs [15]. Similar

sensitivities have been obtained using this kind of circuit for testing 12-bit

DACs with STs of approximately 35 ns [16].

The basis for these equivalent time circuits is the sampling voltage

tracker (SVT) for analyzing periodic signals [17]. The SVT consists of a high

speed sampling comparator and a voltage integrator in a feedback loop, and can

be represented as shown in figure 10. The strobe pulses, 5 to 10 ns wide, cause

the input waveform f(t) to be sampled (compared with the output voltage Vn, of

the integrator) at instants in time coinciding with the trailing edges of these

pulses. Assume that the period of f(t) is T and that the value f ( t i

) is to be

measured. Then, the strobe pulses must be timed to sample f(t) at times t l9

ti + T, ti + 2T, , etc. If, at the instant of a sample, f(t)> Vq, the

output of the comparator Vc (t) changes to the low state (-1.75 V) and Vn, slowly ramps more positive. If f(t)< Vn, Vc (t) changes to the high state

(-0.85 V) and Vn slowly ramps more negative. The result of these comparisons

is to drive Vq positive or negative until it nearly equals the amplitude of

f(+) at the instants of comparison. When Vn - f ( t i ) , the duty cycle of

V c (t) is ~50% and Vn successively ramps up and down about an average value

of f ( t i

) . The peak-to-peak value of these ramps is approximately 0.45T/RC and,

except for noise and offset errors in the comparator, the correct value of f ( t i

)

lies within the peak values of Vn. Time constant RC is made sufficiently

large to yield an acceptable uncertainty in Vn. If some other value of f(t),

say f(t2), is to be measured, f(t) must be sampled at times tz, tz + T, tz + 2T,

, etc.

In figure 11, the SVT is employed in a system for characterizing DUT output

voltage transitions, including the measurement of ST. The DUT may require a digital input or an analog input (e.g., voltage steps). The delay generator is

used to time the strobe pulses, relative to the input signals to the DUT. The

delay of the strobe pulses can be made in increments as small as 50 ps. The

input voltage range of the comparator is ±3 V, and the RC time constant of the

integrator has been set to 0.1 s. This system has been used to characterize the

programmable NBS step generator, designed for testing waveform recorders [18].

Figure 12 shows a plot of a -3 V to +3 V transition of the generator, in which

sampling delay increments of 0.5 ns were used. It appears that the measurement

system is capable of characterizing step-like waveforms as well as yielding the

ST to various settling errors: however, it is currently difficult to assign

uncertainties to these measurements. —3.4.3 Other Circuits

y Figure 13 shows the output from a peak detector, used to measure the ST of

a 6 V negative step (+1 V to -5 V) from the NBS step generator. The vertical

sensitivity is 0.15%(of 6 V FSR)/cm and the sweep speed is 10 ns/cm. The peak

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rt3 <u =C S CD o

-aa

x:

CD

cn

107
detector used for this measurement, and those shown in figure 7(b), is

illustrated in figure 14. The input voltage level following a transition is

adjusted to exceed the sum of the battery voltage and diode forward drop by

50 - 80 mV (typically). Thus, the input voltage level is selectable in

increments of ~1.5 V.

Voltage steps up to ±10 V are desirable for testing non-inverting

operational amplifiers and many other high input impedance devices. Schottky

diode voltage-step generators, mentioned previously, are a means of generating

voltage steps with magnitudes up to 10 V; however, these generators produce

steps to a final level of 0 V. Hearing aid batteries, packaged as shown in

figure 14 (without the diode and resistor) can be used as shown in figure 15 to

generate positive or negative voltage steps in increments of ~1.5 V.

4. Conclusion

For many years, settling time measurements have been employed to measure

the STs of DACs, operational amplifiers, and certain other devices to within

approximately ±0.1% (of FSR) of the final value. More recently, it has been

necessary to characterize a much larger part of voltage transitions (than, say,

the last 0.1%) from voltage-step generators, so that these devices can be used

to test waveform recorders. Sampling oscilloscopes and SVTs have been used for

these measurements. Since it is currently difficult to assign uncertainties to

the measured transition voltages (V(t)), when dV/dt is greater than about

1000 V/us, it is expected that efforts will increase to improve the accuracy of

these measurements.

References

1. H. K. Schoenwetter , "High Accuracy Settling Time Measurements,"

IEEE Trans. Instrum. Meas., Vol. IM-32, No. 1, pp. 22-27, March 1983.

2. J. R. Andrews, B. A. Bell, N. S. Nahman, and E. E. Baldwin,

"Reference Waveform Flat Pulse Generator," IEEE Trans. Instrum. Meas.,

Vol. IM-32, No. 1, pp. 27-32, March 1983.

3. J. R. Naylor, "Testing Digital/Analog and Analog/Digital Converters,"

IEEE Trans. Circuits and Syst., Vol. CAS-25, pp. 526-538, July 1978.

4. Teledyne Philbrick Product Guide and Applications Manual, Model 1430

Amplifier, Dedham, MA, 1982.

5. A. G. Perrey and H. K. Schoenwetter, "A Schottky Diode Bridge Sampling

Gate," Nat. Bur. Stand (U.S.). Tech. Note 1121, May 1980.

6. D. H. Sheingold, Ed., Analog-Digital Conversion Notes, Norwood MA:

Analog Devices, Inc., 1980, pp. 207-211.

7. T. M. Souders, D. R. Flach, and T. C. Wong, "An Automatic Test Set For

the Dynamic Characterization of A/D Converters," IEEE Trans. Instrum.

Meas., Vol. IM-32, No. 1, pp. 180-186, March 1983.

8. H. K. Schoenwetter, "A High-Speed Low-Noise 18 Bit Digital -to-Analog

Converter," IEEE Trans. Instrum. Meas., Vol. IM-27, No. 4, pp. 413-417,

Dec. 1978.

108
References (cont.)

9. T. M. Souders, D. R. Flach, and B. A. Bell, "A Calibration Service for

Analog-to-Digital and Digital -to-Analog Converters," Nat. Bur. Stand.

(U.S.) Tech Note 1145, July 1981.

10. H. K. Schoenwetter, !, A Sensitive Analog Comparator," IEEE Trans. Instrum.

Meas., Vol. IM-31, No. 4, pp. 266-269, Dec. 1982.

11. W. L. Gans and N. S. Nahman, "Shielded Balanced and Coaxial Transmission

Lines Parametric Measurements and Instrumentation Relevant to Signal

Waveform Transmission in Digital Service," Nat. Bur. Stand. (U.S.) Tech.

Note 1042, June 1981.

12. Burr-Brown, "DAC 63, Ultra-High Speed Digital -to-Analog Converter,"

Specifications and Applications Information, Tucson, AZ, 1981.

13. Analog Dialogue, Vol. 15, No. 2, pp. 5-6, 1981.

14. J. A. Wheal ler, "A New Technique for Testing Settling Time in a Production Environment ," in Dig. 1981 Int. Test Conf. (Philadelphia, PA,

Oct. 1981).

15. R. R. Castleberry and C. L. Robertson, "One-Chip DAC Delivers Composite

Video Signal," Electronic Design, pp. 105-112, Sept. 1981.

16. J. Halpert and M. Koen, "A Waveform Digitizer for Dynamic Testing

of High Speed Data Conversion Components," in Dig. 1983 Int. Test

Conf. (Philadelphia, PA, Oct. 1983).

17. S. P. McCabe III, "A Sampling Voltage Tracker for Analyzing High

Speed Waveforms," M.S. Thesis, U. of CA, 1975.

18. H. K. Schoenwetter, "A Programmable Precision Voltage-Step Generator

for Testing Waveform Recorders," IEEE Trans. Instrum. Meas., Vol. IM-33,

no. 3, pp. 196-200, Sept. 1984.

109
APPENDICES

110
AN AUTOMATIC AC/DC THERMAL VOLTAGE CONVERTER

AND AC VOLTAGE CALIBRATION SYSTEM *

K. J. Lentner, D. R. Flach, and B. A. Bell

Abstract

An automatic ac/dc difference calibration system is described

which uses direct measurement of thermoelement emfs. In addition to

ac/dc difference testing, the system can be used to measure some important characteristics of thermoelements, as well as to calibrate

ac voltage calibrators and precision voltmeters. The system

operates over a frequency range from 20 Hz to 100 kHz, covering the

voltage range from 0.5 V to 1 kV. For all voltages the total

measurement uncertainties expected (including the uncertainty of the

specific reference thermal converters used) were 50 parts per

million (ppm) at frequencies from 20 Hz to 20 kHz, inclusive, and

100 ppm at higher frequencies up to 100 kHz. The results of initial

intercompari sons between the new system and the manual NBS

calibration system, using single-range, coaxi al -type, thermal

voltage converters as transfer standards, are reported. The results

show that the agreement between the two systems is better than the

uncertainties originally expected, since the i ntercompar i son of

ac/dc differences differed by no more than 15 ppm.

Keywords: ac/dc difference; ac voltage measurement; automation;

calibration; metrology; thermal voltage converter.

1. Introduction

Until recently, techniques for performing precision ac/dc difference

measurements generally made use of manual testing methods which utilize

photo-cell preamplifiers and light-beam galvanometers as vot^ge detectors, in

conjunction with manually balanced voltage comparators [1,2] . Careful

attention to the reduction of systematic and random uncertainties in

measurement methods, thermoelements (TEs), and thermal voltage converters

(TVCs) has resulted in sufficient confidence in test data to allow results to

be reported with total uncertainties at the 10-100-ppm level (or better, in

special cases) over wide voltage and frequency ranges [3,4]. These manual

test methods, however, are very time consuming and subject to errors due to

operator fatigue and lack of skill. More recent work [5,6] overcame some of

the deficiencies of manual test methods. However, the referenced systems

still require the use of a TE voltage comparator which is not available

commercially. Because of its special design, the comparator adds to a system's cost and complexity.

Stringent requirements are placed on the measurement system to resolve

low-level voltages (about 10 nV), and to overcome the effects of large

temperature coefficients and dc reversal differences of the TEs, as well as instabilities of the voltage sources. However, with the advent of stable and

* Extracted from NBSIR 84-2973, Final Report to the Calibration Coordination

Group of the DoD, November, 1984.

Al
accurate analog voltage amplification techniques in combination with digital

electronics, digital voltmeters are available with sufficient stability,

linearity, resolution, and accuracy to meet the requirements of automated

ac/dc difference measurements. Programmable ac and dc voltage sources also

are available which lend themselves to adaption for automatic testing.

Advances in analog/digital interfaces have improved the ease with which

computers can be used to control these instruments.

The system to be described in this report was designed to overcome the

deficiencies of present test methods by taking advantage of the technological

advances described above. Specifically, some objectives were to: 1) utilize a desktop computer; 2) use commercially available programmable instruments

whenever possible; 3) eliminate as much operator intervention as possible in

order that testing could be done completely automatically at one fixed voltage

range of the test unit; 4) eliminate the additional cost and complexity of

using a TE voltage comparator; 5) use test procedures which assure that the

test TE's output emf is held as constant as possible; 6) eliminate the effects

of operator fatigue and lack of skill; and 7) achieve about the same level of

uncertainty as is presently possible for general purpose ac/dc difference

manual testing methods.

The system operates over a frequency range from 20 Hz to 100 kHz,

covering the voltage range from 0.5 V to 1 kV. For all voltages the goal was

to achieve total measurement uncertainties (including the uncertainty of the

reference TVCs used) of 50 ppm at frequencies from 20 Hz to 20 kHz, inclusive,

and 100 ppm at higher frequencies up to 100 kHz. In addition to performing

ac/dc difference tests, the system can be used to calibrate ac voltage

calibrators or precision ac voltmeters. Furthermore, as will be discussed

later, automatic measurements of a TE's dc reversal difference, response time,

and the value of the exponent "n" in the expression relating a TE's heater

current and output emf can also be made.

2. Technical Approach

2.1 System Hardware

The new system differs from most present techniques for ac/dc difference

measurements in that no TE voltage comparator is used. Eliminating the

comparator places additional requirements upon the stability of the system's

ac and dc voltage sources, the digital voltmeter (DVM) which measures a TE's

output emf, and the switches which select a TE voltage to be measured by the

DVM. The hardware development problem of obtaining low-thermal-emf-switches

which could be automatically controlled was solved during previous work [5].

Manually operated low-thermal-emf-switches were modified by linking them to

solenoids with 24-V operating coils energized by means of programmable relays.

TE voltages of about 10 mV must be measured to within about 10 nV to

achieve 1-ppm comparison precision, and the DVM used to measure these voltages

has the resolution necessary to make such a voltage measurement when extensive

averaging of data is used. The DVM has an input resistance of about 10 a 60-Hz common mode voltage rejection >40 dB, and a dc common mode voltage

rejection > 150 dB. On its most sensitive range (10-mV), the peak-to-peak

low-frequency noise (dc to about 10 Hz) of the DVM, with its input shorted,

was measured to be about 50 nV.

A-2
The dc voltage source has 10-V, 100-V, and 1-kV ranges with six-digit

voltage setting capability on each range. Its specified accuracy is 50 ppm of

setting to 10-V, and 100 ppm above 10-V. The ac voltage source also has

six-digit voltage setting capability for voltage ranges of 1-V, 10-V, 100-V,

and 1-kV, with specified accuracies in the range of about 0.02 percent to

0.1 percent, depending on the voltage and frequency ranges. Some typical

results of stability tests made on these sources will be discussed later.

A block diagram of the system is given in Fig. 1, and an overall view of

the system hardware shown in Fig. 2. The desk-top computer serves as the

system controller and has about 60 kbytes of user-available memory. Magnetic

tape cartridges are used for program and data storage. A video display

terminal (CRT) is used for data display during testing and also serves as an aid during software development. Since the computer only has three

input/output slots, an I/O expander is needed to accomodate the required

instrumentation. The real-time clock is used for precise control of the time

interval between applications of ac or dc voltages during a test, and the

printer and plotter provide test records.

As indicated in Fig. 1, communication between the computer and the

stimulus and measurement instrumentation is via the IEEE 488 bus. The digital

panel meters (DPMs) monitor the voltage outputs from the dc and ac sources. During testing, readings of both the dc and ac source's output voltages are obtained by the DPMs. These voltage readings are made before the voltages are applied to the test circuit. If the measured voltages differ by more than

0.5 percent from the programmed values, the test is automatically aborted.

High accuracy in these voltage readings is not necessary, since TVCs can readily withstand an applied voltage which is 120 percent of rated value. For

the ac source, the output voltage is attenuated by a factor of 100 before

being connected to the DPM. The attenuation is necessary in order to overcome

the voltage-frequency product limitation of the DPM. The counter shown in

Fig. 1 monitors the frequency of the ac source. If the counter reading

differs by more than about 10 percent from the programmed frequency, the test

is automatically aborted. The relay actuator is used to apply 24-V dc to the

operating coils of the high-voltage relays as well as^o the coils of the

solenoids which operate the low-thermal -emf switches. These switches select

the output voltage of the standard TE (E s ) or the unit-under-test TE

(Et). The voltages, E

s and Et, are applied directly to the input of the

DVM, and the DVM voltage readings are then stored in the computer's memory for

later processing.

2.2 AC/DC Difference Test Procedure

One of the advantages of using a TE voltage comparator is that, since

small differences in the ratio of two TE emfs are measured directly, the

output emf of the test TE can be allowed to drift slightly from its reference

emf value when ac, +dc, or -dc voltages are applied [2,6]. In this new system, since no TE voltage comparator is used, the requirement for holding

the test TE's emf constant is quite stringent. However, with automation and

the rapid response time of the voltage sources (typically 50 ms

Construction details of the high-voltage relay and low-thermal -emf modules

can be found in [7].

A-3
J

DESK TOP

COMPUTER

1 I/O SLOTS 3

RS-232C

I/O EXPANDER

SLOTS

1 2 3 4 5 6 7

Tf3 ^

p;

16 BIT

PARALLEL

REAL

TIME

CLOCK

PRINTER

488

BUS #2

rim

RELAY

ACTUATOR

488

BUS #1

I

AC DPM SOURCE "1

!

Ac

0

DC + jSl

vl

DC- \ •

\

1 HIGH VOLTAGE RELAYS

STD LOW-THERMAL-EMF

SWITCHES

R <

t

DIGITAL DATA &

CONTROL LINES

ANALOG SIGNAL LINES

Figure 1. System block diagram

A-4

for the dc source and a few milliseconds for small voltage changes for the ac source), the constant output requirement can be readily satisfied. The

techniques used will be discussed in this section.

For a TVC with response defined by E = KVn

, where E is the output emf

of the TE in the TVC, V is the voltage applied, and K and n are parameters

characteristic of the particular TVC, the ac/dc difference is defined as

(1)

V - V . 6 =

a d '

where V a is the applied ac voltage, and Vd is the average of the two

polarities of dc voltage; i.e.,

V

d

= ~2 ' (2)

V a , V+, and V_ are voltage values which give the same output emf of the

TE. In a manual test system using a TE voltage comparator, the voltage

difference, V a

- Vj, is determined by a second TVC, the standard. If the

standard's response is defined as

E = K V , (3)

s s s *

v

'

it can be shown [2] that the ac/dc difference of the test TVC is

E ca - E . AE

6^ = sa

c sd + 6 = ! + 6 1 n

s E sd

s n

s

E sd

s

' (4)

where E sa is the standard TE's emf when the voltage V a is applied,

E S(j is the standard TE's average emf when voltages V+ and V_ are applied

(cf. eq. 2), n s is the standard's dimensionless characteristic n, and <S S is the ac/dc difference (in ppm) of the standard determined as described in

[1,2]. Equation 4 is numerically correct if dE s is in nanovolts, E scj in

millivolts, and the "<5's" are im ppm. During a test, V a , V+, V_, and

V a are adjusted until the same emf of the test TVC is obtained in each case when these voltages are applied in sequence.

In the automated system the test TVC's output emf is held constant in

the following manner. With the nominal dc voltage applied to the test TVC,

an output emf, E se t, is measured which is called the "set-point" voltage.

In all subsequent applications of ac and dc voltages to the test circuit of

A-G
Fig. 1 the computer is used to adjust the voltage applied so that the test TVC

has an output very nearly equal to E se t« A four-step procedure is used for

making ac/dc difference measurements. The procedure consists of applying a sequence of ac, +dc, -de, and ac voltages to both TVC's at approximately equal

time intervals. The following operations are performed for each step in the

procedure presently used with the system.

First, the nominal ac or dc voltage is applied, the test emf, Et, is

measured, and a difference voltage, dEt, is calculated as

dE

t

E set " Et

• < 5 >

If the difference voltage is not sufficiently small, as discussed below, a voltage correction, dVt, is calculated from

dE

t /nt

E

t

- d V\ • < 6 >

Hence,

dV

t

< dE

t /n

t

E t> v

t

• < 7 >

The correction, dVt, is added to the nominal voltage, Vn , and a "reset"

voltage, Vr

= Vn + dVt, is applied. The test emf, Et, is measured

again, and a second voltage correction, dV2, is calculated using equations 5 and 7. The output emf of the standard TE, E s , is now measured. A

correction for the emf of the standard TE, dE s , is calculated, using dV2

to compensate for any deviation of the actual emf of the test TE from the set

point E set ; i.e.,

dE

s - <"s

E

sdV 2> /Vr

• < 8>

The corrected emf for the standard TE is then

E sl=Es+ dE

s

. (9)

A-7
A discussion of the exact measurement procedure used is given below.

After completing the sequence of four steps by applying successively ac, +dc, -de, and ac voltages, the ac/dc difference of the test TVC, <5t> 1S

calculated as

\ - k^r + V < lu > s sd

where E a is the average of the standard's corrected emfs determined for the

two applications of ac voltage; E scj, n

s

, and 6

S are as defined in

equation 4; and E(j is

Ed = fsli*fslz , (li)

where E s i + is the corrected emf calculated as in equation 9 when +dc is

applied, and E s i_ is the corrected emf when -de is applied.

In the computations previously discussed, account is taken of the finite

resolution of the ac and dc voltage sources. The voltage setting remains

unchanged if the output emf of the test TVC is close enough to the set-point

voltage (E set) that a least-significant-digit change in the voltage in the

voltage source's output will provide no decrease in the magnitude of the

calculated difference, dEtA test run consists of four determinations of ac/dc difference and the

average of the four determinations is calculated and printed on the system's

printer. In general, three runs are normally made at each test voltage and

frequency.

In order to increase the reliability of the emf measurements made by the

DVM, and, therefore the reliability of the results, a unique measurment

procedure is used. The procedure is necessary to compensate for instabilities

in the ac or dc voltage sources or linear drifts in the standard or test

TVCs. After the dc reset voltage Vr has been applied to the test TVC, five

readings of its emf are obtained as illustrated in Fig. 3. The standard's

average emf is obtained next by taking ten readings of its TE emf. If the

standard deviation of an observation of the ten readings is > 300 nV, (300 nV

= 17 ppm for a 10 mV TE emf with n = 1.8) the first reading is discarded and

an eleventh reading is taken. The average of readings two through eleven is

calculated and the standard deviation test limit again applied. The process

continues until the average of any ten consecutive readings passes the

standard deviation limit test. Up to ten attempts are made to obtain an average emf value with a standard deviation of an observation <_ 300 nV. The

test is aborted if the tenth attempt is unsuccessful.

A-8
When the ten reading average of the standard's emf is within the standard

deviation test limit, five readings of the test TVC's emf are again obtained.

As illustrated in Fig. 3, the average test TVC's emf is calculated as

where Eti is the average of the first of the five test emfs, and is

the average of the second of the five test emfs. The value of Et obtained

from equation 12 is used to calculate dE s using equations 5, 7, and 8.

As the preceding equations show, the values of the exponent n for both

the test and standard TVCs must be known. The exponent varies with applied

voltage, and its variation can be determined by doing "n-tests." These tests

will be discussed in the next section. For the standard TEs, the coefficents

in the equation expressing the value of n as a function of output emf are stored in a data file in the system software. Once the operator has specified

which standard TE is being used, the standard TE's output emf is measured with

a +dc voltage applied, and the value of n s is automatically computed. The

values of the test TE's coefficients for n must be manually typed into the

computer at the beginning of a test. To guard against mistakes in entering

data, the computed values of n for the test TE must be within the limits 1.4

to 2.1.

An additional safeguard is contained in the ac/dc difference program to

avoid application of voltages great enough to damage the TEs. When the reset

voltage, Vr , is calculated, its value must be less than 120 percent of the

rated voltage of the TVC. If the calculated reset voltage is outside this

limit, the program aborts.

As mentioned above, the system can readily be used to calibrate ac voltage calibrators using TVCs with known ac/dc differences. The output

voltage of the test calibrator replaces the output voltage of the system's ac source, and the test calibrator's correction can be determined in terms of a calibrated dc source and the known ac/dc differences of the standard voltage

converters used.

The correction to the test calibrator (in ppm) is

(12)

2.3 Other System Capabilities

2.3.1 AC Voltage Calibrations

+ 6 + C

dc » (13)

A-9
A-10
where E a is the average of the measured emfs of the TVC with ac voltage

applied, Ed is the average emf with direct voltage of both polarities

applied, n s is as previously defined, 6 S is the correction (in ppm) to the

standard, and Cd cis the correction (in ppm) to the dc voltage source's

nominal output obtained from calibration data. As in the case of ac/dc

difference tests, the correction is in ppm if E a-E,j is in nanovolts and

Ed in millivolts. A simplified block diagram of the system connected for

such an application is shown in Fig. 4.

For ac calibrations a program called ACCAL is used (see Table 4, Appendix

B). As illustrated in Fig. 4, only one TVC is required and, as for ac/dc

difference tests, the ten reading sequence of the TE's output emf is used

(cf. TTS of Fig. 3). However, a different sequence of applying voltages to

the TVC is used. The voltages are applied successively as aci, +dc,

ac2, -dc, and ac3. The standard TVC's n coefficient is calculated using

the TE average output emfs measured with +dc and -dc applied. A first

correction, 6]_, is then calculated using

< E al

+ E a2>

- E

C

2 d+

1 = (14)

where E

d

= ^ ~ » and tne other terms are as defined above. A

second correction is computed as

( E a2

+ E a3)

(15)

and finally, the first average correction, C^i, is computed as

r

C

l +C2

L tl 2

* (16)

A-11
DTC

WITH

PERIPHERALS

488 BUS

RELAY

ACTUATOR

DC

SOURCE

DC

DPM

EXTERNAL

AC

SOURCE

i ———————

DVM LOW - THERMAL

SWITCH

TVC

H V

RELAYS

Figure 4. Block diagram of system when used to calibrate

an external ac source.

A- 12
As for ac/dc difference tests, four determinations constitute a test

run. The average correction Ct of equation 13 is computed as

C t

= (Ctl

+ Ct2+ C t3 + C t4 )/4 + 6 s + C dc . (17)

This measurement technique is very useful also for calibrating precision

ac DVM's. Since a correction, say Ctl, has just been determined for the ac source, the correct ac voltage applied to the standard TVC has just been

determined. With a DVM connected at the input of the TVC, the DVM's reading

can be recorded, and using the correction Ctl, a correction for the test DVM can then be determined.

2.3.2 Stability Tests

To control the variability in the test data, it is important to make sure that the voltage sources are quite stable. Thus, a progam called STABLE was written which uses the system's DVM to measure the stability of the voltage

sources with time. Figure 5 illustrates typical stability test data for the

dc source. At a nominal setting of 10 V, 20 voltage readings were taken over

a time interval of about 20 minutes. The deviation of the measured voltage

(in ppm) from the nominal voltage is defined as

AV

V

l

" h u ,„6

v- v

2

X 10

u

, (18)

where Vi is the measured value, and V2 is the nominal value. The maximum

deviation measured was 1.3 ppm and the mean deviation was 0.6 ppm. The

standard deviation of an observation was 0.5 ppm, and the 3o limits for the mean were ±0.3 ppm. The results indicate that the dc source has acceptable

stability and is well within its specified accuracy of 50 ppm.

Typical results for a test of the ac source's stability are also shown in

Fig. 5. Again, 20 readings were obtained during a 20-minute time interval.

The test voltage was 10 V at a frequency of 20 kHz. Here the range of

deviations was 40 ppm with the mean being 19 ppm. The standard deviation of

an observation was 9 ppm, and the 3c? limits for the mean were ±6 ppm. The

discrete 10-ppm steps in the plotted data are due to the fact that the system

DVM's resolution on its 10-V range is limited to 10 ppm.

2.3.3 TE Tests

As mentioned in the previous section, one important test that is readily

performed automatically is that of determining a TE's "n" characteristic.

Typical results for a 2.5-mA, VHF-type TE which was tested with a nominal 3-V

range resistor are illustrated in Fig. 6.

A- 13
i i i Hdd NI 1VNIW0N WOdd NHI1VIA30

A-14

The characteristic n is defined by

n wn - (19)

where ae is the measured change in output emf for small changes in applied

voltage AV, V is the nominal test voltage for the TVC, and E is the measured

emf at the nominal test voltage, av is programmed to be ±0.5 percent of

nominal test voltage V. Sufficient time is allowed after each voltage change

for the TE to reach its final emf value.

For the results shown in Fig. 6, the TVC was tested from 50 to 110

percent of rated voltage. The total elapsed time to obtain the seven data

points was about 1.25 hours.

Each value of n is computed as the average of four determinations at any

given voltage. A least-squares analysis of the data provides the option of

obtaining a fitted curve using up to a fourth-degree polynomial. An analysis

of variance table and residual standard deviation are computed and printed so that the "goodness-of-f it" of the computed equation for n as a function of TE

output emf can be determined. The printed data sheet also shows the values of

n(measured) - n(computed). The figure shows an example of a linear fit which,

in most cases, provides sufficient accuracy. The coefficients 2.00 and -0.04

are either stored in the computer's data file (for a standard TE) or are typed

by the operator into the computer program for the TE under test at the

beginning of an ac/dc difference test.

The dc reversal difference (DCRD) of a TE can also be readily

determined. DCRD is defined as the difference in applied values of both

polarities of dc voltage required to produce an equal output emf (or "constant

output") of the test TE [7]. In order to facilitate DCRD measurements,

"constant input" emf, a, is actually measured. This <* is related to the DCRD

by a factor of 1/n as

E + -E

- DCRD = (l/n)(a) = (1/n)

( E + £)/ 2

, (20)

where E+ and E_ are the TE output emfs with equal +dc and -dc (or

"constant input") voltages applied, and n is as previously defined.

During acceptance tests of some TEs, the data showed much greater

variation of DCRD from unit to unit than had been expected. The only

information available indicated that the DCRD should reach a maximum value

between 70 and 80 percent of rated heater current and should approach a zero

value close to 100 percent of rated current. The results obtained did not

A-ie
substantiate this information. Hence, a program was written to determine the

DCRD as a function of applied voltage. Typical results for a 5-mA, UHF-type

TE tested with a 60-V range resistor are shown in Fig. 7. In this test the

voltage was varied from 50 to 120 percent of its rated value in 2-percent

increments. It should be noted that the plotted data show a; hence, the DCRD

values referred to a constant output emf would be smaller by the factor of n (see equation 15). In this test, the maximum a was about 700 ppm at 58

percent of rated voltage, and the minimum was about -330 ppm at 120 percent of

rated voltage.

At the time the DCRD testing program was developed, the information on DCRD variation was limited. However, in the intervening time Inglis [9] has

published a substantial amount of information in this area. Investigations at

NBS have not been as extensive as those of Inglis, but, in general, the

results obtained are in agreement with his published data.

The response time of a TE is also a characteristic which can readily be

measured using the automatic system. Response time is obtained by making

measurements of a TE's emf when full rated voltage is suddenly applied to the

TE. The calculated response time, t, is the time taken for the output emf to

reach 1 - (1/e) of its final value. Typical results for a 2. 5-mA, VHF-type TE are shown in Fig. 8.

For the interested reader, detailed documentation is available upon

request for most of the automatic test programs which are described in this

report.

3. Measurement Results and Uncertainties

Manual calibration systems have been in operation for many years at NBS,

and their uncertainties have been documented [1-3]. DC reversal difference,

self-heating and ambient temperature effects, drift effects due to nonequal

time intervals between emf measurements, unbalanced lead impedances, induced

voltages from electromagnetic fields, and operator fatigue and lack of skill

are some of the more common sources of error. The process of determining an estimated total uncertainty for a system is based upon 1) a history of

measurement results, 2) careful measurements of standards with accurately

known corrections, 3) theoretical analysis of sources of errors, along with,

preferably, 4) intercompari son tests using two independent test methods [3].

A combination of processes 2 and 4 was used for the initial evaluation of the

present automated system. The primary emphasis was placed on comparison of

results obtained with a well-characterized manual system and those obtained

with the new system.

A single-range (3-V), coaxial-type TVC was tested using established

manual techniques, followed by tests on the automated system. The results

obtained from the two test systems are shown in Table 1.

A-17
Ndd NI "lwqy 3A3 y

A-18
A 1^ ni jh^ i.ndino 3i

A-19
TABLE 1

3-V TVC AC/DC DIFFERENCE (ppm)

Frequency

kHz Manual Automatic Difference

0.02 0 2 -2

20 1 -9 10

50 -1 -9 8

100 -1 -4 3

For the automatic system, the values reported are the average of 12

determinations of the transfer standard's ac/dc difference. The random

uncertainty was calculated as three times the standard deviation of the mean

of the 12 observations, with the result that 3o = 21 ppm for the worst case.

For the manual system, three times the standard deviation of a comparison of

two TVCs, plus an allowance for systematic errors in the comparison process,

ranges from 6 ppm at 1 kHz to 12 ppm at 100 kHz [10]. In each case the

differences between the results obtained with the two test methods is less

than the combined uncertainties for a comparison of the same TVCs by the two

methods

.

A second test was made using a 10- V range TVC as a transfer standard.

The test results are listed in Table 2.

TABLE 2

10-V TVC AC/DC DIFFERENCE (ppm)

Frequency

kHz Manual Automatic Difference

20 -4 -17 13

50 -3 = 7 4

100 -1 6 -7

Both the 3-V and 10-V TVC transfer standards had small ac/dc

differences. Therefore, a third intercompari son test was conducted using a transfer standard with large, but accurately known differences. The results

of this test are listed in Table 3.

A-20
TABLE 3

50-V TVC AC/DC DIFFERENCE (ppm)

Frequency

kHz Manual Automatic Difference

5 29 26 3

10 56 52 4

20 121 121 0

50 320 310 10

The test results summarized in the three tables suggest a possible

systematic uncertainty since the automatic system gave lower values for all

but three test frequencies. Further investigation is required to evaluate

whether or not this uncertainty is significant.

As was mentioned previously, the results reported are initial

intercompari son tests. Neither sufficient tests were run nor data obtained to come to any definite conclusions regarding the systematic or random

uncertainties of the automatic test system. However, since the difference of

the ac/dc difference measurements for the three voltage converters tested did

not exceed ±15 ppm, it appears that the new system should be able to achieve

total uncertainties much less than had originally been anticipated. Further

testing will be done to verify this hypothesis. Such testing will include a "build-up" process from a reference voltage of 10 volts to about 200 V at

various frequencies. Also, a "step-down" testing process from the 10 V level

to about 2 V will be performed.

In order to investigate the effects due to random uncertainties, repeat

tests need to be done each day, for several tests. Analysis of the data from

the replicated tests should provide statistical information on the "within

day" and "between day" test data variability.

In any event, the small magnitude of the differences obtained in the

intercomparison tests are significant in that each TVC transfer standard was tested on two completely different calibration systems using different

converters as the reference standard.

4. Conclusions

The results indicate that it is feasible to make fully automatic

precision ac/dc difference measurements at any one voltage. The principal

advantage of the system is the elimination of the need for any type of

manually- or automatically-balanced TE comparator, permitting the system to be

assembled using commercially available instrumentation, except for the

switching modules. This approach, therefore, should make automation

attractive to many calibration laboratories faced with the need to make ac/dc

difference measurements. Moreover, the system can be used as a nearly

self-calibrating meter calibration system. Measurements can be done with

minimal operator intervention, eliminating tedious and fatiguing manual

A-2'l
operations. Hence, personnel presently engaged almost exclusively in manual

ac/dc difference tests can be freed to do other work. Experience gained

during many years of testing with manually operated systems at NBS has shown

that the precision of the test results is dependent upon operator skill. The

automatic system's precision is independent of operator skill, elminating this

variable in the experimental uncertainty.

5. Acknowledgements

The authors are indebted to M. S. Carter who wrote much of the software

and solved many difficult programming problems encountered in developing the

system. S. G. Tremaine, L. Freeman and E. V. Byland also made valuable

contributions to some of the programs which have become part of the total

system software. C. B. Childers helped greatly by doing the measurements on the manual system.

6. References

[1] F. L. Hermach, E. S. Williams, "Thermal Converters for Audio-Frequency

Voltage Measurements of High Accuracy," IEEE Trans. Instrum. Meas.,

Vol. IM-15, pp. 260-268, Dec. 1966.

[2] E. S. Williams, "Thermal Voltage Converters and Comparator for Very

Accurate AC Voltage Measurements," J. Res. Nat. Bur. Stand. (U.S.),

Vol. 75C, pp. 145-154, Dec. 1971.

[3] F. L. Hermach, "AC-DC Comparators for Audio-Frequency Current and

Voltage Measurements of High Accuracy," IEEE Trans. Instrum. Meas.,

Vol. IM-25, pp. 489-494, Dec. 1976

[4] R. S. Turgel, "A Comparator for Thermal AC-DC Transfer Standards,"

ISA Trans., Vol. 6, No. 4, pp. 286-292, 1967.

[5] K. J. Lentner, et al, "A Semiautomatic System for AC/DC Difference

Calibration," IEEE Trans. Instrum. Meas., Vol. IM-29, pp. 400-405,

Dec. 1980.

[6] E. W. Williams, "A Thermoelement Comparator for Automatic AC-DC

Difference Measurements," IEEE Trans. Instrum. Meas., Vol. IM-29,

pp. 405-409, Dec. 1980.

[7] K. J. Lentner, S. G. Tremaine, "A Semiautomatic AC/DC Thermal Voltage

Converter Calibration System," NBSIR 82-2576, Sept. 1982.

[8] "American National Standard for AC-DC Transfer Instruments and

Converters," NASI C100.4 - 1973, Amer. Nat. Stand. Inst., Inc.,

1430 Broadway, New York, NY 10018.

[9] B. D. Inglis, "Errors in AC-DC Transfer Arising From a DC Reversal

Difference," Metrologia, Vol. 17, pp. 111-117, 1981.

[10] F. L. Hermach, "Analysis of Uncertainties of NBS Thermal Voltage and

Current Converters", NBSIR 84-2903 (In Press).

A-22
APPENDIX A

System Equipment List

The use of trade names or company products does not constitute

endorsement or recommendation by the National Bureau of Standards, and does

not imply that the products named are necessarily the best available for the

purpose.

1. Computer and peripherals

a. Hewlett-Packard 9825T Desk Top computer (with 64 kbytes of memory)

b. Hewlett-Packard 98034A 488 interface (2 each)

c. Hewlett-Packard 98035A real time clock with options 002 and 025

d. Hewlett-Packard 9866B option 025 thermal printer

e. Hewlett-Packard 9872B option 025 plotter

f. Hewlett-Packard 98036A serial interface with 98241 test adapter

g. Hewlett-Packard 9878A 1/0 expander

h. Hazel time 1500 video display terminal

i. Hewlett-Packard 98226A printer cradle

j. Hewlett-Packard documentation software PN 09825-10020

k. Hewlett-Packard statistical software PN 09825-15030

1. Hewlett-Packard 59300-10001 HPIB verifications cassette with service

notes 5312A-2 and 59306A-4

m. Hewlett-Packard 59405-66503 HPIB test card

n. Hewlett-Packard I/O extender board assembly PN 98124-67901

2. Tektronix P6007100 probe PN 010-0165-00 (shown as 100/1 attenuator in

Fig. 1.

3. Hewlett-Packard model 3438 Digital Multimeter, option 15 with rack flange

kit, PN 5061-0074, (2 each, shown as DPM in Fig. 1)

4. a. Hewlett-Packard 5300B counter mainframe with service note 5300B-1

b. Hewlett-Packard 5301 10 MHz counter module with service note 5301A-1

c. Hewlett-Packard 5312A HPIB interface module

d. Hewlett-Packard 10853A rack mount kit for 5300B counter

e. Hewlett-Packard 10548A service support package with service note

5300B-1

5. a. Hewlett-Packard model 59306A relay actuator (2 each)

b. Rack mount kit, PN 5061-0094

c. Rack flange kit, PN 5061-0074

6. a. Guildline Model 9577 precision digital voltmeter (shown as DVM

in Fig. 1)

b. Option 03 three terminal input lead (2 each)

c. Option 07 low thermal lead kit

d. Input connectors (2 each no part number)

A-23
e. Option 08 service manual

f. Option 09 service kit

g. Option 10 calibration cover

h. Option 11 488 interface

7. a. Electronic Development Corporation (EDC) model 501J rack

mount dc voltage calibrator with minimum 25 mA current output

b. Option B, sixth decade

c. Option C, standby/ready signal

d. Option D, 100 mV range

e. Option J, bipolar operation

f. 488 interface kit, PN KT-48

g. Option AM-1, manual control panel and display (BCD)

8. EDC, model RA4 high voltage amplifier with lkV output at 25 mA

minimum current

9. a. John Fluke Manufacturing Co. 5200A Programmable AC Calibrator and

5205A Precision Power Amplifier

b. Option 05, 488 interface for 5200A

c. Rack kit for 5200, PN M07-205-600

d. Rack kit for 5205, PN M10-205-600

10. Low-Thermal -Emf switching module (NBS design)

11. High-Voltage-Relay switching module (NBS design)
APPENDIX B

Major Programs

In this appendix, a list of the major programs used in the ATS is given.

A brief explanation of the purpose of each program is also given. Detailed

documentation, such as the example given in Appendix C, is available for most

of the programs. A summary of the programs is given in Table 4.

1. Program name: STABLE

STABLE is a program which is used to check the stability of the system's

dc and ac sources. These stability tests are useful to determine whether or not the sources are functioning properly. Occasionally, ac/dc difference test

results appear to be erratic, and the stability tests are a convenient method

to ascertain whether the erratic results may be due either to the ac or dc

source, or both. Stability of the sources is measured by using the system's

real time clock and DVM whose function, reading rates, and ranges are remotely

controlled. The program computes the deviation from nominal voltage in ppm,

and prints the values of measured voltage and the deviation.

When a stability test is complete, the operator has the option of

plotting the measured deviations as a function of time using a program named

PLOTTER.

2. Program name: n-TEST

As discussed in the text, this program is used to determine a TE's

dimensionless characteristic "n." To determine the equation for "n" as a function of TE output emf, (in mV), a program called "STATIS" is loaded and

executed at the end of an n-test. The operator has the option of obtaining up

to a fourth-order polynominal equation using a least-squares curve fitting

algorithm. A plot of the actual measured n versus TE emf and the fitted curve

can also be obtained as an option.

3. Program name: DCRD

This program is used to determine a TE's dc reversal difference as defined by eq (16) of the text. The operator has the option of testing at any one fixed value of a TE's heater current. Both the constant input and

constant output values of dc reversal difference are computed. Finally, the

response time of the test TE is determined. Response time is defined as the

time it takes for the TE to reach 63.2 percent of its final (99 percent level)

emf when full rated heater current is applied as a step funtion. If the

operator desires, a program called EMF PLOTTER is loaded and executed. This

program plots the data obtained during a response time test.

4. Program name: ACCAL

Thib program is used to calibrate an ac voltage calibrator, whether that

of the ATS or an external unit, or a precision DVM. The program is discussed

in Section 2.3.1 of the text.
5. Program name: ACDC

This program is used for ac/dc difference testing, and is discussed in

Section 2.2 of the text. At the beginning of the test, the operator types

into the computer the parameters of test voltage, frequencies, and number of runs per frequency. One run consists of four determinations of ac/dc

difference, with each determination and the average of the four values

printed. The test is made completely automatically at any one fixed voltage.

A-26
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A-27
GALLIUM ARSENIDE (GaAs)-BASED PHOTOCONDUCTI VE

SWITCHES FOR PULSE GENERATION AND SAMPLING

APPLICATIONS IN THE NANOSECOND REGIME*

Barry A. Bell and Arnold G. Perrey

Electronic Instrumentation and Metrology

Electrosystems Divsion

National Bureau of Standards

Gaithersburg, MD 20899

and

Robert A. Sadler

ITT Gallium Arsenide Technology Center

Roanoke, VA

Abstract

This paper describes the design of a set of optoelectronic switches

having an interdigitated electrode structure and implemented with high

resistivity GaAs photoconducti ve substrates. A theoretical analysis is

developed for determining the pulsed light ON state resistance (peak

conductance), OFF state (dark) resistance, and the associated capacitances for

the various designed gap geometries. Data are provided on the processing

steps used in successfully fabricating a working set of switches based on the

theoretical design. A test apparatus is used to make measurements of the

pulsed light conductance of these devices having nominal gap spacings of 5,

10, 20, and 40 urn.

1. Introduction

The purpose of this paper is to describe the design and performance of a set of optoelectronic switches having an interdigitated electrode structure

which provides low enough ON state resistance for operation in 50-" switching

applications. This performance has been achieved by the increased optical

sensitivity of the interdigitated electrode design and by the low contact

resistances realized from an ion implantation process used during the

fabrication of the switches. Earlier devices having gaps with a planar

electrode structure showed the feasibility of achieving a practical gallium

arsenide (GaAs)-based photoconducti ve switch with low ON state resistance

(high ON state conductance) using a pulsed laser diode, fiber-optic-coupled,

light source [1].

* Presented at the 1985 Instrumentation and Measurements Technology Conference,

March 22, 1985. To be published in the IEEE I & M Transactions, Vol. IM-34,

No. 4, Dec, 1985.

A-28
A set of optoelectronic switches (of the surface layer photoconducti ve gap

type) was designed having an interdiqitated electrode structure, the active

area of which would be compatible with the use of a large core (1000 Mm

diameter) fiber used for irradiating the multiple finger gaps. Previous

experience, however, had indicated that for a limited range of optical power a significant tradeoff would be required in the design of these devices in order

to realize low ON state resistance (Ron)* hi 9

h OFF state (dark) resistance

(R0 ff), and

6minimal gap capacitance (Cg). A high Roff/Ron contrast

ratio of 10 :1 or larger is required in most circuit applications for good

signal-to-noise ratio. For purposes of minimal signal feed-through in the OFF

state, a very low value of Cg is also required. Consequently, a theoretical

analysis was carried out to determine some of these tradeoffs [2].

Much research has been devoted towards investigating the detailed

response of photoconductors, especially with regard to speed [3]. In a more

recent paper by Auston, the gap capacitance in parallel with a time varying

conductance, was found to be a good model also for photoconductors when

mounted in transmission line networks [4]. Perhaps the most optically

sensitive photoconductors to date are the Fe-doped indium phosphide ( I n P

)

devices fabricated by C. H. Cox, et al . at the MIT Lincoln Laboratory, having

2 urn-wide gaps and fingers over a 50 urn x 50 wn active area [5].

The apparatus used for testing the performance of the photoconducti ve switches is shown schematically in figure 1. A pulsed laser diode emits

pulsed infrared light into an optical fiber with photon energy, h y . Most of

this light exits the fiber and irradiates the multiple gap area of the

interdigitated electrodes deposited on the GaAs chip. Rapid generation of

hole-electron pairs occurs in the irradiated GaAs material, thereby providing

a conduction path between the electrode fingers.

2. Theoretical Considerations

Figure 2 shows the circuit used for analyzing the measurement setup of

figure 1. The device under test can be modeled as a time varying resistance

Rt, in parallel with a gap capacitance Cg, in series with two contact

resistances Rc

. The small amount of shunt capacitance and conductance can usually be neglected. Previous analysis [1] has shown that the output voltage

is proportional to the total gap conductance Gt, i.e.

Gt (s)R

Vs

> = ll +\(s) Rj V w

where G = -n— = total gap conductance.

By observing the peak value of v 0 (t), an approximate value for the maximum

peak conductance Gt p (or minimum gap resistance, R0 n) can then be obtained

from (1). Obviously, for high bias-voltage switching efficiency, the GtRji

product should be large. Consequently, for efficient voltage switching in low

impedance applications, the peak gap conductance, Gtp, must be correspondingly larger.

A-29
A-30
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A- 31
To examine the factors that determine the total gap conductance, figure 3

shows an example of the computer generated pattern used for the contact mask

of an interdigitated set of electrodes having 8 and 9 fingers, or 18 effective

gaps, with a spacing of 20 wn. Such an electrode structure was designed to

capture a maximum amount of optical energy from the fiber output port (as

indicated by the dashed circle) for a given total length of the gap. Other

similar patterns have fewer fingers, or total gaps, with gap spacings of 5,

10, and 40 wn. The width of a finger is designated W, the gap spacing is S,

and a given gap length is denoted by L. Consider a "unit structure", as shown in figure 4, which depicts an idealized model of a section of the

light-activated gap region. The bulk conductance of the unit gap (assuming

that conduction is due to a single carrier), is then given by

G

t

= TTp (neM) 4

(2)

where n = density of free carriers per unit volume,

e = charge of an electron,

M = carrier mobi 1 ity,

A = end face area of the activated carrier volume,

S = gap ( interelectrode) spacing.

and

The thickness of the activated carrier volume (absorption depth, 1/a) is a function of the photon energy, hu, of the laser light from the fiber. Letting

N = number of photo-generated carriers and N0

= equilibrium number of

carriers in the dark, then n = (N0 + N)/SA, and

(N + N) en

(3)

Besides having high carrier mobility and small gap spacing, Gt is further

increased only by increasing the number of photogenerated carriers, N. The

generation of carriers (holes and electrons) in the gap is governed in turn by

the excitation equation [1]:

dt t

A

hu (1-pK (4)

where N = number of photogenerated carriers,

x = mean free carrier lifetime,

Ag = area of the interelectrode gap,

Af = cross-sectional area of the optical fiber,

P = optical power from the fiber,

p = surface reflectance, and

n = quantum yield of internal photoelectric effect.

A-32
A-33
A-34
Thus, given the time dependent function of optical power P(t) and known or approximate values of the other above quantities, N(t) can be determined by

equation (4). Two important solutions for equations (3) and (4), depending on the relative values of the optical pulse duration T, and the mean free carrier

lifetime t, are given in the Appendix.

One method of determining the gap capacitance of an interdigitated

electrode pattern is to separate it into simpler single gaps, as sketched in

figure 4. This approach is based on the fact that most of the excess charge

caused by discontinuities is limited to regions near the gap, and that

typically L»W (so that fringe effects can be neglected). By using a two

dimensional solution of Laplace's equation, and associated boundary

conditions, the gap and shunt capacitances for the unit structure for

different values of W, S, and d can be derived [2]. Summation formulas are developed in [2] for determining the gap capacitance per unit length,

Cg(unit)/cm, and shunt capacitance, C s (unit)/cm. Figure 5 shows curves of

Cg(unit)/cm and Cs ( un -jt)/cm plotted as functions of W/d and S/d. The gap

capacitance of an interdigitated electrode structure, such as shown in figure

3, can then be calculated by summing the contributions of each unit structure,

or

N

C

g =1 L^^unit) + (N-l)W C' g (unit), (5)

where N = number of gaps, and

C'g(unit) = Cg(unit) for W/d»l.

After finding the total gap capacitance Cg, the OFF state (dark)

resistance, RtD = Roff» can tnen be determined from the relationship

R = , (6) off g o

(provided e r »l) where o is the bulk conductivity of the photoconductive

material of the gap in the dark. This R0 ffCg product is the nominal dielectric relaxation time of the gap modeled as a parallel plate capacitor [2]

3. Device Design and Fabrication

The design of the four interdigitated electrode patterns shown in figure

6 were based on achieving values of Cg from about 0.1 to 1 pF using unit

structure dimensions compatible with the curves given in figure 5. An initial

set of these devices was fabricated at NBS using high resistivity (p = 10 to

10 a • cm) semi-insulating GaAs substrate material. Gold-germanium (AuGe)

electrodes were deposited in the various patterns described above. These

devices showed greater optical sensitivity than the planar gap devices in

response to the pulsed light source (A = 850 nm), indicating that the

interdigitated electrode design produced higher pulsed light conductance than

the earlier devices.

A-35
A-36
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A-37
A set of interdigitated electrode switches using the same basic contact

masks was then fabricated by the ITT Corporation, Gallium Arsenide Technology

Center, Roanoke, Virginia. The devices were made on commercially available

50.8 mm diameter undoped semi-insulating GaAs substrates with (100)

orientation. The substrate material has a resistivity of about

2 x 10 a • cm, electron mobility of 6800 cm /V- s, and a dislocation

density of approximately 3 x 10 cm" . For device fabrication, as shown in

figure 7, a 2500 A layer of Si02 is chemically vapor deposited over the wafer

to provide surface passivation and encapsulation for implant annealing. To

reduce contact resistance to the semi-insulating substrate, a selective n-type

implant is done in the ohmic contact areas. Before performing the implant,

the Si0 2 is etched in a CF 4 plasma to reduce its thickness to 1000 A in the

contact areas. Silicon ions at an energy of 120 keV and a dose of 1 x 10

1 cm

- are then implanted, and annealed at 850° C for 20 minutes, using the.Si02

as an encapsulant. This implant provides a doping level of about 2 x 10

7 cm° , allowing the formation of reproducible ohmic contacts with low contact

resistance. Next, the windows in the Si O2 layer are etched through to the

GaAs surface, and AuGe/Ni ohmic contacts are patterned by liftoff. Good

liftoff is assured by the fact that the AuGe/Ni thickness of 1800 A is less

than the Si O2 thickness of 2500 A. The ohmic contacts are then alloyed at

450°C for 1 minute. Finally, 2300 A of Ti/Pt/Au is evaporated onto the ohmic

contacts to provide better bond wire contact to the finished devices.

4. Test Results

Figure 8 shows a photograph of multiple oscilloscope traces taken of the

output voltage, v0 (t), from the photoconductance measurement setup for an 18

gap device (S8.40). The five different traces correspond to five distinct

levels of peak optical power (out of the laser/optical fiber source)

irradiating the switch, as indicated in the accompanying table. Traces (1),

(2), and (3) correspond to responses where the increased peak output is nearly

proportional to the increase in peak optical power, as theoretically predicted

by equations (1) and (16). However, further increases in optical power, such

as shown by traces (4) and (5), cause a response where the total volume of the

light-activated gap has become saturated with carriers and the photoconductance has been maximized. The peak output voltage level is then limited by

the contact resistances of the switch (see figure 2). The peak conductance of

a complete set of the 8 gap devices (S4.40, S4.20, S4.10, and S4.05) was also

measured as shown in figure 8, and summarized in Table 1, where R' on = Ron

+ 2R C

. The value for R0 n (calculated) was determined from equations (7)

and (16) using nominal dimensional and material parameters with Pp = 0.6 W

and t = 750 ps (see the section below on Computer Simulation).

Figure 9 gives a plot of capacitance versus frequency, summarizing the

data obtained in making measurements of the gap capacitance, Cg, of the five

devices reported on in this paper. These measurements were made on the NBS

Type 2 bridge (used for calibrating precision capacitance standards) which has

a resolution of 1 x 10" farads and an uncertainty of ±0.0001 pF [6]. A

special test fixture was utilized for this purpose which has a residual

capacitance of 0.024 pF or less, so that very good measurements to 0.1 pF (the

estimated total uncertainty) are possible. As shown in figure 9, there is some frequency dependence on these measurements of Cg. The values de-
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A-40
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A-42
termined at the standard test frequency of 1 kHz are summarized in Table 1. Because of the discrepancy between the calculated values of Cg and the

measured values of Cg, additional work is needed to achieve greater

confidence in the actual values of Cg obtained with these interdigitated gap

designs.

Several means were available for measuring the large OFF state (dark)

resistance (Roff) of these devices, including a high resistance ohmmeter and

the excellent leakage (or, conductance, G) measurements available on the NBS

Type 2 bridge. A third method for showing how R0 ff varies over several

decades of voltage and current is shown by the I-V curve given in figure 10

for one of the 8 gap devices (S4.40). Ohmic behavior was typically obtained

on the devices that worked well up to about 10 volts. The values of R0ff

(measured) used in Table 1 are an average of the three means used for making

this measurement. The value for R0ff (calculated) was determined using

equation (6) with e r

= 10, p = 1/a = 2 x 10 fl • cm, and Cg = Cg

(calcul ated)

.

6. Computer Simulations

Using the circuit model shown in figure 2, (neglecting Rc , L and C), as well as the theoretical relationships given in the section on Theoretical

Considerations, a computer program was developed using extended SCEPTRE to

simulate the transient light conductance response. The input optical power was approximated as P(t) = Pn sin u>t, with a peak input of P p = 0.93 to. Equation (4) was used for obtaining N(t) which was then the forcing function

generating Rt(t) = 1/Gt(t). The corresponding output voltage response,

v 0 (t), is then provided by the SCEPTRE simulation program. Figure 11 shows

a plot of the simulated output response with varying values of mean free

carrier lifetime, t, for the 18 gap device (S8.401. Nominal parameter values

of gap spacing (S =40 urn), mobility (u = 6800 cm /V*s), wavelength (A = 850 nm), area ratio (Ar

= 0.739), = 4 V, and R£ = 50- si were used for

these simulations where an overall optical efficiency of (l-p)n =0.7 was assumed. Apparently, a value of t = 750 ps most nearly approximates the

actual mean free carrier lifetime of these devices.

The computer simulation program also provides the Rt response to the

pulsed optical power. Using the same nominal parameter values as above,

except with Ar

= 0.372 for an 8 gap device (S4.40), figure 12 shows a plot

of the simulated inverse variation of Rt with applied optical power P

= P 0 f from the fiber. Also plotted on figure 12 are the measured values of

R' on (see Table 1) for the S4.40 device. These results confirm the

usefulness of the simulation model in predicting the performance of the

interdigitated devices.

7. Conclusions

The testing results for determining the values of Ron » Rcontact>

Cg, and R0 ff parameters of a set of (interdigitated electrode) GaAs-based

optoelectronic switches is summarized in Table 1. For an applied peak optical
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power on the order of 1 W, saturation of these devices is achieved with a residual contact resistance of only about Hence, efficient bias voltage

switching of greater than 80 percen^ can be achieved in 50-ft load environments

with Roff/Ron contrast ratios of 10 :1 or greater. Computer simulations

of the circuit model and theoretical photoconductance properties of these

devices are given which are in good agreement with the measurement results.

8. Acknowledgements

The authors gratefully acknowledge the helpful theoretical discussions

given by Dr. Chi H. Lee and laboratory support provided by Mr. C. S. Chang

(NBS Guest Worker) of the University of Maryland. Thanks are also given to

Dr. Alan Seabaugh and Dr. Michael Bell of the Semiconductor Materials and

Processing Division of NBS for similar theoretical support; for supplying the

initial NBS-fabricated devices, and for the I-V measurements. Dr. George Free

of the Electricity Division of NBS is acknowledged for his guidance in making

precision capacitance measurements and Mr. Tom Leedy of the Electrosystems

Division is also recognized for his helpful assistance in making computer

simulations. Of course, the cooperation and collaboration of the ITT Gallium

Arsenide Technology Center was invaluable, without which this paper would not

have been possible. The clerical efforts of Ms. Yvonne Dube are also greatly

appreci ated.

9. References

1. B.A. Bell and A.G. Perrey, "Peak Conductance Measurements of GaAs

Switching Devices," Picosecond Optoelectronics, Gerard Mourou, Editor,

Proc. SPIE 439, pp. 123-139, 1983.

2. M.C. Jeng, B.A. Bell, and A.G. Perrey, "A Theoretical Approach Towards

Estimating the Impedance Components of Interdigitated Optoelectronic

Switches," internal NBS report, yet to be published.

3. R.A. Lawton and A. Scavannec, "Photoconducti ve Detectors of Fast

Transition Optical Waveforms," Electronic Letters, vol. 11, p. 74, 1975.

4. D.H. Auston, "Impulse Response of Photoconductors in Transmission Lines,"

IEEE Journal of Quantum Electronics, vol. QE-19, no. 4, pp. 639-647,

April 1983.

5. C.H. Cox, V. Diadiuk, F.J. Leonberger, and R.C. Williamson," InP

Optoelectronic Switches and Their High-Speed Signal -Processing

Applications," Picosecond Optoelectronics, Gerard Mourou, Editor, Proc.

SPIE 439, pp. 164-168, 1983.

6. R.D. Cutkoski, "Capacitance Bridge - NBS Type 2," NBS Report No. 71303,

March 1961.

A-47
APPENDIX

Two Solutions of Equations (3) and (4)

In equation (4), let

f so that

Let P(t) be an optical pulse of amplitude Pp and duration T, i.e.,

P(t) = P p [u(t) - u(t-T)],

so that

sN(s) + N(s) = —2- [l-exp(-Ts)]

or,

NfO -, K V Cl-exp(-Ts)]

H[s

> ~ s(l + st)

The solution for N(t) is then

N(t) = KP

p T[l-exp(-t/T)][u(t)-u(t-T)].

When dealing with ultrashort pulse laser sources, then for t j< T «

N(t) - KP

p x[l-(l-t/x)][u(t)-u(t-T)]

= KP

p t[u(t)-u(t-T)],

so that from (3), with N0 negligible,

A-48
K(P

D T)ep i G

t P =-ir- = w-- < T<<t >- < 14 > K

S on

This result shows the peak conductance (minimum ON state resistance) to be

dependent on the optical pulse duration, or energy of the light pulse.

However, in the nanosecond regime where in many cases, T»t, then for t<T,

N(t)« KP

p

T[u(t)-u(t-T)], (15)

and

_ K(Pp

x)e,

_ t (T>>T)

The result in this case is that the peak conductance is dependent on the mean free carrier lifetime, independent of the optical pulse duration. Peak

optical pulse power, and not pulse energy, is what determines Gtp, (or the

minimum ON state resistance, Ron)-

A-49
AN APPROACH TO ATE CALIBRATION

VIA PERFORMANCE VERIFICATION

AT THE SYSTEM INTERFACE *

Thomas F. Leedy

Electrosystems Division

National Bureau of Standards

Gaithersburg, MD

Abstract

A method of verifying the performance of automatic test equipment (ATE) in its

normal operating environment and configuration is presented as the best

approach to achieving an overall system calibration. The method consists of

the transport of wel 1 -char acteri zed signal sources to the ATE station and the

application of these electrical stimuli directly to a well-defined electrical

interface on the test station. Uata is presented on typical accuracies that

have been obtained on limited parameters and ranges during the testing

process, using calibrated commercial equipment.

1. Introduction

Several approaches have been used to assure that ATE systems perform

properly. The traditional approach is the calibration of each "drawer" or instrument of the system. Typically, instruments such as a digital

voltmeters, precision voltage or waveform sources, and frequency counters, are removed from the ATE station and sent to a calibration laboratory where their

performance is evaluated and any necessary calibration adjustments are made.

Such an approach has several shortcomings. For example, the test system often

cannot be used during the time the instruments are removed for calibration

unless replacements can be found. A more serious deficiency of this approach,

from a metrology point of view, is the fact that instruments are not

characterized in the same environment as they are used. For example, the

accuracy of a digital voltmeter may exhibit sensitivity to temperature

changes. Its normal operating temperature range in the ATE system may be

quite different than that encountered in the calibration laboratory. In addition, interferences, such as high frequency signals produced by other

instrumentation and computers in the ATE system may degrade the performance of

such precision measurement equipment. These effects are usually not present

when the performance of the measurement equipment is evaluated in the

calibration laboratory. A further shortcoming of the practice of removal,

calibration, and replacement of measurement equipment is that such procedures

result in a calibration that does not account for losses and offsets in the

signal path between the interface connector, where the unit under test UUT is

* Presented at the 1985 Measurement Science Conference, and published in the

Conference Proceedings, Jan. 17-18, 1985.

A-50
connected, and the instrument terminals, where the instrument was calibrated.

Since signals from the UUT are typically switched through relays and have

relatively long path lengths, signal losses and offsets may affect the

measurement accuracy, especially for low-level signals. In view of the

shortcomings listed above, the user of ATE which has had instruments removed

and calibrated outside the ATE system itself may have greater confidence in

the equipment performance than is warranted.

Another calibration approach employed with ATE systems in order to increase

the confidence in the resulting measurements is the use of various types of

built-in test or self-testing schemes. If properly implemented, such schemes

may be valuable towards assuring that measurements made by an ATE system are consistent. However, such techniques alone cannot perform a calibration

function to determine the difference between values of physical quantities,

such as voltage and frequency, measured by the ATE system and those measured

quantities that have traceability to national standards. Measurements have

traceability to a designated set of standards if and only if scientifically

rigorous evidence is produced on a continuing basis to show that the

measurement process is producing measurement results for which the total

measurement uncertainty relative to national or other designated standards is

quantified [1].

To assure verification of the performance of test equipment, and achieve

meaningful traceability, well-characterized standards must be applied to the

ATE station while it is operating in its normal environment. An example of

such an "in-situ" station calibration is the Portable Automatic Test Equipment

Calibration Concept (PATEC) used by the Air Force Guidance and Metrology

Center. The PATEC concept consists of verifying the performance and

calibrating certain critical or "core" instruments used by the ATE system

using portable programmable calibrators connected via the system interface.

After such direct calibration, the remainder of the instrumentation contained

in the station are then calibrated by using the core instruments as standards,

together with "wrap around" interface adapters. The Navy implements a similar

concept using the Modularly Equipped and Configured Calibrators and Analyzers

(MECCA). Both of these programs utilize portable calibration systems that assure the performance of ATE on site via a system calibration.

2. The Use of Transport Standards

The National Bureau of Standards (NBS) has had a program, in cooperation with

the Department of Defense (DoD) to determine the feasibility of using

transport standards to verify the performance and calibration of ATE systems

[2]. The approach employs the use of portable transport standards with

sufficient accuracy and long-term stability to properly characterize the ATE

station under investigation. It was essential that these transport standards

were sufficiently versatile so as to permit the application of a range of

well-calibrated stimuli directly to the UUT interface connector. A realistic

evaluation of the accuracy of the ATE system could then be made when the

system was operating in essentially the same conditions as when testing a UUT.

A- 51
Portable transport standards offer an advantage over alternative methods of

characterizing an ATE station since the effects of losses and offsets occuring

in the cabling and switching networks can be also properly characterized. In addition, it is desirable to be able to program the transport standards by means of a computer or instrument controller since statistically meaningful

tests require that lengthy sequences of stimuli be applied to the ATE system

under test. For example, to adequately characterize ac voltage measurements

made by an ATE system, many combinations of voltage amplitudes and frequencies

must be applied. Portable transport standards, in conjunction with portable

"desk-top" controllers, offer a powerful way to generate such sequences, with

the flexibility of making possible program changes on site.

3. Implementation of the Transport Standards for AC, DC, Phase,

and Pulse Parameters

Based on a knowledge of the key measurement capabilities of an ATE system to

be characterized, the parameters and ranges of the required stimuli can be

selected. For example, in this particular project ac and dc voltages,

electrical phase angle, and pulse duration were the quantities used to

characterize one particular "third-generation" ATE system initially studied by

NBS. DC voltages from +/- 100 mV to +/- 195 V, and ac voltages from 300 mV to

140 V (rms) at various frequencies from 50 Hz to 10 MHz were applied to the

ATE system at the UUT interface connector in order to investigate its dc and

ac measurement performance. Additionally, it was desired to verify the

performance of the ATE station in measuring pulse duration over a range of 50

nS to 1000 ns.

Two transport packages consisting of test equipment were assembled; one for

the dc and low-frequency ac voltage source, and the second for a pulse voltage

source. The dc and low-frquency ac voltage source package contained a commercial meter calibrator, a digital voltmeter, and a desk-top

computer/controller. The pulse source package contained a high resolution

time synthesizer for generating pulses of precise time duration, and a pulse

generator that was used to generate the output repetition rate of the pulses.

In addition, an NBS Phase Angle Calibration Standard was used as a source of

phase angle signals [3]. The NBS Phase Angle Calibration Standard produces a pair of digitally synthesized sine waves. All parameters, with the exception

of the pulse repetition rate, were capable of being controlled by the

computer/control ler via an IEEE-488 bus. Thus, sequences of various voltages

or pulse widths could be applied to the ATE system with a minimum of operator

intervention

.

Prior to applying these sources to an ATE system, the transport packages were carefully characterized to measure their accuracy, their stability with time,

and the effects of temperature, line voltage, and other environmental factors

that may affect their performance. In all cases, the characterization of the

transport standards package was performed at the termination of the cable and

adapters that were necessary to interconnect the standards with the ATE system

under investigation. Furthermore, the input impedance of the ATE system was simulated with resistance-capacitance networks at the interconnection

A-52
interface. Thus, the electrical environment during the characterization tests

performed on the transport standards approximated that encountered during the

connection of the transport standards to the ATE system.

For example, the output of the dc transport source was intercompared

periodically with the U.S. Legal Volt maintained by NBS. Over a period of

five months, the dc source exhibited a 3 sigma uncertainty of less than 0.004

percent over a voltage range of +/-0.1 to +/-200 V dc. Likewise, over a three

month period, the pulse source exhibited changes in pulse duration of less

than +/-0.6 percent over the range of 50 to 1000 ns.

The voltage of the ac output from the source was measured as a function of rms amplitude and frequency by means of a thermal voltage converter. The ac and

dc voltages of the source were available at the same output terminals by

programming the source over the IEEE-488 bus. The output of the thermal

converter was measured by the digital voltmeter, also controlled by the bus.

In this manner, full control was exercised over the generation and application

of ac and dc voltages to the converter and over the recording of the resultant

thermocouple emf voltages. A multiplier (current scaling resistor), inserted

between the source and the thermoelement allowed the thermal converter to be

used over a voltage range of 2 to 600 V ac (rms).

The observed 3 sigma uncertainty in the voltage of the ac source over the

frequency range of 50 Hz to 50 kHz was less than +/-0.01 percent during a three month period. The combined effects of temperature and line voltage

changes along with additional uncertainties contributed by the thermal

converters, voltmeter non-linearities, and effects due to movement of the source from the calibration laboratory at NBS to the remote ATE site gave

conservative estimates of total uncertainties of +/-0.02 percent and +/-0.12

percent for dc and ac voltages, respectively.

AC voltages at frequencies between 50 kHz and 10 MHz are more difficult to measure accurately than those at lower frequencies. At the higher frequencies,

small inductances and capacitances associated with the connection of the

calibration source to the ATE system become important. If not properly

accounted for, the losses in the cable between the wideband output of the source and the interface of the ATE system introduce a source of systematic

uncertainty. To connect the source to the ATE system, a 1.5-m cable is

required. Typically, this additional cable length provides an attenuation of

the signal of approximately 0.6 percent at 10 MHz. Thus, all measurements

were made using a 1.5 m length of RG-58/U cable connected to the wideband

output unless otherwise specified.

The ac voltage output at the interface adapter pins, as a function of

frequency, was determined by the use of a thermal voltage converter which has

a specified input impedance of 50 ohms (+/- 0.3 percent) and a voltage range

of approximately 0.2 to 0.45 V ac (rms). To measure voltages in excess of

0.45 V ac, a set of two precision 50-ohm coaxial attenuators was used that had

power attenuations of 6 and 10 dB respectively. By means of the attenuators,

either individually or in series, the voltage measurement range could be

extended to 2.8 V ac. The overall uncertainty of the output voltage of the

wideband source at the interface adapter pins was calculated to be +/-0.7

A- 53
4. App 1 i cat i on of Transport Standards to an ATE System

The transport standards were applied to several third-generation ATE systems

used by DoD. Measurement programs were written in ATLAS to permit the ATE

station to measure dc voltages, low frequency ac voltages in the frequency

range of 50 Hz to 50 kHz, and high frequency ac voltages in the range of 50

kHz to 10 MHz. Additional programs measured pulse duration and phase angle.

The transport standards were interconnected to the ATE system by means of the

cables and the interface adapter that had been used in the characterization of

the standards. This overall package permitted the application of the ac and

dc voltages, pulses, and phase angles to the ATE system under the same conditions in which they were calibrated. In addition, a means was provided

for the ATE station to generate a "test complete" pulse to the controller.

The controller then instructed the transport standards to provide the next

stimuli in a preprogrammed sequence. The measurements from the ATE station were printed and recorded on the system disk file. In this manner, an extensive set of measurement data could be obtained to analyze the errors of

the ATE system being characterized since all the data was in "machine

compatible" form.

5. Conclusion

The use of accurate transport standards has been demonstrated to be a useful

concept for the characterization and calibration of ATE systems. In order to

meaningfully characterize the performance of an ATE system, the signals must

be accurately determined at a defined measurement interface over the range of

environmental conditions that typically would be encountered.

6. References

1. B. C. Belanger, "Traceabi 1 i ty: An Evolving Concept," ASTM Std. News, Vol.

8, No. 1, Jan. 1980, pp. 22-28.

2. T. F. Leedy, W. L. Gans, B. A. Bell, P. S. Lederer, and R. E. Nelson,

"Automatic Test Equipment Calibration/Performance Verification Evaluation

and Research Program," NBSIR 82-2601, Parts I and II (Dec. 1982).

[Limited distribution; not available from NTIS]

3. R. S. Turgel and N. M. Oldham, "NBS Phase Angle Calibration Standard",

NBS Technical Note 1144, U.S. Department of Commerce, National Bureau of

Standards, July 1981.

A-54

& U . S . GOVERNMENT PRINTING OFFICEl 1985-461" 105/20249
NBS-114A (rev, 2-8C) U.S. DEPT. OF COMM.

BIBLIOGRAPHIC DATA

SHEET (See instructions)

1. PUBLICATION OR

REPORT NO. NBS/SP-707

2. Performing Organ. Report No . 3. Publication Date

October 1985

4. TITLE AND SUBTITLE

Proceedings of the Seminar on Digital Methods in Waveform Metrology

Digital Methods in Waveform Metrology (Proceedings of a Seminar)

5. AUTHOR(S)

Barry A. Bell, editor

6. PERFORMING ORGANIZATION (If joint or other than NBS, see instructions)

National Bureau of Standards

U.S. Department of Commerce

Gaithersburg, MD 20899

7. Contract/Grant No.

8. Type of Report & Period Covered

Final

9. SPONSORING ORGANIZATION NAME AND COMPLETE ADDRESS (Street. City. State. ZIP)

Same as item 6.

10. SUPPLEMENTARY NOTES

Library of Congress Catalog Card Number: 85-600591

^ Document describes a computer program; SF-185, FlPS Software Summary, is attached.

11. ABSTRACT (A 200-word or less factual summary of most significant information. If document includes a significant

bibliography or literature survey, mention it here) Modern electronic instrumentation metrology in the low frequency regime (dc-10 MHz) was discussed in lecture talks and papers presented at NBS, Gaithersburg, MD on October 18-

19, 1983. The seminar program was organized into four main session topics, as outlined

in the Seminar Agenda (see pp. viii and ix).

This special publication contains complete papers on the subjects presented at the

seminar, providing more of the technical details. For the sessions on Precision

Waveform Synthesis, Precision Waveform Sampling, and Data Converter Characterization,

six formal papers are given describing the hardware and software techniques used for

developing NBS laboratory standards and apparatus for testing ac sources and vol tmeters

,

phase angle meters, transient waveform recorders, wideband wattmeters, and digital-toanalog and analog- to-digital converters. For the informal session on Instrumentation

Metrology, three subsequent papers have been written for publication which are included for completeness in the Appendices.

12. KEY WORDS (Six to twelve entries; alphabetical order; capitalize only proper names; and separate key words by semicolons)

analog/digital converters; ATE; automatic test systems; conducted EMI; calibration

methods; digital-analog converters; digital synthesis; phase angle; photoconductance;

sample/hold amplifiers; sampling techniques; settling time; thermal voltage converters

13. AVAILABILITY

|XXj Unlimited

| | For Official Distribution. Do Not Release to NTIS

PCX] Order From Superintendent of Documents, U.S. Government Printing Office, Washington, D.C. 20402.

Order From National Technical Information Service (NTIS), Springfield, VA, 22161

14. NO. OF

PRINTED PAGES

177

15. Price

USCOMM-DC 6043-P80

J

Technical Publications

Periodical

Journal of Research—The Journal of Research of the National Bureau of Standards reports NBS research and development in those disciplines of the physical and engineering sciences in which the Bureau is active. These include physics, chemistry, engineering, mathematics, and computer sciences. Papers cover a broad

range of subjects, with major emphasis on measurement methodology and the basic technology underlying

standardization. Also included from time to time are survey articles on topics closely related to the Bureau's

technical and scientific programs. Issued six times a year.

Nonperiodicals

Monographs—Major contributions to the technical literature on various subjects related to the Bureau's scientific and technical activities. Handbooks—Recommended codes of engineering and industrial practice (including safety codes) developed in cooperation with interested industries, professional organizations, and regulatory bodies.

Special Publications—Include proceedings of conferences sponsored by NBS, NBS annual reports, and other

special publications appropriate to this grouping such as wall charts, pocket cards, and bibliographies.

Applied Mathematics Series—Mathematical tables, manuals, and studies of special interest to physicists,

engineers, chemists, biologists,- mathematicians, computer programmers, and others engaged in scientific and

technical work.

National Standard Reference Data Series—Provides quantitative data on the physical and chemical properties

of materials, compiled from the world's literature and critically evaluated. Developed under a worldwide pro- gram coordinated by NBS under the authority of the National Standard Data Act (Public Law 90-396).

NOTE: The Journal of Physical and Chemical Reference Data (JPCRD) is published quarterly for NBS by

the American Chemical Society (ACS) and the American Institute of Physics (AIP). Subscriptions, reprints,

and supplements are available from ACS, 1155 Sixteenth St., NW, Washington, DC 20056.

Building Science Series—Disseminates technical information developed at the Bureau on building materials,

components, systems, and whole structures. The series presents research results, test methods, and perfor- mance criteria related to the structural and environmental functions and the durability and safety

characteristics of building elements and systems.

Technical Notes—Studies or reports which are complete in themselves but restrictive in their treatment of a

subject. Analogous to monographs but not so comprehensive in scope or definitive in treatment of the subject

area. Often serve as a vehicle for final reports of work performed at NBS under the sponsorship of other government agencies.

Voluntary Product Standards—Developed under procedures published by the Department of Commerce in Part 10, Title 15, of the Code of Federal Regulations. The standards establish nationally recognized re- quirements for products, and provide all concerned interests with a basis for common understanding of the

characteristics of the products. NBS administers this program as a supplement to the activities of the private

sector standardizing organizations.

Consumer Information Series—Practical information, based on NBS research and experience, covering areas of interest to the consumer. Easily understandable language and illustrations provide useful background

knowledge for shopping in today's technological marketplace.

Order the above NBS publications from: Superintendent of Documents, Government Printing Office,

Washington, DC 20402. Order the following NBS publications—FIPS and NBSIR's—from the National Technical Information Service, Springfield, VA 22161.

Federal Information Processing Standards Publications (FTPS PUB)—Publications in this series collectively constitute the Federal Information Processing Standards Register. The Register serves as the official source of

information in the Federal Government regarding standards issued by NBS pursuant to the Federal Property

and Administrative Services Act of 1949 as amended, Public Law 89-306 (79 Stat. 1127), and as implemented

by Executive Order 11717 (38 FR 12315, dated May 11, 1973) and Pan 6 of Title 15 CFR (Code of Federal

Regulations).

NBS Interagency Reports (NBSIR)—A special series of interim or final reports on work performed by NBS

for outside sponsors (both government and non-government). In general, initial distribution is handled by the sponsor; public distribution is by the National Technical Information Service, Springfield, VA 22161, in paper copy or microfiche form.
U.S. Department of Commerce

National Bureau of Standards

Gaithersburg, MD 20899

Official Business

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