I

J f- 1 1 NBSIR 79-1591-2

NBS

PUBLICATIONS

Semiconductor Technology

Program

Progress Briefs

SEP 2S 1979

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NAT'L INST. OF STAND & TECH R.I.C.

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W. Murray Bullis, Editor

Electron Devices Division Center for Electronics and Electrical Engineering

National Engineering Laboratory

National Bureau of Standards Washington, D.C. 20234

March 1979

Prepared for - The Defense Advanced Research Projects Agency

The National Bureau of Standards

The Division of Electric Energy Systems, Department of Energy

The Solar Energy Research Institute

The Defense Nuclear Agency

The Charles Stark Draper Laboratory

The Army Electronics Research and Development Command

he Air Force Avionics Laboratory

Naval Material Command

he Naval Weapons Support Center

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SEMICONDUCTOR TECHNOLOGY PROGRAM TABLE OF CONTENTS Process-Induced Radiation Damage .... 3 Resistivity-Dopant Density Evaluation . 4 Spreading Resistance Measurements ... 5 Spreading Resistance Profiling 5 Cross-Bridge Sheet Resistor 6 PIND Test Evaluation 6 Moisture Infusion Into IC Packages ... 7 Power Devices Workshop 7 Future Event 7 New Topics 8 Update 8 Work in Progress 8 Recent Publications 9 Publications in Press 10

ABSTRACT — This report provides information on the current status of NBS work on measurement technology for semiconductor ma- terials, process control, and devices. Re- sults of both in-house and contract research

are covered. Highlighted activities include

studies of: process-induced radiation damage; resistivity-dopant density relationships in silicon; spreading resistance mea- surements; spreading resistance profiling;

cross-bridge sheet resistor test structure; PIND test; and moisture infusion into hermetic packages and conduct of a workshop on power semiconductor devices. In addition,

brief descriptions of new and selected on- going projects are given. The report is not meant to be exhaustive; contacts for obtaining further information are listed. Com- pilations of recent publications and publications in press are also included. KEY WORDS: Electronics; integrated circuits; measurement technology; microelectronics; semiconductor devices; semiconductor materials; semiconductor process con- trol; silicon.

Preface

This report covers results of work during the forty-second quarter of the NBS Semiconductor

Technology Program. This Program serves to focus NBS research on improved measurement technology for the use of the semiconductor device community in specifying materials,

equipment, and devices in national and international commerce, and in monitoring and con- trolling device fabrication and assembly. This research leads to carefully evaluated,

well-documented test procedures and associated technology which, when applied by the industry, are expected to contribute to higher yields, lower cost, and higher reliability

of semiconductor devices and to provide a basis for controlled improvements in fabrication processes and device performance. By providing a common basis for the purchase

specifications of government agencies, improved measurement technology also leads to greater economy in government procurement. Financial support of the Program is provided by

a variety of Federal agencies. The sponsor of each technical project is identified at the end of each entry in accordance with the following code: 1. The Defense Advanced Research

Projects Agency; 2. The National Bureau of Standards; 3. The Division of Electric Energy

Systems, Department of Energy; 4. The Solar Energy Research Institute; 5. The Defense Nu- clear Agency; 6. The C. S. Draper Laboratory; 7. The Army Electronics R&D Command; 8. The Air Force Avionics Laboratory; 9. The Naval Material Command; and 10. The Naval Weapons

Support Center. This report is provided to disseminate results rapidly to the semiconductor community.

It is not meant to be complete; in particular, references to prior work either at NBS or elsewhere are omitted. The Program is a continuing one; the results and conclusions re- ported here are subject to modification and refinement. Further information may be ob- tained by referring to more formal technical publications or directly from responsible

staff members, telephone: (301) 921-listed extension. General information, past issues of progress briefs, and a list of publications may be obtained from the Electron Devices Division, National Bureau of Standards , "Washington, D.C. 20234, telephone: (301) 921-3786.

2
NBS

Semiconductor Technology Program

Progress Briefs

<NB^

Process-Induced Radiation Damage

Additional calculations have been made

of the radiation absorbed dose incurred

by oxide layers during exposure of positive resist films during x-ray or direct-write electron-beam lithography. In order to make an explicit calculation, a typical device-like structure consisting of a silicon dioxide layer,

50 nm thick, under an aluminum layer

from 100 to 1000 nm thick under a resist

layer was assumed. In the case of x-ray

lithography, the calculations were made

for both aluminum (1.487 keV) and copper

(0.930 keV) characteristic x-rays impinging on a resist layer 500 to 1000 nm

Radiation absorbed dose in a 50-nm thick

silicon dioxide layer of a typical

resist-coated MOS structure for an x-ray

exposure of 1 J/ct^ , plotted as a function of the thickness of the aluminum

metallization. Results are shown for

characteristic x-rays from aluminum

(1.487 keV) and copper (0.930 keV) . The

band width indicates a variation in re- sist thickness from 500 nm (at the top

of the band) to 1000 nm (at the bottom

of the band)

.

thick. In the case of electron-beam

lithography, the calculations were made

for both 15- and 25-keV electrons impinging on a resist layer 500 nm thick.

The results of the calculations are presented in the accompanying figures as absorbed dose per unit exposure dose or incident flux as a function of aluminum

thickness. Exposures required for typical x-ray resists range from about 1 to about 500 j/cm^; thus, the radiation absorbed dose during x-ray lithography may

range from 0.04 to 50 Mrad (Si02). Flu- ences required for typical electronbeam resists range from about 0.05 to about 50 ]iC/cm^; thus, the radiation absorbed dose during electron-beam lithography may range from about 0.15 to 300

Mrad (Si02). [Sponsors: 1,2,]

(K. F. Galloway,

S. Mayo, and P. Roitman,* x3625)

*NBS-NRC Postdoctoral Research Associate.

ALUMINUM THICKNESS ()um) Radiation absorbed dose in a 50-nm thick

silicon dioxide layer of a typical MOS

structure coated with 500 nm of resist

for an incident electron beam fluence of

1 \iC/cm^, plotted as a function of the

thickness of the aluminum metallization.

Results are shown for electron beam

energies of 15 and 25 keV.

3
Resistivity-Dopant Density Evaluation

Empirical expressions were developed to fit resistivity-dopant density data measured on phosphorus-doped silicon with

resistivity, p , in the range from

0.00085 to 160 cm (dopant density, N,

in the range from 9 x 10^^ to 2.7 x 10^^

cm”^). A nonlinear least squares method

using the DATAPLOT language was employed

in the fitting procedure. The expressions are in the form of quotients of two third degree polynomials of the

form:

Ao + AiX + A2X^ + AaX^

log F

= . 1 + BiX + B2x2 + BsX^

The function F is the product qpN

(where q is the electronic charge) nor- malized to 1 C'J^/cm^ (V*s/cm^); fits were obtained for both X = log (p/pg)

and X = log (n/Nq) with pQ = 1 f2«cm and

Nq = lO^S cm“3 for temperatures of 23“C

and 300 K. These normalization factors were selected so that | X | <4 over the

entire range.

Computer-generated plot of the product

of electronic charge (Q) in coulombs,

resistivity (R) in ohm-centimeters, and

dopant density (N) in reciprocal cubic

centimeters as a function of log N for

phosphorus-doped silicon at a temperature of 300 K. Experimental data are

shown as crosses. In computing the fit,

shown as a solid curve, 16 was subtracted from log N as discussed in the

text.

Coefficients for the Fits of Resistivity-Dopant

Density Data at 23®C.

F qpN/(qpN)o P /m

e eo X log(p/po) log(N/No) log(p/po) log(n/nQ) -3.1112 -3.0770 3.1104 3,0774 -3.3650 2.3113 3.3501 -2.3506 -1.2914 -0.66228 1.2738 0.67827

A3 -0.16110 0.066679 0.15906 -0.067513

1.0558 -0.71242 1.0513 -0.72698

B2 0.40896 0.20928 0.40266 0.21413

63 0.050481 -0.022091 0.050027 -0.022021

Normal ization factors:

(qpN)o = 1 V*s/cm2

p =

eo Pn

1 cm2/v»s

1 fl*cm Nq = n^ = 10^^ cnr^

Fits were also obtained for electron

mobility, Pg , but it was necessary to convert the dopant density to electron

density, n, before making the computation; the published results of Li and

Thurber were used for this conversion.

In this case the function F is the elecLOG(RHO) Computer-generated plot of the electron

mobility in square centimeters per voltsecond as a function of the log of re- sistivity (RHO) in ohm-centimeters for

phosphorus-doped silicon at a temperature of 300 K. Experimental data are shown as crosses; in computing the electron mobility , dopant density was con- verted to carrier density as discussed

in the text. The computer fit is shown

as a solid curve.

4
tror; mobility normalized to 1 cra^/V«s

and X equals log ( p/ pq) or log (n/nQ)

with no = 10^^ cnT^ . Again, fits were obtained for temperatures of 23°C and

300 K. The coefficients for the 23°C cases are listed in the accompanying table.

Although each expression contains seven coefficients, the computation is straightforward and results in smooth curves as illustrated by the accompanying plots of qpN VS. N and vs. p, both for a temperature of 300 K. [Sponsors: 1,2] (W. R. Thurber, x3625, R. L. Matt is and Y. M. Liu, x3541 , and J. J. Filliben, x365l)

Spreading Resistance Measurements

Studies of the effect of specimen sur- face preparation on measurement of the

spreading resistance of high-resistivity

(111) ^i-type silicon were completed. In addition, more extensive tests were made

to compare the effects of specimen preparaticn on the spreading resistance calibration response for both p- and n-type

specimens over the entire resistivity

range appropriate to thyristor fabrication. The results confirmed earlier indications that, overall, polishing with

0.5-ym diamond grit in a nonaqueous me- dium against a nonwoven polishing cloth

yielded the most satisfactory surface

conditions. Compared with measurements

on specimen surfaces polished in the

customary way with colloidal silica,

measurements on specimens with 0.5-ym

diamond-polished surfaces showed (1)

comparable signal-to-noise level

throughout the resistivity spectrum, (2)

nearl}r the same overall response for the

entire resistivity range of p-type specimens and for the n-type specimens below

1 Q* cm, and (3) both more reproducible

and more linear (with resistivity) re- sults for n-type specimens with resistivity greater than 1 J2»cra. A test was conducted to verify the

applicability of spreading resistance

calibration data obtained on boron-doped

Spreading resistance response for

boron-, gallium- , and aluminum-doped

silicon.

silicon to analysis of aluminum- or gallium-doped specimens. Spreading re- sistance measurements were made on boron—, gallium—, and aluminum-doped

silicon in the resistivity range com- monly used for thyristor fabrication.

As shown in the accompanying figure , no effect due to dopant species could be determined within the error limits imposed by the basic repeatability of the measurement and the resistivity uniformity of the test specimens. [Sponsor:

3] (J. R. Ehrstein, x3625)

Spreading Resistance Profiling

Shallow- angle beveling for depth profiling by spreading resistance imposes a requirement for very flat surfaces that

is not imposed for measurements on top

surfaces of specimens. Use of diamond

polishing was tested for applicability

to preparing beveled specimens for depth

profiling by spreading resistance measurements. To avoid edge rounding at the intersection of the bevel and the

top surface, it is necessary to polish

the specimen against a hard work sur- face. Polishijig with 0.1-ym polycrystalline synthetic diaiaond grit in a non- aquecus medium on a glass plate which

had been previously frosted using 9-ym

aluminum oxide was found to be a satisfactory procedure. The beveled silicon

surface so obtained has a somewhat

higher scratch density than that which

5 c
was obtained when polishing large area top surfaces with 0.5-ym diamond grit

against a nonwoven polishing cloth.

However, this scratch density does not seem to affect the quality of spreading

resistance depth profiles. Further,

surface profilometer measurements indicated that even very shallow angles as small as 6 min of arc had sharp intersections with the top surface. Such

sharp bevels allow more accurate profiles to be made than can be made on bevels prepared by polishing with colloidal silica which typically display a rounded region near the intersection.

To bevel actual thyristor structures,

larger bevel angles (3 to 10 deg) must

be used. Because the O.l'-ym diamond is too fine to remove the required amount of material in a reasonable time, a multiple-step process with several different grades of grit must be used.

This process is generally satisfactory,

although particular care is required to avoid degradation of surface quality

which may adversely affect the data.

[Sponsor: 3] (J. R. Ehrstein, x3625)

Cross-Bridge Sheet Resistor

Initial studies of the sensitivity of

the cross-bridge sheet resistor test structure to geometric variations were carried out. This test structure is intended for measurement of sheet resis- tance and linewidth of diffused, implanted, or metal regions. This phase

of the work involved investigation of

geometrical effects on the measured value of the linewidth. Geometrical properties studied included the width of the

voltage taps in the bridge portion of

the structure and the distances between

the two taps and between a tap and the

nearest current contact corner. Results

suggest that the current penetration into the taps is substantially less than

previously estimated and that errors in

measured linewidth are less than 1% for

taps the same width as the line being

measured, spaced 20 linewidths apart.

This geometry is frequently found in

cross-bridge structures. Narrower taps.

of course, introduce even less error; rounding of the corners where the tap

meets the line (which becomes significant for taps and lines less than 5 ym

wide) tends to increase the error some- what. The taps can be placed as close

as one linewidth to a current contact corner without introducing a measurement

error as great as 0.5%. [Sponsor; 1] (R. L. Mattis, x354l)

PINO. Test Evaluation*

Evaluation studies of the particle

impact noise detection (PIND) test for screening microelectronic devices for

the presence of loose particles were completed. Procedures and apparatus

specified in Test Method 2020 of MIL- STD-883, Test Methods for Electronics,

were compared. For the major experimental effort, specially prepared test packages were used. Particles of a va- riety of shapes, sizes, and materials

characteristic of those likely to be found in devices as a result of processing steps were used to seed most of these packages; some packages were left

unseeded as controls. One of the principal problems with the PIND test is the immobilization (lock-up) and release of particles through electrostatic and other mechanisms. The present series of experiments showed evidence of uncon- trolled lock-up of particles in seeded

packages; flatpacks or DIPs with ceramic

parts showed a greater tendency to such

lock-up than did metal cans. Despite

the uncertainties introduced by the

lock-up problem, the following recommen- dations were made: (l) that semiautomatic apparatus, with preset detectability levels, be used to avoid effects due

to operator variability; (2) that parametric trials be conducted on each package type to be tested in order to determine appropriate test conditions and de-

*Work carried out in the NBS Electrosysteras Division

under the sponsorship of the NASA Goddard Space Flight Center (Purchase Order S39193-3). Although

this work was conducted independently from the Semi- conductor Technology Program, the results are in- cluded here because of the widespread interest of the semiconductor electronics community in this test

.

6

/
tectability levels; (3) that consideration be given to limiting the initial

acceleration levels to ±10 g^^ for some package types; (4) that the maximum permitted output impedance of the detection

transducer assembly be specified to avoid cable noise problems; and (5) means be developed to avoid exceeding

the specified preshock acceleration levels (as did the acceleration level provided by the conmercial preshock apparatus, one allowed by Test Method 2020,

used in the tests) in order to minimize

damage to the devices. A complete re- port of the work has been published as NBSIR 78-1590 (NASA), Loose-Particle De- tection in Microelectronic Devices.

(J. S. Hilten, P. S. Lederer, J. F. Mayo-Wells, and C. F. Vezzetti, x3821)

Moisture Infusion Into 1C Packages

A preliminary study of the relationships

between moisture infusion, leak size,

and device reliability has been com- pleted at Martin Marietta Aerospace.

Two sets of experiments were conducted.

In one, packages constructed with a con- trolled leak and an oxide-type moisture

sensor were placed in a controlled humidity environment and the water vapor

content measured as a function of time.

The packages tested had leak sizes in

the range between 10“^ and 10 “5 atm»cm^/s. The second experiment was a 5000-h life test in which 186 packages,

each of which contained unpassivated 741 operational amplifier chips, were subjected to an atmosphere with 85% relative humidity at 85“C. In this case the

packages had measured leak sizes between

10”^ and 10“^ atm*cm3/s. The results

exhibited a great amount of scatter,

both because of the primitive nature of

the measurement methods available for use in this type of experiment and be- cause of the large variability in both

water vapor infusion and the reactions

of water vapor on device surfaces. Nevertheless, it can be safely concluded

that present leak rate limits for large

packages are not low enough to insure

that the maximum permissible moisture

level will not be exceeded during a rea- sonable service life. [Sponsor: 1] (S. Ruthberg,* x3621)

Power Devices Workshop

A Workshop on Power Semiconductor Devices, cosponsored by the IEEE Electron

Devices Society and NBS , was held at NBS/Gai thersburg on December 7, 1978.

This was the first workshop to bring

together technical experts to discuss

freely the status of technical problems

that impede progress in the field of

power semiconductor devices. The workshop was attended by 86 scientists and

engineers; 22 participants were from

outside the U.S. Following brief formal

presentations, four working groups were formed to deal with the following topics: transistor reverse-bias safe operating area considerations, thyristor

modeling, transistor modeling, and highvoltage junction technology. At the

conclusion of the program, all attendees

had an opportunity to hear and discuss

the findings of the individual working

groups. The participants at this plenary session agreed that the workshop had

been valuable and that the activity

should be regarded as a continuing one. Plans are already underway for a second

workshop next year. A summary of the

results of the workshop will be included

in a future issue of the Electron De- vices Society Newsletter. [Sponsor: 2]

(F. F. Oettinger, x362l)

Future Event . .

.

A Workshop on Photovoltaic Material and

Device Measurements will be held in Arlington, Virginia, on June 11 to 13,

1979. The workshop, sponsored by the Solar Energy Research Institute in asso- ciation with NBS, is intended to accelerate the development of thin film solar

cells by improving the versatility and

reliability of material and device mea- surement techniques. The workshop will

be restricted to polycrystalline materi-

*NBS Contact.

C
als and devices; amorphous material and

devices will not be discussed. Sessions

are planned in measurements for struc- tural and chemical properties, optical

and electro-optical properties, and

charge transport properties. The workshop will be cochaired by D . E. Sawyer

(NBS) and J. Morabito (Bell Laboratories). [Sponsor: 4]

(D. E. Sawyer, x3621)

New Topics . . . Thermal Resistance Standards — A new project was begun to enable NBS to supply standard reference materials (SRMs)

for thermal resistance to the semiconductor device industry. The SRMs will

be in the form of selected commercially

available power transistors that have

been characterized and certified as to their thermal resistance properties.

The initial group of SRMs, expected to be completed early in 1980, will be com- prised of transistors in TO-3 packages.

Dedicated equipment to perform the mea- surements is now being designed and con- structed. [Sponsor: 2] (D. L. Blackburn and D. W. Berning, x3621)

Linewidth Standards — An automated

scanning photometric optical microscope

system is being assembled for use in

measuring photomask-like linewidth calibration artifacts. These artifacts are being developed as standard reference

materials for measurements on chrome

photomasks with transmitted light. The

artifacts themselves will be similar to the ones being employed in the interlaboratory evaluation of NBS-developed

linewidth measurement procedures; modifications based on the findings of the

evaluation are planned to facilitate use of the artifacts. [Sponsor: 1] (j. M. Jerke and D. Nyyssonen, x3621)

Update . . . A final report covering the development,

at RCA Laboratories, of apparatus and

procedures for extended range MIS C(V)

measurements has been published as NBSGCR-78-155. This report provides a com- plete summary and cross index of the

various publications which have appeared

as a result of this work, together with

an errata section which includes several

revised circuit diagrams, the prior versions of which contained minor errors or omissions. Since use of the corrected

diagrams and other items will facilitate

construction of the apparatus, persons

planning to replicate this measuring

system should be sure to obtain a copy

of the final report. [Sponsor: 1] (R. Y. Koyama,* x3625)

Work in Progress . . . Isothermal Transient Capacitance (ITCAP)

techniques were utilized to characterize

platinum defect centers introduced into

3 to 5 fj*cm (111) n- and p-type silicon.

Following processing of the wafers with

test pattern NBS-3, the platinum was introduced by diffusion from a spin-on

platinum-silica emulsion applied to the

back surface of the wafer. The diffusions were carried out in flowing nitrogen for 1 h at 900°C for the n~type

wafer and at 1000“C for the p-type

wafer, resulting in platinum densities

of about 5 to 7 x 10^^ era" 3. ITCAP measurements were made on the gated diode

test structure (3.10). An electron

trapping center 195.5 ± 2 meV below the conduction band edge was observed in the

n-type wafer, and a hole trapping center

289 ± 2 meV above the valence band edge was observed in the p-type wafer. Emission coefficients were observed to be 1.43 X 10^ (±26%) and 3.33 x lo^ (±18%)

s”^*K“^, respectively. Many energy levels associated with platinum have been

reported in the literature. The specific origins and nature of each of these

centers have not yet been established.

[Sponsor: 2,3]

(W. E. Phillips and R. Y. Koyama, x3625)

*NBS Contact; the assistance of J. L. Repace at the Naval Research Laboratory in identifying errors in the published reports is gratefully acknowledged. 8 /
A closed form expression has been derived for the decay of the open-circuit

voltage of a gated diode for the case where the gate voltage is such as to ac- cumulate the underlying silicon. It is found that the voltage does not have a simple exponential dependence on time

but that the generation lifetime in the

depletion region beneath the can be found from the initial slope of a plot of log voltage against time. In inversion, the initial slope of this

plot yields an effective lifetime, which

includes contributions from the depletion regions both beneath the junction

and beneath the gate. [Sponsor: 1] (M. G. Buehler, x3541)

Analysis of the data received to date

in the interlaboratory evaluation of the

procedures for measuring linewidths in

the 1- to iO-ym range on chrome photomasks using transmitted light is in

progress. Preliminary results suggest

both that significant data spreads (0.3

to 0.6 ym) may occur within individual

organizations and that differences between values measured by NBS and the industrial participants are not always

largest for the smallest (0.5- to 0.9-ym

wide) lines where optical resolution of

the measuring equipment would be ex- pected to be the limiting factor.

[Sponsor: 1] (J. M. Jerke, x3621)

The laser scanner has been modified so that solar cells up to 100 mm in diameter may be scanned without repositioning. The diameter of the scanning probe

beam is 25 ym. Cells of different types

being developed by a number of SERI subcontractors have been scanned to search

for possible defects and reveal details

of cell operation. Of particular interest at the present time are passivated

and unpassivated polycrystalline silicon

cells. [Sponsor: 4]

(D. E. Sawyer, x3621)

Recent Publications . . . Buehler, M. G., Microelectronic Test Patterns for Use in Procuring LSICs,

Proe» Industry/Joint Sevvioes Automatic

Test Conf. and Workshop, san Diego,

California, April 5-7, 1978, pp. 231-

233.

*Strausser, Y. E., Scheibner, E. J., and

Johannessen, J. S., Obse ations of AI2 O3 and Free Si in the Interface Be- tween A1 Films and Si02, Thin Solid

Films 203-214 (15 July 1978).

R. E., A Study of Leak Rate Versus Reliability of Hybrid Packages,

Proo» 1978 Intermat, Microelectronics

Symp., Minneapolis, Minnesota, September 25-27, 1978, pp. 121-124.

Russell, T. J., Maxwell, D. A., Reimann,

C. T., and Buehler, M. G., A Microelectronic Test Pattern for Measuring the

Uniformity of an Integrated Circuit

Fabrication Technology, Proc, Govt,

Microcircuit Applications Symp,, Monterey, California, November 14-16, 1978,

pp. 33-36.

^McCarthy, D., Acevedo, J., Stamps, B. , Lonky, M. , and Buehler, M. G., An Advanced Integrated Test Structure for

High Speed Measurement of Generation

Lifetime, Proc, Govt, Microcircuit Applications Conf,, Monterey, California,

November 14-16, 1978, pp. 37-38.

*Wilson, R. G., Dunlap, H. L., Jamba, D. M., and Myers, D. R. , Semiconductor

Measurement Technology: Angular Sensitivity of Controlled Implanted Doping

Profiles, NBS Spec. Publ. 400-49 (November 1978).

Mattis, R. L., and Doggett, M. R. , A Microelectronic Test Pattern for Analyzing Problems Related to Automatic Wafer

Probing and Probe Cards, Solid State

Technology 7^ (11), 76-79 (November

1978).

Nyyssonen, D., and Jerke, J. M. , Linewidth Measurement: From Fine Art to Science, Technical Digest, 1978 Internat. Electron Devices Meeting, Washington, D.C., December 4-6, 1978, pp. 437-440.

Blackburn, D. L., and Berning, D. W.

,

Some Effects of Base Current on Transistor Switching and Reverse-Bias

Second-Breakdown, Technical Digest,

1978 Intemat, Electron Devices Meeting, Washington, D.C., December 4-6,

1978, pp. 670-675.

Reports of Contract Research. 9

junction ^Sulouff

,

c
Galloway, K. F. , VLSI Processing, Radiation, and Hardening, IEEE Trans, Nuel.

Sei, NS-25 , 1469-1472 (December 1978).

Jiarsden, C, P., Tabulation of Published

Data on Electron Devices of the

U.S.S.R. Through December 1976, NBSIR

78-1564 (Decem.ber 1978).

Leedy, T. F. , and Liu, Y. M. , Semieonduetor Measurement Teehnology: Microelectronic Processing Laboratory at NBS, NBS Spec. Publ. 400-53 (December

1978)

. Bhar, T. N., Dat, R. , Koyama, R. Y., and

Galloway, K. F., Effect of Ionizing Ra- diation on Mobile-Ion Density in MOS

Oxides, Eteetron, Lett. 15, 16-17 (4

January 1979).

*Goodman, A. H., Extended Range MIS C(V)

Measurement, A Technique for Monitoring

Semiconductor Device Processing, NBSGCR-78-155 (January 1979).

Koyama, R. Y., Semioonduator Measurement

Technotogy

:

A Wafer Chuck for Use Be- tween -196“ and 350“C, NBS Spec. Publ.

400-55 (January 1979).

*Larrabee, G., and Dobrott, R., Techniques for the Preparation and Analysis

of Standard Silicon Semiconductor Specimens for the Ion Microprobe Mass Analyzer, NBS-GCR-79-158 (January 1979).

Linholm, L. W. , CMOS/SOS Test Pattern

for Process Evaluation and Control:

Annual Report, NBSIR 79-1595 (January

1979)

.

Publications in Press ...

Berning, D. W. , Semioonduetor Measurement Teehnology: A Reverse-Bias Safe

Operating Area Transistor Tester, NBS

Spec. Publ. 400-54.

Ehrstein, J, R., Two-Probe (Spreading

Resistance) Measurements for Evaluation

of Semiconductor Materials and Devices,

flondestruetive Evaluation of Semiconductor Materials and Devices, NATO Advanced Study Institute, Frascati,

Italy, September 18-30, 1978.

Gilsinn, D., and Kraft, R. , Semiconductor Measurement Technology: DISTRIB I, An Impurity Redistribution Computer

Program, NBS Spec. Publ. 440-57.

*Reports of Contract Research.

Harman, G. G., Nondestructive Tests Used

to Insure the Integrity of Semiconductor Devices with Emphasis on Passive

Acoustic Techniques, Nondestructive

Evaluation of Semiconductor Materials

and DevieeSy NATO Advanced Study Institute, Frascati, Italy, September 18-30,

1978.

*Kasden, H. L., Linewidth Measurement by

Diffraction Pattern Analysis, NBS-GCR78-142.

Koyama, R. Y., and Buehler, M. G., Novel

Variable-Temperature Chuck for Use in the Detection of Deep Levels in Processed Semiconductor Wafers, Rev. Sci.

Instrum.

*Li, S. S., Semiconductor Measurement

Technology : The Theoretical and Experimental Study of the Temperature and

Dopant Density Dependence of the Hole

Mobility, Effective Mass, and Resistivity in Boron-Doped Silicon, NBS Spec.

Publ. 400-47.

Mayo, S., and Evans, W. H., Development

of Hydrogen and Hydroxyl Contamination

in Thin Si02 Thermal Films, NBSIR 78-

1558.

Myers, D. R. , Koyama, R. Y., and Phillips, W. E., An Implantation Predeposition Technique for Deep Level Characterization, Radiat. Eff.

Myers, D. R. , Roitman, P., and Mayo, S.,

Electrical Characterization of Low-Dose

Ion Implanted Silicon Annealed with Microsecond Laser Pulses, Proc. MRS Symp. on Laser-Solid Interactions and Laser

Processing, Boston, Massachusetts, No- vember 28-December 1, 1978.

Myers, D. R., and Wilson, R. G., Alignment Effects on Implantation Profiles

in Silicon, Radiat. Eff.

Russell, T. J., and Maxwell, D. A.,

Semiconductor Measurement Technology:

A Production-Compatible Microelectronic

Test Pattern for Evaluating Photomask

Misalignment, NBS Spec. Publ. 400-51.

Russell, T. J., Maxwell, D. A., Reimann,

C. T., and Buehler, M. G., A Microelectronic Test Pattern for Measuring the

Uniformity of an Integrated Circuit

Fabrication Technology, Solid State

Technology

.

Sawyer, D. E., Kessler, H. K., and

(Continued on Back Cover) 10

/
NBS-114A (REV. 0-76) U.S. DEPT. OF COMM. BIBLIOGRAPHIC DATA

SHEET

1. PUBLICATION OR REPORT NO. NBSIR 79-1591-2

t He. 1

4. TITLE AND SUBTITLE Semiconductor Technology Program - Progress Briefs5. Publication Date March 1979

7. AUTHOR(S) W. Murray Bullis, Editor8. Performing Organ. Report No.

9. PERFORMING ORGANIZATION NAME AND ADDRESS NATIONAL BUREAU OF STANDARDS DEPARTMENT OF COMMERCE

WASHINGTON, DC 20234 and various contractor facilities (as noted)

IL^Contlct/Grant N^ See item 15.

12. SPONSORING ORGANIZATION NAME AND COMPLETE ADDRESS (Street, City, State, zip) NBS, Washington, DC 20234; ARPA, Arlington, VA 22209; DNA, Washington,

DC 20305; Dept, of Energy, Washington, DC 20545; SERI, Golden, CO; C.

S. Draper Laboratory, Cambridge, MA 02139; AFAL, Wright-Patterson AFB, OH 45433; Army Electronics R&D Command, Ft. Monmouth, NJ 07703; NavMat

Command, Hdqtrs., Washington, DC 20360; NWSC, Crane, IN 47522.

13. Type of Report & Period Covered Interim

Oct. - Dec. 1978

15. SUPPLEMENTARY NOTES arpa Order 2397, Program Code 9Y10; DNA lACRO 79-821; Dept, of Energy, In- teragency Agreement EX-77-A01-6010, T. 0. A021-EES; SERI, EG-77-C-01-4042; C. S. Draper Laboratory, P. 0. DL-H-139485 (Navy contract N 00030-78-C-0100) ; AFAL, MIPR FY117578N2062; Army Electronica, MERADCOM, 78-09423; NavMat Command, N0003778lP890l0; NWSC, N0016479WR30036

.

16. ABSTRACT (A 200-word or leaa (actual aummary ol moat significant information. If document includes a aignilieant bibliography or

literature survey, mention it here.) This report provides information on the current status of NBS work on measurement

technology for semiconductor materials, process control, and devices. Results of both in-house and contract research are covered. Highlighted activities include

studies of: process-induced radiation damage; resistivity-dopant density relationships in silicon; spreading resistance measurements; spreading resistance profiling;

cross-bridge sheet resistor test structure; FIND test; and moisture infusion into

hermetic packages and conduct of a workshop on power semiconductor devices. In addition, brief descriptions of new and selected on-going projects are given. The

report is not meant to be exhaustive; contacts for obtaining further information are listed. Compilations of recent publications and publications in press are also

included

.

17. KEY WORDS (six to twelve entries; alphabetical order; capitalize only the first letter ol the firat key word unleaa a proper name;

aeparated by aemicolona) Electronics; integrated circuits; measurement technology; microelectronics; semiconductor devices; semiconductor materials; semiconductor process control; silicon.

18. AVAILABILITY Unlimited

I I For Official Distribution. Do Hot Release to NTIS

I I Order From Sup. of Doc., U.S. Government Printing Office, Washington, DC

20402, SD Stock No. SN003-003-

[5n Order From National Technical Information Service (NTIS), Springfield, VA. 22161

19. SECURITY CLASS

(THIS REPORT)

UNCLASSIFIED

20. SECURITY CLASS

(THIS PAGE)

UNCLASSIFIED

21. NO. OF

PRINTED PAGES 12

22. Price

$4.00

USCOMM-OC 11

C
(Continued from Page 10) Schafft, H. A., Solar Cell Measurement

Technique Development and Other Services, Pvoe. DoE Annual Review for Advanced Materials R&D Branch, Vail, Colorado, October 24-26, 1978.

Schafft, H. A., Semiconductor Measurement Technology: Reliability Technology for Cardiac Pacemakers III — A Workshop Report, NBS Spec. Publ. 400-

50. Schafft, H. A., Performance Criteria for

Photovoltaic Power Conditioning, Control, and Storage, Proc, DoE Photovoltaic Technology Development and Applications Program Review, Arlington, Virginia, November 7-9, 1978.

*Schwarz, S. A,, and Helms, C. R. , A Geometrical Model of Sputtering, Appl.

Reports of Contract Research.

Phys, Letters,

*Weglein, R. D., and Wilson, R. G., An Acoustic Gray Scale for Scanning Acoustic Microscopy and Diagnostic Ultrasound, Ultrasound Imaging,

*Wilson, R. G., and Comas, J., Correlation of Atomic Distribution and Implantation Induced Damage Profiles in Be

I on- Implanted Silicon, Radiat, Eff,

*Wilson, R. G., and Comas, J., Channeling

and Random Equivalent Depth Distributions of 150-keV ^Li, ^Be, and ^^B Im- planted into <100> and <110> Silicon,

Radiat, Eff,

*Wilson, R. G. , and Weglein, R. D.,

Acoustic Material Signatures Using the

Reflection Acoustic Microscope, Proc,

1st Intemat, Symp, Ultrasonics Matls,

Characterization, Washington, D.C.,

June 8-10, 1978.

U.S. DEPARTMENT OF COMMERCE, Juanita M. Kreps, Secretary

Jordan J. Baruch, Assistant Secretary for Science and Technology

NATIONAL BUREAU OF STANDARDS. Ernest Ambler, Director