# Patent

## Title
Microprocessor-based controller for actuator motors with capacitive

## Abstract

A current regulator is disclosed which utilizes a well known driver chip. The driver chip has an input signal known as a brake signal "BRK" which typically is used to stop a standard DC motor. In this invention, the brake signal "BRK" is used to create a low resistance current path in order to sustain the current of the current regulator which is used in conjunction with a stepper motor.

## Background
This invention relates to a current regulator, and more particularly to a current regulator which utilizes a driver chip to create a low resistance current path to sustain the current of a stepper motor.

Referring to FIG. 1, there is shown a prior art current regulator circuit 1O used in conjunction with a stepper motor. In FIG. 1, a voltage supply V.sub.m is connected to the collectors c.sub.1 and c.sub.2 of two power transistors T.sub.1 and T.sub.2 respectively. The emitter e.sub.1 of the transistor T.sub.1 is connected to the emitter e.sub.2 of the transistor T.sub.2 through a stepper motor which is shown as an inductance L connected to nodes 12 and 14. The anode of a diode D.sub.1 is connected to node 12 and its cathode is connected to V.sub.M. The anode of diode D.sub.2 is connected to node 14 and its cathode is connected to V.sub.M.

In FIG. 1, there are two more transistors T.sub.3 and T.sub.4. The collector c.sub.3 of the transistor T.sub.3 is connected to the emitter e.sub.1 of the transistor T.sub.1, and the collector c.sub.4 of the transistor T.sub.4 is connected to the emitter e.sub.2 of the transistor T.sub.2. The two emitters e.sub.3 and e.sub.4 of the transistors T.sub.3 and T.sub.4 are connected to each other at node 16 and the node 16 is connected to ground G through a resistor R. There are two diodes D.sub.3 and D.sub.4 between the node 16 and the nodes 12 and 14. The cathode of the diode D.sub.3 is connected to node 12 and its anode is connected to node 16 and the cathode of diode D.sub.4 is connected to node 14 and its anode is connected to node 16.

In addition, there are four AND gates A.sub.1, A.sub.2, A.sub.3 and A.sub.4 each of which is connected to a base b.sub.1, b.sub.2, b.sub.3, and b.sub.4 of one of the transistors T.sub.1, T.sub.2, T.sub.3 and T.sub.4 respectively. Each AND gate can activate its respective transistor.

Signal Fwd is connected to the gates A.sub.1 and A.sub.4 and signal Rev is connected to the gates A.sub.2 and A.sub.3. When signal Fwd is "1", it activates the gates A.sub.1 and A.sub.4 which in turn active the transistors T.sub.1 and T.sub.4. When signal Rev is "1", it activates the gates A.sub.2 and A.sub.3 which in turn activate the transistors T.sub.2 and T.sub.3.

With this arrangement, at any given time, either the transistors T.sub.1, and T.sub.4 are activated or the transistors T.sub.2 and T.sub.3 are activated.

In the circuit 10 of FIG. 1, once the voltage V.sub.M is turned on, if the signal Fwd is "1", then the transistor T.sub.1, creates a current M which flows through the stepper motor L, the transistor T.sub.4, and resistor R into ground G. The voltage V.sub.R from the resistor R at node 16 will be sent to a comparator 18. Comparator 18 will compare this voltage V.sub.R to a reference voltage V.sub.Ref. Once the voltage V.sub.R reaches the reference voltage V.sub.Ref, the comparator 18 sends out a signal 20. Signal 20 from the comparator 18 triggers the one shot timer 22. The one shot timer 22 sends out a limit signal 24 and maintains the limit signal 24 for a given period of time. The signal 24 in activates both gates A.sub.1 and A.sub.2. However, since at any given time either gate A.sub.1 or gate A.sub.2 is active, the signal 24 inactivates the active gate. In this example, since gate A.sub.1 was active, the signal 24 inactivates gate A.sub.1 which in turn inactivates the transistor T.sub.1.

Once the transistor T.sub.1 is inactivated, the current M will start flowing into loop A. Loop A comprises stepper motor L, transistor T.sub.4 and diode D.sub.3. The current M keeps circulating in loop A. However, due to the structure of bipolar transistor T.sub.4 and diode D.sub.3, they waste power. The power waste is due to a voltage drop across the transistor T.sub.4 and diode D.sub.3. The power waste reduces the energy within the inductance L which in turn causes the current in loop A to substantially decrease.

In order to constraint the current from decreasing below a level, after a certain time which is measured by the one shot timer 22, the one shot timer 22 will tun off the limit signal 24. Once the limit signal 24 is turned off, gate A.sub.1 will be activated and the transistor T.sub.1 will be turned on which causes the current M to increase to level l.sub.Ref and cause the voltage V.sub.R to increase back to level V.sub.Ref. Once the voltage V.sub.R reaches the voltage V.sub.Ref, signals 20 and 24 will be generated which will turn off the transistor T.sub.1. With this approach the current of the stepper motor can be regulated.

Referring to FIG. 2, there is shown a current M generated through the circuit 10 of FIG. 1. The current during periods t.sub.1, is the current which is generated when the transistors T.sub.1 and T.sub.4 are on. The current during periods t.sub.2, is the current which is circulating within loop A and as can be observed, during period t.sub.2, the current M substantially reduces.

Referring back to FIG. 1, it should be noted that if the Rev signal is on, then transistors T.sub.2 and T.sub.3 will generate a current in the opposite direction of current M and after the transistor T.sub.2 is turned off, the generated current will be circulating in loop B which comprises the stepper motor L, transistor T.sub.3 and diode D.sub.4.

The major problem in this approach is having diodes D.sub.3 and D.sub.4 in conjunction with the bipolar transistors T.sub.3 and T.sub.4. In Loop A diode D.sub.3 and transistor T.sub.4 and in loop B diode D.sub.4 and transistor T.sub.3 waste power and cause the current during period t.sub.2 to substantially decrease. Therefore, this circuit is an inefficient current regulator.

It is an object of this invention to provide an efficient current regulator.

In accordance with the present invention, there is disclosed a current regulator for a stepper motor which utilizes a driver chip which is well known in the industry. The driver chip used in this invention has an input signal known as brake signal "BRK" which is typically used to stop a standard DC motor. As opposed to the traditional usage of the brake current, in this invention the brake signal BRK is used to create a low resistance current path to sustain the current of the stepper motor.

FIG. 1 shows a prior art current regulator circuit of a stepper motor;

FIG. 2 shows a current generated through the circuit of FIG. 1;

FIG. 3 shows a current regulator circuit of a stepper motor of this invention; and

FIG. 4 shows a current generated through the circuit of FIG. 3.

Referring to FIG. 3, there is shown a current regulator circuit 30 of this invention used for a stepper motor. In FIG. 3, the transistors T.sub.1, T.sub.2, T.sub.3, and T.sub.4 of FIG. 1 are replaced by power Metal-Oxide Semiconductor Field-Effect Transistors (MOSFETs) T.sub.11, T.sub.12, T.sub.13 and T.sub.14.

In FIG. 3, a stepper motor shown as L1 is connected to two nodes 32 and 34. The drains d.sub.1 and d.sub.2 of transistor T.sub.11 and T.sub.12 are connected to the power supply V.sub.DD and the source S.sub.1 of the transistor T.sub.11 is connected to node 32 and the source S.sub.2 of transistor T.sub.12 is connected to node 34. The drains d.sub.3 and d.sub.4 of transistor T.sub.13 and T.sub.14 are connected to the nodes 32 and 34 respectively and the sources S.sub.3 and S.sub.4 of transistors T.sub.13 and T.sub.14 are connected to node 36 which is connected to ground G through resistor R.sub.1.

The gate g.sub.1 of the transistor T.sub.11 is connected to an output pin 38 of a driver chip 40. Pin 38 is a pin which activates or inactivates the transistor T.sub.11. In the same manner, the gate g.sub.2 of the transistor T.sub.12 is connected to an output pin 42 of the driver chip 40 and pin 42 activates or deactivates the transistor T.sub.12. The gate g.sub.3 of transistor T.sub.13 and gate g.sub.4 of the transistor T.sub.14 are connected to output pins 46 and 48 respectively and the pins 46 and 48 activate or deactivate the transistors T.sub.13 and T.sub.14 respectively.

It should be noted that the driver chip 40 is a "configurable H bridge driver chip" (Si9978) by Siliconix which is a well known chip in the industry and typically it is used in conjunction with standard DC motors. It should also be noted that the chip 40 is simplified and only the elements and connections that are essential for this invention are shown.

The driver chip 40 has two AND gates A.sub.11 and A.sub.12, two OR gates O.sub.11 and O.sub.12 respectively and two inverters I.sub.11 and l.sub.12. The output of the and gate A.sub.11 is connected to pin 38, the output of the gate A.sub.12 is connected to pin 42. The output of the gate O.sub.11 is connected to pin 46 and the output of the gate O.sub.12 is connected to pin 48. The inverter I.sub.11 connects the output of the gate O.sub.11 to one of the inputs of the gate A.sub.11 and the inverter I.sub.12 connects the output of the gate O.sub.12 to one of the inputs of the AND gate A.sub.12.

In the driver chip 40, an input pin 50 is dedicated to direction signal DIR, an input pin 52 is dedicated to enable signal EN and an input pin 54 is dedicated to a signal known as "brake signal" BRK. Direction signal DIR selects the direction of stepper motor. Direction signal DIR is connected to an AND gate A.sub.13 and connected to an AND gate A.sub.14 through an inverter I.sub.13. The Enable signal EN is connected to both gates A.sub.13 and A.sub.14. When the Enable signal EN is "1", then if direction signal DIR is "1", the gate A.sub.13 generates a forward signal Fwd.sub.1. Forward signal Fwd.sub.1, which is connected to gates A.sub.11 and O.sub.12 activates gates A.sub.11 and O.sub.12 which in turn activate transistors T.sub.11 and T.sub.14 respectively. When the Enable signal EN is "1", then if direction signal DIR is "O", the gate A.sub.14 generates a reverse signal Rev.sub.1. Reverse signal Rev.sub.1 which is connected to gates A.sub.12 and 0.sub.11 activates gates A.sub.12 and O.sub.11 which in turn activate transistors T.sub.12 and T.sub.13 respectively.

With the configuration of chip 40, at any given time, only the forward signal Fwd.sub.1 or the reverse signal Rev.sub.1 can be active. Therefore, at any given time only the transistors T.sub.11 and T.sub.14 or the transistors T.sub.12 and T.sub.13 can be active.

In the chip 40, the brake signal BRK is connected to both gates O.sub.11 and O.sub.12. Since the chip 40 is typically used in conjunction with standard DC motors, the common usage of the brake signal BRK is to stop the standard DC motor. In a standard DC motor, since the motor is continuously rotating in one direction, it becomes like a generator that generates electricity and creates inertia. Usually, the brake signal BRK is applied to the circuit of a standard DC motor for several seconds to cause the inertia to dissipate as heat which in turn causes the motor to stop.

On the contrary to the standard usage of the brake signal BRK (stopping a standard DC motor), this invention utilizes the brake signal BRK of the driver chip 40 to facilitate and sustain the flow of current. This concept will become more apparent by a description given hereinafter.

In operation, at any given time, either T.sub.11 and T.sub.14 or T.sub.12 and T.sub.13 will be activated. If forward signal Fwd.sub.1, is on "1", then T.sub.11 and T.sub.14 are activated. T.sub.11 will generate a current N which will flow into the stepper motor L.sub.1, transistor T.sub.14 and through resistor R.sub.1 into ground G. The current N will generate a voltage V.sub.R1 across R.sub.1. Node 36 which is connected to the chip 40 through an input pin 44 sends the voltage V.sub.R1 to a comparator 56 of the chip 40. Comparator 56 compares the V.sub.R1 to a reference voltage V.sub.Ref1 and when both voltages are at the same level, it generates a signal 58 which is connected to an output pin 60 of the chip 40.

Referring to FIG. 4, there is shown the current N which is generated by the circuit 30 of this invention. Referring to both FIGS. 3 and 4, during the period t.sub.3, the transistor T.sub.11 will be kept on until the current N causes the voltage V.sub.R1 across resistor R.sub.1 to reach a certain level V.sub.Ref1. Once the voltage V.sub.R1 reaches the reference voltage V.sub.Ref1, the comparator 56 generates a signal 58. In the chip 40, the signal 58 is generated to inactivate transistors T.sub.11 and T.sub.12 through the gates A.sub.11 and A.sub.12. For the purpose of simplicity, the connections of signal 58 to the gates A.sub.11 and A.sub.12 are not shown. However, the signal 58 is also connected to pin 60 to indicate the current limit provided through the pin 44.

It should be noted that the numeral references given to the pins of chip 40 are strictly used for the purpose of identifying the pins in the specification of this invention and they do not represent the pin numbers given in the specification of the chip Si9978. However, the signal names "BRK", "DIR", and "En" are actual names used in the specification of the chip Si9978.

In this invention, the signal 58 from pin 60 is connected to a one shot timer 62. The one shot timer 62 is not a part of the chip 40. However, it should be noted that the chip 40 has an internal one shot timer which for the purpose of this invention is disabled.

In this invention, the signal 58 from pin 60 triggers the one shot timer 62 to generate a signal. The generated signal from the one shot timer 62 is used as a brake signal BRK which will be sustained by the one shot timer for a given period of time. The brake signal BRK activates the gates O.sub.11 and O.sub.12 which in turn activate the transistors T.sub.13 and T.sub.14. While the gates O.sub.11 and O.sub.12 are activated, the inverters I.sub.11 and I.sub.22 inactivate the gates A.sub.11 and A.sub.12. As a result, the transistors T.sub.11 and T.sub.12 will also be inactivated.

It should be noted that signal 58 also disables the gates A.sub.11 and A.sub.12. Therefore, at the time that the brake signal BRK of this invention is applied to the chip, both signal 58 and the outputs of inverters I.sub.11 will inactivate the gate All and both signal 58 and the output of the inverter l.sub.12 inactivate the gate A.sub.12. There is a redundant inactivation, however, it does not interfere with the function of the circuit 30.

The brake signal BRK will activate both gates O.sub.11 and O.sub.12 which in turn activate both transistors T.sub.13 and T.sub.14. By turning on the transistors T.sub.13 and T.sub.14, a loop E will be generated which comprises the stepper motor L.sub.1, transistor T.sub.14 and transistor T.sub.3. The current N starts circulating within loop E from node 32 through the stepper motor L.sub.1 to node 34 and then through the transistor T.sub.14 and transistor T.sub.13 back to node 32. During period t.sub.4, the brake signal BRK will keep both transistors T.sub.14 and T.sub.13 activated and the current N will keep circulating within loop E. It is essential to create a loop in a stepper motor circuit since sustaining the current of the stepper motor is very crucial.

As opposed to the traditional usage of the brake current in which the brake current is applied to the standard DC motor circuit for few seconds, in this invention, the brake current is applied to the stepper motor circuit only for duration in the range of micro-seconds (.mu.sec). In the preferred embodiment of this invention, the brake current is applied for 40 .mu.sec (t.sub.4). However, for stepper motors with different inductance, different duration in the range of micro-seconds will be selected. Therefore, at the end of period t.sub.4, the one shot timer 62 disables the brake signal BRK.

If the brake signal BRK was not used to create a loop E, a diode between the nodes 32 and 36 was needed to create a loop in which the current of the stepper motor could circulate. As it was previously mentioned, a diode in conjunction with a bipolar transistor cause the current to substantially decrease. In this invention, the brake signal BRK is used in an opposite manner for which it was intended to create a low resistance loop, through transistor T.sub.13, in which the stepper motor current can circulate.

Since the model of each power MOSFET includes a diode, by using power MOSFETs T.sub.11, T.sub.12, T.sub.13, and T.sub.14, the diodes D.sub.1, D.sub.2, D.sub.3, and D.sub.4 of the circuit 10 of FIG. 1 are eliminated. It should be noted that the diodes within the transistors T.sub.11, T.sub.12, T.sub.13, and T.sub.14 are not as large as the diodes D.sub.11, D.sub.2, D.sub.3 and D.sub.4. However, they can function in the same manner. In the circuit 30 of this invention, since the bipolar transistors T.sub.3 and T.sub.4 and the diodes D.sub.3 and D.sub.4 are eliminated, the power waste is reduced. Due to the structure of MOSFETs, transistors T.sub.13 and T.sub.14 waste less power and have lower impedance than bipolar transistors T.sub.3 and T.sub.4 and waste much less power than the combination of the transistors T.sub.3 and diode D.sub.4 or transistor T.sub.4 and diode D.sub.3. Therefore, the power waste in the circuit 30 of this invention is substantially less than the power waste of the conventional circuit 10. As a result, the circuit 30 of this invention provides a low resistance current path. In circuit 30, the current N within loop E decreases with a lesser magnitude in comparison to the current M of the conventional circuit 10 of FIG. 1. This in turn improves the efficiency of the current regulator of this invention.

At the end of period t.sub.4, once the brake signal BRK is disabled, transistor T.sub.11 will be turned on within the period of t.sub.3 and the current N will increase to a level which causes the voltage V.sub.R1 to reach V.sub.Ref1 which in turn causes the brake signal BRK to be generated. The process of turning on the transistors T.sub.1 and T.sub.14 during t.sub.3 and turning on the transistors T.sub.13 and T.sub.14 during t.sub.4 will be repeated for regulating the current of the stepper motor.

It should be noted that if transistors T.sub.12 and T.sub.13 are activated, the circuit 30 functions in the same manner as if transistors T.sub.11 and T.sub.14 were activated with the exception of the direction of current. When transistor T.sub.12 and T.sub.13 are activated, the direction of the current in the stepper motor and in the loop E will be the opposite of the direction of the current when the transistors T.sub.11 and T.sub.14 were activated. Therefore, in this invention, transistors T.sub.13 and T.sub.14 are used in a bi-directional manner.

It should also be noted that if one desires, a comparator outside of the chip can be used instead of the comparator 56 of the chip 40 to generate signal 58 which is connected to the one shot timer 62.

It should further be noted that the current regulator of this invention is not limited to the stepper motor applications and it can be utilized for different applications. For other applications, the stepper motor shown by L.sub.1 in FIG. 3 will be replaced by a circuit which requires a current regulator such as the current regulator of this invention.

In addition, it should be noted that numerous changes in details of construction and the combination and arrangement of elements may be resorted to without departing from the true spirit and scope of the invention as hereinafter claimed.

## Claims

1. A current regulator comprising: transistor being electrically connected to said power supply; transistor being electrically connected to said first node; transistor being electrically connected to said second node; to provide an electrical path between said first node and said second node; transistor being electrically connected to said third node; resistor and said ground being electrically connected to said second terminal of said resistor; said gate of said third transistor, and said gate of said fourth transistor all being operably connected to said driver chip; that when said brake signal is not generated said selecting means selectively activates said first transistor and said fourth transistor or said second transistor and said third transistor and when said brake signal is generated said third transistor and said fourth transistor are active whereby a low resistance current path is created when said brake signal is generated.

2. The current regulator recited in claim 1, wherein said load is a stepper motor.

3. The current regulator recited in claim 1, wherein said brake signal generating means comprises a comparator and a one shot timer.

4. The current regulator recited in claim 3, wherein said comparator is within said driver chip.

5. The current regulator recited in claim 3, wherein said comparator is outside of said driver chip.

6. The current regulator recited in claim 3, wherein said load is a stepper motor.