PB 161614

^eckmcai v£ote 113

A TRANSISTOR-MAGNETIC

CORE DIGITAL CIRCUIT

U. S. DEPARTMENT OF COMMERCE

NATIONAL BUREAU OF STANDARDS
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NATIONAL BUREAU OF STANDARDS

technical <^lote

113

JUNE 1961

A TRANSISTOR-MAGNETIC CORE

DIGITAL CIRCUIT

E. W. Hogue

NBS Technical Notes are designed to supplement the Bureau's regular publications program. They provide a means for making available scientific data that are of transient or limited interest. Technical Notes may be

listed or referred to in the open literature. They are for sale by the Office of Technical Services, U. S. Department of Commerce, Washington 25, D. C.

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TABLE OF CONTENTS

Page

ABSTRACT 1

1. INTRODUCTION 1

2. REQUIREMENTS FOR STABLE BINARY SIGNAL PROPAGATION 2

2. 1 Evolution of the Digital Amplifier Transfer Function 3 2.2 The Propagation Function 11

2. 3 The Signal Gain g, and Amplifier Bandwidth 15 2.4 The Element-Group 15 2.5 The General tit-Group Transfer-Function 21

3. SIGNIFICANT TIME INTERVALS IN THE DIGITAL AMPLIFIER OPERATION CYCLE 24

4. DERIVATION OF THE MAGNETIC DIGITAL AMPLIFIER TRANSFER-FUNCTION 29

5. NTER-ELEMENT COUPLING NETWORK, AND ITS EXPANSION INTO TWO-

[TCHING 47

6. AN ATTEMPT TO ACHIEVE A SATISFACTORY ELEMENT TRANSFER-FUNCTION 60

7. THE ADDITION OF THE PEAK-SATURATING EMITTER -FOLLOWER PRODUCES

A SATISFACTORY ELEMENT-GROUP TRANSFER FUNCTION 61

8. THE EXCLUSION OF MARGINAL SIGNALS 74

8. 1 The Synchronizer A 76

8. 2 The Maximum Acceptable Signal Input Frequency f. 76

9. THE TRANSMAG NEGATING AMPLIFIER 77

10. THE PROPAGATION FUNCTION FOR NEGATING AMPLIFIERS ONLY 81

11. STABILITY MARGINS OF MIXED ELEMENT-GROUPS 87

12. FACTORS AFFECTING POWER GAIN AND FAN-OUT 92

12. 1 The Gain of the Magnetic Amplifier 92

12. 1 a. How Scaling Affects the Relationship Between R , G , and f 101 r c c c

12. 2 The Gain of the Input Circuit .105

12.2 a. Restrictions on u> / u> 108

12. 2 b. The Case in Which Vp

is Only a Few Times Larger than v 109

c. The Dependence of I r.insi storSpeed and Power Requirements

Upon Clock Frequency 113

12. Iditional Factors that Affect the Fan-Out N 115

13. THE TEST COMPUTER 119 SUMMARY 128

APPENDICES:

I. 131

II. 131

III. 132

IV. 134

V. 134
TABLE OF CONTENTS (Continued)

Page

APPENDICES:

VI. 135

VII. 138

VIII. 140

IX. *«

REFERENCES 146

BIBLIOGRAPHY **'
LIST OF ILLUSTRATIONS

Page

Figure 1. a. A cascade of computer elements 2

b. A ring of computer elements 2

Figure 2. Representation of the binary digits 3

Figure 3. Transfer-function of the ideal, linear, non-inverting amplifier 3

Figure 4. Saturating amplifier with positive and negative output limit-levels 4

Figure 5. Amplifier with zero and positive output limit levels 4

Figure 6. Overall transfer-function of an infinite cascade of elements having individual

transfer-functior.s similar to Figure 5 5

Figure 7. Definition of the full signal magnitude s 6

Figure 8. Steady-state transfer -function of a finite ring of elements, each having the transfer function of Figure 7 6

Figure 9- Biased., linear, saturating, ele ent transfer -function 7

Figure 10. f (x), as defined in equation (3), ;jr n=l, 2 and °o 9

oo Figure 11. Graphical derivation of f (x) froni *(x) 10

f (x) for the biased saturating tlernent 12 Fn( x) derived from fn(x) 12

oo

f (x) for the biased saturating ej»ment showing one threshold 13

P°°(x) derived from f°°(x), showing two thresholds 13

Probability density of imperfect propagation functions when g is small 14 Density when g is appreciably larger 14 A ring of six computer elements of three different kinds 16 One possible grouping of the elements in the ring 16 Another possible grouping 16 One of two possible element-groups and group-transfer-functions formable

from a ring having two kinds of elements 17 One other possible element-group and group-transfer-function 17 The complete, steady- state propagation function <f> (x) for an alternating

sequence composed of two kinds of computer elements 18

Figure 18. A generalized element-group transfer function 19

Figure 19. Proof that the generalized transfer function converges to a stop function 20

Figure 20. a. The vacuum tube flip-flop 22

b. The flip-flop regarded as a ring composed of a single 1-2 element-group 22

c. The flip-flop regarded as a ring of one 2-1 element -group 22

Figure 21. Graphical determination of r.,, s,-,, r_., and s

?

. for the flip-flop 23

Figure 22. Significant time intervals in the digital amplifier operation cycle 25

Figure 23. The dynamic operation-cycle that gives the maximum bit-rate 26

Figure 24. The minimum cycle-time achievable by elmination of the store interval

results in a three-phase system 27

Figure 25. The dynamic operation-cycle that maximizes the store -interval and the

bit rate 28

Figure 26. The magnetic amplifier 30

Figure 12. a.

b.

Figure 13. a.

b.

Figure 14. a.

b.

Figure 15. a.

b.

c.

Figure 16. a.

b.

Figure 17. Tl
LIST OF ILLUSTRATIONS (Continued)

Page

Figure 27. The saturation-flux versus ampere -turn diagram of the magnetic

amplifier core 30

Figure 28. a. Partial major-loop for a stored ONE 30

b. Partial major-loop for a stored ZERO 30

Figure 29. Switching volt-ampere diagram of the magnetic amplifier 32

Figure 30. The computer element that consists of R and the magnetic amplifier 33

Figure 31. Switching plot of core-input voltage v versus v, the voltage applied to R 33 Figure 32. The relationship of y'(t) to x(t) 35

Figure 33. The volt-second transfer-function for the element that consists of R and

the magnetic amplifier 36 Figure a

34. The relationshipr between v, v , iR , t and T/2 37

c s o

' Figure °

35. Largea ratio of v to v when R » R 40

O CO s c Figure 36. Large value of m = i

! R /v =0.5 achievable through the use of a bias current. R = R

o s o 42

s c Figure 37. v = 3v and m = 0. 33 when R = R and i °

1 R = v 42

O CO s c O S CO Figure 0038. Large value of m and small value for v /v achievable when R » R 43

o' co c s Figure 39. The volt-second transfer function of the resistor-magnetic-amplifier element

for different values of m 44

Figure 40. Core flux-gain is less than unity when n_/n, = v /v 45

Figure 41. The progressive curtailment of core switching -time when n? /n. < v /v

results in a flux-gain less than unity 46

Figure 42. The progressive lengthening of core switching time when n7 /n. > v /v

results in a flux-gain greater than unity 48

Figure 43. A flux-gain greater than unity can result if n? /n. > v /v 49

Figure 44. The inter-element coupling network 50 Figure 45. Core impedance presented to the inter-element coupling network during

transmission of a ONE ' 51

Figure 46. Part of a cascade of magnetic digital amplifiers 53 Figure 47. Voltage waveforms that occur during the reception and transmission of ONEs

and ZEROs 54

Figure 48. Signal branching from one core to three others 56

Figure 49. The inter-element coupling network as an AND-gate 57

Figure 50. An inter -element AND-OR network 58

Figure 51. Inter -element logic network and the output (degenerate) AND-gate 59

Figure 52. The use of a small series voltage source in an attempt to improve the magnetic element transfer -function 61

Figure 53. The transistor-magnetic core digital amplifier (Transmag) 63 Figure 54. The pulse stretching property of the OR-diode coupled-, peak- saturating

emitter follower 64
LIST OF ILLUSTRATIONS (Continued)

Figure 72. a. f ., (X) derived from F,

2 (X); n-odd

Page

Figure 55. Large ratio of pulse output area-increment (shaded) to pulse input area- increment (dark) above collector-voltage V 65

Figure 56. Voltage -time-area of the emitter -follower output pulse versus the area of a

0. 2 jisec input pulse of variable height. V = 10 65

Figure 57. Selective signal reshaping produced by the clocked saturating diode-driven

emitter -follower 67

Figure 58. Diagram used in deriving the volt-second transfer function of the diode-driven,

saturating emitter-follower 67

Figure 59- Volt-second transfer-function of the resistor-core element (curve 1) and of the peak- saturating emitter-follower (curve 2) 70

Figure 60. Superposition of magnetic -element and transistor-element transfer-functions

to obtain values of r and s for the element-group transfer functions 71

Figure 61. a. The steady-state propagation function for the transistor-core elementgroup, and 72

b. For the core-transistor element-group 72

Figure 62. Transistor-core transfer -function f

? ,(x), and core-transistor transferfunction f.

? (x) constructed graphically from Figure 60 73

Figure 63. Ranges y, a of signal amplitudes to be excluded from the computer network 75

Figure 64. Y = f f ( r ) + X when g y and g a do not include all imperfect

signals L O J 75

Figure 65. The negating amplifier 78

Figure 66. Separate assertive-, and negating amplifiers driven in parallel 79

Figure 67. Combined assertive-, and negating amplifiers 80

Figure 68. Explanation of the negating amplifier 80

Figure 69. Volt-second transfer-function of the negating resistor-core element 82

Figure 70. Evaluation of r and s for the transistor-negating core element group and for

the negating core -transistor element group by super -position of the element

transfer -functions 83

Figure 71. The transistor-negating core transfer-function T~

?

. (X), and the negating coretransistor transfer-functionTT

? (X) constructed graphically from Figure 70 84

85

b. F^(X) ; n-odd 85

Figure 73. The complete steady-state propagation-function for a sequence of negating

amplifiers 86

Figure 74. The four kinds of element-group groups that can be formed in an alternating

sequence of assertive element-groups and negating element-groups 88

Figure 75. The complete steady-state propagation function for alternating assertive

and negating element-groups 89

Figure 76. Determination of the four values of r and the two values of s associated

with the alternating sequence of assertive and negating element-groups 90
LIST OF ILLUSTRATIONS (Continued)

Page

Figure 78.

Figure 79.

Figure 80.

Figure 81.

Figure 82.

Figure 83.

00 00 Figure 77. a. Non-coincidence of F_ . 7

-j (x) and. F-,y-

?

, (x) produces regions

(shaded) of ambiguous response to signals that can enter the sequence

of Figure 74 at 1,2 junctions or at 1,2 junctions 91

b. Resultant effective propagation function for signals that can enter at T, 2 junctions or at 1,2 junctions 91 Diagram illustrating the total winding -enclosed area A, and the magnetic

material cross-section A 95 m

Core cross-section showing total winding-enclosed area A; winding-filled area A ; and magnetic material cross -sectional area A 103 w ° m

Magnetic amplifier core switching resistance R, current-gain G, and

relative size l/l , versus frequency when the design is scaled in accordance with equations (105). 1 =0. 150 inch 104

Important currents in the Transmag digital amplifier 106

Approximate equivalent circuit for the emitter-follower input impedance 107

Transistor collector dissipations ha and hc j versus clock frequency fc , from Appendix VIII; and minimum-required alpha-cut-off faDO versus clock

frequency for the core design used in Figure 80 and a nominal AND-gate

current of 4. 5 ma 114

Ordinarily undesirable output branching 116

Lead capacitances involved when no output AND-gate is used 118

a. Transmag digital amplifiers and typical gating used in the test computer 120

b. Logic symbol for a. 120

Organization of the test computer 121 The synchronizer 122

Binary cycle-counter and operation control generator 123 Adder, comparator, shift-register stages, and shift-hold circuit 124

The error counter 125

Front view of the test computer 12 6 Close view of the test computer showing the control panel and the modularized bread-board construction 127 Rear view of the test computer showing the clock generator at top 129 Maximum voltage-time integral received by the core 133

Emitter -follower 136

Diagram used in deriving the emitter -follower input equivalent circuit 136

Emitter -follower input equivalent circuit 137 Diagram used in deriving the emitter -follower output equivalent circuit 139

Emitter-follower output equivalent circuit 139 Diagram used in calculating worst-case collector dissipation 141 Diagram showing that s

?

, - f,(x) = f.(s._ - x) when f,(x) is symmetrical

about the point x = l/2 a,-,, y = 1/2 s

?

. 145

Figure 84.

Figure 85.

Figure 86.

Figure 87.

Figure 88.

Figure 89. Figure 90.

Figure 91. Figure 92. Figure 93.

Figure 94.

Figure III-l. Figure VI- 1.

Figure VI-2. Figure Vt-3.

Figure VII- 1. Figure VII- 2. Figure VTH-1. Figure IX- 1.
GLOSSARY OF SYMBOLS

SECTION 1. x measures the excitation at the input to an element or an element-group;

or, it measures the externally induced portion of the total excitation, in the

case of the propagation function,

y is a measure of the output signal from an element-group,

n is the number of element- or element-group transmissions that a signal

has undergone,

r serves to define the binary ONE signal (x > r), and the binary ZERO signal

(x<r).

g

is called the signal gain. It is the slope of the transfer-function y = f(x) at x = r. L7

, L, are the upper and lower limits on the output from an element or an element-group.

s is the maximum possible value (L-, - L,) of the signal that can be emitted by an

element or element-group. It is the magnitude of the full binary ONE signal.

The full binary ZERO signal has zero magnitude,

a is the bias introduced into the element transfer-function in order to produce

ZERO- stability.

a , a' see Figure 12, b. n n

° m is the signal magnitude m disturbance -free transmissions before the introduction

of the external excitation x.

t<> is the time interval between disturbances to a given signal.

Af is the element or element-group bandwidth.

P is the element- or element-group gain-bandwidth product gAf.

SECTION 2.

tis the element-group delay time. It is the time interval between the moment of

arrival of a signal at an element-group input and the beginning of the transmission of

that signal to the next element-group. See Figure 22. T is the element-group cycle time. It is the time required for the element-group to go

through all the states involved in the passage of a signal and to return to its initial

state. See Figure 22.

t is the element-group receive-interval or rise-time t ^, (Af)
GLOSSARY OF SYMBOLS (Continued)

SECTION 3.

n. is the number of turns in the magnetic core input winding.

n? is the number of turns in the core output winding.

v represents instantaneous voltage.

x, y in the case of the magnetic amplifier and the transistor-core amplifier are measured in volt-seconds.

ty represents magnetic flux.

v is the instantaneous core input voltage.

s is the constant-current switching coefficient of the core material.

1 is the core mean magnetic path length.

i is the core input winding current.

i is the core input magnetizing threshold current.

T is the time required to switch the core from one full remanent state to the other.

<j> T

is the full remanent flux of the core.

r R is the dynamic switching resistance of the core, referred to its input winding.

R is the value of the core input series resistor.

v is the peak value of the clock sine wave voltage.

t See equation 30 and Figure 34. m is defined by m = i R /v . It is a measure of the threshold nonlinearity of the

resistor-core transfer-function,

v is the peak value of the core input voltage,

i' is the core indepently variable threshold current defined by i' = i + i, , where

i, is an external bias current,

b SECTION 4. V is the d-c pull-up supply voltage.

R represents a pull-up resistance. See Figure 44. R , R , See Figure 51. po pi & SECTION 5.

B. is a small bias voltage shown in Figure 52. SECTION 6.

P is the common-emitter current gain of the transistor.

a is the transistor common-base current gain,

f , is the transistor alpha cutoff frequency.

V is the emitter supply voltage.
GLOSSARY OF SYMBOLS (Continued)

SECTION 6 (Cont'd)

R

e V

c X

Y

G

represents the value of the transistor emitter resistor. See Figure 53.

is the collector supply voltage. v T -1 equals x ( ) v T -1 equals y ( )

in this section, represents the emitter -follower incremental-area (volt- seconds)

stretching factor. It is, for example, the slope of the portion of the curve in

Figure 56 between 2 volt-usec and 2.4 volt-(isec. In Figure 55 it is the ratio of the

shaded area to the dark area. SECTIONS 8, 9 and 10.

A l' A2

is the volt-second output signal of a negating core element.

See Figure 68.

y is the volt-second output signal of an assertive core element.

SECTION 11. 1. G in Section 11 denotes current gain.

denotes logical fan-out.

is the saturation inductance of the magnetic core output winding.

is the peak value of the total current drawn by the core input winding

during the receive interval.

is the peak value of the excess current drawn by the core input winding during the

receive interval.

N

L

J cl

A

A

H

wl

w2

s the effective full- switching inductance of the core output winding,

s the maximum current gain of the core, i. e. , the gain when fully loaded.

s the average permeability within the volume of the core output winding,

s the cross-sectional area enclosed by the core output winding. See Figure 78.

s the cross-sectional area of the core magnetic material. See Figure 78.

s the switching permeability of the magnetic core material,

s the permeability of free space.

s the space-factor, A /A, of the core output winding,

s the effective switching relative permeability of the core material,

s the core remanent flux-density,

s the d-c coercive force of the core material,

s the winding factor, n./l, of the core input winding.

s the winding factor, n? /l, of the core output winding. x
GLOSSARY OF SYMBOLS (Continued)

SECTION 11. 1 (Continued)

A<f>, AB represent changes in core flux and flux density respectively.

Z is the dimensionless fractional switching variable, AB/2B .

f is the operating frequency, or clock frequency, f - T . PR

( 1 ) is the core resistance-frequency product R f . It has a constant value P_ (1 ) for

a given wound core bobbin.

P_ (1) is the core current-gain frequency-squared product G f .It has a constant value

P„ (1 ) for a given wound core bobbin. Go' 6 P (1 ) is the core spacefactor -frequency product F f . It has a constant value P (1 ) for

s s c so

a given wound core bobbin.

5/4

p_ represents the product R f ' . It has a constant value when the core design is

scaled in accordance with equation (105), which preserves a constant space-factor.

p„ represents the product G f . It is constant when the core is scaled according to

(105).

1/4

p, represents the product (1/1 )f ' . It is constant when the core is scaled according

to (105).

SECTION 11.2.

G. is the current gain of the transmag amplifier input circuit. See equation (118a).

A

i is the peak value of the core input current during the receive interval. In 11. 1 it was represented by i.

i in the constant-current case, is the least value of the current that must flow in one

P

input AND-gate in order to transmit a full ONE to the input circuit. Or it is the

instantaneous value of the AND-gate current when this current varies. See Figure 81.

i, represents the instantaneous value of the transistor base current. See Fig. 81.

i n

is the current in the input power diode D .. See Figure 81. A

i, is the maximum value of i, . b b

Iy.. is the minimum permissible value of i^. A /S

i, , is the value of i, under case 1 in Section 11.2.

C. is the virtual capacitance in the emitter -follower input equivalent circuit.

X. is the reactance of C. at the frequency to = 2ir f . 1 i ^ ' c R. is the complete emitter -follower load.

r, is the transistor base resistance.

to , is the transistor radian alpha cut-off frequency.

to equals 2-irf or 2irf .
GLOSSARY OF SYMBOLS (Continued)

SECTION 11.2 (Continued)

(3 is the low-frequency small-signal beta of the transistor.

G_, is the current gain of the emitter-follower alone.

v, is the transistor base instantaneous voltage. See Figure 82.

I_ is the current at which the forward small- signal resistance of D . equals 100 ohms. Do " pi M

I is the minimum permissible value for i such that sufficient charge is stored by

P P

the base to give adequate signal stretching.

i is the value of i when u>t = o. po p

r n is the forward resistance of the input power diode D ,. r_ is the value of r_ at the forward current value I~ • Do D Do

f , is the minimum required alpha-cut-off frequency for the emitter-follower transistor.

h is the collector dissipation for the (undamped) assertive amplifier for all ZEROs.

See Appendix VIII. h . is the collector dissipation for the assert-negate amplifier for all ONEs. See

Appendix VIII. h . , h See Appendix VIII. SECTION 11.3

C is ground (stray) capacitance of a fan-out lead.

I is the minimum current required to keep D conducting, and to ZERO the core

through its input winding.

C See Figure 85.

s 6
A TRANSISTOR-MAGNETIC CORE

DIGITAL CIRCUIT

E. W. Hogue

ABSTRACT

A digital amplifier of simple noncritical design incorporating an emitterfollower and a small magnetic amplifier is described. Timing and some of the

operating power are provided by a 300 -kc 2 -phase 7 -volt sine -wave source.

In structure and mode of operation, the amplifier is particularly suited for use

with two-level diode gating to provide the AND and OR logical operations. A

NOT-amplifier provides negation with amplification. The volt-second transfer

characteristic of the stage critically determines the stability of propagation of

binary signals. Factors governing the required shape of this transfer

characteristic are discussed.

1. INTRODUCTION

The transistor-core digital circuit is useful in itself, but what is more important, it provides a

detailed example of the application of binary- signal network concepts and methods of analysis that the

autnor believes can prove fruitful as a systematic approach to the invention and design of solid-state

computer circuits particularly well suited to increasingly severe requirements for high speed, microminiaturization and automatic fabrication.

Computer nets are here regarded, in a very general way, as interconnected open and closed

sequences of identical nonlinear elements or element-groups that receive and transmit the signal

during alternating npnoverlapping time intervals, and that are therefore capable of signal retention,

or storage. All that is required for stable propagation of binary signals is that the element- or element-group transfer -function be properly nonlinear. Elements that are, in themselves, improperly nonlinear are shown to be combinable into properly nonlinear groups. Then a set of propagation-functions that describes the binary signal itself, giving its magnitude

and stability margins at every element -junction, is derived from the transfer functions. The ratios

of the stability margins to the full-signal magnitudes indicate the circuit resistance to interference

and are needed in the calculation of power gain and maximum fan-out.

Finally because in well-designed synchronous systems the chief source of failure is the synchronizer, a formula is derived which gives the maximum permissible unsynchronized signal input

A

frequency f. as a function of the element-group delay time t ,, the element-group transfer -function

slope g, and any specified maximum probability p for the occurrence of an imperfect output signal

from the synchronizer. f. is ordinarily less than one-twentieth the element-group reaction speed
t , in synchronous systems and bears roughly the same ratio to the reaction speed or reciprocal

response time t of the active components in the elements of asychronous systems, although £.

for asychronous systems is not mathematically defined.

The internal bit-rate, on the other hand, can-^ie as high as one-half the element-group reaction

speed in synchronous systems, while in asynchronous systems it must not exceed f.. At bit-rates

higher than f., asynchronous systems become chaotic. Such systems require nearly ideal (squareloop) element transfer-functions. These are possible only at low bit-rates, relative to t" , with

active computer elements that are self-regenerative through positive feedback.

It is shown that elements having no positive feedback and whose transfer -functions are far from

ideal may be used to construct synchronous high-bit-rate computing systems having predictable

synchronization failure rates.

2. REQUIREMENTS FOR STABLE BINARY -SIGNAL PROPAGATION

The preservation of the identity of a biliary signal during its propagation in a computer network

requires that the elements of the network fulfill certain, conditions. In the simplest case a computer

network may be thought of as made up of cascades and rings of (ideally) identical unilateral elements.

Fig. la shows a cascade of six elements, and Fig. lb shows a ring of six elements. The signal is

(a)

(b)

Figure 1. a. A cascade of computer elements

b. A ring of computer elements

propagated through each element in succession, and may traverse many elements, each only on«|fc, in

the case of a long cascade; or it may traverse a few elements, repeatedly, many times in the case of

a ring. The nature of the signal transfer-function of an element, must therefore be governed by how
it affects the overall transfer function, or propagation function resulting from n transmissions of

the signal as n approaches infinity.

If f{x) is the transfer function of one element, then after n undisturbed transmissions through

that element, or others like it, a signal, whose initial value was x, has the value y = f (x).

f (x) is the transfer function for n transmissions of a signal through elements each having the

individual transfer -function f(x). n denotes the number of iterations of f(x). For example, if

n = 3,

f 3(x) = f{ f [f(x)]} (1) Observe also that f (x) = f (x), and f (x) = x.

Before anything more can be said about the nature of f(x) it is necessary to define the binary

signal in terms of the transmitted quantity x. If r is some fixed value of x, then the binary ONE is

sufficiently defined if it is identified with values of x > r ; and the binary ZERO is sufficiently

defined by x < r . See Fig. 2. Up to this point r may have any value, but practical

-« X +X —*-

r

BINARY ZERO BINARY ONE

Figure 2. Representation of the binary digits

considerations will be shown to restrict its choice somewhat.

2. 1 Evolution of the Digital Amplifier Transfer Function

Returning to the transfer function f(x), if it is postulated to be gx; (g = constant > 0) which is

that of an ideal linear non-inverting amplifier having a gain g equal to the slope of the curve in

Fig. 3, it is seen that if r = 0, y = f (x) = g x preserves the relationships y > r for x > r, and

/

y = gx

Figure 3. Transfer -function of the ideal, linear, non-inverting amplifier

3
y < r for x < r for any n provided g _> + 1. However, if |g| < 1, y = g x approaches zero

with increasing n, and if g < the sign of g x alternates. Therefore if f(x) = gx, g should be

equal to or greater than unity for successful binary signal propagation. * A further modification of f(x) becomes necessary in any physical embodiment of the computer

element to prevent the occurrence of infinite signals, since y = f (x) = g x —> co as n —> oo if

g > 1. y must therefore be limited to some finite range L, < y < L?

. See Fig. 4, which

illustrates the transfer function

gx; L T /<i: < x < L

2 /g

f(x)' = \ L2

; x > L

2 /g

luy X < Lj/g

Figure 4. Saturating amplifier with positive and negative output limit-levels

Then, (for simplicity,) L, is set at zero so that the element has a unipolar output. See Fig. 5, which illustrates the transfer -function gx ; < x < L2 /g

£(x) = L2; x > L2 /g

; x <

> + 1

1-2

y/ .

L|

Figure 5. Amplifier with zero and positive output limit levels

See, however, section 9 and Appendix IX where it is shown that g<0 is also admissible,

provided |g| > 1. 4
Figure 6. Overall transfer -function of an infinite cascade of elements

having individual transfer -functions similar to Figure 5.

Fig. 6, which shows the transfer -function

f°°(x)

L, ; x >

; x <

now reveals a serious practical defect in the transfer function of Fig. 5. It is that the noise

sensitivity of a cascade of n elements having this transfer function approaches infinity as n —> co.

In the presence of a. c. input noise, the steady-state output of a cascade of many elements is a random sequence of binary ONES and ZEROS. Such a cascade is said to be astable because it has

no output that can persist in the absence of an input signal and in the presence of input noise.

If a ring of even a small number of elements each having the transfer -function of Fig. 5 is

formed, the ring transfer -function, in the steady state, will also have an infinite slope g , because

the ring, while finite, is endless so that the number of times a signal or disturbance is transmitted

by an element becomes infinitely large with increasing time. In fact the transfer -function of a

finite ring includes that of the infinite cascade of Fig. 6. But the ring is not astable; it is monostable or more precisely, ONE-stable . The characteristic of Fig. 5 guarantees that, in the

presence of any noise having a positive component, all elements will ultimately transmit full binary

ONE signals having a magnitude s_ determined by the upper limit level L^. And since each

element continually transmits a signal of magnitude s, each element continually receives a signal of

magnitude s from the one ahead of it. This is shown by the point marked S on the transfer function

for a single element as postulated so far. See Fig. 7. Remembering that a binary ONE is any

signal greater than zero, it is seen that the continued presence of a negative disturbance at the input

of an element, greater in magnitude than s, is required to produce a binary ZERO output. With the removal of this disturbance, the ring reverts to the ONE state.
Figure 7. Definition of the full signal magnitude s

The steady-state transfer function of a finite ring of elements having individual transferfunctione of the type shown in Fig. 7 can now be drawn. It is shown by the heavy line in Fig. 8,

y

i L

<

1

i

' 1

Figure 8. Steady-state transfer-function of a finite ring of elements,

each having the transfer function of Figure 7

which represents the steady-state magnitude y of a circulating signal as a function of an externally

generated signal x. The arrows on the vertical segments indicate that these are not reversible paths.

The function exhibits (he property of hysteresis. The degree of stability is measured by the magnitude

of the smallest positive or negative excursion from x = that will result in a change in the y-output.

The degree of ZERO- stability is seen to be zero, while the degree of ONE-stability is equal to s, the

full signal magnitude. The r'ng of elements just described exhibits the property of storage . A device

is said to store if the application of a disturbance greater than a certain minimum value produces a

persistent change in its state which is detectable as an output, while disturbances less than the minimum value produce no such change. This minimum value is called the threshold. The device

may be thought of as storing a quantity equal and opposite to the threshold that must be overcome to

change its state. The unstable infinite cascade has no threshold and stores nothing. The monostable

ring has a single threshold, and stores a quantity equal to + s. In the presence of a noise level equal

to or exceeding s, the monostable ring becomes unstable.

6
The linear saturating single -element transfer function of Fig. 7 is still not suitable for

propagation of binary signals because it leads to cascades whose sensitivity to noise increases without

limit as the number of elements is increased, and because, in the presence of an arbitrarily small

noise-level, rings of elements having this transfer function are ONE-stable only.

The next step in the evolution of the single-element transfer function is the introduction of a bias

a. The resulting transfer-function, shown in Fig. 9 is obtained by translating the curve in Fig. 7 to

the right by an amount equal to a, keeping a < (s - s/g), and g > + 1. Then the new curve crosses the unity gain line at three points: At the origin O; at S, which has the coordinates x = s,

y = s; and at R, a point that lies between O and S, and has the coordinates x = r, y = r. The gain,

y/x, of this transfer function is not constant, but depends on x. It is less than unity for x < r and

for x > s; and it is greater than unity for r < x < s. The equation for the curve in Fig. 9 is

g (x-a); a < x < (a + s/g)

y = £(x) = ^ s ; x > (a + s/g) (2) ;x<a;g>+l

y

UNITY /GAIN LINE S

1 i /

s //

<R

y

' X

-» a <

«- T -»

-5

Figure 9. Biased, linear, saturating, element transfer -function

This is now the complete transfer function of a single element. To determine its suitability for

binary signal transmission we must find f (x) and examine its properties as n —> oo. In the range x < a, it i s obvious from (2) that f (x) = for all n; and, in the range x > (a + s/g), f (x) = s

for all n. Then, making use of the example in equation (1), in the range a < x < (a + s/g),
and in general

f (x) = g(x-a)

f2(x) = f [f(x)J = g [g(x-a) - a] 2 . 2 g x - a(g + g)

: i< f [ f(x)] }

g { g [g(x-a) - a| - a I 3 = g x

3 2 a(g + g + g),

n . n , n-1 n-2

= gx-a(g +g . + g + n

u „ n

= g x - a 2 e

r g {i- gn d-g")

g (i~g)

+ g)

gn

(x - a ) ; a < x < (a + s/gn

)

Then for any x, the transfer -function for n transmissions of the signal, or for n iterations of the

single-element transfer function (2) is

y n

(x - aj; an

< x < aR

+ s/gn

s ; x > a + s/gn£ (3) n(x)

; x < a

; g > + 1 where

t ± agd-g'1) n n.

g (1-g)

(4)

1 (x) for n = 1 and for n = 2, with g = 2, are illustrated by the lines OP, Q, S and OP, Q? S 11 2 2 in Fig. 10. The slopes of these functions are equal to 2 =2 for f (x) = f(x); and 2 =4 for f (x). The intercepts or thresholds are, from (4)

a a

2 < 1 - 2 a ,) - a

l - a

2(1-2) " a

2(1-4)

a

2 " a4(1-2)

The line O, P , Q , S in Fig. 10 represents f (x), the limiting case of f (x), as g becomes

very large or, what is the same thing, if g-1 is not infinitesimal, as n becomes large. For

3 00 00 00 g > 2, f (x) is practically speaking the equivalent of f (x). The slope of f (x) is g = <>•, and its x intercept a is given by

lim lim ag(l-g ) _ ag n —> 00 n. . . s

g (1-g) K

(5)

f (x) can therefore be written as
lim

f (x) = fn(x) =

{ n —^oo

; x > a„

; x < a.

(6)

Figure 10. f (x), as defined in equation (3), for n=l, 2 and <»

Now the only point, outside the regions of cut-off and saturation, that is common to all the

curves f^(x) is the point R where y = f{x) crosses the unity gain line. At this point y = x = To find r, the abscissa of R, set

r^i \ n ag(l-g ) y = i (x) = x = g x - —»J—a—2- (1-g)

x(l - g*)

d-g)

ag(l-g ) _ ag

(1-g K i-g) g^T (7)

By comparing (7) with (5) it is seen that r = a . Therefore, given y = f(x) = g(x-a), to find

00 y = f (x), a perpendicular to the x-axis is erected through the intersection point R of y = f(x) with

00 the unity gain line. This perpendicular is the infinite -slope portion of y = f (x). The curves n oo y = f (x) all pass through R and lie between y = f(x) and the perpendicular curve y = f (x).

00 Figure 11 shows how f (x) is derived from f(x) graphically. It is seen that only the two quantities r,

the abscissa of the second point of intersection of f(x) with the unity gain line; and s, the abscissa of

9
Figure 11. Graphical derivation of f (x) from f(x)

10
oo the third point of intersection of f(x) with the unity gain line, are needed to determine f (x). s is the

oo full signal magnitude and r is the transmission threshold of f (x).

y = f (x) describes the progress of a signal introduced into an open cascade. It represents the magnitude of a disturbance, originally having the value x when introduced into the input element of

the cascade, after it has traversed n elements. If the cascade is sufficiently long, the disturbance

will ultimately have one of only two possible values, y = s, or y = 0. It is apparent that any

disturbance smaller than r will remain smaller than r, and in fact will diminish to zero.

Conversely, any disturbance greater than r will grow until it reaches the full magnitude s. The

quantity x here represents total excitation, signal plus noise, at the input to the first element.

2. 2 The Propagation Function

We now wish to distinguish between signal and noise, and. in doing this we will consider the

general case of an element embedded in a cascade or ring. In the definition of f (x) on page 3

it was stated that y = f *(x) gives the magnitude after n transmissions, of a signal whose initial value was x. This is true provided x is generalized to represent the total input excitation both external

(including noise) and internal to the cascade or ring. But if x is taken to represent only the externally

induced signal or disturbance, the propagational transfer function must be altered to make up for the

loss in generality in the definition of x. We define a new transfer function called the propagational transfer function. It is

where, in particular,

F

n

(x) = fn(xQ

+ x) n >

F°(x) v = f°(x + x) = x + x

'

* o o F*(x) = F(x) = f(x + x)

Here, x represents the existing excitation at the time and the place at which the external signal or

disturbance is introduced. It is an initial condition, so to speak. In practice it will come from the

output of the previous element in the sequence. Therefore x may be replaced by the quantity

i ( £ ) where F represents the total excitation m disturbance -free transmissions (i.e. , and which

existed m elements ahead of the one at which disturbance x is introduced) before the introduction

of the external excitation x, and we have

F

n

(x) = fn[fm

(£) + x] (8)

for the propagational transfer function for an externally induced signal x introduced into a cascade

m <* or ring at the time and place where the existing signal was f ( r )• Now F may have had any value between and + s. ( C may be imagined as the output of a

disturbed element). Therefore, if m is small, (in a practical case 3 or less) £' ( F ) might also

have any value between and + s. However if m is not small, or more precisely, if g is large,

the probability that i: ( r ) will have a value other than or + s is so small that we can let

11
a.nd

*^l 5 * = {o ; §m larg€

'f1 (s + x) F

n

(x) = V _ ; gm large

fn

(0 + x)

(9)

Fig. 12 b is a graph of the function y = F (x) and Fig. 12 a shows y = i (x) for comparison.

F (x) is seen to be double-valued over a certain range, and single-valued outside this range. There

is the threshold a to positive disturbances, and an additional threshold - a' to negative

disturbances

F (x) is completely specified when n and three of the four parameters a , a' , s, and g are

known. This can be seen from Fig. 12 a which shows that

a + a' + s/g = s n n

' s

a + a

1 = s ($ ). n n

v n ' (10)

Figure 12. a. f (x) for the biased saturating element

b. F (x) derived from fn

(x)

As in the case of f (x), a is given by

x - a8(gn

-l) n . .. n

(g-1) g

(4)

ag Then, remembering that —-^ = a = r

,e -1,

a = r (2 ) ; n ' n ' (11)

12
and, from (10) n . a' = s (S-^-i ) - a

g

= (s - r) <-Sll_L (12)

n, and the three quantities s, r, and g completely determine F (x). Then as n —> oo, — —> 1 so that only the two quantities s and r are needed to gn determine the steady-state propagational transfer function which is given by

lim

F°°(x) = _^ F

n

(x) =

' ' n —> co

'

f00 (s+x)

f°° (0+x)

\0 ;

s ; (s+x) > r (s+x) < r

s ; x > r

; x < r ; g large

= <

' s ; x > - (s-r)

; x< - (s-r)

s ; x > r

V

; x< r m .

; g large

(13)

in which r = a , and s - r = a' oo co This function is shown in Fig. 13 b with f (x) shown in Fig. 13 a for comparison. It is seen to be

single -valued for x < - (s - r) and for x > r ; and double valued and depending on f ( F ) | for

- (s - r) < x < r. The arrowheads show the only direction in which y = F (x) may vary along the

y= F ( x)

Figure 13. a. i^ (x) for the biased saturating element showing one threshold.

b. F (x) derived from f (x), showing two thresholds

13
vertical segments. The horizontal segments of F (x) may be traversed in either direction. The

full signal magnitude is s, and there are two thresholds r and -(s-r) corresponding to the two

stored quantities -r and (s-r). F (x) shows that the propagation of signals in cascades and rings of elements having the transfer function (Z) is bistable, and that in the steady-state only signals having

zero magnitude, or signals having a magnitude s can exist. If we call the former full binary „ ZEROS, and the latter full binary ONES, it is seen that a positive disturbance must overcome the

stored quantity -r in order to change the state of the signal from a full ZERO to a ONE. Weaker

disturbances will have no permanent effect upon the signal. Similarly, a negative disturbance must

overcome the stored quantity (s-r) to change the state of the signal from, a full ONE to a ZERO. In.

other words, in the case of an alternating disturbance, the noise-to-signal ratio must not exceed

r/s or 1 - r/s, whichever is smaller. These quantities are both at a maximum, of course, when

r = -y- s. In this case the signal survives noise -to -signal ratios up to the very large value of 0. 5. Such a large value can be tolerated, however, only when g is large, which is assumed in the

definition of F (x) in equation (13). Physically speaking, this means that the time t* between

disturbances to a given signal must include enough transmissions to keep g large. Thus if g = 2,

then disturbance -free intervals for which m S 3 would be sufficient; but if g = 1. 3, the intervals

must allow m ^ 8. The probability that f ( C ), defined as in (3), will have values different from

or s when c is equally likely to have any value from to s diminishes as l/g . Fig. 14 a

indicates the distribution of the functions y = 1 f ( F ) + x when g is small, and Fig. 14 b

iiUJi

r

b.

Figure 14. a. Probability density of imperfect propagation functions when g is small

b. Density when g is appreciably larger

indicates the distribution when g is appreciably larger. The outer limiting function is, of course, F (x) as given in (13). As g —> oo the probability of the existence of a propagation function,

other than F (x), approaches zero. Any vertical segment in Fig. 14 may be chosen to represent a possible function f I f ( F ) + x . Since functions other than F (x) are

14
undesirable, g is a kind of propagation figure of merit. The chance of survival of a signal in the

presence of disturbances is improved when g is increased. *

2. 3 The Signal Gain g, and Amplifier Bandwidth

Now g, speaking generally, is the slope of the single -element transfer-function f(x) in the

neighborhood of R; and the number of transmissions ot a signal by an element (or elements) required

to convert a given partial ZERO, or a given partial ONE into a full ZERO or a full ONE decreases as

g is made larger, g is thus a measure of the growth of a binary signal upon passage through one

element, and will therefore be called the signal gain of the element. (It is to be distinguished from

the signal-parameter gain y/x; and it is not the power gain). Now m, the number of transmissions between disturbances, is proportional to the time rate at which transmissions occur, and

this is proportional to the reciprocal-delay-per-element or Af, the bandwidth of the element. In

this way g leads to g , a figure of merit, which is a measure of the element reaction speed. In

the case of elements for which the gain-bandwidth-product gAf = P has a fixed value, g can

be written as g

'° = ( ^f g ) where g is always greater than unity. The function _~ / g approaches unity for g —> 1 and for g —> co ; and it has its maximum value at g = e for

which ~Y7 g = -» / e r^, 1.44. It is seen that J° I g for g > 1 is only slightly dependent upon

P Af

g. However, for constant P, (~W g ) = g maybe strongly dependent upon g if P is large.

The same can be said for ( _° / g ) 6 = g 8 = g where t,. is the time interval between

disturbances to the signal: Large values of Pt- make g strongly dependent upon g, when P is

held constant. In the particular case where g has been optimized, g = e. Then

S M = < i'/^ ) P ~ d-44)

P

(14) and

-f/T ) p ~ (i.

g

t 6 Af = gm ^ ( 1 .44) Pt«

(15)

At optimized signal gain, the element reaction speed g is 1. 44 raised to a power equal to its gainbandwidth product P. The propagation figure of merit g is equal to the element reaction speed

raised to a power equal to the time t* between disturbances to the signal.

2. 4 The Element-Group

It has been shown that the steady-state propagational transfer function, F (x), for a signal

travelling in a long cascade or in a ring made up of identical unilateral elements, having the

individual element transfer -function f(x) defined in (2), can be represented by a square graph which

In reference (1) Kochen considers the case in which several or all the transducers in a ring are

subject to a noise -level large enough that there is a finite probability that a signal will be

destroyed in them. He proves that all signals will ultimately disappear, and calculates the rate of loss.

15
is completely determined by two quantities: By s_, the full signal magnitude, which is the abscissa

of S, the point of third intersection of f(x) with the unity gain line; and by r, the abscissa of R,

the point of second intersection of f(x) with the unity-gain line. If, however, the elements are not

all alike, the propagation function is more complex. In any practical case the different elements will occur in some regularly repeating order such that, if there are i different kinds of elements, the (N + i)th element is like the Nth element. See Fig. 15 a, which shows a ring of six elements of

«^_

0—-0—0—-©-

(°)

0—

(b)

-©—0—

o

<D—

(C)

Figure 15. a. A ring of six computer elements of three different kinds

b. One possible grouping of the elements in the ring

c. Another possible grouping

three different kinds. Such a ring can be divided into an integral number of identical element- groups, as is shown in Fig. 15 b and in Fig. 15 c. Then if the transfer-function of the element-group is known, a propagation function graph similar to that of Fig. 13 b can be drawn. But this is not

16
sufficient because there are i different ways to form element-groups such that the groups contain

the individual elements in different order. For example, compare Fig. 15 b with Fig. 15 c. The

overall transfer function of a group depends upon the ordering of its component elements because the

operations indicated by f_ J f_ fi(x) I are not, in general, commutative.*

The simplest case of a ring made up of only two types of elements serves to illustrate the nature

of the solution. Fig. 16 shows the groups formed from a six-element ring containing type 1 and

(a)

(b)

Figure 16. a. One of two possible element-groups and group-transfer-functions

formable from a ring having two kinds of elements

b. The other possible element-group and group-transfer-function

type 2 elements. In Fig. 16 a the group transfer -function is

f2 [f

l< x)

] =

f 12(x) ' and in Fig. 16 b, it is

£

1 [

f2< x

>] =

£21<x> Assume f,(x) and f-,(x) to have the form f(x) defined in equation (2), and that, outside the regions

of saturation and cutoff,

The

equal

operations indicated by f , rf

?

(x)l are commutative, for example, when either one or both

1 Cx where C is a constant. *- J

17
f.(x) = g(x-a)

f2

(x) = h(x-b)

Then

f 12

(x) = h [g(x-a) - b] (16)

= gh [ x - (a+b/gjj , and

similarly,

f21 (x) = gh[x- (b+a/h)] (17)

It is seen that the slope gb is the same in each case, but that the x-intercepts are different. The

intercept of f, ? is a + b/g. The intercept of f 7

. is b + a/h. Therefore, in the total propagation

function there will be two values for r, namely

12

= (a + b/g) ^V

"21 = < b + a /h> iCT

(18)

(19)

which correspond to the two kinds of element -groups which may be formed from the elements

present. There will also be, in general, two possible full-signal magnitudes s.

? and s ?] . As a

result, the complete propagational transfer function, which is designated by <f> (x), is made up of

two propagation functions F,~(x) and F?.(x), and requires a double graph. See Fig. 17. In general,

F!2 (X)

Figure 17. The complete, steady- state propagation functions <j> (x) for an

alternating sequence composed of two kinds of computer elements

if there are i different kinds of elements in a sequence, the complete propagation function

4> (x) will include i different functions F (x), one for each kind of element-group which can be

formed in the sequence. The graph of (j> (x) is then composed of i separate graphs, one for each

F°°(x).

<)> (x) as graphed in Fig. 17 shows that the full signal amplitude at 2, 1 junctions is greater than

at 1, 2 junctions. The threshold to positive disturbances is smaller at 2,1 junctions than at 1, 2

18
junctions, but the threshold to negative disturbances is greater at 2,1 junctions than at 1, 2 junctions.

If the same magnitudes of positive and negative disturbances can be expected at both junctions, the

smallest thresholds in <$> (x) then indicate the margins of stability of the signal. As shown in

Fig. 17 these would be +r.

? and -(s_. -' x?

,)-

2, 5 The General Element-Group Transfer-Function

In the last section it was shown that stable binary signal propagation results if the element

transfer function or the element-group transfer function f(x) has the form (2) represented by the

graph of Fig. 9- It was also shown that, as far as the steady-state propagation function F (x) is

concerned, the essential features of f(x) are simply the three points O, R and S at which its graph

crosses the unity-gain line. This suggests that a function f(x) which is more general than (2) might

generate the same F (x) and therefore be sufficient for stable binary signal propagation. Such a

function is illustrated in Fig. 18 and is defined only by the following restrictions:

y/x < 1 for x < r and x > s

y/x > 1 for r < x < s (20)

y/x = 1 for x = r and for x = s

y < s for x < s

y = x

s -

or s

Figure 18. A generalized element-group transfer function

It can, in fact, be proved that f (x), the nth iteration of f(x) as just defined, will converge to

f (x) as shown by the dotted line in Fig. 18 and will therefore result in the same F (x) as was

derived from the more restricted form. It is only necessary to carry out the proof for the portion

between O and R since the proof for the other regions is similar.

For the region < x < r, in which y/x < 1 by definition, it is only necessary to show that lim

the curve y = f (x) approaches the x-axis; or, in other words, that _^ f (x) = 0; < x < r.

19
r -

y y=f (x)/

/y=x

tR

^y= k3

x ^y=k2

x

x *3 x2

x i r

Figure 19. Proof that the generalized transfer function converges to a step function

Fig. 19 which represents the portion of f(x) between O and R, shows that, for a given value of x,

say x., f(x.) may be replaced by its equivalent k. x., where k. = y./x. on the curve y = f(x).

i (x.) may then be deduced as follows: (See also Fig. 19.)

f(x

x

) = f

1 (x

x

) = k

x x

x = x

2

f2(jcj.) = f(x

2

) = £(kj x

x

) = k

2

. k

x x

x = x

3

f 3( Xl) = f(x

3

) = f(k

2

. k

x x

x

) = k

3

• k

2

• kj Xj = x

4

fn(x,) = f(xj

n-1

7T k. x

1

1

p" —1 n

= t

1

k.

i

Now if x. is confined to the range < x<r, then k. < 1 with the result that x? < x.. Then,

since x_ < x. < r, k? < 1, making x^ < x_. And again, since x_ < x_ < x. < r, k~ < 1,

. . . , and so on. This sequence shows that the values k. remain less than unity. But for

< k. < 1 — l lim n

TV k

oo 1

Therefore,

lim

fn

<*,)

lim

n -> oo

n

7T k.

1 '

and hence

f (x) lim

n -> oo

fn

(x) < x < r

20
In similar fashion it can be shown that £ (x) coincides with the line y = s for x > r.

2. 6 The Propagation-Function of the Flip-Flop

We have seen that binary signals are propagated in stable fashion in sequences of elements which

may be subdivided into element-groups having transfer -functions each of which crosses the unitygain line at the three points O, R and S. * The functions f (x) and F (x), which describe the transient

behavior of a signal, apply only to sequences in which an element-group receives and transmits the

signal sequentially, during discrete time intervals. Also, a somewhat detailed knowledge of the

shape of the graph of f(x) is needed to predict f (x) and F (x). But f (x), F (x) and cj) (x), which

describe the steady state of the signal, are determined only by the values of r and s for the possible

element-groups in the sequence.

Even when the element-groups do not receive and transmit in separate time intervals, it is

possible to describe the steady state of a solitary signal by means of <(> (x). This is illustrated for

the case of the vacuum tube flip-flop in Fig. 20a. The flip-flop can be thought of as a ring composed

of two elements, each being a vacuum tube with its associated circuit. The signal-carrying parameter x is the difference between the plate (or the grid) potential and the lowest plate (or grid)

potential V . This difference is called the signal voltage. If the elements have transfer functions

with negative slopes; or if their transfer functions are different, they must then be combined into

element-groups. Fig. 20 b shows the flip-flop regarded as a ring composed of a single element-group

having element 1 as its input, and element 2 as its output. Fig. 20 c shows the same flip-flop

considered as a ring composed of a single element-group in which the element order is reversed.

Two values of r and s, one for each element-group, are required to determine 4> (x). The steadystate signal at the 2, 1 junction is described by F , ? (x) derived from the 1, 2 element-group of

Fig. 20 b. The steady-state signal at the 1, 2 junction is given by F ?. (x) derived from the elementgroup 2, 1 of Fig. 20 c. As these groups are shown, it is seen that the parameter x corresponds to

plate signal-voltage. The grids could as well have been chosen for the element junctions with x

representing grid signal -voltage, and with only a scale factor difference in <J> (x).

Figure 21 shows the output voltage (plate voltage of the first tube) of element 1 plotted on the

outer vertical axis, versus its input voltage (plate voltage of the second tube) plotted on the lower

horizontal axis. The portion of this curve which is included within the inner coordinate axes, having

their origin at the point V_ ?

, V.,, is f,(x) in terms of these axes. V_~ is the lower limit of

excursion of the second plate. The outer axes measure voltage above ground; the inner axes

It should be pointed out that the element-transfer functions need not, in themselves, satisfy these

stability requirements. It is sufficient that the transfer -functions of all possible groups satisfy

them.

21
+ E

(a)

2„! JUNCTION

INPUT

+ E2

ELEMENT 2

OUTPUT

(b)

(C)

Figure 20. a. The vacuum tube flip-flop

b. The flip-flop regarded as a ring composed of a single 1-2 element-group

c. The flip-flop regarded as a ring of one 2-1 element-group

22
Figure 21. Graphical determination, of r.

?

, s,

?

, r ?1 , and s~, for the flip-flop

represent signal-voltage, as already defined. Superimposed on this is a graph of the output of the

second element, plotted on the horizontal axes, versus its input, plotted on the vertical axes. V_ ;

is the lower limit of excursion of the first plate. Using these superimposed graphs, the functions

f.

? (x) = f_ f.(x) and f?

. (x) = f. |f

? (x) can be constructed. They resemble f(x) shown in Fig. 9.

But the values of r._, s. ?) r ?1 , s

?

. are easily found immediately, as indicated in Fig. 21, and from

these the functions F , -, (x) and F ?

, (x) can be graphed, as was shown in Fig. 17. s,~ gives the

voltage amplitude of a full binary ONE at the plate of the second tube. In the case of a full binary

ZERO this plate remains at the potential Vn? . r.

? is the ZERO-stability margin at the 2, 1 junction,

and s.-, - r.

? is the ONE-stability margin. At this junction the noise-to-signal ratio must be kept

r 12r

12 less than or 1 - , whichever is smaller. Similarly, at the 1, 2 junction, the noise-toSl2 S]L2 r 21 r 21

signal ratio must be less than the smaller of the two quantities or 1 - . s 21 s 21

23
3. SIGNIFICANT TIME INTERVALS IN THE DIGITAL AMPLIFIER OPERATION CYCLE

lim

In the case of the flip-flop, <j> (x) = . <j> (x) is found to predict the steady-state correctly;

but, even though f. ? (x) and f

?

. (x) are known in detail, <j> (x) does not give the flip-flop transient

response because the successive transmissions of a disturbance through the element-group in the

loop provided by the positive feedback connection are not separate and distinct events whose

cumulative effect can be deduced by a simple iteration of the element-group transfer function.

The element-groups employed in digital computing devices differ markedly from the kind used

in the flip-flop in one very important respect: The computer element-groups receive and transmit

the signal sequentially daring septra.i<r and distinct time intervals. As a direct result of this fact

it follows that:

1. No fewer than two element-groups at a time, in a single sequence, can accomplish

the propagation of a single binary signal. {One group must receive while the

preceding group transmits.)

2. No more than two element-groups in a single sequence are involved at one time

in signal propagation. (The group that is receiving a signal cannot begin transmitting it to the next one until the receiving interval is finished. ) As a result, the binary signals in a single sequence of element-groups have definite spatial and

temporal identity. Their extension and duration, and their location in time and space are always

well defined. The state of one element-group in a single sequence is a function of not more than

one signal at a time. Furthermore, in dynamic circuits the signal moves at a constant rate determined by the delay time of the element-groups in the sequence. The element-group delay time

t_. is defined to be ihe interval between the moment of arrival of a signal at the element-group input

and the beginning of the transmission of that signal by that group to the next group. See Fig. 22. The number of signals per second transmitted (or received) by an element-group is called the

bit-rate. The bit rate is the reciprocal of the element- group cycle-time T. The latter is defined as

the time required for the element-group to go through all the states involved in the passage of a

signal and cc rf turn to its initial state. At its maximum, the element-group cycle time includes a

receive interval., followed by a store interval, followed by a transmit-interval, followed by a

recover interval. See Fig. 22. By definition, the receive-, transmit-, or transmit-recover

intervals are equal in dynamic circuits; the other intervals may have different lengths relative to

these. In dynamic circuits these intervals have constant predetermined lengths; but in static asynchronous systems there is no fixed cycle-time. The store and transmit intervals are not

fixed, and are usually much longer than the receive interval. There is no recover interval in

static systems. In this paper we are principally concerned with dynamic systems.

24
STAGE I

STAGE 2 >

uso

Ul

STAGE 3

UJ>ou

UJ

IE

tu>

UJo

UJ

DELAY

TIME

1

>u

CYCLE

TIME

PHASE I PHASE 2 PHASE 3

Figure 22. Significant time intervals in the digital amplifier operation cycle

25
Synchronous circuits differ in respect to what is done with the store-, and recover intervals. The

minimum cycle time results when the store-interval is eliminated, and the recover operation is

eliminated or is combined with the transmit operation. This is called a two-phase system. A twophase system of the second kind is shown in Fig. 23.

"AGE!

STAGE 2

PHASE 2

Figure 23. The dynamic operation-cycle that gives the maximum bit-rate

Now while the number of signals transmitted per second by an element group (the bit rate) is

inversely proportional to the element-group cycle time, the number of element-groups traversed

per second by a signal is the reciprocal of the element-group delay time.- which is the interval

between the beginning of the receive -interval and the beginning of the transmit interval. Therefore,

if the delay time is short compared with the cycle time, a signal introduced into a sequence will

traverse many element-groups before the first one in the sequence has completed its cycle and is

ready to accept the next signal. The number of element-groups traversed equals the number of phases in the multi-phase system that results. Fig. 22 shows a three-phase system. It is seen that

the number of phases can be increased by minimizing the store -interval and by maximizing the

recover-interval. The latter however, is undesirable because it lowers the bit-rate. Fig. 24

shows the result of eliminating the store-interval. The number of phases then equals the ratio of

the cycle-time to the receive- interval, or element-group rise time.

If it is assumed that logical operations can be performed on the signal at each transmission

through an element-group, then, for a given bit-rate, the number of operations per second is

proportional to the number of phases. The elimination of the store -interval would therefore seem

completely desirable. But with a certain kind of computer element the store-interval serves a

useful purpose. This element, exemplified by the flip-flop, is called a regenerative element.

26
VorX

RECEIVE TRANSMIT RECOVER t

STAGE 1 v. y V

RECEIVE TRANSMIT RECOVER

STAGE 2 y^ s'

RECEIVE TRANSMIT RECOVER

STAGE 3

PHASE I PHASE 2 PHASE 3

Figure 24. The minimum cycle -time achievable by elimination

of the store interval results in a three-phase system

It has been pointed out that the element-group from which the fliy-flop is formed is unsuitable, in

itself, for use in computer networks because it is incapable of divorcing the transmit-interval from

the receive -interval. In order to accomplish this separation, an element-group must be capable of

storing the quantity measured by the signal parameter x. The addition of the positive -feedback

connection to the flip-flop element -group, to form the single element called the flip-flop, results in

a device that will regenerate and store a binary ZERO as a full binary ZERO, and a binary ONE as

a full binary ONE. To obtain the full benefit of regeneration the state of the flip-flop must not be

sensed-, that is to say, its state must not be transmitted, to the following element, until it (the

Af t first element) has had time to approach the steady state. The figure of merit g d gives an

indication of the degree of signal regeneration obtained if Af is the bandwidth of the element -group

from which the flip-flop was formed, t , is the receive interval plus the store-interval, and g is the

slope of the voltage transfer-function (small- signal gain) of the element group where it crosses the

unity-gain line. The probability that the flip-flop will transmit other than a full ZERO or a full ONE

-Af t. is proportional to g The store interval is therefore seen to be useful in minimizing the occurrence of marginal binary signals. If Af t d is very large, the flip-flop becomes a computer

element having the ideal signal-parameter transfer -function shown in Fig. 13 b

Af t

, , , g d can also be expressed as g

'

, where t = l/Af is the rise-time, or delay-time

around the flip-flop internal loop. This shows that the store interval should be made as large as

possible relative to t . Now t may be taken as the practical lower limit on the receive interval of

the flip-flop used as a computer element. Therefore, for the most nearly ideal response from the

27
flip-flop element, the receive-interval should be made equal to t , and the ratio of the store -interval

to the receive-interval should be kept as large as possible, consistent with the requirement that the element delay-time (receive-, plus store interval) be no greater than one-half the element cycletime. Otherwise, the ratio of cycle-time to delay-time, which equals the number of phases, assumes non-integral values. Therefore the sum of the largest value of the store interval and the

receive-interval must equal the sum of the transmit-interval and the recover-interval. But the

transmit-, and receive-intervals are equal (by definition); therefore the store-, and recover

intervals must also be equal if the store -interval is to have its maximum value. In other words, at

its maximum, the store -interval equals the recover-interval. This results in a two-phase system.

Furthermore, if the bit-rate is to be maximized, the practical minimum value for the recoverinterval is equal to that of the rise-time, or receive-interval for the element. The result is a twophase system in which the receive-, store-, transmit-, and recover intervals are each equal to the element rise-time t . See Fig. 25.

yorX

RECEIVE STORE TRANSMIT RECOVER

/^~ ^^_/^ STAGE 1

STAGE 2

•* DELAY 1riME —-*-

RECEIVE STORE TRANSMIT

f>yn p TIMET

RECOVER

]

< ' PHASE I PHASE 2

Figure 25. The dynamic operation-cycle that maximizes the store -interval and the bit rate

In this system, the figure of merit g d = g ' r equals g , remembering that t , is the su

t of the receive-interval and the store -interval. The smallest value for g ' r is g, which results

when the store -interval is eliminated. If this is done at maximum-bit- rate, a three phase system

results. See Fig. 24. Then, as has been mentioned earlier, if the recover-operation is

eliminated,— or is combined with the transmit-operation, a two-phase system having the shortest

possible cycle-time, and hence the maximum possible bit-rate. See Fig. 23. The figure of merit

for this system is also equal to g. Such a system can be realized with flip-flops using a synchro2/ nous static scheme.

28
Although the elimination of the store-interval reduces the figure of merit of the flip-flop to that

of the simple "non-feedback" computer element, the need for positive feedback remains. For it

provides the flip-flop element with the property of storage which it needs in order to separate the

transmit-interval from the receive -interval. The signal, which accumulates during the receiveinterval, remains throughout the transmit-interval, and is removed during the recover-interval.

4. DERIVATION OF THE MAGNETIC DIGITAL AMPLIFIER TRANSFER-FUNCTION

The property of storage is essential to the computer element-group. In the case of the flip-flop,

the signal-carrying parameter is a voltage, and voltage amplitude is the relevant quantity stored and

transmitted. (Physically speaking, the charge on the stray capacitance to ground from the grids and

plates is the stored quantity.) We now wish to describe a computer system in which the elements

transmit and store, as signal parameter, a quantity equal to, or proportional to the time integral of

voltage. The principal component in this system, a magnetic amplifier, in itself provides:

1. The essential property of storage, without positive feedback,

2. The essential power gain, and

3. The desirable feature that the operations of transmit and recover are accomplished

simultaneously.

But the magnetic amplifier alone is not sufficient as a compute : element principally because

its volt-second transfer characteristic does not fulfill the requirement for stable propagation of

binary signals: It does not cross the unity gain line in all three essential points O, R, and S. To overcome this deficiency other components have been associated with the magnetic amplifier

forming a circuit whose element-groups have the desired transfer -function properties. The result

is a two-phase system of maximum bit-rate, such as is shown in Fig. 23. The analysis of this

circuit (called Transmag) is the principal subject of this paper. The magnetic amplifier used consisted of a ring-shaped core of high-permeability, highly

retentive magnetic material (4 - 79 Mo. Permalloy, l/8 mil. , ribbon stress-wrapped on a 0. 1 inch

stainless steel bobbin) having two toroidal-windings, an input winding of n. turns, and an output

winding of n- turns. See Fig. 26. The flux, <b» versus ampere-turn, ni, diagram for this core is

essentially that shown in Fig. 27. Figures 28 (a) and 28 (b) show typical paths of core operation in

the Transmag circuit. The operation cycle consists of a receive interval followed by an equal

transmit-recover interval as shown in Fig. 23.

Passage of a signal through the magnetic amplifier takes place as follows: At the beginning of

the receive -interval the core is always in the state of negative remanence, which is appropriately

taken as the origin in Figs. 28 (a) and 28 (b). Then, during the receive-interval, which has a

duration T/2, the incoming signal voltage v , (t) > produces a positive flux change + A, <j> having

a magnitude

29
Figure 26. The magnetic amplifier

+ 4>r

/

-<P|

^"

Figure 27. The saturation flux versus ampere-turn diagram of the magnetic amplifier core

+ <P r

2y\j

+ A<t> for stored ONE

ni

+ <j) r --

/n

+ A(j>for stored ZERO

ni

(a) PARTIAL MAJOR "LOOP FOR STORED ONE

(b) PARTIAL MAJOR -LOOP FOR

STORED ZERO

Figure 28. a. Partial major-loop for a stored ONE

b. Partial major-loop for a stored ZERO

30
T/2 r Vl (t) A d> . =1 dt so that at the end of the receive -interval, the core is in the state

1 J o n

*

- <j> + A.cj>. The core, being highly retentive, even in partial major loops, then stores the quantity

A?

<j> _~ A, <j> which is proportional to the signal parameter x = / vdt. Then during the transmit -

recover interval, load current is switched into the output winding in the proper sense to return the

core to its initial state. The resulting output signal from the amplifier is then obtained from

f T/2 fT/2 f T/2

v

2

(t) Vl (t) v

2

(t) J dt = A~ 4>. Then if x = J dt is the input signal, and y = J dt n

2 n

l n

2 n

2

is the amplifier output signal, = A, $ 2± A, cj> = —— , and y = x, provided

n

l

l L n

2 nl

'

x < 2n. (j) . Therefore the transfer characteristic of the amplifier is linear with a slope g equal

to n? /nj up to the saturation point x = 2n, $ , y = 2n?

4> The graph in Fig. 5 illustrates the shape of the transfer-function of the magnetic amplifier alone

It fails to cross the unity gain line at the point R. n

2 The fact that the slope g = of the magnetic amplifier ransfer function can easily be made

n

l greater than unity invites an attempt to achieve an acceptable transfer fui or_ by making

n^/n. > 1 and then introducing a signal threshold. To produce this thres antage was

taken of the fact that the core itself possesses a magnetizing current threshold. See Fig. 27. To

convert this to a voltage (and therefore volt-second) threshold a resistor was put in series with the

input winding.

As a first step in deriving the volt-second transfer -function of the resistor-core combination

the voltage transfer function is now worked out. The core is first shown to behave as a resistor

having a current threshold.

Faraday's law (ignoring the sign)

3/ and the constant-current, domain wall motion switching equation of Manyuk & Goodenough —

S = (H - H ) t (21a) w o'

= (n/1) (i - iQ

) T (21b)

where

voltage across the core winding

number of winding turns

time rate of change of core flux

constant-current switching coefficient of the core material

31
o

T

core magnetic path length

winding current

core magnetizing current threshold*

time required to switch a fixed fraction of the core total flux

regulate the behavior of the core during switching. Now T may be defined by

2$r (22)

where <f> is the average rate of change of flux brought about during time T by the constant current i.

If we make the simplifying assumption that <j> > the instantaneous rate of change of flux, is constant

during this time, then <(>=<)>, and T = 2<j> /())• Substituting for t in (21b), gives

= constant =

2n<b S~Tw

(23)

where 4> and i are now instantaneous flux-rate and current. Then, from Faraday's law, one obtains

v

c 2n <bTr

= R , 1-1 S 1 c (24)

which defines the core switching resistance R as the ratio of the core voltage v to the core excess

current l i . Fig. 29 is a plot of v versus i showing the threshold i and constant slope R .

Fig. 30 shows the core, in series with a resistor R , being driven by a voltage source v.

Figure 29. Switching volt-ampere diagram of the magnetic amplifier

i materially exceeds the dc coercive current when T is of the order of a few microseconds

or less.

32
Figure 30. The computer element that consists of R and the magnetic amplifier

Remembering°

that R has a threshold i , the circuit equation is c o ^ Ri + R (i-i)=v;i>i s c ' o — o

and for i > i , — o

R i + (i - i ) s

v o' v : i < i

v + R i c o R + R

s c Then

= (i - i ) R

c o c

= iR - i R

c o c

v + R i C ° D R + R c

s c

- i R

o c

R + R s c v - i Ro s (25)

gives the relationship between core voltage and the voltage applied across the resistor and core in R

series. This is graphed in Fig. 31, showing the constant slope R + R s c and the voltage

threshold i R . o s

VC X Re / ^SISPE* ——

/ Rs+Rc

/ V

l Rs

Figure 31. Switching plot of core-input voltage vc versus v, the voltage applied to Rs

33
To get the resistor-core volt-second transfer function y = f(x) we set

*T/2 x = J q

v(t)dt, and

rT*/2

J v

f

T/2

r

(t) dt = J v(t) - i R

n

2/n

L ^-^- J [v(t) - io Rs] dt

Here it is necessary to assume some form for v(t). In the magnetic digital amplifiers described in

this paper v = v sin 2-irt/T. Therefore

and

f-T/2

J v sin 2ir t/T dt o o f

T/2

n R i n — D x

C n.R+RJp l* v sin2irt/T-iR Io ' osj 1 s c o i dt

(26)

(27)

It proves easier to deal with y = f(x) graphically than to attempt to relate y and x in an equation.

The graph of y = f(x) is obtained by plotting y and x as functions of the parameter t over the range

< t < T/2. Integrating (26) gives

r 1 v T

x = 1/2 i 1 - cos 2ir t/Tj —

(28)

v T

o Observe that is the voltage -time -area of the half sine-wave. To integrate (27) we refer to

Fig. 34 and write,

*«> ^

J v dt + J v dt

t J

o

and because v =0 for < t < t c o

y(t) n, R

2 c n, R~FR"

1 s — Jf v sin 2ir -=- - i R 1 c t L ° T °

8

J dt

n, R fv T

2 c I o n, R +R I Zi

1 s c

., t cos 2ir- . - i R (t - t ) t os l o' o

a, R fv T

2 co n, R +R l TF 1 s c

-> o -. t cos 2tr -=- - cos 2ir •= iOSR (t - t ) o' (29)

1 n 127 R

c 1 n, R + R

1 s c

i R t i R

O . OS O. , t t -. O 8 t . (cos 2tt -jp 2ir — =-) - (cos Zir-^ + 2tt -^ -^ ) o o

t c T

v T

o

34
Vo a bda = x (t)

ecde = y'(t)

T/2

Figure 32. The relationship of y'(t) to x(0

over the range t < t < T/2 - t . Then, from the figure it is seen that the angle 2irt /T can

be evaluated from

t i R

(30) oT

•> O OS sin 2ir tk- = —r- = m,

The ratio m is a measure of the threshold nonlinearity that is introduced by means of the drop

i R . Observe that for m = 0, t =0 and the right side of (29) reduces to that of (28) making y = x. The nonlinearity measured by m is seen in a plot of the quantity

y' = / (v - i R ) dt

J o s' o

= 1/2 [ (cos 2* -£ + 2,rm J>) -(cos 2*± + 2TM^)]!°

Ao1/2 [l - cos 2* t/r] 1°-

(31a)

(31b)

= I vdt

o v T

(28)

where y

1 is the area ecde in Fig. 32, and x is the area abda.

Curve 1 in Fig. 33 shows this plot for m = 0. 36, which is close to the value used in the

t experimental magnetic amplifier. Here 2ir-=— = arctan 0. 36 ^ 0. 37 radians, and

cos 0. 37 radians = 0. 93. Thus

r n v T

y'(t) = 1/2 [. 93 + . 37(. 36) - (cos 2u t/T + . 36 2ir t/T)J -£- ,

which is plotted against v T

x(t) [11 - cos 2ir t/T I —°— over the range < t < T/2, or

35
1

1

1

\\ I \ \ -

\ \

V \

\ \ a

\ \ S 8 -

\ \ % CO v . V ' \ \ l>

\ \

v \ ^

~

CM \ \ >

UJ ^ \ X

5

v ^ \

\ \

\ \

\ \

\ \

\ \

\ \

\ \

\ \

\ \

\ \

\ \

\ \

\ \

\ \

\ \

\ \

\ \

\ \

\ \\ \\ \\\\ \ —

\\

\\

o \\

111 -\r

co A

X >

>l

1 1 1 1 1 1

0>




1»c

00

XIa

&

<£>

36
v T

x = to x

Curve 2 shows y = f(x) where

-t

y(t) n r n f' R

ji_ / Vc(t) dt . _? j __c_ (v . i i o lose

with n^/nj = 2, and =——£

R ) dt

s'

n

2 R

c nT- r-tr- y'^ L2 y'

1 s c

c 750

" 470 + 7!>0 ^ ®' ' wllic^ arar t^xe experimental values used.

v=v sin 2 ^-f

(i-t.) T/2

Figure 34. The relationship between v, vc , iR g

, i Rs

, t Q and T/2

Fig. 34 shows the relationships between the quantities

v = v sin 2ir t/T = lOv sin 2ir (300 kc)

s c

r_ = iR = i(470 ohms) Rs

8

i R = 3. 6v

o s

37'
n—2 . v = 2 v

n, c c v-iosR = v - 3. 6v

o The shaded area is equal to | v dt.

Curve 2, Fig. 33 exhibits some threshold, but lacks sufficient slope to cross the unity-gain line. n R

L* C The slope of the whole curve could be increased by increasing the product — . =——^=— , but it would

1 s c be preferable to preserve the threshold region and increase the slope near x = v T/2u. This effect

n., R Z c might be achieved by increasing both -p——^5— and m or by a suitable combination of n, R 1 s c —Li C

» ^5— p and m. Because m is a measure of the nonlinearity sought, and because, generally

1 s c n_ R L* C speaking, -=— _ affects the slope of the transfer" function, we have the problem of

1 s c maximizing these quantities subject to circuit constraints and practical limitations. We now wish to

consider how this may be done.

Equation (25) may be written as

and in particular,

v R i R

c _ c , . OS.

~v~ ' R +R { v '

; s c

R i R

d--^). (32) R + R

s c

where v is the peak value of the core voltage v . See Fig. 34. Solving (32) explicitly for

i R /v = m as defined in (30) gives

o s' o

b

See Appendix I. Then making the substitution

(33)

i R

o s V

o

- m =

1 - co/o

V

1 1 co

i R

o c

R i R R

s c o s c

one has finally, see Appendix II, that _ 1 1 R +R v v

1 4 C S CO . CO

(35a)

R i R i R

s o c op

38
in which

1/R

p

= 1/R

g + 1/Rc (35b)

To equations (34) (35a) and (35b, which will prove useful in optimizing m, must be added a necessary relation involving n_/n..

n, «r v

(36)

, n, must v

1 CO

This expresses a constraint imposed by the nature of the particular transistor-magnetic-core

amplifier reported on here. The reason for this constraint will be explained in the description of

the circuit. The problem of maximizing the threshold parameter m is considered first, and is here worked

out in the following steps:

1. Assume there is given:

a. A magnetic core having the known parameters

Y<b , S ,1, and H , r w o

b. with an input winding of n, turns

c. to operate at a frequency f = l/T.

2. If the core is to be fully switched by a full input signal, <J>

, n. and T will determine v .

It can be shown, see Appendix III, that T/2 v T

CO /

TT J

o

Then, for full switching

rT/2 r

+ *r v T / v dt = n

l 2nl

r i/t

/ v

c

dt -

3. Making use of equations (35a) and (35b) we see that to maximize m we must maximize

i R . o p

4. Because i is already fixed by the core parameters H , and 1> and by n., we must

maximize R . P

5. At frequencies above 100 kc the core resistance R , which is given by

2n

l *r Rc

= -T5-^ {24> w

sets the upper limit on R .

39
6. This limit is approached when R

g > > Rc For this case, the design equations are:

1 +-T

i R o c

(37a)

v — ll-m)R

co c

R r^ R

p c R > > R

s c

(37b)

'2 < o

r CO

(37c)

But this arrangement is not practical because, as (37b) shows,

it results in an excessive ratio of v to v . See Fig. 35, for

example, in which the shaded area shows the volt-seconds applied

to R . This is inefficient because most of the input power is c wasted in R .

V„ ..

T/2

Figure 35. Large ratio of v to v when R > > R & ° O CO s c

7. The maximum practical value for R , i.e. , the point of diminishing returns,

r

is where R - R . Then, for this optimum case, the design equations are

s c

40
—1Zv

1 + nro c

(38a)

2 "Trn" R = R /2 p c' R = R s c

(38b)

(38c)

For the optimum case we see that the core parameters completely determine v , m, v and the upper limit on n? /n. at a given frequency, when the core is fully

switched.

In the transistor-core amplifier the situation was more favorable than this because

it was possible, by means of a core bias current i, (derived from an auxiliary current

source) to produce an independently variable effective threshold current i

1 = i + i, . The optimum case design equations then become

1 m = n2\

1 + co l+ FIT" o c

2 T^rn"

A

R

P

= R 72

c Rs = Rc

i' - i + i.

(39a)

(39b)

(39c)

in which m and hence v and n

2

^ n l are freely adjustable through i' For example, if we make i' R = 2v , then m = 0. 5, v 4 v , and

co n,/n 1 = 4. See Fig. 36. Or if we make i' R = v , then m = 0. 33, v = 3 v

n

2 and — < 3. See Fig. 37. The largest practical value of m for this case is n l =

probably 0. 35. *

The fact that R is actually not constant during switching results in a better threshold

than is predicted by m, however.

41
9. Finally we consider the alternative case, achievable only at lower frequencies, * for

which R > R . The design equations then are: p s

(40a)

1 + Tfi"R

o s

1 - m

R ^,R

P — s R > > R

c s

(40b)

(40c) n, = v y 1 c o

Fig. 38 illustrates this case for m = d. 5, a very large value. However, even for

this large value, vQ

is only a little over twice vc6. This case permits the smallest

n , ratios v /vco and_2 for a given value oi m.

V -

V

1 v

JaWI}*^^

Vco

1 / ,t ' / lRs ioRs / 1 I

t

T/2

Figure 36. Large value of m = i

1 R /v -0.5 achievable through

the use of a bias current. R = R

s c

V

vo

Vco / iR

° i;"«.

/ * \ t T/2

Figure 37. v = 3v and m = 0. 33 when R = R and i

1 ° R = v

O CO s c o s CO

* At lower frequencies, larger values for ^ and n. are possible.

42
T/2

Figure 38. Large value of m and small value for v./vro achievable when R »R

We now take up the problem of maximizing the slope of y = f(x). It has been stated that this R

slope will, generally speaking, be proportional to _

"r—jT^r— • But m t-ne particular

i s c application being considered here n.,/11. is subject to the restriction (36); and this combined with

(34) gives

R R + R

c s c Rc 1 R + R " R (1-m) * s c c n

2 R

R + R s c 1-m

n, R + R 1 s c The actual slope of y = f(x) is found by taking the ratio of dy/dx to dx/dt.

R

dy _ 2_ c dy'

dt ~ n, R + R dt

1 s c — p 1 t> (v - i R ) i, R + R

v o s'

1 s c

(41)

(42)

(see equation (31a) and Fig. 32), and

dx

dT (43) From which

R i R

*L = _£. £ ( dx n, R. + R. v 1- -2.JL.)

s c

n_ R

2 c n, R + R 1 s c

(1

i R

o s v sin 2ir t/T

o

'

for t < t < T/2 - t . o

' o

0, for t > t > T/2 - t . o

' o

(44)

43
Then from (41)

£

m

sin 2tt t/T"

1 - m o

0, t > t > T/2 - t

< t < T/2 - t

o

' o

This shows the slope of the transfer function to be maximum at t = T/4, at which time

dy

dx

T/4 oi

= 1

(45)

(46) v T

o

At all other parts of the half-cycle , y is less than unity, approaching zero at t and at T/2 - t . Thus we have the important result that, subject to the restriction (36) , the volt-second

characteristic of the core-resistor combination cannot cross the unity-gain line. Therefore coreresistor combinations alone, when operated in this way, are incapable of stable binary signal

propagation. Fig. 39 indicates possible transfer functions whose slopes are given by (45). See

Appendix IV.

w

Figure 39. The volt-second transfer function of the resistormagnetic -amplifier element for different values of m

During the transmit interval, the core is restored to negative remanence, not by v , but by a

voltage v = -v sin 2ir t/T, (Observe that during the transmit interval, T/2 < t < T, the

44
sin in t/T < 0.) applied to its output winding by means of a (current-limited) voltage source. Thus

the voltage gain between the input to the core-resistor series combination and the core output

i winding is unity. The result is that volt-second gain, or loss, appears as time gain, or time loss

as signal "stretching", or as signal curtailment. When the ratio n_/n. is subject to the

restriction (36), curtailment is the only possible result, with a consequent core flux-gain of less

than unity. The proof of this is as follows:

It , dy _ dy/dt

I In general ^L. - ^^ (n

2 /ni) v

c

Theln, in the particular case where n

? /n, is restricted by (36), we have, from (45),

^2 _^c_ dy_ 1 - m/sin Ztt t/T

n, v

" dx 1 - m

c v 1 - m/sin Ztt t/T

n-, 1 - m

(47) "1 "2

wheire v /n. = A (t) in the core during the receive interval, and v/ n-, = <)> (t) during the transmit

c 1 " interval. See Fig. 40. Now, if during the receive interval o < t < T/2, the core, starting

I .t,

at niegative remanence, experiences a flux change J dt, then * n * during the transmit interval

Figure 40. Core flux-gain is less than unity when n,/n, = v /v

co

T/2l < t < T, the core will be restored to negative remanence in a time t 2 (measured from the

beginning of the interval) determined by

dt n

2 dt

45

(48)
But, from (47) < except at one point. n, n Therefore

H

K HSee Figure 41. Now the flux change received by the next core in the sequence is

(49)

CORE !

CORE 2

CORE 3

Figure 41. The progressive curtailment of core switching -time when

/ < i n2' n l = v /v results in a flux-gain less than unity

46
V

dt, and we have also by (47) that

117 dt < J £r dt (50)

See also Fig. 40. Thus by (48)

o which shows that the restriction

H

dt < / _E_ dt (51)

(36)

results in flux gain which is less than unity. .

See Fig. 40.

In similar manner it can be shown that if n, is arbitrarily increased, keeping all other quantities

the same, the flux gain can be made greater than unity. For this case t ? > t., (signal stretching)

and the inequality (50) is reversed, although the corresponding inequality of the integrands is not at

all times reversed. See Fig. 42 and Fig. 43. When ty > t, it may happen that t ? > T/2, and the core will not be returned to negative remanence. This undesirable situation can always be avoided, however, by making

v T/ir > 2n, d . o ' = 2 r r

5. THE INTER-ELEMENT COUPLING NETWORK AND ITS EXPANSION INTO TWO-LEVEL

SWITCHING

The core-resistor computer element just described requires a source of ac power to operate it and a means for coupling the binary signal to other computer elements. The simple circuit

employed for these purposes in the magnetic- and transistor -magnetic amplifiers reported on here

satisfies the following indispensible requirements:

1. It provides a voltage-source drive.

2. But, at the same time, it limits the current supplied to useful load current. It is a

. current-limited voltage source.

3. It provides unilateral transfer of signal from the transmitting element to the receiving

elements.

4. It provides effective decoupling between the elements when they are not intended to communicate

5. It decouples the receiving elements from each other.

47
6. It is expandable to form multi-input; multi-level logical coupling of the binary signal

to each element,

7. It provides an effective means for driving the fan-out lead capacitance.

CORE i

CORE 2

CORE 3

Figure 42. The progressive lengthening of core switching time when

n2^n

l > vq/V

co

results in a flux-gain greater than unity.

48
n 2 v Vf

Figure 43. A flux-gain greater than unity can result if n^/n. > v /v

Figure 44 shows this inter-element coupling circuit, drawn in heavy lines. It consists of a d-c

voltage source + V , an alternating voltage-source v = v sin 2tt t/T, a "pull-up" resistor R , a

diode D called the "power diode", and a diode D called the "output diode. " V and R are made

P ° P P

large enough that the current in R remains effectively constant. This current is adjusted so that

it exceeds the sum of the magnetizing current of core A plus vQ /R , the maximum input current to

core B, by enough to maintain D in full conduction, even at the peak positive value, v , of the power

source.

It is necessary to examine the operation of this coupling circuit both during the positive halfcycle of the power source, and during the negative half-cycle. During the positive half-cycle the

cores are communicating therefore this is called the coupling half- cycle. A is transmitting its

information to B. Some of the pull-up current entering the branch point J through R is being used

to restore core A to its initial (ZERO) state; some is serving to magnetize B; the remainder maintains D in conduction so that the impedance to ground from J remains low. (It equals the forward

resistance of D . ) During this time v is negative and, because of the winding polarities (shown by

P c the dots), tends to aid in restoring core A. Thus the current drawn from J by A is reduced by the

presence of the current applied to the input winding through R . However, because the impedance

n

2 2

to ground at J is only a few ohms while the equivalent resistance ( — ) R of the primary circuit

49
v = v sin 2 w 17 t

Figure 44. The inter-element coupling network

when referred to the secondary winding is typically several hundred ohms, the core is effectively

controlled by the voltage v. at J. If, at any part of the coupling half-cycle, it should happen that n

2 v > v, diode D would simply open, and the excess portion of the pull-up current would be

diverted through D with negligible effect on v T

. However, under the restriction (36) of section

p J this condition would not come about. Furthermore, an increase in n

? alone could not serve to bring

it about because this would produce a compensating reduction of v , as may be deduced from

Fig. 45, which shows everything referred to the core output winding. D would remain conducting

and the core would remain under the control of the coupling circuit. When core A saturates (at negative remanence) its c.e.m. f. drops to zero. As a result J is

pulled to ground by the output winding, which takes the entire pull-up current, leaving D open for

the remainder of the coupling half-cycle.

During the negative -, or decoupling half cycle, A and B are not communicating. A is receiving n

2 while B is transmitting.b Under restriction (36), v < v , with the result that D remains open.

' co n, — o o

r Thus, while it is receiving, core A is completely under the control of the incoming signal voltage

applied rr to R . If A saturates before the end of its receive interval the cathode of D returns to

s o ground potential without having any affect on core B.

50
<42 WW\A

"*&)<

Figure 45. Core impedance presented to the inter-element coupling

network during transmission of a ONE

It is during the decoupling half-cycle that the restriction (36) is made necessary. For if n_ is

increased to make v greater than vj at any time, then during this time D conducts,

control of core A passes from the input winding to the output winding (since the core is controlled

by the lowest impedance source presented to it), and reception of information is interfered with. We see that restriction (36) is imposed by the requirement that D be kept non-conducting during

the decoupling half-cycle. During both half-cycles R serves the indispensable purpose of preventing the excess flow of current from J when the impedance of the input winding disappears, upon

core saturation.

Because the magnetic amplifier operation cycle consists of two equal intervals, receive , and

transmit-recover, it is a two-phase system. In a sequence of these amplifiers, for every coupling

circuit that is performing the coupling function, there is another that is simultaneously performing

the decoupling function. Thus all the odd-numbered coupling circuits are driven by sources of common phase, which might be called phase 1; and the even-numbered circuits are driven by sources

having the opposite phase, called phase 2. Then if we identify each computer element* with the phase

When the element transfer functions are inadequate, and elements must be combined into groups, the word element-group should replace the word element in the following discussion.

51
of the power source for which that element transmits, the odd-numbered elements willbe called

phase 1 elements and the even-numbered elements, phase 2 elements. Obviously, an element can communicate only with those of opposite phase; Since the transmission of a binary signal requires

the simultaneous cooperation of an element of each phase, there are then two elements for each

binary bit of information travelling in a cascade. (In n-phase systems there are n elements for every

binary bit, if elements alone provide the delay. ) Figure 46 shows a portion of a cascade of magnetic digital amplifier elements. Figure 47 shows:

How a binary ONE is transmitted from element A to element B; how B and C are decoupled; how a ZERO is transmitted from C to D; and how D and E are decoupled. All the operations shown are

being carried out simultaneously by different portions of the circuit. * We now wish to show specifically how the inter -element coupling circuit just described provides

the requirements previously enumerated.

1. It provides a voltage source drive.

As long as the power diode D remains conducting, the impedance to ground

from the branch point J equals the dynamic forward resistance of D because the impedance of the power source is kept effectively zero.

2. But at the same time it limits the current supplied to useful load current. It is a

current-limited voltage source.

During the positive half-cycle, the largest current that can flow from J through

the core output winding is the pull-up current i = V /R even though the winding

impedance drops to zero. Ni is the load current which must be accepted by the

transmitting element in order to communicate with N receiving elements.

During the negative half -cycle D continually conducts, but D prevents the flow of

negative current from J to the left-hand core; and the current to the right-hand core is

limited by R . ' s

3. It provides unilateral transfer of signal from the transmitting element to the receiving

elements.

This is ensured by the fact that R is much larger than the impedance to ground from

J.

4. It provides decoupling between the elements when they are not intended to communicate.

During the decoupling half-cycle diode D remains open at all times. See Fig. 47(b)

and (d) which shows the voltages v.. and v T at the cathode and anode of D during this time.

* Oscillograms of the waveforms shown in Figure 47 can be found in reference (4), Figure 12.

52
H- Hh

fc k

(M (M

C.o>

>°

1

II II >~ CM >

M

CM

a

53
*"

DECOUPLING D->E

PHASE 2 > L_ - o— ID

-1

A Ul

0- t CO

13 i < O < I

Q. > N^

toOwN

-Oe

n) WW§cm

T3

(3:

rtCoavovH

0)

•4-> 60C• H

Tl- 3U?D

00O3

60 >

_>4
5. It decouples the receiving elements from each other.

This can be seen from Fig. 48 which shows three elements simultaneouslyreceiving a signal from a single transmitting element. From the disposition of the

diodes D it is apparent that neither positive nor negative current can flow from the

point J of any receiving element to the point J of any other.

6. It is expandable to form multi-input-, multi-level logical coupling of the binary signal

to each element.

Fig. 49 shows that, with the simple addition of diodes D in parallel, a logic

AND-gate is formed. Here it should be pointed out that i must be large enough to

reset all the transmitting cores and the receiving core during the coupling half-cycle;

and also that if any of the input cores transmits a ZERO, the power to reset the remaining input cores must be supplied individually through their input windings.

This somewhat undesirable result is rectified, however, by the seventh requirement.

Fig. 50 shows how a second level of logic, the OR-gate, is formed simply by the addition

of diodes D,. Here it should be noticed that the current entering J from the gating

structure may be zero, i or 2 i depending upon the disposition of the signals at the ANDgate inputs. In the first case v

T = 0; for the other cases, even with many AND-gates,

v.= v sin 2ir t/T, neglecting the small forward drop across D . Thus, due to the buffering

action of D , which absorbs the .excess pull-up current, the signal into the receiving

element is made insensitive to the logically irrelevant ways in which signals can arrive

at the AND-gates.

7. It provides an effective means for driving the fan-out lead capacitance.

It is apparent from the foregoing that the inter -element coupling circuit is simply

an AND-gate having the a-c power source, or "clock", as it is called, for one of its inputs.

Fig. 51 shows how this AND-gate, drawn in heavy lines, is inserted between the core

output and the logic load (close to the core and ahead of the lead fan-out) to provide, not

only the current to reset the transmitting core, but also all the current required to

charge the sometimes considerable total lead capacitance to ground. This gate is called

the output AND-gate . It is necessary because the core has a high output impedance during

the transmission of ONEs, and is therefore incapable of developing an acceptable signal

across the lead capacitance. The current in R is made large enough to charge the

strays at a rate at least as great as the maximum positive rate of change of the binary

ONE signal. The strays are rapidly discharged through D during the negative halfcycle. The necessity for the output AND-gate is treated more fully in the section on

factors affecting logical gain.

55
Do

44

°0

D 4+

+ vr

-Aaaa/v

+vr

Figure 48. Signal branching from one core to three others

56
+vr

DO

7-H*

^H*

Do ^-*

Figure 49. The inter-element coupling network as an AND-gate

57
VvW

Figure 50. The inter-element AND-OR network

58
~rt-G>4

*w^

-°-+

H3H

oa

a

60

ia

3

o

(U

fi

o

-t-> V

(3

00o

oo

59
During the coupling half-cycle the signal input to the resistor-core computer element is simply

TT/2 fT/2

/ vj (t) dt , and the output of the preceding core is / vk^ ^t- Even *or tne case in which

"o o n

2 R — =;— v > v , we have seen that v T (t) = v..(t) throughout the coupling half-cycle. Therefore

a, R +R o o J ' K ° r o j 1 s c r T/2 fT/2

Vj (t) dt = / vK

(t) dt o o

during this half-cycle; or, in other words, the signal parameter transfer-function of the interelement coupling circuit is y = i'(x) = x. Therefore the signal propagation function for a cascade

or a ring of resistor-core computer elements coupled by this circuit as shown in Fig. 46, depends

solely on the transfer function of the elements themselves. This is also true for sequences in which

the elements are connected by the logical networks developed from the basic coupling circuit. From

this we may conclude that a working computer circuit has not yet been achieved, because, owing to

the restriction (36) imposed by the coupling circuit, the resistor-core transfer characteristic cannot

cross the unity gain line. The propagation function is ZERO-stable only, and ONES will not be

preserved.

6. AN ATTEMPT TO ACHIEVE A SATISFACTORY ELEMENT TRANSFER-FUNCTION

Two ways out of this difficulty were tried. The first of these, which was only moderately

successful, was to effect a slight improvement in the resistor-core transfer-function by increasing

n7/n.. in violation of restriction (36). The second way, which proved very successful, but at the

cost of an additional active component, made use of the fact that element groups that have

satisfactory transfer functions can sometimes be formed from elements whose transfer -functions

individually are inadequate for binary signal propagation.

(4) The results of the first attempt have been reported elsewhere. A three-bit ring was

constructed of magnetic digital amplifiers resembling those in Figure 46, but with the addition of a

small (approx. lv. ) low-impedance positive d-c supply +B, to which the lower terminal of each

output winding was connected. See Fig. 52.

Instead of restriction (36) we have for this case, in order to prevent D from conducting during

the negative half- cycle,

v + B,

< -4: ~ (52)

since + B, must be overcome before D can be forward-biased. Now, in general, the maximum

slope of the resistor-core transfer function is

dy

dx" T/4

(53)

60
+ Vr

Figure 52. The use of a small series voltage source in an attempt

to improve the magnetic element transfer-function

and this is equal to unity when restriction (36) is imposed. However, in the present case we impose

(52) instead, with the result that the largest value for dy/dx is

dy

3x"

v + B,

o 1 B

T/4

1 + > 1. (54)

In the experimental ring of amplifiers B,/v could not much exceed 0. 1, but results showed that v

for this value could be as large as 1. 2. This can be accounted for by the fact that

approximately a volt of forward bias can be applied to D before appreciable current flows in it. Because of their marginal volt-second transfer-characteristic these amplifiers could not

tolerate much loading. Little increase in signal gain (transfer -function slope g) can be obtained by

the use of +B , because it adds to v^ during the coupling half-cycle also, and reduces ZERO 1 K. stability. This difficulty might be overcome by replacing +B . with a positive voltage half sine-wave

occurring only during the decoupling half-cycle; but a low impedance source of this nature is

difficult to realize.

7. THE ADDITION OF THE PEAK-SATURATING EMITTER -FOLLOWER PRODUCES A

SATISFACTORY ELEMENT-GROUP TRANSFER-FUNCTION

We now turn to the second attempt to get a satisfactory signal propagation function. The solution

occurred experimentally as the result of an attempt to get increased power gain through the

inclusion of a transistor emitter-follower in the magnetic digital amplifier circuit already

described. Inaddition to the possibility whichit offers of improving the signal propagation function,

61
the emitter follower,

1. Provides power gain as current gain only, with a voltage gain near unity. This property

makes it directly compatible with the resistor-core element which also amplifies solely

through current gain.

2. Reduces the current required in the extensive inter-element diode logic network by

providing current gain at a low input current level.

3. Reduces the proportion of a-c power to d-c power consumed by the circuit, d-c power is

easier to generate and distribute.

4. Permits the design of a simple, economical negating amplifier having a delay of only

1/2 cycle.

5. Serves as a unilateral buffer to provide further isolation between the magnetic elements.

It does this through its impedance transforming action whereby a high impedance is

presented to the signal from the previous core and a low impedance is presented to the

following core-resistor element. The emitter-follower is effectively unilateral when

working, as it does in the Transmag circuit, between a signal source of low impedance

relative to its own input impedance, and a load impedance which high relative to its own output impedance. (See the section on gain. ) All these advantages are purchased at the small price of one transistor and one (emitter-)

resistor plus two additional d-c supply taps. * The price looks even smaller when it is realized that,

with the relatively low source impedance and high load impedance presented to it, the emitter

follower has the following properties:

1. It is uncritical of transistor parameters ((3, f , )

2. It has a wide frequency range relative to f ,

3. It is free from thermal drift.

Referring to Fig. 51 the emitter -follower was inserted into the circuit at the point J, just

ahead of R . Figure 53 shows the resulting Transmag digital amplifier as it would be used in a

simple cascade or ring, without inter-element logic. Notice that the input AND-gate (R ,, D,) has

been omitted, but that the OR-gate D? (here degenerate) has been retained. The latter was found

essential to the stable propagation of binary signals. D? permits the emitter follower to be operated

in a manner such that it will produce satisfactory element-group transfer-functions when grouped

with the resistor-core element. Here it should be pointed out that, when operated conventionally, the

emitter-follower has a volt-second transfer function which is simply y = x. Therefore, in this mode

of operation, it would be of no help in securing a satisfactory group transfer function.

In the mode of operation that proved successful, the transistor was driven into saturation

momentarily at the peak of the ONE signal. The resulting base charge storage gave rise to signal

And one more diode, in the case of the negating amplifier.

62
stretching, and this compensated for the signal curtailment caused by the core. Figure 54 shows

the voltage -selective pulse-time stretching of the OR-diode driven emitter-follower in an experimental setup using a variable -amplitude input pulse from the low-impedance -generator G. A

single -input AND-gate with an adjustable pull-up resistor R was used to provide a controlled limit

to the current that could be delivered to the transistor base by the pulse. Short input pulses of

-v.

Figure 53. The transistor-magnetic core digital amplifier (Transmag)

fixed duration (between 0. 1 and 0. 2 |isec) but having the different amplitudes shown by 1, 2, 3 and 4,

resulted in the outputs 1, 2, 3 and 4 shown. Longer input pulses resulted in roughly proportionately

longer storage times. The pulse stretching factor depended upon the type of transistor used; and

increased with the magnitude of the current in the AND-gate, and with the magnitude of R . High

performance transistors (high P and f , ) gave the greatest stretching factors. Values ranging from

3 to 10 were observed.

The amount by which a pulse was stretched was proportional to the voltage -time area of that

portion of the input pulse that exceeded the collector potential. With the collector held at 10 volts

the ratio between the input area increment, above 10 volts, and the output area increment could be

as high as 50. This is shown in Fig. 55, in which the ratio of the shaded area to the dark area is

50:1. A plot of the voltage-time area of the output of the emitter follower as a function of that of a

0. 2 |xsec input pulse, whose height is varied, is shown in Fig. 56. Observe that the vertical scale

is ten times that of the horizontal scale. The plot shows a volt-second gain of unity until the input

pulse height reaches the collector voltage (lOv). The slope of the curve from 2 volt-usec to 2. 4 voltusec is 50. Above this it drops rapidly to zero corresponding to a maximum possible base charge

storage for the particular value of pull-up current used.

63
+ Vr

I

PULSE GENERATOR

H I

-o Vvg

i—

4

, =-_3

2

I

t

I .. — ,.,-.,,. _ . , , , , .. ._

H

Figure 54. The pulse stretching property of the OR-diode

coupled-, peak- saturating emitter follower

64
VOLTS

2.0 usee

Figure 55. Large ratio of pulse output area-increment (shaded) to pulse input area-increment (dark) above collector -voltage V

2.0

Figure 56. Voltage -time -area of the emitter-follower output pulse versus

the area of a 0. 2 usee input pulse of variable height. V = 10

65
The explanation of this voltage-amplitude-selective pulse stretching is that, for base potentials

below that of the collector, few if any minority carriers are stored in the base, and the transistor

behaves in the normal manner. But the moment the base potential exceeds that of the collector the

base-collector junction is forward-biased and the base soon draws the full pull-up current in R . The

transistor is said to be saturated. During saturation the base accumulates charge carriers, which

remain trapped in it when the input pulse returns to zero, opening D_. The transistor then continues

to conduct until these carriers have been dissipated.

The signal stretching of the circuit in Fig. 53 is accomplished in similar fashion. In the latter

case the input signal is either a large or a small portion of the clock half- sine wave, depending upon

whether a ONE or a ZERO is received. The collector supply voltage V is made somewhat less than

+ v . As a result, signals that terminate before the sine wave has reached the value v = V are

o

° c transmitted nearly unchanged by the emitter follower. But signals that permit the base potential

to exceed V , even momentarily, are stretched in time. In this circuit these signals are transmitted

by the emitter-follower as a full half sine wave, the trailing edge being shaped by the clock through

the input power-diode D .. Fig. 57 shows the selective reshaping produced by the clocked

saturating diode-driven emitter follower. The trailing edge of the ONE, if "unclocked", is shown

by the dashed line. We now wish to derive the volt-second transfer function for the clocked saturating diode-driven

emitter -follower. Referring to Fig. 58 in which the partial sine-wave shown by the solid line

represents a typical ONE signal voltage at the input to the OR-diode, it is seen that for o < t < t

the emitter -follower transfer -function is simply y = x because the base potential in this range is less

than V . Then, to find y = f(x) for t > t , where

c

' ' o

2lrt

o* V

c T

- = arc sin -^-°- , (55) o we observe that during the early part of this interval, when (t - t )/T is small, the base potential

exceeds V , and carrier storage proportional to the black area A? x takes place. To calculate the

effect of this storage on the transfer-function x(t) is expanded in a power series in t - t , by means

of the Taylor expansion,

x (t) = x (t ) + x (t )(t - t ) + -4i- x (t )(t - t ) 2 + -J- x' (t )(t - t ) 3 + etc. o o o 2: o o 3! o o

t , t , ,

t = x

q

+ v

q

(t - t Q

) sin 2,7 —- + v

q (^(t - t Q r cos 2* -f - 2/3 v

q

( -£.) (t - tj* sin Zir-^- + etc.

(56)

t where v (t - t ) sin 2tt =- = A.x in Figure 58, and where the sum of the remaining terms equals

A? x. Dividing by v T/tt, the area of the half sine wave, we have

66
INPUT \A

Mr -"

OUTPUT

VL

ZERO ONE

Figure 57. Selective signal reshaping produced by the clocked

saturating diode-driven emitter -follower

TIME

to t

Figure 58. Diagram used in deriving the volt-second transfer function

of the diode-driven, saturating emitter -follower

67
x v (sin 2ir t /T)(t - t ) v (sin 2tt t /T) 2

(t - t ) 2 cos 2tt t /T

x _ o o' o' _ o' o o' ' ' o' . o' v T/'ir " v T/.ir v T/tt ) _, / .2 . 2 ,

, o ' o ' o ' (v_T/ir) sin 2tt t /T

v

3

(sin 2ir t /T) 3

(t - t ) 3 -2/3 -°- ^—J 2_

(vT/T) J sin 2tt t /T

+ etc. (57)

Or, in terms of A, x, and dropping all terms after the fourth,

V v T/tt v T/ir

+ v T/ir+

. 2, ,. o ' o ' o ' sin 2ir t A

3-,

cos 2u to /T - 2/3 ^^ (58)

For simplicity, if we measure the signal parameters in units of v T/tt and denote these

numbers by X and Y to indicate that fact, then

X = -T7T (59a)

Y = -T7T • (59b)

and

X = X + A.X +

o 1 2ir t /T

o' L

(A

x X) cos 2tt t /T - 2/3 (AjX)' = X + A,X + A,X

o 1 2

(60)

If we now identify A? x, and therefore A? X, with the dark area of Fig. 55, then the constant of

proportionality G, which gives the ratio of the shaded area to the dark area in Fig. 55, multiplied

by A? X, gives the increase in the emitter-follower output voltage-time integral

f T/Z f lU

I v^ „ (t) dt over its input voltage -time integral / _2 v (t) dt o n l

received from the previous core. Thus

Y = X +A.X+GA,X=X +A.X + =

o 1 2 o 1 .2

sin 2tt t /T

o' (A^) 2 cos 2tt t /T - 2/3 (A^) 3 (61)

Then starting at the point X = X , Y = X , we may plot AY = Y - X as a function of AX =X-X = A, X + A,X. This is simplified by the fact that for small A,X and for t near T/4,

o 1 2 f i 1 o

'

the region of interest, A? X is small compared with A,X.

Therefore we may instead plot

68
AY = A,X +

1 sin

2

2tt t /T

(A^) 2 cos 2tr t /T - 2/3 (AjX) 3

— AX +

sin 2u t /T

(AX)

2 cos 2tt t /T - 2/3 (AX) 3 (62)

and add it to the portion Y = X for < X < X to get graph which represents

Y =

X, for —

< X < X — o X + sin 2ir t /T

o'

(X - X ) 2 cos 2ir t /T - 2/3 (X - X ) 3

x o' o' 'v o' (63a)

for positive small X - X .

This graph is shown by curve 2 in Fig. 59 for G = 50, and for

V— = sin 2tt t /T

v o' o

90.

Because of the reshaping provided through D ., Y cannot exceed unity, (y cannot exceed v T/ir). Therefore the true transfer functions, as shown by the solid curves, include the line Y = 1. Acceptable values of G will produce curves of sufficient slope that Y = 1 for small X - X . Therefore

equation (63a), with the restriction Y < 1, is a good approximation to the transfer -function of the

clocked saturating diode-driven emitter-follower. It may be written alternatively as, X, for < X < X — — o Y = X + V- /v

c' o

< 1, (63b)

(X - X/ 2/3 (x - xor

where X 1/2 (64)

Curve 1 in Figure 59 is the transfer -function of the resistor -core element actually used in

the experimental Transmag circuit. It is seen that neither curve 1 nor curve 2 crosses the

unity gain line in the required three points O, R and S. Therefore we wish to know whether

their group transfer functions satisfy this requirement. Calling the resistor -core transfer

function f (X) and the emitter follower transfer function f (X) we can obtain fj^(X), i^O^-)* r^,

s 17* r 21* ant^ s 21 ^ superimposing the graphs of fi(X) and f-,(X) as was done for the vacuum

tube flip-flop. See Figure 21. In Figure 60 the dashed curves show two possible functions f, (X), corresponding to two different values of core turns ratio n? /n,, superimposed in the manner of Figure 21 upon four solid curves representing possible emitter -follower functions f?(X) resulting

from different values of Vc /v and G. Two group transfer-functions, fj^-^) and f2^(X), can be

69
Figure 59. Volt-second transfer-function of the resistor-core element (curve 1) and of the peak- saturating emitter-follower (curve 2)

70
plotted for each intersecting pair of curves using values easily obtained graphically from the v T

figure. The coordinates of the points of second intersection of f,(X) and f?(X) give r.,/

and r, , / directly, the former being the ordinate and the latter being the abscissa.

Vq T v

Q

T

Similarly, s , ? / and s

? ,/ are given by the coordinates of the points of third intersection

of these functions, shown by the small circles.

For example, if VCO/v = 0.90 and G = 25; and if n,/n. = 2, R = 750 ohms, R = 470 ohms,

Li L C 5 and m = 0. 36, then

r„ = 0.67 (v T/ir) 12 x o '

r 21

= 0.42 "

s 12 =1.00 "

s 21

= 0.60 "

Vc /V = .90/Vc /V0S .90,>---V C / V0--.95

6=50 ; G=25 / 6 = 50

x

l

1 o •- OR Y

2 / > G-25

1* \J / ^ i^-

I 1 / J

.9 y / /

.8 /

// / n i .7

l/j

// /

/ i /

.6

/

•/

/

/ 1 /

.5 /

1 1/ n 2

"1

= 2 / j

/r SOLID CURVES: Y2

= f2(X2

) .4 / / lj / / II DASHED CURVES: Y, = f, (X, ) / /

.3 / /

.2 //

'/

'/

. | 4

1 1

i I I

X

2 OR Y,

1 1 1 I I .6 .7 .8 .9 1.0

Figure 60. Superposition of magnetic -element and transistor -element transfer -functions

to obtain values of r and s for the element-group transfer functions

71
This case is typical of the Transmag circuit that was experimentally arrived at. Its steady-state

total propagation function <j> (X) is shown in Figure 61 and its element-group transfer functions

f, ? (X) and f? .(X) are shown in Figure 62.

v T

y/

z>

.6

-.5

y = F^(x) -.4

1 f -.3

-.2

i i i '

-.1

1 III + x/ ^

1 1 1 .5 .4 .2 .5

Figure 61. a. The steady-state propagation function for the transistor-core element-group, and

b. For the core-transistor element-group

.7

72
vn T

.1 .2 .3 .4 .5

Figure 62. Transistor-core transfer-function f

? .(x), and core-transistor

transfer -function f.

? (x) constructed graphically from Figure 60

We know that stable binary signal propagation results for this case because the group transfer

functions intersect the unity gain line at O, R and S. In the case of the curves corresponding to V./v =0. 95, G = 25 and n? /n. = 2, f,(X) and f

? (X) intersect only at the origin, therefore the

resulting group transfer functions fail to intersect the unity-gain line anywhere except at O, and

stable binary signal propagation is impossible. However, with the same emitter-follower transferfunction (which is poor in this case) stable signal propagation can be restored by increasing the core

turns-ratio to 2. 5, as is shown in Figure 60. n

? /n. = 2. 5 is the largest turns-ratio permitted by

restriction (36) for the particular r values of R , R , and m used.

s c For maximum stability against extraneous noise s._ and s^. should be as large as possible, and

r._/s. 7 and r-./s-. should equal l/2. In terms of Figure 60, this means that the points of third

intersection (the small circles) should come as close to X = 1, Y = 1 as possible, and that the points v T v T

of second intersection (black dots) should come close to X = 1/2 (s,./ ), Y = 1/2 (s,,/ ). It C 1 "IT Ifa IT

is seen that these conditions are pretty * well fulfilled for the cases V /v =0. 90: 25 < G < 50; ' c' o — —

n? /n. = 2, which approximate the experimentally achieved parameters. Some improvement could

have been made by increasing the turns -ratio to 2. 5.

73
Stability against changes in f,(X) and f ? (X) is best when these curves intersect each other at the

largest possible angle when superimposed. This minimizes the dislocation of the intersection points

with changes in the transfer -functions. Thus the ideal form for f .(X) and f?(X) from the point of view

of stability to changes in f,(X) and f? (X), and'for maximum noise thresholds, is the unit-step at X = 1/2. This is also the ideal form for binary signal propagation. However, a transfer -function

approximating this shape is so difficult to achieve in practice that it is useful to know that functions

that depart widely- from it, such as those in Figure 59, can provide good signal propagation.

8. THE EXCLUSION OF MARGINAL SIGNALS

The chief difficulty with non-ideal element transfer functions lies in the low value of signal gain

g, which the group transfer -functions may have. In Section 2. 2 it was shown that, if the propagation

m function figure of merit g is not large, then, in the presence of noise, the clearly-defined steadystate propagation function F (x), having the full thresholds r and -^s-r), is replaced by the random

collection of propagation functions shown in Figure 14, which represents y = f f ( £ ) + x for

equally likely values of between and s. For equally probable values of r between and s noise

thresholds of any magnitude from zero up to, but not including, r and s-r are equally likely; and the

probability that a threshold will differ from r and -(s-r) increases as g decreases. This arises

from the fact that f ( C ) has the form shown in Figure 12a for f (x), from which it is seen that, for

equally likely V , the ratio of the number of signals that can result in values of f ( F ) that are

different from or s, to the totality of signals lying between and s is l/g . Furthermore, it is

evident that all values of 1 ( F ) resulting from these signals are equally likely.

However, if we change the amplitude distribution of signals only so as to exclude those having

values within the range r - y < F <r + cr,in Figure 63, then f ( F ) may have values only outside

the range r-yg < f (r)<r+ag , and the probability that 1: ( F ) will have a value different

from or s becomes

-4— - (y + a) m v ' ' — 7—1 v (65)

s - (y + a) v

'

which can even be made zero if v + CT > . ' — m

g This shows that even though g may not be large, it is possible to achieve the ideal steady state

propagation function F (x) for a system of non-ideal computer elements by the proper choice of y and

<y in other words by the exclusion of a sufficient range of signal amplitudes in the neighborhood of r.

But even if a smaller range y + is chosen, signals within this range are forbidden, so that the

thresholds in y = f t( F ) + x can never be zero. Thus this function might appear as in

Figure 64 rather than as in Figure 14. The probability density within the uncertain regions in

Figure 64 is given by (65).

74
y

s

y=f

m

(e)

~) 1

g mcr .1 R

T g my

1

S

-» y *- <T ->

S

g m

Figure 63. Ranges y , o" of signal amplitudes to be

excluded from the computer network

Figure 64. Y = f°°

[ fm ( f ) + X J whengm y and gma

do not include all imperfect signals

75
XT1 A The above reasoning has been based on an assumed ideal form for f ( r ) such as is shown

for f (x) in Fig. 12a. This assumption is reasonable, even for a poorly shaped f ( F ), if m > 3.

8. 1 The Synchronizer

In practice the task of prohibiting signals in the unwanted range r-y<^ <r+ais given

to the input buffer or synchronizer. The basic problem in the design of this device centers around

the fact that no value of £ may be excluded, and therefore g must be extremely large to guarantee

that a propagation function other than F (x) will be sufficiently improbable. In the synchronizer

a signal, which may have any amplitude C , is introduced into a storage and regeneration device

coincident with a fully synchronized timing signal. Subsequent to this event the signal is allowed to

propagate undisturbed in the regeneration device, which is a ring of element groups, until a second

timing signal releases it to the computer. The probability that this signal will have a magnitude

different from zero or s upon its release is l/g where g is the signal gain (slope of the transfer

function at R) of each element-group in the ring, and m is the number of transmissions the signal

has experienced in the ring before being released to the computer. See Appendix V.

8. 2 The Maximum Acceptable Signal Input Frequency f.

If a maximum value of l/g111 is decided upon, then g and the element-group delay time t ,*

determine the maximum rate at which unsynchronized signals may be accepted. The shortest

permissible time between incoming signals obviously cannot be less than the storage time mt, in the

regeneration ring, and is in fact 2 mt, in a conventional synchronizer. The maximum acceptable

signal input frequency is therefore

A 1 f. = -T-4- (66)

i 2mt,d

Then letting p be the maximum acceptable synchronizer failure probability, we set

P = l/gTM (67a)

from which

m = - log p/log g, (67b)

and the maximum signal input frequency is then

A 1 i " 2(-log p/log g)td

lo? g (68a)

-2td

log p

In an n-phase system t , = T/n, where T is the element-group cycle time; therefore in terms of the cycle time,

t , is the time between the reception of the signal by an element-group and its reception by

trie next group in the sequence. Thus it includes the time spent by the signal in delay lines inserted between the groups in some circuits.

76
A _ n log g

f

i " -2T log p

(68b)

or A n f c log g (6gc)

i - 2 log p where f is the system "clock" frequency.

A

In the case of the experimental Transmag circuit n = 2, g K 3, and f = 300 kc. f. for this system is therefore

f" = 2 x 3 x 10

5 x (.47)

i -2 log p

= 1.4 x 10

5 cps/-log p (69)

- 10 *• Then if we choose rp = 10 , f. becomes 14 kc.

i To achieve the error probability of 10 , equation (67b) shows that 20 transmissions of the signal

A

by the element groups in the regeneration ring are needed. The product pf. gives the probable

maximum synchronizer error-rate to be one error every eight (24 hr.) days.

In the small computer built to test the performance of the Transmag circuit the synchronizer

_4 was timed to give m = 8. Therefore, for this synchronizer, p = 10 , by equation (67a) or (67b)

with g ^ 3. When unsynchronized start pulses were fed to the synchronizer at a rate of 10 kc,

the computer made 80 errors during an 80-second interval, and 80 errors during another interval -4 4

of 85 seconds. This compares well with the theoretical error-rate pf. = (10 ) (10 cps) = 1 error

per second. That these errors originated in the synchronization process was demonstrated by the

fact that when the computer was self-triggered at a rate of approximately 30 kc, no errors occurred

during a 3-hour interval of observation.

9. THE TRANSMAG NEGATING AMPLIFIER

In the Transmag circuit, the logical operations AND and OR are performed conventionally by

diode switching ahead of the emitter-follower. The NOT function is achieved by an almost trivial

modification of the core input circuit. The Transmag NOT amplifier is shown in Figure 65 (Compare

it with Figure 53). In this amplifier the "clock" is connected to one terminal of the core input

winding so as to set the core in the ONE state during each receive-interval. The other terminal

of the input winding is connected through R to the emitter. A diode clamp D holds the emitter at ground when ZEROs are present at the emitter follower input because R has been made low enough

to provide a clamping current which exceeds the largest value of current drawn by the core during

the receive-interval. The core then, being continually set by the "clock", transmits ONEs. But,

upon the arrival of a ONE at its input, the emitter -follower generates sufficient current to open the

diode clamp, and the resulting emitter signal opposes the "clock" voltage, leaving the core in the ZERO state. The core then transmits a ZERO.

77
In case both the negation and the assertion of the same signal are desired, a NOT -amplifier and

an assertive amplifier can be connected in parallel as is shown in Figure 66. Or, a saving in components and a reduced collector dissipation results from the connection shown in Figure 67.*

A

+vc

>Hr

>$

\

'Pi

> I

vww

Re

-i- T ve

Figure 65. The negating amplifier

To get the volt-second transfer-function of the NOT-amplifier we first observe that the transferfunction of the saturating emitter-follower remains unchanged. It is therefore only necessary to get

the transfer-function of the negating resistor-core element. In Figure 68 the negative waveform

shown by the heavy line represents the signal voltage at the emitter during the receive-interval. The

polarities of the voltages shown indicate the polarity of the flux change they tend to produce in the

core, and are not the polarities with respect to ground. The voltage-time-area x of the emitter wave is the input signal to the negating resistor-core element. The full positive half-sine wave

shown is the clock voltage which is applied to the un-dotted input terminal of the core. The positive

waveform shown by the upper heavy line in Figure 68 represents the voltage applied to the resistorcore element during the receive-interval. It is the difference between the clock wave and the

emitter wave, v is the voltage applied to the core input winding during the receive-interval, and

the resultant volt-second output of the negating core during the ensuing transmit interval is given by

rT/2

v dt = a, = yr (70)

See Appendix VIII.

78
>l

+ vr

D 2 vww

Rel

ASSERTION

-vVc

'pi ?

vww NEGATION

Re2

-v,

Figure 66. Separate assertive-, and negating amplifiers driven in parallel

79
* +vc H

'pi '^1

AWVW ASSERTION

Dc

WWW

NEGATION

Figure 67. Combined assertive-, and negating amplifiers

V "

Figure 68. Explanation of the negating amplifier

80
Now in the case of the assertive core, the output y (x) is given by curve 2 in Figure 33; and

referring to Figure 68, n

2 y = — A,(x) (71)

'a. n, l

v

' ' '

Furthermore,

Therefore

and

Then, since

n. v T

A i + A

2

= irr ya <-Sr> (72)

Yn

(x) = ^ A, = ya C-4-) - ^_ A l( x) (73)

yn

(x) = ya

( ^r- > - ya< x> < 74>

*a<T-> = «21 < 75>

from Figures 60 and 62, the transfer -function of the negating resistor-core element is

yn

(x) = S 21 " ya

(x) (76)

y (x) is simply the reflection of y (x) in the line y = s

? ./2, and is shown in Figure 69 as y = f.(x).

10. THE PROPAGATION FUNCTION FOR NEGATING AMPLIFIERS ONLY

To get the element-group transfer-functions resulting from combining the saturating emitterfollower and the negating resistor-core element, we superimpose their graphs in the manner of

Figures 21 and 60.* Figure 70 shows the emitter -follower transfer -function y? = f

? (x) plotted for V /v = . 90 and G = 25, together with the reflection in the line y = -x of the negating resistor-core

transfer -function y = f. (x). The curves for y = f?. (x) = f, f

? (x) and y = £, ?

(x) = f ?f. (x) , and the values for r

?

. and r , ? are available directly from this plot, as r

?

. and r . _ were obtained in

Figure 21, and are shown in Figure 71. The values for s_ . and s.

? are seen to be equal to s?

. and

s . ? for the assertive amplifier.

We now wish to obtain the total steady- state propagation function c]> (x) for a signal

travelling in rings or cascades of saturating emitter-follower elements and negating resistor-core

elements in alternating sequence. (j> (x) will consist of two propagation functions F,

? (x) and

E. . (x) arising from the association of the elements into two possible minimum element-groups having

the group transfer -functions f 1? (x) and f ?1 (x) respectively. In accordance with equation (13) we can

write —

f (s + x)

(77)

* See, however, Appendix IX, which shows a shorter method applicable here.

81
: 7T

.7 _yn

•6

it

.5

.4

y n (x)=s

2| -y

Q

(x)

.3 S

2I

.2

. 1

1 1 i i i i i i >^ v x

.4 .6 1.0

Figure 69- Volt-second transfer-function of the negating resistor-core element

for which, because f 17 (x) has a negative slope, we must distinguish two cases: n even, and n odd. When n is even we may think of the sequence as made up of n/2 identical element groups T2T2, each

having the transfer function f-y y (x) = f f. -< f2

fi( x) \r\ But this transfer-function has a

positive slope; therefore

£-r/-r?

(x) = f,

? (x) has a positive slope also, and

resembles f (x) shown in Figure 13a. Then, for n even, F 17 (x) resembles Figure 13b.

12 v When n is odd, we may write

f , ? (x) = T.- F. ? (x) and the operations indicated on the n-odd

right, when carried out on the superimposed graphs of Figure 71, show that 1 (x) is as shown

_ n-odd

in Figure 72a. Then by (77), F 1? (x) for n odd has the form shown in Figure 72b. Thus it is seen

that F ,y (x) has two solutions, and by similar reasoning, F~,(x) also has two solutions. The graph

of the complete propagation function <j> (x) therefore includes the four square-loop graphs shown

in Figure 73. To interpret these graphs, we observe that F 1? (x) gives the limiting or steady-state response at n-even

all the even-numbered 2, 1 junctions in a sequence to a disturbance introduced at the zero-th 2, 1

junction F 1? (x) gives the response at all the odd-numbered 2, 1 junctions to a disturbance at the n-odd

zero-th 2, 1 junction. A comparison of Figure 73b with Figure 73a shows that the signals at the odd

82
y n orX

Figure 70. Evaluation of r and s for the transistor-negating core element group and for the negating core -transistor

element group by super-position of the element

transfer -functions

83
Figure 71. The transistor-negating core transfer-function f2 ,(X), and the negating

core-transistor transfe r -function 7.

? (X) constructed graphically from

Figure 70

84
(a)

12

y= F,~(X) ; n-odd

(b)

Figure 72. a. f 12 (X) derived from f 12

(X); n-odd

b. F ^°

2 (X); n-odd

85
n- even (a)

F~<X>

n-odd

(b)

- oO

F

2| (X) n-even

(c)

i I "

X — oo

F2 , (X)

n-odd

(d >

oo

(£> (X)

Figure 73. The complete steady-state propagation-function

for a sequence of negating amplifiers

86
numbered 2, 1 junctions are the complements of those at the even-numbered 2, 1 junctions. For

example, observe that a positive disturbance, say, at the zero-th junction affects a full ONE

observed at the even junctions in the same way that it affects a full ZERO observed at the odd

junctions. F ?

, (X) is similarly interpreted for the 1,2 junctions.

11. STABILITY MARGINS OF MIXED ELEMENT-GROUPS

In the unlikely event that rings and long cascades of negating element-groups are to be

associated with rings and cascades of assertive element-groups, attention must be given to the fact

that r

?

. may not be equal to r ?1 , and r . _ may not be equal to r.,. When these quantities differ,

the signal stability margins are reduced because an ambiguity of circuit response to substandard

signals is introduced.

The nature of this difficulty is illustrated for the very important practical case in which isolated

negating element-groups form links in rings and cascades of assertive groups. Figure 74 shows the

severest example of this, in which negating element-groups alternate with assertive element-groups.

In such a sequence, four kinds of identical inclusive element-groups can be formed, as shown by a, b,

c and d of Figure 74; each with a different transfer -function derived, as indicated, from the sub-group

transfer -functions f.-(X), f_,(X), f.

? (X) and f ? .(X), whose graphs are shown in Figure 62 and

Figure 71.

Recalling Figure 73, we see that the total steady-state propagation function 4> (X) includes,

in the present case:

l

> F°°2T,21<P and F°°2T,21< X> n-even n-odd

2

> F°°21,2^X> and F°°21

( 2T< X> n-even n-odd

3

> f0°T2,12<X> and F°°T2,12«

n-even n-odd

4> F°°12,T2< X> and F°°12,T2 (X> n-even n-odd

In these four pairs of steady-state propagation functions are included two values of s, s.

? and

s ?

.; and, in general, 4 values of r: r -y 2

,, r -p ry - 2 and r -=- . Figure 75 shows 4> (X)

in terms of eight square-loop graphs. The values of r and s in these graphs were obtained, as shown in Figure 76, in the manner of Figure 21. The negating transfer-functions have been

reflected in the line y = x in Figure 76.

87
JUNCTION

1

JUNCTION

1 J

21 2T 21 2T

12 12

f,r 01 »x)=f„[TV (x)"| 21,21 21 1 21 J

(a)

2~ 21 2T 21 72 12

f -IX) =f ff (X)1

21,21 2l[2l J

(b)

12 T2 12 12 21 27

fi2,.2

lX) = f .2[?

.2 tX)]

(C)

?2 » 12 ?2 12

21 21

f l2f2 lx) - f

« 2 [

f .2 (X1]

(d)

Figure 74. The four kinds of element-group groups that can be formed in an alternating

sequence of assertive element-groups and negating element-groups

88
1.0 n -even

1.0

S 2 ,=.6

21 ,21

S 2I =.6

• 6 'S.* «*

n-odd

T

S, 2 .I.O i.

F^° (X) 12,12

*' T

S l2 -I.O

1.0 F S,T2 '*' v o T ONE UNIT = ~fr- VOLT'SECS.

-^°°(X)-

Figure 75. The complete steady- state propagation function for alternating assertive and negating element-groups

89
yorX

V 1/7T r i2,l2"

r 21 ,21

S 2 I *l

Figure 76. Determination of the four values of r and the two values of s associated

with the alternating sequence of assertive and negating element-groups

90
(a)

.5--

.1 --

FCO ( X) 21,27

(T2- JUNCTIONS)

IX) 21,21

(12- JUNCTIONS)

.3 .4 .5

.6 y

.5 -

.4-

(b) r

i ,

.2-

1

1

.1-

1 i i i

, , , *

5 .6 V„T

ONE UNIT= £—VOLT-SECS.

Figure 77. a. Non-coincidence of F ,, ?T^ X^ anc* ^ 2T 21^ Produces

regions (shaded) of ambiguous response to signals that can

enter the sequence of Figure 74 at 1, 2 junctions or at 1, 2

junctions

b. Resultant effective propagation function for signals that

can enter at 1, 2 junctions or at 1, 2 junctions

91
In Figure 77a the n-even graphs of F _-r ?1 (X) and F ?

. ? r(X) are shown superimposed. These

are the steady-state functions for the inclusive element-groups that lie between the 12-junctions, and

between the T2-junctions respectively. If a ring of the kind being considered here is embedded in a

logic net, the signals and disturbances from the net may enter the ring equally well at the 12-junctions,

and at the 12-junctions. Figure 77a shows that a disturbance whose value lies within the shaded

ranges grows to full signal magnitude S21 if it enters the ring. at 12-junctions; or.it diminishes to zero magnitude if it enters at 12-junctions. Because the shaded ranges of ambiguity must be excluded,

practical stability margins for disturbances introduced into the ring at 12-junctions, or at

12-junctions are shown in the composite graph of Figure 77b to be the least thresholds of F 7

-r ?1 (X)

and F ,i ,t-(X). To maximize the practical stability margins by eliminating response ambiguity,

the functions f

? ,(X) and T~ ,(X) should cross the unity-gain line at the same point. This makes

r ?T ?1 ~ r

7 1 ?!~ so t*13^ tke square-loop graphs coincide. The graph intersection point then lies on

the unity-gain line in Figure 76. The foregoing discussion can be repeated, in general, for the element-groups lying between the

2, 1 junctions, and between the 2 1 -junctions. But, in the practical case of the Transmag circuit, no

logic interconnections are made at these junctions because they lie within the digital amplifiers.

Therefore, there is less need to minimize the difference between r-s-? 1? and r.

? y_.

In any case, a properly designed input buffer or synchronizer will not (except to within the

specified error probability p) introduce, into the logic net, signals that lie within the ranges of

ambiguity for 12 and T2- junctions.

In the more general case of a sequence having one negating amplifier for every n identical

assertive amplifiers, the values of s and r are the same as for the worst case just considered.

12. FACTORS AFFECTING POWER GAIN AND FAN-OUT

In this section we wish to consider the important factors affecting the maximum power

gain = current gain G and the logical fan-out N achievable by the Transmag amplifier. The

overall gain is simply the product of the gains of the individual stages.

Because the output stage handles the greatest amount of power, and, in Transmag, also '

provides most of the gain, its design, from the standpoint of maximum achievable gain is considered

first. This order is customary in the design of multistage power amplifiers.

12. 1 The Gain of the Magnetic Amplifier

The core is, in a sense, a passive amplifier since it behaves as a load-current sink, rather than

as a load-current source. Referring to Figure 51, at the beginning of the transmission of a ZERO,

the sum of the currents flowing in the output AND-gate pull-up R and in the pull-ups R . of all the

driven AND-gates, which are not otherwise held down, is suddenly switched into the output winding

of the (near) saturated core. As this takes place, a voltage is developed across the winding whose

time -integral is given by the product of its self-inductance times the total current.

92
From Section 2 we know that if this voltage-time integral exceeds r

?

., a false ONE will be

transmitted to the driven AND-gates. Therefore, if i is the largest permissible value for

the sum of these currents, and if L is the saturation inductance of the output winding, then

Li = r,,. * (78) co max 21 Now

s 21 = n2< 2 M < 79>

is the maximum ONE signal output obtainable from the core, and we can write

r 21

i L = — n, (2 <b ). (80) max co s,, 2 T r

' Then, we define the effective full- switching inductance of the core output winding to be

n2<

J 2 V

cl " * /

i ni /n

2

(81)

where i is the peak value of the total current drawn by the input winding of the core, and is

given by

A A A

i = —i + i'_ = i + (i_ + i, . ), (82) — bias

A

in which i is the peak value of the core excess current i. i satisfies the Manyuk-Goodenough

switching equation

n

li- n

l -±- =^p± (i - i')T = (H - H') t = S , (21c)

1 1

v o' v o w '

where i

1 and H are the core switching thresholds, including external bias. We now define the core maximum current gain G by

Gc

= ^^ (83)

i

and get, from equations (80) and (81), A r 21

r21 A / L G i = n, (2 <t> ) = L , i n./n,

co c s

?

, 2

v r' s ?1 cl 1' 2

or

r,, n, L . G = -iL _2 _£l (84)

c s 21 n

2 Lco Now if we assume the output winding to be a complete toroid, its inductance can be written as

2 n u A

L

c = -f-j (85)

Here we are neglecting the forward drop across D , and are assuming that B /B = 1.

93
where A is the winding cross—section, 1 is the mean magnetic path length, and u is the average

permeability of the volume within the winding.

In magnetic amplifiers constructed for high switching rates, a large fraction of this volume is

unfilled by the magnetic material. See Figure 78, in which A is the cross-section of the magnetic

material, u is its permeability, and u is the permeability of free space.

Thus,

u.r

= u A + u (A - A ) ^ u. A +uA (86) A ^m m ^o m' — rm mo

and

u A

_u_ = ^m m

% ^o

^r

^m = —MSF + 1 (87)' •o where F is called the space factor.

Then, from (85), and because n_, A and 1 do not change, (84) can be written as

r

7 i n i G = -^ l

- £-

S 21 n

2 ^o

r 21 n

l (_iii , ^m F + 1) s , n~ u. s 21 2 ro

in which k is the effective switching relative permeability of the core material.

We now wish to evaluate k . Making use of the flux equation

2 n

l A n

2 ^m Am

n i A n

! A

L . —- i = (— ,m m + L ) —- i = n, (2 4 ) + L — i, cl n?

1 co n

? 2

x r' co n

?

i we have

u A 2 <|> ^m m r

I = ~

n

l"

/\ A

Then, in the optimum case, (see Fig. 37) for which m = 0. 33 and R = R , i equals 2_i. A A ' V co Now i = i - i = -k^ —

- (90) O K

c Combining this with the following two relations:

n

2

. (2 * ) R = ^i-!-, — (24)

c S w 1

94

(89)
Figure 78. Diagram illustrating the total winding-enclosed area

A, and the magnetic material cross-section A

and

we get

A

Using this value for i in (89) gives

and

IT - = n

1 (2 4> r ),*

A

i = ,A ^w1 -1 n lT

( <t> A ) T

r' m

^m TT S B T B

r r

ir S tt S J w w c

(91)

(92)

(93)

k = -2 = V-r- • (94) m U. TT UL S f o o w c A A

where f is the "clock" frequency. This is a working definition of k under the constraint i = 2 i. A

It is applicable only at high switching rates for which i > i , where i is the switching threshold

current, and has as its lower limit the coercive current i . c At low frequencies k approaches its dc value 2 B /u. H . m r' 'o c Putting the value for k given in (94) into the gain equation (88) gives

r n B F

G =—^L_i_ ( r g

s + 1) (95)

c s_

2 1

. n_.Tru.Sf 2 'o w c

as the magnetic amplifier current gain for the optimum case shown in Figure 37. This is also the power gain, since the signal voltage amplitude remains unchanged.

Observe that (95) does not directly contain core geometry and the number of turns in the windings.

These quantities do affect the space factor F , however; and they enter directly into the core

effective input resistance R

See Appendix III.

95
R

c ^A/

S 1 w

2n, 4 1 r T S 1 w

2n2 B

1 r Am

S 1 w

2nf1 Br F As S 1

(96)

R must be kept as large as possible, for any given "clock" voltage v in order to minimize the power required to drive the core.

In the optimum case of Figure 37 the impedance presented to the emitter -follower by the core and R in series is

^F

1 r A A I

-, * [ Rs

i + Kc^-Vj

5" i RJ + a

c <i\i/*>]

3 R

c /2 (97)

and the power absorbed by the core-resistor combination is

v v /R ^ TrV- = -^ (98)

c'

To minimize this power, one would like to keep v small, yet it must be kept at least several times

greater than the forward threshold of the circuit diodes. The minimum value of v consistent with

good operation of the diodes thus becomes a more-or-less fixed design parameter of about 10 volts.

Then, at a given frequency f , with v fixed, we have, for the case of full core switching, that

v T* [v ] 2n, d> = 2n. B F A ^ 1/3 -2_ = 1/3 L°i (99)

l rr Irs 'it '-rrf

which is a fixed quantity. This leaves R to be maximized through n. and 1, since S is a constant

of the magnetic material.

* Assuming m — 0.3.

96
R

c

n

l 2n,Irs B F A

~T L Sw

= Fwl

~ 2n, B F A " Irs

Sw

Writing

(100)

where the bracketed quantity is held constant, wc see that R is proportional to F ., the winding

factor of the input winding. F , is related to the output winding factor F ? by

n

l F . = — F _ (101) wl n? w2 '

The output winding is put on the core first to keep its cross-sectional area A as small as possible.

Then the input winding is added.

The practical limitations of toroidal core winding procedures, wire size, and toroidal geometry

result in a reduction of the maximum attainable value for F , as 1 is reduced. The maximum value w2

for F ? is obtained by putting on layers of winding until the remaining toroid aperture cannot be

made smaller.

For any given 1, as n, is increased, n? increases, (keeping n? /n. constant jand, beyond one

layer of winding, A increases. As a result F inevitably decreases. The increase in n, raises R , provided the bracketed quantity is not reduced, but the price is now paid as a loss in core gain G ,

proportional to the reduction of F , as is shown by equation (95).

In designing the magnetic amplifier, both equations (95) and (100) must be used to arrive at the

desired compromise between power expended and gain capability achieved.

Combining equations (96) and (99) we can write

['J R f = J" g F , (102)

c c 3tt S wl w

which, subject to the restriction I indicated by brackets) that v remain fixed, expresses a

(power) - frequency figure of merit for the magnetic amplifier in the form of the resistancefrequency product as a function of F , and S . Then observing that for G in (95) to be greater than 4, with r.,, n./s,, n, < 1/4, it is necessary for B F /ir u S f to exceed 16, we may conveniently drop the unit quantity from the

parenthesis and write:

G f

: c c

r 21 n

l n

2

B F r s 21 TT u. S 'o w

r 21 n

l n

2

B Ar m

r 21

s 21

n

l n

2

*r

S 21 TT U. S A "o w

tr u S A o w

97
Combining this with (99) gives

G f2 = -^21 1— 5-^^ W ; G > 4. (103)

C C S 21 n

2 6ir2 ^o S Aw

This equation gives a unique value for the gain - (frequency) product which is independent of

frequency if 2n. § = 2n, B F A is kept inversely proportional to f , as requiredby (99). Now,

if the turns-ratio is to be preserved, n. must be kept constant since n? appears in (103a). A also

appears in (103), and B is a constant of the core material. This leaves F which must be varied

inversely with f . For a given wound core we see that (103) can hold only at the one frequency

that satisfies (99). But equation (99) applies only when the core is fully switched. If the alternative of partial

switching is to be included, the more general equation _ , v n,A<bf =n,ABFAf =

L -^i (104a)

1 T c 1 s c 3ir

replaces (99). A <J> is illustrated in Figure 28 a. Then if we define the fractional- switching variable Z by

Z -^- (105)

r

equation (104a) can be written in the form:

z, r i = -7— w s c on

or, alternatively as

Z F f = , L q-—s- (104b)

s c 6ir n, B A 1 r

oJ Z A f = t

u "1 (104c) m c oir n. B

1 r

in which the variables are shown on the left. Thus the core gain G can be found from the G f 6 c c c product, given by (103), at any frequency for which the product Z A f satisfies (104c).

We note that (104 a, b, c) holds, in principle, at any frequency above the lowest needed to

produce full switching, even for a given wound core, for which A is fixed, because Z automatically

adjusts itself, varying inversely with f . But in practice, if Z falls too low, the effective value of

S is materially increased; and this, by (103), lowers Gf . By reason of the higher power of its

frequency term, (103) tends to set the maximum practical value for f , in any case.

If we also allow B as a design variable (104c) can be written as

Z 4>„ f„ = 6

L " J

, (104d) 're b¥ n.

which is simpler and more general. The three design equations then are:

98
_L oj wl Rc

fc=3F^^ < 102 >

ho] f2 cc s-,, z £ _ a c —

j. S n_

o w 2 G„f„ = -^ . 2

*" "

J

; G„ > 4 (103)

Z <*r

fc

= ^T- (104d)

l l The design equations (102), (103) and (104d) were derived for the optimum case, illustrated in

Figure 37, for which R = R , m = 0. 33 and n^/n. < 3. We make the core turns-ratio equal to 2

so that the core-transistor element-group transfer -function for this case will approximate those

already derived for the experimental circuit. Now, generally speaking, it would be desirable to

2 maximize both the R f and the G f products; and this could be done provided S , or A, or 1 c c c c r r w

could be made as small as we please. However, S is limited by the choice of core materials available; and, for the l/8-mil. 4-79 Mo. -Permalloy tape used, it was around 0. 33 x 10 oerstedseconds. Furthermore, as has already been pointed out, the practical limitations of core winding

procedures, wire size, and toroidal geometry result in a reduction of the maximum attainable values

for F , and F , as 1 and A are reduced. But, from (102), a reduction of F , reduces the wl w2 wl

achievable R f product so that at high frequencies R falls too low to be compatible with the semiconductor components in the circuit, and excessive power is required to drive the core. On the other hand, the attainment of an arbitrarily large winding factor by using a larger core and many more turns (by means of many layers of winding) is not permissible by reason of equation

2 (103) which shows that the G f - product varies inversely with the number of output winding turns

n~ and the winding cross -section A. An excellent compromise of the conflicting goals of low power

and high gain, in the multi-hundred kilocycle-per-second range, is provided by commercially

available cores of l/32-inch wide, l/8-mil tape wrapped on stainless steel bobbins having a diameter

of 0. 150 inches. These can be supplied with windings totaling 300 turns of No. 43 wire.

In the case of a 10-wrap core carrying a single 300-turn winding, the manufacturer gives the

following data: Fs = .04

Am

2,, 5 x 10 cm

1 1. 3 cm

*T = 1. 8 maxwells

r From this we calculate that

/ „-3 2 A = 6. 2 x 10 cm ; and taking n. = 100 and n? = 200,

99
Fw j = 77 turns /cm

Then, using v = 10 volts, and S = 0. 33 x 10 oerst-sec. , the resistance-frequency product for

this magnetic amplifier is _ , lOv. 77 x 10 turns/meter

I\ I = —X 7- A 0.33 x 10 oerst-sec (10 /4tt) amp-turns-sec/meter

= 3 x 10 ohms-sec

From this we may, in principle, calculate R for this amplifier for any frequency that makes

Z <_ 1 in equation (104d). Using (104d) we calculate Z for f = 300 kc. h] 9 10 magvolts

^r 6ir n

l fc (1.8 mxwls)(6ir)(100)(3 x 10

5 cps)

= 0.98 < 1 g

e Therefore R at 300 kc is 3 x 10 /3 x 10 = 1000 ohms

c

' 2 Now to get the G f - product from (103), using r. . /s, i = 1/2,

G f 2

= 1/2x1/200—, 10 9 magvolts _ c c

6ir (1)(0. 33 x 10 oerst-sec)(6. 2 x 10° cm )

= 2 x 10 sec

Therefore the theoretical gain of this amplifier at 300 kc has the very large value of 200.

At the top of the multi-hundred kilocycle-per-second range

R = 300 ohms (at 1 mc), and

c

* ' G = 20

c From equation (98), the power required to drive the resistor-core combination is 33 milliwatts

at 300 kc; and 100 milliwatts at 1 megacycle. Then, if we assume that the power dissipated by the

collector is equal to twice** that consumed by R + R , we see that at 300 kc the transistor must

dissipate 66 milliwatts, and, at 1 megacycle, 200 milliwatts. The need for a power transistor is

indicated above 300 kc.

* Z should be kept near to the value for which S has been evaluated.

See Appendix VIII.

100
The foregoing discussion has shown that the gain capability of the 0. 150 inch core is more than

adequate for frequencies below one megacycle, and that, in the hundred-kilocycle range, the

transistor output power capability is the chief consideration. Smaller wound cores, having diameters

of 0. 100 inch and 0. 050 inch, are produced commercially, but these are less desirable in the

hundred-kilocycle range because their best winding factor is less than for the 0. 150 inch core. However, if we try to enter the megacycle range, the G f - product just calculated for the 0. 150

inch core shows that at 2 megacycles G = 5, which is about the lower limit of useful gain.

The solution is to use smaller cores with fewer turns and smaller winding cross-sections in

2 order to get larger values for the G f - product. But a heavy price is paid in terms of the

increased power output demanded of the transistor arising, both from the reduced R f product of

the smaller cores, and from the increased f within this product.

c r

12.1a How Scaling Affects the Relationship Between R , G and f

In the case of a given wound core, equations (102) and (103) give the relationship between G, R

and f (dropping the subscripts) in terms of two constants, the Rf-product, and the Gf -product,

provided that Z 4 satisfied equation (104d). We now wish to determine how core size affects the

gain-resistance -frequency relationship. Taking the mean magnetic path length 1 to be the measure

of core size, and representing the Rf-product by P_ and the Gf -product by P- we see from

equations (102) and (103) that core size can affect P_(l) and P„(l) through the winding parameters

F ,, n, and A. wl 2 We now make the physically appropriate assumption that, regardless of size, the core is always

wound to the same fraction of its window area with wire of the same size. We further assume n? /n. to be held constant. As a result of these assumptions the core scaling law is expressed by:

F , ~ 1 wl

A

F , (1) wl

n

2 (D

A(l)

ni (i )d/i ) 2

A(l )(1/1 ) 2

/ where 1 is the core scaling reference size. Under this scaling law equations (102) and (103) show that: PR

(D

PG(D Pg^o^/V"

(105)

(106a)

(107a)

101
Furthermore, letting P represent the spacefactor-frequency product F f, we have from

equation ( 104b) that Ps (l) = P

s

(l )(l/l o r

4 (108a)

The three quantities

P (109)

ft**o>

=

3tr Sw

F , (1 ) wl o

pG«y = r 21

So,

w * 2 .. e 21 6ir u S n,(l ) A(l ) •o w 2

V o' y o

(110)

Ps"o»° t.B

U

n,(l )A»)Z *

' U1> r l

v o o

are constants fixed by the windings of the reference core.* Thus the performance of a core of

reference size 1 is given by the three simultaneous equations

Rf = PR

(1Q

) (112)

Gf2

= PG

(lo

) (113)

A Ff=P(l);0<F<F<l (114)

s s

v o' s — s * ' /\ in terms of the winding6 constants P_ (1 ), P_ (1 ), P (1 ) and the design variable F . F

R o G o so' 6 s s represents the maximum space-factor that can be achieved with a given output winding. Over the

range of values permitted for F , R and G are unique functions of f.

In the case of a core of size 1 scaled from the reference core in accordance with (105), we

have from (106a), (107a) and (108a)

Rf = Pr

(1q)(1/1

o

) (106b)

Gf2

= PG(lo

) (l/l

o

) -4

(107b)

F f = P (1 ) (1/1 )" 4

(108b)

s s

x o ' o

The presence of the quantity F in the left member of (108b) implies that it is independent of 1.

This is so because F is invariant to the scaling process defined by (105). To show this we refer to

Fig. 79 in which the shaded area A shows the portion of the total cross-section of the output

winding that is taken up by wire, and is therefore not available to core material. Then, if we make

the assumption that the area available to the core material is some constant fraction of A - A , we

have

A A - A 2 F = -J2- r^ j ?L ^

_L_ = constant (109)

It is now possible to solve (106b), (107b) and (108b) for three design constants which, for a

Z is given the value for which S has been evaluated.

102
Figure 79. Core cross-section showing total winding-enclosed area A;

winding-filled area A ; and magnetic material cross-sectional area A

given F , will determine G, R, and l/l as functions of f for members of the class of cores

obtainable by scaling from the reference core. Multiplying (106b) by the fourth-root of (108b) gives

the first constant, called the resistance -frequency constant:

Rf PD (1 ) fp (1 )/F 1 R ' o' L so" sj (115)

Dividing (107b) by (108b) gives the second design constant, called the gain-frequency constant:

P G - Gf = P (1 )/F (116)

p_ resembles the common "gain-bandwidth product" in that all sub-harmonics of f are transmitted,

and constitute a "band" of discrete frequencies from zero to f. The third design constant, the size -

frequency constant, is obtained directly from (108a):

pi = d/y*174

= [p.<y/*-8 ]

' /4

(117)

Once the reference-core design" constants P_ (1 ), P_ (1 ), P (1 ), 1 and the spacefactor F

R o' G o' s o' o ^ s have been fixed, it is seen that G, R and 1 are uniquely determined by f. The curves in Figure 80 show how R, G and l/l vary with frequency, subject to scaling in accordance with equations (105),

taking as the reference design the 10-wrap-, 0.150 inch diameter core having n, = 100 turns and

n? = 200 turns. The design constants used in plotting these curves were calculated as follows: From an earlier section

P

R

(1o> PG^o>

3 x 10 ohms -sec

9 in 13 " 2 Z x 10 sec

103
10,000 1 1 1

G \ R

orR

(ohms) \g

1000

^Mo

100

10 1 1 1

— 10

1

to

10 10 REFERENCE

FREQUENCY

10

fc C.P. S

Figure 80. Magnetic amplifier core switching resistance R. current -gain G,

and relative size 1/1 , versus frequency when the design is scaled

in accordance with equations (105). 1 =0. 150 inch.

104
F = 0.04, and from ( 1 1 1) setting Z = 1, P (1 ) = 1.22 x 10 4 sec"

1 s o

Using these values,

p R

= (3 x 10 8

) [l.22 x 10 4/-04j

l

' 4

(3 x 10

8

) (23. 6) = 71 x 10

8 ohms-sec

" 5 ' 4

p = 2 x 10

13 /30. 5 x 10 4

= 65 megacycles per second

r 4, i

x /4 p l = [1.22 x 10 /. 04

J

->* (. "1/4

= 23. 6 sec '

12.2 The Gain of the Input Circuit

Having found expressions for the gain and input resistance of the magnetic output stage, we now

wish to determine the current gain of the Transmag input circuit. This portion includes the input

power-diode D ., and the peak- saturating emitter follower.

We define the gain of this circuit to be

A

G. = i /i , (118a)

l c' p

x ' A

where i is the core input peak current, and i is the least value of the current that must flow in one

input AND-gate in order to properly transmit a ONE to the input circuit. We first consider the case

for which i is constant* throughout the clock cycle.

Figure 81 shows the Transmag amplifier driven by one AND-gate through the essential OR-diode

D?

. From the figure,

i p= ib

+ i D

, (119)

where i, is the transistor base current, and i_ is the current in the input power diode D .. More

particularly, since i is constant, we require that

ip

= ib

+ I D

(120)

A

where i, is the maximum value of i, , and I nis the minimum permissible value of i_. In evaluating

i, and I_ two cases must be considered:

b D

1. During the rise of the clock wave, for v < V , and

P

2. Around the peak of the clock wave, when v > V . A A We first find i, = i, , for case 1. To do this we make use of an equivalent circuit for the input

impedance of an emitter -follower derived in Appendix VI. The circuit is shown in Figure VI-3, in which r, is the transistor base resistance, R is the

complete emitter-follower load, u> , is the radian alpha-cutoff (0. 707) frequency of the transistor,

i is effectively constant if V is much larger than v . p

' p

e o

105
A

v p

[ Pi

^

\

D2

v = v sin tut

'pi

Figure 81. Important currents in the Transmag digital amplifier

and p is its low-frequency small-signal "beta". The reactance of the virtual capacitance C. is

X. = -jR T to , /o

1

J L ab

(121) and r, is normally under 100 ohms. Therefore, at very low frequencies for which

w,/w»l+P , the input impedance of the emitter -follower is effectively (1 + P ) R. • But we are principally concerned with the reverse case, for which oo , / w < 1 + p . In this case the

(1 + P )R. branch can be ignored. Then, neglecting r, in comparison with R. , the transistor input

impedance is as shown in Figure 82, driven by a voltage v, = v sin tot. Therefore, the peak value

of i, , is bl

xbl Rj + x

2 L i R L/ n Kb^'

ab —°— , for u/o, < 1/2 R T

' ab = ' (122)

Thus i, . is given by (122) over the range of co /to indicated. Then, since the emitter -follower

peak output current equals v /R. , the current-gain of the emitter follower itself is

106
v /R

O' L,

*bl

-1 ab /co, for (1 + p ) -1 < u>/ w , < 1/2 (123) ab

v. =v sin tut b o

Figure 82. Approximate equivalent circuit for the emitter -follower input impedance

A However, to get G. we must still evaluate I n

and i . Using equation (97)

i = 2 v /3R

c o c (124)

Then, if R is set equal to 3R /2, R equals (l/2)(3R /2), and

r /R T = 2(2v /3R ) = 2 i o' L o' c' c (125)

Making use of (125), (122) and (119), equation (118a) becomes

G. =

ab

and from (124),

G. =

1 iRi £or < 1 + Po>"1<w /w

ab <

l 'Z

c D

uab

(118b)

(118c)

So far as case 1 is concerned, the value chosen for I n

is governed by the desirability of keeping

the impedance of the source that drives the emitter -follower low in comparison with the

107
emitter -follower input impedance. This source impedance is essentially the forward resistance of D .. I~ should equal or exceed the value I_ , where I_ is the current at which the slope of the pi D ^ Do Do r diode forward volt-ampere characteristic is 100 ohms, say. An I of 1 or 2 milliamperes is

ordinarily sufficient for this purpose, but when case 2 is considered, it may happen that I_ must be

given a larger value.

Under case 2, D . is back-biased, and v, = 0; therefore i_ = 0, and there is no charging

current needed for C. But the base-collector junction is forward-biased with the result that

flows into the base, and gives rise to the stored charge carriers that produce the

desired emitter -follower volt-second transfer function. To produce enough of these carriers i must not fall below some value I . Thus from case 2 we have the requirement that P

i = L , + I_ > I (126a) p bl D = p

v '

When the requirement of case 1, is added to (126a) we have finally that 'p-lli X D ± bo < 126b> A

Ordinarily I will determine the value of I_, because I - i, , is likely to exceed the value I_ ' p D p bl ' Do

required to keep the forward resistance of D . equal to 100 ohms. In this case G. is obtained simply

by setting i = I in (118a),

whence . Gi = T^ = 3R-T £L = ^-V> fon - 1- > l

r (U7a)

3R I ' p

c p Otherwise, I_ = I_ and (118c) gives D Do ' &

G, = , p T. for I - L . < I„„ (127b)

1

, for I P A

< bo 2oj + 3R I_

c Do

2v

o

A

In the unlikely' case that I - i, , is less than 1^ , (127b) still applies, because 1^ must not be

p b 1 Do ' ctr D

less than 1^ . Do

12. 2a Restrictions on u/ u , ab

In general, we require that A

XD = *p * *bl | bo < 128 > From this, using (122) and (125) we get

_^L_ < "P " Ip

°

(129a)

ab 2 i c

Equation (129a) shows that any value for co/ co , is permissible provided i is made large enough.

But from (123), (u> / cj , ) = G_, so that only fractional values for oj/ oj . need be considered.

Furthermore, for simplicity we require that oj / oj , < l/2, which is the range of validity of (122).

108
A

Ordinarily I - i, , > 1^ , and i is set equal to I . In this case the range of u> / u> , is given by ' p bl Do v> V ab ° '

ST—A P a < 12 9b)

ab 2 i c

or by

a> <

p Do

"ab =

4V 3R

C (129c)

When co/to , satisfies (129b, c) the gain of the Transmag input circuit is said to be limited by

A A

the transistor storage -requirements. Conversely, when i, . is so large that I - i, , < I_ , that is A

P °

to say7 when I < 1^ + i, , so that i must be made greater than I in order to satisfy (128), then

p Do bl p

" p

i \ i>

the gain of the input circuit is said to be alpha-cutoff limited.

12 2b The Case in Which V is only a Few Times Larger than v

g

* _ o The foregoing derivations have been based on the assumption that i remains constant

throughout the clock cycle. In practice, unless a nonlinear R , is used, i is kept constant by

making V large compared with v . *

However, at the price of a small loss in current-gain, a smaller V can be used, i is then no

P P longer constant, but varies in accordance with

V - v sin u>t v pi

Now for the propagation of information we are concerned only with the value of i during the positive

half cycle of the clock, i.e. , for sin o>t > 0. More particularly, we need to know its value at

tot = 0; and at ojt - ir/2. Furthermore, for each AND-gate that a core must "hold down" it must

absorb a current i equal to the value of i at o>t = 0. Then, for the sake of simplicity, if we assume the case of relatively high emitter -follower gain, G_ = co ,/ oj > 4, we can take the phase

A

angle 6 of R T + X. to be nearly ir/2, with the result that i, , assumes its maximum value i, , near L i

i i > D l bl

co t = 0. Thus, paralleling (128), we require thatA

I_ = i - i, , > I_ (131) D po bJ — Do

But in addition, we must require that i at cot = it /2 be at least equal to T . Now at ojt = rr/2, ^ p P using (130), we have

*

i may also be kept constant by superimposing the voltage v = v sin u>t upon a d-c component,

giving a varying V .

109
ip

(-/2) = Pi

(1 *

P

(132)

Then if we set i (ir/2) = I , and assume the circuit gain to be storage-requirement limited (since we

have assumed co , / to 2 4), we may write ab

po

I (1 - v /V )" p

v o' p' From this, using

which parallels (118a), we have

po

(133)

(134)

A

i G.

l I (1 - v /V )' L P o' p' 2v ( 1 - v /V ) o

x o' p' 3R I c p

for I (1 - v /V ) _1

- i, , > 1^ , p °P bl Do

(135)

which parallels (127a).

Finally, for this case, the range of co/co , is given by

I (1 - v /V ) _1

- I_

< p o' p Do

ob = 4v /3R 1/4 2 u / (136)

o' c

This parallels (129c), but is a little less restrictive on oj/cj , , by reason of the factor

(1 - v /V f

1

. o' p' In no case, however, should cj/cj , exceed values for which the emitter-follower is unilateral.

' ab

In an enumeration of some of the benefits acquired through the use of an emitter follower, point five in Section 7 states that the emitter-follower serves as a unilateral buffer to provide further isolation between the magnetic elements. The emitter-follower is unilateral when working between a

signal source of low impedance, relative to its own input impedance, and a load impedance which is high relative to its own output impedance. Because the source impedance is effectively equal to the forward resistance r n

of the input power diode D ., the requirements for unilateral signal

transmission by the emitter -follower are: < < Z. Do input

R, > > z

output'

where r_, is the value of r^ at the forward current I_ Do D .Do Then, confining co/oj to the range (to +(3) <oj/oj

be written

Do JR, Ob /

(137a)

(138a)

^ 1/4, and neglecting r, , (137a) may

(137b)

And, making use of the output equivalent circuit of the emitter-follower derived in Appendix

VII, (138a) may be written

RL >> * (r Do

+ rb> v< ab

- (138b)

110
Finally, combining (137b) and (138b), the requirements for unilateral signal transmission are

R. R. L >> "» << k_

Or, equivalently

r b+ r Do %b *Do

-/"ab <<RL.K + r Do>"

1 (139)

in the range (l+(3)" < w / o> < l/4.

Practically speaking (139) may then be written as

or, when RT = 3R /4, as L c'

'^«b < Rl/ 10(r b

+ r Do»

(14°a)

'/»ab± V13 < r b

+ r Do»

(140b)

Then, using r = 100 ohms, r = 100 ohms and R = 1000 ohms at 300 kc, (See Figure 80) gives

Rc /13(r. + rp. ) — 2/5 > l/4. Therefore, for these values, (139) is satisfied throughout its

range, and the emitter-follower is unilateral at least for co /j , < l/4; that is to say, for GF = w

ab /w 4

4 " When the gain of the input circuit is storage-requirement limited, the maximum acceptable

value for u> /oj , can easily be less than l/4, however, depending upon R and I . In the

experimental Transmag circuit it was found that good signal transmission was obtained using a CK760A transistor with V = 25 v. , R . = 5600 ohms, R = 680 ohms, v = 10 volts, and

p pi e o

. A

R = 470 ohms, with a core for which R = 750 ohms and i' = 1/ 2 i . s c o c In this case the range of u /u> , can be calculated from

1/4 > „/«» . <

lp°," Ip°

' = ' ob = v / R.

o ' L

in which I„ =2 ma. (for the diode used); i = V /R , = 4. 5 ma. ; and R, is the resistance of Do po p' pi L. R in parallel with the effective resistance of the branch containing R and the core. The resistance

of this branch is, in the manner of (97)

i c A

^— R i + R (i - i') > [sc cc oj

1 r A ^ ^— R i + R (i - i i ) i Lsc cc 2 cj

= R + R /2 = 840 ohms,

s c'

111
Thou

D

(840)(680) „R , R

L

" 840I6S0

= 375 ohms.

and

, /. ^ /

, 4. 5 ma. - 2 ma.

1/4 > co/co < . ,

' = ab — 27. 5 ma.

< 1/11.

This circuit functioned at a clock frequency of 300 kc; therefore the required range for

f L > 11(300 kc) ab —

> 3. 3 mc.

The spread of f , for the CK760A is 3 to 5 mc.

Using (133) we calculate the minimum required storage current to be

I = i (1 - v /V ) p po op

= 4. 5 (1 -*10/25) = 2. 7 ma.

The gain of the emitter -follower was C_ = u . / w = 11, F ab '

and the gain of the complete input circuit was

V o/RL 10/840 , , Cr.ii= : = —-p-p = c.. O

4. 5 po For comparison we calculate the range of co /co , obtainable with R = 1000 ohms,

R = 3 R /4; and with all other parameters the same as before, including i . The lower limit

on co /oo is given by

1/4 > w /w . < Y

" ^ P

p

°

'

' ab — 4 v 3 R

o c

4 5-2 < ^

= 0.192;

or, since 0. 192 < l/4, ' w /u , < 0.192, and f , > 1. 56 mc, ' ab = ab —

G^ = oo , /co > 5.2, and F ab —

2v /3R , , _ o ' c o . 6 ma , .

G. = : = -J—= = 1. 46

i i 4. 5 ma po

The assumed I of 2. 7 ma for this case is probably larger than would actually be required.

If a smaller value for I is allowed, a reduction in AND-gate power can be affected by using a faster

transistor (to give more current gain) and reducing V or increasing R ..

112
12. 2c The Dependence of Transistor Speed and Power Requirements upon. Clock Frequency

It is useful to know how the minimum required alpha cut-off frequency f , and the collector

dissipation h must vary with clock frequency when the design of the core to be driven is scaled in

accordance with equations (105) from the core for which the curves of Figure 80 were plotted. We

assume fixed values for v , V , R , and, without justification other than that it seems possible, for o p p

f •

I . Under these assumptions the power dissipated in the logic AND-gates is constant, and for the storage-limited case we have that A

Then, from

using (123),

-

i, , = I (1-v/V)" - I_. = constant, bl p o' p' Do

A G„ i, , = v /R. = 4 v / 3 R , F bl o' L o' c

f , 4v abo o A

3L, R

bl c

or,

Then, using (115),

f o fRc abo

»*i.

abo

4v

o 9/4

f A

31

bl

PR

for f , > 2f. abo —

(141)

(142a)

If we let v =10 volts, V = 25 volts, I_. - Z ma. , and I = 2. 7 ma.

o p Do p

i^

1 = 2.7 (1 - 10/25)" 1 - 2

Q and, for the core design we are using, p_ = 71 x 10 , so that

= 4. 5 ma. - 2 ma. = 2.5 ma. ;

R

f = 1<I°> £9/4 (142b) Qbo

3(2. 5x 10" 3)(71 x 10 8

)

This is represented by the curve for f , in Figure 83, along with curves for h , the collector

dissipation for the (undamped) assertive amplifier for all ZEROs; and for h ., the dissipation

for the aseert-negate amplifier for all ONEs. The functions represented by these curves were

derived as follows: In Appendix VIII h is conservatively estimated to be

h = 2(v

2 /3 R ), ao o' c

113
MILLI- WATTS

C.P.S.

dbo

Figure 83. Transistor collector dissipations h and h . versus clock frequency f , from Appendix VIII; and minimum- required alpha-cut-off f , versus

clock frequency for the core design used in Figure 80 and a nominal

AND-gate current of 4. 5 ma

from which, making use of (115),

2v

3~Fx

.5/4 (143a)

2(ior

3(71xl08

)

f 5/4 (143b)

114
h , is about one -half of h

al ao Also in Appendix VIII h , is shown to be very nearly equal to v /3 R , so that we may write

2 h , = -r^- f 5/4

(144) cl 3 pR

'

= h /2

ao' Furthermore h — 0. CO The low collector dissipation, the double output, and the economy of components of the assert

negate amplifier make it very attractive.

12.3 Additional Factors that Affect the Fan-Out N

Having gotten expressions for calculating the current gain of the Transmag digital amplifier, we wish to take up the remaining factors that affect the attainable fan-out.

In the first place we wish to point out that the kind of output branching shown in Figure 84 is

ordinarily to be avoided, * particularly if many loads are to be driven. For, although it does

minimize lead ground capacitance, this branching combines the load currents in a single long lead

that may have a self-inductance greater than the core saturation inductance. During the transmission

of a ZERO the volt-second signal developed across this inductance by the combined load currents may well exceed the threshold r

?

. and give rise to a false ONE at the load inputs.

Figure 51 shows the proper manner of connecting the logic load to the Transmag amplifier. The

output degenerate AND gate is located close to the core, and the signal is distributed through

separate leads to the remote logic gates. The output gate provides the power to maintain the ONE

signal across the combined lead ground capacitance EC . As was stated earlier, the insertion of

the output gate is necessary because the magnetic element has a high impedance during the trans- mission of a ONE, and is therefore incapable of developing an acceptable signal across the lead

ground capacitance. The output gate also serves to ZERO the core during the transmit half-cycle.

The branching shown in Figure 51 maximizes the lead capacitance that must be driven. Therefore the output gate pull-up resistor R must carry a current considerably larger than is required

of the logic gate pull-ups R . . In fact the current in R must equal or exceed the value

(SC

s

) [v] + 1 = oovSC +1

maximum ° o s o where I is the minimum current required to keep D conducting and to ZERO the core through its

output winding.

W

Unless a low-impedance line is used. Furthermore, the delay in this, or any other lead,

should be small compared with T /Z.

115
ipo LOGIC LOAD

.Al ///////

5

»po

(a)

n

vP

»po *

'po

LOGIC LOAD

(b)

Figure 84. Ordinarily undesirable output branching

116
The attainable logical fan-out for the Transmag digital amplifier is than

Gi - (u)v SC + I ) N

po o so

ipo

uw SC + I = G Sj—5 °- (145)

where i is the minimum required value of the current in R . when sin cot = 0. C is the ground

po M pi s & capacitance of a fan-out branch, and G is the current gain of the amplifier.

It might be thought that the output gate could be eliminated by increasing the currents in the logic

gate pull-ups R .. This could be done provided the current in each logic pull-up were made large

enough to drive all the lead capacitance SC . But if the number of branches is large, or if the

branches are long, the current needed to drive SC may be much larger than the minimum required

logic gate current i . In this case the number of such gates that can be driven by the amplifier is

drastically reduced, i. e. , the fan-out N is much smaller than the amplifier current gain G. It is

not sufficient to make each logic gate capable of driving only its own input leads, because it may

happen, in the logical functioning of the circuit, that all gates in the logic load, except one,

simultaneously receive ZEROs on one or more of their inputs. These gates are therefore held at

ground potential. Then, if a ONE is to be transmitted to the remaining gate, that gate must drive

the total capacitance SC .

Figure 85 shows an alternative scheme of interconnection that eliminates the output gate without

such a drastic reduction of fan-out. In this scheme, the diodes of the logic gates are located at the

transmitting amplifier instead of with the pull-up resistors R ,. Inspection of the diagram shows

that the current in each logic AND-gate must be made large enough to drive C + SC , the stray

capacitance to ground associated with all its own input leads. But no gate need be capable of driving

SC . s In the design of the logic gates in this scheme there are two possibilities:

1. An advance knowledge of the ground capacitance of each input lead is obtained, and the

pull-up R . of each gate is given the proper value to drive the total input lead capacitance

for that gate.

2. A maximum possible lead-capacitance for each gate is assumed, and the gate is designed

for this. There are two possibilities for this procedure:

a. A maximum capacitance for each gate based on the number of input leads to that

gate is assumed, or

b. A maximum capacitance, disregarding the number of inputs, is assumed for all gates.

117
Figure 85. Lead capacitances involved when no output AND-gate is used

Procedure 2b requires the least computation in assembling digital circuits from packaged

gating assemblies; but it gives the smallest fan-out because of the conservatively large value of

current carried in each logic pull-up. If the maximum number of AND-gate inputs is 10 or more,

N will be appreciably smaller than G.

Procedure 1 requires the greatest amount of computation, and results in the least uniformity

and inter changeability of packaged assemblies. The design of each gate is tailored to fit its

particular location in the logic net. The ratio of N to G for this method, while greater than for

118
2a and 2b, will generally be smaller than for the scheme of Figure 51. The reason for this can be

seen from Figure 85, where the transmitting amplifier must be able to handle a total logic -gate

pull-up current sufficient to drive, not only SC , but also SSC' . The fan-out reduction becomes

significant when the additional current required in each logic -gate to drive its total input lead

capacitance C + SC equals or exceeds the current i required to drive the following amplifier.

The inferiority of the method of Figure 85 to that of Figure 51 becomes more pronounced as the number of inputs per logic AND-gate increases.

Although it requires the addition of an output AND gate that performs no logical function, the method of Figure 51 is superior to that of Figure 85 because:

1. All the logic-gate pull-ups R . carry the same current.

2. This current need be no greater than is required to drive the digital amplifier.

3. The difference between G and N, resulting from the need to spend amplifier power in

driving lead ground capacitance, is less.

13. THE TEST COMPUTER

The test computer was constructed in modularized bread-board form using the basic circuits

shown in Figure 86a, and diagrammed in Figure 86b. In tests of these circuits, an OR-gate fan-in

of 4 with AND-gate fan-ins of over 5 each were easily obtained. A conservative fan-out figure was

30. The total power consumption of an amplifier was around 0. 5 watt, and the power per singlyloaded logic AND-gate was 0. 15 watt. Over 80 digital amplifiers were used.

The organization of the machine, shown in Figure 87, was suggested by S. Greenwald. Figures

88, 89, 90 and 91 show the details of the blocks in Figure 87. An over-size central clock source generated 24 watts of 300 kc, amplitude -regulated power at

a level of 20 volts rms. Approximately 4 watts of this were distributed to the computer through

nine ferrite-core transformers whose center-tapped secondaries provided the two-phase, 7 volt

clock for each of nine racks of up to 16 amplifiers each. An attractive alternative to this system

would be the use of small local transistor clock power amplifiers driven by a central low-power

clock.

In operation the computer, upon receiving start pulses, alternately adds two six-bit binary

numbers entered by means of toggle switches on the control panel; and compares the sum, bit-by-bit,

with a check-word, also inserted manually. The operations are serial. Errors revealed in the compare operation are counted by a three-stage binary counter included in the computer. A sevenstage shift register using dynamic flip-flops serves as the machine's internal store.

Figure 92 is a front view of the computer. Figure 93 is a close view showing the control panel

and the modularized bread-board construction. The small white "buttons" contain the potted cores.

119
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120
121
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122
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125
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11 © ©

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124
•^7 <^7

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y"\.

^7

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125
lis

mm

mmm

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Figure 92. Front View of the Test Computer

126
CUc

Oh—

OucoO

(U

(J

en

pu CQ O a)

co CQ H CU

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127
Two ferrite clock transformers appear on the left. Figure 94 is a rear view showing the 24-watt

clock generator at the top.

Valuable assistance in testing the circuits, and in assembling the computer, was contributed

by G. Reimherr, L. Liebschutz and O. Hall.. SUMMARY

Because it lacks the inherent instability of majority logic, and because it is economical of components, diode switching is an attractive way to implement computer logical functions. The

drawbacks of diode switching are that it does not provide the essential NOT function; it lacks power

amplification, which is necessary for signal propagation and for logical branching; and it provides

no signal regeneration. To make up for these deficiencies it is necessary to insert amplifiers at

intervals within the switching network.

This note describes a solid-state amplifier and a solid-state ONES-complementer amplifier

designed to receive, either individually or together, the signal from an AND-OR sequence of

diode logic. Each amplifier consists of three principal parts: an emitter-follower input stage;

a square loop-core magnetic amplifier output-stage; and finally an output degenerate AND-gate.

Power amplification is entirely in the form of current amplification with the core providing most

of the gain. The emitter -follower is particularly well suited as an input stage because is provides gain at low current levels. This lowers the current requirements in the extensive diode

gating structure, with a considerable saving in power. The core, on the other hand, requires more input current than the emitter-follower and is capable of handling very large output currents.

It is therefore most suitable as an output stage. The emitter-follower and the core complement

each other also in another very important way. Because of the manner of operation of a magnetic

amplifier, the signal-carrying parameter, which must be amplified and propagated, is measured

in volt-seconds ( / vdt). This quantity tends to be dissipated in passage through successive

magnetic amplifiers. The emitter-follower, however, is made to replenish the signal by pulsestretching through base -charge storage produced by driving the base -emitter junction into forward

conduction momentarily at the peak of the signal.

The operating cycle of the core, and therefore of the entire amplifier, consists of two parts:

a receive operation followed by a transmit-recover operation. At the end of every transmit -

recover interval the core is left in the state of negative remanence, called the ZERO state. Then,

during its receive -interval, the occurrence of a ONE at the emitter-follower input carries the core

to a state of positive remanence near saturation, called the ONE state; or, the occurrence of a ZERO, which is the absence of a ONE, leaves the core in the ZERO state. During the transmitrecover interval current from the driven AND-gates (the logic -load), plus the current from the

degenerate AND-gate through which the driven gates are connected to the core, passes through the

128
Figure 94. Rear View of the Test Computer Showing the

Clock Generator at Top

129
output winding in such a sense as to restore the core to negative remanence. The time integral of the

c.e.m. f. across the output winding during this time constitutes the output signal of the amplifier, and

is large or small depending upon whether the core was in the ONE or the ZERO state at the outset of

the transmit-recover integral. Signal timing and shaping, and some of the power used to cycle the

core are supplied by a sine-wave voltage -source clock connected to the amplifiers. A two -phase clock

is required because the receive and transmit intervals are sequential, so that for every amplifier

which is in the transmitting phase, there is one which is simultaneously in the receiving phase. It also

follows that there must be two amplifiers for each bit of information transmitted.

The output degenerate AND-gate supplies current to restore the core in case none is available

from the logic gates at any time; and it also supplies current to charge the fan-out lead capacitance.

The pull-up resistor in this gate may be adjusted to a few alternate values depending upon the rough

magnitude of capacitance to be driven by the particular amplifier. The use of the degenerate ANDgate for this purpose allows all the logic gates to have identical pull-up currents of minimum value.

The use of a square-loop core as a saturable reactor to "hold down" logical gates is particularly

attractive in that continuous standby power is not necessary, as it is when they are held down by a clamped OR-gate in the conventional manner.

In the complementing amplifier the clock is connected to one terminal of the input winding of the

core so as to set the core in the ONE state during each receive -internal. The other terminal of the

input winding is connected through a resistor to the emitter. A diode clamp holds the emitter at

ground when ZEROS are present at the emitter-follower input. The core then, being continually set by

the clock, transmits ONES. But upon the arrival of a ONE at its input the emitter-follower generates

sufficient current to open the diode clamp and the resulting emitter signal opposes the clock, leaving

the core in the ZERO state. The core then transmits a ZERO.

The gating structure requires one d-c supply of -25 volts, 5 ma per AND-gate. The amplifiers

require d-c supplies of -9 volts and +12 volts, supplying a power of approximately 0. 5 watt. The

clock frequency is 300 kc. Its amplitude is 7 volts (rms), and it supplies about 50 mw of power to

each amplifier. A logical fan-in of 20 and fan-out of 30 is achieved.

The volt-second transfer characteristic of the amplifier critically determines the stability of

propagation of binary signals. Factors governing the required shape of this characteristic are

discussed.

A test computer using 81 magnetic cores was built to demonstrate the operation of the circuit. It

alternately adds 2 six-bit binary numbers and compares the sum with an inserted seven-bit check

word. The operations are serial. Errors revealed in the compare operation are counted by a threestage binary counter, which is also part of the computer. A seven-place shift register using dynamic

flip-flops, also constructed from the same circuitry, serves as the machine's internal storage. The

machine may be run self synchronously, or may be externally triggered through a synchronizer.

130
APPENDIX I APPENDIX II

Derivation of Derivation of m = ( 1 + v /i R ) co' o p

-1

i R

o s

1 - v /v

co' o

1 + v /i R

CO' o c

where

R"

1 = RX + R" 1

. p s c

Starting with Starting with

Rc R + R

s c

(1 -

i R

o s

V ' o

= V

CO V

o

1

1 -

i R

o s V

= V

CO V R

< 1+ R

1 - v /v

co' o m =

1 + v /i R

co' o c

make the substitution

i R v R V

o s

- 1 = CO s CO V v R V

o O c o

v R i R R co _ c . , o s . c , , . R + R

(1 ) = R + R

(1 - m)

o s c o s c

i R v R

v R

o c

then

R +R

s c

(1 - m)

1 + v /i R

co' o c

i R v R i v

o s . co s o , co , + =—: = l , whence

v v R i v

o o c o o

(1 + v /i R ) = 1 - R

co' o c' R +R R +R

s c s c

i R v v

o s , , , co . _ , co ~v * i R ' " "vo o c o m (1 +-r Rc. R

n c

i R R + R o c s c

\ = 1 i

' R + R s c

i R

o s

1 - v /v

co' o 1+v /i R

co' o c i R

o c + (1 R + R ' s c R + Rs c

, CO m h—-rr— +

i R R + R

o c s c R + Rs c R v

S , S CO . R + R

V R + R i R

s c s c o c

v R + R -1

* i ' R R ' o s c

(1 + v /i R ) _1

1 co' o p'

131
APPENDIX III

Derivation of the exact and approximate formulas for T/2 (T/2-t

o

) x (T/2) = J v_ dt = J v_ dt o to

(III- 1)

x (T/2) is the maximum voltage-time integral impressed upon the input winding during the

receive half -cycle. It is represented by the shaded area in Figure III- 1.

From equation (29), which gives y (t)

we have, setting t = t. = T/2 - t

t "1

o

(T/2) = -i- y (T/2)

R + R

s c

t i R t t, i R t,

, -> ° -> o s o . , , 1, OS 1 . (cos 2w -=• + 2tt — jp- ) - (cos 2ir -=— + 2ir — =-)

"v—

o v T

o

v T

o

2tt

and, since cos 2ir t,/T = - cos 2ir t /T,

1 o

x

c (T/2) =

s R + R

s c R

s R + R

s c

t i R t. - t

., o -, os.l o.

2 cosy - 2-rr —

( ^) v T

o

cos 2tt

t ir(t, - t ) i R

o 1 o os T T

v T

o

Then using6 t. - t = T/2 - 2 t , 1 o

' o

x

c (T/2) R + R

s c

4t i R O TT o . o s v T

o

v

1 T

CO

, which defines an effective core input peak voltage

(HI-2)

co " R + R

s c

t 4t i R

, O IT / i O . O S cos 2ir -PR-- t (1 fk— ) T

" 1

v T ' v

(HI-3)

We compare v' with v , the latter being given by

R i R

S . , OS.

'co

= R + R

< s c

X " —

o

> V (HI-4)

132
and observe that as t /T and hence i R /v = m o o s' o approach zero

-> v R + R s c

(III- 5)

If we let t /T = 1/12, then i R /v = sin 2ir t /T = sin 30° = 0. 5 = m,

o' ' o s' o o' a very large value. For this value of m

(III- 6)

co R + R

s c

-> a * R

2tr it , , 4 . o s COS T2 ' 2

(1 * JI ) -V— o R + R

s c 0.866 - 1.05

i R

o s

Comparison of (III-6) with (III-4) shows that, for values of m < 0. 5, v

1 ~ v , and

v' T _ v T

(T/2) = -£2 _E2_

Specifically, for m = 0. 5

0.866 - 1.05 (5)

1 - 0. 5

= 0.73v

t| T/2

t, =T/2-t

Figure III- 1 . Maximum voltage -time integral received by the core

133
APPENDIX IV The curves in Figure 39 were not plotted,

but were sketched, assuming dy/dx = 1 at

t = T/4, and using the values for y (T/2)

calculated for different values of m, using the formula

y(T/2) = ^

1+m— -,. ir . - 1 . m ( tj- - sin m) T m 2 ' 1-m

v T

o

IT 7-1)

obtained by setting t = T/2, m = i R /v , and

l, R + R 1 s c

1 - m

in (29).

The following table gives y(T/2) for three

values of m.

APPENDIX V

The synchronizer used in the Transmag

test computer is diagrammed in Figure 88. It

is the kind described and shown in Figure 1 of

the paper "Buffering Between Input-Output and

(5) the Computer" by A. L. Leiner. x

' The

storage and regeneration device is a ring of

two element-groups. The probability p that

this ring will emit an imperfect signal to the computer is practically equal to g if the

transfer -functions of its element-groups are always nearly alike, and if high frequency noise

is excluded from it.

m y (T/2)

0. 36 0.78 v T/tt

o '

0. 50 0.73 11

0.80 0. 50 II

134
APPENDIX VI INPUT IMPEDANCE OF THE EMITTER-FOLLOWER

Here is a derivation of the input impedance and input equivalent circuit of the emitter follower

based on the assumption that the time response of the transistor is that of a single-section low-pass

RC filter. From Shea, equation (10. 67), the input impedance for the common-collector connection is

Z. = rb+ (l + P )RL

or Z.-rb =(l + P)RL

where P is a complex function of frequency and R. is the emitter -follower load resistance. See

Figure VI- 1.

In terms of a, also a complex function of frequency,

Z- " rv. = (t-^— ) RT l b * 1 - a ' L

we now assume

a

o a

1 + JUT

where a is the real low-frequency common-base current gain of the transistor; and where

T = 1/ oj , equals the response time constant of the transistor. The above single-pole expression

for a defines its frequency response to be that of a single section low-pass RC-filter. Then

Z. - rt = RT I = R

1 + J"T

i b L a L (1 - a ) + jcoT

1- °

gj + jcoT

and, since (1 - a ) =(1 + P ) , where P is the real low frequency common emitter current gain,

z- - rK = R T LJlJ£

[ = R T a + P ) i I

* K7\ x a \ 1 b L (l+P^ + jc-T

L ° 1+ J WT< 1 + P >

Consider now the impedance Z of the network in Figure VI-2.

(Z - rb

) _1 = R

_1 + r + 1/jwC.

, 1 + jojrC. + jwRC.

R(l + jwrC.)

1 + joorC.

Z " rb

= R 1 + joj(R + r)C.

135
i Vc

INPUT °" K

S>

-O OUTPUT

Figure VI-1. Emitter-follower

z— o—v^

X

Figure VI-2. Diagram used in deriving the emitter-follower input equivalent circuit

A formal substitution of

r = R.

C. = T/r = t/R. , and

R = R (1+ Po

) gives

Z - r, = R T (1 + PJ

1 + JOJT b ' L

x 'V 1 + jwT (1 + 1 + p )

which is very nearly the same as the expression for Z. - r, . In any practical case 1 + P is enough

greater than unity that

1 + 1 + Pr

at 1 + p , o

r o

136
and the circuit in Figure VI- 3 ia the practical equivalent circuit for the input impedance of the

emitter -follower

Z|-*0- W

(

• +Po ) Rl

C| - l/a> ab R L

Rl

x

Figure VI-3. Emitter-follower input equivalent circuit

137
APPENDIX VII EMITTER-FOLLOWER OUTPUT IMPEDANCE AND OUTPUT

EQUIVALENT CIRCUIT

This derivation is based on the assumption that the time-response of the transistor is that of a

single -section, low-pass RC-filter.

Omitting the emitter resistance from equation (10. 69) of Shea,

Z

o = TTlA ^ < x - Q>< rb

+ V

where Z is the output internal impedance of the emitter-follower, Z is the internal impedance of

the signal generator that drives the base, r, is the base resistance, and a and P have their usual

meaning. We let

1 +. JCJT

where a is the real, low-frequency value of a, and T = l/u> , . Then

1 - a = 1

1 + jwT 1 + JtoT

(1 - a ) + ico T , , ^— -

(1 + (3o' 1 + ju T

+

1 + JOT

and, setting Z equal to r n, the forward resistance of D ., g D Pi

r + r _ D D 1 . . JUT Z

o - 1 + P Q

1 + ju>T + (rb

+ r D' 1 + jooT

Consider now the impedance Z of the network in Figure VII-1.

I J"L /r

2

Z = r

l 1 + iu>r. C

+ r

J 2 1 + jojL /r,

1 o

J o ' 2

A formal substitution:

rb +rD

T - 1+ p ^

T(l + Po

) r

l

< r b

+ r D

)

r, + r n, and

b JJ

xr

2

= T(rb

+ r D

)

makes Z = Z , and Figure VII-1 becomes the equivalent circuit for the output internal impedance

of the emitter follower.

Figure VII-2 shows the impedances of the branches of the network.

138
\l

Lo

r_

Figure VII-1. Diagram used in deriving the emitter -follower output equivalent circuit

V-i

CO

r b + r wab

'+/3o w

u

1—vw

X L

= J (r b +rD

) w

co tab

-oZ„

-AA/VV-1

Figure VII-2. Emitter -follower output equivalent circuit

In the frequency range

(1+ (3)"

1 << W/o)Qb

< 1/4

Z is principally inductive, and simplies to

Zo^ j(r

b +rD

} "

/l ab

139
APPENDIX VIII THE DEPENDENCE OF COLLECTOR DISSIPATION UPON CORE RESISTANCE

The collector dissipation h needs to be considered for each of six cases: h . For the assertive amplifier of Figure 53 for all ONEs received.

h . The same, for all ZEROs.

aO

h, . For the NOT -amplifier of Figure 65 for all ONEs.

h, The same, for all ZEROs.

h . For the assert-negate amplifier of Figure 67. h n The same, for all ZEROs.

cO The Assertive Amplifier

In actual practice the collector dissipation is lower than for the worst-case version of

Figure 53, shown in Figure VIII-1. But we first calculate h' , and h

1 _ for this version. In Figure VIII-1, the emitter supply is m ide large enough to allow the emitter -follower to reproduce

the full clock sine wave without negative clipping.

When ONEs are being transmitted, the average collector dissipation for this version of the

assertive amplifier is 2.

h

ai TF \

(v

c -v)icb d(a)

2w

Now

where

and

^- J (v - v sin wt) i , d (wt) (VIII-1)

2tt ' o o ' cb

X (VIII-2) cb

= H

+ i 2'

*2

= v sin wt o3R fl

c

'

v - Ve

l

l - 3 R /2

c'

v sin wt + 2 v

o o

(VIII- 3)

3-TT72- (VIII ' 4)

c'

so that

2 v + 2 v sin ut o o ^b =: 3 R /2

c'

140
v = vQ smart

V« = - 2 vr

Figure VIII-1. Diagram used in calculating worst-case collector dissipation

Then

al 2ir

2v

1 / (v - V

/ o o

7-n- ->

sin u>t)(2 v + 2 v sin cjt) " o o

' 3 R /2

c'

d(ojt)

2tt

2 v

3tt R

cos u>t d(wt)

3 R

(VIII- 6)

In the case of all ZEROs,

ao " 2

TT

IT -" C

2 v (35-^) dM) +T

, 4 v 2 v 1 ^_ + 2_

2 3 R 3 R

2 v

oR

(VIII- 7)

The NOT -Amplifier

No power is dissipated in the collector of the NOT -amplifier during the negative half cycle of the

clock because no collector current flows. This is also (almost) true during the positive half cycle for

all ZEROs received, so we may assume

h

bQ ~ (VIII-8)

141
But during the reception of ONEs, the clamping diode D , in Figure 65, is open, and the collector

current i , equals the sum of the constant current I , which formerly had been present in R , plus a

varying component equal to v sin u>t/R . No current flows in the core branch during this time

because of the opposing clock e.m. f. Therefore

i , = v sin ut/R + I (VIII-9) cb o ' e e

x '

in which

A

I = i + I (VIII- 10) e c co A where i is the core peak current, and I is the value of the current through D for which its C e CO ° c forward resistance equals the largest permissible clamping resistance r . (r should be 50 ohms

or less.

For the NOT-amplifier then

,1 2ir J

o \i -^r •>

< v c" v)1cb (V " v) * i, d< «•*)

—— / (v - v sin ut)(I + v sin oot/R ) d(wt)

2tt J * o o e o e o

IT n v I - v I sin cot + v sin ut/R^ - v sin o-t/R ±1' oeoe o 'eo ' € o

d(u>t)

2 = v I (1/2 - 1/T) +1° (1/tt - 1/4). (VIII- 11) o e Kfi

The Assert-Negate Amplifier

As far as the transistor is concerned, the only difference between the circuit of Figure 67 and

that of Figure 65 is the additional collector current i sin ut drawn, during the positive half-cycle,

by the assertive core. The extra collector dissipation due to this current is given by

1/2 rr J(V - v)( i sin wt) d (cot) o

r*

l/2irj v (1 - sin wt)(2v sinoot/R ) d (u>t) o

2 it f 2

= » - I (sin u)t - sin oot) d (ut) U

c Jo

2

= 3j£- (2/ir - 1/2) (VIII- 12) c

142
Therefore

2 v h . = h, , + — (2/tt - 1/2) cl *bl 3Rc

2 2

= vn

I (1/2 - 1/rr) + ° (1/tt - 1/4) + -^-(2/ir - 1/2). R

l ' ' i

' 3R

e c

(VIII- 13)

Finally

h = h, ^ 0. (VIII- 14 co bo

We now wish to evaluate the collector dissipation for each of the six cases using

A

R = 1000 ohms obtained from Figure 76 at f = 300 kc. With v = 10 volts, i =2v/3R =7 ma.

c ° c o c o' c Then, letting I =5 , I = 12 ma; and using V = - 12 volts makes R = R = 1000 ohms. ° co ma e ° e e c We wish to compare the collector dissipation figures obtained with v /3 R =33 milliwatts,

which is the power required to drive R and the core.

h» , = 2(v

2/3 R ) = 67 milliwatts

al o' c'

h

1 = 3(v

2 /3R ) = 100 milliwatts ao o' c'

h

bl = 10(.012)(. 5-. 32) + (100/l000)(.32-.25)

(. 12)(. 18) + (. 1)(. 07) = 29 milliwatts

bo

h

1 = 0.029 + .033 (. 14) watts

h

co

29 + 4. 6 = 34 milliwatts

It is apparent that the version of the assertive amplifier of Figure VIII- 1, for which h' . and

h' were calculated, produces excessive collector dissipation when compared with the remaining

two circuits. These circuits owe their low dissipation to the transfer of current from the transistor

to the clamping diode D during the negative half clock cycle. The use of a clamping diode would

also greatly lower the collector dissipation in the assertive amplifier. But there is no need for the

negative half clock wave to be reproduced because the core is ZEROed by its output AND-gate. V

143
can therefore be reduced in magnitude from 2 v to v or even less with a consequent large

reduction in collecto'r dissipation without the use ofD , A conservative estimate of collector

dissipation when this is done is

h , £= 33 milliwatts = v /3 R al o' c

h ^67 milliwatts = 2 (v

2 /3 R ) ao o' c'

The assert-negate amplifier looks most attractive from the point of view of collector dissipation

for it provides both assertion and negation, in an economical circuit, with a collector dissipation of

only 16% more than for negation alone.

144
Then f _, (x)

APPENDIX IX NEGATING TRANSFER-FUNCTION

To obtain y = T~?. (x) we first observe that y = F. (x) = s ?. - f. (x). Tl[ f2<x

>]

- S 2I- f l[ f2<X

>] = which is simply the reflection of f~ , (x) in the line y = s ? ,/Z. . Compare y = T?

. (x) in Figure 71

with y = £_. (x) in Figure 62. To obtain y = "?, ? (x) we can write

F12

(x) = f2 [T

l (x)]

= f2 [ S 2l".f l<X

>] ; and because, in this case, f. (x) is symmetrical about the point x = s,

? /2, y = s_./2,

S 21 ~ *1 ^ = f

l

^ s 12 " x^' See Fi8ure IX- 1. Therefore

T.j (x) = f [ s 2i " *i ( x) = ^? ^1 ^ s l? " xH ' w^ich is the reflection of f,

? (x) in the line x = s j,/2. Compare y = f ,_ (x) in Figure 71 with y = f.

? (x) in Figure 62.

If the nonlinearity of a transfer -function is such as to provide stable propagation of ONEs and

ZEROs, that transfer -function is said to be properly nonlinear, or p.n. 1. In general it can be said

that if an element-group transfer -function is p. n. 1. then its reflection in the line x = s/2 or in the

line y = s/2 is also p. n. 1. Therefore, if y = f_ . (x) = f . f

? (x) is p. n. 1. , then

y = F21 (x) = s 21

- f

1 Ff2 (x)J is p.n. 1. And if

y = f . _ (x) = f

? f . (x) is p. n. 1. , then

y = f 12

(x)= f2 li

l (s 12

- x)j is p. n. 1. > 1 for any p.n. 1. transfer -function.

S„ -

y = s

2| -f, (x) = f,(s

l2 -x)

Figure IX-1. Diagram showing that s 21 - f^x) = f^s^ - x) when f^x) is symmetrical

about the point x = 1/2 s 12 , y = 1/2 s 21 145
REFERENCES

1. Kochen, Manfred, "Circle Networks of Probabilistic Transducers", Information and Control,

vol. 2, no. 2 (June 1959) pp 168-182. :

2. Bothwell, T.P. , J. L. DeClue, H. H. Hill, and J. R. Longland, "Asynchronous Logic Technique

for Sixteen Megacycle Clock Rates", I960 IRE Wescon Convention Record Part 4, pp 116-126.

3. Menyuk, N. and J. B. Goodenough, "A Theory of Flux Reversal in Polycrystalline Ferromagnetics", Journal of Applied Physics, vol. 26, (January 1955) pp 8-18.

4. Hogue, E. W. , "A Saturable -Transformer Digital Amplifier with Diode Switching", Proceedings

of the 1956 Eastern Joint Computer Conference T-92, (1957) pp 58-64.

5. Leiner, A. L. , "Buffering Between Input-Output and the Computer", Review of Input and Output

Equipment Used in Computing Systems, AIEE Technical Paper S-53 , (March 1953).

6. Shea, R.F. et al, Principles of Transistor Circuits (New York, John Wiley and Sons, 1953).

BIBLIOGRAPHY

1. Gashkovets, I. and N. P. Vasil'eva, "Questions of Stability of Operation of Closed (or Lengthy)

Schemes Constructed of Certain Types of Logical Elements", Avtomatika i Telemekhanika,

vol. 21, no. 6, (June I960), pp 892-901.

2. Ledley, R. S. , Digital Computer and Control Engineering, (New York, McGraw-Hill Book Co. , 1960).

3. Meyerhoff, A. J. , G. H. Barnes, S. B. Disson, G. E. Lund, Digital Applications of Magnetic

Devices, (New York, John Wiley and Sons, I960).

4. U.S. Patent 2,946,046; July 19, I960 Magnetic Digital Computer Circuit, E. W. Hogue.

146
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