\

\

NBS TECHNICAL NOTE 1003

U.S. DEPARTMENT OF COMMERCE / National Bureau of Standards

Automatic Path Delay Corrections to

GOES Satellite Time Broadcasts

);
NATIONAL BUREAU OF STANDARDS

1

The National Bureau of Standards' was established by an act of Congress March 3, 1901. The Bureau's overall goal is to strengthen and advance the Nation's science and technology and facilitate their effective application for public benefit. To this end, the Bureau conducts research and provides: (1) a basis for the Nation's physical measurement system, (2) scientific and

technological services for industry and government, (3) a technical basis for equity in trade, and (4) technical services to pro- mote public safety. The Bureau consists of the Institute for Basic Standards, the Institute for Materials Research, the Institute for Applied Technology, the Institute for Computer Sciences and Technology, the Office for Information Programs, and the

OflSce of Experimental Technology Incentives Program.

THE INSTITUTE FOR BASIC STANDARDS provides the central basis within the United States of a complete and consist- ent system of physical measurement; coordinates that system with measurement systems of other nations; and furnishes essential services leading to accurate and uniform physical measurements throughout the Nation's scientific community, industry,

and commerce. The Institute consists of the Office of Measurement Services, and the following center and divisions: Applied Mathematics — Electricity — Mechanics — Heat — Optical Physics — Center for Radiation Research — Laboratory Astrophysics^ — Cryogenics^ — Electromagnetics^ — Time and Frequency".

THE INSTITUTE FOR MATERIALS RESEARCH conducts materials research leading to improved methods of measurement, standards, and data on the properties of well-characterized materials needed by industry, commerce, educational insti- tutions, and Government; provides advisory and research services to other Government agencies; and develops, produces, and

distributes standard reference materials. The Institute consists of the Office of Standard Reference Materials, the Office of Air

and Water Measurement, and the following divisions:

Analytical Chemistry — Polymers — Metallurgy — Inorganic Materials — Reactor Radiation — Physical Chemistry.

THE INSTITUTE FOR APPLIED TECHNOLOGY provides technical services developing and promoting the use of avail- able technology; cooperates with public and private organizations in developing technological standards, codes, and test methods; and provides technical advice services, and information to Government agencies and the public. The Institute consists of

the following divisions and centers: Standards Application and Analysis — Electronic Technology — Center for Consumer Product Technology: Product

Systems Analysis; Product Engineering — Center for Building Technology: Structures, Materials, and Safety; ^ Building

Environpaent; Technical Evaluation and Application — Center for Fire Research: Fire Science; Fire Safety Engineering.

THE INSTITUTE FOR COMPUTER SCIENCES AND TECHNOLOGY conducts research and provides technical services designed to aid Government agencies in improving cost effectiveness in the conduct of their programs through the selection, acquisition, and effective utilization of automatic data processing equipment; and serves as the principal focus wthin the executive branch for the development of Federal standards for automatic data processing equipment, techniques, and computer

languages. The Institute consist of the following divisions: Computer Services — Systems and Software — Computer Systems Engineering — Information Technology.

THE OFFICE OF EXPERIMENTAL TECHNOLOGY INCENTIVES PROGRAM seeks to affect public policy and process

to facilitate technological change in the private sector by examining and experimenting with Government policies and practices in order to identify and remove Government-related barriers and to correct inherent market imperfections that impede

the innovation process. THE OFFICE FOR INFORMATION PROGRAMS promotes optimum dissemination and accessibility of scientific information generated within NBS; promotes the development of the National Standard Reference Data System and a system of in- formation analysis centers dealing with the broader aspects of the National Measurement System; provides appropriate services

to ensure that the NBS staff has optimum accessibility to the scientific information of the world. The Office consists of the following organizational units:

Office of Standard Reference Data — Office of Information Activities — Office of Technical Publications — Library —

Office of International Standards — Office of International Relations.

» Headquarters and Laboratories at Gaithersburg, Maryland, unless otherwise noted; mailing address Washington, D.C. 20234.

" Located at Boulder, Colorado 80302.
i mnm or

I

1978 acc

Automatic Path Delay Corrections to

GOES Satellite Time Broadcasts

1(2. / -^'^ S 0S3

J 6 0^

0%

J.V. Cateora

D.W. Hanson

D.D. Davis

Te ciV> ) C-^LiD r-Ciks

. n>. ioo-^

Time and Frequency Division

Institute for Basic Standards

National Bureau of Standards

Boulder , Colorado 80303

lU^S. DEPARTMENT OF COMMERCE, Juanita M. Kreps, Secretary

Sidney Harman, Under Secretary

Jordan J. Baruch, Assistant Secretary for Science and Technology

iNATIONAL BUREAU OF STANDARDS, Ernest Ambler, Director

issued February 1978

imOHBHIB
^ NATIONAL BUREAU OF STANDARDS TECHNICAL NOTE 1003

Nat. Bur. Stand. (U.S.), Tech. Note 1003, 52 pages (February 1978)

CODEN: NBTNAE

U.S. GOVERNMENT PRINTING OFFICE WASHINGTON: 1978

For sale by the Superintendent of Documents, U.S. Government Printmg Office, Washmgton, DC. 20402

Stock No. 003-003-01899-6 Price $2.20 (Add 25 percent additional for other than U.S. mailing)
CONTENTS

1. INTRODUCTION '

]

2. GOES SYSTEM DESCRIPTION 1

3. TIME CODE SYSTEM 3

k. RECEPTION 5

5. DELAY COMPUTATION 7

6. MATHEMATICAL CONSIDERATIONS 9

7. SYSTEM HARDWARE 11

8. SYSTEM SOFTWARE 16

9. PERFORMANCE 27

10. CONCLUSIONS 29 H. REFERENCES 30

APPENDIX 31

FIGURES

FIGURE 1 GOES COVERAGE 2

FIGURE 2 INTERROGATION MESSAGE FORMAT 2

FIGURE 3 TIME CODE GENERATION EQUIPMENT AT THE CDA WALLOPS ISLAND, VIRGINIA 3

FIGURE k TIME CODE FORMAT 3

FIGURE 5 TRACKING NETWORK FOR THE GOES SATELLITES k

FIGURE 6 INTERROGATION CHANNEL SIGNAL CHARACTERISTICS 5

FIGURE 7 INTERROGATION CHANNEL RECEIVER BLOCK DIAGRAM 5

FIGURE 8 INTERROGATION CHANNEL RECEIVER 6

FIGURE 9 DECODER CLOCK 7

FIGURE 10 SMART CLOCK 8

FIGURE 11 DELAY CALCULATOR 8

FIGURE 12 EARTH SATELLITE GEOMETRY FOR SLANT RANGE CALCULATION 9

FIGURE 13 AUTOMATIC DELAY CORRECTING SYSTEM BLOCK DIAGRAM 10

FIGURE ]h MICROPROCESSOR BLOCK DIAGRAM 11

FIGURE 15 MICROPROCESSOR WIRING DIAGRAM 12

FIGURE 16 RAM REGISTER MAP • 13

FIGURE 17 SCIENTIFIC CALCULATOR CHIP INTERFACE 1 't

FIGURE 18 SCIENTIFIC CALCULATOR CHIP INPUT, DATA REQUEST AND OUTPUT CODES 15

FIGURE 19 PROGRAMMABLE DELAY GENERATOR 17

FIGURE 20 DELAY DISPLAY AND INPUT POSITION SWITCHES 18

FIGURE 21 MICROPROCESSOR/CALCULATOR COMPONENT LAYOUT 19

FIGURE 22 DISPLAY BOARD COMPONENT LAYOUT 19

——..—^T-^^^—i,—..«^».|..-—jT-r.^..-^.
FIGURE 23 MICROPROCESSOR/CALCULATOR BOARD (FRONT) 20

FIGURE 24 MICROPROCESSOR/CALCULATOR BOARD (BACK) 21

FIGURE 25 DISPLAY BOARD (FRONT) 22

FIGURE 26 DISPLAY BOARD (BACK) 23

FIGURE 27 SOFTWARE FLOWCHART 2k

FIGURE 28 SOFTWARE FLOWCHART (CONTINUED) 25

FIGURE 29 MEASUREMENT OF UTC(NBS) - SAT/NBS 28

FIGURE 30 UTC(NBS) - GOESI/NBS (UNCORRECTED) 28

FIGURE 31 UTC(NBS) - GOESI/NBS (CORRECTED) 29

FIGURE 32 SATELLITE OUTPUT; CORRECTED AND UNCORRECTED 29

I
AUTOMATIC PATH DELAY CORRECTIONS TO GOES SATELLITE TIME BROADCASTS

J. V. Cateora, D. W. Hanson, and D. D. Davis

In support of the environmental data collection by the National Oceanic and Atmospheric

Administration's (NOAA's) Geostationary Operational Environmental Satellites (GOES), a time code has been incorporated into an interrogation message from these satellites by the National Bureau of Standards (NBS). This message is directed to data-collection

platforms engaged in seismic, tsunami, hydromet and other related monitoring activities.

The NBS has developed this time-code system to serve environmental data users who require

only a few tenths of a second accuracy as well as those who need a more accurate time reference.

The time code is available continuously from two geostationary satellites and provides

a coverage of the Atlantic and Pacific Ocean Basins as well as the North and South

American Continents. The time code includes the necessary information to compensate for free-space propagation delays between the master clock located at Wallops Island, Virginia,

and the user. Preliminary results indicate a timing resolution of 10 ps.

The time-code system is supported by atomic clocks maintained at Wallops Island, Virginia,

the point of origin for all signals to be sent through the satellites. A data-logging system

monitors three television networks and Loran-C to provide a comparison link between the Wallops Island clocks and reference standards at the NBS.

A microprocessor "smart" clock has been developed for the user that automatically corrects

for path and equipment delays and places its recovered time in synchronism with Coordinated

Universal Time (UTC) generated by NBS. This clock, associated recovery equipment, and measured results are discussed in detail in this report.

Key Words: Broadcast; delay correction; microprocessor; satellite; scientific calculations;

t ime of year.

1, INTRODUCTION

A time code has been added by the National Bureau of Standards (NBS) into a communications channel

between the National Oceanic and Atmospheric Administration's (NOAA's) Geostationary Operational Environmental Satellites (GOES) and remote environmental data-gathering platforms. The time code is con- tinuously available throughout the entire Western Hemisphere, offering easy accessibility and moderately

high accuracy at low cost. The time code contains Coordinated Universal Time (UTC) information and Universal Time (UTl) corrections. In addition to the time code, the satellite's position is included

for free-space propagation time corrections. These position data are presently in the form of the sat- ellite's longitude, latitude, and range from the earth's center. The UTC and UTI information is a per- manent feature of these satellites and will remain fixed in format. The satellite position information

may undergo changes in form to improve its performance.

2. GOES SYSTEM DESCRIPTION

There are three GOES satellites in orbit, two in operational status and the third serving as an in- orbit spare. The two operational satellites are located at 135 W and 75 W with the spare at 105 W

longitude. The earth coverages are shown in figure 1.

The mission for the GOES satellites includes (1) continuous photography of the earth's surface,

(2) collection of data on the space environmental Sun/Earth interaction, and (3) collection of remotesensor data including flood, rain, snow, tsunami, earthquake, and air/water pollution monitoring. It is

in this third function that a need for a time code was realized since in many cases, the data are of greater value if labeled with the date as they are collected.

Some of these remote sensors are equipped with both a receiver and transmitter. Upon command from

the satellite, these sensors, called data-collection platforms (DCP's), are activated to transmit stored

data to the satellite. The satellite relays these data to the NOAA Command and Data Acquisition (CDA)

Station at Wallops Island, VA, for processing and dissemination to users. The communications channel

used to activate this response is called the interrogation channel. This channel is continuously

relaying interrogation messages through the satellites. Its format is shown in figure 2.

The interrogation message is exactly one-half second in length or 50 bits, the data rate being

100 b/s. The interrogation message is binary and phase modulates a carrier ± 60 degrees after being

Manchester-encoded; i.e., data and data clock are modulo-2 added before modulating the carrier. An interrogation message consists of the first four bits representing a BCD word of the time code beginning

on the one-half second followed by a maximum length sequence (MLS) 15 bits in length for message syn- chronization and ending with 31 bits as an address for a particular DCP. When a DCP receives and rec- ognizes its unique address, it transmits its data to the satellite. Sixty interrogation messages are required to send the 60 BCD time-code words constituting a time-code frame. The time-code frame begins

on the one-half minute and requires 30 seconds to complete.
60° 90° 120° 150°_E 180° W 150° 120° 90° 60° 30°^ 0° 30° 60°

90=^

Ci3

-r 1 r k

«?

/• ^r:

\

\

7

\ 1 /

y

J

^5^

7° ELEVATION ANGLE 3° ELEVATION ANGLe!

• ^ '

'

' ^ J 90°

1/2 S

FIGURE 1 . GOES COVERAGE

1/2 S 1/2 S 1/2 S

TC INTERROGATION TC INTERROGATION TC INTERROGATION TC INTERROGATION

WORD MESSAGE WORD MESSAGE WORD MESSAGE WORD MESSAGE

TIME CODE FRAME CONSISTING OF: •SYNCHRONIZATION WORD •DAYS, HOURS, MINUTES, SECONDS •UNIVERSAL TIME CORRECTION •SATELLITE POSITION

FIGURE 2. INTERROGATION MESSAGE FORMAT

2
3. TIME CODE SYSTEM

The time code is generated and integrated into tiie interrogation message at the CDA for transmission

to the GOES satellites. The time-code generation system, shown in figure 3, is completely redundant and fully supported by an uninterruptable power supply. There is a communication interface between the equip- ment and NBS/Boulder using a telephone line. Over the telephone line, satellite position information is sent to the CDA and stored in memory for eventual incorporation with the time code and interrogation

message. Data are also retrieved from the CDA via the telephone line to Boulder. These data include the frequency of the atomic oscillators and the time of the clocks relative to UTC as compared to TV trans- missions from Norfolk, VA, and to the Loran-C transmissions from Cape Fear, North Carolina. These data

are stored for retrieval in a data logger similar to that described in reference [1]. The data logger

also measures and stores the time of arrival of the signals from both the Western and Eastern GOES sat- ellites as received at the CDA. Besides the time and frequency monitoring functions, the data logger

provides the information necessary for NBS staff at Boulder to remotely determine if and where malfunctions exist and how to correct for them by switching in redundant system components.

- NBS/BOULDER

TO TO WESTERN EASTERN

SATELLITE SATELLITE

FIGURE 3. TIME CODE GENERATION EQUIPMENT AT THE CDA WALLOPS ISLAND, VIRGINIA

The interrogation message rate, 100 b/s, is generated by the atomic oscillators in the time-code

system. The time-code frame repeats every 30 seconds and begins on the one-half minute as shown in figure k. The time-code frame contains a synchronization word, a time-of-year word (UTC) , the UTl cor- rection, and the satellite's position in terms of its longitude, latitude, and radius. The position

information is presently updated only on the half hour.

40 RITS 32 8 20 16 16 108

SYNC WORD

TIME OF YEAR LONG LAT RAD EXPERIMENTAL USE

UTl 5ATELLI

TIME POSITIO CORRECTIONS ,„ ^

TE

NECOND : 1 "*"" TIME F RAM E

' BEGINS ON 00 AND 30 SECONDS UTC

FIGURE h. TIME CODE FORMAT

3
The satellite position information is generated at Boulder using a CDC 6600 computer and orbital elements

bital elements

furnished by NOAA's National Environmental Satellite Service (NESS) . NEsfge e ates ?hee or- weekly from data obtained from their tr i laterat ion range and range ra?e (rIrT) trackina

.^.In-. • K !^ sa ellite

^^^ ^°'^' ^"'^ ^'^" '" ^^^ =t^^^= °f Washington and Hawaii. The Eastern sites used

IS observed from the CDA, Santiago, Chile, and Ascension Island in the South Atlantic ?he in the R.RR network other than the CDA are known as turn-around ranging stations IaRS)

LONGITUDE

165° EAST 180° WEST 165" 150° 135° 120° 105° 90° 75° 60° 45° 30° I5°WEST 0° EAST 15° 30°

90°

165° EAST 180° WEST 165° 150° 135° 120° 105° 90° 75° 45° 30° 15° WEST 0° EAST 15° 30°

FIGURE 5. TRACKING NETWORK FOR THE GOES SATELLITES
k. RECEPTION

The interrogation channel signals are briefly characterized in figure 6. Typical antennas include

simple low-gain helixes or yagis. A block diagram of the receiver is shown In figure 7. It is shown in figure 8 as three modules: an RF/IF module, an local oscillator injection module, and a demodulator

module. This receiver is a coherent, synchronous digital receiver utilizing a phase-lock loop for demodulation and local oscillator generation and a bit synchronizer for detection purposes.

WESTERN SATELLITE EASTERN SATELLITE

FREQUENCY 468.8250 MHz ^68.8375 MHz

POLARIZATION RHCP RHCP

MODULATION CPSK (+ 60°) CPSK (+ 60°)

DATA RATE 100 BPS 100 BPS

SATELLITE LOCATION 135° W 75° W

SIGNAL STRENGTH

(OUTPUT FROM ISOTROPIC ANTENNA)

-139 dBm -139 dBm

CODING MANCHESTER MANCHESTER

BANDWIDTH 'OO Hz itOO Hz

FIGURE 6. INTERROGATION CHANNEL SIGNAL CHARACTERISTICS

ANTENNA INJECTION FREQUENCY

422.15 MHz

i

INJECTION FREQUENCY

41 .836 MHz

I D>*>-(8>*[MI3*[>l>[>*(g)-

1 6 kHz BW

HARD LIMITER <!-<^h:

FILTER

833245MHz| 720 Hz BW BANDPASS

FILTER

P BIT RATE /<^ DATA DETECTOR

' L 1/ T BIT SYNC

(TIME RECOVERY

LOOP)

LOOP FILTER

._

.

VCO v_ J ~Y~~

DEMODULATOR: PHASE LOCKED LOOP, 2ND ORDER

LOW GAIN LOOP BANDWIDTH: 10 Hz NOISE BANDWIDTH: 20 Hz STEADY STATE ERROR: < 10^ FREQUENCY TRACK: ± 5 kHz

PHASE LOCKED LOOP, 2ND ORDER, HIGH GAIN DAMPING: 0.707

LOOP BANDWIDTH: 5.9 Hz

ilNARY DATA

DATA CLOCK

FIGURE 7. INTERROGATION CHANNEL RECEIVER BLOCK DIAGRAM
*r\.

HX-^ ' L:.

^ -ill iMi ittiii . iBKii 1 i^

*- -ij

['J:!^4 lr?l' lSsli\

i-^ n<^'"^^ ••\^--

V-.1

FIGURE 8. INTERROGATION CHANNEL RECEIVER

The outputs of the receiver data, and data clock are the inputs to a decoder clock (see reference

[2] for a complete description of this clock). The decoder clock shown in figure 9 uses a four-bit micro- processor to demultiplex the data, extract the proper four bits of the time code every one-half second,

and reconstruct the time-code frame. Once decoded, this time is loaded into Random Access Memory (RAM) and updated by incrementing the RAM clock in 10-ms steps by counting the data clock, a 100-Hz squarewave.
'

'"'"^'te-cont''''' ^mal Clock /

^on: 681

FIGURE 9. DECODER CLOCK

DELAY COMPUTATION

A prototype of a "smart" clock is shown in figure 10. The delay calculator is shown in figure 11. This is essentially an addition of a second microprocessor to the decoder clock for the calculation of

the free-space propagation delay from the CDA to the clock via the satellite. This delay value is then

used with a delay generator to compensate for the free-space path delay.
FIGURE 10. SMART CLOCK

FIGURE II. DELAY CALCULATOR

8
The "smart" clock uses the same type of four-bit microprocessor as the decoder clock. The microprocessor is interfaced to a large scale integration scientific calculator array (math chip) to provide the floating point arithmetic and mathematical functions required in the delay calculation.

A 1 -pps output and satellite position as longitude, latitude, and radial deviation from a reference

orbit is obtained continuously from the decoder clock operating on the satellite's transmitted

Interrogation channel signal. User position is entered into the system via thumbwheel switches, and transmitter position (Wallops Island, VA) is contained in the microprocessor software. The computed

delay drives a programmable delay generator to correct the 1 pps from the decoder clock. The resultant

output from the programmable delay generator is a compensated 1 pps, adjusted to be in agreement with

the master clock at Wallops Island, which is referenced to UTC(NBS). The hardware is a multiprocessor

system consisting of two microprocessors plus a slaved scientific calculator chip and a delay generator.

The delay calculation is dependent on knowledge of the broadcasting satellite's position. This

position is predicted in advance by a large scale scientific computer operating on orbital elements

obtained from NOAA and sent to Wallops Island via telephone land line to be broadcast along with encoded

time from each satellite. The delay correction system will work with any satellite in a synchronous

orbit as long as the satellite's position is known. A calculation is made and the result is latched

into the delay generator once per minute. A complete up and down delay calculation requires the execution of about 200 key strokes representing data and mathematical operations and functions under the control of the microprocessor and its associated transistor-transistor-logic (TTL) components.

6. MATHEMATICAL CONSIDERATIONS

The mathematics of the path-delay calculation require solving for length r in the geometry of figure 12; that is, the free-space propagation path between any point on the earth's surface and a geo- stationary satellite (see reference [3] for a more complete discussion of the calculation).

OBSERVING SITE

FIGURE 12. EARTH SATELLITE GEOMETRY FOR SLANT RANGE CALCULATION

Referring to figure 12 and using plane trigonometry:

r =TR + h - 2Rh cos 3, (1)

where r is the range from any point on the earth's surface to the satellite, R is the distance from the satellite to the center of the earth, h is the distance from the receiver to the center of the earth,

and 6 is the central angle between the subsatellite point and the given point. The quantity R is a component defining the satellite's position and is provided in the satellite time-code broadcast.

The quantity h is related to the geodetic latitude ()) of a site by the following equation:

h = a

, ^ 2

1 + b

a

tan <t>

^? 2

»

1 + b tan •P

(2)
where a = 6378.206^4 km, the earth's semi-major axis; and b = 6356.5838 km, the earth's semi-minor axis

(see reference [k])

.

The geocentric latitude, (fi' is related to the geodetic latitude, $, by the following equation.

b^ tan ({)'= -J tan (}) . (3)

In the following discussion X indicates longitude, and subscripts s and r denote subsatellite point

and any other point on the earth's surface respectively.

Only cos 3 remains to be computed. The direct solution may be obtained from the triangle consisting

of the subsatellite point, the observing point, and the intersection of the z-axis (i.e., the North Pole).

Using spherical trigonometry and figure 12:

cos 3 = sin d)^ sin d) + cos A' cos 6 cos (X - X ) ^ r ^s ^ r ^s s r w

These equations are programmed directly by storing key stroke sequences in programmable read-only

memories (PROM's) and executing them In the scientific calculator array under microprocessor control. The calculation Is repeated, first using the transmitter position for the up delay and then using the receiver position for the down delay. The two delays are summed and used in driving the delay generator.

The computed delay is subtracted from 300,000 ys and tens-complemented before being output to the delay generator. Tens-complementing is required because the programmable delay generator uses BCD counters which count in the up direction rather than the down direction. The delay generator setting is also multiplied by 1.024 because one count of the delay generator Is equal to 1 -^ 102,400 Hz = 0.9765625 ps. This frequency Is derived from the satellite-controlled digital clock (see figure 13).

468 HHz Q GOES SATELLITES

ANTENNA

USER'S

RECEIVER

LONGITUDE LATITUDE

5,, 2 6

THUMBWHEEL

I'

SATELLITE-CONTROLLED

DIGITAL CLOCK

/^.PROCESSOR (4004)

SATELLITE

LONGITUDE,

LATITUDE, RANGE

4 ,,

SWITCHES

4004 -BASED DELAY-COMPUTING

/^PROCESSOR

512 kHz

IPPS

UNCORRECTED

POR DELAY

PROGRAMMABLE

DELAY GENERATOR

(TTL) ^ I

LSI/MOS

SCIENTIFIC CALULATOR CHIP

DISPLAY LEDS

^SECONDS DELAY

IPPS CORRECTED

FOR DELAY

FIGURE 13. AUTOMATIC DELAY CORRECTING SYSTEM BLOCK DIAGRAM

The time at the CDA Is advanced by 260,000 ys so it arrives nearly on time at the earth's surface. The delay generator Is programmed to delay the decoder clock's 1 pps by 300,000 ys minus the computed free- space path delay, thus guaranteeing a positive (delay) value since negative values (an advance) cannot

be implemented. Additional delay can be made through software to compensate for transmitter (CDA),

satellite, receiver, and decoder-clock delays, when known, to place the corrected 1 pps in synchronism

with the clock at the CDA.

10
7. SYSTEM HARDWARE

Early in the development effort a decision had to be made about the method to use for the delay

calculation; that is, whether the calculation should be implemented through software or hardware. A software package for doing floating-point arithmetic and mathematical functions was available. Scientific calculators and their large scale integrated circuit chips were also available and their advantages were weighed against the software approach. Calculation execution times for multiply, divide, and

the various mathematical functions were comparable in both methods and were not a factor in the decision'. A software mathematical package for the four-bit microprocessor required about 750 eight-bit bytes or three programmable read-only memory (PROM) chips for program storage. This meant that even the soft- ware method would require extra hardware. The scientific calcuator chip required extra hardware, but since it appeared to have more accuracy and range (scientific notation with dynamic range of QQ -99

10 to 10 ), more mathematical functions, and looked to be generally more flexible, it was the method

chosen. In addition, an existing hardware design was found for interfacing a scientific calculator chip

to an eight-bit microprocessor that could also be used for a foui

bit microprocessor. The software for this design could not be used, however, and new four-bit software had to be written. A four-bit micro- processor was used largely because of past experience with that type. The speed of a newer eight-bit

microprocessor could not be used advantageously because of the slowness of scientific calculator chips in general. A four-bit word size was adequate since the task consisted largely of manipulating four-bit

hexadecimal characters in and out of the calculator chip or RAM or to the delay generator and display

board.

The decision was made to use the four-bit microprocessor and a large scale integration scientific

calculator chip. The microprocessor is shown in figures ]k and 15. The system has been in operation at NBS for several months and its performance shows that the decision was more than satisfactory. The system has very powerful, accurate, and flexible computational capability at low cost and with high

reliability. Key stroke codes must be entered into the math chip and held for kO ms with a 40-ms delay

between entries of key codes. Some of the mathematical functions such as sin and cos require about 1 1/2 seconds to perform. One complete calculation of the total up and down delay, the execution of about 200

key strokes, requires about 1 minute. Satellite position information is output from the decoder clock

twice per minute at Os and 30s. The delay microprocessor idles, waiting for the satellite position

information. When the satellite position is available it is read by the delay microprocessor, stored in RAM, and the delay calculation finished. A complete calculation is performed and the delay generator is reset once per minute.

INPUT PORTS

T4I25

FROM SCIENTIFIC 1 -fTT^

CALCULATOR CHIP

4201 CLOCK IQ FROM RECEIVER POSITION THUMBWHEEL SWITCHES

FROM SATELLITE-CONTROLLED

DIGITAL CLOCK (SAT PCS)

FROM SCIENTIFIC CALCULATOR CHIP

FROM SATELLITE-CONTROLLED

DIGITAL CLOCK (DATA READY)

3 :

RESET

N.

4002 '—I RAH

TO RECEIVER

POSITION THUMBWHEEL

SWITCHES (STROBE)

INPUT PORT SELECT

RAM

OUTPUT PORT

4702 PROM

4702 PROM H

1,2,3

8T26

DATA

IN /OUT

DATA IN/OUT

OUTPUT PORTS 7475

TO SCIENTIFIC CALCULATOR CHIP

TO LED DISPLAY

(DATA)

TO LED DISPLAY

(STROBE)

TO SCIENTIFIC CALCULATOR CHIP

r TO PROGRAMMABLE DELAY t GENERATOR (10,000 /iS)

/to PROGRAMMABLE DELAY L

GENERATOR (1,000 ^S)

TO PROGRAMMABLE DELAY GENERATOR (100 ^S)

TO PROGRAMMABLE DELAY GENERATOR (lO/iS)

FIGURE ]h. MICROPROCESSOR BLOCK DIAGRAM

Since the delay calculations always fall somewhere between 100,000 and 400,000 ps, the decimal point

is assumed to be between the seventh and eighth digits of the calculator chip output. The decimal point

on the display board can therefore be wired.

Approximately once in every ten different computations, the result will contain one or more trailing

zeros. If this happens, since the calculator chip doesn't output trailing zeros for display, the decimal

point will be shifted. The software always checks for this condition and adds 0.01 to the result, thus forcing the decimal point back between digits seven and eight. The range of the programmable delay generator

setting is always between 10,000 and 90,000, so if a decimal point shift occurs, 0.001 is added to the result to again put the decimal point back between digits seven and eight.

11
tl ©©®®©©®©©©®®©®®®0©©©

<

Ou.

a: V) > O

o Q. K « u

< O ^ « O "> <n a tf) a. uj o

12
The delay microprocessor has five four-line input ports and nine four-line output ports, including

one RAM output port, which are used as follows:

Output Port :

1

2

3

to scientific calculator chip

to LED delay display

to LED delay display

to scientific calculator chip

k to programmable delay generator

5 to programmable delay generator

6 to programmable delay generator

7 to programmable delay generator

RAM Output Port :

to receiver position thumbwheel swi tches (strobe)

(Least significant part of key code)

(data)

(strobe)

(Most significant part of key code)

(10,000 ysec)

(1 ,000 ysec)

(100 ysec)

(10 ysec)

Input Port :

1

2

3

from scientific calculator chip (LED code)

from thumbwheel switches (user position)

from satellite-controlled digital clock (satellite position)

from scientific calculator chip (LED code)

from satellite-controlled digital clock (satellite position data ready)

One random access memory (RAM) chip is used for storage of transmitter, receiver, and satellite

positions and for storage of math chip results. Figure 16 is the RAM register map showing how the RAM

is organized. Total RAM storage available on the chip is 80 four-bit BCD characters.

REG CHAR

1 2 3 4 5 6 7 8 9 A B C E F

STATUS CHAR

1 2 3

t 2 5 2

,"5

2 2 5

0.

1

0,

9

,Dio ,"" 0,j

UJ

8

4 REG §

2

1 ,

-

1 >^ • V 's >

4 n• 'o t n

. -

8

4

2

REG

1

1 1 _^ 1

1 '5 V • 6 1

' o' • i' >. 1 1 y • t

.

8

4

2

REG

2

1—1—1—1—1—1—1—1—t—1—1—1—1—1—1—1

1 r~

0^ 7^ 5' • r_i t l 7^ • 8 ^5^ r

t

8

4 REG

-TRANSMITTER POSITION

2

1 3

, ,

FIGURE 16. RAM REGISTER MAP

Figure 17 shows the scientific calculator chip microprocessor interface. The interface was de- signed by Dr. Robert Suding of the Digital Group, Denver, Colorado. The design requires two 4-bit

Input and two ^t-bit output ports. The calculator chip is normally connected to a 12 x 'j matrixed

keyboard giving a 48 key input capability. Only k] keys are actually used. Each key can be repre- sented by a 2-digit hexadecimal key code as shown in figure 18. In normal operation with a keyboard.

13
«

cr O ^ K

11.(1. < u. Q. <

]h

ij
the calculator chip outputs a time sequence of pulses on pins 6 through 17, one at a time. Then, de- pending on which key is depressed, one of the 12 pulses appears on one of the four Y input lines to the

chip. The combination of a pulse at 1 of the 12 digit times on one of the four Y input lines provides

the calculator chip with information on which one of the 48 possible keys has been depressed.

1

1 NPUT CODES FOR FUNCTION ENTRY

FUNCTION HEX FUNCTION HEX FUNCTION HEX FUNCTION HEX

11 ARC IB + 22 CA/CE 3C

1 12 SIN 31 - 23 CHS 2B

2 13 COS 32 X Ik EEX 2C

3 ]k TAN 33 V 25 y'^ 26

k 15 LN 34 = 27 { 28

5 16 LOG 35 n 2A } 29

6 17 RCL 37 r 36 10^ 43

7 18 E 38 l/x k\ e^ 44

8 19 x->->y 39 x2 kl N! 45

9 lA

21 DGRSTO 3A3B

No Op 00 RestoreDisplay IC

INPUT CODES FOR DIGIT DATA REQUEST

DIGIT HEX DIGIT HEX DIGIT HEX DIGIT HEX

1 81 4 84 7 87 10 8A

2 82 5 85 8 88 11 8B

3 83 6 86 9 89 12 8C

OUTPUT CODES FOR SEGMENT DECODE

DIGIT DIGIT AND DIGIT DIGIT AND ALONE HEX DECIMAL PT HEX ALONE HEX DECIMAL PT HEX

kF 0. 6F 7 43 7. 63

1 k2 1. 62 8 5F 8. 7F

2 57 2. 77 9 5B 9. 7B

3 53 3. 73 - 50 -. 70

k 5A k. 7A ERROR 4D ERROR. 6D

5 59 5. 79 ERROR 5D ERROR. 7D

6 5C 6. 7C BLANK 40 BLANK. 60

1

FIGURE 18. SCIENTIFIC CALCULATOR CHIP INPUT, DATA REQUEST AND OUTPUT CODES

The interface was designed to provide the same action as the keyboard but under microprocessor

control. The least significant hexadecimal digit of the code is output by the microprocessor into the 1- 2-4-8 input lines of the 74150 data selector to select one of 12 lines connected to the calculator chip.

At the selected digit time the "8" line (pin 12) of the 7442 BCD-to-decimal converter goes low. At the same time the most significant digit of the hex key code, from output port 3, is going into the 7442 1-2-

4 lines. Since the 7442 "8" is now low, one of its 1-2-3-4 decimal output lines, connected to the calculator Y inputs, can be high depending on the digit input. This provides the same effect as depressing a keyboard key, but it is now under microprocessor control. The "8" bit of output port 3 is used for requesting output data for a specific digit. For example, if data for digit 3 are desired, data request

code 83 is output, the 8 from output port 3 and the 3 from output port 0. At the 3-digit time, pin 10 of

the 74150 data selector goes low and is fed, through an inverter, to the clock input of a 7474 flip-flop.

The "8" part of the data request code is connected to the data input of the 7474 and is clocked through

at the 3-digit time. The 7474 Q output and the 7474 clock input (through an inverter) are connected to

a NOR gate which provides a positive pulse that stays high during all of the 3-digit time.

15
Now the microprocessor only needs to test the "8" bit of its 3 input port for high (negative logic

O) to know when the 7"segment LED data are valid for digit 3- The microprocessor then reads input port

and, with the other three bits of input port 3, has all the information necessary to decode the 7-segment LED data into a BCD character. Note that only 5 of the 7 LED segments are required to decode

all 10 BCD characters. The decimal point output of the calculator chip is used only for detecting

when the calculator chip is "DONE;" that is, when it is providing output. Since the digit 9 decimal

point is always used for output, regardless of what the output might be, digit 9 is used for "DONE"

testing. To test for "DONE," data request code 89 is output and the decimal point ("2" bit of input 3)

is tested for.high. When the decimal point is high, the microprocessor knows that the calculator chip is finished and it either reads the 7"segment LED data for all the calculator chip output digits or it knows

that entry of a key stroke is complete and enters the next key stroke.

The design of the calculator chip requires a key to be held down for at least kO ms and when released

no other key may be pressed for 40 ms. These delays have been implemented by the microprocessor software

to provide the equivalent effect. Figure 18 shows the digit data request codes and the 7-segment LED output codes.

Figure 19 shows details of the programmable delay generator. The delay generator setting for the

lO's of ys comes from output port 7 and the settings for lOO's of lOOO's of ys and 10,000's of ys from output ports 6, 5 and h respectively. Half of a 7^*90 is used to divide the 512 kHz input by five. The 512 kHz comes from the satellite-controlled digital clock which is phase locked to the incoming

satellite radio signal derived from the atomic clock standards at Wallops Island. The period of the 102.4 kHz from the divide by five counter is 9.765625 ys instead of exactly 10 ys. This difference is compensated in the microprocessor/calculator chip software by multiplying the delay generator setting by

1.02').

The delay generator uses five 7^*196 presettable decade up counters. The down-going edge of the 1 -Hz pulse from the satellite-controlled digital clock loads four of the counters with the data latched into the four microprocessor output ports and starts the counters counting in the BCD up direction. The fifth counter is preset to "1" and its output (Ql , pin 5) is the 1-Hz output with the proper delay applied.

The 1 -Hz delayed output is also fed back to the first decade counter (lO's of ys) to stop the counting.

A 7't7'* flip-flop was added to the satellite-controlled digital clock to make its 1-pps output

coherent with the received 100 Hz satellite signal. Because the output from the digital clock is under

microprocessor control, the exact number of instruction steps between the 1 pps varies. The 7't7'* allows

the 1 pps into the delay generator only at rising edge times of the 100 Hz signal. A 7'»121 monostable

multivibrator is used to give the 1 pps delayed output a constant 10 ms pulse width.

Figure 20 shows the 7-segment LEDS which display the calculation results, the uplink delay and

the total uplink plus downlink delays. The display is a convenient monitor of the delays as they are computed. A programmable pocket calculator is used to check the calculations if there is any reason to doubt the displayed results.

j The display uses a 7'*'»2 BCD-to-decimal converter, connected to output port 2, to strobe the TIL-308

LED display digits one at a time. BCD data from output port 1 are connected to all of the LED digits in parallel. Note that all decimal points are wired "off."

j Figure 20 also shows the longitude and latitude thumbwheel switches for input of receiver position.

RAM output port is used to strobe the switches one by one and their setting is read into input port 1 and the data are stored in RAM. Five digits of longitude and four of latitude are entered. Figures 21-

26 provide board layout and component location.

8. SYSTEM SOFTWARE \

The software for the delay microprocessor/scientific calculator chip consists of a main program and

17 subroutines plus an area of PROM for storing the hexadecimal key code equivalents of key strokes. Program storage requires four 256 x 8 PROMs. The program was written to make the package as modular as possible; that is, to keep the main program simple and straightforward, using subroutines wherever

practicable. Each program is discussed below in the order it is stored in PROM.

MAIN PROGRAM , 0-00 to 0-DF, uses about 240 bytes and controls the use of the subroutines as shown by the software flowchart, figures 27 and 28. Odd numbered passes through the main program compute the transmitterto-satellite path delay in microseconds and store it in RAM register 0. Even passes compute the satelliteto-receiver delay. The two delays are then summed, giving the total delay over the path. The computation

is identical for all passes through the program, but the up delay uses the transmitter position and the down delay uses the receiver position. RAM register status character counts the number of passes through the program and is tested for odd or even. ^f odd the up delay is computed and if even the down

delay is computed. Total delay is subtracted from the total clock advance of 300,000 ys and a program- mable delay generator setting is computed and output.

16
a-

,1^

TJ

^

M

l=3„

^u

'^h>

Hi'

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E _;

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17
imtluutlu

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S2sS;t2SSE2=<

8 E S S 2 9 o - " >» e S !

lfl]**ililnTW?Tiyii5i' **

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18
oso

Go

kO ho

B A c OO O

EF

|.o. <

2

1 74 2

3

1 .. (

1 7406

5

1 .,.

2 c2E>

CaD

1 7490 (

J 74196 (J

3

1 74 196 (

^

1 74196 (

5

1 74196 (

6

1 74 4 2 (

,

1 7442 Q K)

7529 -103

O^

Q

CoT?

QD

C°D

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o ::^ o

J02 -1 (^

, S © A^ 4700

h.,2. <

1 74125 (^

8 |m,2. c;

1 74 125 (^

,0 J7„2. <

I

FIGURE 21. MICROPROCESSOR/CALCULATOR COMPONENT LAYOUT.

P o o o

TIL 308 6PLCS

n

'J

I

_:iJ

FIGURE 22. DISPLAY BOARD COMPONENT LAYOUT.

19
I

%

FIGURE 23. MICROPROCESSOR/CALCULATOR BOARD (FRONT).

20
FIGURE Ik. MICROPROCESSOR/CALCULATOR BOARD (BACK)

21

IB

—*'"—
o

is

an<o

22
I

o

23

.-^i.i..——....I .-...»—
( ENTER )

WRITE TRANSMITTER

POSITION INTO RAM

(TPOS)

START GH

EXTRACT UP-DELAY

FROM MATH CHIP (EXTRACT12)

ADD 0.01 AND CALL (EXTRACT12)

DISPLAY UP-DELAY (DISPLAYRAM)

CALCULATE (Z>-

EXECUTE: CA/CE,CA/CE

(KCPROM)

SATELLITE-CONTROLLED

DIGITAL CLOCK /^PROCESSOR

WRITE SATELLITE

POSITION INTO RAM

(SPOS) SATELLITE POS.

ENTER LONG. OF SATELLITE Xs

INTO MATH CHIP (KCRAM)

EXECUTE: -

(KCPROM)

WRITE RECEIVER

POSITION INTO RAM

(RPOS)

ENTER LONG. OF REG Xr

INTO MATH CHIP (KCRAM)

ENTER LONG. OF TRANS. Xj INTO MATH CHIP (KCRAM)

EXECUTE: =,STO

(KPROM)

ENTER LAT OF REC<^R

INTO HATH CHIP (KCRAM)

ENTER LAT OF TRANS.

4>^ INTO MATH CHIP (KCRAM)

EXECUTE: COS,X,(

(KCPROM)

ENTER LAT OF SATELLITE (/>s (KCRAM)

EXECUTE: COS,X,(,

RGL,GOS,),), = ,STO

(KCPROM)

FIGURE 27. SOFTWARE FLOWCHART

2k
ENTER LAT. OF TRANS.

<P^ INTO MATH CHIP (KCRAM)

EXECUTE: SIN.X

(KCPROM)

ENTER LAT OF SATELLITE

(/>s (KCRAM)

EXECUTE: SIN,=,+,RCL,-,STO,

5,. ,9, 8, 1,4,?, CHS, EE,9,x,RCL,+,2,0,.,2, l,3,9,6.EE,9r,^ +

(KCPROM)

ENTER: rj (KCRAM)

EXECUTE: =

(KCPROM)

INCREMENT "NUMBER OF PASSES THROUGH PROGRAM" COUNTER, RAM</) STATUS CHAR (INCREMENT)

ENTER LAT0FRECc/5„

INTO MATH CHIP (KCRAM)

EXECUTE: +

(KCPROM)

ENTER TOTAL UP-DELAY

(KCRAM)

EXECUTE: =

(KCPROM)

EXTRACT TOTAL UPtOOWN

DELAY FROM MATH CHIP (EXTRACT12)

DISPLAY TOTAL UP^DOWN DELAY

(DISPLAYRAM)

EXECUTE: CHS,+,3,0,0,0,0,0,

.,=,x,l,. ,0,2,4, =

, CHS,+,1,0,0,0,0,0,

(KCPROM)

EXTRACT DELAY

GENERATOR SETTING

(EXTRACT12)

ADD 0.01 AND

CALL (EXTRACT12)

^/(fEST5)\^

<MATH CHIP DIGIT #5V^

\^ANK?,^^

ADD 0,001 AND CALL (EXTRACT12)

No

LOAD DELAY GENERATOR

(DELAYGEN)

FIGURE 28. SOFTWARE FLOWCHART (CONTINUED)

25
TESTS , 0-FO to 0-FF (16 bytes), is used for testing the math chip output 5 digit for blank. If found

to be blank, then one or more trailing zeros have occurred in the result and 0.01 is added to the result

to move the decimal point back to its assumed position between digits 7 and 8. Index register pair

and pair k are set up to add the 0.01, but the actual call to KCPROM to do the addition must be made

in the main program to avoid exceeding the limit of three levels of subroutines of the 4004.

KCRAM, 1-00 to 1-lB (28 bytes), reads specified BCD characters from RAM, encodes them into key

codes, and calls INPUTKC to input the key codes to the math chip. KCRAM expects to find RAM/Reg./

Character address in index register pair h and register A of pair 5 to contain the number of characters

to be entered. Register A contains F - (number of characters) + 1. For example, If seven characters are to

be entered: RA is set to 9 = F - 7 + 1 using hexadecimal arithmetic. After reading the proper hexa- decimal character from RAM into index register 1, and using PO as an address, the FIN instruction puts

the encoded equivalent of the hexadecimal character into P3. The key code contained in P3 is then entered

into the math chip by subroutine INPUTKC.

I NPUTKC , 1-20 to 1-3F (32 bytes), enters key codes into the math chip. First a no operation code

(nop = 00) Ts entered, and after kO ms the key code is entered. After another 40 ms delay, the math chip

is tested for "DONE" which is indicated by the appearance of a decimal point. The "DONE" indication may occur immediately after the second kO ms delay if the key code for a single decimal digit is entered or

as long as 1.5 s after the entry of a sin or cos function key code. Return to the calling program cannot

happen until "DONE" occurs.

DECODE , 1-40 to 1-7F (64 bytes), is called by subroutine EXTRACT12 to convert the math chip 7-segment

LED output code to BCD and store it in RAM. DECODE expects to find the most significant part of

the segment code in RO and the least significant part in Rl . The FIN instruction using RO and Rl as an address puts the decoded equivalent, or BCD character, into register pair 5 and it is then stored in RAM.

WRAM , 1-64 to 1-6C (9 bytes) is a subroutine called by TPOS and RPOS to write BCD characters into RAM.

TPOS , l-80 to 1-9F (32 bytes), writes transmitter position into RAMO, register 3- In this case it is the latitude and longitude of Wallops Island, VA. TPOS calls subroutine WRAM to do the writing in RAM.

EXTRACT12 , 1-AO to 1-CO (33 bytes), extracts the 12-digit mathematical result from the math chip in the form of 7-segment LED codes. DECODE is then called to convert the 7-segment LED codes to BCD characters and store them in RAMO, register 0. EXTRACT12 requests each of the 12 digits, one at a time, by

outputting a digit request code and waiting for the "8" bit of input port 3 to become positive (negative

logic "0"). When this happens, the most significant part of the segment code is available at input port 3 and the least significant part is available at input port 0. The digit request codes for digits through

11 are 8l through 8B in hexadecimal notation. With the two-digit segment code contained in register pair 0, DECODE is called to decode and store the equivalent BCD character in RAM.

DiSPLAYRAM , 1-C8 to 1-DC (21 bytes), displays the calculation result stored in RAM 0, register

on 7-segment LED displays. The display is used as an indication that the system is operating properly.

TESTN/S (1-EO to 1-EE, 15 bytes), is called by subroutine RPOS to test the receiver position

thumbwheel switches for a north or south latitude setting. Since the 8 bit of the longitude lOOS position

character is never used in a longitude setting is is wired to the north/south switch of the latitude switches.

If the 8 bit = north latitude is understood and if the 8 bit = 1 a minus sign (CHS key), indicating south

latitude, is attached to the latitude reading.

DELAY40 , 1-F2 to 1-FC (11 bytes) is called by INPUTKC to provide the 40 ms delay required by the math chip between the entry of key stroke codes.

INCREMENT , 2-08 to 2-OE (7 bytes), increments the RAM 0, register status character which indicates

the odd or even passes through the program; that is, the "up" delay and "down" delay passes.

ODD/EV , 2-OF to 2-lD (15 bytes), tests RAM 0, register status character for odd or even numbered

passes through the program and determines whether transmitter position data will be used for the "up"

delay or receiver position data will be used for the "down" delay calculation. If odd, R8 is set equal

to 1 . If even, R8 is set equal to 3. Register pair 4, of which R8 is a part, is used by KCRAM to enter

either the transmitter or receiver position into the math chip.

RPOS , 2-20 to 2-64 (69 bytes), reads the thumbwheel switches containing the receiver position and calls WRAM to write the data into RAM 0, register 1. RPOS calls READL/L to strobe the thumbwheel switches via RAM output port and read in their data.

READL/L , 2-67 to 2-6F (9 bytes), is a subroutine called by RPOS to strobe and read receiver position

data from thumbwheel switches.

DELAYGEN , 2-70 to 2-7D (14 bytes), reads the programmable delay generator setting from RAM 0, register

and outputs it to the delay generator.

26
SPOS , 2-80 to 2-D8 (89 bytes), waits for and reads satellite position data from the decoder clock.

The position data are available only at Os and 30s when the digital clock is updating its display hardware. Since the data are only present for a few machine cycles, they are read as quickly as possible

into RAM 0, register 1 for temporary storage in RAM locations usually reserved for receiver position

storage. After all 13 satellite position characters are read and stored in RAM, SPOS transfers them from

RAM 0, register 1 to register 2 and inserts decimal point and CHS key codes wherever required. RAM 0, register 1 is then free to be used for its usual receiver position storage.

NCHARS , 2-EO to 2-E9 (10 bytes) is a subroutine called by SPOS for writing BCD characters into RAM.

KEY CODE STORAGE , 3-00 to 3-DF (22') bytes), is an area used for storage of the key codes corresponding to the key strokes required by the calculation.

KCPROM, 3-EO to l-f^ (21 bytes) reads specified hexadecimal characters, representing key codes, that are stored in PROM and calls INPUTKC to enter the key codes into the math chip. When called, KCPROM expects to have the PROM address of the first key code in index register pair and the last key code

address + 1 in index register pair h. The FIN instruction, with the PROM address in register pair 0, puts the key code into register pair 3- Pair 3 then transfers the key code to INPUTKC for entry

into the math chip.

The appendix is a listing of the delay microprocessor's software. The program was punched into standard 80 column data processing cards only as a convenient method of documentation. The format of

the listing is as follows:

Column

1

2

3-^

5

6-7

8

9-18

19

20-22

23

2'»-33

^3^-37

38-80

Hexadecimal page or ROM chip number

Blank

Hexadecimal instruction address within ROM chip

Blank

Hexadecimal microprocessor instruction

Blank

1 to 10 character label

Blank

1 to 3 character operation mnemonic

Blank

1 to 10 character operand (data, register, condition, label, etc.)

Blank

Comments

Some 'OO't instructions require two bytes, in which case the second line of the instructions may con- tain data or a jump address.

9. PERFORMANCE

The equation relating the time recovered from the satellite to the master clock at Wallops Island

is given below.

1 2 UTC(NBS) - SAT/NBS = (UTC - CDA) + (CDA EQUIP DELAY) +

free space]

propagation) +

\ DELAY /

ionosphere £1

[troposphere /+ \ DELAY /

27

(satellite

] transponder]

, DELAY /

RECEIVER S]

i CLOCK

I \ DELAY /

mwiBw«iiiwMiiiiimwt<MwnBiiiaBLMlMJII]llll mgmms^mmmm
Term 1 in this equation is known to better than 1 ys using the data logger at the CDA which compares

the CDA clocks to Loran-C and TV line-10. Using the measurement setups of figure 29, the smart-clock

output on the chart recorder will draw a straight line if the orbit predictions are accurate and all equipment delays are constants; i.e., terms 2, k, 5, and 6. Figure 30 shows raw data for 28 days. Each data point represents an average of measurements taken in one day at one-half hour increments totaling 48 measurements per day. Figure 31 shows the same data after removing the CDA clock drift and the two jumps

in delay which have been attributed to equipment changes at the CDA. The orbit predictions used to generate these data were derived from three sets of orbital elements extrapolating as much as 22 days

beyond their date.

receiving

location (longitude

& latitude; L

ipps (corrected for FREE SPACE

PATH DELAY)

Ipps FROM

NBS MASTER CLOCK

-UTC(NBS)-SAT/NBS UNCORRECTED

STRIP CHART RECORDER

/ ^1 '/ /

/ X UTC(NBS) - SAT/NBS CORRECTED

FIGURE 29. MEASUREMENT OF UTC(NBS) - SAT/NBS

UTC(NBS) - GOESl/NBS

A-AVERAGE OF 48 MEASUREMENTS

TAKEN AT HALF HOUR INTERVALS

J L

43031 43035 43039 43043 43047 43051 53055 43059 MJD

FIGURE 30. UTC{NBS) - GOESl/NBS (UNCORRECTED)

28
O f—

in'CCNBSl-GOESl/NBS CORRECTED FOR CLOCK DRIFT

t. EQUIPMENT DELAY CHANGES

AT CDA WALLOPS ISLAND, VA O— AVERAGE OF 48 MEASUREMENTS

TAKEN AT HALF HOUR INTERVALS

ORBITAL ELEMENTS

OF 43019

-^4*-

ORBITAL ELEMENTS

OF 43033 *wORBITAL ELEMENTS

OF 43040

43031 43035 43039 43043 43051 43059 MJD

FIGURE 31. UTC(NBS) - GOESl/NBS (CORRECTED)

The results indicate a consistency in orbit determination and in the stability of equipment delays

of about 10 ys for the period under study. A claim for accuracy cannot be made, however, until the equipment delays at the CDA and in the receiving equipment have been evaluated and more measurements of this type are taken at points separated by large geographical distances.

Portions of the actual charts producing the data just discussed are illustrated in figure 32. The output, uncorrected for the free-space delay, shows a 24-hour diurnal due to the satellite's orbit incli- nation and eccentricity. The corrected output, one point every half hour, lies in a straight line at least to a few microseconds on the average. Because the satellite-position data are updated only every

half hour, the corrected output deviates from a straight line between the half-hour updates at the same

rate shown for the uncorrected output.

'Ipm 2fm 12n 10am Sam 6am 4am 2am 12mn lOpm Spm 6pm

FIGURE 32. SATELLITE OUTPUT: CORRECTED AND UNCORRECTED

10. CONCLUSIONS

The time code has been broadcast from the two GOES satellites for more than one year. It has proven

itself to be a reliable, low cost, and extremely simple system for moderately high-accuracy time. The

time code is now considered a permanent feature of the GOES satellites and should see an expanding list

of users for many purposes within the Western Hemisphere.

29
The results presented here indicate a potential accuracy of 10 to 20 microseconds. These figures

need to be verified, however, by additional observations at widely separated geographical points. Equip- ment delays need further study. The clock drift and the effect of equipment changes at the CDA need to be offset or eliminated to make the time-code system a true one-way time transfer technique.

NBS plans to continue work toward the development of methods to increase the accuracy of the sat- ellite time dissemination system. A more accurate satellite ephemeris generator has replaced an earlier

one. Methods to provide the user with more accurate satellite position information over smaller time

increments or on a continuous basis will be investigated.

11. REFERENCES

[1], Davis, D. D., A microprocessor data logging system for utilizing TV as a time/frequency

transfer standard, (Proc. 8th Annual Precise Time and Time Interval (PTTI) Applications

and Planning Meeting, Goddard Space Flight Center, Greenbelt, MD. , Nov. 30 - Dec. 2, 1976,

pp. 167-181).

[2], Cateora, J. V., Davis, D. D. , and Hanson, D. W. , A Satellite-Controlled Digital Clock,

Nat. Bur. Stand. (U.S.), Tech. Note 681, k] pages, (June 1976).

[3]. Hamilton, W. F. , and Hanson, D. W. , A Synchronous Satellite Time Delay Computer, Nat. Bur. Stand. (U.S.), Tech. Note 638, 30 pages, (July 1973).

[4]. Lewis, E. A., Parametric Formulas for Geodesic Curves and Distances on a Slightly Oblate

Earth, Air Force Cambridge Research Laboratory Report, pp. 63-'t95, (April 1963).

[5]. Hanson, D. W. and Hamilton, W. F. , Experimental Time and Frequency Broadcasts from the ATS-3 Satellite, Nat. Bur. Stand. (U.S.), Tech. Note 645, 107 pages, (Nov. 1973).

30
#f

MNEMONIC

a uO01 51 JMS -

a G£ 6b - TPOS

a 03

Q't MATHEMATICAL FUNCTIONS ARE

Q 05 103 LSI SCIENTIFIC CALCULA

06 THE SATELLITE i'OSITION OAT

a j7 DIGITAL CLOCK 4LS0 INTERFA

J 06 POSITION IS ENTERED VIA TH

09 IS WRITTEN INTO THE MICROP

a OA DELAY OF A 1 HZ PULSE THRO

J uB DISPLAYED ON LEDS. THE 1 OC CONTROLLED DIGITAL CLOCK.

a CD

0£ 51 START JMS -

a OF AO - EXTRACT12

Q lu 50 JMS -

j 11 FO - TEST5

12 Ik JCN AG

Q 13 lA - SKIP. 01

G 1** 53 JMS -

Q 15 £0 - KCPROM

Ifa 51 JMS -

G 17 AO - EXTRACT12

J 18

J 19

lA 51 SKIP. ill JMS -

i 13 C8 - DISPLAYRAM

IC 20 CALCULATE FIM PO

a 10 u U It 28 FIM P"*

a IF 02 2 20 53 JMS -

J 21 EO - KCPROM

a 22 52 JMS - 23 80 - SPOS

2'* 28 FIM P"* u 25 20 2 26 2A FIM p-* Q Z7 AO A 28 51 JMS -

ij 29 00 - KCRAM

3 2A 20 FIM PO

3 28 iJ2 2 2C 28 FIM PW

20 03 3 2£ 53 JMS -

a 2F £0 - KCPROM

3031

32 52 JMS -

Q 33 20 - RPOS

3'f 35

36 52 JMS - 37 OF - ODO/EV

38 D3 LDM 3

a 39 89 XCH R9

u 3A 2A FIM P5

ii 3B 90 9

a 3C 51 JMS - 30 - KCRAM

u 3£

3F

APPENDIX

COMMENTS

NBS DELAY MIC

kOQi* PROGRAM

RADIO PATH DE EARTH VIA A S PERFORMED BY A TOR ARRAY INTERF

A IS PROVIDED BY CEO TO THE MICRO

UMBWHEEL 5WITCHE

ROCESSOR PROGRAM

UGH A PROGRAMMAB

PPS IS PROVIDED

ROPROCESSOR/C

COMPUTES THE

LAY BETWEEN A YNCHRONOUS SA

MOS TECHNOLOG

ACEO TO THE M THE SATELLIT

PROCESSOR. T S AND THE TRA

. THE OUTPUT

LE DELAY GENE

BY THE SATELL

J. V.C

ALCULATOR - THIS

LINE OF SIGHT

NY TWO POINTS ON

TELLITE ALL

Y INC. MPS 7529-

ICROPROCESSOR.

E CONTROLLED

HE RECEIVER

NSMITTER POSITION

CONTROLS THE

RATOR AND IS ALSO

ITE ATEORA SEPT. 1976

EXTRACT 12 DIGIT RESULT FROM MATH CHIP

TEST RESULT FROM MATH CHIP FOR

TRAILING ZEROS WHICH WILL CAUSE A DISPLACEMENT OF THE DECIMAL POINT

IF DISPLACEMENT IS OETECTEO ADD .01 AND EXTRACT NEW RESULT ELSE SKIP AND LEAVE

THE RESULT ALONE

DISPLAY RESULTS STORED IN RAM ADDRESS OF FIRST KEY CODE TO BE EXECUTED

ADDRESS OF LAST KEY CODE TO BE EXECUTED +1

EXECUTE CA/CE

CA/CE

WRITE SATELLITE POSITION IN RAM

FIRST CHARACTER IN RAM TO BE EXECUTED

F-NUMBER OF RAM CHARS+1 TO BE ENTERED INTO

MATH CHIP, THAT IS F-6+l=A

ENTER LONGITUDE OF SAT. INTO MATH CHIP

EXECUTE -

WRITE RECEIVER POSITION INTO RAM

TEST NUMBER OF PASSES THRU PROGRAM (STATUS

CHARACTER) FOR ODD OR EVEN

IF ODD ENTER LONGITUDE OF RECEIVER

IF EVEN ENTER LONGITUDE OF TRANSMITTER

INTO MATH CHIP

ENTER LONGITUDE OF TRANSMITTER OR RECEIVER

INTO MATH CHIP

31 .—MHIHlMimJMI-———
'tO 20 'I 03

42 28

u ^3 05

^1* 53

itS EO hb

(.7 •8 52

J ^9 GF 4A OA

^8 69

3 hC 2A

kD AO kE 51

JfF 50

51

Q 52 20 53 05 54 28

35 08

56 53

G 57 EO

G 58 za

Q 59 26

U 5A 2A

u 5B BO 5C 51

a 5D

Q 5E

G 5F

60 20

Q 61 08

a 62 28

G 63 11

G 64 53

G 65 EO

Q 66

J 67

66 52

G 69 OF 6A DA

J 68 B9

G 6C 2A

j 60 AO 6£ 51

6F

7C

Q 71

G 72 20 73 11

G 74 26

J 75 13

76 53

G 77 £0

78 28

Q 79 26

7A 2A

3 73 BO 7C 51

70

u 7E

u 7F

FIM PQ

3 FIM P4

5 JMS -

• KCPROM

JUS . - ODO/EV

LO RA XCH R9

FIM P5

AJMS - • KCRAM

FIM PO

5 FIM Ph

6 JMS - - KCPROM

FIM P4

2 6 FIM P5

8JMS -

• KCRAM

FIM PO

8 FIM P4

1 1 JMS -

" KCPROM

JMS ^ - ODO/EV

LDM A XCH R9

FIM P5

AJMS - • KCRAM

FIM PO

1 1 FIM P4

1 3 JMS -

- KCPROM

FIM P4

Z 6

FIM P5

BJMS -

- KCRAM

EXECUTE =STO

TEST NUMBER OF PASSES THRU PROGRAM (STATUS

CHARACTER) FOR ODD OR EVEN

IF EVEN ENTER TRANSMITTER LATITUDE

ENTER LATITUDE OF TRANSMITTER OR RECEIVER

INTO MATH CHIP

EXECUTE COS

X

f

ENTER LATITUDE OF SATELLITE INTO MATH CHIP

EXECUTE COS ) X =

( STO

RCL

COS

)

TEST NUMBER OF PASSES THRU PROGRAM (STATUS

CHARACTER) FOR ODD OR EVEN

IF 000 ENTER RECEIVER LATITUDE

IF EVEN ENTER TRANSMITTER LATITUDE

ENTER LATITUDE OF TRANSMITTER OR RECEIVER

INTO MATH CHIP

EXECUTE SIN

X

ENTER LATITUDE OF SATELLITE INTO MATH CHIP

32
dQ 20

81 13

82 28

33 33

3^ 53

85 £0

8b 28

37 2B

88 2A

39 BO 3A 51

88

3C 20

30 33

8£ 28

&F 34

90 53

91 EO

92 52

93 08

9'* 52

95 OF

96 FO

97 01

98 98

99 I'f 9A OE 9B 20

9C Zi* 90 28

9c 35

9F 53

AO EO Al 28

A2 O** A3 2A

Ak 90 A5 51

A6

A7 20 A8 35

A9 28 AA 36 AB 53

AC EO AD 51 AE AO AF

80 50

dl FO 82 H» 83 CO

Qk 53

85 EO 86 51

B7 AO B3

B9

8A

BB

8C

80

BEaF

FIM Pfl 1 3 FIM Pk

3 3 JMS -

- KCPROM

FIM Pk

2 B FIM P5

BJMS - - KCRAM

FIM PO

3 3 FIM P** 3 k

JMS " - KCPROM

JMS - - INCREMENT

JMS • - OOO/EV

CLB

LOM 1 SUB R8 JCN AO

- START

FIM PO

3 1* FIM P<f 3 5 JMS - - KCPROM

FIM Ph

1* FIM P5

9

JMS - > KCRAM

FIM PO

3 5 FIM Pt* 3 6 JMS - - KCPROM

JMS - - EXTRACT12

JMS .

- TESTS

JCN AG

- SKIP. 01

JMS - - KCPROM

JMS - - EXTRACT12

SIN 5 7 * 3 SQRT

— • CHS 2 9 9 EE 6 RCL 8 9 EE

1 X 2 9 STO k RCL 1 = (32 KEY COOES)

ENTER NORMALIZED RANGE OF SATELLITE INTO

MATH CHIP

EXECUTE = INCREMENT RAMO/REGO STATUS CHARACTER EACH

PASS THROUGH PROGRAM

TEST NUMBER OF PASSES THRU PROGRAM JSTATUS

CHARACTER) FOR 000 OR EVEN

IF 000, R8 = 1 UP DELAY COMPUTED GO BACK

TO START AND COMPUTE DOWN DELAY

IF EVEN, R8 = 3 BOTH DELAYS HAVE BEEN

COMPUTED CONTINUE ON

EXECUTE

ENTER TOTAL UP DELAY INTO MATH CHIP

EXECUTE =

EXTRACT TOTAL UP DELAY + TOTAL DOWN DELAY

FROM MATH CHIP

TEST FOR TRAILING ZEROS AND ADJUST IF NECESSARY

33

imam
C CO 51 SKIP. 31 JMS - CI C8 - OISPLAVRAM

C2 20 FIH PO

C3 38 3 B

u Ck 26 FIM P«* C5 56 5 6

a C6 53 JHS - C7 EO - KCPROM

a C8 51 JMS - C9 AC - EXTRACT12

a CA 22 FIM PI CB 35 5 CC 23 SRC PI

J CO E9 ROM

CE B2 XCH R2

CF 00 LOH

oo Fl CLC

01 92 SUB R2

02 IC JCN Al

03 OC » SKIP. 001

Ok 20 FIM FO

05 56 5 6 06 26 FIM ?<*

a 07 5C 5 C Od 53 JMS - 09 £0 - KCPROM

OA 51 JMS - OB AO » EXTRACT12

OC 52 SKIP. 001 JMS - 00 70 • OELAYGEN

OE <»U JUN - OF IC - CALCULATE

EOEl

E2

E3

Ek

E5

E6

E7

Q £S

£9

a £A

EBEC

EO

£E

a EF

FO 22 TESTS FIM PI Fl 05 5 FZ 23 SRC PI F3 E9 ROM

Fk B2 XCH R2

F5 00 LOM

F6 Fl CLC

F7 92 SUB R2

a F8 IC JCN Al

F9 FF - SKIP. 01 FA 20 FIM PO

a F8 36 3 6

a Fc 26 FIM P^*

a FO 38 3 8 FE CI BBL

a FF CO SKIP. 01 BBL

DISPLAY TOTAL UP DOHN DELAY

EXECUTE CHS

DELAY + GENERATOR 3 SETTING =

X

1

. 1

2

<*

CHS

EXTRACT DELAY GENERATOR SETTING

READ RAMO/REGO/CHARACTER 5 INTO R2 TO TEST

FOR BLANK

IF RAM CHAR IS NOT = (BLANK) SKIP

IF RAM CHARACTER = AOO .001 TO PREVENT

TRAILING ZEROS FROM CAUSING A DECIMAL POINT

SHIFT

EXTRACT NEW RESULT

OUTPUT DELAY GENERATOR SETTING

TESTS TESTS FOR MATH CHIP OUTPUT DIGIT

NUMBER 5 BLANK

READ RAMO/REGO/CHARACTER 5 INTO R2 TO TEST

FOR BLANK

IF RAM CHARACTER IS NOT = (BLANK) SKIP

SET UP TO CALL KCPROM TO ADO .01

HOWEVER MAIN PROGRAM flUST MAKE THE CALL OR

ELSE THE LIMIT OF 3 LEVELS OF SUBROUTINES

WOULO BE EXCEEDED IF KCPROM WERE CALLED

FROM HERE. IF RAM CHAR = BLANK RETURN 1 IF RAM CHAR NOT = BLANK RETURN

3k
1 ui;i 20 KCRAM FIM PJ

1 01 10 1 C 1 02 22 FIM PI

1 03

1 Qh Zk FIM P2

1 u5 30 3

1 Q6 29 ENCODE SRC Ph

1 07 E9 ROM

1 08 Bl XCH Rl

1 09 36 FIN P3

1 OA 51 JMS - 1 QB 20 - INPUTKC

1 OC 69 INC R9

1 OD 7A ISZ RA

1 OE 06 - ENCODE

1 OF CO BBL

1 10 11 ZERO

1 11 12 ONE

1 12 13 TWO

1 13 ±1* THREE

1 1** 15 FOUR

1 15 16 FIVE

1 16 17 SIX

1 17 18 SEVEN

1 18 19 EIGHT

1 19 lA NINE

1 lA 21 DEC.PT.

1 IB 26 CHS

1 IC

1 10

1 IE

1 IF

1 20 OO INPUTKC LOM G 1 21 23 SRC PI

1 22 Ft* CMA

1 23 E2 WRR

1 Z^ 25 SRC P2

1 25 FU CMA

1 26 £2 WRR

1 27 51 JMS -

1 28 F2 - DELAVtO

1 29 A7 LO R7

1 2A 23 SRC Pi

1 26 Ft* CMA

1 2C E2 WRR

1 20 A6 LO R6

1 2E 25 SRC P2

1 2F Ft* CMA

1 30 E2 WRR

1 31 51 JMS -

1 32 F2 • DELAY^fO

1 33 06 LOM 6

1 Zi* 23 SRC PI

1 35 E2 WRR

1 36 07 LOM 7

1 37 25 SRC P2

1 38 E2 WRR

1 39 FO OONETEST CLB

1 3A EA RDR

1 3B F6 RAR

1 3C F6 RAR

1 3D lA JCN CO

1 3£ 39 - OONETEST

1 3F CO OONE BBL

FIRST KEY CODE ADDRESS FOR FIN INSTRUCTION

TO SELECT I/O PORTS NJMBER

TO SELECT 1/0 PORTS NUMBER 3

PO CONTAINS ADDRESS OF KEY CODE

PUT KEY CODE INTO P3

WRITE NOP AND KEY CODE TO MATH CHIP, WAIT

FOR OONE

INCREMENT RAM CHARACTER ADDRESS IN R9

INCREMENT NUMBER OF RAM CHARS COUNTER RA RETURN TO MAIN PROGRAM

KCRAM READS SPECIFIED 8CD CHARACTERS FROM

RAM AND ENCODES THEM INTO KEY CODES

THEN CALLS INPUTKC TO INPUT THEM TO MATH

CHIP

BCD CHARACTER A INTERPRETED AS DECIMAL PT. BCD CHARACTER B INTERPRETED AS CHS KEY

INPUTKC INPUTS KEY STROKE COOES AND DATA

TO MATH CHIP ALONG WITH NOP AND WAITS FOR

OONE NOP KEY CODE = 00

WAIT <fO MILLISECONDS

R7 CONTAINS LEAST SIGNIFICANT PART OF KEY

CODE OUTPUT IT TO OUTPORT NUMBER

R6 CONTAINS MOST SIGNIFICANT PART OF KEY

CODE OUTPUT IT TO OUTPORT NUMBER 3

WAIT '0 MILLISECONDS

WRITE OUT 89 FOR DONE TEST (NEC. LOGIC 76)

WRITE 9 TO OUTPORT NUMBER (NEG. LOGIC 6» WRITE 8 TO OUTPORT NUMBER 3 (NEG. LOGIC 7)

INPORT NUMBER 3 STILL SELECTED READ IT

ROTATE DECIMAL POINT LED SEGMENT INTO CARRY

POSITION TO TEST FOR DONE

IF OONE RETURN TO KCPROM OR KCRAM

35

uBi 11iwu.Mi..——u.w--|iiraiiiiMM
1 hQ 00 BLANK

1 '1

1 kZ 10 ONE

1 ^3 70 SEVEN

1 <<

1 k5 3A DECODE FIN P5

1 ^6 29 SRC Pk

1 t*7 AA LO RA

1 '8 EO WRM

1 1*9 69 INC R9

1 'A C5 BBL

1 ^8

1 i*C i 'O EO OVERFLOW

i kE. 1 kf ZERO

1 50 30 MINUS

1 51

1 52

i 53 30 THREE

1 S** 1 55

1 56

1 57 20 TWO

1 58

1 59 50 FIVE

1 5A kO FOUR

1 58 90 NINE

1 5C 60 SIX

1 50 FO -OVERFLOW

1 5E

1 5F 80 EIGHT

1 60 OU BLANK.

i 61

1 62 10 ONE.

1 63 70 SEVEN.

1 6<i Ak WRAM LO Rk

1 65 23 SRC PI

1 66 EO WRH

1 67 63 INC R3

1 63 A5 LO R5

1 69 23 SRC PI

1 6A EC WRM

1 68 63 INC R3

1 6C CO 86L

1 60 EO OVERFLOW.

1 6£

1 6F ZERO.

1 70 BO MINUS.

1 71

1 72

1 73 30 THREE.

1 7k

1 75

1 76

1 77 20 TWO.

1 76

1 79 50 FIVE.

1 7A 1*0 FOUR.

1 78 90 NINE.

1 7C 60 SIX.

1 70 FO -OVERFLOW.

1 7E

1 7F 80 EIGHT.

OECOOE CONVERTS FROM 7 SEGMENT LEO CODE TO BCD AND WRITES BCD INTO RAMO/REGO/CHARS * THRU F ITHIS ROUTINE MUST BE LOCATED AT ADDRESSES kd THRU 7F IN A PROM -- BECAUSE

THE SEGMENT COOES ARE THE ADDRESSES)

USING SEGMENT CODE IN PO AS ADDRESS FETCH

INDIRECT BCD CHARACTER INTO RA OF P5

WRITE BCQ CHARACTER INTO RAM

INCREMENT RAM CHARACTER ADDRESS

RETURN TO EXTRACT12

NOTE THAT IT IS ONLY NECESSARY TO USE 5 OF THE 7 SEGMENTS TO DECODE INTO BCD

WRAM IS CALLED BY SUBROUTINES TPOS AND RPOS

TO WRITE TWO BCD CHARACTERS CONTAINED IN RW

ANO R5 INTO RAM AND IS IMBEDDED INTO

SUBROUTINE DECODE ONLY TO MAKE USE OF BLANK

SPACES THAT ARE IN DEDODE BY NECESSITY

RETURN TO TPOS OR RPOS

36
1 80 22 TPOS

1 61 33

1 62

1 83 2k

1 &k 07

1 85 51

1 86 bk

1 87 Z'f 1 88 5A

1 39 51

1 8A 64

1 68 21* 1 8C 46

1 80 51

1 8E bk

1 dF 24

1 90 u3

1 91 51

1 92 64

1 93 24

1 94 7A

1 95 51

1 96 64

1 97 24

1 98 85

1 99 51

1 9A 64

1 9B 24

1 9C

1 90 51

1 9E 64

1 9F CO

1 AO 22 EXTRACT12

1 Al 04

1 A2 24

1 A3 30

1 A4 26

1 A5 81

1 A6 28

1 A7 04

1 A8 23 NEXTDIGIT

1 A9 A7

1 AA F4

I AB £2

1 AC 25

1 AO A6

1 AE F4

1 AF E2

1 30 FO TESTOIGIT

1 Bl EA

1 82 F4

1 83 F5

1 B4 lA

1 B5 BO

1 B6 EA

1 B7 BO

1 86 23

1 89 EA

1 BA Bl

1 B8 51

1 ac 45

1 BD 67

1 BE 73

1 BF A8

FIM PI

3 3 FIM P2

7 JMS -WRAM

FIM P2

5 A JMS -WRAM

FIM P2

4 6 JMS -WRAM

FIM P2

3 JMS -WRAM

FIM P2

7 A JMS -WRAM

FIM P2

6 5 JMS -WRAM

FIM P2

JMS -WRAM

B8L

FIM PI

4

FIM P2

3FIM P3

8 1 FIM P4

4 SRC PI LO R7

CMA

WRR

SRC P2

LO R6

CMA

WRR

CLB

ROR

CMA

RAL

JON COTESTOIGIT

ROR

XCH Rij SRC PI ROR

XCH Rl JMS -OECOOE

INC fi7 ISZ R3

NEXTDIGIT

TPOS WRITES POSITION OF TRANSMITTER INTO

RAM —- IN THIS CASE WALLOPS ISLANO, VA. LONGITUDE = 75.46, LATITUDE = 37.85

WRITE 07 INTO RAM

WRITE 5. INTO RAM

WRITE 46 INTO RAM

WRITE 03 INTO RAM

WRITE 7, INTO RAM

WRITE 85 INTO RAM

WRITE 00 INTO RAM RETURN TO MAIN PROGRAM

EXTRACT12 EXTRACTS THE 12 DIGIT RESULT FROM

THE MATH CHIP, DECODES IT AND STORES BCD

CHARACTER IN RAMO/REGO

DIGIT DATA REQUEST CODES 81, 82, 83, ETC.

TO SELECT RAM0/REG0/CHARS4 THRU F FOR BCD

STORAGE

WRITE OUT DIGIT REQUEST CODES

L.S.P. OF DIGIT REQUEST CODE TO OUTPORT

M.S. P. OF DIGIT REQUEST CODE TO OUTPORT 3

I/O PORTS 3 STILL SELECTED READ IMPORT

NUMBER 3 IF 8 BIT IS POSITIVE (NEG. LOGIC 0) DIGIT

IS AVAILABLE — IF NOT CONTINUE TESTING

I/O PORTS 3 STILL SELECTED — READ M.S. P. OF SEGMENT COOE FROM INPORT 3 AND STORE IT IN RO READ L.S.P. OF SEGMENT CODE FROM INPORT

AND STORE IT IN Rl

DECODE SEGMENT COOE AND STORE BCD CHARACTER

IN RAM

INCREMENT L.S.P. OF DIGIT REQUEST CODE

IF ALL 12 CODES HAVE BEEN SENT

37

HHHHWHIHII
CO CO B3L

CI

C2

C3

CI* C5

C6

C7

C8 22 OISPLAYRAM FIM PI

RETURN TO MAIN PROGRAM

C9 10

CA Zk

CB 20 CC 26

CD

CE 28

CF Ok

00 25 RRAM

01 A7 02 F4

03 £2

O** 29

05 E9

06 23

07 Ft* 06 £2

09 67

OA 79

OB 00 OC CO 00

OE

OF

EO AA TESTN/S

El F5

E2 12

E3 E9

£^ 2A NORTH

£5

E6 F6

£7 BA £8 CO £9 2A SOUTH

£A 08

EB Fl

EC F6

£0 BA E£ CO EF

FOFl

F2 2C OELAYifO

F3

Fh ZE. F5 AO F6 70 FIRST

F7 F6

F8 70

F9 F6

FA 7£

FB F6

FC Ck

FO

FE

FF

1FIM P2

2FIM P3

FIM Pi* k

SRC P2

LO R7 CHA

HRR

SRC P«t RON

SRC PI CMA

HRR

INC R7 ISZ R9

RRAM

BdL

LO RA RAL

JON CISOUTH

FIM P5

RAR

XCH RA BBL FIM P5

B CLC

RAR

XCH RA 68L

FIM P6

FIM P7

ISZ RCFIRST

ISZ RDFIRST

ISZ REFIRST

88L

OISPLAYRAM DISPLAYS MATH CHIP OUTPUT ON

LEOS, OUTPUT IS STORED IN RAMO/REGO/CHARS

< THROUGH F TO SELECT OUTPORT NO. 2 FOR STROBE OUTPUT

INITIALIZE STROBE TO ZERO

TO SELECT RAMO/REGO/CHARACTERS k THRU F WRITE STROBE TO OUTPORT 2 STROBE IS

OUTPUT BEFORE DATA BECAUSE OF LATCHED

MICROPROCESSOR OUTPUT PORTS PREVENTS

CHARACTERS FROM BEING SHIFTED ON DISPLAY

LEOS

SELECT, READ, WRITE RAM CHAR TO OUTPORT 1 INCREMENT STROBE

INCREMENT RAM CHARACTER ADDRESS

RETURN TO MAIN PROGRAM

TESTN/S TESTS NORTH/SOUTH LATITUDE SWITCH

WHICH IS CONNECTED TO LONGITUDE lOOS

POSITION 8 BIT. IF = LATITUDE IS NORTH

IF = 1 LATITUDE IS SOUTH

SET R8, LATITUDE CHS CHAR, = FOR NORTH

SHIFT LONG, lOOS CHAR. BACK TO NORMAL AND

STORE BACK INTO RA RETURN TO RPOS

SET RB. LATITUDE CHS CHAR, = B FOR SOUTH

CLEAR SOUTH LATITUDE INDICATION

SHIFT LONG. lOOS CHAR. BACK TO NORMAL ANO

STORE BACK INTO RA RETURN TO RPOS

DELAYED PROVIDES THE kd MILLISECONDS

DELAY REQUIRED BETWEEN ENTRIES OF KEY

STROKE COOES INTO MATH CHIP

RETURN TO INPUTKC

38
2 HQ

2 ul

2 02

2 G3

2 O't 2 05

2 j6

2 07

2 ae 26 INCREMENT FIM Pk

2 09 (1 2 OA 29 SRC Pt

2 JB EC ROO

2 OC F2 lAC

2 OO E't WRO

2 0£ CO B3L

2 UF 28 000/EV FIM Ph

2 10 u 2 11 29 SRC Pi* 2 12 EC ROO

2 13 F6 RAR

2 14 lA JCN CO

2 IS lA - EVEN

2 16 F5 000 RAL

2 17 01 LOM 1

2 18 B8 XCH Rd

2 19 CO 8dL

2 Ifl F5 EVEN RAL

2 13 03 LOM 3

2 IC 86 XCH R9

2 10 CC 6BL

2 IE

2 IF

2 20 22 RPOS FIM PI

2 21 13 1 3

2 22 26 FIM P3

2 23 01 1 2 2'* 28 FIM pi* 2 2& 10 1 2 26 52 JMS - 2 27 67 - REAOL/L

a 29 51 JMS - 29 £0 - TESTN/S

2 2A AA LO RA

2 28 Bit XCH Rh

2 2C 52 JMS -

2 20 67 - REAOL/L

2 2£ AA LO RA

2 2F 85 XCH R5

2 30 51 JMS -

2 31 bk - WRAM

2 32 52 JMS .

2 33 67 - REAOL/L

2 3'+ AA LO RA

2 35 8<* XCH R4

2 36 OA LOM A

2 37 85 XCH R5

2 38 51 JMS -

2 39 bk - HRAM

2 3A 52 JMS -

2 3B 67 - REAOL/L

2 3C AA LO RA

2 30 ak XCH R^

2 3E 52 JMS -

2 3F 67 - REAOL/L

INCREMENT INCREMENTS THE NUMBER STORED IN

RAMO/REGO STATUS CHARACTER WHICH RECOROS

NUMBER OF PASSES THRU PROGRAM 000 OR

EVEN PASSES DETERMINE WHETHER TRANSMITTER

OR RECEIVER POSITION WILL BE USED IN THE OtLAY CALCULATION

READ STATUS CHARACTER INTO ACCUMULATOR

INCREMENT ACCUMULATOR

WRITE ACCUMULATOR BACK INTO STATUS CHAR

RETURN TO MAIN PROGRAM

READ STATUS CHARACTER INTO ACCUMULATOR

TEST IF NUMBER IN STATUS CHARACTER IS ODD

OR EVEN

IF 000 SET R8 =1 CAUSES USE OF RECEIVER

POSITION DATA STORED IN RAM

RETURN TO MAIN PROGRAM

IF EVEN SET Rd =3 CAUSES USE OF TRANSMITTER

POSITION DATA STORED IN RAM

RETURN TO MAIN PROGRAM

RPOS WRITES RECEIVER POSITION INTO RAMO/

REGl/CHARACTERS 3 THRU F AFTER READING IT FROM THUMBWHEEL SWITCHES

TO SELECT RAMO OUTPUT PORT R7 = STROBE

TO SELECT INPORT 1 (LONG/LAT DATA)

TEST LONGITUDE lOOS CHARACTER 6 BIT FOR

OR 1 FOR NORTH OR SOUTH LATITUDE

REAU 2 RECEIVER LONG/LAT SWITCHES ANO STORE

2 POSITION CHARACTERS IN RAM

STORE 1 POSITION CHARACTER DECIMAL POINT

IN RAM

STORE 2 POSITION CHARACTERS IN RAM

39

'"''TM'''TM"
2 'IJ AA LO RA

2 m B5 XCH R5

2 t*Z 51 JMS -

2 '3 6<t - WRAM

2 << OC LOM G 2 -tS B^ XCH Rk

2 'e 52 JMS -

2 tt7 67 - READL/L

2 i+e AA LD RA

2 'g B5 XCH R5

2 i+A 51 JMS -

2 'a bk - WRAH

2 i^Z 52 JMS -

2 itO 67 - REAOL/L

2 i»E AA LO RA

2 'F B4 XCH Rk

2 50 OA LOM A

2 51 B5 XCH R5

2 52 51 JMS -

2 53 6«» - HRAM

2 5«t 52 JMS -

2 55 67 - REAOL/L

2 56 AA LO RA

2 57 B«» XCH R** 2 58 52 JMS -

2 59 67 - REAOL/L

2 5A AA LO RA

2 5B 85 XCH R5

2 5C 51 JMS - 2 50 6«» > WRAM

2 5£ AB LO R8

2 5F B«. XCH R4

2 60 00 LOM

2 61 B5 XCH fi5 2 62 51 JMS -

2 63 &< > WRAM

2 6'* CO BBL

2 65

2 66

2 67 27 REAOL/L SRC P3

2 o8 A7 LO R7

2 69 F4 CMA

2 6A El MMP

2 68 29 SRC Pk

2 6C EA ROR

2 60 BA XCH RA

2 6E 67 INC R7

2 6F CO BBL

2 70 22 OELAYGEN FIM PI

2 71 05 5

2 72 24 FIM P2

2 73 <»C k C

2 7<» 23 NEXTCHAR SRC PI

2 75 E9 RDM

2 76 25 SRC PZ

2 77 FW CMA

2 78 E2 MRR

2 79 63 INC R3

2 7A bk INC kk

2 76 75 ISZ R5

2 7C 74 - NEXTCHAR

2 70 CO BBL

2 7£

2 7F

STORE CHS •» 1 POSITION CHARACTER IN RAM

STORE 1 POSITION CHARACTER DECIMAL POINT

IN RAM

STORE 2 POSITION CHARACTERS IN RAM

STORE LATITUDE CHS CHARACTER. WHICH WAS

SAi/EO IN RB BY ROUTINE TESTN/S, IN RAM

RETURN TO MAIN PROGRAM

READL/L WRITES STROBE TO RECEIVER LONGITUDE

LATITUDE THUMBWHEEL SWITCHES VIA RAMO

OUTPORT AND READS IN POSITION

READ LONG/LAT CHARACTER FROM INPCRT 1 TRANSFER LONG/LAT CHAR TO RPOS VIA RA INCREMENT STROBE

RETURN TO RPOS

OELAYGEN OUTPUTS k CHARACTER DELAY

GENERATOR SETTING TO DELAY GENERATOR

TO SELECT OUTPORT h AND SET UP k CHARACTER

COUNTER

READ RAM CHARACTER

WRITE CHARACTER TO OUTPORT « INCREMENT RAM CHARACTER ADDRESS

INCREMENT NUMBER OF OUTPORT

INCREMENT RAM CHARACTER COUNTER

RETURN TO RPOS

itO
^ dC 22 SPOS FIM Pi

2 61 20 2

2 32 2k FIM P2

2 83 ki k 3

2 aw 26 FIM P3

2 65 13 1 2 2 36 25 READS SRC F2

2 37 EA REAOS+1 ROR

2 6a Fl CLC

2 89 95 SUB R5

2 8A IC JCN Al

2 8B 87 - READS+l

2 8C 23 SRC Pi

2 80 EA ROR

2 8£ 27 SRC P3

2 dF £0 WRM

2 9C 77 IS2 R7

2 91 66 - READS

2 92 22 FIM PI

2 93 13 1 3

2 9** 2'* FIM F2

2 95 2u 2

2 96 00 LDM

2 97 Bb XCH Rb

2 93 52 JMS -

2 99 EO - NCHARS

2 9A OA LOM A

2 9a 25 SRC P2

2 9C EO WRM

2 90 65 INC R5

2 9E DE LOM E

2 9F 86 XCH R6

2 AO 52 JMS -

2 Ai EO - NCHARS

2 A2 23 SRC PI

2 A3 FC CL6

2 A-* E9 ROM

2 A5 63 INC R3

2 A6 F6 RAR

2 A7 lA JCN CO

2 A8 AO - MINUS

2 A9 OO POSITIVE LOM

2 AA 88 XCH Ra

2 AB H2 JUN -

2 AC AF - NEXT

2 AD CB MINUS LOM 8

2 AE 38 XCH R3

2 AF OF NEXT LOM F

2 30 B6 XCH R6

2 31 52 JMS -

2 32 EO - NCHARS

2 B3 OA LOH A

2 S** 25 SRC P2

2 85 EO WRM

2 36 65 INC R5

2 87

2 86 OE LOM e

2 39 86 XCH R6

2 3A 52 JMS -

2 86 EO - NCHARS

2 8C A8 LD R6

2 faO 25 SRC P2

2 BE tO WRM

2 8F 65 INC R5

SPUS READS SATELLITE POSITION INFORMATION

FROM DECODER MICROPROCESSOR AND STORES IT IN RAMO/REGl TEMPORARILY THEN LATER

TRANSFERS IT TO REG2

TU SELECT RAMO/REGl/CHARACTERS 3 THRU F TEST DECODER MICROPROCESSOR RAM OUTPUT PORT

FOR 3 IF NOT FOUND KEEP TESTING IF FOUND READ DECODER OUTPORT 1 CONNECTED TO

jELAY MICROPROCESSOR INPORT 2 READ SATELLITE POSITION OATA FROM INPORT 2 WRITE SATELLITE POSITION OATA INTO RAMO/

RE&l

IF 13 SATELLITE POSITION CHARACTERS HAVE

BEEN WRITTEN INTO RAM GO ON TO TRANSFER

TriEM FROM REGl TO RE&2 AND INSERT DECIMAL

POINTS AND CHS WHERE NECESSARY

TO SELECT RAM0/REG2/CHARACTERS THRU F TRANSFER 3 CHARACTERS FROM RAM REGl TO REG2

WRITE OECIML POINT (A) INTO REG2

TRANSFER 2 CHARACTERS FROM RAM REGl TO REG2

IF 6TH CHARACTER IN RAM REGl 1 BIT = THEN

SIGN IS -

IF 6TH CHARACTER IN RAM REGl 1 BIT NOT = C SAVE R9 = FOR SIGN)

IF 6TH CHARACTER IN RAM REGl 1 BIT = SAVE Rd = 6 FOR - SIGN

TRANSFER 1 CHARACTER FROM RAM REGl TO REG2

WRITE DECIMAL POINT (A) INTO RAM REG2

TRANSFER 2 CHARACTERS FROM RAM REGl TO REG2

WRITE OR B SAVED IN R8 INTO REG2 FOR OR

CHS

i»l

BSBBSBHHBEBIBBHHi HBI
2 CG 23 SRC Pi

2 CI FO CLB

2 C2 £9 ROM

2 C3 63 INC R3

2 C* F6 RAR

2 C5 lA JCN CO

2 C6 ce - MINUS

2 C7 OO POSITIVE LOM

2 C6 B8 XCH R8

2 C9 '2 JUN -

2 CA CD - NEXT

2 C8 OB MINUS LOM 8

2 CC 88 XCH R8

2 CD 00 NEXT LOM

2 CE 86 XCH Rb

2 CF 52 JMS -

2 OO £0 - NCHARS

2 01 DA LOM A

2 02 25 SRC P2

2 03 £0 WRM

2 Oh 65 INC R5

2 05 A8 LQ R3

2 06 25 SRC P2

2 07 £0 MRM

2 08 cc BBL

2 09

2 OA

2 08

2 OC

2 00

2 OE

2 OF

2 EO 23 NCHARS SRC PI

2 £1 £9 ROM

2 E2 ft* CMA

2 E3 25 SRC P2

2 Ei* EO WRM

2 £5 63 INC R3

2 E6 65 INC R5

2 E7 76 ISZ R6

2 £8 EO - NCHARS

2 £9 CO BBL

2 EA

2 EB

2 £C

2 £0

2 EE

2 £F

2 Fa

2 Fl

2 F2

2 F3

2 Fk

2 F5

2 F6

2 F7

2 F8

2 F9

2 FA

2 FB

2 FC

2 FD

2 F£

2 FF

IF lOTH CHARACTER IN RAM REGl 1 BIT =0 THEN

SIGN IS -

IF lOTH CHARACTER IN RAM REGl 1 BIT NOT = SAVE R8 = C FOR SIGN

IF IGTH CHARACTER IN RAM REGl 1 BIT = SAVE R8 = e FOR - SIGN

TRANSFER 3 CHARACTERS FROM RAM RfcGl TO REG2

WRITE DECIMAL POINT CA) INTO RAM REG2

HRITE OR 8 SAVEO IN R6 INTO REG2 FOR + OR

CHS

RETURN TO MAIN PROGRAM

NCHARS TRANSFERS A SPECIFIED NUMBER OF

SATELLITE POSITION CHARACTERS FROM RAMO/

REGl TO REG2

INCREMENT RAM REGl CHARACTER ADDRESS

INCREMENT RAM REG2 CHARACTER ADDRESS

INCREMENT NUMBER OF CHARACTERS COUNTER

RETURN TO SPOS

A2
3 00 3C

3 01 3C

3 02 23

3 03 27

3 iih 3B

3 Q5 32

3 06 2«* 3 Q7 28

3 08 32

3 09 Zk

3 OA 26

3 OB 37

3 OC 32

3 GO 29

3 QE 29

3 OF 27

3 10 38

3 11 31

3 12 Zk

3 13 31

3 !' Z7

3 15 22

3 16 37

3 17 27

3 19 38

3 19 16

3 lA 21

3 IB lA

3 IC 19

3 ID 12

3 IE 15

3 IF 18

3 20 28

3 21 2C

3 22 lA

3 23 Zt* 3 Zk 37

3 25 ZZ

3 26 13

3 27 11

3 28 21

3 29 13

3 2A 12

3 28 1<+ 3 2C lA

3 20 17

3 2£ 2C

3 2F lA

3 30 27

3 31 36

3 32 22

3 33 27

3 Zk 22

3 35 27

3 36 22

3 37 21

3 36 11

3 39 12

3 3A 27

3 3a 2B

3 3C 22

3 30 l** 3 3E 11

3 3F 11

CA/CE PROM 3 IS USED FOR KEr STROKE CODE STORAGE

CA/CE ENTER LONGITUDE OF SATELLITE

ENTER LONGITUDE OF TRANSMITTER OR RECEIVER

STO ENTER LATITUDE OF TRANSMITTER OR RECEIVER

COS

X

< ENTER LATITUDE OF SATELLITE

COS

X

(RCL

COS

>

1STO ENTER LATITUDE OF TRANSMITTER OR RECEIVER

SIN

X ENTER LATITUDE OF SATELLITE

SIN

•RCL

STO

5

•9

a -2RH = -5.981't7 X 10»»9

1

7CHS

EE

9XRCL

2

•21 R»*2 H**2 = 20.21396 X 10*»9

3

9

6

EE

9

SORT

ENTER NORMALIZED RANGE OF SATELLITE

ENTER TOTAL UP DELAY FROM RAM

G1XCHS

SUBTRACT TOTAL COMPUTED DELAY FROM 300000.

3 MICROSECONDS

h3

""—« II lllll lilllllimBIIIIMMMlMWimiMiMM^BBMI—^l^Wgl
3 <«CI 11

3 kl 11

3 ^Z 11

3 *t3 21

3 if'+ 27

3 ^5 2<* 3 kb 12

3 t*? 21

3 i*& 11

3 i+g 13

3 itA 15

3 ^B 27

3 'C 28

3 1*0 22

3 <*£ 12

3 kf 11

3 50 11

3 51 11

3 52 11

3 53 11

3 5^ 21

3 55 27

3 56 22

3 57 21

3 58 11

3 59 11

3 5fl 12

3 5B Z7

3 5C

3 50

3 5E

3 5F

3 60

3 61

3 62

3 63

3 bk

3 65

3 66

3 67

33 68

69

3 6A

3 66

3 6C

3 &0

3 6£

3 6F

3 70

3 71

3 72

3 73

3 7k

3 75

3 76

3 77

3 78

3 79

3 7A

3 7B

3 7C

3 70

3 7E

3 7F

X

1

•

2

<»CHS

f1

&

X t*QZk = RATIO BETWEEN DECODER

MICROPROCESSOR CLOCK AND DELAY

MICROPROCESSOR CLOCK FREQUENCIES, THAT IS

THE MINIMUM DELAY GENERATOR STEP IS 9.765625 MICROSECONDS AND NOT 10.

MICROSECONDS

lOS COMPLEMENT DELAY GENERATOR SETTING

BECAUSE OF UP COUNTERS USED IN DELAY

GENERATOR

THESE STROKES ARE USED FOR DECIMAL POINT

ADJUSTMENT OF DELAY GENERATOR SETTING

CALCULATION

kk
3 CO LOCATIONS 6 3 CI FROM THIS L 3 02

3 C3

3 Ck

3 Cb

3 C6

3 C7

3 C8

3 09

3 CA

3 CB

3 CO

3 CO

3 CE

3 OF

3 DO

3 01

3 02

3 03

3 0«* 3 05

3 06

3 07

3 08

3 09

3 OA

3 OB

3 DC

3 00

3 OE

3 OF

3 EO 22 KOPROM FIM PI

3 El O 3 £2 21* FIM P2

3 E3 30 3

3 £< 36 NOP FIN P3

3 E5 51 JMS -

3 £6 20 - INPUTKC

3 E7 71 ISZ Rl

3 E8 EA - TESTAOO

3 E9 bO INC RO

3 £A FO TESTAOO CLB

3 £8 A8 LO R8

3 EO 90 SUB RO

3 ED 10 JCN Al

3 EE £< . NOP

3 EF FO CLB

3 FO A9 LO R9

3 Fl 91 SUB Rl

3 F2 10 JCN Al

3 F3 £« - NOP

3 F** 00 B8L

3 F5

3 F6

3 F7

3 F8

3 F9

3 FA

3 FB

3 FO

3 FO

3 F£

3 FF

LOCATIONS 80 THRU 8F ARE BLANK ANO HAVE BEEN OMITTED

KOPROM ENTERS SPECIFIED KEY CODES STORED IN PROM

TO SELECT I/O PORTS 3 KEY CODE ADDRESS IS IN PO, KEY CODE WILL BE STORED IN P3

WRITE NOP, WRITE KEY CODE, WAIT FOR DONE

INCREMENT KEY CODE A03RESS A2A1 FOR FIN

TEST KEY CODE ADDRESS IN PO TO SEE IF LAST

KEY CODE HAS BEEN EXECUTED —- IF NOT

EXECUTE NEXT ONE.

RETURN TO MAIN PROGRAM

1*5

^IVHH mmmmmMmiiHmiiMimiimiuimiiimmamimiiimtimaaBaa m^a^ga^amBoseammmmmam
NBS-114A (REV. 7-73)

U.S. DEPT. OF COMM.

BIBLIOGRAPHIC DATA

SHEET

1. PUBLICATION OR REPORT NO.

NBS TN-1003

2. Gov't Accession

No.

3. Recipient's Accession No.

4. TITLE AND SUBTITLE

AUTOMATIC PATH DELAY CORRECTIONS TO GOES SATELLITE TIME

BROADCASTS

5. Publication Date February 1978

6. Performing Organization Code 277.06

7. AUTHOR(S)

J. V. Cateora, D. W. Hanson, and D. D. Davis

8. Performing Organ. Report No.

9. PERFORMING ORGANIZATION NAME AND ADDRESS

NATIONAL BUREAU OF STANDARDS

DEPARTMENT OF COMMERCE

WASHINGTON, D.C. 20234

10. Project/Task/Work Unit No. 2776119

11. Contract/Grant No.

12. Sponsoring Organization Name and Complete Address (Street, City, State, ZIP) 13. Type of Report & Period Covered

14. Sponsoring Agency Code

15. SUPPLEMENTARY NOTES

16. ABSTRACT (A 200-word or less factual summary of most significant information. If document includes a significant

bibliography or literature survey, mention it here.)

In support of the environmental data collection by the National Oceanic and Atmospheric

Administration's (NOAA's) Geostationary Operational Environmental Satellites (GOES), a time code has been incorporated into an interrogation message from these satellites by the National Bureau of Standards (NBS). This message is directed to data-collection

platforms engaged in seismic, tsunami, hydromet and other related monitoring activities.

The NBS has developed this time-code system to serve environmental data users who require

only a few tenths of a second accuracy as well as those who need a more accurate time reference.

The time code is available continuously from two geostationary satellites and provides

a coverage of the Atlantic and Pacific Ocean Basins as well as the North and South

American Continents. The time code includes the necessary information to compensate for free-space propagation delays between the master clock located at Wallops Island, Virginia,

and the user. Preliminary results indicate a timing resolution of 10 ys.

The time-code system is supported by atomic clocks maintained at Wallops Island, Virginia,

the point of origin for all signals to be sent through the satellites. A data-logging system

monitors three television networks and Loran-C to provide a comparison link between the Wallops Island clocks and reference standards at the NBS.

A microprocessor "smart" clock has been developed for the user that automatically corrects

for path and equipment delays and places its recovered time in synchronism with Coordinated

Universal Time (UTC) generated by NBS. This clock, associated recovery equipment, and measured results are discussed in detail in this report.

17. KEY WORDS (six to twelve entries; alphabetical order; capitalize only the first letter of the first key word unless a proper name; separated by semicolons)

Broadcast; delay correction; microprocessor; satellite; scientific calculations;

time of year.

18. AVAILABILITY XJXX Unlimited

I

' For Official Distribution. Do Not Release to NTIS

iX)^ Order From Sup. of Doc, U.S. Government Printine Offic Washington, D.C. 20402, SD Cat. No. CI 3. 46 : 1 003

I

^ Order From National Technical Information Service (NTIS)

Springfield, Virginia 22151

19. SECURITY CLASS

(THIS REPORT)

UNCLASSIFIED

20. SECURITY CLASS

(THIS PAGE)

UNCLASSIFIED

22. Price

$2.20

USCOMM-DC 29042-P' *U.S. Government Printing Office: 19 7 8-777-06 7/12 34 Regions


^P PERIODICALS

JOURNAL OF RESEARCH—The Journal of Research

of the National Bureau of Standards reports NBS research and development in those disciplines of the physical and

engineering sciences in which the Bureau is active. These

include physics, chemistry, engineering, mathematics, and

computer sciences. Papers cover a broad range of subjects, with major emphasis on measurement methodology, and

the basic technology underlying standardization. Also in- cluded from time to time are survey articles on topics closely

related to the Bureau's technical and scientific programs. As

a special service to subscribers each issue contains complete

citations to all recent NBS publications in NBS and non- NBS media. Issued six times a year. Annual subscription: domestic $17.00; foreign $21.25. Single copy, $3.00 domestic;

$3.75 foreign. Note: The Journal was formerly published in two sections: Section A "Physics and Chemistry" and Section B "Mathematical Sciences." DIMENSIONS/NBS

This monthly magazine is published to inform scientists, engineers, businessmen, industry, teachers, students, and

j consumers of the latest advances in science and technology,

1 with primary emphasis on the work at NBS. The magazine

highlights and reviews such issues as energy research, fire protection, building technology, metric conversion, pollution

abatement, health and safety, and consumer product per- formance. In addition, it reports the results of Bureau proj grams in measurement standards and techniques, properties

of matter and materials, engineering standards and services, instrumentation, and automatic data processing.

[ Annual subscription: Domestic, $12.50; Foreign $15.65.

NONPERIODICALS

! Monographs—Major contributions to the technical liter- ature on various subjects related to the Bureau's scientific and technical activities. Handbooks—Recommended codes of engineering and industrial practice (including safety codes) developed in cooperation with interested industries, professional organizations, and regulatory bodies.

Special Publications—Include proceedings of conferences

sponsored by NBS, NBS annual reports, and other special

publications appropriate to this grouping such as wall charts, pocket cards, and bibliographies.

Applied Mathematics Series—Mathematical tables, manuals, and studies of special interest to physicists, engineers,

chemists, biologists, mathematicians, computer programmers,

and others engaged in scientific and technical work.

National Standard Reference Data Series—Provides quantitative data on the physical and chemical properties of

materials, compiled from the world's literature and critically evaluated. Developed under a world-wide program coordinated by NBS. Program under authority of National

Standard Data Act (Public Law 90-396).

NBS TECHNICAL PUBLICATIONS

NOTE: At present the principal publication outlet for these data is the Journal of Physical and Chemical Reference Data (JPCRD) published quarteriy for NBS by the American Chemical Society (ACS) and the American Institute of

Physics (AIP). Subscriptions, reprints, and supplements

available from ACS, 1155 Sixteenth St. N.W., Wash., D.C.

20056.

Building Science Series—Disseminates technical information developed at the Bureau on building materials, components,

systems, and whole structures. The series presents research

results, test methods, and performance criteria related to the

structural and environmental functions and the durability

and safety characteristics of building elements and systems. Technical Notes—Studies or reports which are complete in themselves but restrictive in their treatment of a subject.

Analogous to monographs but not so comprehensive in scope or definitive in treatment of the subject area. Often

serve as a vehicle for final reports of work performed at NBS under the sponsorship of other government agencies.

Voluntary Product Standards—Developed under procedures

published by the Department of Commerce in Part 10, Title 15, of the Code of Federal Regulations. The purpose

of the standards is to establish nationally recognized require- ments for products, and to provide all concerned interests with a basis for common understanding of the characteristics of the products. NBS administers this program as a supple- ment to the activities of the private sector standardizing

organizations.

Consumer Information Series—Practical information, based on NBS research and experience, covering areas of interest

to the consumer. Easily understandable language and

illustrations provide useful background knowledge for shopping in today's technological marketplace.

Order above NBS publications from: Superintendent of Documents, Government Printing Office, Washington, D.C.

20402. Order following NBS publications—NBSIR's and FIPS from

the National Technical Information Services, Springfield, Va. 22161.

Federal Information Processing Standards Publications (FIPS PUB)—Publications in this series collectively constitute the Federal Information Processing Standards Register.

Register serves as the official source of information in the Federal Government regarding standards issued by NBS

pursuant to the Federal Property and Administrative Services Act of 1949 as amended, Public Law 89-306 (79 Stat. 1127), and as implemented by Executive Order 11717

(38 FR 12315, dated May 11, 1973) and Part 6 of Title 15 CFR (Code of Federal Regulations).

NBS Interagency Reports (NBSER)-—A special series of

interim or final reports on work performed by NBS for outside sponsors (both government and non-government).

In general, initial distribution is handled by the sponsor;

public distribution is by the National Technical Information

Services (Springfield, Va. 22161) in paper copy or microfiche form.

BIBLIOGRAPHIC SUBSCRIPTION SERVICES

\m

The following current-awareness and literature-snrvey bibli- ographies are issued periodically by the Bareau:

Cryogenic Data Center Current Awareness Service. A litera- ture survey issued biweekly. Annual subscription: Domestic, $25.00; Foreign, $30.00.

Liquified Natural Gas. A literature survey issued quarterly. Annual subscription: $20.00.

Superconducting Devices and Materials. A literature survey

issued quarterly. Annual subscription: $30.00. Send subscription orders and remittances for the preceding bibliographic

services to National Bureau of Standards, Cryogenic Data

Center (275.02) Boulder, Colorado 80302.
U.S. OEPARTMENT OF COMMERCE

National Bureau of Standard*

Washington, O.C. 80234

OFFICIAL BUSINESS

Penalty for Private Use. S300

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