# Patent

## Title
Method and apparatus for controlling power converter with inverter output filter

## Abstract

Power converters and methods are presented for driving an AC load connected through an intervening filter circuit, in which at least one filter current or voltage signal or value is determined according to feedback signals or values representing an output parameter at an AC output of the power converter, and AC electrical output power is generated at the AC output based at least partially on the at least one filter current or voltage signal or value.

## Background
REFERENCE TO RELATED APPLICATION
This application is a continuation-in-part of, and claims priority to and the benefit of, U.S. patent application Ser. No. 13/742,405, filed on Jan. 16, 2013, entitled METHOD AND APPARATUS FOR CONTROLLING POWER CONVERTER WITH INVERTER OUTPUT FILTER, the entirety of which application is hereby incorporated by reference.


BACKGROUND
Power conversion systems are used to generate and provide AC output power to a load, such as a single or multi-phase AC motor driven by an inverter stage of a motor drive power converter. Pulse width modulated (PWM) output inverters provide output currents and voltages including a number of pulses, and output filters are sometimes employed between the power converter and the driven load to reduce the high frequency content caused by pulse width modulation. The presence of the output filter between the power conversion system and the load, however, makes accurate control of the voltages and/or current provided to the load more difficult, as the power delivered to the load is different from that delivered to the input of the filter. In particular, the output inverter stage may be controlled according to feedback signals measured at the inverter output terminals, and these feedback values may not represent the currents or voltages ultimately provided to the load. Feedback sensors can be provided at the load itself for direct measurement of the load parameters, but this increases system cost, and may not be possible in all applications. Accordingly, there is a need for improved power conversion systems and techniques for driving a load through an intervening filter circuit by which load control can be facilitated without requiring extra feedback sensors positioned at the load and without significant modification to the inverter control system of the power converter.
SUMMARY
Various aspects of the present disclosure are now summarized to facilitate a basic understanding of the disclosure, wherein this summary is not an extensive overview of the disclosure, and is intended neither to identify certain elements of the disclosure, nor to delineate the scope thereof. Rather, the primary purpose of this summary is to present various concepts of the disclosure in a simplified form prior to the more detailed description that is presented hereinafter.
Power conversion systems and operating methodologies are disclosed for powering a load through an intervening filter circuit, which find utility in association with motor drives or other forms of power converters, and may be employed to power or drive any form of load, such as a single or multi-phase permanent magnet synchronous motor (PMSM). These techniques may be successfully implemented to facilitate improved control over driven motors and other loads without significant change to inverter controller configuration and without requiring the addition of direct feedback sensors at the load.
Power converters are disclosed, which include an inverter and an associated controller that determines one or more filter currents or voltages representing one or more filter capacitor currents or filter inductor voltages of the intervening filter circuit, based on one or more inverter output feedback signals or values. The controller provides inverter switching control signals based at least in part on the filter currents or voltages. In certain embodiments, the power converter may be a motor drive, with the inverter providing output power to drive a motor load through the intervening filter circuit.
In certain embodiments, the controller computes a current setpoint based on a desired velocity and motor velocity, and computes a filter capacitor current value according to the inverter output frequency, a compensated voltage reference, and a filter capacitance value. The controller computes a compensated current setpoint value based on the current setpoint and the filter capacitor current value, and provides the inverter switching control signals based at least partially on the compensated current setpoint. For implementations which incorporate voltage sensors at the output of the inverter or the output of the filter, the signals from those sensors can optionally be used in place of the compensated voltage reference.
In various embodiments, the controller computes a voltage reference based on the compensated current setpoint and on output current feedback representing an output current at the inverter output. The controller computes a feed forward voltage value based on the output current feedback, the inverter output frequency, the filter capacitor current value, and on a filter inductance value. The controller computes a compensated voltage reference value based on the voltage reference and the feed forward voltage reference, and provides the inverter switching control signals based at least partially on the compensated voltage reference value.
Methods are provided for controlling an AC electric motor connected to a motor drive through an intervening filter circuit. The method includes determining at least one filter current or voltage representing a filter capacitor current or filter inductor voltage of the intervening filter circuit based on at least one motor drive output feedback signal or value representing an output current at the AC output of the motor drive, and generating AC electrical output power at the motor drive output at least partially according to the filter current or voltage.
In certain embodiments, the method includes determining a filter capacitor current value representing current flowing in a filter capacitor of the intervening filter circuit based on an inverter output frequency signal or value, a compensated voltage reference or measured voltage value, and a filter capacitance value. The compensated current setpoint value is computed based at least partially on the filter capacitor current value, and the inverter switching control signals are provided at least partially according to the compensated current setpoint value.
Certain embodiments of the method further include determining at least one current setpoint signal or value based at least partially on a desired motor velocity and the motor velocity signal or value, as well as computing the compensated current setpoint value based on the current setpoint value and the filter capacitor current value.
In certain embodiments, moreover, the method includes computing a voltage reference value based on the compensated current setpoint value and at least one inverter output current feedback signal or value representing an output current at the inverter output. In addition, a feed forward voltage reference value is computed based on the inverter output current feedback signal(s) or value(s), and a compensated voltage reference value is determined based on the voltage reference value and the feed forward voltage reference value, with the inverter switching control signals being provided at least partially according to the compensated voltage reference value.
Non-transitory computer readable mediums are provided with computer executable instructions for controlling an AC electric motor connected to a motor drive through an intervening filter circuit according to the described methods.



BRIEF DESCRIPTION OF THE DRAWINGS
The following description and drawings set forth certain illustrative implementations of the disclosure in detail, which are indicative of several exemplary ways in which the various principles of the disclosure may be carried out. The illustrated examples, however, are not exhaustive of the many possible embodiments of the disclosure. Other objects, advantages and novel features of the disclosure will be set forth in the following detailed description when considered in conjunction with the drawings, in which:
FIG. 1 is a simplified schematic diagram illustrating a motor drive with an inverter controller configured to control motor current based on sensed inverter output current signals or values while compensating for the presence of an output filter between the motor drive output and a driven permanent magnet synchronous motor (PMSM);
FIG. 2 is a schematic diagram illustrating further details of the inverter controller of FIG. 1;
FIG. 3 is a schematic diagram illustrating further details of a filter current calculation component, a current reference component, as well as a current proportional-integral (PI) feed forward component of the inverter controller of FIGS. 1 and 2;
FIG. 4 is a flow diagram illustrating a process for driving a motor load through an intervening filter circuit; and
FIG. 5 is a schematic diagram showing the components of an alternative form of the output filter.



DETAILED DESCRIPTION
Referring now to the figures, several embodiments or implementations are hereinafter described in conjunction with the drawings, wherein like reference numerals are used to refer to like elements throughout, and wherein the various features are not necessarily drawn to scale.
Power converters and methods are disclosed for controlling a load connected through an intervening filter circuit, by which improved control may be facilitated without the addition of extra feedback sensors or extensive modifications to inverter output control schemes. These concepts are hereinafter described in the context of a motor drive power converter controlling an AC permanent magnet synchronous motor (PMSM), although the invention is not limited to motor drive type power converters, or to PMSM type loads. Many of the described embodiments utilize only the measurements of inverter output currents (without directly sensing voltages and/or currents at the driven motor load), and hence facilitate the addition of an intervening filter to any motor drive/driven motor system without significantly impacting cost and/or complexity. Consequently, the presently disclosed power conversion systems and methods present a significant advance over attempts to introduce additional cascaded control loops, adaptive full-order observers, and/or other complicated processing components or steps into a PMSM inverter vector control architecture, and also facilitate improved motor control without requiring extra hardware or major changes in the control structure for a conventional PMSM drive or other type of power conversion system.
Many of the disclosed examples include a simple control scheme for PMSM drives with an inverter output filter considering filter dynamics, without use of any additional hardware. Other disclosed embodiments use voltage sensors which may be optionally available to measure the output voltage of the inverter or the filter. Various embodiments, moreover, may be employed in a variety of power conversion systems, including without limitation voltage source AC drives equipped with an output filter, or power converters installed for driving a motor through an intervening output filter, whether the intervening filter circuit is integral to the drive or not. The disclosed apparatus and methods thus provide a simple solution to consider output filter dynamics with improved performance without major hardware or software changes on an existing drive. Many of the disclosed techniques, moreover, require only the measurements of the inverter output current without additional sensors to provide direct voltage and/or current values from the driven load, and thus, a filter can be easily added to an existing drive without any hardware modifications. In certain embodiments, moreover, an improved current reference generator is provided, and a new feedforward control is provided for a current loop proportional/integral (PI) controller in an inverter controller.
FIG. 1 shows a permanent magnet synchronous motor (PMSM) drive 40 with an inverter 46 and an inverter controller 100 configured to control current of a driven motor load 20 based on sensed inverter output current signals or values iu, iv, iw representing output currents flowing at the AC output 46B of the inverter 46. The controller 100, moreover, is configured to compensate for the presence of an output filter 30 connected between the motor drive output 46B and the driven motor 20.
As seen in FIG. 1, the drive 40 receives single or multiphase AC input power from a power source 10 and converts this to a DC bus voltage using a rectifier 42 providing a DC output voltage to a DC link circuit 44 having a capacitor C. The rectifier 42 can be a passive rectifier including one or more diode rectifier components, or may be an active front end (AFE) system with one or more rectifier switching devices (e.g., IGBTs, etc.) and an associated rectifier controller (not shown) for converting input AC electrical power to provide the DC bus voltage in the link circuit 44. Other configurations are possible in which the drive 40 receives input DC power from an external source (not shown) to provide an input to the inverter 46, in which case the rectifier 42 may be omitted. The DC link circuit 44, moreover, may include a single capacitor C or multiple capacitors connected in any suitable series, parallel and/or series/parallel configuration to provide a DC link capacitance across the inverter input terminals 46A. In addition, while the illustrated motor drive 40 is a voltage source converter configuration including one or more capacitive storage elements in the DC link circuit 44, the various concepts of the present disclosure may be implemented in association with current source converter architectures in which a DC link circuit 44 includes one or more inductive storage elements, such as one or more series-connected inductors situated between the source of DC power (e.g., rectifier 42 or external DC source) and the input 46A of the inverter 46. In other possible implementations, the motor drive 40 includes a direct DC input to receive input power from an external source (not shown), and in certain embodiments the rectifier 42 and DC link circuit 44 may both be omitted.
The inverter 46 includes a DC input 46A having first and second (e.g., plus and minus) terminals connected to the DC link circuit 44, as well as a plurality of switching devices S1-S6 coupled between the DC input 46A and the motor drive AC output 46B. In operation, the inverter switching devices S1-S6 are actuated by inverter switching control signals 102 provided by the controller 100 in order to convert DC electrical power received at the DC input 46A to provide AC electrical output power as voltages, vu, vv, and vw and output currents iu, iv, and iw at the AC output 46B. The filter circuit 30 receives the AC output from the inverter 46 of the motor drive 40, and is thereafter connected to the phase windings of the motor load 20. Although illustrated as driving a permanent magnet synchronous motor 20, the motor drive 40 can be employed in connection with other types of AC motor loads 20 and/or other forms of power converters to drive non-motor loads 20 using an output inverter 46. In the illustrated system, moreover, one or more feedback signals or values may be provided from the motor 20 itself, including a motor (e.g., rotor) position or angle signal θr and a motor speed or velocity signal ωr, although not a strict requirement of all embodiments of the present disclosure. In this regard, the motor drive 40 in certain embodiments implements a motor speed and/or position and/or torque control scheme in which the inverter controller 100 selectively provides the switching control signals 102 in a closed and/or open-loop fashion according to one or more setpoint values such as a motor speed setpoint ωr*. In practice, the motor drive 40 may also receive a torque setpoint and/or a position (e.g., angle) setpoint, and such desired signals or values (setpoint(s)) may be received from a user interface and/or from an external device such as a distributed control system, etc. (not shown).
As seen in FIG. 1, moreover, the motor drive 40 is connected to the load 20 through an intervening filter circuit 30. In the illustrated example, the filter 30 is an “L-C” configuration in which each of the power converter output lines is connected to the motor through a series-connected filter inductor Lf, with a corresponding filter capacitor Cf connected between the corresponding motor line and a common connection point (a neutral of a Y-connected set of filter capacitors Cf in the illustrated example). Other implementations are possible in which the filter capacitors Cf are connected in a “Delta” configuration. In the illustrated (Y-connected) configuration, moreover, the filter circuit neutral point can be optionally connected to a circuit ground or other, connection point associated with the motor drive 40, although not a strict requirement of the present disclosure. The disclosed apparatus and techniques can be employed in connection with other forms and types of filter circuits 30, including without limitation L-C-L circuits, etc., of which behavior can typically be modeled as a second order system or filters which contain multiple inductive, capacitive, and resistive elements as illustrated in FIG. 5. As seen in FIG. 1, moreover, the phase currents im provided to the motor load 20 from the output of the filter circuit 30 will control the operation of the motor 20, whereas filter currents ic (i.e., filter capacitor currents) may flow in the filter capacitors Cf and non-zero voltages vL (i.e., filter voltages) may develop across one or more of the filter inductors Lf, whereby simple closed-loop control based on measured inverter output current signals or values iu, iv, iw may result in less than optimal operation of the driven load 20. At the same time, however, directly measuring the motor currents im and/or motor voltages would require additional hardware and cabling, which may not be economically feasible or technically possible in certain applications. Nevertheless, for those cases where motor currents and/or motor voltages, such as vu, vv, vw, vf_out_u, vf_out_v, and vf_out_w in FIG. 1, are measured it is understood that those signals can be used to enhance or replace the inverter current and/or voltage signals in the computation of the compensation signals.
Referring also to FIGS. 2-4, the drive 40 includes one or more current sensors configured to measure, sense, or otherwise detect at least one inverter output feedback signal or value (e.g., output currents iu, iv, iw) which represent the output current at the AC output 46B of the inverter 46, and the controller 100 is programmed or otherwise configured to determine at least one filter current or voltage signal or value representing a filter capacitor current is or filter inductor voltage vL of the intervening filter circuit 30 based at least in part on the inverter output feedback (e.g., iu, iv, iw), and to provide the inverter switching control signals 102 at least partially according to the filter current or voltage signals or values. In this manner, the inverter controller 100 accommodates the presence of the filter circuit 30 between the motor drive output 46B and the driven motor load 20, without requiring addition of external sensors. Moreover, the controller 100 can implement an otherwise conventional motor control scheme without having to provide complicated observer components or otherwise modifying the closed loop control for driving the motor load 20. The controller 100 and the components thereof may be any suitable hardware, processor-executed software, processor-executed firmware, logic, or combinations thereof that are adapted, programmed, or otherwise configured to implement the functions illustrated and described herein. The controller 100 in certain embodiments may be implemented, in whole or in part, as software components executed using one or more processing elements and may be implemented as a set of sub-components or objects including computer executable instructions for operation using computer readable data executing on one or more hardware platforms such as one or more computers including one or more processors, data stores, memory, etc. The components of the controller 100 may be executed on the same computer processor or in distributed fashion in two or more processing components that are operatively coupled with one another to provide the functionality and operation described herein.
FIGS. 2 and 3 illustrate further details of a nonlimiting embodiment of the inverter controller 100, and FIG. 4 illustrates a process for driving a motor load 20 through an intervening filter circuit 30 which may be implemented in whole or in part via the inverter controller 100 in certain embodiments. As seen in FIG. 2, the inverter controller 100 receives a desired motor velocity signal or value ωr* (e.g., from a user interface or other setpoint source) along with a motor velocity signal or value ωr. The velocity signal or value ωr can be obtained from any suitable source, and may be provided through, or derived from, feedback signals from the motor load 20 in certain embodiments, although not a strict requirement of the present disclosure. In addition, the controller 100 receives phase current feedback signals or values iu, iv, iw representing the output currents at the AC output 46B of the motor drive 40 (e.g., from output current sensors as seen in FIG. 1), and a DC bus voltage signal or value Vdc. The operating parameters and variables illustrated and described herein can be one or both of signals and/or values (e.g., digital values), and the controller 100 and other components of the motor drive 40 may include various analog-to-digital converters as well as digital-to-analog conversion components. Moreover, various parameters computed and used by the controller 100 and the components thereof may be represented in a synchronous reference frame (e.g., d-q frame in the illustrated examples), and such values may include a d-axis component and/or a q-axis component. In addition, certain values (e.g., the inverter output current feedback signals or values iu, iv, iw) may include signals or values corresponding to individual output phases (e.g., u, v, w) of a multiphase system, such as the inverter output phases.
A summing junction 110 (FIG. 2) provides a speed or velocity error signal to a velocity proportional-integral (PI) controller 112 as the difference between the desired velocity ωr* and the motor velocity signal or value ωr. Using the velocity PI controller component 112, the controller 100 thus calculates or otherwise determines one or more current setpoint signals or values idq** (e.g., a d-axis value and a q-axis value in certain embodiments) at least partially according to the desired motor velocity ωr* and the motor velocity signal or value ωr. As mentioned above, although the illustrated example uses an outer velocity control loop, other implementations are possible in which a torque setpoint or other setpoint(s) is/are used in controlling operation of the motor load 20. Moreover, the concepts of the present disclosure may be employed in connection with other (non-motor) AC loads 20 driven through an intervening filter circuit 30, wherein the inverter controller 100 in such alternate embodiments may employ any suitable type of setpoint and control algorithm, wherein the controller 100 need not control velocity or position or torque in all embodiments.
The exemplary controller 100 in FIG. 2 further implements an inner current loop to control the inverter output currents iu, iv, iw. A current reference component 114 receives the d and q-axis current setpoint signals or values idq** from the velocity PI controller 112, along with one or more signals or values IC_dq representing the currents iC flowing in the filter capacitors Cf of the filter circuit 30. FIG. 3 illustrates further details of one implementation of the current reference component 114, as well as a filter current calculation component 128 and a current proportional-integral (PI) feed forward component 130 of the inverter controller 100. As seen in FIG. 2, the current reference component 114 provides compensated current setpoint values i*dq to a summing junction 116 based on the d and q-axis current setpoint values i**dq and the filter capacitor current values IC_dq. The summing junction 116, in turn, provides at least one error signal (e.g., including d-axis and q-axis components) to a current PI controller component 118 based on the difference between the compensated current setpoint values i*dq and the d-q current feedback values Idq obtained from a stationary/synchronous reference frame converter component 132. The current PI control component 118 provides a control output as one or more voltage reference values vdq to a summing junction 120 to provide an inner voltage control loop implemented by the controller 100.
A summing junction component 120 computes or otherwise generates one or more compensated voltage reference values vdq_ref based on the sum of the voltage reference values vdq and feed forward voltage reference values Vf_dq, and provides these to a synchronous/stationary reference frame converter component 122. The converter component 122 (and the stationary/synchronous reference frame converter component 132) also receives a position input signal or value θe (e.g., from a feedback sensor associated with the motor load 20 or derived from a position estimation algorithm, or from another suitable source) and the converter 122 converts the compensated voltage reference values vdq_ref to provide 3-phase (stationary reference frame) voltage reference signals vuvw to a PWM component 124, which generates inverter switching control signals 102 for operation of the switching devices S1-S6 of the inverter 46 accordingly. The PWM component 124 may include suitable driver circuitry and/or other suitable hardware for generating switching control signals 102 suitable for operating the switching devices S1-S6 as are known.
As further shown in FIG. 2, moreover, the illustrated inverter controller 100 derives the inverter output frequency ωe from the position angle θe using the differentiation function 126. For a synchronous motor load the system may optionally derive the n inverter output frequency signal or value ωe as a function the rotor speed ωr and an integer number P representing the number of pole pairs of the driven motor load 20. A filter current calculation component 128 receives the inverter output frequency signal or value ωe along with the compensated voltage reference signals or values vdq_ref, measured voltage signals or values vf_out_dq, or measured inverter output voltage signals or values vu, vv, and vw, and provides the synchronous reference frame filter capacitor current values IC_dq for use by the current reference component 114 as described above, as well as to a current proportional-integral (PI) feed forward control component 130. Current PI feedforward component 130 receives the filter capacitor current values IC_dq, the inverter output frequency signal or value ωe, and the synchronous reference frame current feedback values idq as inputs, and determines the feedforward voltage reference values Vf_dq for provision to the summing junction component 120 as described above. In operation, the controller 100 determines one or more filter current or voltage signals or values representing a filter capacitor current (e.g., iC) or filter inductor voltage (e.g., vL) of the filter circuit 30 based on at least one inverter output feedback signal or value (e.g., iu, iv, iw) representing an output current at the AC output 46B of the inverter 46. The controller 100, moreover, provides the inverter switching control signals 102 to the inverter 46 at least partially according to the filter current or voltage signal(s) or value(s).
The inventors have appreciated that the stationary reference frame (d-q) equations for a PM synchronous machines are given by the following equation (1):




  
    
      
        
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In addition, cross coupling terms are introduced by the rotation from the stationary (uvw) reference frame to the synchronous (d-q) reference frame, as seen in the following equation (2):





  
    
      
        
          
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Assuming the filter inductance Lf and capacitance Cf are constants, and noting that motor voltages vm equal to filter output voltages vf_out, the voltage across the inductor vL is expressed by the following equation (3):





  
    
      
        
          
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and the capacitor current is expressed by the following equation (4):





  
    
      
        
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The inverter currents in the synchronous d-q reference frame are given by the following equation (5):




  
    
      
        
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        5
        )
      
    
  




In steady state, the inverter output currents (Ifd and Ifq in the synchronous d-q reference frame) provided to the filter 30 are given by the following equation (6):




  
    
      
        
          
            [
            
              
                
                  
                    I
                    fd
                  
                
              
              
                
                  
                    I
                    fq
                  
                
              
            
            ]
          
          =
          
            
              [
              
                
                  
                    
                      I
                      md
                    
                  
                
                
                  
                    
                      I
                      mq
                    
                  
                
              
              ]
            
            +
            
              
                [
                
                  
                    
                      0
                    
                    
                      
                        
                          -
                          ω
                        
                        ⁢
                        
                          
                        
                        ⁢
                        
                          C
                          f
                        
                      
                    
                  
                  
                    
                      
                        ω
                        ⁢
                        
                          
                        
                        ⁢
                        
                          C
                          f
                        
                      
                    
                    
                      0
                    
                  
                
                ]
              
              ·
              
                [
                
                  
                    
                      
                        v
                        
                          f_out
                          ⁢
                          _d
                        
                      
                    
                  
                  
                    
                      
                        v
                        
                          f_out
                          ⁢
                          _q
                        
                      
                    
                  
                
                ]
              
            
          
        
        ,
      
    
    
      
        (
        6
        )
      
    
  




including a first term representing the original motor current references from the speed regulator (velocity PI controller 112), and the final term showing the cross coupling terms in the inverter output current references taking into account the filter capacitor currents. The steady state inductor voltages VLd and VLq are given by the following equation (7):





  
    
      
        
          [
          
            
              
                
                  V
                  Ld
                
              
            
            
              
                
                  V
                  Lq
                
              
            
          
          ]
        
        =
        
          
            
              [
              
                
                  
                    0
                  
                  
                    
                      
                        -
                        ω
                      
                      ⁢
                      
                        
                      
                      ⁢
                      
                        L
                        f
                      
                    
                  
                
                
                  
                    
                      ω
                      ⁢
                      
                        
                      
                      ⁢
                      
                        L
                        f
                      
                    
                  
                  
                    0
                  
                
              
              ]
            
            ·
            
              [
              
                
                  
                    
                      I
                      fd
                    
                  
                
                
                  
                    
                      I
                      fq
                    
                  
                
              
              ]
            
          
          =
          
             
            
              
                [
                
                  
                    
                      0
                    
                    
                      
                        
                          -
                          ω
                        
                        ⁢
                        
                          
                        
                        ⁢
                        
                          L
                          f
                        
                      
                    
                  
                  
                    
                      
                        ω
                        ⁢
                        
                          
                        
                        ⁢
                        
                          L
                          f
                        
                      
                    
                    
                      0
                    
                  
                
                ]
              
              ·
              
                
                  (
                  
                    
                      [
                      
                        
                          
                            
                              I
                              md
                            
                          
                        
                        
                          
                            
                              I
                              mq
                            
                          
                        
                      
                      ]
                    
                    +
                    
                      
                        [
                        
                          
                            
                              0
                            
                            
                              
                                
                                  -
                                  ω
                                
                                ⁢
                                
                                  
                                
                                ⁢
                                
                                  C
                                  f
                                
                              
                            
                          
                          
                            
                              
                                ω
                                ⁢
                                
                                  
                                
                                ⁢
                                
                                  C
                                  f
                                
                              
                            
                            
                              0
                            
                          
                        
                        ]
                      
                      ·
                      
                        [
                        
                          
                            
                              
                                v
                                
                                  f_out
                                  ⁢
                                  _d
                                
                              
                            
                          
                          
                            
                              
                                v
                                
                                  f_out
                                  ⁢
                                  _q
                                
                              
                            
                          
                        
                        ]
                      
                    
                  
                  )
                
                .
              
            
          
        
      
    
    
      
        (
        7
        )
      
    
  




In addition, the feedforward (FF) terms Vf_dq for the current PI control component 118 including inductor voltages VLd and VLq in steady state, are given by the following equation (8):





  
    
      
        
          [
          
            
              
                
                  V
                  f_i
                
              
            
            
              
                
                  V
                  f_i
                
              
            
          
          ]
        
        =
        
          
            
              [
              
                
                  
                    0
                  
                  
                    
                      
                        -
                        ω
                      
                      ⁢
                      
                        
                      
                      ⁢
                      
                        L
                        sd
                      
                    
                  
                
                
                  
                    
                      ω
                      ⁢
                      
                        
                      
                      ⁢
                      
                        L
                        sd
                      
                    
                  
                  
                    0
                  
                
              
              ]
            
            ·
            
              [
              
                
                  
                    
                      I
                      md
                    
                  
                
                
                  
                    
                      I
                      mq
                    
                  
                
              
              ]
            
          
          +
          
             
            
              
                [
                
                  
                    
                      0
                    
                  
                  
                    
                      
                        ωλ
                        pm
                      
                    
                  
                
                ]
              
              +
              
                
                  [
                  
                    
                      
                        0
                      
                      
                        
                          ω
                          ⁢
                          
                            
                          
                          ⁢
                          
                            L
                            f
                          
                        
                      
                    
                    
                      
                        
                          ω
                          ⁢
                          
                            
                          
                          ⁢
                          
                            L
                            f
                          
                        
                      
                      
                        0
                      
                    
                  
                  ]
                
                ·
                
                  (
                  
                    
                      [
                      
                        
                          
                            
                              i
                              md
                            
                          
                        
                        
                          
                            
                              i
                              mq
                            
                          
                        
                      
                      ]
                    
                    +
                    
                      
                        [
                        
                          
                            
                              0
                            
                            
                              
                                ω
                                ⁢
                                
                                  
                                
                                ⁢
                                
                                  C
                                  f
                                
                              
                            
                          
                          
                            
                              
                                ω
                                ⁢
                                
                                  
                                
                                ⁢
                                
                                  C
                                  f
                                
                              
                            
                            
                              0
                            
                          
                        
                        ]
                      
                      ·
                      
                        [
                        
                          
                            
                              
                                V
                                
                                  f_out
                                  ⁢
                                  _d
                                
                              
                            
                          
                          
                            
                              
                                V
                                
                                  f_out
                                  ⁢
                                  _q
                                
                              
                            
                          
                        
                        ]
                      
                    
                  
                  )
                
              
            
          
        
      
    
    
      
        (
        8
        )
      
    
  




including an original feedforward term as well as an additional feedforward term representing the inductor voltages VLd and VLq. In this manner, the illustrated controller 100 employs a feedforward inverter control scheme modified to incorporate the additional voltages and currents associated with the filter circuit 30. To eliminate the need to sense Vf_out_dq, the controller can replace Vf_out_dq with the compensated controller voltages vdq_ref in certain implementations where direct measurement of the filter output voltage Vf_out_dq is not available.

FIG. 3 illustrates further details of non-limiting embodiments of the current reference component 114, the filter current calculation component 128, and the current PI feedforward control component 130, and FIG. 4 provides a flow diagram 200 depicting a control process 200 that may be implemented in the inverter controller 100. While the method 200 of FIG. 4 is illustrated and described below in the form of a series of acts or events, it will be appreciated that the various methods or processes of the present disclosure are not limited by the illustrated ordering of such acts or events. In this regard, except as specifically provided hereinafter, some acts or events may occur in different order and/or concurrently with other acts or events apart from those illustrated and described herein in accordance with the disclosure. It is further noted that not all illustrated steps may be required to implement a process or method in accordance with the present disclosure, and one or more such acts may be combined. The illustrated methods and other methods of the disclosure may be implemented in hardware, processor-executed software, or combinations thereof, in order to provide the motor control and inverter control functionality described herein, and may be employed in any power conversion system including but not limited to the above illustrated PMSM drive 40, wherein the disclosure is not limited to the specific applications and embodiments illustrated and described herein.
A velocity loop proceeds at 202 (FIG. 4) and the controller 100 computes current setpoint values i**dq at 204 based on the desired velocity value ωr* and the motor velocity signal or value ωr, for example, using the summing junction component 110 and the velocity PI controller 112 shown in FIG. 2. The current loop begins at 206, and the controller computes the filter capacitor current values IC_dq at 208 using the filter current calculation component 128 of FIG. 2, which represents the current flowing in the filter circuit capacitor Cf based on the inverter output frequency signal or value ωe, the compensated voltage reference values Vdc_ref or measured voltages vf_out_dq or vuvw, and the filter capacitance value Cf. A non-limiting example of the filter current calculation component 128 is further shown in FIG. 3, in which the d and q-axis filter capacitor current components IC_d and IC_q are computed as a function of these values ωe, Vdq_ref, and Cf using multiplier subcomponents 140 and 142 and a sign change component 144 (e.g., multiply by −1) according to the above equation (4).
At 210 in FIG. 4, the controller 100 computes the compensated current setpoint values i*dq based on the current setpoint values i**dq and the filter capacitor current values IC_dq using the current reference component 114 (FIG. 2). As further shown in FIG. 3, a non-limiting embodiment of the current reference computation component 114 is illustrated, which computes the compensated current setpoint values i*dq as a function of i**dq and the d-q reference frame filter capacitor current values IC_d and IC_q received from the filter current calculation component 128 using summation components 146 and 148.
The compensated current reference setpoints (e.g., d and q axis component values i*dq) are then used as setpoints for the inner voltage control loops in FIG. 2 whereby the inverter switching control signals 102 are provided to the inverter 46 at least partially according to the compensated current setpoints i*dq. The controller 100 computes voltage reference values vdq-ref at 212-216 based on the current PI feedforward control component 130 of FIGS. 2 and 3. As best seen in FIG. 3, the current PI feedforward component 130 includes summation components 150, 156, 160 and 168, as well as multiplier components 152, 154, 162, 164 and 166, and a sign change component 158 (e.g., multiply by −1) to implement the computation shown in the above equation (8). In the illustrated embodiment, the current PI feedforward control component 130 computes the feed forward voltage references Vf_dq in the synchronous reference frame at 214 based on the inverter output current feedback idq, the inverter output frequency ωe, the filter capacitor currents IC_dq, and the filter inductance value Lf. The computed feed forward voltage references Vf_dq are then provided to the summing junction 120 (FIG. 2) for computation of the compensated voltage reference values vdq_ref (e.g., at 216 in FIG. 4) based on the voltage reference values vdq from the current PI controller 118 and the feed forward voltage reference values Vf_dq. At 218 in FIG. 4, the controller 100 generates or otherwise provides the inverter switching control signals 102 to the inverter 46 at least partially according to the compensated voltage reference values vdq_ref.
FIG. 5 illustrates one possible configuration of a more complex output filter 30a which can be employed in place of the L-C filter 30 shown in FIG. 1. The filter in FIG. 5 shows 10 elements for motor phase u: two coupled inductors L1u and L2u which have a coupling coefficient of M12u, five resistive elements, RL1u, RL2u, RC1u, RC2u, and RC3u and three filter capacitors C1u, C2u, and C3u. The filter components for the other phases u and w have the same topology as that of phase u. In practice, the filter can employ all or only some of the components shown. While the filter 30a is considerably more complex than the L-C filter 30 shown in FIG. 1, for most practical values of L, C, and R, the compensation for the filter 30a is identical to the compensation for an L-C filter with the appropriate values of L and C.
In accordance with further aspects of the present disclosure, a non-transitory computer readable medium is provided, such as a computer memory, a memory within a power converter control system (e.g., controller 100), a CD-ROM, floppy disk, flash drive, database, server, computer, etc.), which includes computer executable instructions for performing the above-described methods. The above examples are merely illustrative of several possible embodiments of various aspects of the present disclosure, wherein equivalent alterations and/or modifications will occur to others skilled in the art upon reading and understanding this specification and the annexed drawings. In particular regard to the various functions performed by the above described components (assemblies, devices, systems, circuits, and the like), the terms (including a reference to a “means”) used to describe such components are intended to correspond, unless otherwise indicated, to any component, such as hardware, processor-executed software, or combinations thereof, which performs the specified function of the described component (i.e., that is functionally equivalent), even though not structurally equivalent to the disclosed structure which performs the function in the illustrated implementations of the disclosure. In addition, although a particular feature of the disclosure may have been disclosed with respect to only one of several implementations, such feature may be combined with one or more other features of the other implementations as may be desired and advantageous for any given or particular application. Also, to the extent that the terms “including”, “includes”, “having”, “has”, “with”, or variants thereof are used in the detailed description and/or in the claims, such terms are intended to be inclusive in a manner similar to the term “comprising”.

## Claims

1. A power conversion system for driving a load through an intervening filter circuit, the power conversion system comprising:
an inverter comprising a DC input, an AC output, and a plurality of switching devices coupled between the DC input and the AC output and operative according to inverter switching control signals to convert DC electrical power received at the DC input to provide AC electrical output power at the AC output; and
a controller configured to determine at least one filter current signal or value representing a filter capacitor current of the intervening filter circuit based on at least one inverter output feedback signal or value representing an output voltage at the AC output of the inverter during operation of the power conversion system, and to provide the inverter switching control signals to the inverter using at least one current control loop at least partially according to the at least one filter current signal or value.

2. The power conversion system of claim 1, wherein the controller is operative to:
compute at least one current setpoint value based on a desired velocity value and a motor velocity signal or value;
compute a filter capacitor current value representing current flowing in a filter capacitor of the intervening filter circuit based on:
an inverter output frequency signal or value,
a compensated voltage reference or measured filter voltage value, and
a filter capacitance value;

compute a compensated current setpoint value based on the at least one current setpoint value and the filter capacitor current value; and
provide the inverter switching control signals to the inverter at least partially according to the compensated current setpoint value.

3. The power conversion system of claim 2, wherein the controller is operative to:
compute a voltage reference value based on the compensated current setpoint value, and at least one inverter output current feedback signal or value representing an output current at the AC output of the inverter;
compute a feed forward voltage reference value based on the at least one inverter output current feedback signal or value, the inverter output frequency signal or value, the filter capacitor current value, and a filter inductance value;
compute a compensated voltage reference value based on the voltage reference value, and the feed forward voltage reference value; and
provide the inverter switching control signals to the inverter at least partially according to the compensated voltage reference value.

4. The power conversion system of claim 1, wherein the controller is operative to:
compute a voltage reference value based on the compensated current setpoint value, and at least one inverter output current feedback signal or value representing an output current at the AC output of the inverter;
compute a feed forward voltage reference value based on the at least one inverter output current feedback signal or value, the inverter output frequency signal or value, the filter capacitor current value, and a filter inductance value;
compute a compensated voltage reference value based on the voltage reference value, and the feed forward voltage reference value; and
provide the inverter switching control signals to the inverter at least partially according to the compensated voltage reference value.

5. A power conversion system for driving a load through an intervening filter circuit, the power conversion system comprising:
an inverter comprising a DC input, an AC output, and a plurality of switching devices coupled between the DC input and the AC output and operative according to inverter switching control signals to convert DC electrical power received at the DC input to provide AC electrical output power at the AC output; and
a controller configured to determine at least one filter current or voltage signal or value representing a filter capacitor current or filter inductor voltage of the intervening filter circuit based on at least one inverter output feedback signal or value representing an output current at the AC output of the inverter, and to provide the inverter switching control signals to the inverter at least partially according to the at least one filter current or voltage signal or value;
wherein the controller is operative to:
compute at least one current setpoint value based on a desired velocity value and a motor velocity signal or value,
compute a filter capacitor current value representing current flowing in a filter capacitor of the intervening filter circuit based on:
an inverter output frequency signal or value,
a compensated voltage reference or measured filter voltage value, and
a filter capacitance value;
compute a compensated current setpoint value based on the at least one current setpoint value and the filter capacitor current value, and
provide the inverter switching control signals to the inverter at least partially according to the compensated current setpoint value.

6. The power conversion system of claim 5, wherein the controller is operative to:
compute a voltage reference value based on the compensated current setpoint value, and at least one inverter output current feedback signal or value representing an output current at the AC output of the inverter;
compute a feed forward voltage reference value based on the at least one inverter output current feedback signal or value, the inverter output frequency signal or value, the filter capacitor current value, and a filter inductance value;
compute a compensated voltage reference value based on the voltage reference value, and the feed forward voltage reference value; and
provide the inverter switching control signals to the inverter at least partially according to the compensated voltage reference value.

7. The power conversion system of claim 5, wherein the power conversion system is a motor drive, and wherein the inverter provides the AC electrical output power at the AC output to drive a motor load through the intervening filter circuit.

8. The power conversion system of claim 7, wherein the controller is operative to:
compute a voltage reference value based on a compensated current setpoint value, and at least one inverter output current feedback signal or value representing an output current at the AC output of the inverter;
compute a feed forward voltage reference value based on the at least one inverter output current feedback signal or value, an inverter output frequency signal or value, a filter capacitor current value, and a filter inductance value;
compute a compensated voltage reference value based on the voltage reference value, and the feed forward voltage reference value; and
provide the inverter switching control signals to the inverter at least partially according to the compensated voltage reference value.

9. A power conversion system for driving a load through an intervening filter circuit, the power conversion system comprising:
an inverter comprising a DC input, an AC output, and a plurality of switching devices coupled between the DC input and the AC output and operative according to inverter switching control signals to convert DC electrical power received at the DC input to provide AC electrical output power at the AC output; and
a controller configured to determine at least one filter current or voltage signal or value representing a filter capacitor current or filter inductor voltage of the intervening filter circuit based on at least one inverter output feedback signal or value representing an output current at the AC output of the inverter, and to provide the inverter switching control signals to the inverter at least partially according to the at least one filter current or voltage signal or value;
wherein the controller is operative to:
compute a voltage reference value based on a compensated current setpoint value, and at least one inverter output current feedback signal or value representing an output current at the AC output of the inverter,
compute a feed forward voltage reference value based on the at least one inverter output current feedback signal or value, an inverter output frequency signal or value, a filter capacitor current value, and a filter inductance value,
compute a compensated voltage reference value based on the voltage reference value, and the feed forward voltage reference value, and
provide the inverter switching control signals to the inverter at least partially according to the compensated voltage reference value.

10. A method for controlling an AC electric motor connected to a motor drive through an intervening filter circuit, the method comprising:
determining at least one filter current or voltage signal or value representing a filter capacitor current or filter inductor voltage of the intervening filter circuit based on at least one motor drive output feedback signal or value representing an output current at an AC output of the motor drive; and
generating AC electrical output power at an AC output of the motor drive at least partially according to the at least one filter current or voltage signal or value;
determining a filter capacitor current value representing current flowing in a filter capacitor of the intervening filter circuit based on:
an inverter output frequency signal or value,
a compensated voltage reference or measured filter voltage value, and
a filter capacitance value;

computing a compensated current setpoint value based at least partially on the filter capacitor current value; and
providing inverter switching control signals to an inverter of the motor drive at least partially according to the compensated current setpoint value.

11. The method of claim 10, comprising:
determining at least one current setpoint signal or value based at least partially on a desired motor velocity and the motor velocity signal or value; and
computing the compensated current setpoint value based on the at least one current setpoint value and the filter capacitor current value.

12. The method of claim 11, comprising:
computing a voltage reference value based on the compensated current setpoint value, and at least one inverter output current feedback signal or value representing an output current at the AC output of the inverter;
computing a feed forward voltage reference value based on the at least one inverter output current feedback signal or value, the inverter output frequency signal or value, the filter capacitor current value, and a filter inductance value;
computing a compensated voltage reference value based on the voltage reference value, and the feed forward voltage reference value; and
providing the inverter switching control signals to the inverter at least partially according to the compensated voltage reference value.

13. The method of claim 12, comprising:
receiving a plurality of motor drive output feedback signals or values representing output currents at an AC output of the motor drive;
determining d and q axis inverter output current feedback signals or values in a stationary reference frame based at least partially on the plurality of motor drive output feedback signals or values;
computing the voltage reference value based on the compensated current setpoint value, and the d and q axis inverter output current feedback signals or values; and
computing the feed forward voltage reference value based on the d and q axis inverter output current feedback signals or values, the motor velocity signal or value, the filter capacitor current value, and the filter inductance value.

14. The method of claim 10, comprising:
computing a voltage reference value based on a compensated current setpoint value, and at least one inverter output current feedback signal or value representing an output current at the AC output of the inverter;
computing a feed forward voltage reference value based on the at least one inverter output current feedback signal or value, an inverter output frequency signal or value, a filter capacitor current value, and a filter inductance value;
computing a compensated voltage reference value based on the voltage reference value, and the feed forward voltage reference value; and
providing inverter switching control signals to an inverter of the motor drive at least partially according to the compensated voltage reference value.

15. The method of claim 14, comprising:
receiving a plurality of motor drive output feedback signals or values representing output currents at an AC output of the motor drive;
determining d and q axis inverter output current feedback signals or values in a stationary reference frame based at least partially on the plurality of motor drive output feedback signals or values;
computing the voltage reference value based on the compensated current setpoint value, and the d and q axis inverter output current feedback signals or values; and
computing the feed forward voltage reference value based on the d and q axis inverter output current feedback signals or values, the inverter output frequency signal or value, the filter capacitor current value, and the filter inductance value.

16. A non-transitory computer readable medium with computer executable instructions for controlling an AC electric motor connected to a motor drive through an intervening filter circuit, the computer readable medium comprising computer executable instructions for:
determining at least one filter current or voltage signal or value representing a filter capacitor current or filter inductor voltage of the intervening filter circuit based on at least one motor drive output feedback signal or value representing an output current at an AC output of the motor drive; and
generating AC electrical output power at an AC output of the motor drive at least partially according to the at least one filter current or voltage signal or value;
determining a filter capacitor current value representing current flowing in a filter capacitor of the intervening filter circuit based on:
an inverter output frequency signal or value,
a compensated voltage reference or measured filter voltage value, and
a filter capacitance value;

computing a compensated current setpoint value based at least partially on the filter capacitor current value; and
providing inverter switching control signals to an inverter of the motor drive at least partially according to the compensated current setpoint value.

17. The computer readable medium of claim 16, comprising computer executable instructions for:
determining at least one current setpoint signal or value based at least partially on a desired motor velocity and the motor velocity signal or value; and
computing the compensated current setpoint value based on the at least one current setpoint value and the filter capacitor current value.

18. The computer readable medium of claim 17, comprising computer executable instructions for:
computing a voltage reference value based on the compensated current setpoint value, and at least one inverter output current feedback signal or value representing an output current at the AC output of the inverter;
computing a feed forward voltage reference value based on the at least one inverter output current feedback signal or value, the inverter output frequency signal or value, the filter capacitor current value, and a filter inductance value;
computing a compensated voltage reference value based on the voltage reference value, and the feed forward voltage reference value; and
providing the inverter switching control signals to the inverter at least partially according to the compensated voltage reference value.

19. The computer readable medium of claim 16, comprising computer executable instructions for:
computing a voltage reference value based on a compensated current setpoint value, and at least one inverter output current feedback signal or value representing an output current at the AC output of the inverter;
computing a feed forward voltage reference value based on the at least one inverter output current feedback signal or value, an inverter output frequency signal or value, a filter capacitor current value, and a filter inductance value;
computing a compensated voltage reference value based on the voltage reference value, and the feed forward voltage reference value; and
providing inverter switching control signals to an inverter of the motor drive at least partially according to the compensated voltage reference value.