# Patent

## Title
Tunable frequency, low phase noise and low thermal drift oscillator

## Abstract

An oscillator comprising a three-terminal device and circuitry coupled across a first terminal and a second terminal of the device. The circuitry is preferably operable to bias the device and feedback a select amount of noise generated by the device into the device so as to reduce a proportional amount of phase noise present at a third terminal of the device.

## Background
CROSS REFERENCE TO RELATED APPLICATIONS
The present application claims the benefit of U. S. Provisional Application Nos. 60/493,075, filed on Aug. 6, 2003, and entitled “Tunable Frequency, Low Phase Noise and Low Thermal Drift Oscillator;” 60/501,371, filed on Sep. 9, 2003, and entitled “Wideband Tunable, Low Noise And Power Efficient Coupled Resonator/Coupled Oscillator Based Octave-band VCO;” 60/501,790, filed on Sep. 10, 2003, and entitled “Wideband Tunable, Low Noise And Power Efficient Coupled Resonator/Coupled Oscillator Based Octave-band VCO;” 60/527,957, filed on Dec. 9, 2003, and entitled “Uniform And User-Definable Thermal Drift Low Noise Voltage Control Oscillator;” 60/528,670, filed on Dec. 11, 2003, and entitled “Uniform And User-Definable Thermal Drift Low Noise Voltage Control Oscillator;” and 60/563,481, filed on Apr. 19, 2004, and entitled “Integrated Ultra Low Noise Microwave Wideband Push-Push VCO,” the disclosures of which are incorporated by reference herein in their entirety.


FIELD OF THE INVENTION
In one aspect, the present invention relates to circuitry for voltage controlled oscillators (VCOs) Preferably, such oscillators have one or more of the following characteristics: thermally stable, ultra-low phase noise performance, and the ability to operate at relatively high frequencies and over an extended frequency range.
BACKGROUND OF THE INVENTION
A voltage controlled oscillator (VCO) is a component that can be used to translate DC voltage into a radio frequency (RF) voltage. The magnitude of the output signal is dependent on the design of the VCO circuit and the frequency of operation is determined by a resonator that provides an input signal. Clock generation and clock recovery circuits typically use VCOs within a phase locked loop (PLL) to either generate a clock from an external reference or from an incoming data stream. VCOs are therefore often critical to the performance of PLLs. In turn, PLLs are essential components in communication networking as the generated clock signal is typically used to either transmit or recover the underlying service information so that the information can be used for its intended purpose. PLLs are particularly important in wireless networks as they enable the communications equipment to quickly lock-on to the carrier frequency onto which communications are transmitted.
In this regard, the dynamic operating range and noise performance of a VCO may limit or affect the performance of the PLL itself. As an example, the operating frequency of a commercially available ceramic resonator-based VCO is typically limited to 3,000,000,000 Hertz (3 Giga Hz or 3 GHz) and usually has a temperature drift of more than 10,000,000 (10 Mega Hz or 10 MHz) over the temperature range of −40° C. to +85° C. The phase noise of the ceramic resonator-based oscillator is usually −120 dBc/Hz at 10 kHz for an operating frequency of 1 GHz (or 1,000 MHz). A surface acoustic wave (SAW) resonator-based oscillator typically offers −135 dBc/Hz at 10 KHz at an operating frequency of 622 MHz and −122 dBc/Hz at 10 KHz for an operating frequency of 2.5 GHz. The typical SAW resonator-based oscillator has a relatively low phase noise, but its performance is very poor over the operating temperature range and it offers a limited number of operating frequency selections.
FIG. 1 is an illustrative schematic diagram of a known oscillator. As FIG. 1 shows, a resonator 10, e.g., a ceramic resonator, is capacitively coupled through capacitor Cc 13 to the base of transistor 16. Feedback capacitor C1 18 is also coupled to the base of transistor 16 and to feedback capacitor C2 19, which is grounded. The values of capacitors C1 18 and C2 19 are preferably adjustable. The emitter terminal of transistor 16 is grounded through inductor Lc 23. The collector terminal of transistor 16 is biased through inductor L0 26 with DC voltage supply Vcc 29. A resistor R2 33 is coupled across the base of the transistor to an inductor L0 26. An additional resistor R1 35 is coupled to voltage supply Vcc and grounded through capacitor C0 37. In this arrangement the ratio of the resistors R2 33 and R1 35 are selected so as to provide temperature stabilization during operation. An output signal may be capacitively coupled from the collector at Vo1. The output signal at Vo1 provides better isolation but poor phase noise performance. For less isolation but better phase noise performance an output Vo2 may be capacitively coupled from the emitter of the transistor. In addition, the output signals Vo1 or Vo2 are non-sinusoidal as they include the fundamental frequency plus the harmonics. As previously discussed, the phase noise performance of oscillators of this type are typically −120 dBc/Hz at 10 kHz for an operating frequency of 1 GHz and the frequency drift is typically 10 MHz over −40° C. to +85° C.
Of utility then are resonator-based oscillators, e.g., VCOs, that provide ultra low noise and low thermal drift performance along with an extended frequency range of operation.
SUMMARY OF THE INVENTION
One aspect of the present invention is an ultra low noise, low thermal drift and extended frequency range high Q resonator-based oscillator. The phase noise of the oscillator is better than −130 dBc/Hz at 10 KHz for an operating frequency of 1 GHz. In accordance with the present invention, the oscillator maintains this noise performance over an operating temperature range of −40° C. to +85° C. and thermal drift of 6 MHz to 0.8 MHz over the operating temperature range.
In accordance with another aspect of the present invention an oscillator is provided, the oscillator preferably comprises a three terminal device and first circuitry coupled across a first terminal and a second terminal of the three terminal device and operable to bias the three terminal device and to feedback a select amount of phase noise generated by the three terminal device into the three terminal device so as to reduce a proportional amount of phase noise present at a third terminal of the three terminal device.
The oscillator may further desirably include second circuitry coupled across the second terminal and the third terminal of the three terminal device and operable to control the thermal drift of the three terminal device during operation of the oscillator.
Further in accordance with this aspect of the present invention the oscillator further desirably comprises a resonator coupled to the second terminal and operable to provide an input to the three terminal device. Most preferably the resonator comprises a ceramic resonator, although any high-Q resonator may be used.
In addition, the terminal device most preferably comprises a bipolar transistor and wherein the first, second and third terminals of the three terminal device respectively comprise the collector, base and emitter nodes of the bipolar transistor. On the other hand, the three terminal device may comprise a field effect transistor and wherein the first, second and third terminals of the three terminal device respectively comprise the collector, base and emitter nodes of the field effect transistor. As a general matter, the three terminal device desirably includes any three terminal device which is operable to provide a 180 degree phase shift between the first and second terminals.
Further in accordance with this aspect of the present invention, the oscillator further comprises a first filter and a second filter coupled in series to the third terminal of the three terminal device. It is further desirable that the first and second filters each include a time constant that is adjusted to a fundamental frequency of operation. Most preferably, the first filter comprises an LC filter with a time constant adjusted to a fundamental frequency of operation and the second filter comprises an RC filter with a time constant adjusted to a fundamental frequency of operation. The first filter may be further desirably coupled to the second filter through an inductor.
Further still in accordance with this aspect of the present invention, the oscillator further preferably includes a resonator and tuning sub-circuit coupled to the second terminal and operable to select different operating frequencies for the oscillator.
In addition, the second circuitry may desirably comprise a first feedback capacitor coupled to the second terminal, a temperature compensation resistance coupled to the first feedback capacitor and the third terminal and a second feedback capacitor coupled between the first feedback capacitor and the temperature compensation resistance and to ground.
The first circuitry of the oscillator further desirably maintains a substantially constant bias voltage at the first terminal of the three terminal device over the operating temperature range of the oscillator. Further still in accordance with this aspect of the present invention, the oscillator may further desirably include a pair of resonators coupled in parallel to the second terminal and operable to provide an input to the three terminal device.
In accordance with yet another aspect of the present invention, circuitry for a resonator-based oscillator is provided. In one embodiment the circuitry comprises a transistor having a base, collector and emitter. A bias and temperature compensation network is desirably coupled across the collector and base of the transistor. A feedback capacitor is also coupled to the base of the transistor. A resistor is preferably coupled across the feedback capacitor and the emitter of the transistor to reduce thermal drift during operation. A resonator is capacitively coupled to the base of the transistor and the absolute values of the first and second resistors are desirably chosen so that a select amount of phase noise is fed into the base of the transistor, the select amount of phase noise being sufficiently out of phase with phase noise present at the emitter. Most preferably, the phase noise that is fed-back into the base terminal is approximately 180° out of phase with the phase noise at the emitter terminal.
In addition, two-stage regenerative filtering is preferably introduced at the emitter terminal to effectively reduce the thermal and shot noise produced by the transistor. Further in accordance with this embodiment, the time constant of each of the filters coupled to the emitter is adjusted to operate at the fundamental frequency of operation. The bias and temperature compensation network preferably includes an inductor coupled in series to a first resistor between the base and the collector. A bias voltage is provided through a second resistor, which is connected between the first resistor and collector inductor to complete the temperature compensation network.
Further in accordance with this aspect of the present invention, a bias voltage is preferably provided to the transistor through the second resistor. In addition, it is also desirable to have the transistor be a bipolar transistor, although a field effect transistor is equally desirable.
Further in accordance with this aspect of the present invention, an output signal is taken between the first and second filters coupled to the emitter.
In an additional aspect to the present invention, oscillator circuitry including a transistor having a base, collector and emitter is provided. The circuitry further comprises a bias and temperature compensation network coupled across the collector and base of the transistor and a feedback capacitor and thermal drift compensating network coupled across the base and emitter of the transistor. In addition, a two-stage regenerative filter is preferably coupled to the emitter terminal. The circuitry also includes a ceramic resonator, or any high-Q resonator, that is capacitively coupled to the base of the transistor. Further in accordance with this embodiment a tuning network is capacitively coupled to the resonator for selecting the oscillation frequency of the circuitry.
Further in accordance with this aspect, the time constant of each of the filters coupled to the emitter is adjusted to operate at the fundamental frequency of operation of the oscillator frequency.
A variant of this embodiment includes the addition of a second resonator that is capacitively coupled in parallel to the first resonator.
In accordance with another aspect of the present invention a push-push oscillator circuit arrangement is provided. The push-push oscillator circuitry comprises a pair of series coupled resonators that are coupled to a pair of oscillator sub-circuits. Each oscillator sub-circuits comprises a three terminal device, a bias and temperature network, a feedback capacitor and thermal drift compensating network and regenerative stage filtering preferably arranged in accordance with the previously described embodiments. In addition, a phase coupling network is coupled across both oscillator sub-circuits so as to combine the output signals of each oscillator sub-circuit. In accordance with this aspect of the invention, the output signals of each of the oscillator sub-circuits are out of phase by 180° such that the phase coupling network constructively adds the second harmonic components while canceling the lower-order harmonics. In this way, an ultra-low noise, low thermal drift signal operating at the second harmonic frequency is produced and available over a wide frequency range.
In accordance with a further embodiment, the push-push oscillator circuit is generalized to an N-push configuration which produces an ultra-low noise, low thermal drift signal operating at the N-times the fundamental frequency of the constituent oscillator circuits.
Although the invention is particularly advantageous when used in connection with transistors, other three-terminal devices may be used in accordance with the teachings of the present invention. Bipolar and field effect transistors may also be used to achieve the benefits of the present invention.
In another aspect, the present invention includes a voltage controlled oscillator comprising a first three-terminal device having first, second and third terminals and a second three-terminal device having first, second and third terminals and coupled to the first three-terminal device by a plurality of resonators coupled in series. The voltage controlled oscillator further desirably includes first circuitry coupled between each of the second and third terminals of each of the first and second devices to control the thermal drift of each of the devices and second circuitry coupled between each of the first and second terminals of each of the first and second devices, the second circuitry being operable to maintain a sufficient fixed bias voltage condition at each of the first terminals.
Further in accordance with this aspect of the present invention, a phase coupling network is desirably connected between the first terminals of each of the devices and in parallel with the second circuitry, the phase coupling network being operable to produce an output at a harmonic of the fundamental frequency of the oscillator.
In yet a further aspect, the present invention is a network communication device which desirably includes a phase lock loop for generating a clock signal used to transmit or recover information communicated from or to the device. Most preferably, the phase lock loop includes a voltage controlled oscillator for generating the clock signal. In accordance with this aspect of the present invention, the voltage controlled oscillator comprises a three terminal device; first circuitry coupled across a first terminal and a second terminal of the three terminal device and operable to bias the three terminal device and to feedback a select amount of phase noise generated by the three terminal device into the three terminal device so as to reduce a proportional amount of phase noise present at a third terminal of the three terminal device; and second circuitry coupled across the second terminal and the third terminal of the three terminal device and operable to control the thermal drift of the three terminal device during operation of the oscillator.
In yet a further aspect, the present invention is a cellular telephone that desirably includes a phase lock loop for generating a clock signal used to transmit or recover information communicated from or to the cellular telephone. Most preferably, the phase lock loop includes a voltage controlled oscillator for generating the clock signal. In accordance with this aspect of the present invention, the voltage controlled oscillator comprises a three terminal device; first circuitry coupled across a first terminal and a second terminal of the three terminal device and operable to bias the three terminal device and to feedback a select amount of phase noise generated by the three terminal device into the three terminal device so as to reduce a proportional amount of phase noise present at a third terminal of the three terminal device; and second circuitry coupled across the second terminal and the third terminal of the three terminal device and operable to control the thermal drift of the three terminal device during operation of the oscillator.
Further in accordance with the present invention, a method for generating an ultra-low noise, thermally stable relatively high frequency signal from a VCO is provided. The method comprises providing a three terminal device having first, second and third terminals. The method further includes coupling bias and temperature compensation circuitry across the first and second terminals of the device and coupling a feedback capacitor and thermal-drift circuitry across the second and third terminals of the device. Further in accordance with the method two-stage regenerative filtering is coupled to the third terminal of the device. A resonator is also capacitively coupled to the device's second terminal.
In one aspect of the method, the bias and temperature compensation circuitry comprises supplying a DC bias voltage to the first terminal of the device through a first resistor and an inductor and coupling a second resistor between the first resistor and inductor and the second terminal of the device. In accordance with this aspect, the method further includes selecting the absolute values of the first and second resistors to bias the three terminal device while feeding back a select amount of noise into the second terminal of the device.
The method may further desirably include capacitively coupling a tuning network to the resonator.
A variant to the method includes implementing a bias and temperature compensation network that increases the gain of the feedback into the second terminal.



BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a schematic diagram of a known oscillator.
FIG. 2 is a block diagram of an oscillator in accordance with an aspect of the present invention.
FIG. 3 depicts a circuit diagram of an oscillator of FIG. 2 in accordance with an aspect of the present invention.
FIG. 4 depicts a circuit diagram of an oscillator of FIG. 2 in accordance with an aspect of the present invention.
FIG. 5 illustrates the phase noise performance of an oscillator operating in accordance with an aspect of the present invention.
FIG. 6 is a schematic diagram of an oscillator in accordance with an aspect of the present invention.
FIG. 7 is block diagram of an oscillator in accordance with an aspect of the present invention.
FIG. 8 is a schematic diagram depicting an embodiment of an oscillator in accordance with the functional diagram of FIG. 7.
FIG. 9 illustrates the phase noise performance of an oscillator operating in accordance with the circuitry of FIG. 8.
FIG. 10 illustratively depicts the topology for an N-push oscillator in accordance with an aspect of the present invention.
FIG. 11 illustratively depicts the topology for a 4-push oscillator in accordance with an aspect of the present invention.
FIGS. 12A and 12B illustratively depict a cellular phone and a communication device in accordance with an aspect of the present invention.



DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
FIG. 2 is a block diagram that illustratively depicts the modules of an oscillator circuit 200 in accordance with an aspect of the present invention. As the figure shows, a three terminal device 203 has a bias and temperature compensation network 205 coupled between the first and second terminals, 208 and 210 respectively. The three terminal device 203 may be a bipolar transistor or field effect transistor (FET) or any other three terminal device. In particular, any three-terminal device that can provide a 180° phase shift between first and second terminals 208 and 210 and that supplies sufficient gain at the frequency of operation may be used in accordance with the present invention. In addition, it is also desirable that the maximum operating frequency of the three terminal device be a multiple, such as about ten times, higher than the required frequency of operation.
A thermal drift compensating and feedback network 213 is coupled across the second terminal 210 and third terminal 216. The elements of the network 213 are selected so as to provide thermal stability over the operating temperature range.
The bias and temperature compensation network 205 operates to keep the bias voltage appearing at the first terminal 208 constant. As such, temperature variations that may occur during operation tend not to influence the operation of the three terminal device 203.
A resonator and tuning sub-circuit 218 is also coupled to the second terminal 210. The sub-circuit 218 is used to select different operating frequencies at which the circuit 200 oscillates.
First filter 228 and second filter 230 are series coupled to the third terminal 216 to provide two-stage filtering of the output signal 235.
In accordance with an aspect of the present invention, the network 205 is selected so as to feedback a select amount of the phase noise produced by the three terminal device 203 into the base of the device 203, thereby reducing or canceling a proportional amount of the phase noise present at the third terminal 216 or the output 235.
In operation, the oscillator 200 of FIG. 2 preferably operates in the following manner. The resonator and tuning diode block 218 is tuned to provide an input signal of a select frequency to the second terminal 210. The bias and temperature compensation network 205 is operable to provide a predetermined voltage at first terminal 208. Once the three-terminal device 203 is properly biased it outputs a signal onto third terminal 216 that depends on the frequency of the input at terminal 210, as well as the values of the elements that comprise the bias and temperature compensation network 205 and the feedback-capacitor and thermal-drift compensating network 213. As previously discussed, the values of the elements of bias and temperature compensation network 205 are selected to maintain a substantially constant bias voltage at first terminal 208, as well as feedback a select amount of phase noise into the second terminal 210 of the device 203. The phase noise fed back via the network 205 is most preferably out of phase with the phase noise present at the third terminal 216, and therefore, compensates for changes in the operating temperature range of the device 203 or the temperature range of the operating environment. In addition, feedback-capacitor and thermal-drift compensating network 213 feeds back a select amount of the phase noise present at third terminal 216 into the second terminal 210 to compensate for changes in the output frequency that may be caused by thermal drifting in the device 203. The two-stage filtering provided by filters 228 and 230 is configured to reduce the noise spectral density of the device 203. As such, the device 203 oscillates at frequencies based on the settings of resonator and tuning diode block 218 and advantageously compensates for changes in the operating temperature via network 205, as well as thermal drifting via network block 213.
Turning now to FIG. 3, there is depicted an embodiment 250 of the oscillator circuit of FIG. 2 in accordance with an aspect of the present invention. As FIG. 3 shows, a temperature compensating resistor 252 is connected across the emitter 255 of a transistor or three terminal device 257 and the feedback capacitor 259. A purpose of resistor 252 is to minimize the thermal drift of the oscillator during operation. The first filter 228 comprises an LC filter network including inductor 260 and capacitor 262. The first filter 228 operates to filter the higher harmonics signals produced by the transistor. The second filter 230 comprises an RC network that includes resistor 265 and capacitor 267. The second filter 230 operates to filter the thermal shot noise of the device 257. The time constant of the first and second filters is adjusted to the fundamental frequency of operation. This regenerative two stage filtering effectively reduces the noise power spectral density that is created by the thermal and shot noise currents of the device 257. The output signal 235, as previously discussed, is taken at a point between the filters.
In the particular embodiment of FIG. 3 the bias and temperature compensation network 205 comprises a number of elements arranged in the manner shown. The network 205 determines the DC operating condition of the device. In addition, the network 205 also acts to feedback a select amount of the phase noise of the transistor through the resistor 33 into the base 210 of the transistor.
A tuning network 272 is coupled to the resonator 274 and is used for adjusting the output of the circuit and compensating for any residual thermal drifting not eliminated by resistor 252 and capacitor 259.
FIG. 4 schematically depicts another embodiment 275 of an oscillator in accordance with an additional aspect of the present invention. In particular, first and second filters 228 and 230 are coupled to the emitter output as shown in FIG. 3 and described above. In addition, thermal compensation resistor 252 is also coupled across the feedback capacitor 259 and emitter 255. However, the embodiment of FIG. 4 does not include a tuning network, e.g., tuning network 272, and a temperature compensation network, e.g., temperature compensation network 205. In accordance with FIG. 4 the absolute values of the resistors 279 and resistor 280 may be chosen so as to reduce the phase noise at the emitter. In accordance with an aspect of the invention, the proper selection of the values of resistors 279 and 280 will result in noise being fed back from the collector 283 into the base 285 of the transistor. Because the noise fed back into the base 285 would be of an opposite phase to the noise out of the emitter 286, a reduction in phase noise is produced at the output port.
The exact values of resistors 279 and 280 (or 33 and 35) determine the DC bias of the three terminal device. Preferably, the set of absolute values for these resistors are set so as to provide the same bias while minimizing the phase noise performance of the circuitry. These two resistors may also be replaced by a more complex electronic circuit with higher feedback gain as shown in FIG. 3.
Turning now to FIG. 5, there is shown a plot of the measured phase noise of an oscillator operating in accordance with an aspect of the present invention. The oscillator was tuned to an operating frequency of 1 GHz and measurements were taken with and without regenerative filtering. With regenerative filtering the phase noise was approximately −130 dBc/Hz at 10 KHz. Without regenerative filtering the phase noise was slightly less at approximately −125 dBc/Hz. Thus, even without regenerative filtering improvement in the phase noise, performance of a resonator-based oscillator may be achieved in accordance with the foregoing aspects of the present invention.
FIG. 6 is a schematic diagram illustrating a parallel-coupled resonator oscillator 300 in accordance with an additional aspect of the present invention. As shown by block 310, the oscillator 300 includes a pair of parallel-coupled resonators. Otherwise, the circuitry includes all the same functional elements of FIGS. 2 and 3. The resonators 312 and 314 are connected in parallel across capacitor 320. By appropriately capacitively coupling the resonators across the capacitor 320, the phase noise performance of the oscillator may be improved. The parallel arrangement of FIG. 6 results in a single tuned circuit that does not increase the noise performance of the circuit. The arrangement of FIG. 6 may also improve performance by approximately 10 to 20 dB over the single resonator oscillator circuit phase noise described hereinabove.
FIG. 7 illustratively depicts the functional modules and their arrangement in a push-push topology to form a series coupled resonator oscillator 400 in accordance with another aspect of the present invention. In accordance with this aspect of the present invention, a first three-terminal device 403 and a second three-terminal device 406 are coupled in a back-to-back configuration by a plurality of series coupled resonators 408. The devices 403 and 406 are each coupled to a feedback-capacitor and thermal drift compensating network 411. A first filter 415 that operates at the fundamental frequency of the circuit is coupled to a second terminal 417 of the first device 403. A second filter 419 that also operates at the fundamental frequency of the circuit is coupled to a second terminal 421 of the second device 406. A bias and temperature compensation network 423 is coupled to the third terminals 427 and 428 of the devices 403 and 406, respectively. A phase coupling network 432 is also coupled to third terminals 427 and 428 in parallel with bias and temperature compensation network 423. The output 440 of the circuit is connected to the phase coupling network 432 and operates at multiples of the fundamental frequency of the circuit depending on the number of resonators that are coupled in series. For example, where two resonators are coupled in series the output is twice the fundamental frequency of the circuit.
Turning now to FIG. 8, there is shown a schematic diagram for an embodiment of an oscillator 450 in accordance with the push-push arrangement of FIG. 7. In particular, the oscillator 450 consists of a pair of series coupled ceramic resonators 452 and 454. The resonators are coupled in series through a portion of transmission line 457. As shown, the resonators 452 and 454 behave as two half-wave resonators. Physically, the resonators 452 and 454 are formed from a single common resonator that is tapped so to provide oscillating signals that are 180 degrees out of phase.
The first resonator 452 is capacitively coupled by capacitor 460 to a first feedback and thermal compensating network 462. The network 462 includes feedback capacitors 463, 464 and 465 and temperature compensation resistance 468. Similar to the arrangement of FIG. 3, temperature compensation resistance 468 is coupled across capacitor 464 and the emitter of the first three terminal device 403, which is shown as a transistor. As previously discussed the transistor 403 may comprise a bipolar transistor or FET. Two stage regenerative filtering is again implemented at the emitter with the first LC filter comprising inductor 469 and capacitor 460. The second RC filter is formed by capacitor 472 and resistor 474.
A first bias and temperature compensation network 478 is coupled across the base and collector of the device 403. The network 478 comprises the inductor 480 coupled to the collector of the transistor 403 along with capacitors 482, 484, resistors 485, 486 and 487, bias DC voltage supply 489 and a transmission line 490. The first bias and compensation network 478 is coupled via resistor 492 to the bias and compensation network of the second transistor 406. In accordance with the present embodiment, and as shown in FIG. 8, the second transistor 406 is coupled to the second resonator 454 in a symmetrical circuit arrangement as the first transistor 403 is coupled to the first resonator 452.
The arrangement of transistors 403 and 406 and their sub-circuits (e.g., bias and compensation network, feedback and thermal drift network) of FIG. 8 extends the frequency operation of the single resonator arrangement of FIG. 3 by a factor of two while providing ultra-low phase and low thermal drift performance. In accordance with the embodiment of FIG. 8, two duplicates of the oscillation signals that are out of phase by 180° are produced at the collector terminal of each transistor. The phase coupling network then combines each of the signals produced by each transistor and sub-circuit arrangement to produce a signal at the second harmonic of fundamental frequency of the circuit.
The embodiment further includes an optional phase tuning network 493 that is capacitively connected via capacitors 497 and 498 across the resonators. The tuning network 493 is used to fine-tune the phase difference between the signals from the resonators and, in turn, the phase difference between the signals produced by the oscillator circuitry.
For the 2-push oscillator configuration shown in FIG. 8, the anti-symmetric phase between the two oscillators is 180 degrees. The two symmetrical oscillators sub-circuits coupled through a common high Q resonator (e.g., ceramic resonator) forces the output collector current of the two sub-circuits to be 180-degrees out of phase and this creates a differential voltage across the resonator, which is connected through base of the transistors of the two circuits. Since the two-oscillator sub-circuit is symmetrical, it develops the virtual RF ground in the center of the ceramic resonator and the base current of the two sub-circuits in the direction of the resonator are in the opposite phase. The virtual RF-grounding in the middle of the ceramic resonator divides the resonator into two symmetrically halves and this results in the doubling of the SRF (self-resonant frequency), and thereby, the single resonator is treated as a two-halves series coupled resonator.
FIG. 9 illustrates the phase noise performance of the push-push configuration of FIG. 8. At an operating frequency of 2.4 GHz the push-push resonator provides approximately −125 dBc/Hz of phase noise at 10 KHz. In addition, the phase noise is approximately −130 dBc/Hz at 10 KHz for an operating frequency of 1.2 GHz.
The push-push or 2-push arrangement of FIG. 8 can be extended to provide oscillators operating at frequencies up to N times the fundamental frequency of the oscillator circuitry by series coupling an array of N transistor oscillator sub-circuits. In particular, and as is illustratively depicted in FIG. 10, N-adjacent sub-circuits may be coupled to share a common resonator so as to produce N duplicates of the oscillation signal that are out-of-phase by 360° /N. The N duplicates may be then combined in a manner shown in FIGS. 8 and 9 to produce the desired harmonic while canceling the undesired harmonics due to the symmetry of the signal phases.
FIG. 11 illustratively depicts the topology for a 4-push oscillator in accordance with yet another aspect of the present invention. For a 4-push oscillator, adjacent sub-circuits are 90 degrees out of phase and simultaneously oscillate in a mutual injection mode. The oscillating signal from a neighboring sub-circuit is injected to another sub-circuit and further again is injected to the other ones, and so on, such that all the sub-circuits can oscillate in the same fundamental frequency (f0) . As it can be seen from the mathematical expression below, the fundamental oscillating signal of each sub-circuit has a phase difference of 90 degrees, 180 degrees and 270 degrees to that of the others
The time varying oscillating signals of each sub-circuit for 4-push oscillator can be given as:




  
    
      
        
          
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                j
                ⁡
                
                  (
                  
                    
                      
                        ω
                        0
                      
                      ⁢
                      t
                    
                    -
                    π
                  
                  )
                
              
            
          
          +
          
            
              K
              1
            
            ⁢
            
              e
              
                j2
                ⁡
                
                  (
                  
                    
                      
                        ω
                        0
                      
                      ⁢
                      t
                    
                    -
                    π
                  
                  )
                
              
            
          
          +
          
            
              K
              2
            
            ⁢
            
              e
              
                j3
                ⁡
                
                  (
                  
                    
                      
                        ω
                        0
                      
                      ⁢
                      t
                    
                    -
                    π
                  
                  )
                
              
            
          
          +
          
            

          
          ⁢
          
            
          
          ⁢
          
            
              K
              3
            
            ⁢
            
              e
              
                
                  j4
                  ⁡
                  
                    (
                    
                      
                        
                          ω
                          0
                        
                        ⁢
                        t
                      
                      -
                      
                    
                    )
                  
                
                )
              
            
          
          +
          
            
              K
              4
            
            ⁢
            
              e
              
                j5
                ⁡
                
                  (
                  
                    
                      
                        ω
                        0
                      
                      ⁢
                      t
                    
                    -
                    π
                  
                  )
                
              
            
          
          +
          ...
        
      
    
  
  
    
      
        
          
            V
            4
          
          ⁡
          
            (
            t
            )
          
        
        =
        
        ⁢
        
          
            
              K
              0
            
            ⁢
            
              e
              
                j
                ⁡
                
                  (
                  
                    
                      
                        ω
                        0
                      
                      ⁢
                      t
                    
                    -
                    
                      
                        3
                        ⁢
                        π
                      
                      2
                    
                  
                  )
                
              
            
          
          +
          
            
              K
              1
            
            ⁢
            
              e
              
                j2
                ⁡
                
                  (
                  
                    
                      
                        ω
                        0
                      
                      ⁢
                      t
                    
                    -
                    
                      
                        3
                        ⁢
                        π
                      
                      2
                    
                  
                  )
                
              
            
          
          +
          
            
              K
              2
            
            ⁢
            
              e
              
                j3
                ⁡
                
                  (
                  
                    
                      
                        ω
                        0
                      
                      ⁢
                      t
                    
                    -
                    
                      
                        3
                        ⁢
                        π
                      
                      2
                    
                  
                  )
                
              
            
          
          +
          
            

          
          ⁢
          
            
          
          ⁢
          
            
              K
              3
            
            ⁢
            
              e
              
                j4
                ⁡
                
                  (
                  
                    
                      
                        ω
                        0
                      
                      ⁢
                      t
                    
                    -
                    
                      
                        3
                        ⁢
                        π
                      
                      2
                    
                  
                  )
                
              
            
          
          +
          
            
              K
              4
            
            ⁢
            
              e
              
                j5
                ⁡
                
                  (
                  
                    
                      
                        ω
                        0
                      
                      ⁢
                      t
                    
                    -
                    
                      
                        3
                        ⁢
                        π
                      
                      2
                    
                  
                  )
                
              
            
          
          +
          ...
        
      
    
  
  
    
      
        
          
            [
            
              
                V
                out
              
              ⁡
              
                (
                t
                )
              
            
            ]
          
          
            4
            -
            Push
          
        
        =
        
        ⁢
        
          
            
              ∑
              
                n
                =
                1
              
              4
            
            ⁢
            
              
                V
                n
              
              ⁡
              
                (
                t
                )
              
            
          
          =
          
            
              
                A
                1
              
              ⁢
              
                e
                
                  
                    j4ω
                    0
                  
                  ⁢
                  t
                
              
            
            +
            
              
                A
                2
              
              ⁢
              
                e
                
                  
                    j8ω
                    0
                  
                  ⁢
                  t
                
              
            
            +
            
              
                A
                3
              
              ⁢
              
                e
                
                  
                    j12ω
                    0
                  
                  ⁢
                  t
                
              
            
            +
            ...
          
        
      
    
  




The desired fourth harmonic signals 4f0 are constructively combined for extended frequency operation because of their in-phase relations. However, the undesired fundamental signal f0, the second harmonic signals 2f0, the third harmonic signals 3f0 and the fifth harmonic signals 5f0 are suppressed due to the out of the phase relations from the orthogonal resonance modes of the ring resonators in the 4-push topology.
Generally in accordance with an aspect of the present invention, the N-push improves the phase noise and thermal drift in comparison with the single oscillator by the factor of N.
A voltage controlled oscillator in accordance with the present invention may be employed in any number of devices that are used to communicate on a data, telephone, cellular or, in general, communications network. Such devices may include but are not limited to, for example, cellular phones, personal digital assistants, modem cards, lap tops, satellite telephones. As a general matter, the oscillator circuitry shown in the various drawings and described above may be employed in a PLL to either generate a clock signal that may be used to transmit or recover information transmitted or received over a network. FIGS. 12A and 12B illustratively depict a schematic of a cellular phone and a communication device in accordance with additional aspects of the present invention. More particularly, FIG. 12A shows a cell phone 1200 that includes a PLL block 1210 that employs a voltage controlled oscillator 1216. FIG. 12B depicts a communication device 1240 that includes a PLL 1244 and oscillator 1248. The device 1240 is connected to a network 1250 and transmit and receives information over the network 1250. In addition to wireless networks, the circuitry of the present invention may be employed in wired networks, satellite networks, etc.
Although the invention herein has been described with reference to particular embodiments, it is to be understood that these embodiments are merely illustrative of the principles and applications of the present invention. It is therefore to be understood that numerous modifications may be made to the illustrative embodiments and that other arrangements may be devised without departing from the spirit and scope of the present invention as defined by the appended claims.

## Claims

1. An oscillator for operation at a fundamental frequency, comprising:
a three terminal device;
first circuitry coupled across a first terminal and a second terminal of the three terminal device and operable to bias the three terminal device and to feedback a select amount of phase noise generated by the three terminal device into the three terminal device so as to reduce a proportional amount of phase noise present at a third terminal of the three terminal device; and
a first filter and a second filter coupled in series to the third terminal of the three terminal device, each of said filters having respective time constants adjusted to the fundamental frequency of operation of the oscillator.

2. The oscillator of claim 1, further comprising a resonator coupled to the second terminal and operable to provide an input to the three terminal device.

3. The oscillator of claim 2, wherein the resonator is a ceramic resonator.

4. The oscillator of claim 1, wherein the three terminal device comprises a bipolar transistor and wherein the first, second and third terminals of the three terminal device respectively comprise the collector, base and emitter nodes of the bipolar transistor.

5. The oscillator of claim 1, wherein the three terminal device comprises a field effect transistor and wherein the first, second and third terminals of the three terminal device respectively comprise the source, gate and drain nodes of the field effect transistor.

6. The oscillator of claim 1, further comprising second circuitry coupled across the second terminal and the third terminal of the three terminal device and operable to control the thermal drift of the three terminal device during operation of the oscillator.

7. The oscillator of claim 1, wherein the three terminal device is operable to provide a 180-degree phase shift between the first and second terminals.

8. The oscillator of claim 1, wherein the first filter comprises an LC filter.

9. The oscillator of claim 1, wherein the second filter comprises an RC filter.

10. The oscillator of claim 1, further comprising a resonator and tuning sub-circuit coupled to the second terminal and operable to select different operating frequencies for the oscillator.

11. The oscillator of claim 10, wherein the resonator and tuning sub-circuit includes a tuning network capacitively coupled to a resonator, the tuning network operable to reduce thermal drifting in the oscillator.

12. The oscillator of claim 6, wherein the second circuitry comprises a first feedback capacitor coupled to the second terminal, a temperature compensation resistance coupled to the first feedback capacitor and the third terminal and a second feedback capacitor coupled between first feedback capacitor and the temperature compensation resistance and to ground.

13. The oscillator of claim 1, wherein the first circuitry maintains a substantially constant bias voltage at the first terminal of the three terminal device over the operating temperature range of the oscillator.

14. The oscillator of claim 1, further comprising a pair of resonators coupled in parallel to the second terminal and operable to provide an input to the three terminal device.

15. A network communication device, the device comprising:
a phase lock loop for generating a clock signal used to transmit or recover information communicated from or to the device,
wherein the phase lock loop includes a voltage controlled oscillator for generating the clock signal, the voltage controlled oscillator comprising,
a three terminal device;
first circuitry coupled across a first terminal and a second terminal of the three terminal device and operable to bias the three terminal device and to feedback a select amount of phase noise generated by the three terminal device into the three terminal device so as to reduce a proportional amount of phase noise present at a third terminal of the three terminal device;
second circuitry coupled across the second terminal and the third terminal of the three terminal device and operable to control the thermal drift of the three terminal device during operation of the oscillator;
a first noise filter coupled to the third terminal of the three terminal device; and
a second noise filter inductively coupled to the first noise filter, and
wherein the first and second noise filters are operable to provide regenerative filtering at the third terminal.

16. The device of claim 15, wherein the oscillator further comprises a resonator coupled to the second terminal and operable to provide an input to the three terminal device.

17. The device of claim 16, wherein the resonator is a ceramic resonator.

18. The device of claim 15, wherein the three terminal device comprises a bipolar transistor and wherein the first, second and third terminals of the three terminal device respectively comprise the collector, base and emitter nodes of the bipolar transistor.

19. The device of claim 15, wherein the three terminal device comprises a field effect transistor and wherein the first, second and third terminals of the three terminal device respectively comprise the collector, base and emitter nodes of the field effect transistor.

20. The device of claim 15, wherein the three terminal device is operable to provide a 180-degree phase shift between the first and second terminals.

21. A cellular telephone, the telephone comprising:
a phase lock loop for generating a clock signal used to transmit or recover information communicated from or to the cellular telephone,
wherein the phase lock loop includes a voltage controlled oscillator for generating the clock signal, the voltage controlled oscillator comprising,
a three terminal device;
first circuitry coupled across a first terminal and a second terminal of the three terminal device and operable to bias the three terminal device and to feedback a select amount of phase noise generated by the three terminal device into the three terminal device so as to reduce a proportional amount of phase noise present at a third terminal of the three terminal device;
second circuitry coupled across the second terminal and the third terminal of the three terminal device and operable to control the thermal drift of the three terminal device during operation of the oscillator; and
a first filter and a second filter inductively coupled in series to the third terminal of the three terminal device.

22. The oscillator of claim 1, further comprising circuit means coupled between the second and third terminals of the three terminal device and operative to compensate for thermal drift associated with the oscillator.

23. The oscillator of claim 22, wherein the circuit means is capacitively coupled between the second and third terminals of the three terminal device.

24. The oscillator of claim 1, further comprising an additional three terminal device coupled to the three terminal device in a push-push configuration.

25. The oscillator of claim 24, wherein the additional three terminal device is coupled to the three terminal device through a plurality of resonators coupled in series to each other.

26. The oscillator of claim 25, wherein the first circuitry is coupled to the additional three terminal device.

27. An oscillator for operation at a fundamental frequency, comprising:
a three terminal device having a first terminal, a second terminal and a third terminal;
active feedback bias circuitry including a first feedback transistor coupled to the first terminal of the three terminal device through a feedback LC filter and to the second terminal of the three terminal device through a second feedback RC filter; and
first and second noise filters coupled to the third terminal of the three terminal device.

28. The oscillator of claim 27, wherein the active feedback bias circuitry is operable to feedback a select amount of phase noise generated by the three terminal device into the second terminal of the three terminal device.

29. The oscillator of claim 27, wherein the first and second noise filters each include time constants tuned to the fundamental frequency of operation.

30. The oscillator of claim 27, wherein the first noise filter is inductively coupled to the second noise filter and the filters are operable to reduce the spectral noise density of the device.

31. The oscillator of claim 30, wherein the first filter comprises an inductor coupled in parallel to a first capacitor.

32. The oscillator of claim 31, wherein the second filter comprises a resistor coupled in parallel to a second capacitor.

33. The oscillator of claim 27, wherein the active feedback bias circuitry further comprises a second feedback transistor connected between a bias source and the first feed back transistor.

34. The oscillator of claim 1, further comprising an output node capacitively coupled to the third terminal of the three terminal device.

35. The oscillator of claim 34, wherein the output node is coupled to third terminal between the first and second filters.