NREL is a national laboratory of the U.S. Department of Energy, Office of Energy Efficiency and Renewable Energy, operated by the Alliance for Sustainable Energy, LLC.

A Manufacturing Cost Analysis 

Relevant to Single- and Dual-Junction 

Photovoltaic Cells Fabricated with III-Vs 

and III-Vs Grown on Czochralski Silicon 

The National Center for Photovoltaics

Aaron Ptak

David Young

Scott Ward

Myles Steiner

Pauls Stradins

John Geisz

Daniel Friedman

Sarah Kurtz 

 

Graphics and Communications

Alfred Hicks

Kendra Palmer

Nicole Harrison 

 

Strategic Energy Analysis Center 

Ted L. James 

David Feldman 

Robert Margolis 

 

Hydrogen Technologies Center

(Photoelectrolysis Interest) 

Todd Deutsch 

Henning Doscher

John Turner 

September 30, 2013

Publication Number:

NREL/PR-6A20-60126

Contract Number:

NREL: DE-AC36-08GO28308 

Michael Woodhouse Alan Goodrich

Additional NREL Contributors:
2

Analysis Disclaimer

DISCLAIMER AGREEMENT

 

These manufacturing cost model results (“Data”) are provided by the National Renewable Energy Laboratory 

(“NREL”), which is operated by the Alliance for Sustainable Energy LLC (“Alliance”) for the U.S. Department of Energy 

(the “DOE”).

It is recognized that disclosure of these Data is provided under the following conditions and warnings: (1) these 

Data have been prepared for reference purposes only; (2) these Data consist of forecasts, estimates or assumptions 

made on a best-efforts basis, based upon present expectations; and (3) these Data were prepared with existing 

information and are subject to change without notice.

 

The names DOE/NREL/ALLIANCE shall not be used in any representation, advertising, publicity or other manner 

whatsoever to endorse or promote any entity that adopts or uses these Data. DOE/NREL/ALLIANCE shall not 

provide any support, consulting, training or assistance of any kind with regard to the use of these Data or any 

updates, revisions or new versions of these Data.

 

YOU AGREE TO INDEMNIFY DOE/NREL/ALLIANCE, AND ITS AFFILIATES, OFFICERS, AGENTS, AND EMPLOYEES 

AGAINST ANY CLAIM OR DEMAND, INCLUDING REASONABLE ATTORNEYS' FEES, RELATED TO YOUR USE, RELIANCE, 

OR ADOPTION OF THESE DATA FOR ANY PURPOSE WHATSOEVER. THESE DATA ARE PROVIDED BY 

DOE/NREL/ALLIANCE "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, THE 

IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 

DISCLAIMED. IN NO EVENT SHALL DOE/NREL/ALLIANCE BE LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL 

DAMAGES OR ANY DAMAGES WHATSOEVER, INCLUDING BUT NOT LIMITED TO CLAIMS ASSOCIATED WITH THE LOSS 

OF DATA OR PROFITS, WHICH MAY RESULT FROM AN ACTION IN CONTRACT, NEGLIGENCE OR OTHER TORTIOUS 

CLAIM THAT ARISES OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THESE DATA.
3

Motivations and Objectives

Efficiency Records Chart available at: http://www.nrel.gov/ncpv/images/efficiency_chart.jpg. The chart above was downloaded on 9/13/2013.

III-Vs

• III-Vs continue to dominate PV—at least in terms of Research-Cell Efficiencies.

• This materials set has historically been limited by high manufacturing costs—so it would be 

beneficial to more accurately and fully understand the underlying factors behind this. 

• Equally important, it would be good to understand some technology pathways to lower costs.

4

Executive Summary

We examine the current, mid-term, and long-term manufacturing costs for 

III-Vs deposited by traditional Metal Organic Vapor Phase Epitaxy (MOVPE):

o Representative III-V photovoltaic devices and process flows are assembled after an 

extensive literature survey and after interviews with researchers and cells companies. 

Relevant materials suppliers and equipment vendors have also contributed to provide 

inputs for our manufacturing costs calculations.

o Step-by-step manufacturing cost calculations are shown for the case of single-junction 

GaAs cells. The model cells are envisioned to be made from thin solid film device layers. 

In what is esoterically called the ‘epitaxial lift-off’ (ELO) approach, the device layers are 

then released from the parent epitaxial substrate by selective etching of a sacrificial 

release layer (e.g., AlAs exposed to HF). 

o The analysis is extended to the case of two dual-junction cell architectures: GaAs0.75P0.25

on n-type Czochralski (Cz) Si via MOVPE but without ELO, and In0.5Ga0.5P on GaAs via ELO. 

o With the traditional MOVPE approach for making the model cells—and with reasonable 

expectations for precursor utilizations, deposition rates, batch sizes, and parent episubstrate allocations—the costs for these three cell types are calculated to be greater 

than $1.0/W at one-sun AM 1.5G. 

o We highlight specific cost reduction pathways for novel III-V manufacturing processes to 

arrive at cell prices commensurate with the SunShot PV systems price goal of $1/W.
 

 

 

A Representative III-V Multi-junction Solar Cell
 

Note: The optical penetration depth for each color is not represented 

to scale within the figure. 

Figures adapted from Friedman, D.; Olson, J.; Kurtz, S. (2011). High Efficiency III-V Multijunction Solar Cells, in Handbook of Photovoltaic Science 

and Engineering. 2nd ed. West Sussex, UK: John Wiley and Sons. 

5
 

 

 

 

 

 

But First, the Single-junction Case: a Representative Single-Junction III-V 

Device that is Used for the Cost Model 

Proof-of-concept within the published literature: 

2” diameter single-junction GaAs on a flexible carrier (right). The solar cell was grown 

from (100) GaAs wafers with a misorientation of 2° towards [110] (left figure). 

From Schermer, J.J.; Bauhuis, G.J.; Mulder, P.; Haverkamp, E.J.; van Deelen, J.; van Niftrik, A.T.J.; Larsen, P.K. (2006). “Photon confinement in highefficiency, thin-fill III-V solar cells obtained by epitaxial lift-off.” Thin Solid Films 511-512; pp. 645-653. 

6
 

An Example Process Flow for Making Single-Junction III-V Devices by ELO
 

Ongoing NREL Analysis 

9/13/2013 

7
 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Please see the annotated 

notes below this slide 

for more details. 

Step 1: Unpack and Clean GaAs Parent Epi-Substrate—1 


Current lowest found cost for GaAs parent epi- Wafering Geometry for 240 cm2 Cz-Si Wafers 

substrate: $150 for a 6” diameter round wafer that is 

cut into a ‘pseudo-square’ shape (≈27% area loss).

Final Cell Area = π(7.62 cm)2x0.73

= 133 cm2 

Cost = $150/ 133 cm2
 

≈ $11,300/ m2
 

= $4.0/ W @ η = 28%, 10 reuses 

= $0.81/ W @ η = 28%, 50 reuses 

≈ $0.081/ W @ η = 28%, 500 reuses 

Additional Details About the Price Terms from the Wafer Supplier: 

•	 The price shown is for 600 μm wafer thickness, which is assumed to be necessary for handling and for potential 

material losses during each surface preparation. 

•	 n-type doping (ND 1018 – 1019), offcut 2° <100> in the <111> B direction. 

•	 For the price shown, the purity requirements have been relaxed in order to make less expensive ‘Solar Grade’ wafers. The 

typical price for high purity wafers is probably more around $180/wafer. 

•	 The wafer price estimate includes the shaping of 6” round wafers into psuedo-square shapes (if requested). 

•	 The price shown is a reasonable expectation for a 480,000 wafers per year contract level. To satisfy such an order 

would require new scale-up of current GaAs wafer facilities. Therefore, a long-term supply contract would also be required. 

8
 
slides, the reader can see that the onesun cost allocation for the GaAs parent episubstrate is actually calculated to be lower than the costs for a 


fixed Si wafer in the case that the III-V device layers are grown from a GaAs parent with ELO and with hundreds of growth cycles per parent episubstrate. 


For the case of heteroepitaxy and ELO from a c-Si wafer, our calculated costs for a 600 micron thick wafer are around $95/m2 at an assumed 


polysilicon price of $25/kg. : (1) The bandgaps of c-Si (1.2 eV) and GaAs (1.4 eV) 


are too similar to make an effective tandem junction device, but 


other III-Vs have a more appropriate bandgap around 1.8 eV. 


(2) Cz-Si has served as a template for making GaAs ELO 

devices. There is, however, a compromise in material quality 

and yields in the ELO of III-Vs on c-Si approach. 
 

 

 

 

 

 

 

 

Step 1: Unpack and Clean GaAs Parent Epi-Substrate—2 

Sample Process Flow for Chemical-Mechanical Polishing of GaAs Wafers 

Schematic of atomistic rate processes in epitaxial growth. Figure from: Pohl, 

U.W. (2013). Atomistic Aspects of Epitaxial Layer Growth. In Epitaxy of 

Semiconductors. Berlin: Springer-Verlag. 

At much larger order volumes than typical for today, $8 - $12 per
 

repolish might someday become possible for 6” diameter substrates.
 

Please see the notes below this slide for m 


Figure from: Bauhuis, G.J.; Mulder, P.; Haverkamp, E.J.; Schermer, J.J.; Bongers, E.; The Chemical Mechanical Polishing (CMP) process flow is reproduced, Oomen, G.; Kostler, W.; Strobl, G. (2010). “Wafer Reuse for Repeated Growth of III-V with permission, from III-V reclaim (http://www.35reclaim.de/). Solar Cells.” Progress in Photovoltaics 18; pp. 155-159. 

9
 

 

Step 1: Unpack and Clean GaAs Parent Epi-Substrate—3


(The Reference Case Scenario in the Bar Chart Assumes 50 Reuses and 70% Yields) 

Please see the annotated 

notes below this slide 

for more details. 

10
 

 

 

The Model MOVPE Reactor
 

Today’s commercial reactors can accommodate 8 x 6” substrates or 15 x 4” substrates. 

11
 

 

 

 

 

 

 

Step 2: MOVPE of AlAs Sacrificial Release Layer
 

Al(CH3)3 + AsH3 AlAs + Byproducts
 

(e.g., CH4) 

2. MOVPE of AlAs 

release layer. 

NOTE: Yields need to be considered. The 


assumption shown 


Please see the annotated
 

notes below this slide
 

for more details.
 

Calculated CapEx in Depreciation for this step (500 MW scale of purchase): $0.027/W
 

12
 
for the thinnest layers in the model device, these times are included in the Total Average Cycle Times (TACT) for the GaAs base layer step costs 

calculation only. 
 

 

 

Step 3: MOVPE of n++ GaAs Contact Layer 

Ga(CH3)3 + AsH3 GaAs + Byproducts 

(e.g., CH4) 

3. MOVPE of GaAs contact layer. 

Please see the annotated 

notes below this slide 

for more details. 

Calculated CapEx in Depreciation for this step (500 MW scale of purchase): $0.10/W 

13
 
for the thinnest layers in the model device, these times are included in the Total Average Cycle Times (TACT) for the GaAs base layer step costs 

calculation only. 
 

 

 

 

 

 

Step 4: MOVPE of n+ AlInGaP Window Layer 

xAl(CH3)3 + yIn(CH3)3 + (1-x-y)Ga(CH3)3 + PH3 AlxInyGa1-x-yP + Byproducts 

(e.g., CH4) 

4. MOVPE of AlInGaP 

window layer. 

NOTE: In consideration of material quality 

issues, the assumed deposition rate for an 

AlInGaP layer (4 μm/hr) is much lower than for 

the GaAs layers (15 μm/hr). 

Calculated CapEx in Depreciation for this step (500 MW scale of purchase): $0.09/W 

Please see the annotated 

notes below this slide 

for more details. 

14
 
for the thinnest layers in the model device, these times are included in the Total Average Cycle Times (TACT) for the GaAs base layer step costs 

calculation only. 
 

 

 

Step 5: MOVPE of n GaAs Emitter Layer 

Ga(CH3)3 + AsH3 GaAs + Byproducts 

(e.g., CH4) 

5. MOVPE of GaAs emitter layer. 

Please see the annotated 

notes below this slide 

for more details. 

Calculated CapEx in Depreciation for this step (500 MW scale of purchase): $0.10/W 

15
 
for the thinnest layers in the model device, these times are included in the Total Average Cycle Times (TACT) for the GaAs base layer step costs 

calculation only. 
 

 

 

 

 

 

 

Step 6: MOVPE of p GaAs Base Layer
 

Ga(CH3)3 + AsH3 GaAs + Byproducts 

(e.g., CH4) 

6. MOVPE of GaAs 

base layer. 

ALL temperature ramp up, pump down, and cleaning times 

for steps 2 – 8 are accounted for in this step of the process 

flow. For this reason, and because TMG is a relatively cheap 

III- source, the relative amount of depreciation and labor 

costs are higher in this MOVPE step than in others. 

Please see the annotated 

notes below this slide 

for more details. 

Calculated CapEx in Depreciation for this step (500 MW scale of purchase): $7.50W 

16
 
for the thinnest layers in the model device, these times are included in the Total Average Cycle Times (TACT) for the GaAs base layer step costs 

calculation only. 
 

 

 

 

 

 

 

Step 7: MOVPE of p+ InGaP BSF 

xIn(CH3)3 + (1-x)Ga(CH3)3 + PH3 InxGa 1-xP + Byproducts 

(e.g., CH4) 

7. MOVPE of InGaP BSF. 

Actual density may vary, and needs to be determined empirically. 

NOTE: In consideration of material quality 

issues, the assumed deposition rate for the 

InGaP layer (4 μm/hr) is much lower than for 

the GaAs layers (15 μm/hr). 

Please see the annotated 

notes below this slide 

for more details. 

Calculated CapEx in Depreciation for this step 

(500 MW scale of purchase): $0.18/W. 

17
 
for the thinnest layers in the model device, these times are included in the Total Average Cycle Times (TACT) for the GaAs base layer step costs 

calculation only. 
 

 

 

 

 

 

 

 

Step 8: MOVPE of p++ AlGaAs Contact/ Buffer Layer 

xAl(CH3)3 + (1-x)Ga(CH3)3 + AsH3 AlxGa1-x As + Byproducts 

(e.g., CH4) 

8. MOVPE of AlGaAs contact / buffer layer. 

Actual density may vary, and needs to be determined empirically. 

NOTE: In consideration of material quality 

issues, the assumed deposition rate for an 

AlGaAs layer (3.0 μm/hr) is much lower than 

for the GaAs layers (15 μm/hr). 

Please see the annotated 

notes below this slide 

for more details. 

Calculated CapEx in Depreciation for this step 

(500 MW scale of purchase): $0.48/W 

18
 
for the thinnest layers in the model device, these times are included in the Total Average Cycle Times (TACT) for the GaAs base layer step costs 

calculation only. 
 

 

Step 9: Deposition of Back Contact Metals and 

Bonding of Cell to Flexible Handle (e.g., PET) 

The material utilizations shown are 

assumed for the case that 9. Deposition of back contact 

rotatable sputtering targets would metals and bonding of cell 

be utilized. to flexible handle (PET). 

Please see the annotated notes below this slide
 

for more details.
 

Calculated CapEx in Depreciation for this step 


(500 MW scale of purchase): $0.04/W
 

19
 

 

 

 

 

 

 

 

Step 10: Dissolution of AlAs Release Layer, and Release of MOVPE 

Device Layers from Parent Epi-Substrate (ELO Step) 

O2 AlAs + 3HF + 6H2O AsH3 + [AlFn(H2O)6 - n](3 – n)+ + (3 - n)F- + nH2O n=0,1,2 or 3 

10. Dissolution of AlAs 

release layer and release of MOVPE 

device layers from parent epi-substrate 

Lateral etch rates up to around 30 mm/ hr have been demonstrated.*
 

For 3” of etching, this would equate to AlAs etch times on the order of 2.5 hours.
 

* For example, see Schermer, J.J.; Bauhuis, G.J.; Mulder, P.; Haverkamp, E.J.; van Deelen, J.; van Niftrik, A.T.J.; Larsen, P.K. (2006). 

“Photon confinement in high-efficiency, thin-fill III-V solar cells obtained by epitaxial lift-off.” Thin Solid Films 511-512; pp. 645-653. 

20
 

 

 

 

 

 

 

 

 

Step 10: Dissolution of AlAs Release Layer, and Release of MOVPE 

Device Layers from Parent Epi-Substrate (ELO Step) 

The capital equipment, labor costs, 

10. Dissolution of AlAs
 

release layer and release of MOVPE
 

device layers from parent epi-substrate
 

etc. for a specific ELO process have 

not been included, primarily because 

the equipment for this step is not yet 

commercially available. The cost 

estimates shown, therefore, are only a 

proxy, which we have based upon the 

in-line wet bench chemical treatment 

used in c-Si surface texturing. 

The cells may also need to be ‘diced’ 

into smaller areas. 

Calculated CapEx in Depreciation for this step 

(500 MW scale of purchase): $0.092/W 

Please see the annotated notes below this slide
 

for more details.
 

21
 

 

 

 

 

 

 

 

 

 

Step 11: Etching of n++ GaAs Contact Layer
 

11. Etching of contact layer. 

•	 Cost of ownership
 

estimates are again based
 

upon a proxy borrowed
 

from the in-line wet bench
 

chemical treatment used in 


c-Si surface texturing.
 

•	 One may also need to
 

consider the need for
 

lithography in this etching 


step, which is not included 


in these cost estimates. 


Calculated CapEx in Depreciation for this step 

(500 MW scale of purchase): $0.092/W 

Please see the annotated notes below this slide 

for more details. 

22
 

 

 

 

 

 

 

 

 

 

 

 

 

Step 12: Frontside Metallization 

(Electroplating of Cu Alloy with Ni Diffusion Barrier) 

Frontside metal plating recipe: 

(1) Electroless Ni diffusion barrier 	 
 

Width: 5.0 μm, Height: 1.0 μm
 

(2) Electroplated Cu 	 
 

Width: 40. μm, Height: 3.0 μm
 

(3) Electroplated Sn
 

Width: 40. μm, Height 3.0 μm 


(4) Electroplated Ag 	 
 

Width: 40. μm, Height: 8.0 μm 


For a description of this frontside 

metallization approach, please see: 

“A Wafer-Based Monocrystalline Silicon 

Photovoltaics Roadmap: Utilizing Known 

Technology Improvement Opportunities 

for Further Reductions in Manufacturing 

Costs.” (2013). Solar Energy Materials 

and Solar Cells 114; pp. 110–135. 

Calculated CapEx in Depreciation for this step (500 MW scale of purchase): $0.12/W 

12. Frontside metallization. 

23
 

 

 

 

 

Step 13: Deposit AR Coating 

13. Deposit AR coating.

The material utilizations are relevant to 


rotatable sputtering targets.
 

Please see the annotated notes below this slide
 

for more details.
 

Calculated CapEx in Depreciation for this step 


(500 MW scale of purchase): $0.045/W
 

24
 
accounting for sputtering chamber pump down and venting and maintenance times in the total average cycle times for the sputtering 

equipment. The result is relatively higher costs for depreciation and maintenance relative to materials. 
 

Cost Summary, by Step, for the Reference Case. 

(20 substrate reusages, precursor utilizations of 30% for the III- source and 20% for the V- source, 15 μm/hr GaAs, 70% effective cell yield ) 

Please see the annotated 

notes below this slide 

for more details. 

26
 

Technology Roadmap Simulations for Single-Junction III-V’s (GaAs Base)
 

27
 

 

Cost Summary, by Step, in the Mid-Term Single-Junction Case 

(500 epi- parent substrate reusages; precursor utilizations of 30% for the III- source and 20% for the V- source; 20 μm/hr GaAs) 

Please see the annotated 

notes below this slide 

for more details. 

28
 

 

Cost Summary, by Step, in the Long-Term Single-Junction MOVPE Case
 

(500 epi- parent substrate reusages; precursor utilizations of 50% for the III- source and 30% for the V- source; 20 μm/hr GaAs) 

Please see the annotated 

notes below this slide 

for more details. 

29
 

Final Considerations for III-V Cells Serving Directly as Drop -In 


Replacements for c-Si Cells (Without Optical Concentration).
 

30
 
shown above, the SunShot adjusted cell price goal shown in slide 27 is calculated to reach this hypothetical $0.60/W module price target. 

*For a rationale of these cost-efficiency adjustments, please see: A Goodrich, T James, and M Woodhouse, ‘Residential, Commercial, and UtilityScale Photovoltaic System Prices in the United States: Current Drivers and Cost Reduction Opportunities’ (2012). Available online at: http:// 

www.nrel.gov/docs/fy12osti/53347.pdf. 
 

 

 

 

 

Two Cases for Dual -

Junction Solar Cells 

(1) III-V Top Cells via MOVPE on 

Czochralski-Grown Silicon 

Bottom Cells 

(2) In0.5Ga0.5P Top Cells on GaAs 

Bottom Cells via MOVPE & ELO 
 

 

 

What Are the Desirable Properties for a Dual-Junction Solar Cell?
 

(Left) AM 1.5G, and (Right) 100 x AM1.5D dual-junction solar cell efficiency contours in the Shockley-Queisser limit. The dashed 

line with a circle represents a fixed Si bottom cell and the associated local maximum in efficiency. 

From Grassman, T.J.; Carlin, J.A.; Ratcliff, C.; Chmielewski, D.J.; Ringel, S.A. (2013). “Epitaxially-Grown Metamorphic 

GaAsP/Si Dual-Junction Solar Cells.” Proceedings of the IEEE PVSC. 

32
 

 

 

What Are the Desirable Properties for a Dual-Junction Solar Cell?
 

Si bottom cell GaAs bottom cell 

≈37% Long-Term 

Efficiency Potential 

≈35% Long-Term 

Efficiency Potential 

Isoefficiency plots for two-junction, series connected tandem structures under AM 1.5G one-sun illumination. In this analysis,

reasonable values for Jo, μ, τ, etc. are incorporated into the efficiency projections (not just Shockley-Quiesser). 

From “Modeling of two-junction, series-connected tandem solar cells using topcell thickness as an adjustable parameter”

Sarah Kurtz, P Faine, and Jerry Olson Journal of Applied Physics 68 1890 (1990); doi:10.1063/1.347177.

33
 

 

 

 

(1986). “14.5% conversion efficiency GaAs solar cell 

fabricated on Si substrates.” Applied Physics Letters 

(49:1614); doi 10.1063/1.97245.

But III-Vs on Si is Not a New Idea
 

From Itoh, Y.; Nishioka, T.; Yamamoto, A.; Yamaguchi, M. 


34
 

 

What Are the Desirable Properties for a Dual-Junction Solar Cell?
 

GaAs Please see the annotated notes below this slide 

0.75P0.25 In0.5Ga0.5P for more details. 

35
 

 

 

What Are the Desirable Properties for a Dual-Junction Solar Cell?
 

Si bottom cell GaAs bottom cell
 

GaAs0.75P0.25 

(≈37% Long-Term 

Efficiency Potential on Si) 

In0.5Ga0.5P 

(≈35% Long-Term Efficiency 

Potential on GaAs) 

Isoefficiency plots for two-junction, series connected tandem structures under AM 1.5G one-sun illumination. In this analysis,

reasonable values for Jo, μ, τ, etc. are incorporated into the efficiency projections (not just Shockley-Quiesser). 

From “Modeling of two-junction, series-connected tandem solar cells using topcell thickness as an adjustable parameter”

Sarah Kurtz, P Faine, and Jerry Olson Journal of Applied Physics 68 1890 (1990); doi:10.1063/1.347177.

36
 

 

 

 

Representative III-V’s on Cz-Si Solar Cell
 

NREL Model Device Diagram 

9/13/2013 

Device concept inspired by “Epitaxially-Grown Metamorphic GaAsP/Si Dual-Junction Solar Cells” from
 

T J Grassman, J A Carlin, C Ratcliff, D J Chmielewski, and S A Ringel Proceedings of the IEEE PVSC (2013).
 

37
 

A Representative Process Flow for Making Such a Device
 

Ongoing NREL Analysis 

9/13/13 

38
 

 

 

 

 

 

 

 

 

 

 

 

Step 1: Test Incoming Wafer 

Wafer Geometry from c-Si Estimated cost for a 160. μm thick, 237 cm2 Cz Si 

wafer at $23/ kg polysilicon with diamond-wire sawing 

= $43/ m2 = $1.0/ wafer 

= $0.14/ W @ η = 30% with 100% yield 

= $0.20/ W @ η = 30% with 70% yield. 

Estimated cost for an 80. μm thick, 155 cm2 Cz Si 

wafer at $23/ kg polysilicon with diamond-wire sawing 

and kerf recycling 

= $22/ m2 = $0.34/ wafer

= $0.073/ W @ η = 30% with 100% yield. 

NREL Cost Analysis 

9/13/ 2013. 

For a description of c-Si wafer prices, please see: 

“A Wafer-Based Monocrystalline Silicon Photovoltaics 

Roadmap: Utilizing Known Technology Improvement 

Opportunities for Further Reductions in Manufacturing 

Costs.” (2013). Solar Energy Materials and Solar Cells 114; 

pp. 110–135. 

39
 

 

 

The Model MOVPE Reactor
 

Source: NREL MCM Group Today’s commercial reactors can accommodate 8 x 6” substrates or 15 x 4” substrates. 

40
 

 

Cost Summary, by Step, for the Reference Case.
 

(Precursor utilizations of 30% for the III- source and 20% for the V- source) 

Please see the annotated 

notes below this slide 

for more details. 

41
 

Technology Roadmap Simulations for Dual -Junction GaAs0.75P0.25 on Cz-Si Cells
 

43
 

 

Cost Summary, by Step, in the Long-Term Case 

(Precursor utilizations of 80% for the III- source and 30% for the V- source, 80 μm Cz wafer) 

Please see the annotated 

notes below this slide 

for more details. 

44
 

Final Considerations for III-V Cells Directly Serving as Drop-in 


Replacements for c-Si Cells (Without Optical Concentration)
 

45
 
shown above, the SunShot adjusted cell price goal shown in slide 43 is calculated to reach this hypothetical $0.70/W module price target. 

*For a rationale of these cost-efficiency adjustments, please see: A Goodrich, T James, and M Woodhouse, ‘Residential, Commercial, and UtilityScale Photovoltaic System Prices in the United States: Current Drivers and Cost Reduction Opportunities’ (2012). Available online at: http:// 

www.nrel.gov/docs/fy12osti/53347.pdf. 
Technology Roadmap Simulations for Dual-Junction III-Vs (In0.5Ga0.5P on GaAs)
 

46
 

Cost Summary, by Step, in the Long-Term Dual-Junction MOVPE Case
 

Please see the annotated 

notes below this slide 

for more details. 

47
 

Final Considerations for III-V Cells Directly Serving as Drop-in 


Replacements for c-Si Cells (Without Optical Concentration)
 

48
 
shown above, the SunShot adjusted cell price goal shown in slide 46 is calculated to reach this hypothetical $0.65/W module price target. 

*For a rationale of these cost-efficiency adjustments, please see: A Goodrich, T James, and M Woodhouse, ‘Residential, Commercial, and UtilityScale Photovoltaic System Prices in the United States: Current Drivers and Cost Reduction Opportunities’ (2012). Available online at: http:// 

www.nrel.gov/docs/fy12osti/53347.pdf. 
 

 

The Possibility of Lower Module Costs By Concentrating Optics Needs to be 

Considered: The Case for Low-Concentration PV (LCPV) with Linear Reflective Troughs 

NREL Stock Photo (available online at: http://images.nrel.gov/albums.php?albumId=207403) modified by Greg Smestad 

49
 

The Possibility of Lower Module Costs By Employing Concentrating Optics Needs to 

be Considered: The Case for High-Concentration PV (HCPV) With the Fresnel Lens Box 

Source of Figure: NREL
 

50