# Patent

## Title
Compensation network, switching power supply circuit and circuit compensation method

## Abstract

Disclosed are a compensation network, switching power supply circuit and a circuit compensation method; in the compensation network: an output end of the resistance capacitance network is cascaded to an input end of the unity gain amplifier network, and an output end of the unity gain amplifier network is cascaded to an input end of the error amplifier network; the resistance capacitance network is configured to provide a voltage dividing resistor, and generate a zero and a pole which are mutually canceled; the unity gain amplifier network is configured to generate a zero for canceling a pole in a low pass filter network, and a pole for suppressing a high-frequency noise and improving a phase margin of a switching power supply circuit; and the error amplifier network is configured to generate a pole for increasing low-frequency gain and a zero for canceling another pole in the low pass filter network.

## Background
TECHNICAL FIELD
The present disclosure relates to the field of microelectronic technologies, and particularly to a compensation network, a switching power supply circuit and a circuit compensation method.
BACKGROUND
Power supply technology belongs to a category of power electronic technology, and is an edge cross subject integrating many disciplines, such as power conversion, modern electronics and automatic control, and has been widely applied in various fields nowadays, such as industry, energy sources, traffic, IT, aeronautics, national defense, education, and culture. In fact, development of the power supply technology is concentrated on diligent studies conducted for improving an efficiency and a performance, reducing in size and weight, being safe and reliable, eliminating power public nuisance, and reducing electromagnetic interference and traces of electric noise, a switching power supply is a crucial part in the whole power supply technology, where, a compensation network of a Pulse Width Modulation (PWM) power supply regulator is an important research subject of the switching power supply.
Generally, a switching power supply circuit is composed of three basic modules, as shown in FIG. 1, which include: a power switching regulator 11, a low pass filter network 12 and a compensation network 13. The power switching regulator 11 is configured to generate a square wave signal, to control an ON/OFF state of a power tube; the low pass filter network 12, i.e., an LC network, is configured to filter an output voltage and current, to generate an LC double pole; the compensation network 13 is composed of a voltage sampling circuit, an error amplifier and a compensation circuit element.
An error amplifier is often used in design of a switching power supply circuit, if a low-frequency gain desired by the switching power supply circuit is very high, there is a need to compensate the error amplifier in the compensation network, so as to guarantee that the switching power supply circuit has a great bandwidth and a good phase margin. A high low-frequency gain is required by the switching power supply circuit in a voltage mode, but a power-stage transfer function has a low low-frequency gain, and there is a pair of LC conjugated poles, therefore there is a need to add an error amplifier to obtain a high low-frequency gain and meanwhile compensate the error amplifier to eliminate influence of the conjugated poles, so as to make the switching power supply circuit have a high phase margin at the same time of obtaining a great bandwidth.
As shown in FIG. 2, a conventional compensation network adopts a solution that two ends of an error amplifier AMPO are bridged with resistance capacitance networks, and the compensation network composed of resistors R6, R7, R8 and capacitors C5, C6, C7 just can compensate three poles and two zeros in the original switching power supply circuit. The switching power supply circuit obtained in such way can obtain a high bandwidth and phase margin at a low frequency, have a small gain at a switching frequency, and thus have a good suppression effect on switching noises. However, when a switching frequency required by the switching power supply circuit is high, stability of the switching power supply circuit cannot be guaranteed any more due to a pole effect of the error amplifier itself. Additionally, a pole would also be introduced when an input end of the error amplifier needs to be connected with a voltage dividing resistor, which has a great effect on compensation.
SUMMARY
In order to solve the problem in the prior art, embodiments of the present invention provide a compensation network, a switching power supply circuit and a circuit compensation method.
Embodiments of the present invention provide a compensation network, including: a resistance capacitance network, a unity gain amplifier network and an error amplifier network; where,
an output end of the resistance capacitance network is cascaded to an input end of the unity gain amplifier network, and an output end of the unity gain amplifier network is cascaded to an input end of the error amplifier network;
the resistance capacitance network is configured to provide a voltage dividing resistor, and generate a zero and a pole which are mutually canceled;
the unity gain amplifier network is configured to generate a zero for canceling a pole in a low pass filter network, and a pole for suppressing a high-frequency noise and improving a phase margin of a switching power supply circuit; and
the error amplifier network is configured to generate a pole for increasing low-frequency gain and a zero for canceling another pole in the low pass filter network.
In the above solutions, the resistance capacitance network includes: a first resistor, a second resistor, a first capacitor and a second capacitor; where, the first resistor is connected in series between a first input end and a first output end, the second capacitor is connected between two ends of the first resistor, the first capacitor is connected between the first input end and the ground, and the second resistor is connected between the first output end and the ground.
In the above solutions, the unity gain amplifier network includes: a first amplifier, a third resistor, a fourth resistor and a third capacitor; where, the third resistor is connected between an inverting input end and an output end of the first amplifier; the fourth resistor and the third capacitor is connected between the inverting input end of the first amplifier and the ground; a positive input end of the first amplifier is connected to the first output end of the resistance capacitance network.
In the above solutions, the error amplifier network includes: a second amplifier, a fifth resistor and a fourth capacitor; where, the fifth resistor and the fourth capacitor is connected between an output end of the second amplifier and the ground; a positive input end of the second amplifier is connected to an output end of the unity gain amplifier network.
In the above solutions, the second capacitor is a variable capacitor, and the first resistor and the second resistor are variable resistors.
In the above solutions, the third capacitor is a variable capacitor, and the third resistor and the fourth resistor are variable resistors.
In the above solutions, the fourth capacitor is a variable capacitor, and the fifth resistor is a variable resistor.
In the above solutions, a capacitance value of the fourth capacitor is far greater than an equivalent capacitance value of the second amplifier.
Embodiments of the present invention provide a switching power supply circuit, including the compensation network described above.
Embodiments of the present invention provide a circuit compensation method, including: a resistance capacitance network provides a voltage dividing resistor and generates a zero and a pole which are mutually canceled; a unity gain amplifier network generates a zero for canceling a pole in a low pass filter network, and a pole for suppressing a high-frequency noise and improving a phase margin of a switching power supply circuit; and an error amplifier network generates a pole for increasing low-frequency gain and a zero for canceling another pole in the low pass filter network.
The compensation network provided by embodiments of the present invention includes: a resistance capacitance network, a unity gain amplifier network and an error amplifier network; where, an output end of the resistance capacitance network is cascaded to an input end of the unity gain amplifier network, and an output end of the unity gain amplifier network is cascaded to an input end of the error amplifier network; the resistance capacitance network is configured to provide a voltage dividing resistor, and generate a zero and a pole which are mutually canceled; the unity gain amplifier network is configured to isolate a dividing resistor and the error amplifier network, transfer a voltage change in an input end to an output end of the error amplifier network, generate a zero for canceling a pole in a low pass filter network, and a pole for suppressing a high-frequency noise and improving a phase margin of a switching power supply circuit; and the error amplifier network is configured to output the amplified voltage change, and generate a pole for increasing low-frequency gain and a zero for canceling another pole in the low pass filter network. As such, when the switching frequency required by a system is very high, the effect of the pole of the error amplifier itself on compensation effect can be suppressed; moreover, when an input end of the error amplifier needs to be connected to a voltage dividing resistor, the effect of the pole on compensation effect due to the voltage dividing resistor can be suppressed; so that the low-frequency gain of the switching power supply circuit is improved, a stability problem of the switching power supply circuit in a high-frequency voltage mode is solved, the switching power supply circuit can have a good phase margin at the same time of obtaining a very high bandwidth.



BRIEF DESCRIPTION OF DRAWINGS
In various drawings, which are not necessarily to scale, like reference symbols can describe like components Like reference symbols with different letter suffixes can indicate different examples of like components. The drawings generally illustrate each embodiment discussed here by way of explanation, not limitation.
FIG. 1 is a basic structural block diagram illustrating a switching power supply circuit in the prior art;
FIG. 2 is a basic structural diagram illustrating a compensation network in the prior art;
FIG. 3 is a schematic structural diagram illustrating a compensation network according to at least one embodiment of the present invention;
FIG. 4 is a basic schematic structural diagram illustrating a resistance capacitance network in a compensation network according to at least one embodiment of the present invention;
FIG. 5 is a basic schematic structural diagram illustrating a unity gain amplifier network in a compensation network according to at least one embodiment of the present invention; and
FIG. 6 is a basic schematic structural diagram illustrating an error amplifier network in a compensation network according to at least one embodiment of the present invention.



DETAILED DESCRIPTION
Embodiments of the present invention provide a compensation network, including: a resistance capacitance network, a unity gain amplifier network and an error amplifier network; where an output end of the resistance capacitance network is cascaded to an input end of the unity gain amplifier network, and an output end of the unity gain amplifier network is cascaded to an input end of the error amplifier network; the resistance capacitance network is configured to provide a voltage dividing resistor, and generate a zero and a pole which are mutually canceled; the unity gain amplifier network is configured to generate a zero for canceling a pole in a low pass filter network, and a pole for suppressing a high-frequency noise and improving a phase margin of a switching power supply circuit; the error amplifier network is configured to generate a pole for increasing low-frequency gain and a zero for canceling another pole in the low pass filter network.
The present disclosure will be further described in detail with reference to the accompanying drawings in combination with the detailed embodiments.
Embodiments of the present invention provide a compensation network, FIG. 3 is a schematic structural diagram illustrating the compensation network, as shown in FIG. 3, the compensation network is composed of three-stage compensation networks, which respectively are: a resistance capacitance network 31, a unity gain amplifier network 32 and an error amplifier network 33; an output end of the resistance capacitance network 31 is cascaded to an input end of the unity gain amplifier network 32, and an output end of the unity gain amplifier network 32 is cascaded to an input end of the error amplifier network 33; therefore, a voltage V1 is output after an output voltage Vin of the switching power supply is input into the resistance capacitance network 31, a voltage V2 is output after the voltage V1 is input into the unity gain amplifier network 32, and an output voltage Veaout is generated after the voltage V2 enters the error amplifier network 33; where, the resistance capacitance network 31 is configured to provide a voltage dividing resistor, and generate a zero and a pole which are mutually canceled; the unity gain amplifier network 32 is configured to isolate the dividing resistor and the error amplifier network 33, transfer a voltage change in an input end to an output end of the error amplifier network 33, generate a zero for canceling a pole in a low pass filter network, and a pole for suppressing a high-frequency noise and improving a phase margin of a switching power supply circuit; the error amplifier network 33 is configured to output the amplified voltage change, and generate a pole for increasing low-frequency gain and a zero for canceling another pole in the low pass filter network; and in practical applications, the error amplifier network 33 may output the amplified change to a PWM modulator, and meanwhile reduce the gain at a higher frequency, so as to achieve the purpose of suppressing noises.
FIG. 4 is a basic schematic structural diagram illustrating a resistance capacitance network in a compensation network according to an embodiment of the present invention, as shown in FIG. 4, the resistance capacitance network is composed of a first resistor R1, a second resistor R2, a first capacitor C1 and a second capacitor C2; the first resistor R1 and the second resistor R2 are voltage dividing resistors; the first resistor R1 is connected in series between a first input end A and a first output end B, the second capacitor C2 is connected between two ends of the first resistor R1; the C1 is connected between the first input end A and the ground, so as to stable input; the second resistor R2 is connected between the first output end B and the ground; it should be noted that, the first resistor R1 and the second resistor R2 may be variable resistors, the first capacitor C1 and the second capacitor C2 may be variable capacitors; assuming that the output voltage Vin of the switching power supply circuit is input after sampling or directly from the first input end A of the resistance capacitance network, then the voltage V1 is output from the first output end B via the resistance capacitance network, then a transfer function from Vin to V1 is:




  
    
      
        V
        1
      
      
        V
        in
      
    
    =
    
      
        
          
            R
            1
          
          ⁢
          
            C
            2
          
          ⁢
          s
        
        +
        1
      
      
        
          
            (
            
              
                R
                1
              
              //
              
                R
                2
              
            
            )
          
          ⁢
          
            C
            2
          
          ⁢
          s
        
        +
        1
      
    
  
  ;




From the above equation, a zero ωz1 and a pole ωp1 may be respectively obtained as:




  
    
      ω
      
        z
        ⁢
        
          
        
        ⁢
        1
      
    
    =
    
      1
      
        
          R
          1
        
        ⁢
        
          C
          2
        
      
    
  
  ,
  
    
      
        ω
        
          p
          ⁢
          
            
          
          ⁢
          1
        
      
      =
      
        1
        
          
            (
            
              
                R
                1
              
              //
              
                R
                2
              
            
            )
          
          ⁢
          
            C
            2
          
        
      
    
    ;
  




It can be seen that, a zero and a pole are introduced when the resistance capacitance network provides the voltage dividing resistor for the compensation network, as such, the zero and the pole are mutually canceled, which will not affect the compensation network, unlike in the prior art that one pole is introduced when an input end of the error amplifier is connected to a voltage dividing resistor, which affects compensation effect to the compensation network.
FIG. 5 is a basic schematic structural diagram illustrating a unity gain amplifier network in a compensation network according to an embodiment of the present invention, as shown in FIG. 5, the unity gain amplifier network is composed of a first amplifier AMP1, a third resistor R3, a fourth resistor R4 and a third capacitor C3; an inverting input end VN1 and an output end VOUT1 of the first amplifier AMP1 are connected with each other via the third resistor R3; the fourth resistor R4 and the third capacitor C3 are connected in series between the ground and a connecting point of the inverting input end VN1 and the third resistor R3; it should be noted that, the third resistor R3 and the fourth resistor R4 may be variable resistors, and the third capacitor C3 may be a variable capacitor; in a case of a low frequency, the third capacitor C3 is equivalent to an open circuit, resistance between the inverting input end VN1 and the ground is infinite, the third resistor R3 may be considered as a guide wire, then the amplifier AMP1 acts as a unity gain amplifier to transfer a change of the V1 to the V2; as the frequency increases, an equivalent impedance of the third capacitor C3 reduces constantly, when the impedance is reduced to be equivalent to the third resistor R3, at this time, the unity gain amplifier network is merely equivalent to an amplifier; as the frequency further increases, the equivalent impedance of the third capacitor C3 further reduces, and finally is far less than the third capacitor C3, then a role of the first amplifier AMP1 is to amplify a voltage change input from a positive input end VP1 of the first amplifier AMP1 by 1+R3/R4 times; as shown in FIG. 5, the output voltage V1 of the resistance capacitance network enters the positive input end VP1 of the amplifier, and the V2 is output, then a transfer function from V1 to V2 is:




  
    
      V
      ⁢
      
        
      
      ⁢
      2
    
    
      V
      ⁢
      
        
      
      ⁢
      1
    
  
  =
  
    
      
        
          (
          
            
              R
              3
            
            +
            
              R
              4
            
          
          )
        
        ⁢
        
          C
          3
        
        ⁢
        s
      
      +
      1
    
    
      
        
          R
          4
        
        ⁢
        
          C
          3
        
        ⁢
        s
      
      +
      1
    
  




As such, the transfer function has a zero ωz2 and a pole ωp2:




  
    
      ω
      
        z
        ⁢
        
          
        
        ⁢
        2
      
    
    =
    
      1
      
        
          (
          
            
              R
              3
            
            +
            
              R
              4
            
          
          )
        
        ⁢
        
          C
          3
        
      
    
  
  ,
  
    

  
  ⁢
  
    
      
        ω
        
          p
          ⁢
          
            
          
          ⁢
          2
        
      
      =
      
        1
        
          
            R
            4
          
          ⁢
          
            C
            3
          
        
      
    
    ;
  




The unity gain amplifier network in this stage generates a zero and a pole, the zero just can be used for canceling one of the pair of conjugated poles introduced from the low pass filter network in the switching power supply circuit; the pole can suppress the effect of the pole of the error amplifier network itself on compensation effect at a high frequency.
FIG. 6 is a basic schematic structural diagram illustrating an error amplifier network in a compensation network according to an embodiment of the present invention, as shown in FIG. 6, the error amplifier network is composed of a second amplifier AMP2, a fifth resistor R5 and a fourth capacitor C4; the fifth resistor R5 and the fourth capacitor C4 is connected in series between an output end of the second amplifier AMP2 and the ground; the positive input end VP2 of the second amplifier AMP2 is connected to a reference voltage Vref; it should be noted that, the fifth resistor R5 may be a variable resistor, and the fourth capacitor C4 may be a variable capacitor;
After the voltage V2 output from the unity gain amplifier network passes through the error amplifier network circuit, the voltage Veaout is output from an output end VOUT2 of the error amplifier network. Assuming that a transconductance of the second amplifier AMP2 is gm, an equivalent output resistance of the second amplifier AMP2 is Rout, an equivalent output capacitance of the second amplifier AMP2 is Cout, then a transfer function from the V2 to the Veaout is:




  
    
      
        V
        eaout
      
      
        V
        2
      
    
    =
    
      
        g
        m
      
      ⁢
      
        R
        out
      
      ⁢
      
        
          
            
              R
              5
            
            ⁢
            
              C
              4
            
            ⁢
            s
          
          +
          1
        
        
          
            
              R
              5
            
            ⁢
            
              R
              out
            
            ⁢
            
              C
              4
            
            ⁢
            
              C
              out
            
            ⁢
            
              s
              2
            
          
          +
          
            
              (
              
                
                  
                    R
                    5
                  
                  ⁢
                  
                    C
                    4
                  
                
                +
                
                  
                    R
                    out
                  
                  ⁢
                  
                    C
                    out
                  
                
                +
                
                  
                    R
                    out
                  
                  ⁢
                  
                    C
                    4
                  
                
              
              )
            
            ⁢
            s
          
          +
          1
        
      
    
  
  ,




and there is a zero ωz3 in the above transfer function:




  
    
      ω
      
        z
        ⁢
        
          
        
        ⁢
        3
      
    
    =
    
      1
      
        
          R
          5
        
        ⁢
        
          C
          4
        
      
    
  
  ,




If the compensation network satisfies C4>>Cout, then there are two poles of ωp0 and ωp3 in the transfer function:




  
    
      ω
      
        p
        ⁢
        
          
        
        ⁢
        0
      
    
    =
    
      1
      
        
          R
          out
        
        ⁢
        
          C
          4
        
      
    
  
  ,
  
    

  
  ⁢
  
    
      
        ω
        
          p
          ⁢
          
            
          
          ⁢
          3
        
      
      =
      
        1
        
          
            (
            
              
                R
                5
              
              //
              
                R
                out
              
            
            )
          
          ⁢
          
            C
            out
          
        
      
    
    ;
  




One zero and two poles are generated in the error amplifier network of this stage, the zero and the other one of the pair of LC conjugated poles introduced from the low pass filter network in the existing switching power supply circuit can cancel each other; ωp0 in the two poles generated here is a dominant pole in the compensation network provided in embodiments of the present invention, the dominant pole can be used for making the switching power supply circuit achieve a high low-frequency gain under low frequency, so as to guarantee that the switching power supply circuit has a great bandwidth and a good phase margin.
In this example, since the pole ωP1 and the zero ωz1 in the first-stage resistance capacitance network cancel each other, thus having no distinct influence on overall compensation effect; however, at the same time of providing a voltage dividing function, not only a gain of the overall compensation network in a mid-frequency band is improved, but also a certain phase can be provided, so that it is very easy to improve the phase margin of the overall switching power supply circuit; a zero ωz2 and a pole ωp2 provided by a second-stage unity gain amplifier network are the zero and the pole required by the compensation network, where, the ωz2 is used for canceling one pole formed by the low pass filter network, while the ωp2 is provided near the switching frequency for suppressing a high-frequency noise on one hand, and improving a phase margin of the switching power supply circuit on the other hand; it can be seen from the transfer function of the second-stage unity gain amplifier network that, once a capacitance value of the second capacitor C2 is determined, relative positions of the zero ωz2 and the pole ωp2 can be adjusted according to a compensation request only by adjusting relative resistance values of the third resistor R3 and the fourth resistor R4; a third-stage error amplifier network provides the dominant pole ωp0 of the compensation network. When the pole and the zero are compensated, an output resistance and output capacitance of the error amplifier itself has been considered, and the pole of the error amplifier itself has also been taken into consideration in the design, as such, positions of the zero and the pole can be adjusted by adjusting the resistance value of the fifth resistor R5 and the capacitance value of the third capacitor C3, and the pole of the error amplifier itself would not influence stability of the circuit. The dominant pole ωp0 is closest to an origin, which is favorable to improve the low-frequency gain; the zero ωz3 is used for canceling another pole formed in a low pass filter network, and the pole ωp3, like the ωp2, is provided near the switching frequency, and is also used for suppressing noises of a switching frequency and improving a phase margin. When viewed from distribution positions of all the zeros and poles, before the dominant pole and near the origin, the gain of the compensation network is a gain product of three stages of circuits, and a phase is 180°; starting from a position of the dominant pole, the gain drops gradually, a change in the position of the dominant pole would cause the phase to drop by 90° or so; positions of the two zeros ωz2, ωz3 are very close, and before poles ωp2, ωp3, the gain of the compensation network starts to rise by 1-time frequency interval after the two zeros, and the phase would also rise with a potential of 180°; positions of poles ωp2, ωp3 are very close, and the gain starts to drop after the two poles, so as to guarantee the gain at the switching frequency is small enough; as such, there would be a very high phase between the zero and the pole; and if the phase is not enough, values of the first capacitor C1, the first resistor R1 and the second resistor R2 in the resistance capacitance network can be adjusted, so as to adjust specific positions of the pair of the zero ωz1 and the pole ωp1, and improve a phases between poles ωp2, ωp3 and zeros ωz2, ωz3 of the switching power supply circuit; it is very convenient and flexible to adjust, and very easy to obtain a condition satisfying stability and a high bandwidth in the whole switching power supply circuit; additionally, if an input capacitance has an equivalent series resistance (ESR), one of the poles ωp2 or ωp3 also can be utilized to cancel a zero generated due to the ESR.
The amplifiers AMP1, AMP2 in embodiments of the present invention can be selected from various types of operational amplifiers according to actual requirements, such as a push-pull output transconductance operational amplifier.
Embodiments of the present invention further provide a circuit compensation method, including: a resistance capacitance network provides a voltage dividing resistor and generates a zero and a pole which are mutually canceled; a unity gain amplifier network generates a zero for canceling a pole in a low pass filter network, and a pole for suppressing a high-frequency noise and improving a phase margin of a switching power supply circuit; and an error amplifier network generates a pole for increasing low-frequency gain and a zero for canceling another pole in the low pass filter network.
Embodiments of the present invention further provide a switching power supply circuit, and a compensation network of the switching power supply circuit adopts the compensation network provided in embodiments of the present invention.
The above descriptions are merely embodiments of the present invention, but are not intended to limit the protection scope of the present disclosure.

## Claims

1. A compensation network, comprising: a resistance capacitance network, a unity gain amplifier network and an error amplifier network; wherein,
an output end of the resistance capacitance network is cascaded to an input end of the unity gain amplifier network, and an output end of the unity gain amplifier network is cascaded to an input end of the error amplifier network;
the resistance capacitance network is configured to provide a voltage dividing resistor, and generate a zero and a pole which are mutually canceled;
the unity gain amplifier network is configured to generate a zero for canceling a pole in a low pass filter network, and a pole for suppressing a high-frequency noise and improving a phase margin of a switching power supply circuit; and
the error amplifier network is configured to generate a pole for increasing low-frequency gain and a zero for canceling another pole in the low pass filter network.

2. The compensation network according to claim 1, wherein, the resistance capacitance network comprises: a first resistor, a second resistor, a first capacitor and a second capacitor; wherein, the first resistor is connected in series between a first input end and a first output end, the second capacitor is connected between two ends of the first resistor, the first capacitor is connected between the first input end and the ground, and the second resistor is connected between the first output end and the ground.

3. The compensation network according to claim 1, wherein, the unity gain amplifier network comprises: a first amplifier, a third resistor, a fourth resistor and a third capacitor; wherein, the third resistor is connected between an inverting input end and an output end of the first amplifier; the fourth resistor and the third capacitor is connected between the inverting input end of the first amplifier and the ground; a positive input end of the first amplifier is connected to the first output end of the resistance capacitance network.

4. The compensation network according to claim 1, wherein, the error amplifier network comprises: a second amplifier, a fifth resistor and a fourth capacitor; wherein, the fifth resistor and the fourth capacitor is connected between an output end of the second amplifier and the ground; a positive input end of the second amplifier is connected to an output end of the unity gain amplifier network.

5. The compensation network according to claim 2, wherein, the second capacitor is a variable capacitor, and the first resistor and the second resistor are variable resistors.

6. The compensation network according to claim 3, wherein, the third capacitor is a variable capacitor, and the third resistor and the fourth resistor are variable resistors.

7. The compensation network according to claim 4, wherein, the fourth capacitor is a variable capacitor, and the fifth resistor is a variable resistor.

8. The compensation network according to claim 4, wherein, a capacitance value of the fourth capacitor is far greater than an equivalent capacitance value of the second amplifier.

9. A switching power supply circuit, comprising a compensation network, comprising: a resistance capacitance network, a unity gain amplifier network and an error amplifier network; wherein,
an output end of the resistance capacitance network is cascaded to an input end of the unity gain amplifier network, and an output end of the unity gain amplifier network is cascaded to an input end of the error amplifier network;
the resistance capacitance network is configured to provide a voltage dividing resistor, and generate a zero and a pole which are mutually canceled;
the unity gain amplifier network is configured to generate a zero for canceling a pole in a low pass filter network, and a pole for suppressing a high-frequency noise and improving a phase margin of a switching power supply circuit; and
the error amplifier network is configured to generate a pole for increasing low-frequency gain and a zero for canceling another pole in the low pass filter network.

10. A circuit compensation method, comprising: a resistance capacitance network provides a voltage dividing resistor and generates a zero and a pole which are mutually canceled; a unity gain amplifier network generates a zero for canceling a pole in a low pass filter network, and a pole for suppressing a high-frequency noise and improving a phase margin of a switching power supply circuit; and an error amplifier network generates a pole for increasing low-frequency gain and a zero for canceling another pole in the low pass filter network.

11. The compensation network according to claim 7, wherein, a capacitance value of the fourth capacitor is far greater than an equivalent capacitance value of the second amplifier.

12. The switching power supply circuit according to claim 9, wherein, the resistance capacitance network comprises: a first resistor, a second resistor, a first capacitor and a second capacitor; wherein, the first resistor is connected in series between a first input end and a first output end, the second capacitor is connected between two ends of the first resistor, the first capacitor is connected between the first input end and the ground, and the second resistor is connected between the first output end and the ground.

13. The switching power supply circuit according to claim 9, wherein, the unity gain amplifier network comprises: a first amplifier, a third resistor, a fourth resistor and a third capacitor; wherein, the third resistor is connected between an inverting input end and an output end of the first amplifier; the fourth resistor and the third capacitor is connected between the inverting input end of the first amplifier and the ground; a positive input end of the first amplifier is connected to the first output end of the resistance capacitance network.

14. The switching power supply circuit according to claim 9, wherein, the error amplifier network comprises: a second amplifier, a fifth resistor and a fourth capacitor; wherein, the fifth resistor and the fourth capacitor is connected between an output end of the second amplifier and the ground; a positive input end of the second amplifier is connected to an output end of the unity gain amplifier network.

15. The switching power supply circuit according to claim 12, wherein, the second capacitor is a variable capacitor, and the first resistor and the second resistor are variable resistors.

16. The switching power supply circuit according to claim 13, wherein, the third capacitor is a variable capacitor, and the third resistor and the fourth resistor are variable resistors.

17. The switching power supply circuit according to claim 14, wherein, the fourth capacitor is a variable capacitor, and the fifth resistor is a variable resistor.

18. The switching power supply circuit according to claim 14, wherein, a capacitance value of the fourth capacitor is far greater than an equivalent capacitance value of the second amplifier.

19. The switching power supply circuit according to claim 17, wherein, a capacitance value of the fourth capacitor is far greater than an equivalent capacitance value of the second amplifier.