User-based Software Tool for S-parameter Conversion and 

Manipulation

by Scott Trocchia, Dr. Tony Ivanov, and Dr. Robert Proie

ARL-TR-5650 September 2011

Approved for public release; distribution unlimited.
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Army Research Laboratory

Adelphi, MD 20783-1197

ARL-TR-5650 September 2011

User-based Software Tool for S-parameter Conversion and 

Manipulation

Scott Trocchia, Dr. Tony Ivanov, and Dr. Robert Proie

Sensors and Electron Devices Directorate, ARL

Approved for public release; distribution unlimited.
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4. TITLE AND SUBTITLE

User-based Software Tool for S-parameter Conversion and Manipulation

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Scott Trocchia, Dr. Tony Ivanov, and Dr. Robert Proie

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U.S. Army Research Laboratory

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2800 Powder Mill Road

Adelphi MD 20783-1197

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14. ABSTRACT

S-parameters fully characterize the linear behavior of an arbitrary number of ports. We aim to characterize various field-effect 

transistors (FETs), each having a certain gate width and geometry, from their S-parameters. We extract the data from the vector 

network analyzer in real-time and perform a series of calculations and conversions on the initial S-parameters. Using a software 

tool written in C++ that interfaces with the vector network analyzer (VNA), the corresponding computer monitor, and two 

direct current (DC) power supplies, the user can collect relevant real-time data about a device under test (DUT). The software 

contains a number of user-input interfaces paired with appropriate graph canvases. Its main functionalities include: conversion 

of S-parameters to H-parameters, selection of H21 in an effort to calculate the frequency (ft) at which the transistor exhibits 

unity current gain, a family of current-voltage (I-V) curves of the DUT, and calculations and plots of transconductance (gm). 

Future work will include measuring a variety of devices and allowing the software tool to collect statistics on them.

15. SUBJECT TERMS

S-parameter, conversion, H2I, graphical user interface

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UU

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Scott M. Trocchia

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(301) 394-0728

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iii

Contents

List of Figures iv

1. Introduction/Background 1

2. Operating Instructions 1

2.1 Measuring I-V Curves.....................................................................................................2

2.2 Measuring Transconductance..........................................................................................2

2.3 Measuring and Analyzing S-parameters .........................................................................3

3. Hardware Setup 4

4. Software Architecture 5

5. Verification of Hardware/Software 8

6. Summary and Conclusions 12

7. References 14

List of Symbols, Abbreviations, and Acronyms 15

Distribution List 16
iv

List of Figures

Figure 1. Main selection screen. .....................................................................................................2

Figure 2. Equipment setup and configuration.................................................................................4

Figure 3. I-V algorithm flow chart..................................................................................................5

Figure 4. Transcondutance algorithm flow chart............................................................................6

Figure 5. First half of H21 characterization flow chart. .................................................................7

Figure 6. Second half of H21 characterization flow chart. .............................................................8

Figure 7. Tested GaN device GDCH_500P_P175_1GS1P5GD.....................................................9

Figure 8. Example output I-V curves............................................................................................10

Figure 9. Example Transconductance measurements...................................................................11

Figure 10. Complete H21 characterization environment..............................................................12
1

1. Introduction/Background

Field Effect Transistors (FETs) are three-terminal devices consisting of a gate, drain, and source. 

By applying voltage across the gate to source terminal (VGS), sweeping the voltage across the 

drain to source terminal (VDS), one may observe the drain to source current (IDS) for any given 

FET device. Plotting this current-voltage (I-V) relationship with VDS on the x-axis and IDS on 

the y-axis, one can see the DC characteristics of the FET device and one can tell whether or not a 

transistor functions at various gate to source voltages. This concept serves as the foundation for 

logically determining other radio frequency (RF) properties of the FET, such as maximum unity 

gain (fT), the frequency point at which the H21 gain transitions from positive to negative, and 

fMAX, the maximum frequency at which the transistor can exhibit any type of power gain. By 

using the DC characteristics of the FET, the user can obtain accurate S-parameter readings and 

measurements of the FET device at different DC operating points, namely varying values of VDS

and VGS. 

The collection of the DC and RF characteristics for a given FET is necessary to facilitate circuit 

design. Using common measurement tools known as a vector network analyzer (VNA) and 

several DC power supplies, one can efficiently measure the I-V characteristics and the Sparameters for a given FET. Interfacing software to control the measurement tools, one can 

measure, construct, and analyze the DC and RF characteristics, namely the I-V plots, H21, fT, and 

fMAX in real-time. Additionally, devices can be characterized and parameters, such as gate 

voltage, drain voltage, and number of points to be graphed, can be changed with the simple click 

of a few buttons. Overall, consolidation of these qualities into one finite set of graphical user 

interfaces (GUIs) helps the user visualize the measured and interpreted results. The engineer, 

knowing the values collected from the provided software tool, can uniquely characterize a device 

under test (DUT) and implement further circuit designs.

2. Operating Instructions

Four essential screens comprise the software tool. The first screen that appears upon execution of 

the program is the menu selection screen (figure 1), which depicts three user choices and should 

be used to pull up the other three sets of screens. Before beginning to look at the electrical 

features of one given FET, the user must input the known VGS and VDS boundaries. The user 

enters these boundary conditions, applies a small voltage (VGS), and ensures that the device is 

passing IDS current and is therefore operational. 
2

Figure 1. Main selection screen.

2.1 Measuring I-V Curves

The user begins measuring the DC characteristics of a FET by clicking on the radio button 

labeled: ―STEP 1: Measure transistor output I-V characteristics‖. The steps are numbered so that, 

in practice, the user will follow them in the prescribed order. This action will minimize the main 

screen and load two separate windows: a graph canvas and a user interface (UI), where the user 

can input relevant bias conditions into the proper text fields. Notable bias conditions include a 

range of VGS and a fixed VDS. Both parameters are arbitrary, yet through sufficient 

experimentation, the user can get a feel for which values produce acceptable output curves. Note 

that the user can minimize or maximize the main screen at his or her discretion. In total, there are 

eleven windows that pop up; users can access each of them through a series of button presses.

2.2 Measuring Transconductance

Once the user becomes satisfied with the graphed family of output curves, thereby verifying 

proper functionality of the DUT, the user can move on to collecting transconductance 

information. One can initiate this process by clicking on the ―STEP 2: Measure 

transconductance‖ radio button on the main screen. This portion of the software suite includes 

two GUIs—one for the user input and one for the graphical output—as well. The user would 

enter a fixed VDS that has the same magnitude as in the I-V analysis. With the push of a button, 

the user will be presented with a split panel graphical view. On the left-hand side appears one 

graphical canvas containing two curves. One of those curves is a VGS versus IDS plot, and the 
3

other curve is its time derivative; the latter curve is, by definition, the transconductance. The 

right graph is a zoomed in version of the left graph which depicts the derivative curve in 

isolation. 

This pair of graphs serves to inform the user of two pieces of information: the dependent 

variable, the peak gm value in units of millisiemens, and the independent variable, the gatesource voltage corresponding to that peak. The user should take note of these values, along with 

the values from the I-V analysis, for all parameters output in UIs are useful in the last evaluation 

phase. 

2.3 Measuring and Analyzing S-parameters

This last evaluation involves looking at the H21 parameter to characterize the frequency behavior 

of the DUT. This study is, from the user’s perspective, more complicated because there are many 

windows to navigate. The user would access this GUI set by simply clicking on the radio button 

labeled ―STEP 3: Measure ft, fmax (H21 characterization)‖ on the main screen. One UI and one 

graph canvas pop up. The user can then load in saved files of calibrated standards, or they can 

measure them in real-time when they are conducting an experiment. The standards used are one 

open circuit, two shorts, and one through. They represent parasitic capacitances of the substrate 

of the DUT and are necessary for better calibration techniques. Known calibration methods only 

factor in error calculations up until the probe tips, but with the calculations provided by my 

software tool, full de-embedding is accomplished. After a successful loading sequence, the user 

may enter the optimal biases VDS and VGS marked down from the previous two steps. 

Four graphs subsequently appear in the graph canvas: H21, which was extracted from S21, 

GTU max, the maximum unilateral transducer power gain, U, the unilateral power gain, and Gma, 

the maximum available stable power gain. The first item is useful for computing fT; the next 

three are useful for calculating fMAX. Simultaneously, five GUIs (four UIs and one graph canvas) 

appear. In three out of four of those UIs, the user would type in a frequency range representing 

sections of a particular curve which appear most linear to him or her. The GUI environment 

would dynamically change, and users would see a regression line overlaying each corresponding 

data set. From the regression line’s intersection with the x-axis, fT and fMAX values are now 

known. Those values are conveniently extracted and shown in the last small UI. 

For all of the analyses considered, results can be saved to a text file in any valid file directory. 

The graphs will not appear because graphs cannot be formatted properly within the text file, but 

the data off which the graphs are based can be saved and archived. With regards to the frequency 

characterization in step three, all data and associated regression lines can be saved. 
4

3. Hardware Setup

Hardware drives the fundamental operation of this experimental setup. A generic setup for the 

software described to properly operate is shown in figure 2: a probe station with DC or RF 

proves used to bias the device (depending on the device), a network analyzer to study Sparameters outputted from the probes, and two DC power supplies, one to sweep voltage and the 

other to collect current. All equipment must daisy chain to the same GPIB (General Purpose 

Interface Bus) in order for them to communicate with one another. This is essential, for if mutual 

communication is not guaranteed, any given experiment fails from the onset. 

Figure 2. Equipment setup and configuration.

The preferred hardware setup employed one Agilent E3645A (GPIB: 2) and one Keithley 2400 

(GPIB: 5) DC power supply; the former measured drain-to-source voltage and the latter recorded 

gate-to-source voltage. The positive terminal of the Agilent’s supply connected to the rear Port 2 

of an Agilent E8361C PNA Microwave Network Analyzer; the Keithley’s positive terminal 

coupled to Port 1 on the back. The source of the FET and the negative terminal of each 

instrument were grounded. Both RF probes, each with a ground-signal-ground (GSG) pad 

configuration, linked to the front connection ports of the PNA – the left one to Port 1 and the 

right one to Port 2. The appropriate apparatus can be located in lab bay 3D067 of Building 207.

If the user understands the necessary components, he or she can open the executable file and start 

collecting data. Each step discussed in the previous section is associated with an algorithm. 
5

Additionally, calculations are embedded within the C++ code. Once the hardware is properly 

setup, the calculations and displaying of results can now be automated.

4. Software Architecture

This section is provided for those wishing to understand the programmatic portion of this work. 

The casual user may be less interested and may skip this section without losing any information. 

The flow chart shown in figure 3 details the algorithm implemented in this characterization 

software. The premise for the family of output curves is simple: sweep the drain voltage for one 

particular gate voltage; after each sweep, increment the gate voltage by one and perform the 

drain sweep again. Repeat until the maximum drain voltage has been reached.

Figure 3. I-V algorithm flow chart.

The transcondutance computational algorithm (figure 4) resembles the I-V algorithm. The steps 

are virtually the same, but where the two differ is in the plotting (VGS on the x-axis compared to 

VDS on the x-axis in the I-V plots) and saving options. The algorithm is: ground the source 

terminal of the DUT; sweep the gate voltage on one power supply while maintaining a fixed 

drain voltage on the other supply. 
6

Figure 4. Transcondutance algorithm flow chart.

The H21 algorithm is exceedingly more complicated. In this scenario, it abides by this flow 

(figures 5 and 6): submit VDS and VGS biases, de-embed the DUT at its terminals, and convert Sparameters to H-parameters. This scheme is fully implemented in this project is the method 

outlined by Vandamme (1). The inclusion of different de-embedding algorithms such as (3) is 

plausible and would be done at the hardware calibration level. 
7

Figure 5. First half of H21 characterization flow chart.
8

Figure 6. Second half of H21 characterization flow chart.

5. Verification of Hardware/Software

To verify the operation of both the hardware setup and the software itself, a Gallium Nitride 

(GaN) FET was characterized for both DC and RF operation. The device chosen is GHCD 

500P_P175_1GS1P5GD and is illustrated in figure 7 as it appears on-wafer. One can locate it on 

wafer KC0051-07—contractor ID SC06-425, reticle R4C4, device ID 26—stored in Room 

3D067 of Building 207. The generated DC characteristics are shown in figure 6, the family of IV curves for the GaN FET. This output results from the I-V algorithm outlined and explained in 

the previous section. This particular FET has a small gate width (40 μm), therefore attributing to 
9

the relatively small maximum IDS value of the sweep (6 mA). In terms of gate width, larger 

transistors, which are not discussed in this documentation, naturally provide more current 

flowing through the channels. 

Figure 7. Tested GaN device GDCH_500P_P175_1GS1P5GD.

For the same DUT as before, the RF characteristics were produced by the software and are 

shown in figures 8 and 9. Figure 8 shows the transconductance curves with the proper fixed VDS

bias and indicates that the gm peak for the GaN FET is 24.6062 mS. The VGS value 

corresponding to that peak is –1.8 V. Figure 9 manifests the H21 characterization, showing the fT

for this device is 38.1 GHz; the fMAX value converges between 69.8 GHz and 71.4 GHz. The user 

settings entered for this device to produce these curves is also show in figure 10.
10

Figure 8. Example output I-V curves.
11

Figure 9. Example Transconductance measurements.
12

Figure 10. Complete H21 characterization environment.

6. Summary and Conclusions

Using one software tool that aids the user in accomplishing the task in three steps to characterize 

fT and fMAX is economic and pragmatic. Users can confirm their graphical results via looking at 

the GTUmax, U, and Gma curves and visually verifying if the three fMAX values seem to 

approximate the same value. This type of device investigation is commercially available: 

Cascade Microtech implemented a more robust system called WinCal that aims, in part, to 

calculate fT and fMAX experimentally. However, this software solution is more economical and 

has a cleaner and more streamlined user interface. 

Due to the limited nature of the experimental setup, further verification with more process 

technologies would be useful to perform to ensure robustness of this tool. However, similar 

analyses—obtaining I-V plots and fT and fMAX via transconductance and H21 characterization of 

any FET technology are possible. Some other common technologies that exist are Gallium 
13

Arsenide (GaAs), Indium Phosphide (InP), Silicon Germanium (SiGe), Silicon (Si), and 

graphene. Once characterized, devices of the same technology can be compared; similarly, 

devices can be compared across technologies to learn more about geometry and technology 

qualities. 
14

7. References

1. Vandamme, E. P.; Schreurs, D.M.M.-P.; Van Dinther, G. Improved Three-step Deembedding Method to Accurately Account for the Influence of Pad Parasitics in Silicon Onwafer RF Test-structures. Electron Devices, IEEE Transactions on April 2001, 48 (4), 737–

742.

2. Cho, H.; Burk, D.E. A Three-step Method for the De-embedding of High-frequency Sparameter Measurements. Electron Devices, IEEE Transactions on June 1991, 38 (6), 

1371–1375.

3. Williams, D. F.; Wang, J.C.M.; Arz, U. An Optimal Vector-Network-Analyzer Calibration 

Algorithm. Microwave Theory and Techniques, IEEE Transactions on December 2003, 51

(12), 2391–2401.

4. Agilent Technologies, ―Technical Specifications Agilent Technologies PNA Series Network 

Analyzers E8361A/C‖ 08 January 2011. <http://cp.literature.agilent.com/litweb/pdf/E8361-

90007.pdf>.

5. Pozar, David M. Microwave Engineering; Hoboken, NJ: J. Wiley, 2005. Print.

6. ―Learn Simple/Linear Regression Tutorial, Definition, Example, Formula.‖ Free Online 

Math Calculator and Converter. Web. 05 July 2011. 

<http://easycalculation.com/statistics/learn-regression.php>.

7. ―WinCal XE Software: Cascade Microtech, Inc.‖ Welcome to Cascade Microtech: Cascade 

Microtech, Inc.: Web. 05 July 2011. <http://www.cmicro.com/products/probes/wincal-xe>.
15

List of Symbols, Abbreviations, and Acronyms

DUT device under test

FETs field effect transistors

GaAs gallium arsenide

GaN gallium nitride

GPIB general purpose interface bus

GSG ground-signal-ground

GUIs graphical user interfaces

InP indium phosphide

I-V current-voltage

RF radio frequency

Si silicon

SiGe silicon germanium

UI user interface

VNA vector network analyzer
16

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