Source: s3://data.kl3m.ai/documents/govinfo/USCOURTS/USCOURTS-cand-3_09-cv-02737/USCOURTS-cand-3_09-cv-02737-16/pdf.json

Nature of Suit Code: 830
Nature of Suit: Patent
Cause of Action: 35:271 Patent Infringement

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United States District Court

For the Northern District of California

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IN THE UNITED STATES DISTRICT COURT

FOR THE NORTHERN DISTRICT OF CALIFORNIA

SANDISK CORPORATION,

Plaintiff,

 v.

LSI CORPORATION,

Defendant. /

LSI CORPORATION AND AGERE

SYSTEMS INC.,

Counterclaimants,

 v.

SANDISK CORPORATION,

Counterdefendant. /

No. C 09-02737 WHA

TENTATIVE CLAIM

CONSTRUCTION ORDER AND

REQUEST FOR CRITIQUE

INTRODUCTION

In this massive patent dispute involving eight digital audio and video technology patents

and over twenty accused products, the parties have selected six phrases from the patents-in-suit

for construction by this order. These six phrases, construed below, pertain primarily to the audio

patents asserted by LSI Corporation and Agere Systems, Inc. against SanDisk Corporation. The

parties will have until NOON ON MONDAY, MARCH 22, 2010, to submit a five-page critique

(double-spaced, no footnotes, and no attachments) limited to points of critical concern. In light of

the voluminous briefing already submitted and the lengthy hearing on these matters, this is an

opportunity for the parties to focus solely on their most cogent critique.

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STATEMENT

Plaintiff and counterdefendant SanDisk filed this action on June 19, 2009, seeking

declaratory judgment of non-infringement, invalidity, and unenforceability of eight U.S. patents:

(1) No. 5,379,356; (2) No. 5,809,174; (3) No. 5,864,817; (4) No. 5,890,124; (5) No. 5,982,830;

(6) No. 6,982,663; (7) No. 5,670,730; and (8) No. 5,696,928. SanDisk also brought several state

law allegations against defendant LSI Corporation (Dkt. No. 1). These state law allegations were

dismissed, however, due to preemption by federal patent law (Dkt. No. 48). A motion seeking

leave to amend the complaint is currently pending.

On August 12, 2009, counterclaimants LSI Corporation and Agere Systems, Inc.

(collectively “LSI”) returned fire with eight counterclaims of patent infringement. The eight

patents standing between the parties encompass various aspects of digital audio and video

storage, decompression, and processing technologies, sprawled out across 300 pages and 142

claims. In other words, this is — at the moment — a conflict of ungainly proportions. The Court,

however, expects that the battlefront will be narrowed as trial approaches, for the benefit of all

involved. 

As stated, this claim construction order concerns six phrases found in only a subset of the

eight asserted patents — the ’730, ’928, ’124, and ’830 patents. These four patents deal with

various aspects of audio data processing and storage. Overviews of the patents, the disputed

terms and phrases, and the associated claims are covered in detail in the analysis below.

ANALYSIS

Courts must determine the meaning of disputed claim terms from the perspective of one of

ordinary skill in the pertinent art at the time the patent was filed. Chamberlain Group, Inc. v.

Lear Corp., 516 F.3d 1331, 1335 (Fed. Cir. 2008). While claim terms “are generally given their

ordinary and customary meaning,” the “claims themselves provide substantial guidance as to the

meaning of particular claim terms.” Phillips v. AWH Corp., 415 F.3d 1303, 1312, 1314 (Fed. Cir.

2005) (en banc) (quoting Vitronics Corp. v. Conceptronic, Inc., 90 F.3d 1576, 1582 (Fed. Cir.

1996)). As such, all claims of the patent can be “valuable sources of enlightenment as to the

meaning of a claim term.” Vitronics, 90 F.3d at 1582. Additionally, a patent’s specification “is

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always highly relevant to [] claim construction[.]” Phillips, 415 F.3d at 1315 (quoting Vintronics,

90 F.3d at 1582). Claims, therefore, “must be read in view of the specification, of which they are

a part.” Markman v. Westview Instruments, Inc., 52 F.3d 967, 979 (Fed. Cir. 1995) (en banc),

aff’d, 517 U.S. 370 (1996). Finally, courts should also consider the patent’s prosecution history,

which “can inform the meaning of the claim language by demonstrating how the inventor

understood the invention and whether the inventor limited the invention in the course of

prosecution, making the claim scope narrower than it would otherwise be.” Phillips, 415 F.3d at

1318 (citations omitted). These components of the intrinsic record are a court’s primary

resources in properly construing claim terms. Id. at 1317–18.

While this order acknowledges that the parties have a right to the construction of all

disputed claim terms by the time the jury instructions are settled, the Court will reserve the

authority, on its own motion, to modify the constructions in this order if further evidence —

intrinsic or extrinsic — warrants such a modification. Given that claim construction is not a

purely legal matter, but is (as the Supreme Court describes it) a “mongrel practice” with

“evidentiary underpinnings,” it is entirely appropriate for the Court to adjust its construction of

claims prior to trial if the evidence compels an alternative construction. Markman, 517 U.S. at

378, 390.

The parties should be aware, however, that this is not an invitation to ask for

reconsideration of the constructions herein. Motions for reconsideration may only be made, if at

all, in strict accordance with the rules of procedure. With these principles set forth, this order

now turns to the patents, claims, and phrases at issue.

1. THE ’730 PATENT

The ’730 patent, entitled “Data Protocol and Method for Segmenting Memory for a Music

Chip,” was issued on September 23, 1997. Agere is the owner of all rights, title, and interest in

and to the ’730 patent. The invention of the ’730 patent is a “data protocol” for organizing

various types of data contained in a music chip (col 1:46-47). Specifically, the invention sets

forth a hierarchical approach to storing digitally encoded audio on a music chip (col 2:25-27).

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The invention includes various “headers” that contain supplemental information about the

digitally encoded music stored on the chip, such as the encoding and compression method, track

title, and artist (cols 2:45–46, 3:24–25). These headers are intended to be automatically

downloaded by the music player prior to the processing of audio data. The information contained

within the headers is then used by the player to properly decode the music and locate and play

music tracks based on user selections (cols. 1:50–54, 1:65–67, 2:1–3).

Two phrases from the ’730 patent were selected for construction by this order: (1) “first

header having parameters stored therein for use by said audio player in decoding said digitally

encoded music stored in said memory” and (2) “selectable categorical information.” Both appear

in independent claim 1 of the patent, reproduced below (col. 6:14–27) (emphasis added):

1. A data format for use in an audio system wherein prerecorded music is digitally encoded in memory of an integrated

circuit music chip, and said music is decoded and reproduced by

means of an associated audio player, said data format for storing

information pertaining to the contents of said music chip, wherein

individual tracks of audio are stored in designated locations in said

music chip, said data format including:

first header having parameters stored therein for use by

said audio player in decoding said digitally encoded music

stored in said memory; and 

at least one second header, said second header including

selectable categorical information relating to said

individual tracks of audio stored in said memory.

A. “first header having parameters stored therein for use by said audio player in

decoding said digitally encoded music stored in said memory”

This order will start with the phrase “first header having parameters stored therein for use

by said audio player in decoding said digitally encoded music stored in said memory,” found in

independent claim 1 of the patent. The parties indicated at the claim construction hearing that it

is the most important phrase targeted by this order. Proposed constructions are shown below:

LSI’S PROPOSED CONSTRUCTION

OF “FIRST HEADER . . . ” SANDISK’S PROPOSED CONSTRUCTIONOF “FIRST HEADER . . . ”

“A data structure that includes

information used by the audio player to

decode digitally encoded music stored

in memory”

“A single data structure that precedes

digitally encoded music and contains

information used by the audio player in

decoding all digitally encoded music

stored in memory”

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The term “data structure” — used by both sides — simply refers to the fact that the “first

header” consists of structured data. FIG. 2 below illustrates what a data structure looks like in a

preferred embodiment of the invention. The portion labeled (22) in FIG. 2 is what the

specification called a “global header.” As explained below, a “global header” is similar in many

ways to a “first header.” The “global header” in FIG. 2 provides a good example of why the term

“data structure” is used: data, such as algorithm, bitrate, distributor, and other information, in

stored in a structured, organized manner.

The constructions proposed by the parties present three key questions: (1) whether the

“data format” of claim 1 allows for multiple “first headers” or just a single “first header,” (2)

whether the “first header” must precede the digitally encoded music, and (3) whether the “first

header” must contain information to decode all digitally encoded music stored in memory. All of

these questions stem from the fact that the term “first header” never appeared in the specification! 

Rather, the term “first header” appeared solely in claims 1 through 17. In other words, after five

columns of discussion and disclosure by the patentee, the claims introduced — for the first time

— a term never previously seen in the patent. 

At oral argument, two explanations were put forth by the parties for the absence of “first

header” from the specification: LSI argued that the term “first header” was simply used by the

patentee as common patent parlance (i.e. standard drafting language) for listing multiple elements

in a claim, as in “first means” and “second means,” for example. The existence of a “second

header” alongside the “first header” in claim 1 was cited in support of this argument. SanDisk,

however, asserted that the absence of any reference to “first header” in the specification meant

that it was the same as the “global header,” a term used frequently and exclusively within the

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specification. To support their position, SanDisk pointed to the prosecution history, wherein LSI

— at times — used “global header” and “first header” interchangeably.

Having considered both sides, this order finds that LSI’s rationale for the patentee’s use of

“first header” and “second header” carries more weight, and a person having ordinary skill in the

relevant art at the time the patent application was filed would have understood “first header” to be

broader in scope than the disclosed “global header.” As explained below, however, this does not

mean LSI’s proposed construction will be adopted in full.

i. “Single” Data Structure

While this order has concluded that “first header” is entitled to a broader construction than

“global header,” this breadth is not unlimited. Indeed, the claims cannot encompass more than

what the patentee invented, which was a hierarchical approach to storing digitally encoded audio

on a music chip (col 2:25-27). Here, LSI asks the Court to allow multiple “first headers” to be

used in claim 1. SanDisk argues that there can only be a single “first header.” As explained

below, SanDisk’s position on this issue seems to be correct.

The language used by the patentee in claim 1 strongly supports limiting the “first header”

to a single data structure. Phillips, 415 F.3d at 1314. Indeed, as the undersigned noted at the

claim construction hearing, the patentee’s choice to use the phrase “first header,” but then the

phrase “at least one second header,” supports a presumption that the “first header” was intended

to be a single data structure.

An examination of the purpose of the “first header” in the context of the present invention

further supports this limitation. As the specification explained, “[t]he present invention is a

protocol . . . includ[ing] a hierarchical arrangement of headers about selections on the chip and

the method in which they were coded” (col. 1:47–51) (emphasis added). The specification

disclosed a particular two-tiered embodiment of this hierarchy. At the top of the hierarchy was

the aforementioned “global header,” and at the bottom were “individual headers” (see cols.

1:51–65). The “global header” — exactly like the “first header” as described in claim 1 —

contained information to decode the digitally encoded music stored in memory (e.g., encoding

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algorithm, bitrate, etc.). The “individual headers” — exactly like the “second headers” described

in claim 1 — contained information about individual music tracks (e.g., artist, album, genre, etc.).

Given this intrinsic evidence, a person having ordinary skill in the relevant art at the time

the patent application was filed would have understood the “first header” and “second headers” as

arranged in a similar hierarchy as the “global header” and “individual headers.” Supporting this

conclusion is the fact that neither the specification nor the prosecution history discussed the

possibility of using multiple “global headers” or “first headers.” Indeed, the intrinsic evidence

never explains how the headers would still be hierarchical if this were possible.

LSI’s best argument, made at the claim construction hearing, involved the “MP3” digital

audio encoding format, which existed at the time the patent application was filed. In the MP3

data format, there are actually multiple “decoding” headers (called “frame headers”) within every

music track. A single music track may contain thousands of these frame headers. Thus, argued

LSI, a person having ordinary skill in the relevant art at the time the patent was filed would have

understood, having knowledge of the MP3 format, that multiple “first headers” (which claim 1

described as including “decoding” information) could be associated with a single “second header”

(which, LSI argued, are “ID3” data tags associated with individual MP3 music tracks). 

This argument, however, cannot overcome the great weight of intrinsic evidence showing

a clear intent by the patentee to limit the invention to a hierarchy of headers, where multiple

“music-track-specific” headers corresponded to a single “decoding” header. True, claim 1 uses

the open-ended term “including.” See CIAS, Inc. v. Alliance Gaming Corp., 504 F.3d 1356,

1360–61 (Fed. Cir. 2007) (“including” means “comprising”). The Federal Circuit, however,

explained in Elkay Mfg. Co. v. Ebco Mfg. Co., 192 F.3d 973, 977-79 (Fed. Cir. 1999), and Abtox,

Inc. v. Exitron Corp., 122 F.3d 1019, 1023-27 (Fed. Cir. 1997), that a term in a “comprising”

claim may nevertheless be limited to “one” rather than “more than one” when the specification or

the prosecution history showed that the term was “used in its singular sense.” See Norian Corp.

v. Stryker Corp., 432 F.3d 1356, 1359 (Fed. Cir. 2005). 

As discussed above, the patentee’s choice of claim language between “first header” and

“at least one second header” reflected such an intent. See id. at 1358–59. Moreover, the

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specification disclosed no embodiments other than the “global header,” which always was

described in singular form. Finally, in a response to a USPTO office action dated June 17, 1996,

the patent holder described the “first header” as containing “algorithm, bit rate, distributor of

music, label, and copyright” information (Liu Decl. Exh. 7 at 10) (emphasis added). If the

patentee truly intended the “first header” to be used as a “frame header” in an MP3 bitstream, the

patentee would not have described the first header as containing information pertaining to the

distributor of music, label, or copyright. Such information would have served no purpose in

thousands of frame headers within a single music track. Additionally, all references to “first

header” and “global header” in the prosecution history provided to the Court were used in a

singular sense.

In sum, the intrinsic evidence demonstrates that a “single data structure” was clearly

intended. See LiebelFlarsheim Co. v. Medrad, Inc., 358 F.3d 898, 905 (Fed. Cir. 2004); see also

ICU Medical, Inc. v. Alaris Medical Systems, Inc., 558 F.3d 1368, 1375 (Fed. Cir. 2009). 

ii. “Precedes” the Digitally Encoded Music

This proposed limitation by SanDisk is curious. The claim language says nothing about

the “first header” preceding the digitally encoded music. Perhaps more problematic, however, is

that it is not entirely clear what “precedes” even means in this context. Does it mean “precedes

the digitally encoded music” in a bitstream? Or does it mean “precedes the digitally encoded

music” in memory? At the claim construction hearing, the parties were asked this very question,

and each gave a different answer.

Claim 1, however, provides a clear answer. It discusses a data format for digitally

encoded music stored in memory. Unlike data presented in a bitstream, where the data is read

sequentially as the stream is processed bit-by-bit, data stored in memory does not have to be read

from the start of memory to the end of memory. Instead, data stored in memory can be accessed

based upon its address. For example, the specification described the “global header” as located at

“the very start of memory, presumably at 0x0” (cols. 1:51–54, 2:42–44). “0x0” is the lowest

possible address for data storage in memory. 

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There is no reason, however, why the “first header” must be stored at this or any particular

address in memory. For example, the “first header” could be stored at memory address

“0xFFFF0” or 0xF0FF0.” All that matters is that the audio player knows the memory address of

the “first header” so that it can read the data stored therein. Given this backdrop, a person having

ordinary skill in the relevant art at the time the patent application was filed would have

understood that the “first header” need not “precede” the digitally encoded music stored in

memory. 

iii. “All” Digital Music

The final question pertaining to this phrase is whether the “first header” must contain

decoding information for all digitally encoded music in memory. On this issue, nothing in the

claim language compels this limitation.

Claim 1 merely set forth a hierarchical data format for storing digital music in memory. It

did not require that the claimed format extend across the full scope of memory on a music chip. 

Indeed, a person having ordinary skill in the relevant art at the time the application was filed

would have understood that memory can be partitioned and subdivided in various ways. For

example, the memory on a music chip could be divided in half, each half storing a different set of

music, each set encoded with different bit rates and algorithms. Under such a scenario, each set

of music could have its own “first header” and corresponding “second headers.” In sum, nothing

in the claim language or intrinsic evidence restricts the possibility that multiple iterations of the

claimed data format could be present on the same music chip.

iv. Final Construction

Based upon the preceding analysis, this order construes the phrase “first header having

parameters stored therein for use by said audio player in decoding said digitally encoded music

stored in said memory” as “a single data structure that includes information used by the audio

player to decode digitally encoded music stored in memory.” This construction is consistent with

an earlier construction given to “first header” by the district court in Agere Systems Inc. v. Sony

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 The Sony construction, which involved a different accused infringer and for which

there is no Federal Circuit opinion, is not binding on this court. See Comcast Cable

Commc’ms Corp. v. Finisar Corp., 2007 WL 1042821, at *2 (N.D. Cal. Apr. 6, 2007). This

court is free to perform an independent construction of the disputed claim terms and phrases. 

See Finisar Corp. v. DirecTV Group, Inc., 523 F.3d 1323, 1329 (Fed. Cir. 2008)).

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Corporation, 2008 WL 2078308, at *1 (E.D. Tex. May 15, 2008) — a decision to which both

parties cited for various aspects of their arguments (Br. 6, Resp. 5–6, Reply 3–4).1

 

B. “selectable categorical information”

The second disputed phrase from the ’730 patent is “selectable categorical information.” 

At the claim construction hearing, the parties informed the Court that they had come to a partial

agreement on this phrase, and offered two revised constructions for consideration. The revised

constructions are shown below.

LSI’S PROPOSED CONSTRUCTION

OF “SELECTABLE CATEGORICAL

INFORMATION”

SANDISK’S PROPOSED CONSTRUCTION

OF “SELECTABLE CATEGORICAL

INFORMATION”

“information related to a type of music

that can be used to select individual

tracks of music”

“information related to a type of music

that can be selected by a user”

As seen above, the parties differ only on whether the selectable categorical information

must be selectable by a user. In claim 1, “selectable categorical information” is defined as

information “relat[ed] to . . . individual tracks of audio.” The dependent claims explain that this

may include the category of music for the track and artist information (cols. 6:14–27, 6:34–44). 

Importantly, there is no limitation that this information must be selectable by any particular

person or thing.

At oral argument, SanDisk pointed to various portions of the specification that described

user selection. For example, the specification stated that it was “an object of the present

invention[] to provide a storage format for pre-recorded music that is easily selectable by a user in

regard to general content” (col. 1:40–43) (emphasis added). Elsewhere, the specification

described the invention as one that “allows a user to make selections by type of music, mist, etc.

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 Mist apparently means artist (col. 3:55–58). 

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which is to be played over a period of time” (col. 1:67–2:3) (emphasis added).2

 This idea of user

interaction was reiterated by the specification in other places as well (see, e.g., col. 3:49–53).

Even so, this order declines to read SanDisk’s proposed limitation into the claim. A

person having ordinary skill in the relevant art at the time the patent application was filed would

have understood that individual music tracks could be categorized in ways that would be useful to

(and therefore selectable by) a computer program, but not necessarily a user. For example, music

files might be categorized by whether or not they are “copy-protected.” If a user attempts to copy

ten music files to a personal music player, a software program might “select” only those files that

are not “copy-protected” and limit the copying to just those music files. In such a scenario, the

copy-protection information would be “selectable categorical information” pertaining to

individual tracks of audio, but it would not be selectable by the user. As such, “selectable

categorical information” is construed by this order to mean “information related to a type of

music that can be used to select individual tracks of music.”

2. THE ’928 PATENT

The ’928 patent, entitled “Memory Chip Architecture for Digital Storage of Prerecorded

Audio Data Wherein Each of the Memory Cells are Individually Addressable,” was issued on

December 9, 1997. Agere is the owner of all rights, title, and interest in and to the ’928 patent.

Unlike ’730 patent just discussed, the ’928 patent targets hardware — namely, “a memory device

for digital storage of pre-recorded audio and other digitally stored data relating thereto.”

A. “chip memory apparatus”

The parties dispute the term “chip memory apparatus,” which appears twice in dependent

claim 15 (col. 8:13–27) (emphasis added):

15. A semiconductor chip memory apparatus for storage of 

pre-recorded audio, said memory apparatus adapted for use with a

solid state audio player, said apparatus comprising[:]

a plurality of memory cells for storing digital data therein;

address shift register for receiving serial data

corresponding to addresses of memory locations;

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data shift register for outputting serial data read from

selected memory locations;

said chip memory apparatus including a housing, said

housing including a graphics display area for inclusion of

indicia pertaining to said pre-recorded music; and

said housing including a hole disposed at an end thereof,

whereby said apparatus may be transported by means of a

carrying device attached through said hole.

The parties’ proposed constructions are shown below:

LSI’S PROPOSED CONSTRUCTION 

OF “CHIP MEMORY APPARATUS” SANDISK’S PROPOSED CONSTRUCTIONOF “CHIP MEMORY APPARATUS”

No construction necessary (explained

below). Otherwise:

“A device that includes memory on a

semiconductor chip.”

“Memory chip that is adapted to be

inserted into an accompanying audio

player, wherein the memory chip is not

an audio player.”

As mentioned at the claim construction hearing, LSI believes that because “chip memory

apparatus” appears in the preamble, it should not be construed. On top of this, LSI contends that

the preamble as a whole is not limiting because it merely recites a purpose or intended use for the

invention. These arguments are unpersuasive. While the term “chip memory apparatus” does

indeed appear in the preamble of claim 15, it also appears in body of the claim. This fact alone

distinguishes the Federal Circuit decision cited by LSI, which involved a term that appeared

exclusively in the preamble. IMS Tech. Inc. v. Haas Automation, Inc., 206 F.3d 1422, 1434 (Fed.

Cir. 2000). Moreover, IMS Tech involved the amorphous term “control apparatus.” 206 F.3d at

1434. The term disputed here — “chip memory apparatus” — presents concrete questions of

whether and to what extent the apparatus should be limited to memory chips. Indeed, this dispute

boils down to just that question.

As framed by the parties at oral argument, this construction centers on whether the “chip

memory apparatus” can itself be an audio player. SanDisk argues that the “chip memory

apparatus” cannot be an audio player. LSI argues the opposite. Thankfully, the claim language

provides clear guidance on this issue. The disputed “chip memory apparatus” is found in claims

15 through 19 (see cols. 6:50–8:12, 8:13–45). As described in claim 15, a “chip memory

apparatus” is used “for storage of pre-recorded audio, said memory apparatus adapted for use

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with a solid state audio player” (col. 8:13–15) (emphasis added). This language is notably

different from claims 1 through 14, which cover a “memory chip” that is “adapted for insertion

into an associated audio player.” 

These differences between claims 1 through 14 (the “memory chip” claims), and claims

15 through 19 (the “chip memory apparatus” claims) support two presumptions under the doctrine

of claim differentiation: (1) a “chip memory apparatus” is not simply a “memory chip” and (2) a

“chip memory apparatus” does not need to be “adapted for insertion into” an audio player. 

Rather, it need only be “adapted for use with” an audio player. As such, SanDisk’s proposed

construction directly contradicts the language of the claims.

Finally, nothing in the language of claim 15 prevents the “chip memory apparatus” from

itself being an audio player. This does not mean, however, that the audio player mentioned in

claim 15 can be the apparatus itself. Recall that the preamble described the “chip memory

apparatus” as “adapted for use with a solid state audio player” (col. 8:13–16) (emphasis added). 

A person having ordinary skill in the art at the time the patent application was filed would have

understood this language to mean that the “chip memory apparatus” and the audio player were not

one and the same. Rather, the “chip memory apparatus” must be adapted for use with a separate

audio player.

In sum, whether or not the “chip memory apparatus” can itself be an audio player is

besides the point. Even if it was, this would not satisfy the limitation in claim 15 that the “chip

memory apparatus” be adapted for use with a separate audio player. As such, the term “chip

memory apparatus” is construed to be “a device that includes memory on a semiconductor chip

that is adapted for use with a separate audio player.”

3. THE ’124 PATENT

The ’124 patent, entitled “Windowing Method for Decoding of MPEG Audio Data,” was

issued on March 30, 1999. LSI Corporation is the owner of all rights, title, and interest in and to

the ’124 patent.

This particular patent involves a great deal of mathematics. It is directed at a

“windowing” method for decoding MPEG audio data. The term “windowing,” which is a term of

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art not in dispute here, describes a “smoothing filter” that must be applied to audio data when it is

converted from digital to analog format (col. 1:58–61). “MPEG” (also not disputed) refers to an

international standard for representation, compression, and decompression of motion pictures and

associated audio on digital media (1:38–42). Windowing and the MPEG standard are prior art. 

The invention targets an allegedly novel decoding method that supposedly reduces the cost and

amount of circuitry required to decode MPEG audio data (col. 2:3–5).

A. “block”

The parties seek construction of the term “block,” which appears in all four claims of the

’124 patent (col. 31:1–32:18) (emphasis added):

1. A method for generating sound from data following an 

MPEG encoding standard comprising:

transferring a block consisting of independent components

of time-domain vectors to a first memory, wherein

transferring the block comprises transferring a total of 17

components from a first time-domain vector and 16

components from a second time-domain vector;

determining products of the independent components in the

block with corresponding windowing coefficients;

accumulating the products in a plurality of sums, each sum

corresponding to a different sound amplitude value; and

generating a sound from the sound amplitude values.

2. The method of claim 1, wherein:

the step of determining products comprises performing 64

multiplications, each multiplication involving one of the

components from the block and a windowing coefficient;

and

the step of accumulating comprises adding a pair of the

products to each of 32 sums.

3. The method of claim 2, further comprising:

multiplying each of a series of matrixing coefficients by a

corresponding combination of components of a frequencydomain vector;

accumulating the products to generate four components of

a time-domain vector; and

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 While this order cannot possibly explain in a footnote the full details of what these

vectors represent, it may be helpful to state that the analog-to-digital conversion of audio

information in the present invention involves the conversion of time-domain data to

frequency-domain data. Similarly, the digital-to-analog conversion of audio information

involves the conversion of frequency-domain data to time-domain data. These vectors are

important to the latter conversion. 

15

writing the four components of the time-domain vector to a

second memory, wherein transferring the block is from the

second memory to the first memory.

4. The method if claim 3, further comprising repeating the 

steps of claims 1, 2, and 3 eight times wherein no two steps of

transferring a block transfers components from the same pair of

time-domain vectors.

 Proposed constructions are shown below.

LSI’S PROPOSED CONSTRUCTION 

OF “BLOCK” SANDISK’S PROPOSED CONSTRUCTIONOF “BLOCK”

“Group of data elements stored as a

unit.”

“The largest possible collection of data

to be used in one or more transfer

operations that is stored in contiguous

storage locations before the one or more

transfer operations” 

The claims themselves give meaning to the term “block.” In particular, method claim 1

stated that “a block [consists] of independent components of time-domain vectors to a first

memory, wherein transferring the block comprises transferring a total of 17 components from a

first time-domain vector and 16 components from a second-time domain vector” (col. 31:4–8).3

Despite this defining claim language, SanDisk argues that numerous additional limitations that do

not appear in the claims should apply to the term “block.” LSI argues that they should not.

The first limitation proposed by SanDisk — that the block be the “largest possible

collection of data to be used in one or more transfer operations” — fails in two respects: (1) it is

confusing, and (2) it is wholly unsupported by the intrinsic evidence. As stated, the claim

language already included an express limitation on what the block must contain: “a total of 17

components from a first time-domain vector and 16 components from a second-time domain

vector.” Nothing in the specification supported the additional limitation that the block must

contain the “largest possible collection of data.” By contrast, the specification touted the

efficiency gained by transferring smaller blocks — specifically, blocks consisting of 33 vector

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components as opposed to 64 vector components seen in the prior art. This reduction in block

size supposedly cut the number of bytes required to be transferred using the present invention

“nearly in half” (see col. 11:10–37). In other words, one of the express benefits of the present

invention was to minimize both the number and size of blocks transferred out of memory for

processing. Given this intrinsic evidence, this limitation fails.

SanDisk also proposes that the vector components in a block be “stored in contiguous

storage locations before the one or more transfer operations.” In other words, SanDisk would not

allow the 33 vector components of a block to be scattered across memory, but would require

vector components to be lumped together, back to back, without any intervening data. While the

claims do not expressly contain this limitation, the specification did lend some support to

SanDisk’s argument. Specifically, the specification noted that “[s]toring the 33 values at

consecutive addresses in [memory] increases the speed of reading the values for windowing

because consecutive addresses can be accessed with a minimum of page changes” (col. 11:5–9)

(emphasis added). In other words, contiguous storage would allow more efficient reading of data

values, and minimize page changes. Even so, SanDisk’s proposed limitation fails because it

excludes the exemplary embodiment. In the exemplary embodiment, “at least one block of 33

vector components is not at consecutive addresses because the current vector V0

 can be in any of

sixteen positions in memory and is not always at the lowest address” (col. 11:37–41) (emphasis

added). Stated simply, at least one “block” of vector components will not be contiguously stored

in memory prior to transfer. In light of this evidence, this limitation proposed by SanDisk must

also fail. See Vitronics, 90 F.3d at 1583. 

Given that the term “block” is given ample meaning by the surrounding claim language,

this order construes “block” as simply “a set of data elements.”

4. THE ’830 PATENT

The last patent at issue in this order, entitled “Hysteretic Synchronization System for

MPEG Audio Frame Decoder,” was issued on November 9, 1999. LSI Corporation is the owner

of all rights, title, and interest in and to the ’830 patent.

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Like the preceding patent, the ’830 patent also involves the MPEG standard. Specifically,

the patent relates to a “hysteretic synchronization system” and related methods for decoding

MPEG digital audio data. Specifically, it is directed towards preventing “false initial

synchronization” when decoding an audio bitstream and “loss of synchronization caused by

occasional data errors” (col 1:12–16). Both of these problems — false initial synchronization and

loss of synchronization — allegedly plagued each of the methods used in the prior art (cols.

1:12–16, 2:40–43). 

Synchronization between a digital music decoder and the audio bitstream (which, as

described earlier, is simply a stream of data bits) is essential to proper playback of digitally

encoded audio, and proper synchronization between audio and video tracks. If the decoder falls

“out of sync,” sound and video may no longer match, and sound quality is degraded (see col.

4:10–16). Audio data contained in a bitstream can be segmented into what are called “audio

frames.” At the start of each frame is what is called a “synchronization code,” which is

essentially a data marker (in the preferred embodiment, a series of twelve binary ones) to tell the

decoder that a new audio frame is starting. As the bitstream is processed by the decoder, the

decoder will ideally process each audio frame one after the other as the stream of bits are read. 

The decoder will remain synchronized so long as it knows where each audio frame begins in the

bitstream. 

As previewed above, the present invention is allegedly an improvement over the prior art

because it provides “a reliable, faster synchronization system with a substantially improved

tolerance for [audio] frames with errors, better tracking of bad frames, and maintenance of

audio/video synchronization” (col. 4:10–15). 

The parties initially sought construction of two phrases in the ’830 patent: (1) “data

header” and (2) “sensing intervals between successive synchronization codes.” These phrases

appeared in claims 1, 4, 5, 16, and 20, shown below (col. 8:13–27):

1. A system for synchronizing a data processing unit to a 

bitstream having synchronization codes successively spaced by a

predetermined interval with data for processing disposed between

the synchronization codes, said bitstream having a data header

comprising a bitrate and a sampling frequency, said system

comprising:

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a detector for detecting said synchronization codes;

a sensor for sensing intervals between successive

synchronization codes;

a comparator for comparing said intervals with said

predetermined interval;

a controller for determining both:

(A) whether the system is synchronized to the bitstream

after the comparator has detected a first predetermined

number of said intervals; and

(B) whether the system is unsynchronized to the bitstream

after the comparator has detected a second predetermined

number of said intervals; and

a header sensor for sensing said data header and

calculating said predetermined interval from said

information.

4. A system according to claim 1, wherein said data 

header includes information from which said predetermined

interval can be calculated.

5. A system for synchronizing a data processing unit to a bitstream

having successively spaced synchronization codes and data

disposed between the synchronization codes, the bitstream further

comprising a data header following each synchronization code

including information from which intervals between successive

synchronization codes can be calculated, the system comprising:

a detector for detecting said synchronization codes;

a sensor for sensing intervals between successive

synchronization codes;

a comparator for comparing said intervals with

synchronization code intervals;

a controller for determining if the system is synchronized to

the bitstream depending on satisfaction of a first

predetermined condition and if the system is

unsynchronized to the bitstream depending on satisfaction

of a second predetermined condition; and

a sensor for sensing said data header and calculating

intervals between successive synchronization codes from

said information.

16. A method for synchronizing a data processing system

to a bitstream including synchronization codes successively spaced

from each other by a predetermined interval, data disposed

between the synchronization codes, and a data header including

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information from which said predetermined interval can be

calculated, comprising the steps of:

(a) detecting said synchronization codes;

(b) sensing intervals between successive synchronization

codes;

(c) comparing said intervals with said predetermined

interval;

(d) determining that the system is synchronized to the

bitstream based on a first predetermined condition;

(e) determining that the system is unsynchronized to the

bitstream based on a second predetermined condition; and

(f) sensing said data header and calculating said

predetermined interval from said information between steps 

(a) and (c).

20. A method for synchronizing a data processing system to a 

bitstream including synchronization codes spaces at a

predetermined interval, data disposed between the synchronization

codes, and a data header including information from which said

predetermined interval can be calculated, comprising the steps of:

(a) detecting said synchronization codes;

(b) sensing intervals between successive synchronization

codes;

(c) comparing said intervals with said predetermined

interval; 

(d) determining system synchronization and

unsynchronization based on predetermined conditions,

wherein:

(e) sensing said header and calculating said predetermined

interval from said information between steps (a) and (c). 

At the claim construction hearing, however, the parties informed the Court that they had

resolved their dispute regarding the term “data header.” The construction agreed upon by the

parties is reproduced below.

A. “data header”

The parties agreed that “data header” means “in an audio data bitstream, data describing

encoding characteristics of an audio data frame, wherein said data precedes the audio data of the

frame.”

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B. “sensing intervals between successive synchronization codes”

The last phrase disputed in this order is “sensing intervals between successive

synchronization codes.” Proposed constructions are shown below.

LSI’S PROPOSED CONSTRUCTION

OF “SENSING INTERVALS BETWEEN

SUCCESSIVE SYNCHRONIZATION

CODES”

SANDISK’S PROPOSED CONSTRUCTION

OF “SENSING INTERVALS BETWEEN

SUCCESSIVE SYNCHRONIZATION

CODES”

“Measuring the frame length(s) between

successive synchronization codes based

on the number of bits between the

codes”

“Measuring the magnitudes of the

intervals between the two successive

synchronization codes”

As stated, keeping the decoder synchronized with the audio bitstream was one of the

primary objects of the present invention. The invention ideally accomplished this task by

performing three steps: (1) calculating the expected interval between successive synchronization

codes using the bitrate and sampling frequency of the audio data; (2) measuring the actual interval

between successive synchronization codes; and (3) comparing the expected interval with the

actual interval. If the two intervals matched, then the decoder and bitstream would be “in sync”

with each other (see col. 2:66–3:4). 

A person having ordinary skill in the relevant art at the time the patent application was

filed would have understood that the asserted claims covered this three-step approach. In

particular, such a person would have understood that the “predetermined interval” found in the

claims referred to the interval that was calculated using bitrate and sampling frequency

information contained in the data header (see col. 10:5–25, 10:38–58, 11:29–47, 12:1–17).

The question presented is whether the phase “sensing intervals between successive

synchronization codes” is limited to one specific approach disclosed in the specification for

measuring the actual interval between synchronization codes (step two of the three-step process),

or whether alternative approaches at measuring the interval between synchronization codes could

be used. Specifically, LSI’s construction limits the “measuring” step to counting the number of

bits between successive synchronization codes, while SanDisk’s construction does not.

The claims provide insight into the proper construction of this phrase. Both claim 1 and

claim 5 include a “sensor for sensing intervals between successive synchronization codes” (col.

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10:38–58). LSI’s proposed construction would require this sensor to “measure the frame length”

between successive synchronization codes “based upon the number of bits between the codes.” 

This construction, however, is inconsistent with claim 15. As shown below, claim 15 — which is

dependent upon claim 5 — adds a new element to the system called a “counter.” The “counter”

performs the very function that LSI’s proposed construction would impart on the “sensor”:

15. A system as in claim 5, wherein: 

said bitstream comprises bits of data such that said

intervals between successive synchronization codes

corresponds to a number of said bits; and

the system further comprises a counter for counting said

bits between successive synchronization codes to determine

said number of said bits and said interval between

successive synchronization codes.

Given this language, claim differentiation weighs strongly against a finding that the

“sensor for sensing intervals between successive synchronization codes” in claim 5 is limited to

the exact same function as the “counter” in claim 15. Additionally, nowhere in the claim

language is the term “frame length” — used in LSI’s proposed construction — used to describe

the interval between successive synchronization codes. Rather, the claims exclusively refer to the

term “interval” to describe the separation between successive synchronization codes. In light of

the clear language of the claims, LSI’s proposed construction must be rejected.

SanDisk’s proposed construction, by contrast, properly employs the term “interval” used

throughout the claims, and is consistent with the description of the present invention set forth in

the specification (see 2:66–3:3, 3:37–42). Moreover, it does not improperly limit the “sensor” or

the “sensing” step to counting “the number of bits between” synchronization codes. Given the

intrinsic evidence set forth above, a person having ordinary skill in the relevant art would have

understood “sensing intervals between successive synchronization codes” to mean “measuring the

interval between successive synchronization codes.”

CONCLUSION

The constructions set forth above will apply in this dispute. The Court will reserve the

authority, on its own motion, to modify these constructions if further evidence warrants such a

modification. 

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Additionally, the parties have until NOON ON MONDAY, MARCH 22, 2010, to submit a

five-page critique (double-spaced, no footnotes, and no attachments) limited to points of critical

concern. In light of the voluminous briefing already submitted and the lengthy hearing on these

matters, this is an opportunity for the parties to focus solely on their most cogent critique.

IT IS SO ORDERED.

Dated: March 17, 2010. 

WILLIAM ALSUP

UNITED STATES DISTRICT JUDGE

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