Source: s3://data.kl3m.ai/documents/govinfo/USCOURTS/USCOURTS-cand-3_03-cv-00355/USCOURTS-cand-3_03-cv-00355-18/pdf.json

Nature of Suit Code: 830
Nature of Suit: Patent
Cause of Action: 35:271 Patent Infringement

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United States District Court

For the Northern District of California

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Defendant also moved for summary judgment on the grounds that Claim 1 of U.S. Patent No. 6,397,314 is not

infringed. However, the Court limited the parties to one motion on each parties single best theory. (See Doc. Nos. 188, 211.)

As the Court previously informed the parties, the Court will only consider Defendants’ Motion related to the ‘918 Patent.

United States District Court

For the Northern District of California

IN THE UNITED STATES DISTRICT COURT

FOR THE NORTHERN DISTRICT OF CALIFORNIA

LEXAR MEDIA, INC.,

 Plaintiff,

 v.

 FUJI PHOTO FILM USA, INC.,

Defendant. /

No. C03-00355 MJJ

ORDER DENYING FUJI PHOTO FILM

U.S.A., INC.’S MOTION FOR SUMMARY

JUDGMENT THAT CLAIMS 1, 2, 4, AND

7-12 OF U.S. PATENT NO. 6,262,918 ARE

INVALID

INTRODUCTION

Before the Court is Defendant Fuji Photo Film, U.S.A., Inc.’s Motion for Summary

Judgment that Claims 1, 2, 4, and 7-12 of U.S. Patent No. 6,262,918 (“the ‘918 Patent”) are invalid.1

(Doc. No. 192.) Plaintiff Lexar Media, Inc. opposes the Motion. 

For the following reasons, the Court DENIES the Motion.

FACTUAL BACKGROUND

The ‘918 Patent described a method and apparatus for enabling the erasure of multiple blocks

of memory simultaneously to save time. The ‘918 Patent application was filed on June 30, 2000,

and the Patent issued on July 17, 2001. The inventors listed on the ‘918 Patent are Petro Estakhri,

Berhanu Iman, and Min Guo. The only claims of the ‘918 Patent asserted herein by Defendant are

claims 1, 2, 4 and 7-12 (the “Asserted Claims”). The following three references were not of record

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to the U.S. Patent Trademark Office during prosecution of the ‘918 Patent: (1) Fuji AIMS card

and/or the Ricoh RDC-1 digital camera (the “Fuji AIMS System”); (2) U.S. Patent No. 5,572,466

(“the ‘466 Patent); and (3) U.S. Patent No. 6,081,878 (“the ‘878 Patent”).

AIMS is an acronym for “auto indexing mass storage.” Fuji Film Microdevice Co. (“FMM”)

began manufacturing AIMS cards in the summer of 1994 in Japan. The AIMS cards operated in one

of two modes – selected at the time of manufacture of the card itself: a standard speed (for recording

still images), or a high-speed mode (designed to enable the recoding of video images). On the highspeed AIMS cards that were produced and sold by FFM, following an erase, the 70h command is

transmitted, as shown in figure 9 on FH 030942, and this command reads device status which

indicates whether or not the erase was successful. High-speed record mode Fuji AIMS cards were

used in the record mode in the United States in capacities of 8 or 24 megabytes by a subsidiary of

Richoh, Fuji’s customer, at least as early at July, 1995. The Fuji AIMS cards were intended for use

with Ricoh’s RDC-1 digital camera, which was introduced in the United States between 1995 and

1996. The RDC-1 camera operated with a high-speed record mode Fuji AIMS card to implement its

video feature.

 U.S. Patent No. 5,572,466 (“the ‘466 Patent”) was issued on November 5, 1996 from an

application filed on October 6, 1993 (claiming priority to a foreign application filed on October 6,

1992). 

The Court construed “super block” to mean “two or more blocks that are used to store data,

the two or more blocks having addresses that are correlated with a group of logical block addresses

that is determined by the number of sectors in a block.” A “block” is “erasable storage for a

plurality of sectors.”

LEGAL STANDARD

I. Summary Judgment

Rule 56(c) of the Federal Rules of Civil Procedure authorizes summary judgment if there is

no genuine issue as to any material fact and the moving party is entitled to judgment as a matter of

law. See Anderson v. Liberty Lobby, Inc., 477 U.S. 242, 247-48 (1986). The moving party bears the

initial burden of demonstrating the basis for the motion and identifying the portions of the pleadings,

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The parties here dispute whether the FUJI AIMS System, the ‘466 Patent or ‘878 Patent are more pertinent than

the art before the Examiner, with Plaintiff arguing that Fuji has provided no such evidence, and Defendant arguing that all

of the evidence submitted in support of its motion establish, and/or corroborate prior art that clearly anticipates the Asserted

Claims and are, thus, by definition are more pertinent than the art cited during the prosecution.

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depositions, answers to interrogatories, affidavits, and admissions on file that establish the absence

of a triable issue of material fact. Celotex Corp. v. Catrett, 477 U.S. 317, 323 (1986). If the moving

party meets this initial burden, the burden then shifts to the non-moving party to present specific

facts showing that there is a genuine issue for trial. Fed. R. Civ. P. 56(e); Celotex, 477 U.S. at 324;

Matsushita Elec. Indus. Co. v. Zenith Radio Corp., 475 U.S. 574, 586-87 (1986). The non-movant's

bare assertions, standing alone, are insufficient to create a material issue of fact and defeat a motion

for summary judgment. Anderson, 477 U.S. at 247-48. An issue of fact is material if, under the

substantive law of the case, resolution of the factual dispute might affect the case's outcome. Id. at

248. Factual disputes are genuine if they "properly can be resolved in favor of either party." Id. at

250. Thus, a genuine issue for trial exists if the non-movant presents evidence from which a

reasonable jury, viewing the evidence in the light most favorable to that party, could resolve the

material issue in its favor. Id. However, "[i]f the [non-movant's] evidence is merely colorable, or is

not significantly probative, summary judgment may be granted." Id. at 249-50 (internal citations

omitted). 

II. Invalidity and Anticipation

A patent is presumed valid, and an attack on its validity requires proof of facts by clear and

convincing evidence. Bildex Inc. v. Kason Industruies, Inc., 849, F. 2d 1461, 1463 (Fed. Cir. 1988). 

 However:

Rebuttal of the presumption may be more easily had and more often

achieved in reliance on prior art more pertinent than that considered by

the examiner; but whether rebuttal is achieved requires careful

consideration of whether the prior art relied upon does in truth render

the claimed invention anticipated or obvious.

Aktiebolaget Karlstads Mekaniska Werkstad v. U.S. Int’l Trade Comm’n., 705 F. 2d 1565, 1557

(Fed. Cir. 1983).2

 

Anticipation is a question of fact. Scripps Clinic & Research Foundation v. Genentech, Inc.,

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927 F.2d 1565, 1576 (Fed. Cir. 1991). In the anticipation analysis, the prior art is viewed from the

vantage point of one of ordinary skill in the art. Crown Operations Int’l, Ltd. v. Solutia Inc., 289 F.

3d 1367 (Fed. Cir. 2002). A claimed invention is invalid for anticipation under 35 U.S.C § 102 only

if all of the elements and limitations of the claim are found within a single prior art reference. 

Scripps, 927 F. 2d at 1576; see also IPXL Holdings, L.L.C. v. Amazon.com, Inc., 430 F. 3d 1377,

1381 (Fed. Cir. 2005). There must be no difference between the claimed invention and the reference

disclosure, as viewed by a person of ordinary skill in the field of the invention. Scripps, 927 F. 2d at

1576. To find anticipation on summary judgment, the court must determine that no facts material to

the question are disputed; or that even if all material factual inferences are drawn in favor of the

non-movant, there is no reasonable basis on which the non-movant can prevail. Id. A court must

also consider the standard of proof that would have to be met at trial. Id. 

ANALYSIS

I. Anticipation by the Fuji AIMS System

Defendant first contends that the Fuji AIMS System anticipates and renders invalid the

claims one and ten of the ‘918 Patent under 35 U.S.C. § 102(b). Specifically, Defendant asserts that

the “Fuji AIMS System incorporated and publicly disclosed, more than a year before the ‘918

Patent’s filing date, each of the limitations of the remaining asserted ‘918 Patent claims, including

specifically a “super block,” as that term has been construed by the Court. Plaintiff contends that

Defendants’ evidence is insufficient to show invalidity based on the sale, offer for sale, and/or

public use of the Fuji AIMS System, and likewise fails to show that the super block limitation of the

Asserted Claims is met by the Fuji AIMS System since, inter alia, Plaintiffs’ expert disagrees that

this limitation is met.

A. Sale, Offer for Sale, and/or Public Use

35 U.S.C. § 102(b) provides in relevant part that a person shall be entitled to a Patent unless:

“the invention was patented or described in a printed publication in this or a foreign country or in

public use or on sale in this country, more than one year prior to the date of the application for patent

in the United States . . .”In this vein, Defendant offers deposition testimony of Mr. Jefferey Lengyel,

marketing manager for Ricoh U.S.A.’s digital camera division. Mr Lengyel testified that RDC-1

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Mr. Hiroyuki Niwano, who was the team leader during FMM’s development of the AIMS card, testified that at least

some of the 8 and 24 megabyte cards produced by FMM were sold to Ricoh. Mr. Niwano believes that Ricoh then sold the

cards in the United States.

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cameras were first available in the United States in December of 1995, and that the RDC-1 was only

capable of capturing video if an 8 or 24 megabyte AIMS card was used. The RDC-1 were offered

for sale in a package with either an 8 or 24 megabyte card, and the cards were supplied by FFM.3

Mr. Lengyel also offered testimony showing that Ricoh offered the RDC-1 for sale at in February

1996 in the United States at the Photographic Manufacturers Association annual trade show, and that

he used the video mode during a meeting with a buyer from Hammacher & Schlemmer. 

Q. Did Ricoh take orders for the RDC-1 with AIMs cards at the PMA 

 show in February of 1996?

A. Yes they did.

Q. How do you know that?

A. I was actively involved in the presolicitation of making meeting 

 arrangements for our key buyers that owned photographic retail 

 stores to meet us at that show. I participated in a number of high 

 level meetings within our conference room in the booth where saw 

 purchase orders and business transactions being conducted.

Mr. Lengyel further testified that he used the RDC-1 with a high-speed AIMS card to make a

video of his neighbor in July 1995 in Santa Monica California. Similarly, Mr. Hiroyuki Niwano,

one of Fuji’s employees who designed the AIMS card, publicly used the RDC-1 with a high-speed

AIMS card when he made a video, and showed it at a PC Card show in July 1995 in California.

Plaintiff counters that this evidence is insufficient for several reasons. First, Plaintiff points

out that Mr. Lengyel did not know who manufactured the AIMS cards, and did not speak to whether

the sale of the AIMS cards to Ricoh occurred in the United States as required by § 102(b). Second,

Plaintiffs assert that there is no evidence that Mr Lengyel or Mr. Niwano used the high-speed erase

mode - the feature of the AIMS card that allegedly anticipates the Asserted Claims of the ‘918

Patent. Indeed, Mr. Niwano testified that he could not recall any discussion about the high speed

erase feature at the 1995 show, and Mr. Lengyel testified that he had no understanding of the

technical details of the AIMS card, including whether it was capable of simultaneously erasing

multiple blocks in different memory devices. Finally, Plaintiff asserts that Defendant has offered no

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Although Plaintiff has not addressed the second condition of the on-sale bar (the invention is ready for patenting),

the Court notes that since the AIMS cards were reduced to practice, this condition is met. Pfaff, 525 U.S. at 6. ( the second

condition can be satisfied by proof of reduction to practice).

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evidence that any actual offers were taken or sales made at the 1996 trade show. 

 Plaintiff’s arguments, however, are misplaced. The on-sale bar applies when two conditions

are satisfied.: (1) the product must be the subject of a commercial offer for sale; and (2) the

invention must be ready for patenting. Pfaff v. Wells Electronics, Inc., 525 U.S. 55, 67 (1998). As

to the first condition, it is not necessary that a sale be consummated for the § 102(b) bar to operate. 

Bildex Inc., 849 F. 2d at 1464. A firm offer to sell without more may be sufficient. Id. In addition,

there is no requirement that the offer for sale take place in the United States. In re Caveney, 761 F.

2d 671, 677 (Fed Cir. 1985). Rather, the offer must just be directed to an entity in the United States. 

Id. Finally, the second condition can be satisfied by proof of reduction to practice. Pfaff, 525 U.S. at

67. 

Here, Defendant has provided evidence that the Fuji AIMS system was offered for sale in the

United States by Ricoh at least at the February 1996 trade show. And although proof of actual sales

is not required, in its reply, Defendant offered evidence that on January 3, 1996, Ricoh shipped to

Bob Francis of Walt Disney Imagineering an RDC-1 capable of using the video feature (i.e., an

RDC-1 coupled with an AIMS 8 or 24 megabyte card), which was purchased. This sale is

substantiated by a Ricoh business document. Moreover, Mr. Niwano’s testimony that FFM sold 8

and 24 megabyte AIMS Cards to Ricoh, in combination with Mr. Lengyel’s testimony that Ricoh

U.S.A. sold the RDC-1 camera in a package with either an 8 or 24 megabyte AIMS card provided by

FMM demonstrates that the AIMs cards in question were sold to an entity in the United States.4

 

Moreover, Plaintiff offers no legal support for its argument that a public user must

understand the technical details of the invention in order for the public use bar to apply. Nor does it

proffer evidence to create a dispute about whether Mr. Niwano, or Mr. Lengyel publicly used the

Fuji AIMS System. Rather Plaintiff asserts that there is no evidence that these individuals used the

high-speed erase mode - the feature of the AIMS card that allegedly anticipates the Asserted Claims

of the ‘918 Patent. Assuming, arguendo, that public use of this exact feature is necessary, 

Defendant in its reply offered testimony from Mr. Niwano that he did in fact use the erase function

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In particular, Mr. Niwano stated in a declaration that, since the AIMS card demonstrated at the show had the

capacity to record only a few seconds of video, he had to use the erase function to delete each video in between

demonstrations. 

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 A "block" is "erasable storage for a plurality of sectors." 

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at the 1995 PC Card Trade show.5

In sum, the Court finds that Defendant has established, with clear and convincing evidence

an offer for sale, and public use of the Fuji AIMS System in the United States more than a year

before the ‘918 Patent’s filing date. The Court now turns its attention to whether the FUJI AIMS

System incorporated each of the limitations of the remaining asserted ‘918 Patent claims, including

specifically a “super block.”

B. “Super Block”

One element of independent claims one and ten of the ‘918 Patent, and the remainder of the

Asserted Claims (all of which depend upon those claims) is the formation of “super blocks.” This is

the only element of the Asserted Claims at issue here. 

The Court construed “super block” to mean “two or more blocks that are used to store data,

the two or more blocks having addresses that are correlated with a group of logical block addresses

that is determined by the number of sectors in a block.”6 The parties do not seem to disagree that

when the high-speed erase mode of the Fuji AIMS System is used, four physical blocks in four

different physical chips are always erased together. (Niwano Decl., ¶ 11; McAlexander Decl., Exh.

A at 111 (“[w]hile the Fuji AIMS card can erase four blocks in parallel...”) The parties do, however,

dispute whether the four blocks are correlated with a group of logical block addresses (“LBAs”).

According to Mr. Niwano, one of the inventors of the AIMS card, in the high-speed erase

mode, four physical blocks in four different physical chips, totaling 16 kilobytes, are always erased

at the same time. The AIMS specification shows that the erase process consists of the host

transmitting a first address for a block to be erased, and a count number of blocks to be erased. The

host then transmits an erase command to the controller (C0h). The controller sends to each of four

possible NAND devices the erase command (60h), followed by a common NAND address, and then

sends an erase commence command (D0h), which commences the erasure of all four physical blocks

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at the same time. (See Niwano Decl., See Rhyne Decl., Exh. A at 67.) Defendant contends that

these four blocks constitute the “super block.” In explaining how the purported “super block” is in

fact consistent with the Court’s construction of that term, Mr. Niwano explains that each physical

location in the memory portion of the AIMS card has a corresponding, unique logical address that

can be accessed by the host. (Niwano Decl., ¶ 16, Exh. B at FH 030894 (address map table of AIMS

specification).) Mr Niwano further testified that during the high-speed erase operation, a range of

logical addresses are correlated with the group of four blocks being erased. (Id.) 

By contrast, Plaintiff’s expert opines that the AIMS specification shows a reordering, not a

correlation or management of the addresses, and the specification does not disclose the use of a

group of logical block addresses for correlating with the addresses of the blocks in the chips. 

(McAlexander Decl., Exh. A at 110.) Rather, according to Plaintiff’s expert, the AIMS card

controller simply sends the same common erase block address, the “NAND physical address” to all

four chips, which is not a grouping of LBAs. More particularly, “by sending out an address to each

of the chips, there is not any attempt to manage the address in any type of common superblock [sic]

format such that one address goes out and therefore goes across multiple chips. In the AIMS card,

these are four separate shipments of addresses.” (Finst Decl, Exh. C, McAlexander Depo. at 170.) 

Plaintiff claims that the fact that each block in the high speed mode AIMS card remains

independently accessible, but erasable only as a unit with blocks in other devices is inconsistent with

the formation of super blocks. (McAlexander Decl., Exh. A at 111.)

Having considered the parties’ arguments and evidence the Court concludes that there is a

triable issue of genuine fact as to whether the Fuji/AIMS system discloses a super block wherein

blocks have addresses that are correlated with a group of logical block addresses that is determined

by the number of sectors in a block.

II. Anticipation by the ‘466 Patent 

Defendant contends that the ‘466 Patent discloses all of the limitations of the Asserted

Claims, including the element of a “super block.” According to Defendant the “tracks” disclosed by

the ‘446 Patent are functionally the same as the portions of memory defined in the ‘918 Patent as

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super blocks. More particularly, Defendant’s expert testified that the storage for each of 20,480-byte

“track” of data maintained by the host computer in the ‘466 Patent is distributed over five flash

memories, each of which holds four Kbytes of the track. Because the erase blocks of each of those

memories is four Kbytes, each erase block holds eight of the’466 Patent sectors within its sixteen

pages (i.e., ‘918 sectors). Defendant also points out that the erase blocks depicted in the ‘466 Patent

are configured identically to the super blocks depicted in the ‘918 Patent, and argues that this is

further evidence that the ‘466 Patent discloses super blocks. Defendant also cites to a conversion

table in the ‘466 Patent which shows the “correspondence between the logical addresses (track

numbers and sector numbers) specified by the host CPU and the real memory addresses (chip

numbers, block 10 numbers, and page numbers) for accessing the flash EEPROMs 11-0 through 11-

4 is defined.” ( ‘466 Patent col. 9, lns. 14-21.) Defendant further argues that since the logical

addresses are “track numbers and sector numbers” (id. at col. 9, lns. 14-21), not simply track

numbers, the logical addresses are determined by the number of sectors in a block.

Plaintiffs first counter that while the ‘918 Patent claims a method of improving system

performance using the “super block” architecture, the ‘466 Patent describes a way to arrange

EEPROMs so that when used as a replacement for a magnetic disk drive, the EEPROMs can be

accessed in parallel. That the ‘466 addresses a different problem, however, does not defeat

Defendant’s anticipation argument. 

A reference may be from an entirely different field of endeavor than

that of the claimed invention or may be directed to an entirely different

problem from the one addressed by the inventor, yet the reference will

still anticipate if it explicitly or inherently discloses every limitation

recited in the claims.

In re Schreiber, 128 F. 3d 1473, 1478 (Fed. Cir. 1997). The real issue here is whether the ‘466

Patent discloses a “super block.” On that note, according to Plaintiff’s expert, five ERPROMs are

arranged so that one block in each can store eight sectors of the track, and the host issues

consecutive addresses within the same track in order to achieve this parallelism. Plaintiffs further

contend that, by contrast, the ‘918 super blocks are grouped to store data independently of whatever

existing disk access scheme of the host there may be. The ‘466 tracks, on the other hand, already

exist in the address space on the host side, and the flash EEPROMs are merely arranged to take

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advantage of the track structure. Plaintiff’s expert further states that super blocks do not depend on

the host’s “limiting consecutive sectors to be accessed in the same track.” Rather, he continues, the

super blocks store data and can be erased regardless of the way or method in which the host accesses

the sectors. 

 Plaintiff also proffers that the number of EEPROM blocks that are erased in parallel in the

‘466 Patent is variable and determined by the amount of data sent by the host. For example, if the

host sends only one block of data (eight sectors), only one block of EEPROM will be erased. By

contrast, the size of a super block is fixed and is “determined by the number of sectors in the block.” 

The EEPROM chips are arranged to store a track, which allows the host to write to and erase a

variable number of blocks depending on how much data is stored in the track. Plaintiffs claim that

the variable nature of the system disclosed in the ‘466 Patent precludes the correlation of a group of

logical block since in the variable number of blocks that are erased is not determined by the number

of sectors in a block. In other words, the number of sectors that can be erased is not limited to a

predetermined group.

The Court once again concludes that there is a triable issue of genuine fact as to whether the

‘46 patent discloses a super block as that term has been construed by the Court. Plaintiff has

proffered evidence that, among other things, the number of EEPROM blocks erased is dependant on

the amount of data sent by the host and not on the number of sectors in a block. Moreover, the

parties’ experts disagree on whether the ‘466 Patent teaches the formation of a super block. As

such, summary judgment based on a finding of anticipation by the ‘466 is inappropriate.

III. Anticipation by the ‘878 Patent.

A. User Data and Overhead (i.e., a Sector) in Each of Two Memory Devices

The Court construed the term “sector” in the ‘918 Patent as: “a unit of memory containing

user data and overhead.” Overheard consists of data such as the error correction information, block

address fields, and flag fields. Plaintiff’s expert opined that the ‘878 Patent does not anticipate the

Asserted Claims of the ‘918 Patent because it does not disclose the existence of both user data and

overhead in each of two memory devices. As such, argues Plaintiff, the ‘878 Patent cannot disclose

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“blocks of sectors,” or “two selected blocks including a first selected block located in a first

nonvolatile memory device and a second selected block located in a second nonvolatile memory

device.” Defendant asserts that Claim One of the ‘878 Patent states there is first “row portion” in

the first memory unit, and a second “row-portion” in the second memory unit, and Claim Six

specifies that “each of the said first and second portions includes storage space for overhead.” 

Plaintiff, however, correctly points out that Defendant reads Claim Six out of context. Read

properly, Claim Six merely discloses that both the first row-portion and the second row-portion are

capable of storing overhead. It does not state that each row-portion holds all of the overhead data

associated with its user data such that a complete sector - user data and overhead - is stored in each

of the two memory devices at the same time. 

Defendant also points to Figure 13 of the ‘878 Patent, which Plaintiff’s expert concedes

shows the error correction portion of a sector’s overhead data stored with its associated user data the 

first memory device, and a second sector of user data and its associated overhead data stored in the

second memory device at the same time. However, Plaintiff’s expert opines that Figure 13 depicts

storing only a portion of a sector’s overhead (the error correction information) with its associated

user data in the first memory device, but the rest of the associated overhead (e.g., flag information)

is stored in the second memory device. Since not all of the associated overhead is stored in the same

memory device as its associated user data, Plaintiff contends that the ‘878 Patent does not disclose

“sectors,” and consequently cannot disclose blocks of sectors in each memory device.

The ‘878 Patent itself bolsters Plaintiff’s position. “It is a further object of this invention to

store overhead information associated with two sectors in one of the two nonvolatile memory

semiconductor devices. ‘878 Patent, col. 3, lns. 64-67. The Patent later reiterates [e]ach nonvolatile

memory device is defined by a row of memory locations wherein corresponding rows of at least two

semiconductor devices maintain two sectors of information therein with the overhead information

relating to the two sectors maintained in one of the memory rows of the nonvolatile memory device. 

Id. at col. 4, lns. 25-31.

The Court finds that Plaintiff has offered sufficient evidence to create a triable issue as to 

whether the ‘878 Patent discloses both user data and overhead (i.e., a sector) in each of two memory

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devices. 

B. “Super Blocks”

Defendant argues that Figure 13 of the ‘878 Patent shows that it discloses a super block. 

More particularly, the ‘878 Patent describes a memory storage system comprised of “blocks” (“‘878

blocks”), “sub-blocks,” and “row-portions.” According to Figure 7 and its accompanying

description, the ‘878 memory bank includes a plurality of ‘878 blocks, each of which has a virtual

physical block address (“PVBA”). Each ‘878 block is comprised of a first sub-block of the first

flash memory chip and a second “sub-block” of the second flash memory chip. The corresponding

“sub-blocks” that comprise an ‘878 block are identified by the same PBA. Each ‘878 block also

contains a plurality of N memory row locations. (‘878 Patent, Figure 7 and col. 7, in. 66- col. 8, ln.

13.) Defendant contends that the ‘878 block corresponds to a ‘918 super block, a sub-block

corresponds to a ‘918 block, and a memory row location corresponds to a ‘918 sector. Further,

according to Defendant, the ‘878 patent discloses a correlation between the logical addresses

specified by the host, and physical addresses of the blocks in the flash chips, citing to Figure 8A of

the ‘878 Patent which exemplifies an LBA-PBA map used to translate a modified version of the host

provided LBAs to PBAs. Finally, Defendant point to the testimony of Ms. Petro Estakhri, a named

inventor on both the ‘878 and ‘918 Patents, to support its argument that the ‘878 block is the same

thing as a super block:

. . .the only problems with this is at the time that ’878 was filed, we

used the block, the word “block” for our super block because we

didn’t have a good term for it. Later on, that’s why in teh ‘879 we

started calling it super block because we realized it started to cause

confusion of what actual block is and what super block is. 

(Faragi Decl., Exh. Q at 545:10-17.) 

Addressing Mr. Estakhri’s testimony, Plaintiff contends that what Defendant offers is

incomplete, and fails to capture the distinction that Mr. Estakhri made between the blocks shown in

the ‘878 Patent, and the super blocks claimed in the ‘918 Patent. Plaintiff then cites to portions of

Mr. Estakhri’s deposition where he states that a block is correlated and a super block is not

correlated. 

A. Okay. A block is a physical, is one or more unit of erase, that’s

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block, which has one or more – each unit of erase has one or more

sectors. That’s the block between the flash

Q. And that’s a physical location within the flash.

A. Yes, it is, but it’s correlated to the group of LBAs.

Q. So a super block is one or more blocks – I’m sorry one or more

erasable units that’s correlated to LBAs?

A. To a group of LBAs.

(Nguyen Decl., Exh. B at 513:17-514:12.) The problem here is that Plaintiff offers no context for

this testimony. Although Plaintiff contends that Mr. Estakhri is discussing the distinction between

the ‘878 blocks, and the super block claimed in the ‘918 Patent, the testimony itself does not reveal

this. Mr. Estakhri may very well be taking about terminology used solely in the ‘918 Patent for all

the Court can tell. Even more problematic is that later in his deposition, as Defendants point out,

Mr. Estakhri states that the inventors used the term “block” in the ‘878 Patent in a way that was not

consistent with how that term is understood in the industry. As such, that Mr. Estakhri described

“block” as a unit of erase in his deposition does not necessarily evidence that he ascribed the same

definition to the term as used in the ‘878 Patent. According to his own testimony, he did not:

I said here [in the ‘878 Patent] block really means super block. At the

time we were doing this patent, we called it a block because we didn’t

have a better name for it. And later on we realized that using the same

terms as what really actually, the block in the actual industry is used,

we changed it to super block.

(Faragi Decl., Exh. Q at 54524-546:6.) 

Plaintiff also, however, contends that the ‘878 Patent does not disclose a super block such

that the two or more blocks comprising the super block have addresses that are correlated with a

group of logical block addresses. According to Plaintiff’s expert, the ‘878 Patent describes a

nonvolatile memory architecture in which two sub-blocks are identified by the same VPBA, and the

VPBA identifies a block within the memory bank. Plaintiff asserts that Defendant has failed to

identify anything in the ‘878 Patent that teaches the correlation between a group of logical addresses

and the VPBA.

The Court concludes that there is competing testimony over whether the ‘878 Patent

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discloses a super block. Defendant provides testimony from one of the named inventors of both the

‘878 and ‘918 Patents that indicates the ‘818 blocks are the same, or functionally the same as the

‘918 super block. Plaintiff, on the other hand, provides expert testimony that a grouping of sub

blocks using a single physical address does not meet the “super block” claim limitation since the sub

blocks do not have addresses that are correlated with a group of logical block addresses. In sum, the

Court concludes that there is a genuine issue of material fact as to whether the ‘878 Patent discloses

a super block as the Court has construed that term with respect to the ‘918 Patent.

IV. Dependant Claims 2, 4, 7-9, and 11-12 of the ‘918 Patent

Claims 2, 4, 7, 8, and 9 are all dependant from Claim 1. Since there are triable issues as to

whether Claim 1 is anticipated by the prior art, then there are necessarily triable issues as to whether

these dependant claims are also anticipated. Similarly, because Claims 11 and 12 are dependant on

Claim 10 and there are triable issues as to Claim 10, then there are triable issues as to Claims 11 and

12. As such, Summary Judgment of these claims is inappropriate.

CONCLUSION

For the foregoing reasons, the Court DENIES Defendant’s Motion for Summary Judgment.

IT IS SO ORDERED.

Dated: March 1, 2007 

MARTIN J. JENKINS

UNITED STATES DISTRICT JUDGE

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