Source: s3://data.kl3m.ai/documents/govinfo/USCOURTS/USCOURTS-cand-5_04-cv-02619/USCOURTS-cand-5_04-cv-02619-1/pdf.json

Nature of Suit Code: 400
Nature of Suit: State Reapportionment
Cause of Action: 35:145 Patent Infringement

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1 The parties dispute several other claim terms in the '736 patent, but this order addresses

only those limitations deemed dispositive by the parties and argued at the claim construction hearing.

CLAIM CONSTRUCTION ORDER REGARDING U.S PATENT NO. 6,466,736— C-04-02619 RMW

MAG

E-FILED on 9/9/05

IN THE UNITED STATES DISTRICT COURT

FOR THE NORTHERN DISTRICT OF CALIFORNIA

SAN JOSE DIVISION

ZORAN CORPORATION and OAK

TECHNOLOGY, INC.,

Plaintiffs,

v.

MEDIATEK, INC., MINTEK DIGITAL, INC.,

ASUSTEK COMPUTER, INC., LITE-ON

INFORMATION TECHNOLOGY CORP.,

TEAC CORPORATION, TEAC AMERICA,

INC., TERAPIN TECHNOLOGY PTE., LTD.

CORPORATION and TERAOPTIX L.P. d/b/a

TERAPIN TECHNOLOGY,

Defendants.

No. C-04-02619 RMW

No. C-04-04609 RMW

CLAIM CONSTRUCTION ORDER

REGARDING U.S PATENT NO. 6,466,736

[Re: Docket No. 237]

At issue is the construction of disputed terms used in U.S. Patent No. 6,466,736 ("the '736 patent").

Defendants and plaintiffs briefed the issues and presented evidence at a claim construction hearing on August

22-23, 2005. The court has read the moving and responding papers, including the patents-in-suit and the

relevant prosecutionhistory, considered the arguments of counsel, and nowconstrues the disputed terms inthe

claims.1 

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2

'736 patent: claims 1 and 7; '527 patent: claims 1-3; '440 patent: claims 1 and 14. 

CLAIM CONSTRUCTION ORDER REGARDING U.S PATENT NO. 6,466,736— C-04-02619 RMW

MAG 2

I. BACKGROUND

A. Factual Background

Plaintiffs Zoran and Oak are co-owners by assignment of several patents relating to controllers for

optical disk drives capable of playing both CDs and DVDs. The controller chips at issue are generally

incorporated into the circuit boards of optical disk storage devices; the circuit boards can then be

incorporated into standalone DVD players and recorders or CD/DVD players and recorders that are

installed in personal computers. Three of these patents, U.S. Patent No. 6,466,736, U.S. Patent No.

6,584,527, and U.S. Patent No. 6,546,440 are at issue in this case. This order construes claims in the

'736 patent, of which claims 1 and 7 are asserted in this action. 

The '736 patent is directed to controller architecture in an optical disk player that uses a unique

parallel interface and memory shared among subsystems responsible for processing both DVD and CD

data to facilitate the transfer of CD and DVD data from the controller to an MPEG decoder. Conventional

DVD/CD players used separate subsystems to process information read from CDs and DVDs because the

format received from each is different. Particularly, CD data would be processed by a system with its own

memory and its own decoder while DVD data would be processed by a separate system with its own

memory and decoder. Also, in the prior art, DVD data was transferred to external subsystems over a

parallel interface, while CD data was transferred to external subsystems over a serial interface, even though

internal processing for CD data was parallel. This difference in transfer format necessitated a parallel to

serial conversion for CD data for transmission to external systems that was not required for DVD data. 

The inventive controller claims a MPEG interface that transfers both CD and DVD data in parallel to the

MPEG decoder, eliminating the need for a separate serial interface for CD data. The resulting systems

occupy less space, have smaller pin counts, are less complex, and are cheaper to manufacture. 

B. Legal Background

The parties have been engaged in litigation before the International Trade Commission over

importation of devices allegedly infringing the '736 patent, Investigation No. 337-TA-506 ("the '506

investigation"). Plaintiffs asserted the same patents and claims as are asserted here.2 The parties, led by

Zoran for plaintiffs and MediaTek for defendants, engaged in a two-week trial before Administrative Law

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Judge Luckern determined all asserted claims were valid and the patents were enforceable. 

He also determined that the accused products infringed claim 3 of the '527 patent, but did not infringe any

of the other asserted claims (1, 2 of the '527 patent; 1, 7 of the '726 patent; 1, 14 of the '440 patent). 

CLAIM CONSTRUCTION ORDER REGARDING U.S PATENT NO. 6,466,736— C-04-02619 RMW

MAG 3

Judge Luckern at the ITC. He issued his Final Initial and Recommended Determinations in May 2005,

which include his construction of many of the terms at issue and his infringement, invalidity, and

enforceability analysis.3

II. ANALYSIS

The construction of patent claim terms is a matter of law for the court. Markman v. Westview

Instruments, Inc., 517 U.S. 370, 372 (1996) ("Markman II"). "It is a bedrock principle of patent law

that the claims of a patent define the invention to which the patentee is entitled the right to exclude." 

Innova/Pure Water, Inc. v. Safari Water Filtration Sys., 381 F.3d 1111, 1115 (Fed. Cir. 2004). As a

general rule, the claim language carries its ordinary and customary meaning. Toro Co. v. White Consol.

Indus., Inc., 199 F.3d 1295, 1299 (Fed. Cir. 1999). The ordinary meaning of a term cannot, however, be

construed in a vacuum; rather, a court "must look at the ordinary meaning in the context of the written

description and the prosecution history." Medrad, Inc. v. MRI Devices Corp., 401 F.3d 1313, 1319

(Fed. Cir. 2005). To ascertain the meaning of a claim term, the court refers to "those sources available to

the public that show what a person of skill in the art would have understood disputed claim language to

mean." Phillips v. AWH Corp., 415 F.3d 1303, 1314 (Fed. Cir. 2005) (en banc). The court does so to

"determine whether the inventor used any terms in a manner inconsistent with their ordinary meaning." 

Vitronics Corp. v. Conceptronics, Inc., 90 F.3d 1576, 1582 (Fed. Cir. 1996). The sources include "the

words of the claims themselves, the remainder of the specification, the prosecution history, and extrinsic

evidence concerning relevant scientific principles, the meaning of technical terms, and the state of the art." 

Phillips, 415 F.3d at 1314 (citing Innova, 381 F.3d at 1116). 

The court begins with the language of the claims. PSC Computer Prods., Inc. v. Foxconn Int'l,

355 F.3d 1353, 1359 (Fed. Cir. 2004). When considering the claim language, "the context in which a term

is used in the asserted claim can be highly instructive." Phillips, 415 F.3d at 1314. The court may also

consider the other claims of the patent, both asserted and unasserted. Id. For example, as claim terms are

normally used consistently throughout a patent, the usage of a term in one claim may illuminate the meaning

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4 The Federal Circuit noted the following deficiencies in extrinsic evidence: (1) extrinsic

evidence is not part of the patent and does not have the virtue of being created at the time of patent

prosecution for the purpose of explaining the patent's scope and meaning; (2) extrinsic publications may not

be written by or for skilled artisans and therefore may not reflect the understanding of a person of skill in the

field of the patent; (3) expert reports and testimony "is generated at the time of and for the purpose of

CLAIM CONSTRUCTION ORDER REGARDING U.S PATENT NO. 6,466,736— C-04-02619 RMW

MAG 4

of the same term in other claims. Id. The court may also consider differences between claims to guide in

understanding the meaning of particular claim terms. Id.

As the claims do not stand alone, they "must be read in view of the specification, of which they are

a part." Phillips, 415 F.3d at 1315 (citing Markman v. Westview Instruments, 52 F.3d 967, 979 (Fed.

Cir. 1995)). "The construction that stays true to the claim language and most naturally aligns with the

patent's description of the invention will be, in the end, the correct construction." Renishaw PLC v.

Marposs Societa' per Azioni, 158 F.3d 1243, 1250 (Fed. Cir. 1998). When the specification reveals a

special definition given to a claim term by the patentee that differs from the meaning it would otherwise

possess, the inventor's lexicography governs. Phillips, 415 F.3d at 1316 (citing CCS Fitness, Inc. v.

Brunswick Corp., 288 F.3d 1359, 1366 (Fed. Cir. 2002)). The specification may reveal an intentional

disclaimer, or disavowal, of claim scope by the inventor. Id. (citing SciMed Life Sys., Inc. v. Advanced

Cardiovascular Sys., Inc., 242 F.3d 1337, 1343-44 (Fed. Cir. 2001)). 

The Federal Circuit also reaffirmed the importance of the prosecution history. Phillips, 415 F.3d

at 1317. The prosecution history represents an ongoing negotiation between the PTO and the applicant. 

Id. The prosecution history, like the specification, "provides evidence of how the PTO and the inventor

understood the patent." Id. (citing Lemelson v. Gen. Mills, Inc., 968 F.2d 1202, 1206 (Fed. Cir. 1992)). 

However, it is subject to inherent ambiguity because is represents the negotiation, rather than the final

product of the negotiation, and is thus less useful than the specification. Id.

Extrinsic evidence "can shed useful light on the relevant art," but the Federal Circuit considers it

"less significant than the intrinsic record in determining 'the legally operative meaning of claim language.'" Id.

(citing C.R. Bard, Inc. v. U.S. Surgical Corp., 388 F.3d 858, 862 (Fed. Cir. 2004)). "Extrinsic evidence

may be useful to the court, but it is unlikely to result in a reliable interpretation of patent claim scope unless

considered in the context of the intrinsic evidence." Id. at 1319. The Federal Circuit has held that it

remains within the court's discretion to admit extrinsic evidence, provided the court keeps in mind the flaws

inherent in extrinsic evidence. Id.4

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litigation and thus can suffer from bias that is not present in intrinsic evidence"; and (4) the "universe of

potential extrinsic evidence of some marginal relevance that could be brought to bear on any claim

construction question" is vast and parties will naturally choose the pieces of extrinsic evidence most

favorable to its cause, "leaving the court with the considerable task of filtering the useful extrinsic evidence

from the fluff." Phillips, 415 F.3d at 1318.

CLAIM CONSTRUCTION ORDER REGARDING U.S PATENT NO. 6,466,736— C-04-02619 RMW

MAG 5

A. "Coupled"

1. Proposed Constructions

Plaintiffs assert that "coupled" should be construed as "two things being connected in some way so

that information can be transferred from one to the other." Plaintiffs' '736 Br. at 7. Plaintiffs assert that this

is the ordinary meaning of the word. Id. Defendants, on the other hand, assert that "coupled" should have

a much narrower construction. Defendants' '736 Br. at 8-9. They propose that "coupled" be construed to

mean "directly connected via signal lines, busses, and/or multiplexers." Id. at 8. Defendants contend that

the types of components that must be used to accomplish the coupling claimed are those which "allow for

the flow of digital data without it being subject to an operation or processing step that would cause a state

change in that digital data." Id.

2. Claim Language

The word "coupled" appears in the preambles of claims 1 and 7 and in several other places in the

bodies of the two claims. In claim 1, "coupled" is used in the following six ways: "a controller coupled with

a MPEG decoder" ('736 patent at 10:43-44); "a first signal processor coupled to the read channel

subsystem" (id. at 10:50-51; "a second signal processor coupled to the read channel subsystem", (id. at

10:56-57); "a read first-in-first-out buffer coupled to a memory data input register" (id. at 11:4-5); "a write

first-in-first-out buffer coupled to a memory data output register", (id. at 11:6-8); and "a single memory cell

coupled to the memory data output register and the memory data input register" (id. at 11:8-10). In claim

7, "coupled" is used in the following three ways: "a signal processor coupled to the read channel subsystem"

(id. at 13:3-4); "a memory subsystem that includes a single memory cell coupled to the signal processor"

(id. at 13:17-18); and "a parallel interface coupled to the MPEG FIFO interface" (id. at 13:24). In claim 5,

which is not asserted in this action, "coupled" is used as follows: "a write first-in-first-out (FIFO) buffer, a

read first-in-first-out (FIFO) buffer coupled to the error code correction and detection subsystem" (id. at

12:7-10).

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CLAIM CONSTRUCTION ORDER REGARDING U.S PATENT NO. 6,466,736— C-04-02619 RMW

MAG 6

To support the construction of the term "coupled" as meaning "two things being connected in some

way so that information can be transferred from one to the other," plaintiffs contend that "coupled" is used

to describe different types of connections in the claims. They point to the numerous examples of

connections designated as "coupled" some involving two items directly coupled, others apparently

designating as "coupled" items that are separated by an intervening component. Plaintiffs' '736 Br. at 7. By

contrast, defendants argue that the claims clearly refer to two components as "coupled" only if they are

directly connected via signal lines, busses, and/or multiplexers in such a way that no operation or processing

step occurs that changes the state of the digital data. Defendants' '736 Br. at 8.

3. Specification

Defendants argue that the specification, like the claims, refers to two components as "coupled" only

if they are directly connected via signal lines, busses, and/or multiplexers such that no state change occurs in

the digital data. Id.; see '736 patent at Fig. 1 & 1:35-52, Fig. 2 & 5:8-26, Fig. 4 & 6:40-55. Plaintiffs,

however, argue that defendants are impermissibly imposing limitations from the specification into the claims,

particularly with respect to the portion of defendants' proposed construction that requires no state change

between two coupled components. '736 Reply at 3. In support of their own proposed construction,

plaintiffs argue that "coupled" is merely used in the '736 patent to describe a connection between two

different components in the system. Plaintiffs' '736 Br. at 7. 

Plaintiffs cite two examples they contend serve to rebut any requirement that components and

systems must be directly connected to be coupled. They first note that claim 7 refers to "a memory

subsystem that includes a single memory cell coupled to the signal processor . . . ." Second, based on the

claim language in claim 7, they argue that the signal processor in Fig. 5 is connected to the single memory

cell but only through multiple intervening components, namely elements 98 and 100, the write FIFO 108,

and MDRO 112. 

The court reads claim 7 as denoting that the memory subsystem is coupled to the signal processor,

i.e., "a memory subsystem that includes a single memory cell coupled to the signal processor." The

single memory cell is appropriately read as a component included within the memory subsystem of claim 7,

not a component to which the signal processor is connected. Read appropriately, the single memory cell is

not coupled to the signal processor, rather, the memory subsystem (that includes a single memory cell) is

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CLAIM CONSTRUCTION ORDER REGARDING U.S PATENT NO. 6,466,736— C-04-02619 RMW

MAG 7

coupled to the signal processor, another subsystem. 

However, even with the court's reading of the limitation, Fig. 5 illustrates the memory system 102 is

coupled to the signal processors 92 and 94 via additional elements 98 and 100 located between the

memory subsystem and the signal processors. 98 and 100 are described in the specification as

multiplexors, neither of which is an intervening subsystem. However, they are components between the

subsystems. Thus, the subsystems are not directly connected to one another without intervening

components – intervening components exist between the subsystems. 

Under defendants' proposed construction, multiplexors are permissible components between

"coupled" elements because, so long as no state change occurs in the digital data, multiplexors are merely

connective elements. Defendants' proposed construction, however, is too narrow, as it specifies the nature

of the connective elements and adds a requirement for "no state change" found nowhere in the claims or

specification, thereby introducing limitations not expressly called for in the specification. The court is,

however, also concerned that the plaintiffs' proposed construction is overly broad and that under plaintiffs'

proposed construction, every pair of subsystems would be considered "coupled", independent of location,

function, or relation to each other. Thus, it finds another construction to be appropriate.

The specification and claims designate specific subsystems as being "coupled" when they are

directly connected in both prior art and the preferred embodiment, see, e.g., '736 patent at 1:49-50, 2:26,

5:24, 6:49, 6:51, 6:52 & claim 1, 2; they designate specific components as being "coupled" when they are

directly connected, id. at 2:32 & claim 1, 2; and they designate specific components connected to

subsystems as being "coupled" when they are directly connected, id. at 2:24, 2:38 & claim 5. Thus, the

court adopts neither party's construction and construes "coupled" as describing a direct connection,

specifically, a connection between subsystems without intervening subsystems, a connection between

components without intervening components, and a connection between components and subsystems

without any intervening components.

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5 MPEG is a set of audio and video data compression formats and ancillary standards.

(MPEG is an acronym for the 'Moving Picture Experts Group', officially ISO/IEC JTC1/SC29 WG11.) 

6 Defendants assert their proposed construction of "MPEG decoder" with the following

background interpretation: 1) claims 1 and 7 claim a controller with discrete subsystems that perform frontend operations on MPEG-encoded data of two formats, and 2) the controller transfers that data to a

separate MPEG decoder. 

CLAIM CONSTRUCTION ORDER REGARDING U.S PATENT NO. 6,466,736— C-04-02619 RMW

MAG 8

B. MPEG Decoder5

1. Proposed Constructions

Plaintiffs assert that "MPEG decoder" should be construed as "hardware and/or software that can

decode compressed data in accordance with any of the standards established by the Moving Picture

Experts Group." Plaintiffs' '736 Br. at 8. According to plaintiffs, an MPEG decoder can be used, if

desired, to process audio or video data independently. Id. at 9. Plaintiffs contend that there is no reason to

impose any additional limitations on their proposed construction of "MPEG decoder." Id. at 8.

Defendants, by contrast contend that an "MPEG decoder" must be capable of separating and

decoding both audio and video MPEG data according to MPEG standards. Defendants' '736 Br. at 6.6

Defendants assert that the MPEG decoder has three primary functional blocks: a demultiplexer, a MPEG

audio decoder, and a MPEG video decoder. Id. Defendants propose that "MPEG decoder" should be

construed as "an integrated circuit that decompresses, separates, and further processes the corrected audio

and video data that is received from an external controller according to the MPEG specifications." Id. 

Defendants contend this is how "MPEG decoder" would have been understood by a person skilled in the

art at the time of the '736 patent application. Id.

The parties additionally dispute whether the MPEG decoder must be separate from and external to

the controller. Defendants argue that the plain language of the claims requires the controller to be separate

and distinct from the MPEG decoder. In support of this argument, defendants note that the "controller [is]

coupled with a MPEG decoder" (emphasis added) and that the parallel interface, which is part of the

controller, transfers data to the MPEG decoder. Id.; see '736 patent at Claims 1, 7. Defendants reason

that the terms "coupled with" and "transfers data to" are used only between subsystems – in this case, the

controller and MPEG decoder – that are separate and distinct. Defendants' '736 Br. at 7. Plaintiffs object

to defendants' interpretation of the claim language, contending that there is no textual hook in the claims, as

required by plaintiffs' reading of NTP, Inc. v. Research in Motion, Ltd., ___ F.3d ___, 2005 WL 180612

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CLAIM CONSTRUCTION ORDER REGARDING U.S PATENT NO. 6,466,736— C-04-02619 RMW

MAG 9

at *21 (Fed. Cir. 2005), that would justify construing the MPEG decoder to be separate and distinct from

the controller. Reply at 2-3.

2. Claim Language

"MPEG decoder" appears in claims 1 and 7 in two contexts: 1) "a controller coupled with a MPEG

decoder" in the preamble and 2) "the parallel interface configured to transfer the corrected data to the

MPEG decoder." '527 patent at 10:42-43, 11:12-14; see also id. at 13:3-4, 13:24-26 ("a parallel

interface coupled to the MPEG FIFO interface compromising a plurality of parallel data lines for

transferring the corrected data to the MPEG decoder").

Plaintiffs assert that the claim language requires only that the MPEG decoder and the controller be

coupled and that they be connected through a "parallel interface . . . [that] comprises a plurality of parallel

data lines . . . ." Plaintiffs' '736 Br. at 9-10. Consequently, plaintiffs conclude that even if the blocks for the

controller functions are connected within either a single system or a circuit integrated to the blocks

performing the MPEG decoding, those blocks are still "coupled." Id. at 10. Plaintiffs argue that

defendants' construction requiring that the MPEG decoder be external to the controller and that the MPEG

decoder be separate is not found in the claims. Plaintiffs also contend that the defendants' requirement that

the MPEG decoder process both audio and video information is likewise not found in the claims. Id. at 9. 

3. Specification

In support of their proposed construction that the controller is separate and distinct from the MPEG

decoder, defendants contend that the specification identifies the MPEG decoder as an "external subsystem"

from the controller. Defendants' '736 Br. at 7; see '736 patent at 3:24-35. Defendants assert that the '736

patent shows that the controller is separate and distinct from the MPEG decoder. Defendants' '736 Br. at

7; see '736 patent at Figs. 1, 2, 4-6. According to defendants, the specification repeatedly refers to a

transfer of data from the controller to the MPEG decoder. Defendants' '736 Br. at 7; see '736 patent at

4:2-6, 5:1-4, & Fig. 6. Lastly, defendants argue that the '736 patent specification does not enable a

MPEG decoder that is integrated into a controller in part because the specification contains no disclosure as

to how to integrate the controller and a MPEG decoder. Defendants' '736 Br. at 8. 

Plaintiffs, on the other hand, argue that defendants' construction directly contradicts the teaching of

the patent specification that the invention permits the MPEG decoder and the controller to be integrated

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CLAIM CONSTRUCTION ORDER REGARDING U.S PATENT NO. 6,466,736— C-04-02619 RMW

MAG 10

and combined. Plaintiffs argue that the specification supports their construction that the MPEG decoder

need not necessarily be external to the controller. Plaintiffs point out that the specification repeatedly sets

forth that "[d]ue to the simplified MPEG interface, DVD/CD controller 62 may also be easily integrated into

MPEG decoder 40." Plaintiffs' '736 Br. at 9; Reply at 2; see also '736 patent at 4:21-23, 5:58-60, 9:7-9.

Defendants, like plaintiffs, point to the specification to support their construction of "MPEG

decoder." Defendants essentially argue that, in conformance with the understanding of one of skill in the art

when the patent application was filed, the MPEG decoder must be capable of decoding both audio and

video data and thus that the specification supports the construction that the MPEG decoder be

implemented in the three functional blocks set forth above: a demultiplexing function, audio decompression

function, and video decompression function. In the Background of the Invention, the '736 patent

specification states that the MPEG decoder decompresses and separates compressed audio and video

data. '736 patent at 2:44-51; see also id. at 3:25-35. Defendants contend that this statement, combined

with the MPEG specification available at the time the patent was filed, discussed below, confirms their

proposed construction. Plaintiffs, however, assert that those passages of the patent description refer to a

particular MPEG decoder in the preferred embodiment and do not expressly or implicitly identify its

configuration as a limitation of the claims. Reply at 1.

4. Extrinsic Evidence: MPEG Industry Specifications 

Defendants' contention that the MPEG decoder must be implemented in three functional blocks

relies upon consideration of two industry specifications: one for MPEG-1, International Standard,

ISO/IEC 11172-1, MTK-ITC 396579-638, dated August 1, 1993; and another for MPEG-2,

International Standard, ISO/IEC 13818-1, MTK-ITC-396244-377, dated April 15, 1996. Those

industry specifications describe a prototypical MPEG decoder design. That prototypical decoder design

includes functional blocks for demultiplexing a bitstream containing both audio and video information and

functional blocks for decompressing both audio and video information. However, both specifications make

it clear that "[t]he prototypical decoder design does not imply any normative requirement for the design of

an [MPEG-1 or MPEG-2] decoder." 

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7 There are presently multiple MPEG encoding formats: MPEG-1, MPEG-2, MPEG-4,

MPEG-7, MPEG-21, etc.

CLAIM CONSTRUCTION ORDER REGARDING U.S PATENT NO. 6,466,736— C-04-02619 RMW

MAG 11

An MPEG decoder in the abstract, in light of the MPEG specifications, does not require support

for a specific encoding7 nor specify the type of data represented by the encoded bitstream. Defendants'

argument that the construction of MPEG decoder must imply a particular construction in three distinct

modules is unpersuasive, as the claims do not require a specific MPEG decoder implementation and the

MPEG industry specifications do not mandate the construction advanced by the defendants. The presence

in the specification of a reference to a preferred embodiment of an MPEG decoder that decodes both

audio and video data does not itself limit the construction of an MPEG decoder to require both data types. 

However, when viewed in light of the purpose of the invention, the court concludes that the MPEG decoder

must at least decode both compressed audio and video data. The Federal Circuit has held that the purpose

of the invention may guide claim construction since "the problem the inventor was attempting to solve, as

discerned from the specification and prosecution history, is a relevant consideration" in construing claims.

CVI/Beta Ventures, Inc. v. Tura LP, 112 F.3d 1146, 1160 (Fed. Cir. 1997). The specification states

that "[a]ccording to one aspect of the present invention, the DVD/CD controller includes a unique MPEG

interface which facilitates transfer of CD data and DVD data from the DVD/CD controller to a MPEG

decoder . . . ." '736 patent at 4:2-5. The undisputed purpose of the invention is to provide streamlined

processing of both CD and DVD data. Thus, the court construes MPEG decoder to mean "hardware

and/or software that can decode compressed audio and video data in accordance with any of the standards

established by the Moving Picture Experts Group." The court also concludes that the MPEG decoder need

not necessarily be external to the controller.

C. Parallel Interface

1. Proposed Constructions

The parties agree that the construction of "parallel interface" must contain a "plurality of parallel data

lines." Reply at 13. The parties, however, appear to have two main disputes regarding the construction of

"parallel interface": (1) whether there can only be a single set of parallel data lines, and (2) whether serial

and ATAPI data lines are excluded. Plaintiffs propose that "parallel interface" be construed as a plurality of

parallel data lines that act as the interface for transferring corrected data to the MPEG decoder. Plaintiffs'

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CLAIM CONSTRUCTION ORDER REGARDING U.S PATENT NO. 6,466,736— C-04-02619 RMW

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'736 Br. at 22. Plaintiffs also assert that the claimed "parallel interface" excludes serial and ATAPI

interfaces. Defendants appear to dispute this construction. Defendants construe "parallel interface" to

mean a single parallel interface that 1) receives both the first or CD format and the second or DVD format

corrected data on a parallel bus, 2) comprises a plurality of parallel data lines, and 3) transfers both the first

or CD format and the second or DVD format corrected data to the MPEG decoder. Defendants' '736

Br. at 23-24; see '736 patent at 4:2-6, 4:24-30, 9:12-16, Schwartz Decl., Ex. B at ZC000221, 000246,

000338. 

2. Claim Language

Claims 1 and 7 include a "parallel interface" limitation in the respective contexts of "a parallel

interface that receives the corrected data on a parallel bus interface . . ." and "a parallel interface coupled to

the MPEG FIFO interface . . . ." '736 patent at 11:11-12, 13:26.

Plaintiffs assert that the claims require the parallel interface to transmit two formats (first format and

second format for claim 1; CD and DVD data for claim 7) of information to the MPEG decoder but that

the claim language does not require that only a single parallel interface be present. Plaintiffs' '736 Br. at 22. 

Defendants, however, construe the parallel interface to be a single parallel interface over which all

communications to the MPEG decoder pass. In response, plaintiffs reason that Phillips prevents

defendants from importing the limitation of a single parallel interface since the term "single" is absent from

the claims. Id.

Plaintiffs further contend that although the claims contain no other specific limitations on the precise

nature of the parallel interface, the ATAPI and serial data interfaces are disclaimed or outside the scope of

the claims in light of particular statements in the specification and file history. Id.

3. Specification

In support of their assertion that ATAPI and serial data interfaces are outside the scope of the

claims, plaintiffs note that columns 1 though 3 of the specification, which discuss the prior art, state that CD

data in a conventional playback system was transferred to the MPEG decoder over the single data line of a

serial interface. Id.; '736 patent, col. 2:27-30, col. 3:24-35. In the prior art, a conventional DVD player

transferred data to the MPEG decoder over a parallel interface. Plaintiffs' '736 Br. at 22; '736 patent at

3:36-38. The specification then states: 

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CLAIM CONSTRUCTION ORDER REGARDING U.S PATENT NO. 6,466,736— C-04-02619 RMW

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Therefore, in conventional DVD/CD playback systems, the MPEG

decoder normally has to support an 8-bit parallel interface for DVD and a

serial interface for CD. The 8-bit parallel to serial conversion at CD

controller and the serial to parallel conversion at MPEG decoder not only

pose an unnecessary overhead in hardware for the playback system, but

also requires an 8-times higher transfer rate for the serial interface [in order

to keep pace with the parallel interface]. Thus, a new transfer protocol

which eliminates the serial interface associated with traditional CD-DSP

controllers is desired.

Plaintiffs' '736 Br. at 22-23; '736 patent 3:38-45. Based on this specification language, plaintiffs assert that

the parallel interface of the claimed invention must exclude the conventional serial CD interface of the prior

art since the patent specifically solves the problem of providing a single type of interface – parallel only

versus both serial and parallel. 

To further demonstrate that the ATAPI and serial data interfaces are disclaimed, plaintiffs point out

that the "Summary of the Invention" section of the '736 patent states that "[a]ccording to one aspect of the

present invention, the DVD/CD controller includes a unique MPEG interface which facilitates transfer of

CD data and DVD data from the DVD/CD controller to a MPEG decoder using a parallel interface," and

that "[t]he parallel MPEG interface eliminates parallel-to-serial and serial-to-parallel conversion overhead

problems associated with conventional DVD/CD playback systems. The parallel interface also obviates the

need to transfer information at higher rates as in conventional DVD/CD playback systems." Plaintiffs' '736

Br. at 23; '736 patent 4:2-6, 24-30. Given this language in the '736 patent, plaintiffs conclude that the

parallel interface must also avoid the need to convert CD data from parallel to serial for purposes of

sending it to the MPEG decoder. Plaintiffs' '736 Br. at 23. 

Plaintiffs also assert that defendants err in arguing that the claimed parallel interface does not

exclude an ATAPI interface. Id. Plaintiffs allege that the specification repeatedly and at length discusses

the disadvantages of the ATAPI interface and distinguishes the invention over ATAPI. Id.; '736 patent,

2:41-63, 4:16-19, 8:41-56. According to plaintiffs, the elimination of ATAPI is one of the stated goals of

the invention. Reply at 14; '736 patent at 4:16-19. Lastly, plaintiffs cite to Scimed Life Sys., Inc. v.

Advanced Cardiovascular Sys., Inc. 242 F.3d 1337, 1342-43 (Fed. Cir. 2001) and Phillips, 415 F.3d

at 1325, in support of their argument that by discussing the advantages of prior art and distinguishing the

claimed invention over the prior art, a patentee excludes that prior art from the scope of the claims. Reply

at 14. Plaintiffs contend that such exclusion occurred here. Id. 

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CLAIM CONSTRUCTION ORDER REGARDING U.S PATENT NO. 6,466,736— C-04-02619 RMW

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To rebut plaintiffs' interpretation that the parallel interface excludes an ATAPI interface, defendants

contend that, although the specification notes that the invention eliminates the need for an ATAPI interface,

nothing in the claims or specification disclaims an ATAPI interface. Defendants' '736 Br. at 24. The court

finds defendants' argument to be unpersuasive. The specification clearly disclaims serial and ATAPI

interfaces. Indeed, as plaintiffs correctly point out, one purpose of the invention was to eliminate the need

for such interfaces, such that two different formats of data could be transmitted over a single type of parallel

interface.

In support of their proposed construction that there can only be a single parallel interface that

transfers corrected data to the MPEG decoder, defendants note that the specification provides that "MPEG

interface 104 reads CD or DVD data directly from memory subsystem 102 on to a single parallel bus and

forwards the data via the parallel bus to MPEG decoder 40 using proper handshaking. In a specific

embodiment, MPEG interface 104 provides a 8-bit parallel interface to MPEG decoder 40." Defendants'

'736 Br. at 23; '736 patent at 9:11-16. 

4. Prosecution History

To demonstrate that a parallel interface is a single parallel interface, defendants note that applicants

repeatedly argued during the prosecution that a critical advantage that distinguished the patent over the

prior art was that the prior art required two interfaces to transfer data to the MPEG decoder, while the

invention required a single interface. Defendant's '736 Br. at 23; see ZC000221, ZC000247, ZC000338. 

Rebutting defendants' use of the prosecution history, plaintiffs contend that during the prosecution,

the applicants distinguished the claimed parallel interface over prior art. Reply at 13. According to

plaintiffs, applicants stated that all of the prior art taught that two types of interfaces needed to be used – a

serial interface for CD data and a parallel interface for DVD data. Id.; see Schwartz Decl., Ex. B at

ZC000339, 000230. 

The court finds that the plain meaning of a parallel interface is an interface which transfers data over

multiple channels simultaneously. This is in contrast to a serial interface, which uses a single data channel to

transfer data. The plain meaning does not require a specific number of data channels, only that there are

more than one. The parties agree that the construction includes a "plurality of data lines." With regard to

their contentions that involve differing proposed additional limitations, the court finds that defendants'

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CLAIM CONSTRUCTION ORDER REGARDING U.S PATENT NO. 6,466,736— C-04-02619 RMW

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argument that there must be a single parallel interface over which all communications pass is not supported

by the claim language, as there is no limiting language requiring only one instance of the parallel interface. 

Plaintiffs' argument that the specification disclaims ATAPI and serial data interfaces for transferring

corrected data to the MPEG decoder as part of the parallel interface is persuasive, as the invention of a

parallel interface to provide an alternative to the serial and ATAPI data interfaces is a key innovation in the

'736 patent. This constitutes a sufficiently clear disclaimer of claim scope by the inventor. Phillips, 415

F.3d at 1316 ("the specification may reveal an intentional disclaimer, or disavowal, of claim scope by the

inventor"). Thus, the court construes "parallel interface" to mean "a plurality of data lines that transmit both

formats of information to the MPEG decoder." ATAPI and serial data interfaces are not within the scope

of "parallel interface." 

D. "Subsystem"

1. Proposed Constructions

Defendants claim that "subsystem" should be construed to mean "an interconnected combination of

a set of related components or circuits to form a subdivision of a system." Defendants' '736 Br. at 9. 

Specifically, defendants contend that the claimed subsystems of the '736 patent each perform a particular

function or functions by receiving signals, processing those signals, and outputting the processed signals. Id.

On the other hand, plaintiffs assert that "subsystem" need not be separately construed at all. If

construction of the term is required, however, plaintiffs argue that it should be construed according to its

plain and ordinary meaning of "a portion of a larger system." Plaintiffs' '736 Br. at 10. Plaintiffs further

assert that a "subsystem" may be formed out of a collection of circuits and/or functional blocks. Id. In that

case, plaintiffs argue that each of the claimed subsystems would describe its own particular set of

limitations, and the term "subsystem" would refer only to the collection of circuits that perform the specified

functions. Id. 

To clarify the difference between plaintiffs' and defendants' proposed constructions of "subsystem,"

plaintiffs explain that they do not attempt to construe "subsystem" in the abstract because it is always used in

connection with additional language describing the type of subsystem being claimed. Reply at 4. Instead,

plaintiffs assert that the context in which "subsystem" is used should be the basis for assigning a meaning to

the term. Id.

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CLAIM CONSTRUCTION ORDER REGARDING U.S PATENT NO. 6,466,736— C-04-02619 RMW

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Both parties contend that their construction comports with the ordinary meaning of the term. 

Plaintiffs assert that the plain and ordinary meaning of "subsystem" is their proposed construction of "a

portion of a larger system." Plaintiffs' '736 Br. at 10. Defendants, on the other hand, assert that the

ordinary meaning of "subsystem" is their proposed construction of "an interconnected combination of a set

of related components or circuits to form a subdivision of a system." Defendants' '736 Br. at 9. Standing

alone, neither assertion is persuasive.

2. Claim Language

Claims 1 and 7 utilize "subsystem" in the following three phrases: "read channel subsystem," "error

code correction and detection subsystem," and "memory subsystem." 

In support of plaintiffs' proposed construction of "subsystem" as "a portion of a larger system,"

plaintiffs argue that claims 1 and 7 always use "subsystem" in connection with additional language describing

the type of subsystem being claimed, for example, "read channel subsystem." "error code correction and

detection subsystem," and "memory subsystem." Plaintiffs' '736 Br. at 10. Defendants, however, argue

that the claim language demonstrates that the claimed subsystems of the '736 patent each perform a

particular function or functions by receiving signals, processing those signals, and outputting the processed

signals. Defendants' '736 Br. at 9. 

3. Specification

In support of defendants' proposed construction of "subsystem" as an "interconnected combination

of a set of related component or circuits to form a subdivision of a system," defendants assert that the

specification identifies the need to increase efficiency by making the processing subsystems "less complex,

occupy less real estate (i.e., use less silicon resulting in smaller dies), have a smaller pin count, make

efficient use of memory and processing resources, and be cheaper to manufacture than conventional

playback systems." Id. at 10; '736 patent at 3:50-58. Defendants contend that the specification confirms

that the claimed subsystems of the '736 patent each perform a particular function or functions by receiving

signals, processing those signals, and outputting the processed signals. Defendants' '736 Br. at 9. 

To refute plaintiffs' proposed construction that "subsystem" should be interpreted to mean "a

portion of a larger system," the defendants contend that the specification identifies a problem of separate

subsystems in the prior art that "occupy valuable real estate in the playback system and as a whole make

the playback system bulky and expensive." Id.; '736 patent at 3:8-23. Defendants further contend that the

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8 The parties do not contest that claims 1 and 7 use the phrase "error code correction and

detection subsystem" even though the process carried out by that subsystem is generally described as "error

correction and detection." Plaintiffs' '736 Br. at 14; Defendants' '736 Br. at 12-14. The parties further

agree that "error code correction and detection" is abbreviated as "ECC" in the patent and that this

abbreviation is common for systems that perform error correction and detection. Id. at 14-15, n. 7. 

CLAIM CONSTRUCTION ORDER REGARDING U.S PATENT NO. 6,466,736— C-04-02619 RMW

MAG 17

specification states that this separate-subsystem problem "results in inefficient use of system processing and

memory resources and hinders efficient sharing of distributed resources." Defendants' '736 Br. at 9-10;

'736 patent at 3:8-23. 

It would appear that by their proposed construction, defendants are attempting to define a

particular level of integration of components making up a subsystem claimed in the '736 patent. The

imposition of such limitations is not warranted by the intrinsic evidence. The court concludes that, because

"subsystem" is always used in the claims to refer to the collection of circuits that performs a function

specified in the claim, "subsystem" does not require separate construction.

E. "Error Code Correction And Detection (ECC) Subsystem"

1. Proposed Constructions

Plaintiffs' proposed construction of "an error code correction and detection subsystem" or "ECC

subsystem" is "a portion of a larger system that performs error correction and detection." Plaintiffs' '736 Br.

at 14. Defendants, however, propose that "error code correction and detection subsystem" should be

construed according to it its ordinary meaning, which they contend is: "one subsystem that performs all

error correction and detection on two different formats of processed data, such as CD and DVD format

processed data, according to applicable standards or specifications, to produce corrected data which is to

be transferred to a MPEG decoder." Defendants' '736 Br. at 12. Thus, the main dispute between the

parties is whether there is one subsystem that utilizes the same circuitry to perform all error correction and

detection on two different formats of processed data, or whether the claim supports multiple error

correction and detection subsystems.

2. Claim Language8

Defendants contend that the claims require that the ECC subsystem perform error correction and

detection on the processed data to produce corrected data, which is transferred by the parallel interface to

the MPEG decoder. Defendants' '736 Br. at 12. Furthermore, as mentioned earlier, defendants assert that

the ordinary meaning of the claims requires their proposed construction of "ECC subsystem" as "one

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9 Plaintiffs argue that the '736 patent at 3:66-4:15 contradicts defendant's narrow

construction because that embodiment's error code correction and detection operations are not associated

with any standards although that embodiments's sync detection and demodulation for CD and DVD data

are described with reference to standards. Reply at 6. Plaintiffs also contend that Figure 4 does not limit

the invention because the specification states that Figure 4 depicts "an embodiment of DVD/CD controller

62." Id.; see '736 patent at 6:40-41. Lastly, plaintiffs assert that the'736 patent at Figure 5, 7:38-8:1, and

8:15-18 relate to the embodiment of Figure 4 as signified by the reference numeral "96" used for the ECC

subsystem. Reply at 6. 

CLAIM CONSTRUCTION ORDER REGARDING U.S PATENT NO. 6,466,736— C-04-02619 RMW

MAG 18

subsystem that performs all error correction and detection on two different formats of processed data, such

as CD and DVD format processed data, according to applicable standards or specifications, to produce

corrected data which is to be transferred to a MPEG decoder." Id.; '736 patent at Figs. 4 & 5, 3:62-4:15,

4:30-35, 8:15-26.9

On the other hand, plaintiffs assert that because the claims use the transitional term "comprising"

with the indefinite article "an," the article "an" is an open-ended claim limitation meaning "at least one." 

Scanner Tech. Corp. v. Icos Vision Sys. Corp., 365 F.3d 1299, 1304 (Fed. Cir. 2004); Crystal

Semiconductor v. Tri Tech Microelectronics Int'l, Inc., 246 F.3d 1336 (Fed. Cir. 2001). To rebut

plaintiff's claim that "an" is an open-ended claim limitation, defendants contend that their construction is not

based on the term "an." Defendants' '736 Br. at 13, n.12. 

d. Specification

Citing to '736 patent specification at 3:8-23 and 3:50-58, defendants argue that there can only be

one ECC subsystem because the claimed benefit of the patent in reducing the number of subsystems would

not be accomplished under plaintiffs' assertion that the claims allow for multiple ECC subsystems. Id. 

Plaintiffs, however, assert that neither of the passages cited by defendants nor any other passage in the

specification attributes the claimed benefit in reducing the number of subsystems to the ECC subsystem. 

Reply at 6. According to plaintiffs, the patent instead identifies the shared memory and parallel interface as

permitting a reduction in number of subsystems. Id.; see '736 patent at 4:30-39, 8:47-56, 9:7-11; 10:12-

16. 

According to defendants, the specification further supports their construction of "ECC subsystem"

because it requires one ECC subsystem that is responsible for performing error detection and correction for

both CD and DVD data. Defendants' '736 Br. at 12; see '736 patent at 7:38-39 ("ECC subsystem 96 is

responsible for performing error detection and correction for both CD and DVD data"). Plaintiffs, on the

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other hand, argue that the specification does not support defendants' construction. Plaintiffs' '736 Reply Br.

at 6; see '736 patent at 3:66-4:15, 6:40-41, 7:38-8:1, 8:15-18, Figs. 4 & 5. 

e. Extrinsic Evidence

Defendants contend that inventor testimony supports their contention that the ordinary meaning of

error code correction and detection subsystem requires one subsystem that performs all error correction

and detection on two different formats of processed data. Inventor Hsu, who was responsible for the error

code correction and detection subsystem, testified that his invention combined the error correction for CD

data and DVD data into a single subsystem implemented in a single circuit block. Deposition of Wen Hsu,

O'Callaghan Decl., Ex. 12 at 147:15-19, 157:9-25, 53:24-54:11, 56:10-15, 56:23-25. 

f. Conclusion

Defendants' argument that a single subsystem wherein the identical circuitry within the subsystem

must be capable of performing error correction and detection on all formats of data is rejected. The claims

do not specify that the identical circuitry has to be used for all processing, independent of data format. Nor

does Hsu's testimony support this asserted limitation, as he established only that his invention combined

error correction for CD and DVD data into a single subsystem. However, the specification and Hsu's

consistent testimony, do support defendants' argument that the ECC subsystem must be capable of

performing error correction and detection on at least two data formats. Thus, the court construes "an error

code correction and detection subsystem" as "a subsystem capable of performing error correction and

detection on two different data formats." The circuitry within the subsystem for performing the correction

and detection functions on the different data formats may be different and there may be multiple ECC

subsystems.

F. Single Memory Cell

1. Proposed Constructions

The "single memory cell" term does not appear in the specification; it appears solely in claims 1 and

2 of the '726 patent as part of the memory subsystem. The parties do not dispute that the single memory

cell is a component of the shared memory subsystem and must be shared. Defendants' '736 Br. at 18;

Plaintiffs' '736 Br. at 20. Plaintiffs assert that "single memory cell" should be construed as "a shared

memory" where the "single memory cell" is shared between the decoders called for in the respective claims. 

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10 Defendants also contend that plaintiffs' expert has gone through a number of definitions of

"single memory cell" over the course of the ITC Investigation. Defendants' '736 Br. at 18, n.16.

11 Plaintiffs assert that the claim language, specification, and prosecution history dictates that

the single memory cell be shared by system components responsible for both DVD and CD data, but this

point is not in contention between the parties. Plaintiffs' '736 Br. at 20; Defendants' '736 Br. at 18. 

CLAIM CONSTRUCTION ORDER REGARDING U.S PATENT NO. 6,466,736— C-04-02619 RMW

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Plaintiffs' '736 Br. at 20. Defendants, however, propose that "single memory cell" be construed as the

circuitry for storing one bit of data. Defendants' '736 Br. at 17.10

2. Claim Language

Claims 1 and 7 incorporate "single memory cell." Specifically, claim 1 includes a "single memory

cell coupled to the memory data output register and the memory data input register." Claim 7 includes a

"single memory cell coupled to the signal processor, a write [FIFO] buffer, a read [FIFO] buffer, and an

MPEG [FIFO] interface." Claim 7 also describes the "single memory cell receiving data via the write FIFO

buffer and providing data to the [ECC] subsystem via the read FIFO buffer."11

3. Ordinary Meaning

Defendants assert that since the terms "single memory cell," "memory cell," and "cell" are not used in

the specification, "single memory cell" should be given its customary meaning. Defendants contend that the

plain meaning of "single memory cell" is "a single storage element of a memory, (viz, one bit), together with

associated circuits for inserting and removing one bit of information." Defendants' '736 Br. at 17; DiEuliis

Decl. ¶ 88 (relying upon dictionary definitions from the 1997 McGraw-Hill Electronics Dictionary

defining a "single memory cell" as a "single storage element of a memory, together with associated circuits

for storing and reading out 1 bit of information" and The 1999 Modern Dictionary of Electronics for a

similar definition). 

4. Specification

To rebut defendants' interpretation of the specification, plaintiffs argue that the "single memory cell"

of claim 1 is coupled to two registers. Plaintiffs' '736 Br. at 20. Plaintiffs contend that those registers hold

more than a bit of data and actually hold either a byte or word of data, which, respectively, are equivalent

to eight and sixteen bits. Id. Giving an example to support their assertions, plaintiffs note that the shared

memory resource of the preferred embodiment is dynamic random access memory (DRAM) 116 in Fig. 5. 

Id. at 21; '736 patent at 8:14-18, Fig. 5. Plaintiffs assert that a DRAM is generally not a single bit storage

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device and that the specification teaches that a DRAM 116 specifically stores information via MDRO 112

using a 16-bit bus interface, not a single bit data line. Plaintiffs' '736 Br. at 21; see '736 patent at 8:14-21. 

In support of their own construction that "single cell memory" is a single memory cell shared

between the decoders called for in the claims, plaintiffs contend that the '736 patent does not indicate that

the single memory cell must be in the integrated circuit along with the rest of the controller. Plaintiffs' '736

Br. at 20. Plaintiffs also assert that the preferred embodiment explains that the shared memory resource

holds more than one bit of data. According to plaintiffs, the specification states that Figure 1 "depicts a

typical prior art playback system" that "typically includes . . . a CD digital signal processor (CD-DSP) 22

along with its associated memory 24" and "a digital audio processor 34, a DVD DSP 26 along with its

associated memory 28 . . . ." Reply at 11; Plaintiffs' '736 Br. at 21. Plaintiffs assert that this specification

language means that prior art Fig. 1 depicts separate memories, each of which is dedicated to its own

processor and each of which is a multi-bit memory capable of storing thousands of bits. Id. They contend

that the specification does not teach consolidating all such memory into a "single memory cell" capable of

holding a single bit as required by defendants' construction.

5. Prosecution History

To validate their construction of "single memory cell," plaintiffs argue that the prosecution history

amendment through which "single memory cell" was first introduced into the claims used "memory cell" to

refer to multi-bit memories. Reply at 11; Plaintiffs' '736 Br. at 21. According to plaintiffs, the prosecuting

attorney stated that the prior art playback system of Fig. 1 had "separate memory 24 and 28 for storing

processed CD and DVD data" in arguing that the admitted prior art does not disclose the "single memory

cell." Id.; see Schwartz Decl., Ex. B at ZC000339, ZC000341, ZC00256-61. Specifically, plaintiffs cite

to the following commentary by the prosecutor in the file wrapper: 

[w]ith respect to amended claims 5, prior art playback system 1 does not

disclose a single memory cell for storing processed data received from a

CD and a DVD. Playback system 1 has separate memory 24 and 28 for

storing processed CD and DVD data.

 

Schwartz Decl., Ex. B at ZC000339. Plaintiffs further contend that it would be impossible to perform the

complicated signal processing tasks done by the respective signal processors with a memory that stored

only one bit of information, as required by defendants' construction of "single cell memory." Id.

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12 Defendants also argue the following: 1) that plaintiffs made this allegation at the time that

plaintiffs added "single memory cell" to the then-pending claim 5 to distinguish over prior art and 2) that

plaintiffs cite to this fact in their brief at 20-21. Defendants' '736 Br. at 19.

13 At the claim construction hearing, defendants asserted that DRAM could not be the shared

memory, presumably because they contend that it is not depicted as integrated into the memory subsystem

in the specification.

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In response, defendants contend that the statement in the prosecution history regarding the prior art

not utilizing a single memory cell does not constitute an express intent to impart the novel meaning of

"shared memory" to the claim term, as required by Teleflex, 299 F.3d at 1325, and thus, "single memory

cell" should take on its ordinary meaning. Defendants' '736 Br. at 19; see Schwartz Decl., Ex. B at

ZC000339.12 They further contend that even if the prior art memories were multi-bit memories, that does

not also make the shared, single memory cell a multi-bit memory. Defendants' '736 Br. at 19.

6. Conclusion

It is undisputed that the controller of the '736 patent contains a memory subsystem that provides

memory resources used for storing data output from the signal processor and error correction code

subsystems and used as input to the MPEG decoder. The claim language is not particularly helpful in

determining whether "single memory cell" is a shared memory or not. As Phillips suggests, when the claim

language is insufficient, it is appropriate to look to the specification for guidance. The specification

indicates that shared memory is an important feature, '736 patent at 4:31:39, and that DRAM 116 provides

memory resources in the Fig. 5 embodiment, id. at 8:8-13.13 The court also finds that the prosecution

history supports the construction, as it agrees that the accompanying statement to the amendment adding

the "single memory cell" limitation cited above supports plaintiffs' construction that "single memory cell" is a

shared memory. In discussing the multiple memories required to store processed CD and DVD data in the

prior art, the prosecutor distinguished the present invention by stating that the prior art did not have a "single

memory cell." This indicates that the prosecutor intended to refer to the number of memories, not the

number of bits that memory was capable of storing. Thus, based on the specification and prosecution

history, it is clear that "a single memory" cell refers to a single storage element of memory. 

Likewise, the claim language alone, in light of the prosecution history indicating the "single memory

cell" provides a shared memory for memory elements 24 and 28 of the prior art, does not provide sufficient

context to determine the size and scope of the memory storage provided. In the specification, the memory

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resource in the memory subsystem is described in Fig. 5 as DRAM 116. See also '527 patent at 8:12-14. 

The plain meaning of DRAM is a computer memory capable of storing thousands or millions of bits of data. 

The specification teaches that the size of the memory resource component of the memory subsystem 102 is

merely illustrative of an embodiment of the invention rather than representative of the scope of the invention. 

Defendants' argument that single memory cell should be construed as storage for single bit of data would

render the preferred embodiment inoperable. Thus, the court construes "a single memory cell" as a "shared

memory."

G. "Memory Subsystem"

1. Proposed Constructions

The parties do not contest that the claimed "memory subsystem" of the '736 patent includes related

elements, such as (1) a "buffer" in the context of "a read first-in-first-out (FIFO) buffer" and "a write first-infirst-out (FIFO) buffer" in claims 1 and 7, (2) a "register" in the context of "a memory data input register"

and "a memory data output register" in claim 1, and (3) "a single memory cell" in claims 1 and 7. Plaintiffs'

'736 Br. at 16; Defendants' '736 Br. at 15. 

Plaintiffs, however, assert that "a memory subsystem" should be construed as "a data storage

subsystem." Plaintiffs' '736 Br. at 16. Plaintiffs further assert that the memory subsystem claim limitation

requires sharing between CD and DVD processing systems, not sharing between all systems for all possible

memory tasks. Id. at 17. By contrast, defendants construe "a memory subsystem" to mean "one

subsystem that provides all of the memory resources for the subsystems of the controller, including the

signal processor and the error code correction and detection subsystem." Defendants' '736 Br. at 15. 

Defendants further construe the memory subsystem to be contained within the controller. Id. at 16.

2. Claim Language

Claims 1 and 7 each state "a memory subsystem" once. Based on Crystal Semiconductor,

plaintiffs argue that the preamble claim language of the indefinite article "a" combined with the transitional

phrase "comprising" mean that the claims cover a system with one or more memory subsystems. Plaintiffs'

'736 Br. at 16. 

On the other hand, defendants contend that the article "a" can mean "exactly one" in a "comprising"

claim where the written description or prosecution history invites or requires an interpretation of "a" as

meaning "exactly one." Defendants' '736 'Br. at 15-16. In support of this contention, defendants cite to

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Insituform Techs., Inc. v. CAT Contracting, Inc., 99 F.3d 1098, 1105-06 (Fed. Cir. 1996) and Abtox,

Inc. v. Exitron Corp., 122 F.3d 1019, 1023 (Fed. Cir. 1997). Defendants also assert that the plain

meaning of the claims requires the memory subsystem to be contained within the controller. Id. at 16. 

In addition, defendants contend that the memory subsystem of claim 7 requires one memory

subsystem coupled to the signal processor that includes the following: a single memory cell that receives

data via a write FIFO buffer and provides data via a read FIFO buffer; the write FIFO buffer; the read

FIFO buffer; and a MPEG FIFO interface. Defendants' '736 Br. at 25.

3. Ordinary Meaning

Defendants contend that the "memory subsystem" of claims 1 and 7 would not be understood by a

person skilled in the art without reference to the '736 patent specification. Defendants' Br. at 15. 

However, to support their proposed construction of the "memory subsystem" as being contained within the

controller, defendants argue that a person skilled in the art of the '736 patent as of December 1998 would

have been familiar with the use of embedded memory. Id. at 17.

4. Specification

Plaintiffs assert that the key feature of the invention in patent '736 is the sharing of memory

resources by different subsystems, not the sheer number of memory resources. Plaintiffs' '736 Br. at 17. 

On the other hand, defendants assert that the specification sets forth that a memory subsystem "provides a

common memory resource for the subsystems of the DVD/CD controller such as CD-DSP, DVD-DSP,

and error code correction and detection subsystem." Defendants' '736 Br. at 15; see '736 patent at 4:31-

34, 7:56-8:2. In addition, defendants argue that the '736 patent describes the memory as being located

within the controller. Defendants' '736 Br. at 16; '736 patent at 4:31-35, 6:40-51, Fig. 4. According to

defendants, the use of a common memory for the controller functions decreases the number of memory

chips needed, which is cited as an important benefit of the '736 invention. Defendants' '736 Br. at 17; '736

patent 4:35-39, 7:64-8:2.

5. Prosecution History

To rebut defendants' proposed construction of "a memory subsystem," plaintiffs argue that the

prosecution history demonstrates that the inventors did not intend to limit the claims to require defendants'

proposed construction of "a memory subsystem" as "one subsystem that provides all of the memory

resources for the subsystems of the controller." Plaintiffs' '736 Br. at 17.

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However, based on plaintiffs' assertion that admitted prior art Fig. 1 shows four memories and only

two of these memories are replaced by the memory subsystem of the claims, defendants contend that

plaintiffs selectively cite to the '736 patent as calling for a "shared memory" or a "common memory used by

the various subsystems of the controller." Defendants' '736 Br. at 16. Defendants assert that the other

two memories are not used by the controller under the invention. Id.;'736 patent at 1:43-44, 47-49 & Fig.

1; 5: 8-65 & Figs. 2, 4, 5; 2:32-34 & Fig. 1.

In addition, defendants argue that the memory subsystem was added as a narrowing amendment

during the '736 prosecution to distinguish over the prior art for the following reasons: 1) neither claim 1 or 7

required a memory subsystem as originally filed, and 2) neither claim 1 or 7 was allowed until the memory

system with all of its limitations was added to these claims in the final amendment before the patent issued. 

Id. at 17.

The court finds that the memory subsystem must provide shared memory for all controller 

subsystems. The specification repeatedly states this limitation as an advantage of the invention. Further,

plaintiffs have acknowledged that the sharing of memory resources permits a reduction in number of

subsystems. Plaintiffs' '736 Reply Br. at 6. However, defendants' argument that the memory subsystem

must be contained entirely on the controller is not supported by the claims, which do not explicitly specify

the location for the memory subsystem. Defendants acknowledge that other coupled subsystems such as

the MPEG decoder are not required to be resident on the controller. Additionally, the specification teaches

that alternate embodiments would replace the entire on-controller memory subsystem from the preferred

embodiment with an external SDRAM and memory controller. '527 patent at 8:37-39. Thus, the court

construes the term "memory subsystem" to provide a shared memory for all controller subsystems, but the

memory subsystem need not be at the same location as all controller circuitry. 

III. CLAIM CONSTRUCTION

Having considered the papers submitted by the parties and the arguments of counsel during the

claim construction hearing, the court interprets the disputed claim terms as set forth below. 

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CLAIM LANGUAGE CONSTRUCTION

"coupled" describes a direct connection, specifically, a

connection between subsystems without

intervening subsystems, a connection between

components without intervening components, and

a connection between components and subsystems

without any intervening components.

"MPEG decoder" is "hardware and/or software that can decode

compressed audio and video data in accordance

with any of the standards established by the

Moving Picture Experts Group." The MPEG

decoder need not be external to the controller.

 "parallel interface" is "a plurality of data lines that transmit both

formats of information to the MPEG decoder." 

ATAPI and serial data interfaces are not within the

scope of "parallel interface."

"subsystem" does not require separate construction

"an error code correction and detection

subsystem"

is "a subsystem capable of performing error

correction and detection on two different data

formats." The circuitry performing the correction

and detection functions on the different data

formats may be different.

"a single memory cell" means "shared memory."

"memory subsystem" provides a shared memory for all controller

subsystems, but the memory subsystem need not

be at the same location as all controller circuitry.

DATED: 9/9/05 /s/ Ronald M. Whyte 

RONALD M. WHYTE

United States District Judge

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Notice of this document has been electronically sent to:

Counsel for Defendants:

James C. Otteson jotteson@wsgr.com

Lisa G. McFall lmcfall@wsgr.com

Michael A. Ladra mladra@wsgr.com

Counsel for Plaintiffs:

Gerald T. Sekimura gsekimura@dlapiper.com

John Allcock JAllcock@dlapiper.com

Mark Fowler mfowler@dlapiper.com 

Thomas A. Burg tburg@dlapiper.com

William G. Goldman wgoldman@dlapiper.com

Dated: 9/9/05 /s/ MAG 

Chambers of Judge Whyte

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