Pytorch with CUDA Unified Memory

ticlazau1: <p>Hello PyTorch fans,</p>
<p>has anyone compiled PyTorch with CUDA Unified Memory? Any documentation on how this can be done?</p>
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<p>Thx,<br>
FM</p>

albanD: <p>Hi!</p>
<p>We do not support unified memory in pytorch.<br>
There are only very narrow use case where it brings big improvements in practice unfortunately.<br>
Is there any specific application you have that requires it?</p>

ticlazau1: <p>Hi,</p>
<p>I have a problem with the I/O and I believe the cuda unified memory will help in this case. cudaMallocManaged call that would allocate a single pointer accessible by either the GPUs or the CPUs most probably can be a great help on a multi GPU system.</p>
<p>Rgds,<br>
FM</p>

albanD: <p>It may simplify your code so that you don’t have to add <code>.cuda()</code> calls. But speed-wise, it is unclear that you will get any benefit.</p>

ticlazau1: <p>Can this be tested, even experimental? I will appreciate even some build instructions.</p>
<p>Rgds,<br>
FM</p>

albanD: <p>Sure, you can check this hackathon entry from this summer: <a href="https://discuss.pytorch.org/t/introducing-speedtorch-4x-speed-cpu-gpu-transfer-110x-gpu-cpu-transfer/56147" class="inline-onebox">Introducing SpeedTorch: 4x speed CPU-&gt;GPU transfer, 110x GPU-&gt;CPU transfer</a><br>
Note that the copy is faster as no copy happens here.<br>
Any actual operation on these Tensors will be significantly slower though as copy will happen and such slow downs are not measures in the benchmark of the submission.</p>

Santosh-Gupta: <blockquote>
<p>Note that the copy is faster as no copy happens here.</p>
</blockquote>
<p>What does this mean? I’m not super familiar with CUDA, despite being the author of that library lol</p>

albanD: <p>The copy happens much faster because for unified memory, the data is actually only moved when actually needed on one device. So if you just say, this is not on gpu. It makes a GPU Tensor that references a CPU Tensor (no copy happens here). Now if you access some values of that GPU Tensor in a kernel, then the data will be copied from the CPU to the GPU for the operation to be performed.<br>
You couldn’t get <code>110x</code> in transfer, the PCIe connection is the limit, and our current transfer speed is pretty close to it (not sure exactly how close).</p>

ticlazau1: <p>Hi <a class="mention" href="/u/alband">@albanD</a></p>
<p>This is not my case, because I am using an IBM AC922 where GPUs are connected to CPUs via NVLINK 2.0. An in addition the memory bandwidth to the CPUs is via 8x DDR4 channels (measured is around 220 GBs).</p>
<p><div class="lightbox-wrapper"><a class="lightbox" href="https://hpc.llnl.gov/sites/default/files/power9-AC922systemDiagram2_1.png" title="power9-AC922systemDiagram2_1.png" rel="nofollow noopener"><img src="https://hpc.llnl.gov/sites/default/files/power9-AC922systemDiagram2_1.png" alt width="576" height="500"><div class="meta">
<svg class="fa d-icon d-icon-far-image svg-icon" aria-hidden="true"><use xlink:href="#far-image"></use></svg><span class="filename">power9-AC922systemDiagram2_1.png</span><span class="informations">1192×1034</span><svg class="fa d-icon d-icon-discourse-expand svg-icon" aria-hidden="true"><use xlink:href="#discourse-expand"></use></svg>
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<p>Similar research on this type of HW architecture you ca find here:<br>
<a href="http://www.ieee-hpec.org/2018/2018program/index_htm_files/135.pdf" class="onebox" target="_blank" rel="nofollow noopener">http://www.ieee-hpec.org/2018/2018program/index_htm_files/135.pdf</a></p>
<p>Rgds,<br>
FM</p>

albanD: <p>Hi,</p>
<p>I’m sorry I’m not sure to understand what you mean by “this is not my case”?</p>

ticlazau1: <p><a class="mention" href="/u/alband">@albanD</a><br>
My GPUs are connected with NVLINK 2.0 150GB/s to the CPUs. This is to your statement “the PCIe connection is the limit, and our current transfer speed is pretty close to it (not sure exactly how close).”</p>
<p>So I assume that CUDA Unified Memory in Pytorch on my system architecture could have a slightly better benefit compared with the one you described.</p>
<p>Rgds,<br>
FM</p>

albanD: <p>Yes but in your diagram above, you can see that the onchip memory gives 900GB/s.<br>
And since many operations we have these days are memory limited. The slowdown you will get can be significant.</p>
<p>That being said, it might depend a lot as well depending on your workload.<br>
I would be interested to know what is the result with your workload.</p>

Joan_Gibert: <p>An update on this. I found this paper which implements this approach in <a href="https://github.com/aetherAI/tensorflow-huge-model-support" rel="noopener nofollow ugc">Tensorflow</a>.</p>
<p>It uses quite big images for the training. Here is the <a href="https://www.ncbi.nlm.nih.gov/pmc/articles/PMC7896045/" rel="noopener nofollow ugc">paper</a> in case anyone found it useful.</p>
<p>Any idea if this could be ported to PyTorch?</p>

Slappy: <p>I found this paper saying they implemented PyTorch with Unified Memory. Unfortunately it is behind a paywall so I can’t find any details about it: <a href="https://ieeexplore.ieee.org/document/9599280" class="inline-onebox" rel="noopener nofollow ugc">Implementing CUDA Unified Memory in the PyTorch Framework | IEEE Conference Publication | IEEE Xplore</a></p>