Table 1.  Trade Consideration Table  Area Modification Advantages Disadvantages  Electrical Use RA to produce contour current. No change to mechanism.  Lowest risk option. Significant changes to electronics to add  compensation network.   Electrical Increase or decrease step rate to  optimize stepping characteristic. No change to mechanism,  "only" FPGA modification. Does not solve mechanical resonance  problem.  Electrical Contour pulse waveform to attenuate  acceleration (Miller effect) No change to mechanism. Significant power loss increase, minimal  performance advantage. Electrical Modify pulse verification logic to ignore  overshoot pulse. No change to mechanism,  "only" FPGA modification. Does not solve mechanical resonance  problem.  ElectricalShort Redundant windings while primary  is operated (and vice versa) Minor electronics changeIf relays or open winding failure  underdamped situation would persist.  Electrical Add delta configuration load resistors  across bridge to provide inherent  damping. No change to mechanism. Board layout modification required to  accommodate large power resistors.   Increase in power loss on board. MechanicalIncrease gear ratio (N) to minimize  Inertia FactorNot many. Modify mechanism hardware and  electronics FPGAs.  System velocity  requirements could not tolerate slower operation.  MechanicalReduce load inertia to minimize Inertia  FactorNo change to electronics  or softwareSignificant modification to mechanism  with minimal performance benefits.  Mechanical Modify winding configuration to Delta. No change to electronics  or softwareRequires in-process upgrade of EDU  and Flight hardware.  If motor winding  opens, damping benefit lost.  MechanicalAdd Shorted Coils in Motor to approach  critical dampingNo change to electronics  or softwareRequires in-process upgrade of EDU  and Flight hardware The first three mechanical solutions were quickly eliminated because the change would violate other  operational requirements. Using the RA contour current was also quickly removed from the trade space  because of the significant changes required to the electronics. This method uses the motor peak  acceleration to attenuate the supply voltage or current [5]. While this is the “elegant” solution, and the  circuitry is relatively simple, a modification to the board layout and the additional tuning required was  schedule prohibitive. The best solution, from a cost and schedule standpoint, was changing the step rate  to optimize stepping characteristics, so this was tested first.  Decreasing the pulse rate did not change the overall performance of the system, and was thus  eliminated, but increasing the pulse rate did yield some interesting results. It was found that the system  did have a “sweet spot” at half the resonance of the ringing, approximately 64 Hz. If the system was  driven at 64 PPS, each subsequent step coupled with the bounce of the previous step (see Figure 5).  However, this solution was eliminated for two reasons: First, it would require a late modification of the  flight FPGA once the flight mechanism had been built and its resonance determined; second, the  difference between the peak voltage of the first step and the subsequent overshoots was too small. The  threshold voltage is determined by a resistor, and as this resistor drifts due to temperature changes  and/or end of life degradation the threshold voltage will drift accordingly. Our analysis showed that we  needed a much greater delta between the peaks of the pulse and the overshoot.  34