; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/kernel/sc_event.ll (ZN7sc_core8sc_event6notifyERKNS_7sc_timeE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_core::sc_time" = type { i64 }
%"class.sc_core::sc_event" = type { %"class.std::__cxx11::basic_string", ptr, ptr, i32, i32, ptr, %"class.std::vector", %"class.std::vector", %"class.std::vector.3", %"class.std::vector.3" }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<sc_core::sc_method_process *, std::allocator<sc_core::sc_method_process *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_method_process *, std::allocator<sc_core::sc_method_process *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_method_process *, std::allocator<sc_core::sc_method_process *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_method_process *, std::allocator<sc_core::sc_method_process *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_event_timed" = type { ptr, %"class.sc_core::sc_time" }

@_ZN7sc_core23SC_ID_ASSERTION_FAILED_E = external constant [0 x i8], align 1
@.str = external hidden unnamed_addr constant [13 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [84 x i8], align 1
@_ZN7sc_core12SC_ZERO_TIMEE = external global %"class.sc_core::sc_time", align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core8sc_event6notifyERKNS_7sc_timeE(ptr noundef nonnull align 8 dereferenceable(160) %0, ptr noundef nonnull align 8 dereferenceable(8) %1) #2 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca %"class.sc_core::sc_time", align 8
  %6 = alloca ptr, align 8
  %7 = alloca %"class.sc_core::sc_time", align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i1, align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %11 = load ptr, ptr %3, align 8
  %12 = getelementptr inbounds %"class.sc_core::sc_event", ptr %11, i32 0, i32 3
  %13 = load i32, ptr %12, align 8, !tbaa !9
  %14 = icmp eq i32 %13, 1
  br i1 %14, label %15, label %16

15:                                               ; preds = %2
  br label %82

16:                                               ; preds = %2
  %17 = load ptr, ptr %4, align 8, !tbaa !5
  %18 = call noundef zeroext i1 @_ZNK7sc_core7sc_timeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(8) %17, ptr noundef nonnull align 8 dereferenceable(8) @_ZN7sc_core12SC_ZERO_TIMEE)
  br i1 %18, label %19, label %41

19:                                               ; preds = %16
  %20 = getelementptr inbounds %"class.sc_core::sc_event", ptr %11, i32 0, i32 3
  %21 = load i32, ptr %20, align 8, !tbaa !9
  %22 = icmp eq i32 %21, 2
  br i1 %22, label %23, label %35

23:                                               ; preds = %19
  %24 = getelementptr inbounds %"class.sc_core::sc_event", ptr %11, i32 0, i32 5
  %25 = load ptr, ptr %24, align 8, !tbaa !24
  %26 = icmp ne ptr %25, null
  br i1 %26, label %27, label %28

27:                                               ; preds = %23
  br label %29

28:                                               ; preds = %23
  call void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef 3, ptr noundef @_ZN7sc_core23SC_ID_ASSERTION_FAILED_E, ptr noundef @.str, ptr noundef @.str.1, i32 noundef 123)
  br label %29

29:                                               ; preds = %28, %27
  %30 = phi i32 [ 0, %27 ], [ 0, %28 ]
  %31 = getelementptr inbounds %"class.sc_core::sc_event", ptr %11, i32 0, i32 5
  %32 = load ptr, ptr %31, align 8, !tbaa !24
  %33 = getelementptr inbounds %"class.sc_core::sc_event_timed", ptr %32, i32 0, i32 0
  store ptr null, ptr %33, align 8, !tbaa !25
  %34 = getelementptr inbounds %"class.sc_core::sc_event", ptr %11, i32 0, i32 5
  store ptr null, ptr %34, align 8, !tbaa !24
  br label %35

35:                                               ; preds = %29, %19
  %36 = getelementptr inbounds %"class.sc_core::sc_event", ptr %11, i32 0, i32 2
  %37 = load ptr, ptr %36, align 8, !tbaa !29
  %38 = call noundef i32 @_ZN7sc_core13sc_simcontext15add_delta_eventEPNS_8sc_eventE(ptr noundef nonnull align 8 dereferenceable(344) %37, ptr noundef %11)
  %39 = getelementptr inbounds %"class.sc_core::sc_event", ptr %11, i32 0, i32 4
  store i32 %38, ptr %39, align 4, !tbaa !30
  %40 = getelementptr inbounds %"class.sc_core::sc_event", ptr %11, i32 0, i32 3
  store i32 1, ptr %40, align 8, !tbaa !9
  br label %82

41:                                               ; preds = %16
  %42 = getelementptr inbounds %"class.sc_core::sc_event", ptr %11, i32 0, i32 3
  %43 = load i32, ptr %42, align 8, !tbaa !9
  %44 = icmp eq i32 %43, 2
  br i1 %44, label %45, label %67

45:                                               ; preds = %41
  %46 = getelementptr inbounds %"class.sc_core::sc_event", ptr %11, i32 0, i32 5
  %47 = load ptr, ptr %46, align 8, !tbaa !24
  %48 = icmp ne ptr %47, null
  br i1 %48, label %49, label %50

49:                                               ; preds = %45
  br label %51

50:                                               ; preds = %45
  call void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef 3, ptr noundef @_ZN7sc_core23SC_ID_ASSERTION_FAILED_E, ptr noundef @.str, ptr noundef @.str.1, i32 noundef 146)
  br label %51

51:                                               ; preds = %50, %49
  %52 = phi i32 [ 0, %49 ], [ 0, %50 ]
  %53 = getelementptr inbounds %"class.sc_core::sc_event", ptr %11, i32 0, i32 5
  %54 = load ptr, ptr %53, align 8, !tbaa !24
  %55 = getelementptr inbounds %"class.sc_core::sc_event_timed", ptr %54, i32 0, i32 1
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #6
  %56 = getelementptr inbounds %"class.sc_core::sc_event", ptr %11, i32 0, i32 2
  %57 = load ptr, ptr %56, align 8, !tbaa !29
  %58 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNK7sc_core13sc_simcontext10time_stampEv(ptr noundef nonnull align 8 dereferenceable(344) %57)
  %59 = load ptr, ptr %4, align 8, !tbaa !5
  call void @_ZN7sc_coreplERKNS_7sc_timeES2_(ptr dead_on_unwind writable sret(%"class.sc_core::sc_time") align 8 %5, ptr noundef nonnull align 8 dereferenceable(8) %58, ptr noundef nonnull align 8 dereferenceable(8) %59)
  %60 = call noundef zeroext i1 @_ZNK7sc_core7sc_timeleERKS0_(ptr noundef nonnull align 8 dereferenceable(8) %55, ptr noundef nonnull align 8 dereferenceable(8) %5)
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #6
  br i1 %60, label %61, label %62

61:                                               ; preds = %51
  br label %82

62:                                               ; preds = %51
  %63 = getelementptr inbounds %"class.sc_core::sc_event", ptr %11, i32 0, i32 5
  %64 = load ptr, ptr %63, align 8, !tbaa !24
  %65 = getelementptr inbounds %"class.sc_core::sc_event_timed", ptr %64, i32 0, i32 0
  store ptr null, ptr %65, align 8, !tbaa !25
  %66 = getelementptr inbounds %"class.sc_core::sc_event", ptr %11, i32 0, i32 5
  store ptr null, ptr %66, align 8, !tbaa !24
  br label %67

67:                                               ; preds = %62, %41
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #6
  %68 = call noundef ptr @_ZN7sc_core14sc_event_timednwEm(i64 noundef 16)
  store i1 true, ptr %10, align 1
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #6
  %69 = getelementptr inbounds %"class.sc_core::sc_event", ptr %11, i32 0, i32 2
  %70 = load ptr, ptr %69, align 8, !tbaa !29
  %71 = invoke noundef nonnull align 8 dereferenceable(8) ptr @_ZNK7sc_core13sc_simcontext10time_stampEv(ptr noundef nonnull align 8 dereferenceable(344) %70)
          to label %72 unwind label %83

72:                                               ; preds = %67
  %73 = load ptr, ptr %4, align 8, !tbaa !5
  invoke void @_ZN7sc_coreplERKNS_7sc_timeES2_(ptr dead_on_unwind writable sret(%"class.sc_core::sc_time") align 8 %7, ptr noundef nonnull align 8 dereferenceable(8) %71, ptr noundef nonnull align 8 dereferenceable(8) %73)
          to label %74 unwind label %83

74:                                               ; preds = %72
  invoke void @_ZN7sc_core14sc_event_timedC2EPNS_8sc_eventERKNS_7sc_timeE(ptr noundef nonnull align 8 dereferenceable(16) %68, ptr noundef %11, ptr noundef nonnull align 8 dereferenceable(8) %7)
          to label %75 unwind label %83

75:                                               ; preds = %74
  store i1 false, ptr %10, align 1
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #6
  store ptr %68, ptr %6, align 8, !tbaa !5
  %76 = getelementptr inbounds %"class.sc_core::sc_event", ptr %11, i32 0, i32 2
  %77 = load ptr, ptr %76, align 8, !tbaa !29
  %78 = load ptr, ptr %6, align 8, !tbaa !5
  call void @_ZN7sc_core13sc_simcontext15add_timed_eventEPNS_14sc_event_timedE(ptr noundef nonnull align 8 dereferenceable(344) %77, ptr noundef %78)
  %79 = load ptr, ptr %6, align 8, !tbaa !5
  %80 = getelementptr inbounds %"class.sc_core::sc_event", ptr %11, i32 0, i32 5
  store ptr %79, ptr %80, align 8, !tbaa !24
  %81 = getelementptr inbounds %"class.sc_core::sc_event", ptr %11, i32 0, i32 3
  store i32 2, ptr %81, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #6
  br label %82

82:                                               ; preds = %75, %61, %35, %15
  ret void

83:                                               ; preds = %74, %72, %67
  %84 = landingpad { ptr, i32 }
          cleanup
  %85 = extractvalue { ptr, i32 } %84, 0
  store ptr %85, ptr %8, align 8
  %86 = extractvalue { ptr, i32 } %84, 1
  store i32 %86, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #6
  %87 = load i1, ptr %10, align 1
  br i1 %87, label %88, label %89

88:                                               ; preds = %83
  call void @_ZN7sc_core14sc_event_timeddlEPvm(ptr noundef %68, i64 noundef 16) #6
  br label %89

89:                                               ; preds = %88, %83
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #6
  br label %90

90:                                               ; preds = %89
  %91 = load ptr, ptr %8, align 8
  %92 = load i32, ptr %9, align 4
  %93 = insertvalue { ptr, i32 } poison, ptr %91, 0
  %94 = insertvalue { ptr, i32 } %93, i32 %92, 1
  resume { ptr, i32 } %94
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK7sc_core7sc_timeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_ZN7sc_core13sc_simcontext15add_delta_eventEPNS_8sc_eventE(ptr noundef nonnull align 8 dereferenceable(344), ptr noundef) #4 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK7sc_core7sc_timeleERKS0_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN7sc_coreplERKNS_7sc_timeES2_(ptr dead_on_unwind noalias writable sret(%"class.sc_core::sc_time") align 8, ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNK7sc_core13sc_simcontext10time_stampEv(ptr noundef nonnull align 8 dereferenceable(344)) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN7sc_core14sc_event_timednwEm(i64 noundef) #5 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core14sc_event_timedC2EPNS_8sc_eventERKNS_7sc_timeE(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef, ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7sc_core14sc_event_timeddlEPvm(ptr noundef, i64 noundef) #5 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN7sc_core13sc_simcontext15add_timed_eventEPNS_14sc_event_timedE(ptr noundef nonnull align 8 dereferenceable(344), ptr noundef) #4 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !14, i64 48}
!10 = !{!"_ZTSN7sc_core8sc_eventE", !11, i64 0, !6, i64 32, !6, i64 40, !14, i64 48, !15, i64 52, !6, i64 56, !16, i64 64, !16, i64 88, !20, i64 112, !20, i64 136}
!11 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !12, i64 0, !13, i64 8, !7, i64 16}
!12 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!13 = !{!"long", !7, i64 0}
!14 = !{!"_ZTSN7sc_core8sc_event8notify_tE", !7, i64 0}
!15 = !{!"int", !7, i64 0}
!16 = !{!"_ZTSSt6vectorIPN7sc_core17sc_method_processESaIS2_EE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIPN7sc_core17sc_method_processESaIS2_EE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core17sc_method_processESaIS2_EE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core17sc_method_processESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!20 = !{!"_ZTSSt6vectorIPN7sc_core17sc_thread_processESaIS2_EE", !21, i64 0}
!21 = !{!"_ZTSSt12_Vector_baseIPN7sc_core17sc_thread_processESaIS2_EE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core17sc_thread_processESaIS2_EE12_Vector_implE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core17sc_thread_processESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!24 = !{!10, !6, i64 56}
!25 = !{!26, !6, i64 0}
!26 = !{!"_ZTSN7sc_core14sc_event_timedE", !6, i64 0, !27, i64 8}
!27 = !{!"_ZTSN7sc_core7sc_timeE", !28, i64 0}
!28 = !{!"long long", !7, i64 0}
!29 = !{!10, !6, i64 40}
!30 = !{!10, !15, i64 52}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_core::sc_time" = type { i64 }

@_ZN7sc_core23SC_ID_ASSERTION_FAILED_E = external constant [0 x i8], align 1
@.str = external hidden unnamed_addr constant [13 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [84 x i8], align 1
@_ZN7sc_core12SC_ZERO_TIMEE = external global %"class.sc_core::sc_time", align 8

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core8sc_event6notifyERKNS_7sc_timeE(ptr noundef nonnull align 8 dereferenceable(160) %0, ptr noundef nonnull align 8 dereferenceable(8) %1) local_unnamed_addr #2 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca %"class.sc_core::sc_time", align 8
  %4 = alloca %"class.sc_core::sc_time", align 8
  %5 = getelementptr inbounds i8, ptr %0, i64 48
  %6 = load i32, ptr %5, align 8, !tbaa !5
  %7 = icmp eq i32 %6, 1
  br i1 %7, label %47, label %8

8:                                                ; preds = %2
  %9 = tail call noundef zeroext i1 @_ZNK7sc_core7sc_timeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(8) %1, ptr noundef nonnull align 8 dereferenceable(8) @_ZN7sc_core12SC_ZERO_TIMEE)
  %10 = load i32, ptr %5, align 8, !tbaa !5
  %11 = icmp eq i32 %10, 2
  br i1 %9, label %12, label %24

12:                                               ; preds = %8
  br i1 %11, label %13, label %19

13:                                               ; preds = %12
  %14 = getelementptr inbounds i8, ptr %0, i64 56
  %15 = load ptr, ptr %14, align 8, !tbaa !23
  %.not8 = icmp eq ptr %15, null
  br i1 %.not8, label %16, label %17

16:                                               ; preds = %13
  tail call void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef 3, ptr noundef nonnull @_ZN7sc_core23SC_ID_ASSERTION_FAILED_E, ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 123)
  %.pre9 = load ptr, ptr %14, align 8, !tbaa !23
  br label %17

17:                                               ; preds = %13, %16
  %18 = phi ptr [ %15, %13 ], [ %.pre9, %16 ]
  store ptr null, ptr %18, align 8, !tbaa !24
  store ptr null, ptr %14, align 8, !tbaa !23
  br label %19

19:                                               ; preds = %17, %12
  %20 = getelementptr inbounds i8, ptr %0, i64 40
  %21 = load ptr, ptr %20, align 8, !tbaa !28
  %22 = tail call noundef i32 @_ZN7sc_core13sc_simcontext15add_delta_eventEPNS_8sc_eventE(ptr noundef nonnull align 8 dereferenceable(344) %21, ptr noundef nonnull %0)
  %23 = getelementptr inbounds i8, ptr %0, i64 52
  store i32 %22, ptr %23, align 4, !tbaa !29
  br label %.sink.split

24:                                               ; preds = %8
  br i1 %11, label %25, label %38

25:                                               ; preds = %24
  %26 = getelementptr inbounds i8, ptr %0, i64 56
  %27 = load ptr, ptr %26, align 8, !tbaa !23
  %.not = icmp eq ptr %27, null
  br i1 %.not, label %28, label %29

28:                                               ; preds = %25
  tail call void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef 3, ptr noundef nonnull @_ZN7sc_core23SC_ID_ASSERTION_FAILED_E, ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 146)
  %.pre = load ptr, ptr %26, align 8, !tbaa !23
  br label %29

29:                                               ; preds = %25, %28
  %30 = phi ptr [ %27, %25 ], [ %.pre, %28 ]
  %31 = getelementptr inbounds i8, ptr %30, i64 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #6
  %32 = getelementptr inbounds i8, ptr %0, i64 40
  %33 = load ptr, ptr %32, align 8, !tbaa !28
  %34 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNK7sc_core13sc_simcontext10time_stampEv(ptr noundef nonnull align 8 dereferenceable(344) %33)
  call void @_ZN7sc_coreplERKNS_7sc_timeES2_(ptr dead_on_unwind nonnull writable sret(%"class.sc_core::sc_time") align 8 %3, ptr noundef nonnull align 8 dereferenceable(8) %34, ptr noundef nonnull align 8 dereferenceable(8) %1)
  %35 = call noundef zeroext i1 @_ZNK7sc_core7sc_timeleERKS0_(ptr noundef nonnull align 8 dereferenceable(8) %31, ptr noundef nonnull align 8 dereferenceable(8) %3)
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #6
  br i1 %35, label %47, label %36

36:                                               ; preds = %29
  %37 = load ptr, ptr %26, align 8, !tbaa !23
  store ptr null, ptr %37, align 8, !tbaa !24
  store ptr null, ptr %26, align 8, !tbaa !23
  br label %38

38:                                               ; preds = %36, %24
  %39 = call noundef ptr @_ZN7sc_core14sc_event_timednwEm(i64 noundef 16)
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #6
  %40 = getelementptr inbounds i8, ptr %0, i64 40
  %41 = load ptr, ptr %40, align 8, !tbaa !28
  %42 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNK7sc_core13sc_simcontext10time_stampEv(ptr noundef nonnull align 8 dereferenceable(344) %41)
  invoke void @_ZN7sc_coreplERKNS_7sc_timeES2_(ptr dead_on_unwind nonnull writable sret(%"class.sc_core::sc_time") align 8 %4, ptr noundef nonnull align 8 dereferenceable(8) %42, ptr noundef nonnull align 8 dereferenceable(8) %1)
          to label %43 unwind label %48

43:                                               ; preds = %38
  invoke void @_ZN7sc_core14sc_event_timedC2EPNS_8sc_eventERKNS_7sc_timeE(ptr noundef nonnull align 8 dereferenceable(16) %39, ptr noundef nonnull %0, ptr noundef nonnull align 8 dereferenceable(8) %4)
          to label %44 unwind label %48

44:                                               ; preds = %43
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #6
  %45 = load ptr, ptr %40, align 8, !tbaa !28
  call void @_ZN7sc_core13sc_simcontext15add_timed_eventEPNS_14sc_event_timedE(ptr noundef nonnull align 8 dereferenceable(344) %45, ptr noundef nonnull %39)
  %46 = getelementptr inbounds i8, ptr %0, i64 56
  store ptr %39, ptr %46, align 8, !tbaa !23
  br label %.sink.split

.sink.split:                                      ; preds = %19, %44
  %.sink = phi i32 [ 2, %44 ], [ 1, %19 ]
  store i32 %.sink, ptr %5, align 8, !tbaa !5
  br label %47

47:                                               ; preds = %.sink.split, %29, %2
  ret void

48:                                               ; preds = %43, %38
  %49 = landingpad { ptr, i32 }
          cleanup
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #6
  call void @_ZN7sc_core14sc_event_timeddlEPvm(ptr noundef %39, i64 noundef 16) #6
  resume { ptr, i32 } %49
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK7sc_core7sc_timeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_ZN7sc_core13sc_simcontext15add_delta_eventEPNS_8sc_eventE(ptr noundef nonnull align 8 dereferenceable(344), ptr noundef) local_unnamed_addr #4 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK7sc_core7sc_timeleERKS0_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN7sc_coreplERKNS_7sc_timeES2_(ptr dead_on_unwind noalias writable sret(%"class.sc_core::sc_time") align 8, ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNK7sc_core13sc_simcontext10time_stampEv(ptr noundef nonnull align 8 dereferenceable(344)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN7sc_core14sc_event_timednwEm(i64 noundef) local_unnamed_addr #5 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core14sc_event_timedC2EPNS_8sc_eventERKNS_7sc_timeE(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef, ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7sc_core14sc_event_timeddlEPvm(ptr noundef, i64 noundef) local_unnamed_addr #5 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN7sc_core13sc_simcontext15add_timed_eventEPNS_14sc_event_timedE(ptr noundef nonnull align 8 dereferenceable(344), ptr noundef) local_unnamed_addr #4 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !13, i64 48}
!6 = !{!"_ZTSN7sc_core8sc_eventE", !7, i64 0, !9, i64 32, !9, i64 40, !13, i64 48, !14, i64 52, !9, i64 56, !15, i64 64, !15, i64 88, !19, i64 112, !19, i64 136}
!7 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !8, i64 0, !12, i64 8, !10, i64 16}
!8 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !9, i64 0}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C++ TBAA"}
!12 = !{!"long", !10, i64 0}
!13 = !{!"_ZTSN7sc_core8sc_event8notify_tE", !10, i64 0}
!14 = !{!"int", !10, i64 0}
!15 = !{!"_ZTSSt6vectorIPN7sc_core17sc_method_processESaIS2_EE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseIPN7sc_core17sc_method_processESaIS2_EE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core17sc_method_processESaIS2_EE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core17sc_method_processESaIS2_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!19 = !{!"_ZTSSt6vectorIPN7sc_core17sc_thread_processESaIS2_EE", !20, i64 0}
!20 = !{!"_ZTSSt12_Vector_baseIPN7sc_core17sc_thread_processESaIS2_EE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core17sc_thread_processESaIS2_EE12_Vector_implE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core17sc_thread_processESaIS2_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!23 = !{!6, !9, i64 56}
!24 = !{!25, !9, i64 0}
!25 = !{!"_ZTSN7sc_core14sc_event_timedE", !9, i64 0, !26, i64 8}
!26 = !{!"_ZTSN7sc_core7sc_timeE", !27, i64 0}
!27 = !{!"long long", !10, i64 0}
!28 = !{!6, !9, i64 40}
!29 = !{!6, !14, i64 52}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass