; LLVM IR from gem5/gem5 :: ext/mcpat/cacti/basic_circuit.ll (Z8drain_C_diiidbbb)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.TechnologyParameter = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, i64, %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::ScalingFactor", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType" }
%"class.TechnologyParameter::DeviceType" = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::InterconnectType" = type { double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::ScalingFactor" = type { double, double, double }
%"class.TechnologyParameter::MemoryType" = type { double, double, double, double, double, double }

@g_tp = external global %class.TechnologyParameter, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef double @_Z8drain_C_diiidbbb(double noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, double noundef %4, i1 noundef zeroext %5, i1 noundef zeroext %6, i1 noundef zeroext %7) #2 {
  %9 = alloca double, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca double, align 8
  %14 = alloca i8, align 1
  %15 = alloca i8, align 1
  %16 = alloca i8, align 1
  %17 = alloca double, align 8
  %18 = alloca ptr, align 8
  %19 = alloca double, align 8
  %20 = alloca double, align 8
  %21 = alloca double, align 8
  %22 = alloca double, align 8
  %23 = alloca double, align 8
  %24 = alloca double, align 8
  %25 = alloca double, align 8
  %26 = alloca i32, align 4
  %27 = alloca double, align 8
  %28 = alloca double, align 8
  %29 = alloca double, align 8
  %30 = alloca double, align 8
  %31 = alloca double, align 8
  %32 = alloca double, align 8
  store double %0, ptr %9, align 8, !tbaa !5
  store i32 %1, ptr %10, align 4, !tbaa !9
  store i32 %2, ptr %11, align 4, !tbaa !9
  store i32 %3, ptr %12, align 4, !tbaa !9
  store double %4, ptr %13, align 8, !tbaa !5
  %33 = zext i1 %5 to i8
  store i8 %33, ptr %14, align 1, !tbaa !11
  %34 = zext i1 %6 to i8
  store i8 %34, ptr %15, align 1, !tbaa !11
  %35 = zext i1 %7 to i8
  store i8 %35, ptr %16, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #3
  %36 = load i8, ptr %14, align 1, !tbaa !11, !range !13, !noundef !14
  %37 = trunc i8 %36 to i1
  br i1 %37, label %38, label %42

38:                                               ; preds = %8
  %39 = load i8, ptr %15, align 1, !tbaa !11, !range !13, !noundef !14
  %40 = trunc i8 %39 to i1
  br i1 %40, label %41, label %42

41:                                               ; preds = %38
  store ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 46), ptr %18, align 8, !tbaa !15
  br label %59

42:                                               ; preds = %38, %8
  %43 = load i8, ptr %14, align 1, !tbaa !11, !range !13, !noundef !14
  %44 = trunc i8 %43 to i1
  br i1 %44, label %45, label %49

45:                                               ; preds = %42
  %46 = load i8, ptr %16, align 1, !tbaa !11, !range !13, !noundef !14
  %47 = trunc i8 %46 to i1
  br i1 %47, label %48, label %49

48:                                               ; preds = %45
  store ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 47), ptr %18, align 8, !tbaa !15
  br label %58

49:                                               ; preds = %45, %42
  %50 = load i8, ptr %14, align 1, !tbaa !11, !range !13, !noundef !14
  %51 = trunc i8 %50 to i1
  br i1 %51, label %56, label %52

52:                                               ; preds = %49
  %53 = load i8, ptr %15, align 1, !tbaa !11, !range !13, !noundef !14
  %54 = trunc i8 %53 to i1
  br i1 %54, label %55, label %56

55:                                               ; preds = %52
  store ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 45), ptr %18, align 8, !tbaa !15
  br label %57

56:                                               ; preds = %52, %49
  store ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 48), ptr %18, align 8, !tbaa !15
  br label %57

57:                                               ; preds = %56, %55
  br label %58

58:                                               ; preds = %57, %48
  br label %59

59:                                               ; preds = %58, %41
  call void @llvm.lifetime.start.p0(i64 8, ptr %19) #3
  %60 = load ptr, ptr %18, align 8, !tbaa !15
  %61 = getelementptr inbounds %"class.TechnologyParameter::DeviceType", ptr %60, i32 0, i32 3
  %62 = load double, ptr %61, align 8, !tbaa !17
  store double %62, ptr %19, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %20) #3
  %63 = load ptr, ptr %18, align 8, !tbaa !15
  %64 = getelementptr inbounds %"class.TechnologyParameter::DeviceType", ptr %63, i32 0, i32 4
  %65 = load double, ptr %64, align 8, !tbaa !19
  store double %65, ptr %20, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %21) #3
  %66 = load ptr, ptr %18, align 8, !tbaa !15
  %67 = getelementptr inbounds %"class.TechnologyParameter::DeviceType", ptr %66, i32 0, i32 1
  %68 = load double, ptr %67, align 8, !tbaa !20
  %69 = fmul double 2.000000e+00, %68
  store double %69, ptr %21, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %22) #3
  %70 = load ptr, ptr %18, align 8, !tbaa !15
  %71 = getelementptr inbounds %"class.TechnologyParameter::DeviceType", ptr %70, i32 0, i32 2
  %72 = load double, ptr %71, align 8, !tbaa !21
  %73 = fmul double 2.000000e+00, %72
  store double %73, ptr %22, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %23) #3
  store double 0.000000e+00, ptr %23, align 8, !tbaa !5
  %74 = load i32, ptr %12, align 4, !tbaa !9
  %75 = icmp eq i32 %74, 0
  br i1 %75, label %76, label %78

76:                                               ; preds = %59
  %77 = load double, ptr %13, align 8, !tbaa !5
  store double %77, ptr %17, align 8, !tbaa !5
  br label %98

78:                                               ; preds = %59
  call void @llvm.lifetime.start.p0(i64 8, ptr %24) #3
  %79 = load double, ptr %13, align 8, !tbaa !5
  %80 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 38), align 8, !tbaa !22
  %81 = call double @llvm.fmuladd.f64(double -2.000000e+00, double %80, double %79)
  store double %81, ptr %24, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %25) #3
  store double 0x3FE5555555555555, ptr %25, align 8, !tbaa !5
  %82 = load i32, ptr %10, align 4, !tbaa !9
  %83 = icmp ne i32 %82, 0
  br i1 %83, label %84, label %91

84:                                               ; preds = %78
  %85 = load double, ptr %25, align 8, !tbaa !5
  %86 = fsub double 1.000000e+00, %85
  %87 = load double, ptr %24, align 8, !tbaa !5
  %88 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 36), align 8, !tbaa !28
  %89 = fsub double %87, %88
  %90 = fmul double %86, %89
  store double %90, ptr %17, align 8, !tbaa !5
  br label %97

91:                                               ; preds = %78
  %92 = load double, ptr %25, align 8, !tbaa !5
  %93 = load double, ptr %24, align 8, !tbaa !5
  %94 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 36), align 8, !tbaa !28
  %95 = fsub double %93, %94
  %96 = fmul double %92, %95
  store double %96, ptr %17, align 8, !tbaa !5
  br label %97

97:                                               ; preds = %91, %84
  call void @llvm.lifetime.end.p0(i64 8, ptr %25) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %24) #3
  br label %98

98:                                               ; preds = %97, %76
  call void @llvm.lifetime.start.p0(i64 4, ptr %26) #3
  %99 = load double, ptr %9, align 8, !tbaa !5
  %100 = load double, ptr %17, align 8, !tbaa !5
  %101 = fdiv double %99, %100
  %102 = call double @llvm.ceil.f64(double %101)
  %103 = fptosi double %102 to i32
  store i32 %103, ptr %26, align 4, !tbaa !9
  %104 = load i32, ptr %26, align 4, !tbaa !9
  %105 = icmp slt i32 %104, 2
  br i1 %105, label %106, label %108

106:                                              ; preds = %98
  %107 = load double, ptr %9, align 8, !tbaa !5
  store double %107, ptr %17, align 8, !tbaa !5
  br label %108

108:                                              ; preds = %106, %98
  call void @llvm.lifetime.start.p0(i64 8, ptr %27) #3
  %109 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 14), align 8, !tbaa !29
  %110 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 16), align 8, !tbaa !30
  %111 = call double @llvm.fmuladd.f64(double 2.000000e+00, double %110, double %109)
  %112 = load i32, ptr %11, align 4, !tbaa !9
  %113 = sub nsw i32 %112, 1
  %114 = sitofp i32 %113 to double
  %115 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 15), align 8, !tbaa !31
  %116 = call double @llvm.fmuladd.f64(double %114, double %115, double %111)
  store double %116, ptr %27, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %28) #3
  %117 = load double, ptr %17, align 8, !tbaa !5
  store double %117, ptr %28, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %29) #3
  %118 = load double, ptr %17, align 8, !tbaa !5
  %119 = load double, ptr %17, align 8, !tbaa !5
  %120 = fmul double 2.000000e+00, %119
  %121 = load i32, ptr %11, align 4, !tbaa !9
  %122 = sub nsw i32 %121, 1
  %123 = sitofp i32 %122 to double
  %124 = call double @llvm.fmuladd.f64(double %120, double %123, double %118)
  store double %124, ptr %29, align 8, !tbaa !5
  %125 = load i32, ptr %26, align 4, !tbaa !9
  %126 = icmp sgt i32 %125, 1
  br i1 %126, label %127, label %158

127:                                              ; preds = %108
  %128 = load i32, ptr %26, align 4, !tbaa !9
  %129 = sub nsw i32 %128, 2
  %130 = sitofp i32 %129 to double
  %131 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 14), align 8, !tbaa !29
  %132 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 16), align 8, !tbaa !30
  %133 = call double @llvm.fmuladd.f64(double 2.000000e+00, double %132, double %131)
  %134 = load i32, ptr %26, align 4, !tbaa !9
  %135 = sub nsw i32 %134, 1
  %136 = sitofp i32 %135 to double
  %137 = load i32, ptr %11, align 4, !tbaa !9
  %138 = sub nsw i32 %137, 1
  %139 = sitofp i32 %138 to double
  %140 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 15), align 8, !tbaa !31
  %141 = fmul double %139, %140
  %142 = fmul double %136, %141
  %143 = call double @llvm.fmuladd.f64(double %130, double %133, double %142)
  %144 = load double, ptr %27, align 8, !tbaa !5
  %145 = fadd double %144, %143
  store double %145, ptr %27, align 8, !tbaa !5
  %146 = load i32, ptr %26, align 4, !tbaa !9
  %147 = srem i32 %146, 2
  %148 = icmp eq i32 %147, 0
  br i1 %148, label %149, label %150

149:                                              ; preds = %127
  store double 0.000000e+00, ptr %28, align 8, !tbaa !5
  br label %150

150:                                              ; preds = %149, %127
  %151 = load i32, ptr %26, align 4, !tbaa !9
  %152 = sitofp i32 %151 to double
  %153 = load double, ptr %29, align 8, !tbaa !5
  %154 = fmul double %153, %152
  store double %154, ptr %29, align 8, !tbaa !5
  %155 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::InterconnectType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 50), i32 0, i32 2), align 8, !tbaa !32
  %156 = load double, ptr %27, align 8, !tbaa !5
  %157 = fmul double %155, %156
  store double %157, ptr %23, align 8, !tbaa !5
  br label %158

158:                                              ; preds = %150, %108
  call void @llvm.lifetime.start.p0(i64 8, ptr %30) #3
  %159 = load double, ptr %19, align 8, !tbaa !5
  %160 = load double, ptr %27, align 8, !tbaa !5
  %161 = fmul double %159, %160
  %162 = load double, ptr %17, align 8, !tbaa !5
  %163 = fmul double %161, %162
  store double %163, ptr %30, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %31) #3
  %164 = load double, ptr %20, align 8, !tbaa !5
  %165 = load double, ptr %28, align 8, !tbaa !5
  %166 = load double, ptr %27, align 8, !tbaa !5
  %167 = call double @llvm.fmuladd.f64(double 2.000000e+00, double %166, double %165)
  %168 = fmul double %164, %167
  store double %168, ptr %31, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %32) #3
  %169 = load double, ptr %21, align 8, !tbaa !5
  %170 = load double, ptr %22, align 8, !tbaa !5
  %171 = fadd double %169, %170
  %172 = load double, ptr %29, align 8, !tbaa !5
  %173 = fmul double %171, %172
  store double %173, ptr %32, align 8, !tbaa !5
  %174 = load double, ptr %30, align 8, !tbaa !5
  %175 = load double, ptr %31, align 8, !tbaa !5
  %176 = fadd double %174, %175
  %177 = load double, ptr %32, align 8, !tbaa !5
  %178 = fadd double %176, %177
  %179 = load double, ptr %23, align 8, !tbaa !5
  %180 = fadd double %178, %179
  call void @llvm.lifetime.end.p0(i64 8, ptr %32) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %31) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %30) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %29) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %28) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %27) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %26) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %23) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %22) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %19) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #3
  ret double %180
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.ceil.f64(double) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{i8 0, i8 2}
!14 = !{}
!15 = !{!16, !16, i64 0}
!16 = !{!"any pointer", !7, i64 0}
!17 = !{!18, !6, i64 24}
!18 = !{!"_ZTSN19TechnologyParameter10DeviceTypeE", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !6, i64 120, !6, i64 128, !6, i64 136, !6, i64 144, !6, i64 152, !6, i64 160}
!19 = !{!18, !6, i64 32}
!20 = !{!18, !6, i64 8}
!21 = !{!18, !6, i64 16}
!22 = !{!23, !6, i64 304}
!23 = !{!"_ZTS19TechnologyParameter", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !6, i64 120, !6, i64 128, !6, i64 136, !6, i64 144, !6, i64 152, !6, i64 160, !6, i64 168, !6, i64 176, !6, i64 184, !6, i64 192, !6, i64 200, !6, i64 208, !6, i64 216, !6, i64 224, !6, i64 232, !6, i64 240, !6, i64 248, !6, i64 256, !6, i64 264, !6, i64 272, !6, i64 280, !6, i64 288, !6, i64 296, !6, i64 304, !6, i64 312, !6, i64 320, !6, i64 328, !6, i64 336, !6, i64 344, !24, i64 352, !18, i64 360, !18, i64 528, !18, i64 696, !18, i64 864, !18, i64 1032, !25, i64 1200, !25, i64 1264, !25, i64 1328, !26, i64 1392, !27, i64 1416, !27, i64 1464, !27, i64 1512}
!24 = !{!"long", !7, i64 0}
!25 = !{!"_ZTSN19TechnologyParameter16InterconnectTypeE", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56}
!26 = !{!"_ZTSN19TechnologyParameter13ScalingFactorE", !6, i64 0, !6, i64 8, !6, i64 16}
!27 = !{!"_ZTSN19TechnologyParameter10MemoryTypeE", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40}
!28 = !{!23, !6, i64 288}
!29 = !{!23, !6, i64 112}
!30 = !{!23, !6, i64 128}
!31 = !{!23, !6, i64 120}
!32 = !{!23, !6, i64 1216}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.TechnologyParameter = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, i64, %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::ScalingFactor", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType" }
%"class.TechnologyParameter::DeviceType" = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::InterconnectType" = type { double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::ScalingFactor" = type { double, double, double }
%"class.TechnologyParameter::MemoryType" = type { double, double, double, double, double, double }

@g_tp = external local_unnamed_addr global %class.TechnologyParameter, align 8

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #0

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable
define dso_local noundef double @_Z8drain_C_diiidbbb(double noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, double noundef %4, i1 noundef zeroext %5, i1 noundef zeroext %6, i1 noundef zeroext %7) local_unnamed_addr #1 {
  %.not56 = xor i1 %6, true
  %brmerge.not = and i1 %5, %6
  br i1 %brmerge.not, label %11, label %9

9:                                                ; preds = %8
  %brmerge59.not = and i1 %5, %7
  br i1 %brmerge59.not, label %11, label %10

10:                                               ; preds = %9
  %brmerge61 = or i1 %.not56, %5
  %spec.select = select i1 %brmerge61, ptr getelementptr inbounds (i8, ptr @g_tp, i64 864), ptr getelementptr inbounds (i8, ptr @g_tp, i64 360)
  br label %11

11:                                               ; preds = %10, %9, %8
  %.048 = phi ptr [ getelementptr inbounds (i8, ptr @g_tp, i64 528), %8 ], [ getelementptr inbounds (i8, ptr @g_tp, i64 696), %9 ], [ %spec.select, %10 ]
  %12 = getelementptr inbounds i8, ptr %.048, i64 24
  %13 = load double, ptr %12, align 8, !tbaa !5
  %14 = getelementptr inbounds i8, ptr %.048, i64 32
  %15 = load double, ptr %14, align 8, !tbaa !10
  %16 = getelementptr inbounds i8, ptr %.048, i64 8
  %17 = load double, ptr %16, align 8, !tbaa !11
  %18 = getelementptr inbounds i8, ptr %.048, i64 16
  %19 = load double, ptr %18, align 8, !tbaa !12
  %20 = icmp eq i32 %3, 0
  br i1 %20, label %30, label %21

21:                                               ; preds = %11
  %22 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 304), align 8, !tbaa !13
  %23 = tail call double @llvm.fmuladd.f64(double %22, double -2.000000e+00, double %4)
  %.not = icmp eq i32 %1, 0
  %24 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 288), align 8, !tbaa !19
  %25 = fsub double %23, %24
  br i1 %.not, label %28, label %26

26:                                               ; preds = %21
  %27 = fmul double %25, 0x3FD5555555555556
  br label %30

28:                                               ; preds = %21
  %29 = fmul double %25, 0x3FE5555555555555
  br label %30

30:                                               ; preds = %26, %28, %11
  %.1 = phi double [ %4, %11 ], [ %27, %26 ], [ %29, %28 ]
  %31 = fdiv double %0, %.1
  %32 = tail call double @llvm.ceil.f64(double %31)
  %33 = fptosi double %32 to i32
  %34 = icmp slt i32 %33, 2
  %.2 = select i1 %34, double %0, double %.1
  %35 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 112), align 8, !tbaa !20
  %36 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 128), align 8, !tbaa !21
  %37 = tail call double @llvm.fmuladd.f64(double %36, double 2.000000e+00, double %35)
  %38 = add nsw i32 %2, -1
  %39 = sitofp i32 %38 to double
  %40 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 120), align 8, !tbaa !22
  %41 = tail call double @llvm.fmuladd.f64(double %39, double %40, double %37)
  %42 = fmul double %.2, 2.000000e+00
  %43 = tail call double @llvm.fmuladd.f64(double %42, double %39, double %.2)
  %44 = icmp sgt i32 %33, 1
  br i1 %44, label %45, label %60

45:                                               ; preds = %30
  %46 = add nsw i32 %33, -2
  %47 = uitofp nneg i32 %46 to double
  %48 = add nsw i32 %33, -1
  %49 = uitofp nneg i32 %48 to double
  %50 = fmul double %40, %39
  %51 = fmul double %50, %49
  %52 = tail call double @llvm.fmuladd.f64(double %47, double %37, double %51)
  %53 = fadd double %41, %52
  %54 = and i32 %33, 1
  %55 = icmp eq i32 %54, 0
  %.051 = select i1 %55, double 0.000000e+00, double %.1
  %56 = uitofp nneg i32 %33 to double
  %57 = fmul double %43, %56
  %58 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 1216), align 8, !tbaa !23
  %59 = fmul double %53, %58
  br label %60

60:                                               ; preds = %45, %30
  %.053 = phi double [ %53, %45 ], [ %41, %30 ]
  %.152 = phi double [ %.051, %45 ], [ %.2, %30 ]
  %.050 = phi double [ %57, %45 ], [ %43, %30 ]
  %.049 = phi double [ %59, %45 ], [ 0.000000e+00, %30 ]
  %61 = fmul double %13, %.053
  %62 = tail call double @llvm.fmuladd.f64(double %.053, double 2.000000e+00, double %.152)
  %63 = insertelement <2 x double> poison, double %17, i64 0
  %64 = insertelement <2 x double> %63, double %.2, i64 1
  %65 = insertelement <2 x double> <double 2.000000e+00, double poison>, double %61, i64 1
  %66 = fmul <2 x double> %64, %65
  %67 = insertelement <2 x double> poison, double %19, i64 0
  %68 = insertelement <2 x double> %67, double %15, i64 1
  %69 = insertelement <2 x double> <double 2.000000e+00, double poison>, double %62, i64 1
  %70 = fmul <2 x double> %68, %69
  %71 = fadd <2 x double> %66, %70
  %72 = extractelement <2 x double> %71, i64 0
  %73 = fmul double %72, %.050
  %74 = extractelement <2 x double> %71, i64 1
  %75 = fadd double %73, %74
  %76 = fadd double %.049, %75
  ret double %76
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.ceil.f64(double) #0

attributes #0 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #1 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 24}
!6 = !{!"_ZTSN19TechnologyParameter10DeviceTypeE", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 32, !7, i64 40, !7, i64 48, !7, i64 56, !7, i64 64, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !7, i64 120, !7, i64 128, !7, i64 136, !7, i64 144, !7, i64 152, !7, i64 160}
!7 = !{!"double", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!6, !7, i64 32}
!11 = !{!6, !7, i64 8}
!12 = !{!6, !7, i64 16}
!13 = !{!14, !7, i64 304}
!14 = !{!"_ZTS19TechnologyParameter", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 32, !7, i64 40, !7, i64 48, !7, i64 56, !7, i64 64, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !7, i64 120, !7, i64 128, !7, i64 136, !7, i64 144, !7, i64 152, !7, i64 160, !7, i64 168, !7, i64 176, !7, i64 184, !7, i64 192, !7, i64 200, !7, i64 208, !7, i64 216, !7, i64 224, !7, i64 232, !7, i64 240, !7, i64 248, !7, i64 256, !7, i64 264, !7, i64 272, !7, i64 280, !7, i64 288, !7, i64 296, !7, i64 304, !7, i64 312, !7, i64 320, !7, i64 328, !7, i64 336, !7, i64 344, !15, i64 352, !6, i64 360, !6, i64 528, !6, i64 696, !6, i64 864, !6, i64 1032, !16, i64 1200, !16, i64 1264, !16, i64 1328, !17, i64 1392, !18, i64 1416, !18, i64 1464, !18, i64 1512}
!15 = !{!"long", !8, i64 0}
!16 = !{!"_ZTSN19TechnologyParameter16InterconnectTypeE", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 32, !7, i64 40, !7, i64 48, !7, i64 56}
!17 = !{!"_ZTSN19TechnologyParameter13ScalingFactorE", !7, i64 0, !7, i64 8, !7, i64 16}
!18 = !{!"_ZTSN19TechnologyParameter10MemoryTypeE", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 32, !7, i64 40}
!19 = !{!14, !7, i64 288}
!20 = !{!14, !7, i64 112}
!21 = !{!14, !7, i64 128}
!22 = !{!14, !7, i64 120}
!23 = !{!14, !7, i64 1216}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass