; LLVM IR from beagleboard/librobotcontrol :: library/src/io (i2c)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.rc_i2c_state_t = type { i8, i32, i32, i32 }

@i2c = external hidden global [6 x %struct.rc_i2c_state_t], align 16
@.str = external hidden unnamed_addr constant [12 x i8], align 1
@stderr = external global ptr, align 8
@.str.1 = external hidden unnamed_addr constant [48 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [58 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local i32 @rc_i2c_init(i32 noundef %0, i8 noundef zeroext %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i8, align 1
  %6 = alloca [16 x i8], align 16
  %7 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i8 %1, ptr %5, align 1, !tbaa !9
  %8 = load i32, ptr %4, align 4, !tbaa !5
  %9 = call i32 @__check_bus_range(i32 noundef %8)
  %10 = icmp ne i32 %9, 0
  %11 = xor i1 %10, true
  %12 = xor i1 %11, true
  %13 = zext i1 %12 to i32
  %14 = sext i32 %13 to i64
  %15 = call i64 @llvm.expect.i64(i64 %14, i64 0)
  %16 = icmp ne i64 %15, 0
  br i1 %16, label %17, label %18

17:                                               ; preds = %2
  store i32 -1, ptr %3, align 4
  br label %90

18:                                               ; preds = %2
  %19 = load i32, ptr %4, align 4, !tbaa !5
  %20 = sext i32 %19 to i64
  %21 = getelementptr inbounds [6 x %struct.rc_i2c_state_t], ptr @i2c, i64 0, i64 %20
  %22 = getelementptr inbounds %struct.rc_i2c_state_t, ptr %21, i32 0, i32 2
  %23 = load i32, ptr %22, align 8, !tbaa !10
  %24 = icmp ne i32 %23, 0
  br i1 %24, label %25, label %29

25:                                               ; preds = %18
  %26 = load i32, ptr %4, align 4, !tbaa !5
  %27 = load i8, ptr %5, align 1, !tbaa !9
  %28 = call i32 @rc_i2c_set_device_address(i32 noundef %26, i8 noundef zeroext %27)
  store i32 %28, ptr %3, align 4
  br label %90

29:                                               ; preds = %18
  %30 = load i32, ptr %4, align 4, !tbaa !5
  %31 = sext i32 %30 to i64
  %32 = getelementptr inbounds [6 x %struct.rc_i2c_state_t], ptr @i2c, i64 0, i64 %31
  %33 = getelementptr inbounds %struct.rc_i2c_state_t, ptr %32, i32 0, i32 3
  store i32 1, ptr %33, align 4, !tbaa !12
  %34 = load i32, ptr %4, align 4, !tbaa !5
  %35 = sext i32 %34 to i64
  %36 = getelementptr inbounds [6 x %struct.rc_i2c_state_t], ptr @i2c, i64 0, i64 %35
  %37 = getelementptr inbounds %struct.rc_i2c_state_t, ptr %36, i32 0, i32 2
  store i32 0, ptr %37, align 8, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 16, ptr %6) #5
  %38 = getelementptr inbounds [16 x i8], ptr %6, i64 0, i64 0
  %39 = load i32, ptr %4, align 4, !tbaa !5
  %40 = call i32 (ptr, ptr, ...) @sprintf(ptr noundef %38, ptr noundef @.str, i32 noundef %39) #5
  %41 = getelementptr inbounds [16 x i8], ptr %6, i64 0, i64 0
  %42 = call i32 (ptr, i32, ...) @open(ptr noundef %41, i32 noundef 2)
  %43 = load i32, ptr %4, align 4, !tbaa !5
  %44 = sext i32 %43 to i64
  %45 = getelementptr inbounds [6 x %struct.rc_i2c_state_t], ptr @i2c, i64 0, i64 %44
  %46 = getelementptr inbounds %struct.rc_i2c_state_t, ptr %45, i32 0, i32 1
  store i32 %42, ptr %46, align 4, !tbaa !13
  %47 = load i32, ptr %4, align 4, !tbaa !5
  %48 = sext i32 %47 to i64
  %49 = getelementptr inbounds [6 x %struct.rc_i2c_state_t], ptr @i2c, i64 0, i64 %48
  %50 = getelementptr inbounds %struct.rc_i2c_state_t, ptr %49, i32 0, i32 1
  %51 = load i32, ptr %50, align 4, !tbaa !13
  %52 = icmp eq i32 %51, -1
  br i1 %52, label %53, label %56

53:                                               ; preds = %29
  %54 = load ptr, ptr @stderr, align 8, !tbaa !14
  %55 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %54, ptr noundef @.str.1) #5
  store i32 -1, ptr %3, align 4
  store i32 1, ptr %7, align 4
  br label %89

56:                                               ; preds = %29
  %57 = load i32, ptr %4, align 4, !tbaa !5
  %58 = sext i32 %57 to i64
  %59 = getelementptr inbounds [6 x %struct.rc_i2c_state_t], ptr @i2c, i64 0, i64 %58
  %60 = getelementptr inbounds %struct.rc_i2c_state_t, ptr %59, i32 0, i32 1
  %61 = load i32, ptr %60, align 4, !tbaa !13
  %62 = load i8, ptr %5, align 1, !tbaa !9
  %63 = zext i8 %62 to i32
  %64 = call i32 (i32, i64, ...) @ioctl(i32 noundef %61, i64 noundef 1795, i32 noundef %63) #5
  %65 = icmp slt i32 %64, 0
  %66 = xor i1 %65, true
  %67 = xor i1 %66, true
  %68 = zext i1 %67 to i32
  %69 = sext i32 %68 to i64
  %70 = call i64 @llvm.expect.i64(i64 %69, i64 0)
  %71 = icmp ne i64 %70, 0
  br i1 %71, label %72, label %75

72:                                               ; preds = %56
  %73 = load ptr, ptr @stderr, align 8, !tbaa !14
  %74 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %73, ptr noundef @.str.2) #5
  store i32 -1, ptr %3, align 4
  store i32 1, ptr %7, align 4
  br label %89

75:                                               ; preds = %56
  %76 = load i8, ptr %5, align 1, !tbaa !9
  %77 = load i32, ptr %4, align 4, !tbaa !5
  %78 = sext i32 %77 to i64
  %79 = getelementptr inbounds [6 x %struct.rc_i2c_state_t], ptr @i2c, i64 0, i64 %78
  %80 = getelementptr inbounds %struct.rc_i2c_state_t, ptr %79, i32 0, i32 0
  store i8 %76, ptr %80, align 16, !tbaa !16
  %81 = load i32, ptr %4, align 4, !tbaa !5
  %82 = sext i32 %81 to i64
  %83 = getelementptr inbounds [6 x %struct.rc_i2c_state_t], ptr @i2c, i64 0, i64 %82
  %84 = getelementptr inbounds %struct.rc_i2c_state_t, ptr %83, i32 0, i32 3
  store i32 0, ptr %84, align 4, !tbaa !12
  %85 = load i32, ptr %4, align 4, !tbaa !5
  %86 = sext i32 %85 to i64
  %87 = getelementptr inbounds [6 x %struct.rc_i2c_state_t], ptr @i2c, i64 0, i64 %86
  %88 = getelementptr inbounds %struct.rc_i2c_state_t, ptr %87, i32 0, i32 2
  store i32 1, ptr %88, align 8, !tbaa !10
  store i32 0, ptr %3, align 4
  store i32 1, ptr %7, align 4
  br label %89

89:                                               ; preds = %75, %72, %53
  call void @llvm.lifetime.end.p0(i64 16, ptr %6) #5
  br label %90

90:                                               ; preds = %89, %25, %17
  %91 = load i32, ptr %3, align 4
  ret i32 %91
}

; Function Attrs: nounwind uwtable
declare hidden i32 @__check_bus_range(i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
declare i64 @llvm.expect.i64(i64, i64) #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @rc_i2c_set_device_address(i32 noundef, i8 noundef zeroext) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nounwind
declare i32 @sprintf(ptr noundef, ptr noundef, ...) #3

declare i32 @open(ptr noundef, i32 noundef, ...) #4

; Function Attrs: nounwind
declare i32 @fprintf(ptr noundef, ptr noundef, ...) #3

; Function Attrs: nounwind
declare i32 @ioctl(i32 noundef, i64 noundef, ...) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(none) }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !6, i64 8}
!11 = !{!"rc_i2c_state_t", !7, i64 0, !6, i64 4, !6, i64 8, !6, i64 12}
!12 = !{!11, !6, i64 12}
!13 = !{!11, !6, i64 4}
!14 = !{!15, !15, i64 0}
!15 = !{!"any pointer", !7, i64 0}
!16 = !{!11, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.rc_i2c_state_t = type { i8, i32, i32, i32 }

@i2c = external hidden local_unnamed_addr global [6 x %struct.rc_i2c_state_t], align 16
@.str = external hidden unnamed_addr constant [12 x i8], align 1
@stderr = external local_unnamed_addr global ptr, align 8
@.str.1 = external hidden unnamed_addr constant [48 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [58 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local i32 @rc_i2c_init(i32 noundef %0, i8 noundef zeroext %1) local_unnamed_addr #0 {
  %3 = alloca [16 x i8], align 16
  %4 = tail call i32 @__check_bus_range(i32 noundef %0)
  %.not = icmp eq i32 %4, 0
  br i1 %.not, label %5, label %30, !prof !5

5:                                                ; preds = %2
  %6 = sext i32 %0 to i64
  %7 = getelementptr inbounds [6 x %struct.rc_i2c_state_t], ptr @i2c, i64 0, i64 %6
  %8 = getelementptr inbounds i8, ptr %7, i64 8
  %9 = load i32, ptr %8, align 8, !tbaa !6
  %.not17 = icmp eq i32 %9, 0
  br i1 %.not17, label %12, label %10

10:                                               ; preds = %5
  %11 = tail call i32 @rc_i2c_set_device_address(i32 noundef %0, i8 noundef zeroext %1)
  br label %30

12:                                               ; preds = %5
  %13 = getelementptr inbounds i8, ptr %7, i64 12
  store i32 1, ptr %13, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3) #5
  %14 = call i32 (ptr, ptr, ...) @sprintf(ptr noundef nonnull dereferenceable(1) %3, ptr noundef nonnull dereferenceable(1) @.str, i32 noundef %0) #5
  %15 = call i32 (ptr, i32, ...) @open(ptr noundef nonnull %3, i32 noundef 2) #5
  %16 = getelementptr inbounds i8, ptr %7, i64 4
  store i32 %15, ptr %16, align 4, !tbaa !12
  %17 = icmp eq i32 %15, -1
  br i1 %17, label %18, label %21

18:                                               ; preds = %12
  %19 = load ptr, ptr @stderr, align 8, !tbaa !13
  %20 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %19, ptr noundef nonnull @.str.1) #6
  br label %29

21:                                               ; preds = %12
  %22 = zext i8 %1 to i32
  %23 = tail call i32 (i32, i64, ...) @ioctl(i32 noundef %15, i64 noundef 1795, i32 noundef %22) #5
  %24 = icmp slt i32 %23, 0
  br i1 %24, label %25, label %28, !prof !15

25:                                               ; preds = %21
  %26 = load ptr, ptr @stderr, align 8, !tbaa !13
  %27 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %26, ptr noundef nonnull @.str.2) #6
  br label %29

28:                                               ; preds = %21
  store i8 %1, ptr %7, align 16, !tbaa !16
  store i32 0, ptr %13, align 4, !tbaa !11
  store i32 1, ptr %8, align 8, !tbaa !6
  br label %29

29:                                               ; preds = %28, %25, %18
  %.0 = phi i32 [ -1, %18 ], [ -1, %25 ], [ 0, %28 ]
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3) #5
  br label %30

30:                                               ; preds = %2, %29, %10
  %.1 = phi i32 [ %11, %10 ], [ %.0, %29 ], [ -1, %2 ]
  ret i32 %.1
}

; Function Attrs: nounwind uwtable
declare hidden i32 @__check_bus_range(i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @rc_i2c_set_device_address(i32 noundef, i8 noundef zeroext) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nofree nounwind
declare noundef i32 @sprintf(ptr noalias nocapture noundef writeonly, ptr nocapture noundef readonly, ...) local_unnamed_addr #2

; Function Attrs: nofree
declare noundef i32 @open(ptr nocapture noundef readonly, i32 noundef, ...) local_unnamed_addr #3

; Function Attrs: nofree nounwind
declare noundef i32 @fprintf(ptr nocapture noundef, ptr nocapture noundef readonly, ...) local_unnamed_addr #2

; Function Attrs: nounwind
declare i32 @ioctl(i32 noundef, i64 noundef, ...) local_unnamed_addr #4

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nofree "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { cold nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!"branch_weights", !"expected", i32 2000, i32 1}
!6 = !{!7, !10, i64 8}
!7 = !{!"rc_i2c_state_t", !8, i64 0, !10, i64 4, !10, i64 8, !10, i64 12}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!7, !10, i64 12}
!12 = !{!7, !10, i64 4}
!13 = !{!14, !14, i64 0}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!"branch_weights", !"expected", i32 1, i32 2000}
!16 = !{!7, !8, i64 0}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,LowerExpectIntrinsicPass,SROAPass,SimplifyCFGPass,TailCallElimPass