; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/datatypes/int (sc_nbexterns)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_ZN5sc_dt22vec_skip_leading_zerosEiPKj(i32 noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt7vec_cmpEiPKjiS1_(i32 noundef, ptr noundef, i32 noundef, ptr noundef) #2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_ZN5sc_dt29convert_signed_SM_to_2C_to_SMEiiiPj(i32 noundef, i32 noundef, i32 noundef, ptr noundef) #0

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dt18copy_digits_signedERiiiPjiiPKj(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) #3

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) #4

; Function Attrs: nobuiltin nounwind
declare void @_ZdaPv(ptr noundef) #5

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5sc_dt18div_on_help_signedERiiiPjiiPKj(ptr noundef nonnull align 4 dereferenceable(4) %0, i32 noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4, i32 noundef %5, ptr noundef %6) #6 {
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca ptr, align 8
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca ptr, align 8
  store ptr %0, ptr %8, align 8, !tbaa !5
  store i32 %1, ptr %9, align 4, !tbaa !9
  store i32 %2, ptr %10, align 4, !tbaa !9
  store ptr %3, ptr %11, align 8, !tbaa !5
  store i32 %4, ptr %12, align 4, !tbaa !9
  store i32 %5, ptr %13, align 4, !tbaa !9
  store ptr %6, ptr %14, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #8
  %21 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %21, ptr %15, align 4, !tbaa !9
  %22 = load i32, ptr %10, align 4, !tbaa !9
  %23 = load ptr, ptr %11, align 8, !tbaa !5
  %24 = call noundef i32 @_ZN5sc_dt22vec_skip_leading_zerosEiPKj(i32 noundef %22, ptr noundef %23)
  store i32 %24, ptr %10, align 4, !tbaa !9
  %25 = load i32, ptr %13, align 4, !tbaa !9
  %26 = load ptr, ptr %14, align 8, !tbaa !5
  %27 = call noundef i32 @_ZN5sc_dt22vec_skip_leading_zerosEiPKj(i32 noundef %25, ptr noundef %26)
  store i32 %27, ptr %13, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #8
  %28 = load i32, ptr %10, align 4, !tbaa !9
  %29 = load ptr, ptr %11, align 8, !tbaa !5
  %30 = load i32, ptr %13, align 4, !tbaa !9
  %31 = load ptr, ptr %14, align 8, !tbaa !5
  %32 = call noundef i32 @_ZN5sc_dt7vec_cmpEiPKjiS1_(i32 noundef %28, ptr noundef %29, i32 noundef %30, ptr noundef %31)
  store i32 %32, ptr %16, align 4, !tbaa !9
  %33 = load i32, ptr %16, align 4, !tbaa !9
  %34 = icmp slt i32 %33, 0
  br i1 %34, label %35, label %39

35:                                               ; preds = %7
  %36 = load ptr, ptr %8, align 8, !tbaa !5
  store i32 0, ptr %36, align 4, !tbaa !9
  %37 = load i32, ptr %15, align 4, !tbaa !9
  %38 = load ptr, ptr %11, align 8, !tbaa !5
  call void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef %37, ptr noundef %38)
  store i32 1, ptr %17, align 4
  br label %122

39:                                               ; preds = %7
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #8
  %40 = load ptr, ptr %14, align 8, !tbaa !5
  %41 = load i32, ptr %40, align 4, !tbaa !9
  store i32 %41, ptr %18, align 4, !tbaa !9
  %42 = load i32, ptr %16, align 4, !tbaa !9
  %43 = icmp sgt i32 %42, 0
  br i1 %43, label %44, label %58

44:                                               ; preds = %39
  %45 = load i32, ptr %13, align 4, !tbaa !9
  %46 = icmp eq i32 %45, 1
  br i1 %46, label %47, label %58

47:                                               ; preds = %44
  %48 = load i32, ptr %18, align 4, !tbaa !9
  %49 = icmp eq i32 %48, 1
  br i1 %49, label %50, label %58

50:                                               ; preds = %47
  %51 = load ptr, ptr %8, align 8, !tbaa !5
  %52 = load i32, ptr %51, align 4, !tbaa !9
  %53 = load i32, ptr %9, align 4, !tbaa !9
  %54 = load i32, ptr %15, align 4, !tbaa !9
  %55 = load ptr, ptr %11, align 8, !tbaa !5
  %56 = call noundef i32 @_ZN5sc_dt29convert_signed_SM_to_2C_to_SMEiiiPj(i32 noundef %52, i32 noundef %53, i32 noundef %54, ptr noundef %55)
  %57 = load ptr, ptr %8, align 8, !tbaa !5
  store i32 %56, ptr %57, align 4, !tbaa !9
  store i32 1, ptr %17, align 4
  br label %121

58:                                               ; preds = %47, %44, %39
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #8
  %59 = call noundef i32 @_ZN5sc_dt6sc_maxIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %10, ptr noundef nonnull align 4 dereferenceable(4) %13)
  %60 = add nsw i32 %59, 1
  store i32 %60, ptr %19, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %20) #8
  %61 = load i32, ptr %19, align 4, !tbaa !9
  %62 = sext i32 %61 to i64
  %63 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %62, i64 4)
  %64 = extractvalue { i64, i1 } %63, 1
  %65 = extractvalue { i64, i1 } %63, 0
  %66 = select i1 %64, i64 -1, i64 %65
  %67 = call noalias noundef nonnull ptr @_Znam(i64 noundef %66) #9
  store ptr %67, ptr %20, align 8, !tbaa !5
  %68 = load i32, ptr %19, align 4, !tbaa !9
  %69 = load ptr, ptr %20, align 8, !tbaa !5
  call void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef %68, ptr noundef %69)
  %70 = load i32, ptr %16, align 4, !tbaa !9
  %71 = icmp eq i32 %70, 0
  br i1 %71, label %72, label %75

72:                                               ; preds = %58
  %73 = load ptr, ptr %20, align 8, !tbaa !5
  %74 = getelementptr inbounds i32, ptr %73, i64 0
  store i32 1, ptr %74, align 4, !tbaa !9
  br label %108

75:                                               ; preds = %58
  %76 = load i32, ptr %13, align 4, !tbaa !9
  %77 = icmp eq i32 %76, 1
  br i1 %77, label %78, label %88

78:                                               ; preds = %75
  %79 = load i32, ptr %10, align 4, !tbaa !9
  %80 = icmp eq i32 %79, 1
  br i1 %80, label %81, label %88

81:                                               ; preds = %78
  %82 = load ptr, ptr %11, align 8, !tbaa !5
  %83 = load i32, ptr %82, align 4, !tbaa !9
  %84 = load i32, ptr %18, align 4, !tbaa !9
  %85 = udiv i32 %83, %84
  %86 = load ptr, ptr %20, align 8, !tbaa !5
  %87 = getelementptr inbounds i32, ptr %86, i64 0
  store i32 %85, ptr %87, align 4, !tbaa !9
  br label %107

88:                                               ; preds = %78, %75
  %89 = load i32, ptr %13, align 4, !tbaa !9
  %90 = icmp eq i32 %89, 1
  br i1 %90, label %91, label %100

91:                                               ; preds = %88
  %92 = load i32, ptr %18, align 4, !tbaa !9
  %93 = zext i32 %92 to i64
  %94 = icmp ult i64 %93, 32768
  br i1 %94, label %95, label %100

95:                                               ; preds = %91
  %96 = load i32, ptr %10, align 4, !tbaa !9
  %97 = load ptr, ptr %11, align 8, !tbaa !5
  %98 = load i32, ptr %18, align 4, !tbaa !9
  %99 = load ptr, ptr %20, align 8, !tbaa !5
  call void @_ZN5sc_dt13vec_div_smallEiPKjjPj(i32 noundef %96, ptr noundef %97, i32 noundef %98, ptr noundef %99)
  br label %106

100:                                              ; preds = %91, %88
  %101 = load i32, ptr %10, align 4, !tbaa !9
  %102 = load ptr, ptr %11, align 8, !tbaa !5
  %103 = load i32, ptr %13, align 4, !tbaa !9
  %104 = load ptr, ptr %14, align 8, !tbaa !5
  %105 = load ptr, ptr %20, align 8, !tbaa !5
  call void @_ZN5sc_dt13vec_div_largeEiPKjiS1_Pj(i32 noundef %101, ptr noundef %102, i32 noundef %103, ptr noundef %104, ptr noundef %105)
  br label %106

106:                                              ; preds = %100, %95
  br label %107

107:                                              ; preds = %106, %81
  br label %108

108:                                              ; preds = %107, %72
  %109 = load ptr, ptr %8, align 8, !tbaa !5
  %110 = load i32, ptr %9, align 4, !tbaa !9
  %111 = load i32, ptr %15, align 4, !tbaa !9
  %112 = load ptr, ptr %11, align 8, !tbaa !5
  %113 = call noundef i32 @_ZN5sc_dt6sc_maxIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %9, ptr noundef nonnull align 4 dereferenceable(4) %12)
  %114 = load i32, ptr %19, align 4, !tbaa !9
  %115 = sub nsw i32 %114, 1
  %116 = load ptr, ptr %20, align 8, !tbaa !5
  call void @_ZN5sc_dt18copy_digits_signedERiiiPjiiPKj(ptr noundef nonnull align 4 dereferenceable(4) %109, i32 noundef %110, i32 noundef %111, ptr noundef %112, i32 noundef %113, i32 noundef %115, ptr noundef %116)
  %117 = load ptr, ptr %20, align 8, !tbaa !5
  %118 = icmp eq ptr %117, null
  br i1 %118, label %120, label %119

119:                                              ; preds = %108
  call void @_ZdaPv(ptr noundef %117) #10
  br label %120

120:                                              ; preds = %119, %108
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #8
  store i32 0, ptr %17, align 4
  br label %121

121:                                              ; preds = %120, %50
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #8
  br label %122

122:                                              ; preds = %121, %35
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #8
  %123 = load i32, ptr %17, align 4
  switch i32 %123, label %125 [
    i32 0, label %124
    i32 1, label %124
  ]

124:                                              ; preds = %122, %122
  ret void

125:                                              ; preds = %122
  unreachable
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt6sc_maxIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2

declare void @_ZN5sc_dt13vec_div_smallEiPKjjPj(i32 noundef, ptr noundef, i32 noundef, ptr noundef) #7

declare void @_ZN5sc_dt13vec_div_largeEiPKjiS1_Pj(i32 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) #7

attributes #0 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { nounwind }
attributes #9 = { builtin allocsize(0) }
attributes #10 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_ZN5sc_dt22vec_skip_leading_zerosEiPKj(i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt7vec_cmpEiPKjiS1_(i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_ZN5sc_dt29convert_signed_SM_to_2C_to_SMEiiiPj(i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dt18copy_digits_signedERiiiPjiiPKj(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) local_unnamed_addr #2

; Function Attrs: nobuiltin nounwind
declare void @_ZdaPv(ptr noundef) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5sc_dt18div_on_help_signedERiiiPjiiPKj(ptr noundef nonnull align 4 dereferenceable(4) %0, i32 noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4, i32 noundef %5, ptr noundef %6) local_unnamed_addr #4 {
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store i32 %1, ptr %8, align 4, !tbaa !5
  store i32 %4, ptr %10, align 4, !tbaa !5
  %12 = tail call noundef i32 @_ZN5sc_dt22vec_skip_leading_zerosEiPKj(i32 noundef %2, ptr noundef %3)
  store i32 %12, ptr %9, align 4, !tbaa !5
  %13 = tail call noundef i32 @_ZN5sc_dt22vec_skip_leading_zerosEiPKj(i32 noundef %5, ptr noundef %6)
  store i32 %13, ptr %11, align 4, !tbaa !5
  %14 = tail call noundef i32 @_ZN5sc_dt7vec_cmpEiPKjiS1_(i32 noundef %12, ptr noundef %3, i32 noundef %13, ptr noundef %6)
  %15 = icmp slt i32 %14, 0
  br i1 %15, label %16, label %17

16:                                               ; preds = %7
  store i32 0, ptr %0, align 4, !tbaa !5
  tail call void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef %2, ptr noundef %3)
  br label %49

17:                                               ; preds = %7
  %18 = load i32, ptr %6, align 4, !tbaa !5
  %19 = icmp ne i32 %14, 0
  %20 = icmp eq i32 %13, 1
  %or.cond = and i1 %19, %20
  %21 = icmp eq i32 %18, 1
  %or.cond3 = select i1 %or.cond, i1 %21, i1 false
  br i1 %or.cond3, label %22, label %25

22:                                               ; preds = %17
  %23 = load i32, ptr %0, align 4, !tbaa !5
  %24 = tail call noundef i32 @_ZN5sc_dt29convert_signed_SM_to_2C_to_SMEiiiPj(i32 noundef %23, i32 noundef %1, i32 noundef %2, ptr noundef %3)
  store i32 %24, ptr %0, align 4, !tbaa !5
  br label %49

25:                                               ; preds = %17
  %26 = call noundef i32 @_ZN5sc_dt6sc_maxIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %9, ptr noundef nonnull align 4 dereferenceable(4) %11)
  %27 = add nsw i32 %26, 1
  %28 = zext nneg i32 %27 to i64
  %29 = icmp slt i32 %26, -1
  %30 = shl nuw nsw i64 %28, 2
  %31 = select i1 %29, i64 -1, i64 %30
  %32 = call noalias noundef nonnull ptr @_Znam(i64 noundef %31) #6
  call void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef %27, ptr noundef nonnull %32)
  %33 = icmp eq i32 %14, 0
  br i1 %33, label %34, label %35

34:                                               ; preds = %25
  store i32 1, ptr %32, align 4, !tbaa !5
  br label %47

35:                                               ; preds = %25
  %36 = load i32, ptr %11, align 4, !tbaa !5
  %37 = icmp eq i32 %36, 1
  %38 = load i32, ptr %9, align 4
  %39 = icmp eq i32 %38, 1
  %or.cond5 = select i1 %37, i1 %39, i1 false
  br i1 %or.cond5, label %40, label %43

40:                                               ; preds = %35
  %41 = load i32, ptr %3, align 4, !tbaa !5
  %42 = udiv i32 %41, %18
  store i32 %42, ptr %32, align 4, !tbaa !5
  br label %47

43:                                               ; preds = %35
  %44 = icmp ult i32 %18, 32768
  %or.cond8 = select i1 %37, i1 %44, i1 false
  br i1 %or.cond8, label %45, label %46

45:                                               ; preds = %43
  call void @_ZN5sc_dt13vec_div_smallEiPKjjPj(i32 noundef %38, ptr noundef %3, i32 noundef %18, ptr noundef nonnull %32)
  br label %47

46:                                               ; preds = %43
  call void @_ZN5sc_dt13vec_div_largeEiPKjiS1_Pj(i32 noundef %38, ptr noundef %3, i32 noundef %36, ptr noundef nonnull %6, ptr noundef nonnull %32)
  br label %47

47:                                               ; preds = %40, %46, %45, %34
  %48 = call noundef i32 @_ZN5sc_dt6sc_maxIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %8, ptr noundef nonnull align 4 dereferenceable(4) %10)
  call void @_ZN5sc_dt18copy_digits_signedERiiiPjiiPKj(ptr noundef nonnull align 4 dereferenceable(4) %0, i32 noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %48, i32 noundef %26, ptr noundef nonnull %32)
  call void @_ZdaPv(ptr noundef nonnull %32) #7
  br label %49

49:                                               ; preds = %22, %47, %16
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt6sc_maxIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

declare void @_ZN5sc_dt13vec_div_smallEiPKjjPj(i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #5

declare void @_ZN5sc_dt13vec_div_largeEiPKjiS1_Pj(i32 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #5

attributes #0 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { builtin allocsize(0) }
attributes #7 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass