; LLVM IR from gem5/gem5 :: ext/softfloat (f32_to_f128M)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.float32_t = type { i32 }
%union.ui32_f32 = type { i32 }
%struct.commonNaN = type { i8 }
%struct.exp16_sig32 = type { i64, i64 }

; Function Attrs: nounwind uwtable
define dso_local void @f32_to_f128M(i32 %0, ptr noundef %1) #0 {
  %3 = alloca %struct.float32_t, align 4
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca %union.ui32_f32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i8, align 1
  %9 = alloca i64, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca %struct.commonNaN, align 1
  %13 = alloca i32, align 4
  %14 = alloca %struct.exp16_sig32, align 8
  %15 = alloca i64, align 8
  %16 = alloca i32, align 4
  %17 = alloca %struct.exp16_sig32, align 8
  %18 = getelementptr inbounds %struct.float32_t, ptr %3, i32 0, i32 0
  store i32 %0, ptr %18, align 4
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #5
  call void @llvm.lifetime.start.p0(i64 1, ptr %12) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #5
  call void @llvm.lifetime.start.p0(i64 16, ptr %14) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #5
  %19 = load ptr, ptr %4, align 8, !tbaa !5
  store ptr %19, ptr %5, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %6, ptr align 4 %3, i64 4, i1 false), !tbaa.struct !9
  %20 = load i32, ptr %6, align 4, !tbaa !12
  store i32 %20, ptr %7, align 4, !tbaa !10
  %21 = load i32, ptr %7, align 4, !tbaa !10
  %22 = lshr i32 %21, 31
  %23 = icmp ne i32 %22, 0
  %24 = zext i1 %23 to i8
  store i8 %24, ptr %8, align 1, !tbaa !13
  %25 = load i32, ptr %7, align 4, !tbaa !10
  %26 = lshr i32 %25, 23
  %27 = zext i32 %26 to i64
  %28 = and i64 %27, 255
  store i64 %28, ptr %9, align 8, !tbaa !15
  %29 = load i32, ptr %7, align 4, !tbaa !10
  %30 = and i32 %29, 8388607
  store i32 %30, ptr %10, align 4, !tbaa !10
  store i32 0, ptr %11, align 4, !tbaa !10
  %31 = load i64, ptr %9, align 8, !tbaa !15
  %32 = icmp eq i64 %31, 255
  br i1 %32, label %33, label %50

33:                                               ; preds = %2
  %34 = load i32, ptr %10, align 4, !tbaa !10
  %35 = icmp ne i32 %34, 0
  br i1 %35, label %36, label %43

36:                                               ; preds = %33
  %37 = load i32, ptr %7, align 4, !tbaa !10
  %38 = and i32 %37, 4194304
  %39 = icmp ne i32 %38, 0
  br i1 %39, label %41, label %40

40:                                               ; preds = %36
  call void @softfloat_raiseFlags(i8 noundef zeroext 16)
  br label %41

41:                                               ; preds = %40, %36
  %42 = load ptr, ptr %5, align 8, !tbaa !5
  call void @softfloat_commonNaNToF128M(ptr noundef %12, ptr noundef %42)
  store i32 1, ptr %16, align 4
  br label %108

43:                                               ; preds = %33
  %44 = load i8, ptr %8, align 1, !tbaa !13, !range !17, !noundef !18
  %45 = trunc i8 %44 to i1
  %46 = zext i1 %45 to i32
  %47 = shl i32 %46, 31
  %48 = add i32 %47, 2147418112
  %49 = add i32 %48, 0
  store i32 %49, ptr %13, align 4, !tbaa !10
  br label %97

50:                                               ; preds = %2
  %51 = load i64, ptr %9, align 8, !tbaa !15
  %52 = icmp ne i64 %51, 0
  br i1 %52, label %77, label %53

53:                                               ; preds = %50
  %54 = load i32, ptr %10, align 4, !tbaa !10
  %55 = icmp ne i32 %54, 0
  br i1 %55, label %63, label %56

56:                                               ; preds = %53
  %57 = load i8, ptr %8, align 1, !tbaa !13, !range !17, !noundef !18
  %58 = trunc i8 %57 to i1
  %59 = zext i1 %58 to i32
  %60 = shl i32 %59, 31
  %61 = add i32 %60, 0
  %62 = add i32 %61, 0
  store i32 %62, ptr %13, align 4, !tbaa !10
  br label %97

63:                                               ; preds = %53
  call void @llvm.lifetime.start.p0(i64 16, ptr %17) #5
  %64 = load i32, ptr %10, align 4, !tbaa !10
  %65 = zext i32 %64 to i64
  %66 = call { i64, i64 } @softfloat_normSubnormalF32Sig(i64 noundef %65)
  %67 = getelementptr inbounds { i64, i64 }, ptr %17, i32 0, i32 0
  %68 = extractvalue { i64, i64 } %66, 0
  store i64 %68, ptr %67, align 8
  %69 = getelementptr inbounds { i64, i64 }, ptr %17, i32 0, i32 1
  %70 = extractvalue { i64, i64 } %66, 1
  store i64 %70, ptr %69, align 8
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %14, ptr align 8 %17, i64 16, i1 false), !tbaa.struct !19
  call void @llvm.lifetime.end.p0(i64 16, ptr %17) #5
  %71 = getelementptr inbounds %struct.exp16_sig32, ptr %14, i32 0, i32 0
  %72 = load i64, ptr %71, align 8, !tbaa !20
  %73 = sub nsw i64 %72, 1
  store i64 %73, ptr %9, align 8, !tbaa !15
  %74 = getelementptr inbounds %struct.exp16_sig32, ptr %14, i32 0, i32 1
  %75 = load i64, ptr %74, align 8, !tbaa !22
  %76 = trunc i64 %75 to i32
  store i32 %76, ptr %10, align 4, !tbaa !10
  br label %77

77:                                               ; preds = %63, %50
  %78 = load i32, ptr %10, align 4, !tbaa !10
  %79 = zext i32 %78 to i64
  %80 = shl i64 %79, 25
  store i64 %80, ptr %15, align 8, !tbaa !15
  %81 = load i8, ptr %8, align 1, !tbaa !13, !range !17, !noundef !18
  %82 = trunc i8 %81 to i1
  %83 = zext i1 %82 to i32
  %84 = shl i32 %83, 31
  %85 = load i64, ptr %9, align 8, !tbaa !15
  %86 = add nsw i64 %85, 16256
  %87 = trunc i64 %86 to i32
  %88 = shl i32 %87, 16
  %89 = add i32 %84, %88
  %90 = zext i32 %89 to i64
  %91 = load i64, ptr %15, align 8, !tbaa !15
  %92 = lshr i64 %91, 32
  %93 = add i64 %90, %92
  %94 = trunc i64 %93 to i32
  store i32 %94, ptr %13, align 4, !tbaa !10
  %95 = load i64, ptr %15, align 8, !tbaa !15
  %96 = trunc i64 %95 to i32
  store i32 %96, ptr %11, align 4, !tbaa !10
  br label %97

97:                                               ; preds = %77, %56, %43
  %98 = load i32, ptr %13, align 4, !tbaa !10
  %99 = load ptr, ptr %5, align 8, !tbaa !5
  %100 = getelementptr inbounds i32, ptr %99, i64 3
  store i32 %98, ptr %100, align 4, !tbaa !10
  %101 = load i32, ptr %11, align 4, !tbaa !10
  %102 = load ptr, ptr %5, align 8, !tbaa !5
  %103 = getelementptr inbounds i32, ptr %102, i64 2
  store i32 %101, ptr %103, align 4, !tbaa !10
  %104 = load ptr, ptr %5, align 8, !tbaa !5
  %105 = getelementptr inbounds i32, ptr %104, i64 1
  store i32 0, ptr %105, align 4, !tbaa !10
  %106 = load ptr, ptr %5, align 8, !tbaa !5
  %107 = getelementptr inbounds i32, ptr %106, i64 0
  store i32 0, ptr %107, align 4, !tbaa !10
  store i32 0, ptr %16, align 4
  br label %108

108:                                              ; preds = %97, %41
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #5
  call void @llvm.lifetime.end.p0(i64 16, ptr %14) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr %12) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #5
  %109 = load i32, ptr %16, align 4
  switch i32 %109, label %111 [
    i32 0, label %110
    i32 1, label %110
  ]

110:                                              ; preds = %108, %108
  ret void

111:                                              ; preds = %108
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

declare void @softfloat_raiseFlags(i8 noundef zeroext) #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @softfloat_commonNaNToF128M(ptr noundef, ptr noundef) #4

declare { i64, i64 } @softfloat_normSubnormalF32Sig(i64 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{i64 0, i64 4, !10}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"_Bool", !7, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"long", !7, i64 0}
!17 = !{i8 0, i8 2}
!18 = !{}
!19 = !{i64 0, i64 8, !15, i64 8, i64 8, !15}
!20 = !{!21, !16, i64 0}
!21 = !{!"exp16_sig32", !16, i64 0, !16, i64 8}
!22 = !{!21, !16, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.commonNaN = type { i8 }

; Function Attrs: nounwind uwtable
define dso_local void @f32_to_f128M(i32 %0, ptr noundef %1) local_unnamed_addr #0 {
  %3 = alloca %struct.commonNaN, align 1
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %3) #4
  %4 = lshr i32 %0, 23
  %5 = and i32 %4, 255
  %6 = and i32 %0, 8388607
  %trunc = trunc i32 %4 to i8
  switch i8 %trunc, label %24 [
    i8 -1, label %7
    i8 0, label %14
  ]

7:                                                ; preds = %2
  %.not34 = icmp eq i32 %6, 0
  br i1 %.not34, label %12, label %8

8:                                                ; preds = %7
  %9 = and i32 %0, 4194304
  %.not36 = icmp eq i32 %9, 0
  br i1 %.not36, label %10, label %11

10:                                               ; preds = %8
  tail call void @softfloat_raiseFlags(i8 noundef zeroext 16) #4
  br label %11

11:                                               ; preds = %10, %8
  call void @softfloat_commonNaNToF128M(ptr noundef nonnull %3, ptr noundef %1)
  br label %35

12:                                               ; preds = %7
  %13 = or i32 %0, 2147418112
  br label %31

14:                                               ; preds = %2
  %.not32 = icmp eq i32 %6, 0
  br i1 %.not32, label %15, label %16

15:                                               ; preds = %14
  %.lobit = and i32 %0, -2147483648
  br label %31

16:                                               ; preds = %14
  %17 = zext nneg i32 %6 to i64
  %18 = tail call { i64, i64 } @softfloat_normSubnormalF32Sig(i64 noundef %17) #4
  %19 = extractvalue { i64, i64 } %18, 0
  %20 = extractvalue { i64, i64 } %18, 1
  %21 = trunc i64 %20 to i32
  %22 = trunc i64 %19 to i32
  %23 = add i32 %22, -1
  br label %24

24:                                               ; preds = %2, %16
  %.027 = phi i32 [ %21, %16 ], [ %6, %2 ]
  %.0 = phi i32 [ %23, %16 ], [ %5, %2 ]
  %25 = shl i32 %.027, 25
  %.lobit33 = and i32 %0, -2147483648
  %26 = shl i32 %.0, 16
  %27 = lshr i32 %.027, 7
  %28 = or disjoint i32 %.lobit33, 1065353216
  %29 = add nuw nsw i32 %28, %27
  %30 = add i32 %29, %26
  br label %31

31:                                               ; preds = %24, %15, %12
  %.029 = phi i32 [ %13, %12 ], [ %30, %24 ], [ %.lobit, %15 ]
  %.028 = phi i32 [ 0, %12 ], [ %25, %24 ], [ 0, %15 ]
  %32 = getelementptr inbounds i8, ptr %1, i64 12
  store i32 %.029, ptr %32, align 4, !tbaa !5
  %33 = getelementptr inbounds i8, ptr %1, i64 8
  store i32 %.028, ptr %33, align 4, !tbaa !5
  %34 = getelementptr inbounds i8, ptr %1, i64 4
  store i32 0, ptr %34, align 4, !tbaa !5
  store i32 0, ptr %1, align 4, !tbaa !5
  br label %35

35:                                               ; preds = %31, %11
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %3) #4
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @softfloat_raiseFlags(i8 noundef zeroext) local_unnamed_addr #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @softfloat_commonNaNToF128M(ptr noundef, ptr noundef) local_unnamed_addr #3

declare { i64, i64 } @softfloat_normSubnormalF32Sig(i64 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass