; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/utils/sc_hash.ll (ZN7sc_core13sc_phash_base6rehashEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_core::sc_phash_base" = type { ptr, i32, i32, i32, i32, double, ptr, ptr, ptr }
%"class.sc_core::sc_phash_elem" = type { ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) #0

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nobuiltin nounwind
declare void @_ZdaPv(ptr noundef) #3

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core13sc_phash_base6rehashEv(ptr noundef nonnull align 8 dereferenceable(56) %0) #4 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  %9 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #6
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #6
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #6
  %10 = getelementptr inbounds %"class.sc_core::sc_phash_base", ptr %9, i32 0, i32 6
  %11 = load ptr, ptr %10, align 8, !tbaa !9
  store ptr %11, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #6
  %12 = getelementptr inbounds %"class.sc_core::sc_phash_base", ptr %9, i32 0, i32 1
  %13 = load i32, ptr %12, align 8, !tbaa !13
  store i32 %13, ptr %6, align 4, !tbaa !14
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #6
  %14 = getelementptr inbounds %"class.sc_core::sc_phash_base", ptr %9, i32 0, i32 5
  %15 = load double, ptr %14, align 8, !tbaa !15
  %16 = load i32, ptr %6, align 4, !tbaa !14
  %17 = sitofp i32 %16 to double
  %18 = fmul double %15, %17
  %19 = fptosi double %18 to i32
  %20 = getelementptr inbounds %"class.sc_core::sc_phash_base", ptr %9, i32 0, i32 1
  store i32 %19, ptr %20, align 8, !tbaa !13
  %21 = getelementptr inbounds %"class.sc_core::sc_phash_base", ptr %9, i32 0, i32 1
  %22 = load i32, ptr %21, align 8, !tbaa !13
  %23 = srem i32 %22, 2
  %24 = icmp eq i32 %23, 0
  br i1 %24, label %25, label %29

25:                                               ; preds = %1
  %26 = getelementptr inbounds %"class.sc_core::sc_phash_base", ptr %9, i32 0, i32 1
  %27 = load i32, ptr %26, align 8, !tbaa !13
  %28 = add nsw i32 %27, 1
  store i32 %28, ptr %26, align 8, !tbaa !13
  br label %29

29:                                               ; preds = %25, %1
  %30 = getelementptr inbounds %"class.sc_core::sc_phash_base", ptr %9, i32 0, i32 2
  store i32 0, ptr %30, align 4, !tbaa !16
  %31 = getelementptr inbounds %"class.sc_core::sc_phash_base", ptr %9, i32 0, i32 1
  %32 = load i32, ptr %31, align 8, !tbaa !13
  %33 = sext i32 %32 to i64
  %34 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %33, i64 8)
  %35 = extractvalue { i64, i1 } %34, 1
  %36 = extractvalue { i64, i1 } %34, 0
  %37 = select i1 %35, i64 -1, i64 %36
  %38 = call noalias noundef nonnull ptr @_Znam(i64 noundef %37) #7
  %39 = getelementptr inbounds %"class.sc_core::sc_phash_base", ptr %9, i32 0, i32 6
  store ptr %38, ptr %39, align 8, !tbaa !9
  %40 = getelementptr inbounds %"class.sc_core::sc_phash_base", ptr %9, i32 0, i32 6
  %41 = load ptr, ptr %40, align 8, !tbaa !9
  %42 = getelementptr inbounds %"class.sc_core::sc_phash_base", ptr %9, i32 0, i32 1
  %43 = load i32, ptr %42, align 8, !tbaa !13
  %44 = sext i32 %43 to i64
  %45 = mul i64 8, %44
  call void @llvm.memset.p0.i64(ptr align 8 %41, i8 0, i64 %45, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #6
  store i32 0, ptr %8, align 4, !tbaa !14
  br label %46

46:                                               ; preds = %87, %29
  %47 = load i32, ptr %8, align 4, !tbaa !14
  %48 = load i32, ptr %6, align 4, !tbaa !14
  %49 = icmp slt i32 %47, %48
  br i1 %49, label %51, label %50

50:                                               ; preds = %46
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #6
  br label %90

51:                                               ; preds = %46
  %52 = load ptr, ptr %5, align 8, !tbaa !5
  %53 = load i32, ptr %8, align 4, !tbaa !14
  %54 = sext i32 %53 to i64
  %55 = getelementptr inbounds ptr, ptr %52, i64 %54
  %56 = load ptr, ptr %55, align 8, !tbaa !5
  store ptr %56, ptr %3, align 8, !tbaa !5
  br label %57

57:                                               ; preds = %60, %51
  %58 = load ptr, ptr %3, align 8, !tbaa !5
  %59 = icmp ne ptr %58, null
  br i1 %59, label %60, label %86

60:                                               ; preds = %57
  %61 = load ptr, ptr %3, align 8, !tbaa !5
  %62 = getelementptr inbounds %"class.sc_core::sc_phash_elem", ptr %61, i32 0, i32 2
  %63 = load ptr, ptr %62, align 8, !tbaa !17
  store ptr %63, ptr %4, align 8, !tbaa !5
  %64 = load ptr, ptr %3, align 8, !tbaa !5
  %65 = getelementptr inbounds %"class.sc_core::sc_phash_elem", ptr %64, i32 0, i32 0
  %66 = load ptr, ptr %65, align 8, !tbaa !19
  %67 = call noundef i32 @_ZNK7sc_core13sc_phash_base7do_hashEPKv(ptr noundef nonnull align 8 dereferenceable(56) %9, ptr noundef %66)
  store i32 %67, ptr %7, align 4, !tbaa !14
  %68 = getelementptr inbounds %"class.sc_core::sc_phash_base", ptr %9, i32 0, i32 6
  %69 = load ptr, ptr %68, align 8, !tbaa !9
  %70 = load i32, ptr %7, align 4, !tbaa !14
  %71 = zext i32 %70 to i64
  %72 = getelementptr inbounds ptr, ptr %69, i64 %71
  %73 = load ptr, ptr %72, align 8, !tbaa !5
  %74 = load ptr, ptr %3, align 8, !tbaa !5
  %75 = getelementptr inbounds %"class.sc_core::sc_phash_elem", ptr %74, i32 0, i32 2
  store ptr %73, ptr %75, align 8, !tbaa !17
  %76 = load ptr, ptr %3, align 8, !tbaa !5
  %77 = getelementptr inbounds %"class.sc_core::sc_phash_base", ptr %9, i32 0, i32 6
  %78 = load ptr, ptr %77, align 8, !tbaa !9
  %79 = load i32, ptr %7, align 4, !tbaa !14
  %80 = zext i32 %79 to i64
  %81 = getelementptr inbounds ptr, ptr %78, i64 %80
  store ptr %76, ptr %81, align 8, !tbaa !5
  %82 = getelementptr inbounds %"class.sc_core::sc_phash_base", ptr %9, i32 0, i32 2
  %83 = load i32, ptr %82, align 4, !tbaa !16
  %84 = add nsw i32 %83, 1
  store i32 %84, ptr %82, align 4, !tbaa !16
  %85 = load ptr, ptr %4, align 8, !tbaa !5
  store ptr %85, ptr %3, align 8, !tbaa !5
  br label %57, !llvm.loop !20

86:                                               ; preds = %57
  br label %87

87:                                               ; preds = %86
  %88 = load i32, ptr %8, align 4, !tbaa !14
  %89 = add nsw i32 %88, 1
  store i32 %89, ptr %8, align 4, !tbaa !14
  br label %46, !llvm.loop !22

90:                                               ; preds = %50
  %91 = load ptr, ptr %5, align 8, !tbaa !5
  %92 = icmp eq ptr %91, null
  br i1 %92, label %94, label %93

93:                                               ; preds = %90
  call void @_ZdaPv(ptr noundef %91) #8
  br label %94

94:                                               ; preds = %93, %90
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #6
  ret void
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #5

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZNK7sc_core13sc_phash_base7do_hashEPKv(ptr noundef nonnull align 8 dereferenceable(56), ptr noundef) #4 align 2

attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #1 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #6 = { nounwind }
attributes #7 = { builtin allocsize(0) }
attributes #8 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 32}
!10 = !{!"_ZTSN7sc_core13sc_phash_baseE", !6, i64 0, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !12, i64 24, !6, i64 32, !6, i64 40, !6, i64 48}
!11 = !{!"int", !7, i64 0}
!12 = !{!"double", !7, i64 0}
!13 = !{!10, !11, i64 8}
!14 = !{!11, !11, i64 0}
!15 = !{!10, !12, i64 24}
!16 = !{!10, !11, i64 12}
!17 = !{!18, !6, i64 16}
!18 = !{!"_ZTSN7sc_core13sc_phash_elemE", !6, i64 0, !6, i64 8, !6, i64 16}
!19 = !{!18, !6, i64 0}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
!22 = distinct !{!22, !21}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) local_unnamed_addr #0

; Function Attrs: nobuiltin nounwind
declare void @_ZdaPv(ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core13sc_phash_base6rehashEv(ptr noundef nonnull align 8 dereferenceable(56) %0) local_unnamed_addr #2 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 32
  %3 = load ptr, ptr %2, align 8, !tbaa !5
  %4 = getelementptr inbounds i8, ptr %0, i64 8
  %5 = load i32, ptr %4, align 8, !tbaa !12
  %6 = getelementptr inbounds i8, ptr %0, i64 24
  %7 = load double, ptr %6, align 8, !tbaa !13
  %8 = sitofp i32 %5 to double
  %9 = fmul double %7, %8
  %10 = fptosi double %9 to i32
  %spec.select = or i32 %10, 1
  store i32 %spec.select, ptr %4, align 8, !tbaa !12
  %11 = getelementptr inbounds i8, ptr %0, i64 12
  store i32 0, ptr %11, align 4, !tbaa !14
  %12 = sext i32 %spec.select to i64
  %13 = icmp slt i32 %10, 0
  %14 = shl nsw i64 %12, 3
  %15 = select i1 %13, i64 -1, i64 %14
  %16 = tail call noalias noundef nonnull ptr @_Znam(i64 noundef %15) #4
  store ptr %16, ptr %2, align 8, !tbaa !5
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(1) %16, i8 0, i64 %14, i1 false)
  %17 = icmp sgt i32 %5, 0
  br i1 %17, label %.lr.ph21.preheader, label %._crit_edge22

.lr.ph21.preheader:                               ; preds = %1
  %wide.trip.count = zext nneg i32 %5 to i64
  br label %.lr.ph21

._crit_edge22:                                    ; preds = %._crit_edge, %1
  %18 = icmp eq ptr %3, null
  br i1 %18, label %32, label %31

.lr.ph21:                                         ; preds = %.lr.ph21.preheader, %._crit_edge
  %indvars.iv = phi i64 [ 0, %.lr.ph21.preheader ], [ %indvars.iv.next, %._crit_edge ]
  %19 = getelementptr inbounds ptr, ptr %3, i64 %indvars.iv
  %20 = load ptr, ptr %19, align 8, !tbaa !15
  %.not17 = icmp eq ptr %20, null
  br i1 %.not17, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph21, %.lr.ph
  %.01518 = phi ptr [ %22, %.lr.ph ], [ %20, %.lr.ph21 ]
  %21 = getelementptr inbounds i8, ptr %.01518, i64 16
  %22 = load ptr, ptr %21, align 8, !tbaa !16
  %23 = load ptr, ptr %.01518, align 8, !tbaa !18
  %24 = tail call noundef i32 @_ZNK7sc_core13sc_phash_base7do_hashEPKv(ptr noundef nonnull align 8 dereferenceable(56) %0, ptr noundef %23)
  %25 = load ptr, ptr %2, align 8, !tbaa !5
  %26 = zext i32 %24 to i64
  %27 = getelementptr inbounds ptr, ptr %25, i64 %26
  %28 = load ptr, ptr %27, align 8, !tbaa !15
  store ptr %28, ptr %21, align 8, !tbaa !16
  store ptr %.01518, ptr %27, align 8, !tbaa !15
  %29 = load i32, ptr %11, align 4, !tbaa !14
  %30 = add nsw i32 %29, 1
  store i32 %30, ptr %11, align 4, !tbaa !14
  %.not = icmp eq ptr %22, null
  br i1 %.not, label %._crit_edge, label %.lr.ph, !llvm.loop !19

._crit_edge:                                      ; preds = %.lr.ph, %.lr.ph21
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge22, label %.lr.ph21, !llvm.loop !21

31:                                               ; preds = %._crit_edge22
  tail call void @_ZdaPv(ptr noundef nonnull %3) #5
  br label %32

32:                                               ; preds = %31, %._crit_edge22
  ret void
}

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZNK7sc_core13sc_phash_base7do_hashEPKv(ptr noundef nonnull align 8 dereferenceable(56), ptr noundef) local_unnamed_addr #2 align 2

attributes #0 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { builtin allocsize(0) }
attributes #5 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 32}
!6 = !{!"_ZTSN7sc_core13sc_phash_baseE", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !11, i64 24, !7, i64 32, !7, i64 40, !7, i64 48}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"double", !8, i64 0}
!12 = !{!6, !10, i64 8}
!13 = !{!6, !11, i64 24}
!14 = !{!6, !10, i64 12}
!15 = !{!7, !7, i64 0}
!16 = !{!17, !7, i64 16}
!17 = !{!"_ZTSN7sc_core13sc_phash_elemE", !7, i64 0, !7, i64 8, !7, i64 16}
!18 = !{!17, !7, i64 0}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = distinct !{!21, !20}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass