; LLVM IR from gem5/gem5 :: ext/softfloat (f16_to_f128M)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.float16_t = type { i16 }
%union.ui16_f16 = type { i16 }
%struct.commonNaN = type { i8 }
%struct.exp8_sig16 = type { i8, i64 }

; Function Attrs: nounwind uwtable
define dso_local void @f16_to_f128M(i16 %0, ptr noundef %1) #0 {
  %3 = alloca %struct.float16_t, align 2
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca %union.ui16_f16, align 2
  %7 = alloca i16, align 2
  %8 = alloca i8, align 1
  %9 = alloca i8, align 1
  %10 = alloca i16, align 2
  %11 = alloca %struct.commonNaN, align 1
  %12 = alloca i32, align 4
  %13 = alloca %struct.exp8_sig16, align 8
  %14 = alloca i32, align 4
  %15 = alloca %struct.exp8_sig16, align 8
  %16 = getelementptr inbounds %struct.float16_t, ptr %3, i32 0, i32 0
  store i16 %0, ptr %16, align 2
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #5
  call void @llvm.lifetime.start.p0(i64 2, ptr %6) #5
  call void @llvm.lifetime.start.p0(i64 2, ptr %7) #5
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #5
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #5
  call void @llvm.lifetime.start.p0(i64 2, ptr %10) #5
  call void @llvm.lifetime.start.p0(i64 1, ptr %11) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #5
  call void @llvm.lifetime.start.p0(i64 16, ptr %13) #5
  %17 = load ptr, ptr %4, align 8, !tbaa !5
  store ptr %17, ptr %5, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 2 %6, ptr align 2 %3, i64 2, i1 false), !tbaa.struct !9
  %18 = load i16, ptr %6, align 2, !tbaa !12
  store i16 %18, ptr %7, align 2, !tbaa !10
  %19 = load i16, ptr %7, align 2, !tbaa !10
  %20 = zext i16 %19 to i32
  %21 = ashr i32 %20, 15
  %22 = icmp ne i32 %21, 0
  %23 = zext i1 %22 to i8
  store i8 %23, ptr %8, align 1, !tbaa !13
  %24 = load i16, ptr %7, align 2, !tbaa !10
  %25 = zext i16 %24 to i32
  %26 = ashr i32 %25, 10
  %27 = trunc i32 %26 to i8
  %28 = sext i8 %27 to i32
  %29 = and i32 %28, 31
  %30 = trunc i32 %29 to i8
  store i8 %30, ptr %9, align 1, !tbaa !12
  %31 = load i16, ptr %7, align 2, !tbaa !10
  %32 = zext i16 %31 to i32
  %33 = and i32 %32, 1023
  %34 = trunc i32 %33 to i16
  store i16 %34, ptr %10, align 2, !tbaa !10
  %35 = load i8, ptr %9, align 1, !tbaa !12
  %36 = sext i8 %35 to i32
  %37 = icmp eq i32 %36, 31
  br i1 %37, label %38, label %56

38:                                               ; preds = %2
  %39 = load i16, ptr %10, align 2, !tbaa !10
  %40 = icmp ne i16 %39, 0
  br i1 %40, label %41, label %49

41:                                               ; preds = %38
  %42 = load i16, ptr %7, align 2, !tbaa !10
  %43 = zext i16 %42 to i32
  %44 = and i32 %43, 512
  %45 = icmp ne i32 %44, 0
  br i1 %45, label %47, label %46

46:                                               ; preds = %41
  call void @softfloat_raiseFlags(i8 noundef zeroext 16)
  br label %47

47:                                               ; preds = %46, %41
  %48 = load ptr, ptr %5, align 8, !tbaa !5
  call void @softfloat_commonNaNToF128M(ptr noundef %11, ptr noundef %48)
  store i32 1, ptr %14, align 4
  br label %109

49:                                               ; preds = %38
  %50 = load i8, ptr %8, align 1, !tbaa !13, !range !15, !noundef !16
  %51 = trunc i8 %50 to i1
  %52 = zext i1 %51 to i32
  %53 = shl i32 %52, 31
  %54 = add i32 %53, 2147418112
  %55 = add i32 %54, 0
  store i32 %55, ptr %12, align 4, !tbaa !17
  br label %99

56:                                               ; preds = %2
  %57 = load i8, ptr %9, align 1, !tbaa !12
  %58 = icmp ne i8 %57, 0
  br i1 %58, label %85, label %59

59:                                               ; preds = %56
  %60 = load i16, ptr %10, align 2, !tbaa !10
  %61 = icmp ne i16 %60, 0
  br i1 %61, label %69, label %62

62:                                               ; preds = %59
  %63 = load i8, ptr %8, align 1, !tbaa !13, !range !15, !noundef !16
  %64 = trunc i8 %63 to i1
  %65 = zext i1 %64 to i32
  %66 = shl i32 %65, 31
  %67 = add i32 %66, 0
  %68 = add i32 %67, 0
  store i32 %68, ptr %12, align 4, !tbaa !17
  br label %99

69:                                               ; preds = %59
  call void @llvm.lifetime.start.p0(i64 16, ptr %15) #5
  %70 = load i16, ptr %10, align 2, !tbaa !10
  %71 = zext i16 %70 to i64
  %72 = call { i8, i64 } @softfloat_normSubnormalF16Sig(i64 noundef %71)
  %73 = getelementptr inbounds { i8, i64 }, ptr %15, i32 0, i32 0
  %74 = extractvalue { i8, i64 } %72, 0
  store i8 %74, ptr %73, align 8
  %75 = getelementptr inbounds { i8, i64 }, ptr %15, i32 0, i32 1
  %76 = extractvalue { i8, i64 } %72, 1
  store i64 %76, ptr %75, align 8
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %13, ptr align 8 %15, i64 16, i1 false), !tbaa.struct !19
  call void @llvm.lifetime.end.p0(i64 16, ptr %15) #5
  %77 = getelementptr inbounds %struct.exp8_sig16, ptr %13, i32 0, i32 0
  %78 = load i8, ptr %77, align 8, !tbaa !22
  %79 = sext i8 %78 to i32
  %80 = sub nsw i32 %79, 1
  %81 = trunc i32 %80 to i8
  store i8 %81, ptr %9, align 1, !tbaa !12
  %82 = getelementptr inbounds %struct.exp8_sig16, ptr %13, i32 0, i32 1
  %83 = load i64, ptr %82, align 8, !tbaa !24
  %84 = trunc i64 %83 to i16
  store i16 %84, ptr %10, align 2, !tbaa !10
  br label %85

85:                                               ; preds = %69, %56
  %86 = load i8, ptr %8, align 1, !tbaa !13, !range !15, !noundef !16
  %87 = trunc i8 %86 to i1
  %88 = zext i1 %87 to i32
  %89 = shl i32 %88, 31
  %90 = load i8, ptr %9, align 1, !tbaa !12
  %91 = sext i8 %90 to i32
  %92 = add nsw i32 %91, 16368
  %93 = shl i32 %92, 16
  %94 = add i32 %89, %93
  %95 = load i16, ptr %10, align 2, !tbaa !10
  %96 = zext i16 %95 to i32
  %97 = shl i32 %96, 6
  %98 = add i32 %94, %97
  store i32 %98, ptr %12, align 4, !tbaa !17
  br label %99

99:                                               ; preds = %85, %62, %49
  %100 = load i32, ptr %12, align 4, !tbaa !17
  %101 = load ptr, ptr %5, align 8, !tbaa !5
  %102 = getelementptr inbounds i32, ptr %101, i64 3
  store i32 %100, ptr %102, align 4, !tbaa !17
  %103 = load ptr, ptr %5, align 8, !tbaa !5
  %104 = getelementptr inbounds i32, ptr %103, i64 2
  store i32 0, ptr %104, align 4, !tbaa !17
  %105 = load ptr, ptr %5, align 8, !tbaa !5
  %106 = getelementptr inbounds i32, ptr %105, i64 1
  store i32 0, ptr %106, align 4, !tbaa !17
  %107 = load ptr, ptr %5, align 8, !tbaa !5
  %108 = getelementptr inbounds i32, ptr %107, i64 0
  store i32 0, ptr %108, align 4, !tbaa !17
  store i32 0, ptr %14, align 4
  br label %109

109:                                              ; preds = %99, %47
  call void @llvm.lifetime.end.p0(i64 16, ptr %13) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr %11) #5
  call void @llvm.lifetime.end.p0(i64 2, ptr %10) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 2, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 2, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #5
  %110 = load i32, ptr %14, align 4
  switch i32 %110, label %112 [
    i32 0, label %111
    i32 1, label %111
  ]

111:                                              ; preds = %109, %109
  ret void

112:                                              ; preds = %109
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

declare void @softfloat_raiseFlags(i8 noundef zeroext) #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @softfloat_commonNaNToF128M(ptr noundef, ptr noundef) #4

declare { i8, i64 } @softfloat_normSubnormalF16Sig(i64 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{i64 0, i64 2, !10}
!10 = !{!11, !11, i64 0}
!11 = !{!"short", !7, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"_Bool", !7, i64 0}
!15 = !{i8 0, i8 2}
!16 = !{}
!17 = !{!18, !18, i64 0}
!18 = !{!"int", !7, i64 0}
!19 = !{i64 0, i64 1, !12, i64 8, i64 8, !20}
!20 = !{!21, !21, i64 0}
!21 = !{!"long", !7, i64 0}
!22 = !{!23, !7, i64 0}
!23 = !{!"exp8_sig16", !7, i64 0, !21, i64 8}
!24 = !{!23, !21, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.commonNaN = type { i8 }

; Function Attrs: nounwind uwtable
define dso_local void @f16_to_f128M(i16 %0, ptr noundef %1) local_unnamed_addr #0 {
  %3 = alloca %struct.commonNaN, align 1
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %3) #4
  %4 = lshr i16 %0, 10
  %5 = trunc nuw nsw i16 %4 to i8
  %6 = and i8 %5, 31
  %7 = and i16 %0, 1023
  switch i8 %6, label %28 [
    i8 31, label %8
    i8 0, label %17
  ]

8:                                                ; preds = %2
  %.not31 = icmp eq i16 %7, 0
  br i1 %.not31, label %13, label %9

9:                                                ; preds = %8
  %10 = and i16 %0, 512
  %.not33 = icmp eq i16 %10, 0
  br i1 %.not33, label %11, label %12

11:                                               ; preds = %9
  tail call void @softfloat_raiseFlags(i8 noundef zeroext 16) #4
  br label %12

12:                                               ; preds = %11, %9
  call void @softfloat_commonNaNToF128M(ptr noundef nonnull %3, ptr noundef %1)
  br label %42

13:                                               ; preds = %8
  %.lobit32 = lshr i16 %0, 15
  %14 = zext nneg i16 %.lobit32 to i32
  %15 = shl nuw i32 %14, 31
  %16 = or disjoint i32 %15, 2147418112
  br label %38

17:                                               ; preds = %2
  %.not29 = icmp eq i16 %7, 0
  br i1 %.not29, label %18, label %21

18:                                               ; preds = %17
  %.lobit = lshr i16 %0, 15
  %19 = zext nneg i16 %.lobit to i32
  %20 = shl nuw i32 %19, 31
  br label %38

21:                                               ; preds = %17
  %22 = zext nneg i16 %7 to i64
  %23 = tail call { i8, i64 } @softfloat_normSubnormalF16Sig(i64 noundef %22) #4
  %24 = extractvalue { i8, i64 } %23, 0
  %25 = extractvalue { i8, i64 } %23, 1
  %26 = add i8 %24, -1
  %27 = trunc i64 %25 to i16
  br label %28

28:                                               ; preds = %2, %21
  %.025 = phi i16 [ %27, %21 ], [ %7, %2 ]
  %.0 = phi i8 [ %26, %21 ], [ %6, %2 ]
  %.lobit30 = lshr i16 %0, 15
  %29 = zext nneg i16 %.lobit30 to i32
  %30 = shl nuw i32 %29, 31
  %31 = sext i8 %.0 to i32
  %32 = shl nsw i32 %31, 16
  %33 = zext i16 %.025 to i32
  %34 = shl nuw nsw i32 %33, 6
  %35 = or disjoint i32 %30, 1072693248
  %36 = add nuw nsw i32 %35, %34
  %37 = add i32 %36, %32
  br label %38

38:                                               ; preds = %28, %18, %13
  %.026 = phi i32 [ %16, %13 ], [ %37, %28 ], [ %20, %18 ]
  %39 = getelementptr inbounds i8, ptr %1, i64 12
  store i32 %.026, ptr %39, align 4, !tbaa !5
  %40 = getelementptr inbounds i8, ptr %1, i64 8
  store i32 0, ptr %40, align 4, !tbaa !5
  %41 = getelementptr inbounds i8, ptr %1, i64 4
  store i32 0, ptr %41, align 4, !tbaa !5
  store i32 0, ptr %1, align 4, !tbaa !5
  br label %42

42:                                               ; preds = %38, %12
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %3) #4
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @softfloat_raiseFlags(i8 noundef zeroext) local_unnamed_addr #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @softfloat_commonNaNToF128M(ptr noundef, ptr noundef) local_unnamed_addr #3

declare { i8, i64 } @softfloat_normSubnormalF16Sig(i64 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass