; LLVM IR from attractivechaos/klib :: kurl (sha1_final)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.sha1nfo = type { %union.anon, i8, %union.anon.0, i32, [64 x i8], [20 x i8] }
%union.anon = type { [16 x i32] }
%union.anon.0 = type { [5 x i32] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @sha1_add(ptr noundef, i8 noundef zeroext) #1

; Function Attrs: nounwind uwtable
define dso_local ptr @sha1_final(ptr noundef %0) #2 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  %5 = load ptr, ptr %2, align 8, !tbaa !5
  call void @sha1_add(ptr noundef %5, i8 noundef zeroext -128)
  br label %6

6:                                                ; preds = %12, %1
  %7 = load ptr, ptr %2, align 8, !tbaa !5
  %8 = getelementptr inbounds %struct.sha1nfo, ptr %7, i32 0, i32 1
  %9 = load i8, ptr %8, align 4, !tbaa !9
  %10 = zext i8 %9 to i32
  %11 = icmp ne i32 %10, 56
  br i1 %11, label %12, label %14

12:                                               ; preds = %6
  %13 = load ptr, ptr %2, align 8, !tbaa !5
  call void @sha1_add(ptr noundef %13, i8 noundef zeroext 0)
  br label %6, !llvm.loop !12

14:                                               ; preds = %6
  %15 = load ptr, ptr %2, align 8, !tbaa !5
  call void @sha1_add(ptr noundef %15, i8 noundef zeroext 0)
  %16 = load ptr, ptr %2, align 8, !tbaa !5
  call void @sha1_add(ptr noundef %16, i8 noundef zeroext 0)
  %17 = load ptr, ptr %2, align 8, !tbaa !5
  call void @sha1_add(ptr noundef %17, i8 noundef zeroext 0)
  %18 = load ptr, ptr %2, align 8, !tbaa !5
  %19 = load ptr, ptr %2, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.sha1nfo, ptr %19, i32 0, i32 3
  %21 = load i32, ptr %20, align 4, !tbaa !14
  %22 = lshr i32 %21, 29
  %23 = trunc i32 %22 to i8
  call void @sha1_add(ptr noundef %18, i8 noundef zeroext %23)
  %24 = load ptr, ptr %2, align 8, !tbaa !5
  %25 = load ptr, ptr %2, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.sha1nfo, ptr %25, i32 0, i32 3
  %27 = load i32, ptr %26, align 4, !tbaa !14
  %28 = lshr i32 %27, 21
  %29 = trunc i32 %28 to i8
  call void @sha1_add(ptr noundef %24, i8 noundef zeroext %29)
  %30 = load ptr, ptr %2, align 8, !tbaa !5
  %31 = load ptr, ptr %2, align 8, !tbaa !5
  %32 = getelementptr inbounds %struct.sha1nfo, ptr %31, i32 0, i32 3
  %33 = load i32, ptr %32, align 4, !tbaa !14
  %34 = lshr i32 %33, 13
  %35 = trunc i32 %34 to i8
  call void @sha1_add(ptr noundef %30, i8 noundef zeroext %35)
  %36 = load ptr, ptr %2, align 8, !tbaa !5
  %37 = load ptr, ptr %2, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.sha1nfo, ptr %37, i32 0, i32 3
  %39 = load i32, ptr %38, align 4, !tbaa !14
  %40 = lshr i32 %39, 5
  %41 = trunc i32 %40 to i8
  call void @sha1_add(ptr noundef %36, i8 noundef zeroext %41)
  %42 = load ptr, ptr %2, align 8, !tbaa !5
  %43 = load ptr, ptr %2, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.sha1nfo, ptr %43, i32 0, i32 3
  %45 = load i32, ptr %44, align 4, !tbaa !14
  %46 = shl i32 %45, 3
  %47 = trunc i32 %46 to i8
  call void @sha1_add(ptr noundef %42, i8 noundef zeroext %47)
  store i32 0, ptr %3, align 4, !tbaa !15
  br label %48

48:                                               ; preds = %76, %14
  %49 = load i32, ptr %3, align 4, !tbaa !15
  %50 = icmp slt i32 %49, 5
  br i1 %50, label %51, label %79

51:                                               ; preds = %48
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  %52 = load ptr, ptr %2, align 8, !tbaa !5
  %53 = getelementptr inbounds %struct.sha1nfo, ptr %52, i32 0, i32 2
  %54 = load i32, ptr %3, align 4, !tbaa !15
  %55 = sext i32 %54 to i64
  %56 = getelementptr inbounds [5 x i32], ptr %53, i64 0, i64 %55
  %57 = load i32, ptr %56, align 4, !tbaa !16
  store i32 %57, ptr %4, align 4, !tbaa !15
  %58 = load i32, ptr %4, align 4, !tbaa !15
  %59 = shl i32 %58, 24
  %60 = load i32, ptr %4, align 4, !tbaa !15
  %61 = shl i32 %60, 8
  %62 = and i32 %61, 16711680
  %63 = or i32 %59, %62
  %64 = load i32, ptr %4, align 4, !tbaa !15
  %65 = lshr i32 %64, 8
  %66 = and i32 %65, 65280
  %67 = or i32 %63, %66
  %68 = load i32, ptr %4, align 4, !tbaa !15
  %69 = lshr i32 %68, 24
  %70 = or i32 %67, %69
  %71 = load ptr, ptr %2, align 8, !tbaa !5
  %72 = getelementptr inbounds %struct.sha1nfo, ptr %71, i32 0, i32 2
  %73 = load i32, ptr %3, align 4, !tbaa !15
  %74 = sext i32 %73 to i64
  %75 = getelementptr inbounds [5 x i32], ptr %72, i64 0, i64 %74
  store i32 %70, ptr %75, align 4, !tbaa !16
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  br label %76

76:                                               ; preds = %51
  %77 = load i32, ptr %3, align 4, !tbaa !15
  %78 = add nsw i32 %77, 1
  store i32 %78, ptr %3, align 4, !tbaa !15
  br label %48, !llvm.loop !17

79:                                               ; preds = %48
  %80 = load ptr, ptr %2, align 8, !tbaa !5
  %81 = getelementptr inbounds %struct.sha1nfo, ptr %80, i32 0, i32 2
  %82 = getelementptr inbounds [20 x i8], ptr %81, i64 0, i64 0
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  ret ptr %82
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !7, i64 64}
!10 = !{!"sha1nfo", !7, i64 0, !7, i64 64, !7, i64 68, !11, i64 88, !7, i64 92, !7, i64 156}
!11 = !{!"int", !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = !{!10, !11, i64 88}
!15 = !{!11, !11, i64 0}
!16 = !{!7, !7, i64 0}
!17 = distinct !{!17, !13}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @sha1_add(ptr noundef, i8 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local noundef nonnull ptr @sha1_final(ptr noundef %0) local_unnamed_addr #1 {
  tail call void @sha1_add(ptr noundef %0, i8 noundef zeroext -128)
  %2 = getelementptr inbounds i8, ptr %0, i64 64
  %3 = load i8, ptr %2, align 4, !tbaa !5
  %.not26 = icmp eq i8 %3, 56
  br i1 %.not26, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %1, %.lr.ph
  tail call void @sha1_add(ptr noundef nonnull %0, i8 noundef zeroext 0)
  %4 = load i8, ptr %2, align 4, !tbaa !5
  %.not = icmp eq i8 %4, 56
  br i1 %.not, label %._crit_edge, label %.lr.ph, !llvm.loop !10

._crit_edge:                                      ; preds = %.lr.ph, %1
  tail call void @sha1_add(ptr noundef nonnull %0, i8 noundef zeroext 0)
  tail call void @sha1_add(ptr noundef nonnull %0, i8 noundef zeroext 0)
  tail call void @sha1_add(ptr noundef nonnull %0, i8 noundef zeroext 0)
  %5 = getelementptr inbounds i8, ptr %0, i64 88
  %6 = load i32, ptr %5, align 4, !tbaa !12
  %7 = lshr i32 %6, 29
  %8 = trunc nuw nsw i32 %7 to i8
  tail call void @sha1_add(ptr noundef nonnull %0, i8 noundef zeroext %8)
  %9 = load i32, ptr %5, align 4, !tbaa !12
  %10 = lshr i32 %9, 21
  %11 = trunc i32 %10 to i8
  tail call void @sha1_add(ptr noundef nonnull %0, i8 noundef zeroext %11)
  %12 = load i32, ptr %5, align 4, !tbaa !12
  %13 = lshr i32 %12, 13
  %14 = trunc i32 %13 to i8
  tail call void @sha1_add(ptr noundef nonnull %0, i8 noundef zeroext %14)
  %15 = load i32, ptr %5, align 4, !tbaa !12
  %16 = lshr i32 %15, 5
  %17 = trunc i32 %16 to i8
  tail call void @sha1_add(ptr noundef nonnull %0, i8 noundef zeroext %17)
  %18 = load i32, ptr %5, align 4, !tbaa !12
  %.tr = trunc i32 %18 to i8
  %19 = shl i8 %.tr, 3
  tail call void @sha1_add(ptr noundef nonnull %0, i8 noundef zeroext %19)
  %20 = getelementptr inbounds i8, ptr %0, i64 68
  %21 = load <4 x i32>, ptr %20, align 4, !tbaa !13
  %22 = tail call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %21)
  store <4 x i32> %22, ptr %20, align 4, !tbaa !13
  %23 = getelementptr inbounds i8, ptr %0, i64 84
  %24 = load i32, ptr %23, align 4, !tbaa !13
  %25 = tail call i32 @llvm.bswap.i32(i32 %24)
  store i32 %25, ptr %23, align 4, !tbaa !13
  ret ptr %20
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.bswap.i32(i32) #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare <4 x i32> @llvm.bswap.v4i32(<4 x i32>) #2

attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 64}
!6 = !{!"sha1nfo", !7, i64 0, !7, i64 64, !7, i64 68, !9, i64 88, !7, i64 92, !7, i64 156}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!"int", !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = !{!6, !9, i64 88}
!13 = !{!7, !7, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass