; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/utils/sc_mempool.ll (ZN7sc_core14sc_mempool_intC2Eiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_core::sc_mempool_int" = type <{ ptr, i32, i32, i32, [4 x i8] }>

@_ZL15use_default_new = external hidden global i8, align 1
@_ZN7sc_coreL10cell_sizesE = external hidden constant [10 x i32], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core14sc_mempool_intC2Eiii(ptr noundef nonnull align 8 dereferenceable(20) %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) unnamed_addr #1 align 2 personality ptr @__gxx_personality_v0 {
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !9
  store i32 %3, ptr %8, align 4, !tbaa !9
  %12 = load ptr, ptr %5, align 8
  %13 = getelementptr inbounds %"class.sc_core::sc_mempool_int", ptr %12, i32 0, i32 0
  store ptr null, ptr %13, align 8, !tbaa !11
  %14 = getelementptr inbounds %"class.sc_core::sc_mempool_int", ptr %12, i32 0, i32 1
  store i32 0, ptr %14, align 8, !tbaa !13
  %15 = getelementptr inbounds %"class.sc_core::sc_mempool_int", ptr %12, i32 0, i32 2
  store i32 0, ptr %15, align 4, !tbaa !14
  %16 = getelementptr inbounds %"class.sc_core::sc_mempool_int", ptr %12, i32 0, i32 3
  store i32 0, ptr %16, align 8, !tbaa !15
  %17 = call noundef zeroext i1 @_ZN7sc_coreL23compute_use_default_newEv()
  %18 = zext i1 %17 to i8
  store i8 %18, ptr @_ZL15use_default_new, align 1, !tbaa !16
  %19 = load i8, ptr @_ZL15use_default_new, align 1, !tbaa !16, !range !18, !noundef !19
  %20 = trunc i8 %19 to i1
  br i1 %20, label %70, label %21

21:                                               ; preds = %4
  %22 = load i32, ptr %7, align 4, !tbaa !9
  %23 = getelementptr inbounds %"class.sc_core::sc_mempool_int", ptr %12, i32 0, i32 1
  store i32 %22, ptr %23, align 8, !tbaa !13
  %24 = load i32, ptr %8, align 4, !tbaa !9
  %25 = getelementptr inbounds %"class.sc_core::sc_mempool_int", ptr %12, i32 0, i32 2
  store i32 %24, ptr %25, align 4, !tbaa !14
  %26 = load i32, ptr getelementptr inbounds ([10 x i32], ptr @_ZN7sc_coreL10cell_sizesE, i64 0, i64 9), align 4, !tbaa !9
  %27 = getelementptr inbounds %"class.sc_core::sc_mempool_int", ptr %12, i32 0, i32 3
  store i32 %26, ptr %27, align 8, !tbaa !15
  %28 = load i32, ptr %7, align 4, !tbaa !9
  %29 = add nsw i32 %28, 1
  %30 = sext i32 %29 to i64
  %31 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %30, i64 8)
  %32 = extractvalue { i64, i1 } %31, 1
  %33 = extractvalue { i64, i1 } %31, 0
  %34 = select i1 %32, i64 -1, i64 %33
  %35 = call noalias noundef nonnull ptr @_Znam(i64 noundef %34) #6
  %36 = getelementptr inbounds %"class.sc_core::sc_mempool_int", ptr %12, i32 0, i32 0
  store ptr %35, ptr %36, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #7
  store i32 1, ptr %9, align 4, !tbaa !9
  br label %37

37:                                               ; preds = %55, %21
  %38 = load i32, ptr %9, align 4, !tbaa !9
  %39 = load i32, ptr %7, align 4, !tbaa !9
  %40 = icmp sle i32 %38, %39
  br i1 %40, label %42, label %41

41:                                               ; preds = %37
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #7
  br label %62

42:                                               ; preds = %37
  %43 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 48) #6
  %44 = load i32, ptr %6, align 4, !tbaa !9
  %45 = load i32, ptr %9, align 4, !tbaa !9
  %46 = sext i32 %45 to i64
  %47 = getelementptr inbounds [10 x i32], ptr @_ZN7sc_coreL10cell_sizesE, i64 0, i64 %46
  %48 = load i32, ptr %47, align 4, !tbaa !9
  invoke void @_ZN7sc_core12sc_allocatorC1Eii(ptr noundef nonnull align 8 dereferenceable(44) %43, i32 noundef %44, i32 noundef %48)
          to label %49 unwind label %58

49:                                               ; preds = %42
  %50 = getelementptr inbounds %"class.sc_core::sc_mempool_int", ptr %12, i32 0, i32 0
  %51 = load ptr, ptr %50, align 8, !tbaa !11
  %52 = load i32, ptr %9, align 4, !tbaa !9
  %53 = sext i32 %52 to i64
  %54 = getelementptr inbounds ptr, ptr %51, i64 %53
  store ptr %43, ptr %54, align 8, !tbaa !5
  br label %55

55:                                               ; preds = %49
  %56 = load i32, ptr %9, align 4, !tbaa !9
  %57 = add nsw i32 %56, 1
  store i32 %57, ptr %9, align 4, !tbaa !9
  br label %37, !llvm.loop !20

58:                                               ; preds = %42
  %59 = landingpad { ptr, i32 }
          cleanup
  %60 = extractvalue { ptr, i32 } %59, 0
  store ptr %60, ptr %10, align 8
  %61 = extractvalue { ptr, i32 } %59, 1
  store i32 %61, ptr %11, align 4
  call void @_ZdlPvm(ptr noundef %43, i64 noundef 48) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #7
  br label %71

62:                                               ; preds = %41
  %63 = getelementptr inbounds %"class.sc_core::sc_mempool_int", ptr %12, i32 0, i32 0
  %64 = load ptr, ptr %63, align 8, !tbaa !11
  %65 = getelementptr inbounds ptr, ptr %64, i64 1
  %66 = load ptr, ptr %65, align 8, !tbaa !5
  %67 = getelementptr inbounds %"class.sc_core::sc_mempool_int", ptr %12, i32 0, i32 0
  %68 = load ptr, ptr %67, align 8, !tbaa !11
  %69 = getelementptr inbounds ptr, ptr %68, i64 0
  store ptr %66, ptr %69, align 8, !tbaa !5
  br label %70

70:                                               ; preds = %62, %4
  ret void

71:                                               ; preds = %58
  %72 = load ptr, ptr %10, align 8
  %73 = load i32, ptr %11, align 4
  %74 = insertvalue { ptr, i32 } poison, ptr %72, 0
  %75 = insertvalue { ptr, i32 } %74, i32 %73, 1
  resume { ptr, i32 } %75
}

; Function Attrs: mustprogress nounwind uwtable
declare hidden noundef zeroext i1 @_ZN7sc_coreL23compute_use_default_newEv() #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) #3

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) #4

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) #4

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) #5

declare void @_ZN7sc_core12sc_allocatorC1Eii(ptr, i32, i32)

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { builtin allocsize(0) }
attributes #7 = { nounwind }
attributes #8 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"_ZTSN7sc_core14sc_mempool_intE", !6, i64 0, !10, i64 8, !10, i64 12, !10, i64 16}
!13 = !{!12, !10, i64 8}
!14 = !{!12, !10, i64 12}
!15 = !{!12, !10, i64 16}
!16 = !{!17, !17, i64 0}
!17 = !{!"bool", !7, i64 0}
!18 = !{i8 0, i8 2}
!19 = !{}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZL15use_default_new = external hidden local_unnamed_addr global i8, align 1
@_ZN7sc_coreL10cell_sizesE = external hidden local_unnamed_addr constant [10 x i32], align 16

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core14sc_mempool_intC2Eiii(ptr nocapture noundef nonnull align 8 dereferenceable(20) %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(20) %0, i8 0, i64 20, i1 false)
  %5 = tail call noundef zeroext i1 @_ZN7sc_coreL23compute_use_default_newEv()
  %6 = zext i1 %5 to i8
  store i8 %6, ptr @_ZL15use_default_new, align 1, !tbaa !5
  br i1 %5, label %29, label %7

7:                                                ; preds = %4
  %8 = getelementptr inbounds i8, ptr %0, i64 16
  %9 = getelementptr inbounds i8, ptr %0, i64 12
  %10 = getelementptr inbounds i8, ptr %0, i64 8
  store i32 %2, ptr %10, align 8, !tbaa !9
  store i32 %3, ptr %9, align 4, !tbaa !13
  %11 = load i32, ptr getelementptr inbounds (i8, ptr @_ZN7sc_coreL10cell_sizesE, i64 36), align 4, !tbaa !14
  store i32 %11, ptr %8, align 8, !tbaa !15
  %12 = add i32 %2, 1
  %13 = zext i32 %12 to i64
  %14 = icmp slt i32 %2, -1
  %15 = shl nuw nsw i64 %13, 3
  %16 = select i1 %14, i64 -1, i64 %15
  %17 = tail call noalias noundef nonnull ptr @_Znam(i64 noundef %16) #5
  store ptr %17, ptr %0, align 8, !tbaa !16
  %.not11 = icmp slt i32 %2, 1
  br i1 %.not11, label %._crit_edge, label %.lr.ph

._crit_edge.loopexit:                             ; preds = %24
  %.pre = load ptr, ptr %0, align 8, !tbaa !16
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %7
  %18 = phi ptr [ %.pre, %._crit_edge.loopexit ], [ %17, %7 ]
  %19 = getelementptr inbounds i8, ptr %18, i64 8
  %20 = load ptr, ptr %19, align 8, !tbaa !17
  store ptr %20, ptr %18, align 8, !tbaa !17
  br label %29

.lr.ph:                                           ; preds = %7, %24
  %indvars.iv = phi i64 [ %indvars.iv.next, %24 ], [ 1, %7 ]
  %21 = tail call noalias noundef nonnull dereferenceable(48) ptr @_Znwm(i64 noundef 48) #5
  %22 = getelementptr inbounds [10 x i32], ptr @_ZN7sc_coreL10cell_sizesE, i64 0, i64 %indvars.iv
  %23 = load i32, ptr %22, align 4, !tbaa !14
  invoke void @_ZN7sc_core12sc_allocatorC1Eii(ptr noundef nonnull align 8 dereferenceable(44) %21, i32 noundef %1, i32 noundef %23)
          to label %24 unwind label %27

24:                                               ; preds = %.lr.ph
  %25 = load ptr, ptr %0, align 8, !tbaa !16
  %26 = getelementptr inbounds ptr, ptr %25, i64 %indvars.iv
  store ptr %21, ptr %26, align 8, !tbaa !17
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %13
  br i1 %exitcond.not, label %._crit_edge.loopexit, label %.lr.ph, !llvm.loop !18

27:                                               ; preds = %.lr.ph
  %28 = landingpad { ptr, i32 }
          cleanup
  tail call void @_ZdlPvm(ptr noundef nonnull %21, i64 noundef 48) #6
  resume { ptr, i32 } %28

29:                                               ; preds = %._crit_edge, %4
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare hidden noundef zeroext i1 @_ZN7sc_coreL23compute_use_default_newEv() local_unnamed_addr #1

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) local_unnamed_addr #2

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) local_unnamed_addr #2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) local_unnamed_addr #3

declare void @_ZN7sc_core12sc_allocatorC1Eii(ptr, i32, i32) local_unnamed_addr

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #4

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #5 = { builtin allocsize(0) }
attributes #6 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"bool", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !12, i64 8}
!10 = !{!"_ZTSN7sc_core14sc_mempool_intE", !11, i64 0, !12, i64 8, !12, i64 12, !12, i64 16}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!10, !12, i64 12}
!14 = !{!12, !12, i64 0}
!15 = !{!10, !12, i64 16}
!16 = !{!10, !11, i64 0}
!17 = !{!11, !11, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,MemCpyOptPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass