; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/utils/sc_hash.ll (ZN7sc_core13sc_phash_base4copyEPKS0_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_core::sc_phash_base_iter" = type <{ ptr, ptr, ptr, ptr, i32, [4 x i8] }>

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7sc_core13sc_phash_base5eraseEv(ptr noundef nonnull align 8 dereferenceable(56)) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core13sc_phash_base4copyEPKS0_(ptr noundef nonnull align 8 dereferenceable(56) %0, ptr noundef %1) #2 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca %"class.sc_core::sc_phash_base_iter", align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %8 = load ptr, ptr %3, align 8
  call void @_ZN7sc_core13sc_phash_base5eraseEv(ptr noundef nonnull align 8 dereferenceable(56) %8)
  call void @llvm.lifetime.start.p0(i64 40, ptr %5) #3
  %9 = load ptr, ptr %4, align 8, !tbaa !5
  call void @_ZN7sc_core18sc_phash_base_iterC2EPNS_13sc_phash_baseE(ptr noundef nonnull align 8 dereferenceable(36) %5, ptr noundef %9)
  br label %10

10:                                               ; preds = %22, %2
  %11 = invoke noundef zeroext i1 @_ZNK7sc_core18sc_phash_base_iter5emptyEv(ptr noundef nonnull align 8 dereferenceable(36) %5)
          to label %12 unwind label %23

12:                                               ; preds = %10
  %13 = xor i1 %11, true
  br i1 %13, label %14, label %27

14:                                               ; preds = %12
  %15 = invoke noundef ptr @_ZNK7sc_core18sc_phash_base_iter3keyEv(ptr noundef nonnull align 8 dereferenceable(36) %5)
          to label %16 unwind label %23

16:                                               ; preds = %14
  %17 = invoke noundef ptr @_ZNK7sc_core18sc_phash_base_iter8contentsEv(ptr noundef nonnull align 8 dereferenceable(36) %5)
          to label %18 unwind label %23

18:                                               ; preds = %16
  %19 = invoke noundef i32 @_ZN7sc_core13sc_phash_base6insertEPvS1_(ptr noundef nonnull align 8 dereferenceable(56) %8, ptr noundef %15, ptr noundef %17)
          to label %20 unwind label %23

20:                                               ; preds = %18
  br label %21

21:                                               ; preds = %20
  invoke void @_ZN7sc_core18sc_phash_base_iterppEi(ptr noundef nonnull align 8 dereferenceable(36) %5, i32 noundef 0)
          to label %22 unwind label %23

22:                                               ; preds = %21
  br label %10, !llvm.loop !9

23:                                               ; preds = %21, %18, %16, %14, %10
  %24 = landingpad { ptr, i32 }
          cleanup
  %25 = extractvalue { ptr, i32 } %24, 0
  store ptr %25, ptr %6, align 8
  %26 = extractvalue { ptr, i32 } %24, 1
  store i32 %26, ptr %7, align 4
  call void @_ZN7sc_core18sc_phash_base_iterD2Ev(ptr noundef nonnull align 8 dereferenceable(36) %5) #3
  call void @llvm.lifetime.end.p0(i64 40, ptr %5) #3
  br label %28

27:                                               ; preds = %12
  call void @_ZN7sc_core18sc_phash_base_iterD2Ev(ptr noundef nonnull align 8 dereferenceable(36) %5) #3
  call void @llvm.lifetime.end.p0(i64 40, ptr %5) #3
  ret void

28:                                               ; preds = %23
  %29 = load ptr, ptr %6, align 8
  %30 = load i32, ptr %7, align 4
  %31 = insertvalue { ptr, i32 } poison, ptr %29, 0
  %32 = insertvalue { ptr, i32 } %31, i32 %30, 1
  resume { ptr, i32 } %32
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7sc_core18sc_phash_base_iterC2EPNS_13sc_phash_baseE(ptr noundef nonnull align 8 dereferenceable(36), ptr noundef) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK7sc_core18sc_phash_base_iter5emptyEv(ptr noundef nonnull align 8 dereferenceable(36)) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZN7sc_core13sc_phash_base6insertEPvS1_(ptr noundef nonnull align 8 dereferenceable(56), ptr noundef, ptr noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNK7sc_core18sc_phash_base_iter3keyEv(ptr noundef nonnull align 8 dereferenceable(36)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNK7sc_core18sc_phash_base_iter8contentsEv(ptr noundef nonnull align 8 dereferenceable(36)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7sc_core18sc_phash_base_iterppEi(ptr noundef nonnull align 8 dereferenceable(36), i32 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7sc_core18sc_phash_base_iterD2Ev(ptr noundef nonnull align 8 dereferenceable(36)) unnamed_addr #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_core::sc_phash_base_iter" = type <{ ptr, ptr, ptr, ptr, i32, [4 x i8] }>

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7sc_core13sc_phash_base5eraseEv(ptr noundef nonnull align 8 dereferenceable(56)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core13sc_phash_base4copyEPKS0_(ptr noundef nonnull align 8 dereferenceable(56) %0, ptr noundef %1) local_unnamed_addr #2 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca %"class.sc_core::sc_phash_base_iter", align 8
  tail call void @_ZN7sc_core13sc_phash_base5eraseEv(ptr noundef nonnull align 8 dereferenceable(56) %0)
  call void @llvm.lifetime.start.p0(i64 40, ptr nonnull %3) #3
  call void @_ZN7sc_core18sc_phash_base_iterC2EPNS_13sc_phash_baseE(ptr noundef nonnull align 8 dereferenceable(36) %3, ptr noundef %1)
  %4 = call noundef zeroext i1 @_ZNK7sc_core18sc_phash_base_iter5emptyEv(ptr noundef nonnull align 8 dereferenceable(36) %3)
  br i1 %4, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %2, %8
  %5 = call noundef ptr @_ZNK7sc_core18sc_phash_base_iter3keyEv(ptr noundef nonnull align 8 dereferenceable(36) %3)
  %6 = call noundef ptr @_ZNK7sc_core18sc_phash_base_iter8contentsEv(ptr noundef nonnull align 8 dereferenceable(36) %3)
  %7 = invoke noundef i32 @_ZN7sc_core13sc_phash_base6insertEPvS1_(ptr noundef nonnull align 8 dereferenceable(56) %0, ptr noundef %5, ptr noundef %6)
          to label %8 unwind label %10

8:                                                ; preds = %.lr.ph
  call void @_ZN7sc_core18sc_phash_base_iterppEi(ptr noundef nonnull align 8 dereferenceable(36) %3, i32 noundef 0)
  %9 = call noundef zeroext i1 @_ZNK7sc_core18sc_phash_base_iter5emptyEv(ptr noundef nonnull align 8 dereferenceable(36) %3)
  br i1 %9, label %._crit_edge, label %.lr.ph, !llvm.loop !5

10:                                               ; preds = %.lr.ph
  %11 = landingpad { ptr, i32 }
          cleanup
  call void @_ZN7sc_core18sc_phash_base_iterD2Ev(ptr noundef nonnull align 8 dereferenceable(36) %3) #3
  call void @llvm.lifetime.end.p0(i64 40, ptr nonnull %3) #3
  resume { ptr, i32 } %11

._crit_edge:                                      ; preds = %8, %2
  call void @_ZN7sc_core18sc_phash_base_iterD2Ev(ptr noundef nonnull align 8 dereferenceable(36) %3) #3
  call void @llvm.lifetime.end.p0(i64 40, ptr nonnull %3) #3
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7sc_core18sc_phash_base_iterC2EPNS_13sc_phash_baseE(ptr noundef nonnull align 8 dereferenceable(36), ptr noundef) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK7sc_core18sc_phash_base_iter5emptyEv(ptr noundef nonnull align 8 dereferenceable(36)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZN7sc_core13sc_phash_base6insertEPvS1_(ptr noundef nonnull align 8 dereferenceable(56), ptr noundef, ptr noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNK7sc_core18sc_phash_base_iter3keyEv(ptr noundef nonnull align 8 dereferenceable(36)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNK7sc_core18sc_phash_base_iter8contentsEv(ptr noundef nonnull align 8 dereferenceable(36)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7sc_core18sc_phash_base_iterppEi(ptr noundef nonnull align 8 dereferenceable(36), i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7sc_core18sc_phash_base_iterD2Ev(ptr noundef nonnull align 8 dereferenceable(36)) unnamed_addr #1 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass