; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Universal (IScsiReceiveLoginRsp)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [154 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [20 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i64 @IScsiReceiveLoginRsp(ptr noundef %0) #1 {
  %2 = alloca i64, align 8
  %3 = alloca ptr, align 8
  %4 = alloca i64, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #3
  store ptr null, ptr %5, align 8, !tbaa !5
  %7 = load ptr, ptr %3, align 8, !tbaa !5
  %8 = call i64 @IScsiReceivePdu(ptr noundef %7, ptr noundef %5, ptr noundef null, i8 noundef zeroext 0, i8 noundef zeroext 0, ptr noundef null)
  store i64 %8, ptr %4, align 8, !tbaa !9
  %9 = load i64, ptr %4, align 8, !tbaa !9
  %10 = icmp slt i64 %9, 0
  br i1 %10, label %11, label %13

11:                                               ; preds = %1
  %12 = load i64, ptr %4, align 8, !tbaa !9
  store i64 %12, ptr %2, align 8
  store i32 1, ptr %6, align 4
  br label %30

13:                                               ; preds = %1
  br label %14

14:                                               ; preds = %13
  %15 = call zeroext i8 @DebugAssertEnabled()
  %16 = icmp ne i8 %15, 0
  br i1 %16, label %17, label %22

17:                                               ; preds = %14
  %18 = load ptr, ptr %5, align 8, !tbaa !5
  %19 = icmp ne ptr %18, null
  br i1 %19, label %21, label %20

20:                                               ; preds = %17
  call void @DebugAssert(ptr noundef @.str, i64 noundef 408, ptr noundef @.str.1)
  br label %21

21:                                               ; preds = %20, %17
  br label %22

22:                                               ; preds = %21, %14
  br label %23

23:                                               ; preds = %22
  br label %24

24:                                               ; preds = %23
  %25 = load ptr, ptr %3, align 8, !tbaa !5
  %26 = load ptr, ptr %5, align 8, !tbaa !5
  %27 = call i64 @IScsiProcessLoginRsp(ptr noundef %25, ptr noundef %26)
  store i64 %27, ptr %4, align 8, !tbaa !9
  %28 = load ptr, ptr %5, align 8, !tbaa !5
  call void @NetbufFree(ptr noundef %28)
  %29 = load i64, ptr %4, align 8, !tbaa !9
  store i64 %29, ptr %2, align 8
  store i32 1, ptr %6, align 4
  br label %30

30:                                               ; preds = %24, %11
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #3
  %31 = load i64, ptr %2, align 8
  ret i64 %31
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @NetbufFree(ptr noundef) #2

; Function Attrs: nounwind uwtable
declare dso_local i64 @IScsiReceivePdu(ptr noundef, ptr noundef, ptr noundef, i8 noundef zeroext, i8 noundef zeroext, ptr noundef) #1

declare zeroext i8 @DebugAssertEnabled() #2

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) #2

; Function Attrs: nounwind uwtable
declare dso_local i64 @IScsiProcessLoginRsp(ptr noundef, ptr noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [154 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [20 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i64 @IScsiReceiveLoginRsp(ptr noundef %0) local_unnamed_addr #1 {
  %2 = alloca ptr, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
  store ptr null, ptr %2, align 8, !tbaa !5
  %3 = call i64 @IScsiReceivePdu(ptr noundef %0, ptr noundef nonnull %2, ptr noundef null, i8 noundef zeroext 0, i8 noundef zeroext 0, ptr noundef null)
  %4 = icmp slt i64 %3, 0
  br i1 %4, label %15, label %5

5:                                                ; preds = %1
  %6 = call zeroext i8 @DebugAssertEnabled() #3
  %7 = icmp eq i8 %6, 0
  %8 = load ptr, ptr %2, align 8
  %9 = icmp ne ptr %8, null
  %or.cond = select i1 %7, i1 true, i1 %9
  br i1 %or.cond, label %11, label %10

10:                                               ; preds = %5
  call void @DebugAssert(ptr noundef nonnull @.str, i64 noundef 408, ptr noundef nonnull @.str.1) #3
  %.pre = load ptr, ptr %2, align 8, !tbaa !5
  br label %11

11:                                               ; preds = %10, %5
  %12 = phi ptr [ %.pre, %10 ], [ %8, %5 ]
  %13 = call i64 @IScsiProcessLoginRsp(ptr noundef %0, ptr noundef %12)
  %14 = load ptr, ptr %2, align 8, !tbaa !5
  call void @NetbufFree(ptr noundef %14) #3
  br label %15

15:                                               ; preds = %1, %11
  %.0 = phi i64 [ %13, %11 ], [ %3, %1 ]
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
  ret i64 %.0
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @NetbufFree(ptr noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
declare dso_local i64 @IScsiReceivePdu(ptr noundef, ptr noundef, ptr noundef, i8 noundef zeroext, i8 noundef zeroext, ptr noundef) local_unnamed_addr #1

declare zeroext i8 @DebugAssertEnabled() local_unnamed_addr #2

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
declare dso_local i64 @IScsiProcessLoginRsp(ptr noundef, ptr noundef) local_unnamed_addr #1

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass