; LLVM IR from gem5/gem5 :: ext/drampower/src (CmdScheduler)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.Data::cmdScheduler::physicalAddr" = type { i64, i64, i64, i64 }
%"class.Data::cmdScheduler::trans" = type { i64, i64, i64 }
%"class.Data::cmdScheduler" = type { %"class.std::vector", %"class.Data::cmdScheduler::commandItem", %"class.Data::cmdScheduler::commandItem", %"class.Data::cmdScheduler::commandItem", %"class.std::vector.3", %"class.std::vector.3", %"class.std::vector.8", %"class.std::vector.3", %"class.std::vector.3", i32, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i8, i64, %"class.std::basic_ofstream" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Data::cmdScheduler::trans, std::allocator<Data::cmdScheduler::trans>>::_Vector_impl" }
%"struct.std::_Vector_base<Data::cmdScheduler::trans, std::allocator<Data::cmdScheduler::trans>>::_Vector_impl" = type { %"struct.std::_Vector_base<Data::cmdScheduler::trans, std::allocator<Data::cmdScheduler::trans>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Data::cmdScheduler::trans, std::allocator<Data::cmdScheduler::trans>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.Data::cmdScheduler::commandItem" = type { i64, i64, i64, %"class.std::__cxx11::basic_string", %"class.Data::cmdScheduler::physicalAddr" }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<std::vector<Data::cmdScheduler::commandItem>, std::allocator<std::vector<Data::cmdScheduler::commandItem>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<Data::cmdScheduler::commandItem>, std::allocator<std::vector<Data::cmdScheduler::commandItem>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<Data::cmdScheduler::commandItem>, std::allocator<std::vector<Data::cmdScheduler::commandItem>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<Data::cmdScheduler::commandItem>, std::allocator<std::vector<Data::cmdScheduler::commandItem>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<Data::cmdScheduler::commandItem, std::allocator<Data::cmdScheduler::commandItem>>::_Vector_impl" }
%"struct.std::_Vector_base<Data::cmdScheduler::commandItem, std::allocator<Data::cmdScheduler::commandItem>>::_Vector_impl" = type { %"struct.std::_Vector_base<Data::cmdScheduler::commandItem, std::allocator<Data::cmdScheduler::commandItem>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Data::cmdScheduler::commandItem, std::allocator<Data::cmdScheduler::commandItem>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::basic_ofstream" = type { %"class.std::basic_ostream.base", %"class.std::basic_filebuf", %"class.std::basic_ios" }
%"class.std::basic_ostream.base" = type { ptr }
%"class.std::basic_filebuf" = type { %"class.std::basic_streambuf", %union.pthread_mutex_t, %"class.std::__basic_file", i32, %struct.__mbstate_t, %struct.__mbstate_t, %struct.__mbstate_t, ptr, i64, i8, i8, i8, i8, ptr, ptr, i8, ptr, ptr, i64, ptr, ptr }
%"class.std::basic_streambuf" = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, %"class.std::locale" }
%"class.std::locale" = type { ptr }
%union.pthread_mutex_t = type { %struct.__pthread_mutex_s }
%struct.__pthread_mutex_s = type { i32, i32, i32, i32, i32, i16, i16, %struct.__pthread_internal_list }
%struct.__pthread_internal_list = type { ptr, ptr }
%"class.std::__basic_file" = type <{ ptr, i8, [7 x i8] }>
%struct.__mbstate_t = type { i32, %union.anon.13 }
%union.anon.13 = type { i32 }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.Data::MemorySpecification" = type { ptr, %"class.std::__cxx11::basic_string", %"class.Data::MemoryType", [4 x i8], %"class.Data::MemArchitectureSpec", %"class.Data::MemTimingSpec", %"class.Data::MemPowerSpec", %"class.Data::Parametrisable" }
%"class.Data::MemoryType" = type { i32 }
%"class.Data::MemArchitectureSpec" = type <{ ptr, i64, i64, i64, i64, i64, i64, i64, i64, i8, i8, i8, [5 x i8], %"class.Data::Parametrisable" }>
%"class.Data::MemTimingSpec" = type { ptr, double, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, double, %"class.Data::Parametrisable" }
%"class.Data::MemPowerSpec" = type { ptr, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, %"class.Data::Parametrisable" }
%"class.Data::Parametrisable" = type { ptr, %"class.std::vector.14" }
%"class.std::vector.14" = type { %"struct.std::_Vector_base.15" }
%"struct.std::_Vector_base.15" = type { %"struct.std::_Vector_base<Data::Parameter, std::allocator<Data::Parameter>>::_Vector_impl" }
%"struct.std::_Vector_base<Data::Parameter, std::allocator<Data::Parameter>>::_Vector_impl" = type { %"struct.std::_Vector_base<Data::Parameter, std::allocator<Data::Parameter>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Data::Parameter, std::allocator<Data::Parameter>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Data12cmdScheduler9memoryMapENS0_5transERKNS_19MemorySpecificationE(ptr dead_on_unwind noalias writable sret(%"class.Data::cmdScheduler::physicalAddr") align 8 %0, ptr noundef nonnull align 8 dereferenceable(1080) %1, ptr noundef byval(%"class.Data::cmdScheduler::trans") align 8 %2, ptr noundef nonnull align 8 dereferenceable(736) %3) #1 align 2 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  %13 = alloca i64, align 8
  %14 = alloca i64, align 8
  %15 = alloca i64, align 8
  %16 = alloca i64, align 8
  %17 = alloca i64, align 8
  %18 = alloca i64, align 8
  %19 = alloca i64, align 8
  %20 = alloca i64, align 8
  %21 = alloca i64, align 8
  %22 = alloca i64, align 8
  %23 = alloca i64, align 8
  %24 = alloca i64, align 8
  %25 = alloca i64, align 8
  %26 = alloca i64, align 8
  %27 = alloca i64, align 8
  store ptr %1, ptr %5, align 8, !tbaa !5
  store ptr %3, ptr %6, align 8, !tbaa !5
  %28 = load ptr, ptr %5, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  %29 = getelementptr inbounds %"class.Data::cmdScheduler::trans", ptr %2, i32 0, i32 2
  %30 = load i64, ptr %29, align 8, !tbaa !9
  store i64 %30, ptr %7, align 8, !tbaa !12
  %31 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 12
  %32 = load i64, ptr %31, align 8, !tbaa !13
  %33 = icmp sgt i64 %32, 1
  br i1 %33, label %34, label %166

34:                                               ; preds = %4
  %35 = load ptr, ptr %6, align 8, !tbaa !5
  %36 = getelementptr inbounds %"class.Data::MemorySpecification", ptr %35, i32 0, i32 2
  %37 = call noundef i32 @_ZNK4Data10MemoryTypecvNS0_12MemoryType_tEEv(ptr noundef nonnull align 4 dereferenceable(4) %36)
  %38 = icmp eq i32 %37, 2
  br i1 %38, label %39, label %166

39:                                               ; preds = %34
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  %40 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 24
  %41 = load i64, ptr %40, align 8, !tbaa !41
  %42 = call noundef i64 @_ZN4Data12cmdScheduler8uintLog2Em(ptr noundef nonnull align 8 dereferenceable(1080) %28, i64 noundef %41)
  store i64 %42, ptr %8, align 8, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  %43 = load i64, ptr %8, align 8, !tbaa !12
  %44 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 10
  %45 = load i64, ptr %44, align 8, !tbaa !42
  %46 = icmp sgt i64 %45, 1
  br i1 %46, label %47, label %51

47:                                               ; preds = %39
  %48 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 10
  %49 = load i64, ptr %48, align 8, !tbaa !42
  %50 = call noundef i64 @_ZN4Data12cmdScheduler8uintLog2Em(ptr noundef nonnull align 8 dereferenceable(1080) %28, i64 noundef %49)
  br label %52

51:                                               ; preds = %39
  br label %52

52:                                               ; preds = %51, %47
  %53 = phi i64 [ %50, %47 ], [ 0, %51 ]
  %54 = add i64 %43, %53
  %55 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 12
  %56 = load i64, ptr %55, align 8, !tbaa !13
  %57 = icmp sgt i64 %56, 1
  br i1 %57, label %58, label %62

58:                                               ; preds = %52
  %59 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 12
  %60 = load i64, ptr %59, align 8, !tbaa !13
  %61 = call noundef i64 @_ZN4Data12cmdScheduler8uintLog2Em(ptr noundef nonnull align 8 dereferenceable(1080) %28, i64 noundef %60)
  br label %63

62:                                               ; preds = %52
  br label %63

63:                                               ; preds = %62, %58
  %64 = phi i64 [ %61, %58 ], [ 0, %62 ]
  %65 = add i64 %54, %64
  store i64 %65, ptr %9, align 8, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  %66 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 23
  %67 = load i64, ptr %66, align 8, !tbaa !43
  %68 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 10
  %69 = load i64, ptr %68, align 8, !tbaa !42
  %70 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 26
  %71 = load i64, ptr %70, align 8, !tbaa !44
  %72 = mul nsw i64 %69, %71
  %73 = sdiv i64 %67, %72
  %74 = sub nsw i64 %73, 1
  %75 = load i64, ptr %9, align 8, !tbaa !12
  %76 = shl i64 %74, %75
  store i64 %76, ptr %10, align 8, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  %77 = load i64, ptr %7, align 8, !tbaa !12
  %78 = load i64, ptr %10, align 8, !tbaa !12
  %79 = and i64 %77, %78
  %80 = load i64, ptr %8, align 8, !tbaa !12
  %81 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 12
  %82 = load i64, ptr %81, align 8, !tbaa !13
  %83 = icmp sgt i64 %82, 1
  br i1 %83, label %84, label %88

84:                                               ; preds = %63
  %85 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 12
  %86 = load i64, ptr %85, align 8, !tbaa !13
  %87 = call noundef i64 @_ZN4Data12cmdScheduler8uintLog2Em(ptr noundef nonnull align 8 dereferenceable(1080) %28, i64 noundef %86)
  br label %89

88:                                               ; preds = %63
  br label %89

89:                                               ; preds = %88, %84
  %90 = phi i64 [ %87, %84 ], [ 0, %88 ]
  %91 = add i64 %80, %90
  %92 = lshr i64 %79, %91
  store i64 %92, ptr %11, align 8, !tbaa !12
  %93 = load i64, ptr %11, align 8, !tbaa !12
  %94 = getelementptr inbounds %"class.Data::cmdScheduler::physicalAddr", ptr %0, i32 0, i32 1
  store i64 %93, ptr %94, align 8, !tbaa !45
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #3
  %95 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 25
  %96 = load i64, ptr %95, align 8, !tbaa !46
  %97 = call noundef i64 @_ZN4Data12cmdScheduler8uintLog2Em(ptr noundef nonnull align 8 dereferenceable(1080) %28, i64 noundef %96)
  store i64 %97, ptr %12, align 8, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #3
  %98 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 26
  %99 = load i64, ptr %98, align 8, !tbaa !44
  %100 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 12
  %101 = load i64, ptr %100, align 8, !tbaa !13
  %102 = sdiv i64 %99, %101
  %103 = sub nsw i64 %102, 1
  %104 = load i64, ptr %12, align 8, !tbaa !12
  %105 = shl i64 %103, %104
  store i64 %105, ptr %13, align 8, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #3
  %106 = load i64, ptr %7, align 8, !tbaa !12
  %107 = load i64, ptr %13, align 8, !tbaa !12
  %108 = and i64 %106, %107
  %109 = load i64, ptr %12, align 8, !tbaa !12
  %110 = lshr i64 %108, %109
  store i64 %110, ptr %14, align 8, !tbaa !12
  %111 = load i64, ptr %14, align 8, !tbaa !12
  %112 = getelementptr inbounds %"class.Data::cmdScheduler::physicalAddr", ptr %0, i32 0, i32 2
  store i64 %111, ptr %112, align 8, !tbaa !47
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #3
  %113 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 11
  %114 = load i64, ptr %113, align 8, !tbaa !48
  %115 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 25
  %116 = load i64, ptr %115, align 8, !tbaa !46
  %117 = mul nsw i64 %114, %116
  %118 = call noundef i64 @_ZN4Data12cmdScheduler8uintLog2Em(ptr noundef nonnull align 8 dereferenceable(1080) %28, i64 noundef %117)
  %119 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 10
  %120 = load i64, ptr %119, align 8, !tbaa !42
  %121 = icmp sgt i64 %120, 1
  br i1 %121, label %122, label %126

122:                                              ; preds = %89
  %123 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 10
  %124 = load i64, ptr %123, align 8, !tbaa !42
  %125 = call noundef i64 @_ZN4Data12cmdScheduler8uintLog2Em(ptr noundef nonnull align 8 dereferenceable(1080) %28, i64 noundef %124)
  br label %127

126:                                              ; preds = %89
  br label %127

127:                                              ; preds = %126, %122
  %128 = phi i64 [ %125, %122 ], [ 0, %126 ]
  %129 = add i64 %118, %128
  %130 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 12
  %131 = load i64, ptr %130, align 8, !tbaa !13
  %132 = icmp sgt i64 %131, 1
  br i1 %132, label %133, label %137

133:                                              ; preds = %127
  %134 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 12
  %135 = load i64, ptr %134, align 8, !tbaa !13
  %136 = call noundef i64 @_ZN4Data12cmdScheduler8uintLog2Em(ptr noundef nonnull align 8 dereferenceable(1080) %28, i64 noundef %135)
  br label %138

137:                                              ; preds = %127
  br label %138

138:                                              ; preds = %137, %133
  %139 = phi i64 [ %136, %133 ], [ 0, %137 ]
  %140 = add i64 %129, %139
  store i64 %140, ptr %15, align 8, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #3
  %141 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 24
  %142 = load i64, ptr %141, align 8, !tbaa !41
  %143 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 11
  %144 = load i64, ptr %143, align 8, !tbaa !48
  %145 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 25
  %146 = load i64, ptr %145, align 8, !tbaa !46
  %147 = mul nsw i64 %144, %146
  %148 = sdiv i64 %142, %147
  %149 = sub nsw i64 %148, 1
  %150 = load i64, ptr %15, align 8, !tbaa !12
  %151 = shl i64 %149, %150
  store i64 %151, ptr %16, align 8, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #3
  %152 = load i64, ptr %7, align 8, !tbaa !12
  %153 = load i64, ptr %16, align 8, !tbaa !12
  %154 = and i64 %152, %153
  %155 = load i64, ptr %15, align 8, !tbaa !12
  %156 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 11
  %157 = load i64, ptr %156, align 8, !tbaa !48
  %158 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 25
  %159 = load i64, ptr %158, align 8, !tbaa !46
  %160 = mul i64 %157, %159
  %161 = call noundef i64 @_ZN4Data12cmdScheduler8uintLog2Em(ptr noundef nonnull align 8 dereferenceable(1080) %28, i64 noundef %160)
  %162 = sub i64 %155, %161
  %163 = lshr i64 %154, %162
  store i64 %163, ptr %17, align 8, !tbaa !12
  %164 = load i64, ptr %17, align 8, !tbaa !12
  %165 = getelementptr inbounds %"class.Data::cmdScheduler::physicalAddr", ptr %0, i32 0, i32 3
  store i64 %164, ptr %165, align 8, !tbaa !49
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  br label %240

166:                                              ; preds = %34, %4
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #3
  %167 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 24
  %168 = load i64, ptr %167, align 8, !tbaa !41
  %169 = call noundef i64 @_ZN4Data12cmdScheduler8uintLog2Em(ptr noundef nonnull align 8 dereferenceable(1080) %28, i64 noundef %168)
  store i64 %169, ptr %18, align 8, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 8, ptr %19) #3
  %170 = load i64, ptr %18, align 8, !tbaa !12
  %171 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 10
  %172 = load i64, ptr %171, align 8, !tbaa !42
  %173 = icmp sgt i64 %172, 1
  br i1 %173, label %174, label %178

174:                                              ; preds = %166
  %175 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 10
  %176 = load i64, ptr %175, align 8, !tbaa !42
  %177 = call noundef i64 @_ZN4Data12cmdScheduler8uintLog2Em(ptr noundef nonnull align 8 dereferenceable(1080) %28, i64 noundef %176)
  br label %179

178:                                              ; preds = %166
  br label %179

179:                                              ; preds = %178, %174
  %180 = phi i64 [ %177, %174 ], [ 0, %178 ]
  %181 = add i64 %170, %180
  store i64 %181, ptr %19, align 8, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 8, ptr %20) #3
  %182 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 23
  %183 = load i64, ptr %182, align 8, !tbaa !43
  %184 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 10
  %185 = load i64, ptr %184, align 8, !tbaa !42
  %186 = sdiv i64 %183, %185
  %187 = sub nsw i64 %186, 1
  %188 = load i64, ptr %19, align 8, !tbaa !12
  %189 = shl i64 %187, %188
  store i64 %189, ptr %20, align 8, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 8, ptr %21) #3
  %190 = load i64, ptr %7, align 8, !tbaa !12
  %191 = load i64, ptr %20, align 8, !tbaa !12
  %192 = and i64 %190, %191
  %193 = load i64, ptr %18, align 8, !tbaa !12
  %194 = lshr i64 %192, %193
  store i64 %194, ptr %21, align 8, !tbaa !12
  %195 = load i64, ptr %21, align 8, !tbaa !12
  %196 = getelementptr inbounds %"class.Data::cmdScheduler::physicalAddr", ptr %0, i32 0, i32 1
  store i64 %195, ptr %196, align 8, !tbaa !45
  call void @llvm.lifetime.start.p0(i64 8, ptr %22) #3
  %197 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 11
  %198 = load i64, ptr %197, align 8, !tbaa !48
  %199 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 25
  %200 = load i64, ptr %199, align 8, !tbaa !46
  %201 = mul nsw i64 %198, %200
  %202 = call noundef i64 @_ZN4Data12cmdScheduler8uintLog2Em(ptr noundef nonnull align 8 dereferenceable(1080) %28, i64 noundef %201)
  %203 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 10
  %204 = load i64, ptr %203, align 8, !tbaa !42
  %205 = icmp sgt i64 %204, 1
  br i1 %205, label %206, label %210

206:                                              ; preds = %179
  %207 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 10
  %208 = load i64, ptr %207, align 8, !tbaa !42
  %209 = call noundef i64 @_ZN4Data12cmdScheduler8uintLog2Em(ptr noundef nonnull align 8 dereferenceable(1080) %28, i64 noundef %208)
  br label %211

210:                                              ; preds = %179
  br label %211

211:                                              ; preds = %210, %206
  %212 = phi i64 [ %209, %206 ], [ 0, %210 ]
  %213 = add i64 %202, %212
  store i64 %213, ptr %22, align 8, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 8, ptr %23) #3
  %214 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 24
  %215 = load i64, ptr %214, align 8, !tbaa !41
  %216 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 11
  %217 = load i64, ptr %216, align 8, !tbaa !48
  %218 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 25
  %219 = load i64, ptr %218, align 8, !tbaa !46
  %220 = mul nsw i64 %217, %219
  %221 = sdiv i64 %215, %220
  %222 = sub nsw i64 %221, 1
  %223 = load i64, ptr %22, align 8, !tbaa !12
  %224 = shl i64 %222, %223
  store i64 %224, ptr %23, align 8, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 8, ptr %24) #3
  %225 = load i64, ptr %7, align 8, !tbaa !12
  %226 = load i64, ptr %23, align 8, !tbaa !12
  %227 = and i64 %225, %226
  %228 = load i64, ptr %22, align 8, !tbaa !12
  %229 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 11
  %230 = load i64, ptr %229, align 8, !tbaa !48
  %231 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 25
  %232 = load i64, ptr %231, align 8, !tbaa !46
  %233 = mul nsw i64 %230, %232
  %234 = call noundef i64 @_ZN4Data12cmdScheduler8uintLog2Em(ptr noundef nonnull align 8 dereferenceable(1080) %28, i64 noundef %233)
  %235 = sub i64 %228, %234
  %236 = lshr i64 %227, %235
  store i64 %236, ptr %24, align 8, !tbaa !12
  %237 = load i64, ptr %24, align 8, !tbaa !12
  %238 = getelementptr inbounds %"class.Data::cmdScheduler::physicalAddr", ptr %0, i32 0, i32 3
  store i64 %237, ptr %238, align 8, !tbaa !49
  %239 = getelementptr inbounds %"class.Data::cmdScheduler::physicalAddr", ptr %0, i32 0, i32 2
  store i64 0, ptr %239, align 8, !tbaa !47
  call void @llvm.lifetime.end.p0(i64 8, ptr %24) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %23) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %22) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %19) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #3
  br label %240

240:                                              ; preds = %211, %138
  call void @llvm.lifetime.start.p0(i64 8, ptr %25) #3
  %241 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 24
  %242 = load i64, ptr %241, align 8, !tbaa !41
  %243 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %28, i32 0, i32 23
  %244 = load i64, ptr %243, align 8, !tbaa !43
  %245 = mul nsw i64 %242, %244
  %246 = call noundef i64 @_ZN4Data12cmdScheduler8uintLog2Em(ptr noundef nonnull align 8 dereferenceable(1080) %28, i64 noundef %245)
  store i64 %246, ptr %25, align 8, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 8, ptr %26) #3
  %247 = load ptr, ptr %6, align 8, !tbaa !5
  %248 = getelementptr inbounds %"class.Data::MemorySpecification", ptr %247, i32 0, i32 4
  %249 = getelementptr inbounds %"class.Data::MemArchitectureSpec", ptr %248, i32 0, i32 6
  %250 = load i64, ptr %249, align 8, !tbaa !50
  %251 = sub nsw i64 %250, 1
  %252 = load i64, ptr %25, align 8, !tbaa !12
  %253 = shl i64 %251, %252
  store i64 %253, ptr %26, align 8, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 8, ptr %27) #3
  %254 = load i64, ptr %7, align 8, !tbaa !12
  %255 = load i64, ptr %26, align 8, !tbaa !12
  %256 = and i64 %254, %255
  %257 = load i64, ptr %25, align 8, !tbaa !12
  %258 = lshr i64 %256, %257
  store i64 %258, ptr %27, align 8, !tbaa !12
  %259 = load i64, ptr %27, align 8, !tbaa !12
  %260 = getelementptr inbounds %"class.Data::cmdScheduler::physicalAddr", ptr %0, i32 0, i32 0
  store i64 %259, ptr %260, align 8, !tbaa !58
  call void @llvm.lifetime.end.p0(i64 8, ptr %27) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %26) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %25) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4Data10MemoryTypecvNS0_12MemoryType_tEEv(ptr noundef nonnull align 4 dereferenceable(4)) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_ZN4Data12cmdScheduler8uintLog2Em(ptr noundef nonnull align 8 dereferenceable(1080), i64 noundef) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 16}
!10 = !{!"_ZTSN4Data12cmdScheduler5transE", !11, i64 0, !11, i64 8, !11, i64 16}
!11 = !{!"long", !7, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!14, !11, i64 432}
!14 = !{!"_ZTSN4Data12cmdSchedulerE", !15, i64 0, !19, i64 24, !19, i64 112, !19, i64 200, !23, i64 288, !23, i64 312, !27, i64 336, !23, i64 360, !23, i64 384, !31, i64 408, !11, i64 416, !11, i64 424, !11, i64 432, !11, i64 440, !11, i64 448, !11, i64 456, !11, i64 464, !11, i64 472, !11, i64 480, !11, i64 488, !11, i64 496, !11, i64 504, !11, i64 512, !11, i64 520, !11, i64 528, !11, i64 536, !11, i64 544, !32, i64 552, !11, i64 560, !33, i64 568}
!15 = !{!"_ZTSSt6vectorIN4Data12cmdScheduler5transESaIS2_EE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseIN4Data12cmdScheduler5transESaIS2_EE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIN4Data12cmdScheduler5transESaIS2_EE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIN4Data12cmdScheduler5transESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!19 = !{!"_ZTSN4Data12cmdScheduler11commandItemE", !11, i64 0, !11, i64 8, !11, i64 16, !20, i64 24, !22, i64 56}
!20 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !21, i64 0, !11, i64 8, !7, i64 16}
!21 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!22 = !{!"_ZTSN4Data12cmdScheduler12physicalAddrE", !11, i64 0, !11, i64 8, !11, i64 16, !11, i64 24}
!23 = !{!"_ZTSSt6vectorIN4Data12cmdScheduler11commandItemESaIS2_EE", !24, i64 0}
!24 = !{!"_ZTSSt12_Vector_baseIN4Data12cmdScheduler11commandItemESaIS2_EE", !25, i64 0}
!25 = !{!"_ZTSNSt12_Vector_baseIN4Data12cmdScheduler11commandItemESaIS2_EE12_Vector_implE", !26, i64 0}
!26 = !{!"_ZTSNSt12_Vector_baseIN4Data12cmdScheduler11commandItemESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!27 = !{!"_ZTSSt6vectorIS_IN4Data12cmdScheduler11commandItemESaIS2_EESaIS4_EE", !28, i64 0}
!28 = !{!"_ZTSSt12_Vector_baseISt6vectorIN4Data12cmdScheduler11commandItemESaIS3_EESaIS5_EE", !29, i64 0}
!29 = !{!"_ZTSNSt12_Vector_baseISt6vectorIN4Data12cmdScheduler11commandItemESaIS3_EESaIS5_EE12_Vector_implE", !30, i64 0}
!30 = !{!"_ZTSNSt12_Vector_baseISt6vectorIN4Data12cmdScheduler11commandItemESaIS3_EESaIS5_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!31 = !{!"int", !7, i64 0}
!32 = !{!"bool", !7, i64 0}
!33 = !{!"_ZTSSt14basic_ofstreamIcSt11char_traitsIcEE", !34, i64 0, !35, i64 8}
!34 = !{!"_ZTSSo"}
!35 = !{!"_ZTSSt13basic_filebufIcSt11char_traitsIcEE", !36, i64 0, !7, i64 64, !38, i64 104, !39, i64 120, !40, i64 124, !40, i64 132, !40, i64 140, !6, i64 152, !11, i64 160, !32, i64 168, !32, i64 169, !32, i64 170, !7, i64 171, !6, i64 176, !6, i64 184, !32, i64 192, !6, i64 200, !6, i64 208, !11, i64 216, !6, i64 224, !6, i64 232}
!36 = !{!"_ZTSSt15basic_streambufIcSt11char_traitsIcEE", !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !37, i64 56}
!37 = !{!"_ZTSSt6locale", !6, i64 0}
!38 = !{!"_ZTSSt12__basic_fileIcE", !6, i64 0, !32, i64 8}
!39 = !{!"_ZTSSt13_Ios_Openmode", !7, i64 0}
!40 = !{!"_ZTS11__mbstate_t", !31, i64 0, !7, i64 4}
!41 = !{!14, !11, i64 528}
!42 = !{!14, !11, i64 416}
!43 = !{!14, !11, i64 520}
!44 = !{!14, !11, i64 544}
!45 = !{!22, !11, i64 8}
!46 = !{!14, !11, i64 536}
!47 = !{!22, !11, i64 16}
!48 = !{!14, !11, i64 424}
!49 = !{!22, !11, i64 24}
!50 = !{!51, !11, i64 96}
!51 = !{!"_ZTSN4Data19MemorySpecificationE", !20, i64 8, !52, i64 40, !54, i64 48, !55, i64 160, !57, i64 456}
!52 = !{!"_ZTSN4Data10MemoryTypeE", !53, i64 0}
!53 = !{!"_ZTSN4Data10MemoryType12MemoryType_tE", !7, i64 0}
!54 = !{!"_ZTSN4Data19MemArchitectureSpecE", !11, i64 8, !11, i64 16, !11, i64 24, !11, i64 32, !11, i64 40, !11, i64 48, !11, i64 56, !11, i64 64, !32, i64 72, !32, i64 73, !32, i64 74}
!55 = !{!"_ZTSN4Data13MemTimingSpecE", !56, i64 8, !11, i64 16, !11, i64 24, !11, i64 32, !11, i64 40, !11, i64 48, !11, i64 56, !11, i64 64, !11, i64 72, !11, i64 80, !11, i64 88, !11, i64 96, !11, i64 104, !11, i64 112, !11, i64 120, !11, i64 128, !11, i64 136, !11, i64 144, !11, i64 152, !11, i64 160, !11, i64 168, !11, i64 176, !11, i64 184, !11, i64 192, !11, i64 200, !11, i64 208, !11, i64 216, !11, i64 224, !11, i64 232, !11, i64 240, !11, i64 248, !56, i64 256}
!56 = !{!"double", !7, i64 0}
!57 = !{!"_ZTSN4Data12MemPowerSpecE", !56, i64 8, !56, i64 16, !56, i64 24, !56, i64 32, !56, i64 40, !56, i64 48, !56, i64 56, !56, i64 64, !56, i64 72, !56, i64 80, !56, i64 88, !56, i64 96, !56, i64 104, !56, i64 112, !56, i64 120, !56, i64 128, !56, i64 136, !56, i64 144, !56, i64 152, !56, i64 160, !56, i64 168, !56, i64 176, !56, i64 184, !56, i64 192, !56, i64 200, !56, i64 208, !56, i64 216, !56, i64 224, !56, i64 232, !56, i64 240}
!58 = !{!22, !11, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.Data::cmdScheduler::physicalAddr" = type { i64, i64, i64, i64 }
%"class.Data::cmdScheduler::trans" = type { i64, i64, i64 }

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Data12cmdScheduler9memoryMapENS0_5transERKNS_19MemorySpecificationE(ptr dead_on_unwind noalias nocapture writable writeonly sret(%"class.Data::cmdScheduler::physicalAddr") align 8 %0, ptr noundef nonnull align 8 dereferenceable(1080) %1, ptr nocapture noundef readonly byval(%"class.Data::cmdScheduler::trans") align 8 %2, ptr noundef nonnull align 8 dereferenceable(736) %3) local_unnamed_addr #0 align 2 {
  %5 = getelementptr inbounds i8, ptr %2, i64 16
  %6 = load i64, ptr %5, align 8, !tbaa !5
  %7 = getelementptr inbounds i8, ptr %1, i64 432
  %8 = load i64, ptr %7, align 8, !tbaa !10
  %9 = icmp sgt i64 %8, 1
  br i1 %9, label %10, label %93

10:                                               ; preds = %4
  %11 = getelementptr inbounds i8, ptr %3, i64 40
  %12 = tail call noundef i32 @_ZNK4Data10MemoryTypecvNS0_12MemoryType_tEEv(ptr noundef nonnull align 4 dereferenceable(4) %11)
  %13 = icmp eq i32 %12, 2
  br i1 %13, label %14, label %93

14:                                               ; preds = %10
  %15 = getelementptr inbounds i8, ptr %1, i64 528
  %16 = load i64, ptr %15, align 8, !tbaa !39
  %17 = tail call noundef i64 @_ZN4Data12cmdScheduler8uintLog2Em(ptr noundef nonnull align 8 dereferenceable(1080) %1, i64 noundef %16)
  %18 = getelementptr inbounds i8, ptr %1, i64 416
  %19 = load i64, ptr %18, align 8, !tbaa !40
  %20 = icmp sgt i64 %19, 1
  br i1 %20, label %21, label %23

21:                                               ; preds = %14
  %22 = tail call noundef i64 @_ZN4Data12cmdScheduler8uintLog2Em(ptr noundef nonnull align 8 dereferenceable(1080) %1, i64 noundef %19)
  br label %23

23:                                               ; preds = %14, %21
  %24 = phi i64 [ %22, %21 ], [ 0, %14 ]
  %25 = add i64 %24, %17
  %26 = load i64, ptr %7, align 8, !tbaa !10
  %27 = icmp sgt i64 %26, 1
  br i1 %27, label %28, label %30

28:                                               ; preds = %23
  %29 = tail call noundef i64 @_ZN4Data12cmdScheduler8uintLog2Em(ptr noundef nonnull align 8 dereferenceable(1080) %1, i64 noundef %26)
  %.pre40 = load i64, ptr %7, align 8, !tbaa !10
  br label %30

30:                                               ; preds = %23, %28
  %31 = phi i64 [ %.pre40, %28 ], [ %26, %23 ]
  %32 = phi i64 [ %29, %28 ], [ 0, %23 ]
  %33 = add i64 %25, %32
  %34 = getelementptr inbounds i8, ptr %1, i64 520
  %35 = load i64, ptr %34, align 8, !tbaa !41
  %36 = load i64, ptr %18, align 8, !tbaa !40
  %37 = getelementptr inbounds i8, ptr %1, i64 544
  %38 = load i64, ptr %37, align 8, !tbaa !42
  %39 = mul nsw i64 %38, %36
  %40 = sdiv i64 %35, %39
  %41 = add nsw i64 %40, -1
  %42 = shl i64 %41, %33
  %43 = and i64 %42, %6
  %44 = icmp sgt i64 %31, 1
  br i1 %44, label %45, label %47

45:                                               ; preds = %30
  %46 = tail call noundef i64 @_ZN4Data12cmdScheduler8uintLog2Em(ptr noundef nonnull align 8 dereferenceable(1080) %1, i64 noundef %31)
  br label %47

47:                                               ; preds = %30, %45
  %48 = phi i64 [ %46, %45 ], [ 0, %30 ]
  %49 = add i64 %48, %17
  %50 = lshr i64 %43, %49
  %51 = getelementptr inbounds i8, ptr %0, i64 8
  store i64 %50, ptr %51, align 8, !tbaa !43
  %52 = getelementptr inbounds i8, ptr %1, i64 536
  %53 = load i64, ptr %52, align 8, !tbaa !44
  %54 = tail call noundef i64 @_ZN4Data12cmdScheduler8uintLog2Em(ptr noundef nonnull align 8 dereferenceable(1080) %1, i64 noundef %53)
  %55 = load i64, ptr %37, align 8, !tbaa !42
  %56 = load i64, ptr %7, align 8, !tbaa !10
  %57 = sdiv i64 %55, %56
  %58 = add nsw i64 %57, -1
  %59 = shl i64 %58, %54
  %60 = and i64 %59, %6
  %61 = lshr i64 %60, %54
  %62 = getelementptr inbounds i8, ptr %0, i64 16
  store i64 %61, ptr %62, align 8, !tbaa !45
  %63 = getelementptr inbounds i8, ptr %1, i64 424
  %64 = load i64, ptr %63, align 8, !tbaa !46
  %65 = load i64, ptr %52, align 8, !tbaa !44
  %66 = mul nsw i64 %65, %64
  %67 = tail call noundef i64 @_ZN4Data12cmdScheduler8uintLog2Em(ptr noundef nonnull align 8 dereferenceable(1080) %1, i64 noundef %66)
  %68 = load i64, ptr %18, align 8, !tbaa !40
  %69 = icmp sgt i64 %68, 1
  br i1 %69, label %70, label %72

70:                                               ; preds = %47
  %71 = tail call noundef i64 @_ZN4Data12cmdScheduler8uintLog2Em(ptr noundef nonnull align 8 dereferenceable(1080) %1, i64 noundef %68)
  br label %72

72:                                               ; preds = %47, %70
  %73 = phi i64 [ %71, %70 ], [ 0, %47 ]
  %74 = add i64 %73, %67
  %75 = load i64, ptr %7, align 8, !tbaa !10
  %76 = icmp sgt i64 %75, 1
  br i1 %76, label %77, label %79

77:                                               ; preds = %72
  %78 = tail call noundef i64 @_ZN4Data12cmdScheduler8uintLog2Em(ptr noundef nonnull align 8 dereferenceable(1080) %1, i64 noundef %75)
  br label %79

79:                                               ; preds = %72, %77
  %80 = phi i64 [ %78, %77 ], [ 0, %72 ]
  %81 = add i64 %74, %80
  %82 = load i64, ptr %15, align 8, !tbaa !39
  %83 = load i64, ptr %63, align 8, !tbaa !46
  %84 = load i64, ptr %52, align 8, !tbaa !44
  %85 = mul nsw i64 %84, %83
  %86 = sdiv i64 %82, %85
  %87 = add nsw i64 %86, -1
  %88 = shl i64 %87, %81
  %89 = and i64 %88, %6
  %90 = tail call noundef i64 @_ZN4Data12cmdScheduler8uintLog2Em(ptr noundef nonnull align 8 dereferenceable(1080) %1, i64 noundef %85)
  %91 = sub i64 %81, %90
  %92 = lshr i64 %89, %91
  br label %139

93:                                               ; preds = %10, %4
  %94 = getelementptr inbounds i8, ptr %1, i64 528
  %95 = load i64, ptr %94, align 8, !tbaa !39
  %96 = tail call noundef i64 @_ZN4Data12cmdScheduler8uintLog2Em(ptr noundef nonnull align 8 dereferenceable(1080) %1, i64 noundef %95)
  %97 = getelementptr inbounds i8, ptr %1, i64 416
  %98 = load i64, ptr %97, align 8, !tbaa !40
  %99 = icmp sgt i64 %98, 1
  br i1 %99, label %100, label %102

100:                                              ; preds = %93
  %101 = tail call noundef i64 @_ZN4Data12cmdScheduler8uintLog2Em(ptr noundef nonnull align 8 dereferenceable(1080) %1, i64 noundef %98)
  %.pre = load i64, ptr %97, align 8, !tbaa !40
  br label %102

102:                                              ; preds = %93, %100
  %103 = phi i64 [ %.pre, %100 ], [ %98, %93 ]
  %104 = phi i64 [ %101, %100 ], [ 0, %93 ]
  %105 = add i64 %104, %96
  %106 = getelementptr inbounds i8, ptr %1, i64 520
  %107 = load i64, ptr %106, align 8, !tbaa !41
  %108 = sdiv i64 %107, %103
  %109 = add nsw i64 %108, -1
  %110 = shl i64 %109, %105
  %111 = and i64 %110, %6
  %112 = lshr i64 %111, %96
  %113 = getelementptr inbounds i8, ptr %0, i64 8
  store i64 %112, ptr %113, align 8, !tbaa !43
  %114 = getelementptr inbounds i8, ptr %1, i64 424
  %115 = load i64, ptr %114, align 8, !tbaa !46
  %116 = getelementptr inbounds i8, ptr %1, i64 536
  %117 = load i64, ptr %116, align 8, !tbaa !44
  %118 = mul nsw i64 %117, %115
  %119 = tail call noundef i64 @_ZN4Data12cmdScheduler8uintLog2Em(ptr noundef nonnull align 8 dereferenceable(1080) %1, i64 noundef %118)
  %120 = load i64, ptr %97, align 8, !tbaa !40
  %121 = icmp sgt i64 %120, 1
  br i1 %121, label %122, label %124

122:                                              ; preds = %102
  %123 = tail call noundef i64 @_ZN4Data12cmdScheduler8uintLog2Em(ptr noundef nonnull align 8 dereferenceable(1080) %1, i64 noundef %120)
  br label %124

124:                                              ; preds = %102, %122
  %125 = phi i64 [ %123, %122 ], [ 0, %102 ]
  %126 = add i64 %125, %119
  %127 = load i64, ptr %94, align 8, !tbaa !39
  %128 = load i64, ptr %114, align 8, !tbaa !46
  %129 = load i64, ptr %116, align 8, !tbaa !44
  %130 = mul nsw i64 %129, %128
  %131 = sdiv i64 %127, %130
  %132 = add nsw i64 %131, -1
  %133 = shl i64 %132, %126
  %134 = and i64 %133, %6
  %135 = tail call noundef i64 @_ZN4Data12cmdScheduler8uintLog2Em(ptr noundef nonnull align 8 dereferenceable(1080) %1, i64 noundef %130)
  %136 = sub i64 %126, %135
  %137 = lshr i64 %134, %136
  %138 = getelementptr inbounds i8, ptr %0, i64 24
  store i64 %137, ptr %138, align 8, !tbaa !47
  br label %139

139:                                              ; preds = %124, %79
  %.sink42 = phi i64 [ 16, %124 ], [ 24, %79 ]
  %.sink = phi i64 [ 0, %124 ], [ %92, %79 ]
  %140 = getelementptr inbounds i8, ptr %0, i64 %.sink42
  store i64 %.sink, ptr %140, align 8, !tbaa !48
  %141 = getelementptr inbounds i8, ptr %1, i64 528
  %142 = load i64, ptr %141, align 8, !tbaa !39
  %143 = getelementptr inbounds i8, ptr %1, i64 520
  %144 = load i64, ptr %143, align 8, !tbaa !41
  %145 = mul nsw i64 %144, %142
  %146 = tail call noundef i64 @_ZN4Data12cmdScheduler8uintLog2Em(ptr noundef nonnull align 8 dereferenceable(1080) %1, i64 noundef %145)
  %147 = getelementptr inbounds i8, ptr %3, i64 96
  %148 = load i64, ptr %147, align 8, !tbaa !49
  %149 = add nsw i64 %148, -1
  %150 = shl i64 %149, %146
  %151 = and i64 %150, %6
  %152 = lshr i64 %151, %146
  store i64 %152, ptr %0, align 8, !tbaa !57
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4Data10MemoryTypecvNS0_12MemoryType_tEEv(ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_ZN4Data12cmdScheduler8uintLog2Em(ptr noundef nonnull align 8 dereferenceable(1080), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 16}
!6 = !{!"_ZTSN4Data12cmdScheduler5transE", !7, i64 0, !7, i64 8, !7, i64 16}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!11, !7, i64 432}
!11 = !{!"_ZTSN4Data12cmdSchedulerE", !12, i64 0, !17, i64 24, !17, i64 112, !17, i64 200, !21, i64 288, !21, i64 312, !25, i64 336, !21, i64 360, !21, i64 384, !29, i64 408, !7, i64 416, !7, i64 424, !7, i64 432, !7, i64 440, !7, i64 448, !7, i64 456, !7, i64 464, !7, i64 472, !7, i64 480, !7, i64 488, !7, i64 496, !7, i64 504, !7, i64 512, !7, i64 520, !7, i64 528, !7, i64 536, !7, i64 544, !30, i64 552, !7, i64 560, !31, i64 568}
!12 = !{!"_ZTSSt6vectorIN4Data12cmdScheduler5transESaIS2_EE", !13, i64 0}
!13 = !{!"_ZTSSt12_Vector_baseIN4Data12cmdScheduler5transESaIS2_EE", !14, i64 0}
!14 = !{!"_ZTSNSt12_Vector_baseIN4Data12cmdScheduler5transESaIS2_EE12_Vector_implE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIN4Data12cmdScheduler5transESaIS2_EE17_Vector_impl_dataE", !16, i64 0, !16, i64 8, !16, i64 16}
!16 = !{!"any pointer", !8, i64 0}
!17 = !{!"_ZTSN4Data12cmdScheduler11commandItemE", !7, i64 0, !7, i64 8, !7, i64 16, !18, i64 24, !20, i64 56}
!18 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !19, i64 0, !7, i64 8, !8, i64 16}
!19 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !16, i64 0}
!20 = !{!"_ZTSN4Data12cmdScheduler12physicalAddrE", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24}
!21 = !{!"_ZTSSt6vectorIN4Data12cmdScheduler11commandItemESaIS2_EE", !22, i64 0}
!22 = !{!"_ZTSSt12_Vector_baseIN4Data12cmdScheduler11commandItemESaIS2_EE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIN4Data12cmdScheduler11commandItemESaIS2_EE12_Vector_implE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseIN4Data12cmdScheduler11commandItemESaIS2_EE17_Vector_impl_dataE", !16, i64 0, !16, i64 8, !16, i64 16}
!25 = !{!"_ZTSSt6vectorIS_IN4Data12cmdScheduler11commandItemESaIS2_EESaIS4_EE", !26, i64 0}
!26 = !{!"_ZTSSt12_Vector_baseISt6vectorIN4Data12cmdScheduler11commandItemESaIS3_EESaIS5_EE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseISt6vectorIN4Data12cmdScheduler11commandItemESaIS3_EESaIS5_EE12_Vector_implE", !28, i64 0}
!28 = !{!"_ZTSNSt12_Vector_baseISt6vectorIN4Data12cmdScheduler11commandItemESaIS3_EESaIS5_EE17_Vector_impl_dataE", !16, i64 0, !16, i64 8, !16, i64 16}
!29 = !{!"int", !8, i64 0}
!30 = !{!"bool", !8, i64 0}
!31 = !{!"_ZTSSt14basic_ofstreamIcSt11char_traitsIcEE", !32, i64 0, !33, i64 8}
!32 = !{!"_ZTSSo"}
!33 = !{!"_ZTSSt13basic_filebufIcSt11char_traitsIcEE", !34, i64 0, !8, i64 64, !36, i64 104, !37, i64 120, !38, i64 124, !38, i64 132, !38, i64 140, !16, i64 152, !7, i64 160, !30, i64 168, !30, i64 169, !30, i64 170, !8, i64 171, !16, i64 176, !16, i64 184, !30, i64 192, !16, i64 200, !16, i64 208, !7, i64 216, !16, i64 224, !16, i64 232}
!34 = !{!"_ZTSSt15basic_streambufIcSt11char_traitsIcEE", !16, i64 8, !16, i64 16, !16, i64 24, !16, i64 32, !16, i64 40, !16, i64 48, !35, i64 56}
!35 = !{!"_ZTSSt6locale", !16, i64 0}
!36 = !{!"_ZTSSt12__basic_fileIcE", !16, i64 0, !30, i64 8}
!37 = !{!"_ZTSSt13_Ios_Openmode", !8, i64 0}
!38 = !{!"_ZTS11__mbstate_t", !29, i64 0, !8, i64 4}
!39 = !{!11, !7, i64 528}
!40 = !{!11, !7, i64 416}
!41 = !{!11, !7, i64 520}
!42 = !{!11, !7, i64 544}
!43 = !{!20, !7, i64 8}
!44 = !{!11, !7, i64 536}
!45 = !{!20, !7, i64 16}
!46 = !{!11, !7, i64 424}
!47 = !{!20, !7, i64 24}
!48 = !{!7, !7, i64 0}
!49 = !{!50, !7, i64 96}
!50 = !{!"_ZTSN4Data19MemorySpecificationE", !18, i64 8, !51, i64 40, !53, i64 48, !54, i64 160, !56, i64 456}
!51 = !{!"_ZTSN4Data10MemoryTypeE", !52, i64 0}
!52 = !{!"_ZTSN4Data10MemoryType12MemoryType_tE", !8, i64 0}
!53 = !{!"_ZTSN4Data19MemArchitectureSpecE", !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 32, !7, i64 40, !7, i64 48, !7, i64 56, !7, i64 64, !30, i64 72, !30, i64 73, !30, i64 74}
!54 = !{!"_ZTSN4Data13MemTimingSpecE", !55, i64 8, !7, i64 16, !7, i64 24, !7, i64 32, !7, i64 40, !7, i64 48, !7, i64 56, !7, i64 64, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !7, i64 120, !7, i64 128, !7, i64 136, !7, i64 144, !7, i64 152, !7, i64 160, !7, i64 168, !7, i64 176, !7, i64 184, !7, i64 192, !7, i64 200, !7, i64 208, !7, i64 216, !7, i64 224, !7, i64 232, !7, i64 240, !7, i64 248, !55, i64 256}
!55 = !{!"double", !8, i64 0}
!56 = !{!"_ZTSN4Data12MemPowerSpecE", !55, i64 8, !55, i64 16, !55, i64 24, !55, i64 32, !55, i64 40, !55, i64 48, !55, i64 56, !55, i64 64, !55, i64 72, !55, i64 80, !55, i64 88, !55, i64 96, !55, i64 104, !55, i64 112, !55, i64 120, !55, i64 128, !55, i64 136, !55, i64 144, !55, i64 152, !55, i64 160, !55, i64 168, !55, i64 176, !55, i64 184, !55, i64 192, !55, i64 200, !55, i64 208, !55, i64 216, !55, i64 224, !55, i64 232, !55, i64 240}
!57 = !{!20, !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass