; LLVM IR from gem5/gem5 :: ext/mcpat/logic.ll (ZN15selection_logic13computeEnergyEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.TechnologyParameter = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, i64, %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::ScalingFactor", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType" }
%"class.TechnologyParameter::DeviceType" = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::InterconnectType" = type { double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::ScalingFactor" = type { double, double, double }
%"class.TechnologyParameter::MemoryType" = type { double, double, double, double, double, double }
%class.selection_logic = type <{ %class.McPATComponent, i8, [7 x i8], %class.InputParameter, %class.uca_org_t, i32, i32, double, i32, i32, i32, [4 x i8] }>
%class.McPATComponent = type { ptr, %class.Component, ptr, %class.InputParameter, %"class.std::__cxx11::basic_string", double, %"class.std::vector", %class.McPATOutput, %class.statsDef, %class.statsDef, %class.powerDef, %class.powerDef }
%class.Component = type { %class.Area, %class.powerDef, %class.powerDef, double, double }
%class.Area = type { double, double, double }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<McPATComponent *, std::allocator<McPATComponent *>>::_Vector_impl" }
%"struct.std::_Vector_base<McPATComponent *, std::allocator<McPATComponent *>>::_Vector_impl" = type { %"struct.std::_Vector_base<McPATComponent *, std::allocator<McPATComponent *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<McPATComponent *, std::allocator<McPATComponent *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.McPATOutput = type { double, double, double, double, double, double }
%class.statsDef = type { %class.statsComponents, %class.statsComponents, %class.statsComponents, %class.statsComponents, %class.statsComponents, %class.statsComponents, %class.statsComponents }
%class.statsComponents = type { double, double, double }
%class.powerDef = type { %class.powerComponents, %class.powerComponents, %class.powerComponents }
%class.powerComponents = type { double, double, double, double, double }
%class.InputParameter = type { i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, i32, double, double, i32, i32, i32, i32, i32, i8, i8, i8, i8, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i8, i8, i32, i32, i8, double, double, i8, i32, i32, i8 }
%class.uca_org_t = type { ptr, ptr, double, double, double, double, %class.powerDef, double, double, double, [100 x i8], double, i8, %struct.results_mem_array, %struct.results_mem_array }
%struct.results_mem_array = type { i32, i32, double, i32, i32, i32, i32, i32, i32, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double }

@g_tp = external global %class.TechnologyParameter, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN15selection_logic13computeEnergyEv(ptr noundef nonnull align 8 dereferenceable(9956) %0) unnamed_addr #1 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca double, align 8
  %4 = alloca double, align 8
  %5 = alloca double, align 8
  %6 = alloca i32, align 4
  %7 = alloca double, align 8
  %8 = alloca double, align 8
  %9 = alloca double, align 8
  %10 = alloca double, align 8
  %11 = alloca double, align 8
  %12 = alloca double, align 8
  %13 = alloca double, align 8
  %14 = alloca double, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %15 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #4
  %16 = getelementptr inbounds %class.selection_logic, ptr %15, i32 0, i32 3
  %17 = getelementptr inbounds %class.InputParameter, ptr %16, i32 0, i32 13
  %18 = load double, ptr %17, align 8, !tbaa !9
  %19 = fmul double 1.250000e+01, %18
  store double %19, ptr %7, align 8, !tbaa !35
  %20 = getelementptr inbounds %class.selection_logic, ptr %15, i32 0, i32 3
  %21 = getelementptr inbounds %class.InputParameter, ptr %20, i32 0, i32 13
  %22 = load double, ptr %21, align 8, !tbaa !9
  %23 = fmul double 5.000000e+01, %22
  store double %23, ptr %8, align 8, !tbaa !35
  %24 = getelementptr inbounds %class.selection_logic, ptr %15, i32 0, i32 3
  %25 = getelementptr inbounds %class.InputParameter, ptr %24, i32 0, i32 13
  %26 = load double, ptr %25, align 8, !tbaa !9
  %27 = fmul double 1.250000e+01, %26
  store double %27, ptr %9, align 8, !tbaa !35
  %28 = getelementptr inbounds %class.selection_logic, ptr %15, i32 0, i32 3
  %29 = getelementptr inbounds %class.InputParameter, ptr %28, i32 0, i32 13
  %30 = load double, ptr %29, align 8, !tbaa !9
  %31 = fmul double 1.875000e+01, %30
  store double %31, ptr %10, align 8, !tbaa !35
  %32 = getelementptr inbounds %class.selection_logic, ptr %15, i32 0, i32 3
  %33 = getelementptr inbounds %class.InputParameter, ptr %32, i32 0, i32 13
  %34 = load double, ptr %33, align 8, !tbaa !9
  %35 = fmul double 6.250000e+00, %34
  store double %35, ptr %11, align 8, !tbaa !35
  %36 = getelementptr inbounds %class.selection_logic, ptr %15, i32 0, i32 3
  %37 = getelementptr inbounds %class.InputParameter, ptr %36, i32 0, i32 13
  %38 = load double, ptr %37, align 8, !tbaa !9
  %39 = fmul double 1.250000e+01, %38
  store double %39, ptr %12, align 8, !tbaa !35
  store double 0.000000e+00, ptr %3, align 8, !tbaa !35
  store i32 1, ptr %6, align 4, !tbaa !36
  br label %40

40:                                               ; preds = %44, %1
  %41 = getelementptr inbounds %class.selection_logic, ptr %15, i32 0, i32 5
  %42 = load i32, ptr %41, align 8, !tbaa !37
  %43 = icmp sgt i32 %42, 4
  br i1 %43, label %44, label %56

44:                                               ; preds = %40
  %45 = getelementptr inbounds %class.selection_logic, ptr %15, i32 0, i32 5
  %46 = load i32, ptr %45, align 8, !tbaa !37
  %47 = sitofp i32 %46 to double
  %48 = fdiv double %47, 4.000000e+00
  %49 = call double @llvm.ceil.f64(double %48)
  %50 = fptosi double %49 to i32
  %51 = getelementptr inbounds %class.selection_logic, ptr %15, i32 0, i32 5
  store i32 %50, ptr %51, align 8, !tbaa !37
  %52 = getelementptr inbounds %class.selection_logic, ptr %15, i32 0, i32 5
  %53 = load i32, ptr %52, align 8, !tbaa !37
  %54 = load i32, ptr %6, align 4, !tbaa !36
  %55 = add nsw i32 %54, %53
  store i32 %55, ptr %6, align 4, !tbaa !36
  br label %40, !llvm.loop !38

56:                                               ; preds = %40
  %57 = load double, ptr %7, align 8, !tbaa !35
  %58 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 39), align 8, !tbaa !40
  %59 = call noundef double @_Z8drain_C_diiidbbb(double noundef %57, i32 noundef 1, i32 noundef 1, i32 noundef 1, double noundef %58, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false)
  %60 = load double, ptr %8, align 8, !tbaa !35
  %61 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 39), align 8, !tbaa !40
  %62 = call noundef double @_Z8drain_C_diiidbbb(double noundef %60, i32 noundef 0, i32 noundef 1, i32 noundef 1, double noundef %61, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false)
  %63 = call double @llvm.fmuladd.f64(double 4.000000e+00, double %59, double %62)
  store double %63, ptr %4, align 8, !tbaa !35
  %64 = load double, ptr %7, align 8, !tbaa !35
  %65 = load double, ptr %8, align 8, !tbaa !35
  %66 = call noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef %64, double noundef %65, i32 noundef 4, i32 noundef 4, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %67 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::DeviceType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 48), i32 0, i32 9), align 8, !tbaa !46
  %68 = fmul double %66, %67
  %69 = getelementptr inbounds i8, ptr %15, i64 8
  %70 = getelementptr inbounds %class.Component, ptr %69, i32 0, i32 1
  %71 = getelementptr inbounds %class.powerDef, ptr %70, i32 0, i32 0
  %72 = getelementptr inbounds %class.powerComponents, ptr %71, i32 0, i32 2
  store double %68, ptr %72, align 8, !tbaa !47
  %73 = load double, ptr %9, align 8, !tbaa !35
  %74 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 39), align 8, !tbaa !40
  %75 = call noundef double @_Z8drain_C_diiidbbb(double noundef %73, i32 noundef 1, i32 noundef 1, i32 noundef 1, double noundef %74, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false)
  %76 = load double, ptr %10, align 8, !tbaa !35
  %77 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 39), align 8, !tbaa !40
  %78 = call noundef double @_Z8drain_C_diiidbbb(double noundef %76, i32 noundef 0, i32 noundef 1, i32 noundef 1, double noundef %77, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false)
  %79 = fadd double %75, %78
  %80 = load double, ptr %9, align 8, !tbaa !35
  %81 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 39), align 8, !tbaa !40
  %82 = call noundef double @_Z8drain_C_diiidbbb(double noundef %80, i32 noundef 1, i32 noundef 1, i32 noundef 1, double noundef %81, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false)
  %83 = call double @llvm.fmuladd.f64(double 2.000000e+00, double %82, double %79)
  %84 = load double, ptr %10, align 8, !tbaa !35
  %85 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 39), align 8, !tbaa !40
  %86 = call noundef double @_Z8drain_C_diiidbbb(double noundef %84, i32 noundef 0, i32 noundef 2, i32 noundef 1, double noundef %85, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false)
  %87 = fadd double %83, %86
  %88 = load double, ptr %9, align 8, !tbaa !35
  %89 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 39), align 8, !tbaa !40
  %90 = call noundef double @_Z8drain_C_diiidbbb(double noundef %88, i32 noundef 1, i32 noundef 1, i32 noundef 1, double noundef %89, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false)
  %91 = call double @llvm.fmuladd.f64(double 3.000000e+00, double %90, double %87)
  %92 = load double, ptr %10, align 8, !tbaa !35
  %93 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 39), align 8, !tbaa !40
  %94 = call noundef double @_Z8drain_C_diiidbbb(double noundef %92, i32 noundef 0, i32 noundef 3, i32 noundef 1, double noundef %93, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false)
  %95 = fadd double %91, %94
  %96 = load double, ptr %9, align 8, !tbaa !35
  %97 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 39), align 8, !tbaa !40
  %98 = call noundef double @_Z8drain_C_diiidbbb(double noundef %96, i32 noundef 1, i32 noundef 1, i32 noundef 1, double noundef %97, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false)
  %99 = call double @llvm.fmuladd.f64(double 4.000000e+00, double %98, double %95)
  %100 = load double, ptr %10, align 8, !tbaa !35
  %101 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 39), align 8, !tbaa !40
  %102 = call noundef double @_Z8drain_C_diiidbbb(double noundef %100, i32 noundef 0, i32 noundef 4, i32 noundef 1, double noundef %101, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false)
  %103 = fadd double %99, %102
  %104 = load double, ptr %11, align 8, !tbaa !35
  %105 = load double, ptr %12, align 8, !tbaa !35
  %106 = fadd double %104, %105
  %107 = call noundef double @_Z6gate_Cddbbb(double noundef %106, double noundef 2.000000e+01, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false)
  %108 = call double @llvm.fmuladd.f64(double 8.000000e+00, double %107, double %103)
  %109 = load double, ptr %11, align 8, !tbaa !35
  %110 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 39), align 8, !tbaa !40
  %111 = call noundef double @_Z8drain_C_diiidbbb(double noundef %109, i32 noundef 1, i32 noundef 1, i32 noundef 1, double noundef %110, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false)
  %112 = call double @llvm.fmuladd.f64(double 4.000000e+00, double %111, double %108)
  %113 = load double, ptr %12, align 8, !tbaa !35
  %114 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 39), align 8, !tbaa !40
  %115 = call noundef double @_Z8drain_C_diiidbbb(double noundef %113, i32 noundef 0, i32 noundef 1, i32 noundef 1, double noundef %114, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false)
  %116 = call double @llvm.fmuladd.f64(double 8.000000e+00, double %115, double %112)
  %117 = load double, ptr %9, align 8, !tbaa !35
  %118 = load double, ptr %10, align 8, !tbaa !35
  %119 = fadd double %117, %118
  %120 = call noundef double @_Z6gate_Cddbbb(double noundef %119, double noundef 1.000000e+01, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false)
  %121 = call double @llvm.fmuladd.f64(double 2.000000e+01, double %120, double %116)
  store double %121, ptr %5, align 8, !tbaa !35
  %122 = getelementptr inbounds %class.selection_logic, ptr %15, i32 0, i32 6
  %123 = load i32, ptr %122, align 4, !tbaa !48
  %124 = load i32, ptr %6, align 4, !tbaa !36
  %125 = mul nsw i32 %123, %124
  %126 = sitofp i32 %125 to double
  %127 = load double, ptr %4, align 8, !tbaa !35
  %128 = load double, ptr %5, align 8, !tbaa !35
  %129 = fadd double %127, %128
  %130 = load double, ptr %3, align 8, !tbaa !35
  %131 = call double @llvm.fmuladd.f64(double %126, double %129, double %130)
  store double %131, ptr %3, align 8, !tbaa !35
  %132 = load double, ptr %3, align 8, !tbaa !35
  %133 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::DeviceType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 48), i32 0, i32 9), align 8, !tbaa !46
  %134 = fmul double %132, %133
  %135 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::DeviceType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 48), i32 0, i32 9), align 8, !tbaa !46
  %136 = fmul double %134, %135
  %137 = fmul double %136, 2.000000e+00
  %138 = getelementptr inbounds i8, ptr %15, i64 8
  %139 = getelementptr inbounds %class.Component, ptr %138, i32 0, i32 1
  %140 = getelementptr inbounds %class.powerDef, ptr %139, i32 0, i32 0
  %141 = getelementptr inbounds %class.powerComponents, ptr %140, i32 0, i32 0
  store double %137, ptr %141, align 8, !tbaa !49
  %142 = getelementptr inbounds %class.selection_logic, ptr %15, i32 0, i32 6
  %143 = load i32, ptr %142, align 4, !tbaa !48
  %144 = load i32, ptr %6, align 4, !tbaa !36
  %145 = mul nsw i32 %143, %144
  %146 = sitofp i32 %145 to double
  %147 = load double, ptr %9, align 8, !tbaa !35
  %148 = load double, ptr %10, align 8, !tbaa !35
  %149 = call noundef double @_Z17cmos_Isub_leakageddi9Gate_typebbb17Half_net_topology(double noundef %147, double noundef %148, i32 noundef 2, i32 noundef 4, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %150 = load double, ptr %9, align 8, !tbaa !35
  %151 = load double, ptr %10, align 8, !tbaa !35
  %152 = call noundef double @_Z17cmos_Isub_leakageddi9Gate_typebbb17Half_net_topology(double noundef %150, double noundef %151, i32 noundef 3, i32 noundef 4, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %153 = fadd double %149, %152
  %154 = load double, ptr %9, align 8, !tbaa !35
  %155 = load double, ptr %10, align 8, !tbaa !35
  %156 = call noundef double @_Z17cmos_Isub_leakageddi9Gate_typebbb17Half_net_topology(double noundef %154, double noundef %155, i32 noundef 4, i32 noundef 4, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %157 = fadd double %153, %156
  %158 = load double, ptr %11, align 8, !tbaa !35
  %159 = load double, ptr %12, align 8, !tbaa !35
  %160 = call noundef double @_Z17cmos_Isub_leakageddi9Gate_typebbb17Half_net_topology(double noundef %158, double noundef %159, i32 noundef 2, i32 noundef 4, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %161 = call double @llvm.fmuladd.f64(double %160, double 4.000000e+00, double %157)
  %162 = load double, ptr %11, align 8, !tbaa !35
  %163 = load double, ptr %12, align 8, !tbaa !35
  %164 = call noundef double @_Z17cmos_Isub_leakageddi9Gate_typebbb17Half_net_topology(double noundef %162, double noundef %163, i32 noundef 1, i32 noundef 2, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %165 = fmul double %164, 2.000000e+00
  %166 = call double @llvm.fmuladd.f64(double %165, double 3.000000e+00, double %161)
  %167 = fmul double %146, %166
  %168 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::DeviceType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 48), i32 0, i32 9), align 8, !tbaa !46
  %169 = fmul double %167, %168
  %170 = getelementptr inbounds i8, ptr %15, i64 8
  %171 = getelementptr inbounds %class.Component, ptr %170, i32 0, i32 1
  %172 = getelementptr inbounds %class.powerDef, ptr %171, i32 0, i32 0
  %173 = getelementptr inbounds %class.powerComponents, ptr %172, i32 0, i32 1
  store double %169, ptr %173, align 8, !tbaa !50
  %174 = getelementptr inbounds %class.selection_logic, ptr %15, i32 0, i32 6
  %175 = load i32, ptr %174, align 4, !tbaa !48
  %176 = load i32, ptr %6, align 4, !tbaa !36
  %177 = mul nsw i32 %175, %176
  %178 = sitofp i32 %177 to double
  %179 = load double, ptr %9, align 8, !tbaa !35
  %180 = load double, ptr %10, align 8, !tbaa !35
  %181 = call noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef %179, double noundef %180, i32 noundef 2, i32 noundef 4, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %182 = load double, ptr %9, align 8, !tbaa !35
  %183 = load double, ptr %10, align 8, !tbaa !35
  %184 = call noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef %182, double noundef %183, i32 noundef 3, i32 noundef 4, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %185 = fadd double %181, %184
  %186 = load double, ptr %9, align 8, !tbaa !35
  %187 = load double, ptr %10, align 8, !tbaa !35
  %188 = call noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef %186, double noundef %187, i32 noundef 4, i32 noundef 4, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %189 = fadd double %185, %188
  %190 = load double, ptr %11, align 8, !tbaa !35
  %191 = load double, ptr %12, align 8, !tbaa !35
  %192 = call noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef %190, double noundef %191, i32 noundef 2, i32 noundef 4, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %193 = call double @llvm.fmuladd.f64(double %192, double 4.000000e+00, double %189)
  %194 = load double, ptr %11, align 8, !tbaa !35
  %195 = load double, ptr %12, align 8, !tbaa !35
  %196 = call noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef %194, double noundef %195, i32 noundef 1, i32 noundef 2, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %197 = fmul double %196, 2.000000e+00
  %198 = call double @llvm.fmuladd.f64(double %197, double 3.000000e+00, double %193)
  %199 = fmul double %178, %198
  %200 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::DeviceType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 48), i32 0, i32 9), align 8, !tbaa !46
  %201 = fmul double %199, %200
  %202 = getelementptr inbounds i8, ptr %15, i64 8
  %203 = getelementptr inbounds %class.Component, ptr %202, i32 0, i32 1
  %204 = getelementptr inbounds %class.powerDef, ptr %203, i32 0, i32 0
  %205 = getelementptr inbounds %class.powerComponents, ptr %204, i32 0, i32 2
  store double %201, ptr %205, align 8, !tbaa !47
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #4
  %206 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 42), align 8, !tbaa !51
  store double %206, ptr %13, align 8, !tbaa !35
  %207 = load double, ptr %13, align 8, !tbaa !35
  %208 = getelementptr inbounds i8, ptr %15, i64 8
  %209 = getelementptr inbounds %class.Component, ptr %208, i32 0, i32 1
  %210 = getelementptr inbounds %class.powerDef, ptr %209, i32 0, i32 0
  %211 = getelementptr inbounds %class.powerComponents, ptr %210, i32 0, i32 0
  %212 = load double, ptr %211, align 8, !tbaa !49
  %213 = fmul double %212, %207
  store double %213, ptr %211, align 8, !tbaa !49
  %214 = load double, ptr %13, align 8, !tbaa !35
  %215 = getelementptr inbounds i8, ptr %15, i64 8
  %216 = getelementptr inbounds %class.Component, ptr %215, i32 0, i32 1
  %217 = getelementptr inbounds %class.powerDef, ptr %216, i32 0, i32 1
  %218 = getelementptr inbounds %class.powerComponents, ptr %217, i32 0, i32 0
  %219 = load double, ptr %218, align 8, !tbaa !52
  %220 = fmul double %219, %214
  store double %220, ptr %218, align 8, !tbaa !52
  %221 = load double, ptr %13, align 8, !tbaa !35
  %222 = getelementptr inbounds i8, ptr %15, i64 8
  %223 = getelementptr inbounds %class.Component, ptr %222, i32 0, i32 1
  %224 = getelementptr inbounds %class.powerDef, ptr %223, i32 0, i32 2
  %225 = getelementptr inbounds %class.powerComponents, ptr %224, i32 0, i32 0
  %226 = load double, ptr %225, align 8, !tbaa !53
  %227 = fmul double %226, %221
  store double %227, ptr %225, align 8, !tbaa !53
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #4
  %228 = getelementptr inbounds %class.selection_logic, ptr %15, i32 0, i32 9
  %229 = load i32, ptr %228, align 4, !tbaa !54
  %230 = getelementptr inbounds %class.selection_logic, ptr %15, i32 0, i32 10
  %231 = load i32, ptr %230, align 8, !tbaa !55
  %232 = call noundef double @_Z31longer_channel_device_reduction9Device_ty9Core_type(i32 noundef %229, i32 noundef %231)
  store double %232, ptr %14, align 8, !tbaa !35
  %233 = getelementptr inbounds i8, ptr %15, i64 8
  %234 = getelementptr inbounds %class.Component, ptr %233, i32 0, i32 1
  %235 = getelementptr inbounds %class.powerDef, ptr %234, i32 0, i32 0
  %236 = getelementptr inbounds %class.powerComponents, ptr %235, i32 0, i32 1
  %237 = load double, ptr %236, align 8, !tbaa !50
  %238 = load double, ptr %14, align 8, !tbaa !35
  %239 = fmul double %237, %238
  %240 = getelementptr inbounds i8, ptr %15, i64 8
  %241 = getelementptr inbounds %class.Component, ptr %240, i32 0, i32 1
  %242 = getelementptr inbounds %class.powerDef, ptr %241, i32 0, i32 0
  %243 = getelementptr inbounds %class.powerComponents, ptr %242, i32 0, i32 4
  store double %239, ptr %243, align 8, !tbaa !56
  %244 = getelementptr inbounds i8, ptr %15, i64 8
  %245 = getelementptr inbounds %class.Component, ptr %244, i32 0, i32 1
  %246 = getelementptr inbounds %class.powerDef, ptr %245, i32 0, i32 0
  %247 = getelementptr inbounds %class.powerComponents, ptr %246, i32 0, i32 0
  %248 = load double, ptr %247, align 8, !tbaa !49
  %249 = getelementptr inbounds %class.McPATComponent, ptr %15, i32 0, i32 5
  %250 = load double, ptr %249, align 8, !tbaa !57
  %251 = fmul double %248, %250
  %252 = getelementptr inbounds %class.McPATComponent, ptr %15, i32 0, i32 7
  %253 = getelementptr inbounds %class.McPATOutput, ptr %252, i32 0, i32 2
  store double %251, ptr %253, align 8, !tbaa !58
  %254 = getelementptr inbounds i8, ptr %15, i64 8
  %255 = getelementptr inbounds %class.Component, ptr %254, i32 0, i32 1
  %256 = getelementptr inbounds %class.powerDef, ptr %255, i32 0, i32 0
  %257 = getelementptr inbounds %class.powerComponents, ptr %256, i32 0, i32 1
  %258 = load double, ptr %257, align 8, !tbaa !50
  %259 = getelementptr inbounds %class.McPATComponent, ptr %15, i32 0, i32 7
  %260 = getelementptr inbounds %class.McPATOutput, ptr %259, i32 0, i32 3
  store double %258, ptr %260, align 8, !tbaa !59
  %261 = getelementptr inbounds i8, ptr %15, i64 8
  %262 = getelementptr inbounds %class.Component, ptr %261, i32 0, i32 1
  %263 = getelementptr inbounds %class.powerDef, ptr %262, i32 0, i32 0
  %264 = getelementptr inbounds %class.powerComponents, ptr %263, i32 0, i32 2
  %265 = load double, ptr %264, align 8, !tbaa !47
  %266 = getelementptr inbounds %class.McPATComponent, ptr %15, i32 0, i32 7
  %267 = getelementptr inbounds %class.McPATOutput, ptr %266, i32 0, i32 4
  store double %265, ptr %267, align 8, !tbaa !60
  %268 = getelementptr inbounds i8, ptr %15, i64 8
  %269 = getelementptr inbounds %class.Component, ptr %268, i32 0, i32 1
  %270 = getelementptr inbounds %class.powerDef, ptr %269, i32 0, i32 0
  %271 = getelementptr inbounds %class.powerComponents, ptr %270, i32 0, i32 0
  %272 = load double, ptr %271, align 8, !tbaa !49
  %273 = getelementptr inbounds %class.selection_logic, ptr %15, i32 0, i32 7
  %274 = load double, ptr %273, align 8, !tbaa !61
  %275 = fmul double %272, %274
  %276 = getelementptr inbounds %class.McPATComponent, ptr %15, i32 0, i32 7
  %277 = getelementptr inbounds %class.McPATOutput, ptr %276, i32 0, i32 5
  store double %275, ptr %277, align 8, !tbaa !62
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #4
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.ceil.f64(double) #2

declare noundef double @_Z8drain_C_diiidbbb(double noundef, i32 noundef, i32 noundef, i32 noundef, double noundef, i1 noundef zeroext, i1 noundef zeroext, i1 noundef zeroext) #3

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #2

declare noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef, double noundef, i32 noundef, i32 noundef, i1 noundef zeroext, i1 noundef zeroext, i1 noundef zeroext, i32 noundef) #3

declare noundef double @_Z6gate_Cddbbb(double noundef, double noundef, i1 noundef zeroext, i1 noundef zeroext, i1 noundef zeroext) #3

declare noundef double @_Z17cmos_Isub_leakageddi9Gate_typebbb17Half_net_topology(double noundef, double noundef, i32 noundef, i32 noundef, i1 noundef zeroext, i1 noundef zeroext, i1 noundef zeroext, i32 noundef) #3

declare noundef double @_Z31longer_channel_device_reduction9Device_ty9Core_type(i32 noundef, i32 noundef) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !14, i64 1416}
!10 = !{!"_ZTS15selection_logic", !11, i64 0, !19, i64 1352, !17, i64 1360, !31, i64 1728, !18, i64 9928, !18, i64 9932, !14, i64 9936, !18, i64 9944, !33, i64 9948, !34, i64 9952}
!11 = !{!"_ZTS14McPATComponent", !12, i64 8, !6, i64 288, !17, i64 296, !21, i64 664, !14, i64 696, !24, i64 704, !28, i64 728, !29, i64 776, !29, i64 944, !15, i64 1112, !15, i64 1232}
!12 = !{!"_ZTS9Component", !13, i64 0, !15, i64 24, !15, i64 144, !14, i64 264, !14, i64 272}
!13 = !{!"_ZTS4Area", !14, i64 0, !14, i64 8, !14, i64 16}
!14 = !{!"double", !7, i64 0}
!15 = !{!"_ZTS8powerDef", !16, i64 0, !16, i64 40, !16, i64 80}
!16 = !{!"_ZTS15powerComponents", !14, i64 0, !14, i64 8, !14, i64 16, !14, i64 24, !14, i64 32}
!17 = !{!"_ZTS14InputParameter", !18, i64 0, !18, i64 4, !18, i64 8, !18, i64 12, !18, i64 16, !19, i64 20, !18, i64 24, !18, i64 28, !18, i64 32, !18, i64 36, !18, i64 40, !18, i64 44, !14, i64 48, !14, i64 56, !18, i64 64, !18, i64 68, !18, i64 72, !18, i64 76, !18, i64 80, !19, i64 84, !19, i64 85, !19, i64 86, !19, i64 87, !19, i64 88, !18, i64 92, !18, i64 96, !18, i64 100, !18, i64 104, !18, i64 108, !18, i64 112, !18, i64 116, !18, i64 120, !18, i64 124, !18, i64 128, !18, i64 132, !18, i64 136, !18, i64 140, !18, i64 144, !18, i64 148, !20, i64 152, !18, i64 156, !19, i64 160, !18, i64 164, !18, i64 168, !18, i64 172, !18, i64 176, !18, i64 180, !18, i64 184, !18, i64 188, !19, i64 192, !18, i64 196, !18, i64 200, !18, i64 204, !18, i64 208, !18, i64 212, !18, i64 216, !18, i64 220, !18, i64 224, !18, i64 228, !18, i64 232, !18, i64 236, !18, i64 240, !18, i64 244, !18, i64 248, !18, i64 252, !18, i64 256, !18, i64 260, !18, i64 264, !18, i64 268, !18, i64 272, !18, i64 276, !18, i64 280, !18, i64 284, !18, i64 288, !18, i64 292, !18, i64 296, !19, i64 300, !18, i64 304, !18, i64 308, !18, i64 312, !19, i64 316, !19, i64 317, !18, i64 320, !18, i64 324, !19, i64 328, !14, i64 336, !14, i64 344, !19, i64 352, !18, i64 356, !18, i64 360, !19, i64 364}
!18 = !{!"int", !7, i64 0}
!19 = !{!"bool", !7, i64 0}
!20 = !{!"_ZTS9Wire_type", !7, i64 0}
!21 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !22, i64 0, !23, i64 8, !7, i64 16}
!22 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!23 = !{!"long", !7, i64 0}
!24 = !{!"_ZTSSt6vectorIP14McPATComponentSaIS1_EE", !25, i64 0}
!25 = !{!"_ZTSSt12_Vector_baseIP14McPATComponentSaIS1_EE", !26, i64 0}
!26 = !{!"_ZTSNSt12_Vector_baseIP14McPATComponentSaIS1_EE12_Vector_implE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseIP14McPATComponentSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!28 = !{!"_ZTS11McPATOutput", !14, i64 0, !14, i64 8, !14, i64 16, !14, i64 24, !14, i64 32, !14, i64 40}
!29 = !{!"_ZTS8statsDef", !30, i64 0, !30, i64 24, !30, i64 48, !30, i64 72, !30, i64 96, !30, i64 120, !30, i64 144}
!30 = !{!"_ZTS15statsComponents", !14, i64 0, !14, i64 8, !14, i64 16}
!31 = !{!"_ZTS9uca_org_t", !6, i64 0, !6, i64 8, !14, i64 16, !14, i64 24, !14, i64 32, !14, i64 40, !15, i64 48, !14, i64 168, !14, i64 176, !14, i64 184, !7, i64 192, !14, i64 296, !19, i64 304, !32, i64 312, !32, i64 4256}
!32 = !{!"_ZTS17results_mem_array", !18, i64 0, !18, i64 4, !14, i64 8, !18, i64 16, !18, i64 20, !18, i64 24, !18, i64 28, !18, i64 32, !18, i64 36, !14, i64 40, !14, i64 48, !14, i64 56, !14, i64 64, !14, i64 72, !14, i64 80, !14, i64 88, !14, i64 96, !14, i64 104, !14, i64 112, !14, i64 120, !14, i64 128, !14, i64 136, !14, i64 144, !14, i64 152, !14, i64 160, !14, i64 168, !14, i64 176, !14, i64 184, !14, i64 192, !14, i64 200, !14, i64 208, !14, i64 216, !14, i64 224, !14, i64 232, !14, i64 240, !14, i64 248, !14, i64 256, !14, i64 264, !15, i64 272, !15, i64 392, !15, i64 512, !15, i64 632, !15, i64 752, !15, i64 872, !15, i64 992, !15, i64 1112, !15, i64 1232, !15, i64 1352, !15, i64 1472, !15, i64 1592, !15, i64 1712, !15, i64 1832, !15, i64 1952, !15, i64 2072, !15, i64 2192, !15, i64 2312, !15, i64 2432, !15, i64 2552, !15, i64 2672, !15, i64 2792, !15, i64 2912, !15, i64 3032, !15, i64 3152, !15, i64 3272, !15, i64 3392, !15, i64 3512, !15, i64 3632, !14, i64 3752, !14, i64 3760, !14, i64 3768, !14, i64 3776, !14, i64 3784, !14, i64 3792, !14, i64 3800, !14, i64 3808, !14, i64 3816, !14, i64 3824, !14, i64 3832, !14, i64 3840, !14, i64 3848, !14, i64 3856, !14, i64 3864, !14, i64 3872, !14, i64 3880, !14, i64 3888, !14, i64 3896, !14, i64 3904, !14, i64 3912, !14, i64 3920, !14, i64 3928, !14, i64 3936}
!33 = !{!"_ZTS9Device_ty", !7, i64 0}
!34 = !{!"_ZTS9Core_type", !7, i64 0}
!35 = !{!14, !14, i64 0}
!36 = !{!18, !18, i64 0}
!37 = !{!10, !18, i64 9928}
!38 = distinct !{!38, !39}
!39 = !{!"llvm.loop.mustprogress"}
!40 = !{!41, !14, i64 312}
!41 = !{!"_ZTS19TechnologyParameter", !14, i64 0, !14, i64 8, !14, i64 16, !14, i64 24, !14, i64 32, !14, i64 40, !14, i64 48, !14, i64 56, !14, i64 64, !14, i64 72, !14, i64 80, !14, i64 88, !14, i64 96, !14, i64 104, !14, i64 112, !14, i64 120, !14, i64 128, !14, i64 136, !14, i64 144, !14, i64 152, !14, i64 160, !14, i64 168, !14, i64 176, !14, i64 184, !14, i64 192, !14, i64 200, !14, i64 208, !14, i64 216, !14, i64 224, !14, i64 232, !14, i64 240, !14, i64 248, !14, i64 256, !14, i64 264, !14, i64 272, !14, i64 280, !14, i64 288, !14, i64 296, !14, i64 304, !14, i64 312, !14, i64 320, !14, i64 328, !14, i64 336, !14, i64 344, !23, i64 352, !42, i64 360, !42, i64 528, !42, i64 696, !42, i64 864, !42, i64 1032, !43, i64 1200, !43, i64 1264, !43, i64 1328, !44, i64 1392, !45, i64 1416, !45, i64 1464, !45, i64 1512}
!42 = !{!"_ZTSN19TechnologyParameter10DeviceTypeE", !14, i64 0, !14, i64 8, !14, i64 16, !14, i64 24, !14, i64 32, !14, i64 40, !14, i64 48, !14, i64 56, !14, i64 64, !14, i64 72, !14, i64 80, !14, i64 88, !14, i64 96, !14, i64 104, !14, i64 112, !14, i64 120, !14, i64 128, !14, i64 136, !14, i64 144, !14, i64 152, !14, i64 160}
!43 = !{!"_ZTSN19TechnologyParameter16InterconnectTypeE", !14, i64 0, !14, i64 8, !14, i64 16, !14, i64 24, !14, i64 32, !14, i64 40, !14, i64 48, !14, i64 56}
!44 = !{!"_ZTSN19TechnologyParameter13ScalingFactorE", !14, i64 0, !14, i64 8, !14, i64 16}
!45 = !{!"_ZTSN19TechnologyParameter10MemoryTypeE", !14, i64 0, !14, i64 8, !14, i64 16, !14, i64 24, !14, i64 32, !14, i64 40}
!46 = !{!41, !14, i64 936}
!47 = !{!12, !14, i64 40}
!48 = !{!10, !18, i64 9932}
!49 = !{!12, !14, i64 24}
!50 = !{!12, !14, i64 32}
!51 = !{!41, !14, i64 336}
!52 = !{!12, !14, i64 64}
!53 = !{!12, !14, i64 104}
!54 = !{!10, !33, i64 9948}
!55 = !{!10, !34, i64 9952}
!56 = !{!12, !14, i64 56}
!57 = !{!11, !14, i64 696}
!58 = !{!11, !14, i64 744}
!59 = !{!11, !14, i64 752}
!60 = !{!11, !14, i64 760}
!61 = !{!10, !14, i64 9936}
!62 = !{!11, !14, i64 768}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.TechnologyParameter = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, i64, %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::ScalingFactor", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType" }
%"class.TechnologyParameter::DeviceType" = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::InterconnectType" = type { double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::ScalingFactor" = type { double, double, double }
%"class.TechnologyParameter::MemoryType" = type { double, double, double, double, double, double }

@g_tp = external local_unnamed_addr global %class.TechnologyParameter, align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN15selection_logic13computeEnergyEv(ptr nocapture noundef nonnull align 8 dereferenceable(9956) %0) unnamed_addr #0 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 1416
  %3 = load double, ptr %2, align 8, !tbaa !5
  %4 = getelementptr inbounds i8, ptr %0, i64 9928
  %.promoted = load i32, ptr %4, align 8, !tbaa !34
  %5 = icmp sgt i32 %.promoted, 4
  br i1 %5, label %.lr.ph, label %13

.lr.ph:                                           ; preds = %1, %.lr.ph
  %.051 = phi i32 [ %11, %.lr.ph ], [ 1, %1 ]
  %6 = phi i32 [ %10, %.lr.ph ], [ %.promoted, %1 ]
  %7 = uitofp nneg i32 %6 to double
  %8 = fmul double %7, 2.500000e-01
  %9 = tail call double @llvm.ceil.f64(double %8)
  %10 = fptosi double %9 to i32
  %11 = add nsw i32 %.051, %10
  %12 = icmp sgt i32 %10, 4
  br i1 %12, label %.lr.ph, label %._crit_edge, !llvm.loop !35

._crit_edge:                                      ; preds = %.lr.ph
  store i32 %10, ptr %4, align 8, !tbaa !34
  br label %13

13:                                               ; preds = %._crit_edge, %1
  %.0.lcssa = phi i32 [ %11, %._crit_edge ], [ 1, %1 ]
  %14 = fmul double %3, 6.250000e+00
  %15 = fmul double %3, 1.875000e+01
  %16 = fmul double %3, 5.000000e+01
  %17 = fmul double %3, 1.250000e+01
  %18 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 312), align 8, !tbaa !37
  %19 = tail call noundef double @_Z8drain_C_diiidbbb(double noundef %17, i32 noundef 1, i32 noundef 1, i32 noundef 1, double noundef %18, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false)
  %20 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 312), align 8, !tbaa !37
  %21 = tail call noundef double @_Z8drain_C_diiidbbb(double noundef %16, i32 noundef 0, i32 noundef 1, i32 noundef 1, double noundef %20, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false)
  %22 = tail call double @llvm.fmuladd.f64(double %19, double 4.000000e+00, double %21)
  %23 = tail call noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef %17, double noundef %16, i32 noundef 4, i32 noundef 4, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %24 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 936), align 8, !tbaa !43
  %25 = fmul double %23, %24
  %26 = getelementptr inbounds i8, ptr %0, i64 32
  %27 = getelementptr inbounds i8, ptr %0, i64 48
  store double %25, ptr %27, align 8, !tbaa !44
  %28 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 312), align 8, !tbaa !37
  %29 = tail call noundef double @_Z8drain_C_diiidbbb(double noundef %17, i32 noundef 1, i32 noundef 1, i32 noundef 1, double noundef %28, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false)
  %30 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 312), align 8, !tbaa !37
  %31 = tail call noundef double @_Z8drain_C_diiidbbb(double noundef %15, i32 noundef 0, i32 noundef 1, i32 noundef 1, double noundef %30, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false)
  %32 = fadd double %29, %31
  %33 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 312), align 8, !tbaa !37
  %34 = tail call noundef double @_Z8drain_C_diiidbbb(double noundef %17, i32 noundef 1, i32 noundef 1, i32 noundef 1, double noundef %33, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false)
  %35 = tail call double @llvm.fmuladd.f64(double %34, double 2.000000e+00, double %32)
  %36 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 312), align 8, !tbaa !37
  %37 = tail call noundef double @_Z8drain_C_diiidbbb(double noundef %15, i32 noundef 0, i32 noundef 2, i32 noundef 1, double noundef %36, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false)
  %38 = fadd double %35, %37
  %39 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 312), align 8, !tbaa !37
  %40 = tail call noundef double @_Z8drain_C_diiidbbb(double noundef %17, i32 noundef 1, i32 noundef 1, i32 noundef 1, double noundef %39, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false)
  %41 = tail call double @llvm.fmuladd.f64(double %40, double 3.000000e+00, double %38)
  %42 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 312), align 8, !tbaa !37
  %43 = tail call noundef double @_Z8drain_C_diiidbbb(double noundef %15, i32 noundef 0, i32 noundef 3, i32 noundef 1, double noundef %42, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false)
  %44 = fadd double %41, %43
  %45 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 312), align 8, !tbaa !37
  %46 = tail call noundef double @_Z8drain_C_diiidbbb(double noundef %17, i32 noundef 1, i32 noundef 1, i32 noundef 1, double noundef %45, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false)
  %47 = tail call double @llvm.fmuladd.f64(double %46, double 4.000000e+00, double %44)
  %48 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 312), align 8, !tbaa !37
  %49 = tail call noundef double @_Z8drain_C_diiidbbb(double noundef %15, i32 noundef 0, i32 noundef 4, i32 noundef 1, double noundef %48, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false)
  %50 = fadd double %47, %49
  %51 = fadd double %14, %17
  %52 = tail call noundef double @_Z6gate_Cddbbb(double noundef %51, double noundef 2.000000e+01, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false)
  %53 = tail call double @llvm.fmuladd.f64(double %52, double 8.000000e+00, double %50)
  %54 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 312), align 8, !tbaa !37
  %55 = tail call noundef double @_Z8drain_C_diiidbbb(double noundef %14, i32 noundef 1, i32 noundef 1, i32 noundef 1, double noundef %54, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false)
  %56 = tail call double @llvm.fmuladd.f64(double %55, double 4.000000e+00, double %53)
  %57 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 312), align 8, !tbaa !37
  %58 = tail call noundef double @_Z8drain_C_diiidbbb(double noundef %17, i32 noundef 0, i32 noundef 1, i32 noundef 1, double noundef %57, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false)
  %59 = tail call double @llvm.fmuladd.f64(double %58, double 8.000000e+00, double %56)
  %60 = fadd double %17, %15
  %61 = tail call noundef double @_Z6gate_Cddbbb(double noundef %60, double noundef 1.000000e+01, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false)
  %62 = tail call double @llvm.fmuladd.f64(double %61, double 2.000000e+01, double %59)
  %63 = getelementptr inbounds i8, ptr %0, i64 9932
  %64 = load i32, ptr %63, align 4, !tbaa !45
  %65 = mul nsw i32 %64, %.0.lcssa
  %66 = sitofp i32 %65 to double
  %67 = fadd double %22, %62
  %68 = tail call double @llvm.fmuladd.f64(double %66, double %67, double 0.000000e+00)
  %69 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 936), align 8, !tbaa !43
  %70 = fmul double %69, %68
  %71 = fmul double %69, %70
  %72 = fmul double %71, 2.000000e+00
  store double %72, ptr %26, align 8, !tbaa !46
  %73 = tail call noundef double @_Z17cmos_Isub_leakageddi9Gate_typebbb17Half_net_topology(double noundef %17, double noundef %15, i32 noundef 2, i32 noundef 4, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %74 = tail call noundef double @_Z17cmos_Isub_leakageddi9Gate_typebbb17Half_net_topology(double noundef %17, double noundef %15, i32 noundef 3, i32 noundef 4, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %75 = fadd double %73, %74
  %76 = tail call noundef double @_Z17cmos_Isub_leakageddi9Gate_typebbb17Half_net_topology(double noundef %17, double noundef %15, i32 noundef 4, i32 noundef 4, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %77 = fadd double %75, %76
  %78 = tail call noundef double @_Z17cmos_Isub_leakageddi9Gate_typebbb17Half_net_topology(double noundef %14, double noundef %17, i32 noundef 2, i32 noundef 4, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %79 = tail call double @llvm.fmuladd.f64(double %78, double 4.000000e+00, double %77)
  %80 = tail call noundef double @_Z17cmos_Isub_leakageddi9Gate_typebbb17Half_net_topology(double noundef %14, double noundef %17, i32 noundef 1, i32 noundef 2, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %81 = fmul double %80, 2.000000e+00
  %82 = tail call double @llvm.fmuladd.f64(double %81, double 3.000000e+00, double %79)
  %83 = fmul double %82, %66
  %84 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 936), align 8, !tbaa !43
  %85 = fmul double %84, %83
  %86 = getelementptr inbounds i8, ptr %0, i64 40
  store double %85, ptr %86, align 8, !tbaa !47
  %87 = load i32, ptr %63, align 4, !tbaa !45
  %88 = mul nsw i32 %87, %.0.lcssa
  %89 = sitofp i32 %88 to double
  %90 = tail call noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef %17, double noundef %15, i32 noundef 2, i32 noundef 4, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %91 = tail call noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef %17, double noundef %15, i32 noundef 3, i32 noundef 4, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %92 = fadd double %90, %91
  %93 = tail call noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef %17, double noundef %15, i32 noundef 4, i32 noundef 4, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %94 = fadd double %92, %93
  %95 = tail call noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef %14, double noundef %17, i32 noundef 2, i32 noundef 4, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %96 = tail call double @llvm.fmuladd.f64(double %95, double 4.000000e+00, double %94)
  %97 = tail call noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef %14, double noundef %17, i32 noundef 1, i32 noundef 2, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %98 = fmul double %97, 2.000000e+00
  %99 = tail call double @llvm.fmuladd.f64(double %98, double 3.000000e+00, double %96)
  %100 = fmul double %99, %89
  %101 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 936), align 8, !tbaa !43
  %102 = fmul double %101, %100
  store double %102, ptr %27, align 8, !tbaa !44
  %103 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 336), align 8, !tbaa !48
  %104 = load double, ptr %26, align 8, !tbaa !46
  %105 = fmul double %103, %104
  store double %105, ptr %26, align 8, !tbaa !46
  %106 = getelementptr inbounds i8, ptr %0, i64 72
  %107 = load double, ptr %106, align 8, !tbaa !49
  %108 = fmul double %103, %107
  store double %108, ptr %106, align 8, !tbaa !49
  %109 = getelementptr inbounds i8, ptr %0, i64 112
  %110 = load double, ptr %109, align 8, !tbaa !50
  %111 = fmul double %103, %110
  store double %111, ptr %109, align 8, !tbaa !50
  %112 = getelementptr inbounds i8, ptr %0, i64 9948
  %113 = load i32, ptr %112, align 4, !tbaa !51
  %114 = getelementptr inbounds i8, ptr %0, i64 9952
  %115 = load i32, ptr %114, align 8, !tbaa !52
  %116 = tail call noundef double @_Z31longer_channel_device_reduction9Device_ty9Core_type(i32 noundef %113, i32 noundef %115)
  %117 = getelementptr inbounds i8, ptr %0, i64 64
  %118 = load double, ptr %26, align 8, !tbaa !46
  %119 = getelementptr inbounds i8, ptr %0, i64 696
  %120 = load double, ptr %119, align 8, !tbaa !53
  %121 = fmul double %118, %120
  %122 = getelementptr inbounds i8, ptr %0, i64 744
  store double %121, ptr %122, align 8, !tbaa !54
  %123 = getelementptr inbounds i8, ptr %0, i64 752
  %124 = load <2 x double>, ptr %86, align 8, !tbaa !55
  %125 = extractelement <2 x double> %124, i64 0
  %126 = fmul double %116, %125
  store double %126, ptr %117, align 8, !tbaa !56
  store <2 x double> %124, ptr %123, align 8, !tbaa !55
  %127 = getelementptr inbounds i8, ptr %0, i64 9936
  %128 = load double, ptr %127, align 8, !tbaa !57
  %129 = fmul double %118, %128
  %130 = getelementptr inbounds i8, ptr %0, i64 768
  store double %129, ptr %130, align 8, !tbaa !58
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.ceil.f64(double) #1

declare noundef double @_Z8drain_C_diiidbbb(double noundef, i32 noundef, i32 noundef, i32 noundef, double noundef, i1 noundef zeroext, i1 noundef zeroext, i1 noundef zeroext) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #1

declare noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef, double noundef, i32 noundef, i32 noundef, i1 noundef zeroext, i1 noundef zeroext, i1 noundef zeroext, i32 noundef) local_unnamed_addr #2

declare noundef double @_Z6gate_Cddbbb(double noundef, double noundef, i1 noundef zeroext, i1 noundef zeroext, i1 noundef zeroext) local_unnamed_addr #2

declare noundef double @_Z17cmos_Isub_leakageddi9Gate_typebbb17Half_net_topology(double noundef, double noundef, i32 noundef, i32 noundef, i1 noundef zeroext, i1 noundef zeroext, i1 noundef zeroext, i32 noundef) local_unnamed_addr #2

declare noundef double @_Z31longer_channel_device_reduction9Device_ty9Core_type(i32 noundef, i32 noundef) local_unnamed_addr #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 1416}
!6 = !{!"_ZTS15selection_logic", !7, i64 0, !18, i64 1352, !16, i64 1360, !30, i64 1728, !17, i64 9928, !17, i64 9932, !10, i64 9936, !17, i64 9944, !32, i64 9948, !33, i64 9952}
!7 = !{!"_ZTS14McPATComponent", !8, i64 8, !15, i64 288, !16, i64 296, !20, i64 664, !10, i64 696, !23, i64 704, !27, i64 728, !28, i64 776, !28, i64 944, !13, i64 1112, !13, i64 1232}
!8 = !{!"_ZTS9Component", !9, i64 0, !13, i64 24, !13, i64 144, !10, i64 264, !10, i64 272}
!9 = !{!"_ZTS4Area", !10, i64 0, !10, i64 8, !10, i64 16}
!10 = !{!"double", !11, i64 0}
!11 = !{!"omnipotent char", !12, i64 0}
!12 = !{!"Simple C++ TBAA"}
!13 = !{!"_ZTS8powerDef", !14, i64 0, !14, i64 40, !14, i64 80}
!14 = !{!"_ZTS15powerComponents", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32}
!15 = !{!"any pointer", !11, i64 0}
!16 = !{!"_ZTS14InputParameter", !17, i64 0, !17, i64 4, !17, i64 8, !17, i64 12, !17, i64 16, !18, i64 20, !17, i64 24, !17, i64 28, !17, i64 32, !17, i64 36, !17, i64 40, !17, i64 44, !10, i64 48, !10, i64 56, !17, i64 64, !17, i64 68, !17, i64 72, !17, i64 76, !17, i64 80, !18, i64 84, !18, i64 85, !18, i64 86, !18, i64 87, !18, i64 88, !17, i64 92, !17, i64 96, !17, i64 100, !17, i64 104, !17, i64 108, !17, i64 112, !17, i64 116, !17, i64 120, !17, i64 124, !17, i64 128, !17, i64 132, !17, i64 136, !17, i64 140, !17, i64 144, !17, i64 148, !19, i64 152, !17, i64 156, !18, i64 160, !17, i64 164, !17, i64 168, !17, i64 172, !17, i64 176, !17, i64 180, !17, i64 184, !17, i64 188, !18, i64 192, !17, i64 196, !17, i64 200, !17, i64 204, !17, i64 208, !17, i64 212, !17, i64 216, !17, i64 220, !17, i64 224, !17, i64 228, !17, i64 232, !17, i64 236, !17, i64 240, !17, i64 244, !17, i64 248, !17, i64 252, !17, i64 256, !17, i64 260, !17, i64 264, !17, i64 268, !17, i64 272, !17, i64 276, !17, i64 280, !17, i64 284, !17, i64 288, !17, i64 292, !17, i64 296, !18, i64 300, !17, i64 304, !17, i64 308, !17, i64 312, !18, i64 316, !18, i64 317, !17, i64 320, !17, i64 324, !18, i64 328, !10, i64 336, !10, i64 344, !18, i64 352, !17, i64 356, !17, i64 360, !18, i64 364}
!17 = !{!"int", !11, i64 0}
!18 = !{!"bool", !11, i64 0}
!19 = !{!"_ZTS9Wire_type", !11, i64 0}
!20 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !21, i64 0, !22, i64 8, !11, i64 16}
!21 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !15, i64 0}
!22 = !{!"long", !11, i64 0}
!23 = !{!"_ZTSSt6vectorIP14McPATComponentSaIS1_EE", !24, i64 0}
!24 = !{!"_ZTSSt12_Vector_baseIP14McPATComponentSaIS1_EE", !25, i64 0}
!25 = !{!"_ZTSNSt12_Vector_baseIP14McPATComponentSaIS1_EE12_Vector_implE", !26, i64 0}
!26 = !{!"_ZTSNSt12_Vector_baseIP14McPATComponentSaIS1_EE17_Vector_impl_dataE", !15, i64 0, !15, i64 8, !15, i64 16}
!27 = !{!"_ZTS11McPATOutput", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40}
!28 = !{!"_ZTS8statsDef", !29, i64 0, !29, i64 24, !29, i64 48, !29, i64 72, !29, i64 96, !29, i64 120, !29, i64 144}
!29 = !{!"_ZTS15statsComponents", !10, i64 0, !10, i64 8, !10, i64 16}
!30 = !{!"_ZTS9uca_org_t", !15, i64 0, !15, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40, !13, i64 48, !10, i64 168, !10, i64 176, !10, i64 184, !11, i64 192, !10, i64 296, !18, i64 304, !31, i64 312, !31, i64 4256}
!31 = !{!"_ZTS17results_mem_array", !17, i64 0, !17, i64 4, !10, i64 8, !17, i64 16, !17, i64 20, !17, i64 24, !17, i64 28, !17, i64 32, !17, i64 36, !10, i64 40, !10, i64 48, !10, i64 56, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !10, i64 144, !10, i64 152, !10, i64 160, !10, i64 168, !10, i64 176, !10, i64 184, !10, i64 192, !10, i64 200, !10, i64 208, !10, i64 216, !10, i64 224, !10, i64 232, !10, i64 240, !10, i64 248, !10, i64 256, !10, i64 264, !13, i64 272, !13, i64 392, !13, i64 512, !13, i64 632, !13, i64 752, !13, i64 872, !13, i64 992, !13, i64 1112, !13, i64 1232, !13, i64 1352, !13, i64 1472, !13, i64 1592, !13, i64 1712, !13, i64 1832, !13, i64 1952, !13, i64 2072, !13, i64 2192, !13, i64 2312, !13, i64 2432, !13, i64 2552, !13, i64 2672, !13, i64 2792, !13, i64 2912, !13, i64 3032, !13, i64 3152, !13, i64 3272, !13, i64 3392, !13, i64 3512, !13, i64 3632, !10, i64 3752, !10, i64 3760, !10, i64 3768, !10, i64 3776, !10, i64 3784, !10, i64 3792, !10, i64 3800, !10, i64 3808, !10, i64 3816, !10, i64 3824, !10, i64 3832, !10, i64 3840, !10, i64 3848, !10, i64 3856, !10, i64 3864, !10, i64 3872, !10, i64 3880, !10, i64 3888, !10, i64 3896, !10, i64 3904, !10, i64 3912, !10, i64 3920, !10, i64 3928, !10, i64 3936}
!32 = !{!"_ZTS9Device_ty", !11, i64 0}
!33 = !{!"_ZTS9Core_type", !11, i64 0}
!34 = !{!6, !17, i64 9928}
!35 = distinct !{!35, !36}
!36 = !{!"llvm.loop.mustprogress"}
!37 = !{!38, !10, i64 312}
!38 = !{!"_ZTS19TechnologyParameter", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !10, i64 56, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !10, i64 144, !10, i64 152, !10, i64 160, !10, i64 168, !10, i64 176, !10, i64 184, !10, i64 192, !10, i64 200, !10, i64 208, !10, i64 216, !10, i64 224, !10, i64 232, !10, i64 240, !10, i64 248, !10, i64 256, !10, i64 264, !10, i64 272, !10, i64 280, !10, i64 288, !10, i64 296, !10, i64 304, !10, i64 312, !10, i64 320, !10, i64 328, !10, i64 336, !10, i64 344, !22, i64 352, !39, i64 360, !39, i64 528, !39, i64 696, !39, i64 864, !39, i64 1032, !40, i64 1200, !40, i64 1264, !40, i64 1328, !41, i64 1392, !42, i64 1416, !42, i64 1464, !42, i64 1512}
!39 = !{!"_ZTSN19TechnologyParameter10DeviceTypeE", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !10, i64 56, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !10, i64 144, !10, i64 152, !10, i64 160}
!40 = !{!"_ZTSN19TechnologyParameter16InterconnectTypeE", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !10, i64 56}
!41 = !{!"_ZTSN19TechnologyParameter13ScalingFactorE", !10, i64 0, !10, i64 8, !10, i64 16}
!42 = !{!"_ZTSN19TechnologyParameter10MemoryTypeE", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40}
!43 = !{!38, !10, i64 936}
!44 = !{!8, !10, i64 40}
!45 = !{!6, !17, i64 9932}
!46 = !{!8, !10, i64 24}
!47 = !{!8, !10, i64 32}
!48 = !{!38, !10, i64 336}
!49 = !{!8, !10, i64 64}
!50 = !{!8, !10, i64 104}
!51 = !{!6, !32, i64 9948}
!52 = !{!6, !33, i64 9952}
!53 = !{!7, !10, i64 696}
!54 = !{!7, !10, i64 744}
!55 = !{!10, !10, i64 0}
!56 = !{!8, !10, i64 56}
!57 = !{!6, !10, i64 9936}
!58 = !{!7, !10, i64 768}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass