; LLVM IR from beagleboard/librobotcontrol :: library/src/io (i2c)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.rc_i2c_state_t = type { i8, i32, i32, i32 }

@i2c = external hidden global [6 x %struct.rc_i2c_state_t], align 16
@stderr = external global ptr, align 8
@.str.8 = external hidden unnamed_addr constant [54 x i8], align 1
@.str.9 = external hidden unnamed_addr constant [53 x i8], align 1
@.str.10 = external hidden unnamed_addr constant [62 x i8], align 1

; Function Attrs: nounwind uwtable
declare hidden i32 @__check_bus_range(i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
declare i64 @llvm.expect.i64(i64, i64) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nounwind
declare i32 @fprintf(ptr noundef, ptr noundef, ...) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

declare i64 @write(i32 noundef, ptr noundef, i64 noundef) #4

declare i64 @read(i32 noundef, ptr noundef, i64 noundef) #4

; Function Attrs: nounwind uwtable
define dso_local i32 @rc_i2c_read_words(i32 noundef %0, i8 noundef zeroext %1, i64 noundef %2, ptr noundef %3) #0 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i8, align 1
  %8 = alloca i64, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i64, align 8
  %13 = alloca ptr, align 8
  %14 = alloca i64, align 8
  %15 = alloca i32, align 4
  store i32 %0, ptr %6, align 4, !tbaa !5
  store i8 %1, ptr %7, align 1, !tbaa !9
  store i64 %2, ptr %8, align 8, !tbaa !10
  store ptr %3, ptr %9, align 8, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #6
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #6
  %16 = load i64, ptr %8, align 8, !tbaa !10
  %17 = mul i64 %16, 2
  %18 = call ptr @llvm.stacksave.p0()
  store ptr %18, ptr %13, align 8
  %19 = alloca i8, i64 %17, align 16
  store i64 %17, ptr %14, align 8
  %20 = load i32, ptr %6, align 4, !tbaa !5
  %21 = call i32 @__check_bus_range(i32 noundef %20)
  %22 = icmp ne i32 %21, 0
  %23 = xor i1 %22, true
  %24 = xor i1 %23, true
  %25 = zext i1 %24 to i32
  %26 = sext i32 %25 to i64
  %27 = call i64 @llvm.expect.i64(i64 %26, i64 0)
  %28 = icmp ne i64 %27, 0
  br i1 %28, label %29, label %30

29:                                               ; preds = %4
  store i32 -1, ptr %5, align 4
  store i32 1, ptr %15, align 4
  br label %138

30:                                               ; preds = %4
  %31 = load i32, ptr %6, align 4, !tbaa !5
  %32 = sext i32 %31 to i64
  %33 = getelementptr inbounds [6 x %struct.rc_i2c_state_t], ptr @i2c, i64 0, i64 %32
  %34 = getelementptr inbounds %struct.rc_i2c_state_t, ptr %33, i32 0, i32 2
  %35 = load i32, ptr %34, align 8, !tbaa !14
  %36 = icmp eq i32 %35, 0
  %37 = xor i1 %36, true
  %38 = xor i1 %37, true
  %39 = zext i1 %38 to i32
  %40 = sext i32 %39 to i64
  %41 = call i64 @llvm.expect.i64(i64 %40, i64 0)
  %42 = icmp ne i64 %41, 0
  br i1 %42, label %43, label %46

43:                                               ; preds = %30
  %44 = load ptr, ptr @stderr, align 8, !tbaa !12
  %45 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %44, ptr noundef @.str.8) #6
  store i32 -1, ptr %5, align 4
  store i32 1, ptr %15, align 4
  br label %138

46:                                               ; preds = %30
  %47 = load i32, ptr %6, align 4, !tbaa !5
  %48 = sext i32 %47 to i64
  %49 = getelementptr inbounds [6 x %struct.rc_i2c_state_t], ptr @i2c, i64 0, i64 %48
  %50 = getelementptr inbounds %struct.rc_i2c_state_t, ptr %49, i32 0, i32 3
  %51 = load i32, ptr %50, align 4, !tbaa !16
  store i32 %51, ptr %11, align 4, !tbaa !5
  %52 = load i32, ptr %6, align 4, !tbaa !5
  %53 = sext i32 %52 to i64
  %54 = getelementptr inbounds [6 x %struct.rc_i2c_state_t], ptr @i2c, i64 0, i64 %53
  %55 = getelementptr inbounds %struct.rc_i2c_state_t, ptr %54, i32 0, i32 3
  store i32 1, ptr %55, align 4, !tbaa !16
  %56 = load i32, ptr %6, align 4, !tbaa !5
  %57 = sext i32 %56 to i64
  %58 = getelementptr inbounds [6 x %struct.rc_i2c_state_t], ptr @i2c, i64 0, i64 %57
  %59 = getelementptr inbounds %struct.rc_i2c_state_t, ptr %58, i32 0, i32 1
  %60 = load i32, ptr %59, align 4, !tbaa !17
  %61 = call i64 @write(i32 noundef %60, ptr noundef %7, i64 noundef 1)
  %62 = trunc i64 %61 to i32
  store i32 %62, ptr %10, align 4, !tbaa !5
  %63 = load i32, ptr %10, align 4, !tbaa !5
  %64 = icmp ne i32 %63, 1
  %65 = xor i1 %64, true
  %66 = xor i1 %65, true
  %67 = zext i1 %66 to i32
  %68 = sext i32 %67 to i64
  %69 = call i64 @llvm.expect.i64(i64 %68, i64 0)
  %70 = icmp ne i64 %69, 0
  br i1 %70, label %71, label %79

71:                                               ; preds = %46
  %72 = load ptr, ptr @stderr, align 8, !tbaa !12
  %73 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %72, ptr noundef @.str.9) #6
  %74 = load i32, ptr %11, align 4, !tbaa !5
  %75 = load i32, ptr %6, align 4, !tbaa !5
  %76 = sext i32 %75 to i64
  %77 = getelementptr inbounds [6 x %struct.rc_i2c_state_t], ptr @i2c, i64 0, i64 %76
  %78 = getelementptr inbounds %struct.rc_i2c_state_t, ptr %77, i32 0, i32 3
  store i32 %74, ptr %78, align 4, !tbaa !16
  store i32 -1, ptr %5, align 4
  store i32 1, ptr %15, align 4
  br label %138

79:                                               ; preds = %46
  %80 = load i32, ptr %6, align 4, !tbaa !5
  %81 = sext i32 %80 to i64
  %82 = getelementptr inbounds [6 x %struct.rc_i2c_state_t], ptr @i2c, i64 0, i64 %81
  %83 = getelementptr inbounds %struct.rc_i2c_state_t, ptr %82, i32 0, i32 1
  %84 = load i32, ptr %83, align 4, !tbaa !17
  %85 = load i64, ptr %8, align 8, !tbaa !10
  %86 = mul i64 %85, 2
  %87 = call i64 @read(i32 noundef %84, ptr noundef %19, i64 noundef %86)
  %88 = trunc i64 %87 to i32
  store i32 %88, ptr %10, align 4, !tbaa !5
  %89 = load i32, ptr %10, align 4, !tbaa !5
  %90 = load i64, ptr %8, align 8, !tbaa !10
  %91 = mul i64 %90, 2
  %92 = trunc i64 %91 to i32
  %93 = icmp ne i32 %89, %92
  br i1 %93, label %94, label %105

94:                                               ; preds = %79
  %95 = load ptr, ptr @stderr, align 8, !tbaa !12
  %96 = load i32, ptr %10, align 4, !tbaa !5
  %97 = load i64, ptr %8, align 8, !tbaa !10
  %98 = mul i64 %97, 2
  %99 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %95, ptr noundef @.str.10, i32 noundef %96, i64 noundef %98) #6
  %100 = load i32, ptr %11, align 4, !tbaa !5
  %101 = load i32, ptr %6, align 4, !tbaa !5
  %102 = sext i32 %101 to i64
  %103 = getelementptr inbounds [6 x %struct.rc_i2c_state_t], ptr @i2c, i64 0, i64 %102
  %104 = getelementptr inbounds %struct.rc_i2c_state_t, ptr %103, i32 0, i32 3
  store i32 %100, ptr %104, align 4, !tbaa !16
  store i32 -1, ptr %5, align 4
  store i32 1, ptr %15, align 4
  br label %138

105:                                              ; preds = %79
  store i64 0, ptr %12, align 8, !tbaa !10
  br label %106

106:                                              ; preds = %129, %105
  %107 = load i64, ptr %12, align 8, !tbaa !10
  %108 = load i64, ptr %8, align 8, !tbaa !10
  %109 = icmp ult i64 %107, %108
  br i1 %109, label %110, label %132

110:                                              ; preds = %106
  %111 = load i64, ptr %12, align 8, !tbaa !10
  %112 = mul i64 %111, 2
  %113 = getelementptr inbounds i8, ptr %19, i64 %112
  %114 = load i8, ptr %113, align 1, !tbaa !9
  %115 = sext i8 %114 to i16
  %116 = zext i16 %115 to i32
  %117 = shl i32 %116, 8
  %118 = load i64, ptr %12, align 8, !tbaa !10
  %119 = mul i64 %118, 2
  %120 = add i64 %119, 1
  %121 = getelementptr inbounds i8, ptr %19, i64 %120
  %122 = load i8, ptr %121, align 1, !tbaa !9
  %123 = sext i8 %122 to i32
  %124 = or i32 %117, %123
  %125 = trunc i32 %124 to i16
  %126 = load ptr, ptr %9, align 8, !tbaa !12
  %127 = load i64, ptr %12, align 8, !tbaa !10
  %128 = getelementptr inbounds i16, ptr %126, i64 %127
  store i16 %125, ptr %128, align 2, !tbaa !18
  br label %129

129:                                              ; preds = %110
  %130 = load i64, ptr %12, align 8, !tbaa !10
  %131 = add i64 %130, 1
  store i64 %131, ptr %12, align 8, !tbaa !10
  br label %106, !llvm.loop !20

132:                                              ; preds = %106
  %133 = load i32, ptr %11, align 4, !tbaa !5
  %134 = load i32, ptr %6, align 4, !tbaa !5
  %135 = sext i32 %134 to i64
  %136 = getelementptr inbounds [6 x %struct.rc_i2c_state_t], ptr @i2c, i64 0, i64 %135
  %137 = getelementptr inbounds %struct.rc_i2c_state_t, ptr %136, i32 0, i32 3
  store i32 %133, ptr %137, align 4, !tbaa !16
  store i32 0, ptr %5, align 4
  store i32 1, ptr %15, align 4
  br label %138

138:                                              ; preds = %132, %94, %71, %43, %29
  %139 = load ptr, ptr %13, align 8
  call void @llvm.stackrestore.p0(ptr %139)
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #6
  %140 = load i32, ptr %5, align 4
  ret i32 %140
}

; Function Attrs: nocallback nofree nosync nounwind willreturn
declare ptr @llvm.stacksave.p0() #5

; Function Attrs: nocallback nofree nosync nounwind willreturn
declare void @llvm.stackrestore.p0(ptr) #5

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(none) }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nocallback nofree nosync nounwind willreturn }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"any pointer", !7, i64 0}
!14 = !{!15, !6, i64 8}
!15 = !{!"rc_i2c_state_t", !7, i64 0, !6, i64 4, !6, i64 8, !6, i64 12}
!16 = !{!15, !6, i64 12}
!17 = !{!15, !6, i64 4}
!18 = !{!19, !19, i64 0}
!19 = !{!"short", !7, i64 0}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.rc_i2c_state_t = type { i8, i32, i32, i32 }

@i2c = external hidden local_unnamed_addr global [6 x %struct.rc_i2c_state_t], align 16
@stderr = external local_unnamed_addr global ptr, align 8
@.str.8 = external hidden unnamed_addr constant [54 x i8], align 1
@.str.9 = external hidden unnamed_addr constant [53 x i8], align 1
@.str.10 = external hidden unnamed_addr constant [62 x i8], align 1

; Function Attrs: nounwind uwtable
declare hidden i32 @__check_bus_range(i32 noundef) local_unnamed_addr #0

; Function Attrs: nofree nounwind
declare noundef i32 @fprintf(ptr nocapture noundef, ptr nocapture noundef readonly, ...) local_unnamed_addr #1

; Function Attrs: nofree
declare noundef i64 @write(i32 noundef, ptr nocapture noundef readonly, i64 noundef) local_unnamed_addr #2

; Function Attrs: nofree
declare noundef i64 @read(i32 noundef, ptr nocapture noundef, i64 noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local range(i32 -1, 1) i32 @rc_i2c_read_words(i32 noundef %0, i8 noundef zeroext %1, i64 noundef %2, ptr nocapture noundef writeonly %3) local_unnamed_addr #0 {
  %5 = alloca i8, align 1
  store i8 %1, ptr %5, align 1, !tbaa !5
  %6 = shl i64 %2, 1
  %7 = alloca i8, i64 %6, align 16
  %8 = tail call i32 @__check_bus_range(i32 noundef %0)
  %.not = icmp eq i32 %8, 0
  br i1 %.not, label %9, label %56, !prof !8

9:                                                ; preds = %4
  %10 = sext i32 %0 to i64
  %11 = getelementptr inbounds [6 x %struct.rc_i2c_state_t], ptr @i2c, i64 0, i64 %10
  %12 = getelementptr inbounds i8, ptr %11, i64 8
  %13 = load i32, ptr %12, align 8, !tbaa !9
  %14 = icmp eq i32 %13, 0
  br i1 %14, label %15, label %18, !prof !12

15:                                               ; preds = %9
  %16 = load ptr, ptr @stderr, align 8, !tbaa !13
  %17 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %16, ptr noundef nonnull @.str.8) #3
  br label %56

18:                                               ; preds = %9
  %19 = getelementptr inbounds i8, ptr %11, i64 12
  %20 = load i32, ptr %19, align 4, !tbaa !15
  store i32 1, ptr %19, align 4, !tbaa !15
  %21 = getelementptr inbounds i8, ptr %11, i64 4
  %22 = load i32, ptr %21, align 4, !tbaa !16
  %23 = call i64 @write(i32 noundef %22, ptr noundef nonnull %5, i64 noundef 1) #4
  %24 = and i64 %23, 4294967295
  %.not29 = icmp eq i64 %24, 1
  br i1 %.not29, label %28, label %25, !prof !8

25:                                               ; preds = %18
  %26 = load ptr, ptr @stderr, align 8, !tbaa !13
  %27 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %26, ptr noundef nonnull @.str.9) #3
  store i32 %20, ptr %19, align 4, !tbaa !15
  br label %56

28:                                               ; preds = %18
  %29 = load i32, ptr %21, align 4, !tbaa !16
  %30 = call i64 @read(i32 noundef %29, ptr noundef nonnull %7, i64 noundef %6) #4
  %31 = trunc i64 %30 to i32
  %32 = trunc i64 %6 to i32
  %.not30 = icmp eq i32 %31, %32
  br i1 %.not30, label %.preheader, label %41

.preheader:                                       ; preds = %28
  %.not32 = icmp eq i64 %2, 0
  br i1 %.not32, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %.preheader
  %min.iters.check = icmp ult i64 %2, 8
  br i1 %min.iters.check, label %.lr.ph.preheader34, label %vector.ph

.lr.ph.preheader34:                               ; preds = %middle.block, %.lr.ph.preheader
  %.02731.ph = phi i64 [ 0, %.lr.ph.preheader ], [ %n.vec, %middle.block ]
  br label %.lr.ph

vector.ph:                                        ; preds = %.lr.ph.preheader
  %n.vec = and i64 %2, -8
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %33 = shl i64 %index, 1
  %34 = getelementptr inbounds i8, ptr %7, i64 %33
  %wide.vec = load <16 x i8>, ptr %34, align 16, !tbaa !5
  %strided.vec = shufflevector <16 x i8> %wide.vec, <16 x i8> poison, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
  %strided.vec33 = shufflevector <16 x i8> %wide.vec, <16 x i8> poison, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
  %35 = zext <8 x i8> %strided.vec to <8 x i16>
  %36 = shl nuw <8 x i16> %35, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>
  %37 = sext <8 x i8> %strided.vec33 to <8 x i16>
  %38 = or <8 x i16> %36, %37
  %39 = getelementptr inbounds i16, ptr %3, i64 %index
  store <8 x i16> %38, ptr %39, align 2, !tbaa !17
  %index.next = add nuw i64 %index, 8
  %40 = icmp eq i64 %index.next, %n.vec
  br i1 %40, label %middle.block, label %vector.body, !llvm.loop !19

middle.block:                                     ; preds = %vector.body
  %cmp.n = icmp eq i64 %n.vec, %2
  br i1 %cmp.n, label %._crit_edge, label %.lr.ph.preheader34

41:                                               ; preds = %28
  %42 = load ptr, ptr @stderr, align 8, !tbaa !13
  %43 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %42, ptr noundef nonnull @.str.10, i32 noundef %31, i64 noundef %6) #3
  store i32 %20, ptr %19, align 4, !tbaa !15
  br label %56

.lr.ph:                                           ; preds = %.lr.ph.preheader34, %.lr.ph
  %.02731 = phi i64 [ %55, %.lr.ph ], [ %.02731.ph, %.lr.ph.preheader34 ]
  %44 = shl i64 %.02731, 1
  %45 = getelementptr inbounds i8, ptr %7, i64 %44
  %46 = load i8, ptr %45, align 2, !tbaa !5
  %47 = zext i8 %46 to i16
  %48 = shl nuw i16 %47, 8
  %49 = or disjoint i64 %44, 1
  %50 = getelementptr inbounds i8, ptr %7, i64 %49
  %51 = load i8, ptr %50, align 1, !tbaa !5
  %52 = sext i8 %51 to i16
  %53 = or i16 %48, %52
  %54 = getelementptr inbounds i16, ptr %3, i64 %.02731
  store i16 %53, ptr %54, align 2, !tbaa !17
  %55 = add nuw i64 %.02731, 1
  %exitcond.not = icmp eq i64 %55, %2
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !23

._crit_edge:                                      ; preds = %.lr.ph, %middle.block, %.preheader
  store i32 %20, ptr %19, align 4, !tbaa !15
  br label %56

56:                                               ; preds = %4, %._crit_edge, %41, %25, %15
  %.0 = phi i32 [ -1, %15 ], [ -1, %25 ], [ -1, %41 ], [ 0, %._crit_edge ], [ -1, %4 ]
  ret i32 %.0
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nofree "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { cold nounwind }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!"branch_weights", !"expected", i32 2000, i32 1}
!9 = !{!10, !11, i64 8}
!10 = !{!"rc_i2c_state_t", !6, i64 0, !11, i64 4, !11, i64 8, !11, i64 12}
!11 = !{!"int", !6, i64 0}
!12 = !{!"branch_weights", !"expected", i32 1, i32 2000}
!13 = !{!14, !14, i64 0}
!14 = !{!"any pointer", !6, i64 0}
!15 = !{!10, !11, i64 12}
!16 = !{!10, !11, i64 4}
!17 = !{!18, !18, i64 0}
!18 = !{!"short", !6, i64 0}
!19 = distinct !{!19, !20, !21, !22}
!20 = !{!"llvm.loop.mustprogress"}
!21 = !{!"llvm.loop.isvectorized", i32 1}
!22 = !{!"llvm.loop.unroll.runtime.disable"}
!23 = distinct !{!23, !20, !22, !21}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,LowerExpectIntrinsicPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass