; LLVM IR from gem5/gem5 :: src/systemc/tests/systemc/misc/sim_tests/biquad/biquad3/biquad.ll (ZN6biquad5entryEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.biquad = type { %"class.sc_core::sc_module", %"class.sc_core::sc_in", %"class.sc_core::sc_in.13", %"class.sc_core::sc_out", i32, [4 x float], [5 x float] }
%"class.sc_core::sc_module" = type { %"class.sc_core::sc_object", %"class.sc_core::sc_process_host", %"class.sc_core::sc_sensitive", %"class.sc_core::sc_sensitive_pos", %"class.sc_core::sc_sensitive_neg", i8, ptr, i32, ptr, ptr }
%"class.sc_core::sc_object" = type { ptr, ptr, %"class.std::vector", %"class.std::vector.0", %"class.std::__cxx11::basic_string", ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.sc_core::sc_process_host" = type { ptr }
%"class.sc_core::sc_sensitive" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_pos" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_neg" = type { ptr, i32, ptr }
%"class.sc_core::sc_in" = type { %"class.sc_core::sc_port", ptr, ptr }
%"class.sc_core::sc_port" = type { %"class.sc_core::sc_port_b" }
%"class.sc_core::sc_port_b" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.8" }
%"class.sc_core::sc_port_base" = type { %"class.sc_core::sc_object", ptr }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<float> *, std::allocator<sc_core::sc_signal_in_if<float> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<float> *, std::allocator<sc_core::sc_signal_in_if<float> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<float> *, std::allocator<sc_core::sc_signal_in_if<float> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<float> *, std::allocator<sc_core::sc_signal_in_if<float> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_in.13" = type { %"class.sc_core::sc_port.14", ptr, ptr, ptr, ptr }
%"class.sc_core::sc_port.14" = type { %"class.sc_core::sc_port_b.15" }
%"class.sc_core::sc_port_b.15" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.16" }
%"class.std::vector.16" = type { %"struct.std::_Vector_base.17" }
%"struct.std::_Vector_base.17" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_out" = type { %"class.sc_core::sc_inout" }
%"class.sc_core::sc_inout" = type { %"class.sc_core::sc_port.21", ptr, ptr, ptr }
%"class.sc_core::sc_port.21" = type { %"class.sc_core::sc_port_b.22" }
%"class.sc_core::sc_port_b.22" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.23" }
%"class.std::vector.23" = type { %"struct.std::_Vector_base.24" }
%"struct.std::_Vector_base.24" = type { %"struct.std::_Vector_base<sc_core::sc_signal_inout_if<float> *, std::allocator<sc_core::sc_signal_inout_if<float> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_inout_if<float> *, std::allocator<sc_core::sc_signal_inout_if<float> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_inout_if<float> *, std::allocator<sc_core::sc_signal_inout_if<float> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_inout_if<float> *, std::allocator<sc_core::sc_signal_inout_if<float> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN6biquad5entryEv(ptr noundef nonnull align 8 dereferenceable(800) %0) #0 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca float, align 4
  %4 = alloca float, align 4
  %5 = alloca float, align 4
  %6 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  %7 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  %8 = getelementptr inbounds %struct.biquad, ptr %7, i32 0, i32 2
  %9 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNK7sc_core5sc_inIbE4readEv(ptr noundef nonnull align 8 dereferenceable(184) %8)
  %10 = load i8, ptr %9, align 1, !tbaa !9, !range !11, !noundef !12
  %11 = trunc i8 %10 to i1
  %12 = zext i1 %11 to i32
  %13 = icmp eq i32 %12, 1
  br i1 %13, label %14, label %24

14:                                               ; preds = %1
  %15 = getelementptr inbounds %struct.biquad, ptr %7, i32 0, i32 5
  %16 = getelementptr inbounds [4 x float], ptr %15, i64 0, i64 3
  store float 0.000000e+00, ptr %16, align 4, !tbaa !13
  %17 = getelementptr inbounds %struct.biquad, ptr %7, i32 0, i32 5
  %18 = getelementptr inbounds [4 x float], ptr %17, i64 0, i64 2
  store float 0.000000e+00, ptr %18, align 4, !tbaa !13
  %19 = getelementptr inbounds %struct.biquad, ptr %7, i32 0, i32 5
  %20 = getelementptr inbounds [4 x float], ptr %19, i64 0, i64 1
  store float 0.000000e+00, ptr %20, align 4, !tbaa !13
  %21 = getelementptr inbounds %struct.biquad, ptr %7, i32 0, i32 5
  %22 = getelementptr inbounds [4 x float], ptr %21, i64 0, i64 0
  store float 0.000000e+00, ptr %22, align 4, !tbaa !13
  %23 = getelementptr inbounds %struct.biquad, ptr %7, i32 0, i32 3
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store float 0.000000e+00, ptr %5, align 4, !tbaa !13
  call void @_ZN7sc_core8sc_inoutIfE5writeERKf(ptr noundef nonnull align 8 dereferenceable(176) %23, ptr noundef nonnull align 4 dereferenceable(4) %5)
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  br label %72

24:                                               ; preds = %1
  %25 = getelementptr inbounds %struct.biquad, ptr %7, i32 0, i32 1
  %26 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNK7sc_core5sc_inIfE4readEv(ptr noundef nonnull align 8 dereferenceable(168) %25)
  %27 = load float, ptr %26, align 4, !tbaa !13
  store float %27, ptr %4, align 4, !tbaa !13
  %28 = getelementptr inbounds %struct.biquad, ptr %7, i32 0, i32 6
  %29 = getelementptr inbounds [5 x float], ptr %28, i64 0, i64 0
  %30 = load float, ptr %29, align 4, !tbaa !13
  %31 = load float, ptr %4, align 4, !tbaa !13
  %32 = fmul float %30, %31
  store float %32, ptr %3, align 4, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  store i32 0, ptr %6, align 4, !tbaa !15
  br label %33

33:                                               ; preds = %51, %24
  %34 = load i32, ptr %6, align 4, !tbaa !15
  %35 = icmp slt i32 %34, 4
  br i1 %35, label %37, label %36

36:                                               ; preds = %33
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  br label %54

37:                                               ; preds = %33
  %38 = getelementptr inbounds %struct.biquad, ptr %7, i32 0, i32 6
  %39 = load i32, ptr %6, align 4, !tbaa !15
  %40 = add nsw i32 %39, 1
  %41 = sext i32 %40 to i64
  %42 = getelementptr inbounds [5 x float], ptr %38, i64 0, i64 %41
  %43 = load float, ptr %42, align 4, !tbaa !13
  %44 = getelementptr inbounds %struct.biquad, ptr %7, i32 0, i32 5
  %45 = load i32, ptr %6, align 4, !tbaa !15
  %46 = sext i32 %45 to i64
  %47 = getelementptr inbounds [4 x float], ptr %44, i64 0, i64 %46
  %48 = load float, ptr %47, align 4, !tbaa !13
  %49 = load float, ptr %3, align 4, !tbaa !13
  %50 = call float @llvm.fmuladd.f32(float %43, float %48, float %49)
  store float %50, ptr %3, align 4, !tbaa !13
  br label %51

51:                                               ; preds = %37
  %52 = load i32, ptr %6, align 4, !tbaa !15
  %53 = add nsw i32 %52, 1
  store i32 %53, ptr %6, align 4, !tbaa !15
  br label %33, !llvm.loop !17

54:                                               ; preds = %36
  %55 = getelementptr inbounds %struct.biquad, ptr %7, i32 0, i32 5
  %56 = getelementptr inbounds [4 x float], ptr %55, i64 0, i64 0
  %57 = load float, ptr %56, align 4, !tbaa !13
  %58 = getelementptr inbounds %struct.biquad, ptr %7, i32 0, i32 5
  %59 = getelementptr inbounds [4 x float], ptr %58, i64 0, i64 1
  store float %57, ptr %59, align 4, !tbaa !13
  %60 = load float, ptr %4, align 4, !tbaa !13
  %61 = getelementptr inbounds %struct.biquad, ptr %7, i32 0, i32 5
  %62 = getelementptr inbounds [4 x float], ptr %61, i64 0, i64 0
  store float %60, ptr %62, align 4, !tbaa !13
  %63 = getelementptr inbounds %struct.biquad, ptr %7, i32 0, i32 5
  %64 = getelementptr inbounds [4 x float], ptr %63, i64 0, i64 2
  %65 = load float, ptr %64, align 4, !tbaa !13
  %66 = getelementptr inbounds %struct.biquad, ptr %7, i32 0, i32 5
  %67 = getelementptr inbounds [4 x float], ptr %66, i64 0, i64 3
  store float %65, ptr %67, align 4, !tbaa !13
  %68 = load float, ptr %3, align 4, !tbaa !13
  %69 = getelementptr inbounds %struct.biquad, ptr %7, i32 0, i32 5
  %70 = getelementptr inbounds [4 x float], ptr %69, i64 0, i64 2
  store float %68, ptr %70, align 4, !tbaa !13
  %71 = getelementptr inbounds %struct.biquad, ptr %7, i32 0, i32 3
  call void @_ZN7sc_core8sc_inoutIfE5writeERKf(ptr noundef nonnull align 8 dereferenceable(176) %71, ptr noundef nonnull align 4 dereferenceable(4) %3)
  br label %72

72:                                               ; preds = %54, %14
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNK7sc_core5sc_inIbE4readEv(ptr noundef nonnull align 8 dereferenceable(184)) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core8sc_inoutIfE5writeERKf(ptr noundef nonnull align 8 dereferenceable(176), ptr noundef nonnull align 4 dereferenceable(4)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNK7sc_core5sc_inIfE4readEv(ptr noundef nonnull align 8 dereferenceable(168)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{i8 0, i8 2}
!12 = !{}
!13 = !{!14, !14, i64 0}
!14 = !{!"float", !7, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"int", !7, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN6biquad5entryEv(ptr noundef nonnull align 8 dereferenceable(800) %0) local_unnamed_addr #0 align 2 {
  %2 = alloca float, align 4
  %3 = alloca float, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #4
  %4 = getelementptr inbounds i8, ptr %0, i64 400
  %5 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNK7sc_core5sc_inIbE4readEv(ptr noundef nonnull align 8 dereferenceable(184) %4)
  %6 = load i8, ptr %5, align 1, !tbaa !5, !range !9, !noundef !10
  %7 = trunc nuw i8 %6 to i1
  br i1 %7, label %8, label %11

8:                                                ; preds = %1
  %9 = getelementptr inbounds i8, ptr %0, i64 764
  %10 = getelementptr inbounds i8, ptr %0, i64 584
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) %9, i8 0, i64 16, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #4
  store float 0.000000e+00, ptr %3, align 4, !tbaa !11
  call void @_ZN7sc_core8sc_inoutIfE5writeERKf(ptr noundef nonnull align 8 dereferenceable(176) %10, ptr noundef nonnull align 4 dereferenceable(4) %3)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #4
  br label %42

11:                                               ; preds = %1
  %12 = getelementptr inbounds i8, ptr %0, i64 232
  %13 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNK7sc_core5sc_inIfE4readEv(ptr noundef nonnull align 8 dereferenceable(168) %12)
  %14 = load float, ptr %13, align 4, !tbaa !11
  %15 = getelementptr inbounds i8, ptr %0, i64 780
  %16 = load float, ptr %15, align 4, !tbaa !11
  %17 = fmul float %14, %16
  %18 = getelementptr inbounds i8, ptr %0, i64 764
  %19 = getelementptr inbounds i8, ptr %0, i64 784
  %20 = load float, ptr %19, align 8, !tbaa !11
  %21 = load float, ptr %18, align 4, !tbaa !11
  %22 = tail call float @llvm.fmuladd.f32(float %20, float %21, float %17)
  %23 = getelementptr inbounds i8, ptr %0, i64 788
  %24 = load float, ptr %23, align 4, !tbaa !11
  %25 = getelementptr inbounds i8, ptr %0, i64 768
  %26 = load float, ptr %25, align 8, !tbaa !11
  %27 = tail call float @llvm.fmuladd.f32(float %24, float %26, float %22)
  %28 = getelementptr inbounds i8, ptr %0, i64 792
  %29 = load float, ptr %28, align 8, !tbaa !11
  %30 = getelementptr inbounds i8, ptr %0, i64 772
  %31 = load float, ptr %30, align 4, !tbaa !11
  %32 = tail call float @llvm.fmuladd.f32(float %29, float %31, float %27)
  %33 = getelementptr inbounds i8, ptr %0, i64 796
  %34 = load float, ptr %33, align 4, !tbaa !11
  %35 = getelementptr inbounds i8, ptr %0, i64 776
  %36 = load float, ptr %35, align 8, !tbaa !11
  %37 = tail call float @llvm.fmuladd.f32(float %34, float %36, float %32)
  store float %37, ptr %2, align 4, !tbaa !11
  %38 = getelementptr inbounds i8, ptr %0, i64 768
  store float %21, ptr %38, align 8, !tbaa !11
  store float %14, ptr %18, align 4, !tbaa !11
  %39 = getelementptr inbounds i8, ptr %0, i64 772
  %40 = getelementptr inbounds i8, ptr %0, i64 776
  store float %31, ptr %40, align 8, !tbaa !11
  store float %37, ptr %39, align 4, !tbaa !11
  %41 = getelementptr inbounds i8, ptr %0, i64 584
  call void @_ZN7sc_core8sc_inoutIfE5writeERKf(ptr noundef nonnull align 8 dereferenceable(176) %41, ptr noundef nonnull align 4 dereferenceable(4) %2)
  br label %42

42:                                               ; preds = %11, %8
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #4
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNK7sc_core5sc_inIbE4readEv(ptr noundef nonnull align 8 dereferenceable(184)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core8sc_inoutIfE5writeERKf(ptr noundef nonnull align 8 dereferenceable(176), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNK7sc_core5sc_inIfE4readEv(ptr noundef nonnull align 8 dereferenceable(168)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"bool", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{i8 0, i8 2}
!10 = !{}
!11 = !{!12, !12, i64 0}
!12 = !{!"float", !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,LCSSAPass,LICMPass,LoopRotatePass,MemCpyOptPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass