; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/datatypes/int/sc_signed.ll (ZN5sc_dt9sc_signedC2EiiiPjb)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::sc_signed" = type { %"class.sc_dt::sc_value_base", i32, i32, i32, ptr }
%"class.sc_dt::sc_value_base" = type { ptr }

@_ZTVN5sc_dt9sc_signedE = external dso_local unnamed_addr constant { [13 x ptr] }, align 8

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) #0

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) #1

; Function Attrs: nobuiltin nounwind
declare void @_ZdaPv(ptr noundef) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt8vec_copyEiPjPKj(i32 noundef, ptr noundef, ptr noundef) #3

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt13sc_value_baseC2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt9sc_signed8num_bitsEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) #5 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt17vec_copy_and_zeroEiPjiPKj(i32 noundef, ptr noundef, i32 noundef, ptr noundef) #3

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5sc_dt9sc_signedC2EiiiPjb(ptr noundef nonnull align 8 dereferenceable(32) %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, ptr noundef %4, i1 noundef zeroext %5) unnamed_addr #6 align 2 personality ptr @__gxx_personality_v0 {
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca ptr, align 8
  %12 = alloca i8, align 1
  %13 = alloca ptr, align 8
  %14 = alloca i32, align 4
  store ptr %0, ptr %7, align 8, !tbaa !5
  store i32 %1, ptr %8, align 4, !tbaa !9
  store i32 %2, ptr %9, align 4, !tbaa !9
  store i32 %3, ptr %10, align 4, !tbaa !9
  store ptr %4, ptr %11, align 8, !tbaa !5
  %15 = zext i1 %5 to i8
  store i8 %15, ptr %12, align 1, !tbaa !11
  %16 = load ptr, ptr %7, align 8
  %17 = getelementptr inbounds i8, ptr %16, i64 0
  call void @llvm.memset.p0.i64(ptr align 8 %17, i8 0, i64 8, i1 false)
  call void @_ZN5sc_dt13sc_value_baseC2Ev(ptr noundef nonnull align 8 dereferenceable(8) %16) #7
  store ptr getelementptr inbounds inrange(-16, 88) ({ [13 x ptr] }, ptr @_ZTVN5sc_dt9sc_signedE, i32 0, i32 0, i32 2), ptr %16, align 8, !tbaa !13
  %18 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %16, i32 0, i32 1
  %19 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %19, ptr %18, align 8, !tbaa !15
  %20 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %16, i32 0, i32 2
  %21 = load i32, ptr %9, align 4, !tbaa !9
  %22 = invoke noundef i32 @_ZNK5sc_dt9sc_signed8num_bitsEi(ptr noundef nonnull align 8 dereferenceable(32) %16, i32 noundef %21)
          to label %23 unwind label %53

23:                                               ; preds = %6
  store i32 %22, ptr %20, align 4, !tbaa !18
  %24 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %16, i32 0, i32 3
  store i32 0, ptr %24, align 8, !tbaa !19
  %25 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %16, i32 0, i32 4
  store ptr null, ptr %25, align 8, !tbaa !20
  %26 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %16, i32 0, i32 2
  %27 = load i32, ptr %26, align 4, !tbaa !18
  %28 = sub nsw i32 %27, 1
  %29 = sdiv i32 %28, 30
  %30 = add nsw i32 %29, 1
  %31 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %16, i32 0, i32 3
  store i32 %30, ptr %31, align 8, !tbaa !19
  %32 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %16, i32 0, i32 3
  %33 = load i32, ptr %32, align 8, !tbaa !19
  %34 = sext i32 %33 to i64
  %35 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %34, i64 4)
  %36 = extractvalue { i64, i1 } %35, 1
  %37 = extractvalue { i64, i1 } %35, 0
  %38 = select i1 %36, i64 -1, i64 %37
  %39 = invoke noalias noundef nonnull ptr @_Znam(i64 noundef %38) #8
          to label %40 unwind label %53

40:                                               ; preds = %23
  %41 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %16, i32 0, i32 4
  store ptr %39, ptr %41, align 8, !tbaa !20
  %42 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %16, i32 0, i32 3
  %43 = load i32, ptr %42, align 8, !tbaa !19
  %44 = load i32, ptr %10, align 4, !tbaa !9
  %45 = icmp sle i32 %43, %44
  br i1 %45, label %46, label %57

46:                                               ; preds = %40
  %47 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %16, i32 0, i32 3
  %48 = load i32, ptr %47, align 8, !tbaa !19
  %49 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %16, i32 0, i32 4
  %50 = load ptr, ptr %49, align 8, !tbaa !20
  %51 = load ptr, ptr %11, align 8, !tbaa !5
  invoke void @_ZN5sc_dt8vec_copyEiPjPKj(i32 noundef %48, ptr noundef %50, ptr noundef %51)
          to label %52 unwind label %53

52:                                               ; preds = %46
  br label %65

53:                                               ; preds = %57, %46, %23, %6
  %54 = landingpad { ptr, i32 }
          cleanup
  %55 = extractvalue { ptr, i32 } %54, 0
  store ptr %55, ptr %13, align 8
  %56 = extractvalue { ptr, i32 } %54, 1
  store i32 %56, ptr %14, align 4
  call void @_ZN5sc_dt13sc_value_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(8) %16) #7
  br label %74

57:                                               ; preds = %40
  %58 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %16, i32 0, i32 3
  %59 = load i32, ptr %58, align 8, !tbaa !19
  %60 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %16, i32 0, i32 4
  %61 = load ptr, ptr %60, align 8, !tbaa !20
  %62 = load i32, ptr %10, align 4, !tbaa !9
  %63 = load ptr, ptr %11, align 8, !tbaa !5
  invoke void @_ZN5sc_dt17vec_copy_and_zeroEiPjiPKj(i32 noundef %59, ptr noundef %61, i32 noundef %62, ptr noundef %63)
          to label %64 unwind label %53

64:                                               ; preds = %57
  br label %65

65:                                               ; preds = %64, %52
  %66 = load i8, ptr %12, align 1, !tbaa !11, !range !21, !noundef !22
  %67 = trunc i8 %66 to i1
  br i1 %67, label %68, label %73

68:                                               ; preds = %65
  %69 = load ptr, ptr %11, align 8, !tbaa !5
  %70 = icmp eq ptr %69, null
  br i1 %70, label %72, label %71

71:                                               ; preds = %68
  call void @_ZdaPv(ptr noundef %69) #9
  br label %72

72:                                               ; preds = %71, %68
  br label %73

73:                                               ; preds = %72, %65
  ret void

74:                                               ; preds = %53
  %75 = load ptr, ptr %13, align 8
  %76 = load i32, ptr %14, align 4
  %77 = insertvalue { ptr, i32 } poison, ptr %75, 0
  %78 = insertvalue { ptr, i32 } %77, i32 %76, 1
  resume { ptr, i32 } %78
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt13sc_value_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #5 align 2

attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #1 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #5 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }
attributes #8 = { builtin allocsize(0) }
attributes #9 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"vtable pointer", !8, i64 0}
!15 = !{!16, !10, i64 8}
!16 = !{!"_ZTSN5sc_dt9sc_signedE", !17, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !6, i64 24}
!17 = !{!"_ZTSN5sc_dt13sc_value_baseE"}
!18 = !{!16, !10, i64 12}
!19 = !{!16, !10, i64 16}
!20 = !{!16, !6, i64 24}
!21 = !{i8 0, i8 2}
!22 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZTVN5sc_dt9sc_signedE = external dso_local unnamed_addr constant { [13 x ptr] }, align 8

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) local_unnamed_addr #0

; Function Attrs: nobuiltin nounwind
declare void @_ZdaPv(ptr noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt8vec_copyEiPjPKj(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt13sc_value_baseC2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt9sc_signed8num_bitsEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) local_unnamed_addr #3 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt17vec_copy_and_zeroEiPjiPKj(i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5sc_dt9sc_signedC2EiiiPjb(ptr noundef nonnull align 8 dereferenceable(32) %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, ptr noundef %4, i1 noundef zeroext %5) unnamed_addr #4 align 2 personality ptr @__gxx_personality_v0 {
  store i64 0, ptr %0, align 8
  tail call void @_ZN5sc_dt13sc_value_baseC2Ev(ptr noundef nonnull align 8 dereferenceable(8) %0) #5
  store ptr getelementptr inbounds inrange(-16, 88) (i8, ptr @_ZTVN5sc_dt9sc_signedE, i64 16), ptr %0, align 8, !tbaa !5
  %7 = getelementptr inbounds i8, ptr %0, i64 8
  store i32 %1, ptr %7, align 8, !tbaa !8
  %8 = getelementptr inbounds i8, ptr %0, i64 12
  %9 = tail call noundef i32 @_ZNK5sc_dt9sc_signed8num_bitsEi(ptr noundef nonnull align 8 dereferenceable(32) %0, i32 noundef %2)
  store i32 %9, ptr %8, align 4, !tbaa !14
  %10 = getelementptr inbounds i8, ptr %0, i64 16
  %11 = getelementptr inbounds i8, ptr %0, i64 24
  store ptr null, ptr %11, align 8, !tbaa !15
  %12 = add nsw i32 %9, -1
  %13 = sdiv i32 %12, 30
  %14 = add nsw i32 %13, 1
  store i32 %14, ptr %10, align 8, !tbaa !16
  %15 = sext i32 %14 to i64
  %16 = icmp slt i32 %9, -58
  %17 = shl nsw i64 %15, 2
  %18 = select i1 %16, i64 -1, i64 %17
  %19 = invoke noalias noundef nonnull ptr @_Znam(i64 noundef %18) #6
          to label %20 unwind label %22

20:                                               ; preds = %6
  store ptr %19, ptr %11, align 8, !tbaa !15
  %.not.not = icmp slt i32 %13, %3
  br i1 %.not.not, label %21, label %24

21:                                               ; preds = %20
  tail call void @_ZN5sc_dt8vec_copyEiPjPKj(i32 noundef %14, ptr noundef nonnull %19, ptr noundef %4)
  br label %25

22:                                               ; preds = %6
  %23 = landingpad { ptr, i32 }
          cleanup
  tail call void @_ZN5sc_dt13sc_value_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(8) %0) #5
  resume { ptr, i32 } %23

24:                                               ; preds = %20
  tail call void @_ZN5sc_dt17vec_copy_and_zeroEiPjiPKj(i32 noundef %14, ptr noundef nonnull %19, i32 noundef %3, ptr noundef %4)
  br label %25

25:                                               ; preds = %24, %21
  %26 = icmp ne ptr %4, null
  %or.cond.not = and i1 %26, %5
  br i1 %or.cond.not, label %27, label %28

27:                                               ; preds = %25
  tail call void @_ZdaPv(ptr noundef nonnull %4) #7
  br label %28

28:                                               ; preds = %27, %25
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt13sc_value_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #3 align 2

attributes #0 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { builtin allocsize(0) }
attributes #7 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"vtable pointer", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !11, i64 8}
!9 = !{!"_ZTSN5sc_dt9sc_signedE", !10, i64 0, !11, i64 8, !11, i64 12, !11, i64 16, !13, i64 24}
!10 = !{!"_ZTSN5sc_dt13sc_value_baseE"}
!11 = !{!"int", !12, i64 0}
!12 = !{!"omnipotent char", !7, i64 0}
!13 = !{!"any pointer", !12, i64 0}
!14 = !{!9, !11, i64 12}
!15 = !{!9, !13, i64 24}
!16 = !{!9, !11, i64 16}


; Effective O3 passes: CorrelatedValuePropagationPass,DSEPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass