; LLVM IR from gem5/gem5 :: ext/softfloat (extF80M_eq_signaling)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.extFloat80M = type { i64, i16 }

; Function Attrs: nounwind uwtable
define dso_local zeroext i1 @extF80M_eq_signaling(ptr noundef %0, ptr noundef %1) #0 {
  %3 = alloca i1, align 1
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  %13 = load ptr, ptr %4, align 8, !tbaa !5
  store ptr %13, ptr %6, align 8, !tbaa !5
  %14 = load ptr, ptr %5, align 8, !tbaa !5
  store ptr %14, ptr %7, align 8, !tbaa !5
  %15 = load ptr, ptr %6, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.extFloat80M, ptr %15, i32 0, i32 1
  %17 = load i16, ptr %16, align 8, !tbaa !9
  %18 = zext i16 %17 to i64
  store i64 %18, ptr %8, align 8, !tbaa !13
  %19 = load ptr, ptr %6, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.extFloat80M, ptr %19, i32 0, i32 0
  %21 = load i64, ptr %20, align 8, !tbaa !14
  store i64 %21, ptr %9, align 8, !tbaa !13
  %22 = load ptr, ptr %7, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.extFloat80M, ptr %22, i32 0, i32 1
  %24 = load i16, ptr %23, align 8, !tbaa !9
  %25 = zext i16 %24 to i64
  store i64 %25, ptr %10, align 8, !tbaa !13
  %26 = load ptr, ptr %7, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.extFloat80M, ptr %26, i32 0, i32 0
  %28 = load i64, ptr %27, align 8, !tbaa !14
  store i64 %28, ptr %11, align 8, !tbaa !13
  %29 = load i64, ptr %8, align 8, !tbaa !13
  %30 = and i64 %29, 32767
  %31 = icmp eq i64 %30, 32767
  br i1 %31, label %32, label %36

32:                                               ; preds = %2
  %33 = load i64, ptr %9, align 8, !tbaa !13
  %34 = and i64 %33, 9223372036854775807
  %35 = icmp ne i64 %34, 0
  br i1 %35, label %44, label %36

36:                                               ; preds = %32, %2
  %37 = load i64, ptr %10, align 8, !tbaa !13
  %38 = and i64 %37, 32767
  %39 = icmp eq i64 %38, 32767
  br i1 %39, label %40, label %45

40:                                               ; preds = %36
  %41 = load i64, ptr %11, align 8, !tbaa !13
  %42 = and i64 %41, 9223372036854775807
  %43 = icmp ne i64 %42, 0
  br i1 %43, label %44, label %45

44:                                               ; preds = %40, %32
  call void @softfloat_raiseFlags(i8 noundef zeroext 16)
  store i1 false, ptr %3, align 1
  store i32 1, ptr %12, align 4
  br label %72

45:                                               ; preds = %40, %36
  %46 = load i64, ptr %9, align 8, !tbaa !13
  %47 = load i64, ptr %11, align 8, !tbaa !13
  %48 = icmp eq i64 %46, %47
  br i1 %48, label %49, label %59

49:                                               ; preds = %45
  %50 = load i64, ptr %8, align 8, !tbaa !13
  %51 = load i64, ptr %10, align 8, !tbaa !13
  %52 = icmp eq i64 %50, %51
  br i1 %52, label %57, label %53

53:                                               ; preds = %49
  %54 = load i64, ptr %9, align 8, !tbaa !13
  %55 = icmp ne i64 %54, 0
  %56 = xor i1 %55, true
  br label %57

57:                                               ; preds = %53, %49
  %58 = phi i1 [ true, %49 ], [ %56, %53 ]
  store i1 %58, ptr %3, align 1
  store i32 1, ptr %12, align 4
  br label %72

59:                                               ; preds = %45
  %60 = load i64, ptr %9, align 8, !tbaa !13
  %61 = load i64, ptr %11, align 8, !tbaa !13
  %62 = and i64 %60, %61
  %63 = and i64 %62, -9223372036854775808
  %64 = icmp ne i64 %63, 0
  br i1 %64, label %71, label %65

65:                                               ; preds = %59
  %66 = load ptr, ptr %6, align 8, !tbaa !5
  %67 = load ptr, ptr %7, align 8, !tbaa !5
  %68 = call i32 @softfloat_compareNonnormExtF80M(ptr noundef %66, ptr noundef %67)
  %69 = icmp ne i32 %68, 0
  %70 = xor i1 %69, true
  store i1 %70, ptr %3, align 1
  store i32 1, ptr %12, align 4
  br label %72

71:                                               ; preds = %59
  store i1 false, ptr %3, align 1
  store i32 1, ptr %12, align 4
  br label %72

72:                                               ; preds = %71, %65, %57, %44
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  %73 = load i1, ptr %3, align 1
  ret i1 %73
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @softfloat_raiseFlags(i8 noundef zeroext) #2

declare i32 @softfloat_compareNonnormExtF80M(ptr noundef, ptr noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 8}
!10 = !{!"extFloat80M", !11, i64 0, !12, i64 8}
!11 = !{!"long", !7, i64 0}
!12 = !{!"short", !7, i64 0}
!13 = !{!11, !11, i64 0}
!14 = !{!10, !11, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local zeroext i1 @extF80M_eq_signaling(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
  %3 = getelementptr inbounds i8, ptr %0, i64 8
  %4 = load i16, ptr %3, align 8, !tbaa !5
  %5 = load i64, ptr %0, align 8, !tbaa !11
  %6 = getelementptr inbounds i8, ptr %1, i64 8
  %7 = load i16, ptr %6, align 8, !tbaa !5
  %8 = load i64, ptr %1, align 8, !tbaa !11
  %9 = and i16 %4, 32767
  %10 = icmp ne i16 %9, 32767
  %11 = and i64 %5, 9223372036854775807
  %.not = icmp eq i64 %11, 0
  %or.cond = select i1 %10, i1 true, i1 %.not
  br i1 %or.cond, label %12, label %16

12:                                               ; preds = %2
  %13 = and i16 %7, 32767
  %14 = icmp ne i16 %13, 32767
  %15 = and i64 %8, 9223372036854775807
  %.not21 = icmp eq i64 %15, 0
  %or.cond25 = select i1 %14, i1 true, i1 %.not21
  br i1 %or.cond25, label %17, label %16

16:                                               ; preds = %12, %2
  tail call void @softfloat_raiseFlags(i8 noundef zeroext 16) #2
  br label %26

17:                                               ; preds = %12
  %18 = icmp eq i64 %5, %8
  br i1 %18, label %19, label %22

19:                                               ; preds = %17
  %20 = icmp eq i16 %4, %7
  %.not24 = icmp eq i64 %5, 0
  %21 = select i1 %20, i1 true, i1 %.not24
  br label %26

22:                                               ; preds = %17
  %23 = and i64 %8, %5
  %.not22 = icmp sgt i64 %23, -1
  br i1 %.not22, label %24, label %26

24:                                               ; preds = %22
  %25 = tail call i32 @softfloat_compareNonnormExtF80M(ptr noundef nonnull %0, ptr noundef nonnull %1) #2
  %.not23 = icmp eq i32 %25, 0
  br label %26

26:                                               ; preds = %22, %24, %19, %16
  %.0 = phi i1 [ false, %16 ], [ %21, %19 ], [ %.not23, %24 ], [ false, %22 ]
  ret i1 %.0
}

declare void @softfloat_raiseFlags(i8 noundef zeroext) local_unnamed_addr #1

declare i32 @softfloat_compareNonnormExtF80M(ptr noundef, ptr noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"extFloat80M", !7, i64 0, !10, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"short", !8, i64 0}
!11 = !{!6, !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass