; LLVM IR from JanaSabuj/cppdump :: NQueen.ll (Z6helperxx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<std::vector<long long>, std::allocator<std::vector<long long>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<long long>, std::allocator<std::vector<long long>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<long long>, std::allocator<std::vector<long long>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<long long>, std::allocator<std::vector<long long>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@board = external dso_local global %"class.std::vector.0", align 8
@cnt = external dso_local global i64, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z7print2dRKSt6vectorIS_IxSaIxEESaIS1_EE(ptr noundef nonnull align 8 dereferenceable(24)) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z7isValidxxx(i64 noundef, i64 noundef, i64 noundef) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IxSaIxEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z6helperxx(i64 noundef %0, i64 noundef %1) #1 {
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  store i64 %0, ptr %3, align 8, !tbaa !5
  store i64 %1, ptr %4, align 8, !tbaa !5
  %6 = load i64, ptr %4, align 8, !tbaa !5
  %7 = load i64, ptr %3, align 8, !tbaa !5
  %8 = icmp eq i64 %6, %7
  br i1 %8, label %9, label %12

9:                                                ; preds = %2
  call void @_Z7print2dRKSt6vectorIS_IxSaIxEESaIS1_EE(ptr noundef nonnull align 8 dereferenceable(24) @board)
  %10 = load i64, ptr @cnt, align 8, !tbaa !5
  %11 = add nsw i64 %10, 1
  store i64 %11, ptr @cnt, align 8, !tbaa !5
  br label %40

12:                                               ; preds = %2
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #3
  store i64 0, ptr %5, align 8, !tbaa !5
  br label %13

13:                                               ; preds = %36, %12
  %14 = load i64, ptr %5, align 8, !tbaa !5
  %15 = load i64, ptr %3, align 8, !tbaa !5
  %16 = icmp slt i64 %14, %15
  br i1 %16, label %18, label %17

17:                                               ; preds = %13
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #3
  br label %39

18:                                               ; preds = %13
  %19 = load i64, ptr %3, align 8, !tbaa !5
  %20 = load i64, ptr %4, align 8, !tbaa !5
  %21 = load i64, ptr %5, align 8, !tbaa !5
  %22 = call noundef zeroext i1 @_Z7isValidxxx(i64 noundef %19, i64 noundef %20, i64 noundef %21)
  br i1 %22, label %23, label %35

23:                                               ; preds = %18
  %24 = load i64, ptr %4, align 8, !tbaa !5
  %25 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IxSaIxEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @board, i64 noundef %24) #3
  %26 = load i64, ptr %5, align 8, !tbaa !5
  %27 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %25, i64 noundef %26) #3
  store i64 1, ptr %27, align 8, !tbaa !5
  %28 = load i64, ptr %3, align 8, !tbaa !5
  %29 = load i64, ptr %4, align 8, !tbaa !5
  %30 = add nsw i64 %29, 1
  call void @_Z6helperxx(i64 noundef %28, i64 noundef %30)
  %31 = load i64, ptr %4, align 8, !tbaa !5
  %32 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IxSaIxEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @board, i64 noundef %31) #3
  %33 = load i64, ptr %5, align 8, !tbaa !5
  %34 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %32, i64 noundef %33) #3
  store i64 0, ptr %34, align 8, !tbaa !5
  br label %35

35:                                               ; preds = %23, %18
  br label %36

36:                                               ; preds = %35
  %37 = load i64, ptr %5, align 8, !tbaa !5
  %38 = add nsw i64 %37, 1
  store i64 %38, ptr %5, align 8, !tbaa !5
  br label %13, !llvm.loop !9

39:                                               ; preds = %17
  br label %40

40:                                               ; preds = %39, %9
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<std::vector<long long>, std::allocator<std::vector<long long>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<long long>, std::allocator<std::vector<long long>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<long long>, std::allocator<std::vector<long long>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<long long>, std::allocator<std::vector<long long>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@board = external dso_local global %"class.std::vector.0", align 8
@cnt = external dso_local local_unnamed_addr global i64, align 8

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z7print2dRKSt6vectorIS_IxSaIxEESaIS1_EE(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z7isValidxxx(i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IxSaIxEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z6helperxx(i64 noundef %0, i64 noundef %1) local_unnamed_addr #0 {
  %3 = icmp eq i64 %1, %0
  br i1 %3, label %6, label %.preheader

.preheader:                                       ; preds = %2
  %4 = icmp sgt i64 %0, 0
  br i1 %4, label %.lr.ph, label %.loopexit

.lr.ph:                                           ; preds = %.preheader
  %5 = add nsw i64 %1, 1
  br label %9

6:                                                ; preds = %2
  tail call void @_Z7print2dRKSt6vectorIS_IxSaIxEESaIS1_EE(ptr noundef nonnull align 8 dereferenceable(24) @board)
  %7 = load i64, ptr @cnt, align 8, !tbaa !5
  %8 = add nsw i64 %7, 1
  store i64 %8, ptr @cnt, align 8, !tbaa !5
  br label %.loopexit

9:                                                ; preds = %.lr.ph, %16
  %.016 = phi i64 [ 0, %.lr.ph ], [ %17, %16 ]
  %10 = tail call noundef zeroext i1 @_Z7isValidxxx(i64 noundef %0, i64 noundef %1, i64 noundef %.016)
  br i1 %10, label %11, label %16

11:                                               ; preds = %9
  %12 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IxSaIxEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @board, i64 noundef %1) #2
  %13 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %12, i64 noundef %.016) #2
  store i64 1, ptr %13, align 8, !tbaa !5
  tail call void @_Z6helperxx(i64 noundef %0, i64 noundef %5)
  %14 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IxSaIxEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @board, i64 noundef %1) #2
  %15 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %14, i64 noundef %.016) #2
  store i64 0, ptr %15, align 8, !tbaa !5
  br label %16

16:                                               ; preds = %9, %11
  %17 = add nuw nsw i64 %.016, 1
  %exitcond.not = icmp eq i64 %17, %0
  br i1 %exitcond.not, label %.loopexit, label %9, !llvm.loop !9

.loopexit:                                        ; preds = %16, %.preheader, %6
  ret void
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass