; LLVM IR from gem5/gem5 :: ext/mcpat/cacti/io.ll (ZmlRK15powerComponentsPKd)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.powerComponents = type { double, double, double, double, double }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN15powerComponentsC2Ev(ptr noundef nonnull align 8 dereferenceable(40)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZmlRK15powerComponentsPKd(ptr dead_on_unwind noalias writable sret(%class.powerComponents) align 8 %0, ptr noundef nonnull align 8 dereferenceable(40) %1, ptr noundef %2) #1 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  store ptr %0, ptr %4, align 8
  store ptr %1, ptr %5, align 8, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !5
  call void @_ZN15powerComponentsC2Ev(ptr noundef nonnull align 8 dereferenceable(40) %0)
  %7 = load ptr, ptr %5, align 8, !tbaa !5
  %8 = getelementptr inbounds %class.powerComponents, ptr %7, i32 0, i32 0
  %9 = load double, ptr %8, align 8, !tbaa !9
  %10 = load ptr, ptr %6, align 8, !tbaa !5
  %11 = getelementptr inbounds double, ptr %10, i64 0
  %12 = load double, ptr %11, align 8, !tbaa !12
  %13 = fmul double %9, %12
  %14 = getelementptr inbounds %class.powerComponents, ptr %0, i32 0, i32 0
  store double %13, ptr %14, align 8, !tbaa !9
  %15 = load ptr, ptr %5, align 8, !tbaa !5
  %16 = getelementptr inbounds %class.powerComponents, ptr %15, i32 0, i32 1
  %17 = load double, ptr %16, align 8, !tbaa !13
  %18 = load ptr, ptr %6, align 8, !tbaa !5
  %19 = getelementptr inbounds double, ptr %18, i64 1
  %20 = load double, ptr %19, align 8, !tbaa !12
  %21 = fmul double %17, %20
  %22 = getelementptr inbounds %class.powerComponents, ptr %0, i32 0, i32 1
  store double %21, ptr %22, align 8, !tbaa !13
  %23 = load ptr, ptr %5, align 8, !tbaa !5
  %24 = getelementptr inbounds %class.powerComponents, ptr %23, i32 0, i32 2
  %25 = load double, ptr %24, align 8, !tbaa !14
  %26 = load ptr, ptr %6, align 8, !tbaa !5
  %27 = getelementptr inbounds double, ptr %26, i64 2
  %28 = load double, ptr %27, align 8, !tbaa !12
  %29 = fmul double %25, %28
  %30 = getelementptr inbounds %class.powerComponents, ptr %0, i32 0, i32 2
  store double %29, ptr %30, align 8, !tbaa !14
  %31 = load ptr, ptr %5, align 8, !tbaa !5
  %32 = getelementptr inbounds %class.powerComponents, ptr %31, i32 0, i32 3
  %33 = load double, ptr %32, align 8, !tbaa !15
  %34 = load ptr, ptr %6, align 8, !tbaa !5
  %35 = getelementptr inbounds double, ptr %34, i64 3
  %36 = load double, ptr %35, align 8, !tbaa !12
  %37 = fmul double %33, %36
  %38 = getelementptr inbounds %class.powerComponents, ptr %0, i32 0, i32 3
  store double %37, ptr %38, align 8, !tbaa !15
  %39 = load ptr, ptr %5, align 8, !tbaa !5
  %40 = getelementptr inbounds %class.powerComponents, ptr %39, i32 0, i32 4
  %41 = load double, ptr %40, align 8, !tbaa !16
  %42 = load ptr, ptr %6, align 8, !tbaa !5
  %43 = getelementptr inbounds double, ptr %42, i64 1
  %44 = load double, ptr %43, align 8, !tbaa !12
  %45 = fmul double %41, %44
  %46 = getelementptr inbounds %class.powerComponents, ptr %0, i32 0, i32 4
  store double %45, ptr %46, align 8, !tbaa !16
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"_ZTS15powerComponents", !11, i64 0, !11, i64 8, !11, i64 16, !11, i64 24, !11, i64 32}
!11 = !{!"double", !7, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!10, !11, i64 8}
!14 = !{!10, !11, i64 16}
!15 = !{!10, !11, i64 24}
!16 = !{!10, !11, i64 32}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.powerComponents = type { double, double, double, double, double }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN15powerComponentsC2Ev(ptr noundef nonnull align 8 dereferenceable(40)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZmlRK15powerComponentsPKd(ptr dead_on_unwind noalias nonnull writable sret(%class.powerComponents) align 8 %0, ptr nocapture noundef nonnull readonly align 8 dereferenceable(40) %1, ptr nocapture noundef readonly %2) local_unnamed_addr #0 {
  tail call void @_ZN15powerComponentsC2Ev(ptr noundef nonnull align 8 dereferenceable(40) %0)
  %4 = load <2 x double>, ptr %1, align 8, !tbaa !5
  %5 = load <2 x double>, ptr %2, align 8, !tbaa !5
  %6 = fmul <2 x double> %4, %5
  store <2 x double> %6, ptr %0, align 8, !tbaa !5
  %7 = getelementptr inbounds i8, ptr %1, i64 16
  %8 = getelementptr inbounds i8, ptr %2, i64 16
  %9 = getelementptr inbounds i8, ptr %0, i64 16
  %10 = load <2 x double>, ptr %7, align 8, !tbaa !5
  %11 = load <2 x double>, ptr %8, align 8, !tbaa !5
  %12 = fmul <2 x double> %10, %11
  store <2 x double> %12, ptr %9, align 8, !tbaa !5
  %13 = getelementptr inbounds i8, ptr %1, i64 32
  %14 = load double, ptr %13, align 8, !tbaa !9
  %15 = extractelement <2 x double> %5, i64 1
  %16 = fmul double %15, %14
  %17 = getelementptr inbounds i8, ptr %0, i64 32
  store double %16, ptr %17, align 8, !tbaa !9
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 32}
!10 = !{!"_ZTS15powerComponents", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SLPVectorizerPass,SROAPass,TailCallElimPass