; LLVM IR from gem5/gem5 :: src/systemc/tests/systemc/misc/user_guide/chpt3.1/fsmr.ll (ZN14fsm_recognizer5entryEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%struct.fsm_recognizer = type <{ %"class.sc_core::sc_module", %"class.sc_core::sc_in", ptr, ptr, ptr, [4 x i8], [4 x i8] }>
%"class.sc_core::sc_module" = type { %"class.sc_core::sc_object", %"class.sc_core::sc_process_host", %"class.sc_core::sc_sensitive", %"class.sc_core::sc_sensitive_pos", %"class.sc_core::sc_sensitive_neg", i8, ptr, i32, ptr, ptr }
%"class.sc_core::sc_object" = type { ptr, ptr, %"class.std::vector", %"class.std::vector.0", %"class.std::__cxx11::basic_string", ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.sc_core::sc_process_host" = type { ptr }
%"class.sc_core::sc_sensitive" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_pos" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_neg" = type { ptr, i32, ptr }
%"class.sc_core::sc_in" = type { %"class.sc_core::sc_port", ptr, ptr, ptr, ptr }
%"class.sc_core::sc_port" = type { %"class.sc_core::sc_port_b" }
%"class.sc_core::sc_port_b" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.8" }
%"class.sc_core::sc_port_base" = type { %"class.sc_core::sc_object", ptr }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@_ZSt4cout = external global %"class.std::basic_ostream", align 8
@.str = external hidden unnamed_addr constant [25 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN14fsm_recognizer5entryEv(ptr noundef nonnull align 8 dereferenceable(444) %0) #0 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca i8, align 1
  %4 = alloca i32, align 4
  %5 = alloca i8, align 1
  %6 = alloca i8, align 1
  store ptr %0, ptr %2, align 8, !tbaa !5
  %7 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 1, ptr %3) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  store i32 0, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #3
  br label %8

8:                                                ; preds = %78, %1
  br label %9

9:                                                ; preds = %8
  br label %10

10:                                               ; preds = %11, %9
  call void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %7)
  br label %11

11:                                               ; preds = %10
  %12 = getelementptr inbounds %struct.fsm_recognizer, ptr %7, i32 0, i32 3
  %13 = load ptr, ptr %12, align 8, !tbaa !11
  %14 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNK7sc_core9sc_signalIbLNS_16sc_writer_policyE0EEcvRKbEv(ptr noundef nonnull align 8 dereferenceable(224) %13)
  %15 = load i8, ptr %14, align 1, !tbaa !42, !range !43, !noundef !44
  %16 = trunc i8 %15 to i1
  %17 = zext i1 %16 to i32
  %18 = icmp ne i32 %17, 1
  br i1 %18, label %10, label %19, !llvm.loop !45

19:                                               ; preds = %11
  %20 = getelementptr inbounds %struct.fsm_recognizer, ptr %7, i32 0, i32 2
  %21 = load ptr, ptr %20, align 8, !tbaa !47
  %22 = load ptr, ptr %21, align 8, !tbaa !48
  %23 = getelementptr inbounds ptr, ptr %22, i64 5
  %24 = load ptr, ptr %23, align 8
  %25 = call noundef nonnull align 1 dereferenceable(1) ptr %24(ptr noundef nonnull align 8 dereferenceable(193) %21)
  %26 = load i8, ptr %25, align 1, !tbaa !50
  store i8 %26, ptr %3, align 1, !tbaa !50
  %27 = load i8, ptr %3, align 1, !tbaa !50
  %28 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i8 noundef signext %27)
  %29 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %28, ptr noundef @_ZSt5flushIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  %30 = load i32, ptr %4, align 4, !tbaa !9
  switch i32 %30, label %75 [
    i32 0, label %31
    i32 1, label %42
    i32 2, label %53
    i32 3, label %64
  ]

31:                                               ; preds = %19
  %32 = load i8, ptr %3, align 1, !tbaa !50
  %33 = sext i8 %32 to i32
  %34 = getelementptr inbounds %struct.fsm_recognizer, ptr %7, i32 0, i32 5
  %35 = getelementptr inbounds [4 x i8], ptr %34, i64 0, i64 0
  %36 = load i8, ptr %35, align 8, !tbaa !50
  %37 = sext i8 %36 to i32
  %38 = icmp eq i32 %33, %37
  br i1 %38, label %39, label %40

39:                                               ; preds = %31
  store i32 1, ptr %4, align 4, !tbaa !9
  br label %41

40:                                               ; preds = %31
  store i32 0, ptr %4, align 4, !tbaa !9
  br label %41

41:                                               ; preds = %40, %39
  store i8 0, ptr %5, align 1, !tbaa !42
  br label %78

42:                                               ; preds = %19
  %43 = load i8, ptr %3, align 1, !tbaa !50
  %44 = sext i8 %43 to i32
  %45 = getelementptr inbounds %struct.fsm_recognizer, ptr %7, i32 0, i32 5
  %46 = getelementptr inbounds [4 x i8], ptr %45, i64 0, i64 1
  %47 = load i8, ptr %46, align 1, !tbaa !50
  %48 = sext i8 %47 to i32
  %49 = icmp eq i32 %44, %48
  br i1 %49, label %50, label %51

50:                                               ; preds = %42
  store i32 2, ptr %4, align 4, !tbaa !9
  br label %52

51:                                               ; preds = %42
  store i32 0, ptr %4, align 4, !tbaa !9
  br label %52

52:                                               ; preds = %51, %50
  store i8 0, ptr %5, align 1, !tbaa !42
  br label %78

53:                                               ; preds = %19
  %54 = load i8, ptr %3, align 1, !tbaa !50
  %55 = sext i8 %54 to i32
  %56 = getelementptr inbounds %struct.fsm_recognizer, ptr %7, i32 0, i32 5
  %57 = getelementptr inbounds [4 x i8], ptr %56, i64 0, i64 2
  %58 = load i8, ptr %57, align 2, !tbaa !50
  %59 = sext i8 %58 to i32
  %60 = icmp eq i32 %55, %59
  br i1 %60, label %61, label %62

61:                                               ; preds = %53
  store i32 3, ptr %4, align 4, !tbaa !9
  br label %63

62:                                               ; preds = %53
  store i32 0, ptr %4, align 4, !tbaa !9
  br label %63

63:                                               ; preds = %62, %61
  store i8 0, ptr %5, align 1, !tbaa !42
  br label %78

64:                                               ; preds = %19
  %65 = load i8, ptr %3, align 1, !tbaa !50
  %66 = sext i8 %65 to i32
  %67 = getelementptr inbounds %struct.fsm_recognizer, ptr %7, i32 0, i32 5
  %68 = getelementptr inbounds [4 x i8], ptr %67, i64 0, i64 3
  %69 = load i8, ptr %68, align 1, !tbaa !50
  %70 = sext i8 %69 to i32
  %71 = icmp eq i32 %66, %70
  br i1 %71, label %72, label %73

72:                                               ; preds = %64
  store i8 1, ptr %5, align 1, !tbaa !42
  br label %74

73:                                               ; preds = %64
  store i8 0, ptr %5, align 1, !tbaa !42
  br label %74

74:                                               ; preds = %73, %72
  store i32 0, ptr %4, align 4, !tbaa !9
  br label %78

75:                                               ; preds = %19
  %76 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, ptr noundef @.str)
  %77 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %76, ptr noundef @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  br label %78

78:                                               ; preds = %75, %74, %63, %52, %41
  %79 = getelementptr inbounds %struct.fsm_recognizer, ptr %7, i32 0, i32 4
  %80 = load ptr, ptr %79, align 8, !tbaa !51
  %81 = load ptr, ptr %80, align 8, !tbaa !48
  %82 = getelementptr inbounds ptr, ptr %81, i64 14
  %83 = load ptr, ptr %82, align 8
  call void %83(ptr noundef nonnull align 8 dereferenceable(224) %80, ptr noundef nonnull align 1 dereferenceable(1) %5)
  call void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %7)
  %84 = getelementptr inbounds %struct.fsm_recognizer, ptr %7, i32 0, i32 4
  %85 = load ptr, ptr %84, align 8, !tbaa !51
  call void @llvm.lifetime.start.p0(i64 1, ptr %6) #3
  store i8 0, ptr %6, align 1, !tbaa !42
  %86 = load ptr, ptr %85, align 8, !tbaa !48
  %87 = getelementptr inbounds ptr, ptr %86, i64 14
  %88 = load ptr, ptr %87, align 8
  call void %88(ptr noundef nonnull align 8 dereferenceable(224) %85, ptr noundef nonnull align 1 dereferenceable(1) %6)
  call void @llvm.lifetime.end.p0(i64 1, ptr %6) #3
  br label %8, !llvm.loop !52
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232)) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNK7sc_core9sc_signalIbLNS_16sc_writer_policyE0EEcvRKbEv(ptr noundef nonnull align 8 dereferenceable(224)) #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c(ptr noundef nonnull align 8 dereferenceable(8), i8 noundef signext) #2

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZSt5flushIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(8)) #2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) #2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(8)) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 424}
!12 = !{!"_ZTS14fsm_recognizer", !13, i64 0, !34, i64 232, !6, i64 416, !6, i64 424, !6, i64 432, !7, i64 440}
!13 = !{!"_ZTSN7sc_core9sc_moduleE", !14, i64 0, !26, i64 112, !27, i64 120, !29, i64 144, !31, i64 168, !33, i64 192, !6, i64 200, !10, i64 208, !6, i64 216, !6, i64 224}
!14 = !{!"_ZTSN7sc_core9sc_objectE", !6, i64 8, !15, i64 16, !19, i64 40, !23, i64 64, !6, i64 96, !6, i64 104}
!15 = !{!"_ZTSSt6vectorIPN7sc_core8sc_eventESaIS2_EE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!19 = !{!"_ZTSSt6vectorIPN7sc_core9sc_objectESaIS2_EE", !20, i64 0}
!20 = !{!"_ZTSSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE12_Vector_implE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!23 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !24, i64 0, !25, i64 8, !7, i64 16}
!24 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!25 = !{!"long", !7, i64 0}
!26 = !{!"_ZTSN7sc_core15sc_process_hostE"}
!27 = !{!"_ZTSN7sc_core12sc_sensitiveE", !6, i64 0, !28, i64 8, !6, i64 16}
!28 = !{!"_ZTSN7sc_core12sc_sensitiveUt_E", !7, i64 0}
!29 = !{!"_ZTSN7sc_core16sc_sensitive_posE", !6, i64 0, !30, i64 8, !6, i64 16}
!30 = !{!"_ZTSN7sc_core16sc_sensitive_posUt_E", !7, i64 0}
!31 = !{!"_ZTSN7sc_core16sc_sensitive_negE", !6, i64 0, !32, i64 8, !6, i64 16}
!32 = !{!"_ZTSN7sc_core16sc_sensitive_negUt_E", !7, i64 0}
!33 = !{!"bool", !7, i64 0}
!34 = !{!"_ZTSN7sc_core5sc_inIbEE", !35, i64 0, !6, i64 152, !6, i64 160, !6, i64 168, !6, i64 176}
!35 = !{!"_ZTSN7sc_core7sc_portINS_15sc_signal_in_ifIbEELi1ELNS_14sc_port_policyE0EEE", !36, i64 0}
!36 = !{!"_ZTSN7sc_core9sc_port_bINS_15sc_signal_in_ifIbEEEE", !37, i64 0, !6, i64 120, !38, i64 128}
!37 = !{!"_ZTSN7sc_core12sc_port_baseE", !14, i64 0, !6, i64 112}
!38 = !{!"_ZTSSt6vectorIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE", !39, i64 0}
!39 = !{!"_ZTSSt12_Vector_baseIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE", !40, i64 0}
!40 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE12_Vector_implE", !41, i64 0}
!41 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!42 = !{!33, !33, i64 0}
!43 = !{i8 0, i8 2}
!44 = !{}
!45 = distinct !{!45, !46}
!46 = !{!"llvm.loop.mustprogress"}
!47 = !{!12, !6, i64 416}
!48 = !{!49, !49, i64 0}
!49 = !{!"vtable pointer", !8, i64 0}
!50 = !{!7, !7, i64 0}
!51 = !{!12, !6, i64 432}
!52 = distinct !{!52, !46}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }

@_ZSt4cout = external global %"class.std::basic_ostream", align 8
@.str = external hidden unnamed_addr constant [25 x i8], align 1

; Function Attrs: mustprogress noreturn uwtable
define dso_local void @_ZN14fsm_recognizer5entryEv(ptr noundef nonnull align 8 dereferenceable(444) %0) local_unnamed_addr #0 align 2 {
  %2 = alloca i8, align 1
  %3 = alloca i8, align 1
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %2) #4
  %4 = getelementptr inbounds i8, ptr %0, i64 424
  %5 = getelementptr inbounds i8, ptr %0, i64 416
  %6 = getelementptr inbounds i8, ptr %0, i64 443
  %7 = getelementptr inbounds i8, ptr %0, i64 442
  %8 = getelementptr inbounds i8, ptr %0, i64 441
  %9 = getelementptr inbounds i8, ptr %0, i64 440
  %10 = getelementptr inbounds i8, ptr %0, i64 432
  br label %11

11:                                               ; preds = %40, %1
  %.0 = phi i32 [ 0, %1 ], [ %.4, %40 ]
  br label %12

12:                                               ; preds = %12, %11
  call void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
  %13 = load ptr, ptr %4, align 8, !tbaa !5
  %14 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNK7sc_core9sc_signalIbLNS_16sc_writer_policyE0EEcvRKbEv(ptr noundef nonnull align 8 dereferenceable(224) %13)
  %15 = load i8, ptr %14, align 1, !tbaa !40, !range !41, !noundef !42
  %.not.not = icmp eq i8 %15, 0
  br i1 %.not.not, label %12, label %16, !llvm.loop !43

16:                                               ; preds = %12
  %17 = load ptr, ptr %5, align 8, !tbaa !45
  %18 = load ptr, ptr %17, align 8, !tbaa !46
  %19 = getelementptr inbounds i8, ptr %18, i64 40
  %20 = load ptr, ptr %19, align 8
  %21 = call noundef nonnull align 1 dereferenceable(1) ptr %20(ptr noundef nonnull align 8 dereferenceable(193) %17)
  %22 = load i8, ptr %21, align 1, !tbaa !48
  %23 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i8 noundef signext %22)
  %24 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %23, ptr noundef nonnull @_ZSt5flushIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  switch i32 %.0, label %37 [
    i32 0, label %25
    i32 1, label %28
    i32 2, label %31
    i32 3, label %34
  ]

25:                                               ; preds = %16
  %26 = load i8, ptr %9, align 8, !tbaa !48
  %27 = icmp eq i8 %22, %26
  %. = zext i1 %27 to i32
  store i8 0, ptr %2, align 1, !tbaa !40
  br label %40

28:                                               ; preds = %16
  %29 = load i8, ptr %8, align 1, !tbaa !48
  %30 = icmp eq i8 %22, %29
  %.6 = select i1 %30, i32 2, i32 0
  store i8 0, ptr %2, align 1, !tbaa !40
  br label %40

31:                                               ; preds = %16
  %32 = load i8, ptr %7, align 2, !tbaa !48
  %33 = icmp eq i8 %22, %32
  %.7 = select i1 %33, i32 3, i32 0
  store i8 0, ptr %2, align 1, !tbaa !40
  br label %40

34:                                               ; preds = %16
  %35 = load i8, ptr %6, align 1, !tbaa !48
  %36 = icmp eq i8 %22, %35
  %.8 = zext i1 %36 to i8
  store i8 %.8, ptr %2, align 1, !tbaa !40
  br label %40

37:                                               ; preds = %16
  %38 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, ptr noundef nonnull @.str)
  %39 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %38, ptr noundef nonnull @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  br label %40

40:                                               ; preds = %37, %34, %31, %28, %25
  %.4 = phi i32 [ %.0, %37 ], [ 0, %34 ], [ %.7, %31 ], [ %.6, %28 ], [ %., %25 ]
  %41 = load ptr, ptr %10, align 8, !tbaa !49
  %42 = load ptr, ptr %41, align 8, !tbaa !46
  %43 = getelementptr inbounds i8, ptr %42, i64 112
  %44 = load ptr, ptr %43, align 8
  call void %44(ptr noundef nonnull align 8 dereferenceable(224) %41, ptr noundef nonnull align 1 dereferenceable(1) %2)
  call void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
  %45 = load ptr, ptr %10, align 8, !tbaa !49
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %3) #4
  store i8 0, ptr %3, align 1, !tbaa !40
  %46 = load ptr, ptr %45, align 8, !tbaa !46
  %47 = getelementptr inbounds i8, ptr %46, i64 112
  %48 = load ptr, ptr %47, align 8
  call void %48(ptr noundef nonnull align 8 dereferenceable(224) %45, ptr noundef nonnull align 1 dereferenceable(1) %3)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %3) #4
  br label %11, !llvm.loop !50
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNK7sc_core9sc_signalIbLNS_16sc_writer_policyE0EEcvRKbEv(ptr noundef nonnull align 8 dereferenceable(224)) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c(ptr noundef nonnull align 8 dereferenceable(8), i8 noundef signext) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZSt5flushIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(8)) #3

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(8)) #3

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress noreturn uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !9, i64 424}
!6 = !{!"_ZTS14fsm_recognizer", !7, i64 0, !32, i64 232, !9, i64 416, !9, i64 424, !9, i64 432, !10, i64 440}
!7 = !{!"_ZTSN7sc_core9sc_moduleE", !8, i64 0, !23, i64 112, !24, i64 120, !26, i64 144, !28, i64 168, !30, i64 192, !9, i64 200, !31, i64 208, !9, i64 216, !9, i64 224}
!8 = !{!"_ZTSN7sc_core9sc_objectE", !9, i64 8, !12, i64 16, !16, i64 40, !20, i64 64, !9, i64 96, !9, i64 104}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C++ TBAA"}
!12 = !{!"_ZTSSt6vectorIPN7sc_core8sc_eventESaIS2_EE", !13, i64 0}
!13 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE", !14, i64 0}
!14 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE12_Vector_implE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!16 = !{!"_ZTSSt6vectorIPN7sc_core9sc_objectESaIS2_EE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!20 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !21, i64 0, !22, i64 8, !10, i64 16}
!21 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !9, i64 0}
!22 = !{!"long", !10, i64 0}
!23 = !{!"_ZTSN7sc_core15sc_process_hostE"}
!24 = !{!"_ZTSN7sc_core12sc_sensitiveE", !9, i64 0, !25, i64 8, !9, i64 16}
!25 = !{!"_ZTSN7sc_core12sc_sensitiveUt_E", !10, i64 0}
!26 = !{!"_ZTSN7sc_core16sc_sensitive_posE", !9, i64 0, !27, i64 8, !9, i64 16}
!27 = !{!"_ZTSN7sc_core16sc_sensitive_posUt_E", !10, i64 0}
!28 = !{!"_ZTSN7sc_core16sc_sensitive_negE", !9, i64 0, !29, i64 8, !9, i64 16}
!29 = !{!"_ZTSN7sc_core16sc_sensitive_negUt_E", !10, i64 0}
!30 = !{!"bool", !10, i64 0}
!31 = !{!"int", !10, i64 0}
!32 = !{!"_ZTSN7sc_core5sc_inIbEE", !33, i64 0, !9, i64 152, !9, i64 160, !9, i64 168, !9, i64 176}
!33 = !{!"_ZTSN7sc_core7sc_portINS_15sc_signal_in_ifIbEELi1ELNS_14sc_port_policyE0EEE", !34, i64 0}
!34 = !{!"_ZTSN7sc_core9sc_port_bINS_15sc_signal_in_ifIbEEEE", !35, i64 0, !9, i64 120, !36, i64 128}
!35 = !{!"_ZTSN7sc_core12sc_port_baseE", !8, i64 0, !9, i64 112}
!36 = !{!"_ZTSSt6vectorIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE", !37, i64 0}
!37 = !{!"_ZTSSt12_Vector_baseIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE", !38, i64 0}
!38 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE12_Vector_implE", !39, i64 0}
!39 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!40 = !{!30, !30, i64 0}
!41 = !{i8 0, i8 2}
!42 = !{}
!43 = distinct !{!43, !44}
!44 = !{!"llvm.loop.mustprogress"}
!45 = !{!6, !9, i64 416}
!46 = !{!47, !47, i64 0}
!47 = !{!"vtable pointer", !11, i64 0}
!48 = !{!10, !10, i64 0}
!49 = !{!6, !9, i64 432}
!50 = distinct !{!50, !44}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,LICMPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass