; LLVM IR from beagleboard/librobotcontrol :: library/src (motor)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@stderr = external global ptr, align 8
@stby_state = external hidden global i32, align 4
@init_flag = external hidden global i32, align 4
@.str.5 = external hidden unnamed_addr constant [58 x i8], align 1
@.str.6 = external hidden unnamed_addr constant [58 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
declare i64 @llvm.expect.i64(i64, i64) #1

; Function Attrs: nounwind
declare i32 @fprintf(ptr noundef, ptr noundef, ...) #2

; Function Attrs: nounwind uwtable
declare dso_local i32 @rc_motor_free_spin(i32 noundef) #3

declare i32 @rc_gpio_set_value(i32 noundef, i32 noundef, i32 noundef) #4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @rc_motor_standby(i32 noundef %0) #3 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #5
  %6 = load i32, ptr @init_flag, align 4, !tbaa !5
  %7 = icmp ne i32 %6, 0
  %8 = xor i1 %7, true
  %9 = xor i1 %8, true
  %10 = xor i1 %9, true
  %11 = zext i1 %10 to i32
  %12 = sext i32 %11 to i64
  %13 = call i64 @llvm.expect.i64(i64 %12, i64 0)
  %14 = icmp ne i64 %13, 0
  br i1 %14, label %15, label %18

15:                                               ; preds = %1
  %16 = load ptr, ptr @stderr, align 8, !tbaa !9
  %17 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %16, ptr noundef @.str.5) #5
  store i32 -1, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %47

18:                                               ; preds = %1
  %19 = load i32, ptr %3, align 4, !tbaa !5
  %20 = icmp ne i32 %19, 0
  br i1 %20, label %21, label %27

21:                                               ; preds = %18
  %22 = load i32, ptr @stby_state, align 4, !tbaa !5
  %23 = icmp ne i32 %22, 0
  br i1 %23, label %24, label %25

24:                                               ; preds = %21
  store i32 0, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %47

25:                                               ; preds = %21
  store i32 0, ptr %4, align 4, !tbaa !5
  %26 = call i32 @rc_motor_free_spin(i32 noundef 0)
  br label %32

27:                                               ; preds = %18
  %28 = load i32, ptr @stby_state, align 4, !tbaa !5
  %29 = icmp ne i32 %28, 0
  br i1 %29, label %31, label %30

30:                                               ; preds = %27
  store i32 0, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %47

31:                                               ; preds = %27
  store i32 1, ptr %4, align 4, !tbaa !5
  br label %32

32:                                               ; preds = %31, %25
  %33 = load i32, ptr %4, align 4, !tbaa !5
  %34 = call i32 @rc_gpio_set_value(i32 noundef 0, i32 noundef 20, i32 noundef %33)
  %35 = icmp ne i32 %34, 0
  %36 = xor i1 %35, true
  %37 = xor i1 %36, true
  %38 = zext i1 %37 to i32
  %39 = sext i32 %38 to i64
  %40 = call i64 @llvm.expect.i64(i64 %39, i64 0)
  %41 = icmp ne i64 %40, 0
  br i1 %41, label %42, label %45

42:                                               ; preds = %32
  %43 = load ptr, ptr @stderr, align 8, !tbaa !9
  %44 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %43, ptr noundef @.str.6, i32 noundef 0, i32 noundef 20) #5
  store i32 -1, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %47

45:                                               ; preds = %32
  %46 = load i32, ptr %3, align 4, !tbaa !5
  store i32 %46, ptr @stby_state, align 4, !tbaa !5
  store i32 0, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %47

47:                                               ; preds = %45, %42, %30, %24, %15
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #5
  %48 = load i32, ptr %2, align 4
  ret i32 %48
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(none) }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@stderr = external local_unnamed_addr global ptr, align 8
@stby_state = external hidden local_unnamed_addr global i32, align 4
@init_flag = external hidden local_unnamed_addr global i32, align 4
@.str.5 = external hidden unnamed_addr constant [58 x i8], align 1
@.str.6 = external hidden unnamed_addr constant [58 x i8], align 1

; Function Attrs: nofree nounwind
declare noundef i32 @fprintf(ptr nocapture noundef, ptr nocapture noundef readonly, ...) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @rc_motor_free_spin(i32 noundef) local_unnamed_addr #1

declare i32 @rc_gpio_set_value(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local range(i32 -1, 1) i32 @rc_motor_standby(i32 noundef %0) local_unnamed_addr #1 {
  %2 = load i32, ptr @init_flag, align 4, !tbaa !5
  %.not = icmp eq i32 %2, 0
  br i1 %.not, label %3, label %6, !prof !9

3:                                                ; preds = %1
  %4 = load ptr, ptr @stderr, align 8, !tbaa !10
  %5 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %4, ptr noundef nonnull @.str.5) #3
  br label %18

6:                                                ; preds = %1
  %.not5 = icmp eq i32 %0, 0
  %7 = load i32, ptr @stby_state, align 4, !tbaa !5
  %.not6 = icmp eq i32 %7, 0
  br i1 %.not5, label %11, label %8

8:                                                ; preds = %6
  br i1 %.not6, label %9, label %18

9:                                                ; preds = %8
  %10 = tail call i32 @rc_motor_free_spin(i32 noundef 0)
  br label %12

11:                                               ; preds = %6
  br i1 %.not6, label %18, label %12

12:                                               ; preds = %11, %9
  %.0 = phi i32 [ 0, %9 ], [ 1, %11 ]
  %13 = tail call i32 @rc_gpio_set_value(i32 noundef 0, i32 noundef 20, i32 noundef %.0) #4
  %.not8 = icmp eq i32 %13, 0
  br i1 %.not8, label %17, label %14, !prof !12

14:                                               ; preds = %12
  %15 = load ptr, ptr @stderr, align 8, !tbaa !10
  %16 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %15, ptr noundef nonnull @.str.6, i32 noundef 0, i32 noundef 20) #3
  br label %18

17:                                               ; preds = %12
  store i32 %0, ptr @stby_state, align 4, !tbaa !5
  br label %18

18:                                               ; preds = %11, %8, %17, %14, %3
  %.04 = phi i32 [ -1, %3 ], [ -1, %14 ], [ 0, %17 ], [ 0, %8 ], [ 0, %11 ]
  ret i32 %.04
}

attributes #0 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { cold nounwind }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!"branch_weights", !"expected", i32 1, i32 2000}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!"branch_weights", !"expected", i32 2000, i32 1}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,LowerExpectIntrinsicPass,SROAPass,SimplifyCFGPass,TailCallElimPass