; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Bus/Pci (UfsHcFreeBuffer)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct._UFS_HOST_CONTROLLER_PRIVATE_DATA = type { i32, ptr, %struct._EDKII_UFS_HOST_CONTROLLER_PROTOCOL, ptr, i64 }
%struct._EDKII_UFS_HOST_CONTROLLER_PROTOCOL = type { ptr, ptr, ptr, ptr, ptr, ptr }
%struct._EFI_PCI_IO_PROTOCOL = type { ptr, ptr, %struct.EFI_PCI_IO_PROTOCOL_ACCESS, %struct.EFI_PCI_IO_PROTOCOL_ACCESS, %struct.EFI_PCI_IO_PROTOCOL_CONFIG_ACCESS, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i64, ptr }
%struct.EFI_PCI_IO_PROTOCOL_ACCESS = type { ptr, ptr }
%struct.EFI_PCI_IO_PROTOCOL_CONFIG_ACCESS = type { ptr, ptr }

@.str = external hidden unnamed_addr constant [148 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [21 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local i64 @UfsHcFreeBuffer(ptr noundef %0, i64 noundef %1, ptr noundef %2) #0 {
  %4 = alloca i64, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i64, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i64, align 8
  %11 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i64 %1, ptr %6, align 8, !tbaa !9
  store ptr %2, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  %12 = load ptr, ptr %5, align 8, !tbaa !5
  %13 = icmp eq ptr %12, null
  br i1 %13, label %17, label %14

14:                                               ; preds = %3
  %15 = load ptr, ptr %7, align 8, !tbaa !5
  %16 = icmp eq ptr %15, null
  br i1 %16, label %17, label %18

17:                                               ; preds = %14, %3
  store i64 -9223372036854775806, ptr %4, align 8
  store i32 1, ptr %11, align 4
  br label %50

18:                                               ; preds = %14
  %19 = call zeroext i8 @DebugAssertEnabled()
  %20 = zext i8 %19 to i32
  %21 = icmp ne i32 %20, 0
  br i1 %21, label %22, label %32

22:                                               ; preds = %18
  %23 = load ptr, ptr %5, align 8, !tbaa !5
  %24 = ptrtoint ptr %23 to i64
  %25 = sub i64 %24, ptrtoint (ptr getelementptr inbounds (%struct._UFS_HOST_CONTROLLER_PRIVATE_DATA, ptr null, i32 0, i32 2) to i64)
  %26 = inttoptr i64 %25 to ptr
  %27 = getelementptr inbounds %struct._UFS_HOST_CONTROLLER_PRIVATE_DATA, ptr %26, i32 0, i32 0
  %28 = load i32, ptr %27, align 8, !tbaa !11
  %29 = icmp ne i32 %28, 1213417045
  br i1 %29, label %30, label %32

30:                                               ; preds = %22
  call void @DebugAssert(ptr noundef @.str, i64 noundef 240, ptr noundef @.str.1)
  %31 = load ptr, ptr %5, align 8, !tbaa !5
  br label %37

32:                                               ; preds = %22, %18
  %33 = load ptr, ptr %5, align 8, !tbaa !5
  %34 = ptrtoint ptr %33 to i64
  %35 = sub i64 %34, ptrtoint (ptr getelementptr inbounds (%struct._UFS_HOST_CONTROLLER_PRIVATE_DATA, ptr null, i32 0, i32 2) to i64)
  %36 = inttoptr i64 %35 to ptr
  br label %37

37:                                               ; preds = %32, %30
  %38 = phi ptr [ %31, %30 ], [ %36, %32 ]
  store ptr %38, ptr %8, align 8, !tbaa !5
  %39 = load ptr, ptr %8, align 8, !tbaa !5
  %40 = getelementptr inbounds %struct._UFS_HOST_CONTROLLER_PRIVATE_DATA, ptr %39, i32 0, i32 3
  %41 = load ptr, ptr %40, align 8, !tbaa !15
  store ptr %41, ptr %9, align 8, !tbaa !5
  %42 = load ptr, ptr %9, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct._EFI_PCI_IO_PROTOCOL, ptr %42, i32 0, i32 9
  %44 = load ptr, ptr %43, align 8, !tbaa !16
  %45 = load ptr, ptr %9, align 8, !tbaa !5
  %46 = load i64, ptr %6, align 8, !tbaa !9
  %47 = load ptr, ptr %7, align 8, !tbaa !5
  %48 = call i64 %44(ptr noundef %45, i64 noundef %46, ptr noundef %47)
  store i64 %48, ptr %10, align 8, !tbaa !9
  %49 = load i64, ptr %10, align 8, !tbaa !9
  store i64 %49, ptr %4, align 8
  store i32 1, ptr %11, align 4
  br label %50

50:                                               ; preds = %37, %17
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  %51 = load i64, ptr %4, align 8
  ret i64 %51
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare zeroext i8 @DebugAssertEnabled() #2

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"_UFS_HOST_CONTROLLER_PRIVATE_DATA", !13, i64 0, !6, i64 8, !14, i64 16, !6, i64 64, !10, i64 72}
!13 = !{!"int", !7, i64 0}
!14 = !{!"_EDKII_UFS_HOST_CONTROLLER_PROTOCOL", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40}
!15 = !{!12, !6, i64 64}
!16 = !{!17, !6, i64 96}
!17 = !{!"_EFI_PCI_IO_PROTOCOL", !6, i64 0, !6, i64 8, !18, i64 16, !18, i64 32, !18, i64 48, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !6, i64 120, !6, i64 128, !6, i64 136, !10, i64 144, !6, i64 152}
!18 = !{!"", !6, i64 0, !6, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [148 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [21 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local i64 @UfsHcFreeBuffer(ptr noundef %0, i64 noundef %1, ptr noundef %2) local_unnamed_addr #0 {
  %4 = icmp eq ptr %0, null
  %5 = icmp eq ptr %2, null
  %or.cond = or i1 %4, %5
  br i1 %or.cond, label %17, label %6

6:                                                ; preds = %3
  %7 = tail call zeroext i8 @DebugAssertEnabled() #2
  %.not = icmp eq i8 %7, 0
  %.pre = ptrtoint ptr %0 to i64
  %.pre15 = add i64 %.pre, -16
  %.pre17 = inttoptr i64 %.pre15 to ptr
  br i1 %.not, label %._crit_edge, label %8

8:                                                ; preds = %6
  %9 = load i32, ptr %.pre17, align 8, !tbaa !5
  %.not14 = icmp eq i32 %9, 1213417045
  br i1 %.not14, label %._crit_edge, label %10

10:                                               ; preds = %8
  tail call void @DebugAssert(ptr noundef nonnull @.str, i64 noundef 240, ptr noundef nonnull @.str.1) #2
  br label %._crit_edge

._crit_edge:                                      ; preds = %6, %8, %10
  %11 = phi ptr [ %0, %10 ], [ %.pre17, %8 ], [ %.pre17, %6 ]
  %12 = getelementptr inbounds i8, ptr %11, i64 64
  %13 = load ptr, ptr %12, align 8, !tbaa !13
  %14 = getelementptr inbounds i8, ptr %13, i64 96
  %15 = load ptr, ptr %14, align 8, !tbaa !14
  %16 = tail call i64 %15(ptr noundef %13, i64 noundef %1, ptr noundef nonnull %2) #2
  br label %17

17:                                               ; preds = %3, %._crit_edge
  %.0 = phi i64 [ %16, %._crit_edge ], [ -9223372036854775806, %3 ]
  ret i64 %.0
}

declare zeroext i8 @DebugAssertEnabled() local_unnamed_addr #1

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_UFS_HOST_CONTROLLER_PRIVATE_DATA", !7, i64 0, !10, i64 8, !11, i64 16, !10, i64 64, !12, i64 72}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!"_EDKII_UFS_HOST_CONTROLLER_PROTOCOL", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40}
!12 = !{!"long long", !8, i64 0}
!13 = !{!6, !10, i64 64}
!14 = !{!15, !10, i64 96}
!15 = !{!"_EFI_PCI_IO_PROTOCOL", !10, i64 0, !10, i64 8, !16, i64 16, !16, i64 32, !16, i64 48, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !12, i64 144, !10, i64 152}
!16 = !{!"", !10, i64 0, !10, i64 8}


; Effective O3 passes: BDCEPass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,SROAPass,SimplifyCFGPass,TailCallElimPass