; LLVM IR from NervanaSystems/ngraph :: src/ngraph/type/element_type.ll (ZN6ngraph7element4Type5mergeERS1_RKS1_S4_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK6ngraph7element4TypeeqERKS1_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK6ngraph7element4Type10is_dynamicEv(ptr noundef nonnull align 4 dereferenceable(4)) #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN6ngraph7element4Type5mergeERS1_RKS1_S4_(ptr noundef nonnull align 4 dereferenceable(4) %0, ptr noundef nonnull align 4 dereferenceable(4) %1, ptr noundef nonnull align 4 dereferenceable(4) %2) #2 align 2 {
  %4 = alloca i1, align 1
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  %8 = load ptr, ptr %6, align 8, !tbaa !5
  %9 = call noundef zeroext i1 @_ZNK6ngraph7element4Type10is_dynamicEv(ptr noundef nonnull align 4 dereferenceable(4) %8)
  br i1 %9, label %10, label %13

10:                                               ; preds = %3
  %11 = load ptr, ptr %7, align 8, !tbaa !5
  %12 = load ptr, ptr %5, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %12, ptr align 4 %11, i64 4, i1 false), !tbaa.struct !9
  store i1 true, ptr %4, align 1
  br label %27

13:                                               ; preds = %3
  %14 = load ptr, ptr %7, align 8, !tbaa !5
  %15 = call noundef zeroext i1 @_ZNK6ngraph7element4Type10is_dynamicEv(ptr noundef nonnull align 4 dereferenceable(4) %14)
  br i1 %15, label %16, label %19

16:                                               ; preds = %13
  %17 = load ptr, ptr %6, align 8, !tbaa !5
  %18 = load ptr, ptr %5, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %18, ptr align 4 %17, i64 4, i1 false), !tbaa.struct !9
  store i1 true, ptr %4, align 1
  br label %27

19:                                               ; preds = %13
  %20 = load ptr, ptr %6, align 8, !tbaa !5
  %21 = load ptr, ptr %7, align 8, !tbaa !5
  %22 = call noundef zeroext i1 @_ZNK6ngraph7element4TypeeqERKS1_(ptr noundef nonnull align 4 dereferenceable(4) %20, ptr noundef nonnull align 4 dereferenceable(4) %21)
  br i1 %22, label %23, label %26

23:                                               ; preds = %19
  %24 = load ptr, ptr %6, align 8, !tbaa !5
  %25 = load ptr, ptr %5, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %25, ptr align 4 %24, i64 4, i1 false), !tbaa.struct !9
  store i1 true, ptr %4, align 1
  br label %27

26:                                               ; preds = %19
  store i1 false, ptr %4, align 1
  br label %27

27:                                               ; preds = %26, %23, %16, %10
  %28 = load i1, ptr %4, align 1
  ret i1 %28
}

attributes #0 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{i64 0, i64 4, !10}
!10 = !{!11, !11, i64 0}
!11 = !{!"_ZTSN6ngraph7element6Type_tE", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK6ngraph7element4TypeeqERKS1_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK6ngraph7element4Type10is_dynamicEv(ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN6ngraph7element4Type5mergeERS1_RKS1_S4_(ptr nocapture noundef nonnull writeonly align 4 dereferenceable(4) %0, ptr noundef nonnull align 4 dereferenceable(4) %1, ptr noundef nonnull align 4 dereferenceable(4) %2) local_unnamed_addr #1 align 2 {
  %4 = tail call noundef zeroext i1 @_ZNK6ngraph7element4Type10is_dynamicEv(ptr noundef nonnull align 4 dereferenceable(4) %1)
  br i1 %4, label %.sink.split, label %5

5:                                                ; preds = %3
  %6 = tail call noundef zeroext i1 @_ZNK6ngraph7element4Type10is_dynamicEv(ptr noundef nonnull align 4 dereferenceable(4) %2)
  br i1 %6, label %.sink.split, label %7

7:                                                ; preds = %5
  %8 = tail call noundef zeroext i1 @_ZNK6ngraph7element4TypeeqERKS1_(ptr noundef nonnull align 4 dereferenceable(4) %1, ptr noundef nonnull align 4 dereferenceable(4) %2)
  br i1 %8, label %.sink.split, label %10

.sink.split:                                      ; preds = %7, %5, %3
  %.sink11 = phi ptr [ %2, %3 ], [ %1, %5 ], [ %1, %7 ]
  %9 = load i32, ptr %.sink11, align 4, !tbaa !5
  store i32 %9, ptr %0, align 4, !tbaa !5
  br label %10

10:                                               ; preds = %.sink.split, %7
  %.0 = phi i1 [ false, %7 ], [ true, %.sink.split ]
  ret i1 %.0
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"_ZTSN6ngraph7element6Type_tE", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass