; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/NetworkPkg/IpSecDxe (IpSecDumpBuf)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.66 = external hidden unnamed_addr constant [17 x i8], align 1
@.str.67 = external hidden unnamed_addr constant [9 x i8], align 1
@.str.68 = external hidden unnamed_addr constant [2 x i8], align 1

declare zeroext i8 @DebugPrintEnabled() #0

declare zeroext i8 @DebugPrintLevelEnabled(i64 noundef) #0

declare void @DebugPrint(i64 noundef, ptr noundef, ...) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
define dso_local void @IpSecDumpBuf(ptr noundef %0, ptr noundef %1, i64 noundef %2) #2 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i64 %2, ptr %6, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  store i64 0, ptr %8, align 8, !tbaa !9
  %11 = load i64, ptr %6, align 8, !tbaa !9
  store i64 %11, ptr %9, align 8, !tbaa !9
  br label %12

12:                                               ; preds = %3
  %13 = call zeroext i8 @DebugPrintEnabled()
  %14 = icmp ne i8 %13, 0
  br i1 %14, label %15, label %25

15:                                               ; preds = %12
  br label %16

16:                                               ; preds = %15
  %17 = call zeroext i8 @DebugPrintLevelEnabled(i64 noundef 64)
  %18 = icmp ne i8 %17, 0
  br i1 %18, label %19, label %22

19:                                               ; preds = %16
  %20 = load ptr, ptr %4, align 8, !tbaa !5
  %21 = load i64, ptr %6, align 8, !tbaa !9
  call void (i64, ptr, ...) @DebugPrint(i64 noundef 64, ptr noundef @.str.66, ptr noundef %20, i64 noundef %21)
  br label %22

22:                                               ; preds = %19, %16
  br label %23

23:                                               ; preds = %22
  br label %24

24:                                               ; preds = %23
  br label %25

25:                                               ; preds = %24, %12
  br label %26

26:                                               ; preds = %25
  br label %27

27:                                               ; preds = %26
  br label %28

28:                                               ; preds = %81, %27
  %29 = load i64, ptr %9, align 8, !tbaa !9
  %30 = icmp ugt i64 %29, 0
  br i1 %30, label %31, label %85

31:                                               ; preds = %28
  %32 = load i64, ptr %9, align 8, !tbaa !9
  %33 = icmp ugt i64 %32, 8
  br i1 %33, label %34, label %35

34:                                               ; preds = %31
  br label %37

35:                                               ; preds = %31
  %36 = load i64, ptr %9, align 8, !tbaa !9
  br label %37

37:                                               ; preds = %35, %34
  %38 = phi i64 [ 8, %34 ], [ %36, %35 ]
  store i64 %38, ptr %10, align 8, !tbaa !9
  store i64 0, ptr %7, align 8, !tbaa !9
  br label %39

39:                                               ; preds = %64, %37
  %40 = load i64, ptr %7, align 8, !tbaa !9
  %41 = load i64, ptr %10, align 8, !tbaa !9
  %42 = icmp ult i64 %40, %41
  br i1 %42, label %43, label %67

43:                                               ; preds = %39
  br label %44

44:                                               ; preds = %43
  %45 = call zeroext i8 @DebugPrintEnabled()
  %46 = icmp ne i8 %45, 0
  br i1 %46, label %47, label %61

47:                                               ; preds = %44
  br label %48

48:                                               ; preds = %47
  %49 = call zeroext i8 @DebugPrintLevelEnabled(i64 noundef 64)
  %50 = icmp ne i8 %49, 0
  br i1 %50, label %51, label %58

51:                                               ; preds = %48
  %52 = load ptr, ptr %5, align 8, !tbaa !5
  %53 = load i64, ptr %8, align 8, !tbaa !9
  %54 = add i64 %53, 1
  store i64 %54, ptr %8, align 8, !tbaa !9
  %55 = getelementptr inbounds i8, ptr %52, i64 %53
  %56 = load i8, ptr %55, align 1, !tbaa !11
  %57 = zext i8 %56 to i32
  call void (i64, ptr, ...) @DebugPrint(i64 noundef 64, ptr noundef @.str.67, i32 noundef %57)
  br label %58

58:                                               ; preds = %51, %48
  br label %59

59:                                               ; preds = %58
  br label %60

60:                                               ; preds = %59
  br label %61

61:                                               ; preds = %60, %44
  br label %62

62:                                               ; preds = %61
  br label %63

63:                                               ; preds = %62
  br label %64

64:                                               ; preds = %63
  %65 = load i64, ptr %7, align 8, !tbaa !9
  %66 = add i64 %65, 1
  store i64 %66, ptr %7, align 8, !tbaa !9
  br label %39, !llvm.loop !12

67:                                               ; preds = %39
  br label %68

68:                                               ; preds = %67
  %69 = call zeroext i8 @DebugPrintEnabled()
  %70 = icmp ne i8 %69, 0
  br i1 %70, label %71, label %79

71:                                               ; preds = %68
  br label %72

72:                                               ; preds = %71
  %73 = call zeroext i8 @DebugPrintLevelEnabled(i64 noundef 64)
  %74 = icmp ne i8 %73, 0
  br i1 %74, label %75, label %76

75:                                               ; preds = %72
  call void (i64, ptr, ...) @DebugPrint(i64 noundef 64, ptr noundef @.str.68)
  br label %76

76:                                               ; preds = %75, %72
  br label %77

77:                                               ; preds = %76
  br label %78

78:                                               ; preds = %77
  br label %79

79:                                               ; preds = %78, %68
  br label %80

80:                                               ; preds = %79
  br label %81

81:                                               ; preds = %80
  %82 = load i64, ptr %10, align 8, !tbaa !9
  %83 = load i64, ptr %9, align 8, !tbaa !9
  %84 = sub i64 %83, %82
  store i64 %84, ptr %9, align 8, !tbaa !9
  br label %28, !llvm.loop !14

85:                                               ; preds = %28
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.66 = external hidden unnamed_addr constant [17 x i8], align 1
@.str.67 = external hidden unnamed_addr constant [9 x i8], align 1
@.str.68 = external hidden unnamed_addr constant [2 x i8], align 1

declare zeroext i8 @DebugPrintEnabled() local_unnamed_addr #0

declare zeroext i8 @DebugPrintLevelEnabled(i64 noundef) local_unnamed_addr #0

declare void @DebugPrint(i64 noundef, ptr noundef, ...) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @IpSecDumpBuf(ptr noundef %0, ptr nocapture noundef readonly %1, i64 noundef %2) local_unnamed_addr #1 {
  %4 = tail call zeroext i8 @DebugPrintEnabled() #3
  %.not = icmp eq i8 %4, 0
  br i1 %.not, label %8, label %5

5:                                                ; preds = %3
  %6 = tail call zeroext i8 @DebugPrintLevelEnabled(i64 noundef 64) #3
  %.not15 = icmp eq i8 %6, 0
  br i1 %.not15, label %8, label %7

7:                                                ; preds = %5
  tail call void (i64, ptr, ...) @DebugPrint(i64 noundef 64, ptr noundef nonnull @.str.66, ptr noundef %0, i64 noundef %2) #3
  br label %8

8:                                                ; preds = %5, %7, %3
  %.not1623 = icmp eq i64 %2, 0
  br i1 %.not1623, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %8, %26
  %.01225 = phi i64 [ %27, %26 ], [ %2, %8 ]
  %.01324 = phi i64 [ %.2, %26 ], [ 0, %8 ]
  %9 = tail call i64 @llvm.umin.i64(i64 %.01225, i64 8)
  br label %10

10:                                               ; preds = %.lr.ph, %19
  %.022 = phi i64 [ 0, %.lr.ph ], [ %20, %19 ]
  %.121 = phi i64 [ %.01324, %.lr.ph ], [ %.2, %19 ]
  %11 = tail call zeroext i8 @DebugPrintEnabled() #3
  %.not19 = icmp eq i8 %11, 0
  br i1 %.not19, label %19, label %12

12:                                               ; preds = %10
  %13 = tail call zeroext i8 @DebugPrintLevelEnabled(i64 noundef 64) #3
  %.not20 = icmp eq i8 %13, 0
  br i1 %.not20, label %19, label %14

14:                                               ; preds = %12
  %15 = add i64 %.121, 1
  %16 = getelementptr inbounds i8, ptr %1, i64 %.121
  %17 = load i8, ptr %16, align 1, !tbaa !5
  %18 = zext i8 %17 to i32
  tail call void (i64, ptr, ...) @DebugPrint(i64 noundef 64, ptr noundef nonnull @.str.67, i32 noundef %18) #3
  br label %19

19:                                               ; preds = %10, %14, %12
  %.2 = phi i64 [ %15, %14 ], [ %.121, %12 ], [ %.121, %10 ]
  %20 = add nuw nsw i64 %.022, 1
  %exitcond.not = icmp eq i64 %20, %9
  br i1 %exitcond.not, label %21, label %10, !llvm.loop !8

21:                                               ; preds = %19
  %22 = tail call zeroext i8 @DebugPrintEnabled() #3
  %.not17 = icmp eq i8 %22, 0
  br i1 %.not17, label %26, label %23

23:                                               ; preds = %21
  %24 = tail call zeroext i8 @DebugPrintLevelEnabled(i64 noundef 64) #3
  %.not18 = icmp eq i8 %24, 0
  br i1 %.not18, label %26, label %25

25:                                               ; preds = %23
  tail call void (i64, ptr, ...) @DebugPrint(i64 noundef 64, ptr noundef nonnull @.str.68) #3
  br label %26

26:                                               ; preds = %23, %25, %21
  %27 = sub i64 %.01225, %9
  %.not16 = icmp eq i64 %27, 0
  br i1 %.not16, label %._crit_edge, label %.lr.ph, !llvm.loop !10

._crit_edge:                                      ; preds = %26, %8
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umin.i64(i64, i64) #2

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}
!10 = distinct !{!10, !9}


; Effective O3 passes: CorrelatedValuePropagationPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass