; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/datatypes/int/sc_nbutils.ll (ZN5sc_dt14vec_shift_leftEiPji)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef, ptr noundef) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt12one_and_onesEi(i32 noundef) #2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5sc_dt14vec_shift_leftEiPji(i32 noundef %0, ptr noundef %1, i32 noundef %2) #3 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !9
  store i32 %2, ptr %6, align 4, !tbaa !5
  %16 = load i32, ptr %6, align 4, !tbaa !5
  %17 = icmp sle i32 %16, 0
  br i1 %17, label %18, label %19

18:                                               ; preds = %3
  br label %113

19:                                               ; preds = %3
  %20 = load i32, ptr %6, align 4, !tbaa !5
  %21 = icmp sge i32 %20, 30
  br i1 %21, label %22, label %76

22:                                               ; preds = %19
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  %23 = load i32, ptr %6, align 4, !tbaa !5
  %24 = srem i32 %23, 30
  %25 = icmp eq i32 %24, 0
  br i1 %25, label %26, label %29

26:                                               ; preds = %22
  %27 = load i32, ptr %6, align 4, !tbaa !5
  %28 = sdiv i32 %27, 30
  store i32 %28, ptr %7, align 4, !tbaa !5
  store i32 0, ptr %6, align 4, !tbaa !5
  br label %39

29:                                               ; preds = %22
  %30 = load i32, ptr %6, align 4, !tbaa !5
  %31 = sub nsw i32 %30, 1
  %32 = sdiv i32 %31, 30
  %33 = add nsw i32 %32, 1
  %34 = sub nsw i32 %33, 1
  store i32 %34, ptr %7, align 4, !tbaa !5
  %35 = load i32, ptr %7, align 4, !tbaa !5
  %36 = mul nsw i32 %35, 30
  %37 = load i32, ptr %6, align 4, !tbaa !5
  %38 = sub nsw i32 %37, %36
  store i32 %38, ptr %6, align 4, !tbaa !5
  br label %39

39:                                               ; preds = %29, %26
  %40 = load i32, ptr %7, align 4, !tbaa !5
  %41 = icmp ne i32 %40, 0
  br i1 %41, label %42, label %68

42:                                               ; preds = %39
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  %43 = load i32, ptr %4, align 4, !tbaa !5
  %44 = sub nsw i32 %43, 1
  store i32 %44, ptr %8, align 4, !tbaa !5
  br label %45

45:                                               ; preds = %62, %42
  %46 = load i32, ptr %8, align 4, !tbaa !5
  %47 = load i32, ptr %7, align 4, !tbaa !5
  %48 = icmp sge i32 %46, %47
  br i1 %48, label %50, label %49

49:                                               ; preds = %45
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  br label %65

50:                                               ; preds = %45
  %51 = load ptr, ptr %5, align 8, !tbaa !9
  %52 = load i32, ptr %8, align 4, !tbaa !5
  %53 = load i32, ptr %7, align 4, !tbaa !5
  %54 = sub nsw i32 %52, %53
  %55 = sext i32 %54 to i64
  %56 = getelementptr inbounds i32, ptr %51, i64 %55
  %57 = load i32, ptr %56, align 4, !tbaa !5
  %58 = load ptr, ptr %5, align 8, !tbaa !9
  %59 = load i32, ptr %8, align 4, !tbaa !5
  %60 = sext i32 %59 to i64
  %61 = getelementptr inbounds i32, ptr %58, i64 %60
  store i32 %57, ptr %61, align 4, !tbaa !5
  br label %62

62:                                               ; preds = %50
  %63 = load i32, ptr %8, align 4, !tbaa !5
  %64 = add nsw i32 %63, -1
  store i32 %64, ptr %8, align 4, !tbaa !5
  br label %45, !llvm.loop !11

65:                                               ; preds = %49
  %66 = call noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %7, ptr noundef nonnull align 4 dereferenceable(4) %4)
  %67 = load ptr, ptr %5, align 8, !tbaa !9
  call void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef %66, ptr noundef %67)
  br label %68

68:                                               ; preds = %65, %39
  %69 = load i32, ptr %6, align 4, !tbaa !5
  %70 = icmp eq i32 %69, 0
  br i1 %70, label %71, label %72

71:                                               ; preds = %68
  store i32 1, ptr %9, align 4
  br label %73

72:                                               ; preds = %68
  store i32 0, ptr %9, align 4
  br label %73

73:                                               ; preds = %72, %71
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  %74 = load i32, ptr %9, align 4
  switch i32 %74, label %114 [
    i32 0, label %75
    i32 1, label %113
  ]

75:                                               ; preds = %73
  br label %76

76:                                               ; preds = %75, %19
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #4
  %77 = load ptr, ptr %5, align 8, !tbaa !9
  store ptr %77, ptr %10, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #4
  %78 = load ptr, ptr %10, align 8, !tbaa !9
  %79 = load i32, ptr %4, align 4, !tbaa !5
  %80 = sext i32 %79 to i64
  %81 = getelementptr inbounds i32, ptr %78, i64 %80
  store ptr %81, ptr %11, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  %82 = load i32, ptr %6, align 4, !tbaa !5
  %83 = sub nsw i32 30, %82
  store i32 %83, ptr %12, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  %84 = load i32, ptr %12, align 4, !tbaa !5
  %85 = call noundef i32 @_ZN5sc_dt12one_and_onesEi(i32 noundef %84)
  store i32 %85, ptr %13, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #4
  store i32 0, ptr %14, align 4, !tbaa !5
  br label %86

86:                                               ; preds = %90, %76
  %87 = load ptr, ptr %10, align 8, !tbaa !9
  %88 = load ptr, ptr %11, align 8, !tbaa !9
  %89 = icmp ult ptr %87, %88
  br i1 %89, label %90, label %105

90:                                               ; preds = %86
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #4
  %91 = load ptr, ptr %10, align 8, !tbaa !9
  %92 = load i32, ptr %91, align 4, !tbaa !5
  store i32 %92, ptr %15, align 4, !tbaa !5
  %93 = load i32, ptr %15, align 4, !tbaa !5
  %94 = load i32, ptr %13, align 4, !tbaa !5
  %95 = and i32 %93, %94
  %96 = load i32, ptr %6, align 4, !tbaa !5
  %97 = shl i32 %95, %96
  %98 = load i32, ptr %14, align 4, !tbaa !5
  %99 = or i32 %97, %98
  %100 = load ptr, ptr %10, align 8, !tbaa !9
  %101 = getelementptr inbounds i32, ptr %100, i32 1
  store ptr %101, ptr %10, align 8, !tbaa !9
  store i32 %99, ptr %100, align 4, !tbaa !5
  %102 = load i32, ptr %15, align 4, !tbaa !5
  %103 = load i32, ptr %12, align 4, !tbaa !5
  %104 = lshr i32 %102, %103
  store i32 %104, ptr %14, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #4
  br label %86, !llvm.loop !13

105:                                              ; preds = %86
  %106 = load ptr, ptr %10, align 8, !tbaa !9
  %107 = load ptr, ptr %11, align 8, !tbaa !9
  %108 = icmp ult ptr %106, %107
  br i1 %108, label %109, label %112

109:                                              ; preds = %105
  %110 = load i32, ptr %14, align 4, !tbaa !5
  %111 = load ptr, ptr %10, align 8, !tbaa !9
  store i32 %110, ptr %111, align 4, !tbaa !5
  br label %112

112:                                              ; preds = %109, %105
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #4
  br label %113

113:                                              ; preds = %112, %73, %18
  ret void

114:                                              ; preds = %73
  unreachable
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt12one_and_onesEi(i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5sc_dt14vec_shift_leftEiPji(i32 noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #3 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  %6 = icmp slt i32 %2, 1
  br i1 %6, label %.loopexit, label %7

7:                                                ; preds = %3
  %8 = icmp ugt i32 %2, 29
  br i1 %8, label %9, label %38

9:                                                ; preds = %7
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #4
  %10 = urem i32 %2, 30
  %11 = udiv i32 %2, 30
  %12 = icmp eq i32 %10, 0
  br i1 %12, label %.thread, label %13

.thread:                                          ; preds = %9
  store i32 %11, ptr %5, align 4, !tbaa !5
  br label %17

13:                                               ; preds = %9
  %14 = add nsw i32 %2, -1
  %15 = udiv i32 %14, 30
  store i32 %15, ptr %5, align 4, !tbaa !5
  %.neg = mul nsw i32 %15, -30
  %16 = add nsw i32 %.neg, %2
  %.not = icmp eq i32 %2, 30
  br i1 %.not, label %37, label %17

17:                                               ; preds = %.thread, %13
  %.041 = phi i32 [ 0, %.thread ], [ %16, %13 ]
  %18 = phi i32 [ %11, %.thread ], [ %15, %13 ]
  %.not38.not44 = icmp slt i32 %18, %0
  br i1 %.not38.not44, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %17
  %19 = zext i32 %0 to i64
  %20 = zext nneg i32 %18 to i64
  %21 = sub nsw i64 %19, %20
  %min.iters.check = icmp ult i64 %21, 8
  br i1 %min.iters.check, label %.lr.ph.preheader57, label %vector.ph

.lr.ph.preheader57:                               ; preds = %middle.block, %.lr.ph.preheader
  %indvars.iv.ph = phi i64 [ %19, %.lr.ph.preheader ], [ %ind.end, %middle.block ]
  br label %.lr.ph

vector.ph:                                        ; preds = %.lr.ph.preheader
  %n.vec = and i64 %21, -8
  %ind.end = sub nsw i64 %19, %n.vec
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %22 = xor i64 %index, -1
  %23 = add i64 %22, %19
  %24 = sub nsw i64 %23, %20
  %25 = getelementptr inbounds i32, ptr %1, i64 %24
  %26 = getelementptr inbounds i8, ptr %25, i64 -12
  %27 = getelementptr inbounds i8, ptr %25, i64 -28
  %wide.load = load <4 x i32>, ptr %26, align 4, !tbaa !5
  %wide.load53 = load <4 x i32>, ptr %27, align 4, !tbaa !5
  %28 = getelementptr inbounds i32, ptr %1, i64 %23
  %29 = getelementptr inbounds i8, ptr %28, i64 -12
  %30 = getelementptr inbounds i8, ptr %28, i64 -28
  store <4 x i32> %wide.load, ptr %29, align 4, !tbaa !5
  store <4 x i32> %wide.load53, ptr %30, align 4, !tbaa !5
  %index.next = add nuw i64 %index, 8
  %31 = icmp eq i64 %index.next, %n.vec
  br i1 %31, label %middle.block, label %vector.body, !llvm.loop !9

middle.block:                                     ; preds = %vector.body
  %cmp.n = icmp eq i64 %21, %n.vec
  br i1 %cmp.n, label %._crit_edge, label %.lr.ph.preheader57

._crit_edge:                                      ; preds = %.lr.ph, %middle.block, %17
  %32 = call noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %5, ptr noundef nonnull align 4 dereferenceable(4) %4)
  call void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef %32, ptr noundef %1)
  br label %37

.lr.ph:                                           ; preds = %.lr.ph.preheader57, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ %indvars.iv.ph, %.lr.ph.preheader57 ]
  %indvars.iv.next = add nsw i64 %indvars.iv, -1
  %33 = sub nsw i64 %indvars.iv.next, %20
  %34 = getelementptr inbounds i32, ptr %1, i64 %33
  %35 = load i32, ptr %34, align 4, !tbaa !5
  %36 = getelementptr inbounds i32, ptr %1, i64 %indvars.iv.next
  store i32 %35, ptr %36, align 4, !tbaa !5
  %.not38.not = icmp sgt i64 %indvars.iv.next, %20
  br i1 %.not38.not, label %.lr.ph, label %._crit_edge, !llvm.loop !13

37:                                               ; preds = %._crit_edge, %13
  %.042 = phi i32 [ %.041, %._crit_edge ], [ %16, %13 ]
  %.not43 = icmp eq i32 %.042, 0
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #4
  br i1 %.not43, label %.loopexit, label %._crit_edge52

._crit_edge52:                                    ; preds = %37
  %.pre = load i32, ptr %4, align 4, !tbaa !5
  br label %38

38:                                               ; preds = %._crit_edge52, %7
  %39 = phi i32 [ %.pre, %._crit_edge52 ], [ %0, %7 ]
  %.1 = phi i32 [ %.042, %._crit_edge52 ], [ %2, %7 ]
  %40 = sext i32 %39 to i64
  %41 = getelementptr inbounds i32, ptr %1, i64 %40
  %42 = sub nsw i32 30, %.1
  %43 = call noundef i32 @_ZN5sc_dt12one_and_onesEi(i32 noundef %42)
  %44 = icmp sgt i32 %39, 0
  br i1 %44, label %.lr.ph49, label %.loopexit

.lr.ph49:                                         ; preds = %38, %.lr.ph49
  %.03247 = phi i32 [ %50, %.lr.ph49 ], [ 0, %38 ]
  %.03546 = phi ptr [ %49, %.lr.ph49 ], [ %1, %38 ]
  %45 = load i32, ptr %.03546, align 4, !tbaa !5
  %46 = and i32 %45, %43
  %47 = shl i32 %46, %.1
  %48 = or i32 %47, %.03247
  %49 = getelementptr inbounds i8, ptr %.03546, i64 4
  store i32 %48, ptr %.03546, align 4, !tbaa !5
  %50 = lshr i32 %45, %42
  %51 = icmp ult ptr %49, %41
  br i1 %51, label %.lr.ph49, label %.loopexit, !llvm.loop !14

.loopexit:                                        ; preds = %.lr.ph49, %38, %37, %3
  ret void
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10, !11, !12}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.isvectorized", i32 1}
!12 = !{!"llvm.loop.unroll.runtime.disable"}
!13 = distinct !{!13, !10, !12, !11}
!14 = distinct !{!14, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,DivRemPairsPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,SCCPPass,SROAPass,SimplifyCFGPass