; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/OptionRomPkg (CirrusLogic5430UgaDrawGetMode)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.CIRRUS_LOGIC_5430_PRIVATE_DATA = type { i64, ptr, ptr, i64, %struct._EFI_UGA_DRAW_PROTOCOL, %struct._EFI_GRAPHICS_OUTPUT_PROTOCOL, %struct.EFI_EDID_DISCOVERED_PROTOCOL, %struct.EFI_EDID_ACTIVE_PROTOCOL, ptr, ptr, i64, i64, [3 x %struct.CIRRUS_LOGIC_5430_MODE_DATA], ptr, i8 }
%struct._EFI_UGA_DRAW_PROTOCOL = type { ptr, ptr, ptr }
%struct._EFI_GRAPHICS_OUTPUT_PROTOCOL = type { ptr, ptr, ptr, ptr }
%struct.EFI_EDID_DISCOVERED_PROTOCOL = type { i32, ptr }
%struct.EFI_EDID_ACTIVE_PROTOCOL = type { i32, ptr }
%struct.CIRRUS_LOGIC_5430_MODE_DATA = type { i32, i32, i32, i32, i32 }

@.str = external hidden unnamed_addr constant [158 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [21 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local i64 @CirrusLogic5430UgaDrawGetMode(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4) #0 {
  %6 = alloca i64, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  store ptr %0, ptr %7, align 8, !tbaa !5
  store ptr %1, ptr %8, align 8, !tbaa !5
  store ptr %2, ptr %9, align 8, !tbaa !5
  store ptr %3, ptr %10, align 8, !tbaa !5
  store ptr %4, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #3
  %14 = call zeroext i8 @DebugAssertEnabled()
  %15 = zext i8 %14 to i32
  %16 = icmp ne i32 %15, 0
  br i1 %16, label %17, label %27

17:                                               ; preds = %5
  %18 = load ptr, ptr %7, align 8, !tbaa !5
  %19 = ptrtoint ptr %18 to i64
  %20 = sub i64 %19, ptrtoint (ptr getelementptr inbounds (%struct.CIRRUS_LOGIC_5430_PRIVATE_DATA, ptr null, i32 0, i32 4) to i64)
  %21 = inttoptr i64 %20 to ptr
  %22 = getelementptr inbounds %struct.CIRRUS_LOGIC_5430_PRIVATE_DATA, ptr %21, i32 0, i32 0
  %23 = load i64, ptr %22, align 8, !tbaa !9
  %24 = icmp ne i64 %23, 875908163
  br i1 %24, label %25, label %27

25:                                               ; preds = %17
  call void @DebugAssert(ptr noundef @.str, i64 noundef 34, ptr noundef @.str.1)
  %26 = load ptr, ptr %7, align 8, !tbaa !5
  br label %32

27:                                               ; preds = %17, %5
  %28 = load ptr, ptr %7, align 8, !tbaa !5
  %29 = ptrtoint ptr %28 to i64
  %30 = sub i64 %29, ptrtoint (ptr getelementptr inbounds (%struct.CIRRUS_LOGIC_5430_PRIVATE_DATA, ptr null, i32 0, i32 4) to i64)
  %31 = inttoptr i64 %30 to ptr
  br label %32

32:                                               ; preds = %27, %25
  %33 = phi ptr [ %26, %25 ], [ %31, %27 ]
  store ptr %33, ptr %12, align 8, !tbaa !5
  %34 = load ptr, ptr %12, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.CIRRUS_LOGIC_5430_PRIVATE_DATA, ptr %34, i32 0, i32 14
  %36 = load i8, ptr %35, align 8, !tbaa !16
  %37 = icmp ne i8 %36, 0
  br i1 %37, label %38, label %39

38:                                               ; preds = %32
  store i64 -9223372036854775789, ptr %6, align 8
  store i32 1, ptr %13, align 4
  br label %89

39:                                               ; preds = %32
  %40 = load ptr, ptr %8, align 8, !tbaa !5
  %41 = icmp eq ptr %40, null
  br i1 %41, label %51, label %42

42:                                               ; preds = %39
  %43 = load ptr, ptr %9, align 8, !tbaa !5
  %44 = icmp eq ptr %43, null
  br i1 %44, label %51, label %45

45:                                               ; preds = %42
  %46 = load ptr, ptr %10, align 8, !tbaa !5
  %47 = icmp eq ptr %46, null
  br i1 %47, label %51, label %48

48:                                               ; preds = %45
  %49 = load ptr, ptr %11, align 8, !tbaa !5
  %50 = icmp eq ptr %49, null
  br i1 %50, label %51, label %52

51:                                               ; preds = %48, %45, %42, %39
  store i64 -9223372036854775806, ptr %6, align 8
  store i32 1, ptr %13, align 4
  br label %89

52:                                               ; preds = %48
  %53 = load ptr, ptr %12, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.CIRRUS_LOGIC_5430_PRIVATE_DATA, ptr %53, i32 0, i32 12
  %55 = load ptr, ptr %12, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.CIRRUS_LOGIC_5430_PRIVATE_DATA, ptr %55, i32 0, i32 10
  %57 = load i64, ptr %56, align 8, !tbaa !17
  %58 = getelementptr inbounds [3 x %struct.CIRRUS_LOGIC_5430_MODE_DATA], ptr %54, i64 0, i64 %57
  %59 = getelementptr inbounds %struct.CIRRUS_LOGIC_5430_MODE_DATA, ptr %58, i32 0, i32 1
  %60 = load i32, ptr %59, align 4, !tbaa !18
  %61 = load ptr, ptr %8, align 8, !tbaa !5
  store i32 %60, ptr %61, align 4, !tbaa !20
  %62 = load ptr, ptr %12, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.CIRRUS_LOGIC_5430_PRIVATE_DATA, ptr %62, i32 0, i32 12
  %64 = load ptr, ptr %12, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.CIRRUS_LOGIC_5430_PRIVATE_DATA, ptr %64, i32 0, i32 10
  %66 = load i64, ptr %65, align 8, !tbaa !17
  %67 = getelementptr inbounds [3 x %struct.CIRRUS_LOGIC_5430_MODE_DATA], ptr %63, i64 0, i64 %66
  %68 = getelementptr inbounds %struct.CIRRUS_LOGIC_5430_MODE_DATA, ptr %67, i32 0, i32 2
  %69 = load i32, ptr %68, align 4, !tbaa !21
  %70 = load ptr, ptr %9, align 8, !tbaa !5
  store i32 %69, ptr %70, align 4, !tbaa !20
  %71 = load ptr, ptr %12, align 8, !tbaa !5
  %72 = getelementptr inbounds %struct.CIRRUS_LOGIC_5430_PRIVATE_DATA, ptr %71, i32 0, i32 12
  %73 = load ptr, ptr %12, align 8, !tbaa !5
  %74 = getelementptr inbounds %struct.CIRRUS_LOGIC_5430_PRIVATE_DATA, ptr %73, i32 0, i32 10
  %75 = load i64, ptr %74, align 8, !tbaa !17
  %76 = getelementptr inbounds [3 x %struct.CIRRUS_LOGIC_5430_MODE_DATA], ptr %72, i64 0, i64 %75
  %77 = getelementptr inbounds %struct.CIRRUS_LOGIC_5430_MODE_DATA, ptr %76, i32 0, i32 3
  %78 = load i32, ptr %77, align 4, !tbaa !22
  %79 = load ptr, ptr %10, align 8, !tbaa !5
  store i32 %78, ptr %79, align 4, !tbaa !20
  %80 = load ptr, ptr %12, align 8, !tbaa !5
  %81 = getelementptr inbounds %struct.CIRRUS_LOGIC_5430_PRIVATE_DATA, ptr %80, i32 0, i32 12
  %82 = load ptr, ptr %12, align 8, !tbaa !5
  %83 = getelementptr inbounds %struct.CIRRUS_LOGIC_5430_PRIVATE_DATA, ptr %82, i32 0, i32 10
  %84 = load i64, ptr %83, align 8, !tbaa !17
  %85 = getelementptr inbounds [3 x %struct.CIRRUS_LOGIC_5430_MODE_DATA], ptr %81, i64 0, i64 %84
  %86 = getelementptr inbounds %struct.CIRRUS_LOGIC_5430_MODE_DATA, ptr %85, i32 0, i32 4
  %87 = load i32, ptr %86, align 4, !tbaa !23
  %88 = load ptr, ptr %11, align 8, !tbaa !5
  store i32 %87, ptr %88, align 4, !tbaa !20
  store i64 0, ptr %6, align 8
  store i32 1, ptr %13, align 4
  br label %89

89:                                               ; preds = %52, %51, %38
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #3
  %90 = load i64, ptr %6, align 8
  ret i64 %90
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare zeroext i8 @DebugAssertEnabled() #2

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"", !11, i64 0, !6, i64 8, !6, i64 16, !11, i64 24, !12, i64 32, !13, i64 56, !14, i64 88, !14, i64 104, !6, i64 120, !6, i64 128, !11, i64 136, !11, i64 144, !7, i64 152, !6, i64 216, !7, i64 224}
!11 = !{!"long long", !7, i64 0}
!12 = !{!"_EFI_UGA_DRAW_PROTOCOL", !6, i64 0, !6, i64 8, !6, i64 16}
!13 = !{!"_EFI_GRAPHICS_OUTPUT_PROTOCOL", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24}
!14 = !{!"", !15, i64 0, !6, i64 8}
!15 = !{!"int", !7, i64 0}
!16 = !{!10, !7, i64 224}
!17 = !{!10, !11, i64 136}
!18 = !{!19, !15, i64 4}
!19 = !{!"", !15, i64 0, !15, i64 4, !15, i64 8, !15, i64 12, !15, i64 16}
!20 = !{!15, !15, i64 0}
!21 = !{!19, !15, i64 8}
!22 = !{!19, !15, i64 12}
!23 = !{!19, !15, i64 16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.CIRRUS_LOGIC_5430_MODE_DATA = type { i32, i32, i32, i32, i32 }

@.str = external hidden unnamed_addr constant [158 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [21 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local range(i64 -9223372036854775806, 1) i64 @CirrusLogic5430UgaDrawGetMode(ptr noundef %0, ptr noundef writeonly %1, ptr noundef writeonly %2, ptr noundef writeonly %3, ptr noundef writeonly %4) local_unnamed_addr #0 {
  %6 = tail call zeroext i8 @DebugAssertEnabled() #2
  %.not = icmp eq i8 %6, 0
  %.pre = ptrtoint ptr %0 to i64
  %.pre31 = add i64 %.pre, -32
  %.pre33 = inttoptr i64 %.pre31 to ptr
  br i1 %.not, label %._crit_edge, label %7

7:                                                ; preds = %5
  %8 = load i64, ptr %.pre33, align 8, !tbaa !5
  %.not29 = icmp eq i64 %8, 875908163
  br i1 %.not29, label %._crit_edge, label %9

9:                                                ; preds = %7
  tail call void @DebugAssert(ptr noundef nonnull @.str, i64 noundef 34, ptr noundef nonnull @.str.1) #2
  br label %._crit_edge

._crit_edge:                                      ; preds = %5, %7, %9
  %10 = phi ptr [ %0, %9 ], [ %.pre33, %7 ], [ %.pre33, %5 ]
  %11 = getelementptr inbounds i8, ptr %10, i64 224
  %12 = load i8, ptr %11, align 8, !tbaa !15
  %.not30 = icmp eq i8 %12, 0
  br i1 %.not30, label %13, label %32

13:                                               ; preds = %._crit_edge
  %14 = insertelement <4 x ptr> poison, ptr %1, i64 0
  %15 = insertelement <4 x ptr> %14, ptr %2, i64 1
  %16 = insertelement <4 x ptr> %15, ptr %3, i64 2
  %17 = insertelement <4 x ptr> %16, ptr %4, i64 3
  %18 = icmp eq <4 x ptr> %17, zeroinitializer
  %19 = bitcast <4 x i1> %18 to i4
  %.not35 = icmp eq i4 %19, 0
  br i1 %.not35, label %20, label %32

20:                                               ; preds = %13
  %21 = getelementptr inbounds i8, ptr %10, i64 152
  %22 = getelementptr inbounds i8, ptr %10, i64 136
  %23 = load i64, ptr %22, align 8, !tbaa !16
  %24 = getelementptr inbounds [3 x %struct.CIRRUS_LOGIC_5430_MODE_DATA], ptr %21, i64 0, i64 %23, i32 1
  %25 = load i32, ptr %24, align 4, !tbaa !17
  store i32 %25, ptr %1, align 4, !tbaa !19
  %26 = getelementptr inbounds [3 x %struct.CIRRUS_LOGIC_5430_MODE_DATA], ptr %21, i64 0, i64 %23, i32 2
  %27 = load i32, ptr %26, align 4, !tbaa !20
  store i32 %27, ptr %2, align 4, !tbaa !19
  %28 = getelementptr inbounds [3 x %struct.CIRRUS_LOGIC_5430_MODE_DATA], ptr %21, i64 0, i64 %23, i32 3
  %29 = load i32, ptr %28, align 4, !tbaa !21
  store i32 %29, ptr %3, align 4, !tbaa !19
  %30 = getelementptr inbounds [3 x %struct.CIRRUS_LOGIC_5430_MODE_DATA], ptr %21, i64 0, i64 %23, i32 4
  %31 = load i32, ptr %30, align 4, !tbaa !22
  store i32 %31, ptr %4, align 4, !tbaa !19
  br label %32

32:                                               ; preds = %13, %._crit_edge, %20
  %.0 = phi i64 [ 0, %20 ], [ -9223372036854775789, %._crit_edge ], [ -9223372036854775806, %13 ]
  ret i64 %.0
}

declare zeroext i8 @DebugAssertEnabled() local_unnamed_addr #1

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !10, i64 8, !10, i64 16, !7, i64 24, !11, i64 32, !12, i64 56, !13, i64 88, !13, i64 104, !10, i64 120, !10, i64 128, !7, i64 136, !7, i64 144, !8, i64 152, !10, i64 216, !8, i64 224}
!7 = !{!"long long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!"_EFI_UGA_DRAW_PROTOCOL", !10, i64 0, !10, i64 8, !10, i64 16}
!12 = !{!"_EFI_GRAPHICS_OUTPUT_PROTOCOL", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24}
!13 = !{!"", !14, i64 0, !10, i64 8}
!14 = !{!"int", !8, i64 0}
!15 = !{!6, !8, i64 224}
!16 = !{!6, !7, i64 136}
!17 = !{!18, !14, i64 4}
!18 = !{!"", !14, i64 0, !14, i64 4, !14, i64 8, !14, i64 12, !14, i64 16}
!19 = !{!14, !14, i64 0}
!20 = !{!18, !14, i64 8}
!21 = !{!18, !14, i64 12}
!22 = !{!18, !14, i64 16}


; Effective O3 passes: BDCEPass,EarlyCSEPass,GVNPass,GlobalDCEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,PostOrderFunctionAttrsPass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass