; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/NetworkPkg/Ip6Dxe (Ip6GetPrefix)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.EFI_IPv6_ADDRESS = type { [16 x i8] }

@.str = external hidden unnamed_addr constant [129 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [49 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare ptr @ZeroMem(ptr noundef, i64 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare zeroext i8 @DebugAssertEnabled() #1

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) #1

; Function Attrs: nounwind uwtable
define dso_local void @Ip6GetPrefix(i8 noundef zeroext %0, ptr noundef %1) #2 {
  %3 = alloca i8, align 1
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  %6 = alloca i8, align 1
  %7 = alloca i8, align 1
  %8 = alloca i8, align 1
  %9 = alloca i32, align 4
  store i8 %0, ptr %3, align 1, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !8
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #3
  br label %10

10:                                               ; preds = %2
  %11 = call zeroext i8 @DebugAssertEnabled()
  %12 = icmp ne i8 %11, 0
  br i1 %12, label %13, label %22

13:                                               ; preds = %10
  %14 = load ptr, ptr %4, align 8, !tbaa !8
  %15 = icmp ne ptr %14, null
  br i1 %15, label %16, label %20

16:                                               ; preds = %13
  %17 = load i8, ptr %3, align 1, !tbaa !5
  %18 = zext i8 %17 to i32
  %19 = icmp slt i32 %18, 129
  br i1 %19, label %21, label %20

20:                                               ; preds = %16, %13
  call void @DebugAssert(ptr noundef @.str, i64 noundef 475, ptr noundef @.str.4)
  br label %21

21:                                               ; preds = %20, %16
  br label %22

22:                                               ; preds = %21, %10
  br label %23

23:                                               ; preds = %22
  br label %24

24:                                               ; preds = %23
  %25 = load i8, ptr %3, align 1, !tbaa !5
  %26 = zext i8 %25 to i32
  %27 = icmp eq i32 %26, 0
  br i1 %27, label %28, label %31

28:                                               ; preds = %24
  %29 = load ptr, ptr %4, align 8, !tbaa !8
  %30 = call ptr @ZeroMem(ptr noundef %29, i64 noundef 16)
  store i32 1, ptr %9, align 4
  br label %93

31:                                               ; preds = %24
  %32 = load i8, ptr %3, align 1, !tbaa !5
  %33 = zext i8 %32 to i32
  %34 = icmp eq i32 %33, 128
  br i1 %34, label %35, label %36

35:                                               ; preds = %31
  store i32 1, ptr %9, align 4
  br label %93

36:                                               ; preds = %31
  %37 = load i8, ptr %3, align 1, !tbaa !5
  %38 = zext i8 %37 to i32
  %39 = sdiv i32 %38, 8
  %40 = trunc i32 %39 to i8
  store i8 %40, ptr %5, align 1, !tbaa !5
  %41 = load i8, ptr %3, align 1, !tbaa !5
  %42 = zext i8 %41 to i32
  %43 = srem i32 %42, 8
  %44 = trunc i32 %43 to i8
  store i8 %44, ptr %6, align 1, !tbaa !5
  %45 = load ptr, ptr %4, align 8, !tbaa !8
  %46 = getelementptr inbounds %struct.EFI_IPv6_ADDRESS, ptr %45, i32 0, i32 0
  %47 = load i8, ptr %5, align 1, !tbaa !5
  %48 = zext i8 %47 to i64
  %49 = getelementptr inbounds [16 x i8], ptr %46, i64 0, i64 %48
  %50 = load i8, ptr %49, align 1, !tbaa !5
  store i8 %50, ptr %8, align 1, !tbaa !5
  %51 = load i8, ptr %5, align 1, !tbaa !5
  %52 = zext i8 %51 to i32
  %53 = icmp sgt i32 %52, 0
  br i1 %53, label %54, label %71

54:                                               ; preds = %36
  %55 = load i8, ptr %5, align 1, !tbaa !5
  %56 = zext i8 %55 to i32
  %57 = icmp slt i32 %56, 16
  br i1 %57, label %58, label %71

58:                                               ; preds = %54
  %59 = load ptr, ptr %4, align 8, !tbaa !8
  %60 = getelementptr inbounds %struct.EFI_IPv6_ADDRESS, ptr %59, i32 0, i32 0
  %61 = getelementptr inbounds [16 x i8], ptr %60, i64 0, i64 0
  %62 = load i8, ptr %5, align 1, !tbaa !5
  %63 = zext i8 %62 to i32
  %64 = sext i32 %63 to i64
  %65 = getelementptr inbounds i8, ptr %61, i64 %64
  %66 = load i8, ptr %5, align 1, !tbaa !5
  %67 = zext i8 %66 to i32
  %68 = sub nsw i32 16, %67
  %69 = sext i32 %68 to i64
  %70 = call ptr @ZeroMem(ptr noundef %65, i64 noundef %69)
  br label %71

71:                                               ; preds = %58, %54, %36
  %72 = load i8, ptr %6, align 1, !tbaa !5
  %73 = zext i8 %72 to i32
  %74 = icmp sgt i32 %73, 0
  br i1 %74, label %75, label %92

75:                                               ; preds = %71
  %76 = load i8, ptr %6, align 1, !tbaa !5
  %77 = zext i8 %76 to i32
  %78 = sub nsw i32 8, %77
  %79 = shl i32 255, %78
  %80 = trunc i32 %79 to i8
  store i8 %80, ptr %7, align 1, !tbaa !5
  %81 = load i8, ptr %8, align 1, !tbaa !5
  %82 = zext i8 %81 to i32
  %83 = load i8, ptr %7, align 1, !tbaa !5
  %84 = zext i8 %83 to i32
  %85 = and i32 %82, %84
  %86 = trunc i32 %85 to i8
  %87 = load ptr, ptr %4, align 8, !tbaa !8
  %88 = getelementptr inbounds %struct.EFI_IPv6_ADDRESS, ptr %87, i32 0, i32 0
  %89 = load i8, ptr %5, align 1, !tbaa !5
  %90 = zext i8 %89 to i64
  %91 = getelementptr inbounds [16 x i8], ptr %88, i64 0, i64 %90
  store i8 %86, ptr %91, align 1, !tbaa !5
  br label %92

92:                                               ; preds = %75, %71
  store i32 0, ptr %9, align 4
  br label %93

93:                                               ; preds = %92, %35, %28
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #3
  %94 = load i32, ptr %9, align 4
  switch i32 %94, label %96 [
    i32 0, label %95
    i32 1, label %95
  ]

95:                                               ; preds = %93, %93
  ret void

96:                                               ; preds = %93
  unreachable
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"any pointer", !6, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [129 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [49 x i8], align 1

declare ptr @ZeroMem(ptr noundef, i64 noundef) local_unnamed_addr #0

declare zeroext i8 @DebugAssertEnabled() local_unnamed_addr #0

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @Ip6GetPrefix(i8 noundef zeroext %0, ptr noundef %1) local_unnamed_addr #1 {
  %3 = tail call zeroext i8 @DebugAssertEnabled() #2
  %.not = icmp eq i8 %3, 0
  br i1 %.not, label %8, label %4

4:                                                ; preds = %2
  %5 = icmp ne ptr %1, null
  %6 = icmp ult i8 %0, -127
  %or.cond = and i1 %6, %5
  br i1 %or.cond, label %8, label %7

7:                                                ; preds = %4
  tail call void @DebugAssert(ptr noundef nonnull @.str, i64 noundef 475, ptr noundef nonnull @.str.4) #2
  br label %8

8:                                                ; preds = %7, %4, %2
  switch i8 %0, label %11 [
    i8 0, label %9
    i8 -128, label %26
  ]

9:                                                ; preds = %8
  %10 = tail call ptr @ZeroMem(ptr noundef %1, i64 noundef 16) #2
  br label %26

11:                                               ; preds = %8
  %12 = lshr i8 %0, 3
  %13 = and i8 %0, 7
  %14 = zext nneg i8 %12 to i64
  %15 = getelementptr inbounds [16 x i8], ptr %1, i64 0, i64 %14
  %16 = load i8, ptr %15, align 1, !tbaa !5
  %or.cond5 = icmp sgt i8 %0, 7
  br i1 %or.cond5, label %17, label %20

17:                                               ; preds = %11
  %narrow = sub nuw nsw i8 16, %12
  %18 = zext nneg i8 %narrow to i64
  %19 = tail call ptr @ZeroMem(ptr noundef nonnull %15, i64 noundef %18) #2
  br label %20

20:                                               ; preds = %17, %11
  %.not26 = icmp eq i8 %13, 0
  br i1 %.not26, label %26, label %21

21:                                               ; preds = %20
  %narrow27 = sub nuw nsw i8 8, %13
  %22 = zext nneg i8 %narrow27 to i16
  %23 = shl nuw nsw i16 255, %22
  %24 = trunc i16 %23 to i8
  %25 = and i8 %16, %24
  store i8 %25, ptr %15, align 1, !tbaa !5
  br label %26

26:                                               ; preds = %20, %21, %8, %9
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass