; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/kernel/sc_reset.ll (ZN7sc_core8sc_reset16notify_processesEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_core::sc_reset" = type { ptr, %"class.std::vector" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<sc_core::sc_reset_target, std::allocator<sc_core::sc_reset_target>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_reset_target, std::allocator<sc_core::sc_reset_target>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_reset_target, std::allocator<sc_core::sc_reset_target>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_reset_target, std::allocator<sc_core::sc_reset_target>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_reset_target" = type { i8, i8, ptr }

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core8sc_reset16notify_processesEv(ptr noundef nonnull align 8 dereferenceable(32) %0) #0 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca i8, align 1
  %4 = alloca ptr, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i8, align 1
  store ptr %0, ptr %2, align 8, !tbaa !5
  %8 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 1, ptr %3) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #4
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #4
  %9 = getelementptr inbounds %"class.sc_core::sc_reset", ptr %8, i32 0, i32 0
  %10 = load ptr, ptr %9, align 8, !tbaa !9
  %11 = load ptr, ptr %10, align 8, !tbaa !15
  %12 = getelementptr inbounds ptr, ptr %11, i64 7
  %13 = load ptr, ptr %12, align 8
  %14 = call noundef nonnull align 1 dereferenceable(1) ptr %13(ptr noundef nonnull align 8 dereferenceable(8) %10)
  %15 = load i8, ptr %14, align 1, !tbaa !17, !range !19, !noundef !20
  %16 = trunc i8 %15 to i1
  %17 = zext i1 %16 to i8
  store i8 %17, ptr %7, align 1, !tbaa !17
  %18 = getelementptr inbounds %"class.sc_core::sc_reset", ptr %8, i32 0, i32 1
  %19 = call noundef i64 @_ZNKSt6vectorIN7sc_core15sc_reset_targetESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %18) #4
  store i64 %19, ptr %6, align 8, !tbaa !21
  store i64 0, ptr %5, align 8, !tbaa !21
  br label %20

20:                                               ; preds = %47, %1
  %21 = load i64, ptr %5, align 8, !tbaa !21
  %22 = load i64, ptr %6, align 8, !tbaa !21
  %23 = icmp ult i64 %21, %22
  br i1 %23, label %24, label %50

24:                                               ; preds = %20
  %25 = getelementptr inbounds %"class.sc_core::sc_reset", ptr %8, i32 0, i32 1
  %26 = load i64, ptr %5, align 8, !tbaa !21
  %27 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorIN7sc_core15sc_reset_targetESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %25, i64 noundef %26) #4
  store ptr %27, ptr %4, align 8, !tbaa !5
  %28 = load ptr, ptr %4, align 8, !tbaa !5
  %29 = getelementptr inbounds %"class.sc_core::sc_reset_target", ptr %28, i32 0, i32 1
  %30 = load i8, ptr %29, align 1, !tbaa !23, !range !19, !noundef !20
  %31 = trunc i8 %30 to i1
  %32 = zext i1 %31 to i32
  %33 = load i8, ptr %7, align 1, !tbaa !17, !range !19, !noundef !20
  %34 = trunc i8 %33 to i1
  %35 = zext i1 %34 to i32
  %36 = icmp eq i32 %32, %35
  %37 = zext i1 %36 to i8
  store i8 %37, ptr %3, align 1, !tbaa !17
  %38 = load ptr, ptr %4, align 8, !tbaa !5
  %39 = getelementptr inbounds %"class.sc_core::sc_reset_target", ptr %38, i32 0, i32 2
  %40 = load ptr, ptr %39, align 8, !tbaa !25
  %41 = load ptr, ptr %4, align 8, !tbaa !5
  %42 = getelementptr inbounds %"class.sc_core::sc_reset_target", ptr %41, i32 0, i32 0
  %43 = load i8, ptr %42, align 8, !tbaa !26, !range !19, !noundef !20
  %44 = trunc i8 %43 to i1
  %45 = load i8, ptr %3, align 1, !tbaa !17, !range !19, !noundef !20
  %46 = trunc i8 %45 to i1
  call void @_ZN7sc_core12sc_process_b13reset_changedEbb(ptr noundef nonnull align 8 dereferenceable(357) %40, i1 noundef zeroext %44, i1 noundef zeroext %46)
  br label %47

47:                                               ; preds = %24
  %48 = load i64, ptr %5, align 8, !tbaa !21
  %49 = add i64 %48, 1
  store i64 %49, ptr %5, align 8, !tbaa !21
  br label %20, !llvm.loop !27

50:                                               ; preds = %20
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %3) #4
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN7sc_core15sc_reset_targetESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorIN7sc_core15sc_reset_targetESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

declare void @_ZN7sc_core12sc_process_b13reset_changedEbb(ptr noundef nonnull align 8 dereferenceable(357), i1 noundef zeroext, i1 noundef zeroext) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"_ZTSN7sc_core8sc_resetE", !6, i64 0, !11, i64 8}
!11 = !{!"_ZTSSt6vectorIN7sc_core15sc_reset_targetESaIS1_EE", !12, i64 0}
!12 = !{!"_ZTSSt12_Vector_baseIN7sc_core15sc_reset_targetESaIS1_EE", !13, i64 0}
!13 = !{!"_ZTSNSt12_Vector_baseIN7sc_core15sc_reset_targetESaIS1_EE12_Vector_implE", !14, i64 0}
!14 = !{!"_ZTSNSt12_Vector_baseIN7sc_core15sc_reset_targetESaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!15 = !{!16, !16, i64 0}
!16 = !{!"vtable pointer", !8, i64 0}
!17 = !{!18, !18, i64 0}
!18 = !{!"bool", !7, i64 0}
!19 = !{i8 0, i8 2}
!20 = !{}
!21 = !{!22, !22, i64 0}
!22 = !{!"long", !7, i64 0}
!23 = !{!24, !18, i64 1}
!24 = !{!"_ZTSN7sc_core15sc_reset_targetE", !18, i64 0, !18, i64 1, !6, i64 8}
!25 = !{!24, !6, i64 8}
!26 = !{!24, !18, i64 0}
!27 = distinct !{!27, !28}
!28 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core8sc_reset16notify_processesEv(ptr noundef nonnull align 8 dereferenceable(32) %0) local_unnamed_addr #0 align 2 {
  %2 = load ptr, ptr %0, align 8, !tbaa !5
  %3 = load ptr, ptr %2, align 8, !tbaa !14
  %4 = getelementptr inbounds i8, ptr %3, i64 56
  %5 = load ptr, ptr %4, align 8
  %6 = tail call noundef nonnull align 1 dereferenceable(1) ptr %5(ptr noundef nonnull align 8 dereferenceable(8) %2)
  %7 = load i8, ptr %6, align 1, !tbaa !16, !range !18, !noundef !19
  %8 = getelementptr inbounds i8, ptr %0, i64 8
  %9 = tail call noundef i64 @_ZNKSt6vectorIN7sc_core15sc_reset_targetESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %8) #3
  %.not = icmp eq i64 %9, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %1, %.lr.ph
  %.09 = phi i64 [ %18, %.lr.ph ], [ 0, %1 ]
  %10 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorIN7sc_core15sc_reset_targetESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %8, i64 noundef %.09) #3
  %11 = getelementptr inbounds i8, ptr %10, i64 1
  %12 = load i8, ptr %11, align 1, !tbaa !20, !range !18, !noundef !19
  %13 = icmp eq i8 %12, %7
  %14 = getelementptr inbounds i8, ptr %10, i64 8
  %15 = load ptr, ptr %14, align 8, !tbaa !22
  %16 = load i8, ptr %10, align 8, !tbaa !23, !range !18, !noundef !19
  %17 = trunc nuw i8 %16 to i1
  tail call void @_ZN7sc_core12sc_process_b13reset_changedEbb(ptr noundef nonnull align 8 dereferenceable(357) %15, i1 noundef zeroext %17, i1 noundef zeroext %13)
  %18 = add nuw i64 %.09, 1
  %exitcond.not = icmp eq i64 %18, %9
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !24

._crit_edge:                                      ; preds = %.lr.ph, %1
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN7sc_core15sc_reset_targetESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorIN7sc_core15sc_reset_targetESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

declare void @_ZN7sc_core12sc_process_b13reset_changedEbb(ptr noundef nonnull align 8 dereferenceable(357), i1 noundef zeroext, i1 noundef zeroext) local_unnamed_addr #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTSN7sc_core8sc_resetE", !7, i64 0, !10, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTSSt6vectorIN7sc_core15sc_reset_targetESaIS1_EE", !11, i64 0}
!11 = !{!"_ZTSSt12_Vector_baseIN7sc_core15sc_reset_targetESaIS1_EE", !12, i64 0}
!12 = !{!"_ZTSNSt12_Vector_baseIN7sc_core15sc_reset_targetESaIS1_EE12_Vector_implE", !13, i64 0}
!13 = !{!"_ZTSNSt12_Vector_baseIN7sc_core15sc_reset_targetESaIS1_EE17_Vector_impl_dataE", !7, i64 0, !7, i64 8, !7, i64 16}
!14 = !{!15, !15, i64 0}
!15 = !{!"vtable pointer", !9, i64 0}
!16 = !{!17, !17, i64 0}
!17 = !{!"bool", !8, i64 0}
!18 = !{i8 0, i8 2}
!19 = !{}
!20 = !{!21, !17, i64 1}
!21 = !{!"_ZTSN7sc_core15sc_reset_targetE", !17, i64 0, !17, i64 1, !7, i64 8}
!22 = !{!21, !7, i64 8}
!23 = !{!21, !17, i64 0}
!24 = distinct !{!24, !25}
!25 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass