; LLVM IR from gem5/gem5 :: ext/mcpat/cacti/cacti_interface.ll (ZN9uca_org_tC2Ev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.uca_org_t = type { ptr, ptr, double, double, double, double, %class.powerDef, double, double, double, [100 x i8], double, i8, %struct.results_mem_array, %struct.results_mem_array }
%class.powerDef = type { %class.powerComponents, %class.powerComponents, %class.powerComponents }
%class.powerComponents = type { double, double, double, double, double }
%struct.results_mem_array = type { i32, i32, double, i32, i32, i32, i32, i32, i32, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double }

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN9uca_org_tC2Ev(ptr noundef nonnull align 8 dereferenceable(8200) %0) unnamed_addr #0 align 2 {
  %2 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %3 = load ptr, ptr %2, align 8
  %4 = getelementptr inbounds %class.uca_org_t, ptr %3, i32 0, i32 0
  store ptr null, ptr %4, align 8, !tbaa !9
  %5 = getelementptr inbounds %class.uca_org_t, ptr %3, i32 0, i32 1
  store ptr null, ptr %5, align 8, !tbaa !17
  %6 = getelementptr inbounds %class.uca_org_t, ptr %3, i32 0, i32 6
  call void @_ZN8powerDefC2Ev(ptr noundef nonnull align 8 dereferenceable(120) %6)
  %7 = getelementptr inbounds %class.uca_org_t, ptr %3, i32 0, i32 13
  call void @_ZN17results_mem_arrayC2Ev(ptr noundef nonnull align 8 dereferenceable(3944) %7)
  %8 = getelementptr inbounds %class.uca_org_t, ptr %3, i32 0, i32 14
  call void @_ZN17results_mem_arrayC2Ev(ptr noundef nonnull align 8 dereferenceable(3944) %8)
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN8powerDefC2Ev(ptr noundef nonnull align 8 dereferenceable(120)) unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN17results_mem_arrayC2Ev(ptr noundef nonnull align 8 dereferenceable(3944)) unnamed_addr #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"_ZTS9uca_org_t", !6, i64 0, !6, i64 8, !11, i64 16, !11, i64 24, !11, i64 32, !11, i64 40, !12, i64 48, !11, i64 168, !11, i64 176, !11, i64 184, !7, i64 192, !11, i64 296, !14, i64 304, !15, i64 312, !15, i64 4256}
!11 = !{!"double", !7, i64 0}
!12 = !{!"_ZTS8powerDef", !13, i64 0, !13, i64 40, !13, i64 80}
!13 = !{!"_ZTS15powerComponents", !11, i64 0, !11, i64 8, !11, i64 16, !11, i64 24, !11, i64 32}
!14 = !{!"bool", !7, i64 0}
!15 = !{!"_ZTS17results_mem_array", !16, i64 0, !16, i64 4, !11, i64 8, !16, i64 16, !16, i64 20, !16, i64 24, !16, i64 28, !16, i64 32, !16, i64 36, !11, i64 40, !11, i64 48, !11, i64 56, !11, i64 64, !11, i64 72, !11, i64 80, !11, i64 88, !11, i64 96, !11, i64 104, !11, i64 112, !11, i64 120, !11, i64 128, !11, i64 136, !11, i64 144, !11, i64 152, !11, i64 160, !11, i64 168, !11, i64 176, !11, i64 184, !11, i64 192, !11, i64 200, !11, i64 208, !11, i64 216, !11, i64 224, !11, i64 232, !11, i64 240, !11, i64 248, !11, i64 256, !11, i64 264, !12, i64 272, !12, i64 392, !12, i64 512, !12, i64 632, !12, i64 752, !12, i64 872, !12, i64 992, !12, i64 1112, !12, i64 1232, !12, i64 1352, !12, i64 1472, !12, i64 1592, !12, i64 1712, !12, i64 1832, !12, i64 1952, !12, i64 2072, !12, i64 2192, !12, i64 2312, !12, i64 2432, !12, i64 2552, !12, i64 2672, !12, i64 2792, !12, i64 2912, !12, i64 3032, !12, i64 3152, !12, i64 3272, !12, i64 3392, !12, i64 3512, !12, i64 3632, !11, i64 3752, !11, i64 3760, !11, i64 3768, !11, i64 3776, !11, i64 3784, !11, i64 3792, !11, i64 3800, !11, i64 3808, !11, i64 3816, !11, i64 3824, !11, i64 3832, !11, i64 3840, !11, i64 3848, !11, i64 3856, !11, i64 3864, !11, i64 3872, !11, i64 3880, !11, i64 3888, !11, i64 3896, !11, i64 3904, !11, i64 3912, !11, i64 3920, !11, i64 3928, !11, i64 3936}
!16 = !{!"int", !7, i64 0}
!17 = !{!10, !6, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN9uca_org_tC2Ev(ptr noundef nonnull align 8 dereferenceable(8200) %0) unnamed_addr #0 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 48
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %0, i8 0, i64 16, i1 false)
  tail call void @_ZN8powerDefC2Ev(ptr noundef nonnull align 8 dereferenceable(120) %2)
  %3 = getelementptr inbounds i8, ptr %0, i64 312
  tail call void @_ZN17results_mem_arrayC2Ev(ptr noundef nonnull align 8 dereferenceable(3944) %3)
  %4 = getelementptr inbounds i8, ptr %0, i64 4256
  tail call void @_ZN17results_mem_arrayC2Ev(ptr noundef nonnull align 8 dereferenceable(3944) %4)
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN8powerDefC2Ev(ptr noundef nonnull align 8 dereferenceable(120)) unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN17results_mem_arrayC2Ev(ptr noundef nonnull align 8 dereferenceable(3944)) unnamed_addr #1 align 2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,InstCombinePass,MemCpyOptPass,SROAPass,TailCallElimPass