; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/kernel (sc_reset)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_core::sc_reset_target" = type { i8, i8, ptr }
%"class.sc_core::sc_process_b" = type <{ %"class.sc_core::sc_object", ptr, i32, i32, i32, i32, i8, i8, [6 x i8], ptr, i32, [4 x i8], ptr, ptr, i8, i8, i8, i8, [4 x i8], ptr, ptr, i32, i32, %"class.std::vector.13", ptr, ptr, ptr, ptr, { i64, i64 }, i32, [4 x i8], %"class.std::vector.18", i8, [7 x i8], ptr, ptr, i32, i8, [3 x i8], ptr, i32, i8, [3 x i8] }>
%"class.sc_core::sc_object" = type { ptr, ptr, %"class.std::vector.0", %"class.std::vector.5", %"class.std::__cxx11::basic_string", ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.5" = type { %"struct.std::_Vector_base.6" }
%"struct.std::_Vector_base.6" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector.13" = type { %"struct.std::_Vector_base.14" }
%"struct.std::_Vector_base.14" = type { %"struct.std::_Vector_base<sc_core::sc_reset *, std::allocator<sc_core::sc_reset *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_reset *, std::allocator<sc_core::sc_reset *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_reset *, std::allocator<sc_core::sc_reset *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_reset *, std::allocator<sc_core::sc_reset *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.18" = type { %"struct.std::_Vector_base.19" }
%"struct.std::_Vector_base.19" = type { %"struct.std::_Vector_base<const sc_core::sc_event *, std::allocator<const sc_core::sc_event *>>::_Vector_impl" }
%"struct.std::_Vector_base<const sc_core::sc_event *, std::allocator<const sc_core::sc_event *>>::_Vector_impl" = type { %"struct.std::_Vector_base<const sc_core::sc_event *, std::allocator<const sc_core::sc_event *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<const sc_core::sc_event *, std::allocator<const sc_core::sc_event *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_reset" = type { ptr, %"class.std::vector" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<sc_core::sc_reset_target, std::allocator<sc_core::sc_reset_target>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_reset_target, std::allocator<sc_core::sc_reset_target>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_reset_target, std::allocator<sc_core::sc_reset_target>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_reset_target, std::allocator<sc_core::sc_reset_target>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@.str.1 = external hidden unnamed_addr constant [84 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [10 x i8], align 1
@_ZN7sc_core27SC_ID_UNKNOWN_PROCESS_TYPE_E = external constant [0 x i8], align 1
@__PRETTY_FUNCTION__._ZN7sc_core8sc_reset15reset_signal_isEbRKNS_15sc_signal_in_ifIbEEb = external hidden unnamed_addr constant [90 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIPN7sc_core8sc_resetESaIS2_EE9push_backERKS2_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(8)) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIN7sc_core15sc_reset_targetESaIS1_EE9push_backERKS1_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(16)) #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN7sc_core12sc_process_b18initially_in_resetEb(ptr noundef nonnull align 8 dereferenceable(357), i1 noundef zeroext) #3 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK7sc_core12sc_process_b9proc_kindEv(ptr noundef nonnull align 8 dereferenceable(357)) #3 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core8sc_reset15reset_signal_isEbRKNS_15sc_signal_in_ifIbEEb(i1 noundef zeroext %0, ptr noundef nonnull align 8 dereferenceable(8) %1, i1 noundef zeroext %2) #2 align 2 {
  %4 = alloca i8, align 1
  %5 = alloca ptr, align 8
  %6 = alloca i8, align 1
  %7 = alloca ptr, align 8
  %8 = alloca %"class.sc_core::sc_reset_target", align 8
  %9 = alloca ptr, align 8
  %10 = zext i1 %0 to i8
  store i8 %10, ptr %4, align 1, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !9
  %11 = zext i1 %2 to i8
  store i8 %11, ptr %6, align 1, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #6
  call void @llvm.lifetime.start.p0(i64 16, ptr %8) #6
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #6
  %12 = call noundef ptr @_ZN7sc_core12sc_process_b25last_created_process_baseEv()
  store ptr %12, ptr %7, align 8, !tbaa !9
  %13 = load ptr, ptr %7, align 8, !tbaa !9
  %14 = icmp ne ptr %13, null
  br i1 %14, label %15, label %16

15:                                               ; preds = %3
  br label %18

16:                                               ; preds = %3
  call void @__assert_fail(ptr noundef @.str.2, ptr noundef @.str.1, i32 noundef 349, ptr noundef @__PRETTY_FUNCTION__._ZN7sc_core8sc_reset15reset_signal_isEbRKNS_15sc_signal_in_ifIbEEb) #7
  unreachable

17:                                               ; No predecessors!
  br label %18

18:                                               ; preds = %17, %15
  %19 = load ptr, ptr %7, align 8, !tbaa !9
  %20 = getelementptr inbounds %"class.sc_core::sc_process_b", ptr %19, i32 0, i32 15
  store i8 1, ptr %20, align 1, !tbaa !11
  %21 = load ptr, ptr %7, align 8, !tbaa !9
  %22 = call noundef i32 @_ZNK7sc_core12sc_process_b9proc_kindEv(ptr noundef nonnull align 8 dereferenceable(357) %21)
  switch i32 %22, label %60 [
    i32 1, label %23
    i32 3, label %23
    i32 2, label %23
  ]

23:                                               ; preds = %18, %18, %18
  %24 = load ptr, ptr %5, align 8, !tbaa !9
  %25 = load ptr, ptr %24, align 8, !tbaa !37
  %26 = getelementptr inbounds ptr, ptr %25, i64 12
  %27 = load ptr, ptr %26, align 8
  %28 = call noundef ptr %27(ptr noundef nonnull align 8 dereferenceable(8) %24)
  store ptr %28, ptr %9, align 8, !tbaa !9
  %29 = load ptr, ptr %7, align 8, !tbaa !9
  %30 = getelementptr inbounds %"class.sc_core::sc_process_b", ptr %29, i32 0, i32 23
  call void @_ZNSt6vectorIPN7sc_core8sc_resetESaIS2_EE9push_backERKS2_(ptr noundef nonnull align 8 dereferenceable(24) %30, ptr noundef nonnull align 8 dereferenceable(8) %9)
  %31 = load i8, ptr %4, align 1, !tbaa !5, !range !39, !noundef !40
  %32 = trunc i8 %31 to i1
  %33 = getelementptr inbounds %"class.sc_core::sc_reset_target", ptr %8, i32 0, i32 0
  %34 = zext i1 %32 to i8
  store i8 %34, ptr %33, align 8, !tbaa !41
  %35 = load i8, ptr %6, align 1, !tbaa !5, !range !39, !noundef !40
  %36 = trunc i8 %35 to i1
  %37 = getelementptr inbounds %"class.sc_core::sc_reset_target", ptr %8, i32 0, i32 1
  %38 = zext i1 %36 to i8
  store i8 %38, ptr %37, align 1, !tbaa !43
  %39 = load ptr, ptr %7, align 8, !tbaa !9
  %40 = getelementptr inbounds %"class.sc_core::sc_reset_target", ptr %8, i32 0, i32 2
  store ptr %39, ptr %40, align 8, !tbaa !44
  %41 = load ptr, ptr %9, align 8, !tbaa !9
  %42 = getelementptr inbounds %"class.sc_core::sc_reset", ptr %41, i32 0, i32 1
  call void @_ZNSt6vectorIN7sc_core15sc_reset_targetESaIS1_EE9push_backERKS1_(ptr noundef nonnull align 8 dereferenceable(24) %42, ptr noundef nonnull align 8 dereferenceable(16) %8)
  %43 = load ptr, ptr %5, align 8, !tbaa !9
  %44 = load ptr, ptr %43, align 8, !tbaa !37
  %45 = getelementptr inbounds ptr, ptr %44, i64 7
  %46 = load ptr, ptr %45, align 8
  %47 = call noundef nonnull align 1 dereferenceable(1) ptr %46(ptr noundef nonnull align 8 dereferenceable(8) %43)
  %48 = load i8, ptr %47, align 1, !tbaa !5, !range !39, !noundef !40
  %49 = trunc i8 %48 to i1
  %50 = zext i1 %49 to i32
  %51 = load i8, ptr %6, align 1, !tbaa !5, !range !39, !noundef !40
  %52 = trunc i8 %51 to i1
  %53 = zext i1 %52 to i32
  %54 = icmp eq i32 %50, %53
  br i1 %54, label %55, label %59

55:                                               ; preds = %23
  %56 = load ptr, ptr %7, align 8, !tbaa !9
  %57 = load i8, ptr %4, align 1, !tbaa !5, !range !39, !noundef !40
  %58 = trunc i8 %57 to i1
  call void @_ZN7sc_core12sc_process_b18initially_in_resetEb(ptr noundef nonnull align 8 dereferenceable(357) %56, i1 noundef zeroext %58)
  br label %59

59:                                               ; preds = %55, %23
  br label %63

60:                                               ; preds = %18
  %61 = load ptr, ptr %7, align 8, !tbaa !9
  %62 = call noundef ptr @_ZNK7sc_core9sc_object4nameEv(ptr noundef nonnull align 8 dereferenceable(112) %61)
  call void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef 2, ptr noundef @_ZN7sc_core27SC_ID_UNKNOWN_PROCESS_TYPE_E, ptr noundef %62, ptr noundef @.str.1, i32 noundef 365)
  br label %63

63:                                               ; preds = %60, %59
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #6
  call void @llvm.lifetime.end.p0(i64 16, ptr %8) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #6
  ret void
}

declare void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) #4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNK7sc_core9sc_object4nameEv(ptr noundef nonnull align 8 dereferenceable(112)) #5 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN7sc_core12sc_process_b25last_created_process_baseEv() #3 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }
attributes #7 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"bool", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !6, i64 177}
!12 = !{!"_ZTSN7sc_core12sc_process_bE", !13, i64 0, !10, i64 112, !25, i64 120, !25, i64 124, !25, i64 128, !25, i64 132, !6, i64 136, !6, i64 137, !10, i64 144, !25, i64 152, !10, i64 160, !10, i64 168, !6, i64 176, !6, i64 177, !6, i64 178, !6, i64 179, !10, i64 184, !10, i64 192, !26, i64 200, !25, i64 204, !27, i64 208, !10, i64 232, !10, i64 240, !10, i64 248, !10, i64 256, !7, i64 264, !25, i64 280, !31, i64 288, !6, i64 312, !10, i64 320, !10, i64 328, !35, i64 336, !6, i64 340, !10, i64 344, !36, i64 352, !6, i64 356}
!13 = !{!"_ZTSN7sc_core9sc_objectE", !10, i64 8, !14, i64 16, !18, i64 40, !22, i64 64, !10, i64 96, !10, i64 104}
!14 = !{!"_ZTSSt6vectorIPN7sc_core8sc_eventESaIS2_EE", !15, i64 0}
!15 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE12_Vector_implE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE17_Vector_impl_dataE", !10, i64 0, !10, i64 8, !10, i64 16}
!18 = !{!"_ZTSSt6vectorIPN7sc_core9sc_objectESaIS2_EE", !19, i64 0}
!19 = !{!"_ZTSSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE12_Vector_implE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE17_Vector_impl_dataE", !10, i64 0, !10, i64 8, !10, i64 16}
!22 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !23, i64 0, !24, i64 8, !7, i64 16}
!23 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !10, i64 0}
!24 = !{!"long", !7, i64 0}
!25 = !{!"int", !7, i64 0}
!26 = !{!"_ZTSN7sc_core17sc_curr_proc_kindE", !7, i64 0}
!27 = !{!"_ZTSSt6vectorIPN7sc_core8sc_resetESaIS2_EE", !28, i64 0}
!28 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_resetESaIS2_EE", !29, i64 0}
!29 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_resetESaIS2_EE12_Vector_implE", !30, i64 0}
!30 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_resetESaIS2_EE17_Vector_impl_dataE", !10, i64 0, !10, i64 8, !10, i64 16}
!31 = !{!"_ZTSSt6vectorIPKN7sc_core8sc_eventESaIS3_EE", !32, i64 0}
!32 = !{!"_ZTSSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE", !33, i64 0}
!33 = !{!"_ZTSNSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE12_Vector_implE", !34, i64 0}
!34 = !{!"_ZTSNSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE17_Vector_impl_dataE", !10, i64 0, !10, i64 8, !10, i64 16}
!35 = !{!"_ZTSN7sc_core12sc_process_b18process_throw_typeE", !7, i64 0}
!36 = !{!"_ZTSN7sc_core12sc_process_b9trigger_tE", !7, i64 0}
!37 = !{!38, !38, i64 0}
!38 = !{!"vtable pointer", !8, i64 0}
!39 = !{i8 0, i8 2}
!40 = !{}
!41 = !{!42, !6, i64 0}
!42 = !{!"_ZTSN7sc_core15sc_reset_targetE", !6, i64 0, !6, i64 1, !10, i64 8}
!43 = !{!42, !6, i64 1}
!44 = !{!42, !10, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_core::sc_reset_target" = type { i8, i8, ptr }

@.str.1 = external hidden unnamed_addr constant [84 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [10 x i8], align 1
@_ZN7sc_core27SC_ID_UNKNOWN_PROCESS_TYPE_E = external constant [0 x i8], align 1
@__PRETTY_FUNCTION__._ZN7sc_core8sc_reset15reset_signal_isEbRKNS_15sc_signal_in_ifIbEEb = external hidden unnamed_addr constant [90 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIPN7sc_core8sc_resetESaIS2_EE9push_backERKS2_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIN7sc_core15sc_reset_targetESaIS1_EE9push_backERKS1_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN7sc_core12sc_process_b18initially_in_resetEb(ptr noundef nonnull align 8 dereferenceable(357), i1 noundef zeroext) local_unnamed_addr #3 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK7sc_core12sc_process_b9proc_kindEv(ptr noundef nonnull align 8 dereferenceable(357)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core8sc_reset15reset_signal_isEbRKNS_15sc_signal_in_ifIbEEb(i1 noundef zeroext %0, ptr noundef nonnull align 8 dereferenceable(8) %1, i1 noundef zeroext %2) local_unnamed_addr #2 align 2 {
  %4 = alloca %"class.sc_core::sc_reset_target", align 8
  %5 = alloca ptr, align 8
  %6 = zext i1 %0 to i8
  %7 = zext i1 %2 to i8
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #6
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #6
  %8 = tail call noundef ptr @_ZN7sc_core12sc_process_b25last_created_process_baseEv()
  %.not = icmp eq ptr %8, null
  br i1 %.not, label %9, label %10

9:                                                ; preds = %3
  tail call void @__assert_fail(ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.1, i32 noundef 349, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN7sc_core8sc_reset15reset_signal_isEbRKNS_15sc_signal_in_ifIbEEb) #7
  unreachable

10:                                               ; preds = %3
  %11 = getelementptr inbounds i8, ptr %8, i64 177
  store i8 1, ptr %11, align 1, !tbaa !5
  %12 = tail call noundef i32 @_ZNK7sc_core12sc_process_b9proc_kindEv(ptr noundef nonnull align 8 dereferenceable(357) %8)
  %.off = add i32 %12, -1
  %switch = icmp ult i32 %.off, 3
  br i1 %switch, label %13, label %30

13:                                               ; preds = %10
  %14 = load ptr, ptr %1, align 8, !tbaa !35
  %15 = getelementptr inbounds i8, ptr %14, i64 96
  %16 = load ptr, ptr %15, align 8
  %17 = tail call noundef ptr %16(ptr noundef nonnull align 8 dereferenceable(8) %1)
  store ptr %17, ptr %5, align 8, !tbaa !37
  %18 = getelementptr inbounds i8, ptr %8, i64 208
  call void @_ZNSt6vectorIPN7sc_core8sc_resetESaIS2_EE9push_backERKS2_(ptr noundef nonnull align 8 dereferenceable(24) %18, ptr noundef nonnull align 8 dereferenceable(8) %5)
  store i8 %6, ptr %4, align 8, !tbaa !38
  %19 = getelementptr inbounds i8, ptr %4, i64 1
  store i8 %7, ptr %19, align 1, !tbaa !40
  %20 = getelementptr inbounds i8, ptr %4, i64 8
  store ptr %8, ptr %20, align 8, !tbaa !41
  %21 = load ptr, ptr %5, align 8, !tbaa !37
  %22 = getelementptr inbounds i8, ptr %21, i64 8
  call void @_ZNSt6vectorIN7sc_core15sc_reset_targetESaIS1_EE9push_backERKS1_(ptr noundef nonnull align 8 dereferenceable(24) %22, ptr noundef nonnull align 8 dereferenceable(16) %4)
  %23 = load ptr, ptr %1, align 8, !tbaa !35
  %24 = getelementptr inbounds i8, ptr %23, i64 56
  %25 = load ptr, ptr %24, align 8
  %26 = call noundef nonnull align 1 dereferenceable(1) ptr %25(ptr noundef nonnull align 8 dereferenceable(8) %1)
  %27 = load i8, ptr %26, align 1, !tbaa !42, !range !43, !noundef !44
  %28 = icmp eq i8 %27, %7
  br i1 %28, label %29, label %32

29:                                               ; preds = %13
  call void @_ZN7sc_core12sc_process_b18initially_in_resetEb(ptr noundef nonnull align 8 dereferenceable(357) %8, i1 noundef zeroext %0)
  br label %32

30:                                               ; preds = %10
  %31 = tail call noundef ptr @_ZNK7sc_core9sc_object4nameEv(ptr noundef nonnull align 8 dereferenceable(112) %8)
  tail call void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef 2, ptr noundef nonnull @_ZN7sc_core27SC_ID_UNKNOWN_PROCESS_TYPE_E, ptr noundef %31, ptr noundef nonnull @.str.1, i32 noundef 365)
  br label %32

32:                                               ; preds = %13, %29, %30
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #6
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #6
  ret void
}

declare void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNK7sc_core9sc_object4nameEv(ptr noundef nonnull align 8 dereferenceable(112)) local_unnamed_addr #5 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN7sc_core12sc_process_b25last_created_process_baseEv() local_unnamed_addr #3 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }
attributes #7 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !23, i64 177}
!6 = !{!"_ZTSN7sc_core12sc_process_bE", !7, i64 0, !8, i64 112, !22, i64 120, !22, i64 124, !22, i64 128, !22, i64 132, !23, i64 136, !23, i64 137, !8, i64 144, !22, i64 152, !8, i64 160, !8, i64 168, !23, i64 176, !23, i64 177, !23, i64 178, !23, i64 179, !8, i64 184, !8, i64 192, !24, i64 200, !22, i64 204, !25, i64 208, !8, i64 232, !8, i64 240, !8, i64 248, !8, i64 256, !9, i64 264, !22, i64 280, !29, i64 288, !23, i64 312, !8, i64 320, !8, i64 328, !33, i64 336, !23, i64 340, !8, i64 344, !34, i64 352, !23, i64 356}
!7 = !{!"_ZTSN7sc_core9sc_objectE", !8, i64 8, !11, i64 16, !15, i64 40, !19, i64 64, !8, i64 96, !8, i64 104}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"_ZTSSt6vectorIPN7sc_core8sc_eventESaIS2_EE", !12, i64 0}
!12 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE", !13, i64 0}
!13 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE12_Vector_implE", !14, i64 0}
!14 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE17_Vector_impl_dataE", !8, i64 0, !8, i64 8, !8, i64 16}
!15 = !{!"_ZTSSt6vectorIPN7sc_core9sc_objectESaIS2_EE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE17_Vector_impl_dataE", !8, i64 0, !8, i64 8, !8, i64 16}
!19 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !20, i64 0, !21, i64 8, !9, i64 16}
!20 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !8, i64 0}
!21 = !{!"long", !9, i64 0}
!22 = !{!"int", !9, i64 0}
!23 = !{!"bool", !9, i64 0}
!24 = !{!"_ZTSN7sc_core17sc_curr_proc_kindE", !9, i64 0}
!25 = !{!"_ZTSSt6vectorIPN7sc_core8sc_resetESaIS2_EE", !26, i64 0}
!26 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_resetESaIS2_EE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_resetESaIS2_EE12_Vector_implE", !28, i64 0}
!28 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_resetESaIS2_EE17_Vector_impl_dataE", !8, i64 0, !8, i64 8, !8, i64 16}
!29 = !{!"_ZTSSt6vectorIPKN7sc_core8sc_eventESaIS3_EE", !30, i64 0}
!30 = !{!"_ZTSSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE12_Vector_implE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE17_Vector_impl_dataE", !8, i64 0, !8, i64 8, !8, i64 16}
!33 = !{!"_ZTSN7sc_core12sc_process_b18process_throw_typeE", !9, i64 0}
!34 = !{!"_ZTSN7sc_core12sc_process_b9trigger_tE", !9, i64 0}
!35 = !{!36, !36, i64 0}
!36 = !{!"vtable pointer", !10, i64 0}
!37 = !{!8, !8, i64 0}
!38 = !{!39, !23, i64 0}
!39 = !{!"_ZTSN7sc_core15sc_reset_targetE", !23, i64 0, !23, i64 1, !8, i64 8}
!40 = !{!39, !23, i64 1}
!41 = !{!39, !8, i64 8}
!42 = !{!23, !23, i64 0}
!43 = !{i8 0, i8 2}
!44 = !{}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass