; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/datatypes/int (sc_nbexterns)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_ZN5sc_dt22vec_skip_leading_zerosEiPKj(i32 noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt7vec_cmpEiPKjiS1_(i32 noundef, ptr noundef, i32 noundef, ptr noundef) #2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dt18copy_digits_signedERiiiPjiiPKj(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) #3

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) #4

; Function Attrs: nobuiltin nounwind
declare void @_ZdaPv(ptr noundef) #5

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt6sc_maxIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5sc_dt18mod_on_help_signedERiiiPjiiPKj(ptr noundef nonnull align 4 dereferenceable(4) %0, i32 noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4, i32 noundef %5, ptr noundef %6) #6 {
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca ptr, align 8
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca ptr, align 8
  store ptr %0, ptr %8, align 8, !tbaa !5
  store i32 %1, ptr %9, align 4, !tbaa !9
  store i32 %2, ptr %10, align 4, !tbaa !9
  store ptr %3, ptr %11, align 8, !tbaa !5
  store i32 %4, ptr %12, align 4, !tbaa !9
  store i32 %5, ptr %13, align 4, !tbaa !9
  store ptr %6, ptr %14, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #8
  %21 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %21, ptr %15, align 4, !tbaa !9
  %22 = load i32, ptr %10, align 4, !tbaa !9
  %23 = load ptr, ptr %11, align 8, !tbaa !5
  %24 = call noundef i32 @_ZN5sc_dt22vec_skip_leading_zerosEiPKj(i32 noundef %22, ptr noundef %23)
  store i32 %24, ptr %10, align 4, !tbaa !9
  %25 = load i32, ptr %13, align 4, !tbaa !9
  %26 = load ptr, ptr %14, align 8, !tbaa !5
  %27 = call noundef i32 @_ZN5sc_dt22vec_skip_leading_zerosEiPKj(i32 noundef %25, ptr noundef %26)
  store i32 %27, ptr %13, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #8
  %28 = load i32, ptr %10, align 4, !tbaa !9
  %29 = load ptr, ptr %11, align 8, !tbaa !5
  %30 = load i32, ptr %13, align 4, !tbaa !9
  %31 = load ptr, ptr %14, align 8, !tbaa !5
  %32 = call noundef i32 @_ZN5sc_dt7vec_cmpEiPKjiS1_(i32 noundef %28, ptr noundef %29, i32 noundef %30, ptr noundef %31)
  store i32 %32, ptr %16, align 4, !tbaa !9
  %33 = load i32, ptr %16, align 4, !tbaa !9
  %34 = icmp slt i32 %33, 0
  br i1 %34, label %35, label %36

35:                                               ; preds = %7
  store i32 1, ptr %17, align 4
  br label %128

36:                                               ; preds = %7
  %37 = load i32, ptr %16, align 4, !tbaa !9
  %38 = icmp eq i32 %37, 0
  br i1 %38, label %39, label %43

39:                                               ; preds = %36
  %40 = load ptr, ptr %8, align 8, !tbaa !5
  store i32 0, ptr %40, align 4, !tbaa !9
  %41 = load i32, ptr %15, align 4, !tbaa !9
  %42 = load ptr, ptr %11, align 8, !tbaa !5
  call void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef %41, ptr noundef %42)
  store i32 1, ptr %17, align 4
  br label %128

43:                                               ; preds = %36
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #8
  %44 = load ptr, ptr %14, align 8, !tbaa !5
  %45 = load i32, ptr %44, align 4, !tbaa !9
  store i32 %45, ptr %18, align 4, !tbaa !9
  %46 = load i32, ptr %13, align 4, !tbaa !9
  %47 = icmp eq i32 %46, 1
  br i1 %47, label %48, label %55

48:                                               ; preds = %43
  %49 = load i32, ptr %18, align 4, !tbaa !9
  %50 = icmp eq i32 %49, 1
  br i1 %50, label %51, label %55

51:                                               ; preds = %48
  %52 = load ptr, ptr %8, align 8, !tbaa !5
  store i32 0, ptr %52, align 4, !tbaa !9
  %53 = load i32, ptr %15, align 4, !tbaa !9
  %54 = load ptr, ptr %11, align 8, !tbaa !5
  call void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef %53, ptr noundef %54)
  store i32 1, ptr %17, align 4
  br label %127

55:                                               ; preds = %48, %43
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #8
  %56 = call noundef i32 @_ZN5sc_dt6sc_maxIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %10, ptr noundef nonnull align 4 dereferenceable(4) %13)
  %57 = add nsw i32 %56, 1
  store i32 %57, ptr %19, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %20) #8
  %58 = load i32, ptr %19, align 4, !tbaa !9
  %59 = sext i32 %58 to i64
  %60 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %59, i64 4)
  %61 = extractvalue { i64, i1 } %60, 1
  %62 = extractvalue { i64, i1 } %60, 0
  %63 = select i1 %61, i64 -1, i64 %62
  %64 = call noalias noundef nonnull ptr @_Znam(i64 noundef %63) #9
  store ptr %64, ptr %20, align 8, !tbaa !5
  %65 = load i32, ptr %19, align 4, !tbaa !9
  %66 = load ptr, ptr %20, align 8, !tbaa !5
  call void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef %65, ptr noundef %66)
  %67 = load i32, ptr %13, align 4, !tbaa !9
  %68 = icmp eq i32 %67, 1
  br i1 %68, label %69, label %79

69:                                               ; preds = %55
  %70 = load i32, ptr %10, align 4, !tbaa !9
  %71 = icmp eq i32 %70, 1
  br i1 %71, label %72, label %79

72:                                               ; preds = %69
  %73 = load ptr, ptr %11, align 8, !tbaa !5
  %74 = load i32, ptr %73, align 4, !tbaa !9
  %75 = load i32, ptr %18, align 4, !tbaa !9
  %76 = urem i32 %74, %75
  %77 = load ptr, ptr %20, align 8, !tbaa !5
  %78 = getelementptr inbounds i32, ptr %77, i64 0
  store i32 %76, ptr %78, align 4, !tbaa !9
  br label %79

79:                                               ; preds = %72, %69, %55
  %80 = load i32, ptr %13, align 4, !tbaa !9
  %81 = icmp eq i32 %80, 1
  br i1 %81, label %82, label %93

82:                                               ; preds = %79
  %83 = load i32, ptr %18, align 4, !tbaa !9
  %84 = zext i32 %83 to i64
  %85 = icmp ult i64 %84, 32768
  br i1 %85, label %86, label %93

86:                                               ; preds = %82
  %87 = load i32, ptr %10, align 4, !tbaa !9
  %88 = load ptr, ptr %11, align 8, !tbaa !5
  %89 = load i32, ptr %18, align 4, !tbaa !9
  %90 = call noundef i32 @_ZN5sc_dt13vec_rem_smallEiPKjj(i32 noundef %87, ptr noundef %88, i32 noundef %89)
  %91 = load ptr, ptr %20, align 8, !tbaa !5
  %92 = getelementptr inbounds i32, ptr %91, i64 0
  store i32 %90, ptr %92, align 4, !tbaa !9
  br label %99

93:                                               ; preds = %82, %79
  %94 = load i32, ptr %10, align 4, !tbaa !9
  %95 = load ptr, ptr %11, align 8, !tbaa !5
  %96 = load i32, ptr %13, align 4, !tbaa !9
  %97 = load ptr, ptr %14, align 8, !tbaa !5
  %98 = load ptr, ptr %20, align 8, !tbaa !5
  call void @_ZN5sc_dt13vec_rem_largeEiPKjiS1_Pj(i32 noundef %94, ptr noundef %95, i32 noundef %96, ptr noundef %97, ptr noundef %98)
  br label %99

99:                                               ; preds = %93, %86
  %100 = load ptr, ptr %8, align 8, !tbaa !5
  %101 = load i32, ptr %100, align 4, !tbaa !9
  %102 = load i32, ptr %19, align 4, !tbaa !9
  %103 = sub nsw i32 %102, 1
  %104 = load ptr, ptr %20, align 8, !tbaa !5
  %105 = call noundef i32 @_ZN5sc_dt14check_for_zeroEiiPKj(i32 noundef %101, i32 noundef %103, ptr noundef %104)
  %106 = load ptr, ptr %8, align 8, !tbaa !5
  store i32 %105, ptr %106, align 4, !tbaa !9
  %107 = load ptr, ptr %8, align 8, !tbaa !5
  %108 = load i32, ptr %107, align 4, !tbaa !9
  %109 = icmp eq i32 %108, 0
  br i1 %109, label %110, label %113

110:                                              ; preds = %99
  %111 = load i32, ptr %15, align 4, !tbaa !9
  %112 = load ptr, ptr %11, align 8, !tbaa !5
  call void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef %111, ptr noundef %112)
  br label %122

113:                                              ; preds = %99
  %114 = load ptr, ptr %8, align 8, !tbaa !5
  %115 = load i32, ptr %9, align 4, !tbaa !9
  %116 = load i32, ptr %15, align 4, !tbaa !9
  %117 = load ptr, ptr %11, align 8, !tbaa !5
  %118 = call noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %9, ptr noundef nonnull align 4 dereferenceable(4) %13)
  %119 = load i32, ptr %19, align 4, !tbaa !9
  %120 = sub nsw i32 %119, 1
  %121 = load ptr, ptr %20, align 8, !tbaa !5
  call void @_ZN5sc_dt18copy_digits_signedERiiiPjiiPKj(ptr noundef nonnull align 4 dereferenceable(4) %114, i32 noundef %115, i32 noundef %116, ptr noundef %117, i32 noundef %118, i32 noundef %120, ptr noundef %121)
  br label %122

122:                                              ; preds = %113, %110
  %123 = load ptr, ptr %20, align 8, !tbaa !5
  %124 = icmp eq ptr %123, null
  br i1 %124, label %126, label %125

125:                                              ; preds = %122
  call void @_ZdaPv(ptr noundef %123) #10
  br label %126

126:                                              ; preds = %125, %122
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #8
  store i32 0, ptr %17, align 4
  br label %127

127:                                              ; preds = %126, %51
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #8
  br label %128

128:                                              ; preds = %127, %39, %35
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #8
  %129 = load i32, ptr %17, align 4
  switch i32 %129, label %131 [
    i32 0, label %130
    i32 1, label %130
  ]

130:                                              ; preds = %128, %128
  ret void

131:                                              ; preds = %128
  unreachable
}

declare noundef i32 @_ZN5sc_dt13vec_rem_smallEiPKjj(i32 noundef, ptr noundef, i32 noundef) #7

declare void @_ZN5sc_dt13vec_rem_largeEiPKjiS1_Pj(i32 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) #7

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt14check_for_zeroEiiPKj(i32 noundef, i32 noundef, ptr noundef) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2

attributes #0 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { nounwind }
attributes #9 = { builtin allocsize(0) }
attributes #10 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_ZN5sc_dt22vec_skip_leading_zerosEiPKj(i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt7vec_cmpEiPKjiS1_(i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dt18copy_digits_signedERiiiPjiiPKj(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) local_unnamed_addr #2

; Function Attrs: nobuiltin nounwind
declare void @_ZdaPv(ptr noundef) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt6sc_maxIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5sc_dt18mod_on_help_signedERiiiPjiiPKj(ptr noundef nonnull align 4 dereferenceable(4) %0, i32 noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4, i32 noundef %5, ptr noundef %6) local_unnamed_addr #4 {
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store i32 %1, ptr %8, align 4, !tbaa !5
  %11 = tail call noundef i32 @_ZN5sc_dt22vec_skip_leading_zerosEiPKj(i32 noundef %2, ptr noundef %3)
  store i32 %11, ptr %9, align 4, !tbaa !5
  %12 = tail call noundef i32 @_ZN5sc_dt22vec_skip_leading_zerosEiPKj(i32 noundef %5, ptr noundef %6)
  store i32 %12, ptr %10, align 4, !tbaa !5
  %13 = tail call noundef i32 @_ZN5sc_dt7vec_cmpEiPKjiS1_(i32 noundef %11, ptr noundef %3, i32 noundef %12, ptr noundef %6)
  %14 = icmp slt i32 %13, 0
  br i1 %14, label %51, label %15

15:                                               ; preds = %7
  %16 = icmp eq i32 %13, 0
  br i1 %16, label %17, label %18

17:                                               ; preds = %15
  store i32 0, ptr %0, align 4, !tbaa !5
  tail call void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef %2, ptr noundef %3)
  br label %51

18:                                               ; preds = %15
  %19 = load i32, ptr %6, align 4, !tbaa !5
  %20 = icmp eq i32 %12, 1
  %21 = icmp eq i32 %19, 1
  %or.cond = select i1 %20, i1 %21, i1 false
  br i1 %or.cond, label %22, label %23

22:                                               ; preds = %18
  store i32 0, ptr %0, align 4, !tbaa !5
  tail call void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef %2, ptr noundef %3)
  br label %51

23:                                               ; preds = %18
  %24 = call noundef i32 @_ZN5sc_dt6sc_maxIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %9, ptr noundef nonnull align 4 dereferenceable(4) %10)
  %25 = add nsw i32 %24, 1
  %26 = zext nneg i32 %25 to i64
  %27 = icmp slt i32 %24, -1
  %28 = shl nuw nsw i64 %26, 2
  %29 = select i1 %27, i64 -1, i64 %28
  %30 = call noalias noundef nonnull ptr @_Znam(i64 noundef %29) #6
  call void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef %25, ptr noundef nonnull %30)
  %31 = load i32, ptr %10, align 4, !tbaa !5
  %32 = icmp eq i32 %31, 1
  %33 = load i32, ptr %9, align 4
  %34 = icmp eq i32 %33, 1
  %or.cond3 = select i1 %32, i1 %34, i1 false
  br i1 %or.cond3, label %35, label %38

35:                                               ; preds = %23
  %36 = load i32, ptr %3, align 4, !tbaa !5
  %37 = urem i32 %36, %19
  store i32 %37, ptr %30, align 4, !tbaa !5
  br label %38

38:                                               ; preds = %35, %23
  %39 = icmp ult i32 %19, 32768
  %or.cond6 = select i1 %32, i1 %39, i1 false
  br i1 %or.cond6, label %40, label %42

40:                                               ; preds = %38
  %41 = call noundef i32 @_ZN5sc_dt13vec_rem_smallEiPKjj(i32 noundef %33, ptr noundef %3, i32 noundef %19)
  store i32 %41, ptr %30, align 4, !tbaa !5
  br label %43

42:                                               ; preds = %38
  call void @_ZN5sc_dt13vec_rem_largeEiPKjiS1_Pj(i32 noundef %33, ptr noundef %3, i32 noundef %31, ptr noundef nonnull %6, ptr noundef nonnull %30)
  br label %43

43:                                               ; preds = %42, %40
  %44 = load i32, ptr %0, align 4, !tbaa !5
  %45 = call noundef i32 @_ZN5sc_dt14check_for_zeroEiiPKj(i32 noundef %44, i32 noundef %24, ptr noundef nonnull %30)
  store i32 %45, ptr %0, align 4, !tbaa !5
  %46 = icmp eq i32 %45, 0
  br i1 %46, label %47, label %48

47:                                               ; preds = %43
  call void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef %2, ptr noundef %3)
  br label %50

48:                                               ; preds = %43
  %49 = call noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %8, ptr noundef nonnull align 4 dereferenceable(4) %10)
  call void @_ZN5sc_dt18copy_digits_signedERiiiPjiiPKj(ptr noundef nonnull align 4 dereferenceable(4) %0, i32 noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %49, i32 noundef %24, ptr noundef nonnull %30)
  br label %50

50:                                               ; preds = %47, %48
  call void @_ZdaPv(ptr noundef nonnull %30) #7
  br label %51

51:                                               ; preds = %22, %50, %7, %17
  ret void
}

declare noundef i32 @_ZN5sc_dt13vec_rem_smallEiPKjj(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #5

declare void @_ZN5sc_dt13vec_rem_largeEiPKjiS1_Pj(i32 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #5

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt14check_for_zeroEiiPKj(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

attributes #0 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { builtin allocsize(0) }
attributes #7 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass