; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Universal (GetStorageWidth)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local zeroext i16 @GetStorageWidth(i8 noundef zeroext %0) #1 {
  %2 = alloca i8, align 1
  %3 = alloca i16, align 2
  store i8 %0, ptr %2, align 1, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %3) #2
  %4 = load i8, ptr %2, align 1, !tbaa !5
  %5 = zext i8 %4 to i32
  switch i32 %5, label %12 [
    i32 0, label %6
    i32 4, label %6
    i32 1, label %7
    i32 2, label %8
    i32 3, label %9
    i32 5, label %10
    i32 6, label %11
  ]

6:                                                ; preds = %1, %1
  store i16 1, ptr %3, align 2, !tbaa !8
  br label %13

7:                                                ; preds = %1
  store i16 2, ptr %3, align 2, !tbaa !8
  br label %13

8:                                                ; preds = %1
  store i16 4, ptr %3, align 2, !tbaa !8
  br label %13

9:                                                ; preds = %1
  store i16 8, ptr %3, align 2, !tbaa !8
  br label %13

10:                                               ; preds = %1
  store i16 14, ptr %3, align 2, !tbaa !8
  br label %13

11:                                               ; preds = %1
  store i16 14, ptr %3, align 2, !tbaa !8
  br label %13

12:                                               ; preds = %1
  store i16 0, ptr %3, align 2, !tbaa !8
  br label %13

13:                                               ; preds = %12, %11, %10, %9, %8, %7, %6
  %14 = load i16, ptr %3, align 2, !tbaa !8
  call void @llvm.lifetime.end.p0(i64 2, ptr %3) #2
  ret i16 %14
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"short", !6, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@switch.table.GetStorageWidth = private unnamed_addr constant [7 x i16] [i16 1, i16 2, i16 4, i16 8, i16 1, i16 14, i16 14], align 2

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local zeroext range(i16 0, 15) i16 @GetStorageWidth(i8 noundef zeroext %0) local_unnamed_addr #0 {
  %2 = icmp ult i8 %0, 7
  br i1 %2, label %switch.lookup, label %4

switch.lookup:                                    ; preds = %1
  %3 = zext nneg i8 %0 to i64
  %switch.gep = getelementptr inbounds [7 x i16], ptr @switch.table.GetStorageWidth, i64 0, i64 %3
  %switch.load = load i16, ptr %switch.gep, align 2
  br label %4

4:                                                ; preds = %1, %switch.lookup
  %.0 = phi i16 [ %switch.load, %switch.lookup ], [ 0, %1 ]
  ret i16 %.0
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass