; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/kernel (sc_process)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_core::sc_process_b" = type <{ %"class.sc_core::sc_object", ptr, i32, i32, i32, i32, i8, i8, [6 x i8], ptr, i32, [4 x i8], ptr, ptr, i8, i8, i8, i8, [4 x i8], ptr, ptr, i32, i32, %"class.std::vector.18", ptr, ptr, ptr, ptr, { i64, i64 }, i32, [4 x i8], %"class.std::vector.23", i8, [7 x i8], ptr, ptr, i32, i8, [3 x i8], ptr, i32, i8, [3 x i8] }>
%"class.sc_core::sc_object" = type { ptr, ptr, %"class.std::vector", %"class.std::vector.0", %"class.std::__cxx11::basic_string", ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector.18" = type { %"struct.std::_Vector_base.19" }
%"struct.std::_Vector_base.19" = type { %"struct.std::_Vector_base<sc_core::sc_reset *, std::allocator<sc_core::sc_reset *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_reset *, std::allocator<sc_core::sc_reset *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_reset *, std::allocator<sc_core::sc_reset *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_reset *, std::allocator<sc_core::sc_reset *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.23" = type { %"struct.std::_Vector_base.24" }
%"struct.std::_Vector_base.24" = type { %"struct.std::_Vector_base<const sc_core::sc_event *, std::allocator<const sc_core::sc_event *>>::_Vector_impl" }
%"struct.std::_Vector_base<const sc_core::sc_event *, std::allocator<const sc_core::sc_event *>>::_Vector_impl" = type { %"struct.std::_Vector_base<const sc_core::sc_event *, std::allocator<const sc_core::sc_event *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<const sc_core::sc_event *, std::allocator<const sc_core::sc_event *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@.str.4 = external hidden unnamed_addr constant [6 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [86 x i8], align 1
@__PRETTY_FUNCTION__._ZN7sc_core12sc_process_b16add_static_eventERKNS_8sc_eventE = external hidden unnamed_addr constant [63 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core12sc_process_b16add_static_eventERKNS_8sc_eventE(ptr noundef nonnull align 8 dereferenceable(357) %0, ptr noundef nonnull align 8 dereferenceable(160) %1) #0 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %10 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  %11 = getelementptr inbounds %"class.sc_core::sc_process_b", ptr %10, i32 0, i32 31
  %12 = call noundef i64 @_ZNKSt6vectorIPKN7sc_core8sc_eventESaIS3_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %11) #5
  %13 = sub i64 %12, 1
  %14 = trunc i64 %13 to i32
  store i32 %14, ptr %7, align 4, !tbaa !9
  br label %15

15:                                               ; preds = %29, %2
  %16 = load i32, ptr %7, align 4, !tbaa !9
  %17 = icmp sge i32 %16, 0
  br i1 %17, label %19, label %18

18:                                               ; preds = %15
  store i32 2, ptr %8, align 4
  br label %32

19:                                               ; preds = %15
  %20 = load ptr, ptr %4, align 8, !tbaa !5
  %21 = getelementptr inbounds %"class.sc_core::sc_process_b", ptr %10, i32 0, i32 31
  %22 = load i32, ptr %7, align 4, !tbaa !9
  %23 = sext i32 %22 to i64
  %24 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPKN7sc_core8sc_eventESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %21, i64 noundef %23) #5
  %25 = load ptr, ptr %24, align 8, !tbaa !5
  %26 = icmp eq ptr %20, %25
  br i1 %26, label %27, label %28

27:                                               ; preds = %19
  store i32 1, ptr %8, align 4
  br label %32

28:                                               ; preds = %19
  br label %29

29:                                               ; preds = %28
  %30 = load i32, ptr %7, align 4, !tbaa !9
  %31 = add nsw i32 %30, -1
  store i32 %31, ptr %7, align 4, !tbaa !9
  br label %15, !llvm.loop !11

32:                                               ; preds = %27, %18
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  %33 = load i32, ptr %8, align 4
  switch i32 %33, label %47 [
    i32 2, label %34
  ]

34:                                               ; preds = %32
  %35 = getelementptr inbounds %"class.sc_core::sc_process_b", ptr %10, i32 0, i32 31
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #5
  %36 = load ptr, ptr %4, align 8, !tbaa !5
  store ptr %36, ptr %9, align 8, !tbaa !5
  call void @_ZNSt6vectorIPKN7sc_core8sc_eventESaIS3_EE9push_backEOS3_(ptr noundef nonnull align 8 dereferenceable(24) %35, ptr noundef nonnull align 8 dereferenceable(8) %9)
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #5
  %37 = getelementptr inbounds %"class.sc_core::sc_process_b", ptr %10, i32 0, i32 21
  %38 = load i32, ptr %37, align 8, !tbaa !13
  switch i32 %38, label %45 [
    i32 2, label %39
    i32 3, label %39
    i32 1, label %42
  ]

39:                                               ; preds = %34, %34
  store ptr %10, ptr %6, align 8, !tbaa !5
  %40 = load ptr, ptr %4, align 8, !tbaa !5
  %41 = load ptr, ptr %6, align 8, !tbaa !5
  call void @_ZNK7sc_core8sc_event10add_staticEPNS_17sc_thread_processE(ptr noundef nonnull align 8 dereferenceable(160) %40, ptr noundef %41)
  br label %46

42:                                               ; preds = %34
  store ptr %10, ptr %5, align 8, !tbaa !5
  %43 = load ptr, ptr %4, align 8, !tbaa !5
  %44 = load ptr, ptr %5, align 8, !tbaa !5
  call void @_ZNK7sc_core8sc_event10add_staticEPNS_17sc_method_processE(ptr noundef nonnull align 8 dereferenceable(160) %43, ptr noundef %44)
  br label %46

45:                                               ; preds = %34
  call void @__assert_fail(ptr noundef @.str.4, ptr noundef @.str.5, i32 noundef 92, ptr noundef @__PRETTY_FUNCTION__._ZN7sc_core12sc_process_b16add_static_eventERKNS_8sc_eventE) #6
  unreachable

46:                                               ; preds = %42, %39
  store i32 0, ptr %8, align 4
  br label %47

47:                                               ; preds = %46, %32
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #5
  %48 = load i32, ptr %8, align 4
  switch i32 %48, label %50 [
    i32 0, label %49
    i32 1, label %49
  ]

49:                                               ; preds = %47, %47
  ret void

50:                                               ; preds = %47
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIPKN7sc_core8sc_eventESaIS3_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPKN7sc_core8sc_eventESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIPKN7sc_core8sc_eventESaIS3_EE9push_backEOS3_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(8)) #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZNK7sc_core8sc_event10add_staticEPNS_17sc_thread_processE(ptr noundef nonnull align 8 dereferenceable(160), ptr noundef) #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZNK7sc_core8sc_event10add_staticEPNS_17sc_method_processE(ptr noundef nonnull align 8 dereferenceable(160), ptr noundef) #3 align 2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #4

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!14, !28, i64 200}
!14 = !{!"_ZTSN7sc_core12sc_process_bE", !15, i64 0, !6, i64 112, !10, i64 120, !10, i64 124, !10, i64 128, !10, i64 132, !27, i64 136, !27, i64 137, !6, i64 144, !10, i64 152, !6, i64 160, !6, i64 168, !27, i64 176, !27, i64 177, !27, i64 178, !27, i64 179, !6, i64 184, !6, i64 192, !28, i64 200, !10, i64 204, !29, i64 208, !6, i64 232, !6, i64 240, !6, i64 248, !6, i64 256, !7, i64 264, !10, i64 280, !33, i64 288, !27, i64 312, !6, i64 320, !6, i64 328, !37, i64 336, !27, i64 340, !6, i64 344, !38, i64 352, !27, i64 356}
!15 = !{!"_ZTSN7sc_core9sc_objectE", !6, i64 8, !16, i64 16, !20, i64 40, !24, i64 64, !6, i64 96, !6, i64 104}
!16 = !{!"_ZTSSt6vectorIPN7sc_core8sc_eventESaIS2_EE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!20 = !{!"_ZTSSt6vectorIPN7sc_core9sc_objectESaIS2_EE", !21, i64 0}
!21 = !{!"_ZTSSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE12_Vector_implE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!24 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !25, i64 0, !26, i64 8, !7, i64 16}
!25 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!26 = !{!"long", !7, i64 0}
!27 = !{!"bool", !7, i64 0}
!28 = !{!"_ZTSN7sc_core17sc_curr_proc_kindE", !7, i64 0}
!29 = !{!"_ZTSSt6vectorIPN7sc_core8sc_resetESaIS2_EE", !30, i64 0}
!30 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_resetESaIS2_EE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_resetESaIS2_EE12_Vector_implE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_resetESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!33 = !{!"_ZTSSt6vectorIPKN7sc_core8sc_eventESaIS3_EE", !34, i64 0}
!34 = !{!"_ZTSSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE", !35, i64 0}
!35 = !{!"_ZTSNSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE12_Vector_implE", !36, i64 0}
!36 = !{!"_ZTSNSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!37 = !{!"_ZTSN7sc_core12sc_process_b18process_throw_typeE", !7, i64 0}
!38 = !{!"_ZTSN7sc_core12sc_process_b9trigger_tE", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.4 = external hidden unnamed_addr constant [6 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [86 x i8], align 1
@__PRETTY_FUNCTION__._ZN7sc_core12sc_process_b16add_static_eventERKNS_8sc_eventE = external hidden unnamed_addr constant [63 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core12sc_process_b16add_static_eventERKNS_8sc_eventE(ptr noundef nonnull align 8 dereferenceable(357) %0, ptr noundef nonnull align 8 dereferenceable(160) %1) local_unnamed_addr #0 align 2 {
  %3 = alloca ptr, align 8
  %4 = getelementptr inbounds i8, ptr %0, i64 288
  %5 = tail call noundef i64 @_ZNKSt6vectorIPKN7sc_core8sc_eventESaIS3_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %4) #5
  %6 = and i64 %5, 4294967295
  br label %7

7:                                                ; preds = %9, %2
  %indvars.iv = phi i64 [ %indvars.iv.next, %9 ], [ %6, %2 ]
  %indvars.iv.next = add nsw i64 %indvars.iv, -1
  %8 = and i64 %indvars.iv.next, 2147483648
  %.not = icmp eq i64 %8, 0
  br i1 %.not, label %9, label %.critedge

9:                                                ; preds = %7
  %10 = and i64 %indvars.iv.next, 2147483647
  %11 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPKN7sc_core8sc_eventESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %10) #5
  %12 = load ptr, ptr %11, align 8, !tbaa !5
  %13 = icmp eq ptr %12, %1
  br i1 %13, label %.loopexit, label %7, !llvm.loop !9

.critedge:                                        ; preds = %7
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #5
  store ptr %1, ptr %3, align 8, !tbaa !5
  call void @_ZNSt6vectorIPKN7sc_core8sc_eventESaIS3_EE9push_backEOS3_(ptr noundef nonnull align 8 dereferenceable(24) %4, ptr noundef nonnull align 8 dereferenceable(8) %3)
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #5
  %14 = getelementptr inbounds i8, ptr %0, i64 200
  %15 = load i32, ptr %14, align 8, !tbaa !11
  switch i32 %15, label %18 [
    i32 2, label %16
    i32 3, label %16
    i32 1, label %17
  ]

16:                                               ; preds = %.critedge, %.critedge
  call void @_ZNK7sc_core8sc_event10add_staticEPNS_17sc_thread_processE(ptr noundef nonnull align 8 dereferenceable(160) %1, ptr noundef nonnull %0)
  br label %.loopexit

17:                                               ; preds = %.critedge
  call void @_ZNK7sc_core8sc_event10add_staticEPNS_17sc_method_processE(ptr noundef nonnull align 8 dereferenceable(160) %1, ptr noundef nonnull %0)
  br label %.loopexit

18:                                               ; preds = %.critedge
  call void @__assert_fail(ptr noundef nonnull @.str.4, ptr noundef nonnull @.str.5, i32 noundef 92, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN7sc_core12sc_process_b16add_static_eventERKNS_8sc_eventE) #6
  unreachable

.loopexit:                                        ; preds = %9, %16, %17
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIPKN7sc_core8sc_eventESaIS3_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPKN7sc_core8sc_eventESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIPKN7sc_core8sc_eventESaIS3_EE9push_backEOS3_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZNK7sc_core8sc_event10add_staticEPNS_17sc_thread_processE(ptr noundef nonnull align 8 dereferenceable(160), ptr noundef) local_unnamed_addr #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZNK7sc_core8sc_event10add_staticEPNS_17sc_method_processE(ptr noundef nonnull align 8 dereferenceable(160), ptr noundef) local_unnamed_addr #3 align 2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #4

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !27, i64 200}
!12 = !{!"_ZTSN7sc_core12sc_process_bE", !13, i64 0, !6, i64 112, !25, i64 120, !25, i64 124, !25, i64 128, !25, i64 132, !26, i64 136, !26, i64 137, !6, i64 144, !25, i64 152, !6, i64 160, !6, i64 168, !26, i64 176, !26, i64 177, !26, i64 178, !26, i64 179, !6, i64 184, !6, i64 192, !27, i64 200, !25, i64 204, !28, i64 208, !6, i64 232, !6, i64 240, !6, i64 248, !6, i64 256, !7, i64 264, !25, i64 280, !32, i64 288, !26, i64 312, !6, i64 320, !6, i64 328, !36, i64 336, !26, i64 340, !6, i64 344, !37, i64 352, !26, i64 356}
!13 = !{!"_ZTSN7sc_core9sc_objectE", !6, i64 8, !14, i64 16, !18, i64 40, !22, i64 64, !6, i64 96, !6, i64 104}
!14 = !{!"_ZTSSt6vectorIPN7sc_core8sc_eventESaIS2_EE", !15, i64 0}
!15 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE12_Vector_implE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!18 = !{!"_ZTSSt6vectorIPN7sc_core9sc_objectESaIS2_EE", !19, i64 0}
!19 = !{!"_ZTSSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE12_Vector_implE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!22 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !23, i64 0, !24, i64 8, !7, i64 16}
!23 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!24 = !{!"long", !7, i64 0}
!25 = !{!"int", !7, i64 0}
!26 = !{!"bool", !7, i64 0}
!27 = !{!"_ZTSN7sc_core17sc_curr_proc_kindE", !7, i64 0}
!28 = !{!"_ZTSSt6vectorIPN7sc_core8sc_resetESaIS2_EE", !29, i64 0}
!29 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_resetESaIS2_EE", !30, i64 0}
!30 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_resetESaIS2_EE12_Vector_implE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_resetESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!32 = !{!"_ZTSSt6vectorIPKN7sc_core8sc_eventESaIS3_EE", !33, i64 0}
!33 = !{!"_ZTSSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE", !34, i64 0}
!34 = !{!"_ZTSNSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE12_Vector_implE", !35, i64 0}
!35 = !{!"_ZTSNSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!36 = !{!"_ZTSN7sc_core12sc_process_b18process_throw_typeE", !7, i64 0}
!37 = !{!"_ZTSN7sc_core12sc_process_b9trigger_tE", !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass