; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/OptionRomPkg (InitializeChip)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.s_data_instance = type { i16, i16, i8, i8, i16, i16, i16, i16, i16, [32 x i8], [32 x i8], [32 x i8], [64 x i32], [128 x i32], i32, i32, i16, i16, i8, i8, i8, i8, i16, i16, i16, i16, i32, i32, i16, i16, [2 x i16], i8, i8, i16, i32, ptr, ptr, ptr, ptr, ptr, ptr, i64, i64, i64, i64, i64, [64 x i64], i16, i16, i16, i16, i8, i8, i8, i8, i8, [3 x i8], %struct.mc, i64, ptr, i64, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr }
%struct.mc = type { [3 x i16], i16, [8 x [32 x i8]] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local void @OutWord(ptr noundef, i16 noundef zeroext, i32 noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @Load_Base_Regs(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @Configure(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @E100bSetupIAAddr(ptr noundef) #1

; Function Attrs: nounwind uwtable
define dso_local zeroext i16 @InitializeChip(ptr noundef %0) #1 {
  %2 = alloca i16, align 2
  %3 = alloca ptr, align 8
  %4 = alloca i16, align 2
  %5 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %4) #2
  %6 = load ptr, ptr %3, align 8, !tbaa !5
  %7 = call signext i8 @SoftwareReset(ptr noundef %6)
  %8 = sext i8 %7 to i32
  %9 = icmp ne i32 %8, 0
  br i1 %9, label %10, label %11

10:                                               ; preds = %1
  store i16 10, ptr %2, align 2
  store i32 1, ptr %5, align 4
  br label %71

11:                                               ; preds = %1
  %12 = load ptr, ptr %3, align 8, !tbaa !5
  %13 = load ptr, ptr %3, align 8, !tbaa !5
  %14 = getelementptr inbounds %struct.s_data_instance, ptr %13, i32 0, i32 14
  %15 = load i32, ptr %14, align 8, !tbaa !9
  %16 = add i32 %15, 2
  call void @OutWord(ptr noundef %12, i16 noundef zeroext 256, i32 noundef %16)
  %17 = load ptr, ptr %3, align 8, !tbaa !5
  %18 = call zeroext i8 @Load_Base_Regs(ptr noundef %17)
  %19 = zext i8 %18 to i16
  store i16 %19, ptr %4, align 2, !tbaa !15
  %20 = zext i16 %19 to i32
  %21 = icmp ne i32 %20, 0
  br i1 %21, label %22, label %24

22:                                               ; preds = %11
  %23 = load i16, ptr %4, align 2, !tbaa !15
  store i16 %23, ptr %2, align 2
  store i32 1, ptr %5, align 4
  br label %71

24:                                               ; preds = %11
  %25 = load ptr, ptr %3, align 8, !tbaa !5
  %26 = call zeroext i8 @SetupCBlink(ptr noundef %25)
  %27 = zext i8 %26 to i16
  store i16 %27, ptr %4, align 2, !tbaa !15
  %28 = zext i16 %27 to i32
  %29 = icmp ne i32 %28, 0
  br i1 %29, label %30, label %32

30:                                               ; preds = %24
  %31 = load i16, ptr %4, align 2, !tbaa !15
  store i16 %31, ptr %2, align 2
  store i32 1, ptr %5, align 4
  br label %71

32:                                               ; preds = %24
  %33 = load ptr, ptr %3, align 8, !tbaa !5
  %34 = call zeroext i8 @SetupReceiveQueues(ptr noundef %33)
  %35 = zext i8 %34 to i16
  store i16 %35, ptr %4, align 2, !tbaa !15
  %36 = zext i16 %35 to i32
  %37 = icmp ne i32 %36, 0
  br i1 %37, label %38, label %40

38:                                               ; preds = %32
  %39 = load i16, ptr %4, align 2, !tbaa !15
  store i16 %39, ptr %2, align 2
  store i32 1, ptr %5, align 4
  br label %71

40:                                               ; preds = %32
  %41 = load ptr, ptr %3, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.s_data_instance, ptr %41, i32 0, i32 31
  store i8 -1, ptr %42, align 8, !tbaa !16
  %43 = load ptr, ptr %3, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.s_data_instance, ptr %43, i32 0, i32 20
  %45 = load i8, ptr %44, align 2, !tbaa !17
  %46 = zext i8 %45 to i32
  %47 = icmp ne i32 %46, 0
  br i1 %47, label %48, label %54

48:                                               ; preds = %40
  %49 = load ptr, ptr %3, align 8, !tbaa !5
  %50 = call zeroext i8 @PhyDetect(ptr noundef %49)
  %51 = icmp ne i8 %50, 0
  br i1 %51, label %53, label %52

52:                                               ; preds = %48
  store i16 10, ptr %2, align 2
  store i32 1, ptr %5, align 4
  br label %71

53:                                               ; preds = %48
  br label %54

54:                                               ; preds = %53, %40
  %55 = load ptr, ptr %3, align 8, !tbaa !5
  %56 = call zeroext i8 @E100bSetupIAAddr(ptr noundef %55)
  %57 = zext i8 %56 to i16
  store i16 %57, ptr %4, align 2, !tbaa !15
  %58 = zext i16 %57 to i32
  %59 = icmp ne i32 %58, 0
  br i1 %59, label %60, label %62

60:                                               ; preds = %54
  %61 = load i16, ptr %4, align 2, !tbaa !15
  store i16 %61, ptr %2, align 2
  store i32 1, ptr %5, align 4
  br label %71

62:                                               ; preds = %54
  %63 = load ptr, ptr %3, align 8, !tbaa !5
  %64 = call zeroext i8 @Configure(ptr noundef %63)
  %65 = zext i8 %64 to i16
  store i16 %65, ptr %4, align 2, !tbaa !15
  %66 = zext i16 %65 to i32
  %67 = icmp ne i32 %66, 0
  br i1 %67, label %68, label %70

68:                                               ; preds = %62
  %69 = load i16, ptr %4, align 2, !tbaa !15
  store i16 %69, ptr %2, align 2
  store i32 1, ptr %5, align 4
  br label %71

70:                                               ; preds = %62
  store i16 0, ptr %2, align 2
  store i32 1, ptr %5, align 4
  br label %71

71:                                               ; preds = %70, %68, %60, %52, %38, %30, %22, %10
  call void @llvm.lifetime.end.p0(i64 2, ptr %4) #2
  %72 = load i16, ptr %2, align 2
  ret i16 %72
}

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @SetupReceiveQueues(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @SetupCBlink(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @PhyDetect(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @SoftwareReset(ptr noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 880}
!10 = !{!"s_data_instance", !11, i64 0, !11, i64 2, !7, i64 4, !7, i64 5, !11, i64 6, !11, i64 8, !11, i64 10, !11, i64 12, !11, i64 14, !7, i64 16, !7, i64 48, !7, i64 80, !7, i64 112, !7, i64 368, !12, i64 880, !12, i64 884, !11, i64 888, !11, i64 890, !7, i64 892, !7, i64 893, !7, i64 894, !7, i64 895, !11, i64 896, !11, i64 898, !11, i64 900, !11, i64 902, !12, i64 904, !12, i64 908, !11, i64 912, !11, i64 914, !7, i64 916, !7, i64 920, !7, i64 921, !11, i64 922, !12, i64 924, !6, i64 928, !6, i64 936, !6, i64 944, !6, i64 952, !6, i64 960, !6, i64 968, !13, i64 976, !13, i64 984, !13, i64 992, !13, i64 1000, !13, i64 1008, !7, i64 1016, !11, i64 1528, !11, i64 1530, !11, i64 1532, !11, i64 1534, !7, i64 1536, !7, i64 1537, !7, i64 1538, !7, i64 1539, !7, i64 1540, !7, i64 1541, !14, i64 1544, !13, i64 1808, !6, i64 1816, !13, i64 1824, !6, i64 1832, !6, i64 1840, !6, i64 1848, !6, i64 1856, !6, i64 1864, !6, i64 1872, !6, i64 1880, !6, i64 1888, !6, i64 1896, !6, i64 1904, !6, i64 1912}
!11 = !{!"short", !7, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!"long long", !7, i64 0}
!14 = !{!"mc", !7, i64 0, !11, i64 6, !7, i64 8}
!15 = !{!11, !11, i64 0}
!16 = !{!10, !7, i64 920}
!17 = !{!10, !7, i64 894}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local void @OutWord(ptr noundef, i16 noundef zeroext, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @Load_Base_Regs(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @Configure(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @E100bSetupIAAddr(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local zeroext range(i16 0, 256) i16 @InitializeChip(ptr noundef %0) local_unnamed_addr #0 {
  %2 = tail call signext i8 @SoftwareReset(ptr noundef %0)
  %.not = icmp eq i8 %2, 0
  br i1 %.not, label %3, label %22

3:                                                ; preds = %1
  %4 = getelementptr inbounds i8, ptr %0, i64 880
  %5 = load i32, ptr %4, align 8, !tbaa !5
  %6 = add i32 %5, 2
  tail call void @OutWord(ptr noundef %0, i16 noundef zeroext 256, i32 noundef %6)
  %7 = tail call zeroext i8 @Load_Base_Regs(ptr noundef %0)
  %.not16 = icmp eq i8 %7, 0
  br i1 %.not16, label %8, label %22

8:                                                ; preds = %3
  %9 = tail call zeroext i8 @SetupCBlink(ptr noundef nonnull %0)
  %.not17 = icmp eq i8 %9, 0
  br i1 %.not17, label %10, label %22

10:                                               ; preds = %8
  %11 = tail call zeroext i8 @SetupReceiveQueues(ptr noundef nonnull %0)
  %.not18 = icmp eq i8 %11, 0
  br i1 %.not18, label %12, label %22

12:                                               ; preds = %10
  %13 = getelementptr inbounds i8, ptr %0, i64 920
  store i8 -1, ptr %13, align 8, !tbaa !14
  %14 = getelementptr inbounds i8, ptr %0, i64 894
  %15 = load i8, ptr %14, align 2, !tbaa !15
  %.not19 = icmp eq i8 %15, 0
  br i1 %.not19, label %18, label %16

16:                                               ; preds = %12
  %17 = tail call zeroext i8 @PhyDetect(ptr noundef nonnull %0)
  %.not20 = icmp eq i8 %17, 0
  br i1 %.not20, label %22, label %18

18:                                               ; preds = %16, %12
  %19 = tail call zeroext i8 @E100bSetupIAAddr(ptr noundef nonnull %0)
  %.not21 = icmp eq i8 %19, 0
  br i1 %.not21, label %20, label %22

20:                                               ; preds = %18
  %21 = tail call zeroext i8 @Configure(ptr noundef nonnull %0)
  br label %22

22:                                               ; preds = %20, %18, %16, %10, %8, %3, %1
  %.0.shrunk = phi i8 [ 10, %1 ], [ %7, %3 ], [ %9, %8 ], [ %11, %10 ], [ 10, %16 ], [ %19, %18 ], [ %21, %20 ]
  %.0 = zext i8 %.0.shrunk to i16
  ret i16 %.0
}

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @SetupReceiveQueues(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @SetupCBlink(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @PhyDetect(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @SoftwareReset(ptr noundef) local_unnamed_addr #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 880}
!6 = !{!"s_data_instance", !7, i64 0, !7, i64 2, !8, i64 4, !8, i64 5, !7, i64 6, !7, i64 8, !7, i64 10, !7, i64 12, !7, i64 14, !8, i64 16, !8, i64 48, !8, i64 80, !8, i64 112, !8, i64 368, !10, i64 880, !10, i64 884, !7, i64 888, !7, i64 890, !8, i64 892, !8, i64 893, !8, i64 894, !8, i64 895, !7, i64 896, !7, i64 898, !7, i64 900, !7, i64 902, !10, i64 904, !10, i64 908, !7, i64 912, !7, i64 914, !8, i64 916, !8, i64 920, !8, i64 921, !7, i64 922, !10, i64 924, !11, i64 928, !11, i64 936, !11, i64 944, !11, i64 952, !11, i64 960, !11, i64 968, !12, i64 976, !12, i64 984, !12, i64 992, !12, i64 1000, !12, i64 1008, !8, i64 1016, !7, i64 1528, !7, i64 1530, !7, i64 1532, !7, i64 1534, !8, i64 1536, !8, i64 1537, !8, i64 1538, !8, i64 1539, !8, i64 1540, !8, i64 1541, !13, i64 1544, !12, i64 1808, !11, i64 1816, !12, i64 1824, !11, i64 1832, !11, i64 1840, !11, i64 1848, !11, i64 1856, !11, i64 1864, !11, i64 1872, !11, i64 1880, !11, i64 1888, !11, i64 1896, !11, i64 1904, !11, i64 1912}
!7 = !{!"short", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!"long long", !8, i64 0}
!13 = !{!"mc", !8, i64 0, !7, i64 6, !8, i64 8}
!14 = !{!6, !8, i64 920}
!15 = !{!6, !8, i64 894}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass