; LLVM IR from gem5/gem5 :: src/systemc/tests/systemc/misc/unit/data/general/promote_add (datawidth)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::sc_bv" = type { %"class.sc_dt::sc_bv_base" }
%"class.sc_dt::sc_bv_base" = type { %"class.sc_dt::sc_proxy", i32, i32, ptr }
%"class.sc_dt::sc_proxy" = type { ptr }
%"class.sc_dt::sc_concref_r" = type { %"class.sc_dt::sc_proxy.13", ptr, ptr, i32, ptr }
%"class.sc_dt::sc_proxy.13" = type { ptr }
%struct.datawidth = type { %"class.sc_core::sc_module", %"class.sc_core::sc_in", ptr, ptr, ptr, ptr }
%"class.sc_core::sc_module" = type { %"class.sc_core::sc_object", %"class.sc_core::sc_process_host", %"class.sc_core::sc_sensitive", %"class.sc_core::sc_sensitive_pos", %"class.sc_core::sc_sensitive_neg", i8, ptr, i32, ptr, ptr }
%"class.sc_core::sc_object" = type { ptr, ptr, %"class.std::vector", %"class.std::vector.0", %"class.std::__cxx11::basic_string", ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.sc_core::sc_process_host" = type { ptr }
%"class.sc_core::sc_sensitive" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_pos" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_neg" = type { ptr, i32, ptr }
%"class.sc_core::sc_in" = type { %"class.sc_core::sc_port", ptr, ptr, ptr, ptr }
%"class.sc_core::sc_port" = type { %"class.sc_core::sc_port_b" }
%"class.sc_core::sc_port_b" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.8" }
%"class.sc_core::sc_port_base" = type { %"class.sc_core::sc_object", ptr }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@.str = external hidden unnamed_addr constant [2 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN9datawidth5entryEv(ptr noundef nonnull align 8 dereferenceable(448) %0) #0 align 2 personality ptr @__gxx_personality_v0 {
  %2 = alloca ptr, align 8
  %3 = alloca %"class.sc_dt::sc_bv", align 8
  %4 = alloca %"class.sc_dt::sc_bv", align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca %"class.sc_dt::sc_bv", align 8
  %8 = alloca %"class.sc_dt::sc_concref_r", align 8
  %9 = alloca %"class.sc_dt::sc_concref_r", align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %10 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 24, ptr %3) #5
  call void @_ZN5sc_dt5sc_bvILi7EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3)
  call void @llvm.lifetime.start.p0(i64 24, ptr %4) #5
  invoke void @_ZN5sc_dt5sc_bvILi7EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %4)
          to label %11 unwind label %61

11:                                               ; preds = %1
  call void @llvm.lifetime.start.p0(i64 24, ptr %7) #5
  invoke void @_ZN5sc_dt5sc_bvILi7EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %7)
          to label %12 unwind label %65

12:                                               ; preds = %11
  br label %13

13:                                               ; preds = %60, %12
  br label %14

14:                                               ; preds = %13
  br label %15

15:                                               ; preds = %21, %14
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %10)
          to label %16 unwind label %69

16:                                               ; preds = %15
  br label %17

17:                                               ; preds = %16
  %18 = getelementptr inbounds %struct.datawidth, ptr %10, i32 0, i32 4
  %19 = load ptr, ptr %18, align 8, !tbaa !9
  %20 = invoke noundef nonnull align 1 dereferenceable(1) ptr @_ZNK7sc_core9sc_signalIbLNS_16sc_writer_policyE0EEcvRKbEv(ptr noundef nonnull align 8 dereferenceable(224) %19)
          to label %21 unwind label %69

21:                                               ; preds = %17
  %22 = load i8, ptr %20, align 1, !tbaa !41, !range !42, !noundef !43
  %23 = trunc i8 %22 to i1
  %24 = zext i1 %23 to i32
  %25 = icmp ne i32 %24, 1
  br i1 %25, label %15, label %26, !llvm.loop !44

26:                                               ; preds = %21
  call void @llvm.lifetime.start.p0(i64 40, ptr %8) #5
  %27 = getelementptr inbounds %struct.datawidth, ptr %10, i32 0, i32 2
  %28 = load ptr, ptr %27, align 8, !tbaa !46
  %29 = load ptr, ptr %28, align 8, !tbaa !47
  %30 = getelementptr inbounds ptr, ptr %29, i64 5
  %31 = load ptr, ptr %30, align 8
  %32 = invoke noundef nonnull align 8 dereferenceable(24) ptr %31(ptr noundef nonnull align 8 dereferenceable(232) %28)
          to label %33 unwind label %73

33:                                               ; preds = %26
  invoke void @_ZN5sc_dtcmINS_10sc_bv_baseEEENS_12sc_concref_rINS_10sc_lv_baseET_EEPKcRKNS_8sc_proxyIS4_EE(ptr dead_on_unwind writable sret(%"class.sc_dt::sc_concref_r") align 8 %8, ptr noundef @.str, ptr noundef nonnull align 8 dereferenceable(8) %32)
          to label %34 unwind label %73

34:                                               ; preds = %33
  %35 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt5sc_bvILi7EEaSINS_12sc_concref_rINS_10sc_lv_baseENS_10sc_bv_baseEEEEERS1_RKNS_8sc_proxyIT_EE(ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 8 dereferenceable(8) %8)
          to label %36 unwind label %77

36:                                               ; preds = %34
  call void @_ZN5sc_dt12sc_concref_rINS_10sc_lv_baseENS_10sc_bv_baseEED2Ev(ptr noundef nonnull align 8 dereferenceable(40) %8) #5
  call void @llvm.lifetime.end.p0(i64 40, ptr %8) #5
  call void @llvm.lifetime.start.p0(i64 40, ptr %9) #5
  %37 = getelementptr inbounds %struct.datawidth, ptr %10, i32 0, i32 3
  %38 = load ptr, ptr %37, align 8, !tbaa !49
  %39 = load ptr, ptr %38, align 8, !tbaa !47
  %40 = getelementptr inbounds ptr, ptr %39, i64 5
  %41 = load ptr, ptr %40, align 8
  %42 = invoke noundef nonnull align 8 dereferenceable(24) ptr %41(ptr noundef nonnull align 8 dereferenceable(232) %38)
          to label %43 unwind label %82

43:                                               ; preds = %36
  invoke void @_ZN5sc_dtcmINS_10sc_bv_baseEEENS_12sc_concref_rINS_10sc_lv_baseET_EEPKcRKNS_8sc_proxyIS4_EE(ptr dead_on_unwind writable sret(%"class.sc_dt::sc_concref_r") align 8 %9, ptr noundef @.str, ptr noundef nonnull align 8 dereferenceable(8) %42)
          to label %44 unwind label %82

44:                                               ; preds = %43
  %45 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt5sc_bvILi7EEaSINS_12sc_concref_rINS_10sc_lv_baseENS_10sc_bv_baseEEEEERS1_RKNS_8sc_proxyIT_EE(ptr noundef nonnull align 8 dereferenceable(24) %4, ptr noundef nonnull align 8 dereferenceable(8) %9)
          to label %46 unwind label %86

46:                                               ; preds = %44
  call void @_ZN5sc_dt12sc_concref_rINS_10sc_lv_baseENS_10sc_bv_baseEED2Ev(ptr noundef nonnull align 8 dereferenceable(40) %9) #5
  call void @llvm.lifetime.end.p0(i64 40, ptr %9) #5
  %47 = invoke noundef i32 @_ZNK5sc_dt8sc_proxyINS_10sc_bv_baseEE7to_uintEv(ptr noundef nonnull align 8 dereferenceable(8) %3)
          to label %48 unwind label %69

48:                                               ; preds = %46
  %49 = invoke noundef i32 @_ZNK5sc_dt8sc_proxyINS_10sc_bv_baseEE7to_uintEv(ptr noundef nonnull align 8 dereferenceable(8) %4)
          to label %50 unwind label %69

50:                                               ; preds = %48
  %51 = add i32 %47, %49
  %52 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt5sc_bvILi7EEaSEj(ptr noundef nonnull align 8 dereferenceable(24) %7, i32 noundef %51)
          to label %53 unwind label %69

53:                                               ; preds = %50
  %54 = getelementptr inbounds %struct.datawidth, ptr %10, i32 0, i32 5
  %55 = load ptr, ptr %54, align 8, !tbaa !50
  %56 = load ptr, ptr %55, align 8, !tbaa !47
  %57 = getelementptr inbounds ptr, ptr %56, i64 9
  %58 = load ptr, ptr %57, align 8
  invoke void %58(ptr noundef nonnull align 8 dereferenceable(232) %55, ptr noundef nonnull align 8 dereferenceable(24) %7)
          to label %59 unwind label %69

59:                                               ; preds = %53
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %10)
          to label %60 unwind label %69

60:                                               ; preds = %59
  br label %13, !llvm.loop !51

61:                                               ; preds = %1
  %62 = landingpad { ptr, i32 }
          cleanup
  %63 = extractvalue { ptr, i32 } %62, 0
  store ptr %63, ptr %5, align 8
  %64 = extractvalue { ptr, i32 } %62, 1
  store i32 %64, ptr %6, align 4
  br label %93

65:                                               ; preds = %11
  %66 = landingpad { ptr, i32 }
          cleanup
  %67 = extractvalue { ptr, i32 } %66, 0
  store ptr %67, ptr %5, align 8
  %68 = extractvalue { ptr, i32 } %66, 1
  store i32 %68, ptr %6, align 4
  br label %92

69:                                               ; preds = %59, %53, %50, %48, %46, %17, %15
  %70 = landingpad { ptr, i32 }
          cleanup
  %71 = extractvalue { ptr, i32 } %70, 0
  store ptr %71, ptr %5, align 8
  %72 = extractvalue { ptr, i32 } %70, 1
  store i32 %72, ptr %6, align 4
  br label %91

73:                                               ; preds = %33, %26
  %74 = landingpad { ptr, i32 }
          cleanup
  %75 = extractvalue { ptr, i32 } %74, 0
  store ptr %75, ptr %5, align 8
  %76 = extractvalue { ptr, i32 } %74, 1
  store i32 %76, ptr %6, align 4
  br label %81

77:                                               ; preds = %34
  %78 = landingpad { ptr, i32 }
          cleanup
  %79 = extractvalue { ptr, i32 } %78, 0
  store ptr %79, ptr %5, align 8
  %80 = extractvalue { ptr, i32 } %78, 1
  store i32 %80, ptr %6, align 4
  call void @_ZN5sc_dt12sc_concref_rINS_10sc_lv_baseENS_10sc_bv_baseEED2Ev(ptr noundef nonnull align 8 dereferenceable(40) %8) #5
  br label %81

81:                                               ; preds = %77, %73
  call void @llvm.lifetime.end.p0(i64 40, ptr %8) #5
  br label %91

82:                                               ; preds = %43, %36
  %83 = landingpad { ptr, i32 }
          cleanup
  %84 = extractvalue { ptr, i32 } %83, 0
  store ptr %84, ptr %5, align 8
  %85 = extractvalue { ptr, i32 } %83, 1
  store i32 %85, ptr %6, align 4
  br label %90

86:                                               ; preds = %44
  %87 = landingpad { ptr, i32 }
          cleanup
  %88 = extractvalue { ptr, i32 } %87, 0
  store ptr %88, ptr %5, align 8
  %89 = extractvalue { ptr, i32 } %87, 1
  store i32 %89, ptr %6, align 4
  call void @_ZN5sc_dt12sc_concref_rINS_10sc_lv_baseENS_10sc_bv_baseEED2Ev(ptr noundef nonnull align 8 dereferenceable(40) %9) #5
  br label %90

90:                                               ; preds = %86, %82
  call void @llvm.lifetime.end.p0(i64 40, ptr %9) #5
  br label %91

91:                                               ; preds = %90, %81, %69
  call void @_ZN5sc_dt10sc_bv_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %7) #5
  br label %92

92:                                               ; preds = %91, %65
  call void @llvm.lifetime.end.p0(i64 24, ptr %7) #5
  call void @_ZN5sc_dt10sc_bv_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %4) #5
  br label %93

93:                                               ; preds = %92, %61
  call void @llvm.lifetime.end.p0(i64 24, ptr %4) #5
  call void @_ZN5sc_dt10sc_bv_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3) #5
  call void @llvm.lifetime.end.p0(i64 24, ptr %3) #5
  br label %94

94:                                               ; preds = %93
  %95 = load ptr, ptr %5, align 8
  %96 = load i32, ptr %6, align 4
  %97 = insertvalue { ptr, i32 } poison, ptr %95, 0
  %98 = insertvalue { ptr, i32 } %97, i32 %96, 1
  resume { ptr, i32 } %98
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt5sc_bvILi7EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232)) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNK7sc_core9sc_signalIbLNS_16sc_writer_policyE0EEcvRKbEv(ptr noundef nonnull align 8 dereferenceable(224)) #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dtcmINS_10sc_bv_baseEEENS_12sc_concref_rINS_10sc_lv_baseET_EEPKcRKNS_8sc_proxyIS4_EE(ptr dead_on_unwind noalias writable sret(%"class.sc_dt::sc_concref_r") align 8, ptr noundef, ptr noundef nonnull align 8 dereferenceable(8)) #2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt5sc_bvILi7EEaSINS_12sc_concref_rINS_10sc_lv_baseENS_10sc_bv_baseEEEEERS1_RKNS_8sc_proxyIT_EE(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(8)) #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt12sc_concref_rINS_10sc_lv_baseENS_10sc_bv_baseEED2Ev(ptr noundef nonnull align 8 dereferenceable(40)) unnamed_addr #3 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZNK5sc_dt8sc_proxyINS_10sc_bv_baseEE7to_uintEv(ptr noundef nonnull align 8 dereferenceable(8)) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt5sc_bvILi7EEaSEj(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt10sc_bv_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #4 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 432}
!10 = !{!"_ZTS9datawidth", !11, i64 0, !33, i64 232, !6, i64 416, !6, i64 424, !6, i64 432, !6, i64 440}
!11 = !{!"_ZTSN7sc_core9sc_moduleE", !12, i64 0, !24, i64 112, !25, i64 120, !27, i64 144, !29, i64 168, !31, i64 192, !6, i64 200, !32, i64 208, !6, i64 216, !6, i64 224}
!12 = !{!"_ZTSN7sc_core9sc_objectE", !6, i64 8, !13, i64 16, !17, i64 40, !21, i64 64, !6, i64 96, !6, i64 104}
!13 = !{!"_ZTSSt6vectorIPN7sc_core8sc_eventESaIS2_EE", !14, i64 0}
!14 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE12_Vector_implE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!17 = !{!"_ZTSSt6vectorIPN7sc_core9sc_objectESaIS2_EE", !18, i64 0}
!18 = !{!"_ZTSSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE12_Vector_implE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!21 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !22, i64 0, !23, i64 8, !7, i64 16}
!22 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!23 = !{!"long", !7, i64 0}
!24 = !{!"_ZTSN7sc_core15sc_process_hostE"}
!25 = !{!"_ZTSN7sc_core12sc_sensitiveE", !6, i64 0, !26, i64 8, !6, i64 16}
!26 = !{!"_ZTSN7sc_core12sc_sensitiveUt_E", !7, i64 0}
!27 = !{!"_ZTSN7sc_core16sc_sensitive_posE", !6, i64 0, !28, i64 8, !6, i64 16}
!28 = !{!"_ZTSN7sc_core16sc_sensitive_posUt_E", !7, i64 0}
!29 = !{!"_ZTSN7sc_core16sc_sensitive_negE", !6, i64 0, !30, i64 8, !6, i64 16}
!30 = !{!"_ZTSN7sc_core16sc_sensitive_negUt_E", !7, i64 0}
!31 = !{!"bool", !7, i64 0}
!32 = !{!"int", !7, i64 0}
!33 = !{!"_ZTSN7sc_core5sc_inIbEE", !34, i64 0, !6, i64 152, !6, i64 160, !6, i64 168, !6, i64 176}
!34 = !{!"_ZTSN7sc_core7sc_portINS_15sc_signal_in_ifIbEELi1ELNS_14sc_port_policyE0EEE", !35, i64 0}
!35 = !{!"_ZTSN7sc_core9sc_port_bINS_15sc_signal_in_ifIbEEEE", !36, i64 0, !6, i64 120, !37, i64 128}
!36 = !{!"_ZTSN7sc_core12sc_port_baseE", !12, i64 0, !6, i64 112}
!37 = !{!"_ZTSSt6vectorIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE", !38, i64 0}
!38 = !{!"_ZTSSt12_Vector_baseIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE", !39, i64 0}
!39 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE12_Vector_implE", !40, i64 0}
!40 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!41 = !{!31, !31, i64 0}
!42 = !{i8 0, i8 2}
!43 = !{}
!44 = distinct !{!44, !45}
!45 = !{!"llvm.loop.mustprogress"}
!46 = !{!10, !6, i64 416}
!47 = !{!48, !48, i64 0}
!48 = !{!"vtable pointer", !8, i64 0}
!49 = !{!10, !6, i64 424}
!50 = !{!10, !6, i64 440}
!51 = distinct !{!51, !45}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::sc_bv" = type { %"class.sc_dt::sc_bv_base" }
%"class.sc_dt::sc_bv_base" = type { %"class.sc_dt::sc_proxy", i32, i32, ptr }
%"class.sc_dt::sc_proxy" = type { ptr }
%"class.sc_dt::sc_concref_r" = type { %"class.sc_dt::sc_proxy.13", ptr, ptr, i32, ptr }
%"class.sc_dt::sc_proxy.13" = type { ptr }

@.str = external hidden unnamed_addr constant [2 x i8], align 1

; Function Attrs: mustprogress noreturn uwtable
define dso_local void @_ZN9datawidth5entryEv(ptr noundef nonnull align 8 dereferenceable(448) %0) local_unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  %2 = alloca %"class.sc_dt::sc_bv", align 8
  %3 = alloca %"class.sc_dt::sc_bv", align 8
  %4 = alloca %"class.sc_dt::sc_bv", align 8
  %5 = alloca %"class.sc_dt::sc_concref_r", align 8
  %6 = alloca %"class.sc_dt::sc_concref_r", align 8
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %2) #6
  call void @_ZN5sc_dt5sc_bvILi7EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %2)
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %3) #6
  invoke void @_ZN5sc_dt5sc_bvILi7EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3)
          to label %7 unwind label %49

7:                                                ; preds = %1
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %4) #6
  invoke void @_ZN5sc_dt5sc_bvILi7EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %4)
          to label %.preheader unwind label %51

.preheader:                                       ; preds = %7
  %8 = getelementptr inbounds i8, ptr %0, i64 432
  %9 = getelementptr inbounds i8, ptr %0, i64 416
  %10 = getelementptr inbounds i8, ptr %0, i64 424
  %11 = getelementptr inbounds i8, ptr %0, i64 440
  br label %12

12:                                               ; preds = %.backedge, %.preheader
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
          to label %13 unwind label %.loopexit

13:                                               ; preds = %12
  %14 = load ptr, ptr %8, align 8, !tbaa !5
  %15 = invoke noundef nonnull align 1 dereferenceable(1) ptr @_ZNK7sc_core9sc_signalIbLNS_16sc_writer_policyE0EEcvRKbEv(ptr noundef nonnull align 8 dereferenceable(224) %14)
          to label %16 unwind label %.loopexit

16:                                               ; preds = %13
  %17 = load i8, ptr %15, align 1, !tbaa !40, !range !41, !noundef !42
  %.not.not = icmp eq i8 %17, 0
  br i1 %.not.not, label %.backedge, label %18

.backedge:                                        ; preds = %16, %48
  br label %12, !llvm.loop !43

18:                                               ; preds = %16
  call void @llvm.lifetime.start.p0(i64 40, ptr nonnull %5) #6
  %19 = load ptr, ptr %9, align 8, !tbaa !45
  %20 = load ptr, ptr %19, align 8, !tbaa !46
  %21 = getelementptr inbounds i8, ptr %20, i64 40
  %22 = load ptr, ptr %21, align 8
  %23 = invoke noundef nonnull align 8 dereferenceable(24) ptr %22(ptr noundef nonnull align 8 dereferenceable(232) %19)
          to label %24 unwind label %53

24:                                               ; preds = %18
  invoke void @_ZN5sc_dtcmINS_10sc_bv_baseEEENS_12sc_concref_rINS_10sc_lv_baseET_EEPKcRKNS_8sc_proxyIS4_EE(ptr dead_on_unwind nonnull writable sret(%"class.sc_dt::sc_concref_r") align 8 %5, ptr noundef nonnull @.str, ptr noundef nonnull align 8 dereferenceable(8) %23)
          to label %25 unwind label %53

25:                                               ; preds = %24
  %26 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt5sc_bvILi7EEaSINS_12sc_concref_rINS_10sc_lv_baseENS_10sc_bv_baseEEEEERS1_RKNS_8sc_proxyIT_EE(ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef nonnull align 8 dereferenceable(8) %5)
          to label %27 unwind label %55

27:                                               ; preds = %25
  call void @_ZN5sc_dt12sc_concref_rINS_10sc_lv_baseENS_10sc_bv_baseEED2Ev(ptr noundef nonnull align 8 dereferenceable(40) %5) #6
  call void @llvm.lifetime.end.p0(i64 40, ptr nonnull %5) #6
  call void @llvm.lifetime.start.p0(i64 40, ptr nonnull %6) #6
  %28 = load ptr, ptr %10, align 8, !tbaa !48
  %29 = load ptr, ptr %28, align 8, !tbaa !46
  %30 = getelementptr inbounds i8, ptr %29, i64 40
  %31 = load ptr, ptr %30, align 8
  %32 = invoke noundef nonnull align 8 dereferenceable(24) ptr %31(ptr noundef nonnull align 8 dereferenceable(232) %28)
          to label %33 unwind label %58

33:                                               ; preds = %27
  invoke void @_ZN5sc_dtcmINS_10sc_bv_baseEEENS_12sc_concref_rINS_10sc_lv_baseET_EEPKcRKNS_8sc_proxyIS4_EE(ptr dead_on_unwind nonnull writable sret(%"class.sc_dt::sc_concref_r") align 8 %6, ptr noundef nonnull @.str, ptr noundef nonnull align 8 dereferenceable(8) %32)
          to label %34 unwind label %58

34:                                               ; preds = %33
  %35 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt5sc_bvILi7EEaSINS_12sc_concref_rINS_10sc_lv_baseENS_10sc_bv_baseEEEEERS1_RKNS_8sc_proxyIT_EE(ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 8 dereferenceable(8) %6)
          to label %36 unwind label %60

36:                                               ; preds = %34
  call void @_ZN5sc_dt12sc_concref_rINS_10sc_lv_baseENS_10sc_bv_baseEED2Ev(ptr noundef nonnull align 8 dereferenceable(40) %6) #6
  call void @llvm.lifetime.end.p0(i64 40, ptr nonnull %6) #6
  %37 = invoke noundef i32 @_ZNK5sc_dt8sc_proxyINS_10sc_bv_baseEE7to_uintEv(ptr noundef nonnull align 8 dereferenceable(8) %2)
          to label %38 unwind label %.loopexit.split-lp

38:                                               ; preds = %36
  %39 = invoke noundef i32 @_ZNK5sc_dt8sc_proxyINS_10sc_bv_baseEE7to_uintEv(ptr noundef nonnull align 8 dereferenceable(8) %3)
          to label %40 unwind label %.loopexit.split-lp

40:                                               ; preds = %38
  %41 = add i32 %39, %37
  %42 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt5sc_bvILi7EEaSEj(ptr noundef nonnull align 8 dereferenceable(24) %4, i32 noundef %41)
          to label %43 unwind label %.loopexit.split-lp

43:                                               ; preds = %40
  %44 = load ptr, ptr %11, align 8, !tbaa !49
  %45 = load ptr, ptr %44, align 8, !tbaa !46
  %46 = getelementptr inbounds i8, ptr %45, i64 72
  %47 = load ptr, ptr %46, align 8
  invoke void %47(ptr noundef nonnull align 8 dereferenceable(232) %44, ptr noundef nonnull align 8 dereferenceable(24) %4)
          to label %48 unwind label %.loopexit.split-lp

48:                                               ; preds = %43
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
          to label %.backedge unwind label %.loopexit.split-lp

49:                                               ; preds = %1
  %50 = landingpad { ptr, i32 }
          cleanup
  br label %65

51:                                               ; preds = %7
  %52 = landingpad { ptr, i32 }
          cleanup
  br label %64

.loopexit:                                        ; preds = %12, %13
  %lpad.loopexit = landingpad { ptr, i32 }
          cleanup
  br label %63

.loopexit.split-lp:                               ; preds = %36, %38, %40, %43, %48
  %lpad.loopexit.split-lp = landingpad { ptr, i32 }
          cleanup
  br label %63

53:                                               ; preds = %24, %18
  %54 = landingpad { ptr, i32 }
          cleanup
  br label %57

55:                                               ; preds = %25
  %56 = landingpad { ptr, i32 }
          cleanup
  call void @_ZN5sc_dt12sc_concref_rINS_10sc_lv_baseENS_10sc_bv_baseEED2Ev(ptr noundef nonnull align 8 dereferenceable(40) %5) #6
  br label %57

57:                                               ; preds = %55, %53
  %.pn = phi { ptr, i32 } [ %56, %55 ], [ %54, %53 ]
  call void @llvm.lifetime.end.p0(i64 40, ptr nonnull %5) #6
  br label %63

58:                                               ; preds = %33, %27
  %59 = landingpad { ptr, i32 }
          cleanup
  br label %62

60:                                               ; preds = %34
  %61 = landingpad { ptr, i32 }
          cleanup
  call void @_ZN5sc_dt12sc_concref_rINS_10sc_lv_baseENS_10sc_bv_baseEED2Ev(ptr noundef nonnull align 8 dereferenceable(40) %6) #6
  br label %62

62:                                               ; preds = %60, %58
  %.pn8 = phi { ptr, i32 } [ %61, %60 ], [ %59, %58 ]
  call void @llvm.lifetime.end.p0(i64 40, ptr nonnull %6) #6
  br label %63

63:                                               ; preds = %.loopexit, %.loopexit.split-lp, %62, %57
  %.pn10 = phi { ptr, i32 } [ %.pn8, %62 ], [ %.pn, %57 ], [ %lpad.loopexit, %.loopexit ], [ %lpad.loopexit.split-lp, %.loopexit.split-lp ]
  call void @_ZN5sc_dt10sc_bv_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %4) #6
  br label %64

64:                                               ; preds = %63, %51
  %.pn10.pn = phi { ptr, i32 } [ %.pn10, %63 ], [ %52, %51 ]
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %4) #6
  call void @_ZN5sc_dt10sc_bv_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3) #6
  br label %65

65:                                               ; preds = %64, %49
  %.pn10.pn.pn = phi { ptr, i32 } [ %.pn10.pn, %64 ], [ %50, %49 ]
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %3) #6
  call void @_ZN5sc_dt10sc_bv_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %2) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %2) #6
  resume { ptr, i32 } %.pn10.pn.pn
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt5sc_bvILi7EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNK7sc_core9sc_signalIbLNS_16sc_writer_policyE0EEcvRKbEv(ptr noundef nonnull align 8 dereferenceable(224)) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dtcmINS_10sc_bv_baseEEENS_12sc_concref_rINS_10sc_lv_baseET_EEPKcRKNS_8sc_proxyIS4_EE(ptr dead_on_unwind noalias writable sret(%"class.sc_dt::sc_concref_r") align 8, ptr noundef, ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt5sc_bvILi7EEaSINS_12sc_concref_rINS_10sc_lv_baseENS_10sc_bv_baseEEEEERS1_RKNS_8sc_proxyIT_EE(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt12sc_concref_rINS_10sc_lv_baseENS_10sc_bv_baseEED2Ev(ptr noundef nonnull align 8 dereferenceable(40)) unnamed_addr #4 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZNK5sc_dt8sc_proxyINS_10sc_bv_baseEE7to_uintEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt5sc_bvILi7EEaSEj(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt10sc_bv_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #5 align 2

attributes #0 = { mustprogress noreturn uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !9, i64 432}
!6 = !{!"_ZTS9datawidth", !7, i64 0, !32, i64 232, !9, i64 416, !9, i64 424, !9, i64 432, !9, i64 440}
!7 = !{!"_ZTSN7sc_core9sc_moduleE", !8, i64 0, !23, i64 112, !24, i64 120, !26, i64 144, !28, i64 168, !30, i64 192, !9, i64 200, !31, i64 208, !9, i64 216, !9, i64 224}
!8 = !{!"_ZTSN7sc_core9sc_objectE", !9, i64 8, !12, i64 16, !16, i64 40, !20, i64 64, !9, i64 96, !9, i64 104}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C++ TBAA"}
!12 = !{!"_ZTSSt6vectorIPN7sc_core8sc_eventESaIS2_EE", !13, i64 0}
!13 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE", !14, i64 0}
!14 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE12_Vector_implE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!16 = !{!"_ZTSSt6vectorIPN7sc_core9sc_objectESaIS2_EE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!20 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !21, i64 0, !22, i64 8, !10, i64 16}
!21 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !9, i64 0}
!22 = !{!"long", !10, i64 0}
!23 = !{!"_ZTSN7sc_core15sc_process_hostE"}
!24 = !{!"_ZTSN7sc_core12sc_sensitiveE", !9, i64 0, !25, i64 8, !9, i64 16}
!25 = !{!"_ZTSN7sc_core12sc_sensitiveUt_E", !10, i64 0}
!26 = !{!"_ZTSN7sc_core16sc_sensitive_posE", !9, i64 0, !27, i64 8, !9, i64 16}
!27 = !{!"_ZTSN7sc_core16sc_sensitive_posUt_E", !10, i64 0}
!28 = !{!"_ZTSN7sc_core16sc_sensitive_negE", !9, i64 0, !29, i64 8, !9, i64 16}
!29 = !{!"_ZTSN7sc_core16sc_sensitive_negUt_E", !10, i64 0}
!30 = !{!"bool", !10, i64 0}
!31 = !{!"int", !10, i64 0}
!32 = !{!"_ZTSN7sc_core5sc_inIbEE", !33, i64 0, !9, i64 152, !9, i64 160, !9, i64 168, !9, i64 176}
!33 = !{!"_ZTSN7sc_core7sc_portINS_15sc_signal_in_ifIbEELi1ELNS_14sc_port_policyE0EEE", !34, i64 0}
!34 = !{!"_ZTSN7sc_core9sc_port_bINS_15sc_signal_in_ifIbEEEE", !35, i64 0, !9, i64 120, !36, i64 128}
!35 = !{!"_ZTSN7sc_core12sc_port_baseE", !8, i64 0, !9, i64 112}
!36 = !{!"_ZTSSt6vectorIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE", !37, i64 0}
!37 = !{!"_ZTSSt12_Vector_baseIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE", !38, i64 0}
!38 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE12_Vector_implE", !39, i64 0}
!39 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!40 = !{!30, !30, i64 0}
!41 = !{i8 0, i8 2}
!42 = !{}
!43 = distinct !{!43, !44}
!44 = !{!"llvm.loop.mustprogress"}
!45 = !{!6, !9, i64 416}
!46 = !{!47, !47, i64 0}
!47 = !{!"vtable pointer", !11, i64 0}
!48 = !{!6, !9, i64 424}
!49 = !{!6, !9, i64 440}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,LICMPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass