; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/kernel (sc_reset)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_core::sc_reset" = type { ptr, %"class.std::vector" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<sc_core::sc_reset_target, std::allocator<sc_core::sc_reset_target>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_reset_target, std::allocator<sc_core::sc_reset_target>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_reset_target, std::allocator<sc_core::sc_reset_target>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_reset_target, std::allocator<sc_core::sc_reset_target>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_reset_target" = type { i8, i8, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN7sc_core15sc_reset_targetESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorIN7sc_core15sc_reset_targetESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core8sc_reset14remove_processEPNS_12sc_process_bE(ptr noundef nonnull align 8 dereferenceable(32) %0, ptr noundef %1) #2 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %7 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  %8 = getelementptr inbounds %"class.sc_core::sc_reset", ptr %7, i32 0, i32 1
  %9 = call noundef i64 @_ZNKSt6vectorIN7sc_core15sc_reset_targetESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %8) #4
  %10 = trunc i64 %9 to i32
  store i32 %10, ptr %6, align 4, !tbaa !9
  store i32 0, ptr %5, align 4, !tbaa !9
  br label %11

11:                                               ; preds = %42, %2
  %12 = load i32, ptr %5, align 4, !tbaa !9
  %13 = load i32, ptr %6, align 4, !tbaa !9
  %14 = icmp slt i32 %12, %13
  br i1 %14, label %15, label %43

15:                                               ; preds = %11
  %16 = getelementptr inbounds %"class.sc_core::sc_reset", ptr %7, i32 0, i32 1
  %17 = load i32, ptr %5, align 4, !tbaa !9
  %18 = sext i32 %17 to i64
  %19 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorIN7sc_core15sc_reset_targetESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %16, i64 noundef %18) #4
  %20 = getelementptr inbounds %"class.sc_core::sc_reset_target", ptr %19, i32 0, i32 2
  %21 = load ptr, ptr %20, align 8, !tbaa !11
  %22 = load ptr, ptr %4, align 8, !tbaa !5
  %23 = icmp eq ptr %21, %22
  br i1 %23, label %24, label %39

24:                                               ; preds = %15
  %25 = getelementptr inbounds %"class.sc_core::sc_reset", ptr %7, i32 0, i32 1
  %26 = load i32, ptr %6, align 4, !tbaa !9
  %27 = sub nsw i32 %26, 1
  %28 = sext i32 %27 to i64
  %29 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorIN7sc_core15sc_reset_targetESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %25, i64 noundef %28) #4
  %30 = getelementptr inbounds %"class.sc_core::sc_reset", ptr %7, i32 0, i32 1
  %31 = load i32, ptr %5, align 4, !tbaa !9
  %32 = sext i32 %31 to i64
  %33 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorIN7sc_core15sc_reset_targetESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %30, i64 noundef %32) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %33, ptr align 8 %29, i64 16, i1 false), !tbaa.struct !14
  %34 = load i32, ptr %6, align 4, !tbaa !9
  %35 = add nsw i32 %34, -1
  store i32 %35, ptr %6, align 4, !tbaa !9
  %36 = getelementptr inbounds %"class.sc_core::sc_reset", ptr %7, i32 0, i32 1
  %37 = load i32, ptr %6, align 4, !tbaa !9
  %38 = sext i32 %37 to i64
  call void @_ZNSt6vectorIN7sc_core15sc_reset_targetESaIS1_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %36, i64 noundef %38)
  br label %42

39:                                               ; preds = %15
  %40 = load i32, ptr %5, align 4, !tbaa !9
  %41 = add nsw i32 %40, 1
  store i32 %41, ptr %5, align 4, !tbaa !9
  br label %42

42:                                               ; preds = %39, %24
  br label %11, !llvm.loop !16

43:                                               ; preds = %11
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  ret void
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIN7sc_core15sc_reset_targetESaIS1_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 8}
!12 = !{!"_ZTSN7sc_core15sc_reset_targetE", !13, i64 0, !13, i64 1, !6, i64 8}
!13 = !{!"bool", !7, i64 0}
!14 = !{i64 0, i64 1, !15, i64 1, i64 1, !15, i64 8, i64 8, !5}
!15 = !{!13, !13, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN7sc_core15sc_reset_targetESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorIN7sc_core15sc_reset_targetESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core8sc_reset14remove_processEPNS_12sc_process_bE(ptr noundef nonnull align 8 dereferenceable(32) %0, ptr noundef readnone %1) local_unnamed_addr #1 align 2 {
  %3 = getelementptr inbounds i8, ptr %0, i64 8
  %4 = tail call noundef i64 @_ZNKSt6vectorIN7sc_core15sc_reset_targetESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %3) #3
  %5 = trunc i64 %4 to i32
  %6 = icmp sgt i32 %5, 0
  br i1 %6, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %2, %19
  %.012 = phi i32 [ %.1, %19 ], [ %5, %2 ]
  %.0911 = phi i32 [ %.110, %19 ], [ 0, %2 ]
  %7 = sext i32 %.0911 to i64
  %8 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorIN7sc_core15sc_reset_targetESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %7) #3
  %9 = getelementptr inbounds i8, ptr %8, i64 8
  %10 = load ptr, ptr %9, align 8, !tbaa !5
  %11 = icmp eq ptr %10, %1
  br i1 %11, label %12, label %17

12:                                               ; preds = %.lr.ph
  %13 = add nsw i32 %.012, -1
  %14 = sext i32 %13 to i64
  %15 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorIN7sc_core15sc_reset_targetESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %14) #3
  %16 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorIN7sc_core15sc_reset_targetESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %7) #3
  tail call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %16, ptr noundef nonnull align 8 dereferenceable(16) %15, i64 16, i1 false), !tbaa.struct !11
  tail call void @_ZNSt6vectorIN7sc_core15sc_reset_targetESaIS1_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %14)
  br label %19

17:                                               ; preds = %.lr.ph
  %18 = add nsw i32 %.0911, 1
  br label %19

19:                                               ; preds = %17, %12
  %.110 = phi i32 [ %.0911, %12 ], [ %18, %17 ]
  %.1 = phi i32 [ %13, %12 ], [ %.012, %17 ]
  %20 = icmp slt i32 %.110, %.1
  br i1 %20, label %.lr.ph, label %._crit_edge, !llvm.loop !14

._crit_edge:                                      ; preds = %19, %2
  ret void
}

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIN7sc_core15sc_reset_targetESaIS1_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"_ZTSN7sc_core15sc_reset_targetE", !7, i64 0, !7, i64 1, !10, i64 8}
!7 = !{!"bool", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{i64 0, i64 1, !12, i64 1, i64 1, !12, i64 8, i64 8, !13}
!12 = !{!7, !7, i64 0}
!13 = !{!10, !10, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass