; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/communication (sc_port)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_core::sc_port_base" = type { %"class.sc_core::sc_object", ptr }
%"class.sc_core::sc_object" = type { ptr, ptr, %"class.std::vector.5", %"class.std::vector.10", %"class.std::__cxx11::basic_string", ptr, ptr }
%"class.std::vector.5" = type { %"struct.std::_Vector_base.6" }
%"struct.std::_Vector_base.6" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.10" = type { %"struct.std::_Vector_base.11" }
%"struct.std::_Vector_base.11" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"struct.sc_core::sc_bind_info" = type { i32, i32, %"class.std::vector", i8, i32, i8, i8, %"class.std::vector.0", %"class.std::vector.0" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<sc_core::sc_bind_elem *, std::allocator<sc_core::sc_bind_elem *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_bind_elem *, std::allocator<sc_core::sc_bind_elem *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_bind_elem *, std::allocator<sc_core::sc_bind_elem *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_bind_elem *, std::allocator<sc_core::sc_bind_elem *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<sc_core::sc_bind_ef *, std::allocator<sc_core::sc_bind_ef *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_bind_ef *, std::allocator<sc_core::sc_bind_ef *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_bind_ef *, std::allocator<sc_core::sc_bind_ef *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_bind_ef *, std::allocator<sc_core::sc_bind_ef *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.sc_core::sc_bind_elem" = type { ptr, ptr }
%"struct.sc_core::sc_bind_ef" = type { ptr, ptr }

@.str.2 = external hidden unnamed_addr constant [90 x i8], align 1
@.str.6 = external hidden unnamed_addr constant [17 x i8], align 1
@__PRETTY_FUNCTION__._ZN7sc_core12sc_port_base16complete_bindingEv = external hidden unnamed_addr constant [47 x i8], align 1
@.str.7 = external hidden unnamed_addr constant [39 x i8], align 1
@_ZN7sc_core23SC_ID_COMPLETE_BINDING_E = external constant [0 x i8], align 1
@.str.8 = external hidden unnamed_addr constant [15 x i8], align 1
@.str.9 = external hidden unnamed_addr constant [41 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK7sc_core12sc_bind_info4sizeEv(ptr noundef nonnull align 8 dereferenceable(96)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK7sc_core12sc_bind_info8max_sizeEv(ptr noundef nonnull align 8 dereferenceable(96)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK7sc_core12sc_bind_info6policyEv(ptr noundef nonnull align 8 dereferenceable(96)) #1 align 2

declare void @_ZN7sc_core12sc_process_b16add_static_eventERKNS_8sc_eventE(ptr noundef nonnull align 8 dereferenceable(357), ptr noundef nonnull align 8 dereferenceable(160)) #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNK7sc_core12sc_port_base12report_errorEPKcS2_(ptr noundef nonnull align 8 dereferenceable(120), ptr noundef, ptr noundef) #4 align 2

; Function Attrs: nounwind
declare i32 @sprintf(ptr noundef, ptr noundef, ...) #5

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #6

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN7sc_core12sc_port_base12first_parentEv(ptr noundef nonnull align 8 dereferenceable(120)) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core12sc_port_base13insert_parentEi(ptr noundef nonnull align 8 dereferenceable(120), i32 noundef) #4 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core12sc_port_base16complete_bindingEv(ptr noundef nonnull align 8 dereferenceable(120) %0) #4 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca [128 x i8], align 16
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca ptr, align 8
  %14 = alloca ptr, align 8
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  %18 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 128, ptr %3) #7
  %19 = getelementptr inbounds %"class.sc_core::sc_port_base", ptr %18, i32 0, i32 1
  %20 = load ptr, ptr %19, align 8, !tbaa !9
  %21 = icmp ne ptr %20, null
  br i1 %21, label %22, label %23

22:                                               ; preds = %1
  br label %25

23:                                               ; preds = %1
  call void @__assert_fail(ptr noundef @.str.6, ptr noundef @.str.2, i32 noundef 454, ptr noundef @__PRETTY_FUNCTION__._ZN7sc_core12sc_port_base16complete_bindingEv) #8
  unreachable

24:                                               ; No predecessors!
  br label %25

25:                                               ; preds = %24, %22
  %26 = getelementptr inbounds %"class.sc_core::sc_port_base", ptr %18, i32 0, i32 1
  %27 = load ptr, ptr %26, align 8, !tbaa !9
  %28 = getelementptr inbounds %"struct.sc_core::sc_bind_info", ptr %27, i32 0, i32 6
  %29 = load i8, ptr %28, align 1, !tbaa !23, !range !36, !noundef !37
  %30 = trunc i8 %29 to i1
  br i1 %30, label %31, label %32

31:                                               ; preds = %25
  store i32 1, ptr %4, align 4
  br label %304

32:                                               ; preds = %25
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #7
  %33 = call noundef i32 @_ZN7sc_core12sc_port_base12first_parentEv(ptr noundef nonnull align 8 dereferenceable(120) %18)
  store i32 %33, ptr %5, align 4, !tbaa !38
  br label %34

34:                                               ; preds = %37, %32
  %35 = load i32, ptr %5, align 4, !tbaa !38
  %36 = icmp sge i32 %35, 0
  br i1 %36, label %37, label %49

37:                                               ; preds = %34
  %38 = getelementptr inbounds %"class.sc_core::sc_port_base", ptr %18, i32 0, i32 1
  %39 = load ptr, ptr %38, align 8, !tbaa !9
  %40 = getelementptr inbounds %"struct.sc_core::sc_bind_info", ptr %39, i32 0, i32 2
  %41 = load i32, ptr %5, align 4, !tbaa !38
  %42 = sext i32 %41 to i64
  %43 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %40, i64 noundef %42) #7
  %44 = load ptr, ptr %43, align 8, !tbaa !5
  %45 = getelementptr inbounds %"struct.sc_core::sc_bind_elem", ptr %44, i32 0, i32 1
  %46 = load ptr, ptr %45, align 8, !tbaa !39
  call void @_ZN7sc_core12sc_port_base16complete_bindingEv(ptr noundef nonnull align 8 dereferenceable(120) %46)
  %47 = load i32, ptr %5, align 4, !tbaa !38
  call void @_ZN7sc_core12sc_port_base13insert_parentEi(ptr noundef nonnull align 8 dereferenceable(120) %18, i32 noundef %47)
  %48 = call noundef i32 @_ZN7sc_core12sc_port_base12first_parentEv(ptr noundef nonnull align 8 dereferenceable(120) %18)
  store i32 %48, ptr %5, align 4, !tbaa !38
  br label %34, !llvm.loop !41

49:                                               ; preds = %34
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #7
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #7
  store i32 0, ptr %7, align 4, !tbaa !38
  br label %50

50:                                               ; preds = %195, %49
  %51 = load i32, ptr %7, align 4, !tbaa !38
  %52 = getelementptr inbounds %"class.sc_core::sc_port_base", ptr %18, i32 0, i32 1
  %53 = load ptr, ptr %52, align 8, !tbaa !9
  %54 = call noundef i32 @_ZNK7sc_core12sc_bind_info4sizeEv(ptr noundef nonnull align 8 dereferenceable(96) %53)
  %55 = icmp slt i32 %51, %54
  br i1 %55, label %57, label %56

56:                                               ; preds = %50
  store i32 4, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #7
  br label %198

57:                                               ; preds = %50
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #7
  %58 = getelementptr inbounds %"class.sc_core::sc_port_base", ptr %18, i32 0, i32 1
  %59 = load ptr, ptr %58, align 8, !tbaa !9
  %60 = getelementptr inbounds %"struct.sc_core::sc_bind_info", ptr %59, i32 0, i32 2
  %61 = load i32, ptr %7, align 4, !tbaa !38
  %62 = sext i32 %61 to i64
  %63 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %60, i64 noundef %62) #7
  %64 = load ptr, ptr %63, align 8, !tbaa !5
  %65 = getelementptr inbounds %"struct.sc_core::sc_bind_elem", ptr %64, i32 0, i32 0
  %66 = load ptr, ptr %65, align 8, !tbaa !43
  store ptr %66, ptr %8, align 8, !tbaa !5
  %67 = load ptr, ptr %8, align 8, !tbaa !5
  %68 = icmp eq ptr %67, null
  br i1 %68, label %69, label %70

69:                                               ; preds = %57
  store i32 6, ptr %4, align 4
  br label %192

70:                                               ; preds = %57
  %71 = load i32, ptr %7, align 4, !tbaa !38
  %72 = getelementptr inbounds %"class.sc_core::sc_port_base", ptr %18, i32 0, i32 1
  %73 = load ptr, ptr %72, align 8, !tbaa !9
  %74 = getelementptr inbounds %"struct.sc_core::sc_bind_info", ptr %73, i32 0, i32 4
  %75 = load i32, ptr %74, align 4, !tbaa !44
  %76 = icmp sgt i32 %71, %75
  br i1 %76, label %77, label %82

77:                                               ; preds = %70
  %78 = load ptr, ptr %8, align 8, !tbaa !5
  %79 = load ptr, ptr %18, align 8, !tbaa !45
  %80 = getelementptr inbounds ptr, ptr %79, i64 19
  %81 = load ptr, ptr %80, align 8
  call void %81(ptr noundef nonnull align 8 dereferenceable(120) %18, ptr noundef %78)
  br label %82

82:                                               ; preds = %77, %70
  %83 = getelementptr inbounds %"class.sc_core::sc_port_base", ptr %18, i32 0, i32 1
  %84 = load ptr, ptr %83, align 8, !tbaa !9
  %85 = getelementptr inbounds %"struct.sc_core::sc_bind_info", ptr %84, i32 0, i32 5
  %86 = load i8, ptr %85, align 8, !tbaa !47, !range !36, !noundef !37
  %87 = trunc i8 %86 to i1
  br i1 %87, label %88, label %97

88:                                               ; preds = %82
  %89 = load ptr, ptr %8, align 8, !tbaa !5
  %90 = load ptr, ptr %18, align 8, !tbaa !45
  %91 = getelementptr inbounds ptr, ptr %90, i64 21
  %92 = load ptr, ptr %91, align 8
  %93 = call noundef ptr %92(ptr noundef nonnull align 8 dereferenceable(120) %18)
  %94 = load ptr, ptr %89, align 8, !tbaa !45
  %95 = getelementptr inbounds ptr, ptr %94, i64 0
  %96 = load ptr, ptr %95, align 8
  call void %96(ptr noundef nonnull align 8 dereferenceable(8) %89, ptr noundef nonnull align 8 dereferenceable(120) %18, ptr noundef %93)
  br label %97

97:                                               ; preds = %88, %82
  %98 = getelementptr inbounds %"class.sc_core::sc_port_base", ptr %18, i32 0, i32 1
  %99 = load ptr, ptr %98, align 8, !tbaa !9
  %100 = getelementptr inbounds %"struct.sc_core::sc_bind_info", ptr %99, i32 0, i32 8
  %101 = call noundef i64 @_ZNKSt6vectorIPN7sc_core10sc_bind_efESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %100) #7
  %102 = trunc i64 %101 to i32
  store i32 %102, ptr %6, align 4, !tbaa !38
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #7
  store i32 0, ptr %9, align 4, !tbaa !38
  br label %103

103:                                              ; preds = %141, %97
  %104 = load i32, ptr %9, align 4, !tbaa !38
  %105 = load i32, ptr %6, align 4, !tbaa !38
  %106 = icmp slt i32 %104, %105
  br i1 %106, label %108, label %107

107:                                              ; preds = %103
  store i32 7, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #7
  br label %144

108:                                              ; preds = %103
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #7
  %109 = getelementptr inbounds %"class.sc_core::sc_port_base", ptr %18, i32 0, i32 1
  %110 = load ptr, ptr %109, align 8, !tbaa !9
  %111 = getelementptr inbounds %"struct.sc_core::sc_bind_info", ptr %110, i32 0, i32 8
  %112 = load i32, ptr %9, align 4, !tbaa !38
  %113 = sext i32 %112 to i64
  %114 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core10sc_bind_efESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %111, i64 noundef %113) #7
  %115 = load ptr, ptr %114, align 8, !tbaa !5
  store ptr %115, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #7
  %116 = load ptr, ptr %10, align 8, !tbaa !5
  %117 = getelementptr inbounds %"struct.sc_core::sc_bind_ef", ptr %116, i32 0, i32 1
  %118 = load ptr, ptr %117, align 8, !tbaa !48
  %119 = icmp ne ptr %118, null
  br i1 %119, label %120, label %129

120:                                              ; preds = %108
  %121 = load ptr, ptr %10, align 8, !tbaa !5
  %122 = getelementptr inbounds %"struct.sc_core::sc_bind_ef", ptr %121, i32 0, i32 1
  %123 = load ptr, ptr %122, align 8, !tbaa !48
  %124 = load ptr, ptr %8, align 8, !tbaa !5
  %125 = load ptr, ptr %123, align 8, !tbaa !45
  %126 = getelementptr inbounds ptr, ptr %125, i64 2
  %127 = load ptr, ptr %126, align 8
  %128 = call noundef nonnull align 8 dereferenceable(160) ptr %127(ptr noundef nonnull align 8 dereferenceable(16) %123, ptr noundef %124)
  br label %135

129:                                              ; preds = %108
  %130 = load ptr, ptr %8, align 8, !tbaa !5
  %131 = load ptr, ptr %130, align 8, !tbaa !45
  %132 = getelementptr inbounds ptr, ptr %131, i64 1
  %133 = load ptr, ptr %132, align 8
  %134 = call noundef nonnull align 8 dereferenceable(160) ptr %133(ptr noundef nonnull align 8 dereferenceable(8) %130)
  br label %135

135:                                              ; preds = %129, %120
  %136 = phi ptr [ %128, %120 ], [ %134, %129 ]
  store ptr %136, ptr %11, align 8, !tbaa !5
  %137 = load ptr, ptr %10, align 8, !tbaa !5
  %138 = getelementptr inbounds %"struct.sc_core::sc_bind_ef", ptr %137, i32 0, i32 0
  %139 = load ptr, ptr %138, align 8, !tbaa !50
  %140 = load ptr, ptr %11, align 8, !tbaa !5
  call void @_ZN7sc_core12sc_process_b16add_static_eventERKNS_8sc_eventE(ptr noundef nonnull align 8 dereferenceable(357) %139, ptr noundef nonnull align 8 dereferenceable(160) %140)
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #7
  br label %141

141:                                              ; preds = %135
  %142 = load i32, ptr %9, align 4, !tbaa !38
  %143 = add nsw i32 %142, 1
  store i32 %143, ptr %9, align 4, !tbaa !38
  br label %103, !llvm.loop !51

144:                                              ; preds = %107
  %145 = getelementptr inbounds %"class.sc_core::sc_port_base", ptr %18, i32 0, i32 1
  %146 = load ptr, ptr %145, align 8, !tbaa !9
  %147 = getelementptr inbounds %"struct.sc_core::sc_bind_info", ptr %146, i32 0, i32 7
  %148 = call noundef i64 @_ZNKSt6vectorIPN7sc_core10sc_bind_efESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %147) #7
  %149 = trunc i64 %148 to i32
  store i32 %149, ptr %6, align 4, !tbaa !38
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #7
  store i32 0, ptr %12, align 4, !tbaa !38
  br label %150

150:                                              ; preds = %188, %144
  %151 = load i32, ptr %12, align 4, !tbaa !38
  %152 = load i32, ptr %6, align 4, !tbaa !38
  %153 = icmp slt i32 %151, %152
  br i1 %153, label %155, label %154

154:                                              ; preds = %150
  store i32 10, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #7
  br label %191

155:                                              ; preds = %150
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #7
  %156 = getelementptr inbounds %"class.sc_core::sc_port_base", ptr %18, i32 0, i32 1
  %157 = load ptr, ptr %156, align 8, !tbaa !9
  %158 = getelementptr inbounds %"struct.sc_core::sc_bind_info", ptr %157, i32 0, i32 7
  %159 = load i32, ptr %12, align 4, !tbaa !38
  %160 = sext i32 %159 to i64
  %161 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core10sc_bind_efESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %158, i64 noundef %160) #7
  %162 = load ptr, ptr %161, align 8, !tbaa !5
  store ptr %162, ptr %13, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #7
  %163 = load ptr, ptr %13, align 8, !tbaa !5
  %164 = getelementptr inbounds %"struct.sc_core::sc_bind_ef", ptr %163, i32 0, i32 1
  %165 = load ptr, ptr %164, align 8, !tbaa !48
  %166 = icmp ne ptr %165, null
  br i1 %166, label %167, label %176

167:                                              ; preds = %155
  %168 = load ptr, ptr %13, align 8, !tbaa !5
  %169 = getelementptr inbounds %"struct.sc_core::sc_bind_ef", ptr %168, i32 0, i32 1
  %170 = load ptr, ptr %169, align 8, !tbaa !48
  %171 = load ptr, ptr %8, align 8, !tbaa !5
  %172 = load ptr, ptr %170, align 8, !tbaa !45
  %173 = getelementptr inbounds ptr, ptr %172, i64 2
  %174 = load ptr, ptr %173, align 8
  %175 = call noundef nonnull align 8 dereferenceable(160) ptr %174(ptr noundef nonnull align 8 dereferenceable(16) %170, ptr noundef %171)
  br label %182

176:                                              ; preds = %155
  %177 = load ptr, ptr %8, align 8, !tbaa !5
  %178 = load ptr, ptr %177, align 8, !tbaa !45
  %179 = getelementptr inbounds ptr, ptr %178, i64 1
  %180 = load ptr, ptr %179, align 8
  %181 = call noundef nonnull align 8 dereferenceable(160) ptr %180(ptr noundef nonnull align 8 dereferenceable(8) %177)
  br label %182

182:                                              ; preds = %176, %167
  %183 = phi ptr [ %175, %167 ], [ %181, %176 ]
  store ptr %183, ptr %14, align 8, !tbaa !5
  %184 = load ptr, ptr %13, align 8, !tbaa !5
  %185 = getelementptr inbounds %"struct.sc_core::sc_bind_ef", ptr %184, i32 0, i32 0
  %186 = load ptr, ptr %185, align 8, !tbaa !50
  %187 = load ptr, ptr %14, align 8, !tbaa !5
  call void @_ZN7sc_core12sc_process_b16add_static_eventERKNS_8sc_eventE(ptr noundef nonnull align 8 dereferenceable(357) %186, ptr noundef nonnull align 8 dereferenceable(160) %187)
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #7
  br label %188

188:                                              ; preds = %182
  %189 = load i32, ptr %12, align 4, !tbaa !38
  %190 = add nsw i32 %189, 1
  store i32 %190, ptr %12, align 4, !tbaa !38
  br label %150, !llvm.loop !52

191:                                              ; preds = %154
  store i32 0, ptr %4, align 4
  br label %192

192:                                              ; preds = %191, %69
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #7
  %193 = load i32, ptr %4, align 4
  switch i32 %193, label %307 [
    i32 0, label %194
    i32 6, label %195
  ]

194:                                              ; preds = %192
  br label %195

195:                                              ; preds = %194, %192
  %196 = load i32, ptr %7, align 4, !tbaa !38
  %197 = add nsw i32 %196, 1
  store i32 %197, ptr %7, align 4, !tbaa !38
  br label %50, !llvm.loop !53

198:                                              ; preds = %56
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #7
  %199 = load ptr, ptr %18, align 8, !tbaa !45
  %200 = getelementptr inbounds ptr, ptr %199, i64 20
  %201 = load ptr, ptr %200, align 8
  %202 = call noundef i32 %201(ptr noundef nonnull align 8 dereferenceable(120) %18)
  store i32 %202, ptr %15, align 4, !tbaa !38
  %203 = load i32, ptr %15, align 4, !tbaa !38
  %204 = getelementptr inbounds %"class.sc_core::sc_port_base", ptr %18, i32 0, i32 1
  %205 = load ptr, ptr %204, align 8, !tbaa !9
  %206 = call noundef i32 @_ZNK7sc_core12sc_bind_info8max_sizeEv(ptr noundef nonnull align 8 dereferenceable(96) %205)
  %207 = icmp sgt i32 %203, %206
  br i1 %207, label %208, label %216

208:                                              ; preds = %198
  %209 = getelementptr inbounds [128 x i8], ptr %3, i64 0, i64 0
  %210 = load i32, ptr %15, align 4, !tbaa !38
  %211 = getelementptr inbounds %"class.sc_core::sc_port_base", ptr %18, i32 0, i32 1
  %212 = load ptr, ptr %211, align 8, !tbaa !9
  %213 = call noundef i32 @_ZNK7sc_core12sc_bind_info8max_sizeEv(ptr noundef nonnull align 8 dereferenceable(96) %212)
  %214 = call i32 (ptr, ptr, ...) @sprintf(ptr noundef %209, ptr noundef @.str.7, i32 noundef %210, i32 noundef %213) #7
  %215 = getelementptr inbounds [128 x i8], ptr %3, i64 0, i64 0
  call void @_ZNK7sc_core12sc_port_base12report_errorEPKcS2_(ptr noundef nonnull align 8 dereferenceable(120) %18, ptr noundef @_ZN7sc_core23SC_ID_COMPLETE_BINDING_E, ptr noundef %215)
  br label %216

216:                                              ; preds = %208, %198
  %217 = getelementptr inbounds %"class.sc_core::sc_port_base", ptr %18, i32 0, i32 1
  %218 = load ptr, ptr %217, align 8, !tbaa !9
  %219 = call noundef i32 @_ZNK7sc_core12sc_bind_info6policyEv(ptr noundef nonnull align 8 dereferenceable(96) %218)
  switch i32 %219, label %243 [
    i32 0, label %220
    i32 2, label %225
  ]

220:                                              ; preds = %216
  %221 = load i32, ptr %15, align 4, !tbaa !38
  %222 = icmp slt i32 %221, 1
  br i1 %222, label %223, label %224

223:                                              ; preds = %220
  call void @_ZNK7sc_core12sc_port_base12report_errorEPKcS2_(ptr noundef nonnull align 8 dereferenceable(120) %18, ptr noundef @_ZN7sc_core23SC_ID_COMPLETE_BINDING_E, ptr noundef @.str.8)
  br label %224

224:                                              ; preds = %223, %220
  br label %244

225:                                              ; preds = %216
  %226 = load i32, ptr %15, align 4, !tbaa !38
  %227 = getelementptr inbounds %"class.sc_core::sc_port_base", ptr %18, i32 0, i32 1
  %228 = load ptr, ptr %227, align 8, !tbaa !9
  %229 = call noundef i32 @_ZNK7sc_core12sc_bind_info8max_sizeEv(ptr noundef nonnull align 8 dereferenceable(96) %228)
  %230 = icmp slt i32 %226, %229
  br i1 %230, label %234, label %231

231:                                              ; preds = %225
  %232 = load i32, ptr %15, align 4, !tbaa !38
  %233 = icmp slt i32 %232, 1
  br i1 %233, label %234, label %242

234:                                              ; preds = %231, %225
  %235 = getelementptr inbounds [128 x i8], ptr %3, i64 0, i64 0
  %236 = load i32, ptr %15, align 4, !tbaa !38
  %237 = getelementptr inbounds %"class.sc_core::sc_port_base", ptr %18, i32 0, i32 1
  %238 = load ptr, ptr %237, align 8, !tbaa !9
  %239 = call noundef i32 @_ZNK7sc_core12sc_bind_info8max_sizeEv(ptr noundef nonnull align 8 dereferenceable(96) %238)
  %240 = call i32 (ptr, ptr, ...) @sprintf(ptr noundef %235, ptr noundef @.str.9, i32 noundef %236, i32 noundef %239) #7
  %241 = getelementptr inbounds [128 x i8], ptr %3, i64 0, i64 0
  call void @_ZNK7sc_core12sc_port_base12report_errorEPKcS2_(ptr noundef nonnull align 8 dereferenceable(120) %18, ptr noundef @_ZN7sc_core23SC_ID_COMPLETE_BINDING_E, ptr noundef %241)
  br label %242

242:                                              ; preds = %234, %231
  br label %244

243:                                              ; preds = %216
  br label %244

244:                                              ; preds = %243, %242, %224
  %245 = getelementptr inbounds %"class.sc_core::sc_port_base", ptr %18, i32 0, i32 1
  %246 = load ptr, ptr %245, align 8, !tbaa !9
  %247 = getelementptr inbounds %"struct.sc_core::sc_bind_info", ptr %246, i32 0, i32 8
  %248 = call noundef i64 @_ZNKSt6vectorIPN7sc_core10sc_bind_efESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %247) #7
  %249 = trunc i64 %248 to i32
  store i32 %249, ptr %6, align 4, !tbaa !38
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #7
  store i32 0, ptr %16, align 4, !tbaa !38
  br label %250

250:                                              ; preds = %266, %244
  %251 = load i32, ptr %16, align 4, !tbaa !38
  %252 = load i32, ptr %6, align 4, !tbaa !38
  %253 = icmp slt i32 %251, %252
  br i1 %253, label %255, label %254

254:                                              ; preds = %250
  store i32 14, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #7
  br label %269

255:                                              ; preds = %250
  %256 = getelementptr inbounds %"class.sc_core::sc_port_base", ptr %18, i32 0, i32 1
  %257 = load ptr, ptr %256, align 8, !tbaa !9
  %258 = getelementptr inbounds %"struct.sc_core::sc_bind_info", ptr %257, i32 0, i32 8
  %259 = load i32, ptr %16, align 4, !tbaa !38
  %260 = sext i32 %259 to i64
  %261 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core10sc_bind_efESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %258, i64 noundef %260) #7
  %262 = load ptr, ptr %261, align 8, !tbaa !5
  %263 = icmp eq ptr %262, null
  br i1 %263, label %265, label %264

264:                                              ; preds = %255
  call void @_ZN7sc_core10sc_bind_efD1Ev(ptr noundef nonnull align 8 dereferenceable(16) %262) #7
  call void @_ZdlPvm(ptr noundef %262, i64 noundef 16) #9
  br label %265

265:                                              ; preds = %264, %255
  br label %266

266:                                              ; preds = %265
  %267 = load i32, ptr %16, align 4, !tbaa !38
  %268 = add nsw i32 %267, 1
  store i32 %268, ptr %16, align 4, !tbaa !38
  br label %250, !llvm.loop !54

269:                                              ; preds = %254
  %270 = getelementptr inbounds %"class.sc_core::sc_port_base", ptr %18, i32 0, i32 1
  %271 = load ptr, ptr %270, align 8, !tbaa !9
  %272 = getelementptr inbounds %"struct.sc_core::sc_bind_info", ptr %271, i32 0, i32 8
  call void @_ZNSt6vectorIPN7sc_core10sc_bind_efESaIS2_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %272, i64 noundef 0)
  %273 = getelementptr inbounds %"class.sc_core::sc_port_base", ptr %18, i32 0, i32 1
  %274 = load ptr, ptr %273, align 8, !tbaa !9
  %275 = getelementptr inbounds %"struct.sc_core::sc_bind_info", ptr %274, i32 0, i32 7
  %276 = call noundef i64 @_ZNKSt6vectorIPN7sc_core10sc_bind_efESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %275) #7
  %277 = trunc i64 %276 to i32
  store i32 %277, ptr %6, align 4, !tbaa !38
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #7
  store i32 0, ptr %17, align 4, !tbaa !38
  br label %278

278:                                              ; preds = %294, %269
  %279 = load i32, ptr %17, align 4, !tbaa !38
  %280 = load i32, ptr %6, align 4, !tbaa !38
  %281 = icmp slt i32 %279, %280
  br i1 %281, label %283, label %282

282:                                              ; preds = %278
  store i32 17, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #7
  br label %297

283:                                              ; preds = %278
  %284 = getelementptr inbounds %"class.sc_core::sc_port_base", ptr %18, i32 0, i32 1
  %285 = load ptr, ptr %284, align 8, !tbaa !9
  %286 = getelementptr inbounds %"struct.sc_core::sc_bind_info", ptr %285, i32 0, i32 7
  %287 = load i32, ptr %17, align 4, !tbaa !38
  %288 = sext i32 %287 to i64
  %289 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core10sc_bind_efESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %286, i64 noundef %288) #7
  %290 = load ptr, ptr %289, align 8, !tbaa !5
  %291 = icmp eq ptr %290, null
  br i1 %291, label %293, label %292

292:                                              ; preds = %283
  call void @_ZN7sc_core10sc_bind_efD1Ev(ptr noundef nonnull align 8 dereferenceable(16) %290) #7
  call void @_ZdlPvm(ptr noundef %290, i64 noundef 16) #9
  br label %293

293:                                              ; preds = %292, %283
  br label %294

294:                                              ; preds = %293
  %295 = load i32, ptr %17, align 4, !tbaa !38
  %296 = add nsw i32 %295, 1
  store i32 %296, ptr %17, align 4, !tbaa !38
  br label %278, !llvm.loop !55

297:                                              ; preds = %282
  %298 = getelementptr inbounds %"class.sc_core::sc_port_base", ptr %18, i32 0, i32 1
  %299 = load ptr, ptr %298, align 8, !tbaa !9
  %300 = getelementptr inbounds %"struct.sc_core::sc_bind_info", ptr %299, i32 0, i32 7
  call void @_ZNSt6vectorIPN7sc_core10sc_bind_efESaIS2_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %300, i64 noundef 0)
  %301 = getelementptr inbounds %"class.sc_core::sc_port_base", ptr %18, i32 0, i32 1
  %302 = load ptr, ptr %301, align 8, !tbaa !9
  %303 = getelementptr inbounds %"struct.sc_core::sc_bind_info", ptr %302, i32 0, i32 6
  store i8 1, ptr %303, align 1, !tbaa !23
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #7
  store i32 0, ptr %4, align 4
  br label %304

304:                                              ; preds = %297, %31
  call void @llvm.lifetime.end.p0(i64 128, ptr %3) #7
  %305 = load i32, ptr %4, align 4
  switch i32 %305, label %307 [
    i32 0, label %306
    i32 1, label %306
  ]

306:                                              ; preds = %304, %304
  ret void

307:                                              ; preds = %304, %192
  unreachable
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIPN7sc_core10sc_bind_efESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core10sc_bind_efESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIPN7sc_core10sc_bind_efESaIS2_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #4 align 2

declare void @_ZN7sc_core10sc_bind_efD1Ev(ptr)

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }
attributes #8 = { noreturn nounwind }
attributes #9 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 112}
!10 = !{!"_ZTSN7sc_core12sc_port_baseE", !11, i64 0, !6, i64 112}
!11 = !{!"_ZTSN7sc_core9sc_objectE", !6, i64 8, !12, i64 16, !16, i64 40, !20, i64 64, !6, i64 96, !6, i64 104}
!12 = !{!"_ZTSSt6vectorIPN7sc_core8sc_eventESaIS2_EE", !13, i64 0}
!13 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE", !14, i64 0}
!14 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE12_Vector_implE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!16 = !{!"_ZTSSt6vectorIPN7sc_core9sc_objectESaIS2_EE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!20 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !21, i64 0, !22, i64 8, !7, i64 16}
!21 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!22 = !{!"long", !7, i64 0}
!23 = !{!24, !31, i64 41}
!24 = !{!"_ZTSN7sc_core12sc_bind_infoE", !25, i64 0, !26, i64 4, !27, i64 8, !31, i64 32, !25, i64 36, !31, i64 40, !31, i64 41, !32, i64 48, !32, i64 72}
!25 = !{!"int", !7, i64 0}
!26 = !{!"_ZTSN7sc_core14sc_port_policyE", !7, i64 0}
!27 = !{!"_ZTSSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EE", !28, i64 0}
!28 = !{!"_ZTSSt12_Vector_baseIPN7sc_core12sc_bind_elemESaIS2_EE", !29, i64 0}
!29 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core12sc_bind_elemESaIS2_EE12_Vector_implE", !30, i64 0}
!30 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core12sc_bind_elemESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!31 = !{!"bool", !7, i64 0}
!32 = !{!"_ZTSSt6vectorIPN7sc_core10sc_bind_efESaIS2_EE", !33, i64 0}
!33 = !{!"_ZTSSt12_Vector_baseIPN7sc_core10sc_bind_efESaIS2_EE", !34, i64 0}
!34 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core10sc_bind_efESaIS2_EE12_Vector_implE", !35, i64 0}
!35 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core10sc_bind_efESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!36 = !{i8 0, i8 2}
!37 = !{}
!38 = !{!25, !25, i64 0}
!39 = !{!40, !6, i64 8}
!40 = !{!"_ZTSN7sc_core12sc_bind_elemE", !6, i64 0, !6, i64 8}
!41 = distinct !{!41, !42}
!42 = !{!"llvm.loop.mustprogress"}
!43 = !{!40, !6, i64 0}
!44 = !{!24, !25, i64 36}
!45 = !{!46, !46, i64 0}
!46 = !{!"vtable pointer", !8, i64 0}
!47 = !{!24, !31, i64 40}
!48 = !{!49, !6, i64 8}
!49 = !{!"_ZTSN7sc_core10sc_bind_efE", !6, i64 0, !6, i64 8}
!50 = !{!49, !6, i64 0}
!51 = distinct !{!51, !42}
!52 = distinct !{!52, !42}
!53 = distinct !{!53, !42}
!54 = distinct !{!54, !42}
!55 = distinct !{!55, !42}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.2 = external hidden unnamed_addr constant [90 x i8], align 1
@.str.6 = external hidden unnamed_addr constant [17 x i8], align 1
@__PRETTY_FUNCTION__._ZN7sc_core12sc_port_base16complete_bindingEv = external hidden unnamed_addr constant [47 x i8], align 1
@.str.7 = external hidden unnamed_addr constant [39 x i8], align 1
@_ZN7sc_core23SC_ID_COMPLETE_BINDING_E = external constant [0 x i8], align 1
@.str.8 = external hidden unnamed_addr constant [15 x i8], align 1
@.str.9 = external hidden unnamed_addr constant [41 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK7sc_core12sc_bind_info4sizeEv(ptr noundef nonnull align 8 dereferenceable(96)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK7sc_core12sc_bind_info8max_sizeEv(ptr noundef nonnull align 8 dereferenceable(96)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK7sc_core12sc_bind_info6policyEv(ptr noundef nonnull align 8 dereferenceable(96)) local_unnamed_addr #1 align 2

declare void @_ZN7sc_core12sc_process_b16add_static_eventERKNS_8sc_eventE(ptr noundef nonnull align 8 dereferenceable(357), ptr noundef nonnull align 8 dereferenceable(160)) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNK7sc_core12sc_port_base12report_errorEPKcS2_(ptr noundef nonnull align 8 dereferenceable(120), ptr noundef, ptr noundef) local_unnamed_addr #4 align 2

; Function Attrs: nofree nounwind
declare noundef i32 @sprintf(ptr noalias nocapture noundef writeonly, ptr nocapture noundef readonly, ...) local_unnamed_addr #5

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #6

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN7sc_core12sc_port_base12first_parentEv(ptr noundef nonnull align 8 dereferenceable(120)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core12sc_port_base13insert_parentEi(ptr noundef nonnull align 8 dereferenceable(120), i32 noundef) local_unnamed_addr #4 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core12sc_port_base16complete_bindingEv(ptr noundef nonnull align 8 dereferenceable(120) %0) local_unnamed_addr #4 align 2 {
  %2 = alloca [128 x i8], align 16
  call void @llvm.lifetime.start.p0(i64 128, ptr nonnull %2) #7
  %3 = getelementptr inbounds i8, ptr %0, i64 112
  %4 = load ptr, ptr %3, align 8, !tbaa !5
  %.not = icmp eq ptr %4, null
  br i1 %.not, label %5, label %6

5:                                                ; preds = %1
  tail call void @__assert_fail(ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.2, i32 noundef 454, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN7sc_core12sc_port_base16complete_bindingEv) #8
  unreachable

6:                                                ; preds = %1
  %7 = getelementptr inbounds i8, ptr %4, i64 41
  %8 = load i8, ptr %7, align 1, !tbaa !22, !range !35, !noundef !36
  %9 = trunc nuw i8 %8 to i1
  br i1 %9, label %162, label %10

10:                                               ; preds = %6
  %11 = tail call noundef i32 @_ZN7sc_core12sc_port_base12first_parentEv(ptr noundef nonnull align 8 dereferenceable(120) %0)
  %12 = icmp sgt i32 %11, -1
  br i1 %12, label %.lr.ph, label %.preheader

.preheader:                                       ; preds = %.lr.ph, %10
  %13 = load ptr, ptr %3, align 8, !tbaa !5
  %14 = tail call noundef i32 @_ZNK7sc_core12sc_bind_info4sizeEv(ptr noundef nonnull align 8 dereferenceable(96) %13)
  %15 = icmp sgt i32 %14, 0
  br i1 %15, label %.lr.ph66, label %._crit_edge67

.lr.ph:                                           ; preds = %10, %.lr.ph
  %.04659 = phi i32 [ %23, %.lr.ph ], [ %11, %10 ]
  %16 = load ptr, ptr %3, align 8, !tbaa !5
  %17 = getelementptr inbounds i8, ptr %16, i64 8
  %18 = zext nneg i32 %.04659 to i64
  %19 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %17, i64 noundef %18) #7
  %20 = load ptr, ptr %19, align 8, !tbaa !37
  %21 = getelementptr inbounds i8, ptr %20, i64 8
  %22 = load ptr, ptr %21, align 8, !tbaa !38
  tail call void @_ZN7sc_core12sc_port_base16complete_bindingEv(ptr noundef nonnull align 8 dereferenceable(120) %22)
  tail call void @_ZN7sc_core12sc_port_base13insert_parentEi(ptr noundef nonnull align 8 dereferenceable(120) %0, i32 noundef %.04659)
  %23 = tail call noundef i32 @_ZN7sc_core12sc_port_base12first_parentEv(ptr noundef nonnull align 8 dereferenceable(120) %0)
  %24 = icmp sgt i32 %23, -1
  br i1 %24, label %.lr.ph, label %.preheader, !llvm.loop !40

._crit_edge67:                                    ; preds = %.loopexit, %.preheader
  %25 = load ptr, ptr %0, align 8, !tbaa !42
  %26 = getelementptr inbounds i8, ptr %25, i64 160
  %27 = load ptr, ptr %26, align 8
  %28 = tail call noundef i32 %27(ptr noundef nonnull align 8 dereferenceable(120) %0)
  %29 = load ptr, ptr %3, align 8, !tbaa !5
  %30 = tail call noundef i32 @_ZNK7sc_core12sc_bind_info8max_sizeEv(ptr noundef nonnull align 8 dereferenceable(96) %29)
  %31 = icmp sgt i32 %28, %30
  br i1 %31, label %113, label %117

.lr.ph66:                                         ; preds = %.preheader, %.loopexit
  %indvars.iv82 = phi i64 [ %indvars.iv.next83, %.loopexit ], [ 0, %.preheader ]
  %32 = load ptr, ptr %3, align 8, !tbaa !5
  %33 = getelementptr inbounds i8, ptr %32, i64 8
  %34 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %33, i64 noundef %indvars.iv82) #7
  %35 = load ptr, ptr %34, align 8, !tbaa !37
  %36 = load ptr, ptr %35, align 8, !tbaa !44
  %37 = icmp eq ptr %36, null
  br i1 %37, label %.loopexit, label %38

38:                                               ; preds = %.lr.ph66
  %39 = load ptr, ptr %3, align 8, !tbaa !5
  %40 = getelementptr inbounds i8, ptr %39, i64 36
  %41 = load i32, ptr %40, align 4, !tbaa !45
  %42 = sext i32 %41 to i64
  %43 = icmp sgt i64 %indvars.iv82, %42
  br i1 %43, label %44, label %48

44:                                               ; preds = %38
  %45 = load ptr, ptr %0, align 8, !tbaa !42
  %46 = getelementptr inbounds i8, ptr %45, i64 152
  %47 = load ptr, ptr %46, align 8
  tail call void %47(ptr noundef nonnull align 8 dereferenceable(120) %0, ptr noundef nonnull %36)
  %.pre = load ptr, ptr %3, align 8, !tbaa !5
  br label %48

48:                                               ; preds = %44, %38
  %49 = phi ptr [ %.pre, %44 ], [ %39, %38 ]
  %50 = getelementptr inbounds i8, ptr %49, i64 40
  %51 = load i8, ptr %50, align 8, !tbaa !46, !range !35, !noundef !36
  %52 = trunc nuw i8 %51 to i1
  br i1 %52, label %53, label %60

53:                                               ; preds = %48
  %54 = load ptr, ptr %0, align 8, !tbaa !42
  %55 = getelementptr inbounds i8, ptr %54, i64 168
  %56 = load ptr, ptr %55, align 8
  %57 = tail call noundef ptr %56(ptr noundef nonnull align 8 dereferenceable(120) %0)
  %58 = load ptr, ptr %36, align 8, !tbaa !42
  %59 = load ptr, ptr %58, align 8
  tail call void %59(ptr noundef nonnull align 8 dereferenceable(8) %36, ptr noundef nonnull align 8 dereferenceable(120) %0, ptr noundef %57)
  %.pre95 = load ptr, ptr %3, align 8, !tbaa !5
  br label %60

60:                                               ; preds = %53, %48
  %61 = phi ptr [ %.pre95, %53 ], [ %49, %48 ]
  %62 = getelementptr inbounds i8, ptr %61, i64 72
  %63 = tail call noundef i64 @_ZNKSt6vectorIPN7sc_core10sc_bind_efESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %62) #7
  %64 = trunc i64 %63 to i32
  %65 = icmp sgt i32 %64, 0
  br i1 %65, label %.lr.ph61.preheader, label %._crit_edge

.lr.ph61.preheader:                               ; preds = %60
  %wide.trip.count = and i64 %63, 2147483647
  br label %.lr.ph61

._crit_edge:                                      ; preds = %87, %60
  %66 = load ptr, ptr %3, align 8, !tbaa !5
  %67 = getelementptr inbounds i8, ptr %66, i64 48
  %68 = tail call noundef i64 @_ZNKSt6vectorIPN7sc_core10sc_bind_efESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %67) #7
  %69 = trunc i64 %68 to i32
  %70 = icmp sgt i32 %69, 0
  br i1 %70, label %.lr.ph64.preheader, label %.loopexit

.lr.ph64.preheader:                               ; preds = %._crit_edge
  %wide.trip.count80 = and i64 %68, 2147483647
  br label %.lr.ph64

.lr.ph61:                                         ; preds = %.lr.ph61.preheader, %87
  %indvars.iv = phi i64 [ 0, %.lr.ph61.preheader ], [ %indvars.iv.next, %87 ]
  %71 = load ptr, ptr %3, align 8, !tbaa !5
  %72 = getelementptr inbounds i8, ptr %71, i64 72
  %73 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core10sc_bind_efESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %72, i64 noundef %indvars.iv) #7
  %74 = load ptr, ptr %73, align 8, !tbaa !37
  %75 = getelementptr inbounds i8, ptr %74, i64 8
  %76 = load ptr, ptr %75, align 8, !tbaa !47
  %.not58 = icmp eq ptr %76, null
  br i1 %.not58, label %82, label %77

77:                                               ; preds = %.lr.ph61
  %78 = load ptr, ptr %76, align 8, !tbaa !42
  %79 = getelementptr inbounds i8, ptr %78, i64 16
  %80 = load ptr, ptr %79, align 8
  %81 = tail call noundef nonnull align 8 dereferenceable(160) ptr %80(ptr noundef nonnull align 8 dereferenceable(16) %76, ptr noundef nonnull %36)
  br label %87

82:                                               ; preds = %.lr.ph61
  %83 = load ptr, ptr %36, align 8, !tbaa !42
  %84 = getelementptr inbounds i8, ptr %83, i64 8
  %85 = load ptr, ptr %84, align 8
  %86 = tail call noundef nonnull align 8 dereferenceable(160) ptr %85(ptr noundef nonnull align 8 dereferenceable(8) %36)
  br label %87

87:                                               ; preds = %82, %77
  %88 = phi ptr [ %81, %77 ], [ %86, %82 ]
  %89 = load ptr, ptr %74, align 8, !tbaa !49
  tail call void @_ZN7sc_core12sc_process_b16add_static_eventERKNS_8sc_eventE(ptr noundef nonnull align 8 dereferenceable(357) %89, ptr noundef nonnull align 8 dereferenceable(160) %88)
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph61, !llvm.loop !50

.lr.ph64:                                         ; preds = %.lr.ph64.preheader, %106
  %indvars.iv77 = phi i64 [ 0, %.lr.ph64.preheader ], [ %indvars.iv.next78, %106 ]
  %90 = load ptr, ptr %3, align 8, !tbaa !5
  %91 = getelementptr inbounds i8, ptr %90, i64 48
  %92 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core10sc_bind_efESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %91, i64 noundef %indvars.iv77) #7
  %93 = load ptr, ptr %92, align 8, !tbaa !37
  %94 = getelementptr inbounds i8, ptr %93, i64 8
  %95 = load ptr, ptr %94, align 8, !tbaa !47
  %.not57 = icmp eq ptr %95, null
  br i1 %.not57, label %101, label %96

96:                                               ; preds = %.lr.ph64
  %97 = load ptr, ptr %95, align 8, !tbaa !42
  %98 = getelementptr inbounds i8, ptr %97, i64 16
  %99 = load ptr, ptr %98, align 8
  %100 = tail call noundef nonnull align 8 dereferenceable(160) ptr %99(ptr noundef nonnull align 8 dereferenceable(16) %95, ptr noundef nonnull %36)
  br label %106

101:                                              ; preds = %.lr.ph64
  %102 = load ptr, ptr %36, align 8, !tbaa !42
  %103 = getelementptr inbounds i8, ptr %102, i64 8
  %104 = load ptr, ptr %103, align 8
  %105 = tail call noundef nonnull align 8 dereferenceable(160) ptr %104(ptr noundef nonnull align 8 dereferenceable(8) %36)
  br label %106

106:                                              ; preds = %101, %96
  %107 = phi ptr [ %100, %96 ], [ %105, %101 ]
  %108 = load ptr, ptr %93, align 8, !tbaa !49
  tail call void @_ZN7sc_core12sc_process_b16add_static_eventERKNS_8sc_eventE(ptr noundef nonnull align 8 dereferenceable(357) %108, ptr noundef nonnull align 8 dereferenceable(160) %107)
  %indvars.iv.next78 = add nuw nsw i64 %indvars.iv77, 1
  %exitcond81.not = icmp eq i64 %indvars.iv.next78, %wide.trip.count80
  br i1 %exitcond81.not, label %.loopexit, label %.lr.ph64, !llvm.loop !51

.loopexit:                                        ; preds = %106, %._crit_edge, %.lr.ph66
  %indvars.iv.next83 = add nuw nsw i64 %indvars.iv82, 1
  %109 = load ptr, ptr %3, align 8, !tbaa !5
  %110 = tail call noundef i32 @_ZNK7sc_core12sc_bind_info4sizeEv(ptr noundef nonnull align 8 dereferenceable(96) %109)
  %111 = sext i32 %110 to i64
  %112 = icmp slt i64 %indvars.iv.next83, %111
  br i1 %112, label %.lr.ph66, label %._crit_edge67, !llvm.loop !52

113:                                              ; preds = %._crit_edge67
  %114 = load ptr, ptr %3, align 8, !tbaa !5
  %115 = tail call noundef i32 @_ZNK7sc_core12sc_bind_info8max_sizeEv(ptr noundef nonnull align 8 dereferenceable(96) %114)
  %116 = call i32 (ptr, ptr, ...) @sprintf(ptr noundef nonnull dereferenceable(1) %2, ptr noundef nonnull dereferenceable(1) @.str.7, i32 noundef %28, i32 noundef %115) #7
  call void @_ZNK7sc_core12sc_port_base12report_errorEPKcS2_(ptr noundef nonnull align 8 dereferenceable(120) %0, ptr noundef nonnull @_ZN7sc_core23SC_ID_COMPLETE_BINDING_E, ptr noundef nonnull %2)
  br label %117

117:                                              ; preds = %113, %._crit_edge67
  %118 = load ptr, ptr %3, align 8, !tbaa !5
  %119 = call noundef i32 @_ZNK7sc_core12sc_bind_info6policyEv(ptr noundef nonnull align 8 dereferenceable(96) %118)
  switch i32 %119, label %131 [
    i32 0, label %120
    i32 2, label %122
  ]

120:                                              ; preds = %117
  %121 = icmp slt i32 %28, 1
  br i1 %121, label %.sink.split, label %131

122:                                              ; preds = %117
  %123 = load ptr, ptr %3, align 8, !tbaa !5
  %124 = call noundef i32 @_ZNK7sc_core12sc_bind_info8max_sizeEv(ptr noundef nonnull align 8 dereferenceable(96) %123)
  %125 = icmp slt i32 %28, %124
  %126 = icmp slt i32 %28, 1
  %or.cond = or i1 %126, %125
  br i1 %or.cond, label %127, label %131

127:                                              ; preds = %122
  %128 = load ptr, ptr %3, align 8, !tbaa !5
  %129 = call noundef i32 @_ZNK7sc_core12sc_bind_info8max_sizeEv(ptr noundef nonnull align 8 dereferenceable(96) %128)
  %130 = call i32 (ptr, ptr, ...) @sprintf(ptr noundef nonnull dereferenceable(1) %2, ptr noundef nonnull dereferenceable(1) @.str.9, i32 noundef %28, i32 noundef %129) #7
  br label %.sink.split

.sink.split:                                      ; preds = %120, %127
  %.sink = phi ptr [ %2, %127 ], [ @.str.8, %120 ]
  call void @_ZNK7sc_core12sc_port_base12report_errorEPKcS2_(ptr noundef nonnull align 8 dereferenceable(120) %0, ptr noundef nonnull @_ZN7sc_core23SC_ID_COMPLETE_BINDING_E, ptr noundef nonnull %.sink)
  br label %131

131:                                              ; preds = %.sink.split, %117, %122, %120
  %132 = load ptr, ptr %3, align 8, !tbaa !5
  %133 = getelementptr inbounds i8, ptr %132, i64 72
  %134 = call noundef i64 @_ZNKSt6vectorIPN7sc_core10sc_bind_efESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %133) #7
  %135 = trunc i64 %134 to i32
  %136 = icmp sgt i32 %135, 0
  br i1 %136, label %.lr.ph70.preheader, label %._crit_edge71

.lr.ph70.preheader:                               ; preds = %131
  %wide.trip.count88 = and i64 %134, 2147483647
  br label %.lr.ph70

._crit_edge71:                                    ; preds = %150, %131
  %137 = load ptr, ptr %3, align 8, !tbaa !5
  %138 = getelementptr inbounds i8, ptr %137, i64 72
  call void @_ZNSt6vectorIPN7sc_core10sc_bind_efESaIS2_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %138, i64 noundef 0)
  %139 = load ptr, ptr %3, align 8, !tbaa !5
  %140 = getelementptr inbounds i8, ptr %139, i64 48
  %141 = call noundef i64 @_ZNKSt6vectorIPN7sc_core10sc_bind_efESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %140) #7
  %142 = trunc i64 %141 to i32
  %143 = icmp sgt i32 %142, 0
  br i1 %143, label %.lr.ph74.preheader, label %._crit_edge75

.lr.ph74.preheader:                               ; preds = %._crit_edge71
  %wide.trip.count93 = and i64 %141, 2147483647
  br label %.lr.ph74

.lr.ph70:                                         ; preds = %.lr.ph70.preheader, %150
  %indvars.iv85 = phi i64 [ 0, %.lr.ph70.preheader ], [ %indvars.iv.next86, %150 ]
  %144 = load ptr, ptr %3, align 8, !tbaa !5
  %145 = getelementptr inbounds i8, ptr %144, i64 72
  %146 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core10sc_bind_efESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %145, i64 noundef %indvars.iv85) #7
  %147 = load ptr, ptr %146, align 8, !tbaa !37
  %148 = icmp eq ptr %147, null
  br i1 %148, label %150, label %149

149:                                              ; preds = %.lr.ph70
  call void @_ZN7sc_core10sc_bind_efD1Ev(ptr noundef nonnull align 8 dereferenceable(16) %147) #7
  call void @_ZdlPvm(ptr noundef nonnull %147, i64 noundef 16) #9
  br label %150

150:                                              ; preds = %.lr.ph70, %149
  %indvars.iv.next86 = add nuw nsw i64 %indvars.iv85, 1
  %exitcond89.not = icmp eq i64 %indvars.iv.next86, %wide.trip.count88
  br i1 %exitcond89.not, label %._crit_edge71, label %.lr.ph70, !llvm.loop !53

._crit_edge75:                                    ; preds = %161, %._crit_edge71
  %151 = load ptr, ptr %3, align 8, !tbaa !5
  %152 = getelementptr inbounds i8, ptr %151, i64 48
  call void @_ZNSt6vectorIPN7sc_core10sc_bind_efESaIS2_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %152, i64 noundef 0)
  %153 = load ptr, ptr %3, align 8, !tbaa !5
  %154 = getelementptr inbounds i8, ptr %153, i64 41
  store i8 1, ptr %154, align 1, !tbaa !22
  br label %162

.lr.ph74:                                         ; preds = %.lr.ph74.preheader, %161
  %indvars.iv90 = phi i64 [ 0, %.lr.ph74.preheader ], [ %indvars.iv.next91, %161 ]
  %155 = load ptr, ptr %3, align 8, !tbaa !5
  %156 = getelementptr inbounds i8, ptr %155, i64 48
  %157 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core10sc_bind_efESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %156, i64 noundef %indvars.iv90) #7
  %158 = load ptr, ptr %157, align 8, !tbaa !37
  %159 = icmp eq ptr %158, null
  br i1 %159, label %161, label %160

160:                                              ; preds = %.lr.ph74
  call void @_ZN7sc_core10sc_bind_efD1Ev(ptr noundef nonnull align 8 dereferenceable(16) %158) #7
  call void @_ZdlPvm(ptr noundef nonnull %158, i64 noundef 16) #9
  br label %161

161:                                              ; preds = %.lr.ph74, %160
  %indvars.iv.next91 = add nuw nsw i64 %indvars.iv90, 1
  %exitcond94.not = icmp eq i64 %indvars.iv.next91, %wide.trip.count93
  br i1 %exitcond94.not, label %._crit_edge75, label %.lr.ph74, !llvm.loop !54

162:                                              ; preds = %6, %._crit_edge75
  call void @llvm.lifetime.end.p0(i64 128, ptr nonnull %2) #7
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIPN7sc_core10sc_bind_efESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core10sc_bind_efESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIPN7sc_core10sc_bind_efESaIS2_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #4 align 2

declare void @_ZN7sc_core10sc_bind_efD1Ev(ptr) local_unnamed_addr

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }
attributes #8 = { noreturn nounwind }
attributes #9 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 112}
!6 = !{!"_ZTSN7sc_core12sc_port_baseE", !7, i64 0, !8, i64 112}
!7 = !{!"_ZTSN7sc_core9sc_objectE", !8, i64 8, !11, i64 16, !15, i64 40, !19, i64 64, !8, i64 96, !8, i64 104}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"_ZTSSt6vectorIPN7sc_core8sc_eventESaIS2_EE", !12, i64 0}
!12 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE", !13, i64 0}
!13 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE12_Vector_implE", !14, i64 0}
!14 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE17_Vector_impl_dataE", !8, i64 0, !8, i64 8, !8, i64 16}
!15 = !{!"_ZTSSt6vectorIPN7sc_core9sc_objectESaIS2_EE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE17_Vector_impl_dataE", !8, i64 0, !8, i64 8, !8, i64 16}
!19 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !20, i64 0, !21, i64 8, !9, i64 16}
!20 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !8, i64 0}
!21 = !{!"long", !9, i64 0}
!22 = !{!23, !30, i64 41}
!23 = !{!"_ZTSN7sc_core12sc_bind_infoE", !24, i64 0, !25, i64 4, !26, i64 8, !30, i64 32, !24, i64 36, !30, i64 40, !30, i64 41, !31, i64 48, !31, i64 72}
!24 = !{!"int", !9, i64 0}
!25 = !{!"_ZTSN7sc_core14sc_port_policyE", !9, i64 0}
!26 = !{!"_ZTSSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EE", !27, i64 0}
!27 = !{!"_ZTSSt12_Vector_baseIPN7sc_core12sc_bind_elemESaIS2_EE", !28, i64 0}
!28 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core12sc_bind_elemESaIS2_EE12_Vector_implE", !29, i64 0}
!29 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core12sc_bind_elemESaIS2_EE17_Vector_impl_dataE", !8, i64 0, !8, i64 8, !8, i64 16}
!30 = !{!"bool", !9, i64 0}
!31 = !{!"_ZTSSt6vectorIPN7sc_core10sc_bind_efESaIS2_EE", !32, i64 0}
!32 = !{!"_ZTSSt12_Vector_baseIPN7sc_core10sc_bind_efESaIS2_EE", !33, i64 0}
!33 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core10sc_bind_efESaIS2_EE12_Vector_implE", !34, i64 0}
!34 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core10sc_bind_efESaIS2_EE17_Vector_impl_dataE", !8, i64 0, !8, i64 8, !8, i64 16}
!35 = !{i8 0, i8 2}
!36 = !{}
!37 = !{!8, !8, i64 0}
!38 = !{!39, !8, i64 8}
!39 = !{!"_ZTSN7sc_core12sc_bind_elemE", !8, i64 0, !8, i64 8}
!40 = distinct !{!40, !41}
!41 = !{!"llvm.loop.mustprogress"}
!42 = !{!43, !43, i64 0}
!43 = !{!"vtable pointer", !10, i64 0}
!44 = !{!39, !8, i64 0}
!45 = !{!23, !24, i64 36}
!46 = !{!23, !30, i64 40}
!47 = !{!48, !8, i64 8}
!48 = !{!"_ZTSN7sc_core10sc_bind_efE", !8, i64 0, !8, i64 8}
!49 = !{!48, !8, i64 0}
!50 = distinct !{!50, !41}
!51 = distinct !{!51, !41}
!52 = distinct !{!52, !41}
!53 = distinct !{!53, !41}
!54 = distinct !{!54, !41}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass