; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/kernel (sc_event)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_core::sc_time" = type { i64 }
%"class.sc_core::sc_event" = type { %"class.std::__cxx11::basic_string", ptr, ptr, i32, i32, ptr, %"class.std::vector", %"class.std::vector", %"class.std::vector.3", %"class.std::vector.3" }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<sc_core::sc_method_process *, std::allocator<sc_core::sc_method_process *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_method_process *, std::allocator<sc_core::sc_method_process *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_method_process *, std::allocator<sc_core::sc_method_process *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_method_process *, std::allocator<sc_core::sc_method_process *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@.str.1 = external hidden unnamed_addr constant [84 x i8], align 1
@_ZN7sc_core12SC_ZERO_TIMEE = external global %"class.sc_core::sc_time", align 8
@_ZN7sc_core21SC_ID_NOTIFY_DELAYED_E = external constant [0 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK7sc_core7sc_timeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_ZN7sc_core13sc_simcontext15add_delta_eventEPNS_8sc_eventE(ptr noundef nonnull align 8 dereferenceable(344), ptr noundef) #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN7sc_coreplERKNS_7sc_timeES2_(ptr dead_on_unwind noalias writable sret(%"class.sc_core::sc_time") align 8, ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNK7sc_core13sc_simcontext10time_stampEv(ptr noundef nonnull align 8 dereferenceable(344)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN7sc_core14sc_event_timednwEm(i64 noundef) #4 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core14sc_event_timedC2EPNS_8sc_eventERKNS_7sc_timeE(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef, ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #5 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7sc_core14sc_event_timeddlEPvm(ptr noundef, i64 noundef) #4 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN7sc_core13sc_simcontext15add_timed_eventEPNS_14sc_event_timedE(ptr noundef nonnull align 8 dereferenceable(344), ptr noundef) #3 align 2

; Function Attrs: mustprogress uwtable
declare hidden void @_ZN7sc_coreL22sc_warn_notify_delayedEv() #5

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core8sc_event14notify_delayedERKNS_7sc_timeE(ptr noundef nonnull align 8 dereferenceable(160) %0, ptr noundef nonnull align 8 dereferenceable(8) %1) #5 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca %"class.sc_core::sc_time", align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i1, align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %10 = load ptr, ptr %3, align 8
  call void @_ZN7sc_coreL22sc_warn_notify_delayedEv()
  %11 = getelementptr inbounds %"class.sc_core::sc_event", ptr %10, i32 0, i32 3
  %12 = load i32, ptr %11, align 8, !tbaa !9
  %13 = icmp ne i32 %12, 0
  br i1 %13, label %14, label %15

14:                                               ; preds = %2
  call void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef 2, ptr noundef @_ZN7sc_core21SC_ID_NOTIFY_DELAYED_E, ptr noundef null, ptr noundef @.str.1, i32 noundef 189)
  br label %15

15:                                               ; preds = %14, %2
  %16 = load ptr, ptr %4, align 8, !tbaa !5
  %17 = call noundef zeroext i1 @_ZNK7sc_core7sc_timeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(8) %16, ptr noundef nonnull align 8 dereferenceable(8) @_ZN7sc_core12SC_ZERO_TIMEE)
  br i1 %17, label %18, label %24

18:                                               ; preds = %15
  %19 = getelementptr inbounds %"class.sc_core::sc_event", ptr %10, i32 0, i32 2
  %20 = load ptr, ptr %19, align 8, !tbaa !24
  %21 = call noundef i32 @_ZN7sc_core13sc_simcontext15add_delta_eventEPNS_8sc_eventE(ptr noundef nonnull align 8 dereferenceable(344) %20, ptr noundef %10)
  %22 = getelementptr inbounds %"class.sc_core::sc_event", ptr %10, i32 0, i32 4
  store i32 %21, ptr %22, align 4, !tbaa !25
  %23 = getelementptr inbounds %"class.sc_core::sc_event", ptr %10, i32 0, i32 3
  store i32 1, ptr %23, align 8, !tbaa !9
  br label %46

24:                                               ; preds = %15
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #6
  %25 = call noundef ptr @_ZN7sc_core14sc_event_timednwEm(i64 noundef 16)
  store i1 true, ptr %9, align 1
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #6
  %26 = getelementptr inbounds %"class.sc_core::sc_event", ptr %10, i32 0, i32 2
  %27 = load ptr, ptr %26, align 8, !tbaa !24
  %28 = invoke noundef nonnull align 8 dereferenceable(8) ptr @_ZNK7sc_core13sc_simcontext10time_stampEv(ptr noundef nonnull align 8 dereferenceable(344) %27)
          to label %29 unwind label %39

29:                                               ; preds = %24
  %30 = load ptr, ptr %4, align 8, !tbaa !5
  invoke void @_ZN7sc_coreplERKNS_7sc_timeES2_(ptr dead_on_unwind writable sret(%"class.sc_core::sc_time") align 8 %6, ptr noundef nonnull align 8 dereferenceable(8) %28, ptr noundef nonnull align 8 dereferenceable(8) %30)
          to label %31 unwind label %39

31:                                               ; preds = %29
  invoke void @_ZN7sc_core14sc_event_timedC2EPNS_8sc_eventERKNS_7sc_timeE(ptr noundef nonnull align 8 dereferenceable(16) %25, ptr noundef %10, ptr noundef nonnull align 8 dereferenceable(8) %6)
          to label %32 unwind label %39

32:                                               ; preds = %31
  store i1 false, ptr %9, align 1
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #6
  store ptr %25, ptr %5, align 8, !tbaa !5
  %33 = getelementptr inbounds %"class.sc_core::sc_event", ptr %10, i32 0, i32 2
  %34 = load ptr, ptr %33, align 8, !tbaa !24
  %35 = load ptr, ptr %5, align 8, !tbaa !5
  call void @_ZN7sc_core13sc_simcontext15add_timed_eventEPNS_14sc_event_timedE(ptr noundef nonnull align 8 dereferenceable(344) %34, ptr noundef %35)
  %36 = load ptr, ptr %5, align 8, !tbaa !5
  %37 = getelementptr inbounds %"class.sc_core::sc_event", ptr %10, i32 0, i32 5
  store ptr %36, ptr %37, align 8, !tbaa !26
  %38 = getelementptr inbounds %"class.sc_core::sc_event", ptr %10, i32 0, i32 3
  store i32 2, ptr %38, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #6
  br label %46

39:                                               ; preds = %31, %29, %24
  %40 = landingpad { ptr, i32 }
          cleanup
  %41 = extractvalue { ptr, i32 } %40, 0
  store ptr %41, ptr %7, align 8
  %42 = extractvalue { ptr, i32 } %40, 1
  store i32 %42, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #6
  %43 = load i1, ptr %9, align 1
  br i1 %43, label %44, label %45

44:                                               ; preds = %39
  call void @_ZN7sc_core14sc_event_timeddlEPvm(ptr noundef %25, i64 noundef 16) #6
  br label %45

45:                                               ; preds = %44, %39
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #6
  br label %47

46:                                               ; preds = %32, %18
  ret void

47:                                               ; preds = %45
  %48 = load ptr, ptr %7, align 8
  %49 = load i32, ptr %8, align 4
  %50 = insertvalue { ptr, i32 } poison, ptr %48, 0
  %51 = insertvalue { ptr, i32 } %50, i32 %49, 1
  resume { ptr, i32 } %51
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !14, i64 48}
!10 = !{!"_ZTSN7sc_core8sc_eventE", !11, i64 0, !6, i64 32, !6, i64 40, !14, i64 48, !15, i64 52, !6, i64 56, !16, i64 64, !16, i64 88, !20, i64 112, !20, i64 136}
!11 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !12, i64 0, !13, i64 8, !7, i64 16}
!12 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!13 = !{!"long", !7, i64 0}
!14 = !{!"_ZTSN7sc_core8sc_event8notify_tE", !7, i64 0}
!15 = !{!"int", !7, i64 0}
!16 = !{!"_ZTSSt6vectorIPN7sc_core17sc_method_processESaIS2_EE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIPN7sc_core17sc_method_processESaIS2_EE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core17sc_method_processESaIS2_EE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core17sc_method_processESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!20 = !{!"_ZTSSt6vectorIPN7sc_core17sc_thread_processESaIS2_EE", !21, i64 0}
!21 = !{!"_ZTSSt12_Vector_baseIPN7sc_core17sc_thread_processESaIS2_EE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core17sc_thread_processESaIS2_EE12_Vector_implE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core17sc_thread_processESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!24 = !{!10, !6, i64 40}
!25 = !{!10, !15, i64 52}
!26 = !{!10, !6, i64 56}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_core::sc_time" = type { i64 }

@.str.1 = external hidden unnamed_addr constant [84 x i8], align 1
@_ZN7sc_core12SC_ZERO_TIMEE = external global %"class.sc_core::sc_time", align 8
@_ZN7sc_core21SC_ID_NOTIFY_DELAYED_E = external constant [0 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK7sc_core7sc_timeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_ZN7sc_core13sc_simcontext15add_delta_eventEPNS_8sc_eventE(ptr noundef nonnull align 8 dereferenceable(344), ptr noundef) local_unnamed_addr #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN7sc_coreplERKNS_7sc_timeES2_(ptr dead_on_unwind noalias writable sret(%"class.sc_core::sc_time") align 8, ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNK7sc_core13sc_simcontext10time_stampEv(ptr noundef nonnull align 8 dereferenceable(344)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN7sc_core14sc_event_timednwEm(i64 noundef) local_unnamed_addr #4 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core14sc_event_timedC2EPNS_8sc_eventERKNS_7sc_timeE(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef, ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #5 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7sc_core14sc_event_timeddlEPvm(ptr noundef, i64 noundef) local_unnamed_addr #4 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN7sc_core13sc_simcontext15add_timed_eventEPNS_14sc_event_timedE(ptr noundef nonnull align 8 dereferenceable(344), ptr noundef) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress uwtable
declare hidden void @_ZN7sc_coreL22sc_warn_notify_delayedEv() local_unnamed_addr #5

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core8sc_event14notify_delayedERKNS_7sc_timeE(ptr noundef nonnull align 8 dereferenceable(160) %0, ptr noundef nonnull align 8 dereferenceable(8) %1) local_unnamed_addr #5 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca %"class.sc_core::sc_time", align 8
  tail call void @_ZN7sc_coreL22sc_warn_notify_delayedEv()
  %4 = getelementptr inbounds i8, ptr %0, i64 48
  %5 = load i32, ptr %4, align 8, !tbaa !5
  %.not = icmp eq i32 %5, 0
  br i1 %.not, label %7, label %6

6:                                                ; preds = %2
  tail call void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef 2, ptr noundef nonnull @_ZN7sc_core21SC_ID_NOTIFY_DELAYED_E, ptr noundef null, ptr noundef nonnull @.str.1, i32 noundef 189)
  br label %7

7:                                                ; preds = %6, %2
  %8 = tail call noundef zeroext i1 @_ZNK7sc_core7sc_timeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(8) %1, ptr noundef nonnull align 8 dereferenceable(8) @_ZN7sc_core12SC_ZERO_TIMEE)
  br i1 %8, label %9, label %14

9:                                                ; preds = %7
  %10 = getelementptr inbounds i8, ptr %0, i64 40
  %11 = load ptr, ptr %10, align 8, !tbaa !23
  %12 = tail call noundef i32 @_ZN7sc_core13sc_simcontext15add_delta_eventEPNS_8sc_eventE(ptr noundef nonnull align 8 dereferenceable(344) %11, ptr noundef nonnull %0)
  %13 = getelementptr inbounds i8, ptr %0, i64 52
  store i32 %12, ptr %13, align 4, !tbaa !24
  br label %25

14:                                               ; preds = %7
  %15 = tail call noundef ptr @_ZN7sc_core14sc_event_timednwEm(i64 noundef 16)
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #6
  %16 = getelementptr inbounds i8, ptr %0, i64 40
  %17 = load ptr, ptr %16, align 8, !tbaa !23
  %18 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNK7sc_core13sc_simcontext10time_stampEv(ptr noundef nonnull align 8 dereferenceable(344) %17)
  invoke void @_ZN7sc_coreplERKNS_7sc_timeES2_(ptr dead_on_unwind nonnull writable sret(%"class.sc_core::sc_time") align 8 %3, ptr noundef nonnull align 8 dereferenceable(8) %18, ptr noundef nonnull align 8 dereferenceable(8) %1)
          to label %19 unwind label %23

19:                                               ; preds = %14
  invoke void @_ZN7sc_core14sc_event_timedC2EPNS_8sc_eventERKNS_7sc_timeE(ptr noundef nonnull align 8 dereferenceable(16) %15, ptr noundef nonnull %0, ptr noundef nonnull align 8 dereferenceable(8) %3)
          to label %20 unwind label %23

20:                                               ; preds = %19
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #6
  %21 = load ptr, ptr %16, align 8, !tbaa !23
  call void @_ZN7sc_core13sc_simcontext15add_timed_eventEPNS_14sc_event_timedE(ptr noundef nonnull align 8 dereferenceable(344) %21, ptr noundef nonnull %15)
  %22 = getelementptr inbounds i8, ptr %0, i64 56
  store ptr %15, ptr %22, align 8, !tbaa !25
  br label %25

23:                                               ; preds = %19, %14
  %24 = landingpad { ptr, i32 }
          cleanup
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #6
  call void @_ZN7sc_core14sc_event_timeddlEPvm(ptr noundef %15, i64 noundef 16) #6
  resume { ptr, i32 } %24

25:                                               ; preds = %20, %9
  %storemerge = phi i32 [ 2, %20 ], [ 1, %9 ]
  store i32 %storemerge, ptr %4, align 8, !tbaa !5
  ret void
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !13, i64 48}
!6 = !{!"_ZTSN7sc_core8sc_eventE", !7, i64 0, !9, i64 32, !9, i64 40, !13, i64 48, !14, i64 52, !9, i64 56, !15, i64 64, !15, i64 88, !19, i64 112, !19, i64 136}
!7 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !8, i64 0, !12, i64 8, !10, i64 16}
!8 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !9, i64 0}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C++ TBAA"}
!12 = !{!"long", !10, i64 0}
!13 = !{!"_ZTSN7sc_core8sc_event8notify_tE", !10, i64 0}
!14 = !{!"int", !10, i64 0}
!15 = !{!"_ZTSSt6vectorIPN7sc_core17sc_method_processESaIS2_EE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseIPN7sc_core17sc_method_processESaIS2_EE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core17sc_method_processESaIS2_EE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core17sc_method_processESaIS2_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!19 = !{!"_ZTSSt6vectorIPN7sc_core17sc_thread_processESaIS2_EE", !20, i64 0}
!20 = !{!"_ZTSSt12_Vector_baseIPN7sc_core17sc_thread_processESaIS2_EE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core17sc_thread_processESaIS2_EE12_Vector_implE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core17sc_thread_processESaIS2_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!23 = !{!6, !9, i64 40}
!24 = !{!6, !14, i64 52}
!25 = !{!6, !9, i64 56}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass