; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/ShellPkg/Library (GetDeviceConsistMappingInfo)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.DEV_PATH_CONSIST_MAPPING_TABLE = type { i8, i8, ptr, ptr }
%struct.DEVICE_CONSIST_MAPPING_INFO = type { i64, i32, %struct.POOL_PRINT, i8 }
%struct.POOL_PRINT = type { ptr, i64 }

@.str = external hidden unnamed_addr constant [155 x i8], align 1
@.str.15 = external hidden unnamed_addr constant [28 x i8], align 1
@DevPathConsistMappingTable = external dso_local global [21 x %struct.DEV_PATH_CONSIST_MAPPING_TABLE], align 16
@.str.19 = external hidden unnamed_addr constant [27 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare zeroext i8 @DebugAssertEnabled() #1

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local void @DevPathSerialDefault(ptr noundef, ptr noundef) #2

declare zeroext i8 @IsDevicePathEnd(ptr noundef) #1

declare ptr @NextDevicePathNode(ptr noundef) #1

; Function Attrs: nounwind uwtable
define dso_local i64 @GetDeviceConsistMappingInfo(ptr noundef %0, ptr noundef %1) #2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i64, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  br label %7

7:                                                ; preds = %2
  %8 = call zeroext i8 @DebugAssertEnabled()
  %9 = icmp ne i8 %8, 0
  br i1 %9, label %10, label %15

10:                                               ; preds = %7
  %11 = load ptr, ptr %4, align 8, !tbaa !5
  %12 = icmp ne ptr %11, null
  br i1 %12, label %14, label %13

13:                                               ; preds = %10
  call void @DebugAssert(ptr noundef @.str, i64 noundef 1192, ptr noundef @.str.19)
  br label %14

14:                                               ; preds = %13, %10
  br label %15

15:                                               ; preds = %14, %7
  br label %16

16:                                               ; preds = %15
  br label %17

17:                                               ; preds = %16
  br label %18

18:                                               ; preds = %17
  %19 = call zeroext i8 @DebugAssertEnabled()
  %20 = icmp ne i8 %19, 0
  br i1 %20, label %21, label %26

21:                                               ; preds = %18
  %22 = load ptr, ptr %3, align 8, !tbaa !5
  %23 = icmp ne ptr %22, null
  br i1 %23, label %25, label %24

24:                                               ; preds = %21
  call void @DebugAssert(ptr noundef @.str, i64 noundef 1193, ptr noundef @.str.15)
  br label %25

25:                                               ; preds = %24, %21
  br label %26

26:                                               ; preds = %25, %18
  br label %27

27:                                               ; preds = %26
  br label %28

28:                                               ; preds = %27
  %29 = load ptr, ptr %3, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.DEVICE_CONSIST_MAPPING_INFO, ptr %29, i32 0, i32 2
  %31 = call ptr @SetMem(ptr noundef %30, i64 noundef 16, i8 noundef zeroext 0)
  br label %32

32:                                               ; preds = %77, %28
  %33 = load ptr, ptr %4, align 8, !tbaa !5
  %34 = call zeroext i8 @IsDevicePathEnd(ptr noundef %33)
  %35 = icmp ne i8 %34, 0
  %36 = xor i1 %35, true
  br i1 %36, label %37, label %83

37:                                               ; preds = %32
  store ptr null, ptr %5, align 8, !tbaa !5
  store i64 0, ptr %6, align 8, !tbaa !9
  br label %38

38:                                               ; preds = %70, %37
  %39 = load i64, ptr %6, align 8, !tbaa !9
  %40 = getelementptr inbounds [21 x %struct.DEV_PATH_CONSIST_MAPPING_TABLE], ptr @DevPathConsistMappingTable, i64 0, i64 %39
  %41 = getelementptr inbounds %struct.DEV_PATH_CONSIST_MAPPING_TABLE, ptr %40, i32 0, i32 2
  %42 = load ptr, ptr %41, align 8, !tbaa !11
  %43 = icmp ne ptr %42, null
  br i1 %43, label %44, label %73

44:                                               ; preds = %38
  %45 = load ptr, ptr %4, align 8, !tbaa !5
  %46 = call zeroext i8 @DevicePathType(ptr noundef %45)
  %47 = zext i8 %46 to i32
  %48 = load i64, ptr %6, align 8, !tbaa !9
  %49 = getelementptr inbounds [21 x %struct.DEV_PATH_CONSIST_MAPPING_TABLE], ptr @DevPathConsistMappingTable, i64 0, i64 %48
  %50 = getelementptr inbounds %struct.DEV_PATH_CONSIST_MAPPING_TABLE, ptr %49, i32 0, i32 0
  %51 = load i8, ptr %50, align 8, !tbaa !13
  %52 = zext i8 %51 to i32
  %53 = icmp eq i32 %47, %52
  br i1 %53, label %54, label %69

54:                                               ; preds = %44
  %55 = load ptr, ptr %4, align 8, !tbaa !5
  %56 = call zeroext i8 @DevicePathSubType(ptr noundef %55)
  %57 = zext i8 %56 to i32
  %58 = load i64, ptr %6, align 8, !tbaa !9
  %59 = getelementptr inbounds [21 x %struct.DEV_PATH_CONSIST_MAPPING_TABLE], ptr @DevPathConsistMappingTable, i64 0, i64 %58
  %60 = getelementptr inbounds %struct.DEV_PATH_CONSIST_MAPPING_TABLE, ptr %59, i32 0, i32 1
  %61 = load i8, ptr %60, align 1, !tbaa !14
  %62 = zext i8 %61 to i32
  %63 = icmp eq i32 %57, %62
  br i1 %63, label %64, label %69

64:                                               ; preds = %54
  %65 = load i64, ptr %6, align 8, !tbaa !9
  %66 = getelementptr inbounds [21 x %struct.DEV_PATH_CONSIST_MAPPING_TABLE], ptr @DevPathConsistMappingTable, i64 0, i64 %65
  %67 = getelementptr inbounds %struct.DEV_PATH_CONSIST_MAPPING_TABLE, ptr %66, i32 0, i32 2
  %68 = load ptr, ptr %67, align 8, !tbaa !11
  store ptr %68, ptr %5, align 8, !tbaa !5
  br label %73

69:                                               ; preds = %54, %44
  br label %70

70:                                               ; preds = %69
  %71 = load i64, ptr %6, align 8, !tbaa !9
  %72 = add i64 %71, 1
  store i64 %72, ptr %6, align 8, !tbaa !9
  br label %38, !llvm.loop !15

73:                                               ; preds = %64, %38
  %74 = load ptr, ptr %5, align 8, !tbaa !5
  %75 = icmp ne ptr %74, null
  br i1 %75, label %77, label %76

76:                                               ; preds = %73
  store ptr @DevPathSerialDefault, ptr %5, align 8, !tbaa !5
  br label %77

77:                                               ; preds = %76, %73
  %78 = load ptr, ptr %5, align 8, !tbaa !5
  %79 = load ptr, ptr %4, align 8, !tbaa !5
  %80 = load ptr, ptr %3, align 8, !tbaa !5
  call void %78(ptr noundef %79, ptr noundef %80)
  %81 = load ptr, ptr %4, align 8, !tbaa !5
  %82 = call ptr @NextDevicePathNode(ptr noundef %81)
  store ptr %82, ptr %4, align 8, !tbaa !5
  br label %32, !llvm.loop !17

83:                                               ; preds = %32
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #3
  ret i64 0
}

declare ptr @SetMem(ptr noundef, i64 noundef, i8 noundef zeroext) #1

declare zeroext i8 @DevicePathType(ptr noundef) #1

declare zeroext i8 @DevicePathSubType(ptr noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = !{!12, !6, i64 8}
!12 = !{!"", !7, i64 0, !7, i64 1, !6, i64 8, !6, i64 16}
!13 = !{!12, !7, i64 0}
!14 = !{!12, !7, i64 1}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = distinct !{!17, !16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.DEV_PATH_CONSIST_MAPPING_TABLE = type { i8, i8, ptr, ptr }

@.str = external hidden unnamed_addr constant [155 x i8], align 1
@.str.15 = external hidden unnamed_addr constant [28 x i8], align 1
@DevPathConsistMappingTable = external dso_local local_unnamed_addr global [21 x %struct.DEV_PATH_CONSIST_MAPPING_TABLE], align 16
@.str.19 = external hidden unnamed_addr constant [27 x i8], align 1

declare zeroext i8 @DebugAssertEnabled() local_unnamed_addr #0

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @DevPathSerialDefault(ptr noundef, ptr noundef) local_unnamed_addr #1

declare zeroext i8 @IsDevicePathEnd(ptr noundef) local_unnamed_addr #0

declare ptr @NextDevicePathNode(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local noundef i64 @GetDeviceConsistMappingInfo(ptr noundef %0, ptr noundef %1) local_unnamed_addr #1 {
  %3 = tail call zeroext i8 @DebugAssertEnabled() #2
  %4 = icmp eq i8 %3, 0
  %5 = icmp ne ptr %1, null
  %or.cond = or i1 %5, %4
  br i1 %or.cond, label %7, label %6

6:                                                ; preds = %2
  tail call void @DebugAssert(ptr noundef nonnull @.str, i64 noundef 1192, ptr noundef nonnull @.str.19) #2
  br label %7

7:                                                ; preds = %2, %6
  %8 = tail call zeroext i8 @DebugAssertEnabled() #2
  %9 = icmp eq i8 %8, 0
  %10 = icmp ne ptr %0, null
  %or.cond3 = or i1 %10, %9
  br i1 %or.cond3, label %12, label %11

11:                                               ; preds = %7
  tail call void @DebugAssert(ptr noundef nonnull @.str, i64 noundef 1193, ptr noundef nonnull @.str.15) #2
  br label %12

12:                                               ; preds = %11, %7
  %13 = getelementptr inbounds i8, ptr %0, i64 16
  %14 = tail call ptr @SetMem(ptr noundef nonnull %13, i64 noundef 16, i8 noundef zeroext 0) #2
  %15 = tail call zeroext i8 @IsDevicePathEnd(ptr noundef %1) #2
  %.not25 = icmp eq i8 %15, 0
  br i1 %.not25, label %.preheader, label %._crit_edge

.preheader:                                       ; preds = %12, %.loopexit
  %.01926 = phi ptr [ %34, %.loopexit ], [ %1, %12 ]
  %16 = load ptr, ptr getelementptr inbounds (i8, ptr @DevPathConsistMappingTable, i64 8), align 8, !tbaa !5
  %.not2023 = icmp eq ptr %16, null
  br i1 %.not2023, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %.preheader, %29
  %17 = phi ptr [ %31, %29 ], [ @DevPathConsistMappingTable, %.preheader ]
  %.024 = phi i64 [ %30, %29 ], [ 0, %.preheader ]
  %18 = tail call zeroext i8 @DevicePathType(ptr noundef %.01926) #2
  %19 = load i8, ptr %17, align 8, !tbaa !10
  %20 = icmp eq i8 %18, %19
  br i1 %20, label %21, label %29

21:                                               ; preds = %.lr.ph
  %22 = tail call zeroext i8 @DevicePathSubType(ptr noundef %.01926) #2
  %23 = getelementptr inbounds i8, ptr %17, i64 1
  %24 = load i8, ptr %23, align 1, !tbaa !11
  %25 = icmp eq i8 %22, %24
  br i1 %25, label %26, label %29

26:                                               ; preds = %21
  %27 = getelementptr inbounds i8, ptr %17, i64 8
  %28 = load ptr, ptr %27, align 8, !tbaa !5
  br label %.loopexit

29:                                               ; preds = %.lr.ph, %21
  %30 = add i64 %.024, 1
  %31 = getelementptr inbounds [21 x %struct.DEV_PATH_CONSIST_MAPPING_TABLE], ptr @DevPathConsistMappingTable, i64 0, i64 %30
  %32 = getelementptr inbounds i8, ptr %31, i64 8
  %33 = load ptr, ptr %32, align 8, !tbaa !5
  %.not20 = icmp eq ptr %33, null
  br i1 %.not20, label %.loopexit, label %.lr.ph, !llvm.loop !12

.loopexit:                                        ; preds = %29, %.preheader, %26
  %.018 = phi ptr [ %28, %26 ], [ null, %.preheader ], [ null, %29 ]
  %.not21 = icmp eq ptr %.018, null
  %spec.store.select = select i1 %.not21, ptr @DevPathSerialDefault, ptr %.018
  tail call void %spec.store.select(ptr noundef %.01926, ptr noundef %0) #2
  %34 = tail call ptr @NextDevicePathNode(ptr noundef %.01926) #2
  %35 = tail call zeroext i8 @IsDevicePathEnd(ptr noundef %34) #2
  %.not = icmp eq i8 %35, 0
  br i1 %.not, label %.preheader, label %._crit_edge, !llvm.loop !14

._crit_edge:                                      ; preds = %.loopexit, %12
  ret i64 0
}

declare ptr @SetMem(ptr noundef, i64 noundef, i8 noundef zeroext) local_unnamed_addr #0

declare zeroext i8 @DevicePathType(ptr noundef) local_unnamed_addr #0

declare zeroext i8 @DevicePathSubType(ptr noundef) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !9, i64 8}
!6 = !{!"", !7, i64 0, !7, i64 1, !9, i64 8, !9, i64 16}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!"any pointer", !7, i64 0}
!10 = !{!6, !7, i64 0}
!11 = !{!6, !7, i64 1}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass