; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/NetworkPkg/Ip6Dxe (Ip6CopyAddressByPrefix)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.EFI_IPv6_ADDRESS = type { [16 x i8] }

@.str = external hidden unnamed_addr constant [131 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [44 x i8], align 1
@.str.6 = external hidden unnamed_addr constant [19 x i8], align 1
@.str.7 = external hidden unnamed_addr constant [10 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare ptr @CopyMem(ptr noundef, ptr noundef, i64 noundef) #1

declare zeroext i8 @DebugAssertEnabled() #1

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare ptr @ZeroMem(ptr noundef, i64 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local void @Ip6CopyAddressByPrefix(ptr noundef %0, ptr noundef %1, i8 noundef zeroext %2) #2 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i8, align 1
  %7 = alloca i8, align 1
  %8 = alloca i8, align 1
  %9 = alloca i8, align 1
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i8 %2, ptr %6, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #3
  br label %10

10:                                               ; preds = %3
  %11 = call zeroext i8 @DebugAssertEnabled()
  %12 = icmp ne i8 %11, 0
  br i1 %12, label %13, label %21

13:                                               ; preds = %10
  %14 = load ptr, ptr %4, align 8, !tbaa !5
  %15 = icmp ne ptr %14, null
  br i1 %15, label %16, label %19

16:                                               ; preds = %13
  %17 = load ptr, ptr %5, align 8, !tbaa !5
  %18 = icmp ne ptr %17, null
  br i1 %18, label %20, label %19

19:                                               ; preds = %16, %13
  call void @DebugAssert(ptr noundef @.str, i64 noundef 608, ptr noundef @.str.5)
  br label %20

20:                                               ; preds = %19, %16
  br label %21

21:                                               ; preds = %20, %10
  br label %22

22:                                               ; preds = %21
  br label %23

23:                                               ; preds = %22
  br label %24

24:                                               ; preds = %23
  %25 = call zeroext i8 @DebugAssertEnabled()
  %26 = icmp ne i8 %25, 0
  br i1 %26, label %27, label %33

27:                                               ; preds = %24
  %28 = load i8, ptr %6, align 1, !tbaa !9
  %29 = zext i8 %28 to i32
  %30 = icmp slt i32 %29, 129
  br i1 %30, label %32, label %31

31:                                               ; preds = %27
  call void @DebugAssert(ptr noundef @.str, i64 noundef 609, ptr noundef @.str.6)
  br label %32

32:                                               ; preds = %31, %27
  br label %33

33:                                               ; preds = %32, %24
  br label %34

34:                                               ; preds = %33
  br label %35

35:                                               ; preds = %34
  %36 = load i8, ptr %6, align 1, !tbaa !9
  %37 = zext i8 %36 to i32
  %38 = sdiv i32 %37, 8
  %39 = trunc i32 %38 to i8
  store i8 %39, ptr %7, align 1, !tbaa !9
  %40 = load i8, ptr %6, align 1, !tbaa !9
  %41 = zext i8 %40 to i32
  %42 = srem i32 %41, 8
  %43 = trunc i32 %42 to i8
  store i8 %43, ptr %8, align 1, !tbaa !9
  %44 = load ptr, ptr %4, align 8, !tbaa !5
  %45 = call ptr @ZeroMem(ptr noundef %44, i64 noundef 16)
  %46 = load ptr, ptr %4, align 8, !tbaa !5
  %47 = load ptr, ptr %5, align 8, !tbaa !5
  %48 = load i8, ptr %7, align 1, !tbaa !9
  %49 = zext i8 %48 to i64
  %50 = call ptr @CopyMem(ptr noundef %46, ptr noundef %47, i64 noundef %49)
  %51 = load i8, ptr %8, align 1, !tbaa !9
  %52 = zext i8 %51 to i32
  %53 = icmp sgt i32 %52, 0
  br i1 %53, label %54, label %88

54:                                               ; preds = %35
  %55 = load i8, ptr %8, align 1, !tbaa !9
  %56 = zext i8 %55 to i32
  %57 = sub nsw i32 8, %56
  %58 = shl i32 255, %57
  %59 = trunc i32 %58 to i8
  store i8 %59, ptr %9, align 1, !tbaa !9
  br label %60

60:                                               ; preds = %54
  %61 = call zeroext i8 @DebugAssertEnabled()
  %62 = icmp ne i8 %61, 0
  br i1 %62, label %63, label %69

63:                                               ; preds = %60
  %64 = load i8, ptr %7, align 1, !tbaa !9
  %65 = zext i8 %64 to i32
  %66 = icmp slt i32 %65, 16
  br i1 %66, label %68, label %67

67:                                               ; preds = %63
  call void @DebugAssert(ptr noundef @.str, i64 noundef 620, ptr noundef @.str.7)
  br label %68

68:                                               ; preds = %67, %63
  br label %69

69:                                               ; preds = %68, %60
  br label %70

70:                                               ; preds = %69
  br label %71

71:                                               ; preds = %70
  %72 = load ptr, ptr %5, align 8, !tbaa !5
  %73 = getelementptr inbounds %struct.EFI_IPv6_ADDRESS, ptr %72, i32 0, i32 0
  %74 = load i8, ptr %7, align 1, !tbaa !9
  %75 = zext i8 %74 to i64
  %76 = getelementptr inbounds [16 x i8], ptr %73, i64 0, i64 %75
  %77 = load i8, ptr %76, align 1, !tbaa !9
  %78 = zext i8 %77 to i32
  %79 = load i8, ptr %9, align 1, !tbaa !9
  %80 = zext i8 %79 to i32
  %81 = and i32 %78, %80
  %82 = trunc i32 %81 to i8
  %83 = load ptr, ptr %4, align 8, !tbaa !5
  %84 = getelementptr inbounds %struct.EFI_IPv6_ADDRESS, ptr %83, i32 0, i32 0
  %85 = load i8, ptr %7, align 1, !tbaa !9
  %86 = zext i8 %85 to i64
  %87 = getelementptr inbounds [16 x i8], ptr %84, i64 0, i64 %86
  store i8 %82, ptr %87, align 1, !tbaa !9
  br label %88

88:                                               ; preds = %71, %35
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #3
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [131 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [44 x i8], align 1
@.str.6 = external hidden unnamed_addr constant [19 x i8], align 1
@.str.7 = external hidden unnamed_addr constant [10 x i8], align 1

declare ptr @CopyMem(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #0

declare zeroext i8 @DebugAssertEnabled() local_unnamed_addr #0

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #0

declare ptr @ZeroMem(ptr noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @Ip6CopyAddressByPrefix(ptr noundef %0, ptr noundef %1, i8 noundef zeroext %2) local_unnamed_addr #1 {
  %4 = tail call zeroext i8 @DebugAssertEnabled() #2
  %.not = icmp eq i8 %4, 0
  br i1 %.not, label %9, label %5

5:                                                ; preds = %3
  %6 = icmp ne ptr %0, null
  %7 = icmp ne ptr %1, null
  %or.cond = and i1 %6, %7
  br i1 %or.cond, label %9, label %8

8:                                                ; preds = %5
  tail call void @DebugAssert(ptr noundef nonnull @.str, i64 noundef 608, ptr noundef nonnull @.str.5) #2
  br label %9

9:                                                ; preds = %3, %5, %8
  %10 = tail call zeroext i8 @DebugAssertEnabled() #2
  %11 = icmp eq i8 %10, 0
  %12 = icmp ult i8 %2, -127
  %or.cond4 = or i1 %12, %11
  br i1 %or.cond4, label %14, label %13

13:                                               ; preds = %9
  tail call void @DebugAssert(ptr noundef nonnull @.str, i64 noundef 609, ptr noundef nonnull @.str.6) #2
  br label %14

14:                                               ; preds = %13, %9
  %15 = lshr i8 %2, 3
  %16 = and i8 %2, 7
  %17 = tail call ptr @ZeroMem(ptr noundef %0, i64 noundef 16) #2
  %18 = zext nneg i8 %15 to i64
  %19 = tail call ptr @CopyMem(ptr noundef %0, ptr noundef %1, i64 noundef %18) #2
  %.not23 = icmp eq i8 %16, 0
  br i1 %.not23, label %33, label %20

20:                                               ; preds = %14
  %narrow = sub nuw nsw i8 8, %16
  %21 = zext nneg i8 %narrow to i16
  %22 = shl nuw nsw i16 255, %21
  %23 = tail call zeroext i8 @DebugAssertEnabled() #2
  %24 = icmp eq i8 %23, 0
  %25 = icmp sgt i8 %2, -1
  %or.cond7 = or i1 %25, %24
  br i1 %or.cond7, label %27, label %26

26:                                               ; preds = %20
  tail call void @DebugAssert(ptr noundef nonnull @.str, i64 noundef 620, ptr noundef nonnull @.str.7) #2
  br label %27

27:                                               ; preds = %26, %20
  %28 = getelementptr inbounds [16 x i8], ptr %1, i64 0, i64 %18
  %29 = load i8, ptr %28, align 1, !tbaa !5
  %30 = trunc i16 %22 to i8
  %31 = and i8 %29, %30
  %32 = getelementptr inbounds [16 x i8], ptr %0, i64 0, i64 %18
  store i8 %31, ptr %32, align 1, !tbaa !5
  br label %33

33:                                               ; preds = %27, %14
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass