; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Bus/Ufs (UfsCreateDMCommandDesc)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct._UFS_DEVICE_MANAGEMENT_REQUEST_PACKET = type { i64, ptr, ptr, i8, i8, i8, i8, i32, i32, i8, i8 }
%struct._UFS_PASS_THRU_PRIVATE_DATA = type { i32, ptr, %struct.EFI_EXT_SCSI_PASS_THRU_MODE, %struct._EFI_EXT_SCSI_PASS_THRU_PROTOCOL, ptr, i64, i32, i8, ptr, i8, ptr, ptr, i8, ptr, %struct.UFS_EXPOSED_LUNS }
%struct.EFI_EXT_SCSI_PASS_THRU_MODE = type { i32, i32, i32 }
%struct._EFI_EXT_SCSI_PASS_THRU_PROTOCOL = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr }
%struct.UFS_EXPOSED_LUNS = type { [12 x i8], i16 }
%struct.UTP_TRD = type { i32, i32, i32, i32, i32, i32, i16, i16, i16, i16 }

@.str.10 = external hidden unnamed_addr constant [154 x i8], align 1
@.str.28 = external hidden unnamed_addr constant [79 x i8], align 1
@.str.29 = external hidden unnamed_addr constant [29 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i64 @DivU64x32(i64 noundef, i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare zeroext i8 @DebugAssertEnabled() #1

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) #1

declare i64 @RShiftU64(i64 noundef, i64 noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local i64 @UfsInitQueryRequestUpiu(ptr noundef, i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext, i64 noundef, ptr noundef) #2

; Function Attrs: nounwind uwtable
declare dso_local i64 @UfsAllocateAlignCommonBuffer(ptr noundef, i64 noundef, ptr noundef, ptr noundef, ptr noundef) #2

; Function Attrs: nounwind uwtable
define dso_local i64 @UfsCreateDMCommandDesc(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4) #2 {
  %6 = alloca i64, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i64, align 8
  %13 = alloca ptr, align 8
  %14 = alloca i8, align 1
  %15 = alloca i32, align 4
  %16 = alloca ptr, align 8
  %17 = alloca i8, align 1
  %18 = alloca i64, align 8
  %19 = alloca i64, align 8
  %20 = alloca i32, align 4
  store ptr %0, ptr %7, align 8, !tbaa !5
  store ptr %1, ptr %8, align 8, !tbaa !5
  store ptr %2, ptr %9, align 8, !tbaa !5
  store ptr %3, ptr %10, align 8, !tbaa !5
  store ptr %4, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %14) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %17) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %19) #3
  br label %21

21:                                               ; preds = %5
  %22 = call zeroext i8 @DebugAssertEnabled()
  %23 = icmp ne i8 %22, 0
  br i1 %23, label %24, label %35

24:                                               ; preds = %21
  %25 = load ptr, ptr %7, align 8, !tbaa !5
  %26 = icmp ne ptr %25, null
  br i1 %26, label %27, label %33

27:                                               ; preds = %24
  %28 = load ptr, ptr %8, align 8, !tbaa !5
  %29 = icmp ne ptr %28, null
  br i1 %29, label %30, label %33

30:                                               ; preds = %27
  %31 = load ptr, ptr %9, align 8, !tbaa !5
  %32 = icmp ne ptr %31, null
  br i1 %32, label %34, label %33

33:                                               ; preds = %30, %27, %24
  call void @DebugAssert(ptr noundef @.str.10, i64 noundef 522, ptr noundef @.str.28)
  br label %34

34:                                               ; preds = %33, %30
  br label %35

35:                                               ; preds = %34, %21
  br label %36

36:                                               ; preds = %35
  br label %37

37:                                               ; preds = %36
  %38 = load ptr, ptr %8, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct._UFS_DEVICE_MANAGEMENT_REQUEST_PACKET, ptr %38, i32 0, i32 3
  %40 = load i8, ptr %39, align 8, !tbaa !9
  store i8 %40, ptr %14, align 1, !tbaa !13
  %41 = load i8, ptr %14, align 1, !tbaa !13
  %42 = zext i8 %41 to i32
  %43 = icmp sgt i32 %42, 8
  br i1 %43, label %48, label %44

44:                                               ; preds = %37
  %45 = load i8, ptr %14, align 1, !tbaa !13
  %46 = zext i8 %45 to i32
  %47 = icmp eq i32 %46, 0
  br i1 %47, label %48, label %49

48:                                               ; preds = %44, %37
  store i64 -9223372036854775806, ptr %6, align 8
  store i32 1, ptr %20, align 4
  br label %276

49:                                               ; preds = %44
  %50 = load ptr, ptr %8, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct._UFS_DEVICE_MANAGEMENT_REQUEST_PACKET, ptr %50, i32 0, i32 9
  %52 = load i8, ptr %51, align 4, !tbaa !14
  store i8 %52, ptr %17, align 1, !tbaa !13
  %53 = load i8, ptr %17, align 1, !tbaa !13
  %54 = zext i8 %53 to i32
  %55 = icmp eq i32 %54, 2
  br i1 %55, label %56, label %63

56:                                               ; preds = %49
  %57 = load ptr, ptr %8, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct._UFS_DEVICE_MANAGEMENT_REQUEST_PACKET, ptr %57, i32 0, i32 7
  %59 = load i32, ptr %58, align 4, !tbaa !15
  store i32 %59, ptr %15, align 4, !tbaa !16
  %60 = load ptr, ptr %8, align 8, !tbaa !5
  %61 = getelementptr inbounds %struct._UFS_DEVICE_MANAGEMENT_REQUEST_PACKET, ptr %60, i32 0, i32 1
  %62 = load ptr, ptr %61, align 8, !tbaa !17
  store ptr %62, ptr %16, align 8, !tbaa !5
  br label %76

63:                                               ; preds = %49
  %64 = load i8, ptr %17, align 1, !tbaa !13
  %65 = zext i8 %64 to i32
  %66 = icmp eq i32 %65, 1
  br i1 %66, label %67, label %74

67:                                               ; preds = %63
  %68 = load ptr, ptr %8, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct._UFS_DEVICE_MANAGEMENT_REQUEST_PACKET, ptr %68, i32 0, i32 8
  %70 = load i32, ptr %69, align 8, !tbaa !18
  store i32 %70, ptr %15, align 4, !tbaa !16
  %71 = load ptr, ptr %8, align 8, !tbaa !5
  %72 = getelementptr inbounds %struct._UFS_DEVICE_MANAGEMENT_REQUEST_PACKET, ptr %71, i32 0, i32 2
  %73 = load ptr, ptr %72, align 8, !tbaa !19
  store ptr %73, ptr %16, align 8, !tbaa !5
  br label %75

74:                                               ; preds = %63
  store i32 0, ptr %15, align 4, !tbaa !16
  store ptr null, ptr %16, align 8, !tbaa !5
  br label %75

75:                                               ; preds = %74, %67
  br label %76

76:                                               ; preds = %75, %56
  %77 = load i8, ptr %14, align 1, !tbaa !13
  %78 = zext i8 %77 to i32
  %79 = icmp ne i32 %78, 6
  br i1 %79, label %80, label %95

80:                                               ; preds = %76
  %81 = load i8, ptr %14, align 1, !tbaa !13
  %82 = zext i8 %81 to i32
  %83 = icmp ne i32 %82, 7
  br i1 %83, label %84, label %95

84:                                               ; preds = %80
  %85 = load i8, ptr %14, align 1, !tbaa !13
  %86 = zext i8 %85 to i32
  %87 = icmp ne i32 %86, 8
  br i1 %87, label %88, label %95

88:                                               ; preds = %84
  %89 = load i32, ptr %15, align 4, !tbaa !16
  %90 = icmp eq i32 %89, 0
  br i1 %90, label %94, label %91

91:                                               ; preds = %88
  %92 = load ptr, ptr %16, align 8, !tbaa !5
  %93 = icmp eq ptr %92, null
  br i1 %93, label %94, label %95

94:                                               ; preds = %91, %88
  store i64 -9223372036854775806, ptr %6, align 8
  store i32 1, ptr %20, align 4
  br label %276

95:                                               ; preds = %91, %84, %80, %76
  %96 = load i8, ptr %14, align 1, !tbaa !13
  %97 = zext i8 %96 to i32
  %98 = icmp eq i32 %97, 6
  br i1 %98, label %107, label %99

99:                                               ; preds = %95
  %100 = load i8, ptr %14, align 1, !tbaa !13
  %101 = zext i8 %100 to i32
  %102 = icmp eq i32 %101, 7
  br i1 %102, label %107, label %103

103:                                              ; preds = %99
  %104 = load i8, ptr %14, align 1, !tbaa !13
  %105 = zext i8 %104 to i32
  %106 = icmp eq i32 %105, 8
  br i1 %106, label %107, label %114

107:                                              ; preds = %103, %99, %95
  %108 = load i32, ptr %15, align 4, !tbaa !16
  %109 = icmp ne i32 %108, 0
  br i1 %109, label %113, label %110

110:                                              ; preds = %107
  %111 = load ptr, ptr %16, align 8, !tbaa !5
  %112 = icmp ne ptr %111, null
  br i1 %112, label %113, label %114

113:                                              ; preds = %110, %107
  store i64 -9223372036854775806, ptr %6, align 8
  store i32 1, ptr %20, align 4
  br label %276

114:                                              ; preds = %110, %103
  %115 = load i8, ptr %14, align 1, !tbaa !13
  %116 = zext i8 %115 to i32
  %117 = icmp eq i32 %116, 4
  br i1 %117, label %118, label %123

118:                                              ; preds = %114
  %119 = load i32, ptr %15, align 4, !tbaa !16
  %120 = zext i32 %119 to i64
  %121 = icmp ne i64 %120, 4
  br i1 %121, label %122, label %123

122:                                              ; preds = %118
  store i64 -9223372036854775806, ptr %6, align 8
  store i32 1, ptr %20, align 4
  br label %276

123:                                              ; preds = %118, %114
  %124 = load i8, ptr %14, align 1, !tbaa !13
  %125 = zext i8 %124 to i32
  %126 = icmp eq i32 %125, 2
  br i1 %126, label %131, label %127

127:                                              ; preds = %123
  %128 = load i8, ptr %14, align 1, !tbaa !13
  %129 = zext i8 %128 to i32
  %130 = icmp eq i32 %129, 1
  br i1 %130, label %131, label %146

131:                                              ; preds = %127, %123
  %132 = load i32, ptr %15, align 4, !tbaa !16
  %133 = urem i32 %132, 8
  %134 = icmp eq i32 %133, 0
  br i1 %134, label %135, label %137

135:                                              ; preds = %131
  %136 = load i32, ptr %15, align 4, !tbaa !16
  br label %142

137:                                              ; preds = %131
  %138 = load i32, ptr %15, align 4, !tbaa !16
  %139 = udiv i32 %138, 8
  %140 = add i32 %139, 1
  %141 = mul i32 %140, 8
  br label %142

142:                                              ; preds = %137, %135
  %143 = phi i32 [ %136, %135 ], [ %141, %137 ]
  %144 = zext i32 %143 to i64
  %145 = add i64 64, %144
  store i64 %145, ptr %12, align 8, !tbaa !20
  br label %147

146:                                              ; preds = %127
  store i64 64, ptr %12, align 8, !tbaa !20
  br label %147

147:                                              ; preds = %146, %142
  %148 = load ptr, ptr %7, align 8, !tbaa !5
  %149 = load i64, ptr %12, align 8, !tbaa !20
  %150 = load ptr, ptr %10, align 8, !tbaa !5
  %151 = load ptr, ptr %11, align 8, !tbaa !5
  %152 = call i64 @UfsAllocateAlignCommonBuffer(ptr noundef %148, i64 noundef %149, ptr noundef %150, ptr noundef %18, ptr noundef %151)
  store i64 %152, ptr %19, align 8, !tbaa !20
  %153 = load i64, ptr %19, align 8, !tbaa !20
  %154 = icmp slt i64 %153, 0
  br i1 %154, label %155, label %157

155:                                              ; preds = %147
  %156 = load i64, ptr %19, align 8, !tbaa !20
  store i64 %156, ptr %6, align 8
  store i32 1, ptr %20, align 4
  br label %276

157:                                              ; preds = %147
  %158 = load ptr, ptr %10, align 8, !tbaa !5
  %159 = load ptr, ptr %158, align 8, !tbaa !5
  store ptr %159, ptr %13, align 8, !tbaa !5
  br label %160

160:                                              ; preds = %157
  %161 = call zeroext i8 @DebugAssertEnabled()
  %162 = icmp ne i8 %161, 0
  br i1 %162, label %163, label %168

163:                                              ; preds = %160
  %164 = load ptr, ptr %13, align 8, !tbaa !5
  %165 = icmp ne ptr %164, null
  br i1 %165, label %167, label %166

166:                                              ; preds = %163
  call void @DebugAssert(ptr noundef @.str.10, i64 noundef 570, ptr noundef @.str.29)
  br label %167

167:                                              ; preds = %166, %163
  br label %168

168:                                              ; preds = %167, %160
  br label %169

169:                                              ; preds = %168
  br label %170

170:                                              ; preds = %169
  %171 = load ptr, ptr %13, align 8, !tbaa !5
  %172 = load ptr, ptr %7, align 8, !tbaa !5
  %173 = getelementptr inbounds %struct._UFS_PASS_THRU_PRIVATE_DATA, ptr %172, i32 0, i32 7
  %174 = load i8, ptr %173, align 4, !tbaa !21
  %175 = add i8 %174, 1
  store i8 %175, ptr %173, align 4, !tbaa !21
  %176 = load i8, ptr %14, align 1, !tbaa !13
  %177 = load ptr, ptr %8, align 8, !tbaa !5
  %178 = getelementptr inbounds %struct._UFS_DEVICE_MANAGEMENT_REQUEST_PACKET, ptr %177, i32 0, i32 4
  %179 = load i8, ptr %178, align 1, !tbaa !27
  %180 = load ptr, ptr %8, align 8, !tbaa !5
  %181 = getelementptr inbounds %struct._UFS_DEVICE_MANAGEMENT_REQUEST_PACKET, ptr %180, i32 0, i32 5
  %182 = load i8, ptr %181, align 2, !tbaa !28
  %183 = load ptr, ptr %8, align 8, !tbaa !5
  %184 = getelementptr inbounds %struct._UFS_DEVICE_MANAGEMENT_REQUEST_PACKET, ptr %183, i32 0, i32 6
  %185 = load i8, ptr %184, align 1, !tbaa !29
  %186 = load i32, ptr %15, align 4, !tbaa !16
  %187 = zext i32 %186 to i64
  %188 = load ptr, ptr %16, align 8, !tbaa !5
  %189 = call i64 @UfsInitQueryRequestUpiu(ptr noundef %171, i8 noundef zeroext %174, i8 noundef zeroext %176, i8 noundef zeroext %179, i8 noundef zeroext %182, i8 noundef zeroext %185, i64 noundef %187, ptr noundef %188)
  %190 = load ptr, ptr %9, align 8, !tbaa !5
  %191 = load i32, ptr %190, align 1
  %192 = and i32 %191, -16777217
  %193 = or i32 %192, 16777216
  store i32 %193, ptr %190, align 1
  %194 = load i8, ptr %17, align 1, !tbaa !13
  %195 = zext i8 %194 to i32
  %196 = load ptr, ptr %9, align 8, !tbaa !5
  %197 = load i32, ptr %196, align 1
  %198 = and i32 %195, 3
  %199 = shl i32 %198, 25
  %200 = and i32 %197, -100663297
  %201 = or i32 %200, %199
  store i32 %201, ptr %196, align 1
  %202 = load ptr, ptr %9, align 8, !tbaa !5
  %203 = load i32, ptr %202, align 1
  %204 = and i32 %203, 268435455
  %205 = or i32 %204, 268435456
  store i32 %205, ptr %202, align 1
  %206 = load ptr, ptr %9, align 8, !tbaa !5
  %207 = getelementptr inbounds %struct.UTP_TRD, ptr %206, i32 0, i32 2
  %208 = load i32, ptr %207, align 1
  %209 = and i32 %208, -256
  %210 = or i32 %209, 15
  store i32 %210, ptr %207, align 1
  %211 = load i64, ptr %18, align 8, !tbaa !20
  %212 = call i64 @RShiftU64(i64 noundef %211, i64 noundef 7)
  %213 = trunc i64 %212 to i32
  %214 = load ptr, ptr %9, align 8, !tbaa !5
  %215 = getelementptr inbounds %struct.UTP_TRD, ptr %214, i32 0, i32 4
  %216 = load i32, ptr %215, align 1
  %217 = and i32 %213, 33554431
  %218 = shl i32 %217, 7
  %219 = and i32 %216, 127
  %220 = or i32 %219, %218
  store i32 %220, ptr %215, align 1
  %221 = load i64, ptr %18, align 8, !tbaa !20
  %222 = call i64 @RShiftU64(i64 noundef %221, i64 noundef 32)
  %223 = trunc i64 %222 to i32
  %224 = load ptr, ptr %9, align 8, !tbaa !5
  %225 = getelementptr inbounds %struct.UTP_TRD, ptr %224, i32 0, i32 5
  store i32 %223, ptr %225, align 1, !tbaa !30
  %226 = load i8, ptr %14, align 1, !tbaa !13
  %227 = zext i8 %226 to i32
  %228 = icmp eq i32 %227, 2
  br i1 %228, label %229, label %252

229:                                              ; preds = %170
  %230 = call i64 @DivU64x32(i64 noundef 32, i32 noundef 4)
  %231 = trunc i64 %230 to i16
  %232 = load ptr, ptr %9, align 8, !tbaa !5
  %233 = getelementptr inbounds %struct.UTP_TRD, ptr %232, i32 0, i32 6
  store i16 %231, ptr %233, align 1, !tbaa !32
  %234 = load i32, ptr %15, align 4, !tbaa !16
  %235 = urem i32 %234, 8
  %236 = icmp eq i32 %235, 0
  br i1 %236, label %237, label %239

237:                                              ; preds = %229
  %238 = load i32, ptr %15, align 4, !tbaa !16
  br label %244

239:                                              ; preds = %229
  %240 = load i32, ptr %15, align 4, !tbaa !16
  %241 = udiv i32 %240, 8
  %242 = add i32 %241, 1
  %243 = mul i32 %242, 8
  br label %244

244:                                              ; preds = %239, %237
  %245 = phi i32 [ %238, %237 ], [ %243, %239 ]
  %246 = zext i32 %245 to i64
  %247 = add i64 32, %246
  %248 = call i64 @DivU64x32(i64 noundef %247, i32 noundef 4)
  %249 = trunc i64 %248 to i16
  %250 = load ptr, ptr %9, align 8, !tbaa !5
  %251 = getelementptr inbounds %struct.UTP_TRD, ptr %250, i32 0, i32 7
  store i16 %249, ptr %251, align 1, !tbaa !33
  br label %275

252:                                              ; preds = %170
  %253 = load i32, ptr %15, align 4, !tbaa !16
  %254 = urem i32 %253, 8
  %255 = icmp eq i32 %254, 0
  br i1 %255, label %256, label %258

256:                                              ; preds = %252
  %257 = load i32, ptr %15, align 4, !tbaa !16
  br label %263

258:                                              ; preds = %252
  %259 = load i32, ptr %15, align 4, !tbaa !16
  %260 = udiv i32 %259, 8
  %261 = add i32 %260, 1
  %262 = mul i32 %261, 8
  br label %263

263:                                              ; preds = %258, %256
  %264 = phi i32 [ %257, %256 ], [ %262, %258 ]
  %265 = zext i32 %264 to i64
  %266 = add i64 32, %265
  %267 = call i64 @DivU64x32(i64 noundef %266, i32 noundef 4)
  %268 = trunc i64 %267 to i16
  %269 = load ptr, ptr %9, align 8, !tbaa !5
  %270 = getelementptr inbounds %struct.UTP_TRD, ptr %269, i32 0, i32 6
  store i16 %268, ptr %270, align 1, !tbaa !32
  %271 = call i64 @DivU64x32(i64 noundef 32, i32 noundef 4)
  %272 = trunc i64 %271 to i16
  %273 = load ptr, ptr %9, align 8, !tbaa !5
  %274 = getelementptr inbounds %struct.UTP_TRD, ptr %273, i32 0, i32 7
  store i16 %272, ptr %274, align 1, !tbaa !33
  br label %275

275:                                              ; preds = %263, %244
  store i64 0, ptr %6, align 8
  store i32 1, ptr %20, align 4
  br label %276

276:                                              ; preds = %275, %155, %122, %113, %94, %48
  call void @llvm.lifetime.end.p0(i64 8, ptr %19) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %17) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #3
  %277 = load i64, ptr %6, align 8
  ret i64 %277
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !7, i64 24}
!10 = !{!"_UFS_DEVICE_MANAGEMENT_REQUEST_PACKET", !11, i64 0, !6, i64 8, !6, i64 16, !7, i64 24, !7, i64 25, !7, i64 26, !7, i64 27, !12, i64 28, !12, i64 32, !7, i64 36, !7, i64 37}
!11 = !{!"long long", !7, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = !{!10, !7, i64 36}
!15 = !{!10, !12, i64 28}
!16 = !{!12, !12, i64 0}
!17 = !{!10, !6, i64 8}
!18 = !{!10, !12, i64 32}
!19 = !{!10, !6, i64 16}
!20 = !{!11, !11, i64 0}
!21 = !{!22, !7, i64 116}
!22 = !{!"_UFS_PASS_THRU_PRIVATE_DATA", !12, i64 0, !6, i64 8, !23, i64 16, !24, i64 32, !6, i64 96, !11, i64 104, !12, i64 112, !7, i64 116, !6, i64 120, !7, i64 128, !6, i64 136, !6, i64 144, !7, i64 152, !6, i64 160, !25, i64 168}
!23 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8}
!24 = !{!"_EFI_EXT_SCSI_PASS_THRU_PROTOCOL", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56}
!25 = !{!"", !7, i64 0, !26, i64 12, !26, i64 13}
!26 = !{!"short", !7, i64 0}
!27 = !{!10, !7, i64 25}
!28 = !{!10, !7, i64 26}
!29 = !{!10, !7, i64 27}
!30 = !{!31, !12, i64 20}
!31 = !{!"", !12, i64 0, !12, i64 3, !12, i64 3, !12, i64 3, !12, i64 3, !12, i64 4, !12, i64 8, !12, i64 9, !12, i64 12, !12, i64 16, !12, i64 16, !12, i64 20, !26, i64 24, !26, i64 26, !26, i64 28, !26, i64 30}
!32 = !{!31, !26, i64 24}
!33 = !{!31, !26, i64 26}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.10 = external hidden unnamed_addr constant [154 x i8], align 1
@.str.28 = external hidden unnamed_addr constant [79 x i8], align 1
@.str.29 = external hidden unnamed_addr constant [29 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i64 @DivU64x32(i64 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare zeroext i8 @DebugAssertEnabled() local_unnamed_addr #1

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #1

declare i64 @RShiftU64(i64 noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local i64 @UfsInitQueryRequestUpiu(ptr noundef, i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext, i64 noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
declare dso_local i64 @UfsAllocateAlignCommonBuffer(ptr noundef, i64 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local range(i64 -9223372036854775808, 1) i64 @UfsCreateDMCommandDesc(ptr noundef %0, ptr noundef readonly %1, ptr noundef %2, ptr noundef %3, ptr noundef %4) local_unnamed_addr #2 {
  %6 = alloca i64, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #3
  %7 = tail call zeroext i8 @DebugAssertEnabled() #3
  %.not = icmp eq i8 %7, 0
  br i1 %.not, label %13, label %8

8:                                                ; preds = %5
  %9 = icmp ne ptr %0, null
  %10 = icmp ne ptr %1, null
  %or.cond = and i1 %9, %10
  %11 = icmp ne ptr %2, null
  %or.cond3 = and i1 %or.cond, %11
  br i1 %or.cond3, label %13, label %12

12:                                               ; preds = %8
  tail call void @DebugAssert(ptr noundef nonnull @.str.10, i64 noundef 522, ptr noundef nonnull @.str.28) #3
  br label %13

13:                                               ; preds = %12, %8, %5
  %14 = getelementptr inbounds i8, ptr %1, i64 24
  %15 = load i8, ptr %14, align 8, !tbaa !5
  %16 = add i8 %15, -9
  %or.cond6 = icmp ult i8 %16, -8
  br i1 %or.cond6, label %105, label %17

17:                                               ; preds = %13
  %18 = getelementptr inbounds i8, ptr %1, i64 36
  %19 = load i8, ptr %18, align 4, !tbaa !12
  switch i8 %19, label %24 [
    i8 2, label %.sink.split
    i8 1, label %20
  ]

20:                                               ; preds = %17
  br label %.sink.split

.sink.split:                                      ; preds = %17, %20
  %.sink108 = phi i64 [ 32, %20 ], [ 28, %17 ]
  %.sink105 = phi i64 [ 16, %20 ], [ 8, %17 ]
  %21 = getelementptr inbounds i8, ptr %1, i64 %.sink108
  %.096.ph = load i32, ptr %21, align 4, !tbaa !13
  %22 = getelementptr inbounds i8, ptr %1, i64 %.sink105
  %23 = load ptr, ptr %22, align 8, !tbaa !14
  br label %24

24:                                               ; preds = %.sink.split, %17
  %.096 = phi i32 [ 0, %17 ], [ %.096.ph, %.sink.split ]
  %.095 = phi ptr [ null, %17 ], [ %23, %.sink.split ]
  %or.cond12 = icmp ult i8 %16, -3
  br i1 %or.cond12, label %25, label %28

25:                                               ; preds = %24
  %26 = icmp eq i32 %.096, 0
  %27 = icmp eq ptr %.095, null
  %or.cond14 = select i1 %26, i1 true, i1 %27
  br i1 %or.cond14, label %105, label %28

28:                                               ; preds = %25, %24
  %29 = and i8 %15, 14
  %or.cond17 = icmp eq i8 %29, 6
  %30 = icmp eq i8 %15, 8
  %or.cond20 = or i1 %30, %or.cond17
  br i1 %or.cond20, label %31, label %34

31:                                               ; preds = %28
  %32 = icmp ne i32 %.096, 0
  %33 = icmp ne ptr %.095, null
  %or.cond22 = select i1 %32, i1 true, i1 %33
  br i1 %or.cond22, label %105, label %.thread101

34:                                               ; preds = %28
  %35 = icmp eq i8 %15, 4
  %36 = icmp ne i32 %.096, 4
  %or.cond25 = select i1 %35, i1 %36, i1 false
  br i1 %or.cond25, label %105, label %37

37:                                               ; preds = %34
  %38 = icmp eq i8 %15, 2
  %39 = add nsw i8 %15, -1
  %or.cond28 = icmp ult i8 %39, 2
  br i1 %or.cond28, label %40, label %.thread101

40:                                               ; preds = %37
  %.096.biased = add i32 %.096, 7
  %41 = and i32 %.096.biased, -8
  %42 = zext i32 %41 to i64
  %43 = add nuw nsw i64 %42, 64
  br label %.thread101

.thread101:                                       ; preds = %31, %37, %40
  %44 = phi i1 [ %38, %40 ], [ %38, %37 ], [ false, %31 ]
  %.shrunk = phi i32 [ %.096, %40 ], [ %.096, %37 ], [ 0, %31 ]
  %.094 = phi i64 [ %43, %40 ], [ 64, %37 ], [ 64, %31 ]
  %45 = zext i32 %.shrunk to i64
  %46 = call i64 @UfsAllocateAlignCommonBuffer(ptr noundef %0, i64 noundef %.094, ptr noundef %3, ptr noundef nonnull %6, ptr noundef %4)
  %47 = icmp slt i64 %46, 0
  br i1 %47, label %105, label %48

48:                                               ; preds = %.thread101
  %49 = load ptr, ptr %3, align 8, !tbaa !14
  %50 = call zeroext i8 @DebugAssertEnabled() #3
  %51 = icmp eq i8 %50, 0
  %52 = icmp ne ptr %49, null
  %or.cond30 = select i1 %51, i1 true, i1 %52
  br i1 %or.cond30, label %54, label %53

53:                                               ; preds = %48
  call void @DebugAssert(ptr noundef nonnull @.str.10, i64 noundef 570, ptr noundef nonnull @.str.29) #3
  br label %54

54:                                               ; preds = %53, %48
  %55 = getelementptr inbounds i8, ptr %0, i64 116
  %56 = load i8, ptr %55, align 4, !tbaa !15
  %57 = add i8 %56, 1
  store i8 %57, ptr %55, align 4, !tbaa !15
  %58 = getelementptr inbounds i8, ptr %1, i64 25
  %59 = load i8, ptr %58, align 1, !tbaa !21
  %60 = getelementptr inbounds i8, ptr %1, i64 26
  %61 = load i8, ptr %60, align 2, !tbaa !22
  %62 = getelementptr inbounds i8, ptr %1, i64 27
  %63 = load i8, ptr %62, align 1, !tbaa !23
  %64 = call i64 @UfsInitQueryRequestUpiu(ptr noundef %49, i8 noundef zeroext %56, i8 noundef zeroext %15, i8 noundef zeroext %59, i8 noundef zeroext %61, i8 noundef zeroext %63, i64 noundef %45, ptr noundef %.095)
  %65 = load i32, ptr %2, align 1
  %66 = and i8 %19, 3
  %67 = zext nneg i8 %66 to i32
  %68 = shl nuw nsw i32 %67, 25
  %69 = and i32 %65, 150994943
  %70 = or disjoint i32 %69, %68
  %71 = or disjoint i32 %70, 285212672
  store i32 %71, ptr %2, align 1
  %72 = getelementptr inbounds i8, ptr %2, i64 8
  %73 = load i32, ptr %72, align 1
  %74 = and i32 %73, -256
  %75 = or disjoint i32 %74, 15
  store i32 %75, ptr %72, align 1
  %76 = load i64, ptr %6, align 8, !tbaa !24
  %77 = call i64 @RShiftU64(i64 noundef %76, i64 noundef 7) #3
  %78 = trunc i64 %77 to i32
  %79 = getelementptr inbounds i8, ptr %2, i64 16
  %80 = load i32, ptr %79, align 1
  %81 = shl i32 %78, 7
  %82 = and i32 %80, 127
  %83 = or disjoint i32 %82, %81
  store i32 %83, ptr %79, align 1
  %84 = load i64, ptr %6, align 8, !tbaa !24
  %85 = call i64 @RShiftU64(i64 noundef %84, i64 noundef 32) #3
  %86 = trunc i64 %85 to i32
  %87 = getelementptr inbounds i8, ptr %2, i64 20
  store i32 %86, ptr %87, align 1, !tbaa !25
  %88 = getelementptr inbounds i8, ptr %2, i64 26
  br i1 %44, label %89, label %96

89:                                               ; preds = %54
  %90 = call i64 @DivU64x32(i64 noundef 32, i32 noundef 4) #3
  %91 = trunc i64 %90 to i16
  %92 = getelementptr inbounds i8, ptr %2, i64 24
  store i16 %91, ptr %92, align 1, !tbaa !27
  %.096.biased104 = add i32 %.096, 7
  %93 = and i32 %.096.biased104, -8
  %94 = zext i32 %93 to i64
  %95 = add nuw nsw i64 %94, 32
  br label %.sink.split106

96:                                               ; preds = %54
  %.096.biased103 = add i32 %.096, 7
  %97 = and i32 %.096.biased103, -8
  %98 = zext i32 %97 to i64
  %99 = add nuw nsw i64 %98, 32
  %100 = call i64 @DivU64x32(i64 noundef %99, i32 noundef 4) #3
  %101 = trunc i64 %100 to i16
  %102 = getelementptr inbounds i8, ptr %2, i64 24
  store i16 %101, ptr %102, align 1, !tbaa !27
  br label %.sink.split106

.sink.split106:                                   ; preds = %96, %89
  %.sink = phi i64 [ %95, %89 ], [ 32, %96 ]
  %103 = call i64 @DivU64x32(i64 noundef %.sink, i32 noundef 4) #3
  %104 = trunc i64 %103 to i16
  store i16 %104, ptr %88, align 1, !tbaa !28
  br label %105

105:                                              ; preds = %.sink.split106, %.thread101, %34, %31, %25, %13
  %.0 = phi i64 [ -9223372036854775806, %13 ], [ -9223372036854775806, %25 ], [ -9223372036854775806, %31 ], [ -9223372036854775806, %34 ], [ %46, %.thread101 ], [ 0, %.sink.split106 ]
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #3
  ret i64 %.0
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 24}
!6 = !{!"_UFS_DEVICE_MANAGEMENT_REQUEST_PACKET", !7, i64 0, !10, i64 8, !10, i64 16, !8, i64 24, !8, i64 25, !8, i64 26, !8, i64 27, !11, i64 28, !11, i64 32, !8, i64 36, !8, i64 37}
!7 = !{!"long long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!6, !8, i64 36}
!13 = !{!11, !11, i64 0}
!14 = !{!10, !10, i64 0}
!15 = !{!16, !8, i64 116}
!16 = !{!"_UFS_PASS_THRU_PRIVATE_DATA", !11, i64 0, !10, i64 8, !17, i64 16, !18, i64 32, !10, i64 96, !7, i64 104, !11, i64 112, !8, i64 116, !10, i64 120, !8, i64 128, !10, i64 136, !10, i64 144, !8, i64 152, !10, i64 160, !19, i64 168}
!17 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8}
!18 = !{!"_EFI_EXT_SCSI_PASS_THRU_PROTOCOL", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !10, i64 56}
!19 = !{!"", !8, i64 0, !20, i64 12, !20, i64 13}
!20 = !{!"short", !8, i64 0}
!21 = !{!6, !8, i64 25}
!22 = !{!6, !8, i64 26}
!23 = !{!6, !8, i64 27}
!24 = !{!7, !7, i64 0}
!25 = !{!26, !11, i64 20}
!26 = !{!"", !11, i64 0, !11, i64 3, !11, i64 3, !11, i64 3, !11, i64 3, !11, i64 4, !11, i64 8, !11, i64 9, !11, i64 12, !11, i64 16, !11, i64 16, !11, i64 20, !20, i64 24, !20, i64 26, !20, i64 28, !20, i64 30}
!27 = !{!26, !20, i64 24}
!28 = !{!26, !20, i64 26}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass