; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/MdePkg/Library (SmBusSendByte)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [152 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [36 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [37 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [42 x i8], align 1

declare zeroext i8 @DebugAssertEnabled() #0

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) #0

; Function Attrs: nounwind uwtable
define dso_local zeroext i8 @SmBusSendByte(i64 noundef %0, i8 noundef zeroext %1, ptr noundef %2) #1 {
  %4 = alloca i64, align 8
  %5 = alloca i8, align 1
  %6 = alloca ptr, align 8
  store i64 %0, ptr %4, align 8, !tbaa !5
  store i8 %1, ptr %5, align 1, !tbaa !9
  store ptr %2, ptr %6, align 8, !tbaa !10
  br label %7

7:                                                ; preds = %3
  %8 = call zeroext i8 @DebugAssertEnabled()
  %9 = icmp ne i8 %8, 0
  br i1 %9, label %10, label %17

10:                                               ; preds = %7
  %11 = load i64, ptr %4, align 8, !tbaa !5
  %12 = lshr i64 %11, 8
  %13 = and i64 %12, 255
  %14 = icmp eq i64 %13, 0
  br i1 %14, label %16, label %15

15:                                               ; preds = %10
  call void @DebugAssert(ptr noundef @.str, i64 noundef 178, ptr noundef @.str.2)
  br label %16

16:                                               ; preds = %15, %10
  br label %17

17:                                               ; preds = %16, %7
  br label %18

18:                                               ; preds = %17
  br label %19

19:                                               ; preds = %18
  %20 = call zeroext i8 @DebugAssertEnabled()
  %21 = icmp ne i8 %20, 0
  br i1 %21, label %22, label %29

22:                                               ; preds = %19
  %23 = load i64, ptr %4, align 8, !tbaa !5
  %24 = lshr i64 %23, 16
  %25 = and i64 %24, 63
  %26 = icmp eq i64 %25, 0
  br i1 %26, label %28, label %27

27:                                               ; preds = %22
  call void @DebugAssert(ptr noundef @.str, i64 noundef 179, ptr noundef @.str.3)
  br label %28

28:                                               ; preds = %27, %22
  br label %29

29:                                               ; preds = %28, %19
  br label %30

30:                                               ; preds = %29
  br label %31

31:                                               ; preds = %30
  %32 = call zeroext i8 @DebugAssertEnabled()
  %33 = icmp ne i8 %32, 0
  br i1 %33, label %34, label %40

34:                                               ; preds = %31
  %35 = load i64, ptr %4, align 8, !tbaa !5
  %36 = and i64 %35, -8388607
  %37 = icmp eq i64 %36, 0
  br i1 %37, label %39, label %38

38:                                               ; preds = %34
  call void @DebugAssert(ptr noundef @.str, i64 noundef 180, ptr noundef @.str.4)
  br label %39

39:                                               ; preds = %38, %34
  br label %40

40:                                               ; preds = %39, %31
  br label %41

41:                                               ; preds = %40
  %42 = load ptr, ptr %6, align 8, !tbaa !10
  %43 = icmp ne ptr %42, null
  br i1 %43, label %44, label %46

44:                                               ; preds = %41
  %45 = load ptr, ptr %6, align 8, !tbaa !10
  store i64 -9223372036854775805, ptr %45, align 8, !tbaa !5
  br label %46

46:                                               ; preds = %44, %41
  ret i8 0
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [152 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [36 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [37 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [42 x i8], align 1

declare zeroext i8 @DebugAssertEnabled() local_unnamed_addr #0

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local noundef zeroext i8 @SmBusSendByte(i64 noundef %0, i8 noundef zeroext %1, ptr noundef writeonly %2) local_unnamed_addr #1 {
  %4 = tail call zeroext i8 @DebugAssertEnabled() #2
  %.not = icmp eq i8 %4, 0
  %5 = and i64 %0, 65280
  %6 = icmp eq i64 %5, 0
  %or.cond = or i1 %6, %.not
  br i1 %or.cond, label %8, label %7

7:                                                ; preds = %3
  tail call void @DebugAssert(ptr noundef nonnull @.str, i64 noundef 178, ptr noundef nonnull @.str.2) #2
  br label %8

8:                                                ; preds = %7, %3
  %9 = tail call zeroext i8 @DebugAssertEnabled() #2
  %.not4 = icmp eq i8 %9, 0
  %10 = and i64 %0, 4128768
  %11 = icmp eq i64 %10, 0
  %or.cond9 = or i1 %11, %.not4
  br i1 %or.cond9, label %13, label %12

12:                                               ; preds = %8
  tail call void @DebugAssert(ptr noundef nonnull @.str, i64 noundef 179, ptr noundef nonnull @.str.3) #2
  br label %13

13:                                               ; preds = %12, %8
  %14 = tail call zeroext i8 @DebugAssertEnabled() #2
  %.not5 = icmp eq i8 %14, 0
  %15 = and i64 %0, -8388607
  %16 = icmp eq i64 %15, 0
  %or.cond11 = or i1 %16, %.not5
  br i1 %or.cond11, label %18, label %17

17:                                               ; preds = %13
  tail call void @DebugAssert(ptr noundef nonnull @.str, i64 noundef 180, ptr noundef nonnull @.str.4) #2
  br label %18

18:                                               ; preds = %13, %17
  %.not6 = icmp eq ptr %2, null
  br i1 %.not6, label %20, label %19

19:                                               ; preds = %18
  store i64 -9223372036854775805, ptr %2, align 8, !tbaa !5
  br label %20

20:                                               ; preds = %19, %18
  ret i8 0
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: GlobalOptPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass