; LLVM IR from gem5/gem5 :: ext/softfloat (f16_to_extF80M)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.float16_t = type { i16 }
%union.ui16_f16 = type { i16 }
%struct.commonNaN = type { i8 }
%struct.exp8_sig16 = type { i8, i64 }
%struct.extFloat80M = type { i64, i16 }

; Function Attrs: nounwind uwtable
define dso_local void @f16_to_extF80M(i16 %0, ptr noundef %1) #0 {
  %3 = alloca %struct.float16_t, align 2
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca %union.ui16_f16, align 2
  %7 = alloca i16, align 2
  %8 = alloca i8, align 1
  %9 = alloca i8, align 1
  %10 = alloca i16, align 2
  %11 = alloca %struct.commonNaN, align 1
  %12 = alloca i64, align 8
  %13 = alloca i32, align 4
  %14 = alloca %struct.exp8_sig16, align 8
  %15 = alloca i32, align 4
  %16 = alloca %struct.exp8_sig16, align 8
  %17 = getelementptr inbounds %struct.float16_t, ptr %3, i32 0, i32 0
  store i16 %0, ptr %17, align 2
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #5
  call void @llvm.lifetime.start.p0(i64 2, ptr %6) #5
  call void @llvm.lifetime.start.p0(i64 2, ptr %7) #5
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #5
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #5
  call void @llvm.lifetime.start.p0(i64 2, ptr %10) #5
  call void @llvm.lifetime.start.p0(i64 1, ptr %11) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #5
  call void @llvm.lifetime.start.p0(i64 16, ptr %14) #5
  %18 = load ptr, ptr %4, align 8, !tbaa !5
  store ptr %18, ptr %5, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 2 %6, ptr align 2 %3, i64 2, i1 false), !tbaa.struct !9
  %19 = load i16, ptr %6, align 2, !tbaa !12
  store i16 %19, ptr %7, align 2, !tbaa !10
  %20 = load i16, ptr %7, align 2, !tbaa !10
  %21 = zext i16 %20 to i32
  %22 = ashr i32 %21, 15
  %23 = icmp ne i32 %22, 0
  %24 = zext i1 %23 to i8
  store i8 %24, ptr %8, align 1, !tbaa !13
  %25 = load i16, ptr %7, align 2, !tbaa !10
  %26 = zext i16 %25 to i32
  %27 = ashr i32 %26, 10
  %28 = trunc i32 %27 to i8
  %29 = sext i8 %28 to i32
  %30 = and i32 %29, 31
  %31 = trunc i32 %30 to i8
  store i8 %31, ptr %9, align 1, !tbaa !12
  %32 = load i16, ptr %7, align 2, !tbaa !10
  %33 = zext i16 %32 to i32
  %34 = and i32 %33, 1023
  %35 = trunc i32 %34 to i16
  store i16 %35, ptr %10, align 2, !tbaa !10
  %36 = load i8, ptr %9, align 1, !tbaa !12
  %37 = sext i8 %36 to i32
  %38 = icmp eq i32 %37, 31
  br i1 %38, label %39, label %56

39:                                               ; preds = %2
  %40 = load i16, ptr %10, align 2, !tbaa !10
  %41 = icmp ne i16 %40, 0
  br i1 %41, label %42, label %50

42:                                               ; preds = %39
  %43 = load i16, ptr %7, align 2, !tbaa !10
  %44 = zext i16 %43 to i32
  %45 = and i32 %44, 512
  %46 = icmp ne i32 %45, 0
  br i1 %46, label %48, label %47

47:                                               ; preds = %42
  call void @softfloat_raiseFlags(i8 noundef zeroext 16)
  br label %48

48:                                               ; preds = %47, %42
  %49 = load ptr, ptr %5, align 8, !tbaa !5
  call void @softfloat_commonNaNToExtF80M(ptr noundef %11, ptr noundef %49)
  store i32 1, ptr %15, align 4
  br label %105

50:                                               ; preds = %39
  %51 = load i8, ptr %8, align 1, !tbaa !13, !range !15, !noundef !16
  %52 = trunc i8 %51 to i1
  %53 = zext i1 %52 to i64
  %54 = shl i64 %53, 15
  %55 = or i64 %54, 32767
  store i64 %55, ptr %12, align 8, !tbaa !17
  store i32 -2147483648, ptr %13, align 4, !tbaa !19
  br label %95

56:                                               ; preds = %2
  %57 = load i8, ptr %9, align 1, !tbaa !12
  %58 = icmp ne i8 %57, 0
  br i1 %58, label %81, label %59

59:                                               ; preds = %56
  %60 = load i16, ptr %10, align 2, !tbaa !10
  %61 = icmp ne i16 %60, 0
  br i1 %61, label %68, label %62

62:                                               ; preds = %59
  %63 = load i8, ptr %8, align 1, !tbaa !13, !range !15, !noundef !16
  %64 = trunc i8 %63 to i1
  %65 = zext i1 %64 to i64
  %66 = shl i64 %65, 15
  %67 = or i64 %66, 0
  store i64 %67, ptr %12, align 8, !tbaa !17
  store i32 0, ptr %13, align 4, !tbaa !19
  br label %95

68:                                               ; preds = %59
  call void @llvm.lifetime.start.p0(i64 16, ptr %16) #5
  %69 = load i16, ptr %10, align 2, !tbaa !10
  %70 = zext i16 %69 to i64
  %71 = call { i8, i64 } @softfloat_normSubnormalF16Sig(i64 noundef %70)
  %72 = getelementptr inbounds { i8, i64 }, ptr %16, i32 0, i32 0
  %73 = extractvalue { i8, i64 } %71, 0
  store i8 %73, ptr %72, align 8
  %74 = getelementptr inbounds { i8, i64 }, ptr %16, i32 0, i32 1
  %75 = extractvalue { i8, i64 } %71, 1
  store i64 %75, ptr %74, align 8
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %14, ptr align 8 %16, i64 16, i1 false), !tbaa.struct !21
  call void @llvm.lifetime.end.p0(i64 16, ptr %16) #5
  %76 = getelementptr inbounds %struct.exp8_sig16, ptr %14, i32 0, i32 0
  %77 = load i8, ptr %76, align 8, !tbaa !22
  store i8 %77, ptr %9, align 1, !tbaa !12
  %78 = getelementptr inbounds %struct.exp8_sig16, ptr %14, i32 0, i32 1
  %79 = load i64, ptr %78, align 8, !tbaa !24
  %80 = trunc i64 %79 to i16
  store i16 %80, ptr %10, align 2, !tbaa !10
  br label %81

81:                                               ; preds = %68, %56
  %82 = load i8, ptr %8, align 1, !tbaa !13, !range !15, !noundef !16
  %83 = trunc i8 %82 to i1
  %84 = zext i1 %83 to i64
  %85 = shl i64 %84, 15
  %86 = load i8, ptr %9, align 1, !tbaa !12
  %87 = sext i8 %86 to i32
  %88 = add nsw i32 %87, 16368
  %89 = sext i32 %88 to i64
  %90 = or i64 %85, %89
  store i64 %90, ptr %12, align 8, !tbaa !17
  %91 = load i16, ptr %10, align 2, !tbaa !10
  %92 = zext i16 %91 to i32
  %93 = shl i32 %92, 21
  %94 = or i32 -2147483648, %93
  store i32 %94, ptr %13, align 4, !tbaa !19
  br label %95

95:                                               ; preds = %81, %62, %50
  %96 = load i64, ptr %12, align 8, !tbaa !17
  %97 = trunc i64 %96 to i16
  %98 = load ptr, ptr %5, align 8, !tbaa !5
  %99 = getelementptr inbounds %struct.extFloat80M, ptr %98, i32 0, i32 1
  store i16 %97, ptr %99, align 8, !tbaa !25
  %100 = load i32, ptr %13, align 4, !tbaa !19
  %101 = zext i32 %100 to i64
  %102 = shl i64 %101, 32
  %103 = load ptr, ptr %5, align 8, !tbaa !5
  %104 = getelementptr inbounds %struct.extFloat80M, ptr %103, i32 0, i32 0
  store i64 %102, ptr %104, align 8, !tbaa !27
  store i32 0, ptr %15, align 4
  br label %105

105:                                              ; preds = %95, %48
  call void @llvm.lifetime.end.p0(i64 16, ptr %14) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr %11) #5
  call void @llvm.lifetime.end.p0(i64 2, ptr %10) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 2, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 2, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #5
  %106 = load i32, ptr %15, align 4
  switch i32 %106, label %108 [
    i32 0, label %107
    i32 1, label %107
  ]

107:                                              ; preds = %105, %105
  ret void

108:                                              ; preds = %105
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

declare void @softfloat_raiseFlags(i8 noundef zeroext) #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @softfloat_commonNaNToExtF80M(ptr noundef, ptr noundef) #4

declare { i8, i64 } @softfloat_normSubnormalF16Sig(i64 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{i64 0, i64 2, !10}
!10 = !{!11, !11, i64 0}
!11 = !{!"short", !7, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"_Bool", !7, i64 0}
!15 = !{i8 0, i8 2}
!16 = !{}
!17 = !{!18, !18, i64 0}
!18 = !{!"long", !7, i64 0}
!19 = !{!20, !20, i64 0}
!20 = !{!"int", !7, i64 0}
!21 = !{i64 0, i64 1, !12, i64 8, i64 8, !17}
!22 = !{!23, !7, i64 0}
!23 = !{!"exp8_sig16", !7, i64 0, !18, i64 8}
!24 = !{!23, !18, i64 8}
!25 = !{!26, !11, i64 8}
!26 = !{!"extFloat80M", !18, i64 0, !11, i64 8}
!27 = !{!26, !18, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.commonNaN = type { i8 }

; Function Attrs: nounwind uwtable
define dso_local void @f16_to_extF80M(i16 %0, ptr noundef %1) local_unnamed_addr #0 {
  %3 = alloca %struct.commonNaN, align 1
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %3) #4
  %4 = lshr i16 %0, 10
  %5 = trunc nuw nsw i16 %4 to i8
  %6 = and i8 %5, 31
  %7 = and i16 %0, 1023
  switch i8 %6, label %23 [
    i8 31, label %8
    i8 0, label %15
  ]

8:                                                ; preds = %2
  %.not31 = icmp eq i16 %7, 0
  br i1 %.not31, label %13, label %9

9:                                                ; preds = %8
  %10 = and i16 %0, 512
  %.not33 = icmp eq i16 %10, 0
  br i1 %.not33, label %11, label %12

11:                                               ; preds = %9
  tail call void @softfloat_raiseFlags(i8 noundef zeroext 16) #4
  br label %12

12:                                               ; preds = %11, %9
  call void @softfloat_commonNaNToExtF80M(ptr noundef nonnull %3, ptr noundef %1)
  br label %32

13:                                               ; preds = %8
  %14 = or i16 %0, 32767
  br label %30

15:                                               ; preds = %2
  %.not29 = icmp eq i16 %7, 0
  br i1 %.not29, label %16, label %17

16:                                               ; preds = %15
  %.lobit = and i16 %0, -32768
  br label %30

17:                                               ; preds = %15
  %18 = zext nneg i16 %7 to i64
  %19 = tail call { i8, i64 } @softfloat_normSubnormalF16Sig(i64 noundef %18) #4
  %20 = extractvalue { i8, i64 } %19, 0
  %21 = extractvalue { i8, i64 } %19, 1
  %22 = trunc i64 %21 to i16
  br label %23

23:                                               ; preds = %2, %17
  %.024 = phi i16 [ %22, %17 ], [ %7, %2 ]
  %.0 = phi i8 [ %20, %17 ], [ %6, %2 ]
  %.lobit30 = and i16 %0, -32768
  %24 = sext i8 %.0 to i16
  %25 = add nsw i16 %24, 16368
  %26 = or i16 %25, %.lobit30
  %27 = zext i16 %.024 to i64
  %28 = shl i64 %27, 53
  %29 = or i64 %28, -9223372036854775808
  br label %30

30:                                               ; preds = %23, %16, %13
  %.026 = phi i64 [ -9223372036854775808, %13 ], [ %29, %23 ], [ 0, %16 ]
  %.025 = phi i16 [ %14, %13 ], [ %26, %23 ], [ %.lobit, %16 ]
  %31 = getelementptr inbounds i8, ptr %1, i64 8
  store i16 %.025, ptr %31, align 8, !tbaa !5
  store i64 %.026, ptr %1, align 8, !tbaa !11
  br label %32

32:                                               ; preds = %30, %12
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %3) #4
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @softfloat_raiseFlags(i8 noundef zeroext) local_unnamed_addr #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @softfloat_commonNaNToExtF80M(ptr noundef, ptr noundef) local_unnamed_addr #3

declare { i8, i64 } @softfloat_normSubnormalF16Sig(i64 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"extFloat80M", !7, i64 0, !10, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"short", !8, i64 0}
!11 = !{!6, !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass