; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/datatypes/int (sc_signed)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::sc_signed_bitref_r" = type { %"class.sc_dt::sc_value_base", i32, ptr }
%"class.sc_dt::sc_value_base" = type { ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt9sc_signed3setEib(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef, i1 noundef zeroext) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5sc_dt16sc_signed_bitref10concat_setExi(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %1, i32 noundef %2) unnamed_addr #1 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca i64, align 8
  %6 = alloca i32, align 4
  %7 = alloca i8, align 1
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !9
  store i32 %2, ptr %6, align 4, !tbaa !11
  %8 = load ptr, ptr %4, align 8
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #2
  %9 = load i32, ptr %6, align 4, !tbaa !11
  %10 = icmp slt i32 %9, 64
  br i1 %10, label %11, label %16

11:                                               ; preds = %3
  %12 = load i64, ptr %5, align 8, !tbaa !9
  %13 = load i32, ptr %6, align 4, !tbaa !11
  %14 = zext i32 %13 to i64
  %15 = ashr i64 %12, %14
  br label %19

16:                                               ; preds = %3
  %17 = load i64, ptr %5, align 8, !tbaa !9
  %18 = ashr i64 %17, 63
  br label %19

19:                                               ; preds = %16, %11
  %20 = phi i64 [ %15, %11 ], [ %18, %16 ]
  %21 = and i64 1, %20
  %22 = icmp ne i64 %21, 0
  %23 = zext i1 %22 to i8
  store i8 %23, ptr %7, align 1, !tbaa !13
  %24 = getelementptr inbounds %"class.sc_dt::sc_signed_bitref_r", ptr %8, i32 0, i32 2
  %25 = load ptr, ptr %24, align 8, !tbaa !15
  %26 = load i32, ptr %6, align 4, !tbaa !11
  %27 = load i8, ptr %7, align 1, !tbaa !13, !range !18, !noundef !19
  %28 = trunc i8 %27 to i1
  call void @_ZN5sc_dt9sc_signed3setEib(ptr noundef nonnull align 8 dereferenceable(32) %25, i32 noundef %26, i1 noundef zeroext %28)
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #2
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"bool", !7, i64 0}
!15 = !{!16, !6, i64 16}
!16 = !{!"_ZTSN5sc_dt18sc_signed_bitref_rE", !17, i64 0, !12, i64 8, !6, i64 16}
!17 = !{!"_ZTSN5sc_dt13sc_value_baseE"}
!18 = !{i8 0, i8 2}
!19 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt9sc_signed3setEib(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef, i1 noundef zeroext) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5sc_dt16sc_signed_bitref10concat_setExi(ptr nocapture noundef nonnull readonly align 8 dereferenceable(24) %0, i64 noundef %1, i32 noundef %2) unnamed_addr #0 align 2 {
  %narrow = tail call i32 @llvm.smin.i32(i32 %2, i32 63)
  %.pn = zext nneg i32 %narrow to i64
  %4 = shl nuw i64 1, %.pn
  %5 = and i64 %4, %1
  %6 = icmp ne i64 %5, 0
  %7 = getelementptr inbounds i8, ptr %0, i64 16
  %8 = load ptr, ptr %7, align 8, !tbaa !5
  tail call void @_ZN5sc_dt9sc_signed3setEib(ptr noundef nonnull align 8 dereferenceable(32) %8, i32 noundef %2, i1 noundef zeroext %6)
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 16}
!6 = !{!"_ZTSN5sc_dt18sc_signed_bitref_rE", !7, i64 0, !8, i64 8, !11, i64 16}
!7 = !{!"_ZTSN5sc_dt13sc_value_baseE"}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass