; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/SecurityPkg/Library (Tpm12NvWriteValue)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TPM_CMD_NV_WRITE_VALUE = type <{ %struct.tdTPM_RQU_COMMAND_HDR, i32, i32, i32, [1024 x i8] }>
%struct.tdTPM_RQU_COMMAND_HDR = type <{ i16, i32, i32 }>
%struct.TPM_RSP_NV_WRITE_VALUE = type { %struct.tdTPM_RSP_COMMAND_HDR }
%struct.tdTPM_RSP_COMMAND_HDR = type <{ i16, i32, i32 }>

@.str.2 = external hidden unnamed_addr constant [38 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare zeroext i16 @SwapBytes16(i16 noundef zeroext) #1

declare i32 @SwapBytes32(i32 noundef) #1

declare ptr @CopyMem(ptr noundef, ptr noundef, i64 noundef) #1

declare i64 @Tpm12SubmitCommand(i32 noundef, ptr noundef, ptr noundef, ptr noundef) #1

declare zeroext i8 @DebugPrintEnabled() #1

declare zeroext i8 @DebugPrintLevelEnabled(i64 noundef) #1

declare void @DebugPrint(i64 noundef, ptr noundef, ...) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i64 @Tpm12NvWriteValue(i32 noundef %0, i32 noundef %1, i32 noundef %2, ptr noundef %3) #2 {
  %5 = alloca i64, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  %10 = alloca i64, align 8
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca %struct.TPM_CMD_NV_WRITE_VALUE, align 1
  %14 = alloca %struct.TPM_RSP_NV_WRITE_VALUE, align 1
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  store i32 %0, ptr %6, align 4, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !5
  store ptr %3, ptr %9, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.start.p0(i64 1046, ptr %13) #3
  call void @llvm.lifetime.start.p0(i64 10, ptr %14) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  %17 = load i32, ptr %8, align 4, !tbaa !5
  %18 = zext i32 %17 to i64
  %19 = icmp ugt i64 %18, 1024
  br i1 %19, label %20, label %21

20:                                               ; preds = %4
  store i64 -9223372036854775805, ptr %5, align 8
  store i32 1, ptr %16, align 4
  br label %83

21:                                               ; preds = %4
  store i32 10, ptr %11, align 4, !tbaa !5
  %22 = load i32, ptr %8, align 4, !tbaa !5
  %23 = zext i32 %22 to i64
  %24 = add i64 22, %23
  %25 = trunc i64 %24 to i32
  store i32 %25, ptr %12, align 4, !tbaa !5
  %26 = call zeroext i16 @SwapBytes16(i16 noundef zeroext 193)
  %27 = getelementptr inbounds %struct.TPM_CMD_NV_WRITE_VALUE, ptr %13, i32 0, i32 0
  %28 = getelementptr inbounds %struct.tdTPM_RQU_COMMAND_HDR, ptr %27, i32 0, i32 0
  store i16 %26, ptr %28, align 1, !tbaa !11
  %29 = load i32, ptr %8, align 4, !tbaa !5
  %30 = zext i32 %29 to i64
  %31 = add i64 22, %30
  %32 = trunc i64 %31 to i32
  %33 = call i32 @SwapBytes32(i32 noundef %32)
  %34 = getelementptr inbounds %struct.TPM_CMD_NV_WRITE_VALUE, ptr %13, i32 0, i32 0
  %35 = getelementptr inbounds %struct.tdTPM_RQU_COMMAND_HDR, ptr %34, i32 0, i32 1
  store i32 %33, ptr %35, align 1, !tbaa !15
  %36 = call i32 @SwapBytes32(i32 noundef 205)
  %37 = getelementptr inbounds %struct.TPM_CMD_NV_WRITE_VALUE, ptr %13, i32 0, i32 0
  %38 = getelementptr inbounds %struct.tdTPM_RQU_COMMAND_HDR, ptr %37, i32 0, i32 2
  store i32 %36, ptr %38, align 1, !tbaa !16
  %39 = load i32, ptr %6, align 4, !tbaa !5
  %40 = call i32 @SwapBytes32(i32 noundef %39)
  %41 = getelementptr inbounds %struct.TPM_CMD_NV_WRITE_VALUE, ptr %13, i32 0, i32 1
  store i32 %40, ptr %41, align 1, !tbaa !17
  %42 = load i32, ptr %7, align 4, !tbaa !5
  %43 = call i32 @SwapBytes32(i32 noundef %42)
  %44 = getelementptr inbounds %struct.TPM_CMD_NV_WRITE_VALUE, ptr %13, i32 0, i32 2
  store i32 %43, ptr %44, align 1, !tbaa !18
  %45 = load i32, ptr %8, align 4, !tbaa !5
  %46 = call i32 @SwapBytes32(i32 noundef %45)
  %47 = getelementptr inbounds %struct.TPM_CMD_NV_WRITE_VALUE, ptr %13, i32 0, i32 3
  store i32 %46, ptr %47, align 1, !tbaa !19
  %48 = getelementptr inbounds %struct.TPM_CMD_NV_WRITE_VALUE, ptr %13, i32 0, i32 4
  %49 = getelementptr inbounds [1024 x i8], ptr %48, i64 0, i64 0
  %50 = load ptr, ptr %9, align 8, !tbaa !9
  %51 = load i32, ptr %8, align 4, !tbaa !5
  %52 = zext i32 %51 to i64
  %53 = call ptr @CopyMem(ptr noundef %49, ptr noundef %50, i64 noundef %52)
  %54 = load i32, ptr %12, align 4, !tbaa !5
  %55 = call i64 @Tpm12SubmitCommand(i32 noundef %54, ptr noundef %13, ptr noundef %11, ptr noundef %14)
  store i64 %55, ptr %10, align 8, !tbaa !20
  %56 = load i64, ptr %10, align 8, !tbaa !20
  %57 = icmp slt i64 %56, 0
  br i1 %57, label %58, label %60

58:                                               ; preds = %21
  %59 = load i64, ptr %10, align 8, !tbaa !20
  store i64 %59, ptr %5, align 8
  store i32 1, ptr %16, align 4
  br label %83

60:                                               ; preds = %21
  %61 = getelementptr inbounds %struct.TPM_RSP_NV_WRITE_VALUE, ptr %14, i32 0, i32 0
  %62 = getelementptr inbounds %struct.tdTPM_RSP_COMMAND_HDR, ptr %61, i32 0, i32 2
  %63 = load i32, ptr %62, align 1, !tbaa !22
  %64 = call i32 @SwapBytes32(i32 noundef %63)
  store i32 %64, ptr %15, align 4, !tbaa !5
  br label %65

65:                                               ; preds = %60
  %66 = call zeroext i8 @DebugPrintEnabled()
  %67 = icmp ne i8 %66, 0
  br i1 %67, label %68, label %77

68:                                               ; preds = %65
  br label %69

69:                                               ; preds = %68
  %70 = call zeroext i8 @DebugPrintLevelEnabled(i64 noundef 64)
  %71 = icmp ne i8 %70, 0
  br i1 %71, label %72, label %74

72:                                               ; preds = %69
  %73 = load i32, ptr %15, align 4, !tbaa !5
  call void (i64, ptr, ...) @DebugPrint(i64 noundef 64, ptr noundef @.str.2, i32 noundef %73)
  br label %74

74:                                               ; preds = %72, %69
  br label %75

75:                                               ; preds = %74
  br label %76

76:                                               ; preds = %75
  br label %77

77:                                               ; preds = %76, %65
  br label %78

78:                                               ; preds = %77
  br label %79

79:                                               ; preds = %78
  %80 = load i32, ptr %15, align 4, !tbaa !5
  switch i32 %80, label %81 [
    i32 0, label %82
  ]

81:                                               ; preds = %79
  store i64 -9223372036854775801, ptr %5, align 8
  store i32 1, ptr %16, align 4
  br label %83

82:                                               ; preds = %79
  store i64 0, ptr %5, align 8
  store i32 1, ptr %16, align 4
  br label %83

83:                                               ; preds = %82, %81, %58, %20
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  call void @llvm.lifetime.end.p0(i64 10, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 1046, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  %84 = load i64, ptr %5, align 8
  ret i64 %84
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !14, i64 0}
!12 = !{!"", !13, i64 0, !6, i64 10, !6, i64 14, !6, i64 18, !7, i64 22}
!13 = !{!"tdTPM_RQU_COMMAND_HDR", !14, i64 0, !6, i64 2, !6, i64 6}
!14 = !{!"short", !7, i64 0}
!15 = !{!12, !6, i64 2}
!16 = !{!12, !6, i64 6}
!17 = !{!12, !6, i64 10}
!18 = !{!12, !6, i64 14}
!19 = !{!12, !6, i64 18}
!20 = !{!21, !21, i64 0}
!21 = !{!"long long", !7, i64 0}
!22 = !{!23, !6, i64 6}
!23 = !{!"", !24, i64 0}
!24 = !{!"tdTPM_RSP_COMMAND_HDR", !14, i64 0, !6, i64 2, !6, i64 6}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TPM_CMD_NV_WRITE_VALUE = type <{ %struct.tdTPM_RQU_COMMAND_HDR, i32, i32, i32, [1024 x i8] }>
%struct.tdTPM_RQU_COMMAND_HDR = type <{ i16, i32, i32 }>
%struct.TPM_RSP_NV_WRITE_VALUE = type { %struct.tdTPM_RSP_COMMAND_HDR }
%struct.tdTPM_RSP_COMMAND_HDR = type <{ i16, i32, i32 }>

@.str.2 = external hidden unnamed_addr constant [38 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare zeroext i16 @SwapBytes16(i16 noundef zeroext) local_unnamed_addr #1

declare i32 @SwapBytes32(i32 noundef) local_unnamed_addr #1

declare ptr @CopyMem(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1

declare i64 @Tpm12SubmitCommand(i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1

declare zeroext i8 @DebugPrintEnabled() local_unnamed_addr #1

declare zeroext i8 @DebugPrintLevelEnabled(i64 noundef) local_unnamed_addr #1

declare void @DebugPrint(i64 noundef, ptr noundef, ...) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local range(i64 -9223372036854775808, 1) i64 @Tpm12NvWriteValue(i32 noundef %0, i32 noundef %1, i32 noundef %2, ptr noundef %3) local_unnamed_addr #2 {
  %5 = alloca i32, align 4
  %6 = alloca %struct.TPM_CMD_NV_WRITE_VALUE, align 2
  %7 = alloca %struct.TPM_RSP_NV_WRITE_VALUE, align 1
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
  call void @llvm.lifetime.start.p0(i64 1046, ptr nonnull %6) #3
  call void @llvm.lifetime.start.p0(i64 10, ptr nonnull %7) #3
  %8 = icmp ugt i32 %2, 1024
  br i1 %8, label %36, label %9

9:                                                ; preds = %4
  %10 = zext nneg i32 %2 to i64
  store i32 10, ptr %5, align 4, !tbaa !5
  %11 = add nuw nsw i32 %2, 22
  %12 = tail call zeroext i16 @SwapBytes16(i16 noundef zeroext 193) #3
  store i16 %12, ptr %6, align 2, !tbaa !9
  %13 = tail call i32 @SwapBytes32(i32 noundef %11) #3
  %14 = getelementptr inbounds i8, ptr %6, i64 2
  store i32 %13, ptr %14, align 2, !tbaa !13
  %15 = tail call i32 @SwapBytes32(i32 noundef 205) #3
  %16 = getelementptr inbounds i8, ptr %6, i64 6
  store i32 %15, ptr %16, align 2, !tbaa !14
  %17 = tail call i32 @SwapBytes32(i32 noundef %0) #3
  %18 = getelementptr inbounds i8, ptr %6, i64 10
  store i32 %17, ptr %18, align 2, !tbaa !15
  %19 = tail call i32 @SwapBytes32(i32 noundef %1) #3
  %20 = getelementptr inbounds i8, ptr %6, i64 14
  store i32 %19, ptr %20, align 2, !tbaa !16
  %21 = tail call i32 @SwapBytes32(i32 noundef %2) #3
  %22 = getelementptr inbounds i8, ptr %6, i64 18
  store i32 %21, ptr %22, align 2, !tbaa !17
  %23 = getelementptr inbounds i8, ptr %6, i64 22
  %24 = call ptr @CopyMem(ptr noundef nonnull %23, ptr noundef %3, i64 noundef %10) #3
  %25 = call i64 @Tpm12SubmitCommand(i32 noundef %11, ptr noundef nonnull %6, ptr noundef nonnull %5, ptr noundef nonnull %7) #3
  %26 = icmp slt i64 %25, 0
  br i1 %26, label %36, label %27

27:                                               ; preds = %9
  %28 = getelementptr inbounds i8, ptr %7, i64 6
  %29 = load i32, ptr %28, align 1, !tbaa !18
  %30 = call i32 @SwapBytes32(i32 noundef %29) #3
  %31 = call zeroext i8 @DebugPrintEnabled() #3
  %.not = icmp eq i8 %31, 0
  br i1 %.not, label %35, label %32

32:                                               ; preds = %27
  %33 = call zeroext i8 @DebugPrintLevelEnabled(i64 noundef 64) #3
  %.not15 = icmp eq i8 %33, 0
  br i1 %.not15, label %35, label %34

34:                                               ; preds = %32
  call void (i64, ptr, ...) @DebugPrint(i64 noundef 64, ptr noundef nonnull @.str.2, i32 noundef %30) #3
  br label %35

35:                                               ; preds = %32, %34, %27
  %cond = icmp eq i32 %30, 0
  %. = select i1 %cond, i64 0, i64 -9223372036854775801
  br label %36

36:                                               ; preds = %35, %9, %4
  %.0 = phi i64 [ -9223372036854775805, %4 ], [ %25, %9 ], [ %., %35 ]
  call void @llvm.lifetime.end.p0(i64 10, ptr nonnull %7) #3
  call void @llvm.lifetime.end.p0(i64 1046, ptr nonnull %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
  ret i64 %.0
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 0}
!10 = !{!"", !11, i64 0, !6, i64 10, !6, i64 14, !6, i64 18, !7, i64 22}
!11 = !{!"tdTPM_RQU_COMMAND_HDR", !12, i64 0, !6, i64 2, !6, i64 6}
!12 = !{!"short", !7, i64 0}
!13 = !{!10, !6, i64 2}
!14 = !{!10, !6, i64 6}
!15 = !{!10, !6, i64 10}
!16 = !{!10, !6, i64 14}
!17 = !{!10, !6, i64 18}
!18 = !{!19, !6, i64 6}
!19 = !{!"", !20, i64 0}
!20 = !{!"tdTPM_RSP_COMMAND_HDR", !12, i64 0, !6, i64 2, !6, i64 6}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass