; LLVM IR from ryanlayer/giggle :: src (query_filter)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%union.metadata_data = type { i64 }
%struct.metadata_type = type { i32, i8, [32 x i8] }

@.str = external hidden unnamed_addr constant [23 x i8], align 1
@.str.6 = external hidden unnamed_addr constant [24 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: noreturn
declare void @err(i32 noundef, ptr noundef, ...) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @perform_metadata_comparison(ptr noundef %0, i32 noundef %1, i64 %2, i64 %3) #2 {
  %5 = alloca %union.metadata_data, align 8
  %6 = alloca %union.metadata_data, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i8, align 1
  %15 = alloca i8, align 1
  %16 = alloca i16, align 2
  %17 = alloca i32, align 4
  %18 = alloca i64, align 8
  %19 = alloca float, align 4
  %20 = alloca double, align 8
  %21 = alloca i32, align 4
  %22 = getelementptr inbounds %union.metadata_data, ptr %5, i32 0, i32 0
  store i64 %2, ptr %22, align 8
  %23 = getelementptr inbounds %union.metadata_data, ptr %6, i32 0, i32 0
  store i64 %3, ptr %23, align 8
  store ptr %0, ptr %7, align 8, !tbaa !5
  store i32 %1, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  %24 = load ptr, ptr %7, align 8, !tbaa !5
  %25 = getelementptr inbounds %struct.metadata_type, ptr %24, i32 0, i32 0
  %26 = load i32, ptr %25, align 4, !tbaa !11
  store i32 %26, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  call void @llvm.lifetime.start.p0(i64 1, ptr %14) #4
  call void @llvm.lifetime.start.p0(i64 1, ptr %15) #4
  call void @llvm.lifetime.start.p0(i64 2, ptr %16) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %20) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #4
  %27 = load i32, ptr %9, align 4, !tbaa !9
  switch i32 %27, label %150 [
    i32 0, label %28
    i32 1, label %47
    i32 2, label %66
    i32 3, label %85
    i32 4, label %98
    i32 5, label %111
    i32 6, label %124
    i32 7, label %137
  ]

28:                                               ; preds = %4
  %29 = load i8, ptr %5, align 8, !tbaa !13
  %30 = sext i8 %29 to i32
  %31 = load i8, ptr %6, align 8, !tbaa !13
  %32 = sext i8 %31 to i32
  %33 = sub nsw i32 %30, %32
  %34 = trunc i32 %33 to i8
  store i8 %34, ptr %14, align 1, !tbaa !13
  %35 = load i8, ptr %14, align 1, !tbaa !13
  %36 = sext i8 %35 to i32
  %37 = icmp slt i32 %36, 0
  %38 = zext i1 %37 to i32
  store i32 %38, ptr %10, align 4, !tbaa !9
  %39 = load i8, ptr %14, align 1, !tbaa !13
  %40 = sext i8 %39 to i32
  %41 = icmp eq i32 %40, 0
  %42 = zext i1 %41 to i32
  store i32 %42, ptr %11, align 4, !tbaa !9
  %43 = load i8, ptr %14, align 1, !tbaa !13
  %44 = sext i8 %43 to i32
  %45 = icmp sgt i32 %44, 0
  %46 = zext i1 %45 to i32
  store i32 %46, ptr %12, align 4, !tbaa !9
  br label %152

47:                                               ; preds = %4
  %48 = load i8, ptr %5, align 8, !tbaa !13
  %49 = sext i8 %48 to i32
  %50 = load i8, ptr %6, align 8, !tbaa !13
  %51 = sext i8 %50 to i32
  %52 = sub nsw i32 %49, %51
  %53 = trunc i32 %52 to i8
  store i8 %53, ptr %15, align 1, !tbaa !13
  %54 = load i8, ptr %15, align 1, !tbaa !13
  %55 = sext i8 %54 to i32
  %56 = icmp slt i32 %55, 0
  %57 = zext i1 %56 to i32
  store i32 %57, ptr %10, align 4, !tbaa !9
  %58 = load i8, ptr %15, align 1, !tbaa !13
  %59 = sext i8 %58 to i32
  %60 = icmp eq i32 %59, 0
  %61 = zext i1 %60 to i32
  store i32 %61, ptr %11, align 4, !tbaa !9
  %62 = load i8, ptr %15, align 1, !tbaa !13
  %63 = sext i8 %62 to i32
  %64 = icmp sgt i32 %63, 0
  %65 = zext i1 %64 to i32
  store i32 %65, ptr %12, align 4, !tbaa !9
  br label %152

66:                                               ; preds = %4
  %67 = load i16, ptr %5, align 8, !tbaa !13
  %68 = sext i16 %67 to i32
  %69 = load i16, ptr %6, align 8, !tbaa !13
  %70 = sext i16 %69 to i32
  %71 = sub nsw i32 %68, %70
  %72 = trunc i32 %71 to i16
  store i16 %72, ptr %16, align 2, !tbaa !14
  %73 = load i16, ptr %16, align 2, !tbaa !14
  %74 = sext i16 %73 to i32
  %75 = icmp slt i32 %74, 0
  %76 = zext i1 %75 to i32
  store i32 %76, ptr %10, align 4, !tbaa !9
  %77 = load i16, ptr %16, align 2, !tbaa !14
  %78 = sext i16 %77 to i32
  %79 = icmp eq i32 %78, 0
  %80 = zext i1 %79 to i32
  store i32 %80, ptr %11, align 4, !tbaa !9
  %81 = load i16, ptr %16, align 2, !tbaa !14
  %82 = sext i16 %81 to i32
  %83 = icmp sgt i32 %82, 0
  %84 = zext i1 %83 to i32
  store i32 %84, ptr %12, align 4, !tbaa !9
  br label %152

85:                                               ; preds = %4
  %86 = load i32, ptr %5, align 8, !tbaa !13
  %87 = load i32, ptr %6, align 8, !tbaa !13
  %88 = sub nsw i32 %86, %87
  store i32 %88, ptr %17, align 4, !tbaa !9
  %89 = load i32, ptr %17, align 4, !tbaa !9
  %90 = icmp slt i32 %89, 0
  %91 = zext i1 %90 to i32
  store i32 %91, ptr %10, align 4, !tbaa !9
  %92 = load i32, ptr %17, align 4, !tbaa !9
  %93 = icmp eq i32 %92, 0
  %94 = zext i1 %93 to i32
  store i32 %94, ptr %11, align 4, !tbaa !9
  %95 = load i32, ptr %17, align 4, !tbaa !9
  %96 = icmp sgt i32 %95, 0
  %97 = zext i1 %96 to i32
  store i32 %97, ptr %12, align 4, !tbaa !9
  br label %152

98:                                               ; preds = %4
  %99 = load i64, ptr %5, align 8, !tbaa !13
  %100 = load i64, ptr %6, align 8, !tbaa !13
  %101 = sub nsw i64 %99, %100
  store i64 %101, ptr %18, align 8, !tbaa !16
  %102 = load i64, ptr %18, align 8, !tbaa !16
  %103 = icmp slt i64 %102, 0
  %104 = zext i1 %103 to i32
  store i32 %104, ptr %10, align 4, !tbaa !9
  %105 = load i64, ptr %18, align 8, !tbaa !16
  %106 = icmp eq i64 %105, 0
  %107 = zext i1 %106 to i32
  store i32 %107, ptr %11, align 4, !tbaa !9
  %108 = load i64, ptr %18, align 8, !tbaa !16
  %109 = icmp sgt i64 %108, 0
  %110 = zext i1 %109 to i32
  store i32 %110, ptr %12, align 4, !tbaa !9
  br label %152

111:                                              ; preds = %4
  %112 = load float, ptr %5, align 8, !tbaa !13
  %113 = load float, ptr %6, align 8, !tbaa !13
  %114 = fsub float %112, %113
  store float %114, ptr %19, align 4, !tbaa !18
  %115 = load float, ptr %19, align 4, !tbaa !18
  %116 = fcmp olt float %115, 0.000000e+00
  %117 = zext i1 %116 to i32
  store i32 %117, ptr %10, align 4, !tbaa !9
  %118 = load float, ptr %19, align 4, !tbaa !18
  %119 = fcmp oeq float %118, 0.000000e+00
  %120 = zext i1 %119 to i32
  store i32 %120, ptr %11, align 4, !tbaa !9
  %121 = load float, ptr %19, align 4, !tbaa !18
  %122 = fcmp ogt float %121, 0.000000e+00
  %123 = zext i1 %122 to i32
  store i32 %123, ptr %12, align 4, !tbaa !9
  br label %152

124:                                              ; preds = %4
  %125 = load double, ptr %5, align 8, !tbaa !13
  %126 = load double, ptr %6, align 8, !tbaa !13
  %127 = fsub double %125, %126
  store double %127, ptr %20, align 8, !tbaa !20
  %128 = load double, ptr %20, align 8, !tbaa !20
  %129 = fcmp olt double %128, 0.000000e+00
  %130 = zext i1 %129 to i32
  store i32 %130, ptr %10, align 4, !tbaa !9
  %131 = load double, ptr %20, align 8, !tbaa !20
  %132 = fcmp oeq double %131, 0.000000e+00
  %133 = zext i1 %132 to i32
  store i32 %133, ptr %11, align 4, !tbaa !9
  %134 = load double, ptr %20, align 8, !tbaa !20
  %135 = fcmp ogt double %134, 0.000000e+00
  %136 = zext i1 %135 to i32
  store i32 %136, ptr %12, align 4, !tbaa !9
  br label %152

137:                                              ; preds = %4
  %138 = load ptr, ptr %5, align 8, !tbaa !13
  %139 = load ptr, ptr %6, align 8, !tbaa !13
  %140 = call i32 @strcmp(ptr noundef %138, ptr noundef %139) #5
  store i32 %140, ptr %21, align 4, !tbaa !9
  %141 = load i32, ptr %21, align 4, !tbaa !9
  %142 = icmp slt i32 %141, 0
  %143 = zext i1 %142 to i32
  store i32 %143, ptr %10, align 4, !tbaa !9
  %144 = load i32, ptr %21, align 4, !tbaa !9
  %145 = icmp eq i32 %144, 0
  %146 = zext i1 %145 to i32
  store i32 %146, ptr %11, align 4, !tbaa !9
  %147 = load i32, ptr %21, align 4, !tbaa !9
  %148 = icmp sgt i32 %147, 0
  %149 = zext i1 %148 to i32
  store i32 %149, ptr %12, align 4, !tbaa !9
  br label %152

150:                                              ; preds = %4
  %151 = load i32, ptr %9, align 4, !tbaa !9
  call void (i32, ptr, ...) @err(i32 noundef 1, ptr noundef @.str, i32 noundef %151) #6
  unreachable

152:                                              ; preds = %137, %124, %111, %98, %85, %66, %47, %28
  %153 = load i32, ptr %8, align 4, !tbaa !9
  switch i32 %153, label %183 [
    i32 0, label %154
    i32 1, label %156
    i32 2, label %161
    i32 3, label %163
    i32 4, label %165
    i32 5, label %174
  ]

154:                                              ; preds = %152
  %155 = load i32, ptr %11, align 4, !tbaa !9
  store i32 %155, ptr %13, align 4, !tbaa !9
  br label %185

156:                                              ; preds = %152
  %157 = load i32, ptr %11, align 4, !tbaa !9
  %158 = icmp ne i32 %157, 0
  %159 = xor i1 %158, true
  %160 = zext i1 %159 to i32
  store i32 %160, ptr %13, align 4, !tbaa !9
  br label %185

161:                                              ; preds = %152
  %162 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %162, ptr %13, align 4, !tbaa !9
  br label %185

163:                                              ; preds = %152
  %164 = load i32, ptr %12, align 4, !tbaa !9
  store i32 %164, ptr %13, align 4, !tbaa !9
  br label %185

165:                                              ; preds = %152
  %166 = load i32, ptr %10, align 4, !tbaa !9
  %167 = icmp ne i32 %166, 0
  br i1 %167, label %171, label %168

168:                                              ; preds = %165
  %169 = load i32, ptr %11, align 4, !tbaa !9
  %170 = icmp ne i32 %169, 0
  br label %171

171:                                              ; preds = %168, %165
  %172 = phi i1 [ true, %165 ], [ %170, %168 ]
  %173 = zext i1 %172 to i32
  store i32 %173, ptr %13, align 4, !tbaa !9
  br label %185

174:                                              ; preds = %152
  %175 = load i32, ptr %12, align 4, !tbaa !9
  %176 = icmp ne i32 %175, 0
  br i1 %176, label %180, label %177

177:                                              ; preds = %174
  %178 = load i32, ptr %11, align 4, !tbaa !9
  %179 = icmp ne i32 %178, 0
  br label %180

180:                                              ; preds = %177, %174
  %181 = phi i1 [ true, %174 ], [ %179, %177 ]
  %182 = zext i1 %181 to i32
  store i32 %182, ptr %13, align 4, !tbaa !9
  br label %185

183:                                              ; preds = %152
  %184 = load i32, ptr %8, align 4, !tbaa !9
  call void (i32, ptr, ...) @err(i32 noundef 1, ptr noundef @.str.6, i32 noundef %184) #6
  unreachable

185:                                              ; preds = %180, %171, %163, %161, %156, %154
  %186 = load i32, ptr %13, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #4
  call void @llvm.lifetime.end.p0(i64 2, ptr %16) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  ret i32 %186
}

; Function Attrs: nounwind willreturn memory(read)
declare i32 @strcmp(ptr noundef, ptr noundef) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind willreturn memory(read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { nounwind willreturn memory(read) }
attributes #6 = { noreturn }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"metadata_type", !10, i64 0, !7, i64 4, !7, i64 5}
!13 = !{!7, !7, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"short", !7, i64 0}
!16 = !{!17, !17, i64 0}
!17 = !{!"long", !7, i64 0}
!18 = !{!19, !19, i64 0}
!19 = !{!"float", !7, i64 0}
!20 = !{!21, !21, i64 0}
!21 = !{!"double", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [23 x i8], align 1
@.str.6 = external hidden unnamed_addr constant [24 x i8], align 1

; Function Attrs: noreturn
declare void @err(i32 noundef, ptr noundef, ...) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @perform_metadata_comparison(ptr nocapture noundef readonly %0, i32 noundef %1, i64 %2, i64 %3) local_unnamed_addr #1 {
  %.sroa.0.sroa.0.sroa.0.sroa.0180.0.extract.trunc = trunc i64 %2 to i8
  %.sroa.0.sroa.0.sroa.0.sroa.9196.0.extract.shift220 = lshr i64 %2, 8
  %.sroa.0.sroa.0.sroa.9163.0.extract.shift221 = lshr i64 %2, 16
  %.sroa.0.sroa.0.sroa.0.sroa.0.0.extract.trunc = trunc i64 %3 to i8
  %.sroa.0.sroa.0.sroa.0.sroa.9.0.extract.shift222 = lshr i64 %3, 8
  %.sroa.0.sroa.0.sroa.9.0.extract.shift223 = lshr i64 %3, 16
  %5 = load i32, ptr %0, align 4, !tbaa !5
  switch i32 %5, label %64 [
    i32 0, label %6
    i32 1, label %11
    i32 2, label %16
    i32 3, label %23
    i32 4, label %31
    i32 5, label %36
    i32 6, label %50
    i32 7, label %58
  ]

6:                                                ; preds = %4
  %7 = sub i8 %.sroa.0.sroa.0.sroa.0.sroa.0180.0.extract.trunc, %.sroa.0.sroa.0.sroa.0.sroa.0.0.extract.trunc
  %.lobit228 = lshr i8 %7, 7
  %8 = zext nneg i8 %.lobit228 to i32
  %9 = icmp eq i8 %.sroa.0.sroa.0.sroa.0.sroa.0180.0.extract.trunc, %.sroa.0.sroa.0.sroa.0.sroa.0.0.extract.trunc
  %10 = icmp sgt i8 %7, 0
  br label %65

11:                                               ; preds = %4
  %12 = sub i8 %.sroa.0.sroa.0.sroa.0.sroa.0180.0.extract.trunc, %.sroa.0.sroa.0.sroa.0.sroa.0.0.extract.trunc
  %.lobit227 = lshr i8 %12, 7
  %13 = zext nneg i8 %.lobit227 to i32
  %14 = icmp eq i8 %.sroa.0.sroa.0.sroa.0.sroa.0180.0.extract.trunc, %.sroa.0.sroa.0.sroa.0.sroa.0.0.extract.trunc
  %15 = icmp sgt i8 %12, 0
  br label %65

16:                                               ; preds = %4
  %.sroa.0.sroa.0.sroa.0.sroa.9.0.extract.trunc = trunc i64 %.sroa.0.sroa.0.sroa.0.sroa.9.0.extract.shift222 to i16
  %.sroa.0.sroa.0.sroa.0.sroa.9196.0.extract.trunc = trunc i64 %.sroa.0.sroa.0.sroa.0.sroa.9196.0.extract.shift220 to i16
  %.sroa.0.sroa.0.sroa.0.sroa.9196.0.insert.ext = shl i16 %.sroa.0.sroa.0.sroa.0.sroa.9196.0.extract.trunc, 8
  %17 = trunc i64 %2 to i16
  %.sroa.0.sroa.0.sroa.0.sroa.0180.0.insert.ext = and i16 %17, 255
  %.sroa.0.sroa.0.sroa.0.sroa.0180.0.insert.insert = or disjoint i16 %.sroa.0.sroa.0.sroa.0.sroa.9196.0.insert.ext, %.sroa.0.sroa.0.sroa.0.sroa.0180.0.insert.ext
  %.sroa.0.sroa.0.sroa.0.sroa.9.0.insert.ext = shl i16 %.sroa.0.sroa.0.sroa.0.sroa.9.0.extract.trunc, 8
  %18 = trunc i64 %3 to i16
  %.sroa.0.sroa.0.sroa.0.sroa.0.0.insert.ext = and i16 %18, 255
  %.sroa.0.sroa.0.sroa.0.sroa.0.0.insert.insert = or disjoint i16 %.sroa.0.sroa.0.sroa.0.sroa.9.0.insert.ext, %.sroa.0.sroa.0.sroa.0.sroa.0.0.insert.ext
  %19 = sub i16 %.sroa.0.sroa.0.sroa.0.sroa.0180.0.insert.insert, %.sroa.0.sroa.0.sroa.0.sroa.0.0.insert.insert
  %.lobit226 = lshr i16 %19, 15
  %20 = zext nneg i16 %.lobit226 to i32
  %21 = icmp eq i16 %.sroa.0.sroa.0.sroa.0.sroa.0180.0.insert.insert, %.sroa.0.sroa.0.sroa.0.sroa.0.0.insert.insert
  %22 = icmp sgt i16 %19, 0
  br label %65

23:                                               ; preds = %4
  %.sroa.0.sroa.0.sroa.9.0.extract.trunc = trunc i64 %.sroa.0.sroa.0.sroa.9.0.extract.shift223 to i32
  %.sroa.0.sroa.0.sroa.9163.0.extract.trunc = trunc i64 %.sroa.0.sroa.0.sroa.9163.0.extract.shift221 to i32
  %24 = trunc i64 %.sroa.0.sroa.0.sroa.0.sroa.9196.0.extract.shift220 to i32
  %.sroa.0.sroa.0.sroa.0.sroa.9196.0.insert.ext201 = shl i32 %24, 8
  %25 = trunc i64 %2 to i32
  %.sroa.0.sroa.0.sroa.0.sroa.0180.0.insert.ext184 = and i32 %25, 255
  %.sroa.0.sroa.0.sroa.9163.0.insert.ext164 = shl i32 %.sroa.0.sroa.0.sroa.9163.0.extract.trunc, 16
  %.sroa.0.sroa.0.sroa.0.sroa.9196.0.insert.ext201.masked = and i32 %.sroa.0.sroa.0.sroa.0.sroa.9196.0.insert.ext201, 65280
  %.sroa.0.sroa.0.sroa.0.0.insert.ext150 = or disjoint i32 %.sroa.0.sroa.0.sroa.0.sroa.0180.0.insert.ext184, %.sroa.0.sroa.0.sroa.0.sroa.9196.0.insert.ext201.masked
  %.sroa.0.sroa.0.sroa.0.0.insert.insert152 = or disjoint i32 %.sroa.0.sroa.0.sroa.0.0.insert.ext150, %.sroa.0.sroa.0.sroa.9163.0.insert.ext164
  %26 = trunc i64 %.sroa.0.sroa.0.sroa.0.sroa.9.0.extract.shift222 to i32
  %.sroa.0.sroa.0.sroa.0.sroa.9.0.insert.ext105 = shl i32 %26, 8
  %27 = trunc i64 %3 to i32
  %.sroa.0.sroa.0.sroa.0.sroa.0.0.insert.ext89 = and i32 %27, 255
  %.sroa.0.sroa.0.sroa.9.0.insert.ext70 = shl i32 %.sroa.0.sroa.0.sroa.9.0.extract.trunc, 16
  %.sroa.0.sroa.0.sroa.0.sroa.9.0.insert.ext105.masked = and i32 %.sroa.0.sroa.0.sroa.0.sroa.9.0.insert.ext105, 65280
  %.sroa.0.sroa.0.sroa.0.0.insert.ext58 = or disjoint i32 %.sroa.0.sroa.0.sroa.0.sroa.0.0.insert.ext89, %.sroa.0.sroa.0.sroa.0.sroa.9.0.insert.ext105.masked
  %.sroa.0.sroa.0.sroa.0.0.insert.insert60 = or disjoint i32 %.sroa.0.sroa.0.sroa.0.0.insert.ext58, %.sroa.0.sroa.0.sroa.9.0.insert.ext70
  %28 = sub nsw i32 %.sroa.0.sroa.0.sroa.0.0.insert.insert152, %.sroa.0.sroa.0.sroa.0.0.insert.insert60
  %.lobit225 = lshr i32 %28, 31
  %29 = icmp eq i32 %.sroa.0.sroa.0.sroa.0.0.insert.insert152, %.sroa.0.sroa.0.sroa.0.0.insert.insert60
  %30 = icmp sgt i32 %28, 0
  br label %65

31:                                               ; preds = %4
  %32 = sub nsw i64 %2, %3
  %.lobit224 = lshr i64 %32, 63
  %33 = trunc nuw nsw i64 %.lobit224 to i32
  %34 = icmp eq i64 %2, %3
  %35 = icmp sgt i64 %32, 0
  br label %65

36:                                               ; preds = %4
  %37 = trunc i64 %.sroa.0.sroa.0.sroa.0.sroa.9196.0.extract.shift220 to i32
  %.sroa.0.sroa.0.sroa.0.sroa.9196.0.insert.ext197 = shl i32 %37, 8
  %38 = trunc i64 %2 to i32
  %.sroa.0.sroa.0.sroa.0.sroa.0180.0.insert.ext181 = and i32 %38, 255
  %39 = trunc i64 %.sroa.0.sroa.0.sroa.9163.0.extract.shift221 to i32
  %.sroa.0.sroa.0.sroa.9163.0.insert.ext = shl i32 %39, 16
  %.sroa.0.sroa.0.sroa.0.sroa.9196.0.insert.ext197.masked = and i32 %.sroa.0.sroa.0.sroa.0.sroa.9196.0.insert.ext197, 65280
  %.sroa.0.sroa.0.sroa.0.0.insert.ext147 = or disjoint i32 %.sroa.0.sroa.0.sroa.0.sroa.0180.0.insert.ext181, %.sroa.0.sroa.0.sroa.0.sroa.9196.0.insert.ext197.masked
  %.sroa.0.sroa.0.sroa.0.0.insert.insert149 = or disjoint i32 %.sroa.0.sroa.0.sroa.0.0.insert.ext147, %.sroa.0.sroa.0.sroa.9163.0.insert.ext
  %40 = bitcast i32 %.sroa.0.sroa.0.sroa.0.0.insert.insert149 to float
  %41 = trunc i64 %.sroa.0.sroa.0.sroa.0.sroa.9.0.extract.shift222 to i32
  %.sroa.0.sroa.0.sroa.0.sroa.9.0.insert.ext101 = shl i32 %41, 8
  %42 = trunc i64 %3 to i32
  %.sroa.0.sroa.0.sroa.0.sroa.0.0.insert.ext86 = and i32 %42, 255
  %43 = trunc i64 %.sroa.0.sroa.0.sroa.9.0.extract.shift223 to i32
  %.sroa.0.sroa.0.sroa.9.0.insert.ext = shl i32 %43, 16
  %.sroa.0.sroa.0.sroa.0.sroa.9.0.insert.ext101.masked = and i32 %.sroa.0.sroa.0.sroa.0.sroa.9.0.insert.ext101, 65280
  %.sroa.0.sroa.0.sroa.0.0.insert.ext = or disjoint i32 %.sroa.0.sroa.0.sroa.0.sroa.0.0.insert.ext86, %.sroa.0.sroa.0.sroa.0.sroa.9.0.insert.ext101.masked
  %.sroa.0.sroa.0.sroa.0.0.insert.insert = or disjoint i32 %.sroa.0.sroa.0.sroa.0.0.insert.ext, %.sroa.0.sroa.0.sroa.9.0.insert.ext
  %44 = bitcast i32 %.sroa.0.sroa.0.sroa.0.0.insert.insert to float
  %45 = fsub float %40, %44
  %46 = fcmp olt float %45, 0.000000e+00
  %47 = zext i1 %46 to i32
  %48 = fcmp oeq float %45, 0.000000e+00
  %49 = fcmp ogt float %45, 0.000000e+00
  br label %65

50:                                               ; preds = %4
  %51 = bitcast i64 %2 to double
  %52 = bitcast i64 %3 to double
  %53 = fsub double %51, %52
  %54 = fcmp olt double %53, 0.000000e+00
  %55 = zext i1 %54 to i32
  %56 = fcmp oeq double %53, 0.000000e+00
  %57 = fcmp ogt double %53, 0.000000e+00
  br label %65

58:                                               ; preds = %4
  %59 = inttoptr i64 %2 to ptr
  %60 = inttoptr i64 %3 to ptr
  %61 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(1) %59, ptr noundef nonnull dereferenceable(1) %60) #3
  %.lobit = lshr i32 %61, 31
  %62 = icmp eq i32 %61, 0
  %63 = icmp sgt i32 %61, 0
  br label %65

64:                                               ; preds = %4
  tail call void (i32, ptr, ...) @err(i32 noundef 1, ptr noundef nonnull @.str, i32 noundef %5) #4
  unreachable

65:                                               ; preds = %58, %50, %36, %31, %23, %16, %11, %6
  %.0218.in = phi i1 [ %63, %58 ], [ %57, %50 ], [ %49, %36 ], [ %35, %31 ], [ %30, %23 ], [ %22, %16 ], [ %15, %11 ], [ %10, %6 ]
  %.0217.in = phi i1 [ %62, %58 ], [ %56, %50 ], [ %48, %36 ], [ %34, %31 ], [ %29, %23 ], [ %21, %16 ], [ %14, %11 ], [ %9, %6 ]
  %.0 = phi i32 [ %.lobit, %58 ], [ %55, %50 ], [ %47, %36 ], [ %33, %31 ], [ %.lobit225, %23 ], [ %20, %16 ], [ %13, %11 ], [ %8, %6 ]
  switch i32 %1, label %78 [
    i32 0, label %66
    i32 1, label %67
    i32 2, label %79
    i32 3, label %70
    i32 4, label %71
    i32 5, label %75
  ]

66:                                               ; preds = %65
  %.0217 = zext i1 %.0217.in to i32
  br label %79

67:                                               ; preds = %65
  %68 = xor i1 %.0217.in, true
  %69 = zext i1 %68 to i32
  br label %79

70:                                               ; preds = %65
  %.0218 = zext i1 %.0218.in to i32
  br label %79

71:                                               ; preds = %65
  %72 = icmp ne i32 %.0, 0
  %73 = select i1 %72, i1 true, i1 %.0217.in
  %74 = zext i1 %73 to i32
  br label %79

75:                                               ; preds = %65
  %76 = select i1 %.0218.in, i1 true, i1 %.0217.in
  %77 = zext i1 %76 to i32
  br label %79

78:                                               ; preds = %65
  tail call void (i32, ptr, ...) @err(i32 noundef 1, ptr noundef nonnull @.str.6, i32 noundef %1) #4
  unreachable

79:                                               ; preds = %65, %75, %71, %70, %67, %66
  %.0219 = phi i32 [ %77, %75 ], [ %74, %71 ], [ %.0218, %70 ], [ %69, %67 ], [ %.0217, %66 ], [ %.0, %65 ]
  ret i32 %.0219
}

; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare i32 @strcmp(ptr nocapture noundef, ptr nocapture noundef) local_unnamed_addr #2

attributes #0 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nofree nounwind willreturn memory(argmem: read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind willreturn memory(read) }
attributes #4 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"metadata_type", !7, i64 0, !8, i64 4, !8, i64 5}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass