; LLVM IR from gem5/gem5 :: ext/mcpat/logic.ll (ZN18InstructionDecoder16leakage_feedbackEd)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.TechnologyParameter = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, i64, %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::ScalingFactor", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType" }
%"class.TechnologyParameter::DeviceType" = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::InterconnectType" = type { double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::ScalingFactor" = type { double, double, double }
%"class.TechnologyParameter::MemoryType" = type { double, double, double, double, double, double }
%class.uca_org_t = type { ptr, ptr, double, double, double, double, %class.powerDef, double, double, double, [100 x i8], double, i8, %struct.results_mem_array, %struct.results_mem_array }
%class.powerDef = type { %class.powerComponents, %class.powerComponents, %class.powerComponents }
%class.powerComponents = type { double, double, double, double, double }
%struct.results_mem_array = type { i32, i32, double, i32, i32, i32, i32, i32, i32, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double }
%class.InstructionDecoder = type { %class.McPATComponent, ptr, ptr, i8, i32, i32, i8, i32, i32, %class.InputParameter, %class.uca_org_t, i32, i32, %class.statsDef }
%class.McPATComponent = type { ptr, %class.Component, ptr, %class.InputParameter, %"class.std::__cxx11::basic_string", double, %"class.std::vector", %class.McPATOutput, %class.statsDef, %class.statsDef, %class.powerDef, %class.powerDef }
%class.Component = type { %class.Area, %class.powerDef, %class.powerDef, double, double }
%class.Area = type { double, double, double }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<McPATComponent *, std::allocator<McPATComponent *>>::_Vector_impl" }
%"struct.std::_Vector_base<McPATComponent *, std::allocator<McPATComponent *>>::_Vector_impl" = type { %"struct.std::_Vector_base<McPATComponent *, std::allocator<McPATComponent *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<McPATComponent *, std::allocator<McPATComponent *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.McPATOutput = type { double, double, double, double, double, double }
%class.InputParameter = type { i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, i32, double, double, i32, i32, i32, i32, i32, i8, i8, i8, i8, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i8, i8, i32, i32, i8, double, double, i8, i32, i32, i8 }
%class.statsDef = type { %class.statsComponents, %class.statsComponents, %class.statsComponents, %class.statsComponents, %class.statsComponents, %class.statsComponents, %class.statsComponents }
%class.statsComponents = type { double, double, double }

@g_tp = external global %class.TechnologyParameter, align 8
@__const._ZN18InstructionDecoder16leakage_feedbackEd.pppm_t = external hidden unnamed_addr constant [4 x double], align 16

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @_Z14init_interfaceP14InputParameterRKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE(ptr dead_on_unwind writable sret(%class.uca_org_t) align 8, ptr noundef, ptr noundef nonnull align 8 dereferenceable(32)) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN9uca_org_tD2Ev(ptr noundef nonnull align 8 dereferenceable(8200)) unnamed_addr #3 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

declare noundef double @_Z31longer_channel_device_reduction9Device_ty9Core_type(i32 noundef, i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.round.f64(double) #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_Z8set_pppmPddddd(ptr noundef, double noundef, double noundef, double noundef, double noundef) #5

declare void @_ZplRK8powerDefS1_(ptr dead_on_unwind writable sret(%class.powerDef) align 8, ptr noundef nonnull align 8 dereferenceable(120), ptr noundef nonnull align 8 dereferenceable(120)) #2

declare void @_ZmlRK8powerDefPKd(ptr dead_on_unwind writable sret(%class.powerDef) align 8, ptr noundef nonnull align 8 dereferenceable(120), ptr noundef) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(120) ptr @_ZN8powerDefaSEOS_(ptr noundef nonnull align 8 dereferenceable(120), ptr noundef nonnull align 8 dereferenceable(120)) #5 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN18InstructionDecoder16leakage_feedbackEd(ptr noundef nonnull align 8 dereferenceable(10136) %0, double noundef %1) #6 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca ptr, align 8
  %4 = alloca double, align 8
  %5 = alloca %class.uca_org_t, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca [4 x double], align 16
  %9 = alloca double, align 8
  %10 = alloca %class.powerDef, align 8
  %11 = alloca %class.powerDef, align 8
  %12 = alloca %class.powerDef, align 8
  %13 = alloca double, align 8
  %14 = alloca double, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store double %1, ptr %4, align 8, !tbaa !9
  %15 = load ptr, ptr %3, align 8
  %16 = load double, ptr %4, align 8, !tbaa !9
  %17 = fdiv double %16, 1.000000e+01
  %18 = call double @llvm.round.f64(double %17)
  %19 = fptoui double %18 to i32
  %20 = mul i32 %19, 10
  %21 = getelementptr inbounds %class.InstructionDecoder, ptr %15, i32 0, i32 9
  %22 = getelementptr inbounds %class.InputParameter, ptr %21, i32 0, i32 26
  store i32 %20, ptr %22, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8200, ptr %5) #7
  %23 = getelementptr inbounds %class.InstructionDecoder, ptr %15, i32 0, i32 9
  %24 = getelementptr inbounds %class.McPATComponent, ptr %15, i32 0, i32 4
  call void @_Z14init_interfaceP14InputParameterRKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE(ptr dead_on_unwind writable sret(%class.uca_org_t) align 8 %5, ptr noundef %23, ptr noundef nonnull align 8 dereferenceable(32) %24)
  %25 = getelementptr inbounds %class.InstructionDecoder, ptr %15, i32 0, i32 1
  %26 = load ptr, ptr %25, align 8, !tbaa !36
  %27 = load double, ptr %4, align 8, !tbaa !9
  invoke void @_ZN7Decoder16leakage_feedbackEd(ptr noundef nonnull align 8 dereferenceable(656) %26, double noundef %27)
          to label %28 unwind label %141

28:                                               ; preds = %2
  %29 = getelementptr inbounds %class.InstructionDecoder, ptr %15, i32 0, i32 2
  %30 = load ptr, ptr %29, align 8, !tbaa !37
  %31 = load double, ptr %4, align 8, !tbaa !9
  invoke void @_ZN6Predec16leakage_feedbackEd(ptr noundef nonnull align 8 dereferenceable(552) %30, double noundef %31)
          to label %32 unwind label %141

32:                                               ; preds = %28
  call void @llvm.lifetime.start.p0(i64 32, ptr %8) #7
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %8, ptr align 16 @__const._ZN18InstructionDecoder16leakage_feedbackEd.pppm_t, i64 32, i1 false)
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #7
  %33 = getelementptr inbounds %class.InstructionDecoder, ptr %15, i32 0, i32 6
  %34 = load i8, ptr %33, align 4, !tbaa !38, !range !39, !noundef !40
  %35 = trunc i8 %34 to i1
  %36 = zext i1 %35 to i64
  %37 = select i1 %35, i32 2, i32 1
  %38 = sitofp i32 %37 to double
  store double %38, ptr %9, align 8, !tbaa !9
  %39 = getelementptr inbounds [4 x double], ptr %8, i64 0, i64 0
  %40 = load double, ptr %9, align 8, !tbaa !9
  %41 = getelementptr inbounds %class.InstructionDecoder, ptr %15, i32 0, i32 7
  %42 = load i32, ptr %41, align 8, !tbaa !41
  %43 = sitofp i32 %42 to double
  %44 = fmul double %40, %43
  %45 = getelementptr inbounds %class.InstructionDecoder, ptr %15, i32 0, i32 7
  %46 = load i32, ptr %45, align 8, !tbaa !41
  %47 = sitofp i32 %46 to double
  %48 = load double, ptr %9, align 8, !tbaa !9
  %49 = getelementptr inbounds %class.InstructionDecoder, ptr %15, i32 0, i32 7
  %50 = load i32, ptr %49, align 8, !tbaa !41
  %51 = sitofp i32 %50 to double
  %52 = fmul double %48, %51
  %53 = getelementptr inbounds %class.InstructionDecoder, ptr %15, i32 0, i32 7
  %54 = load i32, ptr %53, align 8, !tbaa !41
  %55 = sitofp i32 %54 to double
  invoke void @_Z8set_pppmPddddd(ptr noundef %39, double noundef %44, double noundef %47, double noundef %52, double noundef %55)
          to label %56 unwind label %145

56:                                               ; preds = %32
  call void @llvm.lifetime.start.p0(i64 120, ptr %10) #7
  %57 = getelementptr inbounds %class.InstructionDecoder, ptr %15, i32 0, i32 2
  %58 = load ptr, ptr %57, align 8, !tbaa !37
  %59 = getelementptr inbounds %class.Component, ptr %58, i32 0, i32 1
  %60 = getelementptr inbounds [4 x double], ptr %8, i64 0, i64 0
  invoke void @_ZmlRK8powerDefPKd(ptr dead_on_unwind writable sret(%class.powerDef) align 8 %10, ptr noundef nonnull align 8 dereferenceable(120) %59, ptr noundef %60)
          to label %61 unwind label %149

61:                                               ; preds = %56
  %62 = getelementptr inbounds i8, ptr %15, i64 8
  %63 = getelementptr inbounds %class.Component, ptr %62, i32 0, i32 1
  %64 = invoke noundef nonnull align 8 dereferenceable(120) ptr @_ZN8powerDefaSEOS_(ptr noundef nonnull align 8 dereferenceable(120) %63, ptr noundef nonnull align 8 dereferenceable(120) %10)
          to label %65 unwind label %149

65:                                               ; preds = %61
  call void @llvm.lifetime.end.p0(i64 120, ptr %10) #7
  %66 = getelementptr inbounds [4 x double], ptr %8, i64 0, i64 0
  %67 = load double, ptr %9, align 8, !tbaa !9
  %68 = getelementptr inbounds %class.InstructionDecoder, ptr %15, i32 0, i32 7
  %69 = load i32, ptr %68, align 8, !tbaa !41
  %70 = sitofp i32 %69 to double
  %71 = fmul double %67, %70
  %72 = getelementptr inbounds %class.InstructionDecoder, ptr %15, i32 0, i32 7
  %73 = load i32, ptr %72, align 8, !tbaa !41
  %74 = getelementptr inbounds %class.InstructionDecoder, ptr %15, i32 0, i32 8
  %75 = load i32, ptr %74, align 4, !tbaa !42
  %76 = mul nsw i32 %73, %75
  %77 = sitofp i32 %76 to double
  %78 = getelementptr inbounds %class.InstructionDecoder, ptr %15, i32 0, i32 7
  %79 = load i32, ptr %78, align 8, !tbaa !41
  %80 = getelementptr inbounds %class.InstructionDecoder, ptr %15, i32 0, i32 8
  %81 = load i32, ptr %80, align 4, !tbaa !42
  %82 = mul nsw i32 %79, %81
  %83 = sitofp i32 %82 to double
  %84 = load double, ptr %9, align 8, !tbaa !9
  %85 = getelementptr inbounds %class.InstructionDecoder, ptr %15, i32 0, i32 7
  %86 = load i32, ptr %85, align 8, !tbaa !41
  %87 = sitofp i32 %86 to double
  %88 = fmul double %84, %87
  invoke void @_Z8set_pppmPddddd(ptr noundef %66, double noundef %71, double noundef %77, double noundef %83, double noundef %88)
          to label %89 unwind label %145

89:                                               ; preds = %65
  call void @llvm.lifetime.start.p0(i64 120, ptr %11) #7
  %90 = getelementptr inbounds i8, ptr %15, i64 8
  %91 = getelementptr inbounds %class.Component, ptr %90, i32 0, i32 1
  call void @llvm.lifetime.start.p0(i64 120, ptr %12) #7
  %92 = getelementptr inbounds %class.InstructionDecoder, ptr %15, i32 0, i32 1
  %93 = load ptr, ptr %92, align 8, !tbaa !36
  %94 = getelementptr inbounds %class.Component, ptr %93, i32 0, i32 1
  %95 = getelementptr inbounds [4 x double], ptr %8, i64 0, i64 0
  invoke void @_ZmlRK8powerDefPKd(ptr dead_on_unwind writable sret(%class.powerDef) align 8 %12, ptr noundef nonnull align 8 dereferenceable(120) %94, ptr noundef %95)
          to label %96 unwind label %153

96:                                               ; preds = %89
  invoke void @_ZplRK8powerDefS1_(ptr dead_on_unwind writable sret(%class.powerDef) align 8 %11, ptr noundef nonnull align 8 dereferenceable(120) %91, ptr noundef nonnull align 8 dereferenceable(120) %12)
          to label %97 unwind label %153

97:                                               ; preds = %96
  %98 = getelementptr inbounds i8, ptr %15, i64 8
  %99 = getelementptr inbounds %class.Component, ptr %98, i32 0, i32 1
  %100 = invoke noundef nonnull align 8 dereferenceable(120) ptr @_ZN8powerDefaSEOS_(ptr noundef nonnull align 8 dereferenceable(120) %99, ptr noundef nonnull align 8 dereferenceable(120) %11)
          to label %101 unwind label %153

101:                                              ; preds = %97
  call void @llvm.lifetime.end.p0(i64 120, ptr %12) #7
  call void @llvm.lifetime.end.p0(i64 120, ptr %11) #7
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #7
  %102 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 42), align 8, !tbaa !43
  store double %102, ptr %13, align 8, !tbaa !9
  %103 = load double, ptr %13, align 8, !tbaa !9
  %104 = getelementptr inbounds i8, ptr %15, i64 8
  %105 = getelementptr inbounds %class.Component, ptr %104, i32 0, i32 1
  %106 = getelementptr inbounds %class.powerDef, ptr %105, i32 0, i32 0
  %107 = getelementptr inbounds %class.powerComponents, ptr %106, i32 0, i32 0
  %108 = load double, ptr %107, align 8, !tbaa !49
  %109 = fmul double %108, %103
  store double %109, ptr %107, align 8, !tbaa !49
  %110 = load double, ptr %13, align 8, !tbaa !9
  %111 = getelementptr inbounds i8, ptr %15, i64 8
  %112 = getelementptr inbounds %class.Component, ptr %111, i32 0, i32 1
  %113 = getelementptr inbounds %class.powerDef, ptr %112, i32 0, i32 1
  %114 = getelementptr inbounds %class.powerComponents, ptr %113, i32 0, i32 0
  %115 = load double, ptr %114, align 8, !tbaa !50
  %116 = fmul double %115, %110
  store double %116, ptr %114, align 8, !tbaa !50
  %117 = load double, ptr %13, align 8, !tbaa !9
  %118 = getelementptr inbounds i8, ptr %15, i64 8
  %119 = getelementptr inbounds %class.Component, ptr %118, i32 0, i32 1
  %120 = getelementptr inbounds %class.powerDef, ptr %119, i32 0, i32 2
  %121 = getelementptr inbounds %class.powerComponents, ptr %120, i32 0, i32 0
  %122 = load double, ptr %121, align 8, !tbaa !51
  %123 = fmul double %122, %117
  store double %123, ptr %121, align 8, !tbaa !51
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #7
  %124 = getelementptr inbounds %class.InstructionDecoder, ptr %15, i32 0, i32 11
  %125 = load i32, ptr %124, align 8, !tbaa !52
  %126 = getelementptr inbounds %class.InstructionDecoder, ptr %15, i32 0, i32 12
  %127 = load i32, ptr %126, align 4, !tbaa !53
  %128 = invoke noundef double @_Z31longer_channel_device_reduction9Device_ty9Core_type(i32 noundef %125, i32 noundef %127)
          to label %129 unwind label %157

129:                                              ; preds = %101
  store double %128, ptr %14, align 8, !tbaa !9
  %130 = getelementptr inbounds i8, ptr %15, i64 8
  %131 = getelementptr inbounds %class.Component, ptr %130, i32 0, i32 1
  %132 = getelementptr inbounds %class.powerDef, ptr %131, i32 0, i32 0
  %133 = getelementptr inbounds %class.powerComponents, ptr %132, i32 0, i32 1
  %134 = load double, ptr %133, align 8, !tbaa !54
  %135 = load double, ptr %14, align 8, !tbaa !9
  %136 = fmul double %134, %135
  %137 = getelementptr inbounds i8, ptr %15, i64 8
  %138 = getelementptr inbounds %class.Component, ptr %137, i32 0, i32 1
  %139 = getelementptr inbounds %class.powerDef, ptr %138, i32 0, i32 0
  %140 = getelementptr inbounds %class.powerComponents, ptr %139, i32 0, i32 4
  store double %136, ptr %140, align 8, !tbaa !55
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #7
  call void @llvm.lifetime.end.p0(i64 32, ptr %8) #7
  call void @_ZN9uca_org_tD2Ev(ptr noundef nonnull align 8 dereferenceable(8200) %5) #7
  call void @llvm.lifetime.end.p0(i64 8200, ptr %5) #7
  ret void

141:                                              ; preds = %28, %2
  %142 = landingpad { ptr, i32 }
          cleanup
  %143 = extractvalue { ptr, i32 } %142, 0
  store ptr %143, ptr %6, align 8
  %144 = extractvalue { ptr, i32 } %142, 1
  store i32 %144, ptr %7, align 4
  br label %162

145:                                              ; preds = %65, %32
  %146 = landingpad { ptr, i32 }
          cleanup
  %147 = extractvalue { ptr, i32 } %146, 0
  store ptr %147, ptr %6, align 8
  %148 = extractvalue { ptr, i32 } %146, 1
  store i32 %148, ptr %7, align 4
  br label %161

149:                                              ; preds = %61, %56
  %150 = landingpad { ptr, i32 }
          cleanup
  %151 = extractvalue { ptr, i32 } %150, 0
  store ptr %151, ptr %6, align 8
  %152 = extractvalue { ptr, i32 } %150, 1
  store i32 %152, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 120, ptr %10) #7
  br label %161

153:                                              ; preds = %97, %96, %89
  %154 = landingpad { ptr, i32 }
          cleanup
  %155 = extractvalue { ptr, i32 } %154, 0
  store ptr %155, ptr %6, align 8
  %156 = extractvalue { ptr, i32 } %154, 1
  store i32 %156, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 120, ptr %12) #7
  call void @llvm.lifetime.end.p0(i64 120, ptr %11) #7
  br label %161

157:                                              ; preds = %101
  %158 = landingpad { ptr, i32 }
          cleanup
  %159 = extractvalue { ptr, i32 } %158, 0
  store ptr %159, ptr %6, align 8
  %160 = extractvalue { ptr, i32 } %158, 1
  store i32 %160, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #7
  br label %161

161:                                              ; preds = %157, %153, %149, %145
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #7
  call void @llvm.lifetime.end.p0(i64 32, ptr %8) #7
  br label %162

162:                                              ; preds = %161, %141
  call void @_ZN9uca_org_tD2Ev(ptr noundef nonnull align 8 dereferenceable(8200) %5) #7
  call void @llvm.lifetime.end.p0(i64 8200, ptr %5) #7
  br label %163

163:                                              ; preds = %162
  %164 = load ptr, ptr %6, align 8
  %165 = load i32, ptr %7, align 4
  %166 = insertvalue { ptr, i32 } poison, ptr %164, 0
  %167 = insertvalue { ptr, i32 } %166, i32 %165, 1
  resume { ptr, i32 } %167
}

declare void @_ZN7Decoder16leakage_feedbackEd(ptr noundef nonnull align 8 dereferenceable(656), double noundef) #2

declare void @_ZN6Predec16leakage_feedbackEd(ptr noundef nonnull align 8 dereferenceable(552), double noundef) #2

attributes #0 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"double", !7, i64 0}
!11 = !{!12, !19, i64 1492}
!12 = !{!"_ZTS18InstructionDecoder", !13, i64 0, !6, i64 1352, !6, i64 1360, !20, i64 1368, !19, i64 1372, !19, i64 1376, !20, i64 1380, !19, i64 1384, !19, i64 1388, !18, i64 1392, !32, i64 1760, !34, i64 9960, !35, i64 9964, !30, i64 9968}
!13 = !{!"_ZTS14McPATComponent", !14, i64 8, !6, i64 288, !18, i64 296, !22, i64 664, !10, i64 696, !25, i64 704, !29, i64 728, !30, i64 776, !30, i64 944, !16, i64 1112, !16, i64 1232}
!14 = !{!"_ZTS9Component", !15, i64 0, !16, i64 24, !16, i64 144, !10, i64 264, !10, i64 272}
!15 = !{!"_ZTS4Area", !10, i64 0, !10, i64 8, !10, i64 16}
!16 = !{!"_ZTS8powerDef", !17, i64 0, !17, i64 40, !17, i64 80}
!17 = !{!"_ZTS15powerComponents", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32}
!18 = !{!"_ZTS14InputParameter", !19, i64 0, !19, i64 4, !19, i64 8, !19, i64 12, !19, i64 16, !20, i64 20, !19, i64 24, !19, i64 28, !19, i64 32, !19, i64 36, !19, i64 40, !19, i64 44, !10, i64 48, !10, i64 56, !19, i64 64, !19, i64 68, !19, i64 72, !19, i64 76, !19, i64 80, !20, i64 84, !20, i64 85, !20, i64 86, !20, i64 87, !20, i64 88, !19, i64 92, !19, i64 96, !19, i64 100, !19, i64 104, !19, i64 108, !19, i64 112, !19, i64 116, !19, i64 120, !19, i64 124, !19, i64 128, !19, i64 132, !19, i64 136, !19, i64 140, !19, i64 144, !19, i64 148, !21, i64 152, !19, i64 156, !20, i64 160, !19, i64 164, !19, i64 168, !19, i64 172, !19, i64 176, !19, i64 180, !19, i64 184, !19, i64 188, !20, i64 192, !19, i64 196, !19, i64 200, !19, i64 204, !19, i64 208, !19, i64 212, !19, i64 216, !19, i64 220, !19, i64 224, !19, i64 228, !19, i64 232, !19, i64 236, !19, i64 240, !19, i64 244, !19, i64 248, !19, i64 252, !19, i64 256, !19, i64 260, !19, i64 264, !19, i64 268, !19, i64 272, !19, i64 276, !19, i64 280, !19, i64 284, !19, i64 288, !19, i64 292, !19, i64 296, !20, i64 300, !19, i64 304, !19, i64 308, !19, i64 312, !20, i64 316, !20, i64 317, !19, i64 320, !19, i64 324, !20, i64 328, !10, i64 336, !10, i64 344, !20, i64 352, !19, i64 356, !19, i64 360, !20, i64 364}
!19 = !{!"int", !7, i64 0}
!20 = !{!"bool", !7, i64 0}
!21 = !{!"_ZTS9Wire_type", !7, i64 0}
!22 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !23, i64 0, !24, i64 8, !7, i64 16}
!23 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!24 = !{!"long", !7, i64 0}
!25 = !{!"_ZTSSt6vectorIP14McPATComponentSaIS1_EE", !26, i64 0}
!26 = !{!"_ZTSSt12_Vector_baseIP14McPATComponentSaIS1_EE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseIP14McPATComponentSaIS1_EE12_Vector_implE", !28, i64 0}
!28 = !{!"_ZTSNSt12_Vector_baseIP14McPATComponentSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!29 = !{!"_ZTS11McPATOutput", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40}
!30 = !{!"_ZTS8statsDef", !31, i64 0, !31, i64 24, !31, i64 48, !31, i64 72, !31, i64 96, !31, i64 120, !31, i64 144}
!31 = !{!"_ZTS15statsComponents", !10, i64 0, !10, i64 8, !10, i64 16}
!32 = !{!"_ZTS9uca_org_t", !6, i64 0, !6, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40, !16, i64 48, !10, i64 168, !10, i64 176, !10, i64 184, !7, i64 192, !10, i64 296, !20, i64 304, !33, i64 312, !33, i64 4256}
!33 = !{!"_ZTS17results_mem_array", !19, i64 0, !19, i64 4, !10, i64 8, !19, i64 16, !19, i64 20, !19, i64 24, !19, i64 28, !19, i64 32, !19, i64 36, !10, i64 40, !10, i64 48, !10, i64 56, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !10, i64 144, !10, i64 152, !10, i64 160, !10, i64 168, !10, i64 176, !10, i64 184, !10, i64 192, !10, i64 200, !10, i64 208, !10, i64 216, !10, i64 224, !10, i64 232, !10, i64 240, !10, i64 248, !10, i64 256, !10, i64 264, !16, i64 272, !16, i64 392, !16, i64 512, !16, i64 632, !16, i64 752, !16, i64 872, !16, i64 992, !16, i64 1112, !16, i64 1232, !16, i64 1352, !16, i64 1472, !16, i64 1592, !16, i64 1712, !16, i64 1832, !16, i64 1952, !16, i64 2072, !16, i64 2192, !16, i64 2312, !16, i64 2432, !16, i64 2552, !16, i64 2672, !16, i64 2792, !16, i64 2912, !16, i64 3032, !16, i64 3152, !16, i64 3272, !16, i64 3392, !16, i64 3512, !16, i64 3632, !10, i64 3752, !10, i64 3760, !10, i64 3768, !10, i64 3776, !10, i64 3784, !10, i64 3792, !10, i64 3800, !10, i64 3808, !10, i64 3816, !10, i64 3824, !10, i64 3832, !10, i64 3840, !10, i64 3848, !10, i64 3856, !10, i64 3864, !10, i64 3872, !10, i64 3880, !10, i64 3888, !10, i64 3896, !10, i64 3904, !10, i64 3912, !10, i64 3920, !10, i64 3928, !10, i64 3936}
!34 = !{!"_ZTS9Device_ty", !7, i64 0}
!35 = !{!"_ZTS9Core_type", !7, i64 0}
!36 = !{!12, !6, i64 1352}
!37 = !{!12, !6, i64 1360}
!38 = !{!12, !20, i64 1380}
!39 = !{i8 0, i8 2}
!40 = !{}
!41 = !{!12, !19, i64 1384}
!42 = !{!12, !19, i64 1388}
!43 = !{!44, !10, i64 336}
!44 = !{!"_ZTS19TechnologyParameter", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !10, i64 56, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !10, i64 144, !10, i64 152, !10, i64 160, !10, i64 168, !10, i64 176, !10, i64 184, !10, i64 192, !10, i64 200, !10, i64 208, !10, i64 216, !10, i64 224, !10, i64 232, !10, i64 240, !10, i64 248, !10, i64 256, !10, i64 264, !10, i64 272, !10, i64 280, !10, i64 288, !10, i64 296, !10, i64 304, !10, i64 312, !10, i64 320, !10, i64 328, !10, i64 336, !10, i64 344, !24, i64 352, !45, i64 360, !45, i64 528, !45, i64 696, !45, i64 864, !45, i64 1032, !46, i64 1200, !46, i64 1264, !46, i64 1328, !47, i64 1392, !48, i64 1416, !48, i64 1464, !48, i64 1512}
!45 = !{!"_ZTSN19TechnologyParameter10DeviceTypeE", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !10, i64 56, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !10, i64 144, !10, i64 152, !10, i64 160}
!46 = !{!"_ZTSN19TechnologyParameter16InterconnectTypeE", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !10, i64 56}
!47 = !{!"_ZTSN19TechnologyParameter13ScalingFactorE", !10, i64 0, !10, i64 8, !10, i64 16}
!48 = !{!"_ZTSN19TechnologyParameter10MemoryTypeE", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40}
!49 = !{!14, !10, i64 24}
!50 = !{!14, !10, i64 64}
!51 = !{!14, !10, i64 104}
!52 = !{!12, !34, i64 9960}
!53 = !{!12, !35, i64 9964}
!54 = !{!14, !10, i64 32}
!55 = !{!14, !10, i64 56}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.TechnologyParameter = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, i64, %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::ScalingFactor", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType" }
%"class.TechnologyParameter::DeviceType" = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::InterconnectType" = type { double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::ScalingFactor" = type { double, double, double }
%"class.TechnologyParameter::MemoryType" = type { double, double, double, double, double, double }
%class.uca_org_t = type { ptr, ptr, double, double, double, double, %class.powerDef, double, double, double, [100 x i8], double, i8, %struct.results_mem_array, %struct.results_mem_array }
%class.powerDef = type { %class.powerComponents, %class.powerComponents, %class.powerComponents }
%class.powerComponents = type { double, double, double, double, double }
%struct.results_mem_array = type { i32, i32, double, i32, i32, i32, i32, i32, i32, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double }

@g_tp = external local_unnamed_addr global %class.TechnologyParameter, align 8
@__const._ZN18InstructionDecoder16leakage_feedbackEd.pppm_t = external hidden unnamed_addr constant [4 x double], align 16

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @_Z14init_interfaceP14InputParameterRKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE(ptr dead_on_unwind writable sret(%class.uca_org_t) align 8, ptr noundef, ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN9uca_org_tD2Ev(ptr noundef nonnull align 8 dereferenceable(8200)) unnamed_addr #3 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

declare noundef double @_Z31longer_channel_device_reduction9Device_ty9Core_type(i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.round.f64(double) #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_Z8set_pppmPddddd(ptr noundef, double noundef, double noundef, double noundef, double noundef) local_unnamed_addr #5

declare void @_ZplRK8powerDefS1_(ptr dead_on_unwind writable sret(%class.powerDef) align 8, ptr noundef nonnull align 8 dereferenceable(120), ptr noundef nonnull align 8 dereferenceable(120)) local_unnamed_addr #2

declare void @_ZmlRK8powerDefPKd(ptr dead_on_unwind writable sret(%class.powerDef) align 8, ptr noundef nonnull align 8 dereferenceable(120), ptr noundef) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(120) ptr @_ZN8powerDefaSEOS_(ptr noundef nonnull align 8 dereferenceable(120), ptr noundef nonnull align 8 dereferenceable(120)) local_unnamed_addr #5 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN18InstructionDecoder16leakage_feedbackEd(ptr noundef nonnull align 8 dereferenceable(10136) %0, double noundef %1) local_unnamed_addr #6 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca %class.uca_org_t, align 8
  %4 = alloca [4 x double], align 16
  %5 = alloca %class.powerDef, align 8
  %6 = alloca %class.powerDef, align 8
  %7 = alloca %class.powerDef, align 8
  %8 = fdiv double %1, 1.000000e+01
  %9 = tail call double @llvm.round.f64(double %8)
  %10 = fptoui double %9 to i32
  %11 = mul i32 %10, 10
  %12 = getelementptr inbounds i8, ptr %0, i64 1392
  %13 = getelementptr inbounds i8, ptr %0, i64 1492
  store i32 %11, ptr %13, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8200, ptr nonnull %3) #7
  %14 = getelementptr inbounds i8, ptr %0, i64 664
  call void @_Z14init_interfaceP14InputParameterRKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE(ptr dead_on_unwind nonnull writable sret(%class.uca_org_t) align 8 %3, ptr noundef nonnull %12, ptr noundef nonnull align 8 dereferenceable(32) %14)
  %15 = getelementptr inbounds i8, ptr %0, i64 1352
  %16 = load ptr, ptr %15, align 8, !tbaa !34
  invoke void @_ZN7Decoder16leakage_feedbackEd(ptr noundef nonnull align 8 dereferenceable(656) %16, double noundef %1)
          to label %17 unwind label %65

17:                                               ; preds = %2
  %18 = getelementptr inbounds i8, ptr %0, i64 1360
  %19 = load ptr, ptr %18, align 8, !tbaa !35
  invoke void @_ZN6Predec16leakage_feedbackEd(ptr noundef nonnull align 8 dereferenceable(552) %19, double noundef %1)
          to label %20 unwind label %65

20:                                               ; preds = %17
  call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %4) #7
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(32) %4, ptr noundef nonnull align 16 dereferenceable(32) @__const._ZN18InstructionDecoder16leakage_feedbackEd.pppm_t, i64 32, i1 false)
  %21 = getelementptr inbounds i8, ptr %0, i64 1380
  %22 = load i8, ptr %21, align 4, !tbaa !36, !range !37, !noundef !38
  %23 = trunc nuw i8 %22 to i1
  %24 = select i1 %23, double 2.000000e+00, double 1.000000e+00
  %25 = getelementptr inbounds i8, ptr %0, i64 1384
  %26 = load i32, ptr %25, align 8, !tbaa !39
  %27 = sitofp i32 %26 to double
  %28 = fmul double %24, %27
  call void @_Z8set_pppmPddddd(ptr noundef nonnull %4, double noundef %28, double noundef %27, double noundef %28, double noundef %27)
  call void @llvm.lifetime.start.p0(i64 120, ptr nonnull %5) #7
  %29 = load ptr, ptr %18, align 8, !tbaa !35
  %30 = getelementptr inbounds i8, ptr %29, i64 24
  invoke void @_ZmlRK8powerDefPKd(ptr dead_on_unwind nonnull writable sret(%class.powerDef) align 8 %5, ptr noundef nonnull align 8 dereferenceable(120) %30, ptr noundef nonnull %4)
          to label %31 unwind label %67

31:                                               ; preds = %20
  %32 = getelementptr inbounds i8, ptr %0, i64 32
  %33 = call noundef nonnull align 8 dereferenceable(120) ptr @_ZN8powerDefaSEOS_(ptr noundef nonnull align 8 dereferenceable(120) %32, ptr noundef nonnull align 8 dereferenceable(120) %5)
  call void @llvm.lifetime.end.p0(i64 120, ptr nonnull %5) #7
  %34 = load i32, ptr %25, align 8, !tbaa !39
  %35 = sitofp i32 %34 to double
  %36 = fmul double %24, %35
  %37 = getelementptr inbounds i8, ptr %0, i64 1388
  %38 = load i32, ptr %37, align 4, !tbaa !40
  %39 = mul nsw i32 %38, %34
  %40 = sitofp i32 %39 to double
  call void @_Z8set_pppmPddddd(ptr noundef nonnull %4, double noundef %36, double noundef %40, double noundef %40, double noundef %36)
  call void @llvm.lifetime.start.p0(i64 120, ptr nonnull %6) #7
  call void @llvm.lifetime.start.p0(i64 120, ptr nonnull %7) #7
  %41 = load ptr, ptr %15, align 8, !tbaa !34
  %42 = getelementptr inbounds i8, ptr %41, i64 24
  invoke void @_ZmlRK8powerDefPKd(ptr dead_on_unwind nonnull writable sret(%class.powerDef) align 8 %7, ptr noundef nonnull align 8 dereferenceable(120) %42, ptr noundef nonnull %4)
          to label %43 unwind label %69

43:                                               ; preds = %31
  invoke void @_ZplRK8powerDefS1_(ptr dead_on_unwind nonnull writable sret(%class.powerDef) align 8 %6, ptr noundef nonnull align 8 dereferenceable(120) %32, ptr noundef nonnull align 8 dereferenceable(120) %7)
          to label %44 unwind label %69

44:                                               ; preds = %43
  %45 = call noundef nonnull align 8 dereferenceable(120) ptr @_ZN8powerDefaSEOS_(ptr noundef nonnull align 8 dereferenceable(120) %32, ptr noundef nonnull align 8 dereferenceable(120) %6)
  call void @llvm.lifetime.end.p0(i64 120, ptr nonnull %7) #7
  call void @llvm.lifetime.end.p0(i64 120, ptr nonnull %6) #7
  %46 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 336), align 8, !tbaa !41
  %47 = load double, ptr %32, align 8, !tbaa !47
  %48 = fmul double %46, %47
  store double %48, ptr %32, align 8, !tbaa !47
  %49 = getelementptr inbounds i8, ptr %0, i64 72
  %50 = load double, ptr %49, align 8, !tbaa !48
  %51 = fmul double %46, %50
  store double %51, ptr %49, align 8, !tbaa !48
  %52 = getelementptr inbounds i8, ptr %0, i64 112
  %53 = load double, ptr %52, align 8, !tbaa !49
  %54 = fmul double %46, %53
  store double %54, ptr %52, align 8, !tbaa !49
  %55 = getelementptr inbounds i8, ptr %0, i64 9960
  %56 = load i32, ptr %55, align 8, !tbaa !50
  %57 = getelementptr inbounds i8, ptr %0, i64 9964
  %58 = load i32, ptr %57, align 4, !tbaa !51
  %59 = invoke noundef double @_Z31longer_channel_device_reduction9Device_ty9Core_type(i32 noundef %56, i32 noundef %58)
          to label %60 unwind label %71

60:                                               ; preds = %44
  %61 = getelementptr inbounds i8, ptr %0, i64 40
  %62 = load double, ptr %61, align 8, !tbaa !52
  %63 = fmul double %59, %62
  %64 = getelementptr inbounds i8, ptr %0, i64 64
  store double %63, ptr %64, align 8, !tbaa !53
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %4) #7
  call void @_ZN9uca_org_tD2Ev(ptr noundef nonnull align 8 dereferenceable(8200) %3) #7
  call void @llvm.lifetime.end.p0(i64 8200, ptr nonnull %3) #7
  ret void

65:                                               ; preds = %17, %2
  %66 = landingpad { ptr, i32 }
          cleanup
  br label %74

67:                                               ; preds = %20
  %68 = landingpad { ptr, i32 }
          cleanup
  call void @llvm.lifetime.end.p0(i64 120, ptr nonnull %5) #7
  br label %73

69:                                               ; preds = %43, %31
  %70 = landingpad { ptr, i32 }
          cleanup
  call void @llvm.lifetime.end.p0(i64 120, ptr nonnull %7) #7
  call void @llvm.lifetime.end.p0(i64 120, ptr nonnull %6) #7
  br label %73

71:                                               ; preds = %44
  %72 = landingpad { ptr, i32 }
          cleanup
  br label %73

73:                                               ; preds = %71, %69, %67
  %.pn = phi { ptr, i32 } [ %72, %71 ], [ %70, %69 ], [ %68, %67 ]
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %4) #7
  br label %74

74:                                               ; preds = %73, %65
  %.pn.pn = phi { ptr, i32 } [ %.pn, %73 ], [ %66, %65 ]
  call void @_ZN9uca_org_tD2Ev(ptr noundef nonnull align 8 dereferenceable(8200) %3) #7
  call void @llvm.lifetime.end.p0(i64 8200, ptr nonnull %3) #7
  resume { ptr, i32 } %.pn.pn
}

declare void @_ZN7Decoder16leakage_feedbackEd(ptr noundef nonnull align 8 dereferenceable(656), double noundef) local_unnamed_addr #2

declare void @_ZN6Predec16leakage_feedbackEd(ptr noundef nonnull align 8 dereferenceable(552), double noundef) local_unnamed_addr #2

attributes #0 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !17, i64 1492}
!6 = !{!"_ZTS18InstructionDecoder", !7, i64 0, !15, i64 1352, !15, i64 1360, !18, i64 1368, !17, i64 1372, !17, i64 1376, !18, i64 1380, !17, i64 1384, !17, i64 1388, !16, i64 1392, !30, i64 1760, !32, i64 9960, !33, i64 9964, !28, i64 9968}
!7 = !{!"_ZTS14McPATComponent", !8, i64 8, !15, i64 288, !16, i64 296, !20, i64 664, !10, i64 696, !23, i64 704, !27, i64 728, !28, i64 776, !28, i64 944, !13, i64 1112, !13, i64 1232}
!8 = !{!"_ZTS9Component", !9, i64 0, !13, i64 24, !13, i64 144, !10, i64 264, !10, i64 272}
!9 = !{!"_ZTS4Area", !10, i64 0, !10, i64 8, !10, i64 16}
!10 = !{!"double", !11, i64 0}
!11 = !{!"omnipotent char", !12, i64 0}
!12 = !{!"Simple C++ TBAA"}
!13 = !{!"_ZTS8powerDef", !14, i64 0, !14, i64 40, !14, i64 80}
!14 = !{!"_ZTS15powerComponents", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32}
!15 = !{!"any pointer", !11, i64 0}
!16 = !{!"_ZTS14InputParameter", !17, i64 0, !17, i64 4, !17, i64 8, !17, i64 12, !17, i64 16, !18, i64 20, !17, i64 24, !17, i64 28, !17, i64 32, !17, i64 36, !17, i64 40, !17, i64 44, !10, i64 48, !10, i64 56, !17, i64 64, !17, i64 68, !17, i64 72, !17, i64 76, !17, i64 80, !18, i64 84, !18, i64 85, !18, i64 86, !18, i64 87, !18, i64 88, !17, i64 92, !17, i64 96, !17, i64 100, !17, i64 104, !17, i64 108, !17, i64 112, !17, i64 116, !17, i64 120, !17, i64 124, !17, i64 128, !17, i64 132, !17, i64 136, !17, i64 140, !17, i64 144, !17, i64 148, !19, i64 152, !17, i64 156, !18, i64 160, !17, i64 164, !17, i64 168, !17, i64 172, !17, i64 176, !17, i64 180, !17, i64 184, !17, i64 188, !18, i64 192, !17, i64 196, !17, i64 200, !17, i64 204, !17, i64 208, !17, i64 212, !17, i64 216, !17, i64 220, !17, i64 224, !17, i64 228, !17, i64 232, !17, i64 236, !17, i64 240, !17, i64 244, !17, i64 248, !17, i64 252, !17, i64 256, !17, i64 260, !17, i64 264, !17, i64 268, !17, i64 272, !17, i64 276, !17, i64 280, !17, i64 284, !17, i64 288, !17, i64 292, !17, i64 296, !18, i64 300, !17, i64 304, !17, i64 308, !17, i64 312, !18, i64 316, !18, i64 317, !17, i64 320, !17, i64 324, !18, i64 328, !10, i64 336, !10, i64 344, !18, i64 352, !17, i64 356, !17, i64 360, !18, i64 364}
!17 = !{!"int", !11, i64 0}
!18 = !{!"bool", !11, i64 0}
!19 = !{!"_ZTS9Wire_type", !11, i64 0}
!20 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !21, i64 0, !22, i64 8, !11, i64 16}
!21 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !15, i64 0}
!22 = !{!"long", !11, i64 0}
!23 = !{!"_ZTSSt6vectorIP14McPATComponentSaIS1_EE", !24, i64 0}
!24 = !{!"_ZTSSt12_Vector_baseIP14McPATComponentSaIS1_EE", !25, i64 0}
!25 = !{!"_ZTSNSt12_Vector_baseIP14McPATComponentSaIS1_EE12_Vector_implE", !26, i64 0}
!26 = !{!"_ZTSNSt12_Vector_baseIP14McPATComponentSaIS1_EE17_Vector_impl_dataE", !15, i64 0, !15, i64 8, !15, i64 16}
!27 = !{!"_ZTS11McPATOutput", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40}
!28 = !{!"_ZTS8statsDef", !29, i64 0, !29, i64 24, !29, i64 48, !29, i64 72, !29, i64 96, !29, i64 120, !29, i64 144}
!29 = !{!"_ZTS15statsComponents", !10, i64 0, !10, i64 8, !10, i64 16}
!30 = !{!"_ZTS9uca_org_t", !15, i64 0, !15, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40, !13, i64 48, !10, i64 168, !10, i64 176, !10, i64 184, !11, i64 192, !10, i64 296, !18, i64 304, !31, i64 312, !31, i64 4256}
!31 = !{!"_ZTS17results_mem_array", !17, i64 0, !17, i64 4, !10, i64 8, !17, i64 16, !17, i64 20, !17, i64 24, !17, i64 28, !17, i64 32, !17, i64 36, !10, i64 40, !10, i64 48, !10, i64 56, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !10, i64 144, !10, i64 152, !10, i64 160, !10, i64 168, !10, i64 176, !10, i64 184, !10, i64 192, !10, i64 200, !10, i64 208, !10, i64 216, !10, i64 224, !10, i64 232, !10, i64 240, !10, i64 248, !10, i64 256, !10, i64 264, !13, i64 272, !13, i64 392, !13, i64 512, !13, i64 632, !13, i64 752, !13, i64 872, !13, i64 992, !13, i64 1112, !13, i64 1232, !13, i64 1352, !13, i64 1472, !13, i64 1592, !13, i64 1712, !13, i64 1832, !13, i64 1952, !13, i64 2072, !13, i64 2192, !13, i64 2312, !13, i64 2432, !13, i64 2552, !13, i64 2672, !13, i64 2792, !13, i64 2912, !13, i64 3032, !13, i64 3152, !13, i64 3272, !13, i64 3392, !13, i64 3512, !13, i64 3632, !10, i64 3752, !10, i64 3760, !10, i64 3768, !10, i64 3776, !10, i64 3784, !10, i64 3792, !10, i64 3800, !10, i64 3808, !10, i64 3816, !10, i64 3824, !10, i64 3832, !10, i64 3840, !10, i64 3848, !10, i64 3856, !10, i64 3864, !10, i64 3872, !10, i64 3880, !10, i64 3888, !10, i64 3896, !10, i64 3904, !10, i64 3912, !10, i64 3920, !10, i64 3928, !10, i64 3936}
!32 = !{!"_ZTS9Device_ty", !11, i64 0}
!33 = !{!"_ZTS9Core_type", !11, i64 0}
!34 = !{!6, !15, i64 1352}
!35 = !{!6, !15, i64 1360}
!36 = !{!6, !18, i64 1380}
!37 = !{i8 0, i8 2}
!38 = !{}
!39 = !{!6, !17, i64 1384}
!40 = !{!6, !17, i64 1388}
!41 = !{!42, !10, i64 336}
!42 = !{!"_ZTS19TechnologyParameter", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !10, i64 56, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !10, i64 144, !10, i64 152, !10, i64 160, !10, i64 168, !10, i64 176, !10, i64 184, !10, i64 192, !10, i64 200, !10, i64 208, !10, i64 216, !10, i64 224, !10, i64 232, !10, i64 240, !10, i64 248, !10, i64 256, !10, i64 264, !10, i64 272, !10, i64 280, !10, i64 288, !10, i64 296, !10, i64 304, !10, i64 312, !10, i64 320, !10, i64 328, !10, i64 336, !10, i64 344, !22, i64 352, !43, i64 360, !43, i64 528, !43, i64 696, !43, i64 864, !43, i64 1032, !44, i64 1200, !44, i64 1264, !44, i64 1328, !45, i64 1392, !46, i64 1416, !46, i64 1464, !46, i64 1512}
!43 = !{!"_ZTSN19TechnologyParameter10DeviceTypeE", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !10, i64 56, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !10, i64 144, !10, i64 152, !10, i64 160}
!44 = !{!"_ZTSN19TechnologyParameter16InterconnectTypeE", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !10, i64 56}
!45 = !{!"_ZTSN19TechnologyParameter13ScalingFactorE", !10, i64 0, !10, i64 8, !10, i64 16}
!46 = !{!"_ZTSN19TechnologyParameter10MemoryTypeE", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40}
!47 = !{!8, !10, i64 24}
!48 = !{!8, !10, i64 64}
!49 = !{!8, !10, i64 104}
!50 = !{!6, !32, i64 9960}
!51 = !{!6, !33, i64 9964}
!52 = !{!8, !10, i64 32}
!53 = !{!8, !10, i64 56}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass