; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/datatypes/int (sc_signed)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::sc_signed" = type { %"class.sc_dt::sc_value_base", i32, i32, i32, ptr }
%"class.sc_dt::sc_value_base" = type { ptr }
%"class.sc_dt::sc_length_param" = type { i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5sc_dt17add_signed_friendEiiiPKjiiiS1_(ptr dead_on_unwind noalias writable sret(%"class.sc_dt::sc_signed") align 8 %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, ptr noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, ptr noundef %8) #1 {
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca ptr, align 8
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca ptr, align 8
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca ptr, align 8
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca %"class.sc_dt::sc_length_param", align 4
  %25 = alloca i32, align 4
  store ptr %0, ptr %10, align 8
  store i32 %1, ptr %11, align 4, !tbaa !5
  store i32 %2, ptr %12, align 4, !tbaa !5
  store i32 %3, ptr %13, align 4, !tbaa !5
  store ptr %4, ptr %14, align 8, !tbaa !9
  store i32 %5, ptr %15, align 4, !tbaa !5
  store i32 %6, ptr %16, align 4, !tbaa !5
  store i32 %7, ptr %17, align 4, !tbaa !5
  store ptr %8, ptr %18, align 8, !tbaa !9
  %26 = load i32, ptr %13, align 4, !tbaa !5
  %27 = load ptr, ptr %14, align 8, !tbaa !9
  %28 = call noundef i32 @_ZN5sc_dt22vec_skip_leading_zerosEiPKj(i32 noundef %26, ptr noundef %27)
  store i32 %28, ptr %13, align 4, !tbaa !5
  %29 = load i32, ptr %17, align 4, !tbaa !5
  %30 = load ptr, ptr %18, align 8, !tbaa !9
  %31 = call noundef i32 @_ZN5sc_dt22vec_skip_leading_zerosEiPKj(i32 noundef %29, ptr noundef %30)
  store i32 %31, ptr %17, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #8
  %32 = call noundef i32 @_ZN5sc_dt6sc_maxIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %12, ptr noundef nonnull align 4 dereferenceable(4) %16)
  store i32 %32, ptr %19, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #8
  %33 = call noundef i32 @_ZN5sc_dt6sc_maxIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %13, ptr noundef nonnull align 4 dereferenceable(4) %17)
  %34 = add nsw i32 %33, 1
  store i32 %34, ptr %20, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %21) #8
  %35 = load i32, ptr %20, align 4, !tbaa !5
  %36 = sext i32 %35 to i64
  %37 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %36, i64 4)
  %38 = extractvalue { i64, i1 } %37, 1
  %39 = extractvalue { i64, i1 } %37, 0
  %40 = select i1 %38, i64 -1, i64 %39
  %41 = call noalias noundef nonnull ptr @_Znam(i64 noundef %40) #9
  store ptr %41, ptr %21, align 8, !tbaa !9
  %42 = load ptr, ptr %21, align 8, !tbaa !9
  %43 = load i32, ptr %20, align 4, !tbaa !5
  %44 = sub nsw i32 %43, 2
  %45 = sext i32 %44 to i64
  %46 = getelementptr inbounds i32, ptr %42, i64 %45
  store i32 0, ptr %46, align 4, !tbaa !5
  %47 = load ptr, ptr %21, align 8, !tbaa !9
  %48 = load i32, ptr %20, align 4, !tbaa !5
  %49 = sub nsw i32 %48, 1
  %50 = sext i32 %49 to i64
  %51 = getelementptr inbounds i32, ptr %47, i64 %50
  store i32 0, ptr %51, align 4, !tbaa !5
  %52 = load i32, ptr %11, align 4, !tbaa !5
  %53 = load i32, ptr %15, align 4, !tbaa !5
  %54 = icmp eq i32 %52, %53
  br i1 %54, label %55, label %97

55:                                               ; preds = %9
  %56 = load i32, ptr %19, align 4, !tbaa !5
  %57 = add nsw i32 %56, 1
  store i32 %57, ptr %19, align 4, !tbaa !5
  %58 = load i32, ptr %13, align 4, !tbaa !5
  %59 = icmp eq i32 %58, 1
  br i1 %59, label %60, label %79

60:                                               ; preds = %55
  %61 = load i32, ptr %17, align 4, !tbaa !5
  %62 = icmp eq i32 %61, 1
  br i1 %62, label %63, label %79

63:                                               ; preds = %60
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #8
  %64 = load ptr, ptr %14, align 8, !tbaa !9
  %65 = load i32, ptr %64, align 4, !tbaa !5
  %66 = load ptr, ptr %18, align 8, !tbaa !9
  %67 = load i32, ptr %66, align 4, !tbaa !5
  %68 = add i32 %65, %67
  store i32 %68, ptr %22, align 4, !tbaa !5
  %69 = load i32, ptr %22, align 4, !tbaa !5
  %70 = zext i32 %69 to i64
  %71 = and i64 %70, 1073741823
  %72 = trunc i64 %71 to i32
  %73 = load ptr, ptr %21, align 8, !tbaa !9
  %74 = getelementptr inbounds i32, ptr %73, i64 0
  store i32 %72, ptr %74, align 4, !tbaa !5
  %75 = load i32, ptr %22, align 4, !tbaa !5
  %76 = lshr i32 %75, 30
  %77 = load ptr, ptr %21, align 8, !tbaa !9
  %78 = getelementptr inbounds i32, ptr %77, i64 1
  store i32 %76, ptr %78, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #8
  br label %96

79:                                               ; preds = %60, %55
  %80 = load i32, ptr %13, align 4, !tbaa !5
  %81 = load i32, ptr %17, align 4, !tbaa !5
  %82 = icmp sge i32 %80, %81
  br i1 %82, label %83, label %89

83:                                               ; preds = %79
  %84 = load i32, ptr %13, align 4, !tbaa !5
  %85 = load ptr, ptr %14, align 8, !tbaa !9
  %86 = load i32, ptr %17, align 4, !tbaa !5
  %87 = load ptr, ptr %18, align 8, !tbaa !9
  %88 = load ptr, ptr %21, align 8, !tbaa !9
  call void @_ZN5sc_dt7vec_addEiPKjiS1_Pj(i32 noundef %84, ptr noundef %85, i32 noundef %86, ptr noundef %87, ptr noundef %88)
  br label %95

89:                                               ; preds = %79
  %90 = load i32, ptr %17, align 4, !tbaa !5
  %91 = load ptr, ptr %18, align 8, !tbaa !9
  %92 = load i32, ptr %13, align 4, !tbaa !5
  %93 = load ptr, ptr %14, align 8, !tbaa !9
  %94 = load ptr, ptr %21, align 8, !tbaa !9
  call void @_ZN5sc_dt7vec_addEiPKjiS1_Pj(i32 noundef %90, ptr noundef %91, i32 noundef %92, ptr noundef %93, ptr noundef %94)
  br label %95

95:                                               ; preds = %89, %83
  br label %96

96:                                               ; preds = %95, %63
  br label %162

97:                                               ; preds = %9
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #8
  %98 = load i32, ptr %13, align 4, !tbaa !5
  %99 = load ptr, ptr %14, align 8, !tbaa !9
  %100 = load i32, ptr %17, align 4, !tbaa !5
  %101 = load ptr, ptr %18, align 8, !tbaa !9
  %102 = call noundef i32 @_ZN5sc_dt7vec_cmpEiPKjiS1_(i32 noundef %98, ptr noundef %99, i32 noundef %100, ptr noundef %101)
  store i32 %102, ptr %23, align 4, !tbaa !5
  %103 = load i32, ptr %23, align 4, !tbaa !5
  %104 = icmp eq i32 %103, 0
  br i1 %104, label %105, label %111

105:                                              ; preds = %97
  %106 = load ptr, ptr %21, align 8, !tbaa !9
  %107 = icmp eq ptr %106, null
  br i1 %107, label %109, label %108

108:                                              ; preds = %105
  call void @_ZdaPv(ptr noundef %106) #10
  br label %109

109:                                              ; preds = %108, %105
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #8
  call void @_ZN5sc_dt15sc_length_paramC2Ev(ptr noundef nonnull align 4 dereferenceable(4) %24)
  %110 = call noundef i32 @_ZNK5sc_dt15sc_length_param3lenEv(ptr noundef nonnull align 4 dereferenceable(4) %24)
  call void @_ZN5sc_dt9sc_signedC1Ei(ptr noundef nonnull align 8 dereferenceable(32) %0, i32 noundef %110)
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #8
  store i32 1, ptr %25, align 4
  br label %159

111:                                              ; preds = %97
  %112 = load i32, ptr %23, align 4, !tbaa !5
  %113 = icmp sgt i32 %112, 0
  br i1 %113, label %114, label %135

114:                                              ; preds = %111
  %115 = load i32, ptr %13, align 4, !tbaa !5
  %116 = icmp eq i32 %115, 1
  br i1 %116, label %117, label %128

117:                                              ; preds = %114
  %118 = load i32, ptr %17, align 4, !tbaa !5
  %119 = icmp eq i32 %118, 1
  br i1 %119, label %120, label %128

120:                                              ; preds = %117
  %121 = load ptr, ptr %14, align 8, !tbaa !9
  %122 = load i32, ptr %121, align 4, !tbaa !5
  %123 = load ptr, ptr %18, align 8, !tbaa !9
  %124 = load i32, ptr %123, align 4, !tbaa !5
  %125 = sub i32 %122, %124
  %126 = load ptr, ptr %21, align 8, !tbaa !9
  %127 = getelementptr inbounds i32, ptr %126, i64 0
  store i32 %125, ptr %127, align 4, !tbaa !5
  br label %134

128:                                              ; preds = %117, %114
  %129 = load i32, ptr %13, align 4, !tbaa !5
  %130 = load ptr, ptr %14, align 8, !tbaa !9
  %131 = load i32, ptr %17, align 4, !tbaa !5
  %132 = load ptr, ptr %18, align 8, !tbaa !9
  %133 = load ptr, ptr %21, align 8, !tbaa !9
  call void @_ZN5sc_dt7vec_subEiPKjiS1_Pj(i32 noundef %129, ptr noundef %130, i32 noundef %131, ptr noundef %132, ptr noundef %133)
  br label %134

134:                                              ; preds = %128, %120
  br label %158

135:                                              ; preds = %111
  %136 = load i32, ptr %11, align 4, !tbaa !5
  %137 = sub nsw i32 0, %136
  store i32 %137, ptr %11, align 4, !tbaa !5
  %138 = load i32, ptr %13, align 4, !tbaa !5
  %139 = icmp eq i32 %138, 1
  br i1 %139, label %140, label %151

140:                                              ; preds = %135
  %141 = load i32, ptr %17, align 4, !tbaa !5
  %142 = icmp eq i32 %141, 1
  br i1 %142, label %143, label %151

143:                                              ; preds = %140
  %144 = load ptr, ptr %18, align 8, !tbaa !9
  %145 = load i32, ptr %144, align 4, !tbaa !5
  %146 = load ptr, ptr %14, align 8, !tbaa !9
  %147 = load i32, ptr %146, align 4, !tbaa !5
  %148 = sub i32 %145, %147
  %149 = load ptr, ptr %21, align 8, !tbaa !9
  %150 = getelementptr inbounds i32, ptr %149, i64 0
  store i32 %148, ptr %150, align 4, !tbaa !5
  br label %157

151:                                              ; preds = %140, %135
  %152 = load i32, ptr %17, align 4, !tbaa !5
  %153 = load ptr, ptr %18, align 8, !tbaa !9
  %154 = load i32, ptr %13, align 4, !tbaa !5
  %155 = load ptr, ptr %14, align 8, !tbaa !9
  %156 = load ptr, ptr %21, align 8, !tbaa !9
  call void @_ZN5sc_dt7vec_subEiPKjiS1_Pj(i32 noundef %152, ptr noundef %153, i32 noundef %154, ptr noundef %155, ptr noundef %156)
  br label %157

157:                                              ; preds = %151, %143
  br label %158

158:                                              ; preds = %157, %134
  store i32 0, ptr %25, align 4
  br label %159

159:                                              ; preds = %158, %109
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #8
  %160 = load i32, ptr %25, align 4
  switch i32 %160, label %167 [
    i32 0, label %161
  ]

161:                                              ; preds = %159
  br label %162

162:                                              ; preds = %161, %96
  %163 = load i32, ptr %11, align 4, !tbaa !5
  %164 = load i32, ptr %19, align 4, !tbaa !5
  %165 = load i32, ptr %20, align 4, !tbaa !5
  %166 = load ptr, ptr %21, align 8, !tbaa !9
  call void @_ZN5sc_dt9sc_signedC1EiiiPjb(ptr noundef nonnull align 8 dereferenceable(32) %0, i32 noundef %163, i32 noundef %164, i32 noundef %165, ptr noundef %166, i1 noundef zeroext true)
  store i32 1, ptr %25, align 4
  br label %167

167:                                              ; preds = %162, %159
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #8
  ret void
}

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dt15sc_length_paramC2Ev(ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt15sc_length_param3lenEv(ptr noundef nonnull align 4 dereferenceable(4)) #3 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt22vec_skip_leading_zerosEiPKj(i32 noundef, ptr noundef) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt6sc_maxIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #3

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) #4

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) #5

declare void @_ZN5sc_dt7vec_addEiPKjiS1_Pj(i32 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) #6

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt7vec_cmpEiPKjiS1_(i32 noundef, ptr noundef, i32 noundef, ptr noundef) #3

; Function Attrs: nobuiltin nounwind
declare void @_ZdaPv(ptr noundef) #7

declare void @_ZN5sc_dt7vec_subEiPKjiS1_Pj(i32 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) #6

declare void @_ZN5sc_dt9sc_signedC1Ei(ptr, i32)

declare void @_ZN5sc_dt9sc_signedC1EiiiPjb(ptr, i32, i32, i32, ptr, i1)

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { nounwind }
attributes #9 = { builtin allocsize(0) }
attributes #10 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::sc_signed" = type { %"class.sc_dt::sc_value_base", i32, i32, i32, ptr }
%"class.sc_dt::sc_value_base" = type { ptr }
%"class.sc_dt::sc_length_param" = type { i32 }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5sc_dt17add_signed_friendEiiiPKjiiiS1_(ptr dead_on_unwind noalias writable sret(%"class.sc_dt::sc_signed") align 8 %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, ptr noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, ptr noundef %8) local_unnamed_addr #1 {
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca %"class.sc_dt::sc_length_param", align 4
  store i32 %2, ptr %10, align 4, !tbaa !5
  store i32 %6, ptr %12, align 4, !tbaa !5
  %15 = tail call noundef i32 @_ZN5sc_dt22vec_skip_leading_zerosEiPKj(i32 noundef %3, ptr noundef %4)
  store i32 %15, ptr %11, align 4, !tbaa !5
  %16 = tail call noundef i32 @_ZN5sc_dt22vec_skip_leading_zerosEiPKj(i32 noundef %7, ptr noundef %8)
  store i32 %16, ptr %13, align 4, !tbaa !5
  %17 = call noundef i32 @_ZN5sc_dt6sc_maxIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %10, ptr noundef nonnull align 4 dereferenceable(4) %12)
  %18 = call noundef i32 @_ZN5sc_dt6sc_maxIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %11, ptr noundef nonnull align 4 dereferenceable(4) %13)
  %19 = add nsw i32 %18, 1
  %20 = zext nneg i32 %19 to i64
  %21 = icmp slt i32 %18, -1
  %22 = shl nuw nsw i64 %20, 2
  %23 = select i1 %21, i64 -1, i64 %22
  %24 = call noalias noundef nonnull ptr @_Znam(i64 noundef %23) #7
  %25 = sext i32 %18 to i64
  %26 = getelementptr i32, ptr %24, i64 %25
  %27 = getelementptr i8, ptr %26, i64 -4
  store i32 0, ptr %27, align 4, !tbaa !5
  store i32 0, ptr %26, align 4, !tbaa !5
  %28 = icmp eq i32 %1, %5
  br i1 %28, label %29, label %45

29:                                               ; preds = %9
  %30 = add nsw i32 %17, 1
  %31 = load i32, ptr %11, align 4, !tbaa !5
  %32 = icmp eq i32 %31, 1
  %33 = load i32, ptr %13, align 4
  %34 = icmp eq i32 %33, 1
  %or.cond = select i1 %32, i1 %34, i1 false
  br i1 %or.cond, label %35, label %42

35:                                               ; preds = %29
  %36 = load i32, ptr %4, align 4, !tbaa !5
  %37 = load i32, ptr %8, align 4, !tbaa !5
  %38 = add i32 %37, %36
  %39 = and i32 %38, 1073741823
  store i32 %39, ptr %24, align 4, !tbaa !5
  %40 = lshr i32 %38, 30
  %41 = getelementptr inbounds i8, ptr %24, i64 4
  store i32 %40, ptr %41, align 4, !tbaa !5
  br label %.thread

42:                                               ; preds = %29
  %.not58 = icmp slt i32 %31, %33
  br i1 %.not58, label %44, label %43

43:                                               ; preds = %42
  call void @_ZN5sc_dt7vec_addEiPKjiS1_Pj(i32 noundef %31, ptr noundef %4, i32 noundef %33, ptr noundef %8, ptr noundef nonnull %24)
  br label %.thread

44:                                               ; preds = %42
  call void @_ZN5sc_dt7vec_addEiPKjiS1_Pj(i32 noundef %33, ptr noundef %8, i32 noundef %31, ptr noundef %4, ptr noundef nonnull %24)
  br label %.thread

45:                                               ; preds = %9
  %46 = load i32, ptr %11, align 4, !tbaa !5
  %47 = load i32, ptr %13, align 4, !tbaa !5
  %48 = call noundef i32 @_ZN5sc_dt7vec_cmpEiPKjiS1_(i32 noundef %46, ptr noundef %4, i32 noundef %47, ptr noundef %8)
  %.not = icmp eq i32 %48, 0
  br i1 %.not, label %72, label %49

49:                                               ; preds = %45
  %50 = icmp sgt i32 %48, 0
  br i1 %50, label %51, label %61

51:                                               ; preds = %49
  %52 = load i32, ptr %11, align 4, !tbaa !5
  %53 = icmp eq i32 %52, 1
  %54 = load i32, ptr %13, align 4
  %55 = icmp eq i32 %54, 1
  %or.cond3 = select i1 %53, i1 %55, i1 false
  br i1 %or.cond3, label %56, label %60

56:                                               ; preds = %51
  %57 = load i32, ptr %4, align 4, !tbaa !5
  %58 = load i32, ptr %8, align 4, !tbaa !5
  %59 = sub i32 %57, %58
  store i32 %59, ptr %24, align 4, !tbaa !5
  br label %.thread

60:                                               ; preds = %51
  call void @_ZN5sc_dt7vec_subEiPKjiS1_Pj(i32 noundef %52, ptr noundef %4, i32 noundef %54, ptr noundef %8, ptr noundef nonnull %24)
  br label %.thread

61:                                               ; preds = %49
  %62 = sub nsw i32 0, %1
  %63 = load i32, ptr %11, align 4, !tbaa !5
  %64 = icmp eq i32 %63, 1
  %65 = load i32, ptr %13, align 4
  %66 = icmp eq i32 %65, 1
  %or.cond5 = select i1 %64, i1 %66, i1 false
  br i1 %or.cond5, label %67, label %71

67:                                               ; preds = %61
  %68 = load i32, ptr %8, align 4, !tbaa !5
  %69 = load i32, ptr %4, align 4, !tbaa !5
  %70 = sub i32 %68, %69
  store i32 %70, ptr %24, align 4, !tbaa !5
  br label %.thread

71:                                               ; preds = %61
  call void @_ZN5sc_dt7vec_subEiPKjiS1_Pj(i32 noundef %65, ptr noundef %8, i32 noundef %63, ptr noundef %4, ptr noundef nonnull %24)
  br label %.thread

72:                                               ; preds = %45
  call void @_ZdaPv(ptr noundef nonnull %24) #8
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %14) #9
  call void @_ZN5sc_dt15sc_length_paramC2Ev(ptr noundef nonnull align 4 dereferenceable(4) %14)
  %73 = call noundef i32 @_ZNK5sc_dt15sc_length_param3lenEv(ptr noundef nonnull align 4 dereferenceable(4) %14)
  call void @_ZN5sc_dt9sc_signedC1Ei(ptr noundef nonnull align 8 dereferenceable(32) %0, i32 noundef %73)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %14) #9
  br label %74

.thread:                                          ; preds = %67, %71, %56, %60, %35, %44, %43
  %.050 = phi i32 [ %30, %35 ], [ %30, %43 ], [ %30, %44 ], [ %17, %60 ], [ %17, %56 ], [ %17, %71 ], [ %17, %67 ]
  %.2 = phi i32 [ %1, %35 ], [ %1, %43 ], [ %1, %44 ], [ %1, %60 ], [ %1, %56 ], [ %62, %71 ], [ %62, %67 ]
  call void @_ZN5sc_dt9sc_signedC1EiiiPjb(ptr noundef nonnull align 8 dereferenceable(32) %0, i32 noundef %.2, i32 noundef %.050, i32 noundef %19, ptr noundef nonnull %24, i1 noundef zeroext true)
  br label %74

74:                                               ; preds = %72, %.thread
  ret void
}

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dt15sc_length_paramC2Ev(ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt15sc_length_param3lenEv(ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #3 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt22vec_skip_leading_zerosEiPKj(i32 noundef, ptr noundef) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt6sc_maxIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #3

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) local_unnamed_addr #4

declare void @_ZN5sc_dt7vec_addEiPKjiS1_Pj(i32 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #5

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt7vec_cmpEiPKjiS1_(i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #3

; Function Attrs: nobuiltin nounwind
declare void @_ZdaPv(ptr noundef) local_unnamed_addr #6

declare void @_ZN5sc_dt7vec_subEiPKjiS1_Pj(i32 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #5

declare void @_ZN5sc_dt9sc_signedC1Ei(ptr, i32) local_unnamed_addr

declare void @_ZN5sc_dt9sc_signedC1EiiiPjb(ptr, i32, i32, i32, ptr, i1) local_unnamed_addr

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { builtin allocsize(0) }
attributes #8 = { builtin nounwind }
attributes #9 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass