; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/NetworkPkg/Ip6Dxe (Ip6TrimPacket)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.NET_BUF = type { i32, i64, %struct._LIST_ENTRY, %union.NET_IP_HEAD, ptr, ptr, [64 x i8], ptr, i32, i32, [1 x %struct.NET_BLOCK_OP] }
%struct._LIST_ENTRY = type { ptr, ptr }
%union.NET_IP_HEAD = type { ptr }
%struct.NET_BLOCK_OP = type { ptr, ptr, ptr, ptr, i32 }
%struct.IP6_CLIP_INFO = type { i32, i32, i32, i32, i32, i32, i64, i32, i16, i8, i8, i32 }

@.str = external hidden unnamed_addr constant [130 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [40 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [43 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @Ip6TrimPacket(ptr noundef %0, i64 noundef %1, i64 noundef %2) #1 {
  %4 = alloca ptr, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i64, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !9
  store i64 %2, ptr %6, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  %9 = load ptr, ptr %4, align 8, !tbaa !5
  %10 = getelementptr inbounds %struct.NET_BUF, ptr %9, i32 0, i32 6
  %11 = getelementptr inbounds [64 x i8], ptr %10, i64 0, i64 0
  store ptr %11, ptr %7, align 8, !tbaa !5
  br label %12

12:                                               ; preds = %3
  %13 = call zeroext i8 @DebugAssertEnabled()
  %14 = icmp ne i8 %13, 0
  br i1 %14, label %15, label %29

15:                                               ; preds = %12
  %16 = load ptr, ptr %7, align 8, !tbaa !5
  %17 = getelementptr inbounds %struct.IP6_CLIP_INFO, ptr %16, i32 0, i32 2
  %18 = load i32, ptr %17, align 8, !tbaa !11
  %19 = load ptr, ptr %7, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.IP6_CLIP_INFO, ptr %19, i32 0, i32 4
  %21 = load i32, ptr %20, align 8, !tbaa !15
  %22 = add nsw i32 %18, %21
  %23 = load ptr, ptr %7, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.IP6_CLIP_INFO, ptr %23, i32 0, i32 3
  %25 = load i32, ptr %24, align 4, !tbaa !16
  %26 = icmp eq i32 %22, %25
  br i1 %26, label %28, label %27

27:                                               ; preds = %15
  call void @DebugAssert(ptr noundef @.str, i64 noundef 127, ptr noundef @.str.1)
  br label %28

28:                                               ; preds = %27, %15
  br label %29

29:                                               ; preds = %28, %12
  br label %30

30:                                               ; preds = %29
  br label %31

31:                                               ; preds = %30
  br label %32

32:                                               ; preds = %31
  %33 = call zeroext i8 @DebugAssertEnabled()
  %34 = icmp ne i8 %33, 0
  br i1 %34, label %35, label %51

35:                                               ; preds = %32
  %36 = load ptr, ptr %7, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.IP6_CLIP_INFO, ptr %36, i32 0, i32 2
  %38 = load i32, ptr %37, align 8, !tbaa !11
  %39 = sext i32 %38 to i64
  %40 = load i64, ptr %6, align 8, !tbaa !9
  %41 = icmp slt i64 %39, %40
  br i1 %41, label %42, label %49

42:                                               ; preds = %35
  %43 = load i64, ptr %5, align 8, !tbaa !9
  %44 = load ptr, ptr %7, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.IP6_CLIP_INFO, ptr %44, i32 0, i32 3
  %46 = load i32, ptr %45, align 4, !tbaa !16
  %47 = sext i32 %46 to i64
  %48 = icmp slt i64 %43, %47
  br i1 %48, label %50, label %49

49:                                               ; preds = %42, %35
  call void @DebugAssert(ptr noundef @.str, i64 noundef 128, ptr noundef @.str.2)
  br label %50

50:                                               ; preds = %49, %42
  br label %51

51:                                               ; preds = %50, %32
  br label %52

52:                                               ; preds = %51
  br label %53

53:                                               ; preds = %52
  %54 = load ptr, ptr %7, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.IP6_CLIP_INFO, ptr %54, i32 0, i32 2
  %56 = load i32, ptr %55, align 8, !tbaa !11
  %57 = sext i32 %56 to i64
  %58 = load i64, ptr %5, align 8, !tbaa !9
  %59 = icmp slt i64 %57, %58
  br i1 %59, label %60, label %81

60:                                               ; preds = %53
  %61 = load i64, ptr %5, align 8, !tbaa !9
  %62 = load ptr, ptr %7, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.IP6_CLIP_INFO, ptr %62, i32 0, i32 2
  %64 = load i32, ptr %63, align 8, !tbaa !11
  %65 = sext i32 %64 to i64
  %66 = sub nsw i64 %61, %65
  store i64 %66, ptr %8, align 8, !tbaa !9
  %67 = load ptr, ptr %4, align 8, !tbaa !5
  %68 = load i64, ptr %8, align 8, !tbaa !9
  %69 = trunc i64 %68 to i32
  %70 = call i32 @NetbufTrim(ptr noundef %67, i32 noundef %69, i8 noundef zeroext 1)
  %71 = load i64, ptr %5, align 8, !tbaa !9
  %72 = trunc i64 %71 to i32
  %73 = load ptr, ptr %7, align 8, !tbaa !5
  %74 = getelementptr inbounds %struct.IP6_CLIP_INFO, ptr %73, i32 0, i32 2
  store i32 %72, ptr %74, align 8, !tbaa !11
  %75 = load i64, ptr %8, align 8, !tbaa !9
  %76 = trunc i64 %75 to i32
  %77 = load ptr, ptr %7, align 8, !tbaa !5
  %78 = getelementptr inbounds %struct.IP6_CLIP_INFO, ptr %77, i32 0, i32 4
  %79 = load i32, ptr %78, align 8, !tbaa !15
  %80 = sub i32 %79, %76
  store i32 %80, ptr %78, align 8, !tbaa !15
  br label %81

81:                                               ; preds = %60, %53
  %82 = load i64, ptr %6, align 8, !tbaa !9
  %83 = load ptr, ptr %7, align 8, !tbaa !5
  %84 = getelementptr inbounds %struct.IP6_CLIP_INFO, ptr %83, i32 0, i32 3
  %85 = load i32, ptr %84, align 4, !tbaa !16
  %86 = sext i32 %85 to i64
  %87 = icmp slt i64 %82, %86
  br i1 %87, label %88, label %109

88:                                               ; preds = %81
  %89 = load i64, ptr %6, align 8, !tbaa !9
  %90 = load ptr, ptr %7, align 8, !tbaa !5
  %91 = getelementptr inbounds %struct.IP6_CLIP_INFO, ptr %90, i32 0, i32 3
  %92 = load i32, ptr %91, align 4, !tbaa !16
  %93 = sext i32 %92 to i64
  %94 = sub nsw i64 %89, %93
  store i64 %94, ptr %8, align 8, !tbaa !9
  %95 = load ptr, ptr %4, align 8, !tbaa !5
  %96 = load i64, ptr %8, align 8, !tbaa !9
  %97 = trunc i64 %96 to i32
  %98 = call i32 @NetbufTrim(ptr noundef %95, i32 noundef %97, i8 noundef zeroext 0)
  %99 = load i64, ptr %6, align 8, !tbaa !9
  %100 = trunc i64 %99 to i32
  %101 = load ptr, ptr %7, align 8, !tbaa !5
  %102 = getelementptr inbounds %struct.IP6_CLIP_INFO, ptr %101, i32 0, i32 3
  store i32 %100, ptr %102, align 4, !tbaa !16
  %103 = load i64, ptr %8, align 8, !tbaa !9
  %104 = trunc i64 %103 to i32
  %105 = load ptr, ptr %7, align 8, !tbaa !5
  %106 = getelementptr inbounds %struct.IP6_CLIP_INFO, ptr %105, i32 0, i32 4
  %107 = load i32, ptr %106, align 8, !tbaa !15
  %108 = sub i32 %107, %104
  store i32 %108, ptr %106, align 8, !tbaa !15
  br label %109

109:                                              ; preds = %88, %81
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  ret void
}

declare zeroext i8 @DebugAssertEnabled() #2

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) #2

declare i32 @NetbufTrim(ptr noundef, i32 noundef, i8 noundef zeroext) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = !{!12, !13, i64 8}
!12 = !{!"", !13, i64 0, !13, i64 4, !13, i64 8, !13, i64 12, !13, i64 16, !13, i64 20, !10, i64 24, !13, i64 32, !14, i64 36, !7, i64 38, !7, i64 39, !13, i64 40}
!13 = !{!"int", !7, i64 0}
!14 = !{!"short", !7, i64 0}
!15 = !{!12, !13, i64 16}
!16 = !{!12, !13, i64 12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [130 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [40 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [43 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local void @Ip6TrimPacket(ptr noundef %0, i64 noundef %1, i64 noundef %2) local_unnamed_addr #0 {
  %4 = tail call zeroext i8 @DebugAssertEnabled() #2
  %.not = icmp eq i8 %4, 0
  br i1 %.not, label %15, label %5

5:                                                ; preds = %3
  %6 = getelementptr inbounds i8, ptr %0, i64 64
  %7 = load i32, ptr %6, align 8, !tbaa !5
  %8 = getelementptr inbounds i8, ptr %0, i64 72
  %9 = load i32, ptr %8, align 8, !tbaa !12
  %10 = add nsw i32 %9, %7
  %11 = getelementptr inbounds i8, ptr %0, i64 68
  %12 = load i32, ptr %11, align 4, !tbaa !13
  %13 = icmp eq i32 %10, %12
  br i1 %13, label %15, label %14

14:                                               ; preds = %5
  tail call void @DebugAssert(ptr noundef nonnull @.str, i64 noundef 127, ptr noundef nonnull @.str.1) #2
  br label %15

15:                                               ; preds = %3, %14, %5
  %16 = tail call zeroext i8 @DebugAssertEnabled() #2
  %.not30 = icmp eq i8 %16, 0
  br i1 %.not30, label %28, label %17

17:                                               ; preds = %15
  %18 = getelementptr inbounds i8, ptr %0, i64 64
  %19 = load i32, ptr %18, align 8, !tbaa !5
  %20 = sext i32 %19 to i64
  %21 = icmp slt i64 %20, %2
  br i1 %21, label %22, label %27

22:                                               ; preds = %17
  %23 = getelementptr inbounds i8, ptr %0, i64 68
  %24 = load i32, ptr %23, align 4, !tbaa !13
  %25 = sext i32 %24 to i64
  %26 = icmp sgt i64 %25, %1
  br i1 %26, label %28, label %27

27:                                               ; preds = %22, %17
  tail call void @DebugAssert(ptr noundef nonnull @.str, i64 noundef 128, ptr noundef nonnull @.str.2) #2
  br label %28

28:                                               ; preds = %22, %27, %15
  %29 = getelementptr inbounds i8, ptr %0, i64 64
  %30 = load i32, ptr %29, align 8, !tbaa !5
  %31 = sext i32 %30 to i64
  %32 = icmp slt i64 %31, %1
  br i1 %32, label %33, label %40

33:                                               ; preds = %28
  %34 = trunc i64 %1 to i32
  %35 = sub i32 %34, %30
  %36 = tail call i32 @NetbufTrim(ptr noundef nonnull %0, i32 noundef %35, i8 noundef zeroext 1) #2
  store i32 %34, ptr %29, align 8, !tbaa !5
  %37 = getelementptr inbounds i8, ptr %0, i64 72
  %38 = load i32, ptr %37, align 8, !tbaa !12
  %39 = sub i32 %38, %35
  store i32 %39, ptr %37, align 8, !tbaa !12
  br label %40

40:                                               ; preds = %33, %28
  %41 = getelementptr inbounds i8, ptr %0, i64 68
  %42 = load i32, ptr %41, align 4, !tbaa !13
  %43 = sext i32 %42 to i64
  %44 = icmp sgt i64 %43, %2
  br i1 %44, label %45, label %52

45:                                               ; preds = %40
  %46 = trunc i64 %2 to i32
  %47 = sub i32 %46, %42
  %48 = tail call i32 @NetbufTrim(ptr noundef nonnull %0, i32 noundef %47, i8 noundef zeroext 0) #2
  store i32 %46, ptr %41, align 4, !tbaa !13
  %49 = getelementptr inbounds i8, ptr %0, i64 72
  %50 = load i32, ptr %49, align 8, !tbaa !12
  %51 = sub i32 %50, %47
  store i32 %51, ptr %49, align 8, !tbaa !12
  br label %52

52:                                               ; preds = %45, %40
  ret void
}

declare zeroext i8 @DebugAssertEnabled() local_unnamed_addr #1

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #1

declare i32 @NetbufTrim(ptr noundef, i32 noundef, i8 noundef zeroext) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !10, i64 24, !7, i64 32, !11, i64 36, !8, i64 38, !8, i64 39, !7, i64 40}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long long", !8, i64 0}
!11 = !{!"short", !8, i64 0}
!12 = !{!6, !7, i64 16}
!13 = !{!6, !7, i64 12}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass