; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/datatypes/int (sc_signed)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::sc_unsigned" = type { %"class.sc_dt::sc_value_base", i32, i32, i32, ptr }
%"class.sc_dt::sc_value_base" = type { ptr }
%"class.sc_dt::sc_signed_subref_r" = type <{ %"class.sc_dt::sc_value_base", i32, [4 x i8], ptr, i32, [4 x i8] }>

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt9sc_signed3setEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt9sc_signed3setEib(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef, i1 noundef zeroext) #2 align 2

declare noundef zeroext i1 @_ZNK5sc_dt11sc_unsigned4testEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) #3

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5sc_dt16sc_signed_subref10concat_setERKNS_11sc_unsignedEi(ptr noundef nonnull align 8 dereferenceable(28) %0, ptr noundef nonnull align 8 dereferenceable(32) %1, i32 noundef %2) unnamed_addr #2 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !9
  %11 = load ptr, ptr %4, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  %12 = load ptr, ptr %5, align 8, !tbaa !5
  %13 = getelementptr inbounds %"class.sc_dt::sc_unsigned", ptr %12, i32 0, i32 2
  %14 = load i32, ptr %13, align 4, !tbaa !11
  %15 = load i32, ptr %6, align 4, !tbaa !9
  %16 = add nsw i32 %15, 2
  %17 = sub nsw i32 %14, %16
  store i32 %17, ptr %8, align 4, !tbaa !9
  %18 = load i32, ptr %8, align 4, !tbaa !9
  %19 = icmp sge i32 %18, 0
  br i1 %19, label %20, label %59

20:                                               ; preds = %3
  %21 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %11, i32 0, i32 1
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  %22 = load i32, ptr %8, align 4, !tbaa !9
  %23 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %11, i32 0, i32 4
  %24 = load i32, ptr %23, align 8, !tbaa !14
  %25 = add nsw i32 %22, %24
  store i32 %25, ptr %10, align 4, !tbaa !9
  %26 = call noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %21, ptr noundef nonnull align 4 dereferenceable(4) %10)
  store i32 %26, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  %27 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %27, ptr %9, align 4, !tbaa !9
  %28 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %11, i32 0, i32 4
  %29 = load i32, ptr %28, align 8, !tbaa !14
  store i32 %29, ptr %7, align 4, !tbaa !9
  br label %30

30:                                               ; preds = %41, %20
  %31 = load i32, ptr %7, align 4, !tbaa !9
  %32 = load i32, ptr %8, align 4, !tbaa !9
  %33 = icmp sle i32 %31, %32
  br i1 %33, label %34, label %46

34:                                               ; preds = %30
  %35 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %11, i32 0, i32 3
  %36 = load ptr, ptr %35, align 8, !tbaa !16
  %37 = load i32, ptr %7, align 4, !tbaa !9
  %38 = load ptr, ptr %5, align 8, !tbaa !5
  %39 = load i32, ptr %9, align 4, !tbaa !9
  %40 = call noundef zeroext i1 @_ZNK5sc_dt11sc_unsigned4testEi(ptr noundef nonnull align 8 dereferenceable(32) %38, i32 noundef %39)
  call void @_ZN5sc_dt9sc_signed3setEib(ptr noundef nonnull align 8 dereferenceable(32) %36, i32 noundef %37, i1 noundef zeroext %40)
  br label %41

41:                                               ; preds = %34
  %42 = load i32, ptr %7, align 4, !tbaa !9
  %43 = add nsw i32 %42, 1
  store i32 %43, ptr %7, align 4, !tbaa !9
  %44 = load i32, ptr %9, align 4, !tbaa !9
  %45 = add nsw i32 %44, 1
  store i32 %45, ptr %9, align 4, !tbaa !9
  br label %30, !llvm.loop !17

46:                                               ; preds = %30
  br label %47

47:                                               ; preds = %55, %46
  %48 = load i32, ptr %7, align 4, !tbaa !9
  %49 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %11, i32 0, i32 1
  %50 = load i32, ptr %49, align 8, !tbaa !19
  %51 = icmp sle i32 %48, %50
  br i1 %51, label %52, label %58

52:                                               ; preds = %47
  %53 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %11, i32 0, i32 3
  %54 = load ptr, ptr %53, align 8, !tbaa !16
  call void @_ZN5sc_dt9sc_signed3setEi(ptr noundef nonnull align 8 dereferenceable(32) %54, i32 noundef 0)
  br label %55

55:                                               ; preds = %52
  %56 = load i32, ptr %7, align 4, !tbaa !9
  %57 = add nsw i32 %56, 1
  store i32 %57, ptr %7, align 4, !tbaa !9
  br label %47, !llvm.loop !20

58:                                               ; preds = %47
  br label %74

59:                                               ; preds = %3
  %60 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %11, i32 0, i32 4
  %61 = load i32, ptr %60, align 8, !tbaa !14
  store i32 %61, ptr %7, align 4, !tbaa !9
  br label %62

62:                                               ; preds = %70, %59
  %63 = load i32, ptr %7, align 4, !tbaa !9
  %64 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %11, i32 0, i32 1
  %65 = load i32, ptr %64, align 8, !tbaa !19
  %66 = icmp sle i32 %63, %65
  br i1 %66, label %67, label %73

67:                                               ; preds = %62
  %68 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %11, i32 0, i32 3
  %69 = load ptr, ptr %68, align 8, !tbaa !16
  call void @_ZN5sc_dt9sc_signed3setEi(ptr noundef nonnull align 8 dereferenceable(32) %69, i32 noundef 0)
  br label %70

70:                                               ; preds = %67
  %71 = load i32, ptr %7, align 4, !tbaa !9
  %72 = add nsw i32 %71, 1
  store i32 %72, ptr %7, align 4, !tbaa !9
  br label %62, !llvm.loop !21

73:                                               ; preds = %62
  br label %74

74:                                               ; preds = %73, %58
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 12}
!12 = !{!"_ZTSN5sc_dt11sc_unsignedE", !13, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !6, i64 24}
!13 = !{!"_ZTSN5sc_dt13sc_value_baseE"}
!14 = !{!15, !10, i64 24}
!15 = !{!"_ZTSN5sc_dt18sc_signed_subref_rE", !13, i64 0, !10, i64 8, !6, i64 16, !10, i64 24}
!16 = !{!15, !6, i64 16}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = !{!15, !10, i64 8}
!20 = distinct !{!20, !18}
!21 = distinct !{!21, !18}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt9sc_signed3setEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt9sc_signed3setEib(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef, i1 noundef zeroext) local_unnamed_addr #2 align 2

declare noundef zeroext i1 @_ZNK5sc_dt11sc_unsigned4testEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5sc_dt16sc_signed_subref10concat_setERKNS_11sc_unsignedEi(ptr noundef nonnull align 8 dereferenceable(28) %0, ptr noundef nonnull align 8 dereferenceable(32) %1, i32 noundef %2) unnamed_addr #2 align 2 {
  %4 = alloca i32, align 4
  %5 = getelementptr inbounds i8, ptr %1, i64 12
  %6 = load i32, ptr %5, align 4, !tbaa !5
  %reass.sub = sub i32 %6, %2
  %7 = add i32 %reass.sub, -2
  %8 = icmp sgt i32 %7, -1
  br i1 %8, label %9, label %29

9:                                                ; preds = %3
  %10 = getelementptr inbounds i8, ptr %0, i64 8
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #4
  %11 = getelementptr inbounds i8, ptr %0, i64 24
  %12 = load i32, ptr %11, align 8, !tbaa !12
  %13 = add nsw i32 %12, %7
  store i32 %13, ptr %4, align 4, !tbaa !14
  %14 = call noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %10, ptr noundef nonnull align 4 dereferenceable(4) %4)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #4
  %15 = load i32, ptr %11, align 8, !tbaa !12
  %.not1824 = icmp sgt i32 %15, %14
  br i1 %.not1824, label %.preheader, label %.lr.ph27

.lr.ph27:                                         ; preds = %9
  %16 = getelementptr inbounds i8, ptr %0, i64 16
  %17 = add i32 %14, 1
  br label %20

.preheader:                                       ; preds = %20, %9
  %.016.lcssa = phi i32 [ %15, %9 ], [ %17, %20 ]
  %18 = load i32, ptr %10, align 8, !tbaa !15
  %.not1928 = icmp sgt i32 %.016.lcssa, %18
  br i1 %.not1928, label %.loopexit, label %.lr.ph30

.lr.ph30:                                         ; preds = %.preheader
  %19 = getelementptr inbounds i8, ptr %0, i64 16
  br label %25

20:                                               ; preds = %.lr.ph27, %20
  %.026 = phi i32 [ %2, %.lr.ph27 ], [ %24, %20 ]
  %.01625 = phi i32 [ %15, %.lr.ph27 ], [ %23, %20 ]
  %21 = load ptr, ptr %16, align 8, !tbaa !16
  %22 = call noundef zeroext i1 @_ZNK5sc_dt11sc_unsigned4testEi(ptr noundef nonnull align 8 dereferenceable(32) %1, i32 noundef %.026)
  call void @_ZN5sc_dt9sc_signed3setEib(ptr noundef nonnull align 8 dereferenceable(32) %21, i32 noundef %.01625, i1 noundef zeroext %22)
  %23 = add i32 %.01625, 1
  %24 = add nsw i32 %.026, 1
  %exitcond.not = icmp eq i32 %.01625, %14
  br i1 %exitcond.not, label %.preheader, label %20, !llvm.loop !17

25:                                               ; preds = %.lr.ph30, %25
  %.129 = phi i32 [ %.016.lcssa, %.lr.ph30 ], [ %27, %25 ]
  %26 = load ptr, ptr %19, align 8, !tbaa !16
  call void @_ZN5sc_dt9sc_signed3setEi(ptr noundef nonnull align 8 dereferenceable(32) %26, i32 noundef 0)
  %27 = add nsw i32 %.129, 1
  %28 = load i32, ptr %10, align 8, !tbaa !15
  %.not19.not = icmp slt i32 %.129, %28
  br i1 %.not19.not, label %25, label %.loopexit, !llvm.loop !19

29:                                               ; preds = %3
  %30 = getelementptr inbounds i8, ptr %0, i64 24
  %31 = load i32, ptr %30, align 8, !tbaa !12
  %32 = getelementptr inbounds i8, ptr %0, i64 8
  %33 = load i32, ptr %32, align 8, !tbaa !15
  %.not22 = icmp sgt i32 %31, %33
  br i1 %.not22, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %29
  %34 = getelementptr inbounds i8, ptr %0, i64 16
  br label %35

35:                                               ; preds = %.lr.ph, %35
  %.223 = phi i32 [ %31, %.lr.ph ], [ %37, %35 ]
  %36 = load ptr, ptr %34, align 8, !tbaa !16
  tail call void @_ZN5sc_dt9sc_signed3setEi(ptr noundef nonnull align 8 dereferenceable(32) %36, i32 noundef 0)
  %37 = add nsw i32 %.223, 1
  %38 = load i32, ptr %32, align 8, !tbaa !15
  %.not.not = icmp slt i32 %.223, %38
  br i1 %.not.not, label %35, label %.loopexit, !llvm.loop !20

.loopexit:                                        ; preds = %35, %25, %29, %.preheader
  ret void
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 12}
!6 = !{!"_ZTSN5sc_dt11sc_unsignedE", !7, i64 0, !8, i64 8, !8, i64 12, !8, i64 16, !11, i64 24}
!7 = !{!"_ZTSN5sc_dt13sc_value_baseE"}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !8, i64 24}
!13 = !{!"_ZTSN5sc_dt18sc_signed_subref_rE", !7, i64 0, !8, i64 8, !11, i64 16, !8, i64 24}
!14 = !{!8, !8, i64 0}
!15 = !{!13, !8, i64 8}
!16 = !{!13, !11, i64 16}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = distinct !{!19, !18}
!20 = distinct !{!20, !18}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass