; LLVM IR from googlecreativelab/open-nsynth-super :: firmware/src/rotary.ll (ZN6Rotary6UpdateEii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Rotary = type { %class.Debounce, %class.Debounce, i32 }
%class.Debounce = type { i8, i32 }

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN6Rotary6UpdateEii(ptr noundef nonnull align 4 dereferenceable(20) %0, i32 noundef %1, i32 noundef %2) #0 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  store i32 %2, ptr %6, align 4, !tbaa !9
  %8 = load ptr, ptr %4, align 8
  %9 = getelementptr inbounds %class.Rotary, ptr %8, i32 0, i32 0
  %10 = load i32, ptr %5, align 4, !tbaa !9
  call void @_ZN8Debounce6UpdateEi(ptr noundef nonnull align 4 dereferenceable(8) %9, i32 noundef %10)
  %11 = getelementptr inbounds %class.Rotary, ptr %8, i32 0, i32 0
  %12 = call noundef i32 @_ZN8Debounce8GetValueEv(ptr noundef nonnull align 4 dereferenceable(8) %11)
  store i32 %12, ptr %5, align 4, !tbaa !9
  %13 = getelementptr inbounds %class.Rotary, ptr %8, i32 0, i32 1
  %14 = load i32, ptr %6, align 4, !tbaa !9
  call void @_ZN8Debounce6UpdateEi(ptr noundef nonnull align 4 dereferenceable(8) %13, i32 noundef %14)
  %15 = getelementptr inbounds %class.Rotary, ptr %8, i32 0, i32 1
  %16 = call noundef i32 @_ZN8Debounce8GetValueEv(ptr noundef nonnull align 4 dereferenceable(8) %15)
  store i32 %16, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  store i32 0, ptr %7, align 4, !tbaa !9
  %17 = load i32, ptr %5, align 4, !tbaa !9
  %18 = icmp ne i32 %17, 0
  br i1 %18, label %19, label %28

19:                                               ; preds = %3
  %20 = getelementptr inbounds %class.Rotary, ptr %8, i32 0, i32 2
  %21 = load i32, ptr %20, align 4, !tbaa !11
  %22 = icmp ne i32 %21, 0
  br i1 %22, label %28, label %23

23:                                               ; preds = %19
  %24 = load i32, ptr %6, align 4, !tbaa !9
  %25 = icmp ne i32 %24, 0
  %26 = zext i1 %25 to i64
  %27 = select i1 %25, i32 1, i32 -1
  store i32 %27, ptr %7, align 4, !tbaa !9
  br label %28

28:                                               ; preds = %23, %19, %3
  %29 = load i32, ptr %5, align 4, !tbaa !9
  %30 = getelementptr inbounds %class.Rotary, ptr %8, i32 0, i32 2
  store i32 %29, ptr %30, align 4, !tbaa !11
  %31 = load i32, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  ret i32 %31
}

declare void @_ZN8Debounce6UpdateEi(ptr noundef nonnull align 4 dereferenceable(8), i32 noundef) #1

declare noundef i32 @_ZN8Debounce8GetValueEv(ptr noundef nonnull align 4 dereferenceable(8)) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 16}
!12 = !{!"_ZTS6Rotary", !13, i64 0, !13, i64 8, !10, i64 16}
!13 = !{!"_ZTS8Debounce", !7, i64 0, !10, i64 4}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef range(i32 -1, 2) i32 @_ZN6Rotary6UpdateEii(ptr noundef nonnull align 4 dereferenceable(20) %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 align 2 {
  tail call void @_ZN8Debounce6UpdateEi(ptr noundef nonnull align 4 dereferenceable(8) %0, i32 noundef %1)
  %4 = tail call noundef i32 @_ZN8Debounce8GetValueEv(ptr noundef nonnull align 4 dereferenceable(8) %0)
  %5 = getelementptr inbounds i8, ptr %0, i64 8
  tail call void @_ZN8Debounce6UpdateEi(ptr noundef nonnull align 4 dereferenceable(8) %5, i32 noundef %2)
  %6 = tail call noundef i32 @_ZN8Debounce8GetValueEv(ptr noundef nonnull align 4 dereferenceable(8) %5)
  %.not = icmp ne i32 %4, 0
  %7 = getelementptr inbounds i8, ptr %0, i64 16
  %8 = load i32, ptr %7, align 4
  %.not6 = icmp eq i32 %8, 0
  %or.cond = select i1 %.not, i1 %.not6, i1 false
  %.not7 = icmp eq i32 %6, 0
  %9 = select i1 %.not7, i32 -1, i32 1
  %.0 = select i1 %or.cond, i32 %9, i32 0
  store i32 %4, ptr %7, align 4, !tbaa !5
  ret i32 %.0
}

declare void @_ZN8Debounce6UpdateEi(ptr noundef nonnull align 4 dereferenceable(8), i32 noundef) local_unnamed_addr #1

declare noundef i32 @_ZN8Debounce8GetValueEv(ptr noundef nonnull align 4 dereferenceable(8)) local_unnamed_addr #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 16}
!6 = !{!"_ZTS6Rotary", !7, i64 0, !7, i64 8, !10, i64 16}
!7 = !{!"_ZTS8Debounce", !8, i64 0, !10, i64 4}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"int", !8, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass