; LLVM IR from gem5/gem5 :: ext/mcpat/cacti/decoder.ll (ZN12PredecBlkDrv18get_rdOp_dynamic_EEi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.PredecBlkDrv = type { %class.Component, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, double, double, double, double, [20 x double], [20 x double], [20 x double], [20 x double], double, double, %class.powerDef, %class.powerDef, ptr, ptr, i8, i32 }
%class.Component = type { %class.Area, %class.powerDef, %class.powerDef, double, double }
%class.Area = type { double, double, double }
%class.powerDef = type { %class.powerComponents, %class.powerComponents, %class.powerComponents }
%class.powerComponents = type { double, double, double, double, double }

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef double @_ZN12PredecBlkDrv18get_rdOp_dynamic_EEi(ptr noundef nonnull align 8 dereferenceable(1280) %0, i32 noundef %1) #1 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  %5 = load ptr, ptr %3, align 8
  %6 = call noundef i32 @_ZN12PredecBlkDrv24num_addr_bits_nand2_pathEv(ptr noundef nonnull align 8 dereferenceable(1280) %5)
  %7 = sitofp i32 %6 to double
  %8 = getelementptr inbounds %class.PredecBlkDrv, ptr %5, i32 0, i32 22
  %9 = getelementptr inbounds %class.powerDef, ptr %8, i32 0, i32 0
  %10 = getelementptr inbounds %class.powerComponents, ptr %9, i32 0, i32 0
  %11 = load double, ptr %10, align 8, !tbaa !11
  %12 = call noundef i32 @_ZN12PredecBlkDrv24num_addr_bits_nand3_pathEv(ptr noundef nonnull align 8 dereferenceable(1280) %5)
  %13 = sitofp i32 %12 to double
  %14 = getelementptr inbounds %class.PredecBlkDrv, ptr %5, i32 0, i32 23
  %15 = getelementptr inbounds %class.powerDef, ptr %14, i32 0, i32 0
  %16 = getelementptr inbounds %class.powerComponents, ptr %15, i32 0, i32 0
  %17 = load double, ptr %16, align 8, !tbaa !19
  %18 = fmul double %13, %17
  %19 = call double @llvm.fmuladd.f64(double %7, double %11, double %18)
  %20 = load i32, ptr %4, align 4, !tbaa !9
  %21 = sitofp i32 %20 to double
  %22 = fmul double %19, %21
  ret double %22
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN12PredecBlkDrv24num_addr_bits_nand2_pathEv(ptr noundef nonnull align 8 dereferenceable(1280)) #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN12PredecBlkDrv24num_addr_bits_nand3_pathEv(ptr noundef nonnull align 8 dereferenceable(1280)) #2 align 2

attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !15, i64 1016}
!12 = !{!"_ZTS12PredecBlkDrv", !13, i64 0, !10, i64 280, !10, i64 284, !10, i64 288, !10, i64 292, !10, i64 296, !10, i64 300, !10, i64 304, !10, i64 308, !10, i64 312, !10, i64 316, !10, i64 320, !15, i64 328, !15, i64 336, !15, i64 344, !15, i64 352, !7, i64 360, !7, i64 520, !7, i64 680, !7, i64 840, !15, i64 1000, !15, i64 1008, !16, i64 1016, !16, i64 1136, !6, i64 1256, !6, i64 1264, !18, i64 1272, !10, i64 1276}
!13 = !{!"_ZTS9Component", !14, i64 0, !16, i64 24, !16, i64 144, !15, i64 264, !15, i64 272}
!14 = !{!"_ZTS4Area", !15, i64 0, !15, i64 8, !15, i64 16}
!15 = !{!"double", !7, i64 0}
!16 = !{!"_ZTS8powerDef", !17, i64 0, !17, i64 40, !17, i64 80}
!17 = !{!"_ZTS15powerComponents", !15, i64 0, !15, i64 8, !15, i64 16, !15, i64 24, !15, i64 32}
!18 = !{!"bool", !7, i64 0}
!19 = !{!12, !15, i64 1136}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef double @_ZN12PredecBlkDrv18get_rdOp_dynamic_EEi(ptr noundef nonnull align 8 dereferenceable(1280) %0, i32 noundef %1) local_unnamed_addr #1 align 2 {
  %3 = tail call noundef i32 @_ZN12PredecBlkDrv24num_addr_bits_nand2_pathEv(ptr noundef nonnull align 8 dereferenceable(1280) %0)
  %4 = sitofp i32 %3 to double
  %5 = getelementptr inbounds i8, ptr %0, i64 1016
  %6 = load double, ptr %5, align 8, !tbaa !5
  %7 = tail call noundef i32 @_ZN12PredecBlkDrv24num_addr_bits_nand3_pathEv(ptr noundef nonnull align 8 dereferenceable(1280) %0)
  %8 = sitofp i32 %7 to double
  %9 = getelementptr inbounds i8, ptr %0, i64 1136
  %10 = load double, ptr %9, align 8, !tbaa !17
  %11 = fmul double %10, %8
  %12 = tail call double @llvm.fmuladd.f64(double %4, double %6, double %11)
  %13 = sitofp i32 %1 to double
  %14 = fmul double %12, %13
  ret double %14
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN12PredecBlkDrv24num_addr_bits_nand2_pathEv(ptr noundef nonnull align 8 dereferenceable(1280)) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN12PredecBlkDrv24num_addr_bits_nand3_pathEv(ptr noundef nonnull align 8 dereferenceable(1280)) local_unnamed_addr #2 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !9, i64 1016}
!6 = !{!"_ZTS12PredecBlkDrv", !7, i64 0, !14, i64 280, !14, i64 284, !14, i64 288, !14, i64 292, !14, i64 296, !14, i64 300, !14, i64 304, !14, i64 308, !14, i64 312, !14, i64 316, !14, i64 320, !9, i64 328, !9, i64 336, !9, i64 344, !9, i64 352, !10, i64 360, !10, i64 520, !10, i64 680, !10, i64 840, !9, i64 1000, !9, i64 1008, !12, i64 1016, !12, i64 1136, !15, i64 1256, !15, i64 1264, !16, i64 1272, !14, i64 1276}
!7 = !{!"_ZTS9Component", !8, i64 0, !12, i64 24, !12, i64 144, !9, i64 264, !9, i64 272}
!8 = !{!"_ZTS4Area", !9, i64 0, !9, i64 8, !9, i64 16}
!9 = !{!"double", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C++ TBAA"}
!12 = !{!"_ZTS8powerDef", !13, i64 0, !13, i64 40, !13, i64 80}
!13 = !{!"_ZTS15powerComponents", !9, i64 0, !9, i64 8, !9, i64 16, !9, i64 24, !9, i64 32}
!14 = !{!"int", !10, i64 0}
!15 = !{!"any pointer", !10, i64 0}
!16 = !{!"bool", !10, i64 0}
!17 = !{!6, !9, i64 1136}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,TailCallElimPass