; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/NetworkPkg/IpSecDxe (IpSecExtractAddressRange)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare ptr @ZeroMem(ptr noundef, i64 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @IpSecExtractAddressRange(ptr noundef %0, i8 noundef zeroext %1, ptr noundef %2) #2 {
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  %6 = alloca ptr, align 8
  %7 = alloca i8, align 1
  %8 = alloca i8, align 1
  %9 = alloca i8, align 1
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i8 %1, ptr %5, align 1, !tbaa !9
  store ptr %2, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  %12 = load i8, ptr %5, align 1, !tbaa !9
  %13 = zext i8 %12 to i32
  %14 = icmp eq i32 %13, 0
  br i1 %14, label %15, label %16

15:                                               ; preds = %3
  store i32 1, ptr %11, align 4
  br label %63

16:                                               ; preds = %3
  %17 = load i8, ptr %5, align 1, !tbaa !9
  %18 = zext i8 %17 to i32
  %19 = sdiv i32 %18, 8
  %20 = trunc i32 %19 to i8
  store i8 %20, ptr %7, align 1, !tbaa !9
  %21 = load i8, ptr %5, align 1, !tbaa !9
  %22 = zext i8 %21 to i32
  %23 = srem i32 %22, 8
  %24 = trunc i32 %23 to i8
  store i8 %24, ptr %8, align 1, !tbaa !9
  %25 = load ptr, ptr %6, align 8, !tbaa !5
  store ptr %25, ptr %10, align 8, !tbaa !5
  %26 = load ptr, ptr %6, align 8, !tbaa !5
  %27 = load ptr, ptr %4, align 8, !tbaa !5
  %28 = call ptr @CopyMem(ptr noundef %26, ptr noundef %27, i64 noundef 16)
  %29 = load i8, ptr %8, align 1, !tbaa !9
  %30 = zext i8 %29 to i32
  %31 = icmp sgt i32 %30, 0
  br i1 %31, label %32, label %54

32:                                               ; preds = %16
  %33 = load i8, ptr %8, align 1, !tbaa !9
  %34 = zext i8 %33 to i32
  %35 = sub nsw i32 8, %34
  %36 = shl i32 255, %35
  %37 = trunc i32 %36 to i8
  store i8 %37, ptr %9, align 1, !tbaa !9
  %38 = load ptr, ptr %10, align 8, !tbaa !5
  %39 = load i8, ptr %7, align 1, !tbaa !9
  %40 = zext i8 %39 to i64
  %41 = getelementptr inbounds i8, ptr %38, i64 %40
  %42 = load i8, ptr %41, align 1, !tbaa !9
  %43 = zext i8 %42 to i32
  %44 = load i8, ptr %9, align 1, !tbaa !9
  %45 = zext i8 %44 to i32
  %46 = and i32 %43, %45
  %47 = trunc i32 %46 to i8
  %48 = load ptr, ptr %10, align 8, !tbaa !5
  %49 = load i8, ptr %7, align 1, !tbaa !9
  %50 = zext i8 %49 to i64
  %51 = getelementptr inbounds i8, ptr %48, i64 %50
  store i8 %47, ptr %51, align 1, !tbaa !9
  %52 = load i8, ptr %7, align 1, !tbaa !9
  %53 = add i8 %52, 1
  store i8 %53, ptr %7, align 1, !tbaa !9
  br label %54

54:                                               ; preds = %32, %16
  %55 = load ptr, ptr %10, align 8, !tbaa !5
  %56 = load i8, ptr %7, align 1, !tbaa !9
  %57 = zext i8 %56 to i64
  %58 = getelementptr inbounds i8, ptr %55, i64 %57
  %59 = load i8, ptr %7, align 1, !tbaa !9
  %60 = zext i8 %59 to i64
  %61 = sub i64 16, %60
  %62 = call ptr @ZeroMem(ptr noundef %58, i64 noundef %61)
  store i32 0, ptr %11, align 4
  br label %63

63:                                               ; preds = %54, %15
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #3
  %64 = load i32, ptr %11, align 4
  switch i32 %64, label %66 [
    i32 0, label %65
    i32 1, label %65
  ]

65:                                               ; preds = %63, %63
  ret void

66:                                               ; preds = %63
  unreachable
}

declare ptr @CopyMem(ptr noundef, ptr noundef, i64 noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare ptr @ZeroMem(ptr noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @IpSecExtractAddressRange(ptr noundef %0, i8 noundef zeroext %1, ptr noundef %2) local_unnamed_addr #1 {
  %4 = icmp eq i8 %1, 0
  br i1 %4, label %23, label %5

5:                                                ; preds = %3
  %6 = lshr i8 %1, 3
  %7 = and i8 %1, 7
  %8 = tail call ptr @CopyMem(ptr noundef %2, ptr noundef %0, i64 noundef 16) #2
  %.not = icmp eq i8 %7, 0
  br i1 %.not, label %18, label %9

9:                                                ; preds = %5
  %narrow = sub nuw nsw i8 8, %7
  %10 = zext nneg i8 %narrow to i16
  %11 = shl nuw nsw i16 255, %10
  %12 = zext nneg i8 %6 to i64
  %13 = getelementptr inbounds i8, ptr %2, i64 %12
  %14 = load i8, ptr %13, align 1, !tbaa !5
  %15 = trunc i16 %11 to i8
  %16 = and i8 %14, %15
  store i8 %16, ptr %13, align 1, !tbaa !5
  %17 = add nuw nsw i8 %6, 1
  br label %18

18:                                               ; preds = %9, %5
  %.0 = phi i8 [ %17, %9 ], [ %6, %5 ]
  %19 = zext nneg i8 %.0 to i64
  %20 = getelementptr inbounds i8, ptr %2, i64 %19
  %21 = sub nsw i64 16, %19
  %22 = tail call ptr @ZeroMem(ptr noundef %20, i64 noundef %21) #2
  br label %23

23:                                               ; preds = %3, %18
  ret void
}

declare ptr @CopyMem(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass