; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/SourceLevelDebugPkg (XhcCreateUrb)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct._USB3_DEBUG_PORT_INSTANCE = type <{ i8, i8, i8, i8, i64, i64, i64, i64, i64, %struct._TRANSFER_RING, %struct._TRANSFER_RING, %struct._EVENT_RING, %struct._URB, %struct._URB, i8, i64, i64, i64, i8 }>
%struct._TRANSFER_RING = type <{ i64, i32, i64, i64, i32 }>
%struct._EVENT_RING = type <{ i64, i64, i32, i64, i64, i32 }>
%struct._URB = type <{ i64, i32, i32, i32, i64, i64, i8, i32 }>

@.str = external hidden unnamed_addr constant [191 x i8], align 1
@.str.9 = external hidden unnamed_addr constant [33 x i8], align 1
@.str.10 = external hidden unnamed_addr constant [20 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare zeroext i8 @DebugAssertEnabled() #1

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) #1

declare ptr @ZeroMem(ptr noundef, i64 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare ptr @CopyMem(ptr noundef, ptr noundef, i64 noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local i64 @XhcCreateTransferTrb(ptr noundef, ptr noundef) #2

; Function Attrs: nounwind uwtable
define dso_local ptr @XhcCreateUrb(ptr noundef %0, i32 noundef %1, ptr noundef %2, i64 noundef %3) #2 {
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca ptr, align 8
  %11 = alloca i64, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store ptr %2, ptr %7, align 8, !tbaa !5
  store i64 %3, ptr %8, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  %12 = load i32, ptr %6, align 4, !tbaa !9
  %13 = icmp eq i32 %12, 0
  br i1 %13, label %14, label %17

14:                                               ; preds = %4
  %15 = load ptr, ptr %5, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct._USB3_DEBUG_PORT_INSTANCE, ptr %15, i32 0, i32 13
  store ptr %16, ptr %10, align 8, !tbaa !5
  br label %20

17:                                               ; preds = %4
  %18 = load ptr, ptr %5, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct._USB3_DEBUG_PORT_INSTANCE, ptr %18, i32 0, i32 12
  store ptr %19, ptr %10, align 8, !tbaa !5
  br label %20

20:                                               ; preds = %17, %14
  %21 = load ptr, ptr %10, align 8, !tbaa !5
  %22 = getelementptr inbounds %struct._URB, ptr %21, i32 0, i32 0
  %23 = load i64, ptr %22, align 1, !tbaa !13
  store i64 %23, ptr %11, align 8, !tbaa !11
  %24 = load ptr, ptr %10, align 8, !tbaa !5
  %25 = call ptr @ZeroMem(ptr noundef %24, i64 noundef 41)
  %26 = load i32, ptr %6, align 4, !tbaa !9
  %27 = load ptr, ptr %10, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct._URB, ptr %27, i32 0, i32 7
  store i32 %26, ptr %28, align 1, !tbaa !15
  %29 = load i64, ptr %11, align 8, !tbaa !11
  %30 = load ptr, ptr %10, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct._URB, ptr %30, i32 0, i32 0
  store i64 %29, ptr %31, align 1, !tbaa !13
  %32 = load i32, ptr %6, align 4, !tbaa !9
  %33 = icmp eq i32 %32, 0
  br i1 %33, label %34, label %39

34:                                               ; preds = %20
  %35 = load i64, ptr %8, align 8, !tbaa !11
  %36 = trunc i64 %35 to i32
  %37 = load ptr, ptr %10, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct._URB, ptr %37, i32 0, i32 1
  store i32 %36, ptr %38, align 1, !tbaa !16
  br label %57

39:                                               ; preds = %20
  %40 = load ptr, ptr %10, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct._URB, ptr %40, i32 0, i32 0
  %42 = load i64, ptr %41, align 1, !tbaa !13
  %43 = inttoptr i64 %42 to ptr
  %44 = load i64, ptr %8, align 8, !tbaa !11
  %45 = call ptr @ZeroMem(ptr noundef %43, i64 noundef %44)
  %46 = load ptr, ptr %10, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct._URB, ptr %46, i32 0, i32 0
  %48 = load i64, ptr %47, align 1, !tbaa !13
  %49 = inttoptr i64 %48 to ptr
  %50 = load ptr, ptr %7, align 8, !tbaa !5
  %51 = load i64, ptr %8, align 8, !tbaa !11
  %52 = call ptr @CopyMem(ptr noundef %49, ptr noundef %50, i64 noundef %51)
  %53 = load i64, ptr %8, align 8, !tbaa !11
  %54 = trunc i64 %53 to i32
  %55 = load ptr, ptr %10, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct._URB, ptr %55, i32 0, i32 1
  store i32 %54, ptr %56, align 1, !tbaa !16
  br label %57

57:                                               ; preds = %39, %34
  %58 = load ptr, ptr %5, align 8, !tbaa !5
  %59 = load ptr, ptr %10, align 8, !tbaa !5
  %60 = call i64 @XhcCreateTransferTrb(ptr noundef %58, ptr noundef %59)
  store i64 %60, ptr %9, align 8, !tbaa !11
  br label %61

61:                                               ; preds = %57
  %62 = call zeroext i8 @DebugAssertEnabled()
  %63 = icmp ne i8 %62, 0
  br i1 %63, label %64, label %84

64:                                               ; preds = %61
  %65 = load i64, ptr %9, align 8, !tbaa !11
  %66 = icmp slt i64 %65, 0
  br i1 %66, label %67, label %83

67:                                               ; preds = %64
  br label %68

68:                                               ; preds = %67
  %69 = call zeroext i8 @DebugPrintEnabled()
  %70 = icmp ne i8 %69, 0
  br i1 %70, label %71, label %80

71:                                               ; preds = %68
  br label %72

72:                                               ; preds = %71
  %73 = call zeroext i8 @DebugPrintLevelEnabled(i64 noundef 2147483648)
  %74 = icmp ne i8 %73, 0
  br i1 %74, label %75, label %77

75:                                               ; preds = %72
  %76 = load i64, ptr %9, align 8, !tbaa !11
  call void (i64, ptr, ...) @DebugPrint(i64 noundef 2147483648, ptr noundef @.str.9, i64 noundef %76)
  br label %77

77:                                               ; preds = %75, %72
  br label %78

78:                                               ; preds = %77
  br label %79

79:                                               ; preds = %78
  br label %80

80:                                               ; preds = %79, %68
  br label %81

81:                                               ; preds = %80
  br label %82

82:                                               ; preds = %81
  call void @DebugAssert(ptr noundef @.str, i64 noundef 536, ptr noundef @.str.10)
  br label %83

83:                                               ; preds = %82, %64
  br label %84

84:                                               ; preds = %83, %61
  br label %85

85:                                               ; preds = %84
  br label %86

86:                                               ; preds = %85
  %87 = load ptr, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  ret ptr %87
}

declare zeroext i8 @DebugPrintEnabled() #1

declare zeroext i8 @DebugPrintLevelEnabled(i64 noundef) #1

declare void @DebugPrint(i64 noundef, ptr noundef, ...) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long long", !7, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"_URB", !12, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !12, i64 20, !12, i64 28, !7, i64 36, !10, i64 37}
!15 = !{!14, !10, i64 37}
!16 = !{!14, !10, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [191 x i8], align 1
@.str.9 = external hidden unnamed_addr constant [33 x i8], align 1
@.str.10 = external hidden unnamed_addr constant [20 x i8], align 1

declare zeroext i8 @DebugAssertEnabled() local_unnamed_addr #0

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #0

declare ptr @ZeroMem(ptr noundef, i64 noundef) local_unnamed_addr #0

declare ptr @CopyMem(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local i64 @XhcCreateTransferTrb(ptr noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local noundef nonnull ptr @XhcCreateUrb(ptr noundef %0, i32 noundef %1, ptr noundef %2, i64 noundef %3) local_unnamed_addr #1 {
  %5 = icmp eq i32 %1, 0
  %6 = getelementptr inbounds i8, ptr %0, i64 189
  %7 = getelementptr inbounds i8, ptr %0, i64 148
  %.0 = select i1 %5, ptr %6, ptr %7
  %8 = load i64, ptr %.0, align 1, !tbaa !5
  %9 = tail call ptr @ZeroMem(ptr noundef nonnull %.0, i64 noundef 41) #2
  %10 = getelementptr inbounds i8, ptr %.0, i64 37
  store i32 %1, ptr %10, align 1, !tbaa !11
  store i64 %8, ptr %.0, align 1, !tbaa !5
  br i1 %5, label %17, label %11

11:                                               ; preds = %4
  %12 = inttoptr i64 %8 to ptr
  %13 = tail call ptr @ZeroMem(ptr noundef %12, i64 noundef %3) #2
  %14 = load i64, ptr %7, align 1, !tbaa !5
  %15 = inttoptr i64 %14 to ptr
  %16 = tail call ptr @CopyMem(ptr noundef %15, ptr noundef %2, i64 noundef %3) #2
  br label %17

17:                                               ; preds = %4, %11
  %.sink27 = phi i64 [ 156, %11 ], [ 197, %4 ]
  %18 = trunc i64 %3 to i32
  %19 = getelementptr inbounds i8, ptr %0, i64 %.sink27
  store i32 %18, ptr %19, align 1, !tbaa !12
  %20 = tail call i64 @XhcCreateTransferTrb(ptr noundef nonnull %0, ptr noundef nonnull %.0)
  %21 = tail call zeroext i8 @DebugAssertEnabled() #2
  %22 = icmp ne i8 %21, 0
  %23 = icmp slt i64 %20, 0
  %or.cond = select i1 %22, i1 %23, i1 false
  br i1 %or.cond, label %24, label %30

24:                                               ; preds = %17
  %25 = tail call zeroext i8 @DebugPrintEnabled() #2
  %.not = icmp eq i8 %25, 0
  br i1 %.not, label %29, label %26

26:                                               ; preds = %24
  %27 = tail call zeroext i8 @DebugPrintLevelEnabled(i64 noundef 2147483648) #2
  %.not25 = icmp eq i8 %27, 0
  br i1 %.not25, label %29, label %28

28:                                               ; preds = %26
  tail call void (i64, ptr, ...) @DebugPrint(i64 noundef 2147483648, ptr noundef nonnull @.str.9, i64 noundef %20) #2
  br label %29

29:                                               ; preds = %26, %28, %24
  tail call void @DebugAssert(ptr noundef nonnull @.str, i64 noundef 536, ptr noundef nonnull @.str.10) #2
  br label %30

30:                                               ; preds = %29, %17
  ret ptr %.0
}

declare zeroext i8 @DebugPrintEnabled() local_unnamed_addr #0

declare zeroext i8 @DebugPrintLevelEnabled(i64 noundef) local_unnamed_addr #0

declare void @DebugPrint(i64 noundef, ptr noundef, ...) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_URB", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !7, i64 20, !7, i64 28, !8, i64 36, !10, i64 37}
!7 = !{!"long long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!6, !10, i64 37}
!12 = !{!6, !10, i64 8}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass