; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/NetworkPkg/Dhcp6Dxe (Dhcp6ParseAddrOption)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.EFI_DHCP6_IA_ADDRESS = type { %struct.EFI_IPv6_ADDRESS, i32, i32 }
%struct.EFI_IPv6_ADDRESS = type { [16 x i8] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare zeroext i16 @SwapBytes16(i16 noundef zeroext) #1

declare ptr @CopyMem(ptr noundef, ptr noundef, i64 noundef) #1

declare i32 @SwapBytes32(i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare zeroext i16 @ReadUnaligned16(ptr noundef) #1

declare i32 @ReadUnaligned32(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @Dhcp6AddrIsInCurrentIa(ptr noundef, ptr noundef) #2

; Function Attrs: nounwind uwtable
define dso_local void @Dhcp6ParseAddrOption(ptr noundef %0, ptr noundef %1, i16 noundef zeroext %2, ptr noundef %3, ptr noundef %4) #2 {
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i16, align 2
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i16, align 2
  %13 = alloca i16, align 2
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca ptr, align 8
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store i16 %2, ptr %8, align 2, !tbaa !9
  store ptr %3, ptr %9, align 8, !tbaa !5
  store ptr %4, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  call void @llvm.lifetime.start.p0(i64 2, ptr %12) #3
  call void @llvm.lifetime.start.p0(i64 2, ptr %13) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #3
  %17 = load ptr, ptr %7, align 8, !tbaa !5
  store ptr %17, ptr %11, align 8, !tbaa !5
  %18 = load ptr, ptr %9, align 8, !tbaa !5
  store i32 0, ptr %18, align 4, !tbaa !11
  br label %19

19:                                               ; preds = %77, %5
  %20 = load ptr, ptr %11, align 8, !tbaa !5
  %21 = load ptr, ptr %7, align 8, !tbaa !5
  %22 = load i16, ptr %8, align 2, !tbaa !9
  %23 = zext i16 %22 to i32
  %24 = sext i32 %23 to i64
  %25 = getelementptr inbounds i8, ptr %21, i64 %24
  %26 = icmp ult ptr %20, %25
  br i1 %26, label %27, label %88

27:                                               ; preds = %19
  %28 = load ptr, ptr %11, align 8, !tbaa !5
  %29 = call zeroext i16 @ReadUnaligned16(ptr noundef %28)
  store i16 %29, ptr %13, align 2, !tbaa !9
  %30 = load ptr, ptr %11, align 8, !tbaa !5
  %31 = getelementptr inbounds i8, ptr %30, i64 20
  %32 = call i32 @ReadUnaligned32(ptr noundef %31)
  %33 = call i32 @SwapBytes32(i32 noundef %32)
  store i32 %33, ptr %15, align 4, !tbaa !11
  %34 = load ptr, ptr %11, align 8, !tbaa !5
  %35 = getelementptr inbounds i8, ptr %34, i64 24
  %36 = call i32 @ReadUnaligned32(ptr noundef %35)
  %37 = call i32 @SwapBytes32(i32 noundef %36)
  store i32 %37, ptr %14, align 4, !tbaa !11
  %38 = load ptr, ptr %11, align 8, !tbaa !5
  %39 = getelementptr inbounds i8, ptr %38, i64 4
  store ptr %39, ptr %16, align 8, !tbaa !5
  %40 = load i16, ptr %13, align 2, !tbaa !9
  %41 = zext i16 %40 to i32
  %42 = call zeroext i16 @SwapBytes16(i16 noundef zeroext 5)
  %43 = zext i16 %42 to i32
  %44 = icmp eq i32 %41, %43
  br i1 %44, label %45, label %77

45:                                               ; preds = %27
  %46 = load i32, ptr %14, align 4, !tbaa !11
  %47 = load i32, ptr %15, align 4, !tbaa !11
  %48 = icmp uge i32 %46, %47
  br i1 %48, label %49, label %77

49:                                               ; preds = %45
  %50 = load ptr, ptr %16, align 8, !tbaa !5
  %51 = load ptr, ptr %6, align 8, !tbaa !5
  %52 = call zeroext i8 @Dhcp6AddrIsInCurrentIa(ptr noundef %50, ptr noundef %51)
  %53 = zext i8 %52 to i32
  %54 = icmp ne i32 %53, 0
  br i1 %54, label %58, label %55

55:                                               ; preds = %49
  %56 = load i32, ptr %14, align 4, !tbaa !11
  %57 = icmp ne i32 %56, 0
  br i1 %57, label %58, label %77

58:                                               ; preds = %55, %49
  %59 = load ptr, ptr %10, align 8, !tbaa !5
  %60 = icmp ne ptr %59, null
  br i1 %60, label %61, label %73

61:                                               ; preds = %58
  %62 = load ptr, ptr %10, align 8, !tbaa !5
  %63 = load ptr, ptr %16, align 8, !tbaa !5
  %64 = call ptr @CopyMem(ptr noundef %62, ptr noundef %63, i64 noundef 24)
  %65 = load i32, ptr %15, align 4, !tbaa !11
  %66 = load ptr, ptr %10, align 8, !tbaa !5
  %67 = getelementptr inbounds %struct.EFI_DHCP6_IA_ADDRESS, ptr %66, i32 0, i32 1
  store i32 %65, ptr %67, align 4, !tbaa !13
  %68 = load i32, ptr %14, align 4, !tbaa !11
  %69 = load ptr, ptr %10, align 8, !tbaa !5
  %70 = getelementptr inbounds %struct.EFI_DHCP6_IA_ADDRESS, ptr %69, i32 0, i32 2
  store i32 %68, ptr %70, align 4, !tbaa !16
  %71 = load ptr, ptr %10, align 8, !tbaa !5
  %72 = getelementptr inbounds i8, ptr %71, i64 24
  store ptr %72, ptr %10, align 8, !tbaa !5
  br label %73

73:                                               ; preds = %61, %58
  %74 = load ptr, ptr %9, align 8, !tbaa !5
  %75 = load i32, ptr %74, align 4, !tbaa !11
  %76 = add i32 %75, 1
  store i32 %76, ptr %74, align 4, !tbaa !11
  br label %77

77:                                               ; preds = %73, %55, %45, %27
  %78 = load ptr, ptr %11, align 8, !tbaa !5
  %79 = getelementptr inbounds i8, ptr %78, i64 2
  %80 = call zeroext i16 @ReadUnaligned16(ptr noundef %79)
  %81 = call zeroext i16 @SwapBytes16(i16 noundef zeroext %80)
  store i16 %81, ptr %12, align 2, !tbaa !9
  %82 = load i16, ptr %12, align 2, !tbaa !9
  %83 = zext i16 %82 to i32
  %84 = add nsw i32 %83, 4
  %85 = load ptr, ptr %11, align 8, !tbaa !5
  %86 = sext i32 %84 to i64
  %87 = getelementptr inbounds i8, ptr %85, i64 %86
  store ptr %87, ptr %11, align 8, !tbaa !5
  br label %19, !llvm.loop !17

88:                                               ; preds = %19
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !12, i64 16}
!14 = !{!"", !15, i64 0, !12, i64 16, !12, i64 20}
!15 = !{!"", !7, i64 0}
!16 = !{!14, !12, i64 20}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare zeroext i16 @SwapBytes16(i16 noundef zeroext) local_unnamed_addr #0

declare ptr @CopyMem(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #0

declare i32 @SwapBytes32(i32 noundef) local_unnamed_addr #0

declare zeroext i16 @ReadUnaligned16(ptr noundef) local_unnamed_addr #0

declare i32 @ReadUnaligned32(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @Dhcp6AddrIsInCurrentIa(ptr noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local void @Dhcp6ParseAddrOption(ptr noundef %0, ptr noundef %1, i16 noundef zeroext %2, ptr nocapture noundef %3, ptr noundef %4) local_unnamed_addr #1 {
  store i32 0, ptr %3, align 4, !tbaa !5
  %6 = zext i16 %2 to i64
  %7 = getelementptr inbounds i8, ptr %1, i64 %6
  %.not34 = icmp eq i16 %2, 0
  br i1 %.not34, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %5, %31
  %.033 = phi ptr [ %.2, %31 ], [ %4, %5 ]
  %.02732 = phi ptr [ %37, %31 ], [ %1, %5 ]
  %8 = tail call zeroext i16 @ReadUnaligned16(ptr noundef %.02732) #2
  %9 = getelementptr inbounds i8, ptr %.02732, i64 20
  %10 = tail call i32 @ReadUnaligned32(ptr noundef nonnull %9) #2
  %11 = tail call i32 @SwapBytes32(i32 noundef %10) #2
  %12 = getelementptr inbounds i8, ptr %.02732, i64 24
  %13 = tail call i32 @ReadUnaligned32(ptr noundef nonnull %12) #2
  %14 = tail call i32 @SwapBytes32(i32 noundef %13) #2
  %15 = getelementptr inbounds i8, ptr %.02732, i64 4
  %16 = tail call zeroext i16 @SwapBytes16(i16 noundef zeroext 5) #2
  %17 = icmp ne i16 %8, %16
  %.not = icmp ult i32 %14, %11
  %or.cond31 = select i1 %17, i1 true, i1 %.not
  br i1 %or.cond31, label %31, label %18

18:                                               ; preds = %.lr.ph
  %19 = tail call zeroext i8 @Dhcp6AddrIsInCurrentIa(ptr noundef nonnull %15, ptr noundef %0)
  %20 = icmp ne i8 %19, 0
  %21 = icmp ne i32 %14, 0
  %or.cond = select i1 %20, i1 true, i1 %21
  br i1 %or.cond, label %22, label %31

22:                                               ; preds = %18
  %.not30 = icmp eq ptr %.033, null
  br i1 %.not30, label %28, label %23

23:                                               ; preds = %22
  %24 = tail call ptr @CopyMem(ptr noundef nonnull %.033, ptr noundef nonnull %15, i64 noundef 24) #2
  %25 = getelementptr inbounds i8, ptr %.033, i64 16
  store i32 %11, ptr %25, align 4, !tbaa !9
  %26 = getelementptr inbounds i8, ptr %.033, i64 20
  store i32 %14, ptr %26, align 4, !tbaa !12
  %27 = getelementptr inbounds i8, ptr %.033, i64 24
  br label %28

28:                                               ; preds = %23, %22
  %.1 = phi ptr [ %27, %23 ], [ null, %22 ]
  %29 = load i32, ptr %3, align 4, !tbaa !5
  %30 = add i32 %29, 1
  store i32 %30, ptr %3, align 4, !tbaa !5
  br label %31

31:                                               ; preds = %18, %28, %.lr.ph
  %.2 = phi ptr [ %.1, %28 ], [ %.033, %18 ], [ %.033, %.lr.ph ]
  %32 = getelementptr inbounds i8, ptr %.02732, i64 2
  %33 = tail call zeroext i16 @ReadUnaligned16(ptr noundef nonnull %32) #2
  %34 = tail call zeroext i16 @SwapBytes16(i16 noundef zeroext %33) #2
  %35 = zext i16 %34 to i64
  %36 = add nuw nsw i64 %35, 4
  %37 = getelementptr inbounds i8, ptr %.02732, i64 %36
  %38 = icmp ult ptr %37, %7
  br i1 %38, label %.lr.ph, label %._crit_edge, !llvm.loop !13

._crit_edge:                                      ; preds = %31, %5
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 16}
!10 = !{!"", !11, i64 0, !6, i64 16, !6, i64 20}
!11 = !{!"", !7, i64 0}
!12 = !{!10, !6, i64 20}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass