; LLVM IR from gem5/gem5 :: src/systemc/tlm_core/2/generic_payload/gp.ll (ZN3tlm19tlm_generic_payloadC2Ev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.tlm::tlm_generic_payload" = type <{ ptr, i64, i32, [4 x i8], ptr, i32, i32, i8, [7 x i8], ptr, i32, i32, i32, [4 x i8], %"class.tlm::tlm_array", ptr, i32, [4 x i8] }>
%"class.tlm::tlm_array" = type { %"class.std::vector", %"class.std::vector.0" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<tlm::tlm_extension_base *, std::allocator<tlm::tlm_extension_base *>>::_Vector_impl" }
%"struct.std::_Vector_base<tlm::tlm_extension_base *, std::allocator<tlm::tlm_extension_base *>>::_Vector_impl" = type { %"struct.std::_Vector_base<tlm::tlm_extension_base *, std::allocator<tlm::tlm_extension_base *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<tlm::tlm_extension_base *, std::allocator<tlm::tlm_extension_base *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<unsigned long, std::allocator<unsigned long>>::_Vector_impl" }
%"struct.std::_Vector_base<unsigned long, std::allocator<unsigned long>>::_Vector_impl" = type { %"struct.std::_Vector_base<unsigned long, std::allocator<unsigned long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<unsigned long, std::allocator<unsigned long>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@_ZTVN3tlm19tlm_generic_payloadE = external dso_local unnamed_addr constant { [4 x ptr] }, align 8

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZN3tlm18max_num_extensionsEv() #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN3tlm19tlm_generic_payloadC2Ev(ptr noundef nonnull align 8 dereferenceable(132) %0) unnamed_addr #0 align 2 {
  %2 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %3 = load ptr, ptr %2, align 8
  store ptr getelementptr inbounds inrange(-16, 16) ({ [4 x ptr] }, ptr @_ZTVN3tlm19tlm_generic_payloadE, i32 0, i32 0, i32 2), ptr %3, align 8, !tbaa !9
  %4 = getelementptr inbounds %"class.tlm::tlm_generic_payload", ptr %3, i32 0, i32 1
  store i64 0, ptr %4, align 8, !tbaa !11
  %5 = getelementptr inbounds %"class.tlm::tlm_generic_payload", ptr %3, i32 0, i32 2
  store i32 2, ptr %5, align 8, !tbaa !28
  %6 = getelementptr inbounds %"class.tlm::tlm_generic_payload", ptr %3, i32 0, i32 4
  store ptr null, ptr %6, align 8, !tbaa !29
  %7 = getelementptr inbounds %"class.tlm::tlm_generic_payload", ptr %3, i32 0, i32 5
  store i32 0, ptr %7, align 8, !tbaa !30
  %8 = getelementptr inbounds %"class.tlm::tlm_generic_payload", ptr %3, i32 0, i32 6
  store i32 0, ptr %8, align 4, !tbaa !31
  %9 = getelementptr inbounds %"class.tlm::tlm_generic_payload", ptr %3, i32 0, i32 7
  store i8 0, ptr %9, align 8, !tbaa !32
  %10 = getelementptr inbounds %"class.tlm::tlm_generic_payload", ptr %3, i32 0, i32 9
  store ptr null, ptr %10, align 8, !tbaa !33
  %11 = getelementptr inbounds %"class.tlm::tlm_generic_payload", ptr %3, i32 0, i32 10
  store i32 0, ptr %11, align 8, !tbaa !34
  %12 = getelementptr inbounds %"class.tlm::tlm_generic_payload", ptr %3, i32 0, i32 11
  store i32 0, ptr %12, align 4, !tbaa !35
  %13 = getelementptr inbounds %"class.tlm::tlm_generic_payload", ptr %3, i32 0, i32 12
  store i32 0, ptr %13, align 8, !tbaa !36
  %14 = getelementptr inbounds %"class.tlm::tlm_generic_payload", ptr %3, i32 0, i32 14
  %15 = call noundef i32 @_ZN3tlm18max_num_extensionsEv()
  %16 = zext i32 %15 to i64
  call void @_ZN3tlm9tlm_arrayIPNS_18tlm_extension_baseEEC1Em(ptr noundef nonnull align 8 dereferenceable(48) %14, i64 noundef %16)
  %17 = getelementptr inbounds %"class.tlm::tlm_generic_payload", ptr %3, i32 0, i32 15
  store ptr null, ptr %17, align 8, !tbaa !37
  %18 = getelementptr inbounds %"class.tlm::tlm_generic_payload", ptr %3, i32 0, i32 16
  store i32 0, ptr %18, align 8, !tbaa !38
  ret void
}

declare void @_ZN3tlm9tlm_arrayIPNS_18tlm_extension_baseEEC1Em(ptr, i64)

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"vtable pointer", !8, i64 0}
!11 = !{!12, !13, i64 8}
!12 = !{!"_ZTSN3tlm19tlm_generic_payloadE", !13, i64 8, !14, i64 16, !6, i64 24, !15, i64 32, !16, i64 36, !17, i64 40, !6, i64 48, !15, i64 56, !15, i64 60, !18, i64 64, !19, i64 72, !6, i64 120, !15, i64 128}
!13 = !{!"long long", !7, i64 0}
!14 = !{!"_ZTSN3tlm11tlm_commandE", !7, i64 0}
!15 = !{!"int", !7, i64 0}
!16 = !{!"_ZTSN3tlm19tlm_response_statusE", !7, i64 0}
!17 = !{!"bool", !7, i64 0}
!18 = !{!"_ZTSN3tlm13tlm_gp_optionE", !7, i64 0}
!19 = !{!"_ZTSN3tlm9tlm_arrayIPNS_18tlm_extension_baseEEE", !20, i64 0, !24, i64 24}
!20 = !{!"_ZTSSt6vectorIPN3tlm18tlm_extension_baseESaIS2_EE", !21, i64 0}
!21 = !{!"_ZTSSt12_Vector_baseIPN3tlm18tlm_extension_baseESaIS2_EE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIPN3tlm18tlm_extension_baseESaIS2_EE12_Vector_implE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIPN3tlm18tlm_extension_baseESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!24 = !{!"_ZTSSt6vectorImSaImEE", !25, i64 0}
!25 = !{!"_ZTSSt12_Vector_baseImSaImEE", !26, i64 0}
!26 = !{!"_ZTSNSt12_Vector_baseImSaImEE12_Vector_implE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseImSaImEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!28 = !{!12, !14, i64 16}
!29 = !{!12, !6, i64 24}
!30 = !{!12, !15, i64 32}
!31 = !{!12, !16, i64 36}
!32 = !{!12, !17, i64 40}
!33 = !{!12, !6, i64 48}
!34 = !{!12, !15, i64 56}
!35 = !{!12, !15, i64 60}
!36 = !{!12, !18, i64 64}
!37 = !{!12, !6, i64 120}
!38 = !{!12, !15, i64 128}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZTVN3tlm19tlm_generic_payloadE = external dso_local unnamed_addr constant { [4 x ptr] }, align 8

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZN3tlm18max_num_extensionsEv() local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN3tlm19tlm_generic_payloadC2Ev(ptr noundef nonnull align 8 dereferenceable(132) %0) unnamed_addr #0 align 2 {
  store ptr getelementptr inbounds inrange(-16, 16) (i8, ptr @_ZTVN3tlm19tlm_generic_payloadE, i64 16), ptr %0, align 8, !tbaa !5
  %2 = getelementptr inbounds i8, ptr %0, i64 8
  store i64 0, ptr %2, align 8, !tbaa !8
  %3 = getelementptr inbounds i8, ptr %0, i64 16
  store i32 2, ptr %3, align 8, !tbaa !27
  %4 = getelementptr inbounds i8, ptr %0, i64 24
  %5 = getelementptr inbounds i8, ptr %0, i64 48
  %6 = getelementptr inbounds i8, ptr %0, i64 72
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(17) %4, i8 0, i64 17, i1 false)
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(20) %5, i8 0, i64 20, i1 false)
  %7 = tail call noundef i32 @_ZN3tlm18max_num_extensionsEv()
  %8 = zext i32 %7 to i64
  tail call void @_ZN3tlm9tlm_arrayIPNS_18tlm_extension_baseEEC1Em(ptr noundef nonnull align 8 dereferenceable(48) %6, i64 noundef %8)
  %9 = getelementptr inbounds i8, ptr %0, i64 120
  store ptr null, ptr %9, align 8, !tbaa !28
  %10 = getelementptr inbounds i8, ptr %0, i64 128
  store i32 0, ptr %10, align 8, !tbaa !29
  ret void
}

declare void @_ZN3tlm9tlm_arrayIPNS_18tlm_extension_baseEEC1Em(ptr, i64) local_unnamed_addr

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"vtable pointer", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !10, i64 8}
!9 = !{!"_ZTSN3tlm19tlm_generic_payloadE", !10, i64 8, !12, i64 16, !13, i64 24, !14, i64 32, !15, i64 36, !16, i64 40, !13, i64 48, !14, i64 56, !14, i64 60, !17, i64 64, !18, i64 72, !13, i64 120, !14, i64 128}
!10 = !{!"long long", !11, i64 0}
!11 = !{!"omnipotent char", !7, i64 0}
!12 = !{!"_ZTSN3tlm11tlm_commandE", !11, i64 0}
!13 = !{!"any pointer", !11, i64 0}
!14 = !{!"int", !11, i64 0}
!15 = !{!"_ZTSN3tlm19tlm_response_statusE", !11, i64 0}
!16 = !{!"bool", !11, i64 0}
!17 = !{!"_ZTSN3tlm13tlm_gp_optionE", !11, i64 0}
!18 = !{!"_ZTSN3tlm9tlm_arrayIPNS_18tlm_extension_baseEEE", !19, i64 0, !23, i64 24}
!19 = !{!"_ZTSSt6vectorIPN3tlm18tlm_extension_baseESaIS2_EE", !20, i64 0}
!20 = !{!"_ZTSSt12_Vector_baseIPN3tlm18tlm_extension_baseESaIS2_EE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIPN3tlm18tlm_extension_baseESaIS2_EE12_Vector_implE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIPN3tlm18tlm_extension_baseESaIS2_EE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!23 = !{!"_ZTSSt6vectorImSaImEE", !24, i64 0}
!24 = !{!"_ZTSSt12_Vector_baseImSaImEE", !25, i64 0}
!25 = !{!"_ZTSNSt12_Vector_baseImSaImEE12_Vector_implE", !26, i64 0}
!26 = !{!"_ZTSNSt12_Vector_baseImSaImEE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!27 = !{!9, !12, i64 16}
!28 = !{!9, !13, i64 120}
!29 = !{!9, !14, i64 128}


; Effective O3 passes: GlobalOptPass,InstCombinePass,MemCpyOptPass,SROAPass,TailCallElimPass