; LLVM IR from beagleboard/librobotcontrol :: library/src/io (gpio)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.gpioevent_request = type { i32, i32, i32, [32 x i8], i32 }

@stderr = external global ptr, align 8
@chip_fd = external hidden global [6 x i32], align 16
@handle_fd = external hidden global [6 x [64 x i32]], align 16
@.str.12 = external hidden unnamed_addr constant [49 x i8], align 1
@.str.13 = external hidden unnamed_addr constant [48 x i8], align 1
@.str.14 = external hidden unnamed_addr constant [73 x i8], align 1
@.str.15 = external hidden unnamed_addr constant [28 x i8], align 1
@event_fd = external hidden global [6 x [64 x i32]], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind
declare i32 @fprintf(ptr noundef, ptr noundef, ...) #1

; Function Attrs: nounwind uwtable
declare hidden i32 @__open_gpiochip(i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
declare i64 @llvm.expect.i64(i64, i64) #3

; Function Attrs: nounwind
declare i32 @ioctl(i32 noundef, i64 noundef, ...) #1

declare void @perror(ptr noundef) #4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @rc_gpio_init_event(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #2 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca %struct.gpioevent_request, align 4
  %12 = alloca i32, align 4
  store i32 %0, ptr %6, align 4, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #5
  call void @llvm.lifetime.start.p0(i64 48, ptr %11) #5
  %13 = load i32, ptr %6, align 4, !tbaa !5
  %14 = icmp slt i32 %13, 0
  br i1 %14, label %18, label %15

15:                                               ; preds = %4
  %16 = load i32, ptr %6, align 4, !tbaa !5
  %17 = icmp sge i32 %16, 6
  br i1 %17, label %18, label %21

18:                                               ; preds = %15, %4
  %19 = load ptr, ptr @stderr, align 8, !tbaa !9
  %20 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %19, ptr noundef @.str.12) #5
  store i32 -1, ptr %5, align 4
  store i32 1, ptr %12, align 4
  br label %102

21:                                               ; preds = %15
  %22 = load i32, ptr %7, align 4, !tbaa !5
  %23 = icmp slt i32 %22, 0
  br i1 %23, label %27, label %24

24:                                               ; preds = %21
  %25 = load i32, ptr %7, align 4, !tbaa !5
  %26 = icmp sge i32 %25, 64
  br i1 %26, label %27, label %30

27:                                               ; preds = %24, %21
  %28 = load ptr, ptr @stderr, align 8, !tbaa !9
  %29 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %28, ptr noundef @.str.13) #5
  store i32 -1, ptr %5, align 4
  store i32 1, ptr %12, align 4
  br label %102

30:                                               ; preds = %24
  %31 = load i32, ptr %8, align 4, !tbaa !5
  %32 = sext i32 %31 to i64
  %33 = and i64 %32, 2
  %34 = icmp ne i64 %33, 0
  %35 = xor i1 %34, true
  %36 = xor i1 %35, true
  %37 = zext i1 %36 to i32
  %38 = sext i32 %37 to i64
  %39 = call i64 @llvm.expect.i64(i64 %38, i64 0)
  %40 = icmp ne i64 %39, 0
  br i1 %40, label %41, label %44

41:                                               ; preds = %30
  %42 = load ptr, ptr @stderr, align 8, !tbaa !9
  %43 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %42, ptr noundef @.str.14) #5
  store i32 -1, ptr %5, align 4
  store i32 1, ptr %12, align 4
  br label %102

44:                                               ; preds = %30
  %45 = load i32, ptr %6, align 4, !tbaa !5
  %46 = sext i32 %45 to i64
  %47 = getelementptr inbounds [6 x i32], ptr @chip_fd, i64 0, i64 %46
  %48 = load i32, ptr %47, align 4, !tbaa !5
  %49 = icmp eq i32 %48, 0
  br i1 %49, label %50, label %62

50:                                               ; preds = %44
  %51 = load i32, ptr %6, align 4, !tbaa !5
  %52 = call i32 @__open_gpiochip(i32 noundef %51)
  %53 = icmp ne i32 %52, 0
  %54 = xor i1 %53, true
  %55 = xor i1 %54, true
  %56 = zext i1 %55 to i32
  %57 = sext i32 %56 to i64
  %58 = call i64 @llvm.expect.i64(i64 %57, i64 0)
  %59 = icmp ne i64 %58, 0
  br i1 %59, label %60, label %61

60:                                               ; preds = %50
  store i32 -1, ptr %5, align 4
  store i32 1, ptr %12, align 4
  br label %102

61:                                               ; preds = %50
  br label %62

62:                                               ; preds = %61, %44
  %63 = load i32, ptr %7, align 4, !tbaa !5
  %64 = getelementptr inbounds %struct.gpioevent_request, ptr %11, i32 0, i32 0
  store i32 %63, ptr %64, align 4, !tbaa !11
  %65 = load i32, ptr %9, align 4, !tbaa !5
  %66 = getelementptr inbounds %struct.gpioevent_request, ptr %11, i32 0, i32 2
  store i32 %65, ptr %66, align 4, !tbaa !13
  %67 = load i32, ptr %8, align 4, !tbaa !5
  %68 = getelementptr inbounds %struct.gpioevent_request, ptr %11, i32 0, i32 1
  store i32 %67, ptr %68, align 4, !tbaa !14
  %69 = load i32, ptr %6, align 4, !tbaa !5
  %70 = sext i32 %69 to i64
  %71 = getelementptr inbounds [6 x i32], ptr @chip_fd, i64 0, i64 %70
  %72 = load i32, ptr %71, align 4, !tbaa !5
  %73 = call i32 (i32, i64, ...) @ioctl(i32 noundef %72, i64 noundef 3224417284, ptr noundef %11) #5
  store i32 %73, ptr %10, align 4, !tbaa !5
  %74 = load i32, ptr %10, align 4, !tbaa !5
  %75 = icmp eq i32 %74, -1
  %76 = xor i1 %75, true
  %77 = xor i1 %76, true
  %78 = zext i1 %77 to i32
  %79 = sext i32 %78 to i64
  %80 = call i64 @llvm.expect.i64(i64 %79, i64 0)
  %81 = icmp ne i64 %80, 0
  br i1 %81, label %82, label %83

82:                                               ; preds = %62
  call void @perror(ptr noundef @.str.15)
  store i32 -1, ptr %5, align 4
  store i32 1, ptr %12, align 4
  br label %102

83:                                               ; preds = %62
  %84 = getelementptr inbounds %struct.gpioevent_request, ptr %11, i32 0, i32 4
  %85 = load i32, ptr %84, align 4, !tbaa !15
  %86 = load i32, ptr %6, align 4, !tbaa !5
  %87 = sext i32 %86 to i64
  %88 = getelementptr inbounds [6 x [64 x i32]], ptr @event_fd, i64 0, i64 %87
  %89 = load i32, ptr %7, align 4, !tbaa !5
  %90 = sext i32 %89 to i64
  %91 = getelementptr inbounds [64 x i32], ptr %88, i64 0, i64 %90
  store i32 %85, ptr %91, align 4, !tbaa !5
  %92 = getelementptr inbounds %struct.gpioevent_request, ptr %11, i32 0, i32 4
  %93 = load i32, ptr %92, align 4, !tbaa !15
  %94 = load i32, ptr %6, align 4, !tbaa !5
  %95 = sext i32 %94 to i64
  %96 = getelementptr inbounds [6 x [64 x i32]], ptr @handle_fd, i64 0, i64 %95
  %97 = load i32, ptr %7, align 4, !tbaa !5
  %98 = sext i32 %97 to i64
  %99 = getelementptr inbounds [64 x i32], ptr %96, i64 0, i64 %98
  store i32 %93, ptr %99, align 4, !tbaa !5
  %100 = getelementptr inbounds %struct.gpioevent_request, ptr %11, i32 0, i32 4
  %101 = load i32, ptr %100, align 4, !tbaa !15
  store i32 %101, ptr %5, align 4
  store i32 1, ptr %12, align 4
  br label %102

102:                                              ; preds = %83, %82, %60, %41, %27, %18
  call void @llvm.lifetime.end.p0(i64 48, ptr %11) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  %103 = load i32, ptr %5, align 4
  ret i32 %103
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind willreturn memory(none) }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"gpioevent_request", !6, i64 0, !6, i64 4, !6, i64 8, !7, i64 12, !6, i64 44}
!13 = !{!12, !6, i64 8}
!14 = !{!12, !6, i64 4}
!15 = !{!12, !6, i64 44}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.gpioevent_request = type { i32, i32, i32, [32 x i8], i32 }

@stderr = external local_unnamed_addr global ptr, align 8
@chip_fd = external hidden local_unnamed_addr global [6 x i32], align 16
@handle_fd = external hidden local_unnamed_addr global [6 x [64 x i32]], align 16
@.str.12 = external hidden unnamed_addr constant [49 x i8], align 1
@.str.13 = external hidden unnamed_addr constant [48 x i8], align 1
@.str.14 = external hidden unnamed_addr constant [73 x i8], align 1
@.str.15 = external hidden unnamed_addr constant [28 x i8], align 1
@event_fd = external hidden local_unnamed_addr global [6 x [64 x i32]], align 16

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nofree nounwind
declare noundef i32 @fprintf(ptr nocapture noundef, ptr nocapture noundef readonly, ...) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare hidden i32 @__open_gpiochip(i32 noundef) local_unnamed_addr #2

; Function Attrs: nounwind
declare i32 @ioctl(i32 noundef, i64 noundef, ...) local_unnamed_addr #3

; Function Attrs: nofree nounwind
declare void @perror(ptr nocapture noundef readonly) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @rc_gpio_init_event(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #2 {
  %5 = alloca %struct.gpioevent_request, align 4
  call void @llvm.lifetime.start.p0(i64 48, ptr nonnull %5) #4
  %or.cond = icmp ugt i32 %0, 5
  br i1 %or.cond, label %6, label %9

6:                                                ; preds = %4
  %7 = load ptr, ptr @stderr, align 8, !tbaa !5
  %8 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %7, ptr noundef nonnull @.str.12) #5
  br label %38

9:                                                ; preds = %4
  %or.cond3 = icmp ugt i32 %1, 63
  br i1 %or.cond3, label %10, label %13

10:                                               ; preds = %9
  %11 = load ptr, ptr @stderr, align 8, !tbaa !5
  %12 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %11, ptr noundef nonnull @.str.13) #5
  br label %38

13:                                               ; preds = %9
  %14 = and i32 %2, 2
  %.not = icmp eq i32 %14, 0
  br i1 %.not, label %18, label %15, !prof !9

15:                                               ; preds = %13
  %16 = load ptr, ptr @stderr, align 8, !tbaa !5
  %17 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %16, ptr noundef nonnull @.str.14) #5
  br label %38

18:                                               ; preds = %13
  %19 = zext nneg i32 %0 to i64
  %20 = getelementptr inbounds [6 x i32], ptr @chip_fd, i64 0, i64 %19
  %21 = load i32, ptr %20, align 4, !tbaa !10
  %22 = icmp eq i32 %21, 0
  br i1 %22, label %23, label %25

23:                                               ; preds = %18
  %24 = tail call i32 @__open_gpiochip(i32 noundef %0)
  %.not22 = icmp eq i32 %24, 0
  br i1 %.not22, label %._crit_edge, label %38, !prof !9

._crit_edge:                                      ; preds = %23
  %.pre = load i32, ptr %20, align 4, !tbaa !10
  br label %25

25:                                               ; preds = %._crit_edge, %18
  %26 = phi i32 [ %.pre, %._crit_edge ], [ %21, %18 ]
  store i32 %1, ptr %5, align 4, !tbaa !12
  %27 = getelementptr inbounds i8, ptr %5, i64 8
  store i32 %3, ptr %27, align 4, !tbaa !14
  %28 = getelementptr inbounds i8, ptr %5, i64 4
  store i32 %2, ptr %28, align 4, !tbaa !15
  %29 = call i32 (i32, i64, ...) @ioctl(i32 noundef %26, i64 noundef 3224417284, ptr noundef nonnull %5) #4
  %30 = icmp eq i32 %29, -1
  br i1 %30, label %31, label %32, !prof !16

31:                                               ; preds = %25
  call void @perror(ptr noundef nonnull @.str.15) #6
  br label %38

32:                                               ; preds = %25
  %33 = getelementptr inbounds i8, ptr %5, i64 44
  %34 = load i32, ptr %33, align 4, !tbaa !17
  %35 = zext nneg i32 %1 to i64
  %36 = getelementptr inbounds [6 x [64 x i32]], ptr @event_fd, i64 0, i64 %19, i64 %35
  store i32 %34, ptr %36, align 4, !tbaa !10
  %37 = getelementptr inbounds [6 x [64 x i32]], ptr @handle_fd, i64 0, i64 %19, i64 %35
  store i32 %34, ptr %37, align 4, !tbaa !10
  br label %38

38:                                               ; preds = %23, %32, %31, %15, %10, %6
  %.0 = phi i32 [ -1, %6 ], [ -1, %10 ], [ -1, %15 ], [ -1, %31 ], [ %34, %32 ], [ -1, %23 ]
  call void @llvm.lifetime.end.p0(i64 48, ptr nonnull %5) #4
  ret i32 %.0
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { cold nounwind }
attributes #6 = { cold }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!"branch_weights", !"expected", i32 2000, i32 1}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"gpioevent_request", !11, i64 0, !11, i64 4, !11, i64 8, !7, i64 12, !11, i64 44}
!14 = !{!13, !11, i64 8}
!15 = !{!13, !11, i64 4}
!16 = !{!"branch_weights", !"expected", i32 1, i32 2000}
!17 = !{!13, !11, i64 44}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,LowerExpectIntrinsicPass,SROAPass,SimplifyCFGPass,TailCallElimPass