; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Universal (MD5UpdateBlock)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct._MD5_CTX = type { i64, i64, [4 x i32], [64 x i8], i64 }

; Function Attrs: nounwind uwtable
declare dso_local void @MD5Transform(ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare ptr @CopyMem(ptr noundef, ptr noundef, i64 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
define dso_local void @MD5UpdateBlock(ptr noundef %0, ptr noundef %1, i64 noundef %2) #0 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i64 %2, ptr %6, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  %8 = load ptr, ptr %4, align 8, !tbaa !5
  %9 = getelementptr inbounds %struct._MD5_CTX, ptr %8, i32 0, i32 4
  %10 = load i64, ptr %9, align 8, !tbaa !11
  %11 = sub i64 64, %10
  store i64 %11, ptr %7, align 8, !tbaa !9
  br label %12

12:                                               ; preds = %39, %3
  %13 = load i64, ptr %6, align 8, !tbaa !9
  %14 = load ptr, ptr %4, align 8, !tbaa !5
  %15 = getelementptr inbounds %struct._MD5_CTX, ptr %14, i32 0, i32 4
  %16 = load i64, ptr %15, align 8, !tbaa !11
  %17 = sub i64 64, %16
  %18 = icmp uge i64 %13, %17
  br i1 %18, label %19, label %40

19:                                               ; preds = %12
  %20 = load ptr, ptr %4, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct._MD5_CTX, ptr %20, i32 0, i32 3
  %22 = getelementptr inbounds [64 x i8], ptr %21, i64 0, i64 0
  %23 = load ptr, ptr %4, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct._MD5_CTX, ptr %23, i32 0, i32 4
  %25 = load i64, ptr %24, align 8, !tbaa !11
  %26 = getelementptr inbounds i8, ptr %22, i64 %25
  %27 = load ptr, ptr %5, align 8, !tbaa !5
  %28 = load i64, ptr %7, align 8, !tbaa !9
  %29 = call ptr @CopyMem(ptr noundef %26, ptr noundef %27, i64 noundef %28)
  %30 = load ptr, ptr %4, align 8, !tbaa !5
  call void @MD5Transform(ptr noundef %30)
  %31 = load ptr, ptr %4, align 8, !tbaa !5
  %32 = getelementptr inbounds %struct._MD5_CTX, ptr %31, i32 0, i32 4
  store i64 0, ptr %32, align 8, !tbaa !11
  %33 = load i64, ptr %7, align 8, !tbaa !9
  %34 = load ptr, ptr %5, align 8, !tbaa !5
  %35 = getelementptr inbounds i8, ptr %34, i64 %33
  store ptr %35, ptr %5, align 8, !tbaa !5
  %36 = load i64, ptr %7, align 8, !tbaa !9
  %37 = load i64, ptr %6, align 8, !tbaa !9
  %38 = sub i64 %37, %36
  store i64 %38, ptr %6, align 8, !tbaa !9
  br label %39

39:                                               ; preds = %19
  store i64 64, ptr %7, align 8, !tbaa !9
  br label %12, !llvm.loop !13

40:                                               ; preds = %12
  %41 = load ptr, ptr %4, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct._MD5_CTX, ptr %41, i32 0, i32 3
  %43 = getelementptr inbounds [64 x i8], ptr %42, i64 0, i64 0
  %44 = load ptr, ptr %4, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct._MD5_CTX, ptr %44, i32 0, i32 4
  %46 = load i64, ptr %45, align 8, !tbaa !11
  %47 = getelementptr inbounds i8, ptr %43, i64 %46
  %48 = load ptr, ptr %5, align 8, !tbaa !5
  %49 = load i64, ptr %6, align 8, !tbaa !9
  %50 = call ptr @CopyMem(ptr noundef %47, ptr noundef %48, i64 noundef %49)
  %51 = load i64, ptr %6, align 8, !tbaa !9
  %52 = load ptr, ptr %4, align 8, !tbaa !5
  %53 = getelementptr inbounds %struct._MD5_CTX, ptr %52, i32 0, i32 4
  %54 = load i64, ptr %53, align 8, !tbaa !11
  %55 = add i64 %54, %51
  store i64 %55, ptr %53, align 8, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = !{!12, !10, i64 96}
!12 = !{!"_MD5_CTX", !10, i64 0, !10, i64 8, !7, i64 16, !7, i64 32, !10, i64 96}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local void @MD5Transform(ptr noundef) local_unnamed_addr #0

declare ptr @CopyMem(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local void @MD5UpdateBlock(ptr noundef %0, ptr noundef %1, i64 noundef %2) local_unnamed_addr #0 {
  %4 = getelementptr inbounds i8, ptr %0, i64 96
  %5 = load i64, ptr %4, align 8, !tbaa !5
  %6 = sub i64 64, %5
  %.not20 = icmp ugt i64 %6, %2
  br i1 %.not20, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %3
  %7 = getelementptr inbounds i8, ptr %0, i64 32
  %8 = getelementptr inbounds i8, ptr %7, i64 %5
  %9 = tail call ptr @CopyMem(ptr noundef nonnull %8, ptr noundef %1, i64 noundef %6) #2
  tail call void @MD5Transform(ptr noundef nonnull %0)
  store i64 0, ptr %4, align 8, !tbaa !5
  %10 = getelementptr inbounds i8, ptr %1, i64 %6
  %11 = sub i64 %2, %6
  %.not.peel = icmp ult i64 %11, 64
  br i1 %.not.peel, label %._crit_edge, label %.peel.next

.peel.next:                                       ; preds = %.lr.ph, %.peel.next
  %.01822 = phi i64 [ %14, %.peel.next ], [ %11, %.lr.ph ]
  %.01921 = phi ptr [ %13, %.peel.next ], [ %10, %.lr.ph ]
  %12 = tail call ptr @CopyMem(ptr noundef nonnull %7, ptr noundef %.01921, i64 noundef 64) #2
  tail call void @MD5Transform(ptr noundef nonnull %0)
  store i64 0, ptr %4, align 8, !tbaa !5
  %13 = getelementptr inbounds i8, ptr %.01921, i64 64
  %14 = add i64 %.01822, -64
  %.not = icmp ult i64 %14, 64
  br i1 %.not, label %._crit_edge, label %.peel.next, !llvm.loop !10

._crit_edge:                                      ; preds = %.peel.next, %.lr.ph, %3
  %.019.lcssa = phi ptr [ %1, %3 ], [ %10, %.lr.ph ], [ %13, %.peel.next ]
  %.018.lcssa = phi i64 [ %2, %3 ], [ %11, %.lr.ph ], [ %14, %.peel.next ]
  %.lcssa = phi i64 [ %5, %3 ], [ 0, %.lr.ph ], [ 0, %.peel.next ]
  %15 = getelementptr inbounds i8, ptr %0, i64 32
  %16 = getelementptr inbounds i8, ptr %15, i64 %.lcssa
  %17 = tail call ptr @CopyMem(ptr noundef nonnull %16, ptr noundef %.019.lcssa, i64 noundef %.018.lcssa) #2
  %18 = load i64, ptr %4, align 8, !tbaa !5
  %19 = add i64 %18, %.018.lcssa
  store i64 %19, ptr %4, align 8, !tbaa !5
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 96}
!6 = !{!"_MD5_CTX", !7, i64 0, !7, i64 8, !8, i64 16, !8, i64 32, !7, i64 96}
!7 = !{!"long long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11, !12}
!11 = !{!"llvm.loop.mustprogress"}
!12 = !{!"llvm.loop.peeled.count", i32 1}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopFullUnrollPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass