; LLVM IR from gem5/gem5 :: ext/softfloat (f32_to_f16)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.float16_t = type { i16 }
%struct.float32_t = type { i32 }
%union.ui32_f32 = type { i32 }
%struct.commonNaN = type { i8 }
%union.ui16_f16 = type { i16 }

; Function Attrs: nounwind uwtable
define dso_local i16 @f32_to_f16(i32 %0) #0 {
  %2 = alloca %struct.float16_t, align 2
  %3 = alloca %struct.float32_t, align 4
  %4 = alloca %union.ui32_f32, align 4
  %5 = alloca i64, align 8
  %6 = alloca i8, align 1
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca %struct.commonNaN, align 1
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca %union.ui16_f16, align 2
  %13 = alloca i32, align 4
  %14 = getelementptr inbounds %struct.float32_t, ptr %3, i32 0, i32 0
  store i32 %0, ptr %14, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #4
  call void @llvm.lifetime.start.p0(i64 1, ptr %6) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #4
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #4
  call void @llvm.lifetime.start.p0(i64 2, ptr %12) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %4, ptr align 4 %3, i64 4, i1 false), !tbaa.struct !5
  %15 = load i32, ptr %4, align 4, !tbaa !10
  %16 = zext i32 %15 to i64
  store i64 %16, ptr %5, align 8, !tbaa !11
  %17 = load i64, ptr %5, align 8, !tbaa !11
  %18 = trunc i64 %17 to i32
  %19 = lshr i32 %18, 31
  %20 = icmp ne i32 %19, 0
  %21 = zext i1 %20 to i8
  store i8 %21, ptr %6, align 1, !tbaa !13
  %22 = load i64, ptr %5, align 8, !tbaa !11
  %23 = lshr i64 %22, 23
  %24 = and i64 %23, 255
  store i64 %24, ptr %7, align 8, !tbaa !11
  %25 = load i64, ptr %5, align 8, !tbaa !11
  %26 = and i64 %25, 8388607
  store i64 %26, ptr %8, align 8, !tbaa !11
  %27 = load i64, ptr %7, align 8, !tbaa !11
  %28 = icmp eq i64 %27, 255
  br i1 %28, label %29, label %48

29:                                               ; preds = %1
  %30 = load i64, ptr %8, align 8, !tbaa !11
  %31 = icmp ne i64 %30, 0
  br i1 %31, label %32, label %38

32:                                               ; preds = %29
  %33 = load i64, ptr %5, align 8, !tbaa !11
  %34 = and i64 %33, 4194304
  %35 = icmp ne i64 %34, 0
  br i1 %35, label %37, label %36

36:                                               ; preds = %32
  call void @softfloat_raiseFlags(i8 noundef zeroext 16)
  br label %37

37:                                               ; preds = %36, %32
  store i64 32256, ptr %10, align 8, !tbaa !11
  br label %47

38:                                               ; preds = %29
  %39 = load i8, ptr %6, align 1, !tbaa !13, !range !15, !noundef !16
  %40 = trunc i8 %39 to i1
  %41 = zext i1 %40 to i16
  %42 = zext i16 %41 to i32
  %43 = shl i32 %42, 15
  %44 = add nsw i32 %43, 31744
  %45 = add nsw i32 %44, 0
  %46 = sext i32 %45 to i64
  store i64 %46, ptr %10, align 8, !tbaa !11
  br label %47

47:                                               ; preds = %38, %37
  br label %79

48:                                               ; preds = %1
  %49 = load i64, ptr %8, align 8, !tbaa !11
  %50 = lshr i64 %49, 9
  %51 = load i64, ptr %8, align 8, !tbaa !11
  %52 = and i64 %51, 511
  %53 = icmp ne i64 %52, 0
  %54 = zext i1 %53 to i32
  %55 = sext i32 %54 to i64
  %56 = or i64 %50, %55
  store i64 %56, ptr %11, align 8, !tbaa !11
  %57 = load i64, ptr %7, align 8, !tbaa !11
  %58 = load i64, ptr %11, align 8, !tbaa !11
  %59 = or i64 %57, %58
  %60 = icmp ne i64 %59, 0
  br i1 %60, label %70, label %61

61:                                               ; preds = %48
  %62 = load i8, ptr %6, align 1, !tbaa !13, !range !15, !noundef !16
  %63 = trunc i8 %62 to i1
  %64 = zext i1 %63 to i16
  %65 = zext i16 %64 to i32
  %66 = shl i32 %65, 15
  %67 = add nsw i32 %66, 0
  %68 = add nsw i32 %67, 0
  %69 = sext i32 %68 to i64
  store i64 %69, ptr %10, align 8, !tbaa !11
  br label %79

70:                                               ; preds = %48
  %71 = load i8, ptr %6, align 1, !tbaa !13, !range !15, !noundef !16
  %72 = trunc i8 %71 to i1
  %73 = load i64, ptr %7, align 8, !tbaa !11
  %74 = sub nsw i64 %73, 113
  %75 = load i64, ptr %11, align 8, !tbaa !11
  %76 = or i64 %75, 16384
  %77 = call i16 @softfloat_roundPackToF16(i1 noundef zeroext %72, i64 noundef %74, i64 noundef %76)
  %78 = getelementptr inbounds %struct.float16_t, ptr %2, i32 0, i32 0
  store i16 %77, ptr %78, align 2
  store i32 1, ptr %13, align 4
  br label %82

79:                                               ; preds = %61, %47
  %80 = load i64, ptr %10, align 8, !tbaa !11
  %81 = trunc i64 %80 to i16
  store i16 %81, ptr %12, align 2, !tbaa !10
  call void @llvm.memcpy.p0.p0.i64(ptr align 2 %2, ptr align 2 %12, i64 2, i1 false), !tbaa.struct !17
  store i32 1, ptr %13, align 4
  br label %82

82:                                               ; preds = %79, %70
  call void @llvm.lifetime.end.p0(i64 2, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  %83 = getelementptr inbounds %struct.float16_t, ptr %2, i32 0, i32 0
  %84 = load i16, ptr %83, align 2
  ret i16 %84
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

declare void @softfloat_raiseFlags(i8 noundef zeroext) #3

declare i16 @softfloat_roundPackToF16(i1 noundef zeroext, i64 noundef, i64 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{i64 0, i64 4, !6}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!8, !8, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !8, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"_Bool", !8, i64 0}
!15 = !{i8 0, i8 2}
!16 = !{}
!17 = !{i64 0, i64 2, !18}
!18 = !{!19, !19, i64 0}
!19 = !{!"short", !8, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i16 @f32_to_f16(i32 %0) local_unnamed_addr #0 {
  %2 = zext i32 %0 to i64
  %3 = icmp slt i32 %0, 0
  %4 = lshr i64 %2, 23
  %5 = and i64 %4, 255
  %6 = and i64 %2, 8388607
  %7 = icmp eq i64 %5, 255
  br i1 %7, label %8, label %16

8:                                                ; preds = %1
  %.not21 = icmp eq i64 %6, 0
  br i1 %.not21, label %12, label %9

9:                                                ; preds = %8
  %10 = and i64 %2, 4194304
  %.not22 = icmp eq i64 %10, 0
  br i1 %.not22, label %11, label %30

11:                                               ; preds = %9
  tail call void @softfloat_raiseFlags(i8 noundef zeroext 16) #2
  br label %30

12:                                               ; preds = %8
  %13 = lshr i32 %0, 16
  %14 = and i32 %13, 32768
  %15 = or disjoint i32 %14, 31744
  br label %30

16:                                               ; preds = %1
  %17 = lshr i64 %6, 9
  %18 = and i64 %2, 511
  %19 = icmp ne i64 %18, 0
  %20 = zext i1 %19 to i64
  %21 = or i64 %17, %20
  %22 = or i64 %21, %5
  %.not = icmp eq i64 %22, 0
  br i1 %.not, label %23, label %26

23:                                               ; preds = %16
  %24 = lshr i32 %0, 16
  %25 = and i32 %24, 32768
  br label %30

26:                                               ; preds = %16
  %27 = add nsw i64 %5, -113
  %28 = or disjoint i64 %21, 16384
  %29 = tail call i16 @softfloat_roundPackToF16(i1 noundef zeroext %3, i64 noundef %27, i64 noundef %28) #2
  br label %32

30:                                               ; preds = %9, %11, %12, %23
  %.0.shrunk = phi i32 [ %15, %12 ], [ %25, %23 ], [ 32256, %11 ], [ 32256, %9 ]
  %31 = trunc nuw i32 %.0.shrunk to i16
  br label %32

32:                                               ; preds = %30, %26
  %.sroa.019.0 = phi i16 [ %31, %30 ], [ %29, %26 ]
  ret i16 %.sroa.019.0
}

declare void @softfloat_raiseFlags(i8 noundef zeroext) local_unnamed_addr #1

declare i16 @softfloat_roundPackToF16(i1 noundef zeroext, i64 noundef, i64 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass