; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/datatypes/int (sc_signed)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::sc_signed" = type { %"class.sc_dt::sc_value_base", i32, i32, i32, ptr }
%"class.sc_dt::sc_value_base" = type { ptr }
%"class.sc_dt::sc_length_param" = type { i32 }
%"class.sc_dt::sc_unsigned" = type { %"class.sc_dt::sc_value_base", i32, i32, i32, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dt15sc_length_paramC2Ev(ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt15sc_length_param3lenEv(ptr noundef nonnull align 4 dereferenceable(4)) #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dt11div_by_zeroIiEEvT_(i32 noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5sc_dtrmERKNS_11sc_unsignedERKNS_9sc_signedE(ptr dead_on_unwind noalias writable sret(%"class.sc_dt::sc_signed") align 8 %0, ptr noundef nonnull align 8 dereferenceable(32) %1, ptr noundef nonnull align 8 dereferenceable(32) %2) #3 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca %"class.sc_dt::sc_length_param", align 4
  store ptr %0, ptr %4, align 8
  store ptr %1, ptr %5, align 8, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !5
  %8 = load ptr, ptr %5, align 8, !tbaa !5
  %9 = getelementptr inbounds %"class.sc_dt::sc_unsigned", ptr %8, i32 0, i32 1
  %10 = load i32, ptr %9, align 8, !tbaa !9
  %11 = icmp eq i32 %10, 0
  br i1 %11, label %17, label %12

12:                                               ; preds = %3
  %13 = load ptr, ptr %6, align 8, !tbaa !5
  %14 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %13, i32 0, i32 1
  %15 = load i32, ptr %14, align 8, !tbaa !13
  %16 = icmp eq i32 %15, 0
  br i1 %16, label %17, label %22

17:                                               ; preds = %12, %3
  %18 = load ptr, ptr %6, align 8, !tbaa !5
  %19 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %18, i32 0, i32 1
  %20 = load i32, ptr %19, align 8, !tbaa !13
  call void @_ZN5sc_dt11div_by_zeroIiEEvT_(i32 noundef %20)
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  call void @_ZN5sc_dt15sc_length_paramC2Ev(ptr noundef nonnull align 4 dereferenceable(4) %7)
  %21 = call noundef i32 @_ZNK5sc_dt15sc_length_param3lenEv(ptr noundef nonnull align 4 dereferenceable(4) %7)
  call void @_ZN5sc_dt9sc_signedC1Ei(ptr noundef nonnull align 8 dereferenceable(32) %0, i32 noundef %21)
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  br label %44

22:                                               ; preds = %12
  %23 = load ptr, ptr %5, align 8, !tbaa !5
  %24 = getelementptr inbounds %"class.sc_dt::sc_unsigned", ptr %23, i32 0, i32 1
  %25 = load i32, ptr %24, align 8, !tbaa !9
  %26 = load ptr, ptr %5, align 8, !tbaa !5
  %27 = getelementptr inbounds %"class.sc_dt::sc_unsigned", ptr %26, i32 0, i32 2
  %28 = load i32, ptr %27, align 4, !tbaa !15
  %29 = load ptr, ptr %5, align 8, !tbaa !5
  %30 = getelementptr inbounds %"class.sc_dt::sc_unsigned", ptr %29, i32 0, i32 3
  %31 = load i32, ptr %30, align 8, !tbaa !16
  %32 = load ptr, ptr %5, align 8, !tbaa !5
  %33 = getelementptr inbounds %"class.sc_dt::sc_unsigned", ptr %32, i32 0, i32 4
  %34 = load ptr, ptr %33, align 8, !tbaa !17
  %35 = load ptr, ptr %6, align 8, !tbaa !5
  %36 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %35, i32 0, i32 2
  %37 = load i32, ptr %36, align 4, !tbaa !18
  %38 = load ptr, ptr %6, align 8, !tbaa !5
  %39 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %38, i32 0, i32 3
  %40 = load i32, ptr %39, align 8, !tbaa !19
  %41 = load ptr, ptr %6, align 8, !tbaa !5
  %42 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %41, i32 0, i32 4
  %43 = load ptr, ptr %42, align 8, !tbaa !20
  call void @_ZN5sc_dt17mod_signed_friendEiiiPKjiiS1_(ptr dead_on_unwind writable sret(%"class.sc_dt::sc_signed") align 8 %0, i32 noundef %25, i32 noundef %28, i32 noundef %31, ptr noundef %34, i32 noundef %37, i32 noundef %40, ptr noundef %43)
  br label %44

44:                                               ; preds = %22, %17
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt17mod_signed_friendEiiiPKjiiS1_(ptr dead_on_unwind noalias writable sret(%"class.sc_dt::sc_signed") align 8, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) #3

declare void @_ZN5sc_dt9sc_signedC1Ei(ptr, i32)

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !12, i64 8}
!10 = !{!"_ZTSN5sc_dt11sc_unsignedE", !11, i64 0, !12, i64 8, !12, i64 12, !12, i64 16, !6, i64 24}
!11 = !{!"_ZTSN5sc_dt13sc_value_baseE"}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !12, i64 8}
!14 = !{!"_ZTSN5sc_dt9sc_signedE", !11, i64 0, !12, i64 8, !12, i64 12, !12, i64 16, !6, i64 24}
!15 = !{!10, !12, i64 12}
!16 = !{!10, !12, i64 16}
!17 = !{!10, !6, i64 24}
!18 = !{!14, !12, i64 12}
!19 = !{!14, !12, i64 16}
!20 = !{!14, !6, i64 24}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::sc_signed" = type { %"class.sc_dt::sc_value_base", i32, i32, i32, ptr }
%"class.sc_dt::sc_value_base" = type { ptr }
%"class.sc_dt::sc_length_param" = type { i32 }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dt15sc_length_paramC2Ev(ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt15sc_length_param3lenEv(ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dt11div_by_zeroIiEEvT_(i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5sc_dtrmERKNS_11sc_unsignedERKNS_9sc_signedE(ptr dead_on_unwind noalias writable sret(%"class.sc_dt::sc_signed") align 8 %0, ptr nocapture noundef nonnull readonly align 8 dereferenceable(32) %1, ptr nocapture noundef nonnull readonly align 8 dereferenceable(32) %2) local_unnamed_addr #3 {
  %4 = alloca %"class.sc_dt::sc_length_param", align 4
  %5 = getelementptr inbounds i8, ptr %1, i64 8
  %6 = load i32, ptr %5, align 8, !tbaa !5
  %7 = icmp eq i32 %6, 0
  %8 = getelementptr inbounds i8, ptr %2, i64 8
  %9 = load i32, ptr %8, align 8
  %10 = icmp eq i32 %9, 0
  %or.cond = select i1 %7, i1 true, i1 %10
  br i1 %or.cond, label %11, label %13

11:                                               ; preds = %3
  tail call void @_ZN5sc_dt11div_by_zeroIiEEvT_(i32 noundef %9)
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #4
  call void @_ZN5sc_dt15sc_length_paramC2Ev(ptr noundef nonnull align 4 dereferenceable(4) %4)
  %12 = call noundef i32 @_ZNK5sc_dt15sc_length_param3lenEv(ptr noundef nonnull align 4 dereferenceable(4) %4)
  call void @_ZN5sc_dt9sc_signedC1Ei(ptr noundef nonnull align 8 dereferenceable(32) %0, i32 noundef %12)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #4
  br label %26

13:                                               ; preds = %3
  %14 = getelementptr inbounds i8, ptr %1, i64 12
  %15 = load i32, ptr %14, align 4, !tbaa !12
  %16 = getelementptr inbounds i8, ptr %1, i64 16
  %17 = load i32, ptr %16, align 8, !tbaa !13
  %18 = getelementptr inbounds i8, ptr %1, i64 24
  %19 = load ptr, ptr %18, align 8, !tbaa !14
  %20 = getelementptr inbounds i8, ptr %2, i64 12
  %21 = load i32, ptr %20, align 4, !tbaa !15
  %22 = getelementptr inbounds i8, ptr %2, i64 16
  %23 = load i32, ptr %22, align 8, !tbaa !17
  %24 = getelementptr inbounds i8, ptr %2, i64 24
  %25 = load ptr, ptr %24, align 8, !tbaa !18
  tail call void @_ZN5sc_dt17mod_signed_friendEiiiPKjiiS1_(ptr dead_on_unwind writable sret(%"class.sc_dt::sc_signed") align 8 %0, i32 noundef %6, i32 noundef %15, i32 noundef %17, ptr noundef %19, i32 noundef %21, i32 noundef %23, ptr noundef %25)
  br label %26

26:                                               ; preds = %13, %11
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt17mod_signed_friendEiiiPKjiiS1_(ptr dead_on_unwind noalias writable sret(%"class.sc_dt::sc_signed") align 8, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #3

declare void @_ZN5sc_dt9sc_signedC1Ei(ptr, i32) local_unnamed_addr

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 8}
!6 = !{!"_ZTSN5sc_dt11sc_unsignedE", !7, i64 0, !8, i64 8, !8, i64 12, !8, i64 16, !11, i64 24}
!7 = !{!"_ZTSN5sc_dt13sc_value_baseE"}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!6, !8, i64 12}
!13 = !{!6, !8, i64 16}
!14 = !{!6, !11, i64 24}
!15 = !{!16, !8, i64 12}
!16 = !{!"_ZTSN5sc_dt9sc_signedE", !7, i64 0, !8, i64 8, !8, i64 12, !8, i64 16, !11, i64 24}
!17 = !{!16, !8, i64 16}
!18 = !{!16, !11, i64 24}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass