; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/ShellPkg/Library (DevPathSerialHardDrive)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.DEVICE_CONSIST_MAPPING_INFO = type { i64, i32, %struct.POOL_PRINT, i8 }
%struct.POOL_PRINT = type { ptr, i64 }
%struct.HARDDRIVE_DEVICE_PATH = type <{ %struct.EFI_DEVICE_PATH_PROTOCOL, i32, i64, i64, [16 x i8], i8, i8 }>
%struct.EFI_DEVICE_PATH_PROTOCOL = type { i8, i8, [2 x i8] }

@.str = external hidden unnamed_addr constant [155 x i8], align 1
@.str.14 = external hidden unnamed_addr constant [31 x i8], align 1
@.str.15 = external hidden unnamed_addr constant [28 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare zeroext i8 @DebugAssertEnabled() #1

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i64 @AppendCSDNum(ptr noundef, i64 noundef) #2

; Function Attrs: nounwind uwtable
define dso_local void @DevPathSerialHardDrive(ptr noundef %0, ptr noundef %1) #2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #3
  br label %6

6:                                                ; preds = %2
  %7 = call zeroext i8 @DebugAssertEnabled()
  %8 = icmp ne i8 %7, 0
  br i1 %8, label %9, label %14

9:                                                ; preds = %6
  %10 = load ptr, ptr %3, align 8, !tbaa !5
  %11 = icmp ne ptr %10, null
  br i1 %11, label %13, label %12

12:                                               ; preds = %9
  call void @DebugAssert(ptr noundef @.str, i64 noundef 435, ptr noundef @.str.14)
  br label %13

13:                                               ; preds = %12, %9
  br label %14

14:                                               ; preds = %13, %6
  br label %15

15:                                               ; preds = %14
  br label %16

16:                                               ; preds = %15
  br label %17

17:                                               ; preds = %16
  %18 = call zeroext i8 @DebugAssertEnabled()
  %19 = icmp ne i8 %18, 0
  br i1 %19, label %20, label %25

20:                                               ; preds = %17
  %21 = load ptr, ptr %4, align 8, !tbaa !5
  %22 = icmp ne ptr %21, null
  br i1 %22, label %24, label %23

23:                                               ; preds = %20
  call void @DebugAssert(ptr noundef @.str, i64 noundef 436, ptr noundef @.str.15)
  br label %24

24:                                               ; preds = %23, %20
  br label %25

25:                                               ; preds = %24, %17
  br label %26

26:                                               ; preds = %25
  br label %27

27:                                               ; preds = %26
  %28 = load ptr, ptr %3, align 8, !tbaa !5
  store ptr %28, ptr %5, align 8, !tbaa !5
  %29 = load ptr, ptr %4, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.DEVICE_CONSIST_MAPPING_INFO, ptr %29, i32 0, i32 1
  %31 = load i32, ptr %30, align 8, !tbaa !9
  %32 = icmp eq i32 %31, 0
  br i1 %32, label %33, label %36

33:                                               ; preds = %27
  %34 = load ptr, ptr %4, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.DEVICE_CONSIST_MAPPING_INFO, ptr %34, i32 0, i32 1
  store i32 2, ptr %35, align 8, !tbaa !9
  br label %36

36:                                               ; preds = %33, %27
  %37 = load ptr, ptr %4, align 8, !tbaa !5
  %38 = load ptr, ptr %5, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.HARDDRIVE_DEVICE_PATH, ptr %38, i32 0, i32 1
  %40 = load i32, ptr %39, align 1, !tbaa !14
  %41 = zext i32 %40 to i64
  %42 = call i64 @AppendCSDNum(ptr noundef %37, i64 noundef %41)
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #3
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 8}
!10 = !{!"", !11, i64 0, !12, i64 8, !13, i64 16, !7, i64 32}
!11 = !{!"long long", !7, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!"", !6, i64 0, !11, i64 8}
!14 = !{!15, !12, i64 4}
!15 = !{!"", !16, i64 0, !12, i64 4, !11, i64 8, !11, i64 16, !7, i64 24, !7, i64 40, !7, i64 41}
!16 = !{!"", !7, i64 0, !7, i64 1, !7, i64 2}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [155 x i8], align 1
@.str.14 = external hidden unnamed_addr constant [31 x i8], align 1
@.str.15 = external hidden unnamed_addr constant [28 x i8], align 1

declare zeroext i8 @DebugAssertEnabled() local_unnamed_addr #0

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local i64 @AppendCSDNum(ptr noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local void @DevPathSerialHardDrive(ptr noundef readonly %0, ptr noundef %1) local_unnamed_addr #1 {
  %3 = tail call zeroext i8 @DebugAssertEnabled() #2
  %4 = icmp eq i8 %3, 0
  %5 = icmp ne ptr %0, null
  %or.cond = or i1 %5, %4
  br i1 %or.cond, label %7, label %6

6:                                                ; preds = %2
  tail call void @DebugAssert(ptr noundef nonnull @.str, i64 noundef 435, ptr noundef nonnull @.str.14) #2
  br label %7

7:                                                ; preds = %2, %6
  %8 = tail call zeroext i8 @DebugAssertEnabled() #2
  %9 = icmp eq i8 %8, 0
  %10 = icmp ne ptr %1, null
  %or.cond3 = or i1 %10, %9
  br i1 %or.cond3, label %12, label %11

11:                                               ; preds = %7
  tail call void @DebugAssert(ptr noundef nonnull @.str, i64 noundef 436, ptr noundef nonnull @.str.15) #2
  br label %12

12:                                               ; preds = %11, %7
  %13 = getelementptr inbounds i8, ptr %1, i64 8
  %14 = load i32, ptr %13, align 8, !tbaa !5
  %15 = icmp eq i32 %14, 0
  br i1 %15, label %16, label %17

16:                                               ; preds = %12
  store i32 2, ptr %13, align 8, !tbaa !5
  br label %17

17:                                               ; preds = %16, %12
  %18 = getelementptr inbounds i8, ptr %0, i64 4
  %19 = load i32, ptr %18, align 1, !tbaa !13
  %20 = zext i32 %19 to i64
  %21 = tail call i64 @AppendCSDNum(ptr noundef nonnull %1, i64 noundef %20)
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"", !7, i64 0, !10, i64 8, !11, i64 16, !8, i64 32}
!7 = !{!"long long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"", !12, i64 0, !7, i64 8}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !10, i64 4}
!14 = !{!"", !15, i64 0, !10, i64 4, !7, i64 8, !7, i64 16, !8, i64 24, !8, i64 40, !8, i64 41}
!15 = !{!"", !8, i64 0, !8, i64 1, !8, i64 2}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass