; LLVM IR from gem5/gem5 :: ext/mcpat/noc.ll (ZN13OnChipNetwork13computeEnergyEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.powerDef = type { %class.powerComponents, %class.powerComponents, %class.powerComponents }
%class.powerComponents = type { double, double, double, double, double }
%class.McPATComponent = type { ptr, %class.Component, ptr, %class.InputParameter, %"class.std::__cxx11::basic_string", double, %"class.std::vector", %class.McPATOutput, %class.statsDef, %class.statsDef, %class.powerDef, %class.powerDef }
%class.Component = type { %class.Area, %class.powerDef, %class.powerDef, double, double }
%class.Area = type { double, double, double }
%class.InputParameter = type { i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, i32, double, double, i32, i32, i32, i32, i32, i8, i8, i8, i8, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i8, i8, i32, i32, i8, double, double, i8, i32, i32, i8 }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<McPATComponent *, std::allocator<McPATComponent *>>::_Vector_impl" }
%"struct.std::_Vector_base<McPATComponent *, std::allocator<McPATComponent *>>::_Vector_impl" = type { %"struct.std::_Vector_base<McPATComponent *, std::allocator<McPATComponent *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<McPATComponent *, std::allocator<McPATComponent *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.McPATOutput = type { double, double, double, double, double, double }
%class.statsDef = type { %class.statsComponents, %class.statsComponents, %class.statsComponents, %class.statsComponents, %class.statsComponents, %class.statsComponents, %class.statsComponents }
%class.statsComponents = type { double, double, double }
%class.OnChipNetwork = type { %class.McPATComponent, ptr, ptr, %class.Component, i32, %class.InputParameter, double, double, double, double, %class.OnChipNetworkParameters, %class.OnChipNetworkStatistics, %class.uca_org_t, %class.statsDef, i8, i8, %"class.std::__cxx11::basic_string" }
%class.OnChipNetworkParameters = type { double, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, double, double, double, double, i8, i8, double, double, double, i32 }
%class.OnChipNetworkStatistics = type { double, double }
%class.uca_org_t = type { ptr, ptr, double, double, double, double, %class.powerDef, double, double, double, [100 x i8], double, i8, %struct.results_mem_array, %struct.results_mem_array }
%struct.results_mem_array = type { i32, i32, double, i32, i32, i32, i32, i32, i32, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double }
%class.Interconnect = type { %class.McPATComponent, i32, double, double, %class.InputParameter, %class.uca_org_t, %class.Area, double, %class.powerDef, double, double, double, double, i32, i32, double, double, i32, double, double, double, double, double, i8, i8, double, double, i8, i32, i8, double, i32, ptr, %class.InterconnectParameters, %class.InterconnectStatistics }
%class.InterconnectParameters = type { double }
%class.InterconnectStatistics = type { double, double }
%class.Router = type { %class.Component, %class.Component, %class.Component, %class.Component, double, double, double, double, double, ptr, double, i32, i32, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double }

@__const._ZN13OnChipNetwork13computeEnergyEv.pppm_t = external hidden unnamed_addr constant [4 x double], align 16
@_ZL8pppm_lkg = external hidden constant [4 x double], align 16

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN13OnChipNetwork13computeEnergyEv(ptr noundef nonnull align 8 dereferenceable(10600) %0) unnamed_addr #2 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca [4 x double], align 16
  %4 = alloca %class.powerDef, align 8
  %5 = alloca %class.powerDef, align 8
  %6 = alloca %class.powerDef, align 8
  %7 = alloca %class.powerDef, align 8
  %8 = alloca %class.powerDef, align 8
  %9 = alloca %class.powerDef, align 8
  %10 = alloca %class.powerDef, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %11 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 32, ptr %3) #5
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %3, ptr align 16 @__const._ZN13OnChipNetwork13computeEnergyEv.pppm_t, i64 32, i1 false)
  %12 = getelementptr inbounds %class.McPATComponent, ptr %11, i32 0, i32 8
  call void @_ZN8statsDef5resetEv(ptr noundef nonnull align 8 dereferenceable(168) %12)
  %13 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 11
  %14 = getelementptr inbounds %class.OnChipNetworkStatistics, ptr %13, i32 0, i32 0
  %15 = load double, ptr %14, align 8, !tbaa !9
  %16 = getelementptr inbounds %class.McPATComponent, ptr %11, i32 0, i32 8
  %17 = getelementptr inbounds %class.statsDef, ptr %16, i32 0, i32 0
  %18 = getelementptr inbounds %class.statsComponents, ptr %17, i32 0, i32 0
  store double %15, ptr %18, align 8, !tbaa !35
  %19 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 15
  %20 = load i8, ptr %19, align 1, !tbaa !36, !range !37, !noundef !38
  %21 = trunc i8 %20 to i1
  br i1 %21, label %22, label %54

22:                                               ; preds = %1
  %23 = getelementptr inbounds [4 x double], ptr %3, i64 0, i64 0
  %24 = getelementptr inbounds %class.McPATComponent, ptr %11, i32 0, i32 8
  %25 = getelementptr inbounds %class.statsDef, ptr %24, i32 0, i32 0
  %26 = getelementptr inbounds %class.statsComponents, ptr %25, i32 0, i32 0
  %27 = load double, ptr %26, align 8, !tbaa !35
  %28 = fmul double 1.000000e+00, %27
  call void @_Z8set_pppmPddddd(ptr noundef %23, double noundef %28, double noundef 1.000000e+00, double noundef 1.000000e+00, double noundef 1.000000e+00)
  call void @llvm.lifetime.start.p0(i64 120, ptr %4) #5
  %29 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 1
  %30 = load ptr, ptr %29, align 8, !tbaa !39
  %31 = getelementptr inbounds %class.Component, ptr %30, i32 0, i32 1
  %32 = getelementptr inbounds [4 x double], ptr %3, i64 0, i64 0
  call void @_ZmlRK8powerDefPKd(ptr dead_on_unwind writable sret(%class.powerDef) align 8 %4, ptr noundef nonnull align 8 dereferenceable(120) %31, ptr noundef %32)
  %33 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 1
  %34 = load ptr, ptr %33, align 8, !tbaa !39
  %35 = getelementptr inbounds %class.Component, ptr %34, i32 0, i32 1
  %36 = call noundef nonnull align 8 dereferenceable(120) ptr @_ZN8powerDefaSEOS_(ptr noundef nonnull align 8 dereferenceable(120) %35, ptr noundef nonnull align 8 dereferenceable(120) %4)
  call void @llvm.lifetime.end.p0(i64 120, ptr %4) #5
  %37 = getelementptr inbounds [4 x double], ptr %3, i64 0, i64 0
  %38 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 10
  %39 = getelementptr inbounds %class.OnChipNetworkParameters, ptr %38, i32 0, i32 10
  %40 = load i32, ptr %39, align 4, !tbaa !40
  %41 = sitofp i32 %40 to double
  %42 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 10
  %43 = getelementptr inbounds %class.OnChipNetworkParameters, ptr %42, i32 0, i32 10
  %44 = load i32, ptr %43, align 4, !tbaa !40
  %45 = sitofp i32 %44 to double
  %46 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 10
  %47 = getelementptr inbounds %class.OnChipNetworkParameters, ptr %46, i32 0, i32 10
  %48 = load i32, ptr %47, align 4, !tbaa !40
  %49 = sitofp i32 %48 to double
  %50 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 10
  %51 = getelementptr inbounds %class.OnChipNetworkParameters, ptr %50, i32 0, i32 10
  %52 = load i32, ptr %51, align 4, !tbaa !40
  %53 = sitofp i32 %52 to double
  call void @_Z8set_pppmPddddd(ptr noundef %37, double noundef %41, double noundef %45, double noundef %49, double noundef %53)
  br label %54

54:                                               ; preds = %22, %1
  %55 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 14
  %56 = load i8, ptr %55, align 8, !tbaa !41, !range !37, !noundef !38
  %57 = trunc i8 %56 to i1
  br i1 %57, label %58, label %111

58:                                               ; preds = %54
  %59 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 10
  %60 = getelementptr inbounds %class.OnChipNetworkParameters, ptr %59, i32 0, i32 16
  %61 = load i8, ptr %60, align 1, !tbaa !42, !range !37, !noundef !38
  %62 = trunc i8 %61 to i1
  br i1 %62, label %63, label %73

63:                                               ; preds = %58
  %64 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 10
  %65 = getelementptr inbounds %class.OnChipNetworkParameters, ptr %64, i32 0, i32 4
  %66 = load i32, ptr %65, align 4, !tbaa !43
  %67 = sub nsw i32 %66, 1
  %68 = sitofp i32 %67 to double
  %69 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 2
  %70 = load ptr, ptr %69, align 8, !tbaa !44
  %71 = getelementptr inbounds %class.Interconnect, ptr %70, i32 0, i32 33
  %72 = getelementptr inbounds %class.InterconnectParameters, ptr %71, i32 0, i32 0
  store double %68, ptr %72, align 8, !tbaa !45
  br label %82

73:                                               ; preds = %58
  %74 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 10
  %75 = getelementptr inbounds %class.OnChipNetworkParameters, ptr %74, i32 0, i32 4
  %76 = load i32, ptr %75, align 4, !tbaa !43
  %77 = sitofp i32 %76 to double
  %78 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 2
  %79 = load ptr, ptr %78, align 8, !tbaa !44
  %80 = getelementptr inbounds %class.Interconnect, ptr %79, i32 0, i32 33
  %81 = getelementptr inbounds %class.InterconnectParameters, ptr %80, i32 0, i32 0
  store double %77, ptr %81, align 8, !tbaa !45
  br label %82

82:                                               ; preds = %73, %63
  %83 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 10
  %84 = getelementptr inbounds %class.OnChipNetworkParameters, ptr %83, i32 0, i32 17
  %85 = load double, ptr %84, align 8, !tbaa !51
  %86 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 11
  %87 = getelementptr inbounds %class.OnChipNetworkStatistics, ptr %86, i32 0, i32 0
  %88 = load double, ptr %87, align 8, !tbaa !9
  %89 = fmul double %85, %88
  %90 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 2
  %91 = load ptr, ptr %90, align 8, !tbaa !44
  %92 = getelementptr inbounds %class.Interconnect, ptr %91, i32 0, i32 34
  %93 = getelementptr inbounds %class.InterconnectStatistics, ptr %92, i32 0, i32 0
  store double %89, ptr %93, align 8, !tbaa !52
  %94 = getelementptr inbounds [4 x double], ptr %3, i64 0, i64 0
  %95 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 10
  %96 = getelementptr inbounds %class.OnChipNetworkParameters, ptr %95, i32 0, i32 10
  %97 = load i32, ptr %96, align 4, !tbaa !40
  %98 = sitofp i32 %97 to double
  %99 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 10
  %100 = getelementptr inbounds %class.OnChipNetworkParameters, ptr %99, i32 0, i32 10
  %101 = load i32, ptr %100, align 4, !tbaa !40
  %102 = sitofp i32 %101 to double
  %103 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 10
  %104 = getelementptr inbounds %class.OnChipNetworkParameters, ptr %103, i32 0, i32 10
  %105 = load i32, ptr %104, align 4, !tbaa !40
  %106 = sitofp i32 %105 to double
  %107 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 10
  %108 = getelementptr inbounds %class.OnChipNetworkParameters, ptr %107, i32 0, i32 10
  %109 = load i32, ptr %108, align 4, !tbaa !40
  %110 = sitofp i32 %109 to double
  call void @_Z8set_pppmPddddd(ptr noundef %94, double noundef %98, double noundef %102, double noundef %106, double noundef %110)
  br label %111

111:                                              ; preds = %82, %54
  %112 = getelementptr inbounds %class.McPATComponent, ptr %11, i32 0, i32 9
  call void @_ZN8statsDef5resetEv(ptr noundef nonnull align 8 dereferenceable(168) %112)
  %113 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 11
  %114 = getelementptr inbounds %class.OnChipNetworkStatistics, ptr %113, i32 0, i32 1
  %115 = load double, ptr %114, align 8, !tbaa !53
  %116 = getelementptr inbounds %class.McPATComponent, ptr %11, i32 0, i32 9
  %117 = getelementptr inbounds %class.statsDef, ptr %116, i32 0, i32 0
  %118 = getelementptr inbounds %class.statsComponents, ptr %117, i32 0, i32 0
  store double %115, ptr %118, align 8, !tbaa !54
  %119 = getelementptr inbounds [4 x double], ptr %3, i64 0, i64 0
  call void @_Z8set_pppmPddddd(ptr noundef %119, double noundef 1.000000e+00, double noundef 0.000000e+00, double noundef 0.000000e+00, double noundef 0.000000e+00)
  %120 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 15
  %121 = load i8, ptr %120, align 1, !tbaa !36, !range !37, !noundef !38
  %122 = trunc i8 %121 to i1
  br i1 %122, label %123, label %209

123:                                              ; preds = %111
  %124 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 1
  %125 = load ptr, ptr %124, align 8, !tbaa !39
  %126 = getelementptr inbounds %class.Router, ptr %125, i32 0, i32 3
  %127 = getelementptr inbounds %class.Component, ptr %126, i32 0, i32 1
  %128 = getelementptr inbounds %class.powerDef, ptr %127, i32 0, i32 0
  %129 = getelementptr inbounds %class.powerComponents, ptr %128, i32 0, i32 0
  %130 = load double, ptr %129, align 8, !tbaa !55
  %131 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 1
  %132 = load ptr, ptr %131, align 8, !tbaa !39
  %133 = getelementptr inbounds %class.Router, ptr %132, i32 0, i32 3
  %134 = getelementptr inbounds %class.Component, ptr %133, i32 0, i32 1
  %135 = getelementptr inbounds %class.powerDef, ptr %134, i32 0, i32 1
  %136 = getelementptr inbounds %class.powerComponents, ptr %135, i32 0, i32 0
  %137 = load double, ptr %136, align 8, !tbaa !58
  %138 = fadd double %130, %137
  %139 = getelementptr inbounds %class.McPATComponent, ptr %11, i32 0, i32 9
  %140 = getelementptr inbounds %class.statsDef, ptr %139, i32 0, i32 0
  %141 = getelementptr inbounds %class.statsComponents, ptr %140, i32 0, i32 0
  %142 = load double, ptr %141, align 8, !tbaa !54
  %143 = fmul double %138, %142
  %144 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 1
  %145 = load ptr, ptr %144, align 8, !tbaa !39
  %146 = getelementptr inbounds %class.Router, ptr %145, i32 0, i32 3
  %147 = getelementptr inbounds %class.Component, ptr %146, i32 0, i32 2
  %148 = getelementptr inbounds %class.powerDef, ptr %147, i32 0, i32 0
  %149 = getelementptr inbounds %class.powerComponents, ptr %148, i32 0, i32 0
  store double %143, ptr %149, align 8, !tbaa !59
  %150 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 1
  %151 = load ptr, ptr %150, align 8, !tbaa !39
  %152 = getelementptr inbounds %class.Router, ptr %151, i32 0, i32 2
  %153 = getelementptr inbounds %class.Component, ptr %152, i32 0, i32 1
  %154 = getelementptr inbounds %class.powerDef, ptr %153, i32 0, i32 0
  %155 = getelementptr inbounds %class.powerComponents, ptr %154, i32 0, i32 0
  %156 = load double, ptr %155, align 8, !tbaa !60
  %157 = getelementptr inbounds %class.McPATComponent, ptr %11, i32 0, i32 9
  %158 = getelementptr inbounds %class.statsDef, ptr %157, i32 0, i32 0
  %159 = getelementptr inbounds %class.statsComponents, ptr %158, i32 0, i32 0
  %160 = load double, ptr %159, align 8, !tbaa !54
  %161 = fmul double %156, %160
  %162 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 1
  %163 = load ptr, ptr %162, align 8, !tbaa !39
  %164 = getelementptr inbounds %class.Router, ptr %163, i32 0, i32 2
  %165 = getelementptr inbounds %class.Component, ptr %164, i32 0, i32 2
  %166 = getelementptr inbounds %class.powerDef, ptr %165, i32 0, i32 0
  %167 = getelementptr inbounds %class.powerComponents, ptr %166, i32 0, i32 0
  store double %161, ptr %167, align 8, !tbaa !61
  %168 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 1
  %169 = load ptr, ptr %168, align 8, !tbaa !39
  %170 = getelementptr inbounds %class.Router, ptr %169, i32 0, i32 1
  %171 = getelementptr inbounds %class.Component, ptr %170, i32 0, i32 1
  %172 = getelementptr inbounds %class.powerDef, ptr %171, i32 0, i32 0
  %173 = getelementptr inbounds %class.powerComponents, ptr %172, i32 0, i32 0
  %174 = load double, ptr %173, align 8, !tbaa !62
  %175 = getelementptr inbounds %class.McPATComponent, ptr %11, i32 0, i32 9
  %176 = getelementptr inbounds %class.statsDef, ptr %175, i32 0, i32 0
  %177 = getelementptr inbounds %class.statsComponents, ptr %176, i32 0, i32 0
  %178 = load double, ptr %177, align 8, !tbaa !54
  %179 = fmul double %174, %178
  %180 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 1
  %181 = load ptr, ptr %180, align 8, !tbaa !39
  %182 = getelementptr inbounds %class.Router, ptr %181, i32 0, i32 1
  %183 = getelementptr inbounds %class.Component, ptr %182, i32 0, i32 2
  %184 = getelementptr inbounds %class.powerDef, ptr %183, i32 0, i32 0
  %185 = getelementptr inbounds %class.powerComponents, ptr %184, i32 0, i32 0
  store double %179, ptr %185, align 8, !tbaa !63
  call void @llvm.lifetime.start.p0(i64 120, ptr %5) #5
  call void @llvm.lifetime.start.p0(i64 120, ptr %6) #5
  %186 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 1
  %187 = load ptr, ptr %186, align 8, !tbaa !39
  %188 = getelementptr inbounds %class.Component, ptr %187, i32 0, i32 2
  call void @llvm.lifetime.start.p0(i64 120, ptr %7) #5
  call void @llvm.lifetime.start.p0(i64 120, ptr %8) #5
  call void @llvm.lifetime.start.p0(i64 120, ptr %9) #5
  %189 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 1
  %190 = load ptr, ptr %189, align 8, !tbaa !39
  %191 = getelementptr inbounds %class.Router, ptr %190, i32 0, i32 3
  %192 = getelementptr inbounds %class.Component, ptr %191, i32 0, i32 2
  %193 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 1
  %194 = load ptr, ptr %193, align 8, !tbaa !39
  %195 = getelementptr inbounds %class.Router, ptr %194, i32 0, i32 2
  %196 = getelementptr inbounds %class.Component, ptr %195, i32 0, i32 2
  call void @_ZplRK8powerDefS1_(ptr dead_on_unwind writable sret(%class.powerDef) align 8 %9, ptr noundef nonnull align 8 dereferenceable(120) %192, ptr noundef nonnull align 8 dereferenceable(120) %196)
  %197 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 1
  %198 = load ptr, ptr %197, align 8, !tbaa !39
  %199 = getelementptr inbounds %class.Router, ptr %198, i32 0, i32 1
  %200 = getelementptr inbounds %class.Component, ptr %199, i32 0, i32 2
  call void @_ZplRK8powerDefS1_(ptr dead_on_unwind writable sret(%class.powerDef) align 8 %8, ptr noundef nonnull align 8 dereferenceable(120) %9, ptr noundef nonnull align 8 dereferenceable(120) %200)
  %201 = getelementptr inbounds [4 x double], ptr %3, i64 0, i64 0
  call void @_ZmlRK8powerDefPKd(ptr dead_on_unwind writable sret(%class.powerDef) align 8 %7, ptr noundef nonnull align 8 dereferenceable(120) %8, ptr noundef %201)
  call void @_ZplRK8powerDefS1_(ptr dead_on_unwind writable sret(%class.powerDef) align 8 %6, ptr noundef nonnull align 8 dereferenceable(120) %188, ptr noundef nonnull align 8 dereferenceable(120) %7)
  call void @llvm.lifetime.start.p0(i64 120, ptr %10) #5
  %202 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 1
  %203 = load ptr, ptr %202, align 8, !tbaa !39
  %204 = getelementptr inbounds %class.Component, ptr %203, i32 0, i32 1
  call void @_ZmlRK8powerDefPKd(ptr dead_on_unwind writable sret(%class.powerDef) align 8 %10, ptr noundef nonnull align 8 dereferenceable(120) %204, ptr noundef @_ZL8pppm_lkg)
  call void @_ZplRK8powerDefS1_(ptr dead_on_unwind writable sret(%class.powerDef) align 8 %5, ptr noundef nonnull align 8 dereferenceable(120) %6, ptr noundef nonnull align 8 dereferenceable(120) %10)
  %205 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 1
  %206 = load ptr, ptr %205, align 8, !tbaa !39
  %207 = getelementptr inbounds %class.Component, ptr %206, i32 0, i32 2
  %208 = call noundef nonnull align 8 dereferenceable(120) ptr @_ZN8powerDefaSEOS_(ptr noundef nonnull align 8 dereferenceable(120) %207, ptr noundef nonnull align 8 dereferenceable(120) %5)
  call void @llvm.lifetime.end.p0(i64 120, ptr %10) #5
  call void @llvm.lifetime.end.p0(i64 120, ptr %9) #5
  call void @llvm.lifetime.end.p0(i64 120, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 120, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 120, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 120, ptr %5) #5
  br label %209

209:                                              ; preds = %123, %111
  %210 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 14
  %211 = load i8, ptr %210, align 8, !tbaa !41, !range !37, !noundef !38
  %212 = trunc i8 %211 to i1
  br i1 %212, label %213, label %221

213:                                              ; preds = %209
  %214 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 11
  %215 = getelementptr inbounds %class.OnChipNetworkStatistics, ptr %214, i32 0, i32 1
  %216 = load double, ptr %215, align 8, !tbaa !53
  %217 = getelementptr inbounds %class.OnChipNetwork, ptr %11, i32 0, i32 2
  %218 = load ptr, ptr %217, align 8, !tbaa !44
  %219 = getelementptr inbounds %class.Interconnect, ptr %218, i32 0, i32 34
  %220 = getelementptr inbounds %class.InterconnectStatistics, ptr %219, i32 0, i32 1
  store double %216, ptr %220, align 8, !tbaa !64
  br label %221

221:                                              ; preds = %213, %209
  call void @_ZN14McPATComponent13computeEnergyEv(ptr noundef nonnull align 8 dereferenceable(1352) %11)
  call void @llvm.lifetime.end.p0(i64 32, ptr %3) #5
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN8statsDef5resetEv(ptr noundef nonnull align 8 dereferenceable(168)) #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_Z8set_pppmPddddd(ptr noundef, double noundef, double noundef, double noundef, double noundef) #3

declare void @_ZmlRK8powerDefPKd(ptr dead_on_unwind writable sret(%class.powerDef) align 8, ptr noundef nonnull align 8 dereferenceable(120), ptr noundef) #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(120) ptr @_ZN8powerDefaSEOS_(ptr noundef nonnull align 8 dereferenceable(120), ptr noundef nonnull align 8 dereferenceable(120)) #3 align 2

declare void @_ZplRK8powerDefS1_(ptr dead_on_unwind writable sret(%class.powerDef) align 8, ptr noundef nonnull align 8 dereferenceable(120), ptr noundef nonnull align 8 dereferenceable(120)) #4

declare void @_ZN14McPATComponent13computeEnergyEv(ptr noundef nonnull align 8 dereferenceable(1352)) unnamed_addr #4

attributes #0 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !14, i64 2176}
!10 = !{!"_ZTS13OnChipNetwork", !11, i64 0, !6, i64 1352, !6, i64 1360, !12, i64 1368, !18, i64 1648, !17, i64 1656, !14, i64 2024, !14, i64 2032, !14, i64 2040, !14, i64 2048, !31, i64 2056, !32, i64 2176, !33, i64 2192, !29, i64 10392, !19, i64 10560, !19, i64 10561, !21, i64 10568}
!11 = !{!"_ZTS14McPATComponent", !12, i64 8, !6, i64 288, !17, i64 296, !21, i64 664, !14, i64 696, !24, i64 704, !28, i64 728, !29, i64 776, !29, i64 944, !15, i64 1112, !15, i64 1232}
!12 = !{!"_ZTS9Component", !13, i64 0, !15, i64 24, !15, i64 144, !14, i64 264, !14, i64 272}
!13 = !{!"_ZTS4Area", !14, i64 0, !14, i64 8, !14, i64 16}
!14 = !{!"double", !7, i64 0}
!15 = !{!"_ZTS8powerDef", !16, i64 0, !16, i64 40, !16, i64 80}
!16 = !{!"_ZTS15powerComponents", !14, i64 0, !14, i64 8, !14, i64 16, !14, i64 24, !14, i64 32}
!17 = !{!"_ZTS14InputParameter", !18, i64 0, !18, i64 4, !18, i64 8, !18, i64 12, !18, i64 16, !19, i64 20, !18, i64 24, !18, i64 28, !18, i64 32, !18, i64 36, !18, i64 40, !18, i64 44, !14, i64 48, !14, i64 56, !18, i64 64, !18, i64 68, !18, i64 72, !18, i64 76, !18, i64 80, !19, i64 84, !19, i64 85, !19, i64 86, !19, i64 87, !19, i64 88, !18, i64 92, !18, i64 96, !18, i64 100, !18, i64 104, !18, i64 108, !18, i64 112, !18, i64 116, !18, i64 120, !18, i64 124, !18, i64 128, !18, i64 132, !18, i64 136, !18, i64 140, !18, i64 144, !18, i64 148, !20, i64 152, !18, i64 156, !19, i64 160, !18, i64 164, !18, i64 168, !18, i64 172, !18, i64 176, !18, i64 180, !18, i64 184, !18, i64 188, !19, i64 192, !18, i64 196, !18, i64 200, !18, i64 204, !18, i64 208, !18, i64 212, !18, i64 216, !18, i64 220, !18, i64 224, !18, i64 228, !18, i64 232, !18, i64 236, !18, i64 240, !18, i64 244, !18, i64 248, !18, i64 252, !18, i64 256, !18, i64 260, !18, i64 264, !18, i64 268, !18, i64 272, !18, i64 276, !18, i64 280, !18, i64 284, !18, i64 288, !18, i64 292, !18, i64 296, !19, i64 300, !18, i64 304, !18, i64 308, !18, i64 312, !19, i64 316, !19, i64 317, !18, i64 320, !18, i64 324, !19, i64 328, !14, i64 336, !14, i64 344, !19, i64 352, !18, i64 356, !18, i64 360, !19, i64 364}
!18 = !{!"int", !7, i64 0}
!19 = !{!"bool", !7, i64 0}
!20 = !{!"_ZTS9Wire_type", !7, i64 0}
!21 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !22, i64 0, !23, i64 8, !7, i64 16}
!22 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!23 = !{!"long", !7, i64 0}
!24 = !{!"_ZTSSt6vectorIP14McPATComponentSaIS1_EE", !25, i64 0}
!25 = !{!"_ZTSSt12_Vector_baseIP14McPATComponentSaIS1_EE", !26, i64 0}
!26 = !{!"_ZTSNSt12_Vector_baseIP14McPATComponentSaIS1_EE12_Vector_implE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseIP14McPATComponentSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!28 = !{!"_ZTS11McPATOutput", !14, i64 0, !14, i64 8, !14, i64 16, !14, i64 24, !14, i64 32, !14, i64 40}
!29 = !{!"_ZTS8statsDef", !30, i64 0, !30, i64 24, !30, i64 48, !30, i64 72, !30, i64 96, !30, i64 120, !30, i64 144}
!30 = !{!"_ZTS15statsComponents", !14, i64 0, !14, i64 8, !14, i64 16}
!31 = !{!"_ZTS23OnChipNetworkParameters", !14, i64 0, !18, i64 8, !18, i64 12, !18, i64 16, !18, i64 20, !18, i64 24, !18, i64 28, !18, i64 32, !18, i64 36, !18, i64 40, !18, i64 44, !14, i64 48, !14, i64 56, !14, i64 64, !14, i64 72, !19, i64 80, !19, i64 81, !14, i64 88, !14, i64 96, !14, i64 104, !18, i64 112}
!32 = !{!"_ZTS23OnChipNetworkStatistics", !14, i64 0, !14, i64 8}
!33 = !{!"_ZTS9uca_org_t", !6, i64 0, !6, i64 8, !14, i64 16, !14, i64 24, !14, i64 32, !14, i64 40, !15, i64 48, !14, i64 168, !14, i64 176, !14, i64 184, !7, i64 192, !14, i64 296, !19, i64 304, !34, i64 312, !34, i64 4256}
!34 = !{!"_ZTS17results_mem_array", !18, i64 0, !18, i64 4, !14, i64 8, !18, i64 16, !18, i64 20, !18, i64 24, !18, i64 28, !18, i64 32, !18, i64 36, !14, i64 40, !14, i64 48, !14, i64 56, !14, i64 64, !14, i64 72, !14, i64 80, !14, i64 88, !14, i64 96, !14, i64 104, !14, i64 112, !14, i64 120, !14, i64 128, !14, i64 136, !14, i64 144, !14, i64 152, !14, i64 160, !14, i64 168, !14, i64 176, !14, i64 184, !14, i64 192, !14, i64 200, !14, i64 208, !14, i64 216, !14, i64 224, !14, i64 232, !14, i64 240, !14, i64 248, !14, i64 256, !14, i64 264, !15, i64 272, !15, i64 392, !15, i64 512, !15, i64 632, !15, i64 752, !15, i64 872, !15, i64 992, !15, i64 1112, !15, i64 1232, !15, i64 1352, !15, i64 1472, !15, i64 1592, !15, i64 1712, !15, i64 1832, !15, i64 1952, !15, i64 2072, !15, i64 2192, !15, i64 2312, !15, i64 2432, !15, i64 2552, !15, i64 2672, !15, i64 2792, !15, i64 2912, !15, i64 3032, !15, i64 3152, !15, i64 3272, !15, i64 3392, !15, i64 3512, !15, i64 3632, !14, i64 3752, !14, i64 3760, !14, i64 3768, !14, i64 3776, !14, i64 3784, !14, i64 3792, !14, i64 3800, !14, i64 3808, !14, i64 3816, !14, i64 3824, !14, i64 3832, !14, i64 3840, !14, i64 3848, !14, i64 3856, !14, i64 3864, !14, i64 3872, !14, i64 3880, !14, i64 3888, !14, i64 3896, !14, i64 3904, !14, i64 3912, !14, i64 3920, !14, i64 3928, !14, i64 3936}
!35 = !{!11, !14, i64 776}
!36 = !{!10, !19, i64 10561}
!37 = !{i8 0, i8 2}
!38 = !{}
!39 = !{!10, !6, i64 1352}
!40 = !{!10, !18, i64 2100}
!41 = !{!10, !19, i64 10560}
!42 = !{!10, !19, i64 2137}
!43 = !{!10, !18, i64 2076}
!44 = !{!10, !6, i64 1360}
!45 = !{!46, !14, i64 10264}
!46 = !{!"_ZTS12Interconnect", !11, i64 0, !47, i64 1352, !14, i64 1360, !14, i64 1368, !17, i64 1376, !33, i64 1744, !13, i64 9944, !14, i64 9968, !15, i64 9976, !14, i64 10096, !14, i64 10104, !14, i64 10112, !14, i64 10120, !18, i64 10128, !20, i64 10132, !14, i64 10136, !14, i64 10144, !18, i64 10152, !14, i64 10160, !14, i64 10168, !14, i64 10176, !14, i64 10184, !14, i64 10192, !19, i64 10200, !19, i64 10201, !14, i64 10208, !14, i64 10216, !19, i64 10224, !48, i64 10228, !19, i64 10232, !14, i64 10240, !18, i64 10248, !6, i64 10256, !49, i64 10264, !50, i64 10272}
!47 = !{!"_ZTS9Device_ty", !7, i64 0}
!48 = !{!"_ZTS9Core_type", !7, i64 0}
!49 = !{!"_ZTS22InterconnectParameters", !14, i64 0}
!50 = !{!"_ZTS22InterconnectStatistics", !14, i64 0, !14, i64 8}
!51 = !{!10, !14, i64 2144}
!52 = !{!46, !14, i64 10272}
!53 = !{!10, !14, i64 2184}
!54 = !{!11, !14, i64 944}
!55 = !{!56, !14, i64 864}
!56 = !{!"_ZTS6Router", !12, i64 0, !12, i64 280, !12, i64 560, !12, i64 840, !14, i64 1120, !14, i64 1128, !14, i64 1136, !14, i64 1144, !14, i64 1152, !6, i64 1160, !14, i64 1168, !20, i64 1176, !57, i64 1180, !14, i64 1184, !14, i64 1192, !14, i64 1200, !14, i64 1208, !14, i64 1216, !14, i64 1224, !14, i64 1232, !14, i64 1240, !14, i64 1248, !14, i64 1256, !14, i64 1264, !14, i64 1272, !14, i64 1280, !14, i64 1288, !14, i64 1296, !14, i64 1304, !14, i64 1312}
!57 = !{!"_ZTS14Wire_placement", !7, i64 0}
!58 = !{!56, !14, i64 904}
!59 = !{!56, !14, i64 984}
!60 = !{!56, !14, i64 584}
!61 = !{!56, !14, i64 704}
!62 = !{!56, !14, i64 304}
!63 = !{!56, !14, i64 424}
!64 = !{!46, !14, i64 10280}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.powerDef = type { %class.powerComponents, %class.powerComponents, %class.powerComponents }
%class.powerComponents = type { double, double, double, double, double }

@__const._ZN13OnChipNetwork13computeEnergyEv.pppm_t = external hidden unnamed_addr constant [4 x double], align 16
@_ZL8pppm_lkg = external hidden constant [4 x double], align 16

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN13OnChipNetwork13computeEnergyEv(ptr noundef nonnull align 8 dereferenceable(10600) %0) unnamed_addr #2 align 2 {
  %2 = alloca [4 x double], align 16
  %3 = alloca %class.powerDef, align 8
  %4 = alloca %class.powerDef, align 8
  %5 = alloca %class.powerDef, align 8
  %6 = alloca %class.powerDef, align 8
  %7 = alloca %class.powerDef, align 8
  %8 = alloca %class.powerDef, align 8
  %9 = alloca %class.powerDef, align 8
  call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %2) #5
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(32) %2, ptr noundef nonnull align 16 dereferenceable(32) @__const._ZN13OnChipNetwork13computeEnergyEv.pppm_t, i64 32, i1 false)
  %10 = getelementptr inbounds i8, ptr %0, i64 776
  tail call void @_ZN8statsDef5resetEv(ptr noundef nonnull align 8 dereferenceable(168) %10)
  %11 = getelementptr inbounds i8, ptr %0, i64 2176
  %12 = load double, ptr %11, align 8, !tbaa !5
  store double %12, ptr %10, align 8, !tbaa !34
  %13 = getelementptr inbounds i8, ptr %0, i64 10561
  %14 = load i8, ptr %13, align 1, !tbaa !35, !range !36, !noundef !37
  %15 = trunc nuw i8 %14 to i1
  br i1 %15, label %16, label %26

16:                                               ; preds = %1
  call void @_Z8set_pppmPddddd(ptr noundef nonnull %2, double noundef %12, double noundef 1.000000e+00, double noundef 1.000000e+00, double noundef 1.000000e+00)
  call void @llvm.lifetime.start.p0(i64 120, ptr nonnull %3) #5
  %17 = getelementptr inbounds i8, ptr %0, i64 1352
  %18 = load ptr, ptr %17, align 8, !tbaa !38
  %19 = getelementptr inbounds i8, ptr %18, i64 24
  call void @_ZmlRK8powerDefPKd(ptr dead_on_unwind nonnull writable sret(%class.powerDef) align 8 %3, ptr noundef nonnull align 8 dereferenceable(120) %19, ptr noundef nonnull %2)
  %20 = load ptr, ptr %17, align 8, !tbaa !38
  %21 = getelementptr inbounds i8, ptr %20, i64 24
  %22 = call noundef nonnull align 8 dereferenceable(120) ptr @_ZN8powerDefaSEOS_(ptr noundef nonnull align 8 dereferenceable(120) %21, ptr noundef nonnull align 8 dereferenceable(120) %3)
  call void @llvm.lifetime.end.p0(i64 120, ptr nonnull %3) #5
  %23 = getelementptr inbounds i8, ptr %0, i64 2100
  %24 = load i32, ptr %23, align 4, !tbaa !39
  %25 = sitofp i32 %24 to double
  call void @_Z8set_pppmPddddd(ptr noundef nonnull %2, double noundef %25, double noundef %25, double noundef %25, double noundef %25)
  br label %26

26:                                               ; preds = %16, %1
  %27 = getelementptr inbounds i8, ptr %0, i64 10560
  %28 = load i8, ptr %27, align 8, !tbaa !40, !range !36, !noundef !37
  %29 = trunc nuw i8 %28 to i1
  br i1 %29, label %30, label %48

30:                                               ; preds = %26
  %31 = getelementptr inbounds i8, ptr %0, i64 2137
  %32 = load i8, ptr %31, align 1, !tbaa !41, !range !36, !noundef !37
  %33 = zext nneg i8 %32 to i32
  %34 = getelementptr inbounds i8, ptr %0, i64 2076
  %35 = load i32, ptr %34, align 4, !tbaa !42
  %.sink4 = sub i32 %35, %33
  %36 = sitofp i32 %.sink4 to double
  %37 = getelementptr inbounds i8, ptr %0, i64 1360
  %38 = load ptr, ptr %37, align 8, !tbaa !43
  %39 = getelementptr inbounds i8, ptr %38, i64 10264
  store double %36, ptr %39, align 8, !tbaa !44
  %40 = getelementptr inbounds i8, ptr %0, i64 2144
  %41 = load double, ptr %40, align 8, !tbaa !50
  %42 = load double, ptr %11, align 8, !tbaa !5
  %43 = fmul double %41, %42
  %44 = getelementptr inbounds i8, ptr %38, i64 10272
  store double %43, ptr %44, align 8, !tbaa !51
  %45 = getelementptr inbounds i8, ptr %0, i64 2100
  %46 = load i32, ptr %45, align 4, !tbaa !39
  %47 = sitofp i32 %46 to double
  call void @_Z8set_pppmPddddd(ptr noundef nonnull %2, double noundef %47, double noundef %47, double noundef %47, double noundef %47)
  br label %48

48:                                               ; preds = %30, %26
  %49 = getelementptr inbounds i8, ptr %0, i64 944
  call void @_ZN8statsDef5resetEv(ptr noundef nonnull align 8 dereferenceable(168) %49)
  %50 = getelementptr inbounds i8, ptr %0, i64 2184
  %51 = load double, ptr %50, align 8, !tbaa !52
  store double %51, ptr %49, align 8, !tbaa !53
  call void @_Z8set_pppmPddddd(ptr noundef nonnull %2, double noundef 1.000000e+00, double noundef 0.000000e+00, double noundef 0.000000e+00, double noundef 0.000000e+00)
  %52 = load i8, ptr %13, align 1, !tbaa !35, !range !36, !noundef !37
  %53 = trunc nuw i8 %52 to i1
  br i1 %53, label %54, label %81

54:                                               ; preds = %48
  %55 = getelementptr inbounds i8, ptr %0, i64 1352
  %56 = load ptr, ptr %55, align 8, !tbaa !38
  %57 = getelementptr inbounds i8, ptr %56, i64 864
  %58 = load double, ptr %57, align 8, !tbaa !54
  %59 = getelementptr inbounds i8, ptr %56, i64 904
  %60 = load double, ptr %59, align 8, !tbaa !57
  %61 = fadd double %58, %60
  %62 = load double, ptr %49, align 8, !tbaa !53
  %63 = fmul double %61, %62
  %64 = getelementptr inbounds i8, ptr %56, i64 984
  store double %63, ptr %64, align 8, !tbaa !58
  %65 = getelementptr inbounds i8, ptr %56, i64 584
  %66 = load double, ptr %65, align 8, !tbaa !59
  %67 = fmul double %62, %66
  %68 = getelementptr inbounds i8, ptr %56, i64 704
  store double %67, ptr %68, align 8, !tbaa !60
  %69 = getelementptr inbounds i8, ptr %56, i64 304
  %70 = load double, ptr %69, align 8, !tbaa !61
  %71 = fmul double %62, %70
  %72 = getelementptr inbounds i8, ptr %56, i64 424
  store double %71, ptr %72, align 8, !tbaa !62
  call void @llvm.lifetime.start.p0(i64 120, ptr nonnull %4) #5
  call void @llvm.lifetime.start.p0(i64 120, ptr nonnull %5) #5
  %73 = getelementptr inbounds i8, ptr %56, i64 144
  call void @llvm.lifetime.start.p0(i64 120, ptr nonnull %6) #5
  call void @llvm.lifetime.start.p0(i64 120, ptr nonnull %7) #5
  call void @llvm.lifetime.start.p0(i64 120, ptr nonnull %8) #5
  call void @_ZplRK8powerDefS1_(ptr dead_on_unwind nonnull writable sret(%class.powerDef) align 8 %8, ptr noundef nonnull align 8 dereferenceable(120) %64, ptr noundef nonnull align 8 dereferenceable(120) %68)
  %74 = load ptr, ptr %55, align 8, !tbaa !38
  %75 = getelementptr inbounds i8, ptr %74, i64 424
  call void @_ZplRK8powerDefS1_(ptr dead_on_unwind nonnull writable sret(%class.powerDef) align 8 %7, ptr noundef nonnull align 8 dereferenceable(120) %8, ptr noundef nonnull align 8 dereferenceable(120) %75)
  call void @_ZmlRK8powerDefPKd(ptr dead_on_unwind nonnull writable sret(%class.powerDef) align 8 %6, ptr noundef nonnull align 8 dereferenceable(120) %7, ptr noundef nonnull %2)
  call void @_ZplRK8powerDefS1_(ptr dead_on_unwind nonnull writable sret(%class.powerDef) align 8 %5, ptr noundef nonnull align 8 dereferenceable(120) %73, ptr noundef nonnull align 8 dereferenceable(120) %6)
  call void @llvm.lifetime.start.p0(i64 120, ptr nonnull %9) #5
  %76 = load ptr, ptr %55, align 8, !tbaa !38
  %77 = getelementptr inbounds i8, ptr %76, i64 24
  call void @_ZmlRK8powerDefPKd(ptr dead_on_unwind nonnull writable sret(%class.powerDef) align 8 %9, ptr noundef nonnull align 8 dereferenceable(120) %77, ptr noundef nonnull @_ZL8pppm_lkg)
  call void @_ZplRK8powerDefS1_(ptr dead_on_unwind nonnull writable sret(%class.powerDef) align 8 %4, ptr noundef nonnull align 8 dereferenceable(120) %5, ptr noundef nonnull align 8 dereferenceable(120) %9)
  %78 = load ptr, ptr %55, align 8, !tbaa !38
  %79 = getelementptr inbounds i8, ptr %78, i64 144
  %80 = call noundef nonnull align 8 dereferenceable(120) ptr @_ZN8powerDefaSEOS_(ptr noundef nonnull align 8 dereferenceable(120) %79, ptr noundef nonnull align 8 dereferenceable(120) %4)
  call void @llvm.lifetime.end.p0(i64 120, ptr nonnull %9) #5
  call void @llvm.lifetime.end.p0(i64 120, ptr nonnull %8) #5
  call void @llvm.lifetime.end.p0(i64 120, ptr nonnull %7) #5
  call void @llvm.lifetime.end.p0(i64 120, ptr nonnull %6) #5
  call void @llvm.lifetime.end.p0(i64 120, ptr nonnull %5) #5
  call void @llvm.lifetime.end.p0(i64 120, ptr nonnull %4) #5
  br label %81

81:                                               ; preds = %54, %48
  %82 = load i8, ptr %27, align 8, !tbaa !40, !range !36, !noundef !37
  %83 = trunc nuw i8 %82 to i1
  br i1 %83, label %84, label %89

84:                                               ; preds = %81
  %85 = load double, ptr %50, align 8, !tbaa !52
  %86 = getelementptr inbounds i8, ptr %0, i64 1360
  %87 = load ptr, ptr %86, align 8, !tbaa !43
  %88 = getelementptr inbounds i8, ptr %87, i64 10280
  store double %85, ptr %88, align 8, !tbaa !63
  br label %89

89:                                               ; preds = %84, %81
  call void @_ZN14McPATComponent13computeEnergyEv(ptr noundef nonnull align 8 dereferenceable(1352) %0)
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %2) #5
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN8statsDef5resetEv(ptr noundef nonnull align 8 dereferenceable(168)) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_Z8set_pppmPddddd(ptr noundef, double noundef, double noundef, double noundef, double noundef) local_unnamed_addr #3

declare void @_ZmlRK8powerDefPKd(ptr dead_on_unwind writable sret(%class.powerDef) align 8, ptr noundef nonnull align 8 dereferenceable(120), ptr noundef) local_unnamed_addr #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(120) ptr @_ZN8powerDefaSEOS_(ptr noundef nonnull align 8 dereferenceable(120), ptr noundef nonnull align 8 dereferenceable(120)) local_unnamed_addr #3 align 2

declare void @_ZplRK8powerDefS1_(ptr dead_on_unwind writable sret(%class.powerDef) align 8, ptr noundef nonnull align 8 dereferenceable(120), ptr noundef nonnull align 8 dereferenceable(120)) local_unnamed_addr #4

declare void @_ZN14McPATComponent13computeEnergyEv(ptr noundef nonnull align 8 dereferenceable(1352)) unnamed_addr #4

attributes #0 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 2176}
!6 = !{!"_ZTS13OnChipNetwork", !7, i64 0, !15, i64 1352, !15, i64 1360, !8, i64 1368, !17, i64 1648, !16, i64 1656, !10, i64 2024, !10, i64 2032, !10, i64 2040, !10, i64 2048, !30, i64 2056, !31, i64 2176, !32, i64 2192, !28, i64 10392, !18, i64 10560, !18, i64 10561, !20, i64 10568}
!7 = !{!"_ZTS14McPATComponent", !8, i64 8, !15, i64 288, !16, i64 296, !20, i64 664, !10, i64 696, !23, i64 704, !27, i64 728, !28, i64 776, !28, i64 944, !13, i64 1112, !13, i64 1232}
!8 = !{!"_ZTS9Component", !9, i64 0, !13, i64 24, !13, i64 144, !10, i64 264, !10, i64 272}
!9 = !{!"_ZTS4Area", !10, i64 0, !10, i64 8, !10, i64 16}
!10 = !{!"double", !11, i64 0}
!11 = !{!"omnipotent char", !12, i64 0}
!12 = !{!"Simple C++ TBAA"}
!13 = !{!"_ZTS8powerDef", !14, i64 0, !14, i64 40, !14, i64 80}
!14 = !{!"_ZTS15powerComponents", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32}
!15 = !{!"any pointer", !11, i64 0}
!16 = !{!"_ZTS14InputParameter", !17, i64 0, !17, i64 4, !17, i64 8, !17, i64 12, !17, i64 16, !18, i64 20, !17, i64 24, !17, i64 28, !17, i64 32, !17, i64 36, !17, i64 40, !17, i64 44, !10, i64 48, !10, i64 56, !17, i64 64, !17, i64 68, !17, i64 72, !17, i64 76, !17, i64 80, !18, i64 84, !18, i64 85, !18, i64 86, !18, i64 87, !18, i64 88, !17, i64 92, !17, i64 96, !17, i64 100, !17, i64 104, !17, i64 108, !17, i64 112, !17, i64 116, !17, i64 120, !17, i64 124, !17, i64 128, !17, i64 132, !17, i64 136, !17, i64 140, !17, i64 144, !17, i64 148, !19, i64 152, !17, i64 156, !18, i64 160, !17, i64 164, !17, i64 168, !17, i64 172, !17, i64 176, !17, i64 180, !17, i64 184, !17, i64 188, !18, i64 192, !17, i64 196, !17, i64 200, !17, i64 204, !17, i64 208, !17, i64 212, !17, i64 216, !17, i64 220, !17, i64 224, !17, i64 228, !17, i64 232, !17, i64 236, !17, i64 240, !17, i64 244, !17, i64 248, !17, i64 252, !17, i64 256, !17, i64 260, !17, i64 264, !17, i64 268, !17, i64 272, !17, i64 276, !17, i64 280, !17, i64 284, !17, i64 288, !17, i64 292, !17, i64 296, !18, i64 300, !17, i64 304, !17, i64 308, !17, i64 312, !18, i64 316, !18, i64 317, !17, i64 320, !17, i64 324, !18, i64 328, !10, i64 336, !10, i64 344, !18, i64 352, !17, i64 356, !17, i64 360, !18, i64 364}
!17 = !{!"int", !11, i64 0}
!18 = !{!"bool", !11, i64 0}
!19 = !{!"_ZTS9Wire_type", !11, i64 0}
!20 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !21, i64 0, !22, i64 8, !11, i64 16}
!21 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !15, i64 0}
!22 = !{!"long", !11, i64 0}
!23 = !{!"_ZTSSt6vectorIP14McPATComponentSaIS1_EE", !24, i64 0}
!24 = !{!"_ZTSSt12_Vector_baseIP14McPATComponentSaIS1_EE", !25, i64 0}
!25 = !{!"_ZTSNSt12_Vector_baseIP14McPATComponentSaIS1_EE12_Vector_implE", !26, i64 0}
!26 = !{!"_ZTSNSt12_Vector_baseIP14McPATComponentSaIS1_EE17_Vector_impl_dataE", !15, i64 0, !15, i64 8, !15, i64 16}
!27 = !{!"_ZTS11McPATOutput", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40}
!28 = !{!"_ZTS8statsDef", !29, i64 0, !29, i64 24, !29, i64 48, !29, i64 72, !29, i64 96, !29, i64 120, !29, i64 144}
!29 = !{!"_ZTS15statsComponents", !10, i64 0, !10, i64 8, !10, i64 16}
!30 = !{!"_ZTS23OnChipNetworkParameters", !10, i64 0, !17, i64 8, !17, i64 12, !17, i64 16, !17, i64 20, !17, i64 24, !17, i64 28, !17, i64 32, !17, i64 36, !17, i64 40, !17, i64 44, !10, i64 48, !10, i64 56, !10, i64 64, !10, i64 72, !18, i64 80, !18, i64 81, !10, i64 88, !10, i64 96, !10, i64 104, !17, i64 112}
!31 = !{!"_ZTS23OnChipNetworkStatistics", !10, i64 0, !10, i64 8}
!32 = !{!"_ZTS9uca_org_t", !15, i64 0, !15, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40, !13, i64 48, !10, i64 168, !10, i64 176, !10, i64 184, !11, i64 192, !10, i64 296, !18, i64 304, !33, i64 312, !33, i64 4256}
!33 = !{!"_ZTS17results_mem_array", !17, i64 0, !17, i64 4, !10, i64 8, !17, i64 16, !17, i64 20, !17, i64 24, !17, i64 28, !17, i64 32, !17, i64 36, !10, i64 40, !10, i64 48, !10, i64 56, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !10, i64 144, !10, i64 152, !10, i64 160, !10, i64 168, !10, i64 176, !10, i64 184, !10, i64 192, !10, i64 200, !10, i64 208, !10, i64 216, !10, i64 224, !10, i64 232, !10, i64 240, !10, i64 248, !10, i64 256, !10, i64 264, !13, i64 272, !13, i64 392, !13, i64 512, !13, i64 632, !13, i64 752, !13, i64 872, !13, i64 992, !13, i64 1112, !13, i64 1232, !13, i64 1352, !13, i64 1472, !13, i64 1592, !13, i64 1712, !13, i64 1832, !13, i64 1952, !13, i64 2072, !13, i64 2192, !13, i64 2312, !13, i64 2432, !13, i64 2552, !13, i64 2672, !13, i64 2792, !13, i64 2912, !13, i64 3032, !13, i64 3152, !13, i64 3272, !13, i64 3392, !13, i64 3512, !13, i64 3632, !10, i64 3752, !10, i64 3760, !10, i64 3768, !10, i64 3776, !10, i64 3784, !10, i64 3792, !10, i64 3800, !10, i64 3808, !10, i64 3816, !10, i64 3824, !10, i64 3832, !10, i64 3840, !10, i64 3848, !10, i64 3856, !10, i64 3864, !10, i64 3872, !10, i64 3880, !10, i64 3888, !10, i64 3896, !10, i64 3904, !10, i64 3912, !10, i64 3920, !10, i64 3928, !10, i64 3936}
!34 = !{!7, !10, i64 776}
!35 = !{!6, !18, i64 10561}
!36 = !{i8 0, i8 2}
!37 = !{}
!38 = !{!6, !15, i64 1352}
!39 = !{!6, !17, i64 2100}
!40 = !{!6, !18, i64 10560}
!41 = !{!6, !18, i64 2137}
!42 = !{!6, !17, i64 2076}
!43 = !{!6, !15, i64 1360}
!44 = !{!45, !10, i64 10264}
!45 = !{!"_ZTS12Interconnect", !7, i64 0, !46, i64 1352, !10, i64 1360, !10, i64 1368, !16, i64 1376, !32, i64 1744, !9, i64 9944, !10, i64 9968, !13, i64 9976, !10, i64 10096, !10, i64 10104, !10, i64 10112, !10, i64 10120, !17, i64 10128, !19, i64 10132, !10, i64 10136, !10, i64 10144, !17, i64 10152, !10, i64 10160, !10, i64 10168, !10, i64 10176, !10, i64 10184, !10, i64 10192, !18, i64 10200, !18, i64 10201, !10, i64 10208, !10, i64 10216, !18, i64 10224, !47, i64 10228, !18, i64 10232, !10, i64 10240, !17, i64 10248, !15, i64 10256, !48, i64 10264, !49, i64 10272}
!46 = !{!"_ZTS9Device_ty", !11, i64 0}
!47 = !{!"_ZTS9Core_type", !11, i64 0}
!48 = !{!"_ZTS22InterconnectParameters", !10, i64 0}
!49 = !{!"_ZTS22InterconnectStatistics", !10, i64 0, !10, i64 8}
!50 = !{!6, !10, i64 2144}
!51 = !{!45, !10, i64 10272}
!52 = !{!6, !10, i64 2184}
!53 = !{!7, !10, i64 944}
!54 = !{!55, !10, i64 864}
!55 = !{!"_ZTS6Router", !8, i64 0, !8, i64 280, !8, i64 560, !8, i64 840, !10, i64 1120, !10, i64 1128, !10, i64 1136, !10, i64 1144, !10, i64 1152, !15, i64 1160, !10, i64 1168, !19, i64 1176, !56, i64 1180, !10, i64 1184, !10, i64 1192, !10, i64 1200, !10, i64 1208, !10, i64 1216, !10, i64 1224, !10, i64 1232, !10, i64 1240, !10, i64 1248, !10, i64 1256, !10, i64 1264, !10, i64 1272, !10, i64 1280, !10, i64 1288, !10, i64 1296, !10, i64 1304, !10, i64 1312}
!56 = !{!"_ZTS14Wire_placement", !11, i64 0}
!57 = !{!55, !10, i64 904}
!58 = !{!55, !10, i64 984}
!59 = !{!55, !10, i64 584}
!60 = !{!55, !10, i64 704}
!61 = !{!55, !10, i64 304}
!62 = !{!55, !10, i64 424}
!63 = !{!45, !10, i64 10280}


; Effective O3 passes: BDCEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass