; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/utils (sc_hash)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_core::sc_phash_base" = type { ptr, i32, i32, i32, i32, double, ptr, ptr, ptr }
%"class.sc_core::sc_phash_elem" = type { ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef ptr @_ZN7sc_core13sc_phash_base12find_entry_cEjPKvPPPNS_13sc_phash_elemE(ptr noundef nonnull align 8 dereferenceable(56) %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) #1 align 2 {
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store ptr %2, ptr %7, align 8, !tbaa !5
  store ptr %3, ptr %8, align 8, !tbaa !5
  %11 = load ptr, ptr %5, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #2
  %12 = getelementptr inbounds %"class.sc_core::sc_phash_base", ptr %11, i32 0, i32 6
  %13 = load ptr, ptr %12, align 8, !tbaa !11
  %14 = load i32, ptr %6, align 4, !tbaa !9
  %15 = zext i32 %14 to i64
  %16 = getelementptr inbounds ptr, ptr %13, i64 %15
  store ptr %16, ptr %9, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #2
  %17 = load ptr, ptr %9, align 8, !tbaa !5
  %18 = load ptr, ptr %17, align 8, !tbaa !5
  store ptr %18, ptr %10, align 8, !tbaa !5
  br label %19

19:                                               ; preds = %33, %4
  %20 = load ptr, ptr %10, align 8, !tbaa !5
  %21 = icmp ne ptr %20, null
  br i1 %21, label %22, label %31

22:                                               ; preds = %19
  %23 = getelementptr inbounds %"class.sc_core::sc_phash_base", ptr %11, i32 0, i32 8
  %24 = load ptr, ptr %23, align 8, !tbaa !14
  %25 = load ptr, ptr %10, align 8, !tbaa !5
  %26 = getelementptr inbounds %"class.sc_core::sc_phash_elem", ptr %25, i32 0, i32 0
  %27 = load ptr, ptr %26, align 8, !tbaa !15
  %28 = load ptr, ptr %7, align 8, !tbaa !5
  %29 = call noundef i32 %24(ptr noundef %27, ptr noundef %28)
  %30 = icmp ne i32 %29, 0
  br label %31

31:                                               ; preds = %22, %19
  %32 = phi i1 [ false, %19 ], [ %30, %22 ]
  br i1 %32, label %33, label %38

33:                                               ; preds = %31
  %34 = load ptr, ptr %10, align 8, !tbaa !5
  %35 = getelementptr inbounds %"class.sc_core::sc_phash_elem", ptr %34, i32 0, i32 2
  store ptr %35, ptr %9, align 8, !tbaa !5
  %36 = load ptr, ptr %9, align 8, !tbaa !5
  %37 = load ptr, ptr %36, align 8, !tbaa !5
  store ptr %37, ptr %10, align 8, !tbaa !5
  br label %19, !llvm.loop !17

38:                                               ; preds = %31
  %39 = load ptr, ptr %10, align 8, !tbaa !5
  %40 = icmp ne ptr %39, null
  br i1 %40, label %41, label %69

41:                                               ; preds = %38
  %42 = getelementptr inbounds %"class.sc_core::sc_phash_base", ptr %11, i32 0, i32 4
  %43 = load i32, ptr %42, align 4, !tbaa !19
  %44 = icmp ne i32 %43, 0
  br i1 %44, label %45, label %69

45:                                               ; preds = %41
  %46 = load ptr, ptr %10, align 8, !tbaa !5
  %47 = getelementptr inbounds %"class.sc_core::sc_phash_elem", ptr %46, i32 0, i32 2
  %48 = load ptr, ptr %47, align 8, !tbaa !20
  %49 = load ptr, ptr %9, align 8, !tbaa !5
  store ptr %48, ptr %49, align 8, !tbaa !5
  %50 = getelementptr inbounds %"class.sc_core::sc_phash_base", ptr %11, i32 0, i32 6
  %51 = load ptr, ptr %50, align 8, !tbaa !11
  %52 = load i32, ptr %6, align 4, !tbaa !9
  %53 = zext i32 %52 to i64
  %54 = getelementptr inbounds ptr, ptr %51, i64 %53
  %55 = load ptr, ptr %54, align 8, !tbaa !5
  %56 = load ptr, ptr %10, align 8, !tbaa !5
  %57 = getelementptr inbounds %"class.sc_core::sc_phash_elem", ptr %56, i32 0, i32 2
  store ptr %55, ptr %57, align 8, !tbaa !20
  %58 = load ptr, ptr %10, align 8, !tbaa !5
  %59 = getelementptr inbounds %"class.sc_core::sc_phash_base", ptr %11, i32 0, i32 6
  %60 = load ptr, ptr %59, align 8, !tbaa !11
  %61 = load i32, ptr %6, align 4, !tbaa !9
  %62 = zext i32 %61 to i64
  %63 = getelementptr inbounds ptr, ptr %60, i64 %62
  store ptr %58, ptr %63, align 8, !tbaa !5
  %64 = getelementptr inbounds %"class.sc_core::sc_phash_base", ptr %11, i32 0, i32 6
  %65 = load ptr, ptr %64, align 8, !tbaa !11
  %66 = load i32, ptr %6, align 4, !tbaa !9
  %67 = zext i32 %66 to i64
  %68 = getelementptr inbounds ptr, ptr %65, i64 %67
  store ptr %68, ptr %9, align 8, !tbaa !5
  br label %69

69:                                               ; preds = %45, %41, %38
  %70 = load ptr, ptr %8, align 8, !tbaa !5
  %71 = icmp ne ptr %70, null
  br i1 %71, label %72, label %75

72:                                               ; preds = %69
  %73 = load ptr, ptr %9, align 8, !tbaa !5
  %74 = load ptr, ptr %8, align 8, !tbaa !5
  store ptr %73, ptr %74, align 8, !tbaa !5
  br label %75

75:                                               ; preds = %72, %69
  %76 = load ptr, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #2
  ret ptr %76
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 32}
!12 = !{!"_ZTSN7sc_core13sc_phash_baseE", !6, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !13, i64 24, !6, i64 32, !6, i64 40, !6, i64 48}
!13 = !{!"double", !7, i64 0}
!14 = !{!12, !6, i64 48}
!15 = !{!16, !6, i64 0}
!16 = !{!"_ZTSN7sc_core13sc_phash_elemE", !6, i64 0, !6, i64 8, !6, i64 16}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = !{!12, !10, i64 20}
!20 = !{!16, !6, i64 16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef ptr @_ZN7sc_core13sc_phash_base12find_entry_cEjPKvPPPNS_13sc_phash_elemE(ptr nocapture noundef nonnull readonly align 8 dereferenceable(56) %0, i32 noundef %1, ptr noundef %2, ptr noundef writeonly %3) local_unnamed_addr #0 align 2 {
  %5 = getelementptr inbounds i8, ptr %0, i64 32
  %6 = load ptr, ptr %5, align 8, !tbaa !5
  %7 = zext i32 %1 to i64
  %8 = getelementptr inbounds ptr, ptr %6, i64 %7
  %.029 = load ptr, ptr %8, align 8, !tbaa !12
  %.not30 = icmp eq ptr %.029, null
  br i1 %.not30, label %.critedge24, label %.lr.ph

.lr.ph:                                           ; preds = %4
  %9 = getelementptr inbounds i8, ptr %0, i64 48
  %10 = load ptr, ptr %9, align 8, !tbaa !13
  %11 = load ptr, ptr %.029, align 8, !tbaa !14
  %12 = tail call noundef i32 %10(ptr noundef %11, ptr noundef %2)
  %.not2140 = icmp eq i32 %12, 0
  br i1 %.not2140, label %.critedge, label %.lr.ph42

13:                                               ; preds = %.lr.ph42
  %14 = load ptr, ptr %9, align 8, !tbaa !13
  %15 = load ptr, ptr %.0, align 8, !tbaa !14
  %16 = tail call noundef i32 %14(ptr noundef %15, ptr noundef %2)
  %.not21 = icmp eq i32 %16, 0
  br i1 %.not21, label %.critedge.loopexit, label %.lr.ph42, !llvm.loop !16

.lr.ph42:                                         ; preds = %.lr.ph, %13
  %.03241 = phi ptr [ %.0, %13 ], [ %.029, %.lr.ph ]
  %17 = getelementptr inbounds i8, ptr %.03241, i64 16
  %.0 = load ptr, ptr %17, align 8, !tbaa !12
  %.not = icmp eq ptr %.0, null
  br i1 %.not, label %.critedge24.loopexit, label %13, !llvm.loop !16

.critedge.loopexit:                               ; preds = %13
  %18 = getelementptr inbounds i8, ptr %.03241, i64 16
  br label %.critedge

.critedge:                                        ; preds = %.critedge.loopexit, %.lr.ph
  %.032.lcssa = phi ptr [ %.029, %.lr.ph ], [ %.0, %.critedge.loopexit ]
  %.01931.lcssa = phi ptr [ %8, %.lr.ph ], [ %18, %.critedge.loopexit ]
  %19 = getelementptr inbounds i8, ptr %0, i64 20
  %20 = load i32, ptr %19, align 4
  %.not22 = icmp eq i32 %20, 0
  br i1 %.not22, label %.critedge24, label %21

21:                                               ; preds = %.critedge
  %22 = getelementptr inbounds i8, ptr %.032.lcssa, i64 16
  %23 = load ptr, ptr %22, align 8, !tbaa !18
  store ptr %23, ptr %.01931.lcssa, align 8, !tbaa !12
  %24 = load ptr, ptr %5, align 8, !tbaa !5
  %25 = getelementptr inbounds ptr, ptr %24, i64 %7
  %26 = load ptr, ptr %25, align 8, !tbaa !12
  store ptr %26, ptr %22, align 8, !tbaa !18
  store ptr %.032.lcssa, ptr %25, align 8, !tbaa !12
  %27 = load ptr, ptr %5, align 8, !tbaa !5
  %28 = getelementptr inbounds ptr, ptr %27, i64 %7
  br label %.critedge24

.critedge24.loopexit:                             ; preds = %.lr.ph42
  %29 = getelementptr inbounds i8, ptr %.03241, i64 16
  br label %.critedge24

.critedge24:                                      ; preds = %.critedge24.loopexit, %4, %21, %.critedge
  %.027 = phi ptr [ %.032.lcssa, %21 ], [ %.032.lcssa, %.critedge ], [ null, %4 ], [ null, %.critedge24.loopexit ]
  %.1 = phi ptr [ %28, %21 ], [ %.01931.lcssa, %.critedge ], [ %8, %4 ], [ %29, %.critedge24.loopexit ]
  %.not23 = icmp eq ptr %3, null
  br i1 %.not23, label %31, label %30

30:                                               ; preds = %.critedge24
  store ptr %.1, ptr %3, align 8, !tbaa !12
  br label %31

31:                                               ; preds = %30, %.critedge24
  ret ptr %.027
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 32}
!6 = !{!"_ZTSN7sc_core13sc_phash_baseE", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !11, i64 24, !7, i64 32, !7, i64 40, !7, i64 48}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"double", !8, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!6, !7, i64 48}
!14 = !{!15, !7, i64 0}
!15 = !{!"_ZTSN7sc_core13sc_phash_elemE", !7, i64 0, !7, i64 8, !7, i64 16}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = !{!15, !7, i64 16}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass