; LLVM IR from JanaSabuj/cppdump :: SegmentTree.ll (Z5buildxxx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@tree = external dso_local global %"class.std::vector", align 8
@arr = external dso_local global %"class.std::vector", align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5buildxxx(i64 noundef %0, i64 noundef %1, i64 noundef %2) #1 {
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  store i64 %0, ptr %4, align 8, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !5
  store i64 %2, ptr %6, align 8, !tbaa !5
  %8 = load i64, ptr %4, align 8, !tbaa !5
  %9 = load i64, ptr %5, align 8, !tbaa !5
  %10 = icmp eq i64 %8, %9
  br i1 %10, label %11, label %17

11:                                               ; preds = %3
  %12 = load i64, ptr %4, align 8, !tbaa !5
  %13 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @arr, i64 noundef %12) #3
  %14 = load i64, ptr %13, align 8, !tbaa !5
  %15 = load i64, ptr %6, align 8, !tbaa !5
  %16 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @tree, i64 noundef %15) #3
  store i64 %14, ptr %16, align 8, !tbaa !5
  br label %44

17:                                               ; preds = %3
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  %18 = load i64, ptr %4, align 8, !tbaa !5
  %19 = load i64, ptr %5, align 8, !tbaa !5
  %20 = add nsw i64 %18, %19
  %21 = sdiv i64 %20, 2
  store i64 %21, ptr %7, align 8, !tbaa !5
  %22 = load i64, ptr %4, align 8, !tbaa !5
  %23 = load i64, ptr %7, align 8, !tbaa !5
  %24 = load i64, ptr %6, align 8, !tbaa !5
  %25 = mul nsw i64 2, %24
  call void @_Z5buildxxx(i64 noundef %22, i64 noundef %23, i64 noundef %25)
  %26 = load i64, ptr %7, align 8, !tbaa !5
  %27 = add nsw i64 %26, 1
  %28 = load i64, ptr %5, align 8, !tbaa !5
  %29 = load i64, ptr %6, align 8, !tbaa !5
  %30 = mul nsw i64 2, %29
  %31 = add nsw i64 %30, 1
  call void @_Z5buildxxx(i64 noundef %27, i64 noundef %28, i64 noundef %31)
  %32 = load i64, ptr %6, align 8, !tbaa !5
  %33 = mul nsw i64 2, %32
  %34 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @tree, i64 noundef %33) #3
  %35 = load i64, ptr %34, align 8, !tbaa !5
  %36 = load i64, ptr %6, align 8, !tbaa !5
  %37 = mul nsw i64 2, %36
  %38 = add nsw i64 %37, 1
  %39 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @tree, i64 noundef %38) #3
  %40 = load i64, ptr %39, align 8, !tbaa !5
  %41 = add nsw i64 %35, %40
  %42 = load i64, ptr %6, align 8, !tbaa !5
  %43 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @tree, i64 noundef %42) #3
  store i64 %41, ptr %43, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  br label %44

44:                                               ; preds = %17, %11
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@tree = external dso_local global %"class.std::vector", align 8
@arr = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z5buildxxx(i64 noundef %0, i64 noundef %1, i64 noundef %2) local_unnamed_addr #0 {
  %4 = icmp eq i64 %0, %1
  br i1 %4, label %5, label %9

5:                                                ; preds = %3
  %6 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @arr, i64 noundef %0) #1
  %7 = load i64, ptr %6, align 8, !tbaa !5
  br label %common.ret

common.ret:                                       ; preds = %5, %9
  %.sink = phi i64 [ %7, %5 ], [ %19, %9 ]
  %8 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @tree, i64 noundef %2) #1
  store i64 %.sink, ptr %8, align 8, !tbaa !5
  ret void

9:                                                ; preds = %3
  %10 = add nsw i64 %1, %0
  %11 = sdiv i64 %10, 2
  %12 = shl nsw i64 %2, 1
  tail call void @_Z5buildxxx(i64 noundef %0, i64 noundef %11, i64 noundef %12)
  %13 = add nsw i64 %11, 1
  %14 = or disjoint i64 %12, 1
  tail call void @_Z5buildxxx(i64 noundef %13, i64 noundef %1, i64 noundef %14)
  %15 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @tree, i64 noundef %12) #1
  %16 = load i64, ptr %15, align 8, !tbaa !5
  %17 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @tree, i64 noundef %14) #1
  %18 = load i64, ptr %17, align 8, !tbaa !5
  %19 = add nsw i64 %18, %16
  br label %common.ret
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass