; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/datatypes/int (sc_int_base)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::sc_int_base" = type { %"class.sc_dt::sc_value_base", i64, i32, i32 }
%"class.sc_dt::sc_value_base" = type { ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt11sc_int_base11extend_signEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt11sc_int_baseaSERKNS_10sc_bv_baseE(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1) #2 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %8 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  %9 = getelementptr inbounds %"class.sc_dt::sc_int_base", ptr %8, i32 0, i32 2
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  %10 = load ptr, ptr %4, align 8, !tbaa !5
  %11 = call noundef i32 @_ZNK5sc_dt10sc_bv_base6lengthEv(ptr noundef nonnull align 8 dereferenceable(24) %10)
  store i32 %11, ptr %6, align 4, !tbaa !9
  %12 = call noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %9, ptr noundef nonnull align 4 dereferenceable(4) %6)
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  store i32 %12, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  store i32 0, ptr %7, align 4, !tbaa !9
  br label %13

13:                                               ; preds = %23, %2
  %14 = load i32, ptr %7, align 4, !tbaa !9
  %15 = load i32, ptr %5, align 4, !tbaa !9
  %16 = icmp slt i32 %14, %15
  br i1 %16, label %17, label %26

17:                                               ; preds = %13
  %18 = load i32, ptr %7, align 4, !tbaa !9
  %19 = load ptr, ptr %4, align 8, !tbaa !5
  %20 = load i32, ptr %7, align 4, !tbaa !9
  %21 = call noundef i32 @_ZNK5sc_dt10sc_bv_base7get_bitEi(ptr noundef nonnull align 8 dereferenceable(24) %19, i32 noundef %20)
  %22 = icmp ne i32 %21, 0
  call void @_ZN5sc_dt11sc_int_base3setEib(ptr noundef nonnull align 8 dereferenceable(24) %8, i32 noundef %18, i1 noundef zeroext %22)
  br label %23

23:                                               ; preds = %17
  %24 = load i32, ptr %7, align 4, !tbaa !9
  %25 = add nsw i32 %24, 1
  store i32 %25, ptr %7, align 4, !tbaa !9
  br label %13, !llvm.loop !11

26:                                               ; preds = %13
  br label %27

27:                                               ; preds = %34, %26
  %28 = load i32, ptr %7, align 4, !tbaa !9
  %29 = getelementptr inbounds %"class.sc_dt::sc_int_base", ptr %8, i32 0, i32 2
  %30 = load i32, ptr %29, align 8, !tbaa !13
  %31 = icmp slt i32 %28, %30
  br i1 %31, label %32, label %37

32:                                               ; preds = %27
  %33 = load i32, ptr %7, align 4, !tbaa !9
  call void @_ZN5sc_dt11sc_int_base3setEib(ptr noundef nonnull align 8 dereferenceable(24) %8, i32 noundef %33, i1 noundef zeroext false)
  br label %34

34:                                               ; preds = %32
  %35 = load i32, ptr %7, align 4, !tbaa !9
  %36 = add nsw i32 %35, 1
  store i32 %36, ptr %7, align 4, !tbaa !9
  br label %27, !llvm.loop !17

37:                                               ; preds = %27
  call void @_ZN5sc_dt11sc_int_base11extend_signEv(ptr noundef nonnull align 8 dereferenceable(24) %8)
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  ret ptr %8
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt10sc_bv_base6lengthEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt11sc_int_base3setEib(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef, i1 noundef zeroext) #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt10sc_bv_base7get_bitEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) #3 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!14, !10, i64 16}
!14 = !{!"_ZTSN5sc_dt11sc_int_baseE", !15, i64 0, !16, i64 8, !10, i64 16, !10, i64 20}
!15 = !{!"_ZTSN5sc_dt13sc_value_baseE"}
!16 = !{!"long long", !7, i64 0}
!17 = distinct !{!17, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt11sc_int_base11extend_signEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt11sc_int_baseaSERKNS_10sc_bv_baseE(ptr noundef nonnull returned align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1) local_unnamed_addr #1 align 2 {
  %3 = alloca i32, align 4
  %4 = getelementptr inbounds i8, ptr %0, i64 16
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
  %5 = tail call noundef i32 @_ZNK5sc_dt10sc_bv_base6lengthEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  store i32 %5, ptr %3, align 4, !tbaa !5
  %6 = call noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %4, ptr noundef nonnull align 4 dereferenceable(4) %3)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
  %7 = icmp sgt i32 %6, 0
  br i1 %7, label %.lr.ph, label %.preheader

.preheader:                                       ; preds = %.lr.ph, %2
  %.0.lcssa = phi i32 [ 0, %2 ], [ %6, %.lr.ph ]
  %8 = load i32, ptr %4, align 8, !tbaa !9
  %9 = icmp slt i32 %.0.lcssa, %8
  br i1 %9, label %.lr.ph12, label %._crit_edge

.lr.ph:                                           ; preds = %2, %.lr.ph
  %.010 = phi i32 [ %12, %.lr.ph ], [ 0, %2 ]
  %10 = call noundef i32 @_ZNK5sc_dt10sc_bv_base7get_bitEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %.010)
  %11 = icmp ne i32 %10, 0
  call void @_ZN5sc_dt11sc_int_base3setEib(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %.010, i1 noundef zeroext %11)
  %12 = add nuw nsw i32 %.010, 1
  %exitcond.not = icmp eq i32 %12, %6
  br i1 %exitcond.not, label %.preheader, label %.lr.ph, !llvm.loop !13

.lr.ph12:                                         ; preds = %.preheader, %.lr.ph12
  %.111 = phi i32 [ %13, %.lr.ph12 ], [ %.0.lcssa, %.preheader ]
  call void @_ZN5sc_dt11sc_int_base3setEib(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %.111, i1 noundef zeroext false)
  %13 = add nuw nsw i32 %.111, 1
  %14 = load i32, ptr %4, align 8, !tbaa !9
  %15 = icmp slt i32 %13, %14
  br i1 %15, label %.lr.ph12, label %._crit_edge, !llvm.loop !15

._crit_edge:                                      ; preds = %.lr.ph12, %.preheader
  call void @_ZN5sc_dt11sc_int_base11extend_signEv(ptr noundef nonnull align 8 dereferenceable(24) %0)
  ret ptr %0
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt10sc_bv_base6lengthEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt11sc_int_base3setEib(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef, i1 noundef zeroext) local_unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt10sc_bv_base7get_bitEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) local_unnamed_addr #2 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 16}
!10 = !{!"_ZTSN5sc_dt11sc_int_baseE", !11, i64 0, !12, i64 8, !6, i64 16, !6, i64 20}
!11 = !{!"_ZTSN5sc_dt13sc_value_baseE"}
!12 = !{!"long long", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass