; LLVM IR from gem5/gem5 :: src/systemc/tests/systemc/tracing/vcd_trace/test01/test01.ll (ZN5proc15entryEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::sc_bv" = type { %"class.sc_dt::sc_bv_base" }
%"class.sc_dt::sc_bv_base" = type { %"class.sc_dt::sc_proxy", i32, i32, ptr }
%"class.sc_dt::sc_proxy" = type { ptr }
%"class.sc_dt::sc_lv" = type { %"class.sc_dt::sc_lv_base" }
%"class.sc_dt::sc_lv_base" = type { %"class.sc_dt::sc_proxy.0", i32, i32, ptr, ptr }
%"class.sc_dt::sc_proxy.0" = type { ptr }
%struct.proc1 = type { %"class.sc_core::sc_module", %"class.sc_core::sc_in", i8, %"class.sc_dt::sc_logic", %"class.sc_dt::sc_bv", %"class.sc_dt::sc_lv" }
%"class.sc_core::sc_module" = type { %"class.sc_core::sc_object", %"class.sc_core::sc_process_host", %"class.sc_core::sc_sensitive", %"class.sc_core::sc_sensitive_pos", %"class.sc_core::sc_sensitive_neg", i8, ptr, i32, ptr, ptr }
%"class.sc_core::sc_object" = type { ptr, ptr, %"class.std::vector", %"class.std::vector.1", %"class.std::__cxx11::basic_string", ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.1" = type { %"struct.std::_Vector_base.2" }
%"struct.std::_Vector_base.2" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.sc_core::sc_process_host" = type { ptr }
%"class.sc_core::sc_sensitive" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_pos" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_neg" = type { ptr, i32, ptr }
%"class.sc_core::sc_in" = type { %"class.sc_core::sc_port", ptr, ptr, ptr, ptr }
%"class.sc_core::sc_port" = type { %"class.sc_core::sc_port_b" }
%"class.sc_core::sc_port_b" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.9" }
%"class.sc_core::sc_port_base" = type { %"class.sc_core::sc_object", ptr }
%"class.std::vector.9" = type { %"struct.std::_Vector_base.10" }
%"struct.std::_Vector_base.10" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_dt::sc_logic" = type { i32 }

@.str = external hidden unnamed_addr constant [5 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [5 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [5 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [5 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5proc15entryEv(ptr noundef nonnull align 8 dereferenceable(480) %0) #0 align 2 personality ptr @__gxx_personality_v0 {
  %2 = alloca ptr, align 8
  %3 = alloca %"class.sc_dt::sc_bv", align 8
  %4 = alloca %"class.sc_dt::sc_lv", align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  %8 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 24, ptr %3) #3
  call void @_ZN5sc_dt5sc_bvILi4EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3)
  call void @llvm.lifetime.start.p0(i64 32, ptr %4) #3
  invoke void @_ZN5sc_dt5sc_lvILi4EEC2Ev(ptr noundef nonnull align 8 dereferenceable(32) %4)
          to label %9 unwind label %49

9:                                                ; preds = %1
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  store i32 5, ptr %7, align 4, !tbaa !9
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %8)
          to label %10 unwind label %53

10:                                               ; preds = %9
  br label %11

11:                                               ; preds = %48, %10
  br label %12

12:                                               ; preds = %11
  %13 = load i32, ptr %7, align 4, !tbaa !9
  %14 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt5sc_bvILi4EEaSEi(ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef %13)
          to label %15 unwind label %53

15:                                               ; preds = %12
  %16 = load i32, ptr %7, align 4, !tbaa !9
  %17 = add nsw i32 %16, 1
  store i32 %17, ptr %7, align 4, !tbaa !9
  %18 = invoke noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt5sc_lvILi4EEaSEi(ptr noundef nonnull align 8 dereferenceable(32) %4, i32 noundef %16)
          to label %19 unwind label %53

19:                                               ; preds = %15
  %20 = getelementptr inbounds %struct.proc1, ptr %8, i32 0, i32 2
  store i8 0, ptr %20, align 8, !tbaa !11
  %21 = getelementptr inbounds %struct.proc1, ptr %8, i32 0, i32 3
  %22 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZN5sc_dt8sc_logicaSEi(ptr noundef nonnull align 4 dereferenceable(4) %21, i32 noundef 1)
          to label %23 unwind label %53

23:                                               ; preds = %19
  %24 = getelementptr inbounds %struct.proc1, ptr %8, i32 0, i32 4
  %25 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt5sc_bvILi4EEaSEPKc(ptr noundef nonnull align 8 dereferenceable(24) %24, ptr noundef @.str)
          to label %26 unwind label %53

26:                                               ; preds = %23
  %27 = getelementptr inbounds %struct.proc1, ptr %8, i32 0, i32 5
  %28 = invoke noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt5sc_lvILi4EEaSEPKc(ptr noundef nonnull align 8 dereferenceable(32) %27, ptr noundef @.str.2)
          to label %29 unwind label %53

29:                                               ; preds = %26
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %8)
          to label %30 unwind label %53

30:                                               ; preds = %29
  %31 = getelementptr inbounds %struct.proc1, ptr %8, i32 0, i32 2
  store i8 1, ptr %31, align 8, !tbaa !11
  %32 = getelementptr inbounds %struct.proc1, ptr %8, i32 0, i32 3
  %33 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZN5sc_dt8sc_logicaSEi(ptr noundef nonnull align 4 dereferenceable(4) %32, i32 noundef 0)
          to label %34 unwind label %53

34:                                               ; preds = %30
  %35 = getelementptr inbounds %struct.proc1, ptr %8, i32 0, i32 4
  %36 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt5sc_bvILi4EEaSEPKc(ptr noundef nonnull align 8 dereferenceable(24) %35, ptr noundef @.str.3)
          to label %37 unwind label %53

37:                                               ; preds = %34
  %38 = getelementptr inbounds %struct.proc1, ptr %8, i32 0, i32 5
  %39 = invoke noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt5sc_lvILi4EEaSEPKc(ptr noundef nonnull align 8 dereferenceable(32) %38, ptr noundef @.str.4)
          to label %40 unwind label %53

40:                                               ; preds = %37
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %8)
          to label %41 unwind label %53

41:                                               ; preds = %40
  %42 = getelementptr inbounds %struct.proc1, ptr %8, i32 0, i32 4
  %43 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt5sc_bvILi4EEaSERKS1_(ptr noundef nonnull align 8 dereferenceable(24) %42, ptr noundef nonnull align 8 dereferenceable(24) %3)
          to label %44 unwind label %53

44:                                               ; preds = %41
  %45 = getelementptr inbounds %struct.proc1, ptr %8, i32 0, i32 5
  %46 = invoke noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt5sc_lvILi4EEaSERKS1_(ptr noundef nonnull align 8 dereferenceable(32) %45, ptr noundef nonnull align 8 dereferenceable(32) %4)
          to label %47 unwind label %53

47:                                               ; preds = %44
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %8)
          to label %48 unwind label %53

48:                                               ; preds = %47
  br label %11, !llvm.loop !50

49:                                               ; preds = %1
  %50 = landingpad { ptr, i32 }
          cleanup
  %51 = extractvalue { ptr, i32 } %50, 0
  store ptr %51, ptr %5, align 8
  %52 = extractvalue { ptr, i32 } %50, 1
  store i32 %52, ptr %6, align 4
  br label %57

53:                                               ; preds = %47, %44, %41, %40, %37, %34, %30, %29, %26, %23, %19, %15, %12, %9
  %54 = landingpad { ptr, i32 }
          cleanup
  %55 = extractvalue { ptr, i32 } %54, 0
  store ptr %55, ptr %5, align 8
  %56 = extractvalue { ptr, i32 } %54, 1
  store i32 %56, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  call void @_ZN5sc_dt10sc_lv_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %4) #3
  br label %57

57:                                               ; preds = %53, %49
  call void @llvm.lifetime.end.p0(i64 32, ptr %4) #3
  call void @_ZN5sc_dt10sc_bv_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3) #3
  call void @llvm.lifetime.end.p0(i64 24, ptr %3) #3
  br label %58

58:                                               ; preds = %57
  %59 = load ptr, ptr %5, align 8
  %60 = load i32, ptr %6, align 4
  %61 = insertvalue { ptr, i32 } poison, ptr %59, 0
  %62 = insertvalue { ptr, i32 } %61, i32 %60, 1
  resume { ptr, i32 } %62
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt5sc_bvILi4EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt5sc_lvILi4EEC2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232)) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt5sc_bvILi4EEaSEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt5sc_lvILi4EEaSEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZN5sc_dt8sc_logicaSEi(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt5sc_bvILi4EEaSEPKc(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt5sc_lvILi4EEaSEPKc(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt5sc_bvILi4EEaSERKS1_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt5sc_lvILi4EEaSERKS1_(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef nonnull align 8 dereferenceable(32)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt10sc_lv_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt10sc_bv_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !33, i64 416}
!12 = !{!"_ZTS5proc1", !13, i64 0, !34, i64 232, !33, i64 416, !42, i64 420, !44, i64 424, !47, i64 448}
!13 = !{!"_ZTSN7sc_core9sc_moduleE", !14, i64 0, !26, i64 112, !27, i64 120, !29, i64 144, !31, i64 168, !33, i64 192, !6, i64 200, !10, i64 208, !6, i64 216, !6, i64 224}
!14 = !{!"_ZTSN7sc_core9sc_objectE", !6, i64 8, !15, i64 16, !19, i64 40, !23, i64 64, !6, i64 96, !6, i64 104}
!15 = !{!"_ZTSSt6vectorIPN7sc_core8sc_eventESaIS2_EE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!19 = !{!"_ZTSSt6vectorIPN7sc_core9sc_objectESaIS2_EE", !20, i64 0}
!20 = !{!"_ZTSSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE12_Vector_implE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!23 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !24, i64 0, !25, i64 8, !7, i64 16}
!24 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!25 = !{!"long", !7, i64 0}
!26 = !{!"_ZTSN7sc_core15sc_process_hostE"}
!27 = !{!"_ZTSN7sc_core12sc_sensitiveE", !6, i64 0, !28, i64 8, !6, i64 16}
!28 = !{!"_ZTSN7sc_core12sc_sensitiveUt_E", !7, i64 0}
!29 = !{!"_ZTSN7sc_core16sc_sensitive_posE", !6, i64 0, !30, i64 8, !6, i64 16}
!30 = !{!"_ZTSN7sc_core16sc_sensitive_posUt_E", !7, i64 0}
!31 = !{!"_ZTSN7sc_core16sc_sensitive_negE", !6, i64 0, !32, i64 8, !6, i64 16}
!32 = !{!"_ZTSN7sc_core16sc_sensitive_negUt_E", !7, i64 0}
!33 = !{!"bool", !7, i64 0}
!34 = !{!"_ZTSN7sc_core5sc_inIbEE", !35, i64 0, !6, i64 152, !6, i64 160, !6, i64 168, !6, i64 176}
!35 = !{!"_ZTSN7sc_core7sc_portINS_15sc_signal_in_ifIbEELi1ELNS_14sc_port_policyE0EEE", !36, i64 0}
!36 = !{!"_ZTSN7sc_core9sc_port_bINS_15sc_signal_in_ifIbEEEE", !37, i64 0, !6, i64 120, !38, i64 128}
!37 = !{!"_ZTSN7sc_core12sc_port_baseE", !14, i64 0, !6, i64 112}
!38 = !{!"_ZTSSt6vectorIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE", !39, i64 0}
!39 = !{!"_ZTSSt12_Vector_baseIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE", !40, i64 0}
!40 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE12_Vector_implE", !41, i64 0}
!41 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!42 = !{!"_ZTSN5sc_dt8sc_logicE", !43, i64 0}
!43 = !{!"_ZTSN5sc_dt16sc_logic_value_tE", !7, i64 0}
!44 = !{!"_ZTSN5sc_dt5sc_bvILi4EEE", !45, i64 0}
!45 = !{!"_ZTSN5sc_dt10sc_bv_baseE", !46, i64 0, !10, i64 8, !10, i64 12, !6, i64 16}
!46 = !{!"_ZTSN5sc_dt8sc_proxyINS_10sc_bv_baseEEE"}
!47 = !{!"_ZTSN5sc_dt5sc_lvILi4EEE", !48, i64 0}
!48 = !{!"_ZTSN5sc_dt10sc_lv_baseE", !49, i64 0, !10, i64 8, !10, i64 12, !6, i64 16, !6, i64 24}
!49 = !{!"_ZTSN5sc_dt8sc_proxyINS_10sc_lv_baseEEE"}
!50 = distinct !{!50, !51}
!51 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::sc_bv" = type { %"class.sc_dt::sc_bv_base" }
%"class.sc_dt::sc_bv_base" = type { %"class.sc_dt::sc_proxy", i32, i32, ptr }
%"class.sc_dt::sc_proxy" = type { ptr }
%"class.sc_dt::sc_lv" = type { %"class.sc_dt::sc_lv_base" }
%"class.sc_dt::sc_lv_base" = type { %"class.sc_dt::sc_proxy.0", i32, i32, ptr, ptr }
%"class.sc_dt::sc_proxy.0" = type { ptr }

@.str = external hidden unnamed_addr constant [5 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [5 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [5 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [5 x i8], align 1

; Function Attrs: mustprogress noreturn uwtable
define dso_local void @_ZN5proc15entryEv(ptr noundef nonnull align 8 dereferenceable(480) %0) local_unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  %2 = alloca %"class.sc_dt::sc_bv", align 8
  %3 = alloca %"class.sc_dt::sc_lv", align 8
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %2) #4
  call void @_ZN5sc_dt5sc_bvILi4EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %2)
  call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %3) #4
  invoke void @_ZN5sc_dt5sc_lvILi4EEC2Ev(ptr noundef nonnull align 8 dereferenceable(32) %3)
          to label %4 unwind label %33

4:                                                ; preds = %1
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
          to label %.preheader unwind label %.loopexit.split-lp

.preheader:                                       ; preds = %4
  %5 = getelementptr inbounds i8, ptr %0, i64 416
  %6 = getelementptr inbounds i8, ptr %0, i64 420
  %7 = getelementptr inbounds i8, ptr %0, i64 424
  %8 = getelementptr inbounds i8, ptr %0, i64 448
  br label %9

9:                                                ; preds = %.preheader, %32
  %.0 = phi i32 [ %12, %32 ], [ 5, %.preheader ]
  %10 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt5sc_bvILi4EEaSEi(ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef %.0)
          to label %11 unwind label %.loopexit

11:                                               ; preds = %9
  %12 = add nuw nsw i32 %.0, 1
  %13 = invoke noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt5sc_lvILi4EEaSEi(ptr noundef nonnull align 8 dereferenceable(32) %3, i32 noundef %.0)
          to label %14 unwind label %.loopexit

14:                                               ; preds = %11
  store i8 0, ptr %5, align 8, !tbaa !5
  %15 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZN5sc_dt8sc_logicaSEi(ptr noundef nonnull align 4 dereferenceable(4) %6, i32 noundef 1)
          to label %16 unwind label %.loopexit

16:                                               ; preds = %14
  %17 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt5sc_bvILi4EEaSEPKc(ptr noundef nonnull align 8 dereferenceable(24) %7, ptr noundef nonnull @.str)
          to label %18 unwind label %.loopexit

18:                                               ; preds = %16
  %19 = invoke noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt5sc_lvILi4EEaSEPKc(ptr noundef nonnull align 8 dereferenceable(32) %8, ptr noundef nonnull @.str.2)
          to label %20 unwind label %.loopexit

20:                                               ; preds = %18
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
          to label %21 unwind label %.loopexit

21:                                               ; preds = %20
  store i8 1, ptr %5, align 8, !tbaa !5
  %22 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZN5sc_dt8sc_logicaSEi(ptr noundef nonnull align 4 dereferenceable(4) %6, i32 noundef 0)
          to label %23 unwind label %.loopexit

23:                                               ; preds = %21
  %24 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt5sc_bvILi4EEaSEPKc(ptr noundef nonnull align 8 dereferenceable(24) %7, ptr noundef nonnull @.str.3)
          to label %25 unwind label %.loopexit

25:                                               ; preds = %23
  %26 = invoke noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt5sc_lvILi4EEaSEPKc(ptr noundef nonnull align 8 dereferenceable(32) %8, ptr noundef nonnull @.str.4)
          to label %27 unwind label %.loopexit

27:                                               ; preds = %25
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
          to label %28 unwind label %.loopexit

28:                                               ; preds = %27
  %29 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt5sc_bvILi4EEaSERKS1_(ptr noundef nonnull align 8 dereferenceable(24) %7, ptr noundef nonnull align 8 dereferenceable(24) %2)
          to label %30 unwind label %.loopexit

30:                                               ; preds = %28
  %31 = invoke noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt5sc_lvILi4EEaSERKS1_(ptr noundef nonnull align 8 dereferenceable(32) %8, ptr noundef nonnull align 8 dereferenceable(32) %3)
          to label %32 unwind label %.loopexit

32:                                               ; preds = %30
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
          to label %9 unwind label %.loopexit, !llvm.loop !48

33:                                               ; preds = %1
  %34 = landingpad { ptr, i32 }
          cleanup
  br label %36

.loopexit:                                        ; preds = %9, %11, %14, %16, %18, %20, %21, %23, %25, %27, %28, %30, %32
  %lpad.loopexit = landingpad { ptr, i32 }
          cleanup
  br label %35

.loopexit.split-lp:                               ; preds = %4
  %lpad.loopexit.split-lp = landingpad { ptr, i32 }
          cleanup
  br label %35

35:                                               ; preds = %.loopexit.split-lp, %.loopexit
  %lpad.phi = phi { ptr, i32 } [ %lpad.loopexit, %.loopexit ], [ %lpad.loopexit.split-lp, %.loopexit.split-lp ]
  call void @_ZN5sc_dt10sc_lv_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %3) #4
  br label %36

36:                                               ; preds = %35, %33
  %.pn = phi { ptr, i32 } [ %lpad.phi, %35 ], [ %34, %33 ]
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %3) #4
  call void @_ZN5sc_dt10sc_bv_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %2) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %2) #4
  resume { ptr, i32 } %.pn
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt5sc_bvILi4EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt5sc_lvILi4EEC2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #2 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt5sc_bvILi4EEaSEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt5sc_lvILi4EEaSEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZN5sc_dt8sc_logicaSEi(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt5sc_bvILi4EEaSEPKc(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt5sc_lvILi4EEaSEPKc(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt5sc_bvILi4EEaSERKS1_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt5sc_lvILi4EEaSERKS1_(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt10sc_lv_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt10sc_bv_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #3 align 2

attributes #0 = { mustprogress noreturn uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !30, i64 416}
!6 = !{!"_ZTS5proc1", !7, i64 0, !32, i64 232, !30, i64 416, !40, i64 420, !42, i64 424, !45, i64 448}
!7 = !{!"_ZTSN7sc_core9sc_moduleE", !8, i64 0, !23, i64 112, !24, i64 120, !26, i64 144, !28, i64 168, !30, i64 192, !9, i64 200, !31, i64 208, !9, i64 216, !9, i64 224}
!8 = !{!"_ZTSN7sc_core9sc_objectE", !9, i64 8, !12, i64 16, !16, i64 40, !20, i64 64, !9, i64 96, !9, i64 104}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C++ TBAA"}
!12 = !{!"_ZTSSt6vectorIPN7sc_core8sc_eventESaIS2_EE", !13, i64 0}
!13 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE", !14, i64 0}
!14 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE12_Vector_implE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!16 = !{!"_ZTSSt6vectorIPN7sc_core9sc_objectESaIS2_EE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!20 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !21, i64 0, !22, i64 8, !10, i64 16}
!21 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !9, i64 0}
!22 = !{!"long", !10, i64 0}
!23 = !{!"_ZTSN7sc_core15sc_process_hostE"}
!24 = !{!"_ZTSN7sc_core12sc_sensitiveE", !9, i64 0, !25, i64 8, !9, i64 16}
!25 = !{!"_ZTSN7sc_core12sc_sensitiveUt_E", !10, i64 0}
!26 = !{!"_ZTSN7sc_core16sc_sensitive_posE", !9, i64 0, !27, i64 8, !9, i64 16}
!27 = !{!"_ZTSN7sc_core16sc_sensitive_posUt_E", !10, i64 0}
!28 = !{!"_ZTSN7sc_core16sc_sensitive_negE", !9, i64 0, !29, i64 8, !9, i64 16}
!29 = !{!"_ZTSN7sc_core16sc_sensitive_negUt_E", !10, i64 0}
!30 = !{!"bool", !10, i64 0}
!31 = !{!"int", !10, i64 0}
!32 = !{!"_ZTSN7sc_core5sc_inIbEE", !33, i64 0, !9, i64 152, !9, i64 160, !9, i64 168, !9, i64 176}
!33 = !{!"_ZTSN7sc_core7sc_portINS_15sc_signal_in_ifIbEELi1ELNS_14sc_port_policyE0EEE", !34, i64 0}
!34 = !{!"_ZTSN7sc_core9sc_port_bINS_15sc_signal_in_ifIbEEEE", !35, i64 0, !9, i64 120, !36, i64 128}
!35 = !{!"_ZTSN7sc_core12sc_port_baseE", !8, i64 0, !9, i64 112}
!36 = !{!"_ZTSSt6vectorIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE", !37, i64 0}
!37 = !{!"_ZTSSt12_Vector_baseIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE", !38, i64 0}
!38 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE12_Vector_implE", !39, i64 0}
!39 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!40 = !{!"_ZTSN5sc_dt8sc_logicE", !41, i64 0}
!41 = !{!"_ZTSN5sc_dt16sc_logic_value_tE", !10, i64 0}
!42 = !{!"_ZTSN5sc_dt5sc_bvILi4EEE", !43, i64 0}
!43 = !{!"_ZTSN5sc_dt10sc_bv_baseE", !44, i64 0, !31, i64 8, !31, i64 12, !9, i64 16}
!44 = !{!"_ZTSN5sc_dt8sc_proxyINS_10sc_bv_baseEEE"}
!45 = !{!"_ZTSN5sc_dt5sc_lvILi4EEE", !46, i64 0}
!46 = !{!"_ZTSN5sc_dt10sc_lv_baseE", !47, i64 0, !31, i64 8, !31, i64 12, !9, i64 16, !9, i64 24}
!47 = !{!"_ZTSN5sc_dt8sc_proxyINS_10sc_lv_baseEEE"}
!48 = distinct !{!48, !49}
!49 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,LICMPass,LoopSimplifyPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass