; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/datatypes/int (sc_int_base)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::sc_logic" = type { i32 }
%"class.sc_dt::sc_int_base" = type { %"class.sc_dt::sc_value_base", i64, i32, i32 }
%"class.sc_dt::sc_value_base" = type { ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt11sc_int_base11extend_signEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt11sc_int_baseaSERKNS_10sc_lv_baseE(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(32) %1) #2 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca %"class.sc_dt::sc_logic", align 4
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %11 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  %12 = getelementptr inbounds %"class.sc_dt::sc_int_base", ptr %11, i32 0, i32 2
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  %13 = load ptr, ptr %4, align 8, !tbaa !5
  %14 = call noundef i32 @_ZNK5sc_dt10sc_lv_base6lengthEv(ptr noundef nonnull align 8 dereferenceable(32) %13)
  store i32 %14, ptr %6, align 4, !tbaa !9
  %15 = call noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %12, ptr noundef nonnull align 4 dereferenceable(4) %6)
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  store i32 %15, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  store i32 0, ptr %7, align 4, !tbaa !9
  br label %16

16:                                               ; preds = %28, %2
  %17 = load i32, ptr %7, align 4, !tbaa !9
  %18 = load i32, ptr %5, align 4, !tbaa !9
  %19 = icmp slt i32 %17, %18
  br i1 %19, label %20, label %35

20:                                               ; preds = %16
  %21 = load i32, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  %22 = load ptr, ptr %4, align 8, !tbaa !5
  %23 = load i32, ptr %7, align 4, !tbaa !9
  %24 = call noundef i32 @_ZNK5sc_dt10sc_lv_base7get_bitEi(ptr noundef nonnull align 8 dereferenceable(32) %22, i32 noundef %23)
  call void @_ZN5sc_dt8sc_logicC2ENS_16sc_logic_value_tE(ptr noundef nonnull align 4 dereferenceable(4) %8, i32 noundef %24)
  %25 = invoke noundef zeroext i1 @_ZNK5sc_dt8sc_logic7to_boolEv(ptr noundef nonnull align 4 dereferenceable(4) %8)
          to label %26 unwind label %31

26:                                               ; preds = %20
  invoke void @_ZN5sc_dt11sc_int_base3setEib(ptr noundef nonnull align 8 dereferenceable(24) %11, i32 noundef %21, i1 noundef zeroext %25)
          to label %27 unwind label %31

27:                                               ; preds = %26
  call void @_ZN5sc_dt8sc_logicD2Ev(ptr noundef nonnull align 4 dereferenceable(4) %8) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  br label %28

28:                                               ; preds = %27
  %29 = load i32, ptr %7, align 4, !tbaa !9
  %30 = add nsw i32 %29, 1
  store i32 %30, ptr %7, align 4, !tbaa !9
  br label %16, !llvm.loop !11

31:                                               ; preds = %26, %20
  %32 = landingpad { ptr, i32 }
          cleanup
  %33 = extractvalue { ptr, i32 } %32, 0
  store ptr %33, ptr %9, align 8
  %34 = extractvalue { ptr, i32 } %32, 1
  store i32 %34, ptr %10, align 4
  call void @_ZN5sc_dt8sc_logicD2Ev(ptr noundef nonnull align 4 dereferenceable(4) %8) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  br label %47

35:                                               ; preds = %16
  br label %36

36:                                               ; preds = %43, %35
  %37 = load i32, ptr %7, align 4, !tbaa !9
  %38 = getelementptr inbounds %"class.sc_dt::sc_int_base", ptr %11, i32 0, i32 2
  %39 = load i32, ptr %38, align 8, !tbaa !13
  %40 = icmp slt i32 %37, %39
  br i1 %40, label %41, label %46

41:                                               ; preds = %36
  %42 = load i32, ptr %7, align 4, !tbaa !9
  call void @_ZN5sc_dt11sc_int_base3setEib(ptr noundef nonnull align 8 dereferenceable(24) %11, i32 noundef %42, i1 noundef zeroext false)
  br label %43

43:                                               ; preds = %41
  %44 = load i32, ptr %7, align 4, !tbaa !9
  %45 = add nsw i32 %44, 1
  store i32 %45, ptr %7, align 4, !tbaa !9
  br label %36, !llvm.loop !17

46:                                               ; preds = %36
  call void @_ZN5sc_dt11sc_int_base11extend_signEv(ptr noundef nonnull align 8 dereferenceable(24) %11)
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  ret ptr %11

47:                                               ; preds = %31
  %48 = load ptr, ptr %9, align 8
  %49 = load i32, ptr %10, align 4
  %50 = insertvalue { ptr, i32 } poison, ptr %48, 0
  %51 = insertvalue { ptr, i32 } %50, i32 %49, 1
  resume { ptr, i32 } %51
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt10sc_lv_base6lengthEv(ptr noundef nonnull align 8 dereferenceable(32)) #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt11sc_int_base3setEib(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef, i1 noundef zeroext) #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt10sc_lv_base7get_bitEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt8sc_logicC2ENS_16sc_logic_value_tE(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK5sc_dt8sc_logic7to_boolEv(ptr noundef nonnull align 4 dereferenceable(4)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt8sc_logicD2Ev(ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!14, !10, i64 16}
!14 = !{!"_ZTSN5sc_dt11sc_int_baseE", !15, i64 0, !16, i64 8, !10, i64 16, !10, i64 20}
!15 = !{!"_ZTSN5sc_dt13sc_value_baseE"}
!16 = !{!"long long", !7, i64 0}
!17 = distinct !{!17, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::sc_logic" = type { i32 }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt11sc_int_base11extend_signEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt11sc_int_baseaSERKNS_10sc_lv_baseE(ptr noundef nonnull returned align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(32) %1) local_unnamed_addr #2 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca i32, align 4
  %4 = alloca %"class.sc_dt::sc_logic", align 4
  %5 = getelementptr inbounds i8, ptr %0, i64 16
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #4
  %6 = tail call noundef i32 @_ZNK5sc_dt10sc_lv_base6lengthEv(ptr noundef nonnull align 8 dereferenceable(32) %1)
  store i32 %6, ptr %3, align 4, !tbaa !5
  %7 = call noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %5, ptr noundef nonnull align 4 dereferenceable(4) %3)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #4
  %8 = icmp sgt i32 %7, 0
  br i1 %8, label %.lr.ph, label %.preheader

.preheader:                                       ; preds = %13, %2
  %.0.lcssa = phi i32 [ 0, %2 ], [ %7, %13 ]
  %9 = load i32, ptr %5, align 8, !tbaa !9
  %10 = icmp slt i32 %.0.lcssa, %9
  br i1 %10, label %.lr.ph15, label %._crit_edge

.lr.ph:                                           ; preds = %2, %13
  %.013 = phi i32 [ %14, %13 ], [ 0, %2 ]
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #4
  %11 = call noundef i32 @_ZNK5sc_dt10sc_lv_base7get_bitEi(ptr noundef nonnull align 8 dereferenceable(32) %1, i32 noundef %.013)
  call void @_ZN5sc_dt8sc_logicC2ENS_16sc_logic_value_tE(ptr noundef nonnull align 4 dereferenceable(4) %4, i32 noundef %11)
  %12 = invoke noundef zeroext i1 @_ZNK5sc_dt8sc_logic7to_boolEv(ptr noundef nonnull align 4 dereferenceable(4) %4)
          to label %13 unwind label %15

13:                                               ; preds = %.lr.ph
  call void @_ZN5sc_dt11sc_int_base3setEib(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %.013, i1 noundef zeroext %12)
  call void @_ZN5sc_dt8sc_logicD2Ev(ptr noundef nonnull align 4 dereferenceable(4) %4) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #4
  %14 = add nuw nsw i32 %.013, 1
  %exitcond.not = icmp eq i32 %14, %7
  br i1 %exitcond.not, label %.preheader, label %.lr.ph, !llvm.loop !13

15:                                               ; preds = %.lr.ph
  %16 = landingpad { ptr, i32 }
          cleanup
  call void @_ZN5sc_dt8sc_logicD2Ev(ptr noundef nonnull align 4 dereferenceable(4) %4) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #4
  resume { ptr, i32 } %16

.lr.ph15:                                         ; preds = %.preheader, %.lr.ph15
  %.114 = phi i32 [ %17, %.lr.ph15 ], [ %.0.lcssa, %.preheader ]
  call void @_ZN5sc_dt11sc_int_base3setEib(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %.114, i1 noundef zeroext false)
  %17 = add nuw nsw i32 %.114, 1
  %18 = load i32, ptr %5, align 8, !tbaa !9
  %19 = icmp slt i32 %17, %18
  br i1 %19, label %.lr.ph15, label %._crit_edge, !llvm.loop !15

._crit_edge:                                      ; preds = %.lr.ph15, %.preheader
  call void @_ZN5sc_dt11sc_int_base11extend_signEv(ptr noundef nonnull align 8 dereferenceable(24) %0)
  ret ptr %0
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt10sc_lv_base6lengthEv(ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt11sc_int_base3setEib(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef, i1 noundef zeroext) local_unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt10sc_lv_base7get_bitEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt8sc_logicC2ENS_16sc_logic_value_tE(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK5sc_dt8sc_logic7to_boolEv(ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt8sc_logicD2Ev(ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #1 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 16}
!10 = !{!"_ZTSN5sc_dt11sc_int_baseE", !11, i64 0, !12, i64 8, !6, i64 16, !6, i64 20}
!11 = !{!"_ZTSN5sc_dt13sc_value_baseE"}
!12 = !{!"long long", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass