; LLVM IR from tommasocerruti/algolab-2024 :: src/week05/asterix_the_gaul/solution.ll (Z10subset_sumiiRSt6vectorI4moveSaIS0_EES3_ll)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.move = type { i64, i64 }

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z10subset_sumiiRSt6vectorI4moveSaIS0_EES3_ll(i32 noundef %0, i32 noundef %1, ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %4, i64 noundef %5) #0 {
  %7 = alloca i1, align 1
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i64, align 8
  %13 = alloca i64, align 8
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i64, align 8
  %17 = alloca i64, align 8
  %18 = alloca i32, align 4
  %19 = alloca %struct.move, align 8
  store i32 %0, ptr %8, align 4, !tbaa !5
  store i32 %1, ptr %9, align 4, !tbaa !5
  store ptr %2, ptr %10, align 8, !tbaa !9
  store ptr %3, ptr %11, align 8, !tbaa !9
  store i64 %4, ptr %12, align 8, !tbaa !11
  store i64 %5, ptr %13, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  store i32 0, ptr %14, align 4, !tbaa !5
  br label %20

20:                                               ; preds = %86, %6
  %21 = load i32, ptr %14, align 4, !tbaa !5
  %22 = load i32, ptr %9, align 4, !tbaa !5
  %23 = load i32, ptr %8, align 4, !tbaa !5
  %24 = sub nsw i32 %22, %23
  %25 = shl i32 1, %24
  %26 = icmp slt i32 %21, %25
  br i1 %26, label %28, label %27

27:                                               ; preds = %20
  store i32 2, ptr %15, align 4
  br label %89

28:                                               ; preds = %20
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #3
  store i64 0, ptr %16, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #3
  store i64 0, ptr %17, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #3
  store i32 0, ptr %18, align 4, !tbaa !5
  br label %29

29:                                               ; preds = %64, %28
  %30 = load i32, ptr %18, align 4, !tbaa !5
  %31 = load i32, ptr %9, align 4, !tbaa !5
  %32 = load i32, ptr %8, align 4, !tbaa !5
  %33 = sub nsw i32 %31, %32
  %34 = icmp slt i32 %30, %33
  br i1 %34, label %36, label %35

35:                                               ; preds = %29
  store i32 5, ptr %15, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #3
  br label %67

36:                                               ; preds = %29
  %37 = load i32, ptr %14, align 4, !tbaa !5
  %38 = load i32, ptr %18, align 4, !tbaa !5
  %39 = shl i32 1, %38
  %40 = and i32 %37, %39
  %41 = icmp ne i32 %40, 0
  br i1 %41, label %42, label %63

42:                                               ; preds = %36
  %43 = load ptr, ptr %10, align 8, !tbaa !9
  %44 = load i32, ptr %18, align 4, !tbaa !5
  %45 = load i32, ptr %8, align 4, !tbaa !5
  %46 = add nsw i32 %44, %45
  %47 = sext i32 %46 to i64
  %48 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4moveSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %43, i64 noundef %47) #3
  %49 = getelementptr inbounds %struct.move, ptr %48, i32 0, i32 0
  %50 = load i64, ptr %49, align 8, !tbaa !13
  %51 = load i64, ptr %16, align 8, !tbaa !11
  %52 = add nsw i64 %51, %50
  store i64 %52, ptr %16, align 8, !tbaa !11
  %53 = load ptr, ptr %10, align 8, !tbaa !9
  %54 = load i32, ptr %18, align 4, !tbaa !5
  %55 = load i32, ptr %8, align 4, !tbaa !5
  %56 = add nsw i32 %54, %55
  %57 = sext i32 %56 to i64
  %58 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4moveSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %53, i64 noundef %57) #3
  %59 = getelementptr inbounds %struct.move, ptr %58, i32 0, i32 1
  %60 = load i64, ptr %59, align 8, !tbaa !15
  %61 = load i64, ptr %17, align 8, !tbaa !11
  %62 = add nsw i64 %61, %60
  store i64 %62, ptr %17, align 8, !tbaa !11
  br label %63

63:                                               ; preds = %42, %36
  br label %64

64:                                               ; preds = %63
  %65 = load i32, ptr %18, align 4, !tbaa !5
  %66 = add nsw i32 %65, 1
  store i32 %66, ptr %18, align 4, !tbaa !5
  br label %29, !llvm.loop !16

67:                                               ; preds = %35
  %68 = load i64, ptr %17, align 8, !tbaa !11
  %69 = load i64, ptr %13, align 8, !tbaa !11
  %70 = icmp slt i64 %68, %69
  br i1 %70, label %71, label %82

71:                                               ; preds = %67
  %72 = load i64, ptr %16, align 8, !tbaa !11
  %73 = load i64, ptr %12, align 8, !tbaa !11
  %74 = icmp sge i64 %72, %73
  br i1 %74, label %75, label %76

75:                                               ; preds = %71
  store i1 true, ptr %7, align 1
  store i32 1, ptr %15, align 4
  br label %83

76:                                               ; preds = %71
  %77 = load ptr, ptr %11, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 16, ptr %19) #3
  %78 = getelementptr inbounds %struct.move, ptr %19, i32 0, i32 0
  %79 = load i64, ptr %16, align 8, !tbaa !11
  store i64 %79, ptr %78, align 8, !tbaa !13
  %80 = getelementptr inbounds %struct.move, ptr %19, i32 0, i32 1
  %81 = load i64, ptr %17, align 8, !tbaa !11
  store i64 %81, ptr %80, align 8, !tbaa !15
  call void @_ZNSt6vectorI4moveSaIS0_EE9push_backEOS0_(ptr noundef nonnull align 8 dereferenceable(24) %77, ptr noundef nonnull align 8 dereferenceable(16) %19)
  call void @llvm.lifetime.end.p0(i64 16, ptr %19) #3
  br label %82

82:                                               ; preds = %76, %67
  store i32 0, ptr %15, align 4
  br label %83

83:                                               ; preds = %82, %75
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #3
  %84 = load i32, ptr %15, align 4
  switch i32 %84, label %89 [
    i32 0, label %85
  ]

85:                                               ; preds = %83
  br label %86

86:                                               ; preds = %85
  %87 = load i32, ptr %14, align 4, !tbaa !5
  %88 = add nsw i32 %87, 1
  store i32 %88, ptr %14, align 4, !tbaa !5
  br label %20, !llvm.loop !18

89:                                               ; preds = %83, %27
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  %90 = load i32, ptr %15, align 4
  switch i32 %90, label %94 [
    i32 2, label %91
    i32 1, label %92
  ]

91:                                               ; preds = %89
  store i1 false, ptr %7, align 1
  br label %92

92:                                               ; preds = %91, %89
  %93 = load i1, ptr %7, align 1
  ret i1 %93

94:                                               ; preds = %89
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4moveSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorI4moveSaIS0_EE9push_backEOS0_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(16)) #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"_ZTS4move", !12, i64 0, !12, i64 8}
!15 = !{!14, !12, i64 8}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = distinct !{!18, !17}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.move = type { i64, i64 }

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z10subset_sumiiRSt6vectorI4moveSaIS0_EES3_ll(i32 noundef %0, i32 noundef %1, ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %4, i64 noundef %5) local_unnamed_addr #0 {
  %7 = alloca %struct.move, align 8
  %8 = sub nsw i32 %1, %0
  %9 = shl nuw i32 1, %8
  %.not3641.not = icmp eq i32 %8, 31
  br i1 %.not3641.not, label %.critedge, label %.preheader.lr.ph

.preheader.lr.ph:                                 ; preds = %6
  %10 = icmp sgt i32 %8, 0
  %11 = getelementptr inbounds i8, ptr %7, i64 8
  br i1 %10, label %.preheader.us.preheader, label %.preheader.lr.ph.split

.preheader.us.preheader:                          ; preds = %.preheader.lr.ph
  %12 = sext i32 %0 to i64
  %smax65 = tail call i32 @llvm.smax.i32(i32 %9, i32 1)
  %wide.trip.count = zext nneg i32 %8 to i64
  br label %.preheader.us

.preheader.us:                                    ; preds = %.preheader.us.preheader, %15
  %.not3643.us = phi i1 [ %.not36.us, %15 ], [ true, %.preheader.us.preheader ]
  %.03242.us = phi i32 [ %16, %15 ], [ 0, %.preheader.us.preheader ]
  br label %17

13:                                               ; preds = %._crit_edge.us
  %.not.us = icmp slt i64 %.129.us, %4
  br i1 %.not.us, label %14, label %.critedge

14:                                               ; preds = %13
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %7) #5
  store i64 %.129.us, ptr %7, align 8, !tbaa !5
  store i64 %.1.us, ptr %11, align 8, !tbaa !10
  call void @_ZNSt6vectorI4moveSaIS0_EE9push_backEOS0_(ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 8 dereferenceable(16) %7)
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %7) #5
  br label %15

15:                                               ; preds = %14, %._crit_edge.us
  %16 = add nuw nsw i32 %.03242.us, 1
  %.not36.us = icmp slt i32 %16, %9
  %exitcond66.not = icmp eq i32 %16, %smax65
  br i1 %exitcond66.not, label %.critedge, label %.preheader.us, !llvm.loop !11

17:                                               ; preds = %.preheader.us, %30
  %indvars.iv = phi i64 [ 0, %.preheader.us ], [ %indvars.iv.next, %30 ]
  %.02738.us = phi i64 [ 0, %.preheader.us ], [ %.1.us, %30 ]
  %.02837.us = phi i64 [ 0, %.preheader.us ], [ %.129.us, %30 ]
  %18 = trunc nuw nsw i64 %indvars.iv to i32
  %19 = shl nuw i32 1, %18
  %20 = and i32 %19, %.03242.us
  %.not35.us = icmp eq i32 %20, 0
  br i1 %.not35.us, label %30, label %21

21:                                               ; preds = %17
  %22 = add nsw i64 %indvars.iv, %12
  %23 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4moveSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %22) #5
  %24 = load i64, ptr %23, align 8, !tbaa !5
  %25 = add nsw i64 %24, %.02837.us
  %26 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4moveSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %22) #5
  %27 = getelementptr inbounds i8, ptr %26, i64 8
  %28 = load i64, ptr %27, align 8, !tbaa !10
  %29 = add nsw i64 %28, %.02738.us
  br label %30

30:                                               ; preds = %21, %17
  %.129.us = phi i64 [ %25, %21 ], [ %.02837.us, %17 ]
  %.1.us = phi i64 [ %29, %21 ], [ %.02738.us, %17 ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond64.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond64.not, label %._crit_edge.us, label %17, !llvm.loop !13

._crit_edge.us:                                   ; preds = %30
  %31 = icmp slt i64 %.1.us, %5
  br i1 %31, label %13, label %15

.preheader.lr.ph.split:                           ; preds = %.preheader.lr.ph
  %32 = icmp sgt i64 %5, 0
  br i1 %32, label %.preheader.lr.ph.split.split.us, label %.preheader.preheader

.preheader.preheader:                             ; preds = %.preheader.lr.ph.split
  %smax = tail call i32 @llvm.smax.i32(i32 %9, i32 1)
  %xtraiter = and i32 %smax, 7
  %33 = icmp slt i32 %9, 8
  br i1 %33, label %.critedge.loopexit59.unr-lcssa, label %.preheader.preheader.new

.preheader.preheader.new:                         ; preds = %.preheader.preheader
  %unroll_iter = and i32 %smax, 2147483640
  br label %.preheader

.preheader.lr.ph.split.split.us:                  ; preds = %.preheader.lr.ph.split
  %.not = icmp sgt i64 %4, 0
  br i1 %.not, label %.preheader.us48.us.preheader, label %.critedge

.preheader.us48.us.preheader:                     ; preds = %.preheader.lr.ph.split.split.us
  %smax61 = tail call i32 @llvm.smax.i32(i32 %9, i32 1)
  br label %.preheader.us48.us

.preheader.us48.us:                               ; preds = %.preheader.us48.us.preheader, %.preheader.us48.us
  %.03242.us5056.us = phi i32 [ %34, %.preheader.us48.us ], [ 0, %.preheader.us48.us.preheader ]
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %7) #5
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %7, i8 0, i64 16, i1 false)
  call void @_ZNSt6vectorI4moveSaIS0_EE9push_backEOS0_(ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 8 dereferenceable(16) %7)
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %7) #5
  %34 = add nuw nsw i32 %.03242.us5056.us, 1
  %exitcond62.not = icmp eq i32 %34, %smax61
  br i1 %exitcond62.not, label %.critedge.loopexit58, label %.preheader.us48.us, !llvm.loop !11

.preheader:                                       ; preds = %.preheader, %.preheader.preheader.new
  %.03242 = phi i32 [ 0, %.preheader.preheader.new ], [ %35, %.preheader ]
  %niter = phi i32 [ 0, %.preheader.preheader.new ], [ %niter.next.7, %.preheader ]
  %35 = add nuw nsw i32 %.03242, 8
  %niter.next.7 = add i32 %niter, 8
  %niter.ncmp.7 = icmp eq i32 %niter.next.7, %unroll_iter
  br i1 %niter.ncmp.7, label %.critedge.loopexit59.unr-lcssa, label %.preheader, !llvm.loop !11

.critedge.loopexit58:                             ; preds = %.preheader.us48.us
  %.not36.us51.us = icmp slt i32 %34, %9
  br label %.critedge

.critedge.loopexit59.unr-lcssa:                   ; preds = %.preheader, %.preheader.preheader
  %.lcssa69.ph = phi i32 [ poison, %.preheader.preheader ], [ %35, %.preheader ]
  %.03242.unr = phi i32 [ 0, %.preheader.preheader ], [ %35, %.preheader ]
  %lcmp.mod.not = icmp eq i32 %xtraiter, 0
  br i1 %lcmp.mod.not, label %.critedge.loopexit59, label %.preheader.epil

.preheader.epil:                                  ; preds = %.critedge.loopexit59.unr-lcssa, %.preheader.epil
  %.03242.epil = phi i32 [ %36, %.preheader.epil ], [ %.03242.unr, %.critedge.loopexit59.unr-lcssa ]
  %epil.iter = phi i32 [ %epil.iter.next, %.preheader.epil ], [ 0, %.critedge.loopexit59.unr-lcssa ]
  %36 = add nuw nsw i32 %.03242.epil, 1
  %epil.iter.next = add i32 %epil.iter, 1
  %epil.iter.cmp.not = icmp eq i32 %epil.iter.next, %xtraiter
  br i1 %epil.iter.cmp.not, label %.critedge.loopexit59, label %.preheader.epil, !llvm.loop !14

.critedge.loopexit59:                             ; preds = %.preheader.epil, %.critedge.loopexit59.unr-lcssa
  %.lcssa69 = phi i32 [ %.lcssa69.ph, %.critedge.loopexit59.unr-lcssa ], [ %36, %.preheader.epil ]
  %.not36 = icmp slt i32 %.lcssa69, %9
  br label %.critedge

.critedge:                                        ; preds = %15, %13, %.critedge.loopexit59, %.critedge.loopexit58, %.preheader.lr.ph.split.split.us, %6
  %.not36.lcssa = phi i1 [ false, %6 ], [ true, %.preheader.lr.ph.split.split.us ], [ %.not36.us51.us, %.critedge.loopexit58 ], [ %.not36, %.critedge.loopexit59 ], [ %.not3643.us, %13 ], [ %.not36.us, %15 ]
  ret i1 %.not36.lcssa
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4moveSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorI4moveSaIS0_EE9push_backEOS0_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #0 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #3

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #4

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS4move", !7, i64 0, !7, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!6, !7, i64 8}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.unroll.disable"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,MemCpyOptPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass