; LLVM IR from hoodoer/ENNEoS :: enneosEncoder/CSpecies.ll (ZN8CSpecies16AgeOneGenerationEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.CSpecies = type { %class.CGenome, %"class.std::vector.5", i32, double, i32, i32, double }
%class.CGenome = type <{ i32, [4 x i8], %"class.std::vector", %"class.std::vector.0", ptr, i32, [4 x i8], double, double, double, i32, i32, i32, [4 x i8] }>
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<SNeuronGene, std::allocator<SNeuronGene>>::_Vector_impl" }
%"struct.std::_Vector_base<SNeuronGene, std::allocator<SNeuronGene>>::_Vector_impl" = type { %"struct.std::_Vector_base<SNeuronGene, std::allocator<SNeuronGene>>::_Vector_impl_data" }
%"struct.std::_Vector_base<SNeuronGene, std::allocator<SNeuronGene>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<SLinkGene, std::allocator<SLinkGene>>::_Vector_impl" }
%"struct.std::_Vector_base<SLinkGene, std::allocator<SLinkGene>>::_Vector_impl" = type { %"struct.std::_Vector_base<SLinkGene, std::allocator<SLinkGene>>::_Vector_impl_data" }
%"struct.std::_Vector_base<SLinkGene, std::allocator<SLinkGene>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.5" = type { %"struct.std::_Vector_base.6" }
%"struct.std::_Vector_base.6" = type { %"struct.std::_Vector_base<CGenome *, std::allocator<CGenome *>>::_Vector_impl" }
%"struct.std::_Vector_base<CGenome *, std::allocator<CGenome *>>::_Vector_impl" = type { %"struct.std::_Vector_base<CGenome *, std::allocator<CGenome *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<CGenome *, std::allocator<CGenome *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN8CSpecies16AgeOneGenerationEv(ptr noundef nonnull align 8 dereferenceable(168) %0) #0 align 2 {
  %2 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %3 = load ptr, ptr %2, align 8
  %4 = getelementptr inbounds %class.CSpecies, ptr %3, i32 0, i32 5
  %5 = load i32, ptr %4, align 4, !tbaa !9
  %6 = add nsw i32 %5, 1
  store i32 %6, ptr %4, align 4, !tbaa !9
  %7 = getelementptr inbounds %class.CSpecies, ptr %3, i32 0, i32 4
  %8 = load i32, ptr %7, align 8, !tbaa !26
  %9 = add nsw i32 %8, 1
  store i32 %9, ptr %7, align 8, !tbaa !26
  %10 = getelementptr inbounds %class.CSpecies, ptr %3, i32 0, i32 6
  store double 0.000000e+00, ptr %10, align 8, !tbaa !27
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !12, i64 156}
!10 = !{!"_ZTS8CSpecies", !11, i64 0, !22, i64 112, !12, i64 136, !21, i64 144, !12, i64 152, !12, i64 156, !21, i64 160}
!11 = !{!"_ZTS7CGenome", !12, i64 0, !13, i64 8, !17, i64 32, !6, i64 56, !12, i64 64, !21, i64 72, !21, i64 80, !21, i64 88, !12, i64 96, !12, i64 100, !12, i64 104}
!12 = !{!"int", !7, i64 0}
!13 = !{!"_ZTSSt6vectorI11SNeuronGeneSaIS0_EE", !14, i64 0}
!14 = !{!"_ZTSSt12_Vector_baseI11SNeuronGeneSaIS0_EE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseI11SNeuronGeneSaIS0_EE12_Vector_implE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseI11SNeuronGeneSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!17 = !{!"_ZTSSt6vectorI9SLinkGeneSaIS0_EE", !18, i64 0}
!18 = !{!"_ZTSSt12_Vector_baseI9SLinkGeneSaIS0_EE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseI9SLinkGeneSaIS0_EE12_Vector_implE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseI9SLinkGeneSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!21 = !{!"double", !7, i64 0}
!22 = !{!"_ZTSSt6vectorIP7CGenomeSaIS1_EE", !23, i64 0}
!23 = !{!"_ZTSSt12_Vector_baseIP7CGenomeSaIS1_EE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseIP7CGenomeSaIS1_EE12_Vector_implE", !25, i64 0}
!25 = !{!"_ZTSNSt12_Vector_baseIP7CGenomeSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!26 = !{!10, !12, i64 152}
!27 = !{!10, !21, i64 160}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
define dso_local void @_ZN8CSpecies16AgeOneGenerationEv(ptr nocapture noundef nonnull align 8 dereferenceable(168) %0) local_unnamed_addr #0 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 152
  %3 = load <2 x i32>, ptr %2, align 8, !tbaa !5
  %4 = add nsw <2 x i32> %3, <i32 1, i32 1>
  store <2 x i32> %4, ptr %2, align 8, !tbaa !5
  %5 = getelementptr inbounds i8, ptr %0, i64 160
  store double 0.000000e+00, ptr %5, align 8, !tbaa !9
  ret void
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !21, i64 160}
!10 = !{!"_ZTS8CSpecies", !11, i64 0, !22, i64 112, !6, i64 136, !21, i64 144, !6, i64 152, !6, i64 156, !21, i64 160}
!11 = !{!"_ZTS7CGenome", !6, i64 0, !12, i64 8, !17, i64 32, !16, i64 56, !6, i64 64, !21, i64 72, !21, i64 80, !21, i64 88, !6, i64 96, !6, i64 100, !6, i64 104}
!12 = !{!"_ZTSSt6vectorI11SNeuronGeneSaIS0_EE", !13, i64 0}
!13 = !{!"_ZTSSt12_Vector_baseI11SNeuronGeneSaIS0_EE", !14, i64 0}
!14 = !{!"_ZTSNSt12_Vector_baseI11SNeuronGeneSaIS0_EE12_Vector_implE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseI11SNeuronGeneSaIS0_EE17_Vector_impl_dataE", !16, i64 0, !16, i64 8, !16, i64 16}
!16 = !{!"any pointer", !7, i64 0}
!17 = !{!"_ZTSSt6vectorI9SLinkGeneSaIS0_EE", !18, i64 0}
!18 = !{!"_ZTSSt12_Vector_baseI9SLinkGeneSaIS0_EE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseI9SLinkGeneSaIS0_EE12_Vector_implE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseI9SLinkGeneSaIS0_EE17_Vector_impl_dataE", !16, i64 0, !16, i64 8, !16, i64 16}
!21 = !{!"double", !7, i64 0}
!22 = !{!"_ZTSSt6vectorIP7CGenomeSaIS1_EE", !23, i64 0}
!23 = !{!"_ZTSSt12_Vector_baseIP7CGenomeSaIS1_EE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseIP7CGenomeSaIS1_EE12_Vector_implE", !25, i64 0}
!25 = !{!"_ZTSNSt12_Vector_baseIP7CGenomeSaIS1_EE17_Vector_impl_dataE", !16, i64 0, !16, i64 8, !16, i64 16}


; Effective O3 passes: GlobalOptPass,InstCombinePass,PostOrderFunctionAttrsPass,SLPVectorizerPass,SROAPass