; LLVM IR from gem5/gem5 :: ext/softfloat (f128M_to_f32)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.float32_t = type { i32 }
%struct.commonNaN = type { i8 }
%union.ui32_f32 = type { i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @f128M_to_f32(ptr noundef %0) #0 {
  %2 = alloca %struct.float32_t, align 4
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i8, align 1
  %7 = alloca i32, align 4
  %8 = alloca i64, align 8
  %9 = alloca %struct.commonNaN, align 1
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca %union.ui32_f32, align 4
  %13 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #5
  call void @llvm.lifetime.start.p0(i64 1, ptr %6) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #5
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #5
  %14 = load ptr, ptr %3, align 8, !tbaa !5
  store ptr %14, ptr %4, align 8, !tbaa !5
  %15 = load ptr, ptr %4, align 8, !tbaa !5
  %16 = getelementptr inbounds i32, ptr %15, i64 3
  %17 = load i32, ptr %16, align 4, !tbaa !9
  store i32 %17, ptr %5, align 4, !tbaa !9
  %18 = load i32, ptr %5, align 4, !tbaa !9
  %19 = lshr i32 %18, 31
  %20 = icmp ne i32 %19, 0
  %21 = zext i1 %20 to i8
  store i8 %21, ptr %6, align 1, !tbaa !11
  %22 = load i32, ptr %5, align 4, !tbaa !9
  %23 = lshr i32 %22, 16
  %24 = and i32 %23, 32767
  store i32 %24, ptr %7, align 4, !tbaa !9
  %25 = load i32, ptr %5, align 4, !tbaa !9
  %26 = and i32 %25, 65535
  %27 = zext i32 %26 to i64
  %28 = shl i64 %27, 32
  %29 = load ptr, ptr %4, align 8, !tbaa !5
  %30 = getelementptr inbounds i32, ptr %29, i64 2
  %31 = load i32, ptr %30, align 4, !tbaa !9
  %32 = zext i32 %31 to i64
  %33 = or i64 %28, %32
  %34 = load ptr, ptr %4, align 8, !tbaa !5
  %35 = getelementptr inbounds i32, ptr %34, i64 1
  %36 = load i32, ptr %35, align 4, !tbaa !9
  %37 = load ptr, ptr %4, align 8, !tbaa !5
  %38 = getelementptr inbounds i32, ptr %37, i64 0
  %39 = load i32, ptr %38, align 4, !tbaa !9
  %40 = or i32 %36, %39
  %41 = icmp ne i32 %40, 0
  %42 = zext i1 %41 to i32
  %43 = sext i32 %42 to i64
  %44 = or i64 %33, %43
  store i64 %44, ptr %8, align 8, !tbaa !13
  %45 = load i32, ptr %7, align 4, !tbaa !9
  %46 = icmp eq i32 %45, 32767
  br i1 %46, label %47, label %67

47:                                               ; preds = %1
  %48 = load i64, ptr %8, align 8, !tbaa !13
  %49 = icmp ne i64 %48, 0
  br i1 %49, label %50, label %59

50:                                               ; preds = %47
  %51 = load ptr, ptr %4, align 8, !tbaa !5
  %52 = getelementptr inbounds i32, ptr %51, i64 3
  %53 = load i32, ptr %52, align 4, !tbaa !9
  %54 = zext i32 %53 to i64
  %55 = and i64 %54, 140737488355328
  %56 = icmp ne i64 %55, 0
  br i1 %56, label %58, label %57

57:                                               ; preds = %50
  call void @softfloat_raiseFlags(i8 noundef zeroext 16)
  br label %58

58:                                               ; preds = %57, %50
  store i32 2143289344, ptr %10, align 4, !tbaa !9
  br label %66

59:                                               ; preds = %47
  %60 = load i8, ptr %6, align 1, !tbaa !11, !range !15, !noundef !16
  %61 = trunc i8 %60 to i1
  %62 = zext i1 %61 to i32
  %63 = shl i32 %62, 31
  %64 = add i32 %63, 2139095040
  %65 = add i32 %64, 0
  store i32 %65, ptr %10, align 4, !tbaa !9
  br label %66

66:                                               ; preds = %59, %58
  br label %94

67:                                               ; preds = %1
  %68 = load i64, ptr %8, align 8, !tbaa !13
  %69 = call i64 @softfloat_shortShiftRightJam64(i64 noundef %68, i8 noundef zeroext 18)
  %70 = trunc i64 %69 to i32
  store i32 %70, ptr %11, align 4, !tbaa !9
  %71 = load i32, ptr %7, align 4, !tbaa !9
  %72 = load i32, ptr %11, align 4, !tbaa !9
  %73 = or i32 %71, %72
  %74 = icmp ne i32 %73, 0
  br i1 %74, label %82, label %75

75:                                               ; preds = %67
  %76 = load i8, ptr %6, align 1, !tbaa !11, !range !15, !noundef !16
  %77 = trunc i8 %76 to i1
  %78 = zext i1 %77 to i32
  %79 = shl i32 %78, 31
  %80 = add i32 %79, 0
  %81 = add i32 %80, 0
  store i32 %81, ptr %10, align 4, !tbaa !9
  br label %94

82:                                               ; preds = %67
  %83 = load i32, ptr %7, align 4, !tbaa !9
  %84 = sub nsw i32 %83, 16257
  store i32 %84, ptr %7, align 4, !tbaa !9
  %85 = load i8, ptr %6, align 1, !tbaa !11, !range !15, !noundef !16
  %86 = trunc i8 %85 to i1
  %87 = load i32, ptr %7, align 4, !tbaa !9
  %88 = sext i32 %87 to i64
  %89 = load i32, ptr %11, align 4, !tbaa !9
  %90 = or i32 %89, 1073741824
  %91 = zext i32 %90 to i64
  %92 = call i32 @softfloat_roundPackToF32(i1 noundef zeroext %86, i64 noundef %88, i64 noundef %91)
  %93 = getelementptr inbounds %struct.float32_t, ptr %2, i32 0, i32 0
  store i32 %92, ptr %93, align 4
  store i32 1, ptr %13, align 4
  br label %96

94:                                               ; preds = %75, %66
  %95 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %95, ptr %12, align 4, !tbaa !17
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %2, ptr align 4 %12, i64 4, i1 false), !tbaa.struct !18
  store i32 1, ptr %13, align 4
  br label %96

96:                                               ; preds = %94, %82
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #5
  %97 = getelementptr inbounds %struct.float32_t, ptr %2, i32 0, i32 0
  %98 = load i32, ptr %97, align 4
  ret i32 %98
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @softfloat_raiseFlags(i8 noundef zeroext) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden i64 @softfloat_shortShiftRightJam64(i64 noundef, i8 noundef zeroext) #3

declare i32 @softfloat_roundPackToF32(i1 noundef zeroext, i64 noundef, i64 noundef) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"_Bool", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"long", !7, i64 0}
!15 = !{i8 0, i8 2}
!16 = !{}
!17 = !{!7, !7, i64 0}
!18 = !{i64 0, i64 4, !9}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i32 @f128M_to_f32(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
  %2 = getelementptr inbounds i8, ptr %0, i64 12
  %3 = load i32, ptr %2, align 4, !tbaa !5
  %4 = icmp slt i32 %3, 0
  %5 = lshr i32 %3, 16
  %6 = and i32 %5, 32767
  %7 = and i32 %3, 65535
  %8 = zext nneg i32 %7 to i64
  %9 = shl nuw nsw i64 %8, 32
  %10 = getelementptr inbounds i8, ptr %0, i64 8
  %11 = load i32, ptr %10, align 4, !tbaa !5
  %12 = zext i32 %11 to i64
  %13 = or disjoint i64 %9, %12
  %14 = getelementptr inbounds i8, ptr %0, i64 4
  %15 = load i32, ptr %14, align 4, !tbaa !5
  %16 = load i32, ptr %0, align 4, !tbaa !5
  %17 = or i32 %16, %15
  %18 = icmp ne i32 %17, 0
  %19 = zext i1 %18 to i64
  %20 = or i64 %13, %19
  %21 = icmp eq i32 %6, 32767
  br i1 %21, label %22, label %26

22:                                               ; preds = %1
  %.not23 = icmp eq i64 %20, 0
  br i1 %.not23, label %24, label %23

23:                                               ; preds = %22
  tail call void @softfloat_raiseFlags(i8 noundef zeroext 16) #3
  br label %37

24:                                               ; preds = %22
  %.lobit24 = and i32 %3, -2147483648
  %25 = or disjoint i32 %.lobit24, 2139095040
  br label %37

26:                                               ; preds = %1
  %27 = tail call i64 @softfloat_shortShiftRightJam64(i64 noundef %20, i8 noundef zeroext 18)
  %28 = trunc i64 %27 to i32
  %29 = or i32 %6, %28
  %.not = icmp eq i32 %29, 0
  br i1 %.not, label %30, label %31

30:                                               ; preds = %26
  %.lobit = and i32 %3, -2147483648
  br label %37

31:                                               ; preds = %26
  %32 = add nsw i32 %6, -16257
  %33 = sext i32 %32 to i64
  %34 = and i64 %27, 3221225471
  %35 = or disjoint i64 %34, 1073741824
  %36 = tail call i32 @softfloat_roundPackToF32(i1 noundef zeroext %4, i64 noundef %33, i64 noundef %35) #3
  br label %37

37:                                               ; preds = %30, %24, %23, %31
  %.sroa.021.0 = phi i32 [ %36, %31 ], [ 2143289344, %23 ], [ %25, %24 ], [ %.lobit, %30 ]
  ret i32 %.sroa.021.0
}

declare void @softfloat_raiseFlags(i8 noundef zeroext) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i64 @softfloat_shortShiftRightJam64(i64 noundef, i8 noundef zeroext) local_unnamed_addr #2

declare i32 @softfloat_roundPackToF32(i1 noundef zeroext, i64 noundef, i64 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass