; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Bus/Scsi (ScsiDiskIsMediaError)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.EFI_SCSI_SENSE_DATA = type { i8, i8, i8, [4 x i8], i8, [4 x i8], i8, i8, i8, [3 x i8] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local zeroext i8 @ScsiDiskIsMediaError(ptr noundef %0, i64 noundef %1) #1 {
  %3 = alloca ptr, align 8
  %4 = alloca i64, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i64, align 8
  %7 = alloca i8, align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i64 %1, ptr %4, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #2
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #2
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #2
  store i8 0, ptr %7, align 1, !tbaa !11
  %8 = load ptr, ptr %3, align 8, !tbaa !5
  store ptr %8, ptr %5, align 8, !tbaa !5
  store i64 0, ptr %6, align 8, !tbaa !9
  br label %9

9:                                                ; preds = %39, %2
  %10 = load i64, ptr %6, align 8, !tbaa !9
  %11 = load i64, ptr %4, align 8, !tbaa !9
  %12 = icmp ult i64 %10, %11
  br i1 %12, label %13, label %42

13:                                               ; preds = %9
  %14 = load ptr, ptr %5, align 8, !tbaa !5
  %15 = getelementptr inbounds %struct.EFI_SCSI_SENSE_DATA, ptr %14, i32 0, i32 2
  %16 = load i8, ptr %15, align 1
  %17 = and i8 %16, 15
  %18 = zext i8 %17 to i32
  switch i32 %18, label %35 [
    i32 3, label %19
    i32 2, label %27
  ]

19:                                               ; preds = %13
  %20 = load ptr, ptr %5, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.EFI_SCSI_SENSE_DATA, ptr %20, i32 0, i32 6
  %22 = load i8, ptr %21, align 1, !tbaa !12
  %23 = zext i8 %22 to i32
  switch i32 %23, label %25 [
    i32 16, label %24
    i32 17, label %24
    i32 20, label %24
    i32 48, label %24
  ]

24:                                               ; preds = %19, %19, %19, %19
  store i8 1, ptr %7, align 1, !tbaa !11
  br label %26

25:                                               ; preds = %19
  br label %26

26:                                               ; preds = %25, %24
  br label %36

27:                                               ; preds = %13
  %28 = load ptr, ptr %5, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.EFI_SCSI_SENSE_DATA, ptr %28, i32 0, i32 6
  %30 = load i8, ptr %29, align 1, !tbaa !12
  %31 = zext i8 %30 to i32
  switch i32 %31, label %33 [
    i32 6, label %32
  ]

32:                                               ; preds = %27
  store i8 1, ptr %7, align 1, !tbaa !11
  br label %34

33:                                               ; preds = %27
  br label %34

34:                                               ; preds = %33, %32
  br label %36

35:                                               ; preds = %13
  br label %36

36:                                               ; preds = %35, %34, %26
  %37 = load ptr, ptr %5, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.EFI_SCSI_SENSE_DATA, ptr %37, i32 1
  store ptr %38, ptr %5, align 8, !tbaa !5
  br label %39

39:                                               ; preds = %36
  %40 = load i64, ptr %6, align 8, !tbaa !9
  %41 = add i64 %40, 1
  store i64 %41, ptr %6, align 8, !tbaa !9
  br label %9, !llvm.loop !14

42:                                               ; preds = %9
  %43 = load i8, ptr %7, align 1, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #2
  ret i8 %43
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !7, i64 12}
!13 = !{!"", !7, i64 0, !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 2, !7, i64 2, !7, i64 2, !7, i64 3, !7, i64 7, !7, i64 8, !7, i64 12, !7, i64 13, !7, i64 14, !7, i64 15}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nosync nounwind memory(read, inaccessiblemem: none) uwtable
define dso_local zeroext range(i8 0, 2) i8 @ScsiDiskIsMediaError(ptr nocapture noundef readonly %0, i64 noundef %1) local_unnamed_addr #0 {
  %.not = icmp eq i64 %1, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %2
  %xtraiter = and i64 %1, 1
  %3 = icmp eq i64 %1, 1
  br i1 %3, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph.preheader.new

.lr.ph.preheader.new:                             ; preds = %.lr.ph.preheader
  %unroll_iter = and i64 %1, -2
  br label %.lr.ph

.lr.ph:                                           ; preds = %24, %.lr.ph.preheader.new
  %.012 = phi i8 [ 0, %.lr.ph.preheader.new ], [ %.1.1, %24 ]
  %.0910 = phi ptr [ %0, %.lr.ph.preheader.new ], [ %25, %24 ]
  %niter = phi i64 [ 0, %.lr.ph.preheader.new ], [ %niter.next.1, %24 ]
  %4 = getelementptr inbounds i8, ptr %.0910, i64 2
  %5 = load i8, ptr %4, align 1
  %6 = and i8 %5, 15
  switch i8 %6, label %.lr.ph.1 [
    i8 3, label %7
    i8 2, label %11
  ]

7:                                                ; preds = %.lr.ph
  %8 = getelementptr inbounds i8, ptr %.0910, i64 12
  %9 = load i8, ptr %8, align 1, !tbaa !5
  switch i8 %9, label %.lr.ph.1 [
    i8 16, label %10
    i8 17, label %10
    i8 20, label %10
    i8 48, label %10
  ]

10:                                               ; preds = %7, %7, %7, %7
  br label %.lr.ph.1

11:                                               ; preds = %.lr.ph
  %12 = getelementptr inbounds i8, ptr %.0910, i64 12
  %13 = load i8, ptr %12, align 1, !tbaa !5
  %cond = icmp eq i8 %13, 6
  %spec.select = select i1 %cond, i8 1, i8 %.012
  br label %.lr.ph.1

.lr.ph.1:                                         ; preds = %11, %.lr.ph, %10, %7
  %.1 = phi i8 [ %.012, %.lr.ph ], [ %.012, %7 ], [ 1, %10 ], [ %spec.select, %11 ]
  %14 = getelementptr inbounds i8, ptr %.0910, i64 20
  %15 = load i8, ptr %14, align 1
  %16 = and i8 %15, 15
  switch i8 %16, label %24 [
    i8 3, label %20
    i8 2, label %17
  ]

17:                                               ; preds = %.lr.ph.1
  %18 = getelementptr inbounds i8, ptr %.0910, i64 30
  %19 = load i8, ptr %18, align 1, !tbaa !5
  %cond.1 = icmp eq i8 %19, 6
  %spec.select.1 = select i1 %cond.1, i8 1, i8 %.1
  br label %24

20:                                               ; preds = %.lr.ph.1
  %21 = getelementptr inbounds i8, ptr %.0910, i64 30
  %22 = load i8, ptr %21, align 1, !tbaa !5
  switch i8 %22, label %24 [
    i8 16, label %23
    i8 17, label %23
    i8 20, label %23
    i8 48, label %23
  ]

23:                                               ; preds = %20, %20, %20, %20
  br label %24

24:                                               ; preds = %23, %20, %17, %.lr.ph.1
  %.1.1 = phi i8 [ %.1, %.lr.ph.1 ], [ %.1, %20 ], [ 1, %23 ], [ %spec.select.1, %17 ]
  %25 = getelementptr inbounds i8, ptr %.0910, i64 36
  %niter.next.1 = add i64 %niter, 2
  %niter.ncmp.1 = icmp eq i64 %niter.next.1, %unroll_iter
  br i1 %niter.ncmp.1, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph, !llvm.loop !9

._crit_edge.loopexit.unr-lcssa:                   ; preds = %24, %.lr.ph.preheader
  %.1.lcssa.ph = phi i8 [ poison, %.lr.ph.preheader ], [ %.1.1, %24 ]
  %.012.unr = phi i8 [ 0, %.lr.ph.preheader ], [ %.1.1, %24 ]
  %.0910.unr = phi ptr [ %0, %.lr.ph.preheader ], [ %25, %24 ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge, label %.lr.ph.epil

.lr.ph.epil:                                      ; preds = %._crit_edge.loopexit.unr-lcssa
  %26 = getelementptr inbounds i8, ptr %.0910.unr, i64 2
  %27 = load i8, ptr %26, align 1
  %28 = and i8 %27, 15
  switch i8 %28, label %._crit_edge [
    i8 3, label %32
    i8 2, label %29
  ]

29:                                               ; preds = %.lr.ph.epil
  %30 = getelementptr inbounds i8, ptr %.0910.unr, i64 12
  %31 = load i8, ptr %30, align 1, !tbaa !5
  %cond.epil = icmp eq i8 %31, 6
  %spec.select.epil = select i1 %cond.epil, i8 1, i8 %.012.unr
  br label %._crit_edge

32:                                               ; preds = %.lr.ph.epil
  %33 = getelementptr inbounds i8, ptr %.0910.unr, i64 12
  %34 = load i8, ptr %33, align 1, !tbaa !5
  switch i8 %34, label %._crit_edge [
    i8 16, label %35
    i8 17, label %35
    i8 20, label %35
    i8 48, label %35
  ]

35:                                               ; preds = %32, %32, %32, %32
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit.unr-lcssa, %35, %32, %29, %.lr.ph.epil, %2
  %.0.lcssa = phi i8 [ 0, %2 ], [ %.1.lcssa.ph, %._crit_edge.loopexit.unr-lcssa ], [ %.012.unr, %.lr.ph.epil ], [ %.012.unr, %32 ], [ 1, %35 ], [ %spec.select.epil, %29 ]
  ret i8 %.0.lcssa
}

attributes #0 = { nofree norecurse nosync nounwind memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 12}
!6 = !{!"", !7, i64 0, !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 2, !7, i64 2, !7, i64 2, !7, i64 3, !7, i64 7, !7, i64 8, !7, i64 12, !7, i64 13, !7, i64 14, !7, i64 15}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass