; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/kernel/sc_module_name.ll (ZN7sc_core14sc_module_nameC2EPKc)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_core::sc_module_name" = type <{ ptr, ptr, ptr, ptr, i8, [7 x i8] }>

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core14sc_module_nameC2EPKc(ptr noundef nonnull align 8 dereferenceable(33) %0, ptr noundef %1) unnamed_addr #0 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %5 = load ptr, ptr %3, align 8
  %6 = getelementptr inbounds %"class.sc_core::sc_module_name", ptr %5, i32 0, i32 0
  %7 = load ptr, ptr %4, align 8, !tbaa !5
  store ptr %7, ptr %6, align 8, !tbaa !9
  %8 = getelementptr inbounds %"class.sc_core::sc_module_name", ptr %5, i32 0, i32 1
  store ptr null, ptr %8, align 8, !tbaa !12
  %9 = getelementptr inbounds %"class.sc_core::sc_module_name", ptr %5, i32 0, i32 2
  store ptr null, ptr %9, align 8, !tbaa !13
  %10 = getelementptr inbounds %"class.sc_core::sc_module_name", ptr %5, i32 0, i32 3
  %11 = call noundef ptr @_ZN7sc_core22sc_get_curr_simcontextEv()
  store ptr %11, ptr %10, align 8, !tbaa !14
  %12 = getelementptr inbounds %"class.sc_core::sc_module_name", ptr %5, i32 0, i32 4
  store i8 1, ptr %12, align 8, !tbaa !15
  %13 = getelementptr inbounds %"class.sc_core::sc_module_name", ptr %5, i32 0, i32 3
  %14 = load ptr, ptr %13, align 8, !tbaa !14
  %15 = call noundef ptr @_ZN7sc_core13sc_simcontext18get_object_managerEv(ptr noundef nonnull align 8 dereferenceable(344) %14)
  call void @_ZN7sc_core17sc_object_manager16push_module_nameEPNS_14sc_module_nameE(ptr noundef nonnull align 8 dereferenceable(105) %15, ptr noundef %5)
  ret void
}

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef ptr @_ZN7sc_core22sc_get_curr_simcontextEv() #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN7sc_core13sc_simcontext18get_object_managerEv(ptr noundef nonnull align 8 dereferenceable(344)) #2 align 2

declare void @_ZN7sc_core17sc_object_manager16push_module_nameEPNS_14sc_module_nameE(ptr noundef nonnull align 8 dereferenceable(105), ptr noundef) #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"_ZTSN7sc_core14sc_module_nameE", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !11, i64 32}
!11 = !{!"bool", !7, i64 0}
!12 = !{!10, !6, i64 8}
!13 = !{!10, !6, i64 16}
!14 = !{!10, !6, i64 24}
!15 = !{!10, !11, i64 32}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core14sc_module_nameC2EPKc(ptr noundef nonnull align 8 dereferenceable(33) %0, ptr noundef %1) unnamed_addr #0 align 2 {
  store ptr %1, ptr %0, align 8, !tbaa !5
  %3 = getelementptr inbounds i8, ptr %0, i64 8
  %4 = getelementptr inbounds i8, ptr %0, i64 24
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %3, i8 0, i64 16, i1 false)
  %5 = tail call noundef ptr @_ZN7sc_core22sc_get_curr_simcontextEv()
  store ptr %5, ptr %4, align 8, !tbaa !11
  %6 = getelementptr inbounds i8, ptr %0, i64 32
  store i8 1, ptr %6, align 8, !tbaa !12
  %7 = tail call noundef ptr @_ZN7sc_core13sc_simcontext18get_object_managerEv(ptr noundef nonnull align 8 dereferenceable(344) %5)
  tail call void @_ZN7sc_core17sc_object_manager16push_module_nameEPNS_14sc_module_nameE(ptr noundef nonnull align 8 dereferenceable(105) %7, ptr noundef nonnull %0)
  ret void
}

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef ptr @_ZN7sc_core22sc_get_curr_simcontextEv() local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN7sc_core13sc_simcontext18get_object_managerEv(ptr noundef nonnull align 8 dereferenceable(344)) local_unnamed_addr #2 align 2

declare void @_ZN7sc_core17sc_object_manager16push_module_nameEPNS_14sc_module_nameE(ptr noundef nonnull align 8 dereferenceable(105), ptr noundef) local_unnamed_addr #3

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #4

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: write) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTSN7sc_core14sc_module_nameE", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !10, i64 32}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"bool", !8, i64 0}
!11 = !{!6, !7, i64 24}
!12 = !{!6, !10, i64 32}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InstCombinePass,MemCpyOptPass,SROAPass,TailCallElimPass