; LLVM IR from gem5/gem5 :: ext/softfloat (f128M_to_i32)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i64 @f128M_to_i32(ptr noundef %0, i8 noundef zeroext %1, i1 noundef zeroext %2) #0 {
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  %6 = alloca i8, align 1
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i8, align 1
  %10 = alloca i32, align 4
  %11 = alloca i64, align 8
  %12 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i8 %1, ptr %5, align 1, !tbaa !9
  %13 = zext i1 %2 to i8
  store i8 %13, ptr %6, align 1, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  %14 = load ptr, ptr %4, align 8, !tbaa !5
  store ptr %14, ptr %7, align 8, !tbaa !5
  %15 = load ptr, ptr %7, align 8, !tbaa !5
  %16 = getelementptr inbounds i32, ptr %15, i64 3
  %17 = load i32, ptr %16, align 4, !tbaa !12
  store i32 %17, ptr %8, align 4, !tbaa !12
  %18 = load i32, ptr %8, align 4, !tbaa !12
  %19 = lshr i32 %18, 31
  %20 = icmp ne i32 %19, 0
  %21 = zext i1 %20 to i8
  store i8 %21, ptr %9, align 1, !tbaa !10
  %22 = load i32, ptr %8, align 4, !tbaa !12
  %23 = lshr i32 %22, 16
  %24 = and i32 %23, 32767
  store i32 %24, ptr %10, align 4, !tbaa !12
  %25 = load i32, ptr %8, align 4, !tbaa !12
  %26 = and i32 %25, 65535
  %27 = zext i32 %26 to i64
  %28 = shl i64 %27, 32
  %29 = load ptr, ptr %7, align 8, !tbaa !5
  %30 = getelementptr inbounds i32, ptr %29, i64 2
  %31 = load i32, ptr %30, align 4, !tbaa !12
  %32 = zext i32 %31 to i64
  %33 = or i64 %28, %32
  store i64 %33, ptr %11, align 8, !tbaa !14
  %34 = load ptr, ptr %7, align 8, !tbaa !5
  %35 = getelementptr inbounds i32, ptr %34, i64 1
  %36 = load i32, ptr %35, align 4, !tbaa !12
  %37 = load ptr, ptr %7, align 8, !tbaa !5
  %38 = getelementptr inbounds i32, ptr %37, i64 0
  %39 = load i32, ptr %38, align 4, !tbaa !12
  %40 = or i32 %36, %39
  %41 = icmp ne i32 %40, 0
  br i1 %41, label %42, label %45

42:                                               ; preds = %3
  %43 = load i64, ptr %11, align 8, !tbaa !14
  %44 = or i64 %43, 1
  store i64 %44, ptr %11, align 8, !tbaa !14
  br label %45

45:                                               ; preds = %42, %3
  %46 = load i32, ptr %10, align 4, !tbaa !12
  %47 = icmp eq i32 %46, 32767
  br i1 %47, label %48, label %52

48:                                               ; preds = %45
  %49 = load i64, ptr %11, align 8, !tbaa !14
  %50 = icmp ne i64 %49, 0
  br i1 %50, label %51, label %52

51:                                               ; preds = %48
  store i8 0, ptr %9, align 1, !tbaa !10
  br label %52

52:                                               ; preds = %51, %48, %45
  %53 = load i32, ptr %10, align 4, !tbaa !12
  %54 = icmp ne i32 %53, 0
  br i1 %54, label %55, label %58

55:                                               ; preds = %52
  %56 = load i64, ptr %11, align 8, !tbaa !14
  %57 = or i64 %56, 281474976710656
  store i64 %57, ptr %11, align 8, !tbaa !14
  br label %58

58:                                               ; preds = %55, %52
  %59 = load i32, ptr %10, align 4, !tbaa !12
  %60 = sub nsw i32 16419, %59
  store i32 %60, ptr %12, align 4, !tbaa !12
  %61 = load i32, ptr %12, align 4, !tbaa !12
  %62 = icmp slt i32 0, %61
  br i1 %62, label %63, label %68

63:                                               ; preds = %58
  %64 = load i64, ptr %11, align 8, !tbaa !14
  %65 = load i32, ptr %12, align 4, !tbaa !12
  %66 = sext i32 %65 to i64
  %67 = call i64 @softfloat_shiftRightJam64(i64 noundef %64, i64 noundef %66)
  store i64 %67, ptr %11, align 8, !tbaa !14
  br label %68

68:                                               ; preds = %63, %58
  %69 = load i8, ptr %9, align 1, !tbaa !10, !range !16, !noundef !17
  %70 = trunc i8 %69 to i1
  %71 = load i64, ptr %11, align 8, !tbaa !14
  %72 = load i8, ptr %5, align 1, !tbaa !9
  %73 = load i8, ptr %6, align 1, !tbaa !10, !range !16, !noundef !17
  %74 = trunc i8 %73 to i1
  %75 = call i64 @softfloat_roundToI32(i1 noundef zeroext %70, i64 noundef %71, i8 noundef zeroext %72, i1 noundef zeroext %74)
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #4
  ret i64 %75
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i64 @softfloat_shiftRightJam64(i64 noundef, i64 noundef) #2

declare i64 @softfloat_roundToI32(i1 noundef zeroext, i64 noundef, i8 noundef zeroext, i1 noundef zeroext) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"_Bool", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !7, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"long", !7, i64 0}
!16 = !{i8 0, i8 2}
!17 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i64 @f128M_to_i32(ptr nocapture noundef readonly %0, i8 noundef zeroext %1, i1 noundef zeroext %2) local_unnamed_addr #0 {
  %4 = getelementptr inbounds i8, ptr %0, i64 12
  %5 = load i32, ptr %4, align 4, !tbaa !5
  %6 = lshr i32 %5, 16
  %7 = and i32 %6, 32767
  %8 = and i32 %5, 65535
  %9 = zext nneg i32 %8 to i64
  %10 = shl nuw nsw i64 %9, 32
  %11 = getelementptr inbounds i8, ptr %0, i64 8
  %12 = load i32, ptr %11, align 4, !tbaa !5
  %13 = zext i32 %12 to i64
  %14 = or disjoint i64 %10, %13
  %15 = getelementptr inbounds i8, ptr %0, i64 4
  %16 = load i32, ptr %15, align 4, !tbaa !5
  %17 = load i32, ptr %0, align 4, !tbaa !5
  %18 = or i32 %17, %16
  %.not = icmp ne i32 %18, 0
  %19 = zext i1 %.not to i64
  %spec.select = or i64 %14, %19
  %.not23 = icmp eq i32 %7, 0
  %20 = or disjoint i64 %spec.select, 281474976710656
  %spec.select24 = select i1 %.not23, i64 %spec.select, i64 %20
  %21 = icmp ult i32 %7, 16419
  br i1 %21, label %22, label %26

22:                                               ; preds = %3
  %23 = sub nuw nsw i32 16419, %7
  %24 = zext nneg i32 %23 to i64
  %25 = tail call i64 @softfloat_shiftRightJam64(i64 noundef %spec.select24, i64 noundef %24)
  br label %26

26:                                               ; preds = %22, %3
  %.2 = phi i64 [ %25, %22 ], [ %spec.select24, %3 ]
  %27 = icmp eq i64 %spec.select, 0
  %28 = icmp ne i32 %7, 32767
  %29 = icmp slt i32 %5, 0
  %or.cond.not = select i1 %28, i1 true, i1 %27
  %spec.select25 = and i1 %29, %or.cond.not
  %30 = tail call i64 @softfloat_roundToI32(i1 noundef zeroext %spec.select25, i64 noundef %.2, i8 noundef zeroext %1, i1 noundef zeroext %2) #3
  ret i64 %30
}

; Function Attrs: inlinehint nounwind uwtable
declare hidden i64 @softfloat_shiftRightJam64(i64 noundef, i64 noundef) local_unnamed_addr #1

declare i64 @softfloat_roundToI32(i1 noundef zeroext, i64 noundef, i8 noundef zeroext, i1 noundef zeroext) local_unnamed_addr #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass