; LLVM IR from gem5/gem5 :: ext/mcpat/cacti/basic_circuit.ll (Z10cmos_Ileakddbbb)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.TechnologyParameter = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, i64, %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::ScalingFactor", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType" }
%"class.TechnologyParameter::DeviceType" = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::InterconnectType" = type { double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::ScalingFactor" = type { double, double, double }
%"class.TechnologyParameter::MemoryType" = type { double, double, double, double, double, double }

@g_tp = external global %class.TechnologyParameter, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef double @_Z10cmos_Ileakddbbb(double noundef %0, double noundef %1, i1 noundef zeroext %2, i1 noundef zeroext %3, i1 noundef zeroext %4) #2 {
  %6 = alloca double, align 8
  %7 = alloca double, align 8
  %8 = alloca i8, align 1
  %9 = alloca i8, align 1
  %10 = alloca i8, align 1
  %11 = alloca ptr, align 8
  store double %0, ptr %6, align 8, !tbaa !5
  store double %1, ptr %7, align 8, !tbaa !5
  %12 = zext i1 %2 to i8
  store i8 %12, ptr %8, align 1, !tbaa !9
  %13 = zext i1 %3 to i8
  store i8 %13, ptr %9, align 1, !tbaa !9
  %14 = zext i1 %4 to i8
  store i8 %14, ptr %10, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  %15 = load i8, ptr %8, align 1, !tbaa !9, !range !11, !noundef !12
  %16 = trunc i8 %15 to i1
  br i1 %16, label %21, label %17

17:                                               ; preds = %5
  %18 = load i8, ptr %9, align 1, !tbaa !9, !range !11, !noundef !12
  %19 = trunc i8 %18 to i1
  br i1 %19, label %20, label %21

20:                                               ; preds = %17
  store ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 45), ptr %11, align 8, !tbaa !13
  br label %30

21:                                               ; preds = %17, %5
  %22 = load i8, ptr %8, align 1, !tbaa !9, !range !11, !noundef !12
  %23 = trunc i8 %22 to i1
  br i1 %23, label %24, label %28

24:                                               ; preds = %21
  %25 = load i8, ptr %10, align 1, !tbaa !9, !range !11, !noundef !12
  %26 = trunc i8 %25 to i1
  br i1 %26, label %27, label %28

27:                                               ; preds = %24
  store ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 47), ptr %11, align 8, !tbaa !13
  br label %29

28:                                               ; preds = %24, %21
  store ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 48), ptr %11, align 8, !tbaa !13
  br label %29

29:                                               ; preds = %28, %27
  br label %30

30:                                               ; preds = %29, %20
  %31 = load double, ptr %6, align 8, !tbaa !5
  %32 = load ptr, ptr %11, align 8, !tbaa !13
  %33 = getelementptr inbounds %"class.TechnologyParameter::DeviceType", ptr %32, i32 0, i32 13
  %34 = load double, ptr %33, align 8, !tbaa !15
  %35 = load double, ptr %7, align 8, !tbaa !5
  %36 = load ptr, ptr %11, align 8, !tbaa !13
  %37 = getelementptr inbounds %"class.TechnologyParameter::DeviceType", ptr %36, i32 0, i32 14
  %38 = load double, ptr %37, align 8, !tbaa !17
  %39 = fmul double %35, %38
  %40 = call double @llvm.fmuladd.f64(double %31, double %34, double %39)
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  ret double %40
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{i8 0, i8 2}
!12 = !{}
!13 = !{!14, !14, i64 0}
!14 = !{!"any pointer", !7, i64 0}
!15 = !{!16, !6, i64 104}
!16 = !{!"_ZTSN19TechnologyParameter10DeviceTypeE", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !6, i64 120, !6, i64 128, !6, i64 136, !6, i64 144, !6, i64 152, !6, i64 160}
!17 = !{!16, !6, i64 112}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.TechnologyParameter = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, i64, %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::ScalingFactor", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType" }
%"class.TechnologyParameter::DeviceType" = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::InterconnectType" = type { double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::ScalingFactor" = type { double, double, double }
%"class.TechnologyParameter::MemoryType" = type { double, double, double, double, double, double }

@g_tp = external local_unnamed_addr global %class.TechnologyParameter, align 8

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #0

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable
define dso_local noundef double @_Z10cmos_Ileakddbbb(double noundef %0, double noundef %1, i1 noundef zeroext %2, i1 noundef zeroext %3, i1 noundef zeroext %4) local_unnamed_addr #1 {
  %.not = xor i1 %3, true
  %brmerge = or i1 %.not, %2
  %brmerge9.demorgan = and i1 %2, %4
  %spec.select = select i1 %brmerge9.demorgan, ptr getelementptr inbounds (i8, ptr @g_tp, i64 696), ptr getelementptr inbounds (i8, ptr @g_tp, i64 864)
  %.0 = select i1 %brmerge, ptr %spec.select, ptr getelementptr inbounds (i8, ptr @g_tp, i64 360)
  %6 = getelementptr inbounds i8, ptr %.0, i64 104
  %7 = load double, ptr %6, align 8, !tbaa !5
  %8 = getelementptr inbounds i8, ptr %.0, i64 112
  %9 = load double, ptr %8, align 8, !tbaa !10
  %10 = fmul double %9, %1
  %11 = tail call double @llvm.fmuladd.f64(double %0, double %7, double %10)
  ret double %11
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #1 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 104}
!6 = !{!"_ZTSN19TechnologyParameter10DeviceTypeE", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 32, !7, i64 40, !7, i64 48, !7, i64 56, !7, i64 64, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !7, i64 120, !7, i64 128, !7, i64 136, !7, i64 144, !7, i64 152, !7, i64 160}
!7 = !{!"double", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!6, !7, i64 112}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass