; LLVM IR from gem5/gem5 :: ext/mcpat/cacti/decoder.ll (ZN9PredecBlk12compute_areaEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.TechnologyParameter = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, i64, %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::ScalingFactor", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType" }
%"class.TechnologyParameter::DeviceType" = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::InterconnectType" = type { double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::ScalingFactor" = type { double, double, double }
%"class.TechnologyParameter::MemoryType" = type { double, double, double, double, double, double }
%class.PredecBlk = type <{ %class.Component, ptr, i8, [3 x i8], i32, double, double, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, [20 x double], [20 x double], [20 x double], [20 x double], [20 x double], [20 x double], double, double, %class.powerDef, %class.powerDef, %class.powerDef, i8, [7 x i8] }>
%class.Component = type { %class.Area, %class.powerDef, %class.powerDef, double, double }
%class.Area = type { double, double, double }
%class.powerDef = type { %class.powerComponents, %class.powerComponents, %class.powerComponents }
%class.powerComponents = type { double, double, double, double, double }

@g_tp = external global %class.TechnologyParameter, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare noundef double @_ZN9Component17compute_gate_areaEiiddd(ptr noundef nonnull align 8 dereferenceable(280), i32 noundef, i32 noundef, double noundef, double noundef, double noundef) #1

declare noundef double @_Z17cmos_Isub_leakageddi9Gate_typebbb17Half_net_topology(double noundef, double noundef, i32 noundef, i32 noundef, i1 noundef zeroext, i1 noundef zeroext, i1 noundef zeroext, i32 noundef) #1

declare noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef, double noundef, i32 noundef, i32 noundef, i1 noundef zeroext, i1 noundef zeroext, i1 noundef zeroext, i32 noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN9PredecBlk12compute_areaEv(ptr noundef nonnull align 8 dereferenceable(1697) %0) #2 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca double, align 8
  %7 = alloca double, align 8
  %8 = alloca double, align 8
  %9 = alloca double, align 8
  %10 = alloca double, align 8
  %11 = alloca double, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca double, align 8
  %15 = alloca double, align 8
  %16 = alloca double, align 8
  %17 = alloca double, align 8
  %18 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  %19 = load ptr, ptr %2, align 8
  %20 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 2
  %21 = load i8, ptr %20, align 8, !tbaa !9, !range !18, !noundef !19
  %22 = trunc i8 %21 to i1
  br i1 %22, label %23, label %428

23:                                               ; preds = %1
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  store i32 0, ptr %3, align 4, !tbaa !20
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  store i32 0, ptr %4, align 4, !tbaa !20
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  store i32 0, ptr %5, align 4, !tbaa !20
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #4
  store double 0.000000e+00, ptr %6, align 8, !tbaa !21
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #4
  store double 0.000000e+00, ptr %7, align 8, !tbaa !21
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #4
  store double 0.000000e+00, ptr %8, align 8, !tbaa !21
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #4
  %24 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 21
  %25 = getelementptr inbounds [20 x double], ptr %24, i64 0, i64 0
  %26 = load double, ptr %25, align 8, !tbaa !21
  %27 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 20
  %28 = getelementptr inbounds [20 x double], ptr %27, i64 0, i64 0
  %29 = load double, ptr %28, align 8, !tbaa !21
  %30 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 39), align 8, !tbaa !22
  %31 = call noundef double @_ZN9Component17compute_gate_areaEiiddd(ptr noundef nonnull align 8 dereferenceable(280) %19, i32 noundef 2, i32 noundef 2, double noundef %26, double noundef %29, double noundef %30)
  store double %31, ptr %9, align 8, !tbaa !21
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #4
  %32 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 20
  %33 = getelementptr inbounds [20 x double], ptr %32, i64 0, i64 0
  %34 = load double, ptr %33, align 8, !tbaa !21
  %35 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 21
  %36 = getelementptr inbounds [20 x double], ptr %35, i64 0, i64 0
  %37 = load double, ptr %36, align 8, !tbaa !21
  %38 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 31
  %39 = load i8, ptr %38, align 8, !tbaa !29, !range !18, !noundef !19
  %40 = trunc i8 %39 to i1
  %41 = call noundef double @_Z17cmos_Isub_leakageddi9Gate_typebbb17Half_net_topology(double noundef %34, double noundef %37, i32 noundef 2, i32 noundef 3, i1 noundef zeroext %40, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  store double %41, ptr %10, align 8, !tbaa !21
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #4
  %42 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 20
  %43 = getelementptr inbounds [20 x double], ptr %42, i64 0, i64 0
  %44 = load double, ptr %43, align 8, !tbaa !21
  %45 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 21
  %46 = getelementptr inbounds [20 x double], ptr %45, i64 0, i64 0
  %47 = load double, ptr %46, align 8, !tbaa !21
  %48 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 31
  %49 = load i8, ptr %48, align 8, !tbaa !29, !range !18, !noundef !19
  %50 = trunc i8 %49 to i1
  %51 = call noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef %44, double noundef %47, i32 noundef 2, i32 noundef 3, i1 noundef zeroext %50, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  store double %51, ptr %11, align 8, !tbaa !21
  %52 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 12
  %53 = load i32, ptr %52, align 8, !tbaa !30
  %54 = icmp ne i32 %53, 3
  br i1 %54, label %55, label %56

55:                                               ; preds = %23
  store double 0.000000e+00, ptr %6, align 8, !tbaa !21
  store double 0.000000e+00, ptr %7, align 8, !tbaa !21
  store double 0.000000e+00, ptr %8, align 8, !tbaa !21
  br label %79

56:                                               ; preds = %23
  %57 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 23
  %58 = getelementptr inbounds [20 x double], ptr %57, i64 0, i64 0
  %59 = load double, ptr %58, align 8, !tbaa !21
  %60 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 22
  %61 = getelementptr inbounds [20 x double], ptr %60, i64 0, i64 0
  %62 = load double, ptr %61, align 8, !tbaa !21
  %63 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 39), align 8, !tbaa !22
  %64 = call noundef double @_ZN9Component17compute_gate_areaEiiddd(ptr noundef nonnull align 8 dereferenceable(280) %19, i32 noundef 2, i32 noundef 3, double noundef %59, double noundef %62, double noundef %63)
  store double %64, ptr %6, align 8, !tbaa !21
  %65 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 22
  %66 = getelementptr inbounds [20 x double], ptr %65, i64 0, i64 0
  %67 = load double, ptr %66, align 8, !tbaa !21
  %68 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 23
  %69 = getelementptr inbounds [20 x double], ptr %68, i64 0, i64 0
  %70 = load double, ptr %69, align 8, !tbaa !21
  %71 = call noundef double @_Z17cmos_Isub_leakageddi9Gate_typebbb17Half_net_topology(double noundef %67, double noundef %70, i32 noundef 3, i32 noundef 3, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  store double %71, ptr %7, align 8, !tbaa !21
  %72 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 22
  %73 = getelementptr inbounds [20 x double], ptr %72, i64 0, i64 0
  %74 = load double, ptr %73, align 8, !tbaa !21
  %75 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 23
  %76 = getelementptr inbounds [20 x double], ptr %75, i64 0, i64 0
  %77 = load double, ptr %76, align 8, !tbaa !21
  %78 = call noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef %74, double noundef %77, i32 noundef 3, i32 noundef 3, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  store double %78, ptr %8, align 8, !tbaa !21
  br label %79

79:                                               ; preds = %56, %55
  %80 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 4
  %81 = load i32, ptr %80, align 4, !tbaa !31
  switch i32 %81, label %109 [
    i32 1, label %82
    i32 2, label %85
    i32 3, label %88
    i32 4, label %91
    i32 5, label %94
    i32 6, label %97
    i32 7, label %100
    i32 8, label %103
    i32 9, label %106
  ]

82:                                               ; preds = %79
  store i32 2, ptr %3, align 4, !tbaa !20
  store i32 0, ptr %5, align 4, !tbaa !20
  %83 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 18
  store i32 1, ptr %83, align 8, !tbaa !32
  %84 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 19
  store i32 0, ptr %84, align 4, !tbaa !33
  br label %110

85:                                               ; preds = %79
  store i32 4, ptr %3, align 4, !tbaa !20
  store i32 0, ptr %5, align 4, !tbaa !20
  %86 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 18
  store i32 1, ptr %86, align 8, !tbaa !32
  %87 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 19
  store i32 0, ptr %87, align 4, !tbaa !33
  br label %110

88:                                               ; preds = %79
  store i32 8, ptr %4, align 4, !tbaa !20
  store i32 0, ptr %5, align 4, !tbaa !20
  %89 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 18
  store i32 0, ptr %89, align 8, !tbaa !32
  %90 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 19
  store i32 1, ptr %90, align 4, !tbaa !33
  br label %110

91:                                               ; preds = %79
  store i32 8, ptr %3, align 4, !tbaa !20
  store i32 16, ptr %5, align 4, !tbaa !20
  %92 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 18
  store i32 2, ptr %92, align 8, !tbaa !32
  %93 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 19
  store i32 0, ptr %93, align 4, !tbaa !33
  br label %110

94:                                               ; preds = %79
  store i32 4, ptr %3, align 4, !tbaa !20
  store i32 8, ptr %4, align 4, !tbaa !20
  store i32 32, ptr %5, align 4, !tbaa !20
  %95 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 18
  store i32 1, ptr %95, align 8, !tbaa !32
  %96 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 19
  store i32 1, ptr %96, align 4, !tbaa !33
  br label %110

97:                                               ; preds = %79
  store i32 16, ptr %4, align 4, !tbaa !20
  store i32 64, ptr %5, align 4, !tbaa !20
  %98 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 18
  store i32 0, ptr %98, align 8, !tbaa !32
  %99 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 19
  store i32 2, ptr %99, align 4, !tbaa !33
  br label %110

100:                                              ; preds = %79
  store i32 8, ptr %3, align 4, !tbaa !20
  store i32 8, ptr %4, align 4, !tbaa !20
  store i32 128, ptr %5, align 4, !tbaa !20
  %101 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 18
  store i32 2, ptr %101, align 8, !tbaa !32
  %102 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 19
  store i32 1, ptr %102, align 4, !tbaa !33
  br label %110

103:                                              ; preds = %79
  store i32 4, ptr %3, align 4, !tbaa !20
  store i32 16, ptr %4, align 4, !tbaa !20
  store i32 256, ptr %5, align 4, !tbaa !20
  %104 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 18
  store i32 2, ptr %104, align 8, !tbaa !32
  %105 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 19
  store i32 2, ptr %105, align 4, !tbaa !33
  br label %110

106:                                              ; preds = %79
  store i32 24, ptr %4, align 4, !tbaa !20
  store i32 512, ptr %5, align 4, !tbaa !20
  %107 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 18
  store i32 0, ptr %107, align 8, !tbaa !32
  %108 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 19
  store i32 3, ptr %108, align 4, !tbaa !33
  br label %110

109:                                              ; preds = %79
  br label %110

110:                                              ; preds = %109, %106, %103, %100, %97, %94, %91, %88, %85, %82
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  store i32 1, ptr %12, align 4, !tbaa !20
  br label %111

111:                                              ; preds = %164, %110
  %112 = load i32, ptr %12, align 4, !tbaa !20
  %113 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 13
  %114 = load i32, ptr %113, align 4, !tbaa !34
  %115 = icmp slt i32 %112, %114
  br i1 %115, label %117, label %116

116:                                              ; preds = %111
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  br label %167

117:                                              ; preds = %111
  %118 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 21
  %119 = load i32, ptr %12, align 4, !tbaa !20
  %120 = sext i32 %119 to i64
  %121 = getelementptr inbounds [20 x double], ptr %118, i64 0, i64 %120
  %122 = load double, ptr %121, align 8, !tbaa !21
  %123 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 20
  %124 = load i32, ptr %12, align 4, !tbaa !20
  %125 = sext i32 %124 to i64
  %126 = getelementptr inbounds [20 x double], ptr %123, i64 0, i64 %125
  %127 = load double, ptr %126, align 8, !tbaa !21
  %128 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 39), align 8, !tbaa !22
  %129 = call noundef double @_ZN9Component17compute_gate_areaEiiddd(ptr noundef nonnull align 8 dereferenceable(280) %19, i32 noundef 0, i32 noundef 1, double noundef %122, double noundef %127, double noundef %128)
  %130 = load double, ptr %9, align 8, !tbaa !21
  %131 = fadd double %130, %129
  store double %131, ptr %9, align 8, !tbaa !21
  %132 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 20
  %133 = load i32, ptr %12, align 4, !tbaa !20
  %134 = sext i32 %133 to i64
  %135 = getelementptr inbounds [20 x double], ptr %132, i64 0, i64 %134
  %136 = load double, ptr %135, align 8, !tbaa !21
  %137 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 21
  %138 = load i32, ptr %12, align 4, !tbaa !20
  %139 = sext i32 %138 to i64
  %140 = getelementptr inbounds [20 x double], ptr %137, i64 0, i64 %139
  %141 = load double, ptr %140, align 8, !tbaa !21
  %142 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 31
  %143 = load i8, ptr %142, align 8, !tbaa !29, !range !18, !noundef !19
  %144 = trunc i8 %143 to i1
  %145 = call noundef double @_Z17cmos_Isub_leakageddi9Gate_typebbb17Half_net_topology(double noundef %136, double noundef %141, i32 noundef 2, i32 noundef 3, i1 noundef zeroext %144, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %146 = load double, ptr %10, align 8, !tbaa !21
  %147 = fadd double %146, %145
  store double %147, ptr %10, align 8, !tbaa !21
  %148 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 20
  %149 = load i32, ptr %12, align 4, !tbaa !20
  %150 = sext i32 %149 to i64
  %151 = getelementptr inbounds [20 x double], ptr %148, i64 0, i64 %150
  %152 = load double, ptr %151, align 8, !tbaa !21
  %153 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 21
  %154 = load i32, ptr %12, align 4, !tbaa !20
  %155 = sext i32 %154 to i64
  %156 = getelementptr inbounds [20 x double], ptr %153, i64 0, i64 %155
  %157 = load double, ptr %156, align 8, !tbaa !21
  %158 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 31
  %159 = load i8, ptr %158, align 8, !tbaa !29, !range !18, !noundef !19
  %160 = trunc i8 %159 to i1
  %161 = call noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef %152, double noundef %157, i32 noundef 2, i32 noundef 3, i1 noundef zeroext %160, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %162 = load double, ptr %11, align 8, !tbaa !21
  %163 = fadd double %162, %161
  store double %163, ptr %11, align 8, !tbaa !21
  br label %164

164:                                              ; preds = %117
  %165 = load i32, ptr %12, align 4, !tbaa !20
  %166 = add nsw i32 %165, 1
  store i32 %166, ptr %12, align 4, !tbaa !20
  br label %111, !llvm.loop !35

167:                                              ; preds = %116
  %168 = load i32, ptr %3, align 4, !tbaa !20
  %169 = sitofp i32 %168 to double
  %170 = load double, ptr %9, align 8, !tbaa !21
  %171 = fmul double %170, %169
  store double %171, ptr %9, align 8, !tbaa !21
  %172 = load i32, ptr %3, align 4, !tbaa !20
  %173 = sitofp i32 %172 to double
  %174 = load double, ptr %10, align 8, !tbaa !21
  %175 = fmul double %174, %173
  store double %175, ptr %10, align 8, !tbaa !21
  %176 = load i32, ptr %3, align 4, !tbaa !20
  %177 = sitofp i32 %176 to double
  %178 = load double, ptr %11, align 8, !tbaa !21
  %179 = fmul double %178, %177
  store double %179, ptr %11, align 8, !tbaa !21
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  store i32 1, ptr %13, align 4, !tbaa !20
  br label %180

180:                                              ; preds = %233, %167
  %181 = load i32, ptr %13, align 4, !tbaa !20
  %182 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 14
  %183 = load i32, ptr %182, align 8, !tbaa !37
  %184 = icmp slt i32 %181, %183
  br i1 %184, label %186, label %185

185:                                              ; preds = %180
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  br label %236

186:                                              ; preds = %180
  %187 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 23
  %188 = load i32, ptr %13, align 4, !tbaa !20
  %189 = sext i32 %188 to i64
  %190 = getelementptr inbounds [20 x double], ptr %187, i64 0, i64 %189
  %191 = load double, ptr %190, align 8, !tbaa !21
  %192 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 22
  %193 = load i32, ptr %13, align 4, !tbaa !20
  %194 = sext i32 %193 to i64
  %195 = getelementptr inbounds [20 x double], ptr %192, i64 0, i64 %194
  %196 = load double, ptr %195, align 8, !tbaa !21
  %197 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 39), align 8, !tbaa !22
  %198 = call noundef double @_ZN9Component17compute_gate_areaEiiddd(ptr noundef nonnull align 8 dereferenceable(280) %19, i32 noundef 0, i32 noundef 1, double noundef %191, double noundef %196, double noundef %197)
  %199 = load double, ptr %6, align 8, !tbaa !21
  %200 = fadd double %199, %198
  store double %200, ptr %6, align 8, !tbaa !21
  %201 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 22
  %202 = load i32, ptr %13, align 4, !tbaa !20
  %203 = sext i32 %202 to i64
  %204 = getelementptr inbounds [20 x double], ptr %201, i64 0, i64 %203
  %205 = load double, ptr %204, align 8, !tbaa !21
  %206 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 23
  %207 = load i32, ptr %13, align 4, !tbaa !20
  %208 = sext i32 %207 to i64
  %209 = getelementptr inbounds [20 x double], ptr %206, i64 0, i64 %208
  %210 = load double, ptr %209, align 8, !tbaa !21
  %211 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 31
  %212 = load i8, ptr %211, align 8, !tbaa !29, !range !18, !noundef !19
  %213 = trunc i8 %212 to i1
  %214 = call noundef double @_Z17cmos_Isub_leakageddi9Gate_typebbb17Half_net_topology(double noundef %205, double noundef %210, i32 noundef 3, i32 noundef 3, i1 noundef zeroext %213, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %215 = load double, ptr %7, align 8, !tbaa !21
  %216 = fadd double %215, %214
  store double %216, ptr %7, align 8, !tbaa !21
  %217 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 22
  %218 = load i32, ptr %13, align 4, !tbaa !20
  %219 = sext i32 %218 to i64
  %220 = getelementptr inbounds [20 x double], ptr %217, i64 0, i64 %219
  %221 = load double, ptr %220, align 8, !tbaa !21
  %222 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 23
  %223 = load i32, ptr %13, align 4, !tbaa !20
  %224 = sext i32 %223 to i64
  %225 = getelementptr inbounds [20 x double], ptr %222, i64 0, i64 %224
  %226 = load double, ptr %225, align 8, !tbaa !21
  %227 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 31
  %228 = load i8, ptr %227, align 8, !tbaa !29, !range !18, !noundef !19
  %229 = trunc i8 %228 to i1
  %230 = call noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef %221, double noundef %226, i32 noundef 3, i32 noundef 3, i1 noundef zeroext %229, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %231 = load double, ptr %8, align 8, !tbaa !21
  %232 = fadd double %231, %230
  store double %232, ptr %8, align 8, !tbaa !21
  br label %233

233:                                              ; preds = %186
  %234 = load i32, ptr %13, align 4, !tbaa !20
  %235 = add nsw i32 %234, 1
  store i32 %235, ptr %13, align 4, !tbaa !20
  br label %180, !llvm.loop !38

236:                                              ; preds = %185
  %237 = load i32, ptr %4, align 4, !tbaa !20
  %238 = sitofp i32 %237 to double
  %239 = load double, ptr %6, align 8, !tbaa !21
  %240 = fmul double %239, %238
  store double %240, ptr %6, align 8, !tbaa !21
  %241 = load i32, ptr %4, align 4, !tbaa !20
  %242 = sitofp i32 %241 to double
  %243 = load double, ptr %7, align 8, !tbaa !21
  %244 = fmul double %243, %242
  store double %244, ptr %7, align 8, !tbaa !21
  %245 = load i32, ptr %4, align 4, !tbaa !20
  %246 = sitofp i32 %245 to double
  %247 = load double, ptr %8, align 8, !tbaa !21
  %248 = fmul double %247, %246
  store double %248, ptr %8, align 8, !tbaa !21
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #4
  %249 = load double, ptr %9, align 8, !tbaa !21
  %250 = load double, ptr %6, align 8, !tbaa !21
  %251 = fadd double %249, %250
  store double %251, ptr %14, align 8, !tbaa !21
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #4
  store double 0.000000e+00, ptr %15, align 8, !tbaa !21
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #4
  store double 0.000000e+00, ptr %16, align 8, !tbaa !21
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #4
  store double 0.000000e+00, ptr %17, align 8, !tbaa !21
  %252 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 11
  %253 = load i32, ptr %252, align 4, !tbaa !39
  %254 = icmp eq i32 %253, 2
  br i1 %254, label %255, label %284

255:                                              ; preds = %236
  %256 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 25
  %257 = getelementptr inbounds [20 x double], ptr %256, i64 0, i64 0
  %258 = load double, ptr %257, align 8, !tbaa !21
  %259 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 24
  %260 = getelementptr inbounds [20 x double], ptr %259, i64 0, i64 0
  %261 = load double, ptr %260, align 8, !tbaa !21
  %262 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 39), align 8, !tbaa !22
  %263 = call noundef double @_ZN9Component17compute_gate_areaEiiddd(ptr noundef nonnull align 8 dereferenceable(280) %19, i32 noundef 2, i32 noundef 2, double noundef %258, double noundef %261, double noundef %262)
  store double %263, ptr %15, align 8, !tbaa !21
  %264 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 24
  %265 = getelementptr inbounds [20 x double], ptr %264, i64 0, i64 0
  %266 = load double, ptr %265, align 8, !tbaa !21
  %267 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 25
  %268 = getelementptr inbounds [20 x double], ptr %267, i64 0, i64 0
  %269 = load double, ptr %268, align 8, !tbaa !21
  %270 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 31
  %271 = load i8, ptr %270, align 8, !tbaa !29, !range !18, !noundef !19
  %272 = trunc i8 %271 to i1
  %273 = call noundef double @_Z17cmos_Isub_leakageddi9Gate_typebbb17Half_net_topology(double noundef %266, double noundef %269, i32 noundef 2, i32 noundef 3, i1 noundef zeroext %272, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  store double %273, ptr %16, align 8, !tbaa !21
  %274 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 24
  %275 = getelementptr inbounds [20 x double], ptr %274, i64 0, i64 0
  %276 = load double, ptr %275, align 8, !tbaa !21
  %277 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 25
  %278 = getelementptr inbounds [20 x double], ptr %277, i64 0, i64 0
  %279 = load double, ptr %278, align 8, !tbaa !21
  %280 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 31
  %281 = load i8, ptr %280, align 8, !tbaa !29, !range !18, !noundef !19
  %282 = trunc i8 %281 to i1
  %283 = call noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef %276, double noundef %279, i32 noundef 2, i32 noundef 3, i1 noundef zeroext %282, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  store double %283, ptr %17, align 8, !tbaa !21
  br label %318

284:                                              ; preds = %236
  %285 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 11
  %286 = load i32, ptr %285, align 4, !tbaa !39
  %287 = icmp eq i32 %286, 3
  br i1 %287, label %288, label %317

288:                                              ; preds = %284
  %289 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 25
  %290 = getelementptr inbounds [20 x double], ptr %289, i64 0, i64 0
  %291 = load double, ptr %290, align 8, !tbaa !21
  %292 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 24
  %293 = getelementptr inbounds [20 x double], ptr %292, i64 0, i64 0
  %294 = load double, ptr %293, align 8, !tbaa !21
  %295 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 39), align 8, !tbaa !22
  %296 = call noundef double @_ZN9Component17compute_gate_areaEiiddd(ptr noundef nonnull align 8 dereferenceable(280) %19, i32 noundef 2, i32 noundef 3, double noundef %291, double noundef %294, double noundef %295)
  store double %296, ptr %15, align 8, !tbaa !21
  %297 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 24
  %298 = getelementptr inbounds [20 x double], ptr %297, i64 0, i64 0
  %299 = load double, ptr %298, align 8, !tbaa !21
  %300 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 25
  %301 = getelementptr inbounds [20 x double], ptr %300, i64 0, i64 0
  %302 = load double, ptr %301, align 8, !tbaa !21
  %303 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 31
  %304 = load i8, ptr %303, align 8, !tbaa !29, !range !18, !noundef !19
  %305 = trunc i8 %304 to i1
  %306 = call noundef double @_Z17cmos_Isub_leakageddi9Gate_typebbb17Half_net_topology(double noundef %299, double noundef %302, i32 noundef 3, i32 noundef 3, i1 noundef zeroext %305, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  store double %306, ptr %16, align 8, !tbaa !21
  %307 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 24
  %308 = getelementptr inbounds [20 x double], ptr %307, i64 0, i64 0
  %309 = load double, ptr %308, align 8, !tbaa !21
  %310 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 25
  %311 = getelementptr inbounds [20 x double], ptr %310, i64 0, i64 0
  %312 = load double, ptr %311, align 8, !tbaa !21
  %313 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 31
  %314 = load i8, ptr %313, align 8, !tbaa !29, !range !18, !noundef !19
  %315 = trunc i8 %314 to i1
  %316 = call noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef %309, double noundef %312, i32 noundef 3, i32 noundef 3, i1 noundef zeroext %315, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  store double %316, ptr %17, align 8, !tbaa !21
  br label %317

317:                                              ; preds = %288, %284
  br label %318

318:                                              ; preds = %317, %255
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #4
  store i32 1, ptr %18, align 4, !tbaa !20
  br label %319

319:                                              ; preds = %372, %318
  %320 = load i32, ptr %18, align 4, !tbaa !20
  %321 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 15
  %322 = load i32, ptr %321, align 4, !tbaa !40
  %323 = icmp slt i32 %320, %322
  br i1 %323, label %325, label %324

324:                                              ; preds = %319
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #4
  br label %375

325:                                              ; preds = %319
  %326 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 25
  %327 = load i32, ptr %18, align 4, !tbaa !20
  %328 = sext i32 %327 to i64
  %329 = getelementptr inbounds [20 x double], ptr %326, i64 0, i64 %328
  %330 = load double, ptr %329, align 8, !tbaa !21
  %331 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 24
  %332 = load i32, ptr %18, align 4, !tbaa !20
  %333 = sext i32 %332 to i64
  %334 = getelementptr inbounds [20 x double], ptr %331, i64 0, i64 %333
  %335 = load double, ptr %334, align 8, !tbaa !21
  %336 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 39), align 8, !tbaa !22
  %337 = call noundef double @_ZN9Component17compute_gate_areaEiiddd(ptr noundef nonnull align 8 dereferenceable(280) %19, i32 noundef 0, i32 noundef 1, double noundef %330, double noundef %335, double noundef %336)
  %338 = load double, ptr %15, align 8, !tbaa !21
  %339 = fadd double %338, %337
  store double %339, ptr %15, align 8, !tbaa !21
  %340 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 24
  %341 = load i32, ptr %18, align 4, !tbaa !20
  %342 = sext i32 %341 to i64
  %343 = getelementptr inbounds [20 x double], ptr %340, i64 0, i64 %342
  %344 = load double, ptr %343, align 8, !tbaa !21
  %345 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 25
  %346 = load i32, ptr %18, align 4, !tbaa !20
  %347 = sext i32 %346 to i64
  %348 = getelementptr inbounds [20 x double], ptr %345, i64 0, i64 %347
  %349 = load double, ptr %348, align 8, !tbaa !21
  %350 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 31
  %351 = load i8, ptr %350, align 8, !tbaa !29, !range !18, !noundef !19
  %352 = trunc i8 %351 to i1
  %353 = call noundef double @_Z17cmos_Isub_leakageddi9Gate_typebbb17Half_net_topology(double noundef %344, double noundef %349, i32 noundef 2, i32 noundef 2, i1 noundef zeroext %352, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %354 = load double, ptr %16, align 8, !tbaa !21
  %355 = fadd double %354, %353
  store double %355, ptr %16, align 8, !tbaa !21
  %356 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 24
  %357 = load i32, ptr %18, align 4, !tbaa !20
  %358 = sext i32 %357 to i64
  %359 = getelementptr inbounds [20 x double], ptr %356, i64 0, i64 %358
  %360 = load double, ptr %359, align 8, !tbaa !21
  %361 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 25
  %362 = load i32, ptr %18, align 4, !tbaa !20
  %363 = sext i32 %362 to i64
  %364 = getelementptr inbounds [20 x double], ptr %361, i64 0, i64 %363
  %365 = load double, ptr %364, align 8, !tbaa !21
  %366 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 31
  %367 = load i8, ptr %366, align 8, !tbaa !29, !range !18, !noundef !19
  %368 = trunc i8 %367 to i1
  %369 = call noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef %360, double noundef %365, i32 noundef 2, i32 noundef 2, i1 noundef zeroext %368, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %370 = load double, ptr %17, align 8, !tbaa !21
  %371 = fadd double %370, %369
  store double %371, ptr %17, align 8, !tbaa !21
  br label %372

372:                                              ; preds = %325
  %373 = load i32, ptr %18, align 4, !tbaa !20
  %374 = add nsw i32 %373, 1
  store i32 %374, ptr %18, align 4, !tbaa !20
  br label %319, !llvm.loop !41

375:                                              ; preds = %324
  %376 = load i32, ptr %5, align 4, !tbaa !20
  %377 = sitofp i32 %376 to double
  %378 = load double, ptr %15, align 8, !tbaa !21
  %379 = fmul double %378, %377
  store double %379, ptr %15, align 8, !tbaa !21
  %380 = load i32, ptr %5, align 4, !tbaa !20
  %381 = sitofp i32 %380 to double
  %382 = load double, ptr %16, align 8, !tbaa !21
  %383 = fmul double %382, %381
  store double %383, ptr %16, align 8, !tbaa !21
  %384 = load i32, ptr %5, align 4, !tbaa !20
  %385 = sitofp i32 %384 to double
  %386 = load double, ptr %17, align 8, !tbaa !21
  %387 = fmul double %386, %385
  store double %387, ptr %17, align 8, !tbaa !21
  %388 = load double, ptr %10, align 8, !tbaa !21
  %389 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::DeviceType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 48), i32 0, i32 9), align 8, !tbaa !42
  %390 = fmul double %388, %389
  %391 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 28
  %392 = getelementptr inbounds %class.powerDef, ptr %391, i32 0, i32 0
  %393 = getelementptr inbounds %class.powerComponents, ptr %392, i32 0, i32 1
  store double %390, ptr %393, align 8, !tbaa !43
  %394 = load double, ptr %7, align 8, !tbaa !21
  %395 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::DeviceType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 48), i32 0, i32 9), align 8, !tbaa !42
  %396 = fmul double %394, %395
  %397 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 29
  %398 = getelementptr inbounds %class.powerDef, ptr %397, i32 0, i32 0
  %399 = getelementptr inbounds %class.powerComponents, ptr %398, i32 0, i32 1
  store double %396, ptr %399, align 8, !tbaa !44
  %400 = load double, ptr %16, align 8, !tbaa !21
  %401 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::DeviceType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 48), i32 0, i32 9), align 8, !tbaa !42
  %402 = fmul double %400, %401
  %403 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 30
  %404 = getelementptr inbounds %class.powerDef, ptr %403, i32 0, i32 0
  %405 = getelementptr inbounds %class.powerComponents, ptr %404, i32 0, i32 1
  store double %402, ptr %405, align 8, !tbaa !45
  %406 = getelementptr inbounds %class.Component, ptr %19, i32 0, i32 0
  %407 = load double, ptr %14, align 8, !tbaa !21
  %408 = load double, ptr %15, align 8, !tbaa !21
  %409 = fadd double %407, %408
  call void @_ZN4Area8set_areaEd(ptr noundef nonnull align 8 dereferenceable(24) %406, double noundef %409)
  %410 = load double, ptr %11, align 8, !tbaa !21
  %411 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::DeviceType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 48), i32 0, i32 9), align 8, !tbaa !42
  %412 = fmul double %410, %411
  %413 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 28
  %414 = getelementptr inbounds %class.powerDef, ptr %413, i32 0, i32 0
  %415 = getelementptr inbounds %class.powerComponents, ptr %414, i32 0, i32 2
  store double %412, ptr %415, align 8, !tbaa !46
  %416 = load double, ptr %8, align 8, !tbaa !21
  %417 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::DeviceType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 48), i32 0, i32 9), align 8, !tbaa !42
  %418 = fmul double %416, %417
  %419 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 29
  %420 = getelementptr inbounds %class.powerDef, ptr %419, i32 0, i32 0
  %421 = getelementptr inbounds %class.powerComponents, ptr %420, i32 0, i32 2
  store double %418, ptr %421, align 8, !tbaa !47
  %422 = load double, ptr %17, align 8, !tbaa !21
  %423 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::DeviceType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 48), i32 0, i32 9), align 8, !tbaa !42
  %424 = fmul double %422, %423
  %425 = getelementptr inbounds %class.PredecBlk, ptr %19, i32 0, i32 30
  %426 = getelementptr inbounds %class.powerDef, ptr %425, i32 0, i32 0
  %427 = getelementptr inbounds %class.powerComponents, ptr %426, i32 0, i32 2
  store double %424, ptr %427, align 8, !tbaa !48
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  br label %428

428:                                              ; preds = %375, %1
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4Area8set_areaEd(ptr noundef nonnull align 8 dereferenceable(24), double noundef) #3 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !16, i64 288}
!10 = !{!"_ZTS9PredecBlk", !11, i64 0, !6, i64 280, !16, i64 288, !17, i64 292, !13, i64 296, !13, i64 304, !17, i64 312, !17, i64 316, !16, i64 320, !17, i64 324, !17, i64 328, !17, i64 332, !17, i64 336, !17, i64 340, !17, i64 344, !17, i64 348, !17, i64 352, !17, i64 356, !7, i64 360, !7, i64 520, !7, i64 680, !7, i64 840, !7, i64 1000, !7, i64 1160, !13, i64 1320, !13, i64 1328, !14, i64 1336, !14, i64 1456, !14, i64 1576, !16, i64 1696}
!11 = !{!"_ZTS9Component", !12, i64 0, !14, i64 24, !14, i64 144, !13, i64 264, !13, i64 272}
!12 = !{!"_ZTS4Area", !13, i64 0, !13, i64 8, !13, i64 16}
!13 = !{!"double", !7, i64 0}
!14 = !{!"_ZTS8powerDef", !15, i64 0, !15, i64 40, !15, i64 80}
!15 = !{!"_ZTS15powerComponents", !13, i64 0, !13, i64 8, !13, i64 16, !13, i64 24, !13, i64 32}
!16 = !{!"bool", !7, i64 0}
!17 = !{!"int", !7, i64 0}
!18 = !{i8 0, i8 2}
!19 = !{}
!20 = !{!17, !17, i64 0}
!21 = !{!13, !13, i64 0}
!22 = !{!23, !13, i64 312}
!23 = !{!"_ZTS19TechnologyParameter", !13, i64 0, !13, i64 8, !13, i64 16, !13, i64 24, !13, i64 32, !13, i64 40, !13, i64 48, !13, i64 56, !13, i64 64, !13, i64 72, !13, i64 80, !13, i64 88, !13, i64 96, !13, i64 104, !13, i64 112, !13, i64 120, !13, i64 128, !13, i64 136, !13, i64 144, !13, i64 152, !13, i64 160, !13, i64 168, !13, i64 176, !13, i64 184, !13, i64 192, !13, i64 200, !13, i64 208, !13, i64 216, !13, i64 224, !13, i64 232, !13, i64 240, !13, i64 248, !13, i64 256, !13, i64 264, !13, i64 272, !13, i64 280, !13, i64 288, !13, i64 296, !13, i64 304, !13, i64 312, !13, i64 320, !13, i64 328, !13, i64 336, !13, i64 344, !24, i64 352, !25, i64 360, !25, i64 528, !25, i64 696, !25, i64 864, !25, i64 1032, !26, i64 1200, !26, i64 1264, !26, i64 1328, !27, i64 1392, !28, i64 1416, !28, i64 1464, !28, i64 1512}
!24 = !{!"long", !7, i64 0}
!25 = !{!"_ZTSN19TechnologyParameter10DeviceTypeE", !13, i64 0, !13, i64 8, !13, i64 16, !13, i64 24, !13, i64 32, !13, i64 40, !13, i64 48, !13, i64 56, !13, i64 64, !13, i64 72, !13, i64 80, !13, i64 88, !13, i64 96, !13, i64 104, !13, i64 112, !13, i64 120, !13, i64 128, !13, i64 136, !13, i64 144, !13, i64 152, !13, i64 160}
!26 = !{!"_ZTSN19TechnologyParameter16InterconnectTypeE", !13, i64 0, !13, i64 8, !13, i64 16, !13, i64 24, !13, i64 32, !13, i64 40, !13, i64 48, !13, i64 56}
!27 = !{!"_ZTSN19TechnologyParameter13ScalingFactorE", !13, i64 0, !13, i64 8, !13, i64 16}
!28 = !{!"_ZTSN19TechnologyParameter10MemoryTypeE", !13, i64 0, !13, i64 8, !13, i64 16, !13, i64 24, !13, i64 32, !13, i64 40}
!29 = !{!10, !16, i64 1696}
!30 = !{!10, !17, i64 328}
!31 = !{!10, !17, i64 292}
!32 = !{!10, !17, i64 352}
!33 = !{!10, !17, i64 356}
!34 = !{!10, !17, i64 332}
!35 = distinct !{!35, !36}
!36 = !{!"llvm.loop.mustprogress"}
!37 = !{!10, !17, i64 336}
!38 = distinct !{!38, !36}
!39 = !{!10, !17, i64 324}
!40 = !{!10, !17, i64 340}
!41 = distinct !{!41, !36}
!42 = !{!23, !13, i64 936}
!43 = !{!10, !13, i64 1344}
!44 = !{!10, !13, i64 1464}
!45 = !{!10, !13, i64 1584}
!46 = !{!10, !13, i64 1352}
!47 = !{!10, !13, i64 1472}
!48 = !{!10, !13, i64 1592}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.TechnologyParameter = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, i64, %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::ScalingFactor", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType" }
%"class.TechnologyParameter::DeviceType" = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::InterconnectType" = type { double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::ScalingFactor" = type { double, double, double }
%"class.TechnologyParameter::MemoryType" = type { double, double, double, double, double, double }

@g_tp = external local_unnamed_addr global %class.TechnologyParameter, align 8
@switch.table._ZN9PredecBlk12compute_areaEv = private unnamed_addr constant [9 x i32] [i32 1, i32 1, i32 0, i32 2, i32 1, i32 0, i32 2, i32 2, i32 0], align 4
@switch.table._ZN9PredecBlk12compute_areaEv.1 = private unnamed_addr constant [9 x i32] [i32 0, i32 0, i32 1, i32 0, i32 1, i32 2, i32 1, i32 2, i32 3], align 4
@switch.table._ZN9PredecBlk12compute_areaEv.2 = private unnamed_addr constant [9 x double] [double 0.000000e+00, double 0.000000e+00, double 8.000000e+00, double 0.000000e+00, double 8.000000e+00, double 1.600000e+01, double 8.000000e+00, double 1.600000e+01, double 2.400000e+01], align 8
@switch.table._ZN9PredecBlk12compute_areaEv.3 = private unnamed_addr constant [9 x double] [double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 1.600000e+01, double 3.200000e+01, double 6.400000e+01, double 1.280000e+02, double 2.560000e+02, double 5.120000e+02], align 8
@switch.table._ZN9PredecBlk12compute_areaEv.4 = private unnamed_addr constant [9 x double] [double 2.000000e+00, double 4.000000e+00, double 0.000000e+00, double 8.000000e+00, double 4.000000e+00, double 0.000000e+00, double 8.000000e+00, double 4.000000e+00, double 0.000000e+00], align 8

declare noundef double @_ZN9Component17compute_gate_areaEiiddd(ptr noundef nonnull align 8 dereferenceable(280), i32 noundef, i32 noundef, double noundef, double noundef, double noundef) local_unnamed_addr #0

declare noundef double @_Z17cmos_Isub_leakageddi9Gate_typebbb17Half_net_topology(double noundef, double noundef, i32 noundef, i32 noundef, i1 noundef zeroext, i1 noundef zeroext, i1 noundef zeroext, i32 noundef) local_unnamed_addr #0

declare noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef, double noundef, i32 noundef, i32 noundef, i1 noundef zeroext, i1 noundef zeroext, i1 noundef zeroext, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN9PredecBlk12compute_areaEv(ptr noundef nonnull align 8 dereferenceable(1697) %0) local_unnamed_addr #1 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 288
  %3 = load i8, ptr %2, align 8, !tbaa !5, !range !17, !noundef !18
  %4 = trunc nuw i8 %3 to i1
  br i1 %4, label %5, label %176

5:                                                ; preds = %1
  %6 = getelementptr inbounds i8, ptr %0, i64 520
  %7 = load double, ptr %6, align 8, !tbaa !19
  %8 = getelementptr inbounds i8, ptr %0, i64 360
  %9 = load double, ptr %8, align 8, !tbaa !19
  %10 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 312), align 8, !tbaa !20
  %11 = tail call noundef double @_ZN9Component17compute_gate_areaEiiddd(ptr noundef nonnull align 8 dereferenceable(280) %0, i32 noundef 2, i32 noundef 2, double noundef %7, double noundef %9, double noundef %10)
  %12 = load double, ptr %8, align 8, !tbaa !19
  %13 = load double, ptr %6, align 8, !tbaa !19
  %14 = getelementptr inbounds i8, ptr %0, i64 1696
  %15 = load i8, ptr %14, align 8, !tbaa !27, !range !17, !noundef !18
  %16 = trunc nuw i8 %15 to i1
  %17 = tail call noundef double @_Z17cmos_Isub_leakageddi9Gate_typebbb17Half_net_topology(double noundef %12, double noundef %13, i32 noundef 2, i32 noundef 3, i1 noundef zeroext %16, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %18 = load double, ptr %8, align 8, !tbaa !19
  %19 = load double, ptr %6, align 8, !tbaa !19
  %20 = load i8, ptr %14, align 8, !tbaa !27, !range !17, !noundef !18
  %21 = trunc nuw i8 %20 to i1
  %22 = tail call noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef %18, double noundef %19, i32 noundef 2, i32 noundef 3, i1 noundef zeroext %21, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %23 = getelementptr inbounds i8, ptr %0, i64 328
  %24 = load i32, ptr %23, align 8, !tbaa !28
  %.not = icmp eq i32 %24, 3
  br i1 %.not, label %25, label %38

25:                                               ; preds = %5
  %26 = getelementptr inbounds i8, ptr %0, i64 840
  %27 = load double, ptr %26, align 8, !tbaa !19
  %28 = getelementptr inbounds i8, ptr %0, i64 680
  %29 = load double, ptr %28, align 8, !tbaa !19
  %30 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 312), align 8, !tbaa !20
  %31 = tail call noundef double @_ZN9Component17compute_gate_areaEiiddd(ptr noundef nonnull align 8 dereferenceable(280) %0, i32 noundef 2, i32 noundef 3, double noundef %27, double noundef %29, double noundef %30)
  %32 = load double, ptr %28, align 8, !tbaa !19
  %33 = load double, ptr %26, align 8, !tbaa !19
  %34 = tail call noundef double @_Z17cmos_Isub_leakageddi9Gate_typebbb17Half_net_topology(double noundef %32, double noundef %33, i32 noundef 3, i32 noundef 3, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %35 = load double, ptr %28, align 8, !tbaa !19
  %36 = load double, ptr %26, align 8, !tbaa !19
  %37 = tail call noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef %35, double noundef %36, i32 noundef 3, i32 noundef 3, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  br label %38

38:                                               ; preds = %5, %25
  %.076 = phi double [ %31, %25 ], [ 0.000000e+00, %5 ]
  %.074 = phi double [ %34, %25 ], [ 0.000000e+00, %5 ]
  %.072 = phi double [ %37, %25 ], [ 0.000000e+00, %5 ]
  %39 = getelementptr inbounds i8, ptr %0, i64 292
  %40 = load i32, ptr %39, align 4, !tbaa !29
  %switch.tableidx = add i32 %40, -1
  %41 = icmp ult i32 %switch.tableidx, 9
  br i1 %41, label %switch.lookup, label %49

switch.lookup:                                    ; preds = %38
  %42 = zext nneg i32 %switch.tableidx to i64
  %switch.gep = getelementptr inbounds [9 x i32], ptr @switch.table._ZN9PredecBlk12compute_areaEv, i64 0, i64 %42
  %switch.load = load i32, ptr %switch.gep, align 4
  %43 = zext nneg i32 %switch.tableidx to i64
  %switch.gep162 = getelementptr inbounds [9 x i32], ptr @switch.table._ZN9PredecBlk12compute_areaEv.1, i64 0, i64 %43
  %switch.load163 = load i32, ptr %switch.gep162, align 4
  %44 = zext nneg i32 %switch.tableidx to i64
  %switch.gep164 = getelementptr inbounds [9 x double], ptr @switch.table._ZN9PredecBlk12compute_areaEv.2, i64 0, i64 %44
  %switch.load165 = load double, ptr %switch.gep164, align 8
  %45 = zext nneg i32 %switch.tableidx to i64
  %switch.gep166 = getelementptr inbounds [9 x double], ptr @switch.table._ZN9PredecBlk12compute_areaEv.3, i64 0, i64 %45
  %switch.load167 = load double, ptr %switch.gep166, align 8
  %46 = zext nneg i32 %switch.tableidx to i64
  %switch.gep168 = getelementptr inbounds [9 x double], ptr @switch.table._ZN9PredecBlk12compute_areaEv.4, i64 0, i64 %46
  %switch.load169 = load double, ptr %switch.gep168, align 8
  %47 = getelementptr inbounds i8, ptr %0, i64 352
  store i32 %switch.load, ptr %47, align 8, !tbaa !30
  %48 = getelementptr inbounds i8, ptr %0, i64 356
  store i32 %switch.load163, ptr %48, align 4, !tbaa !31
  br label %49

49:                                               ; preds = %38, %switch.lookup
  %.079 = phi double [ 0.000000e+00, %38 ], [ %switch.load165, %switch.lookup ]
  %.078 = phi double [ 0.000000e+00, %38 ], [ %switch.load167, %switch.lookup ]
  %.066 = phi double [ 0.000000e+00, %38 ], [ %switch.load169, %switch.lookup ]
  %50 = getelementptr inbounds i8, ptr %0, i64 332
  %51 = load i32, ptr %50, align 4, !tbaa !32
  %52 = icmp sgt i32 %51, 1
  br i1 %52, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %49
  %.071.lcssa = phi double [ %11, %49 ], [ %67, %.lr.ph ]
  %.070.lcssa = phi double [ %17, %49 ], [ %73, %.lr.ph ]
  %.069.lcssa = phi double [ %22, %49 ], [ %79, %.lr.ph ]
  %53 = fmul double %.066, %.071.lcssa
  %54 = fmul double %.066, %.070.lcssa
  %55 = fmul double %.066, %.069.lcssa
  %56 = getelementptr inbounds i8, ptr %0, i64 336
  %57 = load i32, ptr %56, align 8, !tbaa !33
  %58 = icmp sgt i32 %57, 1
  br i1 %58, label %.lr.ph92, label %._crit_edge93

.lr.ph92:                                         ; preds = %._crit_edge
  %59 = getelementptr inbounds i8, ptr %0, i64 840
  %60 = getelementptr inbounds i8, ptr %0, i64 680
  br label %90

.lr.ph:                                           ; preds = %49, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 1, %49 ]
  %.06983 = phi double [ %79, %.lr.ph ], [ %22, %49 ]
  %.07082 = phi double [ %73, %.lr.ph ], [ %17, %49 ]
  %.07181 = phi double [ %67, %.lr.ph ], [ %11, %49 ]
  %61 = getelementptr inbounds [20 x double], ptr %6, i64 0, i64 %indvars.iv
  %62 = load double, ptr %61, align 8, !tbaa !19
  %63 = getelementptr inbounds [20 x double], ptr %8, i64 0, i64 %indvars.iv
  %64 = load double, ptr %63, align 8, !tbaa !19
  %65 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 312), align 8, !tbaa !20
  %66 = tail call noundef double @_ZN9Component17compute_gate_areaEiiddd(ptr noundef nonnull align 8 dereferenceable(280) %0, i32 noundef 0, i32 noundef 1, double noundef %62, double noundef %64, double noundef %65)
  %67 = fadd double %.07181, %66
  %68 = load double, ptr %63, align 8, !tbaa !19
  %69 = load double, ptr %61, align 8, !tbaa !19
  %70 = load i8, ptr %14, align 8, !tbaa !27, !range !17, !noundef !18
  %71 = trunc nuw i8 %70 to i1
  %72 = tail call noundef double @_Z17cmos_Isub_leakageddi9Gate_typebbb17Half_net_topology(double noundef %68, double noundef %69, i32 noundef 2, i32 noundef 3, i1 noundef zeroext %71, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %73 = fadd double %.07082, %72
  %74 = load double, ptr %63, align 8, !tbaa !19
  %75 = load double, ptr %61, align 8, !tbaa !19
  %76 = load i8, ptr %14, align 8, !tbaa !27, !range !17, !noundef !18
  %77 = trunc nuw i8 %76 to i1
  %78 = tail call noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef %74, double noundef %75, i32 noundef 2, i32 noundef 3, i1 noundef zeroext %77, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %79 = fadd double %.06983, %78
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %80 = load i32, ptr %50, align 4, !tbaa !32
  %81 = sext i32 %80 to i64
  %82 = icmp slt i64 %indvars.iv.next, %81
  br i1 %82, label %.lr.ph, label %._crit_edge, !llvm.loop !34

._crit_edge93:                                    ; preds = %90, %._crit_edge
  %.177.lcssa = phi double [ %.076, %._crit_edge ], [ %97, %90 ]
  %.175.lcssa = phi double [ %.074, %._crit_edge ], [ %103, %90 ]
  %.173.lcssa = phi double [ %.072, %._crit_edge ], [ %109, %90 ]
  %83 = fmul double %.079, %.177.lcssa
  %84 = fmul double %.079, %.175.lcssa
  %85 = fmul double %.079, %.173.lcssa
  %86 = fadd double %53, %83
  %87 = getelementptr inbounds i8, ptr %0, i64 324
  %88 = load i32, ptr %87, align 4, !tbaa !36
  %89 = and i32 %88, -2
  %switch = icmp eq i32 %89, 2
  br i1 %switch, label %.sink.split133, label %129

90:                                               ; preds = %.lr.ph92, %90
  %indvars.iv116 = phi i64 [ 1, %.lr.ph92 ], [ %indvars.iv.next117, %90 ]
  %.17389 = phi double [ %.072, %.lr.ph92 ], [ %109, %90 ]
  %.17588 = phi double [ %.074, %.lr.ph92 ], [ %103, %90 ]
  %.17787 = phi double [ %.076, %.lr.ph92 ], [ %97, %90 ]
  %91 = getelementptr inbounds [20 x double], ptr %59, i64 0, i64 %indvars.iv116
  %92 = load double, ptr %91, align 8, !tbaa !19
  %93 = getelementptr inbounds [20 x double], ptr %60, i64 0, i64 %indvars.iv116
  %94 = load double, ptr %93, align 8, !tbaa !19
  %95 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 312), align 8, !tbaa !20
  %96 = tail call noundef double @_ZN9Component17compute_gate_areaEiiddd(ptr noundef nonnull align 8 dereferenceable(280) %0, i32 noundef 0, i32 noundef 1, double noundef %92, double noundef %94, double noundef %95)
  %97 = fadd double %.17787, %96
  %98 = load double, ptr %93, align 8, !tbaa !19
  %99 = load double, ptr %91, align 8, !tbaa !19
  %100 = load i8, ptr %14, align 8, !tbaa !27, !range !17, !noundef !18
  %101 = trunc nuw i8 %100 to i1
  %102 = tail call noundef double @_Z17cmos_Isub_leakageddi9Gate_typebbb17Half_net_topology(double noundef %98, double noundef %99, i32 noundef 3, i32 noundef 3, i1 noundef zeroext %101, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %103 = fadd double %.17588, %102
  %104 = load double, ptr %93, align 8, !tbaa !19
  %105 = load double, ptr %91, align 8, !tbaa !19
  %106 = load i8, ptr %14, align 8, !tbaa !27, !range !17, !noundef !18
  %107 = trunc nuw i8 %106 to i1
  %108 = tail call noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef %104, double noundef %105, i32 noundef 3, i32 noundef 3, i1 noundef zeroext %107, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %109 = fadd double %.17389, %108
  %indvars.iv.next117 = add nuw nsw i64 %indvars.iv116, 1
  %110 = load i32, ptr %56, align 8, !tbaa !33
  %111 = sext i32 %110 to i64
  %112 = icmp slt i64 %indvars.iv.next117, %111
  br i1 %112, label %90, label %._crit_edge93, !llvm.loop !37

.sink.split133:                                   ; preds = %._crit_edge93
  %113 = getelementptr inbounds i8, ptr %0, i64 1160
  %114 = load double, ptr %113, align 8, !tbaa !19
  %115 = getelementptr inbounds i8, ptr %0, i64 1000
  %116 = load double, ptr %115, align 8, !tbaa !19
  %117 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 312), align 8, !tbaa !20
  %118 = tail call noundef double @_ZN9Component17compute_gate_areaEiiddd(ptr noundef nonnull align 8 dereferenceable(280) %0, i32 noundef 2, i32 noundef %88, double noundef %114, double noundef %116, double noundef %117)
  %119 = load double, ptr %115, align 8, !tbaa !19
  %120 = load double, ptr %113, align 8, !tbaa !19
  %121 = load i8, ptr %14, align 8, !tbaa !27, !range !17, !noundef !18
  %122 = trunc nuw i8 %121 to i1
  %123 = tail call noundef double @_Z17cmos_Isub_leakageddi9Gate_typebbb17Half_net_topology(double noundef %119, double noundef %120, i32 noundef %88, i32 noundef 3, i1 noundef zeroext %122, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %124 = load double, ptr %115, align 8, !tbaa !19
  %125 = load double, ptr %113, align 8, !tbaa !19
  %126 = load i8, ptr %14, align 8, !tbaa !27, !range !17, !noundef !18
  %127 = trunc nuw i8 %126 to i1
  %128 = tail call noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef %124, double noundef %125, i32 noundef %88, i32 noundef 3, i1 noundef zeroext %127, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  br label %129

129:                                              ; preds = %._crit_edge93, %.sink.split133
  %.064 = phi double [ 0.000000e+00, %._crit_edge93 ], [ %118, %.sink.split133 ]
  %.062 = phi double [ 0.000000e+00, %._crit_edge93 ], [ %123, %.sink.split133 ]
  %.061 = phi double [ 0.000000e+00, %._crit_edge93 ], [ %128, %.sink.split133 ]
  %130 = getelementptr inbounds i8, ptr %0, i64 340
  %131 = load i32, ptr %130, align 4, !tbaa !38
  %132 = icmp sgt i32 %131, 1
  br i1 %132, label %.lr.ph102, label %._crit_edge103

.lr.ph102:                                        ; preds = %129
  %133 = getelementptr inbounds i8, ptr %0, i64 1160
  %134 = getelementptr inbounds i8, ptr %0, i64 1000
  br label %153

._crit_edge103:                                   ; preds = %153, %129
  %.165.lcssa = phi double [ %.064, %129 ], [ %160, %153 ]
  %.163.lcssa = phi double [ %.062, %129 ], [ %166, %153 ]
  %.1.lcssa = phi double [ %.061, %129 ], [ %172, %153 ]
  %135 = fmul double %.078, %.165.lcssa
  %136 = fmul double %.078, %.163.lcssa
  %137 = fmul double %.078, %.1.lcssa
  %138 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 936), align 8, !tbaa !39
  %139 = fmul double %54, %138
  %140 = getelementptr inbounds i8, ptr %0, i64 1344
  store double %139, ptr %140, align 8, !tbaa !40
  %141 = fmul double %84, %138
  %142 = getelementptr inbounds i8, ptr %0, i64 1464
  store double %141, ptr %142, align 8, !tbaa !41
  %143 = fmul double %136, %138
  %144 = getelementptr inbounds i8, ptr %0, i64 1584
  store double %143, ptr %144, align 8, !tbaa !42
  %145 = fadd double %86, %135
  tail call void @_ZN4Area8set_areaEd(ptr noundef nonnull align 8 dereferenceable(24) %0, double noundef %145)
  %146 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 936), align 8, !tbaa !39
  %147 = fmul double %55, %146
  %148 = getelementptr inbounds i8, ptr %0, i64 1352
  store double %147, ptr %148, align 8, !tbaa !43
  %149 = fmul double %85, %146
  %150 = getelementptr inbounds i8, ptr %0, i64 1472
  store double %149, ptr %150, align 8, !tbaa !44
  %151 = fmul double %137, %146
  %152 = getelementptr inbounds i8, ptr %0, i64 1592
  store double %151, ptr %152, align 8, !tbaa !45
  br label %176

153:                                              ; preds = %.lr.ph102, %153
  %indvars.iv119 = phi i64 [ 1, %.lr.ph102 ], [ %indvars.iv.next120, %153 ]
  %.199 = phi double [ %.061, %.lr.ph102 ], [ %172, %153 ]
  %.16398 = phi double [ %.062, %.lr.ph102 ], [ %166, %153 ]
  %.16597 = phi double [ %.064, %.lr.ph102 ], [ %160, %153 ]
  %154 = getelementptr inbounds [20 x double], ptr %133, i64 0, i64 %indvars.iv119
  %155 = load double, ptr %154, align 8, !tbaa !19
  %156 = getelementptr inbounds [20 x double], ptr %134, i64 0, i64 %indvars.iv119
  %157 = load double, ptr %156, align 8, !tbaa !19
  %158 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 312), align 8, !tbaa !20
  %159 = tail call noundef double @_ZN9Component17compute_gate_areaEiiddd(ptr noundef nonnull align 8 dereferenceable(280) %0, i32 noundef 0, i32 noundef 1, double noundef %155, double noundef %157, double noundef %158)
  %160 = fadd double %.16597, %159
  %161 = load double, ptr %156, align 8, !tbaa !19
  %162 = load double, ptr %154, align 8, !tbaa !19
  %163 = load i8, ptr %14, align 8, !tbaa !27, !range !17, !noundef !18
  %164 = trunc nuw i8 %163 to i1
  %165 = tail call noundef double @_Z17cmos_Isub_leakageddi9Gate_typebbb17Half_net_topology(double noundef %161, double noundef %162, i32 noundef 2, i32 noundef 2, i1 noundef zeroext %164, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %166 = fadd double %.16398, %165
  %167 = load double, ptr %156, align 8, !tbaa !19
  %168 = load double, ptr %154, align 8, !tbaa !19
  %169 = load i8, ptr %14, align 8, !tbaa !27, !range !17, !noundef !18
  %170 = trunc nuw i8 %169 to i1
  %171 = tail call noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef %167, double noundef %168, i32 noundef 2, i32 noundef 2, i1 noundef zeroext %170, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %172 = fadd double %.199, %171
  %indvars.iv.next120 = add nuw nsw i64 %indvars.iv119, 1
  %173 = load i32, ptr %130, align 4, !tbaa !38
  %174 = sext i32 %173 to i64
  %175 = icmp slt i64 %indvars.iv.next120, %174
  br i1 %175, label %153, label %._crit_edge103, !llvm.loop !46

176:                                              ; preds = %._crit_edge103, %1
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4Area8set_areaEd(ptr noundef nonnull align 8 dereferenceable(24), double noundef) local_unnamed_addr #2 align 2

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !15, i64 288}
!6 = !{!"_ZTS9PredecBlk", !7, i64 0, !14, i64 280, !15, i64 288, !16, i64 292, !9, i64 296, !9, i64 304, !16, i64 312, !16, i64 316, !15, i64 320, !16, i64 324, !16, i64 328, !16, i64 332, !16, i64 336, !16, i64 340, !16, i64 344, !16, i64 348, !16, i64 352, !16, i64 356, !10, i64 360, !10, i64 520, !10, i64 680, !10, i64 840, !10, i64 1000, !10, i64 1160, !9, i64 1320, !9, i64 1328, !12, i64 1336, !12, i64 1456, !12, i64 1576, !15, i64 1696}
!7 = !{!"_ZTS9Component", !8, i64 0, !12, i64 24, !12, i64 144, !9, i64 264, !9, i64 272}
!8 = !{!"_ZTS4Area", !9, i64 0, !9, i64 8, !9, i64 16}
!9 = !{!"double", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C++ TBAA"}
!12 = !{!"_ZTS8powerDef", !13, i64 0, !13, i64 40, !13, i64 80}
!13 = !{!"_ZTS15powerComponents", !9, i64 0, !9, i64 8, !9, i64 16, !9, i64 24, !9, i64 32}
!14 = !{!"any pointer", !10, i64 0}
!15 = !{!"bool", !10, i64 0}
!16 = !{!"int", !10, i64 0}
!17 = !{i8 0, i8 2}
!18 = !{}
!19 = !{!9, !9, i64 0}
!20 = !{!21, !9, i64 312}
!21 = !{!"_ZTS19TechnologyParameter", !9, i64 0, !9, i64 8, !9, i64 16, !9, i64 24, !9, i64 32, !9, i64 40, !9, i64 48, !9, i64 56, !9, i64 64, !9, i64 72, !9, i64 80, !9, i64 88, !9, i64 96, !9, i64 104, !9, i64 112, !9, i64 120, !9, i64 128, !9, i64 136, !9, i64 144, !9, i64 152, !9, i64 160, !9, i64 168, !9, i64 176, !9, i64 184, !9, i64 192, !9, i64 200, !9, i64 208, !9, i64 216, !9, i64 224, !9, i64 232, !9, i64 240, !9, i64 248, !9, i64 256, !9, i64 264, !9, i64 272, !9, i64 280, !9, i64 288, !9, i64 296, !9, i64 304, !9, i64 312, !9, i64 320, !9, i64 328, !9, i64 336, !9, i64 344, !22, i64 352, !23, i64 360, !23, i64 528, !23, i64 696, !23, i64 864, !23, i64 1032, !24, i64 1200, !24, i64 1264, !24, i64 1328, !25, i64 1392, !26, i64 1416, !26, i64 1464, !26, i64 1512}
!22 = !{!"long", !10, i64 0}
!23 = !{!"_ZTSN19TechnologyParameter10DeviceTypeE", !9, i64 0, !9, i64 8, !9, i64 16, !9, i64 24, !9, i64 32, !9, i64 40, !9, i64 48, !9, i64 56, !9, i64 64, !9, i64 72, !9, i64 80, !9, i64 88, !9, i64 96, !9, i64 104, !9, i64 112, !9, i64 120, !9, i64 128, !9, i64 136, !9, i64 144, !9, i64 152, !9, i64 160}
!24 = !{!"_ZTSN19TechnologyParameter16InterconnectTypeE", !9, i64 0, !9, i64 8, !9, i64 16, !9, i64 24, !9, i64 32, !9, i64 40, !9, i64 48, !9, i64 56}
!25 = !{!"_ZTSN19TechnologyParameter13ScalingFactorE", !9, i64 0, !9, i64 8, !9, i64 16}
!26 = !{!"_ZTSN19TechnologyParameter10MemoryTypeE", !9, i64 0, !9, i64 8, !9, i64 16, !9, i64 24, !9, i64 32, !9, i64 40}
!27 = !{!6, !15, i64 1696}
!28 = !{!6, !16, i64 328}
!29 = !{!6, !16, i64 292}
!30 = !{!6, !16, i64 352}
!31 = !{!6, !16, i64 356}
!32 = !{!6, !16, i64 332}
!33 = !{!6, !16, i64 336}
!34 = distinct !{!34, !35}
!35 = !{!"llvm.loop.mustprogress"}
!36 = !{!6, !16, i64 324}
!37 = distinct !{!37, !35}
!38 = !{!6, !16, i64 340}
!39 = !{!21, !9, i64 936}
!40 = !{!6, !9, i64 1344}
!41 = !{!6, !9, i64 1464}
!42 = !{!6, !9, i64 1584}
!43 = !{!6, !9, i64 1352}
!44 = !{!6, !9, i64 1472}
!45 = !{!6, !9, i64 1592}
!46 = distinct !{!46, !35}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass