; LLVM IR from gem5/gem5 :: ext/softfloat (s_countLeadingZeros64)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@softfloat_countLeadingZeros8 = external constant [256 x i8], align 16

; Function Attrs: nounwind uwtable
define dso_local zeroext i8 @softfloat_countLeadingZeros64(i64 noundef %0) #0 {
  %2 = alloca i64, align 8
  %3 = alloca i8, align 1
  %4 = alloca i32, align 4
  store i64 %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %3) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  store i8 0, ptr %3, align 1, !tbaa !9
  %5 = load i64, ptr %2, align 8, !tbaa !5
  %6 = lshr i64 %5, 32
  %7 = trunc i64 %6 to i32
  store i32 %7, ptr %4, align 4, !tbaa !10
  %8 = load i32, ptr %4, align 4, !tbaa !10
  %9 = icmp ne i32 %8, 0
  br i1 %9, label %13, label %10

10:                                               ; preds = %1
  store i8 32, ptr %3, align 1, !tbaa !9
  %11 = load i64, ptr %2, align 8, !tbaa !5
  %12 = trunc i64 %11 to i32
  store i32 %12, ptr %4, align 4, !tbaa !10
  br label %13

13:                                               ; preds = %10, %1
  %14 = load i32, ptr %4, align 4, !tbaa !10
  %15 = icmp ult i32 %14, 65536
  br i1 %15, label %16, label %23

16:                                               ; preds = %13
  %17 = load i8, ptr %3, align 1, !tbaa !9
  %18 = zext i8 %17 to i32
  %19 = add nsw i32 %18, 16
  %20 = trunc i32 %19 to i8
  store i8 %20, ptr %3, align 1, !tbaa !9
  %21 = load i32, ptr %4, align 4, !tbaa !10
  %22 = shl i32 %21, 16
  store i32 %22, ptr %4, align 4, !tbaa !10
  br label %23

23:                                               ; preds = %16, %13
  %24 = load i32, ptr %4, align 4, !tbaa !10
  %25 = icmp ult i32 %24, 16777216
  br i1 %25, label %26, label %33

26:                                               ; preds = %23
  %27 = load i8, ptr %3, align 1, !tbaa !9
  %28 = zext i8 %27 to i32
  %29 = add nsw i32 %28, 8
  %30 = trunc i32 %29 to i8
  store i8 %30, ptr %3, align 1, !tbaa !9
  %31 = load i32, ptr %4, align 4, !tbaa !10
  %32 = shl i32 %31, 8
  store i32 %32, ptr %4, align 4, !tbaa !10
  br label %33

33:                                               ; preds = %26, %23
  %34 = load i32, ptr %4, align 4, !tbaa !10
  %35 = lshr i32 %34, 24
  %36 = zext i32 %35 to i64
  %37 = getelementptr inbounds [256 x i8], ptr @softfloat_countLeadingZeros8, i64 0, i64 %36
  %38 = load i8, ptr %37, align 1, !tbaa !9
  %39 = zext i8 %38 to i32
  %40 = load i8, ptr %3, align 1, !tbaa !9
  %41 = zext i8 %40 to i32
  %42 = add nsw i32 %41, %39
  %43 = trunc i32 %42 to i8
  store i8 %43, ptr %3, align 1, !tbaa !9
  %44 = load i8, ptr %3, align 1, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  call void @llvm.lifetime.end.p0(i64 1, ptr %3) #2
  ret i8 %44
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@softfloat_countLeadingZeros8 = external local_unnamed_addr constant [256 x i8], align 16

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local zeroext i8 @softfloat_countLeadingZeros64(i64 noundef %0) local_unnamed_addr #0 {
  %2 = lshr i64 %0, 32
  %.not = icmp ult i64 %0, 4294967296
  %spec.select = select i1 %.not, i8 32, i8 0
  %spec.select16 = select i1 %.not, i64 %0, i64 %2
  %.0 = trunc nuw i64 %spec.select16 to i32
  %3 = icmp ult i64 %spec.select16, 65536
  %4 = or disjoint i8 %spec.select, 16
  %5 = shl nuw i32 %.0, 16
  %.113 = select i1 %3, i8 %4, i8 %spec.select
  %.1 = select i1 %3, i32 %5, i32 %.0
  %6 = icmp ult i32 %.1, 16777216
  %7 = or disjoint i8 %.113, 8
  %8 = shl nuw i32 %.1, 8
  %.214 = select i1 %6, i8 %7, i8 %.113
  %.2 = select i1 %6, i32 %8, i32 %.1
  %9 = lshr i32 %.2, 24
  %10 = zext nneg i32 %9 to i64
  %11 = getelementptr inbounds [256 x i8], ptr @softfloat_countLeadingZeros8, i64 0, i64 %10
  %12 = load i8, ptr %11, align 1, !tbaa !5
  %13 = add i8 %12, %.214
  ret i8 %13
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass