; LLVM IR from gem5/gem5 :: ext/drampower/src (MemCommand)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.Data::MemorySpecification" = type { ptr, %"class.std::__cxx11::basic_string", %"class.Data::MemoryType", [4 x i8], %"class.Data::MemArchitectureSpec", %"class.Data::MemTimingSpec", %"class.Data::MemPowerSpec", %"class.Data::Parametrisable" }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.Data::MemoryType" = type { i32 }
%"class.Data::MemArchitectureSpec" = type <{ ptr, i64, i64, i64, i64, i64, i64, i64, i64, i8, i8, i8, [5 x i8], %"class.Data::Parametrisable" }>
%"class.Data::MemTimingSpec" = type { ptr, double, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, double, %"class.Data::Parametrisable" }
%"class.Data::MemPowerSpec" = type { ptr, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, %"class.Data::Parametrisable" }
%"class.Data::Parametrisable" = type { ptr, %"class.std::vector" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Data::Parameter, std::allocator<Data::Parameter>>::_Vector_impl" }
%"struct.std::_Vector_base<Data::Parameter, std::allocator<Data::Parameter>>::_Vector_impl" = type { %"struct.std::_Vector_base<Data::Parameter, std::allocator<Data::Parameter>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Data::Parameter, std::allocator<Data::Parameter>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_ZNK4Data10MemCommand18getPrechargeOffsetERKNS_19MemorySpecificationENS0_4cmdsE(ptr noundef nonnull align 8 dereferenceable(16) %0, ptr noundef nonnull align 8 dereferenceable(736) %1, i32 noundef %2) #0 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  %13 = alloca i64, align 8
  %14 = alloca i64, align 8
  %15 = alloca ptr, align 8
  %16 = alloca i32, align 4
  %17 = alloca i64, align 8
  %18 = alloca i64, align 8
  %19 = alloca i64, align 8
  %20 = alloca i64, align 8
  %21 = alloca i64, align 8
  %22 = alloca i64, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !9
  %23 = load ptr, ptr %4, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #4
  store i64 0, ptr %7, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #4
  %24 = load ptr, ptr %5, align 8, !tbaa !5
  %25 = getelementptr inbounds %"class.Data::MemorySpecification", ptr %24, i32 0, i32 4
  %26 = getelementptr inbounds %"class.Data::MemArchitectureSpec", ptr %25, i32 0, i32 1
  %27 = load i64, ptr %26, align 8, !tbaa !13
  store i64 %27, ptr %8, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #4
  %28 = load ptr, ptr %5, align 8, !tbaa !5
  %29 = getelementptr inbounds %"class.Data::MemorySpecification", ptr %28, i32 0, i32 5
  %30 = getelementptr inbounds %"class.Data::MemTimingSpec", ptr %29, i32 0, i32 24
  %31 = load i64, ptr %30, align 8, !tbaa !24
  store i64 %31, ptr %9, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #4
  %32 = load ptr, ptr %5, align 8, !tbaa !5
  %33 = getelementptr inbounds %"class.Data::MemorySpecification", ptr %32, i32 0, i32 4
  %34 = getelementptr inbounds %"class.Data::MemArchitectureSpec", ptr %33, i32 0, i32 4
  %35 = load i64, ptr %34, align 8, !tbaa !25
  store i64 %35, ptr %10, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #4
  %36 = load ptr, ptr %5, align 8, !tbaa !5
  %37 = getelementptr inbounds %"class.Data::MemorySpecification", ptr %36, i32 0, i32 5
  %38 = getelementptr inbounds %"class.Data::MemTimingSpec", ptr %37, i32 0, i32 22
  %39 = load i64, ptr %38, align 8, !tbaa !26
  store i64 %39, ptr %11, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #4
  %40 = load ptr, ptr %5, align 8, !tbaa !5
  %41 = getelementptr inbounds %"class.Data::MemorySpecification", ptr %40, i32 0, i32 5
  %42 = getelementptr inbounds %"class.Data::MemTimingSpec", ptr %41, i32 0, i32 21
  %43 = load i64, ptr %42, align 8, !tbaa !27
  store i64 %43, ptr %12, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #4
  %44 = load ptr, ptr %5, align 8, !tbaa !5
  %45 = getelementptr inbounds %"class.Data::MemorySpecification", ptr %44, i32 0, i32 5
  %46 = getelementptr inbounds %"class.Data::MemTimingSpec", ptr %45, i32 0, i32 25
  %47 = load i64, ptr %46, align 8, !tbaa !28
  store i64 %47, ptr %13, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #4
  %48 = load i64, ptr %8, align 8, !tbaa !11
  %49 = load i64, ptr %10, align 8, !tbaa !11
  %50 = sdiv i64 %48, %49
  store i64 %50, ptr %14, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #4
  %51 = load ptr, ptr %5, align 8, !tbaa !5
  %52 = getelementptr inbounds %"class.Data::MemorySpecification", ptr %51, i32 0, i32 2
  %53 = call noundef i32 @_ZNK4Data10MemoryTypecvNS0_12MemoryType_tEEv(ptr noundef nonnull align 4 dereferenceable(4) %52)
  store i32 %53, ptr %16, align 4, !tbaa !29
  store ptr %16, ptr %15, align 8, !tbaa !5
  %54 = load i32, ptr %6, align 4, !tbaa !9
  %55 = icmp eq i32 %54, 7
  br i1 %55, label %56, label %126

56:                                               ; preds = %3
  %57 = load ptr, ptr %15, align 8, !tbaa !5
  %58 = load i32, ptr %57, align 4, !tbaa !29
  %59 = icmp eq i32 %58, 0
  br i1 %59, label %60, label %68

60:                                               ; preds = %56
  %61 = load i64, ptr %14, align 8, !tbaa !11
  %62 = load i64, ptr %11, align 8, !tbaa !11
  %63 = add nsw i64 %61, %62
  %64 = sub nsw i64 %63, 2
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #4
  store i64 2, ptr %17, align 8, !tbaa !11
  %65 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIlERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %9, ptr noundef nonnull align 8 dereferenceable(8) %17)
  %66 = load i64, ptr %65, align 8, !tbaa !11
  %67 = add nsw i64 %64, %66
  store i64 %67, ptr %7, align 8, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #4
  br label %125

68:                                               ; preds = %56
  %69 = load ptr, ptr %15, align 8, !tbaa !5
  %70 = load i32, ptr %69, align 4, !tbaa !29
  %71 = icmp eq i32 %70, 1
  br i1 %71, label %72, label %77

72:                                               ; preds = %68
  %73 = load i64, ptr %11, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #4
  store i64 4, ptr %18, align 8, !tbaa !11
  %74 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIlERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %9, ptr noundef nonnull align 8 dereferenceable(8) %18)
  %75 = load i64, ptr %74, align 8, !tbaa !11
  %76 = add nsw i64 %73, %75
  store i64 %76, ptr %7, align 8, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #4
  br label %124

77:                                               ; preds = %68
  %78 = load ptr, ptr %15, align 8, !tbaa !5
  %79 = load i32, ptr %78, align 4, !tbaa !29
  %80 = icmp eq i32 %79, 2
  br i1 %80, label %81, label %85

81:                                               ; preds = %77
  %82 = load i64, ptr %11, align 8, !tbaa !11
  %83 = load i64, ptr %9, align 8, !tbaa !11
  %84 = add nsw i64 %82, %83
  store i64 %84, ptr %7, align 8, !tbaa !11
  br label %123

85:                                               ; preds = %77
  %86 = load ptr, ptr %15, align 8, !tbaa !5
  %87 = load i32, ptr %86, align 4, !tbaa !29
  %88 = icmp eq i32 %87, 3
  br i1 %88, label %89, label %91

89:                                               ; preds = %85
  %90 = load i64, ptr %14, align 8, !tbaa !11
  store i64 %90, ptr %7, align 8, !tbaa !11
  br label %122

91:                                               ; preds = %85
  %92 = load ptr, ptr %15, align 8, !tbaa !5
  %93 = load i32, ptr %92, align 4, !tbaa !29
  %94 = icmp eq i32 %93, 4
  br i1 %94, label %95, label %102

95:                                               ; preds = %91
  %96 = load i64, ptr %14, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %19) #4
  store i64 0, ptr %19, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %20) #4
  %97 = load i64, ptr %9, align 8, !tbaa !11
  %98 = sub nsw i64 %97, 2
  store i64 %98, ptr %20, align 8, !tbaa !11
  %99 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIlERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %19, ptr noundef nonnull align 8 dereferenceable(8) %20)
  %100 = load i64, ptr %99, align 8, !tbaa !11
  %101 = add nsw i64 %96, %100
  store i64 %101, ptr %7, align 8, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %19) #4
  br label %121

102:                                              ; preds = %91
  %103 = load ptr, ptr %15, align 8, !tbaa !5
  %104 = load i32, ptr %103, align 4, !tbaa !29
  %105 = icmp eq i32 %104, 5
  br i1 %105, label %106, label %113

106:                                              ; preds = %102
  %107 = load i64, ptr %14, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %21) #4
  store i64 0, ptr %21, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %22) #4
  %108 = load i64, ptr %9, align 8, !tbaa !11
  %109 = sub nsw i64 %108, 4
  store i64 %109, ptr %22, align 8, !tbaa !11
  %110 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIlERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %21, ptr noundef nonnull align 8 dereferenceable(8) %22)
  %111 = load i64, ptr %110, align 8, !tbaa !11
  %112 = add nsw i64 %107, %111
  store i64 %112, ptr %7, align 8, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 8, ptr %22) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #4
  br label %120

113:                                              ; preds = %102
  %114 = load ptr, ptr %15, align 8, !tbaa !5
  %115 = load i32, ptr %114, align 4, !tbaa !29
  %116 = icmp eq i32 %115, 6
  br i1 %116, label %117, label %119

117:                                              ; preds = %113
  %118 = load i64, ptr %14, align 8, !tbaa !11
  store i64 %118, ptr %7, align 8, !tbaa !11
  br label %119

119:                                              ; preds = %117, %113
  br label %120

120:                                              ; preds = %119, %106
  br label %121

121:                                              ; preds = %120, %95
  br label %122

122:                                              ; preds = %121, %89
  br label %123

123:                                              ; preds = %122, %81
  br label %124

124:                                              ; preds = %123, %72
  br label %125

125:                                              ; preds = %124, %60
  br label %208

126:                                              ; preds = %3
  %127 = load i32, ptr %6, align 4, !tbaa !9
  %128 = icmp eq i32 %127, 8
  br i1 %128, label %129, label %207

129:                                              ; preds = %126
  %130 = load ptr, ptr %15, align 8, !tbaa !5
  %131 = load i32, ptr %130, align 4, !tbaa !29
  %132 = icmp eq i32 %131, 0
  br i1 %132, label %133, label %139

133:                                              ; preds = %129
  %134 = load i64, ptr %14, align 8, !tbaa !11
  %135 = load i64, ptr %12, align 8, !tbaa !11
  %136 = add nsw i64 %134, %135
  %137 = load i64, ptr %13, align 8, !tbaa !11
  %138 = add nsw i64 %136, %137
  store i64 %138, ptr %7, align 8, !tbaa !11
  br label %206

139:                                              ; preds = %129
  %140 = load ptr, ptr %15, align 8, !tbaa !5
  %141 = load i32, ptr %140, align 4, !tbaa !29
  %142 = icmp eq i32 %141, 1
  br i1 %142, label %143, label %149

143:                                              ; preds = %139
  %144 = load i64, ptr %14, align 8, !tbaa !11
  %145 = load i64, ptr %12, align 8, !tbaa !11
  %146 = add nsw i64 %144, %145
  %147 = load i64, ptr %13, align 8, !tbaa !11
  %148 = add nsw i64 %146, %147
  store i64 %148, ptr %7, align 8, !tbaa !11
  br label %205

149:                                              ; preds = %139
  %150 = load ptr, ptr %15, align 8, !tbaa !5
  %151 = load i32, ptr %150, align 4, !tbaa !29
  %152 = icmp eq i32 %151, 2
  br i1 %152, label %153, label %159

153:                                              ; preds = %149
  %154 = load i64, ptr %14, align 8, !tbaa !11
  %155 = load i64, ptr %12, align 8, !tbaa !11
  %156 = add nsw i64 %154, %155
  %157 = load i64, ptr %13, align 8, !tbaa !11
  %158 = add nsw i64 %156, %157
  store i64 %158, ptr %7, align 8, !tbaa !11
  br label %204

159:                                              ; preds = %149
  %160 = load ptr, ptr %15, align 8, !tbaa !5
  %161 = load i32, ptr %160, align 4, !tbaa !29
  %162 = icmp eq i32 %161, 3
  br i1 %162, label %163, label %167

163:                                              ; preds = %159
  %164 = load i64, ptr %14, align 8, !tbaa !11
  %165 = load i64, ptr %13, align 8, !tbaa !11
  %166 = add nsw i64 %164, %165
  store i64 %166, ptr %7, align 8, !tbaa !11
  br label %203

167:                                              ; preds = %159
  %168 = load ptr, ptr %15, align 8, !tbaa !5
  %169 = load i32, ptr %168, align 4, !tbaa !29
  %170 = icmp eq i32 %169, 4
  br i1 %170, label %171, label %178

171:                                              ; preds = %167
  %172 = load i64, ptr %14, align 8, !tbaa !11
  %173 = load i64, ptr %12, align 8, !tbaa !11
  %174 = add nsw i64 %172, %173
  %175 = load i64, ptr %13, align 8, !tbaa !11
  %176 = add nsw i64 %174, %175
  %177 = add nsw i64 %176, 1
  store i64 %177, ptr %7, align 8, !tbaa !11
  br label %202

178:                                              ; preds = %167
  %179 = load ptr, ptr %15, align 8, !tbaa !5
  %180 = load i32, ptr %179, align 4, !tbaa !29
  %181 = icmp eq i32 %180, 5
  br i1 %181, label %182, label %189

182:                                              ; preds = %178
  %183 = load i64, ptr %14, align 8, !tbaa !11
  %184 = load i64, ptr %12, align 8, !tbaa !11
  %185 = add nsw i64 %183, %184
  %186 = load i64, ptr %13, align 8, !tbaa !11
  %187 = add nsw i64 %185, %186
  %188 = add nsw i64 %187, 1
  store i64 %188, ptr %7, align 8, !tbaa !11
  br label %201

189:                                              ; preds = %178
  %190 = load ptr, ptr %15, align 8, !tbaa !5
  %191 = load i32, ptr %190, align 4, !tbaa !29
  %192 = icmp eq i32 %191, 6
  br i1 %192, label %193, label %200

193:                                              ; preds = %189
  %194 = load i64, ptr %14, align 8, !tbaa !11
  %195 = load i64, ptr %12, align 8, !tbaa !11
  %196 = add nsw i64 %194, %195
  %197 = load i64, ptr %13, align 8, !tbaa !11
  %198 = add nsw i64 %196, %197
  %199 = sub nsw i64 %198, 1
  store i64 %199, ptr %7, align 8, !tbaa !11
  br label %200

200:                                              ; preds = %193, %189
  br label %201

201:                                              ; preds = %200, %182
  br label %202

202:                                              ; preds = %201, %171
  br label %203

203:                                              ; preds = %202, %163
  br label %204

204:                                              ; preds = %203, %153
  br label %205

205:                                              ; preds = %204, %143
  br label %206

206:                                              ; preds = %205, %133
  br label %207

207:                                              ; preds = %206, %126
  br label %208

208:                                              ; preds = %207, %125
  %209 = load i64, ptr %7, align 8, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #4
  ret i64 %209
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4Data10MemoryTypecvNS0_12MemoryType_tEEv(ptr noundef nonnull align 4 dereferenceable(4)) #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIlERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_ZTSN4Data10MemCommand4cmdsE", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!14, !12, i64 56}
!14 = !{!"_ZTSN4Data19MemorySpecificationE", !15, i64 8, !17, i64 40, !19, i64 48, !21, i64 160, !23, i64 456}
!15 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !16, i64 0, !12, i64 8, !7, i64 16}
!16 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!17 = !{!"_ZTSN4Data10MemoryTypeE", !18, i64 0}
!18 = !{!"_ZTSN4Data10MemoryType12MemoryType_tE", !7, i64 0}
!19 = !{!"_ZTSN4Data19MemArchitectureSpecE", !12, i64 8, !12, i64 16, !12, i64 24, !12, i64 32, !12, i64 40, !12, i64 48, !12, i64 56, !12, i64 64, !20, i64 72, !20, i64 73, !20, i64 74}
!20 = !{!"bool", !7, i64 0}
!21 = !{!"_ZTSN4Data13MemTimingSpecE", !22, i64 8, !12, i64 16, !12, i64 24, !12, i64 32, !12, i64 40, !12, i64 48, !12, i64 56, !12, i64 64, !12, i64 72, !12, i64 80, !12, i64 88, !12, i64 96, !12, i64 104, !12, i64 112, !12, i64 120, !12, i64 128, !12, i64 136, !12, i64 144, !12, i64 152, !12, i64 160, !12, i64 168, !12, i64 176, !12, i64 184, !12, i64 192, !12, i64 200, !12, i64 208, !12, i64 216, !12, i64 224, !12, i64 232, !12, i64 240, !12, i64 248, !22, i64 256}
!22 = !{!"double", !7, i64 0}
!23 = !{!"_ZTSN4Data12MemPowerSpecE", !22, i64 8, !22, i64 16, !22, i64 24, !22, i64 32, !22, i64 40, !22, i64 48, !22, i64 56, !22, i64 64, !22, i64 72, !22, i64 80, !22, i64 88, !22, i64 96, !22, i64 104, !22, i64 112, !22, i64 120, !22, i64 128, !22, i64 136, !22, i64 144, !22, i64 152, !22, i64 160, !22, i64 168, !22, i64 176, !22, i64 184, !22, i64 192, !22, i64 200, !22, i64 208, !22, i64 216, !22, i64 224, !22, i64 232, !22, i64 240}
!24 = !{!14, !12, i64 352}
!25 = !{!14, !12, i64 80}
!26 = !{!14, !12, i64 336}
!27 = !{!14, !12, i64 328}
!28 = !{!14, !12, i64 360}
!29 = !{!18, !18, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_ZNK4Data10MemCommand18getPrechargeOffsetERKNS_19MemorySpecificationENS0_4cmdsE(ptr nocapture noundef nonnull readnone align 8 dereferenceable(16) %0, ptr noundef nonnull align 8 dereferenceable(736) %1, i32 noundef %2) local_unnamed_addr #0 align 2 {
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = getelementptr inbounds i8, ptr %1, i64 56
  %12 = load i64, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
  %13 = getelementptr inbounds i8, ptr %1, i64 352
  %14 = load i64, ptr %13, align 8, !tbaa !20
  store i64 %14, ptr %4, align 8, !tbaa !21
  %15 = getelementptr inbounds i8, ptr %1, i64 80
  %16 = load i64, ptr %15, align 8, !tbaa !22
  %17 = getelementptr inbounds i8, ptr %1, i64 336
  %18 = load i64, ptr %17, align 8, !tbaa !23
  %19 = getelementptr inbounds i8, ptr %1, i64 328
  %20 = load i64, ptr %19, align 8, !tbaa !24
  %21 = getelementptr inbounds i8, ptr %1, i64 360
  %22 = load i64, ptr %21, align 8, !tbaa !25
  %23 = sdiv i64 %12, %16
  %24 = getelementptr inbounds i8, ptr %1, i64 40
  %25 = tail call noundef i32 @_ZNK4Data10MemoryTypecvNS0_12MemoryType_tEEv(ptr noundef nonnull align 4 dereferenceable(4) %24)
  switch i32 %2, label %73 [
    i32 7, label %26
    i32 8, label %49
  ]

26:                                               ; preds = %3
  switch i32 %25, label %.fold.split [
    i32 0, label %27
    i32 1, label %33
    i32 2, label %37
    i32 3, label %73
    i32 4, label %39
    i32 5, label %44
    i32 6, label %73
  ]

27:                                               ; preds = %26
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
  store i64 2, ptr %5, align 8, !tbaa !21
  %28 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIlERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %4, ptr noundef nonnull align 8 dereferenceable(8) %5)
  %29 = load i64, ptr %28, align 8, !tbaa !21
  %30 = add i64 %18, -2
  %31 = add i64 %30, %23
  %32 = add nsw i64 %31, %29
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
  br label %73

33:                                               ; preds = %26
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #3
  store i64 4, ptr %6, align 8, !tbaa !21
  %34 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIlERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %4, ptr noundef nonnull align 8 dereferenceable(8) %6)
  %35 = load i64, ptr %34, align 8, !tbaa !21
  %36 = add nsw i64 %35, %18
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #3
  br label %73

37:                                               ; preds = %26
  %38 = add nsw i64 %14, %18
  br label %73

39:                                               ; preds = %26
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %7) #3
  store i64 0, ptr %7, align 8, !tbaa !21
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %8) #3
  %40 = add nsw i64 %14, -2
  store i64 %40, ptr %8, align 8, !tbaa !21
  %41 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIlERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %7, ptr noundef nonnull align 8 dereferenceable(8) %8)
  %42 = load i64, ptr %41, align 8, !tbaa !21
  %43 = add nsw i64 %42, %23
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %8) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #3
  br label %73

44:                                               ; preds = %26
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %9) #3
  store i64 0, ptr %9, align 8, !tbaa !21
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %10) #3
  %45 = add nsw i64 %14, -4
  store i64 %45, ptr %10, align 8, !tbaa !21
  %46 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIlERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %9, ptr noundef nonnull align 8 dereferenceable(8) %10)
  %47 = load i64, ptr %46, align 8, !tbaa !21
  %48 = add nsw i64 %47, %23
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %10) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %9) #3
  br label %73

49:                                               ; preds = %3
  switch i32 %25, label %73 [
    i32 0, label %50
    i32 1, label %53
    i32 2, label %56
    i32 3, label %59
    i32 4, label %61
    i32 5, label %65
    i32 6, label %69
  ]

50:                                               ; preds = %49
  %51 = add i64 %23, %22
  %52 = add i64 %51, %20
  br label %73

53:                                               ; preds = %49
  %54 = add i64 %23, %22
  %55 = add i64 %54, %20
  br label %73

56:                                               ; preds = %49
  %57 = add i64 %23, %22
  %58 = add i64 %57, %20
  br label %73

59:                                               ; preds = %49
  %60 = add nsw i64 %23, %22
  br label %73

61:                                               ; preds = %49
  %62 = add i64 %23, %22
  %63 = add i64 %62, 1
  %64 = add i64 %63, %20
  br label %73

65:                                               ; preds = %49
  %66 = add i64 %23, %22
  %67 = add i64 %66, 1
  %68 = add i64 %67, %20
  br label %73

69:                                               ; preds = %49
  %70 = add i64 %23, %22
  %71 = add i64 %70, -1
  %72 = add i64 %71, %20
  br label %73

.fold.split:                                      ; preds = %26
  br label %73

73:                                               ; preds = %49, %3, %26, %26, %.fold.split, %53, %59, %65, %69, %61, %56, %50, %27, %37, %39, %44, %33
  %.0 = phi i64 [ %32, %27 ], [ %36, %33 ], [ %38, %37 ], [ %43, %39 ], [ %48, %44 ], [ %52, %50 ], [ %55, %53 ], [ %58, %56 ], [ %60, %59 ], [ %64, %61 ], [ %68, %65 ], [ %72, %69 ], [ %23, %26 ], [ 0, %.fold.split ], [ %23, %26 ], [ 0, %3 ], [ 0, %49 ]
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
  ret i64 %.0
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4Data10MemoryTypecvNS0_12MemoryType_tEEv(ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIlERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !12, i64 56}
!6 = !{!"_ZTSN4Data19MemorySpecificationE", !7, i64 8, !13, i64 40, !15, i64 48, !17, i64 160, !19, i64 456}
!7 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !8, i64 0, !12, i64 8, !10, i64 16}
!8 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !9, i64 0}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C++ TBAA"}
!12 = !{!"long", !10, i64 0}
!13 = !{!"_ZTSN4Data10MemoryTypeE", !14, i64 0}
!14 = !{!"_ZTSN4Data10MemoryType12MemoryType_tE", !10, i64 0}
!15 = !{!"_ZTSN4Data19MemArchitectureSpecE", !12, i64 8, !12, i64 16, !12, i64 24, !12, i64 32, !12, i64 40, !12, i64 48, !12, i64 56, !12, i64 64, !16, i64 72, !16, i64 73, !16, i64 74}
!16 = !{!"bool", !10, i64 0}
!17 = !{!"_ZTSN4Data13MemTimingSpecE", !18, i64 8, !12, i64 16, !12, i64 24, !12, i64 32, !12, i64 40, !12, i64 48, !12, i64 56, !12, i64 64, !12, i64 72, !12, i64 80, !12, i64 88, !12, i64 96, !12, i64 104, !12, i64 112, !12, i64 120, !12, i64 128, !12, i64 136, !12, i64 144, !12, i64 152, !12, i64 160, !12, i64 168, !12, i64 176, !12, i64 184, !12, i64 192, !12, i64 200, !12, i64 208, !12, i64 216, !12, i64 224, !12, i64 232, !12, i64 240, !12, i64 248, !18, i64 256}
!18 = !{!"double", !10, i64 0}
!19 = !{!"_ZTSN4Data12MemPowerSpecE", !18, i64 8, !18, i64 16, !18, i64 24, !18, i64 32, !18, i64 40, !18, i64 48, !18, i64 56, !18, i64 64, !18, i64 72, !18, i64 80, !18, i64 88, !18, i64 96, !18, i64 104, !18, i64 112, !18, i64 120, !18, i64 128, !18, i64 136, !18, i64 144, !18, i64 152, !18, i64 160, !18, i64 168, !18, i64 176, !18, i64 184, !18, i64 192, !18, i64 200, !18, i64 208, !18, i64 216, !18, i64 224, !18, i64 232, !18, i64 240}
!20 = !{!6, !12, i64 352}
!21 = !{!12, !12, i64 0}
!22 = !{!6, !12, i64 80}
!23 = !{!6, !12, i64 336}
!24 = !{!6, !12, i64 328}
!25 = !{!6, !12, i64 360}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass