; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/kernel (sc_event)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_core::sc_event_list" = type { %"class.std::vector.31", i8, i8, i32 }
%"class.std::vector.31" = type { %"struct.std::_Vector_base.32" }
%"struct.std::_Vector_base.32" = type { %"struct.std::_Vector_base<const sc_core::sc_event *, std::allocator<const sc_core::sc_event *>>::_Vector_impl" }
%"struct.std::_Vector_base<const sc_core::sc_event *, std::allocator<const sc_core::sc_event *>>::_Vector_impl" = type { %"struct.std::_Vector_base<const sc_core::sc_event *, std::allocator<const sc_core::sc_event *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<const sc_core::sc_event *, std::allocator<const sc_core::sc_event *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIPKN7sc_core8sc_eventESaIS3_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIPKN7sc_core8sc_eventESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZNK7sc_core13sc_event_list11add_dynamicEPNS_17sc_method_processE(ptr noundef nonnull align 8 dereferenceable(32) %0, ptr noundef %1) #2 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %7 = load ptr, ptr %3, align 8
  %8 = getelementptr inbounds %"class.sc_core::sc_event_list", ptr %7, i32 0, i32 3
  %9 = load i32, ptr %8, align 4, !tbaa !9
  %10 = add i32 %9, 1
  store i32 %10, ptr %8, align 4, !tbaa !9
  %11 = getelementptr inbounds %"class.sc_core::sc_event_list", ptr %7, i32 0, i32 0
  %12 = call noundef i64 @_ZNKSt6vectorIPKN7sc_core8sc_eventESaIS3_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %11) #4
  %13 = icmp ne i64 %12, 0
  br i1 %13, label %14, label %36

14:                                               ; preds = %2
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #4
  %15 = getelementptr inbounds %"class.sc_core::sc_event_list", ptr %7, i32 0, i32 0
  %16 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIPKN7sc_core8sc_eventESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %15, i64 noundef 0) #4
  store ptr %16, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  %17 = getelementptr inbounds %"class.sc_core::sc_event_list", ptr %7, i32 0, i32 0
  %18 = call noundef i64 @_ZNKSt6vectorIPKN7sc_core8sc_eventESaIS3_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %17) #4
  %19 = sub i64 %18, 1
  %20 = trunc i64 %19 to i32
  store i32 %20, ptr %6, align 4, !tbaa !17
  br label %21

21:                                               ; preds = %32, %14
  %22 = load i32, ptr %6, align 4, !tbaa !17
  %23 = icmp sge i32 %22, 0
  br i1 %23, label %25, label %24

24:                                               ; preds = %21
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  br label %35

25:                                               ; preds = %21
  %26 = load ptr, ptr %5, align 8, !tbaa !5
  %27 = load i32, ptr %6, align 4, !tbaa !17
  %28 = sext i32 %27 to i64
  %29 = getelementptr inbounds ptr, ptr %26, i64 %28
  %30 = load ptr, ptr %29, align 8, !tbaa !5
  %31 = load ptr, ptr %4, align 8, !tbaa !5
  call void @_ZNK7sc_core8sc_event11add_dynamicEPNS_17sc_method_processE(ptr noundef nonnull align 8 dereferenceable(160) %30, ptr noundef %31)
  br label %32

32:                                               ; preds = %25
  %33 = load i32, ptr %6, align 4, !tbaa !17
  %34 = add nsw i32 %33, -1
  store i32 %34, ptr %6, align 4, !tbaa !17
  br label %21, !llvm.loop !18

35:                                               ; preds = %24
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #4
  br label %36

36:                                               ; preds = %35, %2
  ret void
}

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZNK7sc_core8sc_event11add_dynamicEPNS_17sc_method_processE(ptr noundef nonnull align 8 dereferenceable(160), ptr noundef) #3 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !16, i64 28}
!10 = !{!"_ZTSN7sc_core13sc_event_listE", !11, i64 0, !15, i64 24, !15, i64 25, !16, i64 28}
!11 = !{!"_ZTSSt6vectorIPKN7sc_core8sc_eventESaIS3_EE", !12, i64 0}
!12 = !{!"_ZTSSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE", !13, i64 0}
!13 = !{!"_ZTSNSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE12_Vector_implE", !14, i64 0}
!14 = !{!"_ZTSNSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!15 = !{!"bool", !7, i64 0}
!16 = !{!"int", !7, i64 0}
!17 = !{!16, !16, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIPKN7sc_core8sc_eventESaIS3_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIPKN7sc_core8sc_eventESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZNK7sc_core13sc_event_list11add_dynamicEPNS_17sc_method_processE(ptr noundef nonnull align 8 dereferenceable(32) %0, ptr noundef %1) local_unnamed_addr #1 align 2 {
  %3 = getelementptr inbounds i8, ptr %0, i64 28
  %4 = load i32, ptr %3, align 4, !tbaa !5
  %5 = add i32 %4, 1
  store i32 %5, ptr %3, align 4, !tbaa !5
  %6 = tail call noundef i64 @_ZNKSt6vectorIPKN7sc_core8sc_eventESaIS3_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #3
  %.not = icmp eq i64 %6, 0
  br i1 %.not, label %.loopexit, label %7

7:                                                ; preds = %2
  %8 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIPKN7sc_core8sc_eventESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #3
  %9 = tail call noundef i64 @_ZNKSt6vectorIPKN7sc_core8sc_eventESaIS3_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #3
  %10 = trunc i64 %9 to i32
  %.05 = add i32 %10, -1
  %11 = icmp sgt i32 %.05, -1
  br i1 %11, label %.lr.ph.preheader, label %.loopexit

.lr.ph.preheader:                                 ; preds = %7
  %12 = zext nneg i32 %.05 to i64
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %indvars.iv = phi i64 [ %12, %.lr.ph.preheader ], [ %indvars.iv.next, %.lr.ph ]
  %13 = getelementptr inbounds ptr, ptr %8, i64 %indvars.iv
  %14 = load ptr, ptr %13, align 8, !tbaa !16
  tail call void @_ZNK7sc_core8sc_event11add_dynamicEPNS_17sc_method_processE(ptr noundef nonnull align 8 dereferenceable(160) %14, ptr noundef %1)
  %indvars.iv.next = add nsw i64 %indvars.iv, -1
  %.not8 = icmp eq i64 %indvars.iv, 0
  br i1 %.not8, label %.loopexit, label %.lr.ph, !llvm.loop !17

.loopexit:                                        ; preds = %.lr.ph, %7, %2
  ret void
}

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZNK7sc_core8sc_event11add_dynamicEPNS_17sc_method_processE(ptr noundef nonnull align 8 dereferenceable(160), ptr noundef) local_unnamed_addr #2 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !15, i64 28}
!6 = !{!"_ZTSN7sc_core13sc_event_listE", !7, i64 0, !14, i64 24, !14, i64 25, !15, i64 28}
!7 = !{!"_ZTSSt6vectorIPKN7sc_core8sc_eventESaIS3_EE", !8, i64 0}
!8 = !{!"_ZTSSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE", !9, i64 0}
!9 = !{!"_ZTSNSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE12_Vector_implE", !10, i64 0}
!10 = !{!"_ZTSNSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE17_Vector_impl_dataE", !11, i64 0, !11, i64 8, !11, i64 16}
!11 = !{!"any pointer", !12, i64 0}
!12 = !{!"omnipotent char", !13, i64 0}
!13 = !{!"Simple C++ TBAA"}
!14 = !{!"bool", !12, i64 0}
!15 = !{!"int", !12, i64 0}
!16 = !{!11, !11, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass