; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/MdePkg/Library (S3PciReadBuffer)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [140 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [12 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i64 @S3BootScriptSavePciCfgWrite(i32 noundef, i64 noundef, i64 noundef, ptr noundef) #1

declare zeroext i8 @DebugAssertEnabled() #1

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i64 @S3PciReadBuffer(i64 noundef %0, i64 noundef %1, ptr noundef %2) #2 {
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i64, align 8
  store i64 %0, ptr %4, align 8, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  %8 = load i64, ptr %4, align 8, !tbaa !5
  %9 = lshr i64 %8, 20
  %10 = and i64 %9, 255
  %11 = shl i64 %10, 24
  %12 = load i64, ptr %4, align 8, !tbaa !5
  %13 = lshr i64 %12, 15
  %14 = and i64 %13, 31
  %15 = shl i64 %14, 16
  %16 = add i64 %11, %15
  %17 = load i64, ptr %4, align 8, !tbaa !5
  %18 = lshr i64 %17, 12
  %19 = and i64 %18, 7
  %20 = shl i64 %19, 8
  %21 = add i64 %16, %20
  %22 = load i64, ptr %4, align 8, !tbaa !5
  %23 = and i64 %22, 4095
  %24 = add i64 %21, %23
  %25 = load i64, ptr %4, align 8, !tbaa !5
  %26 = load i64, ptr %5, align 8, !tbaa !5
  %27 = load ptr, ptr %6, align 8, !tbaa !9
  %28 = call i64 @PciReadBuffer(i64 noundef %25, i64 noundef %26, ptr noundef %27)
  %29 = load ptr, ptr %6, align 8, !tbaa !9
  %30 = call i64 @S3BootScriptSavePciCfgWrite(i32 noundef 0, i64 noundef %24, i64 noundef %28, ptr noundef %29)
  store i64 %30, ptr %7, align 8, !tbaa !5
  br label %31

31:                                               ; preds = %3
  %32 = call zeroext i8 @DebugAssertEnabled()
  %33 = icmp ne i8 %32, 0
  br i1 %33, label %34, label %39

34:                                               ; preds = %31
  %35 = load i64, ptr %7, align 8, !tbaa !5
  %36 = icmp eq i64 %35, 0
  br i1 %36, label %38, label %37

37:                                               ; preds = %34
  call void @DebugAssert(ptr noundef @.str, i64 noundef 1220, ptr noundef @.str.1)
  br label %38

38:                                               ; preds = %37, %34
  br label %39

39:                                               ; preds = %38, %31
  br label %40

40:                                               ; preds = %39
  br label %41

41:                                               ; preds = %40
  %42 = load i64, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  ret i64 %42
}

declare i64 @PciReadBuffer(i64 noundef, i64 noundef, ptr noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [140 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [12 x i8], align 1

declare i64 @S3BootScriptSavePciCfgWrite(i32 noundef, i64 noundef, i64 noundef, ptr noundef) local_unnamed_addr #0

declare zeroext i8 @DebugAssertEnabled() local_unnamed_addr #0

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local noundef i64 @S3PciReadBuffer(i64 noundef %0, i64 noundef returned %1, ptr noundef %2) local_unnamed_addr #1 {
  %4 = shl i64 %0, 4
  %5 = and i64 %4, 4278190080
  %6 = shl i64 %0, 1
  %7 = and i64 %6, 2031616
  %8 = or disjoint i64 %5, %7
  %9 = lshr i64 %0, 4
  %10 = and i64 %9, 1792
  %11 = and i64 %0, 4095
  %12 = add nuw nsw i64 %10, %11
  %13 = or disjoint i64 %12, %8
  %14 = tail call i64 @PciReadBuffer(i64 noundef %0, i64 noundef %1, ptr noundef %2) #2
  %15 = tail call i64 @S3BootScriptSavePciCfgWrite(i32 noundef 0, i64 noundef %13, i64 noundef %14, ptr noundef %2) #2
  %16 = tail call zeroext i8 @DebugAssertEnabled() #2
  %17 = icmp eq i8 %16, 0
  %18 = icmp eq i64 %15, 0
  %or.cond = select i1 %17, i1 true, i1 %18
  br i1 %or.cond, label %20, label %19

19:                                               ; preds = %3
  tail call void @DebugAssert(ptr noundef nonnull @.str, i64 noundef 1220, ptr noundef nonnull @.str.1) #2
  br label %20

20:                                               ; preds = %19, %3
  ret i64 %1
}

declare i64 @PciReadBuffer(i64 noundef, i64 noundef, ptr noundef) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass