; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/NetworkPkg/IpSecDxe (IpSecValidAddressRange)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%union.EFI_IP_ADDRESS = type { [4 x i32] }

; Function Attrs: nounwind uwtable
define dso_local zeroext i8 @IpSecValidAddressRange(i8 noundef zeroext %0, ptr noundef %1, i8 noundef zeroext %2) #0 {
  %4 = alloca i8, align 1
  %5 = alloca i8, align 1
  %6 = alloca ptr, align 8
  %7 = alloca i8, align 1
  %8 = alloca i8, align 1
  %9 = alloca i8, align 1
  %10 = alloca i8, align 1
  %11 = alloca i8, align 1
  %12 = alloca ptr, align 8
  %13 = alloca %union.EFI_IP_ADDRESS, align 4
  %14 = alloca i32, align 4
  store i8 %0, ptr %5, align 1, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !8
  store i8 %2, ptr %7, align 1, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %11) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #3
  call void @llvm.lifetime.start.p0(i64 16, ptr %13) #3
  %15 = load i8, ptr %7, align 1, !tbaa !5
  %16 = zext i8 %15 to i32
  %17 = icmp eq i32 %16, 0
  br i1 %17, label %18, label %19

18:                                               ; preds = %3
  store i8 1, ptr %4, align 1
  store i32 1, ptr %14, align 4
  br label %80

19:                                               ; preds = %3
  %20 = load i8, ptr %5, align 1, !tbaa !5
  %21 = zext i8 %20 to i32
  %22 = icmp eq i32 %21, 4
  %23 = zext i1 %22 to i64
  %24 = select i1 %22, i32 32, i32 128
  %25 = trunc i32 %24 to i8
  store i8 %25, ptr %11, align 1, !tbaa !5
  %26 = load i8, ptr %11, align 1, !tbaa !5
  %27 = zext i8 %26 to i32
  %28 = load i8, ptr %7, align 1, !tbaa !5
  %29 = zext i8 %28 to i32
  %30 = icmp sle i32 %27, %29
  br i1 %30, label %31, label %32

31:                                               ; preds = %19
  store i8 0, ptr %4, align 1
  store i32 1, ptr %14, align 4
  br label %80

32:                                               ; preds = %19
  %33 = load i8, ptr %7, align 1, !tbaa !5
  %34 = zext i8 %33 to i32
  %35 = sdiv i32 %34, 8
  %36 = trunc i32 %35 to i8
  store i8 %36, ptr %8, align 1, !tbaa !5
  %37 = load i8, ptr %7, align 1, !tbaa !5
  %38 = zext i8 %37 to i32
  %39 = srem i32 %38, 8
  %40 = trunc i32 %39 to i8
  store i8 %40, ptr %9, align 1, !tbaa !5
  %41 = load ptr, ptr %6, align 8, !tbaa !8
  store ptr %41, ptr %12, align 8, !tbaa !8
  %42 = call ptr @ZeroMem(ptr noundef %13, i64 noundef 16)
  %43 = load i8, ptr %9, align 1, !tbaa !5
  %44 = zext i8 %43 to i32
  %45 = icmp sgt i32 %44, 0
  br i1 %45, label %46, label %68

46:                                               ; preds = %32
  %47 = load i8, ptr %9, align 1, !tbaa !5
  %48 = zext i8 %47 to i32
  %49 = sub nsw i32 8, %48
  %50 = shl i32 255, %49
  %51 = trunc i32 %50 to i8
  store i8 %51, ptr %10, align 1, !tbaa !5
  %52 = load ptr, ptr %12, align 8, !tbaa !8
  %53 = load i8, ptr %8, align 1, !tbaa !5
  %54 = zext i8 %53 to i64
  %55 = getelementptr inbounds i8, ptr %52, i64 %54
  %56 = load i8, ptr %55, align 1, !tbaa !5
  %57 = zext i8 %56 to i32
  %58 = load i8, ptr %10, align 1, !tbaa !5
  %59 = zext i8 %58 to i32
  %60 = or i32 %57, %59
  %61 = load i8, ptr %10, align 1, !tbaa !5
  %62 = zext i8 %61 to i32
  %63 = icmp ne i32 %60, %62
  br i1 %63, label %64, label %65

64:                                               ; preds = %46
  store i8 0, ptr %4, align 1
  store i32 1, ptr %14, align 4
  br label %80

65:                                               ; preds = %46
  %66 = load i8, ptr %8, align 1, !tbaa !5
  %67 = add i8 %66, 1
  store i8 %67, ptr %8, align 1, !tbaa !5
  br label %68

68:                                               ; preds = %65, %32
  %69 = load ptr, ptr %12, align 8, !tbaa !8
  %70 = load i8, ptr %8, align 1, !tbaa !5
  %71 = zext i8 %70 to i64
  %72 = getelementptr inbounds i8, ptr %69, i64 %71
  %73 = load i8, ptr %8, align 1, !tbaa !5
  %74 = zext i8 %73 to i64
  %75 = sub i64 16, %74
  %76 = call i64 @CompareMem(ptr noundef %72, ptr noundef %13, i64 noundef %75)
  %77 = icmp ne i64 %76, 0
  br i1 %77, label %78, label %79

78:                                               ; preds = %68
  store i8 0, ptr %4, align 1
  store i32 1, ptr %14, align 4
  br label %80

79:                                               ; preds = %68
  store i8 1, ptr %4, align 1
  store i32 1, ptr %14, align 4
  br label %80

80:                                               ; preds = %79, %78, %64, %31, %18
  call void @llvm.lifetime.end.p0(i64 16, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #3
  %81 = load i8, ptr %4, align 1
  ret i8 %81
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare ptr @ZeroMem(ptr noundef, i64 noundef) #2

declare i64 @CompareMem(ptr noundef, ptr noundef, i64 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"any pointer", !6, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%union.EFI_IP_ADDRESS = type { [4 x i32] }

; Function Attrs: nounwind uwtable
define dso_local zeroext range(i8 0, 2) i8 @IpSecValidAddressRange(i8 noundef zeroext %0, ptr noundef %1, i8 noundef zeroext %2) local_unnamed_addr #0 {
  %4 = alloca %union.EFI_IP_ADDRESS, align 4
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #3
  %5 = icmp eq i8 %2, 0
  br i1 %5, label %31, label %6

6:                                                ; preds = %3
  %7 = zext i8 %2 to i32
  %8 = icmp eq i8 %0, 4
  %9 = select i1 %8, i32 32, i32 128
  %.not = icmp ugt i32 %9, %7
  br i1 %.not, label %10, label %31

10:                                               ; preds = %6
  %11 = lshr i8 %2, 3
  %12 = and i8 %2, 7
  %13 = call ptr @ZeroMem(ptr noundef nonnull %4, i64 noundef 16) #3
  %.not20 = icmp eq i8 %12, 0
  br i1 %.not20, label %26, label %14

14:                                               ; preds = %10
  %narrow = sub nuw nsw i8 8, %12
  %15 = zext nneg i8 %narrow to i16
  %16 = shl nuw nsw i16 255, %15
  %17 = zext nneg i8 %11 to i64
  %18 = getelementptr inbounds i8, ptr %1, i64 %17
  %19 = load i8, ptr %18, align 1, !tbaa !5
  %20 = zext i8 %19 to i32
  %21 = and i16 %16, 254
  %22 = zext nneg i16 %21 to i32
  %23 = or i32 %20, %22
  %.not21 = icmp eq i32 %23, %22
  br i1 %.not21, label %24, label %31

24:                                               ; preds = %14
  %25 = add nuw nsw i8 %11, 1
  br label %26

26:                                               ; preds = %24, %10
  %.017 = phi i8 [ %25, %24 ], [ %11, %10 ]
  %27 = zext nneg i8 %.017 to i64
  %28 = getelementptr inbounds i8, ptr %1, i64 %27
  %29 = sub nuw nsw i64 16, %27
  %30 = call i64 @CompareMem(ptr noundef %28, ptr noundef nonnull %4, i64 noundef %29) #3
  %.not22 = icmp eq i64 %30, 0
  %. = zext i1 %.not22 to i8
  br label %31

31:                                               ; preds = %26, %14, %6, %3
  %.0 = phi i8 [ 1, %3 ], [ 0, %6 ], [ 0, %14 ], [ %., %26 ]
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
  ret i8 %.0
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare ptr @ZeroMem(ptr noundef, i64 noundef) local_unnamed_addr #2

declare i64 @CompareMem(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass