; LLVM IR from gem5/gem5 :: ext/drampower/src/MemArchitectureSpec.ll (ZN4Data19MemArchitectureSpecC1Ev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.Data::MemArchitectureSpec" = type <{ ptr, i64, i64, i64, i64, i64, i64, i64, i64, i8, i8, i8, [5 x i8], %"class.Data::Parametrisable" }>
%"class.Data::Parametrisable" = type { ptr, %"class.std::vector" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Data::Parameter, std::allocator<Data::Parameter>>::_Vector_impl" }
%"struct.std::_Vector_base<Data::Parameter, std::allocator<Data::Parameter>>::_Vector_impl" = type { %"struct.std::_Vector_base<Data::Parameter, std::allocator<Data::Parameter>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Data::Parameter, std::allocator<Data::Parameter>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@_ZTVN4Data19MemArchitectureSpecE = external dso_local unnamed_addr constant { [5 x ptr], [7 x ptr] }, align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Data19MemArchitectureSpecC1Ev(ptr noundef nonnull align 8 dereferenceable(75) %0) unnamed_addr #0 align 2 {
  %2 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %3 = load ptr, ptr %2, align 8
  %4 = getelementptr inbounds i8, ptr %3, i64 80
  call void @_ZN4Data14ParametrisableC2Ev(ptr noundef nonnull align 8 dereferenceable(32) %4)
  store ptr getelementptr inbounds inrange(-24, 16) ({ [5 x ptr], [7 x ptr] }, ptr @_ZTVN4Data19MemArchitectureSpecE, i32 0, i32 0, i32 3), ptr %3, align 8, !tbaa !9
  %5 = getelementptr inbounds i8, ptr %3, i64 80
  store ptr getelementptr inbounds inrange(-32, 24) ({ [5 x ptr], [7 x ptr] }, ptr @_ZTVN4Data19MemArchitectureSpecE, i32 0, i32 1, i32 4), ptr %5, align 8, !tbaa !9
  %6 = getelementptr inbounds %"class.Data::MemArchitectureSpec", ptr %3, i32 0, i32 1
  store i64 0, ptr %6, align 8, !tbaa !11
  %7 = getelementptr inbounds %"class.Data::MemArchitectureSpec", ptr %3, i32 0, i32 2
  store i64 0, ptr %7, align 8, !tbaa !15
  %8 = getelementptr inbounds %"class.Data::MemArchitectureSpec", ptr %3, i32 0, i32 3
  store i64 0, ptr %8, align 8, !tbaa !16
  %9 = getelementptr inbounds %"class.Data::MemArchitectureSpec", ptr %3, i32 0, i32 4
  store i64 0, ptr %9, align 8, !tbaa !17
  %10 = getelementptr inbounds %"class.Data::MemArchitectureSpec", ptr %3, i32 0, i32 5
  store i64 0, ptr %10, align 8, !tbaa !18
  %11 = getelementptr inbounds %"class.Data::MemArchitectureSpec", ptr %3, i32 0, i32 6
  store i64 0, ptr %11, align 8, !tbaa !19
  %12 = getelementptr inbounds %"class.Data::MemArchitectureSpec", ptr %3, i32 0, i32 7
  store i64 0, ptr %12, align 8, !tbaa !20
  %13 = getelementptr inbounds %"class.Data::MemArchitectureSpec", ptr %3, i32 0, i32 8
  store i64 0, ptr %13, align 8, !tbaa !21
  %14 = getelementptr inbounds %"class.Data::MemArchitectureSpec", ptr %3, i32 0, i32 9
  store i8 0, ptr %14, align 8, !tbaa !22
  %15 = getelementptr inbounds %"class.Data::MemArchitectureSpec", ptr %3, i32 0, i32 10
  store i8 0, ptr %15, align 1, !tbaa !23
  %16 = getelementptr inbounds %"class.Data::MemArchitectureSpec", ptr %3, i32 0, i32 11
  store i8 0, ptr %16, align 2, !tbaa !24
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4Data14ParametrisableC2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"vtable pointer", !8, i64 0}
!11 = !{!12, !13, i64 8}
!12 = !{!"_ZTSN4Data19MemArchitectureSpecE", !13, i64 8, !13, i64 16, !13, i64 24, !13, i64 32, !13, i64 40, !13, i64 48, !13, i64 56, !13, i64 64, !14, i64 72, !14, i64 73, !14, i64 74}
!13 = !{!"long", !7, i64 0}
!14 = !{!"bool", !7, i64 0}
!15 = !{!12, !13, i64 16}
!16 = !{!12, !13, i64 24}
!17 = !{!12, !13, i64 32}
!18 = !{!12, !13, i64 40}
!19 = !{!12, !13, i64 48}
!20 = !{!12, !13, i64 56}
!21 = !{!12, !13, i64 64}
!22 = !{!12, !14, i64 72}
!23 = !{!12, !14, i64 73}
!24 = !{!12, !14, i64 74}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZTVN4Data19MemArchitectureSpecE = external dso_local unnamed_addr constant { [5 x ptr], [7 x ptr] }, align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN4Data19MemArchitectureSpecC1Ev(ptr noundef nonnull align 8 dereferenceable(75) %0) unnamed_addr #0 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 80
  tail call void @_ZN4Data14ParametrisableC2Ev(ptr noundef nonnull align 8 dereferenceable(32) %2)
  store ptr getelementptr inbounds inrange(-24, 16) (i8, ptr @_ZTVN4Data19MemArchitectureSpecE, i64 24), ptr %0, align 8, !tbaa !5
  store ptr getelementptr inbounds inrange(-32, 24) (i8, ptr @_ZTVN4Data19MemArchitectureSpecE, i64 72), ptr %2, align 8, !tbaa !5
  %3 = getelementptr inbounds i8, ptr %0, i64 8
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(67) %3, i8 0, i64 67, i1 false)
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4Data14ParametrisableC2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #0 align 2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"vtable pointer", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,InstCombinePass,MemCpyOptPass,PostOrderFunctionAttrsPass,SROAPass,TailCallElimPass