; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Universal (ArpFindNextCacheEntryInTable)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct._LIST_ENTRY = type { ptr, ptr }
%struct.ARP_CACHE_ENTRY = type { %struct._LIST_ENTRY, i32, i32, i32, i32, [2 x %struct.NET_ARP_ADDRESS], %struct._LIST_ENTRY }
%struct.NET_ARP_ADDRESS = type { i16, i8, ptr, %union.NET_ARP_ADDRESS_UNION }
%union.NET_ARP_ADDRESS_UNION = type { [32 x i8] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local ptr @ArpFindNextCacheEntryInTable(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, ptr noundef %4) #1 {
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca ptr, align 8
  %14 = alloca i32, align 4
  store ptr %0, ptr %7, align 8, !tbaa !5
  store ptr %1, ptr %8, align 8, !tbaa !5
  store i32 %2, ptr %9, align 4, !tbaa !9
  store ptr %3, ptr %10, align 8, !tbaa !5
  store ptr %4, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #2
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #2
  %15 = load ptr, ptr %8, align 8, !tbaa !5
  %16 = icmp eq ptr %15, null
  br i1 %16, label %17, label %19

17:                                               ; preds = %5
  %18 = load ptr, ptr %7, align 8, !tbaa !5
  store ptr %18, ptr %8, align 8, !tbaa !5
  br label %19

19:                                               ; preds = %17, %5
  %20 = load ptr, ptr %8, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct._LIST_ENTRY, ptr %20, i32 0, i32 0
  %22 = load ptr, ptr %21, align 8, !tbaa !11
  store ptr %22, ptr %12, align 8, !tbaa !5
  br label %23

23:                                               ; preds = %59, %19
  %24 = load ptr, ptr %12, align 8, !tbaa !5
  %25 = load ptr, ptr %7, align 8, !tbaa !5
  %26 = icmp ne ptr %24, %25
  br i1 %26, label %27, label %63

27:                                               ; preds = %23
  %28 = load ptr, ptr %12, align 8, !tbaa !5
  %29 = ptrtoint ptr %28 to i64
  %30 = sub i64 %29, 0
  %31 = inttoptr i64 %30 to ptr
  store ptr %31, ptr %13, align 8, !tbaa !5
  %32 = load i32, ptr %9, align 4, !tbaa !9
  %33 = and i32 %32, 1
  %34 = icmp ne i32 %33, 0
  br i1 %34, label %35, label %44

35:                                               ; preds = %27
  %36 = load ptr, ptr %10, align 8, !tbaa !5
  %37 = load ptr, ptr %13, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.ARP_CACHE_ENTRY, ptr %37, i32 0, i32 5
  %39 = getelementptr inbounds [2 x %struct.NET_ARP_ADDRESS], ptr %38, i64 0, i64 1
  %40 = call zeroext i8 @ArpMatchAddress(ptr noundef %36, ptr noundef %39)
  %41 = icmp ne i8 %40, 0
  br i1 %41, label %43, label %42

42:                                               ; preds = %35
  br label %59

43:                                               ; preds = %35
  br label %44

44:                                               ; preds = %43, %27
  %45 = load i32, ptr %9, align 4, !tbaa !9
  %46 = and i32 %45, 2
  %47 = icmp ne i32 %46, 0
  br i1 %47, label %48, label %57

48:                                               ; preds = %44
  %49 = load ptr, ptr %11, align 8, !tbaa !5
  %50 = load ptr, ptr %13, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.ARP_CACHE_ENTRY, ptr %50, i32 0, i32 5
  %52 = getelementptr inbounds [2 x %struct.NET_ARP_ADDRESS], ptr %51, i64 0, i64 0
  %53 = call zeroext i8 @ArpMatchAddress(ptr noundef %49, ptr noundef %52)
  %54 = icmp ne i8 %53, 0
  br i1 %54, label %56, label %55

55:                                               ; preds = %48
  br label %59

56:                                               ; preds = %48
  br label %57

57:                                               ; preds = %56, %44
  %58 = load ptr, ptr %13, align 8, !tbaa !5
  store ptr %58, ptr %6, align 8
  store i32 1, ptr %14, align 4
  br label %64

59:                                               ; preds = %55, %42
  %60 = load ptr, ptr %12, align 8, !tbaa !5
  %61 = getelementptr inbounds %struct._LIST_ENTRY, ptr %60, i32 0, i32 0
  %62 = load ptr, ptr %61, align 8, !tbaa !11
  store ptr %62, ptr %12, align 8, !tbaa !5
  br label %23, !llvm.loop !13

63:                                               ; preds = %23
  store ptr null, ptr %6, align 8
  store i32 1, ptr %14, align 4
  br label %64

64:                                               ; preds = %63, %57
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #2
  %65 = load ptr, ptr %6, align 8
  ret ptr %65
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @ArpMatchAddress(ptr noundef, ptr noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"_LIST_ENTRY", !6, i64 0, !6, i64 8}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local ptr @ArpFindNextCacheEntryInTable(ptr noundef readonly %0, ptr noundef readonly %1, i32 noundef %2, ptr noundef %3, ptr noundef %4) local_unnamed_addr #0 {
  %6 = icmp eq ptr %1, null
  %spec.select = select i1 %6, ptr %0, ptr %1
  %.01421 = load ptr, ptr %spec.select, align 8, !tbaa !5
  %.not22 = icmp eq ptr %.01421, %0
  br i1 %.not22, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %5
  %7 = and i32 %2, 1
  %.not17 = icmp eq i32 %7, 0
  %8 = and i32 %2, 2
  %.not19 = icmp eq i32 %8, 0
  br i1 %.not17, label %.lr.ph.split.us, label %.lr.ph.split

.lr.ph.split.us:                                  ; preds = %.lr.ph
  br i1 %.not19, label %._crit_edge, label %.lr.ph.split.us.split

.lr.ph.split.us.split:                            ; preds = %.lr.ph.split.us, %11
  %.01423.us = phi ptr [ %.014.us, %11 ], [ %.01421, %.lr.ph.split.us ]
  %9 = getelementptr inbounds i8, ptr %.01423.us, i64 32
  %10 = tail call zeroext i8 @ArpMatchAddress(ptr noundef %4, ptr noundef nonnull %9)
  %.not20.us = icmp eq i8 %10, 0
  br i1 %.not20.us, label %11, label %._crit_edge

11:                                               ; preds = %.lr.ph.split.us.split
  %.014.us = load ptr, ptr %.01423.us, align 8, !tbaa !5
  %.not.us = icmp eq ptr %.014.us, %0
  br i1 %.not.us, label %._crit_edge, label %.lr.ph.split.us.split, !llvm.loop !10

.lr.ph.split:                                     ; preds = %.lr.ph
  br i1 %.not19, label %.lr.ph.split.split.us, label %.lr.ph.split.split

.lr.ph.split.split.us:                            ; preds = %.lr.ph.split, %14
  %.01423.us30 = phi ptr [ %.014.us31, %14 ], [ %.01421, %.lr.ph.split ]
  %12 = getelementptr inbounds i8, ptr %.01423.us30, i64 80
  %13 = tail call zeroext i8 @ArpMatchAddress(ptr noundef %3, ptr noundef nonnull %12)
  %.not18.us = icmp eq i8 %13, 0
  br i1 %.not18.us, label %14, label %._crit_edge

14:                                               ; preds = %.lr.ph.split.split.us
  %.014.us31 = load ptr, ptr %.01423.us30, align 8, !tbaa !5
  %.not.us32 = icmp eq ptr %.014.us31, %0
  br i1 %.not.us32, label %._crit_edge, label %.lr.ph.split.split.us, !llvm.loop !10

.lr.ph.split.split:                               ; preds = %.lr.ph.split, %20
  %.01423 = phi ptr [ %.014, %20 ], [ %.01421, %.lr.ph.split ]
  %15 = getelementptr inbounds i8, ptr %.01423, i64 80
  %16 = tail call zeroext i8 @ArpMatchAddress(ptr noundef %3, ptr noundef nonnull %15)
  %.not18 = icmp eq i8 %16, 0
  br i1 %.not18, label %20, label %17

17:                                               ; preds = %.lr.ph.split.split
  %18 = getelementptr inbounds i8, ptr %.01423, i64 32
  %19 = tail call zeroext i8 @ArpMatchAddress(ptr noundef %4, ptr noundef nonnull %18)
  %.not20 = icmp eq i8 %19, 0
  br i1 %.not20, label %20, label %._crit_edge

20:                                               ; preds = %17, %.lr.ph.split.split
  %.014 = load ptr, ptr %.01423, align 8, !tbaa !5
  %.not = icmp eq ptr %.014, %0
  br i1 %.not, label %._crit_edge, label %.lr.ph.split.split, !llvm.loop !10

._crit_edge:                                      ; preds = %17, %20, %.lr.ph.split.split.us, %14, %.lr.ph.split.us.split, %11, %.lr.ph.split.us, %5
  %.0 = phi ptr [ null, %5 ], [ %.01421, %.lr.ph.split.us ], [ null, %11 ], [ %.01423.us, %.lr.ph.split.us.split ], [ null, %14 ], [ %.01423.us30, %.lr.ph.split.split.us ], [ null, %20 ], [ %.01423, %17 ]
  ret ptr %.0
}

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @ArpMatchAddress(ptr noundef, ptr noundef) local_unnamed_addr #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_LIST_ENTRY", !7, i64 0, !7, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass