; LLVM IR from gem5/gem5 :: ext/softfloat (ui64_to_f16)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.float16_t = type { i16 }
%union.ui16_f16 = type { i16 }

; Function Attrs: nounwind uwtable
define dso_local i16 @ui64_to_f16(i64 noundef %0) #0 {
  %2 = alloca %struct.float16_t, align 2
  %3 = alloca i64, align 8
  %4 = alloca i8, align 1
  %5 = alloca %union.ui16_f16, align 2
  %6 = alloca i64, align 8
  %7 = alloca i32, align 4
  store i64 %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %4) #5
  call void @llvm.lifetime.start.p0(i64 2, ptr %5) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #5
  %8 = load i64, ptr %3, align 8, !tbaa !5
  %9 = call zeroext i8 @softfloat_countLeadingZeros64(i64 noundef %8)
  %10 = zext i8 %9 to i32
  %11 = sub nsw i32 %10, 53
  %12 = trunc i32 %11 to i8
  store i8 %12, ptr %4, align 1, !tbaa !9
  %13 = load i8, ptr %4, align 1, !tbaa !9
  %14 = sext i8 %13 to i32
  %15 = icmp sle i32 0, %14
  br i1 %15, label %16, label %38

16:                                               ; preds = %1
  %17 = load i64, ptr %3, align 8, !tbaa !5
  %18 = icmp ne i64 %17, 0
  br i1 %18, label %19, label %34

19:                                               ; preds = %16
  %20 = load i8, ptr %4, align 1, !tbaa !9
  %21 = sext i8 %20 to i32
  %22 = sub nsw i32 24, %21
  %23 = trunc i32 %22 to i16
  %24 = zext i16 %23 to i32
  %25 = shl i32 %24, 10
  %26 = add nsw i32 0, %25
  %27 = sext i32 %26 to i64
  %28 = load i64, ptr %3, align 8, !tbaa !5
  %29 = load i8, ptr %4, align 1, !tbaa !9
  %30 = sext i8 %29 to i32
  %31 = zext i32 %30 to i64
  %32 = shl i64 %28, %31
  %33 = add i64 %27, %32
  br label %35

34:                                               ; preds = %16
  br label %35

35:                                               ; preds = %34, %19
  %36 = phi i64 [ %33, %19 ], [ 0, %34 ]
  %37 = trunc i64 %36 to i16
  store i16 %37, ptr %5, align 2, !tbaa !9
  call void @llvm.memcpy.p0.p0.i64(ptr align 2 %2, ptr align 2 %5, i64 2, i1 false), !tbaa.struct !10
  store i32 1, ptr %7, align 4
  br label %68

38:                                               ; preds = %1
  %39 = load i8, ptr %4, align 1, !tbaa !9
  %40 = sext i8 %39 to i32
  %41 = add nsw i32 %40, 4
  %42 = trunc i32 %41 to i8
  store i8 %42, ptr %4, align 1, !tbaa !9
  %43 = load i8, ptr %4, align 1, !tbaa !9
  %44 = sext i8 %43 to i32
  %45 = icmp slt i32 %44, 0
  br i1 %45, label %46, label %53

46:                                               ; preds = %38
  %47 = load i64, ptr %3, align 8, !tbaa !5
  %48 = load i8, ptr %4, align 1, !tbaa !9
  %49 = sext i8 %48 to i32
  %50 = sub nsw i32 0, %49
  %51 = trunc i32 %50 to i8
  %52 = call i64 @softfloat_shortShiftRightJam64(i64 noundef %47, i8 noundef zeroext %51)
  br label %59

53:                                               ; preds = %38
  %54 = load i64, ptr %3, align 8, !tbaa !5
  %55 = load i8, ptr %4, align 1, !tbaa !9
  %56 = sext i8 %55 to i32
  %57 = zext i32 %56 to i64
  %58 = shl i64 %54, %57
  br label %59

59:                                               ; preds = %53, %46
  %60 = phi i64 [ %52, %46 ], [ %58, %53 ]
  store i64 %60, ptr %6, align 8, !tbaa !5
  %61 = load i8, ptr %4, align 1, !tbaa !9
  %62 = sext i8 %61 to i32
  %63 = sub nsw i32 28, %62
  %64 = sext i32 %63 to i64
  %65 = load i64, ptr %6, align 8, !tbaa !5
  %66 = call i16 @softfloat_roundPackToF16(i1 noundef zeroext false, i64 noundef %64, i64 noundef %65)
  %67 = getelementptr inbounds %struct.float16_t, ptr %2, i32 0, i32 0
  store i16 %66, ptr %67, align 2
  store i32 1, ptr %7, align 4
  br label %68

68:                                               ; preds = %59, %35
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 2, ptr %5) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr %4) #5
  %69 = getelementptr inbounds %struct.float16_t, ptr %2, i32 0, i32 0
  %70 = load i16, ptr %69, align 2
  ret i16 %70
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare zeroext i8 @softfloat_countLeadingZeros64(i64 noundef) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden i64 @softfloat_shortShiftRightJam64(i64 noundef, i8 noundef zeroext) #4

declare i16 @softfloat_roundPackToF16(i1 noundef zeroext, i64 noundef, i64 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{i64 0, i64 2, !11}
!11 = !{!12, !12, i64 0}
!12 = !{!"short", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i16 @ui64_to_f16(i64 noundef %0) local_unnamed_addr #0 {
  %2 = tail call zeroext i8 @softfloat_countLeadingZeros64(i64 noundef %0) #3
  %3 = add i8 %2, -53
  %4 = icmp sgt i8 %3, -1
  br i1 %4, label %5, label %12

5:                                                ; preds = %1
  %.not = icmp eq i64 %0, 0
  br i1 %.not, label %27, label %6

6:                                                ; preds = %5
  %7 = zext nneg i8 %3 to i64
  %8 = shl nuw nsw i64 %7, 10
  %9 = shl i64 %0, %7
  %reass.sub = sub i64 %9, %8
  %10 = trunc i64 %reass.sub to i16
  %11 = add i16 %10, 24576
  br label %27

12:                                               ; preds = %1
  %13 = add nsw i8 %2, -49
  %14 = sext i8 %13 to i32
  %15 = icmp slt i8 %2, 49
  br i1 %15, label %16, label %19

16:                                               ; preds = %12
  %17 = sub nsw i8 49, %2
  %18 = tail call i64 @softfloat_shortShiftRightJam64(i64 noundef %0, i8 noundef zeroext %17)
  br label %22

19:                                               ; preds = %12
  %20 = zext nneg i32 %14 to i64
  %21 = shl i64 %0, %20
  br label %22

22:                                               ; preds = %19, %16
  %23 = phi i64 [ %18, %16 ], [ %21, %19 ]
  %24 = sub nsw i32 28, %14
  %25 = zext nneg i32 %24 to i64
  %26 = tail call i16 @softfloat_roundPackToF16(i1 noundef zeroext false, i64 noundef %25, i64 noundef %23) #3
  br label %27

27:                                               ; preds = %6, %5, %22
  %.sroa.014.0 = phi i16 [ %26, %22 ], [ %11, %6 ], [ 0, %5 ]
  ret i16 %.sroa.014.0
}

declare zeroext i8 @softfloat_countLeadingZeros64(i64 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i64 @softfloat_shortShiftRightJam64(i64 noundef, i8 noundef zeroext) local_unnamed_addr #2

declare i16 @softfloat_roundPackToF16(i1 noundef zeroext, i64 noundef, i64 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass