; LLVM IR from gem5/gem5 :: ext/drampower/src (CmdScheduler)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.Data::MemorySpecification" = type { ptr, %"class.std::__cxx11::basic_string", %"class.Data::MemoryType", [4 x i8], %"class.Data::MemArchitectureSpec", %"class.Data::MemTimingSpec", %"class.Data::MemPowerSpec", %"class.Data::Parametrisable" }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.Data::MemoryType" = type { i32 }
%"class.Data::MemArchitectureSpec" = type <{ ptr, i64, i64, i64, i64, i64, i64, i64, i64, i8, i8, i8, [5 x i8], %"class.Data::Parametrisable" }>
%"class.Data::MemTimingSpec" = type { ptr, double, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, double, %"class.Data::Parametrisable" }
%"class.Data::MemPowerSpec" = type { ptr, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, %"class.Data::Parametrisable" }
%"class.Data::Parametrisable" = type { ptr, %"class.std::vector.14" }
%"class.std::vector.14" = type { %"struct.std::_Vector_base.15" }
%"struct.std::_Vector_base.15" = type { %"struct.std::_Vector_base<Data::Parameter, std::allocator<Data::Parameter>>::_Vector_impl" }
%"struct.std::_Vector_base<Data::Parameter, std::allocator<Data::Parameter>>::_Vector_impl" = type { %"struct.std::_Vector_base<Data::Parameter, std::allocator<Data::Parameter>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Data::Parameter, std::allocator<Data::Parameter>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@.str.16 = external hidden unnamed_addr constant [31 x i8], align 1
@.str.17 = external hidden unnamed_addr constant [77 x i8], align 1
@__PRETTY_FUNCTION__._ZN4Data12cmdScheduler7getRWTPElRKNS_19MemorySpecificationE = external hidden unnamed_addr constant [74 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIlERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_ZN4Data12cmdScheduler7getRWTPElRKNS_19MemorySpecificationE(ptr noundef nonnull align 8 dereferenceable(1080) %0, i64 noundef %1, ptr noundef nonnull align 8 dereferenceable(736) %2) #2 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca i64, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i64, align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !9
  store ptr %2, ptr %6, align 8, !tbaa !5
  %13 = load ptr, ptr %4, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #5
  store i64 0, ptr %7, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #5
  %14 = load ptr, ptr %6, align 8, !tbaa !5
  %15 = getelementptr inbounds %"class.Data::MemorySpecification", ptr %14, i32 0, i32 5
  store ptr %15, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #5
  %16 = load ptr, ptr %6, align 8, !tbaa !5
  %17 = getelementptr inbounds %"class.Data::MemorySpecification", ptr %16, i32 0, i32 4
  store ptr %17, ptr %9, align 8, !tbaa !5
  %18 = load i64, ptr %5, align 8, !tbaa !9
  %19 = icmp eq i64 %18, 0
  br i1 %19, label %20, label %71

20:                                               ; preds = %3
  %21 = load ptr, ptr %6, align 8, !tbaa !5
  %22 = getelementptr inbounds %"class.Data::MemorySpecification", ptr %21, i32 0, i32 2
  %23 = call noundef i32 @_ZNK4Data10MemoryTypecvNS0_12MemoryType_tEEv(ptr noundef nonnull align 4 dereferenceable(4) %22)
  switch i32 %23, label %69 [
    i32 3, label %24
    i32 6, label %24
    i32 4, label %32
    i32 5, label %32
    i32 0, label %47
    i32 1, label %65
    i32 2, label %65
  ]

24:                                               ; preds = %20, %20
  %25 = load ptr, ptr %9, align 8, !tbaa !5
  %26 = getelementptr inbounds %"class.Data::MemArchitectureSpec", ptr %25, i32 0, i32 1
  %27 = load i64, ptr %26, align 8, !tbaa !11
  %28 = load ptr, ptr %9, align 8, !tbaa !5
  %29 = getelementptr inbounds %"class.Data::MemArchitectureSpec", ptr %28, i32 0, i32 4
  %30 = load i64, ptr %29, align 8, !tbaa !14
  %31 = sdiv i64 %27, %30
  store i64 %31, ptr %7, align 8, !tbaa !9
  br label %70

32:                                               ; preds = %20, %20
  %33 = load ptr, ptr %9, align 8, !tbaa !5
  %34 = getelementptr inbounds %"class.Data::MemArchitectureSpec", ptr %33, i32 0, i32 1
  %35 = load i64, ptr %34, align 8, !tbaa !11
  %36 = load ptr, ptr %9, align 8, !tbaa !5
  %37 = getelementptr inbounds %"class.Data::MemArchitectureSpec", ptr %36, i32 0, i32 4
  %38 = load i64, ptr %37, align 8, !tbaa !14
  %39 = sdiv i64 %35, %38
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #5
  store i64 0, ptr %10, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #5
  %40 = load ptr, ptr %8, align 8, !tbaa !5
  %41 = getelementptr inbounds %"class.Data::MemTimingSpec", ptr %40, i32 0, i32 24
  %42 = load i64, ptr %41, align 8, !tbaa !15
  %43 = sub nsw i64 %42, 2
  store i64 %43, ptr %11, align 8, !tbaa !9
  %44 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIlERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %10, ptr noundef nonnull align 8 dereferenceable(8) %11)
  %45 = load i64, ptr %44, align 8, !tbaa !9
  %46 = add nsw i64 %39, %45
  store i64 %46, ptr %7, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #5
  br label %70

47:                                               ; preds = %20
  %48 = load ptr, ptr %8, align 8, !tbaa !5
  %49 = getelementptr inbounds %"class.Data::MemTimingSpec", ptr %48, i32 0, i32 22
  %50 = load i64, ptr %49, align 8, !tbaa !18
  %51 = load ptr, ptr %9, align 8, !tbaa !5
  %52 = getelementptr inbounds %"class.Data::MemArchitectureSpec", ptr %51, i32 0, i32 1
  %53 = load i64, ptr %52, align 8, !tbaa !11
  %54 = load ptr, ptr %9, align 8, !tbaa !5
  %55 = getelementptr inbounds %"class.Data::MemArchitectureSpec", ptr %54, i32 0, i32 4
  %56 = load i64, ptr %55, align 8, !tbaa !14
  %57 = sdiv i64 %53, %56
  %58 = add nsw i64 %50, %57
  %59 = load ptr, ptr %8, align 8, !tbaa !5
  %60 = getelementptr inbounds %"class.Data::MemTimingSpec", ptr %59, i32 0, i32 24
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #5
  store i64 2, ptr %12, align 8, !tbaa !9
  %61 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIlERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %60, ptr noundef nonnull align 8 dereferenceable(8) %12)
  %62 = load i64, ptr %61, align 8, !tbaa !9
  %63 = add nsw i64 %58, %62
  %64 = sub nsw i64 %63, 2
  store i64 %64, ptr %7, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #5
  br label %70

65:                                               ; preds = %20, %20
  %66 = load ptr, ptr %8, align 8, !tbaa !5
  %67 = getelementptr inbounds %"class.Data::MemTimingSpec", ptr %66, i32 0, i32 24
  %68 = load i64, ptr %67, align 8, !tbaa !15
  store i64 %68, ptr %7, align 8, !tbaa !9
  br label %70

69:                                               ; preds = %20
  call void @__assert_fail(ptr noundef @.str.16, ptr noundef @.str.17, i32 noundef 527, ptr noundef @__PRETTY_FUNCTION__._ZN4Data12cmdScheduler7getRWTPElRKNS_19MemorySpecificationE) #6
  unreachable

70:                                               ; preds = %65, %47, %32, %24
  br label %127

71:                                               ; preds = %3
  %72 = load i64, ptr %5, align 8, !tbaa !9
  %73 = icmp eq i64 %72, 1
  br i1 %73, label %74, label %126

74:                                               ; preds = %71
  %75 = load ptr, ptr %6, align 8, !tbaa !5
  %76 = getelementptr inbounds %"class.Data::MemorySpecification", ptr %75, i32 0, i32 2
  %77 = call noundef i32 @_ZNK4Data10MemoryTypecvNS0_12MemoryType_tEEv(ptr noundef nonnull align 4 dereferenceable(4) %76)
  %78 = icmp eq i32 %77, 6
  br i1 %78, label %79, label %96

79:                                               ; preds = %74
  %80 = load ptr, ptr %8, align 8, !tbaa !5
  %81 = getelementptr inbounds %"class.Data::MemTimingSpec", ptr %80, i32 0, i32 21
  %82 = load i64, ptr %81, align 8, !tbaa !19
  %83 = load ptr, ptr %9, align 8, !tbaa !5
  %84 = getelementptr inbounds %"class.Data::MemArchitectureSpec", ptr %83, i32 0, i32 1
  %85 = load i64, ptr %84, align 8, !tbaa !11
  %86 = load ptr, ptr %9, align 8, !tbaa !5
  %87 = getelementptr inbounds %"class.Data::MemArchitectureSpec", ptr %86, i32 0, i32 4
  %88 = load i64, ptr %87, align 8, !tbaa !14
  %89 = sdiv i64 %85, %88
  %90 = add nsw i64 %82, %89
  %91 = sub nsw i64 %90, 1
  %92 = load ptr, ptr %8, align 8, !tbaa !5
  %93 = getelementptr inbounds %"class.Data::MemTimingSpec", ptr %92, i32 0, i32 25
  %94 = load i64, ptr %93, align 8, !tbaa !20
  %95 = add nsw i64 %91, %94
  store i64 %95, ptr %7, align 8, !tbaa !9
  br label %112

96:                                               ; preds = %74
  %97 = load ptr, ptr %8, align 8, !tbaa !5
  %98 = getelementptr inbounds %"class.Data::MemTimingSpec", ptr %97, i32 0, i32 21
  %99 = load i64, ptr %98, align 8, !tbaa !19
  %100 = load ptr, ptr %9, align 8, !tbaa !5
  %101 = getelementptr inbounds %"class.Data::MemArchitectureSpec", ptr %100, i32 0, i32 1
  %102 = load i64, ptr %101, align 8, !tbaa !11
  %103 = load ptr, ptr %9, align 8, !tbaa !5
  %104 = getelementptr inbounds %"class.Data::MemArchitectureSpec", ptr %103, i32 0, i32 4
  %105 = load i64, ptr %104, align 8, !tbaa !14
  %106 = sdiv i64 %102, %105
  %107 = add nsw i64 %99, %106
  %108 = load ptr, ptr %8, align 8, !tbaa !5
  %109 = getelementptr inbounds %"class.Data::MemTimingSpec", ptr %108, i32 0, i32 25
  %110 = load i64, ptr %109, align 8, !tbaa !20
  %111 = add nsw i64 %107, %110
  store i64 %111, ptr %7, align 8, !tbaa !9
  br label %112

112:                                              ; preds = %96, %79
  %113 = load ptr, ptr %6, align 8, !tbaa !5
  %114 = getelementptr inbounds %"class.Data::MemorySpecification", ptr %113, i32 0, i32 2
  %115 = call noundef i32 @_ZNK4Data10MemoryTypecvNS0_12MemoryType_tEEv(ptr noundef nonnull align 4 dereferenceable(4) %114)
  %116 = icmp eq i32 %115, 4
  br i1 %116, label %122, label %117

117:                                              ; preds = %112
  %118 = load ptr, ptr %6, align 8, !tbaa !5
  %119 = getelementptr inbounds %"class.Data::MemorySpecification", ptr %118, i32 0, i32 2
  %120 = call noundef i32 @_ZNK4Data10MemoryTypecvNS0_12MemoryType_tEEv(ptr noundef nonnull align 4 dereferenceable(4) %119)
  %121 = icmp eq i32 %120, 5
  br i1 %121, label %122, label %125

122:                                              ; preds = %117, %112
  %123 = load i64, ptr %7, align 8, !tbaa !9
  %124 = add nsw i64 %123, 1
  store i64 %124, ptr %7, align 8, !tbaa !9
  br label %125

125:                                              ; preds = %122, %117
  br label %126

126:                                              ; preds = %125, %71
  br label %127

127:                                              ; preds = %126, %70
  %128 = load i64, ptr %7, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #5
  ret i64 %128
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4Data10MemoryTypecvNS0_12MemoryType_tEEv(ptr noundef nonnull align 4 dereferenceable(4)) #3 align 2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #4

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !10, i64 8}
!12 = !{!"_ZTSN4Data19MemArchitectureSpecE", !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !10, i64 56, !10, i64 64, !13, i64 72, !13, i64 73, !13, i64 74}
!13 = !{!"bool", !7, i64 0}
!14 = !{!12, !10, i64 32}
!15 = !{!16, !10, i64 192}
!16 = !{!"_ZTSN4Data13MemTimingSpecE", !17, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !10, i64 56, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !10, i64 144, !10, i64 152, !10, i64 160, !10, i64 168, !10, i64 176, !10, i64 184, !10, i64 192, !10, i64 200, !10, i64 208, !10, i64 216, !10, i64 224, !10, i64 232, !10, i64 240, !10, i64 248, !17, i64 256}
!17 = !{!"double", !7, i64 0}
!18 = !{!16, !10, i64 176}
!19 = !{!16, !10, i64 168}
!20 = !{!16, !10, i64 200}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.16 = external hidden unnamed_addr constant [31 x i8], align 1
@.str.17 = external hidden unnamed_addr constant [77 x i8], align 1
@__PRETTY_FUNCTION__._ZN4Data12cmdScheduler7getRWTPElRKNS_19MemorySpecificationE = external hidden unnamed_addr constant [74 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIlERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_ZN4Data12cmdScheduler7getRWTPElRKNS_19MemorySpecificationE(ptr nocapture noundef nonnull readnone align 8 dereferenceable(1080) %0, i64 noundef %1, ptr noundef nonnull align 8 dereferenceable(736) %2) local_unnamed_addr #2 align 2 {
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  switch i64 %1, label %76 [
    i64 0, label %7
    i64 1, label %46
  ]

7:                                                ; preds = %3
  %8 = getelementptr inbounds i8, ptr %2, i64 40
  %9 = tail call noundef i32 @_ZNK4Data10MemoryTypecvNS0_12MemoryType_tEEv(ptr noundef nonnull align 4 dereferenceable(4) %8)
  switch i32 %9, label %45 [
    i32 3, label %10
    i32 6, label %10
    i32 4, label %16
    i32 5, label %16
    i32 0, label %28
    i32 1, label %42
    i32 2, label %42
  ]

10:                                               ; preds = %7, %7
  %11 = getelementptr inbounds i8, ptr %2, i64 56
  %12 = load i64, ptr %11, align 8, !tbaa !5
  %13 = getelementptr inbounds i8, ptr %2, i64 80
  %14 = load i64, ptr %13, align 8, !tbaa !11
  %15 = sdiv i64 %12, %14
  br label %76

16:                                               ; preds = %7, %7
  %17 = getelementptr inbounds i8, ptr %2, i64 56
  %18 = load i64, ptr %17, align 8, !tbaa !5
  %19 = getelementptr inbounds i8, ptr %2, i64 80
  %20 = load i64, ptr %19, align 8, !tbaa !11
  %21 = sdiv i64 %18, %20
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #4
  store i64 0, ptr %4, align 8, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #4
  %22 = getelementptr inbounds i8, ptr %2, i64 352
  %23 = load i64, ptr %22, align 8, !tbaa !13
  %24 = add nsw i64 %23, -2
  store i64 %24, ptr %5, align 8, !tbaa !12
  %25 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIlERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %4, ptr noundef nonnull align 8 dereferenceable(8) %5)
  %26 = load i64, ptr %25, align 8, !tbaa !12
  %27 = add nsw i64 %26, %21
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #4
  br label %76

28:                                               ; preds = %7
  %29 = getelementptr inbounds i8, ptr %2, i64 336
  %30 = load i64, ptr %29, align 8, !tbaa !16
  %31 = getelementptr inbounds i8, ptr %2, i64 56
  %32 = load i64, ptr %31, align 8, !tbaa !5
  %33 = getelementptr inbounds i8, ptr %2, i64 80
  %34 = load i64, ptr %33, align 8, !tbaa !11
  %35 = sdiv i64 %32, %34
  %36 = getelementptr inbounds i8, ptr %2, i64 352
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #4
  store i64 2, ptr %6, align 8, !tbaa !12
  %37 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIlERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %36, ptr noundef nonnull align 8 dereferenceable(8) %6)
  %38 = load i64, ptr %37, align 8, !tbaa !12
  %39 = add i64 %30, -2
  %40 = add i64 %39, %35
  %41 = add i64 %40, %38
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #4
  br label %76

42:                                               ; preds = %7, %7
  %43 = getelementptr inbounds i8, ptr %2, i64 352
  %44 = load i64, ptr %43, align 8, !tbaa !13
  br label %76

45:                                               ; preds = %7
  tail call void @__assert_fail(ptr noundef nonnull @.str.16, ptr noundef nonnull @.str.17, i32 noundef 527, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN4Data12cmdScheduler7getRWTPElRKNS_19MemorySpecificationE) #5
  unreachable

46:                                               ; preds = %3
  %47 = getelementptr inbounds i8, ptr %2, i64 40
  %48 = tail call noundef i32 @_ZNK4Data10MemoryTypecvNS0_12MemoryType_tEEv(ptr noundef nonnull align 4 dereferenceable(4) %47)
  %49 = icmp eq i32 %48, 6
  %50 = getelementptr inbounds i8, ptr %2, i64 328
  %51 = load i64, ptr %50, align 8, !tbaa !17
  %52 = getelementptr inbounds i8, ptr %2, i64 56
  %53 = load i64, ptr %52, align 8, !tbaa !5
  %54 = getelementptr inbounds i8, ptr %2, i64 80
  %55 = load i64, ptr %54, align 8, !tbaa !11
  %56 = sdiv i64 %53, %55
  br i1 %49, label %57, label %63

57:                                               ; preds = %46
  %58 = getelementptr inbounds i8, ptr %2, i64 360
  %59 = load i64, ptr %58, align 8, !tbaa !18
  %60 = add i64 %51, -1
  %61 = add i64 %60, %56
  %62 = add nsw i64 %61, %59
  br label %68

63:                                               ; preds = %46
  %64 = add nsw i64 %56, %51
  %65 = getelementptr inbounds i8, ptr %2, i64 360
  %66 = load i64, ptr %65, align 8, !tbaa !18
  %67 = add nsw i64 %64, %66
  br label %68

68:                                               ; preds = %63, %57
  %.0 = phi i64 [ %62, %57 ], [ %67, %63 ]
  %69 = tail call noundef i32 @_ZNK4Data10MemoryTypecvNS0_12MemoryType_tEEv(ptr noundef nonnull align 4 dereferenceable(4) %47)
  %70 = icmp eq i32 %69, 4
  br i1 %70, label %74, label %71

71:                                               ; preds = %68
  %72 = tail call noundef i32 @_ZNK4Data10MemoryTypecvNS0_12MemoryType_tEEv(ptr noundef nonnull align 4 dereferenceable(4) %47)
  %73 = icmp eq i32 %72, 5
  br i1 %73, label %74, label %76

74:                                               ; preds = %71, %68
  %75 = add nsw i64 %.0, 1
  br label %76

76:                                               ; preds = %3, %74, %71, %10, %16, %28, %42
  %.1 = phi i64 [ %44, %42 ], [ %41, %28 ], [ %27, %16 ], [ %15, %10 ], [ %75, %74 ], [ %.0, %71 ], [ 0, %3 ]
  ret i64 %.1
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4Data10MemoryTypecvNS0_12MemoryType_tEEv(ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2 align 2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #3

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"_ZTSN4Data19MemArchitectureSpecE", !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 32, !7, i64 40, !7, i64 48, !7, i64 56, !7, i64 64, !10, i64 72, !10, i64 73, !10, i64 74}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"bool", !8, i64 0}
!11 = !{!6, !7, i64 32}
!12 = !{!7, !7, i64 0}
!13 = !{!14, !7, i64 192}
!14 = !{!"_ZTSN4Data13MemTimingSpecE", !15, i64 8, !7, i64 16, !7, i64 24, !7, i64 32, !7, i64 40, !7, i64 48, !7, i64 56, !7, i64 64, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !7, i64 120, !7, i64 128, !7, i64 136, !7, i64 144, !7, i64 152, !7, i64 160, !7, i64 168, !7, i64 176, !7, i64 184, !7, i64 192, !7, i64 200, !7, i64 208, !7, i64 216, !7, i64 224, !7, i64 232, !7, i64 240, !7, i64 248, !15, i64 256}
!15 = !{!"double", !8, i64 0}
!16 = !{!14, !7, i64 176}
!17 = !{!14, !7, i64 168}
!18 = !{!14, !7, i64 200}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass