; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/NetworkPkg/Dhcp6Dxe (Dhcp6AppendIaOption)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.EFI_DHCP6_IA = type { %struct.EFI_DHCP6_IA_DESCRIPTOR, i32, ptr, i32, [1 x %struct.EFI_DHCP6_IA_ADDRESS] }
%struct.EFI_DHCP6_IA_DESCRIPTOR = type { i16, i32 }
%struct.EFI_DHCP6_IA_ADDRESS = type { %struct.EFI_IPv6_ADDRESS, i32, i32 }
%struct.EFI_IPv6_ADDRESS = type { [16 x i8] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare zeroext i16 @WriteUnaligned16(ptr noundef, i16 noundef zeroext) #1

declare zeroext i16 @SwapBytes16(i16 noundef zeroext) #1

declare i32 @WriteUnaligned32(ptr noundef, i32 noundef) #1

declare i32 @SwapBytes32(i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local ptr @Dhcp6AppendIaAddrOption(ptr noundef, ptr noundef, i32 noundef) #2

; Function Attrs: nounwind uwtable
define dso_local ptr @Dhcp6AppendIaOption(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #2 {
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca i64, align 8
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !9
  store i32 %3, ptr %9, align 4, !tbaa !9
  store i32 %4, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #3
  %14 = load ptr, ptr %6, align 8, !tbaa !5
  %15 = load ptr, ptr %7, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.EFI_DHCP6_IA, ptr %15, i32 0, i32 0
  %17 = getelementptr inbounds %struct.EFI_DHCP6_IA_DESCRIPTOR, ptr %16, i32 0, i32 0
  %18 = load i16, ptr %17, align 8, !tbaa !11
  %19 = call zeroext i16 @SwapBytes16(i16 noundef zeroext %18)
  %20 = call zeroext i16 @WriteUnaligned16(ptr noundef %14, i16 noundef zeroext %19)
  %21 = load ptr, ptr %6, align 8, !tbaa !5
  %22 = getelementptr inbounds i8, ptr %21, i64 2
  store ptr %22, ptr %6, align 8, !tbaa !5
  %23 = load ptr, ptr %6, align 8, !tbaa !5
  store ptr %23, ptr %12, align 8, !tbaa !5
  %24 = load ptr, ptr %6, align 8, !tbaa !5
  %25 = getelementptr inbounds i8, ptr %24, i64 2
  store ptr %25, ptr %6, align 8, !tbaa !5
  %26 = load ptr, ptr %6, align 8, !tbaa !5
  %27 = load ptr, ptr %7, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.EFI_DHCP6_IA, ptr %27, i32 0, i32 0
  %29 = getelementptr inbounds %struct.EFI_DHCP6_IA_DESCRIPTOR, ptr %28, i32 0, i32 1
  %30 = load i32, ptr %29, align 4, !tbaa !15
  %31 = call i32 @SwapBytes32(i32 noundef %30)
  %32 = call i32 @WriteUnaligned32(ptr noundef %26, i32 noundef %31)
  %33 = load ptr, ptr %6, align 8, !tbaa !5
  %34 = getelementptr inbounds i8, ptr %33, i64 4
  store ptr %34, ptr %6, align 8, !tbaa !5
  %35 = load ptr, ptr %7, align 8, !tbaa !5
  %36 = getelementptr inbounds %struct.EFI_DHCP6_IA, ptr %35, i32 0, i32 0
  %37 = getelementptr inbounds %struct.EFI_DHCP6_IA_DESCRIPTOR, ptr %36, i32 0, i32 0
  %38 = load i16, ptr %37, align 8, !tbaa !11
  %39 = zext i16 %38 to i32
  %40 = icmp eq i32 %39, 3
  br i1 %40, label %41, label %66

41:                                               ; preds = %5
  %42 = load ptr, ptr %6, align 8, !tbaa !5
  %43 = load i32, ptr %8, align 4, !tbaa !9
  %44 = icmp ne i32 %43, 0
  br i1 %44, label %45, label %47

45:                                               ; preds = %41
  %46 = load i32, ptr %8, align 4, !tbaa !9
  br label %48

47:                                               ; preds = %41
  br label %48

48:                                               ; preds = %47, %45
  %49 = phi i32 [ %46, %45 ], [ -1, %47 ]
  %50 = call i32 @SwapBytes32(i32 noundef %49)
  %51 = call i32 @WriteUnaligned32(ptr noundef %42, i32 noundef %50)
  %52 = load ptr, ptr %6, align 8, !tbaa !5
  %53 = getelementptr inbounds i8, ptr %52, i64 4
  store ptr %53, ptr %6, align 8, !tbaa !5
  %54 = load ptr, ptr %6, align 8, !tbaa !5
  %55 = load i32, ptr %9, align 4, !tbaa !9
  %56 = icmp ne i32 %55, 0
  br i1 %56, label %57, label %59

57:                                               ; preds = %48
  %58 = load i32, ptr %9, align 4, !tbaa !9
  br label %60

59:                                               ; preds = %48
  br label %60

60:                                               ; preds = %59, %57
  %61 = phi i32 [ %58, %57 ], [ -1, %59 ]
  %62 = call i32 @SwapBytes32(i32 noundef %61)
  %63 = call i32 @WriteUnaligned32(ptr noundef %54, i32 noundef %62)
  %64 = load ptr, ptr %6, align 8, !tbaa !5
  %65 = getelementptr inbounds i8, ptr %64, i64 4
  store ptr %65, ptr %6, align 8, !tbaa !5
  br label %66

66:                                               ; preds = %60, %5
  store i64 0, ptr %13, align 8, !tbaa !16
  br label %67

67:                                               ; preds = %85, %66
  %68 = load i64, ptr %13, align 8, !tbaa !16
  %69 = load ptr, ptr %7, align 8, !tbaa !5
  %70 = getelementptr inbounds %struct.EFI_DHCP6_IA, ptr %69, i32 0, i32 3
  %71 = load i32, ptr %70, align 8, !tbaa !18
  %72 = zext i32 %71 to i64
  %73 = icmp ult i64 %68, %72
  br i1 %73, label %74, label %88

74:                                               ; preds = %67
  %75 = load ptr, ptr %7, align 8, !tbaa !5
  %76 = getelementptr inbounds %struct.EFI_DHCP6_IA, ptr %75, i32 0, i32 4
  %77 = getelementptr inbounds [1 x %struct.EFI_DHCP6_IA_ADDRESS], ptr %76, i64 0, i64 0
  %78 = load i64, ptr %13, align 8, !tbaa !16
  %79 = mul i64 %78, 24
  %80 = getelementptr inbounds i8, ptr %77, i64 %79
  store ptr %80, ptr %11, align 8, !tbaa !5
  %81 = load ptr, ptr %6, align 8, !tbaa !5
  %82 = load ptr, ptr %11, align 8, !tbaa !5
  %83 = load i32, ptr %10, align 4, !tbaa !9
  %84 = call ptr @Dhcp6AppendIaAddrOption(ptr noundef %81, ptr noundef %82, i32 noundef %83)
  store ptr %84, ptr %6, align 8, !tbaa !5
  br label %85

85:                                               ; preds = %74
  %86 = load i64, ptr %13, align 8, !tbaa !16
  %87 = add i64 %86, 1
  store i64 %87, ptr %13, align 8, !tbaa !16
  br label %67, !llvm.loop !19

88:                                               ; preds = %67
  %89 = load ptr, ptr %6, align 8, !tbaa !5
  %90 = load ptr, ptr %12, align 8, !tbaa !5
  %91 = ptrtoint ptr %89 to i64
  %92 = ptrtoint ptr %90 to i64
  %93 = sub i64 %91, %92
  %94 = sub nsw i64 %93, 2
  %95 = trunc i64 %94 to i16
  %96 = call zeroext i16 @SwapBytes16(i16 noundef zeroext %95)
  %97 = load ptr, ptr %12, align 8, !tbaa !5
  store i16 %96, ptr %97, align 2, !tbaa !21
  %98 = load ptr, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  ret ptr %98
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !14, i64 0}
!12 = !{!"", !13, i64 0, !10, i64 8, !6, i64 16, !10, i64 24, !7, i64 28}
!13 = !{!"", !14, i64 0, !10, i64 4}
!14 = !{!"short", !7, i64 0}
!15 = !{!12, !10, i64 4}
!16 = !{!17, !17, i64 0}
!17 = !{!"long long", !7, i64 0}
!18 = !{!12, !10, i64 24}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = !{!14, !14, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare zeroext i16 @WriteUnaligned16(ptr noundef, i16 noundef zeroext) local_unnamed_addr #0

declare zeroext i16 @SwapBytes16(i16 noundef zeroext) local_unnamed_addr #0

declare i32 @WriteUnaligned32(ptr noundef, i32 noundef) local_unnamed_addr #0

declare i32 @SwapBytes32(i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local ptr @Dhcp6AppendIaAddrOption(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local ptr @Dhcp6AppendIaOption(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #1 {
  %6 = load i16, ptr %1, align 8, !tbaa !5
  %7 = tail call zeroext i16 @SwapBytes16(i16 noundef zeroext %6) #2
  %8 = tail call zeroext i16 @WriteUnaligned16(ptr noundef %0, i16 noundef zeroext %7) #2
  %9 = getelementptr inbounds i8, ptr %0, i64 4
  %10 = getelementptr inbounds i8, ptr %1, i64 4
  %11 = load i32, ptr %10, align 4, !tbaa !13
  %12 = tail call i32 @SwapBytes32(i32 noundef %11) #2
  %13 = tail call i32 @WriteUnaligned32(ptr noundef nonnull %9, i32 noundef %12) #2
  %14 = getelementptr inbounds i8, ptr %0, i64 8
  %15 = load i16, ptr %1, align 8, !tbaa !5
  %16 = icmp eq i16 %15, 3
  br i1 %16, label %17, label %26

17:                                               ; preds = %5
  %.not = icmp eq i32 %2, 0
  %18 = select i1 %.not, i32 -1, i32 %2
  %19 = tail call i32 @SwapBytes32(i32 noundef %18) #2
  %20 = tail call i32 @WriteUnaligned32(ptr noundef nonnull %14, i32 noundef %19) #2
  %21 = getelementptr inbounds i8, ptr %0, i64 12
  %.not29 = icmp eq i32 %3, 0
  %22 = select i1 %.not29, i32 -1, i32 %3
  %23 = tail call i32 @SwapBytes32(i32 noundef %22) #2
  %24 = tail call i32 @WriteUnaligned32(ptr noundef nonnull %21, i32 noundef %23) #2
  %25 = getelementptr inbounds i8, ptr %0, i64 16
  br label %26

26:                                               ; preds = %17, %5
  %.028 = phi ptr [ %25, %17 ], [ %14, %5 ]
  %27 = getelementptr inbounds i8, ptr %1, i64 24
  %28 = load i32, ptr %27, align 8, !tbaa !14
  %.not32 = icmp eq i32 %28, 0
  br i1 %.not32, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %26
  %29 = getelementptr inbounds i8, ptr %1, i64 28
  br label %30

30:                                               ; preds = %.lr.ph, %30
  %.031 = phi i64 [ 0, %.lr.ph ], [ %34, %30 ]
  %.130 = phi ptr [ %.028, %.lr.ph ], [ %33, %30 ]
  %31 = mul nuw nsw i64 %.031, 24
  %32 = getelementptr inbounds i8, ptr %29, i64 %31
  %33 = tail call ptr @Dhcp6AppendIaAddrOption(ptr noundef %.130, ptr noundef nonnull %32, i32 noundef %4)
  %34 = add nuw nsw i64 %.031, 1
  %35 = load i32, ptr %27, align 8, !tbaa !14
  %36 = zext i32 %35 to i64
  %37 = icmp ult i64 %34, %36
  br i1 %37, label %30, label %._crit_edge, !llvm.loop !15

._crit_edge:                                      ; preds = %30, %26
  %.1.lcssa = phi ptr [ %.028, %26 ], [ %33, %30 ]
  %38 = getelementptr inbounds i8, ptr %0, i64 2
  %39 = ptrtoint ptr %.1.lcssa to i64
  %40 = ptrtoint ptr %38 to i64
  %41 = sub i64 %39, %40
  %42 = trunc i64 %41 to i16
  %43 = add i16 %42, -2
  %44 = tail call zeroext i16 @SwapBytes16(i16 noundef zeroext %43) #2
  store i16 %44, ptr %38, align 2, !tbaa !17
  ret ptr %.1.lcssa
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"", !7, i64 0, !11, i64 8, !12, i64 16, !11, i64 24, !9, i64 28}
!7 = !{!"", !8, i64 0, !11, i64 4}
!8 = !{!"short", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!6, !11, i64 4}
!14 = !{!6, !11, i64 24}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = !{!8, !8, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass