; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/SourceLevelDebugPkg (XhcExecTransfer)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct._USB3_DEBUG_PORT_INSTANCE = type <{ i8, i8, i8, i8, i64, i64, i64, i64, i64, %struct._TRANSFER_RING, %struct._TRANSFER_RING, %struct._EVENT_RING, %struct._URB, %struct._URB, i8, i64, i64, i64, i8 }>
%struct._TRANSFER_RING = type <{ i64, i32, i64, i64, i32 }>
%struct._EVENT_RING = type <{ i64, i64, i32, i64, i64, i32 }>
%struct._URB = type <{ i64, i32, i32, i32, i64, i64, i8, i32 }>
%struct._TRB_TEMPLATE = type { i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
declare dso_local i64 @XhcSyncTrsRing(ptr noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare dso_local void @XhcCheckUrbResult(ptr noundef, ptr noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local i64 @XhcRingDoorBell(ptr noundef, ptr noundef) #0

; Function Attrs: nounwind uwtable
define dso_local void @XhcExecTransfer(ptr noundef %0, ptr noundef %1, i64 noundef %2) #0 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i64, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = alloca ptr, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i64 %2, ptr %6, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  store i64 0, ptr %8, align 8, !tbaa !9
  store i64 0, ptr %9, align 8, !tbaa !9
  store i64 0, ptr %10, align 8, !tbaa !9
  %12 = load ptr, ptr %4, align 8, !tbaa !5
  %13 = load ptr, ptr %5, align 8, !tbaa !5
  %14 = call i64 @XhcRingDoorBell(ptr noundef %12, ptr noundef %13)
  %15 = load i64, ptr %6, align 8, !tbaa !9
  %16 = icmp ne i64 %15, 0
  br i1 %16, label %17, label %31

17:                                               ; preds = %3
  %18 = call i64 @GetPerformanceCounter()
  store i64 %18, ptr %8, align 8, !tbaa !9
  %19 = load ptr, ptr %4, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct._USB3_DEBUG_PORT_INSTANCE, ptr %19, i32 0, i32 16
  %21 = load i64, ptr %20, align 1, !tbaa !11
  %22 = load i64, ptr %6, align 8, !tbaa !9
  %23 = call i64 @MultU64x64(i64 noundef %21, i64 noundef %22)
  %24 = call i64 @DivU64x32(i64 noundef %23, i32 noundef 1000000)
  store i64 %24, ptr %9, align 8, !tbaa !9
  %25 = load i64, ptr %9, align 8, !tbaa !9
  %26 = load ptr, ptr %4, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct._USB3_DEBUG_PORT_INSTANCE, ptr %26, i32 0, i32 17
  %28 = load i64, ptr %27, align 1, !tbaa !17
  %29 = call i64 @DivU64x32(i64 noundef %28, i32 noundef 2)
  %30 = call i64 @DivU64x64Remainder(i64 noundef %25, i64 noundef %29, ptr noundef %9)
  store i64 %30, ptr %10, align 8, !tbaa !9
  br label %31

31:                                               ; preds = %17, %3
  br label %32

32:                                               ; preds = %73, %31
  br label %33

33:                                               ; preds = %32
  %34 = load i64, ptr %6, align 8, !tbaa !9
  %35 = icmp ne i64 %34, 0
  br i1 %35, label %36, label %65

36:                                               ; preds = %33
  %37 = load i64, ptr %10, align 8, !tbaa !9
  %38 = icmp eq i64 %37, 0
  br i1 %38, label %39, label %51

39:                                               ; preds = %36
  %40 = load ptr, ptr %4, align 8, !tbaa !5
  %41 = load i64, ptr %8, align 8, !tbaa !9
  %42 = load i64, ptr %9, align 8, !tbaa !9
  %43 = call zeroext i8 @IsTimerTimeout(ptr noundef %40, i64 noundef %41, i64 noundef %42)
  %44 = icmp ne i8 %43, 0
  br i1 %44, label %45, label %50

45:                                               ; preds = %39
  %46 = load ptr, ptr %5, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct._URB, ptr %46, i32 0, i32 2
  %48 = load i32, ptr %47, align 1, !tbaa !18
  %49 = or i32 %48, 64
  store i32 %49, ptr %47, align 1, !tbaa !18
  br label %74

50:                                               ; preds = %39
  br label %64

51:                                               ; preds = %36
  %52 = load ptr, ptr %4, align 8, !tbaa !5
  %53 = load i64, ptr %8, align 8, !tbaa !9
  %54 = load ptr, ptr %4, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct._USB3_DEBUG_PORT_INSTANCE, ptr %54, i32 0, i32 17
  %56 = load i64, ptr %55, align 1, !tbaa !17
  %57 = call i64 @DivU64x32(i64 noundef %56, i32 noundef 2)
  %58 = call zeroext i8 @IsTimerTimeout(ptr noundef %52, i64 noundef %53, i64 noundef %57)
  %59 = icmp ne i8 %58, 0
  br i1 %59, label %60, label %63

60:                                               ; preds = %51
  %61 = load i64, ptr %10, align 8, !tbaa !9
  %62 = add i64 %61, -1
  store i64 %62, ptr %10, align 8, !tbaa !9
  br label %63

63:                                               ; preds = %60, %51
  br label %64

64:                                               ; preds = %63, %50
  br label %65

65:                                               ; preds = %64, %33
  %66 = load ptr, ptr %4, align 8, !tbaa !5
  %67 = load ptr, ptr %5, align 8, !tbaa !5
  call void @XhcCheckUrbResult(ptr noundef %66, ptr noundef %67)
  %68 = load ptr, ptr %5, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct._URB, ptr %68, i32 0, i32 6
  %70 = load i8, ptr %69, align 1, !tbaa !19
  %71 = icmp ne i8 %70, 0
  br i1 %71, label %72, label %73

72:                                               ; preds = %65
  br label %74

73:                                               ; preds = %65
  br label %32

74:                                               ; preds = %72, %45
  %75 = load ptr, ptr %5, align 8, !tbaa !5
  %76 = getelementptr inbounds %struct._URB, ptr %75, i32 0, i32 4
  %77 = load i64, ptr %76, align 1, !tbaa !20
  %78 = inttoptr i64 %77 to ptr
  store ptr %78, ptr %7, align 8, !tbaa !5
  %79 = load ptr, ptr %5, align 8, !tbaa !5
  %80 = getelementptr inbounds %struct._URB, ptr %79, i32 0, i32 2
  %81 = load i32, ptr %80, align 1, !tbaa !18
  %82 = icmp ne i32 %81, 0
  br i1 %82, label %83, label %109

83:                                               ; preds = %74
  %84 = load ptr, ptr %5, align 8, !tbaa !5
  %85 = getelementptr inbounds %struct._URB, ptr %84, i32 0, i32 7
  %86 = load i32, ptr %85, align 1, !tbaa !21
  %87 = icmp eq i32 %86, 0
  br i1 %87, label %88, label %109

88:                                               ; preds = %83
  %89 = load ptr, ptr %5, align 8, !tbaa !5
  %90 = getelementptr inbounds %struct._URB, ptr %89, i32 0, i32 5
  %91 = load i64, ptr %90, align 1, !tbaa !22
  %92 = load ptr, ptr %7, align 8, !tbaa !5
  %93 = getelementptr inbounds %struct._TRANSFER_RING, ptr %92, i32 0, i32 2
  store i64 %91, ptr %93, align 1, !tbaa !23
  %94 = load ptr, ptr %5, align 8, !tbaa !5
  %95 = getelementptr inbounds %struct._URB, ptr %94, i32 0, i32 5
  %96 = load i64, ptr %95, align 1, !tbaa !22
  %97 = inttoptr i64 %96 to ptr
  store ptr %97, ptr %11, align 8, !tbaa !5
  %98 = load ptr, ptr %7, align 8, !tbaa !5
  %99 = getelementptr inbounds %struct._TRANSFER_RING, ptr %98, i32 0, i32 4
  %100 = load i32, ptr %99, align 1, !tbaa !24
  %101 = xor i32 %100, -1
  %102 = and i32 %101, 1
  %103 = load ptr, ptr %11, align 8, !tbaa !5
  %104 = getelementptr inbounds %struct._TRB_TEMPLATE, ptr %103, i32 0, i32 3
  %105 = load i32, ptr %104, align 1
  %106 = and i32 %102, 1
  %107 = and i32 %105, -2
  %108 = or i32 %107, %106
  store i32 %108, ptr %104, align 1
  br label %113

109:                                              ; preds = %83, %74
  %110 = load ptr, ptr %4, align 8, !tbaa !5
  %111 = load ptr, ptr %7, align 8, !tbaa !5
  %112 = call i64 @XhcSyncTrsRing(ptr noundef %110, ptr noundef %111)
  br label %113

113:                                              ; preds = %109, %88
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  ret void
}

declare i64 @GetPerformanceCounter() #2

declare i64 @DivU64x32(i64 noundef, i32 noundef) #2

declare i64 @MultU64x64(i64 noundef, i64 noundef) #2

declare i64 @DivU64x64Remainder(i64 noundef, i64 noundef, ptr noundef) #2

declare zeroext i8 @IsTimerTimeout(ptr noundef, i64 noundef, i64 noundef) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = !{!12, !10, i64 239}
!12 = !{!"_USB3_DEBUG_PORT_INSTANCE", !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 3, !10, i64 4, !10, i64 12, !10, i64 20, !10, i64 28, !10, i64 36, !13, i64 44, !13, i64 76, !15, i64 108, !16, i64 148, !16, i64 189, !7, i64 230, !10, i64 231, !10, i64 239, !10, i64 247, !7, i64 255}
!13 = !{!"_TRANSFER_RING", !10, i64 0, !14, i64 8, !10, i64 12, !10, i64 20, !14, i64 28}
!14 = !{!"int", !7, i64 0}
!15 = !{!"_EVENT_RING", !10, i64 0, !10, i64 8, !14, i64 16, !10, i64 20, !10, i64 28, !14, i64 36}
!16 = !{!"_URB", !10, i64 0, !14, i64 8, !14, i64 12, !14, i64 16, !10, i64 20, !10, i64 28, !7, i64 36, !14, i64 37}
!17 = !{!12, !10, i64 247}
!18 = !{!16, !14, i64 12}
!19 = !{!16, !7, i64 36}
!20 = !{!16, !10, i64 20}
!21 = !{!16, !14, i64 37}
!22 = !{!16, !10, i64 28}
!23 = !{!13, !10, i64 12}
!24 = !{!13, !14, i64 28}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local i64 @XhcSyncTrsRing(ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare dso_local void @XhcCheckUrbResult(ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local i64 @XhcRingDoorBell(ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @XhcExecTransfer(ptr noundef %0, ptr noundef %1, i64 noundef %2) local_unnamed_addr #0 {
  %4 = alloca i64, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
  store i64 0, ptr %4, align 8, !tbaa !5
  %5 = tail call i64 @XhcRingDoorBell(ptr noundef %0, ptr noundef %1)
  %.not = icmp eq i64 %2, 0
  br i1 %.not, label %.split.us.preheader, label %.split.preheader

.split.preheader:                                 ; preds = %3
  %6 = tail call i64 @GetPerformanceCounter() #3
  %7 = getelementptr inbounds i8, ptr %0, i64 239
  %8 = load i64, ptr %7, align 1, !tbaa !9
  %9 = tail call i64 @MultU64x64(i64 noundef %8, i64 noundef %2) #3
  %10 = tail call i64 @DivU64x32(i64 noundef %9, i32 noundef 1000000) #3
  store i64 %10, ptr %4, align 8, !tbaa !5
  %11 = getelementptr inbounds i8, ptr %0, i64 247
  %12 = load i64, ptr %11, align 1, !tbaa !15
  %13 = tail call i64 @DivU64x32(i64 noundef %12, i32 noundef 2) #3
  %14 = call i64 @DivU64x64Remainder(i64 noundef %10, i64 noundef %13, ptr noundef nonnull %4) #3
  %15 = getelementptr inbounds i8, ptr %0, i64 247
  %16 = getelementptr inbounds i8, ptr %1, i64 36
  br label %.split

.split.us.preheader:                              ; preds = %3
  %17 = getelementptr inbounds i8, ptr %1, i64 36
  br label %.split.us

.split.us:                                        ; preds = %.split.us.preheader, %.split.us
  tail call void @XhcCheckUrbResult(ptr noundef %0, ptr noundef %1)
  %18 = load i8, ptr %17, align 1, !tbaa !16
  %.not31.us = icmp eq i8 %18, 0
  br i1 %.not31.us, label %.split.us, label %.loopexit

.split:                                           ; preds = %.split.preheader, %32
  %.1 = phi i64 [ %.2, %32 ], [ %14, %.split.preheader ]
  %19 = icmp eq i64 %.1, 0
  br i1 %19, label %20, label %27

20:                                               ; preds = %.split
  %21 = load i64, ptr %4, align 8, !tbaa !5
  %22 = call zeroext i8 @IsTimerTimeout(ptr noundef %0, i64 noundef %6, i64 noundef %21) #3
  %.not30 = icmp eq i8 %22, 0
  br i1 %.not30, label %32, label %23

23:                                               ; preds = %20
  %24 = getelementptr inbounds i8, ptr %1, i64 12
  %25 = load i32, ptr %24, align 1, !tbaa !17
  %26 = or i32 %25, 64
  store i32 %26, ptr %24, align 1, !tbaa !17
  br label %.loopexit

27:                                               ; preds = %.split
  %28 = load i64, ptr %15, align 1, !tbaa !15
  %29 = call i64 @DivU64x32(i64 noundef %28, i32 noundef 2) #3
  %30 = call zeroext i8 @IsTimerTimeout(ptr noundef %0, i64 noundef %6, i64 noundef %29) #3
  %.not29 = icmp ne i8 %30, 0
  %31 = sext i1 %.not29 to i64
  %spec.select = add i64 %.1, %31
  br label %32

32:                                               ; preds = %27, %20
  %.2 = phi i64 [ 0, %20 ], [ %spec.select, %27 ]
  call void @XhcCheckUrbResult(ptr noundef %0, ptr noundef %1)
  %33 = load i8, ptr %16, align 1, !tbaa !16
  %.not31 = icmp eq i8 %33, 0
  br i1 %.not31, label %.split, label %.loopexit

.loopexit:                                        ; preds = %32, %.split.us, %23
  %34 = getelementptr inbounds i8, ptr %1, i64 20
  %35 = load i64, ptr %34, align 1, !tbaa !18
  %36 = inttoptr i64 %35 to ptr
  %37 = getelementptr inbounds i8, ptr %1, i64 12
  %38 = load i32, ptr %37, align 1, !tbaa !17
  %.not32 = icmp eq i32 %38, 0
  br i1 %.not32, label %56, label %39

39:                                               ; preds = %.loopexit
  %40 = getelementptr inbounds i8, ptr %1, i64 37
  %41 = load i32, ptr %40, align 1, !tbaa !19
  %42 = icmp eq i32 %41, 0
  br i1 %42, label %43, label %56

43:                                               ; preds = %39
  %44 = getelementptr inbounds i8, ptr %1, i64 28
  %45 = load i64, ptr %44, align 1, !tbaa !20
  %46 = getelementptr inbounds i8, ptr %36, i64 12
  store i64 %45, ptr %46, align 1, !tbaa !21
  %47 = inttoptr i64 %45 to ptr
  %48 = getelementptr inbounds i8, ptr %36, i64 28
  %49 = load i32, ptr %48, align 1, !tbaa !22
  %50 = and i32 %49, 1
  %51 = getelementptr inbounds i8, ptr %47, i64 12
  %52 = load i32, ptr %51, align 1
  %53 = and i32 %52, -2
  %54 = or disjoint i32 %53, %50
  %55 = xor i32 %54, 1
  store i32 %55, ptr %51, align 1
  br label %58

56:                                               ; preds = %39, %.loopexit
  %57 = call i64 @XhcSyncTrsRing(ptr noundef %0, ptr noundef %36)
  br label %58

58:                                               ; preds = %56, %43
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
  ret void
}

declare i64 @GetPerformanceCounter() local_unnamed_addr #2

declare i64 @DivU64x32(i64 noundef, i32 noundef) local_unnamed_addr #2

declare i64 @MultU64x64(i64 noundef, i64 noundef) local_unnamed_addr #2

declare i64 @DivU64x64Remainder(i64 noundef, i64 noundef, ptr noundef) local_unnamed_addr #2

declare zeroext i8 @IsTimerTimeout(ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 239}
!10 = !{!"_USB3_DEBUG_PORT_INSTANCE", !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 3, !6, i64 4, !6, i64 12, !6, i64 20, !6, i64 28, !6, i64 36, !11, i64 44, !11, i64 76, !13, i64 108, !14, i64 148, !14, i64 189, !7, i64 230, !6, i64 231, !6, i64 239, !6, i64 247, !7, i64 255}
!11 = !{!"_TRANSFER_RING", !6, i64 0, !12, i64 8, !6, i64 12, !6, i64 20, !12, i64 28}
!12 = !{!"int", !7, i64 0}
!13 = !{!"_EVENT_RING", !6, i64 0, !6, i64 8, !12, i64 16, !6, i64 20, !6, i64 28, !12, i64 36}
!14 = !{!"_URB", !6, i64 0, !12, i64 8, !12, i64 12, !12, i64 16, !6, i64 20, !6, i64 28, !7, i64 36, !12, i64 37}
!15 = !{!10, !6, i64 247}
!16 = !{!14, !7, i64 36}
!17 = !{!14, !12, i64 12}
!18 = !{!14, !6, i64 20}
!19 = !{!14, !12, i64 37}
!20 = !{!14, !6, i64 28}
!21 = !{!11, !6, i64 12}
!22 = !{!11, !12, i64 28}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopInstSimplifyPass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass