; LLVM IR from ouuan/CPTH :: tests/ModInt/ModInt.ll (ZNK4CPTH6ModInt3powEy)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.CPTH::ModInt" = type { i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 4 dereferenceable(8) ptr @_ZN4CPTH6ModIntmLES0_(ptr noundef nonnull align 4 dereferenceable(8), i64) #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local i64 @_ZNK4CPTH6ModInt3powEy(ptr noundef nonnull align 4 dereferenceable(8) %0, i64 noundef %1) #2 align 2 {
  %3 = alloca %"class.CPTH::ModInt", align 4
  %4 = alloca ptr, align 8
  %5 = alloca i64, align 8
  %6 = alloca %"class.CPTH::ModInt", align 4
  %7 = alloca %"class.CPTH::ModInt", align 4
  %8 = alloca %"class.CPTH::ModInt", align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !9
  %9 = load ptr, ptr %4, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %6, ptr align 4 %9, i64 8, i1 false), !tbaa.struct !11
  %10 = getelementptr inbounds %"class.CPTH::ModInt", ptr %9, i32 0, i32 1
  %11 = load i32, ptr %10, align 4, !tbaa !14
  call void @_ZN4CPTH6ModIntC1Eix(ptr noundef nonnull align 4 dereferenceable(8) %3, i32 noundef %11, i64 noundef 1)
  br label %12

12:                                               ; preds = %22, %2
  %13 = load i64, ptr %5, align 8, !tbaa !9
  %14 = icmp ne i64 %13, 0
  br i1 %14, label %15, label %27

15:                                               ; preds = %12
  %16 = load i64, ptr %5, align 8, !tbaa !9
  %17 = and i64 %16, 1
  %18 = icmp ne i64 %17, 0
  br i1 %18, label %19, label %22

19:                                               ; preds = %15
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %7, ptr align 4 %6, i64 8, i1 false), !tbaa.struct !11
  %20 = load i64, ptr %7, align 4
  %21 = call noundef nonnull align 4 dereferenceable(8) ptr @_ZN4CPTH6ModIntmLES0_(ptr noundef nonnull align 4 dereferenceable(8) %3, i64 %20)
  br label %22

22:                                               ; preds = %19, %15
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %8, ptr align 4 %6, i64 8, i1 false), !tbaa.struct !11
  %23 = load i64, ptr %8, align 4
  %24 = call noundef nonnull align 4 dereferenceable(8) ptr @_ZN4CPTH6ModIntmLES0_(ptr noundef nonnull align 4 dereferenceable(8) %6, i64 %23)
  %25 = load i64, ptr %5, align 8, !tbaa !9
  %26 = lshr i64 %25, 1
  store i64 %26, ptr %5, align 8, !tbaa !9
  br label %12, !llvm.loop !16

27:                                               ; preds = %12
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  %28 = load i64, ptr %3, align 4
  ret i64 %28
}

declare void @_ZN4CPTH6ModIntC1Eix(ptr, i32, i64)

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = !{i64 0, i64 4, !12, i64 4, i64 4, !12}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !7, i64 0}
!14 = !{!15, !13, i64 4}
!15 = !{!"_ZTSN4CPTH6ModIntE", !13, i64 0, !13, i64 4}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.CPTH::ModInt" = type { i32, i32 }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 4 dereferenceable(8) ptr @_ZN4CPTH6ModIntmLES0_(ptr noundef nonnull align 4 dereferenceable(8), i64) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local i64 @_ZNK4CPTH6ModInt3powEy(ptr nocapture noundef nonnull readonly align 4 dereferenceable(8) %0, i64 noundef %1) local_unnamed_addr #1 align 2 {
  %3 = alloca %"class.CPTH::ModInt", align 8
  %4 = alloca %"class.CPTH::ModInt", align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #2
  %5 = load i64, ptr %0, align 4
  store i64 %5, ptr %4, align 8
  %6 = lshr i64 %5, 32
  %7 = trunc nuw i64 %6 to i32
  call void @_ZN4CPTH6ModIntC1Eix(ptr noundef nonnull align 4 dereferenceable(8) %3, i32 noundef %7, i64 noundef 1)
  %.not5 = icmp eq i64 %1, 0
  br i1 %.not5, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %2, %11
  %.06 = phi i64 [ %13, %11 ], [ %1, %2 ]
  %8 = and i64 %.06, 1
  %.not4 = icmp eq i64 %8, 0
  %.sroa.0.0.copyload.pre7 = load i64, ptr %4, align 8
  br i1 %.not4, label %11, label %9

9:                                                ; preds = %.lr.ph
  %10 = call noundef nonnull align 4 dereferenceable(8) ptr @_ZN4CPTH6ModIntmLES0_(ptr noundef nonnull align 4 dereferenceable(8) %3, i64 %.sroa.0.0.copyload.pre7)
  %.sroa.0.0.copyload.pre = load i64, ptr %4, align 8
  br label %11

11:                                               ; preds = %9, %.lr.ph
  %.sroa.0.0.copyload = phi i64 [ %.sroa.0.0.copyload.pre, %9 ], [ %.sroa.0.0.copyload.pre7, %.lr.ph ]
  %12 = call noundef nonnull align 4 dereferenceable(8) ptr @_ZN4CPTH6ModIntmLES0_(ptr noundef nonnull align 4 dereferenceable(8) %4, i64 %.sroa.0.0.copyload)
  %13 = lshr i64 %.06, 1
  %.not = icmp ult i64 %.06, 2
  br i1 %.not, label %._crit_edge, label %.lr.ph, !llvm.loop !5

._crit_edge:                                      ; preds = %11, %2
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #2
  %14 = load i64, ptr %3, align 8
  ret i64 %14
}

declare void @_ZN4CPTH6ModIntC1Eix(ptr, i32, i64) local_unnamed_addr

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: BDCEPass,GVNPass,GlobalOptPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SCCPPass,SROAPass,SimplifyCFGPass