; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/datatypes/int (sc_nbexterns)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_ZN5sc_dt22vec_skip_leading_zerosEiPKj(i32 noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5sc_dt18mul_on_help_signedERiiiPjiiPKj(ptr noundef nonnull align 4 dereferenceable(4) %0, i32 noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4, i32 noundef %5, ptr noundef %6) #2 {
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca ptr, align 8
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca ptr, align 8
  store ptr %0, ptr %8, align 8, !tbaa !5
  store i32 %1, ptr %9, align 4, !tbaa !9
  store i32 %2, ptr %10, align 4, !tbaa !9
  store ptr %3, ptr %11, align 8, !tbaa !5
  store i32 %4, ptr %12, align 4, !tbaa !9
  store i32 %5, ptr %13, align 4, !tbaa !9
  store ptr %6, ptr %14, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #7
  %22 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %22, ptr %15, align 4, !tbaa !9
  %23 = load i32, ptr %10, align 4, !tbaa !9
  %24 = load ptr, ptr %11, align 8, !tbaa !5
  %25 = call noundef i32 @_ZN5sc_dt22vec_skip_leading_zerosEiPKj(i32 noundef %23, ptr noundef %24)
  store i32 %25, ptr %10, align 4, !tbaa !9
  %26 = load i32, ptr %13, align 4, !tbaa !9
  %27 = load ptr, ptr %14, align 8, !tbaa !5
  %28 = call noundef i32 @_ZN5sc_dt22vec_skip_leading_zerosEiPKj(i32 noundef %26, ptr noundef %27)
  store i32 %28, ptr %13, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #7
  %29 = load ptr, ptr %11, align 8, !tbaa !5
  %30 = load i32, ptr %29, align 4, !tbaa !9
  store i32 %30, ptr %16, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #7
  %31 = load ptr, ptr %14, align 8, !tbaa !5
  %32 = load i32, ptr %31, align 4, !tbaa !9
  store i32 %32, ptr %17, align 4, !tbaa !9
  %33 = load i32, ptr %13, align 4, !tbaa !9
  %34 = icmp eq i32 %33, 1
  br i1 %34, label %35, label %46

35:                                               ; preds = %7
  %36 = load i32, ptr %17, align 4, !tbaa !9
  %37 = icmp eq i32 %36, 1
  br i1 %37, label %38, label %46

38:                                               ; preds = %35
  %39 = load ptr, ptr %8, align 8, !tbaa !5
  %40 = load i32, ptr %39, align 4, !tbaa !9
  %41 = load i32, ptr %9, align 4, !tbaa !9
  %42 = load i32, ptr %15, align 4, !tbaa !9
  %43 = load ptr, ptr %11, align 8, !tbaa !5
  %44 = call noundef i32 @_ZN5sc_dt29convert_signed_SM_to_2C_to_SMEiiiPj(i32 noundef %40, i32 noundef %41, i32 noundef %42, ptr noundef %43)
  %45 = load ptr, ptr %8, align 8, !tbaa !5
  store i32 %44, ptr %45, align 4, !tbaa !9
  store i32 1, ptr %18, align 4
  br label %153

46:                                               ; preds = %35, %7
  %47 = load i32, ptr %10, align 4, !tbaa !9
  %48 = icmp eq i32 %47, 1
  br i1 %48, label %49, label %60

49:                                               ; preds = %46
  %50 = load i32, ptr %16, align 4, !tbaa !9
  %51 = icmp eq i32 %50, 1
  br i1 %51, label %52, label %60

52:                                               ; preds = %49
  %53 = load ptr, ptr %8, align 8, !tbaa !5
  %54 = load i32, ptr %9, align 4, !tbaa !9
  %55 = load i32, ptr %15, align 4, !tbaa !9
  %56 = load ptr, ptr %11, align 8, !tbaa !5
  %57 = load i32, ptr %12, align 4, !tbaa !9
  %58 = load i32, ptr %13, align 4, !tbaa !9
  %59 = load ptr, ptr %14, align 8, !tbaa !5
  call void @_ZN5sc_dt18copy_digits_signedERiiiPjiiPKj(ptr noundef nonnull align 4 dereferenceable(4) %53, i32 noundef %54, i32 noundef %55, ptr noundef %56, i32 noundef %57, i32 noundef %58, ptr noundef %59)
  store i32 1, ptr %18, align 4
  br label %153

60:                                               ; preds = %49, %46
  %61 = load i32, ptr %10, align 4, !tbaa !9
  %62 = icmp eq i32 %61, 1
  br i1 %62, label %63, label %85

63:                                               ; preds = %60
  %64 = load i32, ptr %13, align 4, !tbaa !9
  %65 = icmp eq i32 %64, 1
  br i1 %65, label %66, label %85

66:                                               ; preds = %63
  %67 = load i32, ptr %16, align 4, !tbaa !9
  %68 = zext i32 %67 to i64
  %69 = icmp ult i64 %68, 32768
  br i1 %69, label %70, label %85

70:                                               ; preds = %66
  %71 = load i32, ptr %17, align 4, !tbaa !9
  %72 = zext i32 %71 to i64
  %73 = icmp ult i64 %72, 32768
  br i1 %73, label %74, label %85

74:                                               ; preds = %70
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #7
  %75 = load i32, ptr %16, align 4, !tbaa !9
  %76 = load i32, ptr %17, align 4, !tbaa !9
  %77 = mul i32 %75, %76
  store i32 %77, ptr %19, align 4, !tbaa !9
  %78 = load ptr, ptr %8, align 8, !tbaa !5
  %79 = load i32, ptr %9, align 4, !tbaa !9
  %80 = load i32, ptr %15, align 4, !tbaa !9
  %81 = load ptr, ptr %11, align 8, !tbaa !5
  %82 = load i32, ptr %9, align 4, !tbaa !9
  %83 = load i32, ptr %12, align 4, !tbaa !9
  %84 = add nsw i32 %82, %83
  call void @_ZN5sc_dt18copy_digits_signedERiiiPjiiPKj(ptr noundef nonnull align 4 dereferenceable(4) %78, i32 noundef %79, i32 noundef %80, ptr noundef %81, i32 noundef %84, i32 noundef 1, ptr noundef %19)
  store i32 1, ptr %18, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #7
  br label %153

85:                                               ; preds = %70, %66, %63, %60
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #7
  %86 = load i32, ptr %10, align 4, !tbaa !9
  %87 = load i32, ptr %13, align 4, !tbaa !9
  %88 = add nsw i32 %86, %87
  store i32 %88, ptr %20, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %21) #7
  %89 = load i32, ptr %20, align 4, !tbaa !9
  %90 = sext i32 %89 to i64
  %91 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %90, i64 4)
  %92 = extractvalue { i64, i1 } %91, 1
  %93 = extractvalue { i64, i1 } %91, 0
  %94 = select i1 %92, i64 -1, i64 %93
  %95 = call noalias noundef nonnull ptr @_Znam(i64 noundef %94) #8
  store ptr %95, ptr %21, align 8, !tbaa !5
  %96 = load i32, ptr %20, align 4, !tbaa !9
  %97 = load ptr, ptr %21, align 8, !tbaa !5
  call void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef %96, ptr noundef %97)
  %98 = load i32, ptr %10, align 4, !tbaa !9
  %99 = icmp eq i32 %98, 1
  br i1 %99, label %100, label %109

100:                                              ; preds = %85
  %101 = load i32, ptr %16, align 4, !tbaa !9
  %102 = zext i32 %101 to i64
  %103 = icmp ult i64 %102, 32768
  br i1 %103, label %104, label %109

104:                                              ; preds = %100
  %105 = load i32, ptr %13, align 4, !tbaa !9
  %106 = load ptr, ptr %14, align 8, !tbaa !5
  %107 = load i32, ptr %16, align 4, !tbaa !9
  %108 = load ptr, ptr %21, align 8, !tbaa !5
  call void @_ZN5sc_dt13vec_mul_smallEiPKjjPj(i32 noundef %105, ptr noundef %106, i32 noundef %107, ptr noundef %108)
  br label %139

109:                                              ; preds = %100, %85
  %110 = load i32, ptr %13, align 4, !tbaa !9
  %111 = icmp eq i32 %110, 1
  br i1 %111, label %112, label %121

112:                                              ; preds = %109
  %113 = load i32, ptr %17, align 4, !tbaa !9
  %114 = zext i32 %113 to i64
  %115 = icmp ult i64 %114, 32768
  br i1 %115, label %116, label %121

116:                                              ; preds = %112
  %117 = load i32, ptr %10, align 4, !tbaa !9
  %118 = load ptr, ptr %11, align 8, !tbaa !5
  %119 = load i32, ptr %17, align 4, !tbaa !9
  %120 = load ptr, ptr %21, align 8, !tbaa !5
  call void @_ZN5sc_dt13vec_mul_smallEiPKjjPj(i32 noundef %117, ptr noundef %118, i32 noundef %119, ptr noundef %120)
  br label %138

121:                                              ; preds = %112, %109
  %122 = load i32, ptr %13, align 4, !tbaa !9
  %123 = load i32, ptr %10, align 4, !tbaa !9
  %124 = icmp slt i32 %122, %123
  br i1 %124, label %125, label %131

125:                                              ; preds = %121
  %126 = load i32, ptr %10, align 4, !tbaa !9
  %127 = load ptr, ptr %11, align 8, !tbaa !5
  %128 = load i32, ptr %13, align 4, !tbaa !9
  %129 = load ptr, ptr %14, align 8, !tbaa !5
  %130 = load ptr, ptr %21, align 8, !tbaa !5
  call void @_ZN5sc_dt7vec_mulEiPKjiS1_Pj(i32 noundef %126, ptr noundef %127, i32 noundef %128, ptr noundef %129, ptr noundef %130)
  br label %137

131:                                              ; preds = %121
  %132 = load i32, ptr %13, align 4, !tbaa !9
  %133 = load ptr, ptr %14, align 8, !tbaa !5
  %134 = load i32, ptr %10, align 4, !tbaa !9
  %135 = load ptr, ptr %11, align 8, !tbaa !5
  %136 = load ptr, ptr %21, align 8, !tbaa !5
  call void @_ZN5sc_dt7vec_mulEiPKjiS1_Pj(i32 noundef %132, ptr noundef %133, i32 noundef %134, ptr noundef %135, ptr noundef %136)
  br label %137

137:                                              ; preds = %131, %125
  br label %138

138:                                              ; preds = %137, %116
  br label %139

139:                                              ; preds = %138, %104
  %140 = load ptr, ptr %8, align 8, !tbaa !5
  %141 = load i32, ptr %9, align 4, !tbaa !9
  %142 = load i32, ptr %15, align 4, !tbaa !9
  %143 = load ptr, ptr %11, align 8, !tbaa !5
  %144 = load i32, ptr %9, align 4, !tbaa !9
  %145 = load i32, ptr %12, align 4, !tbaa !9
  %146 = add nsw i32 %144, %145
  %147 = load i32, ptr %20, align 4, !tbaa !9
  %148 = load ptr, ptr %21, align 8, !tbaa !5
  call void @_ZN5sc_dt18copy_digits_signedERiiiPjiiPKj(ptr noundef nonnull align 4 dereferenceable(4) %140, i32 noundef %141, i32 noundef %142, ptr noundef %143, i32 noundef %146, i32 noundef %147, ptr noundef %148)
  %149 = load ptr, ptr %21, align 8, !tbaa !5
  %150 = icmp eq ptr %149, null
  br i1 %150, label %152, label %151

151:                                              ; preds = %139
  call void @_ZdaPv(ptr noundef %149) #9
  br label %152

152:                                              ; preds = %151, %139
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #7
  store i32 0, ptr %18, align 4
  br label %153

153:                                              ; preds = %152, %74, %52, %38
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #7
  %154 = load i32, ptr %18, align 4
  switch i32 %154, label %156 [
    i32 0, label %155
    i32 1, label %155
  ]

155:                                              ; preds = %153, %153
  ret void

156:                                              ; preds = %153
  unreachable
}

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_ZN5sc_dt29convert_signed_SM_to_2C_to_SMEiiiPj(i32 noundef, i32 noundef, i32 noundef, ptr noundef) #0

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dt18copy_digits_signedERiiiPjiiPKj(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) #3

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) #4

declare void @_ZN5sc_dt13vec_mul_smallEiPKjjPj(i32 noundef, ptr noundef, i32 noundef, ptr noundef) #5

declare void @_ZN5sc_dt7vec_mulEiPKjiS1_Pj(i32 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) #5

; Function Attrs: nobuiltin nounwind
declare void @_ZdaPv(ptr noundef) #6

attributes #0 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }
attributes #8 = { builtin allocsize(0) }
attributes #9 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_ZN5sc_dt22vec_skip_leading_zerosEiPKj(i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5sc_dt18mul_on_help_signedERiiiPjiiPKj(ptr noundef nonnull align 4 dereferenceable(4) %0, i32 noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4, i32 noundef %5, ptr noundef %6) local_unnamed_addr #2 {
  %8 = alloca i32, align 4
  %9 = tail call noundef i32 @_ZN5sc_dt22vec_skip_leading_zerosEiPKj(i32 noundef %2, ptr noundef %3)
  %10 = tail call noundef i32 @_ZN5sc_dt22vec_skip_leading_zerosEiPKj(i32 noundef %5, ptr noundef %6)
  %11 = load i32, ptr %3, align 4, !tbaa !5
  %12 = load i32, ptr %6, align 4, !tbaa !5
  %13 = icmp eq i32 %10, 1
  %14 = icmp eq i32 %12, 1
  %or.cond = select i1 %13, i1 %14, i1 false
  br i1 %or.cond, label %15, label %18

15:                                               ; preds = %7
  %16 = load i32, ptr %0, align 4, !tbaa !5
  %17 = tail call noundef i32 @_ZN5sc_dt29convert_signed_SM_to_2C_to_SMEiiiPj(i32 noundef %16, i32 noundef %1, i32 noundef %2, ptr noundef nonnull %3)
  store i32 %17, ptr %0, align 4, !tbaa !5
  br label %44

18:                                               ; preds = %7
  %19 = icmp eq i32 %9, 1
  %20 = icmp eq i32 %11, 1
  %or.cond3 = select i1 %19, i1 %20, i1 false
  br i1 %or.cond3, label %21, label %22

21:                                               ; preds = %18
  tail call void @_ZN5sc_dt18copy_digits_signedERiiiPjiiPKj(ptr noundef nonnull align 4 dereferenceable(4) %0, i32 noundef %1, i32 noundef %2, ptr noundef nonnull %3, i32 noundef %4, i32 noundef %10, ptr noundef nonnull %6)
  br label %44

22:                                               ; preds = %18
  %or.cond5 = and i1 %19, %13
  %23 = icmp ult i32 %11, 32768
  %or.cond8 = select i1 %or.cond5, i1 %23, i1 false
  %24 = icmp ult i32 %12, 32768
  %or.cond11 = select i1 %or.cond8, i1 %24, i1 false
  br i1 %or.cond11, label %25, label %28

25:                                               ; preds = %22
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8) #6
  %26 = mul nuw nsw i32 %12, %11
  store i32 %26, ptr %8, align 4, !tbaa !5
  %27 = add nsw i32 %4, %1
  call void @_ZN5sc_dt18copy_digits_signedERiiiPjiiPKj(ptr noundef nonnull align 4 dereferenceable(4) %0, i32 noundef %1, i32 noundef %2, ptr noundef nonnull %3, i32 noundef %27, i32 noundef 1, ptr noundef nonnull %8)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #6
  br label %44

28:                                               ; preds = %22
  %29 = add nsw i32 %10, %9
  %30 = zext nneg i32 %29 to i64
  %31 = icmp slt i32 %29, 0
  %32 = shl nuw nsw i64 %30, 2
  %33 = select i1 %31, i64 -1, i64 %32
  %34 = tail call noalias noundef nonnull ptr @_Znam(i64 noundef %33) #7
  tail call void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef %29, ptr noundef nonnull %34)
  %or.cond14 = select i1 %19, i1 %23, i1 false
  br i1 %or.cond14, label %35, label %36

35:                                               ; preds = %28
  tail call void @_ZN5sc_dt13vec_mul_smallEiPKjjPj(i32 noundef %10, ptr noundef nonnull %6, i32 noundef %11, ptr noundef nonnull %34)
  br label %42

36:                                               ; preds = %28
  %or.cond17 = select i1 %13, i1 %24, i1 false
  br i1 %or.cond17, label %37, label %38

37:                                               ; preds = %36
  tail call void @_ZN5sc_dt13vec_mul_smallEiPKjjPj(i32 noundef %9, ptr noundef nonnull %3, i32 noundef %12, ptr noundef nonnull %34)
  br label %42

38:                                               ; preds = %36
  %39 = icmp slt i32 %10, %9
  br i1 %39, label %40, label %41

40:                                               ; preds = %38
  tail call void @_ZN5sc_dt7vec_mulEiPKjiS1_Pj(i32 noundef %9, ptr noundef nonnull %3, i32 noundef %10, ptr noundef nonnull %6, ptr noundef nonnull %34)
  br label %42

41:                                               ; preds = %38
  tail call void @_ZN5sc_dt7vec_mulEiPKjiS1_Pj(i32 noundef %10, ptr noundef nonnull %6, i32 noundef %9, ptr noundef nonnull %3, ptr noundef nonnull %34)
  br label %42

42:                                               ; preds = %37, %41, %40, %35
  %43 = add nsw i32 %4, %1
  tail call void @_ZN5sc_dt18copy_digits_signedERiiiPjiiPKj(ptr noundef nonnull align 4 dereferenceable(4) %0, i32 noundef %1, i32 noundef %2, ptr noundef nonnull %3, i32 noundef %43, i32 noundef %29, ptr noundef nonnull %34)
  tail call void @_ZdaPv(ptr noundef nonnull %34) #8
  br label %44

44:                                               ; preds = %42, %25, %21, %15
  ret void
}

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_ZN5sc_dt29convert_signed_SM_to_2C_to_SMEiiiPj(i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dt18copy_digits_signedERiiiPjiiPKj(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) local_unnamed_addr #3

declare void @_ZN5sc_dt13vec_mul_smallEiPKjjPj(i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #4

declare void @_ZN5sc_dt7vec_mulEiPKjiS1_Pj(i32 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #4

; Function Attrs: nobuiltin nounwind
declare void @_ZdaPv(ptr noundef) local_unnamed_addr #5

attributes #0 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }
attributes #7 = { builtin allocsize(0) }
attributes #8 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass