; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/OptionRomPkg (I2cReadByte)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [154 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [21 x i8], align 1

; Function Attrs: nounwind uwtable
declare dso_local void @I2cSendByte(ptr noundef, i8 noundef zeroext) #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @I2cReceiveByte(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @I2cWaitAck(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @I2cSendAck(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @I2cStart(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @I2cStop(ptr noundef) #0

; Function Attrs: nounwind uwtable
define dso_local i64 @I2cReadByte(ptr noundef %0, i8 noundef zeroext %1, i8 noundef zeroext %2, ptr noundef %3) #0 {
  %5 = alloca i64, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i8, align 1
  %8 = alloca i8, align 1
  %9 = alloca ptr, align 8
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i8 %1, ptr %7, align 1, !tbaa !9
  store i8 %2, ptr %8, align 1, !tbaa !9
  store ptr %3, ptr %9, align 8, !tbaa !5
  br label %10

10:                                               ; preds = %4
  %11 = call zeroext i8 @DebugAssertEnabled()
  %12 = icmp ne i8 %11, 0
  br i1 %12, label %13, label %18

13:                                               ; preds = %10
  %14 = load ptr, ptr %9, align 8, !tbaa !5
  %15 = icmp ne ptr %14, null
  br i1 %15, label %17, label %16

16:                                               ; preds = %13
  call void @DebugAssert(ptr noundef @.str, i64 noundef 300, ptr noundef @.str.1)
  br label %17

17:                                               ; preds = %16, %13
  br label %18

18:                                               ; preds = %17, %10
  br label %19

19:                                               ; preds = %18
  %20 = load ptr, ptr %6, align 8, !tbaa !5
  call void @I2cStart(ptr noundef %20)
  %21 = load ptr, ptr %6, align 8, !tbaa !5
  %22 = load i8, ptr %7, align 1, !tbaa !9
  %23 = zext i8 %22 to i32
  %24 = and i32 %23, 254
  %25 = trunc i32 %24 to i8
  call void @I2cSendByte(ptr noundef %21, i8 noundef zeroext %25)
  %26 = load ptr, ptr %6, align 8, !tbaa !5
  %27 = call zeroext i8 @I2cWaitAck(ptr noundef %26)
  %28 = zext i8 %27 to i32
  %29 = icmp eq i32 %28, 0
  br i1 %29, label %30, label %31

30:                                               ; preds = %19
  store i64 -9223372036854775801, ptr %5, align 8
  br label %56

31:                                               ; preds = %19
  %32 = load ptr, ptr %6, align 8, !tbaa !5
  %33 = load i8, ptr %8, align 1, !tbaa !9
  call void @I2cSendByte(ptr noundef %32, i8 noundef zeroext %33)
  %34 = load ptr, ptr %6, align 8, !tbaa !5
  %35 = call zeroext i8 @I2cWaitAck(ptr noundef %34)
  %36 = zext i8 %35 to i32
  %37 = icmp eq i32 %36, 0
  br i1 %37, label %38, label %39

38:                                               ; preds = %31
  store i64 -9223372036854775801, ptr %5, align 8
  br label %56

39:                                               ; preds = %31
  %40 = load ptr, ptr %6, align 8, !tbaa !5
  %41 = load i8, ptr %7, align 1, !tbaa !9
  %42 = zext i8 %41 to i32
  %43 = or i32 %42, 1
  %44 = trunc i32 %43 to i8
  call void @I2cSendByte(ptr noundef %40, i8 noundef zeroext %44)
  %45 = load ptr, ptr %6, align 8, !tbaa !5
  %46 = call zeroext i8 @I2cWaitAck(ptr noundef %45)
  %47 = zext i8 %46 to i32
  %48 = icmp eq i32 %47, 0
  br i1 %48, label %49, label %50

49:                                               ; preds = %39
  store i64 -9223372036854775801, ptr %5, align 8
  br label %56

50:                                               ; preds = %39
  %51 = load ptr, ptr %6, align 8, !tbaa !5
  %52 = call zeroext i8 @I2cReceiveByte(ptr noundef %51)
  %53 = load ptr, ptr %9, align 8, !tbaa !5
  store i8 %52, ptr %53, align 1, !tbaa !9
  %54 = load ptr, ptr %6, align 8, !tbaa !5
  call void @I2cSendAck(ptr noundef %54)
  %55 = load ptr, ptr %6, align 8, !tbaa !5
  call void @I2cStop(ptr noundef %55)
  store i64 0, ptr %5, align 8
  br label %56

56:                                               ; preds = %50, %49, %38, %30
  %57 = load i64, ptr %5, align 8
  ret i64 %57
}

declare zeroext i8 @DebugAssertEnabled() #1

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [154 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [21 x i8], align 1

; Function Attrs: nounwind uwtable
declare dso_local void @I2cSendByte(ptr noundef, i8 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @I2cReceiveByte(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @I2cWaitAck(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @I2cSendAck(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @I2cStart(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @I2cStop(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i64 -9223372036854775801, 1) i64 @I2cReadByte(ptr noundef %0, i8 noundef zeroext %1, i8 noundef zeroext %2, ptr noundef writeonly %3) local_unnamed_addr #0 {
  %5 = tail call zeroext i8 @DebugAssertEnabled() #2
  %6 = icmp eq i8 %5, 0
  %7 = icmp ne ptr %3, null
  %or.cond = or i1 %7, %6
  br i1 %or.cond, label %9, label %8

8:                                                ; preds = %4
  tail call void @DebugAssert(ptr noundef nonnull @.str, i64 noundef 300, ptr noundef nonnull @.str.1) #2
  br label %9

9:                                                ; preds = %4, %8
  tail call void @I2cStart(ptr noundef %0)
  %10 = and i8 %1, -2
  tail call void @I2cSendByte(ptr noundef %0, i8 noundef zeroext %10)
  %11 = tail call zeroext i8 @I2cWaitAck(ptr noundef %0)
  %12 = icmp eq i8 %11, 0
  br i1 %12, label %22, label %13

13:                                               ; preds = %9
  tail call void @I2cSendByte(ptr noundef %0, i8 noundef zeroext %2)
  %14 = tail call zeroext i8 @I2cWaitAck(ptr noundef %0)
  %15 = icmp eq i8 %14, 0
  br i1 %15, label %22, label %16

16:                                               ; preds = %13
  %17 = or i8 %1, 1
  tail call void @I2cSendByte(ptr noundef %0, i8 noundef zeroext %17)
  %18 = tail call zeroext i8 @I2cWaitAck(ptr noundef %0)
  %19 = icmp eq i8 %18, 0
  br i1 %19, label %22, label %20

20:                                               ; preds = %16
  %21 = tail call zeroext i8 @I2cReceiveByte(ptr noundef %0)
  store i8 %21, ptr %3, align 1, !tbaa !5
  tail call void @I2cSendAck(ptr noundef %0)
  tail call void @I2cStop(ptr noundef %0)
  br label %22

22:                                               ; preds = %16, %13, %9, %20
  %.0 = phi i64 [ 0, %20 ], [ -9223372036854775801, %9 ], [ -9223372036854775801, %13 ], [ -9223372036854775801, %16 ]
  ret i64 %.0
}

declare zeroext i8 @DebugAssertEnabled() local_unnamed_addr #1

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass