; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/datatypes/int/sc_signed.ll (ZNK5sc_dt9sc_signed14get_packed_repEPj)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::sc_signed" = type { %"class.sc_dt::sc_value_base", i32, i32, i32, ptr }
%"class.sc_dt::sc_value_base" = type { ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt9sc_signed6lengthEv(ptr noundef nonnull align 8 dereferenceable(32)) #1 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef, ptr noundef) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt13one_and_zerosEi(i32 noundef) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt7bit_ordEi(i32 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) #4

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) #5

; Function Attrs: nobuiltin nounwind
declare void @_ZdaPv(ptr noundef) #6

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt8vec_copyEiPjPKj(i32 noundef, ptr noundef, ptr noundef) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt9digit_ordEi(i32 noundef) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt14vec_complementEiPj(i32 noundef, ptr noundef) #3

; Function Attrs: mustprogress uwtable
define dso_local void @_ZNK5sc_dt9sc_signed14get_packed_repEPj(ptr noundef nonnull align 8 dereferenceable(32) %0, ptr noundef %1) #7 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %10 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #8
  %11 = call noundef i32 @_ZNK5sc_dt9sc_signed6lengthEv(ptr noundef nonnull align 8 dereferenceable(32) %10)
  %12 = sub nsw i32 %11, 1
  %13 = sdiv i32 %12, 32
  %14 = add nsw i32 %13, 1
  store i32 %14, ptr %5, align 4, !tbaa !9
  %15 = load i32, ptr %5, align 4, !tbaa !9
  %16 = load ptr, ptr %4, align 8, !tbaa !5
  call void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef %15, ptr noundef %16)
  %17 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %10, i32 0, i32 1
  %18 = load i32, ptr %17, align 8, !tbaa !11
  %19 = icmp eq i32 %18, 0
  br i1 %19, label %20, label %21

20:                                               ; preds = %2
  store i32 1, ptr %6, align 4
  br label %102

21:                                               ; preds = %2
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #8
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #8
  %22 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %10, i32 0, i32 3
  %23 = load i32, ptr %22, align 8, !tbaa !14
  %24 = sext i32 %23 to i64
  %25 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %24, i64 4)
  %26 = extractvalue { i64, i1 } %25, 1
  %27 = extractvalue { i64, i1 } %25, 0
  %28 = select i1 %26, i64 -1, i64 %27
  %29 = call noalias noundef nonnull ptr @_Znam(i64 noundef %28) #9
  store ptr %29, ptr %8, align 8, !tbaa !5
  %30 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %10, i32 0, i32 1
  %31 = load i32, ptr %30, align 8, !tbaa !11
  %32 = icmp eq i32 %31, 1
  br i1 %32, label %33, label %36

33:                                               ; preds = %21
  %34 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %10, i32 0, i32 4
  %35 = load ptr, ptr %34, align 8, !tbaa !15
  store ptr %35, ptr %7, align 8, !tbaa !5
  br label %51

36:                                               ; preds = %21
  %37 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %10, i32 0, i32 3
  %38 = load i32, ptr %37, align 8, !tbaa !14
  %39 = load ptr, ptr %8, align 8, !tbaa !5
  %40 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %10, i32 0, i32 4
  %41 = load ptr, ptr %40, align 8, !tbaa !15
  call void @_ZN5sc_dt8vec_copyEiPjPKj(i32 noundef %38, ptr noundef %39, ptr noundef %41)
  %42 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %10, i32 0, i32 3
  %43 = load i32, ptr %42, align 8, !tbaa !14
  %44 = load ptr, ptr %8, align 8, !tbaa !5
  call void @_ZN5sc_dt14vec_complementEiPj(i32 noundef %43, ptr noundef %44)
  %45 = load ptr, ptr %4, align 8, !tbaa !5
  %46 = load i32, ptr %5, align 4, !tbaa !9
  %47 = sub nsw i32 %46, 1
  %48 = sext i32 %47 to i64
  %49 = getelementptr inbounds i32, ptr %45, i64 %48
  store i32 -1, ptr %49, align 4, !tbaa !9
  %50 = load ptr, ptr %8, align 8, !tbaa !5
  store ptr %50, ptr %7, align 8, !tbaa !5
  br label %51

51:                                               ; preds = %36, %33
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #8
  %52 = call noundef i32 @_ZNK5sc_dt9sc_signed6lengthEv(ptr noundef nonnull align 8 dereferenceable(32) %10)
  %53 = sub nsw i32 %52, 1
  store i32 %53, ptr %9, align 4, !tbaa !9
  br label %54

54:                                               ; preds = %94, %51
  %55 = load i32, ptr %9, align 4, !tbaa !9
  %56 = icmp sge i32 %55, 0
  br i1 %56, label %58, label %57

57:                                               ; preds = %54
  store i32 2, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #8
  br label %97

58:                                               ; preds = %54
  %59 = load ptr, ptr %7, align 8, !tbaa !5
  %60 = load i32, ptr %9, align 4, !tbaa !9
  %61 = call noundef i32 @_ZN5sc_dt9digit_ordEi(i32 noundef %60)
  %62 = sext i32 %61 to i64
  %63 = getelementptr inbounds i32, ptr %59, i64 %62
  %64 = load i32, ptr %63, align 4, !tbaa !9
  %65 = load i32, ptr %9, align 4, !tbaa !9
  %66 = call noundef i32 @_ZN5sc_dt7bit_ordEi(i32 noundef %65)
  %67 = call noundef i32 @_ZN5sc_dt13one_and_zerosEi(i32 noundef %66)
  %68 = and i32 %64, %67
  %69 = icmp ne i32 %68, 0
  br i1 %69, label %70, label %81

70:                                               ; preds = %58
  %71 = load i32, ptr %9, align 4, !tbaa !9
  %72 = srem i32 %71, 32
  %73 = call noundef i32 @_ZN5sc_dt13one_and_zerosEi(i32 noundef %72)
  %74 = load ptr, ptr %4, align 8, !tbaa !5
  %75 = load i32, ptr %9, align 4, !tbaa !9
  %76 = sdiv i32 %75, 32
  %77 = sext i32 %76 to i64
  %78 = getelementptr inbounds i32, ptr %74, i64 %77
  %79 = load i32, ptr %78, align 4, !tbaa !9
  %80 = or i32 %79, %73
  store i32 %80, ptr %78, align 4, !tbaa !9
  br label %93

81:                                               ; preds = %58
  %82 = load i32, ptr %9, align 4, !tbaa !9
  %83 = srem i32 %82, 32
  %84 = call noundef i32 @_ZN5sc_dt13one_and_zerosEi(i32 noundef %83)
  %85 = xor i32 %84, -1
  %86 = load ptr, ptr %4, align 8, !tbaa !5
  %87 = load i32, ptr %9, align 4, !tbaa !9
  %88 = sdiv i32 %87, 32
  %89 = sext i32 %88 to i64
  %90 = getelementptr inbounds i32, ptr %86, i64 %89
  %91 = load i32, ptr %90, align 4, !tbaa !9
  %92 = and i32 %91, %85
  store i32 %92, ptr %90, align 4, !tbaa !9
  br label %93

93:                                               ; preds = %81, %70
  br label %94

94:                                               ; preds = %93
  %95 = load i32, ptr %9, align 4, !tbaa !9
  %96 = add nsw i32 %95, -1
  store i32 %96, ptr %9, align 4, !tbaa !9
  br label %54, !llvm.loop !16

97:                                               ; preds = %57
  %98 = load ptr, ptr %8, align 8, !tbaa !5
  %99 = icmp eq ptr %98, null
  br i1 %99, label %101, label %100

100:                                              ; preds = %97
  call void @_ZdaPv(ptr noundef %98) #10
  br label %101

101:                                              ; preds = %100, %97
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #8
  store i32 0, ptr %6, align 4
  br label %102

102:                                              ; preds = %101, %20
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #8
  %103 = load i32, ptr %6, align 4
  switch i32 %103, label %105 [
    i32 0, label %104
    i32 1, label %104
  ]

104:                                              ; preds = %102, %102
  ret void

105:                                              ; preds = %102
  unreachable
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { nounwind }
attributes #9 = { builtin allocsize(0) }
attributes #10 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 8}
!12 = !{!"_ZTSN5sc_dt9sc_signedE", !13, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !6, i64 24}
!13 = !{!"_ZTSN5sc_dt13sc_value_baseE"}
!14 = !{!12, !10, i64 16}
!15 = !{!12, !6, i64 24}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt9sc_signed6lengthEv(ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt13one_and_zerosEi(i32 noundef) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt7bit_ordEi(i32 noundef) local_unnamed_addr #2

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) local_unnamed_addr #3

; Function Attrs: nobuiltin nounwind
declare void @_ZdaPv(ptr noundef) local_unnamed_addr #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt8vec_copyEiPjPKj(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt9digit_ordEi(i32 noundef) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt14vec_complementEiPj(i32 noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZNK5sc_dt9sc_signed14get_packed_repEPj(ptr noundef nonnull align 8 dereferenceable(32) %0, ptr noundef %1) local_unnamed_addr #5 align 2 {
  %3 = tail call noundef i32 @_ZNK5sc_dt9sc_signed6lengthEv(ptr noundef nonnull align 8 dereferenceable(32) %0)
  %4 = add nsw i32 %3, -1
  %5 = sdiv i32 %4, 32
  %6 = add nsw i32 %5, 1
  tail call void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef %6, ptr noundef %1)
  %7 = getelementptr inbounds i8, ptr %0, i64 8
  %8 = load i32, ptr %7, align 8, !tbaa !5
  %9 = icmp eq i32 %8, 0
  br i1 %9, label %52, label %10

10:                                               ; preds = %2
  %11 = getelementptr inbounds i8, ptr %0, i64 16
  %12 = load i32, ptr %11, align 8, !tbaa !12
  %13 = sext i32 %12 to i64
  %14 = icmp slt i32 %12, 0
  %15 = shl nsw i64 %13, 2
  %16 = select i1 %14, i64 -1, i64 %15
  %17 = tail call noalias noundef nonnull ptr @_Znam(i64 noundef %16) #6
  %18 = icmp eq i32 %8, 1
  %19 = getelementptr inbounds i8, ptr %0, i64 24
  %20 = load ptr, ptr %19, align 8, !tbaa !13
  br i1 %18, label %25, label %21

21:                                               ; preds = %10
  tail call void @_ZN5sc_dt8vec_copyEiPjPKj(i32 noundef %12, ptr noundef nonnull %17, ptr noundef %20)
  %22 = load i32, ptr %11, align 8, !tbaa !12
  tail call void @_ZN5sc_dt14vec_complementEiPj(i32 noundef %22, ptr noundef nonnull %17)
  %23 = sext i32 %5 to i64
  %24 = getelementptr inbounds i32, ptr %1, i64 %23
  store i32 -1, ptr %24, align 4, !tbaa !14
  br label %25

25:                                               ; preds = %10, %21
  %.019 = phi ptr [ %17, %21 ], [ %20, %10 ]
  %26 = tail call noundef i32 @_ZNK5sc_dt9sc_signed6lengthEv(ptr noundef nonnull align 8 dereferenceable(32) %0)
  %27 = icmp sgt i32 %26, 0
  br i1 %27, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %25, %50
  %.021.in = phi i32 [ %.021, %50 ], [ %26, %25 ]
  %.021 = add nsw i32 %.021.in, -1
  %28 = tail call noundef i32 @_ZN5sc_dt9digit_ordEi(i32 noundef %.021)
  %29 = sext i32 %28 to i64
  %30 = getelementptr inbounds i32, ptr %.019, i64 %29
  %31 = load i32, ptr %30, align 4, !tbaa !14
  %32 = tail call noundef i32 @_ZN5sc_dt7bit_ordEi(i32 noundef %.021)
  %33 = tail call noundef i32 @_ZN5sc_dt13one_and_zerosEi(i32 noundef %32)
  %34 = and i32 %33, %31
  %.not = icmp eq i32 %34, 0
  %35 = and i32 %.021, 31
  %36 = tail call noundef i32 @_ZN5sc_dt13one_and_zerosEi(i32 noundef %35)
  br i1 %.not, label %43, label %37

37:                                               ; preds = %.lr.ph
  %38 = lshr i32 %.021, 5
  %39 = zext nneg i32 %38 to i64
  %40 = getelementptr inbounds i32, ptr %1, i64 %39
  %41 = load i32, ptr %40, align 4, !tbaa !14
  %42 = or i32 %41, %36
  store i32 %42, ptr %40, align 4, !tbaa !14
  br label %50

43:                                               ; preds = %.lr.ph
  %44 = xor i32 %36, -1
  %45 = lshr i32 %.021, 5
  %46 = zext nneg i32 %45 to i64
  %47 = getelementptr inbounds i32, ptr %1, i64 %46
  %48 = load i32, ptr %47, align 4, !tbaa !14
  %49 = and i32 %48, %44
  store i32 %49, ptr %47, align 4, !tbaa !14
  br label %50

50:                                               ; preds = %37, %43
  %51 = icmp ugt i32 %.021.in, 1
  br i1 %51, label %.lr.ph, label %._crit_edge, !llvm.loop !15

._crit_edge:                                      ; preds = %50, %25
  tail call void @_ZdaPv(ptr noundef nonnull %17) #7
  br label %52

52:                                               ; preds = %2, %._crit_edge
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { builtin allocsize(0) }
attributes #7 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 8}
!6 = !{!"_ZTSN5sc_dt9sc_signedE", !7, i64 0, !8, i64 8, !8, i64 12, !8, i64 16, !11, i64 24}
!7 = !{!"_ZTSN5sc_dt13sc_value_baseE"}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!6, !8, i64 16}
!13 = !{!6, !11, i64 24}
!14 = !{!8, !8, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass