; LLVM IR from gem5/gem5 :: ext/softfloat (f64_to_extF80M)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.float64_t = type { i64 }
%union.ui64_f64 = type { i64 }
%struct.commonNaN = type { i8 }
%struct.exp16_sig64 = type { i64, i64 }
%struct.extFloat80M = type { i64, i16 }

; Function Attrs: nounwind uwtable
define dso_local void @f64_to_extF80M(i64 %0, ptr noundef %1) #0 {
  %3 = alloca %struct.float64_t, align 8
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca %union.ui64_f64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i8, align 1
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = alloca %struct.commonNaN, align 1
  %12 = alloca i64, align 8
  %13 = alloca i64, align 8
  %14 = alloca %struct.exp16_sig64, align 8
  %15 = alloca i32, align 4
  %16 = alloca %struct.exp16_sig64, align 8
  %17 = getelementptr inbounds %struct.float64_t, ptr %3, i32 0, i32 0
  store i64 %0, ptr %17, align 8
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #5
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #5
  call void @llvm.lifetime.start.p0(i64 1, ptr %11) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #5
  call void @llvm.lifetime.start.p0(i64 16, ptr %14) #5
  %18 = load ptr, ptr %4, align 8, !tbaa !5
  store ptr %18, ptr %5, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %6, ptr align 8 %3, i64 8, i1 false), !tbaa.struct !9
  %19 = load i64, ptr %6, align 8, !tbaa !12
  store i64 %19, ptr %7, align 8, !tbaa !10
  %20 = load i64, ptr %7, align 8, !tbaa !10
  %21 = lshr i64 %20, 63
  %22 = icmp ne i64 %21, 0
  %23 = zext i1 %22 to i8
  store i8 %23, ptr %8, align 1, !tbaa !13
  %24 = load i64, ptr %7, align 8, !tbaa !10
  %25 = lshr i64 %24, 52
  %26 = and i64 %25, 2047
  store i64 %26, ptr %9, align 8, !tbaa !10
  %27 = load i64, ptr %7, align 8, !tbaa !10
  %28 = and i64 %27, 4503599627370495
  store i64 %28, ptr %10, align 8, !tbaa !10
  %29 = load i64, ptr %9, align 8, !tbaa !10
  %30 = icmp eq i64 %29, 2047
  br i1 %30, label %31, label %47

31:                                               ; preds = %2
  %32 = load i64, ptr %10, align 8, !tbaa !10
  %33 = icmp ne i64 %32, 0
  br i1 %33, label %34, label %41

34:                                               ; preds = %31
  %35 = load i64, ptr %7, align 8, !tbaa !10
  %36 = and i64 %35, 2251799813685248
  %37 = icmp ne i64 %36, 0
  br i1 %37, label %39, label %38

38:                                               ; preds = %34
  call void @softfloat_raiseFlags(i8 noundef zeroext 16)
  br label %39

39:                                               ; preds = %38, %34
  %40 = load ptr, ptr %5, align 8, !tbaa !5
  call void @softfloat_commonNaNToExtF80M(ptr noundef %11, ptr noundef %40)
  store i32 1, ptr %15, align 4
  br label %89

41:                                               ; preds = %31
  %42 = load i8, ptr %8, align 1, !tbaa !13, !range !15, !noundef !16
  %43 = trunc i8 %42 to i1
  %44 = zext i1 %43 to i64
  %45 = shl i64 %44, 15
  %46 = or i64 %45, 32767
  store i64 %46, ptr %12, align 8, !tbaa !10
  store i64 -9223372036854775808, ptr %13, align 8, !tbaa !10
  br label %81

47:                                               ; preds = %2
  %48 = load i64, ptr %9, align 8, !tbaa !10
  %49 = icmp ne i64 %48, 0
  br i1 %49, label %70, label %50

50:                                               ; preds = %47
  %51 = load i64, ptr %10, align 8, !tbaa !10
  %52 = icmp ne i64 %51, 0
  br i1 %52, label %59, label %53

53:                                               ; preds = %50
  %54 = load i8, ptr %8, align 1, !tbaa !13, !range !15, !noundef !16
  %55 = trunc i8 %54 to i1
  %56 = zext i1 %55 to i64
  %57 = shl i64 %56, 15
  %58 = or i64 %57, 0
  store i64 %58, ptr %12, align 8, !tbaa !10
  store i64 0, ptr %13, align 8, !tbaa !10
  br label %81

59:                                               ; preds = %50
  call void @llvm.lifetime.start.p0(i64 16, ptr %16) #5
  %60 = load i64, ptr %10, align 8, !tbaa !10
  %61 = call { i64, i64 } @softfloat_normSubnormalF64Sig(i64 noundef %60)
  %62 = getelementptr inbounds { i64, i64 }, ptr %16, i32 0, i32 0
  %63 = extractvalue { i64, i64 } %61, 0
  store i64 %63, ptr %62, align 8
  %64 = getelementptr inbounds { i64, i64 }, ptr %16, i32 0, i32 1
  %65 = extractvalue { i64, i64 } %61, 1
  store i64 %65, ptr %64, align 8
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %14, ptr align 8 %16, i64 16, i1 false), !tbaa.struct !17
  call void @llvm.lifetime.end.p0(i64 16, ptr %16) #5
  %66 = getelementptr inbounds %struct.exp16_sig64, ptr %14, i32 0, i32 0
  %67 = load i64, ptr %66, align 8, !tbaa !18
  store i64 %67, ptr %9, align 8, !tbaa !10
  %68 = getelementptr inbounds %struct.exp16_sig64, ptr %14, i32 0, i32 1
  %69 = load i64, ptr %68, align 8, !tbaa !20
  store i64 %69, ptr %10, align 8, !tbaa !10
  br label %70

70:                                               ; preds = %59, %47
  %71 = load i8, ptr %8, align 1, !tbaa !13, !range !15, !noundef !16
  %72 = trunc i8 %71 to i1
  %73 = zext i1 %72 to i64
  %74 = shl i64 %73, 15
  %75 = load i64, ptr %9, align 8, !tbaa !10
  %76 = add nsw i64 %75, 15360
  %77 = or i64 %74, %76
  store i64 %77, ptr %12, align 8, !tbaa !10
  %78 = load i64, ptr %10, align 8, !tbaa !10
  %79 = shl i64 %78, 11
  %80 = or i64 -9223372036854775808, %79
  store i64 %80, ptr %13, align 8, !tbaa !10
  br label %81

81:                                               ; preds = %70, %53, %41
  %82 = load i64, ptr %12, align 8, !tbaa !10
  %83 = trunc i64 %82 to i16
  %84 = load ptr, ptr %5, align 8, !tbaa !5
  %85 = getelementptr inbounds %struct.extFloat80M, ptr %84, i32 0, i32 1
  store i16 %83, ptr %85, align 8, !tbaa !21
  %86 = load i64, ptr %13, align 8, !tbaa !10
  %87 = load ptr, ptr %5, align 8, !tbaa !5
  %88 = getelementptr inbounds %struct.extFloat80M, ptr %87, i32 0, i32 0
  store i64 %86, ptr %88, align 8, !tbaa !24
  store i32 0, ptr %15, align 4
  br label %89

89:                                               ; preds = %81, %39
  call void @llvm.lifetime.end.p0(i64 16, ptr %14) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr %11) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #5
  %90 = load i32, ptr %15, align 4
  switch i32 %90, label %92 [
    i32 0, label %91
    i32 1, label %91
  ]

91:                                               ; preds = %89, %89
  ret void

92:                                               ; preds = %89
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

declare void @softfloat_raiseFlags(i8 noundef zeroext) #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @softfloat_commonNaNToExtF80M(ptr noundef, ptr noundef) #4

declare { i64, i64 } @softfloat_normSubnormalF64Sig(i64 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{i64 0, i64 8, !10}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !7, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"_Bool", !7, i64 0}
!15 = !{i8 0, i8 2}
!16 = !{}
!17 = !{i64 0, i64 8, !10, i64 8, i64 8, !10}
!18 = !{!19, !11, i64 0}
!19 = !{!"exp16_sig64", !11, i64 0, !11, i64 8}
!20 = !{!19, !11, i64 8}
!21 = !{!22, !23, i64 8}
!22 = !{!"extFloat80M", !11, i64 0, !23, i64 8}
!23 = !{!"short", !7, i64 0}
!24 = !{!22, !11, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.commonNaN = type { i8 }

; Function Attrs: nounwind uwtable
define dso_local void @f64_to_extF80M(i64 %0, ptr noundef %1) local_unnamed_addr #0 {
  %3 = alloca %struct.commonNaN, align 1
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %3) #4
  %4 = lshr i64 %0, 52
  %5 = and i64 %4, 2047
  %6 = and i64 %0, 4503599627370495
  switch i64 %5, label %23 [
    i64 2047, label %7
    i64 0, label %15
  ]

7:                                                ; preds = %2
  %.not29 = icmp eq i64 %6, 0
  br i1 %.not29, label %12, label %8

8:                                                ; preds = %7
  %9 = and i64 %0, 2251799813685248
  %.not30 = icmp eq i64 %9, 0
  br i1 %.not30, label %10, label %11

10:                                               ; preds = %8
  tail call void @softfloat_raiseFlags(i8 noundef zeroext 16) #4
  br label %11

11:                                               ; preds = %10, %8
  call void @softfloat_commonNaNToExtF80M(ptr noundef nonnull %3, ptr noundef %1)
  br label %33

12:                                               ; preds = %7
  %13 = lshr exact i64 %0, 48
  %14 = or i64 %13, 32767
  br label %30

15:                                               ; preds = %2
  %.not28 = icmp eq i64 %6, 0
  br i1 %.not28, label %16, label %19

16:                                               ; preds = %15
  %17 = lshr exact i64 %0, 48
  %18 = and i64 %17, 32768
  br label %30

19:                                               ; preds = %15
  %20 = tail call { i64, i64 } @softfloat_normSubnormalF64Sig(i64 noundef %6) #4
  %21 = extractvalue { i64, i64 } %20, 0
  %22 = extractvalue { i64, i64 } %20, 1
  br label %23

23:                                               ; preds = %2, %19
  %.023 = phi i64 [ %22, %19 ], [ %6, %2 ]
  %.0 = phi i64 [ %21, %19 ], [ %5, %2 ]
  %24 = lshr i64 %0, 48
  %25 = and i64 %24, 32768
  %26 = add nsw i64 %.0, 15360
  %27 = or i64 %26, %25
  %28 = shl i64 %.023, 11
  %29 = or i64 %28, -9223372036854775808
  br label %30

30:                                               ; preds = %23, %16, %12
  %.025 = phi i64 [ -9223372036854775808, %12 ], [ %29, %23 ], [ 0, %16 ]
  %.024 = phi i64 [ %14, %12 ], [ %27, %23 ], [ %18, %16 ]
  %31 = trunc i64 %.024 to i16
  %32 = getelementptr inbounds i8, ptr %1, i64 8
  store i16 %31, ptr %32, align 8, !tbaa !5
  store i64 %.025, ptr %1, align 8, !tbaa !11
  br label %33

33:                                               ; preds = %30, %11
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %3) #4
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @softfloat_raiseFlags(i8 noundef zeroext) local_unnamed_addr #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @softfloat_commonNaNToExtF80M(ptr noundef, ptr noundef) local_unnamed_addr #3

declare { i64, i64 } @softfloat_normSubnormalF64Sig(i64 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"extFloat80M", !7, i64 0, !10, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"short", !8, i64 0}
!11 = !{!6, !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass