; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/utils/sc_mempool.ll (ZN7sc_core12sc_allocatorC2Eii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_core::sc_allocator" = type <{ i32, i32, ptr, ptr, ptr, i32, i32, i32, [4 x i8] }>

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN7sc_core12sc_allocatorC2Eii(ptr noundef nonnull align 8 dereferenceable(44) %0, i32 noundef %1, i32 noundef %2) unnamed_addr #0 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  store i32 %2, ptr %6, align 4, !tbaa !9
  %7 = load ptr, ptr %4, align 8
  %8 = getelementptr inbounds %"class.sc_core::sc_allocator", ptr %7, i32 0, i32 0
  %9 = load i32, ptr %5, align 4, !tbaa !9
  %10 = sub nsw i32 %9, 1
  %11 = load i32, ptr %6, align 4, !tbaa !9
  %12 = sdiv i32 %10, %11
  %13 = add nsw i32 %12, 1
  %14 = load i32, ptr %6, align 4, !tbaa !9
  %15 = mul nsw i32 %13, %14
  %16 = sext i32 %15 to i64
  %17 = add i64 8, %16
  %18 = trunc i64 %17 to i32
  store i32 %18, ptr %8, align 8, !tbaa !11
  %19 = getelementptr inbounds %"class.sc_core::sc_allocator", ptr %7, i32 0, i32 1
  %20 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %20, ptr %19, align 4, !tbaa !13
  %21 = getelementptr inbounds %"class.sc_core::sc_allocator", ptr %7, i32 0, i32 2
  store ptr null, ptr %21, align 8, !tbaa !14
  %22 = getelementptr inbounds %"class.sc_core::sc_allocator", ptr %7, i32 0, i32 3
  store ptr null, ptr %22, align 8, !tbaa !15
  %23 = getelementptr inbounds %"class.sc_core::sc_allocator", ptr %7, i32 0, i32 4
  store ptr null, ptr %23, align 8, !tbaa !16
  %24 = getelementptr inbounds %"class.sc_core::sc_allocator", ptr %7, i32 0, i32 5
  store i32 0, ptr %24, align 8, !tbaa !17
  %25 = getelementptr inbounds %"class.sc_core::sc_allocator", ptr %7, i32 0, i32 6
  store i32 0, ptr %25, align 4, !tbaa !18
  %26 = getelementptr inbounds %"class.sc_core::sc_allocator", ptr %7, i32 0, i32 7
  store i32 0, ptr %26, align 8, !tbaa !19
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"_ZTSN7sc_core12sc_allocatorE", !10, i64 0, !10, i64 4, !6, i64 8, !6, i64 16, !6, i64 24, !10, i64 32, !10, i64 36, !10, i64 40}
!13 = !{!12, !10, i64 4}
!14 = !{!12, !6, i64 8}
!15 = !{!12, !6, i64 16}
!16 = !{!12, !6, i64 24}
!17 = !{!12, !10, i64 32}
!18 = !{!12, !10, i64 36}
!19 = !{!12, !10, i64 40}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable
define dso_local void @_ZN7sc_core12sc_allocatorC2Eii(ptr nocapture noundef nonnull writeonly align 8 dereferenceable(44) %0, i32 noundef %1, i32 noundef %2) unnamed_addr #0 align 2 {
  %4 = add nsw i32 %1, -1
  %5 = sdiv i32 %4, %2
  %6 = add nsw i32 %5, 1
  %7 = mul nsw i32 %6, %2
  %8 = add i32 %7, 8
  store i32 %8, ptr %0, align 8, !tbaa !5
  %9 = getelementptr inbounds i8, ptr %0, i64 4
  store i32 %2, ptr %9, align 4, !tbaa !11
  %10 = getelementptr inbounds i8, ptr %0, i64 8
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(36) %10, i8 0, i64 36, i1 false)
  ret void
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTSN7sc_core12sc_allocatorE", !7, i64 0, !7, i64 4, !10, i64 8, !10, i64 16, !10, i64 24, !7, i64 32, !7, i64 36, !7, i64 40}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !7, i64 4}


; Effective O3 passes: EarlyCSEPass,IPSCCPPass,InstCombinePass,MemCpyOptPass,PostOrderFunctionAttrsPass,SROAPass,TailCallElimPass