; LLVM IR from gem5/gem5 :: ext/drampower/src (MemoryPowerModel)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.Data::MemorySpecification" = type { ptr, %"class.std::__cxx11::basic_string", %"class.Data::MemoryType", [4 x i8], %"class.Data::MemArchitectureSpec", %"class.Data::MemTimingSpec", %"class.Data::MemPowerSpec", %"class.Data::Parametrisable" }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.Data::MemoryType" = type { i32 }
%"class.Data::MemArchitectureSpec" = type <{ ptr, i64, i64, i64, i64, i64, i64, i64, i64, i8, i8, i8, [5 x i8], %"class.Data::Parametrisable" }>
%"class.Data::MemTimingSpec" = type { ptr, double, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, double, %"class.Data::Parametrisable" }
%"class.Data::MemPowerSpec" = type { ptr, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, %"class.Data::Parametrisable" }
%"class.Data::Parametrisable" = type { ptr, %"class.std::vector.3" }
%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<Data::Parameter, std::allocator<Data::Parameter>>::_Vector_impl" }
%"struct.std::_Vector_base<Data::Parameter, std::allocator<Data::Parameter>>::_Vector_impl" = type { %"struct.std::_Vector_base<Data::Parameter, std::allocator<Data::Parameter>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Data::Parameter, std::allocator<Data::Parameter>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.Data::MemoryPowerModel" = type { i64, i64, %"struct.Data::MemoryPowerModel::Energy", %"struct.Data::MemoryPowerModel::Power" }
%"struct.Data::MemoryPowerModel::Energy" = type { double, %"class.std::vector", double, %"class.std::vector", double, %"class.std::vector", double, %"class.std::vector", double, %"class.std::vector", %"class.std::vector", double, %"class.std::vector", double, %"class.std::vector", double, %"class.std::vector", double, %"class.std::vector", double, %"class.std::vector", double, double, double, %"class.std::vector", double, %"class.std::vector", double, %"class.std::vector", double, %"class.std::vector", double, %"class.std::vector", double, %"class.std::vector", double, %"class.std::vector", double, %"class.std::vector", double, %"class.std::vector", double, %"class.std::vector", double, %"class.std::vector", double, %"class.std::vector", double, %"class.std::vector", double, %"class.std::vector", double, double, double, double, double }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.Data::MemoryPowerModel::Power" = type { double, double, double, double, double, double }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN4Data16MemoryPowerModel13io_term_powerERKNS_19MemorySpecificationE(ptr noundef nonnull align 8 dereferenceable(912) %0, ptr noundef nonnull align 8 dereferenceable(736) %1) #1 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %8 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #3
  %9 = load ptr, ptr %4, align 8, !tbaa !5
  %10 = getelementptr inbounds %"class.Data::MemorySpecification", ptr %9, i32 0, i32 5
  store ptr %10, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  %11 = load ptr, ptr %4, align 8, !tbaa !5
  %12 = getelementptr inbounds %"class.Data::MemorySpecification", ptr %11, i32 0, i32 4
  store ptr %12, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  %13 = load ptr, ptr %4, align 8, !tbaa !5
  %14 = getelementptr inbounds %"class.Data::MemorySpecification", ptr %13, i32 0, i32 6
  store ptr %14, ptr %7, align 8, !tbaa !5
  %15 = load ptr, ptr %7, align 8, !tbaa !5
  %16 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %15, i32 0, i32 27
  %17 = load double, ptr %16, align 8, !tbaa !9
  %18 = getelementptr inbounds %"class.Data::MemoryPowerModel", ptr %8, i32 0, i32 3
  %19 = getelementptr inbounds %"struct.Data::MemoryPowerModel::Power", ptr %18, i32 0, i32 0
  store double %17, ptr %19, align 8, !tbaa !12
  %20 = load ptr, ptr %7, align 8, !tbaa !5
  %21 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %20, i32 0, i32 28
  %22 = load double, ptr %21, align 8, !tbaa !21
  %23 = getelementptr inbounds %"class.Data::MemoryPowerModel", ptr %8, i32 0, i32 3
  %24 = getelementptr inbounds %"struct.Data::MemoryPowerModel::Power", ptr %23, i32 0, i32 1
  store double %22, ptr %24, align 8, !tbaa !22
  %25 = load ptr, ptr %6, align 8, !tbaa !5
  %26 = getelementptr inbounds %"class.Data::MemArchitectureSpec", ptr %25, i32 0, i32 3
  %27 = load i64, ptr %26, align 8, !tbaa !23
  %28 = icmp sgt i64 %27, 1
  br i1 %28, label %29, label %40

29:                                               ; preds = %2
  %30 = load ptr, ptr %7, align 8, !tbaa !5
  %31 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %30, i32 0, i32 29
  %32 = load double, ptr %31, align 8, !tbaa !26
  %33 = getelementptr inbounds %"class.Data::MemoryPowerModel", ptr %8, i32 0, i32 3
  %34 = getelementptr inbounds %"struct.Data::MemoryPowerModel::Power", ptr %33, i32 0, i32 2
  store double %32, ptr %34, align 8, !tbaa !27
  %35 = load ptr, ptr %7, align 8, !tbaa !5
  %36 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %35, i32 0, i32 30
  %37 = load double, ptr %36, align 8, !tbaa !28
  %38 = getelementptr inbounds %"class.Data::MemoryPowerModel", ptr %8, i32 0, i32 3
  %39 = getelementptr inbounds %"struct.Data::MemoryPowerModel::Power", ptr %38, i32 0, i32 3
  store double %37, ptr %39, align 8, !tbaa !29
  br label %40

40:                                               ; preds = %29, %2
  %41 = load ptr, ptr %7, align 8, !tbaa !5
  %42 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %41, i32 0, i32 26
  %43 = load double, ptr %42, align 8, !tbaa !30
  %44 = fcmp une double %43, 0.000000e+00
  br i1 %44, label %45, label %62

45:                                               ; preds = %40
  %46 = load ptr, ptr %7, align 8, !tbaa !5
  %47 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %46, i32 0, i32 26
  %48 = load double, ptr %47, align 8, !tbaa !30
  %49 = fmul double %48, 5.000000e-01
  %50 = load ptr, ptr %7, align 8, !tbaa !5
  %51 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %50, i32 0, i32 25
  %52 = load double, ptr %51, align 8, !tbaa !31
  %53 = call double @pow(double noundef %52, double noundef 2.000000e+00) #3
  %54 = fmul double %49, %53
  %55 = load ptr, ptr %5, align 8, !tbaa !5
  %56 = getelementptr inbounds %"class.Data::MemTimingSpec", ptr %55, i32 0, i32 1
  %57 = load double, ptr %56, align 8, !tbaa !32
  %58 = fmul double %54, %57
  %59 = fmul double %58, 1.000000e+06
  %60 = getelementptr inbounds %"class.Data::MemoryPowerModel", ptr %8, i32 0, i32 3
  %61 = getelementptr inbounds %"struct.Data::MemoryPowerModel::Power", ptr %60, i32 0, i32 0
  store double %59, ptr %61, align 8, !tbaa !12
  br label %62

62:                                               ; preds = %45, %40
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #3
  ret void
}

; Function Attrs: nounwind
declare double @pow(double noundef, double noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 216}
!10 = !{!"_ZTSN4Data12MemPowerSpecE", !11, i64 8, !11, i64 16, !11, i64 24, !11, i64 32, !11, i64 40, !11, i64 48, !11, i64 56, !11, i64 64, !11, i64 72, !11, i64 80, !11, i64 88, !11, i64 96, !11, i64 104, !11, i64 112, !11, i64 120, !11, i64 128, !11, i64 136, !11, i64 144, !11, i64 152, !11, i64 160, !11, i64 168, !11, i64 176, !11, i64 184, !11, i64 192, !11, i64 200, !11, i64 208, !11, i64 216, !11, i64 224, !11, i64 232, !11, i64 240}
!11 = !{!"double", !7, i64 0}
!12 = !{!13, !11, i64 864}
!13 = !{!"_ZTSN4Data16MemoryPowerModelE", !14, i64 0, !14, i64 8, !15, i64 16, !20, i64 864}
!14 = !{!"long", !7, i64 0}
!15 = !{!"_ZTSN4Data16MemoryPowerModel6EnergyE", !11, i64 0, !16, i64 8, !11, i64 32, !16, i64 40, !11, i64 64, !16, i64 72, !11, i64 96, !16, i64 104, !11, i64 128, !16, i64 136, !16, i64 160, !11, i64 184, !16, i64 192, !11, i64 216, !16, i64 224, !11, i64 248, !16, i64 256, !11, i64 280, !16, i64 288, !11, i64 312, !16, i64 320, !11, i64 344, !11, i64 352, !11, i64 360, !16, i64 368, !11, i64 392, !16, i64 400, !11, i64 424, !16, i64 432, !11, i64 456, !16, i64 464, !11, i64 488, !16, i64 496, !11, i64 520, !16, i64 528, !11, i64 552, !16, i64 560, !11, i64 584, !16, i64 592, !11, i64 616, !16, i64 624, !11, i64 648, !16, i64 656, !11, i64 680, !16, i64 688, !11, i64 712, !16, i64 720, !11, i64 744, !16, i64 752, !11, i64 776, !16, i64 784, !11, i64 808, !11, i64 816, !11, i64 824, !11, i64 832, !11, i64 840}
!16 = !{!"_ZTSSt6vectorIdSaIdEE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!20 = !{!"_ZTSN4Data16MemoryPowerModel5PowerE", !11, i64 0, !11, i64 8, !11, i64 16, !11, i64 24, !11, i64 32, !11, i64 40}
!21 = !{!10, !11, i64 224}
!22 = !{!13, !11, i64 872}
!23 = !{!24, !14, i64 24}
!24 = !{!"_ZTSN4Data19MemArchitectureSpecE", !14, i64 8, !14, i64 16, !14, i64 24, !14, i64 32, !14, i64 40, !14, i64 48, !14, i64 56, !14, i64 64, !25, i64 72, !25, i64 73, !25, i64 74}
!25 = !{!"bool", !7, i64 0}
!26 = !{!10, !11, i64 232}
!27 = !{!13, !11, i64 880}
!28 = !{!10, !11, i64 240}
!29 = !{!13, !11, i64 888}
!30 = !{!10, !11, i64 208}
!31 = !{!10, !11, i64 200}
!32 = !{!33, !11, i64 8}
!33 = !{!"_ZTSN4Data13MemTimingSpecE", !11, i64 8, !14, i64 16, !14, i64 24, !14, i64 32, !14, i64 40, !14, i64 48, !14, i64 56, !14, i64 64, !14, i64 72, !14, i64 80, !14, i64 88, !14, i64 96, !14, i64 104, !14, i64 112, !14, i64 120, !14, i64 128, !14, i64 136, !14, i64 144, !14, i64 152, !14, i64 160, !14, i64 168, !14, i64 176, !14, i64 184, !14, i64 192, !14, i64 200, !14, i64 208, !14, i64 216, !14, i64 224, !14, i64 232, !14, i64 240, !14, i64 248, !11, i64 256}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
define dso_local void @_ZN4Data16MemoryPowerModel13io_term_powerERKNS_19MemorySpecificationE(ptr nocapture noundef nonnull writeonly align 8 dereferenceable(912) %0, ptr nocapture noundef nonnull readonly align 8 dereferenceable(736) %1) local_unnamed_addr #0 align 2 {
  %3 = getelementptr inbounds i8, ptr %1, i64 672
  %4 = getelementptr inbounds i8, ptr %0, i64 864
  %5 = load <2 x double>, ptr %3, align 8, !tbaa !5
  store <2 x double> %5, ptr %4, align 8, !tbaa !5
  %6 = getelementptr inbounds i8, ptr %1, i64 72
  %7 = load i64, ptr %6, align 8, !tbaa !9
  %8 = icmp sgt i64 %7, 1
  br i1 %8, label %9, label %13

9:                                                ; preds = %2
  %10 = getelementptr inbounds i8, ptr %1, i64 688
  %11 = getelementptr inbounds i8, ptr %0, i64 880
  %12 = load <2 x double>, ptr %10, align 8, !tbaa !5
  store <2 x double> %12, ptr %11, align 8, !tbaa !5
  br label %13

13:                                               ; preds = %9, %2
  %14 = getelementptr inbounds i8, ptr %1, i64 664
  %15 = load double, ptr %14, align 8, !tbaa !13
  %16 = fcmp une double %15, 0.000000e+00
  br i1 %16, label %17, label %26

17:                                               ; preds = %13
  %18 = fmul double %15, 5.000000e-01
  %19 = getelementptr inbounds i8, ptr %1, i64 656
  %20 = load double, ptr %19, align 8, !tbaa !15
  %square = fmul double %20, %20
  %21 = fmul double %18, %square
  %22 = getelementptr inbounds i8, ptr %1, i64 168
  %23 = load double, ptr %22, align 8, !tbaa !16
  %24 = fmul double %23, %21
  %25 = fmul double %24, 1.000000e+06
  store double %25, ptr %4, align 8, !tbaa !18
  br label %26

26:                                               ; preds = %17, %13
  ret void
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 24}
!10 = !{!"_ZTSN4Data19MemArchitectureSpecE", !11, i64 8, !11, i64 16, !11, i64 24, !11, i64 32, !11, i64 40, !11, i64 48, !11, i64 56, !11, i64 64, !12, i64 72, !12, i64 73, !12, i64 74}
!11 = !{!"long", !7, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{!14, !6, i64 208}
!14 = !{!"_ZTSN4Data12MemPowerSpecE", !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !6, i64 120, !6, i64 128, !6, i64 136, !6, i64 144, !6, i64 152, !6, i64 160, !6, i64 168, !6, i64 176, !6, i64 184, !6, i64 192, !6, i64 200, !6, i64 208, !6, i64 216, !6, i64 224, !6, i64 232, !6, i64 240}
!15 = !{!14, !6, i64 200}
!16 = !{!17, !6, i64 8}
!17 = !{!"_ZTSN4Data13MemTimingSpecE", !6, i64 8, !11, i64 16, !11, i64 24, !11, i64 32, !11, i64 40, !11, i64 48, !11, i64 56, !11, i64 64, !11, i64 72, !11, i64 80, !11, i64 88, !11, i64 96, !11, i64 104, !11, i64 112, !11, i64 120, !11, i64 128, !11, i64 136, !11, i64 144, !11, i64 152, !11, i64 160, !11, i64 168, !11, i64 176, !11, i64 184, !11, i64 192, !11, i64 200, !11, i64 208, !11, i64 216, !11, i64 224, !11, i64 232, !11, i64 240, !11, i64 248, !6, i64 256}
!18 = !{!19, !6, i64 864}
!19 = !{!"_ZTSN4Data16MemoryPowerModelE", !11, i64 0, !11, i64 8, !20, i64 16, !26, i64 864}
!20 = !{!"_ZTSN4Data16MemoryPowerModel6EnergyE", !6, i64 0, !21, i64 8, !6, i64 32, !21, i64 40, !6, i64 64, !21, i64 72, !6, i64 96, !21, i64 104, !6, i64 128, !21, i64 136, !21, i64 160, !6, i64 184, !21, i64 192, !6, i64 216, !21, i64 224, !6, i64 248, !21, i64 256, !6, i64 280, !21, i64 288, !6, i64 312, !21, i64 320, !6, i64 344, !6, i64 352, !6, i64 360, !21, i64 368, !6, i64 392, !21, i64 400, !6, i64 424, !21, i64 432, !6, i64 456, !21, i64 464, !6, i64 488, !21, i64 496, !6, i64 520, !21, i64 528, !6, i64 552, !21, i64 560, !6, i64 584, !21, i64 592, !6, i64 616, !21, i64 624, !6, i64 648, !21, i64 656, !6, i64 680, !21, i64 688, !6, i64 712, !21, i64 720, !6, i64 744, !21, i64 752, !6, i64 776, !21, i64 784, !6, i64 808, !6, i64 816, !6, i64 824, !6, i64 832, !6, i64 840}
!21 = !{!"_ZTSSt6vectorIdSaIdEE", !22, i64 0}
!22 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !25, i64 0, !25, i64 8, !25, i64 16}
!25 = !{!"any pointer", !7, i64 0}
!26 = !{!"_ZTSN4Data16MemoryPowerModel5PowerE", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SLPVectorizerPass,SROAPass