; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Bus/Pci (NvmExpressBuildDevicePath)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct._NVME_CONTROLLER_PRIVATE_DATA = type { i32, ptr, ptr, ptr, ptr, i64, ptr, %struct.NVM_EXPRESS_PASS_THRU_MODE, %struct._NVM_EXPRESS_PASS_THRU_PROTOCOL, ptr, ptr, ptr, [2 x ptr], [2 x ptr], [2 x ptr], [2 x ptr], [2 x %struct.NVME_SQTDBL], [2 x %struct.NVME_CQHDBL], [2 x i8], [2 x i16], %struct.NVME_CAP, ptr }
%struct.NVM_EXPRESS_PASS_THRU_MODE = type { i32, i32, i32, i32, i64, i32 }
%struct._NVM_EXPRESS_PASS_THRU_PROTOCOL = type { ptr, ptr, ptr, ptr, ptr }
%struct.NVME_SQTDBL = type { i16, i16 }
%struct.NVME_CQHDBL = type { i16, i16 }
%struct.NVME_CAP = type { i16, i8, i8, i16, i8, i8 }
%struct.NVME_NAMESPACE_DEVICE_PATH = type { %struct.EFI_DEVICE_PATH_PROTOCOL, i32, i64 }
%struct.EFI_DEVICE_PATH_PROTOCOL = type { i8, i8, [2 x i8] }

@.str.52 = external hidden unnamed_addr constant [157 x i8], align 1
@.str.53 = external hidden unnamed_addr constant [21 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare zeroext i8 @DebugAssertEnabled() #1

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) #1

declare ptr @AllocateZeroPool(i64 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local i64 @NvmExpressBuildDevicePath(ptr noundef %0, i32 noundef %1, i64 noundef %2, ptr noundef %3) #2 {
  %5 = alloca i64, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i64, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !9
  store i64 %2, ptr %8, align 8, !tbaa !11
  store ptr %3, ptr %9, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  %13 = load ptr, ptr %6, align 8, !tbaa !5
  %14 = icmp eq ptr %13, null
  br i1 %14, label %18, label %15

15:                                               ; preds = %4
  %16 = load ptr, ptr %9, align 8, !tbaa !5
  %17 = icmp eq ptr %16, null
  br i1 %17, label %18, label %19

18:                                               ; preds = %15, %4
  store i64 -9223372036854775806, ptr %5, align 8
  store i32 1, ptr %12, align 4
  br label %66

19:                                               ; preds = %15
  %20 = call zeroext i8 @DebugAssertEnabled()
  %21 = zext i8 %20 to i32
  %22 = icmp ne i32 %21, 0
  br i1 %22, label %23, label %33

23:                                               ; preds = %19
  %24 = load ptr, ptr %6, align 8, !tbaa !5
  %25 = ptrtoint ptr %24 to i64
  %26 = sub i64 %25, ptrtoint (ptr getelementptr inbounds (%struct._NVME_CONTROLLER_PRIVATE_DATA, ptr null, i32 0, i32 8) to i64)
  %27 = inttoptr i64 %26 to ptr
  %28 = getelementptr inbounds %struct._NVME_CONTROLLER_PRIVATE_DATA, ptr %27, i32 0, i32 0
  %29 = load i32, ptr %28, align 8, !tbaa !13
  %30 = icmp ne i32 %29, 1162696270
  br i1 %30, label %31, label %33

31:                                               ; preds = %23
  call void @DebugAssert(ptr noundef @.str.52, i64 noundef 865, ptr noundef @.str.53)
  %32 = load ptr, ptr %6, align 8, !tbaa !5
  br label %38

33:                                               ; preds = %23, %19
  %34 = load ptr, ptr %6, align 8, !tbaa !5
  %35 = ptrtoint ptr %34 to i64
  %36 = sub i64 %35, ptrtoint (ptr getelementptr inbounds (%struct._NVME_CONTROLLER_PRIVATE_DATA, ptr null, i32 0, i32 8) to i64)
  %37 = inttoptr i64 %36 to ptr
  br label %38

38:                                               ; preds = %33, %31
  %39 = phi ptr [ %32, %31 ], [ %37, %33 ]
  store ptr %39, ptr %10, align 8, !tbaa !5
  %40 = load i32, ptr %7, align 4, !tbaa !9
  %41 = icmp eq i32 %40, 0
  br i1 %41, label %42, label %43

42:                                               ; preds = %38
  store i64 -9223372036854775794, ptr %5, align 8
  store i32 1, ptr %12, align 4
  br label %66

43:                                               ; preds = %38
  %44 = call ptr @AllocateZeroPool(i64 noundef 16)
  store ptr %44, ptr %11, align 8, !tbaa !5
  %45 = load ptr, ptr %11, align 8, !tbaa !5
  %46 = icmp eq ptr %45, null
  br i1 %46, label %47, label %48

47:                                               ; preds = %43
  store i64 -9223372036854775799, ptr %5, align 8
  store i32 1, ptr %12, align 4
  br label %66

48:                                               ; preds = %43
  %49 = load ptr, ptr %11, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.NVME_NAMESPACE_DEVICE_PATH, ptr %49, i32 0, i32 0
  %51 = getelementptr inbounds %struct.EFI_DEVICE_PATH_PROTOCOL, ptr %50, i32 0, i32 0
  store i8 3, ptr %51, align 1, !tbaa !19
  %52 = load ptr, ptr %11, align 8, !tbaa !5
  %53 = getelementptr inbounds %struct.NVME_NAMESPACE_DEVICE_PATH, ptr %52, i32 0, i32 0
  %54 = getelementptr inbounds %struct.EFI_DEVICE_PATH_PROTOCOL, ptr %53, i32 0, i32 1
  store i8 23, ptr %54, align 1, !tbaa !22
  %55 = load ptr, ptr %11, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.NVME_NAMESPACE_DEVICE_PATH, ptr %55, i32 0, i32 0
  %57 = call zeroext i16 @SetDevicePathNodeLength(ptr noundef %56, i64 noundef 16)
  %58 = load i32, ptr %7, align 4, !tbaa !9
  %59 = load ptr, ptr %11, align 8, !tbaa !5
  %60 = getelementptr inbounds %struct.NVME_NAMESPACE_DEVICE_PATH, ptr %59, i32 0, i32 1
  store i32 %58, ptr %60, align 1, !tbaa !23
  %61 = load i64, ptr %8, align 8, !tbaa !11
  %62 = load ptr, ptr %11, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.NVME_NAMESPACE_DEVICE_PATH, ptr %62, i32 0, i32 2
  store i64 %61, ptr %63, align 1, !tbaa !24
  %64 = load ptr, ptr %11, align 8, !tbaa !5
  %65 = load ptr, ptr %9, align 8, !tbaa !5
  store ptr %64, ptr %65, align 8, !tbaa !5
  store i64 0, ptr %5, align 8
  store i32 1, ptr %12, align 4
  br label %66

66:                                               ; preds = %48, %47, %42, %18
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  %67 = load i64, ptr %5, align 8
  ret i64 %67
}

declare zeroext i16 @SetDevicePathNodeLength(ptr noundef, i64 noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long long", !7, i64 0}
!13 = !{!14, !10, i64 0}
!14 = !{!"_NVME_CONTROLLER_PRIVATE_DATA", !10, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !12, i64 40, !6, i64 48, !15, i64 56, !16, i64 88, !6, i64 128, !6, i64 136, !6, i64 144, !7, i64 152, !7, i64 168, !7, i64 184, !7, i64 200, !7, i64 216, !7, i64 224, !7, i64 232, !7, i64 234, !17, i64 238, !6, i64 248}
!15 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !12, i64 16, !10, i64 24}
!16 = !{!"_NVM_EXPRESS_PASS_THRU_PROTOCOL", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32}
!17 = !{!"", !18, i64 0, !7, i64 2, !7, i64 2, !7, i64 2, !7, i64 3, !18, i64 4, !18, i64 4, !18, i64 4, !18, i64 5, !7, i64 6, !7, i64 6, !7, i64 7}
!18 = !{!"short", !7, i64 0}
!19 = !{!20, !7, i64 0}
!20 = !{!"", !21, i64 0, !10, i64 4, !12, i64 8}
!21 = !{!"", !7, i64 0, !7, i64 1, !7, i64 2}
!22 = !{!20, !7, i64 1}
!23 = !{!20, !10, i64 4}
!24 = !{!20, !12, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.52 = external hidden unnamed_addr constant [157 x i8], align 1
@.str.53 = external hidden unnamed_addr constant [21 x i8], align 1

declare zeroext i8 @DebugAssertEnabled() local_unnamed_addr #0

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #0

declare ptr @AllocateZeroPool(i64 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i64 -9223372036854775806, 1) i64 @NvmExpressBuildDevicePath(ptr noundef %0, i32 noundef %1, i64 noundef %2, ptr noundef writeonly %3) local_unnamed_addr #1 {
  %5 = icmp eq ptr %0, null
  %6 = icmp eq ptr %3, null
  %or.cond = or i1 %5, %6
  br i1 %or.cond, label %25, label %7

7:                                                ; preds = %4
  %8 = tail call zeroext i8 @DebugAssertEnabled() #2
  %.not = icmp eq i8 %8, 0
  br i1 %.not, label %15, label %9

9:                                                ; preds = %7
  %10 = ptrtoint ptr %0 to i64
  %11 = add i64 %10, -88
  %12 = inttoptr i64 %11 to ptr
  %13 = load i32, ptr %12, align 8, !tbaa !5
  %.not21 = icmp eq i32 %13, 1162696270
  br i1 %.not21, label %15, label %14

14:                                               ; preds = %9
  tail call void @DebugAssert(ptr noundef nonnull @.str.52, i64 noundef 865, ptr noundef nonnull @.str.53) #2
  br label %15

15:                                               ; preds = %7, %9, %14
  %16 = icmp eq i32 %1, 0
  br i1 %16, label %25, label %17

17:                                               ; preds = %15
  %18 = tail call ptr @AllocateZeroPool(i64 noundef 16) #2
  %19 = icmp eq ptr %18, null
  br i1 %19, label %25, label %20

20:                                               ; preds = %17
  store i8 3, ptr %18, align 1, !tbaa !16
  %21 = getelementptr inbounds i8, ptr %18, i64 1
  store i8 23, ptr %21, align 1, !tbaa !19
  %22 = tail call zeroext i16 @SetDevicePathNodeLength(ptr noundef nonnull %18, i64 noundef 16) #2
  %23 = getelementptr inbounds i8, ptr %18, i64 4
  store i32 %1, ptr %23, align 1, !tbaa !20
  %24 = getelementptr inbounds i8, ptr %18, i64 8
  store i64 %2, ptr %24, align 1, !tbaa !21
  store ptr %18, ptr %3, align 8, !tbaa !22
  br label %25

25:                                               ; preds = %17, %15, %4, %20
  %.0 = phi i64 [ 0, %20 ], [ -9223372036854775806, %4 ], [ -9223372036854775794, %15 ], [ -9223372036854775799, %17 ]
  ret i64 %.0
}

declare zeroext i16 @SetDevicePathNodeLength(ptr noundef, i64 noundef) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_NVME_CONTROLLER_PRIVATE_DATA", !7, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !11, i64 40, !10, i64 48, !12, i64 56, !13, i64 88, !10, i64 128, !10, i64 136, !10, i64 144, !8, i64 152, !8, i64 168, !8, i64 184, !8, i64 200, !8, i64 216, !8, i64 224, !8, i64 232, !8, i64 234, !14, i64 238, !10, i64 248}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!"long long", !8, i64 0}
!12 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !11, i64 16, !7, i64 24}
!13 = !{!"_NVM_EXPRESS_PASS_THRU_PROTOCOL", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32}
!14 = !{!"", !15, i64 0, !8, i64 2, !8, i64 2, !8, i64 2, !8, i64 3, !15, i64 4, !15, i64 4, !15, i64 4, !15, i64 5, !8, i64 6, !8, i64 6, !8, i64 7}
!15 = !{!"short", !8, i64 0}
!16 = !{!17, !8, i64 0}
!17 = !{!"", !18, i64 0, !7, i64 4, !11, i64 8}
!18 = !{!"", !8, i64 0, !8, i64 1, !8, i64 2}
!19 = !{!17, !8, i64 1}
!20 = !{!17, !7, i64 4}
!21 = !{!17, !11, i64 8}
!22 = !{!10, !10, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass