; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/datatypes/fx/sc_fxnum.ll (ZNK5sc_dt13sc_fxnum_fast7get_bitEi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::scfx_ieee_double" = type { %"union.sc_dt::ieee_double" }
%"union.sc_dt::ieee_double" = type { double }
%"class.sc_dt::sc_fxnum_fast" = type { double, %"class.sc_dt::scfx_params", i8, i8, ptr }
%"class.sc_dt::scfx_params" = type { %"class.sc_dt::sc_fxtype_params", i32, %"class.sc_dt::sc_fxcast_switch" }
%"class.sc_dt::sc_fxtype_params" = type { i32, i32, i32, i32, i32 }
%"class.sc_dt::sc_fxcast_switch" = type { i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK5sc_dt13sc_fxnum_fast7get_bitEi(ptr noundef nonnull align 8 dereferenceable(48) %0, i32 noundef %1) #1 align 2 {
  %3 = alloca i1, align 1
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca %"class.sc_dt::scfx_ieee_double", align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  %12 = load ptr, ptr %4, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #4
  %13 = getelementptr inbounds %"class.sc_dt::sc_fxnum_fast", ptr %12, i32 0, i32 0
  %14 = load double, ptr %13, align 8, !tbaa !11
  call void @_ZN5sc_dt16scfx_ieee_doubleC2Ed(ptr noundef nonnull align 8 dereferenceable(8) %6, double noundef %14)
  %15 = call noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double7is_zeroEv(ptr noundef nonnull align 8 dereferenceable(8) %6)
  br i1 %15, label %20, label %16

16:                                               ; preds = %2
  %17 = call noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double6is_nanEv(ptr noundef nonnull align 8 dereferenceable(8) %6)
  br i1 %17, label %20, label %18

18:                                               ; preds = %16
  %19 = call noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double6is_infEv(ptr noundef nonnull align 8 dereferenceable(8) %6)
  br i1 %19, label %20, label %21

20:                                               ; preds = %18, %16, %2
  store i1 false, ptr %3, align 1
  store i32 1, ptr %7, align 4
  br label %78

21:                                               ; preds = %18
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  %22 = call noundef i32 @_ZNK5sc_dt16scfx_ieee_double9mantissa0Ev(ptr noundef nonnull align 8 dereferenceable(8) %6)
  store i32 %22, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  %23 = call noundef i32 @_ZNK5sc_dt16scfx_ieee_double9mantissa1Ev(ptr noundef nonnull align 8 dereferenceable(8) %6)
  store i32 %23, ptr %9, align 4, !tbaa !9
  %24 = call noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double9is_normalEv(ptr noundef nonnull align 8 dereferenceable(8) %6)
  br i1 %24, label %25, label %28

25:                                               ; preds = %21
  %26 = load i32, ptr %8, align 4, !tbaa !9
  %27 = add i32 %26, 1048576
  store i32 %27, ptr %8, align 4, !tbaa !9
  br label %28

28:                                               ; preds = %25, %21
  %29 = call noundef i32 @_ZNK5sc_dt16scfx_ieee_double8negativeEv(ptr noundef nonnull align 8 dereferenceable(8) %6)
  %30 = icmp ne i32 %29, 0
  br i1 %30, label %31, label %46

31:                                               ; preds = %28
  %32 = load i32, ptr %8, align 4, !tbaa !9
  %33 = xor i32 %32, -1
  store i32 %33, ptr %8, align 4, !tbaa !9
  %34 = load i32, ptr %9, align 4, !tbaa !9
  %35 = xor i32 %34, -1
  store i32 %35, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  %36 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %36, ptr %10, align 4, !tbaa !9
  %37 = load i32, ptr %9, align 4, !tbaa !9
  %38 = add i32 %37, 1
  store i32 %38, ptr %9, align 4, !tbaa !9
  %39 = load i32, ptr %9, align 4, !tbaa !9
  %40 = load i32, ptr %10, align 4, !tbaa !9
  %41 = icmp ule i32 %39, %40
  br i1 %41, label %42, label %45

42:                                               ; preds = %31
  %43 = load i32, ptr %8, align 4, !tbaa !9
  %44 = add i32 %43, 1
  store i32 %44, ptr %8, align 4, !tbaa !9
  br label %45

45:                                               ; preds = %42, %31
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  br label %46

46:                                               ; preds = %45, %28
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  %47 = load i32, ptr %5, align 4, !tbaa !9
  %48 = call noundef i32 @_ZNK5sc_dt16scfx_ieee_double8exponentEv(ptr noundef nonnull align 8 dereferenceable(8) %6)
  %49 = sub nsw i32 %47, %48
  store i32 %49, ptr %11, align 4, !tbaa !9
  %50 = load i32, ptr %11, align 4, !tbaa !9
  %51 = add nsw i32 %50, 20
  store i32 %51, ptr %11, align 4, !tbaa !9
  %52 = icmp sge i32 %51, 32
  br i1 %52, label %53, label %57

53:                                               ; preds = %46
  %54 = load i32, ptr %8, align 4, !tbaa !9
  %55 = and i32 %54, -2147483648
  %56 = icmp ne i32 %55, 0
  store i1 %56, ptr %3, align 1
  store i32 1, ptr %7, align 4
  br label %77

57:                                               ; preds = %46
  %58 = load i32, ptr %11, align 4, !tbaa !9
  %59 = icmp sge i32 %58, 0
  br i1 %59, label %60, label %66

60:                                               ; preds = %57
  %61 = load i32, ptr %8, align 4, !tbaa !9
  %62 = load i32, ptr %11, align 4, !tbaa !9
  %63 = shl i32 1, %62
  %64 = and i32 %61, %63
  %65 = icmp ne i32 %64, 0
  store i1 %65, ptr %3, align 1
  store i32 1, ptr %7, align 4
  br label %77

66:                                               ; preds = %57
  %67 = load i32, ptr %11, align 4, !tbaa !9
  %68 = add nsw i32 %67, 32
  store i32 %68, ptr %11, align 4, !tbaa !9
  %69 = icmp sge i32 %68, 0
  br i1 %69, label %70, label %76

70:                                               ; preds = %66
  %71 = load i32, ptr %9, align 4, !tbaa !9
  %72 = load i32, ptr %11, align 4, !tbaa !9
  %73 = shl i32 1, %72
  %74 = and i32 %71, %73
  %75 = icmp ne i32 %74, 0
  store i1 %75, ptr %3, align 1
  store i32 1, ptr %7, align 4
  br label %77

76:                                               ; preds = %66
  store i1 false, ptr %3, align 1
  store i32 1, ptr %7, align 4
  br label %77

77:                                               ; preds = %76, %70, %60, %53
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  br label %78

78:                                               ; preds = %77, %20
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #4
  %79 = load i1, ptr %3, align 1
  ret i1 %79
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt16scfx_ieee_doubleC2Ed(ptr noundef nonnull align 8 dereferenceable(8), double noundef) unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double6is_nanEv(ptr noundef nonnull align 8 dereferenceable(8)) #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double6is_infEv(ptr noundef nonnull align 8 dereferenceable(8)) #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double7is_zeroEv(ptr noundef nonnull align 8 dereferenceable(8)) #3 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt16scfx_ieee_double8negativeEv(ptr noundef nonnull align 8 dereferenceable(8)) #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt16scfx_ieee_double9mantissa0Ev(ptr noundef nonnull align 8 dereferenceable(8)) #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt16scfx_ieee_double9mantissa1Ev(ptr noundef nonnull align 8 dereferenceable(8)) #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double9is_normalEv(ptr noundef nonnull align 8 dereferenceable(8)) #3 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt16scfx_ieee_double8exponentEv(ptr noundef nonnull align 8 dereferenceable(8)) #2 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"_ZTSN5sc_dt13sc_fxnum_fastE", !13, i64 0, !14, i64 8, !21, i64 36, !21, i64 37, !6, i64 40}
!13 = !{!"double", !7, i64 0}
!14 = !{!"_ZTSN5sc_dt11scfx_paramsE", !15, i64 0, !18, i64 20, !19, i64 24}
!15 = !{!"_ZTSN5sc_dt16sc_fxtype_paramsE", !10, i64 0, !10, i64 4, !16, i64 8, !17, i64 12, !10, i64 16}
!16 = !{!"_ZTSN5sc_dt9sc_q_modeE", !7, i64 0}
!17 = !{!"_ZTSN5sc_dt9sc_o_modeE", !7, i64 0}
!18 = !{!"_ZTSN5sc_dt6sc_encE", !7, i64 0}
!19 = !{!"_ZTSN5sc_dt16sc_fxcast_switchE", !20, i64 0}
!20 = !{!"_ZTSN5sc_dt9sc_switchE", !7, i64 0}
!21 = !{!"bool", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::scfx_ieee_double" = type { %"union.sc_dt::ieee_double" }
%"union.sc_dt::ieee_double" = type { double }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK5sc_dt13sc_fxnum_fast7get_bitEi(ptr nocapture noundef nonnull readonly align 8 dereferenceable(48) %0, i32 noundef %1) local_unnamed_addr #1 align 2 {
  %3 = alloca %"class.sc_dt::scfx_ieee_double", align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #4
  %4 = load double, ptr %0, align 8, !tbaa !5
  call void @_ZN5sc_dt16scfx_ieee_doubleC2Ed(ptr noundef nonnull align 8 dereferenceable(8) %3, double noundef %4)
  %5 = call noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double7is_zeroEv(ptr noundef nonnull align 8 dereferenceable(8) %3)
  br i1 %5, label %41, label %6

6:                                                ; preds = %2
  %7 = call noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double6is_nanEv(ptr noundef nonnull align 8 dereferenceable(8) %3)
  br i1 %7, label %41, label %8

8:                                                ; preds = %6
  %9 = call noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double6is_infEv(ptr noundef nonnull align 8 dereferenceable(8) %3)
  br i1 %9, label %41, label %10

10:                                               ; preds = %8
  %11 = call noundef i32 @_ZNK5sc_dt16scfx_ieee_double9mantissa0Ev(ptr noundef nonnull align 8 dereferenceable(8) %3)
  %12 = call noundef i32 @_ZNK5sc_dt16scfx_ieee_double9mantissa1Ev(ptr noundef nonnull align 8 dereferenceable(8) %3)
  %13 = call noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double9is_normalEv(ptr noundef nonnull align 8 dereferenceable(8) %3)
  %14 = add i32 %11, 1048576
  %spec.select = select i1 %13, i32 %14, i32 %11
  %15 = call noundef i32 @_ZNK5sc_dt16scfx_ieee_double8negativeEv(ptr noundef nonnull align 8 dereferenceable(8) %3)
  %.not = icmp eq i32 %15, 0
  br i1 %.not, label %21, label %16

16:                                               ; preds = %10
  %17 = xor i32 %spec.select, -1
  %18 = xor i32 %12, -1
  %19 = sub i32 0, %12
  %.not23 = icmp ugt i32 %19, %18
  %20 = sub i32 0, %spec.select
  %spec.select24 = select i1 %.not23, i32 %17, i32 %20
  br label %21

21:                                               ; preds = %16, %10
  %.2 = phi i32 [ %spec.select24, %16 ], [ %spec.select, %10 ]
  %.018 = phi i32 [ %19, %16 ], [ %12, %10 ]
  %22 = call noundef i32 @_ZNK5sc_dt16scfx_ieee_double8exponentEv(ptr noundef nonnull align 8 dereferenceable(8) %3)
  %23 = sub nsw i32 %1, %22
  %24 = add nsw i32 %23, 20
  %25 = icmp sgt i32 %23, 11
  br i1 %25, label %26, label %28

26:                                               ; preds = %21
  %27 = icmp slt i32 %.2, 0
  br label %41

28:                                               ; preds = %21
  %29 = icmp sgt i32 %23, -21
  br i1 %29, label %30, label %34

30:                                               ; preds = %28
  %31 = shl nuw i32 1, %24
  %32 = and i32 %31, %.2
  %33 = icmp ne i32 %32, 0
  br label %41

34:                                               ; preds = %28
  %35 = icmp ugt i32 %23, -53
  br i1 %35, label %36, label %41

36:                                               ; preds = %34
  %37 = add nsw i32 %23, 52
  %38 = shl nuw i32 1, %37
  %39 = and i32 %38, %.018
  %40 = icmp ne i32 %39, 0
  br label %41

41:                                               ; preds = %26, %30, %36, %34, %2, %6, %8
  %.1 = phi i1 [ false, %8 ], [ false, %6 ], [ false, %2 ], [ %27, %26 ], [ %33, %30 ], [ %40, %36 ], [ false, %34 ]
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #4
  ret i1 %.1
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt16scfx_ieee_doubleC2Ed(ptr noundef nonnull align 8 dereferenceable(8), double noundef) unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double6is_nanEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double6is_infEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double7is_zeroEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #3 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt16scfx_ieee_double8negativeEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt16scfx_ieee_double9mantissa0Ev(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt16scfx_ieee_double9mantissa1Ev(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double9is_normalEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #3 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt16scfx_ieee_double8exponentEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTSN5sc_dt13sc_fxnum_fastE", !7, i64 0, !10, i64 8, !18, i64 36, !18, i64 37, !19, i64 40}
!7 = !{!"double", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTSN5sc_dt11scfx_paramsE", !11, i64 0, !15, i64 20, !16, i64 24}
!11 = !{!"_ZTSN5sc_dt16sc_fxtype_paramsE", !12, i64 0, !12, i64 4, !13, i64 8, !14, i64 12, !12, i64 16}
!12 = !{!"int", !8, i64 0}
!13 = !{!"_ZTSN5sc_dt9sc_q_modeE", !8, i64 0}
!14 = !{!"_ZTSN5sc_dt9sc_o_modeE", !8, i64 0}
!15 = !{!"_ZTSN5sc_dt6sc_encE", !8, i64 0}
!16 = !{!"_ZTSN5sc_dt16sc_fxcast_switchE", !17, i64 0}
!17 = !{!"_ZTSN5sc_dt9sc_switchE", !8, i64 0}
!18 = !{!"bool", !8, i64 0}
!19 = !{!"any pointer", !8, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass