; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/datatypes/int (sc_unsigned)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN5sc_dt16compare_unsignedEiiiPKjiiiS1_ii(i32 noundef %0, i32 noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, ptr noundef %7, i32 noundef %8, i32 noundef %9) #1 {
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca ptr, align 8
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca ptr, align 8
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  %26 = alloca ptr, align 8
  store i32 %0, ptr %12, align 4, !tbaa !5
  store i32 %1, ptr %13, align 4, !tbaa !5
  store i32 %2, ptr %14, align 4, !tbaa !5
  store ptr %3, ptr %15, align 8, !tbaa !9
  store i32 %4, ptr %16, align 4, !tbaa !5
  store i32 %5, ptr %17, align 4, !tbaa !5
  store i32 %6, ptr %18, align 4, !tbaa !5
  store ptr %7, ptr %19, align 8, !tbaa !9
  store i32 %8, ptr %20, align 4, !tbaa !5
  store i32 %9, ptr %21, align 4, !tbaa !5
  %27 = load i32, ptr %12, align 4, !tbaa !5
  %28 = load i32, ptr %16, align 4, !tbaa !5
  %29 = icmp eq i32 %27, %28
  br i1 %29, label %30, label %48

30:                                               ; preds = %10
  %31 = load i32, ptr %12, align 4, !tbaa !5
  %32 = icmp eq i32 %31, 0
  br i1 %32, label %33, label %34

33:                                               ; preds = %30
  store i32 0, ptr %11, align 4
  br label %113

34:                                               ; preds = %30
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #7
  %35 = load i32, ptr %14, align 4, !tbaa !5
  %36 = load ptr, ptr %15, align 8, !tbaa !9
  %37 = load i32, ptr %18, align 4, !tbaa !5
  %38 = load ptr, ptr %19, align 8, !tbaa !9
  %39 = call noundef i32 @_ZN5sc_dt16vec_skip_and_cmpEiPKjiS1_(i32 noundef %35, ptr noundef %36, i32 noundef %37, ptr noundef %38)
  store i32 %39, ptr %22, align 4, !tbaa !5
  %40 = load i32, ptr %12, align 4, !tbaa !5
  %41 = icmp eq i32 %40, 1
  br i1 %41, label %42, label %44

42:                                               ; preds = %34
  %43 = load i32, ptr %22, align 4, !tbaa !5
  store i32 %43, ptr %11, align 4
  store i32 1, ptr %23, align 4
  br label %47

44:                                               ; preds = %34
  %45 = load i32, ptr %22, align 4, !tbaa !5
  %46 = sub nsw i32 0, %45
  store i32 %46, ptr %11, align 4
  store i32 1, ptr %23, align 4
  br label %47

47:                                               ; preds = %44, %42
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #7
  br label %113

48:                                               ; preds = %10
  %49 = load i32, ptr %12, align 4, !tbaa !5
  %50 = icmp eq i32 %49, 0
  br i1 %50, label %51, label %54

51:                                               ; preds = %48
  %52 = load i32, ptr %16, align 4, !tbaa !5
  %53 = sub nsw i32 0, %52
  store i32 %53, ptr %11, align 4
  br label %113

54:                                               ; preds = %48
  %55 = load i32, ptr %16, align 4, !tbaa !5
  %56 = icmp eq i32 %55, 0
  br i1 %56, label %57, label %59

57:                                               ; preds = %54
  %58 = load i32, ptr %12, align 4, !tbaa !5
  store i32 %58, ptr %11, align 4
  br label %113

59:                                               ; preds = %54
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #7
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #7
  %60 = load i32, ptr %12, align 4, !tbaa !5
  %61 = icmp eq i32 %60, -1
  br i1 %61, label %62, label %64

62:                                               ; preds = %59
  %63 = load i32, ptr %14, align 4, !tbaa !5
  br label %66

64:                                               ; preds = %59
  %65 = load i32, ptr %18, align 4, !tbaa !5
  br label %66

66:                                               ; preds = %64, %62
  %67 = phi i32 [ %63, %62 ], [ %65, %64 ]
  store i32 %67, ptr %25, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %26) #7
  %68 = load i32, ptr %25, align 4, !tbaa !5
  %69 = sext i32 %68 to i64
  %70 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %69, i64 4)
  %71 = extractvalue { i64, i1 } %70, 1
  %72 = extractvalue { i64, i1 } %70, 0
  %73 = select i1 %71, i64 -1, i64 %72
  %74 = call noalias noundef nonnull ptr @_Znam(i64 noundef %73) #8
  store ptr %74, ptr %26, align 8, !tbaa !9
  %75 = load i32, ptr %12, align 4, !tbaa !5
  %76 = icmp eq i32 %75, -1
  br i1 %76, label %77, label %92

77:                                               ; preds = %66
  %78 = load i32, ptr %25, align 4, !tbaa !5
  %79 = load ptr, ptr %26, align 8, !tbaa !9
  %80 = load ptr, ptr %15, align 8, !tbaa !9
  call void @_ZN5sc_dt8vec_copyEiPjPKj(i32 noundef %78, ptr noundef %79, ptr noundef %80)
  %81 = load i32, ptr %25, align 4, !tbaa !5
  %82 = load ptr, ptr %26, align 8, !tbaa !9
  call void @_ZN5sc_dt14vec_complementEiPj(i32 noundef %81, ptr noundef %82)
  %83 = load i32, ptr %20, align 4, !tbaa !5
  %84 = load i32, ptr %13, align 4, !tbaa !5
  %85 = load i32, ptr %25, align 4, !tbaa !5
  %86 = load ptr, ptr %26, align 8, !tbaa !9
  call void @_ZN5sc_dt4trimEiiiPj(i32 noundef %83, i32 noundef %84, i32 noundef %85, ptr noundef %86)
  %87 = load i32, ptr %25, align 4, !tbaa !5
  %88 = load ptr, ptr %26, align 8, !tbaa !9
  %89 = load i32, ptr %18, align 4, !tbaa !5
  %90 = load ptr, ptr %19, align 8, !tbaa !9
  %91 = call noundef i32 @_ZN5sc_dt16vec_skip_and_cmpEiPKjiS1_(i32 noundef %87, ptr noundef %88, i32 noundef %89, ptr noundef %90)
  store i32 %91, ptr %24, align 4, !tbaa !5
  br label %107

92:                                               ; preds = %66
  %93 = load i32, ptr %25, align 4, !tbaa !5
  %94 = load ptr, ptr %26, align 8, !tbaa !9
  %95 = load ptr, ptr %19, align 8, !tbaa !9
  call void @_ZN5sc_dt8vec_copyEiPjPKj(i32 noundef %93, ptr noundef %94, ptr noundef %95)
  %96 = load i32, ptr %25, align 4, !tbaa !5
  %97 = load ptr, ptr %26, align 8, !tbaa !9
  call void @_ZN5sc_dt14vec_complementEiPj(i32 noundef %96, ptr noundef %97)
  %98 = load i32, ptr %21, align 4, !tbaa !5
  %99 = load i32, ptr %17, align 4, !tbaa !5
  %100 = load i32, ptr %25, align 4, !tbaa !5
  %101 = load ptr, ptr %26, align 8, !tbaa !9
  call void @_ZN5sc_dt4trimEiiiPj(i32 noundef %98, i32 noundef %99, i32 noundef %100, ptr noundef %101)
  %102 = load i32, ptr %14, align 4, !tbaa !5
  %103 = load ptr, ptr %15, align 8, !tbaa !9
  %104 = load i32, ptr %25, align 4, !tbaa !5
  %105 = load ptr, ptr %26, align 8, !tbaa !9
  %106 = call noundef i32 @_ZN5sc_dt16vec_skip_and_cmpEiPKjiS1_(i32 noundef %102, ptr noundef %103, i32 noundef %104, ptr noundef %105)
  store i32 %106, ptr %24, align 4, !tbaa !5
  br label %107

107:                                              ; preds = %92, %77
  %108 = load ptr, ptr %26, align 8, !tbaa !9
  %109 = icmp eq ptr %108, null
  br i1 %109, label %111, label %110

110:                                              ; preds = %107
  call void @_ZdaPv(ptr noundef %108) #9
  br label %111

111:                                              ; preds = %110, %107
  %112 = load i32, ptr %24, align 4, !tbaa !5
  store i32 %112, ptr %11, align 4
  store i32 1, ptr %23, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %26) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #7
  br label %113

113:                                              ; preds = %111, %57, %51, %47, %33
  %114 = load i32, ptr %11, align 4
  ret i32 %114
}

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_ZN5sc_dt16vec_skip_and_cmpEiPKjiS1_(i32 noundef, ptr noundef, i32 noundef, ptr noundef) #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) #3

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt8vec_copyEiPjPKj(i32 noundef, ptr noundef, ptr noundef) #5

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt14vec_complementEiPj(i32 noundef, ptr noundef) #5

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dt4trimEiiiPj(i32 noundef, i32 noundef, i32 noundef, ptr noundef) #2

; Function Attrs: nobuiltin nounwind
declare void @_ZdaPv(ptr noundef) #6

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }
attributes #8 = { builtin allocsize(0) }
attributes #9 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN5sc_dt16compare_unsignedEiiiPKjiiiS1_ii(i32 noundef %0, i32 noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, ptr noundef %7, i32 noundef %8, i32 noundef %9) local_unnamed_addr #0 {
  %11 = icmp eq i32 %0, %4
  %12 = icmp eq i32 %0, 0
  br i1 %11, label %13, label %18

13:                                               ; preds = %10
  br i1 %12, label %36, label %14

14:                                               ; preds = %13
  %15 = tail call noundef i32 @_ZN5sc_dt16vec_skip_and_cmpEiPKjiS1_(i32 noundef %2, ptr noundef %3, i32 noundef %6, ptr noundef %7)
  %16 = icmp eq i32 %0, 1
  %17 = sub nsw i32 0, %15
  %.0 = select i1 %16, i32 %15, i32 %17
  br label %36

18:                                               ; preds = %10
  br i1 %12, label %19, label %21

19:                                               ; preds = %18
  %20 = sub nsw i32 0, %4
  br label %36

21:                                               ; preds = %18
  %22 = icmp eq i32 %4, 0
  br i1 %22, label %36, label %23

23:                                               ; preds = %21
  %24 = icmp eq i32 %0, -1
  %25 = select i1 %24, i32 %2, i32 %6
  %26 = zext nneg i32 %25 to i64
  %27 = icmp slt i32 %25, 0
  %28 = shl nuw nsw i64 %26, 2
  %29 = select i1 %27, i64 -1, i64 %28
  %30 = tail call noalias noundef nonnull ptr @_Znam(i64 noundef %29) #5
  br i1 %24, label %31, label %33

31:                                               ; preds = %23
  tail call void @_ZN5sc_dt8vec_copyEiPjPKj(i32 noundef %2, ptr noundef nonnull %30, ptr noundef %3)
  tail call void @_ZN5sc_dt14vec_complementEiPj(i32 noundef %2, ptr noundef nonnull %30)
  tail call void @_ZN5sc_dt4trimEiiiPj(i32 noundef %8, i32 noundef %1, i32 noundef %2, ptr noundef nonnull %30)
  %32 = tail call noundef i32 @_ZN5sc_dt16vec_skip_and_cmpEiPKjiS1_(i32 noundef %2, ptr noundef nonnull %30, i32 noundef %6, ptr noundef %7)
  br label %35

33:                                               ; preds = %23
  tail call void @_ZN5sc_dt8vec_copyEiPjPKj(i32 noundef %6, ptr noundef nonnull %30, ptr noundef %7)
  tail call void @_ZN5sc_dt14vec_complementEiPj(i32 noundef %6, ptr noundef nonnull %30)
  tail call void @_ZN5sc_dt4trimEiiiPj(i32 noundef %9, i32 noundef %5, i32 noundef %6, ptr noundef nonnull %30)
  %34 = tail call noundef i32 @_ZN5sc_dt16vec_skip_and_cmpEiPKjiS1_(i32 noundef %2, ptr noundef %3, i32 noundef %6, ptr noundef nonnull %30)
  br label %35

35:                                               ; preds = %31, %33
  %.047 = phi i32 [ %32, %31 ], [ %34, %33 ]
  tail call void @_ZdaPv(ptr noundef nonnull %30) #6
  br label %36

36:                                               ; preds = %21, %13, %35, %19, %14
  %.1 = phi i32 [ %.0, %14 ], [ %20, %19 ], [ %.047, %35 ], [ 0, %13 ], [ %0, %21 ]
  ret i32 %.1
}

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_ZN5sc_dt16vec_skip_and_cmpEiPKjiS1_(i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt8vec_copyEiPjPKj(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt14vec_complementEiPj(i32 noundef, ptr noundef) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dt4trimEiiiPj(i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: nobuiltin nounwind
declare void @_ZdaPv(ptr noundef) local_unnamed_addr #4

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { builtin allocsize(0) }
attributes #6 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass