; LLVM IR from gem5/gem5 :: src/systemc/tests/systemc/misc/synth/combo/switch4/switch4.ll (Z6selectiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::sc_signed" = type { %"class.sc_dt::sc_value_base", i32, i32, i32, ptr }
%"class.sc_dt::sc_value_base" = type { ptr }

; Function Attrs: mustprogress uwtable
define dso_local noundef signext i16 @_Z6selectiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) #0 personality ptr @__gxx_personality_v0 {
  %4 = alloca i16, align 2
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca %"class.sc_dt::sc_signed", align 8
  %9 = alloca %"class.sc_dt::sc_signed", align 8
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca %"class.sc_dt::sc_signed", align 8
  store i32 %0, ptr %5, align 4, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 32, ptr %8) #5
  call void @_ZN5sc_dt9sc_signedC1Ei(ptr noundef nonnull align 8 dereferenceable(32) %8, i32 noundef 7)
  call void @llvm.lifetime.start.p0(i64 32, ptr %9) #5
  invoke void @_ZN5sc_dt9sc_signedC1Ei(ptr noundef nonnull align 8 dereferenceable(32) %9, i32 noundef 9)
          to label %14 unwind label %18

14:                                               ; preds = %3
  %15 = load i32, ptr %7, align 4, !tbaa !5
  %16 = ashr i32 %15, 2
  %17 = and i32 %16, 3
  switch i32 %17, label %60 [
    i32 0, label %22
    i32 1, label %35
    i32 2, label %41
    i32 3, label %52
  ]

18:                                               ; preds = %3
  %19 = landingpad { ptr, i32 }
          cleanup
  %20 = extractvalue { ptr, i32 } %19, 0
  store ptr %20, ptr %10, align 8
  %21 = extractvalue { ptr, i32 } %19, 1
  store i32 %21, ptr %11, align 4
  br label %79

22:                                               ; preds = %14
  %23 = load i32, ptr %5, align 4, !tbaa !5
  %24 = load i32, ptr %6, align 4, !tbaa !5
  %25 = add nsw i32 %23, %24
  %26 = invoke noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt9sc_signedaSEi(ptr noundef nonnull align 8 dereferenceable(32) %8, i32 noundef %25)
          to label %27 unwind label %31

27:                                               ; preds = %22
  %28 = invoke noundef i32 @_ZNK5sc_dt9sc_signed6to_intEv(ptr noundef nonnull align 8 dereferenceable(32) %8)
          to label %29 unwind label %31

29:                                               ; preds = %27
  %30 = trunc i32 %28 to i16
  store i16 %30, ptr %4, align 2
  store i32 1, ptr %12, align 4
  br label %76

31:                                               ; preds = %63, %52, %48, %41, %35, %27, %22
  %32 = landingpad { ptr, i32 }
          cleanup
  %33 = extractvalue { ptr, i32 } %32, 0
  store ptr %33, ptr %10, align 8
  %34 = extractvalue { ptr, i32 } %32, 1
  store i32 %34, ptr %11, align 4
  br label %78

35:                                               ; preds = %14
  %36 = load i32, ptr %5, align 4, !tbaa !5
  %37 = load i32, ptr %6, align 4, !tbaa !5
  %38 = sub nsw i32 %36, %37
  %39 = invoke noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt9sc_signedaSEi(ptr noundef nonnull align 8 dereferenceable(32) %8, i32 noundef %38)
          to label %40 unwind label %31

40:                                               ; preds = %35
  br label %60

41:                                               ; preds = %14
  %42 = load i32, ptr %5, align 4, !tbaa !5
  %43 = ashr i32 %42, 16
  %44 = load i32, ptr %6, align 4, !tbaa !5
  %45 = shl i32 %44, 16
  %46 = add nsw i32 %43, %45
  %47 = invoke noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt9sc_signedaSEi(ptr noundef nonnull align 8 dereferenceable(32) %8, i32 noundef %46)
          to label %48 unwind label %31

48:                                               ; preds = %41
  %49 = invoke noundef i32 @_ZNK5sc_dt9sc_signed6to_intEv(ptr noundef nonnull align 8 dereferenceable(32) %8)
          to label %50 unwind label %31

50:                                               ; preds = %48
  %51 = trunc i32 %49 to i16
  store i16 %51, ptr %4, align 2
  store i32 1, ptr %12, align 4
  br label %76

52:                                               ; preds = %14
  %53 = load i32, ptr %5, align 4, !tbaa !5
  %54 = shl i32 %53, 16
  %55 = load i32, ptr %6, align 4, !tbaa !5
  %56 = ashr i32 %55, 16
  %57 = sub nsw i32 %54, %56
  %58 = invoke noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt9sc_signedaSEi(ptr noundef nonnull align 8 dereferenceable(32) %8, i32 noundef %57)
          to label %59 unwind label %31

59:                                               ; preds = %52
  br label %60

60:                                               ; preds = %59, %40, %14
  call void @llvm.lifetime.start.p0(i64 32, ptr %13) #5
  invoke void @_ZN5sc_dtmlEiRKNS_9sc_signedE(ptr dead_on_unwind writable sret(%"class.sc_dt::sc_signed") align 8 %13, i32 noundef 2, ptr noundef nonnull align 8 dereferenceable(32) %8)
          to label %61 unwind label %67

61:                                               ; preds = %60
  %62 = invoke noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt9sc_signedaSERKS0_(ptr noundef nonnull align 8 dereferenceable(32) %9, ptr noundef nonnull align 8 dereferenceable(32) %13)
          to label %63 unwind label %71

63:                                               ; preds = %61
  call void @_ZN5sc_dt9sc_signedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %13) #5
  call void @llvm.lifetime.end.p0(i64 32, ptr %13) #5
  %64 = invoke noundef i32 @_ZNK5sc_dt9sc_signed6to_intEv(ptr noundef nonnull align 8 dereferenceable(32) %9)
          to label %65 unwind label %31

65:                                               ; preds = %63
  %66 = trunc i32 %64 to i16
  store i16 %66, ptr %4, align 2
  store i32 1, ptr %12, align 4
  br label %76

67:                                               ; preds = %60
  %68 = landingpad { ptr, i32 }
          cleanup
  %69 = extractvalue { ptr, i32 } %68, 0
  store ptr %69, ptr %10, align 8
  %70 = extractvalue { ptr, i32 } %68, 1
  store i32 %70, ptr %11, align 4
  br label %75

71:                                               ; preds = %61
  %72 = landingpad { ptr, i32 }
          cleanup
  %73 = extractvalue { ptr, i32 } %72, 0
  store ptr %73, ptr %10, align 8
  %74 = extractvalue { ptr, i32 } %72, 1
  store i32 %74, ptr %11, align 4
  call void @_ZN5sc_dt9sc_signedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %13) #5
  br label %75

75:                                               ; preds = %71, %67
  call void @llvm.lifetime.end.p0(i64 32, ptr %13) #5
  br label %78

76:                                               ; preds = %65, %50, %29
  call void @_ZN5sc_dt9sc_signedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %9) #5
  call void @llvm.lifetime.end.p0(i64 32, ptr %9) #5
  call void @_ZN5sc_dt9sc_signedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %8) #5
  call void @llvm.lifetime.end.p0(i64 32, ptr %8) #5
  %77 = load i16, ptr %4, align 2
  ret i16 %77

78:                                               ; preds = %75, %31
  call void @_ZN5sc_dt9sc_signedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %9) #5
  br label %79

79:                                               ; preds = %78, %18
  call void @llvm.lifetime.end.p0(i64 32, ptr %9) #5
  call void @_ZN5sc_dt9sc_signedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %8) #5
  call void @llvm.lifetime.end.p0(i64 32, ptr %8) #5
  br label %80

80:                                               ; preds = %79
  %81 = load ptr, ptr %10, align 8
  %82 = load i32, ptr %11, align 4
  %83 = insertvalue { ptr, i32 } poison, ptr %81, 0
  %84 = insertvalue { ptr, i32 } %83, i32 %82, 1
  resume { ptr, i32 } %84
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @_ZN5sc_dt9sc_signedC1Ei(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) unnamed_addr #2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt9sc_signedaSEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) #0 align 2

declare noundef i32 @_ZNK5sc_dt9sc_signed6to_intEv(ptr noundef nonnull align 8 dereferenceable(32)) #2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dtmlEiRKNS_9sc_signedE(ptr dead_on_unwind noalias writable sret(%"class.sc_dt::sc_signed") align 8, i32 noundef, ptr noundef nonnull align 8 dereferenceable(32)) #3

declare noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt9sc_signedaSERKS0_(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef nonnull align 8 dereferenceable(32)) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt9sc_signedD2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #4 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::sc_signed" = type { %"class.sc_dt::sc_value_base", i32, i32, i32, ptr }
%"class.sc_dt::sc_value_base" = type { ptr }

; Function Attrs: mustprogress uwtable
define dso_local noundef signext i16 @_Z6selectiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 personality ptr @__gxx_personality_v0 {
  %4 = alloca %"class.sc_dt::sc_signed", align 8
  %5 = alloca %"class.sc_dt::sc_signed", align 8
  %6 = alloca %"class.sc_dt::sc_signed", align 8
  call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %4) #5
  call void @_ZN5sc_dt9sc_signedC1Ei(ptr noundef nonnull align 8 dereferenceable(32) %4, i32 noundef 7)
  call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %5) #5
  invoke void @_ZN5sc_dt9sc_signedC1Ei(ptr noundef nonnull align 8 dereferenceable(32) %5, i32 noundef 9)
          to label %7 unwind label %10

7:                                                ; preds = %3
  %8 = lshr i32 %2, 2
  %9 = and i32 %8, 3
  switch i32 %9, label %default.unreachable19 [
    i32 0, label %12
    i32 1, label %16
    i32 2, label %18
    i32 3, label %24
  ]

10:                                               ; preds = %3
  %11 = landingpad { ptr, i32 }
          cleanup
  br label %43

12:                                               ; preds = %7
  %13 = add nsw i32 %1, %0
  br label %.invoke21

14:                                               ; preds = %.invoke21, %.invoke20, %.invoke
  %15 = landingpad { ptr, i32 }
          cleanup
  br label %42

16:                                               ; preds = %7
  %17 = sub nsw i32 %0, %1
  br label %.invoke20

18:                                               ; preds = %7
  %19 = ashr i32 %0, 16
  %20 = shl i32 %1, 16
  %21 = add nsw i32 %20, %19
  br label %.invoke21

.invoke21:                                        ; preds = %12, %18
  %22 = phi i32 [ %21, %18 ], [ %13, %12 ]
  %23 = invoke noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt9sc_signedaSEi(ptr noundef nonnull align 8 dereferenceable(32) %4, i32 noundef %22)
          to label %.invoke unwind label %14

24:                                               ; preds = %7
  %25 = shl i32 %0, 16
  %26 = ashr i32 %1, 16
  %27 = sub nsw i32 %25, %26
  br label %.invoke20

.invoke20:                                        ; preds = %16, %24
  %28 = phi i32 [ %27, %24 ], [ %17, %16 ]
  %29 = invoke noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt9sc_signedaSEi(ptr noundef nonnull align 8 dereferenceable(32) %4, i32 noundef %28)
          to label %30 unwind label %14

default.unreachable19:                            ; preds = %7
  unreachable

30:                                               ; preds = %.invoke20
  call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %6) #5
  invoke void @_ZN5sc_dtmlEiRKNS_9sc_signedE(ptr dead_on_unwind nonnull writable sret(%"class.sc_dt::sc_signed") align 8 %6, i32 noundef 2, ptr noundef nonnull align 8 dereferenceable(32) %4)
          to label %31 unwind label %36

31:                                               ; preds = %30
  %32 = invoke noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt9sc_signedaSERKS0_(ptr noundef nonnull align 8 dereferenceable(32) %5, ptr noundef nonnull align 8 dereferenceable(32) %6)
          to label %33 unwind label %38

33:                                               ; preds = %31
  call void @_ZN5sc_dt9sc_signedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %6) #5
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %6) #5
  br label %.invoke

.invoke:                                          ; preds = %.invoke21, %33
  %34 = phi ptr [ %5, %33 ], [ %4, %.invoke21 ]
  %35 = invoke noundef i32 @_ZNK5sc_dt9sc_signed6to_intEv(ptr noundef nonnull align 8 dereferenceable(32) %34)
          to label %41 unwind label %14

36:                                               ; preds = %30
  %37 = landingpad { ptr, i32 }
          cleanup
  br label %40

38:                                               ; preds = %31
  %39 = landingpad { ptr, i32 }
          cleanup
  call void @_ZN5sc_dt9sc_signedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %6) #5
  br label %40

40:                                               ; preds = %38, %36
  %.pn = phi { ptr, i32 } [ %39, %38 ], [ %37, %36 ]
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %6) #5
  br label %42

41:                                               ; preds = %.invoke
  %.014 = trunc i32 %35 to i16
  call void @_ZN5sc_dt9sc_signedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %5) #5
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %5) #5
  call void @_ZN5sc_dt9sc_signedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %4) #5
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %4) #5
  ret i16 %.014

42:                                               ; preds = %40, %14
  %.pn16 = phi { ptr, i32 } [ %15, %14 ], [ %.pn, %40 ]
  call void @_ZN5sc_dt9sc_signedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %5) #5
  br label %43

43:                                               ; preds = %42, %10
  %.pn16.pn = phi { ptr, i32 } [ %.pn16, %42 ], [ %11, %10 ]
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %5) #5
  call void @_ZN5sc_dt9sc_signedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %4) #5
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %4) #5
  resume { ptr, i32 } %.pn16.pn
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @_ZN5sc_dt9sc_signedC1Ei(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) unnamed_addr #2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt9sc_signedaSEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) local_unnamed_addr #0 align 2

declare noundef i32 @_ZNK5sc_dt9sc_signed6to_intEv(ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dtmlEiRKNS_9sc_signedE(ptr dead_on_unwind noalias writable sret(%"class.sc_dt::sc_signed") align 8, i32 noundef, ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #3

declare noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt9sc_signedaSERKS0_(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt9sc_signedD2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #4 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass