; LLVM IR from gem5/gem5 :: ext/mcpat/logic.ll (ZN18InstructionDecoderD2Ev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.InstructionDecoder = type { %class.McPATComponent, ptr, ptr, i8, i32, i32, i8, i32, i32, %class.InputParameter, %class.uca_org_t, i32, i32, %class.statsDef }
%class.McPATComponent = type { ptr, %class.Component, ptr, %class.InputParameter, %"class.std::__cxx11::basic_string", double, %"class.std::vector", %class.McPATOutput, %class.statsDef, %class.statsDef, %class.powerDef, %class.powerDef }
%class.Component = type { %class.Area, %class.powerDef, %class.powerDef, double, double }
%class.Area = type { double, double, double }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<McPATComponent *, std::allocator<McPATComponent *>>::_Vector_impl" }
%"struct.std::_Vector_base<McPATComponent *, std::allocator<McPATComponent *>>::_Vector_impl" = type { %"struct.std::_Vector_base<McPATComponent *, std::allocator<McPATComponent *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<McPATComponent *, std::allocator<McPATComponent *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.McPATOutput = type { double, double, double, double, double, double }
%class.powerDef = type { %class.powerComponents, %class.powerComponents, %class.powerComponents }
%class.powerComponents = type { double, double, double, double, double }
%class.InputParameter = type { i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, i32, double, double, i32, i32, i32, i32, i32, i8, i8, i8, i8, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i8, i8, i32, i32, i8, double, double, i8, i32, i32, i8 }
%class.uca_org_t = type { ptr, ptr, double, double, double, double, %class.powerDef, double, double, double, [100 x i8], double, i8, %struct.results_mem_array, %struct.results_mem_array }
%struct.results_mem_array = type { i32, i32, double, i32, i32, i32, i32, i32, i32, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double }
%class.statsDef = type { %class.statsComponents, %class.statsComponents, %class.statsComponents, %class.statsComponents, %class.statsComponents, %class.statsComponents, %class.statsComponents }
%class.statsComponents = type { double, double, double }
%class.Predec = type { %class.Component, ptr, ptr, ptr, ptr, %class.powerDef, %class.powerDef }

@_ZTV18InstructionDecoder = external dso_local unnamed_addr constant { [6 x ptr] }, align 8

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN9uca_org_tD2Ev(ptr noundef nonnull align 8 dereferenceable(8200)) unnamed_addr #0 align 2

; Function Attrs: nounwind
declare void @_ZN14McPATComponentD2Ev(ptr noundef nonnull align 8 dereferenceable(1352)) unnamed_addr #1

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) #2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN18InstructionDecoderD2Ev(ptr noundef nonnull align 8 dereferenceable(10136) %0) unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  %2 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %3 = load ptr, ptr %2, align 8
  store ptr getelementptr inbounds inrange(-16, 32) ({ [6 x ptr] }, ptr @_ZTV18InstructionDecoder, i32 0, i32 0, i32 2), ptr %3, align 8, !tbaa !9
  %4 = getelementptr inbounds %class.InstructionDecoder, ptr %3, i32 0, i32 10
  invoke void @_ZN9uca_org_t7cleanupEv(ptr noundef nonnull align 8 dereferenceable(8200) %4)
          to label %5 unwind label %45

5:                                                ; preds = %1
  %6 = getelementptr inbounds %class.InstructionDecoder, ptr %3, i32 0, i32 1
  %7 = load ptr, ptr %6, align 8, !tbaa !11
  %8 = icmp eq ptr %7, null
  br i1 %8, label %10, label %9

9:                                                ; preds = %5
  call void @_ZN9ComponentD2Ev(ptr noundef nonnull align 8 dereferenceable(656) %7) #5
  call void @_ZdlPvm(ptr noundef %7, i64 noundef 656) #6
  br label %10

10:                                               ; preds = %9, %5
  %11 = getelementptr inbounds %class.InstructionDecoder, ptr %3, i32 0, i32 2
  %12 = load ptr, ptr %11, align 8, !tbaa !37
  %13 = getelementptr inbounds %class.Predec, ptr %12, i32 0, i32 1
  %14 = load ptr, ptr %13, align 8, !tbaa !38
  %15 = icmp eq ptr %14, null
  br i1 %15, label %17, label %16

16:                                               ; preds = %10
  call void @_ZN9ComponentD2Ev(ptr noundef nonnull align 8 dereferenceable(1697) %14) #5
  call void @_ZdlPvm(ptr noundef %14, i64 noundef 1704) #6
  br label %17

17:                                               ; preds = %16, %10
  %18 = getelementptr inbounds %class.InstructionDecoder, ptr %3, i32 0, i32 2
  %19 = load ptr, ptr %18, align 8, !tbaa !37
  %20 = getelementptr inbounds %class.Predec, ptr %19, i32 0, i32 2
  %21 = load ptr, ptr %20, align 8, !tbaa !40
  %22 = icmp eq ptr %21, null
  br i1 %22, label %24, label %23

23:                                               ; preds = %17
  call void @_ZN9ComponentD2Ev(ptr noundef nonnull align 8 dereferenceable(1697) %21) #5
  call void @_ZdlPvm(ptr noundef %21, i64 noundef 1704) #6
  br label %24

24:                                               ; preds = %23, %17
  %25 = getelementptr inbounds %class.InstructionDecoder, ptr %3, i32 0, i32 2
  %26 = load ptr, ptr %25, align 8, !tbaa !37
  %27 = getelementptr inbounds %class.Predec, ptr %26, i32 0, i32 3
  %28 = load ptr, ptr %27, align 8, !tbaa !41
  %29 = icmp eq ptr %28, null
  br i1 %29, label %31, label %30

30:                                               ; preds = %24
  call void @_ZN9ComponentD2Ev(ptr noundef nonnull align 8 dereferenceable(1280) %28) #5
  call void @_ZdlPvm(ptr noundef %28, i64 noundef 1280) #6
  br label %31

31:                                               ; preds = %30, %24
  %32 = getelementptr inbounds %class.InstructionDecoder, ptr %3, i32 0, i32 2
  %33 = load ptr, ptr %32, align 8, !tbaa !37
  %34 = getelementptr inbounds %class.Predec, ptr %33, i32 0, i32 4
  %35 = load ptr, ptr %34, align 8, !tbaa !42
  %36 = icmp eq ptr %35, null
  br i1 %36, label %38, label %37

37:                                               ; preds = %31
  call void @_ZN9ComponentD2Ev(ptr noundef nonnull align 8 dereferenceable(1280) %35) #5
  call void @_ZdlPvm(ptr noundef %35, i64 noundef 1280) #6
  br label %38

38:                                               ; preds = %37, %31
  %39 = getelementptr inbounds %class.InstructionDecoder, ptr %3, i32 0, i32 2
  %40 = load ptr, ptr %39, align 8, !tbaa !37
  %41 = icmp eq ptr %40, null
  br i1 %41, label %43, label %42

42:                                               ; preds = %38
  call void @_ZN9ComponentD2Ev(ptr noundef nonnull align 8 dereferenceable(552) %40) #5
  call void @_ZdlPvm(ptr noundef %40, i64 noundef 552) #6
  br label %43

43:                                               ; preds = %42, %38
  %44 = getelementptr inbounds %class.InstructionDecoder, ptr %3, i32 0, i32 10
  call void @_ZN9uca_org_tD2Ev(ptr noundef nonnull align 8 dereferenceable(8200) %44) #5
  call void @_ZN14McPATComponentD2Ev(ptr noundef nonnull align 8 dereferenceable(1352) %3) #5
  ret void

45:                                               ; preds = %1
  %46 = landingpad { ptr, i32 }
          catch ptr null
  %47 = extractvalue { ptr, i32 } %46, 0
  call void @__clang_call_terminate(ptr %47) #7
  unreachable
}

declare void @_ZN9uca_org_t7cleanupEv(ptr noundef nonnull align 8 dereferenceable(8200)) #3

; Function Attrs: noinline noreturn nounwind uwtable
declare hidden void @__clang_call_terminate(ptr noundef) #4

; Function Attrs: nounwind
declare void @_ZN9ComponentD2Ev(ptr noundef nonnull align 8 dereferenceable(280)) unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { noinline noreturn nounwind uwtable "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { builtin nounwind }
attributes #7 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"vtable pointer", !8, i64 0}
!11 = !{!12, !6, i64 1352}
!12 = !{!"_ZTS18InstructionDecoder", !13, i64 0, !6, i64 1352, !6, i64 1360, !21, i64 1368, !20, i64 1372, !20, i64 1376, !21, i64 1380, !20, i64 1384, !20, i64 1388, !19, i64 1392, !33, i64 1760, !35, i64 9960, !36, i64 9964, !31, i64 9968}
!13 = !{!"_ZTS14McPATComponent", !14, i64 8, !6, i64 288, !19, i64 296, !23, i64 664, !16, i64 696, !26, i64 704, !30, i64 728, !31, i64 776, !31, i64 944, !17, i64 1112, !17, i64 1232}
!14 = !{!"_ZTS9Component", !15, i64 0, !17, i64 24, !17, i64 144, !16, i64 264, !16, i64 272}
!15 = !{!"_ZTS4Area", !16, i64 0, !16, i64 8, !16, i64 16}
!16 = !{!"double", !7, i64 0}
!17 = !{!"_ZTS8powerDef", !18, i64 0, !18, i64 40, !18, i64 80}
!18 = !{!"_ZTS15powerComponents", !16, i64 0, !16, i64 8, !16, i64 16, !16, i64 24, !16, i64 32}
!19 = !{!"_ZTS14InputParameter", !20, i64 0, !20, i64 4, !20, i64 8, !20, i64 12, !20, i64 16, !21, i64 20, !20, i64 24, !20, i64 28, !20, i64 32, !20, i64 36, !20, i64 40, !20, i64 44, !16, i64 48, !16, i64 56, !20, i64 64, !20, i64 68, !20, i64 72, !20, i64 76, !20, i64 80, !21, i64 84, !21, i64 85, !21, i64 86, !21, i64 87, !21, i64 88, !20, i64 92, !20, i64 96, !20, i64 100, !20, i64 104, !20, i64 108, !20, i64 112, !20, i64 116, !20, i64 120, !20, i64 124, !20, i64 128, !20, i64 132, !20, i64 136, !20, i64 140, !20, i64 144, !20, i64 148, !22, i64 152, !20, i64 156, !21, i64 160, !20, i64 164, !20, i64 168, !20, i64 172, !20, i64 176, !20, i64 180, !20, i64 184, !20, i64 188, !21, i64 192, !20, i64 196, !20, i64 200, !20, i64 204, !20, i64 208, !20, i64 212, !20, i64 216, !20, i64 220, !20, i64 224, !20, i64 228, !20, i64 232, !20, i64 236, !20, i64 240, !20, i64 244, !20, i64 248, !20, i64 252, !20, i64 256, !20, i64 260, !20, i64 264, !20, i64 268, !20, i64 272, !20, i64 276, !20, i64 280, !20, i64 284, !20, i64 288, !20, i64 292, !20, i64 296, !21, i64 300, !20, i64 304, !20, i64 308, !20, i64 312, !21, i64 316, !21, i64 317, !20, i64 320, !20, i64 324, !21, i64 328, !16, i64 336, !16, i64 344, !21, i64 352, !20, i64 356, !20, i64 360, !21, i64 364}
!20 = !{!"int", !7, i64 0}
!21 = !{!"bool", !7, i64 0}
!22 = !{!"_ZTS9Wire_type", !7, i64 0}
!23 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !24, i64 0, !25, i64 8, !7, i64 16}
!24 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!25 = !{!"long", !7, i64 0}
!26 = !{!"_ZTSSt6vectorIP14McPATComponentSaIS1_EE", !27, i64 0}
!27 = !{!"_ZTSSt12_Vector_baseIP14McPATComponentSaIS1_EE", !28, i64 0}
!28 = !{!"_ZTSNSt12_Vector_baseIP14McPATComponentSaIS1_EE12_Vector_implE", !29, i64 0}
!29 = !{!"_ZTSNSt12_Vector_baseIP14McPATComponentSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!30 = !{!"_ZTS11McPATOutput", !16, i64 0, !16, i64 8, !16, i64 16, !16, i64 24, !16, i64 32, !16, i64 40}
!31 = !{!"_ZTS8statsDef", !32, i64 0, !32, i64 24, !32, i64 48, !32, i64 72, !32, i64 96, !32, i64 120, !32, i64 144}
!32 = !{!"_ZTS15statsComponents", !16, i64 0, !16, i64 8, !16, i64 16}
!33 = !{!"_ZTS9uca_org_t", !6, i64 0, !6, i64 8, !16, i64 16, !16, i64 24, !16, i64 32, !16, i64 40, !17, i64 48, !16, i64 168, !16, i64 176, !16, i64 184, !7, i64 192, !16, i64 296, !21, i64 304, !34, i64 312, !34, i64 4256}
!34 = !{!"_ZTS17results_mem_array", !20, i64 0, !20, i64 4, !16, i64 8, !20, i64 16, !20, i64 20, !20, i64 24, !20, i64 28, !20, i64 32, !20, i64 36, !16, i64 40, !16, i64 48, !16, i64 56, !16, i64 64, !16, i64 72, !16, i64 80, !16, i64 88, !16, i64 96, !16, i64 104, !16, i64 112, !16, i64 120, !16, i64 128, !16, i64 136, !16, i64 144, !16, i64 152, !16, i64 160, !16, i64 168, !16, i64 176, !16, i64 184, !16, i64 192, !16, i64 200, !16, i64 208, !16, i64 216, !16, i64 224, !16, i64 232, !16, i64 240, !16, i64 248, !16, i64 256, !16, i64 264, !17, i64 272, !17, i64 392, !17, i64 512, !17, i64 632, !17, i64 752, !17, i64 872, !17, i64 992, !17, i64 1112, !17, i64 1232, !17, i64 1352, !17, i64 1472, !17, i64 1592, !17, i64 1712, !17, i64 1832, !17, i64 1952, !17, i64 2072, !17, i64 2192, !17, i64 2312, !17, i64 2432, !17, i64 2552, !17, i64 2672, !17, i64 2792, !17, i64 2912, !17, i64 3032, !17, i64 3152, !17, i64 3272, !17, i64 3392, !17, i64 3512, !17, i64 3632, !16, i64 3752, !16, i64 3760, !16, i64 3768, !16, i64 3776, !16, i64 3784, !16, i64 3792, !16, i64 3800, !16, i64 3808, !16, i64 3816, !16, i64 3824, !16, i64 3832, !16, i64 3840, !16, i64 3848, !16, i64 3856, !16, i64 3864, !16, i64 3872, !16, i64 3880, !16, i64 3888, !16, i64 3896, !16, i64 3904, !16, i64 3912, !16, i64 3920, !16, i64 3928, !16, i64 3936}
!35 = !{!"_ZTS9Device_ty", !7, i64 0}
!36 = !{!"_ZTS9Core_type", !7, i64 0}
!37 = !{!12, !6, i64 1360}
!38 = !{!39, !6, i64 280}
!39 = !{!"_ZTS6Predec", !14, i64 0, !6, i64 280, !6, i64 288, !6, i64 296, !6, i64 304, !17, i64 312, !17, i64 432}
!40 = !{!39, !6, i64 288}
!41 = !{!39, !6, i64 296}
!42 = !{!39, !6, i64 304}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZTV18InstructionDecoder = external dso_local unnamed_addr constant { [6 x ptr] }, align 8

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN9uca_org_tD2Ev(ptr noundef nonnull align 8 dereferenceable(8200)) unnamed_addr #0 align 2

; Function Attrs: nounwind
declare void @_ZN14McPATComponentD2Ev(ptr noundef nonnull align 8 dereferenceable(1352)) unnamed_addr #1

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN18InstructionDecoderD2Ev(ptr noundef nonnull align 8 dereferenceable(10136) %0) unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  store ptr getelementptr inbounds inrange(-16, 32) (i8, ptr @_ZTV18InstructionDecoder, i64 16), ptr %0, align 8, !tbaa !5
  %2 = getelementptr inbounds i8, ptr %0, i64 1760
  invoke void @_ZN9uca_org_t7cleanupEv(ptr noundef nonnull align 8 dereferenceable(8200) %2)
          to label %3 unwind label %36

3:                                                ; preds = %1
  %4 = getelementptr inbounds i8, ptr %0, i64 1352
  %5 = load ptr, ptr %4, align 8, !tbaa !8
  %6 = icmp eq ptr %5, null
  br i1 %6, label %8, label %7

7:                                                ; preds = %3
  tail call void @_ZN9ComponentD2Ev(ptr noundef nonnull align 8 dereferenceable(656) %5) #5
  tail call void @_ZdlPvm(ptr noundef nonnull %5, i64 noundef 656) #6
  br label %8

8:                                                ; preds = %7, %3
  %9 = getelementptr inbounds i8, ptr %0, i64 1360
  %10 = load ptr, ptr %9, align 8, !tbaa !36
  %11 = getelementptr inbounds i8, ptr %10, i64 280
  %12 = load ptr, ptr %11, align 8, !tbaa !37
  %13 = icmp eq ptr %12, null
  br i1 %13, label %15, label %14

14:                                               ; preds = %8
  tail call void @_ZN9ComponentD2Ev(ptr noundef nonnull align 8 dereferenceable(1697) %12) #5
  tail call void @_ZdlPvm(ptr noundef nonnull %12, i64 noundef 1704) #6
  %.pre = load ptr, ptr %9, align 8, !tbaa !36
  br label %15

15:                                               ; preds = %14, %8
  %16 = phi ptr [ %.pre, %14 ], [ %10, %8 ]
  %17 = getelementptr inbounds i8, ptr %16, i64 288
  %18 = load ptr, ptr %17, align 8, !tbaa !39
  %19 = icmp eq ptr %18, null
  br i1 %19, label %21, label %20

20:                                               ; preds = %15
  tail call void @_ZN9ComponentD2Ev(ptr noundef nonnull align 8 dereferenceable(1697) %18) #5
  tail call void @_ZdlPvm(ptr noundef nonnull %18, i64 noundef 1704) #6
  %.pre6 = load ptr, ptr %9, align 8, !tbaa !36
  br label %21

21:                                               ; preds = %20, %15
  %22 = phi ptr [ %.pre6, %20 ], [ %16, %15 ]
  %23 = getelementptr inbounds i8, ptr %22, i64 296
  %24 = load ptr, ptr %23, align 8, !tbaa !40
  %25 = icmp eq ptr %24, null
  br i1 %25, label %27, label %26

26:                                               ; preds = %21
  tail call void @_ZN9ComponentD2Ev(ptr noundef nonnull align 8 dereferenceable(1280) %24) #5
  tail call void @_ZdlPvm(ptr noundef nonnull %24, i64 noundef 1280) #6
  %.pre7 = load ptr, ptr %9, align 8, !tbaa !36
  br label %27

27:                                               ; preds = %26, %21
  %28 = phi ptr [ %.pre7, %26 ], [ %22, %21 ]
  %29 = getelementptr inbounds i8, ptr %28, i64 304
  %30 = load ptr, ptr %29, align 8, !tbaa !41
  %31 = icmp eq ptr %30, null
  br i1 %31, label %.thread, label %32

32:                                               ; preds = %27
  tail call void @_ZN9ComponentD2Ev(ptr noundef nonnull align 8 dereferenceable(1280) %30) #5
  tail call void @_ZdlPvm(ptr noundef nonnull %30, i64 noundef 1280) #6
  %.pr = load ptr, ptr %9, align 8, !tbaa !36
  %33 = icmp eq ptr %.pr, null
  br i1 %33, label %35, label %.thread

.thread:                                          ; preds = %27, %32
  %34 = phi ptr [ %.pr, %32 ], [ %28, %27 ]
  tail call void @_ZN9ComponentD2Ev(ptr noundef nonnull align 8 dereferenceable(552) %34) #5
  tail call void @_ZdlPvm(ptr noundef nonnull %34, i64 noundef 552) #6
  br label %35

35:                                               ; preds = %.thread, %32
  tail call void @_ZN9uca_org_tD2Ev(ptr noundef nonnull align 8 dereferenceable(8200) %2) #5
  tail call void @_ZN14McPATComponentD2Ev(ptr noundef nonnull align 8 dereferenceable(1352) %0) #5
  ret void

36:                                               ; preds = %1
  %37 = landingpad { ptr, i32 }
          catch ptr null
  %38 = extractvalue { ptr, i32 } %37, 0
  tail call void @__clang_call_terminate(ptr %38) #7
  unreachable
}

declare void @_ZN9uca_org_t7cleanupEv(ptr noundef nonnull align 8 dereferenceable(8200)) local_unnamed_addr #3

; Function Attrs: noinline noreturn nounwind uwtable
declare hidden void @__clang_call_terminate(ptr noundef) local_unnamed_addr #4

; Function Attrs: nounwind
declare void @_ZN9ComponentD2Ev(ptr noundef nonnull align 8 dereferenceable(280)) unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { noinline noreturn nounwind uwtable "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { builtin nounwind }
attributes #7 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"vtable pointer", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !17, i64 1352}
!9 = !{!"_ZTS18InstructionDecoder", !10, i64 0, !17, i64 1352, !17, i64 1360, !20, i64 1368, !19, i64 1372, !19, i64 1376, !20, i64 1380, !19, i64 1384, !19, i64 1388, !18, i64 1392, !32, i64 1760, !34, i64 9960, !35, i64 9964, !30, i64 9968}
!10 = !{!"_ZTS14McPATComponent", !11, i64 8, !17, i64 288, !18, i64 296, !22, i64 664, !13, i64 696, !25, i64 704, !29, i64 728, !30, i64 776, !30, i64 944, !15, i64 1112, !15, i64 1232}
!11 = !{!"_ZTS9Component", !12, i64 0, !15, i64 24, !15, i64 144, !13, i64 264, !13, i64 272}
!12 = !{!"_ZTS4Area", !13, i64 0, !13, i64 8, !13, i64 16}
!13 = !{!"double", !14, i64 0}
!14 = !{!"omnipotent char", !7, i64 0}
!15 = !{!"_ZTS8powerDef", !16, i64 0, !16, i64 40, !16, i64 80}
!16 = !{!"_ZTS15powerComponents", !13, i64 0, !13, i64 8, !13, i64 16, !13, i64 24, !13, i64 32}
!17 = !{!"any pointer", !14, i64 0}
!18 = !{!"_ZTS14InputParameter", !19, i64 0, !19, i64 4, !19, i64 8, !19, i64 12, !19, i64 16, !20, i64 20, !19, i64 24, !19, i64 28, !19, i64 32, !19, i64 36, !19, i64 40, !19, i64 44, !13, i64 48, !13, i64 56, !19, i64 64, !19, i64 68, !19, i64 72, !19, i64 76, !19, i64 80, !20, i64 84, !20, i64 85, !20, i64 86, !20, i64 87, !20, i64 88, !19, i64 92, !19, i64 96, !19, i64 100, !19, i64 104, !19, i64 108, !19, i64 112, !19, i64 116, !19, i64 120, !19, i64 124, !19, i64 128, !19, i64 132, !19, i64 136, !19, i64 140, !19, i64 144, !19, i64 148, !21, i64 152, !19, i64 156, !20, i64 160, !19, i64 164, !19, i64 168, !19, i64 172, !19, i64 176, !19, i64 180, !19, i64 184, !19, i64 188, !20, i64 192, !19, i64 196, !19, i64 200, !19, i64 204, !19, i64 208, !19, i64 212, !19, i64 216, !19, i64 220, !19, i64 224, !19, i64 228, !19, i64 232, !19, i64 236, !19, i64 240, !19, i64 244, !19, i64 248, !19, i64 252, !19, i64 256, !19, i64 260, !19, i64 264, !19, i64 268, !19, i64 272, !19, i64 276, !19, i64 280, !19, i64 284, !19, i64 288, !19, i64 292, !19, i64 296, !20, i64 300, !19, i64 304, !19, i64 308, !19, i64 312, !20, i64 316, !20, i64 317, !19, i64 320, !19, i64 324, !20, i64 328, !13, i64 336, !13, i64 344, !20, i64 352, !19, i64 356, !19, i64 360, !20, i64 364}
!19 = !{!"int", !14, i64 0}
!20 = !{!"bool", !14, i64 0}
!21 = !{!"_ZTS9Wire_type", !14, i64 0}
!22 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !23, i64 0, !24, i64 8, !14, i64 16}
!23 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !17, i64 0}
!24 = !{!"long", !14, i64 0}
!25 = !{!"_ZTSSt6vectorIP14McPATComponentSaIS1_EE", !26, i64 0}
!26 = !{!"_ZTSSt12_Vector_baseIP14McPATComponentSaIS1_EE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseIP14McPATComponentSaIS1_EE12_Vector_implE", !28, i64 0}
!28 = !{!"_ZTSNSt12_Vector_baseIP14McPATComponentSaIS1_EE17_Vector_impl_dataE", !17, i64 0, !17, i64 8, !17, i64 16}
!29 = !{!"_ZTS11McPATOutput", !13, i64 0, !13, i64 8, !13, i64 16, !13, i64 24, !13, i64 32, !13, i64 40}
!30 = !{!"_ZTS8statsDef", !31, i64 0, !31, i64 24, !31, i64 48, !31, i64 72, !31, i64 96, !31, i64 120, !31, i64 144}
!31 = !{!"_ZTS15statsComponents", !13, i64 0, !13, i64 8, !13, i64 16}
!32 = !{!"_ZTS9uca_org_t", !17, i64 0, !17, i64 8, !13, i64 16, !13, i64 24, !13, i64 32, !13, i64 40, !15, i64 48, !13, i64 168, !13, i64 176, !13, i64 184, !14, i64 192, !13, i64 296, !20, i64 304, !33, i64 312, !33, i64 4256}
!33 = !{!"_ZTS17results_mem_array", !19, i64 0, !19, i64 4, !13, i64 8, !19, i64 16, !19, i64 20, !19, i64 24, !19, i64 28, !19, i64 32, !19, i64 36, !13, i64 40, !13, i64 48, !13, i64 56, !13, i64 64, !13, i64 72, !13, i64 80, !13, i64 88, !13, i64 96, !13, i64 104, !13, i64 112, !13, i64 120, !13, i64 128, !13, i64 136, !13, i64 144, !13, i64 152, !13, i64 160, !13, i64 168, !13, i64 176, !13, i64 184, !13, i64 192, !13, i64 200, !13, i64 208, !13, i64 216, !13, i64 224, !13, i64 232, !13, i64 240, !13, i64 248, !13, i64 256, !13, i64 264, !15, i64 272, !15, i64 392, !15, i64 512, !15, i64 632, !15, i64 752, !15, i64 872, !15, i64 992, !15, i64 1112, !15, i64 1232, !15, i64 1352, !15, i64 1472, !15, i64 1592, !15, i64 1712, !15, i64 1832, !15, i64 1952, !15, i64 2072, !15, i64 2192, !15, i64 2312, !15, i64 2432, !15, i64 2552, !15, i64 2672, !15, i64 2792, !15, i64 2912, !15, i64 3032, !15, i64 3152, !15, i64 3272, !15, i64 3392, !15, i64 3512, !15, i64 3632, !13, i64 3752, !13, i64 3760, !13, i64 3768, !13, i64 3776, !13, i64 3784, !13, i64 3792, !13, i64 3800, !13, i64 3808, !13, i64 3816, !13, i64 3824, !13, i64 3832, !13, i64 3840, !13, i64 3848, !13, i64 3856, !13, i64 3864, !13, i64 3872, !13, i64 3880, !13, i64 3888, !13, i64 3896, !13, i64 3904, !13, i64 3912, !13, i64 3920, !13, i64 3928, !13, i64 3936}
!34 = !{!"_ZTS9Device_ty", !14, i64 0}
!35 = !{!"_ZTS9Core_type", !14, i64 0}
!36 = !{!9, !17, i64 1360}
!37 = !{!38, !17, i64 280}
!38 = !{!"_ZTS6Predec", !11, i64 0, !17, i64 280, !17, i64 288, !17, i64 296, !17, i64 304, !15, i64 312, !15, i64 432}
!39 = !{!38, !17, i64 288}
!40 = !{!38, !17, i64 296}
!41 = !{!38, !17, i64 304}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,InstCombinePass,JumpThreadingPass,SROAPass,TailCallElimPass