; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/tracing (sc_vcd_trace)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_core::vcd_signed_char_trace" = type <{ %"class.sc_core::vcd_trace.base", [4 x i8], ptr, i8, i8, [6 x i8] }>
%"class.sc_core::vcd_trace.base" = type <{ ptr, %"class.std::__cxx11::basic_string", %"class.std::__cxx11::basic_string", ptr, i32 }>
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.sc_core::vcd_trace" = type <{ ptr, %"class.std::__cxx11::basic_string", %"class.std::__cxx11::basic_string", ptr, i32, [4 x i8] }>

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9vcd_trace17compose_data_lineEPcS1_(ptr noundef nonnull align 8 dereferenceable(84), ptr noundef, ptr noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

declare i32 @fputs(ptr noundef, ptr noundef) #2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core21vcd_signed_char_trace5writeEP8_IO_FILE(ptr noundef nonnull align 8 dereferenceable(98) %0, ptr noundef %1) unnamed_addr #0 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca [1000 x i8], align 16
  %6 = alloca [1000 x i8], align 16
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %9 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 1000, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 1000, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %10 = getelementptr inbounds %"class.sc_core::vcd_signed_char_trace", ptr %9, i32 0, i32 2
  %11 = load ptr, ptr %10, align 8, !tbaa !9
  %12 = load i8, ptr %11, align 1, !tbaa !16
  %13 = zext i8 %12 to i32
  %14 = getelementptr inbounds %"class.sc_core::vcd_signed_char_trace", ptr %9, i32 0, i32 4
  %15 = load i8, ptr %14, align 1, !tbaa !17
  %16 = zext i8 %15 to i32
  %17 = and i32 %13, %16
  %18 = getelementptr inbounds %"class.sc_core::vcd_signed_char_trace", ptr %9, i32 0, i32 2
  %19 = load ptr, ptr %18, align 8, !tbaa !9
  %20 = load i8, ptr %19, align 1, !tbaa !16
  %21 = zext i8 %20 to i32
  %22 = icmp ne i32 %17, %21
  br i1 %22, label %23, label %37

23:                                               ; preds = %2
  store i32 0, ptr %7, align 4, !tbaa !18
  br label %24

24:                                               ; preds = %33, %23
  %25 = load i32, ptr %7, align 4, !tbaa !18
  %26 = getelementptr inbounds %"class.sc_core::vcd_trace", ptr %9, i32 0, i32 4
  %27 = load i32, ptr %26, align 8, !tbaa !19
  %28 = icmp slt i32 %25, %27
  br i1 %28, label %29, label %36

29:                                               ; preds = %24
  %30 = load i32, ptr %7, align 4, !tbaa !18
  %31 = sext i32 %30 to i64
  %32 = getelementptr inbounds [1000 x i8], ptr %5, i64 0, i64 %31
  store i8 120, ptr %32, align 1, !tbaa !16
  br label %33

33:                                               ; preds = %29
  %34 = load i32, ptr %7, align 4, !tbaa !18
  %35 = add nsw i32 %34, 1
  store i32 %35, ptr %7, align 4, !tbaa !18
  br label %24, !llvm.loop !20

36:                                               ; preds = %24
  br label %66

37:                                               ; preds = %2
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %38 = getelementptr inbounds %"class.sc_core::vcd_trace", ptr %9, i32 0, i32 4
  %39 = load i32, ptr %38, align 8, !tbaa !19
  %40 = sub nsw i32 %39, 1
  %41 = shl i32 1, %40
  store i32 %41, ptr %8, align 4, !tbaa !18
  store i32 0, ptr %7, align 4, !tbaa !18
  br label %42

42:                                               ; preds = %62, %37
  %43 = load i32, ptr %7, align 4, !tbaa !18
  %44 = getelementptr inbounds %"class.sc_core::vcd_trace", ptr %9, i32 0, i32 4
  %45 = load i32, ptr %44, align 8, !tbaa !19
  %46 = icmp slt i32 %43, %45
  br i1 %46, label %47, label %65

47:                                               ; preds = %42
  %48 = getelementptr inbounds %"class.sc_core::vcd_signed_char_trace", ptr %9, i32 0, i32 2
  %49 = load ptr, ptr %48, align 8, !tbaa !9
  %50 = load i8, ptr %49, align 1, !tbaa !16
  %51 = sext i8 %50 to i32
  %52 = load i32, ptr %8, align 4, !tbaa !18
  %53 = and i32 %51, %52
  %54 = icmp ne i32 %53, 0
  %55 = zext i1 %54 to i64
  %56 = select i1 %54, i8 49, i8 48
  %57 = load i32, ptr %7, align 4, !tbaa !18
  %58 = sext i32 %57 to i64
  %59 = getelementptr inbounds [1000 x i8], ptr %5, i64 0, i64 %58
  store i8 %56, ptr %59, align 1, !tbaa !16
  %60 = load i32, ptr %8, align 4, !tbaa !18
  %61 = lshr i32 %60, 1
  store i32 %61, ptr %8, align 4, !tbaa !18
  br label %62

62:                                               ; preds = %47
  %63 = load i32, ptr %7, align 4, !tbaa !18
  %64 = add nsw i32 %63, 1
  store i32 %64, ptr %7, align 4, !tbaa !18
  br label %42, !llvm.loop !22

65:                                               ; preds = %42
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  br label %66

66:                                               ; preds = %65, %36
  %67 = load i32, ptr %7, align 4, !tbaa !18
  %68 = sext i32 %67 to i64
  %69 = getelementptr inbounds [1000 x i8], ptr %5, i64 0, i64 %68
  store i8 0, ptr %69, align 1, !tbaa !16
  %70 = getelementptr inbounds [1000 x i8], ptr %5, i64 0, i64 0
  %71 = getelementptr inbounds [1000 x i8], ptr %6, i64 0, i64 0
  call void @_ZN7sc_core9vcd_trace17compose_data_lineEPcS1_(ptr noundef nonnull align 8 dereferenceable(84) %9, ptr noundef %70, ptr noundef %71)
  %72 = getelementptr inbounds [1000 x i8], ptr %6, i64 0, i64 0
  %73 = load ptr, ptr %4, align 8, !tbaa !5
  %74 = call i32 @fputs(ptr noundef %72, ptr noundef %73)
  %75 = getelementptr inbounds %"class.sc_core::vcd_signed_char_trace", ptr %9, i32 0, i32 2
  %76 = load ptr, ptr %75, align 8, !tbaa !9
  %77 = load i8, ptr %76, align 1, !tbaa !16
  %78 = getelementptr inbounds %"class.sc_core::vcd_signed_char_trace", ptr %9, i32 0, i32 3
  store i8 %77, ptr %78, align 8, !tbaa !23
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 1000, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 1000, ptr %5) #3
  ret void
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 88}
!10 = !{!"_ZTSN7sc_core21vcd_signed_char_traceE", !11, i64 0, !6, i64 88, !7, i64 96, !7, i64 97}
!11 = !{!"_ZTSN7sc_core9vcd_traceE", !12, i64 8, !12, i64 40, !6, i64 72, !15, i64 80}
!12 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !13, i64 0, !14, i64 8, !7, i64 16}
!13 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!14 = !{!"long", !7, i64 0}
!15 = !{!"int", !7, i64 0}
!16 = !{!7, !7, i64 0}
!17 = !{!10, !7, i64 97}
!18 = !{!15, !15, i64 0}
!19 = !{!11, !15, i64 80}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
!22 = distinct !{!22, !21}
!23 = !{!10, !7, i64 96}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9vcd_trace17compose_data_lineEPcS1_(ptr noundef nonnull align 8 dereferenceable(84), ptr noundef, ptr noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nofree nounwind
declare noundef i32 @fputs(ptr nocapture noundef readonly, ptr nocapture noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core21vcd_signed_char_trace5writeEP8_IO_FILE(ptr noundef nonnull align 8 dereferenceable(98) %0, ptr nocapture noundef %1) unnamed_addr #0 align 2 {
  %3 = alloca [1000 x i8], align 16
  %4 = alloca [1000 x i8], align 16
  call void @llvm.lifetime.start.p0(i64 1000, ptr nonnull %3) #4
  call void @llvm.lifetime.start.p0(i64 1000, ptr nonnull %4) #4
  %5 = getelementptr inbounds i8, ptr %0, i64 88
  %6 = load ptr, ptr %5, align 8, !tbaa !5
  %7 = load i8, ptr %6, align 1, !tbaa !15
  %8 = getelementptr inbounds i8, ptr %0, i64 97
  %9 = load i8, ptr %8, align 1, !tbaa !16
  %10 = and i8 %9, %7
  %.not = icmp eq i8 %10, %7
  %11 = getelementptr inbounds i8, ptr %0, i64 80
  %12 = load i32, ptr %11, align 8, !tbaa !17
  %13 = icmp sgt i32 %12, 0
  br i1 %.not, label %15, label %.preheader

.preheader:                                       ; preds = %2
  br i1 %13, label %.lr.ph.preheader, label %.loopexit

.lr.ph.preheader:                                 ; preds = %.preheader
  %14 = zext nneg i32 %12 to i64
  call void @llvm.memset.p0.i64(ptr nonnull align 16 %3, i8 120, i64 %14, i1 false), !tbaa !15
  br label %.loopexit

15:                                               ; preds = %2
  br i1 %13, label %.lr.ph16.preheader, label %.loopexit

.lr.ph16.preheader:                               ; preds = %15
  %16 = add nsw i32 %12, -1
  %17 = shl nuw i32 1, %16
  %wide.trip.count22 = zext nneg i32 %12 to i64
  %18 = sext i8 %7 to i32
  %xtraiter = and i64 %wide.trip.count22, 1
  %19 = icmp eq i32 %12, 1
  br i1 %19, label %.loopexit.loopexit.unr-lcssa, label %.lr.ph16.preheader.new

.lr.ph16.preheader.new:                           ; preds = %.lr.ph16.preheader
  %unroll_iter = and i64 %wide.trip.count22, 2147483646
  br label %.lr.ph16

.lr.ph16:                                         ; preds = %.lr.ph16, %.lr.ph16.preheader.new
  %indvars.iv = phi i64 [ 0, %.lr.ph16.preheader.new ], [ %indvars.iv.next.1, %.lr.ph16 ]
  %.015 = phi i32 [ %17, %.lr.ph16.preheader.new ], [ %27, %.lr.ph16 ]
  %niter = phi i64 [ 0, %.lr.ph16.preheader.new ], [ %niter.next.1, %.lr.ph16 ]
  %20 = and i32 %.015, %18
  %.not11 = icmp eq i32 %20, 0
  %21 = select i1 %.not11, i8 48, i8 49
  %22 = getelementptr inbounds [1000 x i8], ptr %3, i64 0, i64 %indvars.iv
  store i8 %21, ptr %22, align 2, !tbaa !15
  %23 = lshr i32 %.015, 1
  %indvars.iv.next = or disjoint i64 %indvars.iv, 1
  %24 = and i32 %23, %18
  %.not11.1 = icmp eq i32 %24, 0
  %25 = select i1 %.not11.1, i8 48, i8 49
  %26 = getelementptr inbounds [1000 x i8], ptr %3, i64 0, i64 %indvars.iv.next
  store i8 %25, ptr %26, align 1, !tbaa !15
  %27 = lshr i32 %.015, 2
  %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2
  %niter.next.1 = add i64 %niter, 2
  %niter.ncmp.1 = icmp eq i64 %niter.next.1, %unroll_iter
  br i1 %niter.ncmp.1, label %.loopexit.loopexit.unr-lcssa, label %.lr.ph16, !llvm.loop !18

.loopexit.loopexit.unr-lcssa:                     ; preds = %.lr.ph16, %.lr.ph16.preheader
  %indvars.iv.unr = phi i64 [ 0, %.lr.ph16.preheader ], [ %indvars.iv.next.1, %.lr.ph16 ]
  %.015.unr = phi i32 [ %17, %.lr.ph16.preheader ], [ %27, %.lr.ph16 ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %.loopexit, label %.lr.ph16.epil

.lr.ph16.epil:                                    ; preds = %.loopexit.loopexit.unr-lcssa
  %28 = and i32 %.015.unr, %18
  %.not11.epil = icmp eq i32 %28, 0
  %29 = select i1 %.not11.epil, i8 48, i8 49
  %30 = getelementptr inbounds [1000 x i8], ptr %3, i64 0, i64 %indvars.iv.unr
  store i8 %29, ptr %30, align 1, !tbaa !15
  br label %.loopexit

.loopexit:                                        ; preds = %.lr.ph16.epil, %.loopexit.loopexit.unr-lcssa, %.lr.ph.preheader, %.preheader, %15
  %.2 = phi i32 [ 0, %15 ], [ 0, %.preheader ], [ %12, %.lr.ph.preheader ], [ %12, %.loopexit.loopexit.unr-lcssa ], [ %12, %.lr.ph16.epil ]
  %31 = zext nneg i32 %.2 to i64
  %32 = getelementptr inbounds [1000 x i8], ptr %3, i64 0, i64 %31
  store i8 0, ptr %32, align 1, !tbaa !15
  call void @_ZN7sc_core9vcd_trace17compose_data_lineEPcS1_(ptr noundef nonnull align 8 dereferenceable(84) %0, ptr noundef nonnull %3, ptr noundef nonnull %4)
  %33 = call i32 @fputs(ptr noundef nonnull %4, ptr noundef %1)
  %34 = load ptr, ptr %5, align 8, !tbaa !5
  %35 = load i8, ptr %34, align 1, !tbaa !15
  %36 = getelementptr inbounds i8, ptr %0, i64 96
  store i8 %35, ptr %36, align 8, !tbaa !20
  call void @llvm.lifetime.end.p0(i64 1000, ptr nonnull %4) #4
  call void @llvm.lifetime.end.p0(i64 1000, ptr nonnull %3) #4
  ret void
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 88}
!6 = !{!"_ZTSN7sc_core21vcd_signed_char_traceE", !7, i64 0, !10, i64 88, !11, i64 96, !11, i64 97}
!7 = !{!"_ZTSN7sc_core9vcd_traceE", !8, i64 8, !8, i64 40, !10, i64 72, !14, i64 80}
!8 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !9, i64 0, !13, i64 8, !11, i64 16}
!9 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !10, i64 0}
!10 = !{!"any pointer", !11, i64 0}
!11 = !{!"omnipotent char", !12, i64 0}
!12 = !{!"Simple C++ TBAA"}
!13 = !{!"long", !11, i64 0}
!14 = !{!"int", !11, i64 0}
!15 = !{!11, !11, i64 0}
!16 = !{!6, !11, i64 97}
!17 = !{!7, !14, i64 80}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
!20 = !{!6, !11, i64 96}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopIdiomRecognizePass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass