; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/NetworkPkg/Dhcp6Dxe (Dhcp6SeekIaOption)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.EFI_DHCP6_IA_DESCRIPTOR = type { i16, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare zeroext i16 @SwapBytes16(i16 noundef zeroext) #1

declare i32 @SwapBytes32(i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare zeroext i16 @ReadUnaligned16(ptr noundef) #1

; Function Attrs: nounwind uwtable
define dso_local ptr @Dhcp6SeekIaOption(ptr noundef %0, i32 noundef %1, ptr noundef %2) #2 {
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i16, align 2
  %10 = alloca i16, align 2
  %11 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  store ptr %2, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 2, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 2, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  store ptr null, ptr %8, align 8, !tbaa !5
  %12 = load ptr, ptr %4, align 8, !tbaa !5
  store ptr %12, ptr %7, align 8, !tbaa !5
  br label %13

13:                                               ; preds = %43, %3
  %14 = load ptr, ptr %7, align 8, !tbaa !5
  %15 = load ptr, ptr %4, align 8, !tbaa !5
  %16 = load i32, ptr %5, align 4, !tbaa !9
  %17 = zext i32 %16 to i64
  %18 = getelementptr inbounds i8, ptr %15, i64 %17
  %19 = icmp ult ptr %14, %18
  br i1 %19, label %20, label %54

20:                                               ; preds = %13
  %21 = load ptr, ptr %7, align 8, !tbaa !5
  %22 = call zeroext i16 @ReadUnaligned16(ptr noundef %21)
  store i16 %22, ptr %10, align 2, !tbaa !11
  %23 = load ptr, ptr %7, align 8, !tbaa !5
  %24 = getelementptr inbounds i8, ptr %23, i64 4
  %25 = call i32 @ReadUnaligned32(ptr noundef %24)
  store i32 %25, ptr %11, align 4, !tbaa !9
  %26 = load i16, ptr %10, align 2, !tbaa !11
  %27 = zext i16 %26 to i32
  %28 = load ptr, ptr %6, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.EFI_DHCP6_IA_DESCRIPTOR, ptr %28, i32 0, i32 0
  %30 = load i16, ptr %29, align 4, !tbaa !13
  %31 = call zeroext i16 @SwapBytes16(i16 noundef zeroext %30)
  %32 = zext i16 %31 to i32
  %33 = icmp eq i32 %27, %32
  br i1 %33, label %34, label %43

34:                                               ; preds = %20
  %35 = load i32, ptr %11, align 4, !tbaa !9
  %36 = load ptr, ptr %6, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.EFI_DHCP6_IA_DESCRIPTOR, ptr %36, i32 0, i32 1
  %38 = load i32, ptr %37, align 4, !tbaa !15
  %39 = call i32 @SwapBytes32(i32 noundef %38)
  %40 = icmp eq i32 %35, %39
  br i1 %40, label %41, label %43

41:                                               ; preds = %34
  %42 = load ptr, ptr %7, align 8, !tbaa !5
  store ptr %42, ptr %8, align 8, !tbaa !5
  br label %54

43:                                               ; preds = %34, %20
  %44 = load ptr, ptr %7, align 8, !tbaa !5
  %45 = getelementptr inbounds i8, ptr %44, i64 2
  %46 = call zeroext i16 @ReadUnaligned16(ptr noundef %45)
  %47 = call zeroext i16 @SwapBytes16(i16 noundef zeroext %46)
  store i16 %47, ptr %9, align 2, !tbaa !11
  %48 = load i16, ptr %9, align 2, !tbaa !11
  %49 = zext i16 %48 to i32
  %50 = add nsw i32 %49, 4
  %51 = load ptr, ptr %7, align 8, !tbaa !5
  %52 = sext i32 %50 to i64
  %53 = getelementptr inbounds i8, ptr %51, i64 %52
  store ptr %53, ptr %7, align 8, !tbaa !5
  br label %13, !llvm.loop !16

54:                                               ; preds = %41, %13
  %55 = load ptr, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  ret ptr %55
}

declare i32 @ReadUnaligned32(ptr noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"short", !7, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"", !12, i64 0, !10, i64 4}
!15 = !{!14, !10, i64 4}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare zeroext i16 @SwapBytes16(i16 noundef zeroext) local_unnamed_addr #0

declare i32 @SwapBytes32(i32 noundef) local_unnamed_addr #0

declare zeroext i16 @ReadUnaligned16(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local noundef ptr @Dhcp6SeekIaOption(ptr noundef %0, i32 noundef %1, ptr nocapture noundef readonly %2) local_unnamed_addr #1 {
  %4 = getelementptr inbounds i8, ptr %2, i64 4
  %5 = zext i32 %1 to i64
  %6 = getelementptr inbounds i8, ptr %0, i64 %5
  %.not = icmp eq i32 %1, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %3, %17
  %.015 = phi ptr [ %23, %17 ], [ %0, %3 ]
  %7 = tail call zeroext i16 @ReadUnaligned16(ptr noundef %.015) #2
  %8 = getelementptr inbounds i8, ptr %.015, i64 4
  %9 = tail call i32 @ReadUnaligned32(ptr noundef nonnull %8) #2
  %10 = load i16, ptr %2, align 4, !tbaa !5
  %11 = tail call zeroext i16 @SwapBytes16(i16 noundef zeroext %10) #2
  %12 = icmp eq i16 %7, %11
  br i1 %12, label %13, label %17

13:                                               ; preds = %.lr.ph
  %14 = load i32, ptr %4, align 4, !tbaa !11
  %15 = tail call i32 @SwapBytes32(i32 noundef %14) #2
  %16 = icmp eq i32 %9, %15
  br i1 %16, label %._crit_edge, label %17

17:                                               ; preds = %13, %.lr.ph
  %18 = getelementptr inbounds i8, ptr %.015, i64 2
  %19 = tail call zeroext i16 @ReadUnaligned16(ptr noundef nonnull %18) #2
  %20 = tail call zeroext i16 @SwapBytes16(i16 noundef zeroext %19) #2
  %21 = zext i16 %20 to i64
  %22 = add nuw nsw i64 %21, 4
  %23 = getelementptr inbounds i8, ptr %.015, i64 %22
  %24 = icmp ult ptr %23, %6
  br i1 %24, label %.lr.ph, label %._crit_edge, !llvm.loop !12

._crit_edge:                                      ; preds = %17, %13, %3
  %.014 = phi ptr [ null, %3 ], [ %.015, %13 ], [ null, %17 ]
  ret ptr %.014
}

declare i32 @ReadUnaligned32(ptr noundef) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !10, i64 4}
!7 = !{!"short", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!6, !10, i64 4}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass