; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/datatypes/fx (sc_fxnum)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::scfx_ieee_double" = type { %"union.sc_dt::ieee_double" }
%"union.sc_dt::ieee_double" = type { double }
%"class.sc_dt::sc_bitref_r" = type <{ ptr, i32, [4 x i8] }>
%"class.sc_dt::sc_fxnum_fast" = type { double, %"class.sc_dt::scfx_params", i8, i8, ptr }
%"class.sc_dt::scfx_params" = type { %"class.sc_dt::sc_fxtype_params", i32, %"class.sc_dt::sc_fxcast_switch" }
%"class.sc_dt::sc_fxtype_params" = type { i32, i32, i32, i32, i32 }
%"class.sc_dt::sc_fxcast_switch" = type { i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK5sc_dt13sc_fxnum_fast7get_bitEi(ptr noundef nonnull align 8 dereferenceable(48), i32 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN5sc_dt13sc_fxnum_fast9set_sliceEiiRKNS_10sc_bv_baseE(ptr noundef nonnull align 8 dereferenceable(48) %0, i32 noundef %1, i32 noundef %2, ptr noundef nonnull align 8 dereferenceable(24) %3) #1 align 2 {
  %5 = alloca i1, align 1
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  %10 = alloca %"class.sc_dt::scfx_ieee_double", align 8
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca %"class.sc_dt::sc_bitref_r", align 8
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !9
  store i32 %2, ptr %8, align 4, !tbaa !9
  store ptr %3, ptr %9, align 8, !tbaa !5
  %15 = load ptr, ptr %6, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #5
  %16 = getelementptr inbounds %"class.sc_dt::sc_fxnum_fast", ptr %15, i32 0, i32 0
  %17 = load double, ptr %16, align 8, !tbaa !11
  call void @_ZN5sc_dt16scfx_ieee_doubleC2Ed(ptr noundef nonnull align 8 dereferenceable(8) %10, double noundef %17)
  %18 = call noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double6is_nanEv(ptr noundef nonnull align 8 dereferenceable(8) %10)
  br i1 %18, label %21, label %19

19:                                               ; preds = %4
  %20 = call noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double6is_infEv(ptr noundef nonnull align 8 dereferenceable(8) %10)
  br i1 %20, label %21, label %22

21:                                               ; preds = %19, %4
  store i1 false, ptr %5, align 1
  store i32 1, ptr %11, align 4
  br label %103

22:                                               ; preds = %19
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #5
  %23 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %23, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #5
  store i32 0, ptr %13, align 4, !tbaa !9
  br label %24

24:                                               ; preds = %99, %22
  %25 = load i32, ptr %13, align 4, !tbaa !9
  %26 = load ptr, ptr %9, align 8, !tbaa !5
  %27 = call noundef i32 @_ZNK5sc_dt10sc_bv_base6lengthEv(ptr noundef nonnull align 8 dereferenceable(24) %26)
  %28 = icmp slt i32 %25, %27
  br i1 %28, label %30, label %29

29:                                               ; preds = %24
  store i32 2, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #5
  br label %102

30:                                               ; preds = %24
  call void @llvm.lifetime.start.p0(i64 16, ptr %14) #5
  %31 = load ptr, ptr %9, align 8, !tbaa !5
  %32 = load i32, ptr %13, align 4, !tbaa !9
  call void @_ZNK5sc_dt8sc_proxyINS_10sc_bv_baseEEixEi(ptr dead_on_unwind writable sret(%"class.sc_dt::sc_bitref_r") align 8 %14, ptr noundef nonnull align 8 dereferenceable(8) %31, i32 noundef %32)
  %33 = call noundef zeroext i1 @_ZNK5sc_dt11sc_bitref_rINS_10sc_bv_baseEE7to_boolEv(ptr noundef nonnull align 8 dereferenceable(12) %14)
  call void @llvm.lifetime.end.p0(i64 16, ptr %14) #5
  br i1 %33, label %34, label %61

34:                                               ; preds = %30
  %35 = load i32, ptr %12, align 4, !tbaa !9
  %36 = call noundef zeroext i1 @_ZNK5sc_dt13sc_fxnum_fast7get_bitEi(ptr noundef nonnull align 8 dereferenceable(48) %15, i32 noundef %35)
  br i1 %36, label %60, label %37

37:                                               ; preds = %34
  %38 = getelementptr inbounds %"class.sc_dt::sc_fxnum_fast", ptr %15, i32 0, i32 1
  %39 = call noundef i32 @_ZNK5sc_dt11scfx_params3encEv(ptr noundef nonnull align 4 dereferenceable(28) %38)
  %40 = icmp eq i32 %39, 0
  br i1 %40, label %41, label %53

41:                                               ; preds = %37
  %42 = load i32, ptr %12, align 4, !tbaa !9
  %43 = getelementptr inbounds %"class.sc_dt::sc_fxnum_fast", ptr %15, i32 0, i32 1
  %44 = call noundef i32 @_ZNK5sc_dt11scfx_params3iwlEv(ptr noundef nonnull align 4 dereferenceable(28) %43)
  %45 = sub nsw i32 %44, 1
  %46 = icmp eq i32 %42, %45
  br i1 %46, label %47, label %53

47:                                               ; preds = %41
  %48 = load i32, ptr %12, align 4, !tbaa !9
  %49 = call noundef double @_ZN5sc_dt9scfx_pow2Ei(i32 noundef %48)
  %50 = getelementptr inbounds %"class.sc_dt::sc_fxnum_fast", ptr %15, i32 0, i32 0
  %51 = load double, ptr %50, align 8, !tbaa !11
  %52 = fsub double %51, %49
  store double %52, ptr %50, align 8, !tbaa !11
  br label %59

53:                                               ; preds = %41, %37
  %54 = load i32, ptr %12, align 4, !tbaa !9
  %55 = call noundef double @_ZN5sc_dt9scfx_pow2Ei(i32 noundef %54)
  %56 = getelementptr inbounds %"class.sc_dt::sc_fxnum_fast", ptr %15, i32 0, i32 0
  %57 = load double, ptr %56, align 8, !tbaa !11
  %58 = fadd double %57, %55
  store double %58, ptr %56, align 8, !tbaa !11
  br label %59

59:                                               ; preds = %53, %47
  br label %60

60:                                               ; preds = %59, %34
  br label %88

61:                                               ; preds = %30
  %62 = load i32, ptr %12, align 4, !tbaa !9
  %63 = call noundef zeroext i1 @_ZNK5sc_dt13sc_fxnum_fast7get_bitEi(ptr noundef nonnull align 8 dereferenceable(48) %15, i32 noundef %62)
  br i1 %63, label %64, label %87

64:                                               ; preds = %61
  %65 = getelementptr inbounds %"class.sc_dt::sc_fxnum_fast", ptr %15, i32 0, i32 1
  %66 = call noundef i32 @_ZNK5sc_dt11scfx_params3encEv(ptr noundef nonnull align 4 dereferenceable(28) %65)
  %67 = icmp eq i32 %66, 0
  br i1 %67, label %68, label %80

68:                                               ; preds = %64
  %69 = load i32, ptr %12, align 4, !tbaa !9
  %70 = getelementptr inbounds %"class.sc_dt::sc_fxnum_fast", ptr %15, i32 0, i32 1
  %71 = call noundef i32 @_ZNK5sc_dt11scfx_params3iwlEv(ptr noundef nonnull align 4 dereferenceable(28) %70)
  %72 = sub nsw i32 %71, 1
  %73 = icmp eq i32 %69, %72
  br i1 %73, label %74, label %80

74:                                               ; preds = %68
  %75 = load i32, ptr %12, align 4, !tbaa !9
  %76 = call noundef double @_ZN5sc_dt9scfx_pow2Ei(i32 noundef %75)
  %77 = getelementptr inbounds %"class.sc_dt::sc_fxnum_fast", ptr %15, i32 0, i32 0
  %78 = load double, ptr %77, align 8, !tbaa !11
  %79 = fadd double %78, %76
  store double %79, ptr %77, align 8, !tbaa !11
  br label %86

80:                                               ; preds = %68, %64
  %81 = load i32, ptr %12, align 4, !tbaa !9
  %82 = call noundef double @_ZN5sc_dt9scfx_pow2Ei(i32 noundef %81)
  %83 = getelementptr inbounds %"class.sc_dt::sc_fxnum_fast", ptr %15, i32 0, i32 0
  %84 = load double, ptr %83, align 8, !tbaa !11
  %85 = fsub double %84, %82
  store double %85, ptr %83, align 8, !tbaa !11
  br label %86

86:                                               ; preds = %80, %74
  br label %87

87:                                               ; preds = %86, %61
  br label %88

88:                                               ; preds = %87, %60
  %89 = load i32, ptr %7, align 4, !tbaa !9
  %90 = load i32, ptr %8, align 4, !tbaa !9
  %91 = icmp sge i32 %89, %90
  br i1 %91, label %92, label %95

92:                                               ; preds = %88
  %93 = load i32, ptr %12, align 4, !tbaa !9
  %94 = add nsw i32 %93, 1
  store i32 %94, ptr %12, align 4, !tbaa !9
  br label %98

95:                                               ; preds = %88
  %96 = load i32, ptr %12, align 4, !tbaa !9
  %97 = add nsw i32 %96, -1
  store i32 %97, ptr %12, align 4, !tbaa !9
  br label %98

98:                                               ; preds = %95, %92
  br label %99

99:                                               ; preds = %98
  %100 = load i32, ptr %13, align 4, !tbaa !9
  %101 = add nsw i32 %100, 1
  store i32 %101, ptr %13, align 4, !tbaa !9
  br label %24, !llvm.loop !22

102:                                              ; preds = %29
  store i1 true, ptr %5, align 1
  store i32 1, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #5
  br label %103

103:                                              ; preds = %102, %21
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #5
  %104 = load i1, ptr %5, align 1
  ret i1 %104
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt16scfx_ieee_doubleC2Ed(ptr noundef nonnull align 8 dereferenceable(8), double noundef) unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double6is_nanEv(ptr noundef nonnull align 8 dereferenceable(8)) #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double6is_infEv(ptr noundef nonnull align 8 dereferenceable(8)) #3 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt11scfx_params3encEv(ptr noundef nonnull align 4 dereferenceable(28)) #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_ZNK5sc_dt11scfx_params3iwlEv(ptr noundef nonnull align 4 dereferenceable(28)) #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef double @_ZN5sc_dt9scfx_pow2Ei(i32 noundef) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt10sc_bv_base6lengthEv(ptr noundef nonnull align 8 dereferenceable(24)) #4 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNK5sc_dt8sc_proxyINS_10sc_bv_baseEEixEi(ptr dead_on_unwind noalias writable sret(%"class.sc_dt::sc_bitref_r") align 8, ptr noundef nonnull align 8 dereferenceable(8), i32 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK5sc_dt11sc_bitref_rINS_10sc_bv_baseEE7to_boolEv(ptr noundef nonnull align 8 dereferenceable(12)) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"_ZTSN5sc_dt13sc_fxnum_fastE", !13, i64 0, !14, i64 8, !21, i64 36, !21, i64 37, !6, i64 40}
!13 = !{!"double", !7, i64 0}
!14 = !{!"_ZTSN5sc_dt11scfx_paramsE", !15, i64 0, !18, i64 20, !19, i64 24}
!15 = !{!"_ZTSN5sc_dt16sc_fxtype_paramsE", !10, i64 0, !10, i64 4, !16, i64 8, !17, i64 12, !10, i64 16}
!16 = !{!"_ZTSN5sc_dt9sc_q_modeE", !7, i64 0}
!17 = !{!"_ZTSN5sc_dt9sc_o_modeE", !7, i64 0}
!18 = !{!"_ZTSN5sc_dt6sc_encE", !7, i64 0}
!19 = !{!"_ZTSN5sc_dt16sc_fxcast_switchE", !20, i64 0}
!20 = !{!"_ZTSN5sc_dt9sc_switchE", !7, i64 0}
!21 = !{!"bool", !7, i64 0}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::scfx_ieee_double" = type { %"union.sc_dt::ieee_double" }
%"union.sc_dt::ieee_double" = type { double }
%"class.sc_dt::sc_bitref_r" = type <{ ptr, i32, [4 x i8] }>

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK5sc_dt13sc_fxnum_fast7get_bitEi(ptr noundef nonnull align 8 dereferenceable(48), i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN5sc_dt13sc_fxnum_fast9set_sliceEiiRKNS_10sc_bv_baseE(ptr noundef nonnull align 8 dereferenceable(48) %0, i32 noundef %1, i32 noundef %2, ptr noundef nonnull align 8 dereferenceable(24) %3) local_unnamed_addr #1 align 2 {
  %5 = alloca %"class.sc_dt::scfx_ieee_double", align 8
  %6 = alloca %"class.sc_dt::sc_bitref_r", align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #5
  %7 = load double, ptr %0, align 8, !tbaa !5
  call void @_ZN5sc_dt16scfx_ieee_doubleC2Ed(ptr noundef nonnull align 8 dereferenceable(8) %5, double noundef %7)
  %8 = call noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double6is_nanEv(ptr noundef nonnull align 8 dereferenceable(8) %5)
  br i1 %8, label %.loopexit, label %9

9:                                                ; preds = %4
  %10 = call noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double6is_infEv(ptr noundef nonnull align 8 dereferenceable(8) %5)
  br i1 %10, label %.loopexit, label %.preheader

.preheader:                                       ; preds = %9
  %11 = call noundef i32 @_ZNK5sc_dt10sc_bv_base6lengthEv(ptr noundef nonnull align 8 dereferenceable(24) %3)
  %12 = icmp sgt i32 %11, 0
  br i1 %12, label %.lr.ph, label %.loopexit

.lr.ph:                                           ; preds = %.preheader
  %13 = getelementptr inbounds i8, ptr %0, i64 8
  %.not = icmp slt i32 %1, %2
  %.1.v = select i1 %.not, i32 -1, i32 1
  br label %14

14:                                               ; preds = %.lr.ph, %49
  %.022 = phi i32 [ 0, %.lr.ph ], [ %50, %49 ]
  %.01921 = phi i32 [ %2, %.lr.ph ], [ %.1, %49 ]
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %6) #5
  call void @_ZNK5sc_dt8sc_proxyINS_10sc_bv_baseEEixEi(ptr dead_on_unwind nonnull writable sret(%"class.sc_dt::sc_bitref_r") align 8 %6, ptr noundef nonnull align 8 dereferenceable(8) %3, i32 noundef %.022)
  %15 = call noundef zeroext i1 @_ZNK5sc_dt11sc_bitref_rINS_10sc_bv_baseEE7to_boolEv(ptr noundef nonnull align 8 dereferenceable(12) %6)
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %6) #5
  %16 = call noundef zeroext i1 @_ZNK5sc_dt13sc_fxnum_fast7get_bitEi(ptr noundef nonnull align 8 dereferenceable(48) %0, i32 noundef %.01921)
  br i1 %15, label %17, label %33

17:                                               ; preds = %14
  br i1 %16, label %49, label %18

18:                                               ; preds = %17
  %19 = call noundef i32 @_ZNK5sc_dt11scfx_params3encEv(ptr noundef nonnull align 4 dereferenceable(28) %13)
  %20 = icmp eq i32 %19, 0
  br i1 %20, label %21, label %29

21:                                               ; preds = %18
  %22 = call noundef i32 @_ZNK5sc_dt11scfx_params3iwlEv(ptr noundef nonnull align 4 dereferenceable(28) %13)
  %23 = add nsw i32 %22, -1
  %24 = icmp eq i32 %.01921, %23
  br i1 %24, label %25, label %29

25:                                               ; preds = %21
  %26 = call noundef double @_ZN5sc_dt9scfx_pow2Ei(i32 noundef %.01921)
  %27 = load double, ptr %0, align 8, !tbaa !5
  %28 = fsub double %27, %26
  br label %.sink.split

29:                                               ; preds = %21, %18
  %30 = call noundef double @_ZN5sc_dt9scfx_pow2Ei(i32 noundef %.01921)
  %31 = load double, ptr %0, align 8, !tbaa !5
  %32 = fadd double %30, %31
  br label %.sink.split

33:                                               ; preds = %14
  br i1 %16, label %34, label %49

34:                                               ; preds = %33
  %35 = call noundef i32 @_ZNK5sc_dt11scfx_params3encEv(ptr noundef nonnull align 4 dereferenceable(28) %13)
  %36 = icmp eq i32 %35, 0
  br i1 %36, label %37, label %45

37:                                               ; preds = %34
  %38 = call noundef i32 @_ZNK5sc_dt11scfx_params3iwlEv(ptr noundef nonnull align 4 dereferenceable(28) %13)
  %39 = add nsw i32 %38, -1
  %40 = icmp eq i32 %.01921, %39
  br i1 %40, label %41, label %45

41:                                               ; preds = %37
  %42 = call noundef double @_ZN5sc_dt9scfx_pow2Ei(i32 noundef %.01921)
  %43 = load double, ptr %0, align 8, !tbaa !5
  %44 = fadd double %42, %43
  br label %.sink.split

45:                                               ; preds = %37, %34
  %46 = call noundef double @_ZN5sc_dt9scfx_pow2Ei(i32 noundef %.01921)
  %47 = load double, ptr %0, align 8, !tbaa !5
  %48 = fsub double %47, %46
  br label %.sink.split

.sink.split:                                      ; preds = %25, %29, %41, %45
  %.sink = phi double [ %48, %45 ], [ %44, %41 ], [ %32, %29 ], [ %28, %25 ]
  store double %.sink, ptr %0, align 8, !tbaa !5
  br label %49

49:                                               ; preds = %.sink.split, %33, %17
  %.1 = add nsw i32 %.01921, %.1.v
  %50 = add nuw nsw i32 %.022, 1
  %51 = call noundef i32 @_ZNK5sc_dt10sc_bv_base6lengthEv(ptr noundef nonnull align 8 dereferenceable(24) %3)
  %52 = icmp slt i32 %50, %51
  br i1 %52, label %14, label %.loopexit, !llvm.loop !20

.loopexit:                                        ; preds = %49, %.preheader, %4, %9
  %.020 = phi i1 [ false, %9 ], [ false, %4 ], [ true, %.preheader ], [ true, %49 ]
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #5
  ret i1 %.020
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt16scfx_ieee_doubleC2Ed(ptr noundef nonnull align 8 dereferenceable(8), double noundef) unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double6is_nanEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double6is_infEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #3 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt11scfx_params3encEv(ptr noundef nonnull align 4 dereferenceable(28)) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_ZNK5sc_dt11scfx_params3iwlEv(ptr noundef nonnull align 4 dereferenceable(28)) local_unnamed_addr #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef double @_ZN5sc_dt9scfx_pow2Ei(i32 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt10sc_bv_base6lengthEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #4 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNK5sc_dt8sc_proxyINS_10sc_bv_baseEEixEi(ptr dead_on_unwind noalias writable sret(%"class.sc_dt::sc_bitref_r") align 8, ptr noundef nonnull align 8 dereferenceable(8), i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK5sc_dt11sc_bitref_rINS_10sc_bv_baseEE7to_boolEv(ptr noundef nonnull align 8 dereferenceable(12)) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTSN5sc_dt13sc_fxnum_fastE", !7, i64 0, !10, i64 8, !18, i64 36, !18, i64 37, !19, i64 40}
!7 = !{!"double", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTSN5sc_dt11scfx_paramsE", !11, i64 0, !15, i64 20, !16, i64 24}
!11 = !{!"_ZTSN5sc_dt16sc_fxtype_paramsE", !12, i64 0, !12, i64 4, !13, i64 8, !14, i64 12, !12, i64 16}
!12 = !{!"int", !8, i64 0}
!13 = !{!"_ZTSN5sc_dt9sc_q_modeE", !8, i64 0}
!14 = !{!"_ZTSN5sc_dt9sc_o_modeE", !8, i64 0}
!15 = !{!"_ZTSN5sc_dt6sc_encE", !8, i64 0}
!16 = !{!"_ZTSN5sc_dt16sc_fxcast_switchE", !17, i64 0}
!17 = !{!"_ZTSN5sc_dt9sc_switchE", !8, i64 0}
!18 = !{!"bool", !8, i64 0}
!19 = !{!"any pointer", !8, i64 0}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass