; LLVM IR from gem5/gem5 :: ext/drampower/src/MemPowerSpec.ll (ZN4Data12MemPowerSpecC1Ev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.Data::MemPowerSpec" = type { ptr, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, %"class.Data::Parametrisable" }
%"class.Data::Parametrisable" = type { ptr, %"class.std::vector" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Data::Parameter, std::allocator<Data::Parameter>>::_Vector_impl" }
%"struct.std::_Vector_base<Data::Parameter, std::allocator<Data::Parameter>>::_Vector_impl" = type { %"struct.std::_Vector_base<Data::Parameter, std::allocator<Data::Parameter>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Data::Parameter, std::allocator<Data::Parameter>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@_ZTVN4Data12MemPowerSpecE = external dso_local unnamed_addr constant { [5 x ptr], [7 x ptr] }, align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Data12MemPowerSpecC1Ev(ptr noundef nonnull align 8 dereferenceable(248) %0) unnamed_addr #0 align 2 {
  %2 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %3 = load ptr, ptr %2, align 8
  %4 = getelementptr inbounds i8, ptr %3, i64 248
  call void @_ZN4Data14ParametrisableC2Ev(ptr noundef nonnull align 8 dereferenceable(32) %4)
  store ptr getelementptr inbounds inrange(-24, 16) ({ [5 x ptr], [7 x ptr] }, ptr @_ZTVN4Data12MemPowerSpecE, i32 0, i32 0, i32 3), ptr %3, align 8, !tbaa !9
  %5 = getelementptr inbounds i8, ptr %3, i64 248
  store ptr getelementptr inbounds inrange(-32, 24) ({ [5 x ptr], [7 x ptr] }, ptr @_ZTVN4Data12MemPowerSpecE, i32 0, i32 1, i32 4), ptr %5, align 8, !tbaa !9
  %6 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %3, i32 0, i32 1
  store double 0.000000e+00, ptr %6, align 8, !tbaa !11
  %7 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %3, i32 0, i32 2
  store double 0.000000e+00, ptr %7, align 8, !tbaa !14
  %8 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %3, i32 0, i32 3
  store double 0.000000e+00, ptr %8, align 8, !tbaa !15
  %9 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %3, i32 0, i32 4
  store double 0.000000e+00, ptr %9, align 8, !tbaa !16
  %10 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %3, i32 0, i32 5
  store double 0.000000e+00, ptr %10, align 8, !tbaa !17
  %11 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %3, i32 0, i32 6
  store double 0.000000e+00, ptr %11, align 8, !tbaa !18
  %12 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %3, i32 0, i32 7
  store double 0.000000e+00, ptr %12, align 8, !tbaa !19
  %13 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %3, i32 0, i32 8
  store double 0.000000e+00, ptr %13, align 8, !tbaa !20
  %14 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %3, i32 0, i32 9
  store double 0.000000e+00, ptr %14, align 8, !tbaa !21
  %15 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %3, i32 0, i32 10
  store double 0.000000e+00, ptr %15, align 8, !tbaa !22
  %16 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %3, i32 0, i32 11
  store double 0.000000e+00, ptr %16, align 8, !tbaa !23
  %17 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %3, i32 0, i32 12
  store double 0.000000e+00, ptr %17, align 8, !tbaa !24
  %18 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %3, i32 0, i32 13
  store double 0.000000e+00, ptr %18, align 8, !tbaa !25
  %19 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %3, i32 0, i32 14
  store double 0.000000e+00, ptr %19, align 8, !tbaa !26
  %20 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %3, i32 0, i32 15
  store double 0.000000e+00, ptr %20, align 8, !tbaa !27
  %21 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %3, i32 0, i32 16
  store double 0.000000e+00, ptr %21, align 8, !tbaa !28
  %22 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %3, i32 0, i32 17
  store double 0.000000e+00, ptr %22, align 8, !tbaa !29
  %23 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %3, i32 0, i32 18
  store double 0.000000e+00, ptr %23, align 8, !tbaa !30
  %24 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %3, i32 0, i32 19
  store double 0.000000e+00, ptr %24, align 8, !tbaa !31
  %25 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %3, i32 0, i32 20
  store double 0.000000e+00, ptr %25, align 8, !tbaa !32
  %26 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %3, i32 0, i32 21
  store double 0.000000e+00, ptr %26, align 8, !tbaa !33
  %27 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %3, i32 0, i32 22
  store double 0.000000e+00, ptr %27, align 8, !tbaa !34
  %28 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %3, i32 0, i32 23
  store double 0.000000e+00, ptr %28, align 8, !tbaa !35
  %29 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %3, i32 0, i32 24
  store double 0.000000e+00, ptr %29, align 8, !tbaa !36
  %30 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %3, i32 0, i32 25
  store double 0.000000e+00, ptr %30, align 8, !tbaa !37
  %31 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %3, i32 0, i32 26
  store double 0.000000e+00, ptr %31, align 8, !tbaa !38
  %32 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %3, i32 0, i32 27
  store double 0.000000e+00, ptr %32, align 8, !tbaa !39
  %33 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %3, i32 0, i32 28
  store double 0.000000e+00, ptr %33, align 8, !tbaa !40
  %34 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %3, i32 0, i32 29
  store double 0.000000e+00, ptr %34, align 8, !tbaa !41
  %35 = getelementptr inbounds %"class.Data::MemPowerSpec", ptr %3, i32 0, i32 30
  store double 0.000000e+00, ptr %35, align 8, !tbaa !42
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4Data14ParametrisableC2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"vtable pointer", !8, i64 0}
!11 = !{!12, !13, i64 8}
!12 = !{!"_ZTSN4Data12MemPowerSpecE", !13, i64 8, !13, i64 16, !13, i64 24, !13, i64 32, !13, i64 40, !13, i64 48, !13, i64 56, !13, i64 64, !13, i64 72, !13, i64 80, !13, i64 88, !13, i64 96, !13, i64 104, !13, i64 112, !13, i64 120, !13, i64 128, !13, i64 136, !13, i64 144, !13, i64 152, !13, i64 160, !13, i64 168, !13, i64 176, !13, i64 184, !13, i64 192, !13, i64 200, !13, i64 208, !13, i64 216, !13, i64 224, !13, i64 232, !13, i64 240}
!13 = !{!"double", !7, i64 0}
!14 = !{!12, !13, i64 16}
!15 = !{!12, !13, i64 24}
!16 = !{!12, !13, i64 32}
!17 = !{!12, !13, i64 40}
!18 = !{!12, !13, i64 48}
!19 = !{!12, !13, i64 56}
!20 = !{!12, !13, i64 64}
!21 = !{!12, !13, i64 72}
!22 = !{!12, !13, i64 80}
!23 = !{!12, !13, i64 88}
!24 = !{!12, !13, i64 96}
!25 = !{!12, !13, i64 104}
!26 = !{!12, !13, i64 112}
!27 = !{!12, !13, i64 120}
!28 = !{!12, !13, i64 128}
!29 = !{!12, !13, i64 136}
!30 = !{!12, !13, i64 144}
!31 = !{!12, !13, i64 152}
!32 = !{!12, !13, i64 160}
!33 = !{!12, !13, i64 168}
!34 = !{!12, !13, i64 176}
!35 = !{!12, !13, i64 184}
!36 = !{!12, !13, i64 192}
!37 = !{!12, !13, i64 200}
!38 = !{!12, !13, i64 208}
!39 = !{!12, !13, i64 216}
!40 = !{!12, !13, i64 224}
!41 = !{!12, !13, i64 232}
!42 = !{!12, !13, i64 240}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZTVN4Data12MemPowerSpecE = external dso_local unnamed_addr constant { [5 x ptr], [7 x ptr] }, align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN4Data12MemPowerSpecC1Ev(ptr noundef nonnull align 8 dereferenceable(248) %0) unnamed_addr #0 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 248
  tail call void @_ZN4Data14ParametrisableC2Ev(ptr noundef nonnull align 8 dereferenceable(32) %2)
  store ptr getelementptr inbounds inrange(-24, 16) (i8, ptr @_ZTVN4Data12MemPowerSpecE, i64 24), ptr %0, align 8, !tbaa !5
  store ptr getelementptr inbounds inrange(-32, 24) (i8, ptr @_ZTVN4Data12MemPowerSpecE, i64 72), ptr %2, align 8, !tbaa !5
  %3 = getelementptr inbounds i8, ptr %0, i64 8
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(240) %3, i8 0, i64 240, i1 false)
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4Data14ParametrisableC2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #0 align 2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"vtable pointer", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,InstCombinePass,MemCpyOptPass,PostOrderFunctionAttrsPass,SROAPass,TailCallElimPass