; LLVM IR from gem5/gem5 :: src/systemc/tests/systemc/1666-2011-compliance/old_event_bug (old_event_bug)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%struct.Top = type { %"class.sc_core::sc_module", i32, i32, i8, [7 x i8], %"class.sc_core::sc_signal", %"class.sc_core::sc_signal.8", %"class.sc_core::sc_signal", %"class.sc_core::sc_signal.8" }
%"class.sc_core::sc_module" = type { %"class.sc_core::sc_object", %"class.sc_core::sc_process_host", %"class.sc_core::sc_sensitive", %"class.sc_core::sc_sensitive_pos", %"class.sc_core::sc_sensitive_neg", i8, ptr, i32, ptr, ptr }
%"class.sc_core::sc_object" = type { ptr, ptr, %"class.std::vector", %"class.std::vector.0", %"class.std::__cxx11::basic_string", ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.sc_core::sc_process_host" = type { ptr }
%"class.sc_core::sc_sensitive" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_pos" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_neg" = type { ptr, i32, ptr }
%"class.sc_core::sc_signal" = type <{ %"class.sc_core::sc_signal_inout_if", %"class.sc_core::sc_prim_channel", %"struct.sc_core::sc_writer_policy_check", ptr, i32, [4 x i8], i64, i32, [4 x i8] }>
%"class.sc_core::sc_signal_inout_if" = type { %"class.sc_core::sc_signal_in_if", %"class.sc_core::sc_signal_write_if" }
%"class.sc_core::sc_signal_in_if" = type { %"class.sc_core::sc_interface" }
%"class.sc_core::sc_interface" = type { ptr }
%"class.sc_core::sc_signal_write_if" = type { %"class.sc_core::sc_interface" }
%"class.sc_core::sc_prim_channel" = type { %"class.sc_core::sc_object", ptr, ptr }
%"struct.sc_core::sc_writer_policy_check" = type { %"struct.sc_core::sc_writer_policy_check_port", %"struct.sc_core::sc_writer_policy_check_write" }
%"struct.sc_core::sc_writer_policy_check_port" = type { ptr }
%"struct.sc_core::sc_writer_policy_check_write" = type { i8, ptr }
%"class.sc_core::sc_signal.8" = type { %"class.sc_core::sc_signal_inout_if.9", %"class.sc_core::sc_prim_channel", %"struct.sc_core::sc_writer_policy_check", ptr, i8, i64, ptr, i8, ptr, ptr }
%"class.sc_core::sc_signal_inout_if.9" = type { %"class.sc_core::sc_signal_in_if.10", %"class.sc_core::sc_signal_write_if.11" }
%"class.sc_core::sc_signal_in_if.10" = type { %"class.sc_core::sc_interface" }
%"class.sc_core::sc_signal_write_if.11" = type { %"class.sc_core::sc_interface" }
%"class.sc_core::sc_module_name" = type <{ ptr, ptr, ptr, ptr, i8, [7 x i8] }>

@.str = external hidden unnamed_addr constant [4 x i8], align 1
@_ZN7sc_core23SC_ID_ASSERTION_FAILED_E = external constant [0 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [16 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [122 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [16 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [20 x i8], align 1
@_ZSt4cout = external global %"class.std::basic_ostream", align 8
@.str.6 = external hidden unnamed_addr constant [8 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local i32 @sc_main(i32 noundef %0, ptr noundef %1) #0 personality ptr @__gxx_personality_v0 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca %struct.Top, align 8
  %6 = alloca %"class.sc_core::sc_module_name", align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1096, ptr %5) #6
  call void @_ZN7sc_core14sc_module_nameC1EPKc(ptr noundef nonnull align 8 dereferenceable(33) %6, ptr noundef @.str)
  invoke void @_ZN3TopC2EN7sc_core14sc_module_nameE(ptr noundef nonnull align 8 dereferenceable(1096) %5, ptr noundef %6)
          to label %9 unwind label %41

9:                                                ; preds = %2
  call void @_ZN7sc_core14sc_module_nameD1Ev(ptr noundef nonnull align 8 dereferenceable(33) %6) #6
  invoke void @_ZN7sc_core8sc_startEv()
          to label %10 unwind label %45

10:                                               ; preds = %9
  %11 = getelementptr inbounds %struct.Top, ptr %5, i32 0, i32 1
  %12 = load i32, ptr %11, align 8, !tbaa !11
  %13 = icmp eq i32 %12, 2
  br i1 %13, label %14, label %15

14:                                               ; preds = %10
  br label %17

15:                                               ; preds = %10
  invoke void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef 3, ptr noundef @_ZN7sc_core23SC_ID_ASSERTION_FAILED_E, ptr noundef @.str.2, ptr noundef @.str.3, i32 noundef 140)
          to label %16 unwind label %45

16:                                               ; preds = %15
  br label %17

17:                                               ; preds = %16, %14
  %18 = phi i32 [ 0, %14 ], [ 0, %16 ]
  %19 = getelementptr inbounds %struct.Top, ptr %5, i32 0, i32 2
  %20 = load i32, ptr %19, align 4, !tbaa !47
  %21 = icmp eq i32 %20, 2
  br i1 %21, label %22, label %23

22:                                               ; preds = %17
  br label %25

23:                                               ; preds = %17
  invoke void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef 3, ptr noundef @_ZN7sc_core23SC_ID_ASSERTION_FAILED_E, ptr noundef @.str.4, ptr noundef @.str.3, i32 noundef 141)
          to label %24 unwind label %45

24:                                               ; preds = %23
  br label %25

25:                                               ; preds = %24, %22
  %26 = phi i32 [ 0, %22 ], [ 0, %24 ]
  %27 = getelementptr inbounds %struct.Top, ptr %5, i32 0, i32 3
  %28 = load i8, ptr %27, align 8, !tbaa !48, !range !49, !noundef !50
  %29 = trunc i8 %28 to i1
  br i1 %29, label %30, label %31

30:                                               ; preds = %25
  br label %33

31:                                               ; preds = %25
  invoke void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef 3, ptr noundef @_ZN7sc_core23SC_ID_ASSERTION_FAILED_E, ptr noundef @.str.5, ptr noundef @.str.3, i32 noundef 142)
          to label %32 unwind label %45

32:                                               ; preds = %31
  br label %33

33:                                               ; preds = %32, %30
  %34 = phi i32 [ 0, %30 ], [ 0, %32 ]
  %35 = invoke noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, ptr noundef @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
          to label %36 unwind label %45

36:                                               ; preds = %33
  %37 = invoke noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) %35, ptr noundef @.str.6)
          to label %38 unwind label %45

38:                                               ; preds = %36
  %39 = invoke noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %37, ptr noundef @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
          to label %40 unwind label %45

40:                                               ; preds = %38
  call void @_ZN3TopD2Ev(ptr noundef nonnull align 8 dereferenceable(1096) %5) #6
  call void @llvm.lifetime.end.p0(i64 1096, ptr %5) #6
  ret i32 0

41:                                               ; preds = %2
  %42 = landingpad { ptr, i32 }
          cleanup
  %43 = extractvalue { ptr, i32 } %42, 0
  store ptr %43, ptr %7, align 8
  %44 = extractvalue { ptr, i32 } %42, 1
  store i32 %44, ptr %8, align 4
  call void @_ZN7sc_core14sc_module_nameD1Ev(ptr noundef nonnull align 8 dereferenceable(33) %6) #6
  br label %49

45:                                               ; preds = %38, %36, %33, %31, %23, %15, %9
  %46 = landingpad { ptr, i32 }
          cleanup
  %47 = extractvalue { ptr, i32 } %46, 0
  store ptr %47, ptr %7, align 8
  %48 = extractvalue { ptr, i32 } %46, 1
  store i32 %48, ptr %8, align 4
  call void @_ZN3TopD2Ev(ptr noundef nonnull align 8 dereferenceable(1096) %5) #6
  br label %49

49:                                               ; preds = %45, %41
  call void @llvm.lifetime.end.p0(i64 1096, ptr %5) #6
  br label %50

50:                                               ; preds = %49
  %51 = load ptr, ptr %7, align 8
  %52 = load i32, ptr %8, align 4
  %53 = insertvalue { ptr, i32 } poison, ptr %51, 0
  %54 = insertvalue { ptr, i32 } %53, i32 %52, 1
  resume { ptr, i32 } %54
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @_ZN7sc_core14sc_module_nameC1EPKc(ptr noundef nonnull align 8 dereferenceable(33), ptr noundef) unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN3TopC2EN7sc_core14sc_module_nameE(ptr noundef nonnull align 8 dereferenceable(1096), ptr noundef) unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nounwind
declare void @_ZN7sc_core14sc_module_nameD1Ev(ptr noundef nonnull align 8 dereferenceable(33)) unnamed_addr #3

declare void @_ZN7sc_core8sc_startEv() #2

declare void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) #2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) #4

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(8)) #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN3TopD2Ev(ptr noundef nonnull align 8 dereferenceable(1096)) unnamed_addr #5 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !6, i64 232}
!12 = !{!"_ZTS3Top", !13, i64 0, !6, i64 232, !6, i64 236, !33, i64 240, !34, i64 248, !43, i64 448, !34, i64 672, !43, i64 872}
!13 = !{!"_ZTSN7sc_core9sc_moduleE", !14, i64 0, !26, i64 112, !27, i64 120, !29, i64 144, !31, i64 168, !33, i64 192, !10, i64 200, !6, i64 208, !10, i64 216, !10, i64 224}
!14 = !{!"_ZTSN7sc_core9sc_objectE", !10, i64 8, !15, i64 16, !19, i64 40, !23, i64 64, !10, i64 96, !10, i64 104}
!15 = !{!"_ZTSSt6vectorIPN7sc_core8sc_eventESaIS2_EE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE17_Vector_impl_dataE", !10, i64 0, !10, i64 8, !10, i64 16}
!19 = !{!"_ZTSSt6vectorIPN7sc_core9sc_objectESaIS2_EE", !20, i64 0}
!20 = !{!"_ZTSSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE12_Vector_implE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE17_Vector_impl_dataE", !10, i64 0, !10, i64 8, !10, i64 16}
!23 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !24, i64 0, !25, i64 8, !7, i64 16}
!24 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !10, i64 0}
!25 = !{!"long", !7, i64 0}
!26 = !{!"_ZTSN7sc_core15sc_process_hostE"}
!27 = !{!"_ZTSN7sc_core12sc_sensitiveE", !10, i64 0, !28, i64 8, !10, i64 16}
!28 = !{!"_ZTSN7sc_core12sc_sensitiveUt_E", !7, i64 0}
!29 = !{!"_ZTSN7sc_core16sc_sensitive_posE", !10, i64 0, !30, i64 8, !10, i64 16}
!30 = !{!"_ZTSN7sc_core16sc_sensitive_posUt_E", !7, i64 0}
!31 = !{!"_ZTSN7sc_core16sc_sensitive_negE", !10, i64 0, !32, i64 8, !10, i64 16}
!32 = !{!"_ZTSN7sc_core16sc_sensitive_negUt_E", !7, i64 0}
!33 = !{!"bool", !7, i64 0}
!34 = !{!"_ZTSN7sc_core9sc_signalIiLNS_16sc_writer_policyE0EEE", !35, i64 0, !38, i64 16, !39, i64 144, !10, i64 168, !6, i64 176, !42, i64 184, !6, i64 192}
!35 = !{!"_ZTSN7sc_core18sc_signal_inout_ifIiEE", !36, i64 0, !37, i64 8}
!36 = !{!"_ZTSN7sc_core15sc_signal_in_ifIiEE"}
!37 = !{!"_ZTSN7sc_core18sc_signal_write_ifIiEE"}
!38 = !{!"_ZTSN7sc_core15sc_prim_channelE", !14, i64 0, !10, i64 112, !10, i64 120}
!39 = !{!"_ZTSN7sc_core22sc_writer_policy_checkILNS_16sc_writer_policyE0EEE", !40, i64 0, !41, i64 8}
!40 = !{!"_ZTSN7sc_core27sc_writer_policy_check_portE", !10, i64 0}
!41 = !{!"_ZTSN7sc_core28sc_writer_policy_check_writeE", !33, i64 0, !10, i64 8}
!42 = !{!"long long", !7, i64 0}
!43 = !{!"_ZTSN7sc_core9sc_signalIbLNS_16sc_writer_policyE0EEE", !44, i64 0, !38, i64 16, !39, i64 144, !10, i64 168, !33, i64 176, !42, i64 184, !10, i64 192, !33, i64 200, !10, i64 208, !10, i64 216}
!44 = !{!"_ZTSN7sc_core18sc_signal_inout_ifIbEE", !45, i64 0, !46, i64 8}
!45 = !{!"_ZTSN7sc_core15sc_signal_in_ifIbEE"}
!46 = !{!"_ZTSN7sc_core18sc_signal_write_ifIbEE"}
!47 = !{!12, !6, i64 236}
!48 = !{!12, !33, i64 240}
!49 = !{i8 0, i8 2}
!50 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%struct.Top = type { %"class.sc_core::sc_module", i32, i32, i8, [7 x i8], %"class.sc_core::sc_signal", %"class.sc_core::sc_signal.8", %"class.sc_core::sc_signal", %"class.sc_core::sc_signal.8" }
%"class.sc_core::sc_module" = type { %"class.sc_core::sc_object", %"class.sc_core::sc_process_host", %"class.sc_core::sc_sensitive", %"class.sc_core::sc_sensitive_pos", %"class.sc_core::sc_sensitive_neg", i8, ptr, i32, ptr, ptr }
%"class.sc_core::sc_object" = type { ptr, ptr, %"class.std::vector", %"class.std::vector.0", %"class.std::__cxx11::basic_string", ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.sc_core::sc_process_host" = type { ptr }
%"class.sc_core::sc_sensitive" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_pos" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_neg" = type { ptr, i32, ptr }
%"class.sc_core::sc_signal" = type <{ %"class.sc_core::sc_signal_inout_if", %"class.sc_core::sc_prim_channel", %"struct.sc_core::sc_writer_policy_check", ptr, i32, [4 x i8], i64, i32, [4 x i8] }>
%"class.sc_core::sc_signal_inout_if" = type { %"class.sc_core::sc_signal_in_if", %"class.sc_core::sc_signal_write_if" }
%"class.sc_core::sc_signal_in_if" = type { %"class.sc_core::sc_interface" }
%"class.sc_core::sc_interface" = type { ptr }
%"class.sc_core::sc_signal_write_if" = type { %"class.sc_core::sc_interface" }
%"class.sc_core::sc_prim_channel" = type { %"class.sc_core::sc_object", ptr, ptr }
%"struct.sc_core::sc_writer_policy_check" = type { %"struct.sc_core::sc_writer_policy_check_port", %"struct.sc_core::sc_writer_policy_check_write" }
%"struct.sc_core::sc_writer_policy_check_port" = type { ptr }
%"struct.sc_core::sc_writer_policy_check_write" = type { i8, ptr }
%"class.sc_core::sc_signal.8" = type { %"class.sc_core::sc_signal_inout_if.9", %"class.sc_core::sc_prim_channel", %"struct.sc_core::sc_writer_policy_check", ptr, i8, i64, ptr, i8, ptr, ptr }
%"class.sc_core::sc_signal_inout_if.9" = type { %"class.sc_core::sc_signal_in_if.10", %"class.sc_core::sc_signal_write_if.11" }
%"class.sc_core::sc_signal_in_if.10" = type { %"class.sc_core::sc_interface" }
%"class.sc_core::sc_signal_write_if.11" = type { %"class.sc_core::sc_interface" }
%"class.sc_core::sc_module_name" = type <{ ptr, ptr, ptr, ptr, i8, [7 x i8] }>

@.str = external hidden unnamed_addr constant [4 x i8], align 1
@_ZN7sc_core23SC_ID_ASSERTION_FAILED_E = external constant [0 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [16 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [122 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [16 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [20 x i8], align 1
@_ZSt4cout = external global %"class.std::basic_ostream", align 8
@.str.6 = external hidden unnamed_addr constant [8 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @sc_main(i32 noundef %0, ptr nocapture noundef readnone %1) local_unnamed_addr #0 personality ptr @__gxx_personality_v0 {
  %3 = alloca %struct.Top, align 8
  %4 = alloca %"class.sc_core::sc_module_name", align 8
  call void @llvm.lifetime.start.p0(i64 1096, ptr nonnull %3) #6
  call void @_ZN7sc_core14sc_module_nameC1EPKc(ptr noundef nonnull align 8 dereferenceable(33) %4, ptr noundef nonnull @.str)
  invoke void @_ZN3TopC2EN7sc_core14sc_module_nameE(ptr noundef nonnull align 8 dereferenceable(1096) %3, ptr noundef nonnull %4)
          to label %5 unwind label %28

5:                                                ; preds = %2
  call void @_ZN7sc_core14sc_module_nameD1Ev(ptr noundef nonnull align 8 dereferenceable(33) %4) #6
  invoke void @_ZN7sc_core8sc_startEv()
          to label %6 unwind label %30

6:                                                ; preds = %5
  %7 = getelementptr inbounds i8, ptr %3, i64 232
  %8 = load i32, ptr %7, align 8, !tbaa !5
  %9 = icmp eq i32 %8, 2
  br i1 %9, label %11, label %10

10:                                               ; preds = %6
  invoke void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef 3, ptr noundef nonnull @_ZN7sc_core23SC_ID_ASSERTION_FAILED_E, ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.3, i32 noundef 140)
          to label %11 unwind label %30

11:                                               ; preds = %10, %6
  %12 = getelementptr inbounds i8, ptr %3, i64 236
  %13 = load i32, ptr %12, align 4, !tbaa !45
  %14 = icmp eq i32 %13, 2
  br i1 %14, label %16, label %15

15:                                               ; preds = %11
  invoke void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef 3, ptr noundef nonnull @_ZN7sc_core23SC_ID_ASSERTION_FAILED_E, ptr noundef nonnull @.str.4, ptr noundef nonnull @.str.3, i32 noundef 141)
          to label %16 unwind label %30

16:                                               ; preds = %15, %11
  %17 = getelementptr inbounds i8, ptr %3, i64 240
  %18 = load i8, ptr %17, align 8, !tbaa !46, !range !47, !noundef !48
  %19 = trunc nuw i8 %18 to i1
  br i1 %19, label %21, label %20

20:                                               ; preds = %16
  invoke void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef 3, ptr noundef nonnull @_ZN7sc_core23SC_ID_ASSERTION_FAILED_E, ptr noundef nonnull @.str.5, ptr noundef nonnull @.str.3, i32 noundef 142)
          to label %21 unwind label %30

21:                                               ; preds = %20, %16
  %22 = invoke noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, ptr noundef nonnull @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
          to label %23 unwind label %30

23:                                               ; preds = %21
  %24 = invoke noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) %22, ptr noundef nonnull @.str.6)
          to label %25 unwind label %30

25:                                               ; preds = %23
  %26 = invoke noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %24, ptr noundef nonnull @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
          to label %27 unwind label %30

27:                                               ; preds = %25
  call void @_ZN3TopD2Ev(ptr noundef nonnull align 8 dereferenceable(1096) %3) #6
  call void @llvm.lifetime.end.p0(i64 1096, ptr nonnull %3) #6
  ret i32 0

28:                                               ; preds = %2
  %29 = landingpad { ptr, i32 }
          cleanup
  call void @_ZN7sc_core14sc_module_nameD1Ev(ptr noundef nonnull align 8 dereferenceable(33) %4) #6
  br label %32

30:                                               ; preds = %25, %23, %21, %20, %15, %10, %5
  %31 = landingpad { ptr, i32 }
          cleanup
  call void @_ZN3TopD2Ev(ptr noundef nonnull align 8 dereferenceable(1096) %3) #6
  br label %32

32:                                               ; preds = %30, %28
  %.pn = phi { ptr, i32 } [ %31, %30 ], [ %29, %28 ]
  call void @llvm.lifetime.end.p0(i64 1096, ptr nonnull %3) #6
  resume { ptr, i32 } %.pn
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @_ZN7sc_core14sc_module_nameC1EPKc(ptr noundef nonnull align 8 dereferenceable(33), ptr noundef) unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN3TopC2EN7sc_core14sc_module_nameE(ptr noundef nonnull align 8 dereferenceable(1096), ptr noundef) unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nounwind
declare void @_ZN7sc_core14sc_module_nameD1Ev(ptr noundef nonnull align 8 dereferenceable(33)) unnamed_addr #3

declare void @_ZN7sc_core8sc_startEv() local_unnamed_addr #2

declare void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) local_unnamed_addr #4

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(8)) #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN3TopD2Ev(ptr noundef nonnull align 8 dereferenceable(1096)) unnamed_addr #5 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !31, i64 232}
!6 = !{!"_ZTS3Top", !7, i64 0, !31, i64 232, !31, i64 236, !30, i64 240, !32, i64 248, !41, i64 448, !32, i64 672, !41, i64 872}
!7 = !{!"_ZTSN7sc_core9sc_moduleE", !8, i64 0, !23, i64 112, !24, i64 120, !26, i64 144, !28, i64 168, !30, i64 192, !9, i64 200, !31, i64 208, !9, i64 216, !9, i64 224}
!8 = !{!"_ZTSN7sc_core9sc_objectE", !9, i64 8, !12, i64 16, !16, i64 40, !20, i64 64, !9, i64 96, !9, i64 104}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C++ TBAA"}
!12 = !{!"_ZTSSt6vectorIPN7sc_core8sc_eventESaIS2_EE", !13, i64 0}
!13 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE", !14, i64 0}
!14 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE12_Vector_implE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!16 = !{!"_ZTSSt6vectorIPN7sc_core9sc_objectESaIS2_EE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!20 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !21, i64 0, !22, i64 8, !10, i64 16}
!21 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !9, i64 0}
!22 = !{!"long", !10, i64 0}
!23 = !{!"_ZTSN7sc_core15sc_process_hostE"}
!24 = !{!"_ZTSN7sc_core12sc_sensitiveE", !9, i64 0, !25, i64 8, !9, i64 16}
!25 = !{!"_ZTSN7sc_core12sc_sensitiveUt_E", !10, i64 0}
!26 = !{!"_ZTSN7sc_core16sc_sensitive_posE", !9, i64 0, !27, i64 8, !9, i64 16}
!27 = !{!"_ZTSN7sc_core16sc_sensitive_posUt_E", !10, i64 0}
!28 = !{!"_ZTSN7sc_core16sc_sensitive_negE", !9, i64 0, !29, i64 8, !9, i64 16}
!29 = !{!"_ZTSN7sc_core16sc_sensitive_negUt_E", !10, i64 0}
!30 = !{!"bool", !10, i64 0}
!31 = !{!"int", !10, i64 0}
!32 = !{!"_ZTSN7sc_core9sc_signalIiLNS_16sc_writer_policyE0EEE", !33, i64 0, !36, i64 16, !37, i64 144, !9, i64 168, !31, i64 176, !40, i64 184, !31, i64 192}
!33 = !{!"_ZTSN7sc_core18sc_signal_inout_ifIiEE", !34, i64 0, !35, i64 8}
!34 = !{!"_ZTSN7sc_core15sc_signal_in_ifIiEE"}
!35 = !{!"_ZTSN7sc_core18sc_signal_write_ifIiEE"}
!36 = !{!"_ZTSN7sc_core15sc_prim_channelE", !8, i64 0, !9, i64 112, !9, i64 120}
!37 = !{!"_ZTSN7sc_core22sc_writer_policy_checkILNS_16sc_writer_policyE0EEE", !38, i64 0, !39, i64 8}
!38 = !{!"_ZTSN7sc_core27sc_writer_policy_check_portE", !9, i64 0}
!39 = !{!"_ZTSN7sc_core28sc_writer_policy_check_writeE", !30, i64 0, !9, i64 8}
!40 = !{!"long long", !10, i64 0}
!41 = !{!"_ZTSN7sc_core9sc_signalIbLNS_16sc_writer_policyE0EEE", !42, i64 0, !36, i64 16, !37, i64 144, !9, i64 168, !30, i64 176, !40, i64 184, !9, i64 192, !30, i64 200, !9, i64 208, !9, i64 216}
!42 = !{!"_ZTSN7sc_core18sc_signal_inout_ifIbEE", !43, i64 0, !44, i64 8}
!43 = !{!"_ZTSN7sc_core15sc_signal_in_ifIbEE"}
!44 = !{!"_ZTSN7sc_core18sc_signal_write_ifIbEE"}
!45 = !{!6, !31, i64 236}
!46 = !{!6, !30, i64 240}
!47 = !{i8 0, i8 2}
!48 = !{}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass