; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/datatypes/int/sc_nbutils.ll (ZN5sc_dt15vec_shift_rightEiPjij)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt12one_and_onesEi(i32 noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5sc_dt15vec_shift_rightEiPjij(i32 noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) #2 {
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca ptr, align 8
  %14 = alloca ptr, align 8
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  store i32 %0, ptr %5, align 4, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !5
  store i32 %3, ptr %8, align 4, !tbaa !5
  %19 = load i32, ptr %7, align 4, !tbaa !5
  %20 = icmp sle i32 %19, 0
  br i1 %20, label %21, label %22

21:                                               ; preds = %4
  br label %140

22:                                               ; preds = %4
  %23 = load i32, ptr %7, align 4, !tbaa !5
  %24 = icmp sge i32 %23, 30
  br i1 %24, label %25, label %105

25:                                               ; preds = %22
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %26 = load i32, ptr %7, align 4, !tbaa !5
  %27 = srem i32 %26, 30
  %28 = icmp eq i32 %27, 0
  br i1 %28, label %29, label %32

29:                                               ; preds = %25
  %30 = load i32, ptr %7, align 4, !tbaa !5
  %31 = sdiv i32 %30, 30
  store i32 %31, ptr %9, align 4, !tbaa !5
  store i32 0, ptr %7, align 4, !tbaa !5
  br label %42

32:                                               ; preds = %25
  %33 = load i32, ptr %7, align 4, !tbaa !5
  %34 = sub nsw i32 %33, 1
  %35 = sdiv i32 %34, 30
  %36 = add nsw i32 %35, 1
  %37 = sub nsw i32 %36, 1
  store i32 %37, ptr %9, align 4, !tbaa !5
  %38 = load i32, ptr %9, align 4, !tbaa !5
  %39 = mul nsw i32 %38, 30
  %40 = load i32, ptr %7, align 4, !tbaa !5
  %41 = sub nsw i32 %40, %39
  store i32 %41, ptr %7, align 4, !tbaa !5
  br label %42

42:                                               ; preds = %32, %29
  %43 = load i32, ptr %9, align 4, !tbaa !5
  %44 = icmp ne i32 %43, 0
  br i1 %44, label %45, label %97

45:                                               ; preds = %42
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  store i32 0, ptr %10, align 4, !tbaa !5
  br label %46

46:                                               ; preds = %65, %45
  %47 = load i32, ptr %10, align 4, !tbaa !5
  %48 = load i32, ptr %5, align 4, !tbaa !5
  %49 = load i32, ptr %9, align 4, !tbaa !5
  %50 = sub nsw i32 %48, %49
  %51 = icmp slt i32 %47, %50
  br i1 %51, label %53, label %52

52:                                               ; preds = %46
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  br label %68

53:                                               ; preds = %46
  %54 = load ptr, ptr %6, align 8, !tbaa !9
  %55 = load i32, ptr %10, align 4, !tbaa !5
  %56 = load i32, ptr %9, align 4, !tbaa !5
  %57 = add nsw i32 %55, %56
  %58 = sext i32 %57 to i64
  %59 = getelementptr inbounds i32, ptr %54, i64 %58
  %60 = load i32, ptr %59, align 4, !tbaa !5
  %61 = load ptr, ptr %6, align 8, !tbaa !9
  %62 = load i32, ptr %10, align 4, !tbaa !5
  %63 = sext i32 %62 to i64
  %64 = getelementptr inbounds i32, ptr %61, i64 %63
  store i32 %60, ptr %64, align 4, !tbaa !5
  br label %65

65:                                               ; preds = %53
  %66 = load i32, ptr %10, align 4, !tbaa !5
  %67 = add nsw i32 %66, 1
  store i32 %67, ptr %10, align 4, !tbaa !5
  br label %46, !llvm.loop !11

68:                                               ; preds = %52
  %69 = load i32, ptr %8, align 4, !tbaa !5
  %70 = icmp ne i32 %69, 0
  br i1 %70, label %71, label %90

71:                                               ; preds = %68
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  %72 = load i32, ptr %5, align 4, !tbaa !5
  %73 = call noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %9, ptr noundef nonnull align 4 dereferenceable(4) %5)
  %74 = sub nsw i32 %72, %73
  store i32 %74, ptr %11, align 4, !tbaa !5
  br label %75

75:                                               ; preds = %86, %71
  %76 = load i32, ptr %11, align 4, !tbaa !5
  %77 = load i32, ptr %5, align 4, !tbaa !5
  %78 = icmp slt i32 %76, %77
  br i1 %78, label %80, label %79

79:                                               ; preds = %75
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  br label %89

80:                                               ; preds = %75
  %81 = load i32, ptr %8, align 4, !tbaa !5
  %82 = load ptr, ptr %6, align 8, !tbaa !9
  %83 = load i32, ptr %11, align 4, !tbaa !5
  %84 = sext i32 %83 to i64
  %85 = getelementptr inbounds i32, ptr %82, i64 %84
  store i32 %81, ptr %85, align 4, !tbaa !5
  br label %86

86:                                               ; preds = %80
  %87 = load i32, ptr %11, align 4, !tbaa !5
  %88 = add nsw i32 %87, 1
  store i32 %88, ptr %11, align 4, !tbaa !5
  br label %75, !llvm.loop !13

89:                                               ; preds = %79
  br label %96

90:                                               ; preds = %68
  %91 = load i32, ptr %5, align 4, !tbaa !5
  %92 = call noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %9, ptr noundef nonnull align 4 dereferenceable(4) %5)
  %93 = sub nsw i32 %91, %92
  %94 = load i32, ptr %5, align 4, !tbaa !5
  %95 = load ptr, ptr %6, align 8, !tbaa !9
  call void @_ZN5sc_dt8vec_zeroEiiPj(i32 noundef %93, i32 noundef %94, ptr noundef %95)
  br label %96

96:                                               ; preds = %90, %89
  br label %97

97:                                               ; preds = %96, %42
  %98 = load i32, ptr %7, align 4, !tbaa !5
  %99 = icmp eq i32 %98, 0
  br i1 %99, label %100, label %101

100:                                              ; preds = %97
  store i32 1, ptr %12, align 4
  br label %102

101:                                              ; preds = %97
  store i32 0, ptr %12, align 4
  br label %102

102:                                              ; preds = %101, %100
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  %103 = load i32, ptr %12, align 4
  switch i32 %103, label %141 [
    i32 0, label %104
    i32 1, label %140
  ]

104:                                              ; preds = %102
  br label %105

105:                                              ; preds = %104, %22
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #3
  %106 = load ptr, ptr %6, align 8, !tbaa !9
  store ptr %106, ptr %13, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #3
  %107 = load ptr, ptr %13, align 8, !tbaa !9
  %108 = load i32, ptr %5, align 4, !tbaa !5
  %109 = sext i32 %108 to i64
  %110 = getelementptr inbounds i32, ptr %107, i64 %109
  store ptr %110, ptr %14, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  %111 = load i32, ptr %7, align 4, !tbaa !5
  %112 = sub nsw i32 30, %111
  store i32 %112, ptr %15, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #3
  %113 = load i32, ptr %7, align 4, !tbaa !5
  %114 = call noundef i32 @_ZN5sc_dt12one_and_onesEi(i32 noundef %113)
  store i32 %114, ptr %16, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #3
  %115 = load i32, ptr %8, align 4, !tbaa !5
  %116 = load i32, ptr %16, align 4, !tbaa !5
  %117 = and i32 %115, %116
  %118 = load i32, ptr %15, align 4, !tbaa !5
  %119 = shl i32 %117, %118
  store i32 %119, ptr %17, align 4, !tbaa !5
  br label %120

120:                                              ; preds = %124, %105
  %121 = load ptr, ptr %13, align 8, !tbaa !9
  %122 = load ptr, ptr %14, align 8, !tbaa !9
  %123 = icmp ult ptr %121, %122
  br i1 %123, label %124, label %139

124:                                              ; preds = %120
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #3
  %125 = load ptr, ptr %14, align 8, !tbaa !9
  %126 = getelementptr inbounds i32, ptr %125, i32 -1
  store ptr %126, ptr %14, align 8, !tbaa !9
  %127 = load i32, ptr %126, align 4, !tbaa !5
  store i32 %127, ptr %18, align 4, !tbaa !5
  %128 = load i32, ptr %18, align 4, !tbaa !5
  %129 = load i32, ptr %7, align 4, !tbaa !5
  %130 = lshr i32 %128, %129
  %131 = load i32, ptr %17, align 4, !tbaa !5
  %132 = or i32 %130, %131
  %133 = load ptr, ptr %14, align 8, !tbaa !9
  store i32 %132, ptr %133, align 4, !tbaa !5
  %134 = load i32, ptr %18, align 4, !tbaa !5
  %135 = load i32, ptr %16, align 4, !tbaa !5
  %136 = and i32 %134, %135
  %137 = load i32, ptr %15, align 4, !tbaa !5
  %138 = shl i32 %136, %137
  store i32 %138, ptr %17, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #3
  br label %120, !llvm.loop !14

139:                                              ; preds = %120
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #3
  br label %140

140:                                              ; preds = %139, %102, %21
  ret void

141:                                              ; preds = %102
  unreachable
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt8vec_zeroEiiPj(i32 noundef, i32 noundef, ptr noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt12one_and_onesEi(i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN5sc_dt15vec_shift_rightEiPjij(i32 noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #2 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store i32 %0, ptr %5, align 4, !tbaa !5
  %7 = icmp slt i32 %2, 1
  br i1 %7, label %.loopexit, label %8

8:                                                ; preds = %4
  %9 = icmp ugt i32 %2, 29
  br i1 %9, label %10, label %43

10:                                               ; preds = %8
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
  %11 = urem i32 %2, 30
  %12 = udiv i32 %2, 30
  %13 = icmp eq i32 %11, 0
  br i1 %13, label %.thread, label %14

.thread:                                          ; preds = %10
  store i32 %12, ptr %6, align 4
  br label %.preheader

14:                                               ; preds = %10
  %15 = add nsw i32 %2, -1
  %16 = udiv i32 %15, 30
  %.neg = mul nsw i32 %16, -30
  %17 = add nsw i32 %.neg, %2
  store i32 %16, ptr %6, align 4
  %.not = icmp eq i32 %2, 30
  br i1 %.not, label %.loopexit46, label %.preheader

.preheader:                                       ; preds = %.thread, %14
  %.064 = phi i32 [ 0, %.thread ], [ %17, %14 ]
  %.sink63 = phi i32 [ %12, %.thread ], [ %16, %14 ]
  %18 = sub nsw i32 %0, %.sink63
  %19 = icmp sgt i32 %18, 0
  br i1 %19, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %.preheader
  %20 = zext nneg i32 %.sink63 to i64
  %wide.trip.count = zext nneg i32 %18 to i64
  %invariant.gep = getelementptr inbounds i32, ptr %1, i64 %20
  %min.iters.check = icmp ult i32 %18, 8
  br i1 %min.iters.check, label %.lr.ph.preheader79, label %vector.ph

.lr.ph.preheader79:                               ; preds = %middle.block, %.lr.ph.preheader
  %indvars.iv.ph = phi i64 [ 0, %.lr.ph.preheader ], [ %n.vec, %middle.block ]
  br label %.lr.ph

vector.ph:                                        ; preds = %.lr.ph.preheader
  %n.vec = and i64 %wide.trip.count, 2147483640
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %21 = getelementptr inbounds i32, ptr %invariant.gep, i64 %index
  %22 = getelementptr inbounds i8, ptr %21, i64 16
  %wide.load = load <4 x i32>, ptr %21, align 4, !tbaa !5
  %wide.load66 = load <4 x i32>, ptr %22, align 4, !tbaa !5
  %23 = getelementptr inbounds i32, ptr %1, i64 %index
  %24 = getelementptr inbounds i8, ptr %23, i64 16
  store <4 x i32> %wide.load, ptr %23, align 4, !tbaa !5
  store <4 x i32> %wide.load66, ptr %24, align 4, !tbaa !5
  %index.next = add nuw i64 %index, 8
  %25 = icmp eq i64 %index.next, %n.vec
  br i1 %25, label %middle.block, label %vector.body, !llvm.loop !9

middle.block:                                     ; preds = %vector.body
  %cmp.n = icmp eq i64 %n.vec, %wide.trip.count
  br i1 %cmp.n, label %._crit_edge, label %.lr.ph.preheader79

._crit_edge:                                      ; preds = %.lr.ph, %middle.block, %.preheader
  %.not44 = icmp eq i32 %3, 0
  %26 = call noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %6, ptr noundef nonnull align 4 dereferenceable(4) %5)
  %27 = sub nsw i32 %0, %26
  %28 = load i32, ptr %5, align 4, !tbaa !5
  br i1 %.not44, label %42, label %31

.lr.ph:                                           ; preds = %.lr.ph.preheader79, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ %indvars.iv.ph, %.lr.ph.preheader79 ]
  %gep = getelementptr inbounds i32, ptr %invariant.gep, i64 %indvars.iv
  %29 = load i32, ptr %gep, align 4, !tbaa !5
  %30 = getelementptr inbounds i32, ptr %1, i64 %indvars.iv
  store i32 %29, ptr %30, align 4, !tbaa !5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !13

31:                                               ; preds = %._crit_edge
  %32 = icmp slt i32 %27, %28
  br i1 %32, label %.lr.ph50.preheader, label %.loopexit46

.lr.ph50.preheader:                               ; preds = %31
  %33 = sext i32 %27 to i64
  %34 = add i32 %26, %28
  %35 = xor i32 %0, -1
  %36 = add i32 %34, %35
  %37 = zext i32 %36 to i64
  %38 = add nuw nsw i64 %37, 1
  %min.iters.check69 = icmp ult i32 %36, 7
  br i1 %min.iters.check69, label %.lr.ph50.preheader78, label %vector.ph70

vector.ph70:                                      ; preds = %.lr.ph50.preheader
  %n.vec72 = and i64 %38, 8589934584
  %ind.end = add nsw i64 %n.vec72, %33
  %broadcast.splatinsert = insertelement <4 x i32> poison, i32 %3, i64 0
  %broadcast.splat = shufflevector <4 x i32> %broadcast.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer
  %invariant.gep80 = getelementptr i32, ptr %1, i64 %33
  br label %vector.body74

vector.body74:                                    ; preds = %vector.body74, %vector.ph70
  %index75 = phi i64 [ 0, %vector.ph70 ], [ %index.next76, %vector.body74 ]
  %gep81 = getelementptr i32, ptr %invariant.gep80, i64 %index75
  %39 = getelementptr inbounds i8, ptr %gep81, i64 16
  store <4 x i32> %broadcast.splat, ptr %gep81, align 4, !tbaa !5
  store <4 x i32> %broadcast.splat, ptr %39, align 4, !tbaa !5
  %index.next76 = add nuw i64 %index75, 8
  %40 = icmp eq i64 %index.next76, %n.vec72
  br i1 %40, label %middle.block67, label %vector.body74, !llvm.loop !14

middle.block67:                                   ; preds = %vector.body74
  %cmp.n77 = icmp eq i64 %38, %n.vec72
  br i1 %cmp.n77, label %.loopexit46, label %.lr.ph50.preheader78

.lr.ph50.preheader78:                             ; preds = %middle.block67, %.lr.ph50.preheader
  %indvars.iv56.ph = phi i64 [ %33, %.lr.ph50.preheader ], [ %ind.end, %middle.block67 ]
  br label %.lr.ph50

.lr.ph50:                                         ; preds = %.lr.ph50.preheader78, %.lr.ph50
  %indvars.iv56 = phi i64 [ %indvars.iv.next57, %.lr.ph50 ], [ %indvars.iv56.ph, %.lr.ph50.preheader78 ]
  %41 = getelementptr inbounds i32, ptr %1, i64 %indvars.iv56
  store i32 %3, ptr %41, align 4, !tbaa !5
  %indvars.iv.next57 = add nsw i64 %indvars.iv56, 1
  %lftr.wideiv = trunc i64 %indvars.iv.next57 to i32
  %exitcond59.not = icmp eq i32 %28, %lftr.wideiv
  br i1 %exitcond59.not, label %.loopexit46, label %.lr.ph50, !llvm.loop !15

42:                                               ; preds = %._crit_edge
  call void @_ZN5sc_dt8vec_zeroEiiPj(i32 noundef %27, i32 noundef %28, ptr noundef %1)
  br label %.loopexit46

.loopexit46:                                      ; preds = %.lr.ph50, %middle.block67, %31, %42, %14
  %.065 = phi i32 [ %.064, %31 ], [ %.064, %42 ], [ %17, %14 ], [ %.064, %middle.block67 ], [ %.064, %.lr.ph50 ]
  %.not45 = icmp eq i32 %.065, 0
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
  br i1 %.not45, label %.loopexit, label %.loopexit46._crit_edge

.loopexit46._crit_edge:                           ; preds = %.loopexit46
  %.pre = load i32, ptr %5, align 4, !tbaa !5
  br label %43

43:                                               ; preds = %.loopexit46._crit_edge, %8
  %44 = phi i32 [ %.pre, %.loopexit46._crit_edge ], [ %0, %8 ]
  %.1 = phi i32 [ %.065, %.loopexit46._crit_edge ], [ %2, %8 ]
  %45 = sub nsw i32 30, %.1
  %46 = call noundef i32 @_ZN5sc_dt12one_and_onesEi(i32 noundef %.1)
  %47 = icmp sgt i32 %44, 0
  br i1 %47, label %.lr.ph54.preheader, label %.loopexit

.lr.ph54.preheader:                               ; preds = %43
  %48 = and i32 %46, %3
  %49 = zext nneg i32 %44 to i64
  %50 = getelementptr inbounds i32, ptr %1, i64 %49
  br label %.lr.ph54

.lr.ph54:                                         ; preds = %.lr.ph54.preheader, %.lr.ph54
  %.pn52 = phi i32 [ %55, %.lr.ph54 ], [ %48, %.lr.ph54.preheader ]
  %.04051 = phi ptr [ %51, %.lr.ph54 ], [ %50, %.lr.ph54.preheader ]
  %.037 = shl i32 %.pn52, %45
  %51 = getelementptr inbounds i8, ptr %.04051, i64 -4
  %52 = load i32, ptr %51, align 4, !tbaa !5
  %53 = lshr i32 %52, %.1
  %54 = or i32 %53, %.037
  store i32 %54, ptr %51, align 4, !tbaa !5
  %55 = and i32 %52, %46
  %56 = icmp ugt ptr %51, %1
  br i1 %56, label %.lr.ph54, label %.loopexit, !llvm.loop !16

.loopexit:                                        ; preds = %.lr.ph54, %43, %.loopexit46, %4
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt8vec_zeroEiiPj(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10, !11, !12}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.isvectorized", i32 1}
!12 = !{!"llvm.loop.unroll.runtime.disable"}
!13 = distinct !{!13, !10, !12, !11}
!14 = distinct !{!14, !10, !11, !12}
!15 = distinct !{!15, !10, !12, !11}
!16 = distinct !{!16, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,DivRemPairsPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,MergedLoadStoreMotionPass,PostOrderFunctionAttrsPass,SCCPPass,SROAPass,SimplifyCFGPass