; LLVM IR from gem5/gem5 :: src/systemc/tests/systemc/misc/user_guide/chpt7.2/testbench.ll (ZN9testbench5entryEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.QTIsaac = type { ptr, %"struct.QTIsaac<>::randctx" }
%"struct.QTIsaac<>::randctx" = type <{ i32, [4 x i8], ptr, ptr, i32, i32, i32, [4 x i8] }>
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%struct.testbench = type { %"class.sc_core::sc_module", %"class.sc_core::sc_in", ptr, ptr, ptr, ptr, ptr, ptr, ptr }
%"class.sc_core::sc_module" = type { %"class.sc_core::sc_object", %"class.sc_core::sc_process_host", %"class.sc_core::sc_sensitive", %"class.sc_core::sc_sensitive_pos", %"class.sc_core::sc_sensitive_neg", i8, ptr, i32, ptr, ptr }
%"class.sc_core::sc_object" = type { ptr, ptr, %"class.std::vector", %"class.std::vector.0", %"class.std::__cxx11::basic_string", ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.sc_core::sc_process_host" = type { ptr }
%"class.sc_core::sc_sensitive" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_pos" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_neg" = type { ptr, i32, ptr }
%"class.sc_core::sc_in" = type { %"class.sc_core::sc_port", ptr, ptr, ptr, ptr }
%"class.sc_core::sc_port" = type { %"class.sc_core::sc_port_b" }
%"class.sc_core::sc_port_b" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.8" }
%"class.sc_core::sc_port_base" = type { %"class.sc_core::sc_object", ptr }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@rng = external dso_local global %class.QTIsaac, align 8
@.str = external hidden unnamed_addr constant [42 x i8], align 1
@_ZSt4cout = external global %"class.std::basic_ostream", align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN9testbench5entryEv(ptr noundef nonnull align 8 dereferenceable(472) %0) #0 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i8, align 1
  %10 = alloca i8, align 1
  %11 = alloca [8192 x i8], align 16
  store ptr %0, ptr %2, align 8, !tbaa !5
  %12 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #5
  store i32 0, ptr %8, align 4, !tbaa !9
  br label %13

13:                                               ; preds = %81, %1
  %14 = load i32, ptr %8, align 4, !tbaa !9
  %15 = icmp slt i32 %14, 10
  br i1 %15, label %16, label %84

16:                                               ; preds = %13
  %17 = call noundef i32 @_ZN7QTIsaacILj8EE4randEv(ptr noundef nonnull align 8 dereferenceable(48) @rng)
  %18 = and i32 %17, 268435455
  store i32 %18, ptr %3, align 4, !tbaa !9
  %19 = call noundef i32 @_ZN7QTIsaacILj8EE4randEv(ptr noundef nonnull align 8 dereferenceable(48) @rng)
  %20 = and i32 %19, 268435455
  store i32 %20, ptr %4, align 4, !tbaa !9
  %21 = call noundef i32 @_ZN7QTIsaacILj8EE4randEv(ptr noundef nonnull align 8 dereferenceable(48) @rng)
  %22 = and i32 %21, 268435455
  store i32 %22, ptr %5, align 4, !tbaa !9
  %23 = getelementptr inbounds %struct.testbench, ptr %12, i32 0, i32 5
  %24 = load ptr, ptr %23, align 8, !tbaa !11
  %25 = load ptr, ptr %24, align 8, !tbaa !42
  %26 = getelementptr inbounds ptr, ptr %25, i64 9
  %27 = load ptr, ptr %26, align 8
  call void %27(ptr noundef nonnull align 8 dereferenceable(196) %24, ptr noundef nonnull align 4 dereferenceable(4) %3)
  %28 = getelementptr inbounds %struct.testbench, ptr %12, i32 0, i32 6
  %29 = load ptr, ptr %28, align 8, !tbaa !44
  %30 = load ptr, ptr %29, align 8, !tbaa !42
  %31 = getelementptr inbounds ptr, ptr %30, i64 9
  %32 = load ptr, ptr %31, align 8
  call void %32(ptr noundef nonnull align 8 dereferenceable(196) %29, ptr noundef nonnull align 4 dereferenceable(4) %4)
  %33 = getelementptr inbounds %struct.testbench, ptr %12, i32 0, i32 7
  %34 = load ptr, ptr %33, align 8, !tbaa !45
  %35 = load ptr, ptr %34, align 8, !tbaa !42
  %36 = getelementptr inbounds ptr, ptr %35, i64 9
  %37 = load ptr, ptr %36, align 8
  call void %37(ptr noundef nonnull align 8 dereferenceable(196) %34, ptr noundef nonnull align 4 dereferenceable(4) %5)
  %38 = getelementptr inbounds %struct.testbench, ptr %12, i32 0, i32 8
  %39 = load ptr, ptr %38, align 8, !tbaa !46
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #5
  store i8 1, ptr %9, align 1, !tbaa !47
  %40 = load ptr, ptr %39, align 8, !tbaa !42
  %41 = getelementptr inbounds ptr, ptr %40, i64 14
  %42 = load ptr, ptr %41, align 8
  call void %42(ptr noundef nonnull align 8 dereferenceable(224) %39, ptr noundef nonnull align 1 dereferenceable(1) %9)
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #5
  call void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %12)
  %43 = getelementptr inbounds %struct.testbench, ptr %12, i32 0, i32 8
  %44 = load ptr, ptr %43, align 8, !tbaa !46
  call void @llvm.lifetime.start.p0(i64 1, ptr %10) #5
  store i8 0, ptr %10, align 1, !tbaa !47
  %45 = load ptr, ptr %44, align 8, !tbaa !42
  %46 = getelementptr inbounds ptr, ptr %45, i64 14
  %47 = load ptr, ptr %46, align 8
  call void %47(ptr noundef nonnull align 8 dereferenceable(224) %44, ptr noundef nonnull align 1 dereferenceable(1) %10)
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #5
  br label %48

48:                                               ; preds = %49, %16
  call void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %12)
  br label %49

49:                                               ; preds = %48
  %50 = getelementptr inbounds %struct.testbench, ptr %12, i32 0, i32 4
  %51 = load ptr, ptr %50, align 8, !tbaa !48
  %52 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNK7sc_core9sc_signalIbLNS_16sc_writer_policyE0EEcvRKbEv(ptr noundef nonnull align 8 dereferenceable(224) %51)
  %53 = load i8, ptr %52, align 1, !tbaa !47, !range !49, !noundef !50
  %54 = trunc i8 %53 to i1
  %55 = zext i1 %54 to i32
  %56 = icmp ne i32 %55, 1
  br i1 %56, label %48, label %57, !llvm.loop !51

57:                                               ; preds = %49
  %58 = getelementptr inbounds %struct.testbench, ptr %12, i32 0, i32 2
  %59 = load ptr, ptr %58, align 8, !tbaa !53
  %60 = load ptr, ptr %59, align 8, !tbaa !42
  %61 = getelementptr inbounds ptr, ptr %60, i64 5
  %62 = load ptr, ptr %61, align 8
  %63 = call noundef nonnull align 4 dereferenceable(4) ptr %62(ptr noundef nonnull align 8 dereferenceable(196) %59)
  %64 = load i32, ptr %63, align 4, !tbaa !9
  store i32 %64, ptr %7, align 4, !tbaa !9
  %65 = getelementptr inbounds %struct.testbench, ptr %12, i32 0, i32 3
  %66 = load ptr, ptr %65, align 8, !tbaa !54
  %67 = load ptr, ptr %66, align 8, !tbaa !42
  %68 = getelementptr inbounds ptr, ptr %67, i64 5
  %69 = load ptr, ptr %68, align 8
  %70 = call noundef nonnull align 4 dereferenceable(4) ptr %69(ptr noundef nonnull align 8 dereferenceable(196) %66)
  %71 = load i32, ptr %70, align 4, !tbaa !9
  store i32 %71, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8192, ptr %11) #5
  %72 = getelementptr inbounds [8192 x i8], ptr %11, i64 0, i64 0
  %73 = load i32, ptr %3, align 4, !tbaa !9
  %74 = load i32, ptr %4, align 4, !tbaa !9
  %75 = load i32, ptr %5, align 4, !tbaa !9
  %76 = load i32, ptr %6, align 4, !tbaa !9
  %77 = load i32, ptr %7, align 4, !tbaa !9
  %78 = call i32 (ptr, ptr, ...) @sprintf(ptr noundef %72, ptr noundef @.str, i32 noundef %73, i32 noundef %74, i32 noundef %75, i32 noundef %76, i32 noundef %77) #5
  %79 = getelementptr inbounds [8192 x i8], ptr %11, i64 0, i64 0
  %80 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, ptr noundef %79)
  call void @llvm.lifetime.end.p0(i64 8192, ptr %11) #5
  br label %81

81:                                               ; preds = %57
  %82 = load i32, ptr %8, align 4, !tbaa !9
  %83 = add nsw i32 %82, 1
  store i32 %83, ptr %8, align 4, !tbaa !9
  br label %13, !llvm.loop !55

84:                                               ; preds = %13
  call void @_ZN7sc_core7sc_stopEv()
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #5
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_ZN7QTIsaacILj8EE4randEv(ptr noundef nonnull align 8 dereferenceable(48)) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232)) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNK7sc_core9sc_signalIbLNS_16sc_writer_policyE0EEcvRKbEv(ptr noundef nonnull align 8 dereferenceable(224)) #0 align 2

; Function Attrs: nounwind
declare i32 @sprintf(ptr noundef, ptr noundef, ...) #3

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) #2

declare void @_ZN7sc_core7sc_stopEv() #4

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 440}
!12 = !{!"_ZTS9testbench", !13, i64 0, !34, i64 232, !6, i64 416, !6, i64 424, !6, i64 432, !6, i64 440, !6, i64 448, !6, i64 456, !6, i64 464}
!13 = !{!"_ZTSN7sc_core9sc_moduleE", !14, i64 0, !26, i64 112, !27, i64 120, !29, i64 144, !31, i64 168, !33, i64 192, !6, i64 200, !10, i64 208, !6, i64 216, !6, i64 224}
!14 = !{!"_ZTSN7sc_core9sc_objectE", !6, i64 8, !15, i64 16, !19, i64 40, !23, i64 64, !6, i64 96, !6, i64 104}
!15 = !{!"_ZTSSt6vectorIPN7sc_core8sc_eventESaIS2_EE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!19 = !{!"_ZTSSt6vectorIPN7sc_core9sc_objectESaIS2_EE", !20, i64 0}
!20 = !{!"_ZTSSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE12_Vector_implE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!23 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !24, i64 0, !25, i64 8, !7, i64 16}
!24 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!25 = !{!"long", !7, i64 0}
!26 = !{!"_ZTSN7sc_core15sc_process_hostE"}
!27 = !{!"_ZTSN7sc_core12sc_sensitiveE", !6, i64 0, !28, i64 8, !6, i64 16}
!28 = !{!"_ZTSN7sc_core12sc_sensitiveUt_E", !7, i64 0}
!29 = !{!"_ZTSN7sc_core16sc_sensitive_posE", !6, i64 0, !30, i64 8, !6, i64 16}
!30 = !{!"_ZTSN7sc_core16sc_sensitive_posUt_E", !7, i64 0}
!31 = !{!"_ZTSN7sc_core16sc_sensitive_negE", !6, i64 0, !32, i64 8, !6, i64 16}
!32 = !{!"_ZTSN7sc_core16sc_sensitive_negUt_E", !7, i64 0}
!33 = !{!"bool", !7, i64 0}
!34 = !{!"_ZTSN7sc_core5sc_inIbEE", !35, i64 0, !6, i64 152, !6, i64 160, !6, i64 168, !6, i64 176}
!35 = !{!"_ZTSN7sc_core7sc_portINS_15sc_signal_in_ifIbEELi1ELNS_14sc_port_policyE0EEE", !36, i64 0}
!36 = !{!"_ZTSN7sc_core9sc_port_bINS_15sc_signal_in_ifIbEEEE", !37, i64 0, !6, i64 120, !38, i64 128}
!37 = !{!"_ZTSN7sc_core12sc_port_baseE", !14, i64 0, !6, i64 112}
!38 = !{!"_ZTSSt6vectorIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE", !39, i64 0}
!39 = !{!"_ZTSSt12_Vector_baseIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE", !40, i64 0}
!40 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE12_Vector_implE", !41, i64 0}
!41 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!42 = !{!43, !43, i64 0}
!43 = !{!"vtable pointer", !8, i64 0}
!44 = !{!12, !6, i64 448}
!45 = !{!12, !6, i64 456}
!46 = !{!12, !6, i64 464}
!47 = !{!33, !33, i64 0}
!48 = !{!12, !6, i64 432}
!49 = !{i8 0, i8 2}
!50 = !{}
!51 = distinct !{!51, !52}
!52 = !{!"llvm.loop.mustprogress"}
!53 = !{!12, !6, i64 416}
!54 = !{!12, !6, i64 424}
!55 = distinct !{!55, !52}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.QTIsaac = type { ptr, %"struct.QTIsaac<>::randctx" }
%"struct.QTIsaac<>::randctx" = type <{ i32, [4 x i8], ptr, ptr, i32, i32, i32, [4 x i8] }>
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }

@rng = external dso_local global %class.QTIsaac, align 8
@.str = external hidden unnamed_addr constant [42 x i8], align 1
@_ZSt4cout = external global %"class.std::basic_ostream", align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN9testbench5entryEv(ptr noundef nonnull align 8 dereferenceable(472) %0) local_unnamed_addr #0 align 2 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i8, align 1
  %6 = alloca i8, align 1
  %7 = alloca [8192 x i8], align 16
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #5
  %8 = getelementptr inbounds i8, ptr %0, i64 440
  %9 = getelementptr inbounds i8, ptr %0, i64 448
  %10 = getelementptr inbounds i8, ptr %0, i64 456
  %11 = getelementptr inbounds i8, ptr %0, i64 464
  %12 = getelementptr inbounds i8, ptr %0, i64 432
  %13 = getelementptr inbounds i8, ptr %0, i64 416
  %14 = getelementptr inbounds i8, ptr %0, i64 424
  br label %15

15:                                               ; preds = %1, %46
  %.04 = phi i32 [ 0, %1 ], [ %64, %46 ]
  %16 = call noundef i32 @_ZN7QTIsaacILj8EE4randEv(ptr noundef nonnull align 8 dereferenceable(48) @rng)
  %17 = and i32 %16, 268435455
  store i32 %17, ptr %2, align 4, !tbaa !5
  %18 = call noundef i32 @_ZN7QTIsaacILj8EE4randEv(ptr noundef nonnull align 8 dereferenceable(48) @rng)
  %19 = and i32 %18, 268435455
  store i32 %19, ptr %3, align 4, !tbaa !5
  %20 = call noundef i32 @_ZN7QTIsaacILj8EE4randEv(ptr noundef nonnull align 8 dereferenceable(48) @rng)
  %21 = and i32 %20, 268435455
  store i32 %21, ptr %4, align 4, !tbaa !5
  %22 = load ptr, ptr %8, align 8, !tbaa !9
  %23 = load ptr, ptr %22, align 8, !tbaa !41
  %24 = getelementptr inbounds i8, ptr %23, i64 72
  %25 = load ptr, ptr %24, align 8
  call void %25(ptr noundef nonnull align 8 dereferenceable(196) %22, ptr noundef nonnull align 4 dereferenceable(4) %2)
  %26 = load ptr, ptr %9, align 8, !tbaa !43
  %27 = load ptr, ptr %26, align 8, !tbaa !41
  %28 = getelementptr inbounds i8, ptr %27, i64 72
  %29 = load ptr, ptr %28, align 8
  call void %29(ptr noundef nonnull align 8 dereferenceable(196) %26, ptr noundef nonnull align 4 dereferenceable(4) %3)
  %30 = load ptr, ptr %10, align 8, !tbaa !44
  %31 = load ptr, ptr %30, align 8, !tbaa !41
  %32 = getelementptr inbounds i8, ptr %31, i64 72
  %33 = load ptr, ptr %32, align 8
  call void %33(ptr noundef nonnull align 8 dereferenceable(196) %30, ptr noundef nonnull align 4 dereferenceable(4) %4)
  %34 = load ptr, ptr %11, align 8, !tbaa !45
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %5) #5
  store i8 1, ptr %5, align 1, !tbaa !46
  %35 = load ptr, ptr %34, align 8, !tbaa !41
  %36 = getelementptr inbounds i8, ptr %35, i64 112
  %37 = load ptr, ptr %36, align 8
  call void %37(ptr noundef nonnull align 8 dereferenceable(224) %34, ptr noundef nonnull align 1 dereferenceable(1) %5)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %5) #5
  call void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
  %38 = load ptr, ptr %11, align 8, !tbaa !45
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %6) #5
  store i8 0, ptr %6, align 1, !tbaa !46
  %39 = load ptr, ptr %38, align 8, !tbaa !41
  %40 = getelementptr inbounds i8, ptr %39, i64 112
  %41 = load ptr, ptr %40, align 8
  call void %41(ptr noundef nonnull align 8 dereferenceable(224) %38, ptr noundef nonnull align 1 dereferenceable(1) %6)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %6) #5
  br label %42

42:                                               ; preds = %42, %15
  call void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
  %43 = load ptr, ptr %12, align 8, !tbaa !47
  %44 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNK7sc_core9sc_signalIbLNS_16sc_writer_policyE0EEcvRKbEv(ptr noundef nonnull align 8 dereferenceable(224) %43)
  %45 = load i8, ptr %44, align 1, !tbaa !46, !range !48, !noundef !49
  %.not.not = icmp eq i8 %45, 0
  br i1 %.not.not, label %42, label %46, !llvm.loop !50

46:                                               ; preds = %42
  %47 = load ptr, ptr %13, align 8, !tbaa !52
  %48 = load ptr, ptr %47, align 8, !tbaa !41
  %49 = getelementptr inbounds i8, ptr %48, i64 40
  %50 = load ptr, ptr %49, align 8
  %51 = call noundef nonnull align 4 dereferenceable(4) ptr %50(ptr noundef nonnull align 8 dereferenceable(196) %47)
  %52 = load i32, ptr %51, align 4, !tbaa !5
  %53 = load ptr, ptr %14, align 8, !tbaa !53
  %54 = load ptr, ptr %53, align 8, !tbaa !41
  %55 = getelementptr inbounds i8, ptr %54, i64 40
  %56 = load ptr, ptr %55, align 8
  %57 = call noundef nonnull align 4 dereferenceable(4) ptr %56(ptr noundef nonnull align 8 dereferenceable(196) %53)
  %58 = load i32, ptr %57, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8192, ptr nonnull %7) #5
  %59 = load i32, ptr %2, align 4, !tbaa !5
  %60 = load i32, ptr %3, align 4, !tbaa !5
  %61 = load i32, ptr %4, align 4, !tbaa !5
  %62 = call i32 (ptr, ptr, ...) @sprintf(ptr noundef nonnull dereferenceable(1) %7, ptr noundef nonnull dereferenceable(1) @.str, i32 noundef %59, i32 noundef %60, i32 noundef %61, i32 noundef %58, i32 noundef %52) #5
  %63 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, ptr noundef nonnull %7)
  call void @llvm.lifetime.end.p0(i64 8192, ptr nonnull %7) #5
  %64 = add nuw nsw i32 %.04, 1
  %exitcond.not = icmp eq i32 %64, 10
  br i1 %exitcond.not, label %65, label %15, !llvm.loop !54

65:                                               ; preds = %46
  call void @_ZN7sc_core7sc_stopEv()
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #5
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_ZN7QTIsaacILj8EE4randEv(ptr noundef nonnull align 8 dereferenceable(48)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNK7sc_core9sc_signalIbLNS_16sc_writer_policyE0EEcvRKbEv(ptr noundef nonnull align 8 dereferenceable(224)) local_unnamed_addr #0 align 2

; Function Attrs: nofree nounwind
declare noundef i32 @sprintf(ptr noalias nocapture noundef writeonly, ptr nocapture noundef readonly, ...) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) local_unnamed_addr #2

declare void @_ZN7sc_core7sc_stopEv() local_unnamed_addr #4

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !13, i64 440}
!10 = !{!"_ZTS9testbench", !11, i64 0, !33, i64 232, !13, i64 416, !13, i64 424, !13, i64 432, !13, i64 440, !13, i64 448, !13, i64 456, !13, i64 464}
!11 = !{!"_ZTSN7sc_core9sc_moduleE", !12, i64 0, !25, i64 112, !26, i64 120, !28, i64 144, !30, i64 168, !32, i64 192, !13, i64 200, !6, i64 208, !13, i64 216, !13, i64 224}
!12 = !{!"_ZTSN7sc_core9sc_objectE", !13, i64 8, !14, i64 16, !18, i64 40, !22, i64 64, !13, i64 96, !13, i64 104}
!13 = !{!"any pointer", !7, i64 0}
!14 = !{!"_ZTSSt6vectorIPN7sc_core8sc_eventESaIS2_EE", !15, i64 0}
!15 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE12_Vector_implE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!18 = !{!"_ZTSSt6vectorIPN7sc_core9sc_objectESaIS2_EE", !19, i64 0}
!19 = !{!"_ZTSSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE12_Vector_implE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!22 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !23, i64 0, !24, i64 8, !7, i64 16}
!23 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !13, i64 0}
!24 = !{!"long", !7, i64 0}
!25 = !{!"_ZTSN7sc_core15sc_process_hostE"}
!26 = !{!"_ZTSN7sc_core12sc_sensitiveE", !13, i64 0, !27, i64 8, !13, i64 16}
!27 = !{!"_ZTSN7sc_core12sc_sensitiveUt_E", !7, i64 0}
!28 = !{!"_ZTSN7sc_core16sc_sensitive_posE", !13, i64 0, !29, i64 8, !13, i64 16}
!29 = !{!"_ZTSN7sc_core16sc_sensitive_posUt_E", !7, i64 0}
!30 = !{!"_ZTSN7sc_core16sc_sensitive_negE", !13, i64 0, !31, i64 8, !13, i64 16}
!31 = !{!"_ZTSN7sc_core16sc_sensitive_negUt_E", !7, i64 0}
!32 = !{!"bool", !7, i64 0}
!33 = !{!"_ZTSN7sc_core5sc_inIbEE", !34, i64 0, !13, i64 152, !13, i64 160, !13, i64 168, !13, i64 176}
!34 = !{!"_ZTSN7sc_core7sc_portINS_15sc_signal_in_ifIbEELi1ELNS_14sc_port_policyE0EEE", !35, i64 0}
!35 = !{!"_ZTSN7sc_core9sc_port_bINS_15sc_signal_in_ifIbEEEE", !36, i64 0, !13, i64 120, !37, i64 128}
!36 = !{!"_ZTSN7sc_core12sc_port_baseE", !12, i64 0, !13, i64 112}
!37 = !{!"_ZTSSt6vectorIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE", !38, i64 0}
!38 = !{!"_ZTSSt12_Vector_baseIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE", !39, i64 0}
!39 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE12_Vector_implE", !40, i64 0}
!40 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!41 = !{!42, !42, i64 0}
!42 = !{!"vtable pointer", !8, i64 0}
!43 = !{!10, !13, i64 448}
!44 = !{!10, !13, i64 456}
!45 = !{!10, !13, i64 464}
!46 = !{!32, !32, i64 0}
!47 = !{!10, !13, i64 432}
!48 = !{i8 0, i8 2}
!49 = !{}
!50 = distinct !{!50, !51}
!51 = !{!"llvm.loop.mustprogress"}
!52 = !{!10, !13, i64 416}
!53 = !{!10, !13, i64 424}
!54 = distinct !{!54, !51}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LICMPass,LoopRotatePass,SROAPass,SimplifyCFGPass