; LLVM IR from gem5/gem5 :: src/systemc/tests/systemc/utils/sc_vector/test05 (test05)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.module = type { %"class.sc_core::sc_module", %struct.sub_module, %"class.sc_core::sc_vector" }
%"class.sc_core::sc_module" = type { %"class.sc_core::sc_object", %"class.sc_core::sc_process_host", %"class.sc_core::sc_sensitive", %"class.sc_core::sc_sensitive_pos", %"class.sc_core::sc_sensitive_neg", i8, ptr, i32, ptr, ptr }
%"class.sc_core::sc_object" = type { ptr, ptr, %"class.std::vector", %"class.std::vector.0", %"class.std::__cxx11::basic_string", ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.sc_core::sc_process_host" = type { ptr }
%"class.sc_core::sc_sensitive" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_pos" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_neg" = type { ptr, i32, ptr }
%struct.sub_module = type { %"class.sc_core::sc_module", %"class.sc_core::sc_vector" }
%"class.sc_core::sc_vector" = type { %"class.sc_core::sc_vector_base" }
%"class.sc_core::sc_vector_base" = type { %"class.sc_core::sc_object", %"class.std::vector.8", ptr }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<void *, std::allocator<void *>>::_Vector_impl" }
%"struct.std::_Vector_base<void *, std::allocator<void *>>::_Vector_impl" = type { %"struct.std::_Vector_base<void *, std::allocator<void *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<void *, std::allocator<void *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_module_name" = type <{ ptr, ptr, ptr, ptr, i8, [7 x i8] }>
%"class.sc_core::sc_vector.13" = type { %"class.sc_core::sc_vector_base" }
%"class.sc_core::sc_vector_iter" = type { %"class.__gnu_cxx::__normal_iterator" }
%"class.__gnu_cxx::__normal_iterator" = type { ptr }
%"class.sc_core::sc_vector_iter.14" = type { %"class.__gnu_cxx::__normal_iterator" }
%"class.sc_core::sc_fifo" = type { %"class.sc_core::sc_fifo_in_if", %"class.sc_core::sc_fifo_out_if", %"class.sc_core::sc_prim_channel", i32, ptr, i32, i32, i32, ptr, ptr, i32, i32, i32, %"class.sc_core::sc_event", %"class.sc_core::sc_event" }
%"class.sc_core::sc_fifo_in_if" = type { %"class.sc_core::sc_fifo_nonblocking_in_if", %"class.sc_core::sc_fifo_blocking_in_if" }
%"class.sc_core::sc_fifo_nonblocking_in_if" = type { %"class.sc_core::sc_interface" }
%"class.sc_core::sc_interface" = type { ptr }
%"class.sc_core::sc_fifo_blocking_in_if" = type { %"class.sc_core::sc_interface" }
%"class.sc_core::sc_fifo_out_if" = type { %"class.sc_core::sc_fifo_nonblocking_out_if", %"class.sc_core::sc_fifo_blocking_out_if" }
%"class.sc_core::sc_fifo_nonblocking_out_if" = type { %"class.sc_core::sc_interface" }
%"class.sc_core::sc_fifo_blocking_out_if" = type { %"class.sc_core::sc_interface" }
%"class.sc_core::sc_prim_channel" = type { %"class.sc_core::sc_object", ptr, ptr }
%"class.sc_core::sc_event" = type { %"class.std::__cxx11::basic_string", ptr, ptr, i32, i32, ptr, %"class.std::vector.18", %"class.std::vector.18", %"class.std::vector.23", %"class.std::vector.23" }
%"class.std::vector.18" = type { %"struct.std::_Vector_base.19" }
%"struct.std::_Vector_base.19" = type { %"struct.std::_Vector_base<sc_core::sc_method_process *, std::allocator<sc_core::sc_method_process *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_method_process *, std::allocator<sc_core::sc_method_process *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_method_process *, std::allocator<sc_core::sc_method_process *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_method_process *, std::allocator<sc_core::sc_method_process *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.23" = type { %"struct.std::_Vector_base.24" }
%"struct.std::_Vector_base.24" = type { %"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@.str = external hidden unnamed_addr constant [4 x i8], align 1
@_ZN7sc_core23SC_ID_ASSERTION_FAILED_E = external constant [0 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [22 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [103 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [6 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [6 x i8], align 1
@.str.6 = external hidden unnamed_addr constant [37 x i8], align 1
@.str.7 = external hidden unnamed_addr constant [20 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local i32 @sc_main(i32 noundef %0, ptr noundef %1) #0 personality ptr @__gxx_personality_v0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca %struct.module, align 8
  %7 = alloca %"class.sc_core::sc_module_name", align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca %"class.sc_core::sc_vector.13", align 8
  %13 = alloca %"class.sc_core::sc_vector.13", align 8
  %14 = alloca %"class.sc_core::sc_vector_iter", align 8
  %15 = alloca %"class.sc_core::sc_vector_iter", align 8
  %16 = alloca %"class.sc_core::sc_vector_iter", align 8
  %17 = alloca %"class.sc_core::sc_vector_iter.14", align 8
  %18 = alloca %"class.sc_core::sc_vector_iter.14", align 8
  %19 = alloca %"class.sc_core::sc_vector_iter", align 8
  %20 = alloca %"class.sc_core::sc_vector_iter", align 8
  %21 = alloca [2 x %"class.sc_core::sc_fifo"], align 16
  %22 = alloca %"class.sc_core::sc_vector_iter", align 8
  store i32 %0, ptr %4, align 4, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 752, ptr %6) #7
  call void @_ZN7sc_core14sc_module_nameC1EPKc(ptr noundef nonnull align 8 dereferenceable(33) %7, ptr noundef @.str)
  invoke void @_ZN6moduleC2EN7sc_core14sc_module_nameE(ptr noundef nonnull align 8 dereferenceable(752) %6, ptr noundef %7)
          to label %23 unwind label %79

23:                                               ; preds = %2
  call void @_ZN7sc_core14sc_module_nameD1Ev(ptr noundef nonnull align 8 dereferenceable(33) %7) #7
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #7
  store i32 4, ptr %10, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #7
  store i32 2, ptr %11, align 4, !tbaa !5
  %24 = getelementptr inbounds %struct.module, ptr %6, i32 0, i32 2
  %25 = invoke noundef i64 @_ZNK7sc_core14sc_vector_base4sizeEv(ptr noundef nonnull align 8 dereferenceable(144) %24)
          to label %26 unwind label %83

26:                                               ; preds = %23
  %27 = icmp eq i64 %25, 4
  br i1 %27, label %28, label %29

28:                                               ; preds = %26
  br label %31

29:                                               ; preds = %26
  invoke void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef 3, ptr noundef @_ZN7sc_core23SC_ID_ASSERTION_FAILED_E, ptr noundef @.str.2, ptr noundef @.str.3, i32 noundef 106)
          to label %30 unwind label %83

30:                                               ; preds = %29
  br label %31

31:                                               ; preds = %30, %28
  %32 = phi i32 [ 0, %28 ], [ 0, %30 ]
  call void @llvm.lifetime.start.p0(i64 144, ptr %12) #7
  invoke void @_ZN7sc_core9sc_vectorINS_7sc_fifoIiEEEC2EPKcm(ptr noundef nonnull align 8 dereferenceable(144) %12, ptr noundef @.str.4, i64 noundef 2)
          to label %33 unwind label %87

33:                                               ; preds = %31
  call void @llvm.lifetime.start.p0(i64 144, ptr %13) #7
  invoke void @_ZN7sc_core9sc_vectorINS_7sc_fifoIiEEEC2EPKcm(ptr noundef nonnull align 8 dereferenceable(144) %13, ptr noundef @.str.5, i64 noundef 4)
          to label %34 unwind label %91

34:                                               ; preds = %33
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #7
  %35 = getelementptr inbounds %struct.module, ptr %6, i32 0, i32 2
  invoke void @_ZN7sc_core9sc_vectorINS_11sc_fifo_outIiEEEclINS0_INS_7sc_fifoIiEEEEEENS_14sc_vector_iterIS2_NS_16sc_direct_accessIS2_EEEERT_(ptr dead_on_unwind writable sret(%"class.sc_core::sc_vector_iter") align 8 %14, ptr noundef nonnull align 8 dereferenceable(144) %35, ptr noundef nonnull align 8 dereferenceable(144) %12)
          to label %36 unwind label %95

36:                                               ; preds = %34
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #7
  %37 = getelementptr inbounds %struct.module, ptr %6, i32 0, i32 2
  invoke void @_ZN7sc_core9sc_vectorINS_11sc_fifo_outIiEEE5beginEv(ptr dead_on_unwind writable sret(%"class.sc_core::sc_vector_iter") align 8 %15, ptr noundef nonnull align 8 dereferenceable(144) %37)
          to label %38 unwind label %99

38:                                               ; preds = %36
  %39 = invoke noundef i64 @_ZNK7sc_core14sc_vector_iterINS_11sc_fifo_outIiEENS_16sc_direct_accessIS2_EEEmiERKS5_(ptr noundef nonnull align 8 dereferenceable(8) %14, ptr noundef nonnull align 8 dereferenceable(8) %15)
          to label %40 unwind label %99

40:                                               ; preds = %38
  %41 = sub nsw i64 %39, 2
  %42 = icmp eq i64 %41, 0
  br i1 %42, label %43, label %44

43:                                               ; preds = %40
  br label %46

44:                                               ; preds = %40
  invoke void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef 3, ptr noundef @_ZN7sc_core23SC_ID_ASSERTION_FAILED_E, ptr noundef @.str.6, ptr noundef @.str.3, i32 noundef 114)
          to label %45 unwind label %99

45:                                               ; preds = %44
  br label %46

46:                                               ; preds = %45, %43
  %47 = phi i32 [ 0, %43 ], [ 0, %45 ]
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #7
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #7
  %48 = getelementptr inbounds %struct.module, ptr %6, i32 0, i32 2
  invoke void @_ZN7sc_core9sc_vectorINS_7sc_fifoIiEEE5beginEv(ptr dead_on_unwind writable sret(%"class.sc_core::sc_vector_iter.14") align 8 %17, ptr noundef nonnull align 8 dereferenceable(144) %13)
          to label %49 unwind label %103

49:                                               ; preds = %46
  invoke void @_ZN7sc_core9sc_vectorINS_7sc_fifoIiEEE3endEv(ptr dead_on_unwind writable sret(%"class.sc_core::sc_vector_iter.14") align 8 %18, ptr noundef nonnull align 8 dereferenceable(144) %13)
          to label %50 unwind label %103

50:                                               ; preds = %49
  invoke void @_ZN7sc_core14sc_vector_iterINS_11sc_fifo_outIiEENS_16sc_direct_accessIS2_EEEC2ERKS5_(ptr noundef nonnull align 8 dereferenceable(8) %19, ptr noundef nonnull align 8 dereferenceable(8) %14)
          to label %51 unwind label %103

51:                                               ; preds = %50
  invoke void @_ZN7sc_core9sc_vectorINS_11sc_fifo_outIiEEE4bindINS_14sc_vector_iterINS_7sc_fifoIiEENS_16sc_direct_accessIS7_EEEEEENS5_IS2_NS8_IS2_EEEET_SD_SC_(ptr dead_on_unwind writable sret(%"class.sc_core::sc_vector_iter") align 8 %16, ptr noundef nonnull align 8 dereferenceable(144) %48, ptr noundef %17, ptr noundef %18, ptr noundef %19)
          to label %52 unwind label %103

52:                                               ; preds = %51
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %14, ptr align 8 %16, i64 8, i1 false)
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #7
  call void @llvm.lifetime.start.p0(i64 8, ptr %20) #7
  %53 = getelementptr inbounds %struct.module, ptr %6, i32 0, i32 2
  invoke void @_ZN7sc_core9sc_vectorINS_11sc_fifo_outIiEEE3endEv(ptr dead_on_unwind writable sret(%"class.sc_core::sc_vector_iter") align 8 %20, ptr noundef nonnull align 8 dereferenceable(144) %53)
          to label %54 unwind label %107

54:                                               ; preds = %52
  %55 = invoke noundef zeroext i1 @_ZNK7sc_core14sc_vector_iterINS_11sc_fifo_outIiEENS_16sc_direct_accessIS2_EEEeqERKS5_(ptr noundef nonnull align 8 dereferenceable(8) %14, ptr noundef nonnull align 8 dereferenceable(8) %20)
          to label %56 unwind label %107

56:                                               ; preds = %54
  br i1 %55, label %57, label %58

57:                                               ; preds = %56
  br label %60

58:                                               ; preds = %56
  invoke void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef 3, ptr noundef @_ZN7sc_core23SC_ID_ASSERTION_FAILED_E, ptr noundef @.str.7, ptr noundef @.str.3, i32 noundef 118)
          to label %59 unwind label %107

59:                                               ; preds = %58
  br label %60

60:                                               ; preds = %59, %57
  %61 = phi i32 [ 0, %57 ], [ 0, %59 ]
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #7
  call void @llvm.lifetime.start.p0(i64 1088, ptr %21) #7
  %62 = getelementptr inbounds [2 x %"class.sc_core::sc_fifo"], ptr %21, i32 0, i32 0
  %63 = getelementptr inbounds %"class.sc_core::sc_fifo", ptr %62, i64 2
  br label %64

64:                                               ; preds = %66, %60
  %65 = phi ptr [ %62, %60 ], [ %67, %66 ]
  invoke void @_ZN7sc_core7sc_fifoIiEC1Ei(ptr noundef nonnull align 8 dereferenceable(544) %65, i32 noundef 16)
          to label %66 unwind label %111

66:                                               ; preds = %64
  %67 = getelementptr inbounds %"class.sc_core::sc_fifo", ptr %65, i64 1
  %68 = icmp eq ptr %67, %63
  br i1 %68, label %69, label %64

69:                                               ; preds = %66
  %70 = getelementptr inbounds %struct.module, ptr %6, i32 0, i32 1
  %71 = getelementptr inbounds %struct.sub_module, ptr %70, i32 0, i32 1
  %72 = getelementptr inbounds [2 x %"class.sc_core::sc_fifo"], ptr %21, i64 0, i64 0
  %73 = getelementptr inbounds [2 x %"class.sc_core::sc_fifo"], ptr %21, i64 0, i64 0
  %74 = getelementptr inbounds %"class.sc_core::sc_fifo", ptr %73, i64 2
  call void @llvm.lifetime.start.p0(i64 8, ptr %22) #7
  invoke void @_ZN7sc_core9sc_vectorINS_11sc_fifo_outIiEEEclIPNS_7sc_fifoIiEEEENS_14sc_vector_iterIS2_NS_16sc_direct_accessIS2_EEEET_SC_(ptr dead_on_unwind writable sret(%"class.sc_core::sc_vector_iter") align 8 %22, ptr noundef nonnull align 8 dereferenceable(144) %71, ptr noundef %72, ptr noundef %74)
          to label %75 unwind label %121

75:                                               ; preds = %69
  call void @llvm.lifetime.end.p0(i64 8, ptr %22) #7
  invoke void @_ZN7sc_core8sc_startEv()
          to label %76 unwind label %125

76:                                               ; preds = %75
  store i32 0, ptr %3, align 4
  %77 = getelementptr inbounds [2 x %"class.sc_core::sc_fifo"], ptr %21, i32 0, i32 0
  %78 = getelementptr inbounds %"class.sc_core::sc_fifo", ptr %77, i64 2
  br label %129

79:                                               ; preds = %2
  %80 = landingpad { ptr, i32 }
          cleanup
  %81 = extractvalue { ptr, i32 } %80, 0
  store ptr %81, ptr %8, align 8
  %82 = extractvalue { ptr, i32 } %80, 1
  store i32 %82, ptr %9, align 4
  call void @_ZN7sc_core14sc_module_nameD1Ev(ptr noundef nonnull align 8 dereferenceable(33) %7) #7
  br label %148

83:                                               ; preds = %29, %23
  %84 = landingpad { ptr, i32 }
          cleanup
  %85 = extractvalue { ptr, i32 } %84, 0
  store ptr %85, ptr %8, align 8
  %86 = extractvalue { ptr, i32 } %84, 1
  store i32 %86, ptr %9, align 4
  br label %147

87:                                               ; preds = %31
  %88 = landingpad { ptr, i32 }
          cleanup
  %89 = extractvalue { ptr, i32 } %88, 0
  store ptr %89, ptr %8, align 8
  %90 = extractvalue { ptr, i32 } %88, 1
  store i32 %90, ptr %9, align 4
  br label %146

91:                                               ; preds = %33
  %92 = landingpad { ptr, i32 }
          cleanup
  %93 = extractvalue { ptr, i32 } %92, 0
  store ptr %93, ptr %8, align 8
  %94 = extractvalue { ptr, i32 } %92, 1
  store i32 %94, ptr %9, align 4
  br label %145

95:                                               ; preds = %34
  %96 = landingpad { ptr, i32 }
          cleanup
  %97 = extractvalue { ptr, i32 } %96, 0
  store ptr %97, ptr %8, align 8
  %98 = extractvalue { ptr, i32 } %96, 1
  store i32 %98, ptr %9, align 4
  br label %144

99:                                               ; preds = %44, %38, %36
  %100 = landingpad { ptr, i32 }
          cleanup
  %101 = extractvalue { ptr, i32 } %100, 0
  store ptr %101, ptr %8, align 8
  %102 = extractvalue { ptr, i32 } %100, 1
  store i32 %102, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #7
  br label %144

103:                                              ; preds = %51, %50, %49, %46
  %104 = landingpad { ptr, i32 }
          cleanup
  %105 = extractvalue { ptr, i32 } %104, 0
  store ptr %105, ptr %8, align 8
  %106 = extractvalue { ptr, i32 } %104, 1
  store i32 %106, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #7
  br label %144

107:                                              ; preds = %58, %54, %52
  %108 = landingpad { ptr, i32 }
          cleanup
  %109 = extractvalue { ptr, i32 } %108, 0
  store ptr %109, ptr %8, align 8
  %110 = extractvalue { ptr, i32 } %108, 1
  store i32 %110, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #7
  br label %144

111:                                              ; preds = %64
  %112 = landingpad { ptr, i32 }
          cleanup
  %113 = extractvalue { ptr, i32 } %112, 0
  store ptr %113, ptr %8, align 8
  %114 = extractvalue { ptr, i32 } %112, 1
  store i32 %114, ptr %9, align 4
  %115 = icmp eq ptr %62, %65
  br i1 %115, label %120, label %116

116:                                              ; preds = %116, %111
  %117 = phi ptr [ %65, %111 ], [ %118, %116 ]
  %118 = getelementptr inbounds %"class.sc_core::sc_fifo", ptr %117, i64 -1
  call void @_ZN7sc_core7sc_fifoIiED1Ev(ptr noundef nonnull align 8 dereferenceable(544) %118) #7
  %119 = icmp eq ptr %118, %62
  br i1 %119, label %120, label %116

120:                                              ; preds = %116, %111
  br label %143

121:                                              ; preds = %69
  %122 = landingpad { ptr, i32 }
          cleanup
  %123 = extractvalue { ptr, i32 } %122, 0
  store ptr %123, ptr %8, align 8
  %124 = extractvalue { ptr, i32 } %122, 1
  store i32 %124, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %22) #7
  br label %135

125:                                              ; preds = %75
  %126 = landingpad { ptr, i32 }
          cleanup
  %127 = extractvalue { ptr, i32 } %126, 0
  store ptr %127, ptr %8, align 8
  %128 = extractvalue { ptr, i32 } %126, 1
  store i32 %128, ptr %9, align 4
  br label %135

129:                                              ; preds = %129, %76
  %130 = phi ptr [ %78, %76 ], [ %131, %129 ]
  %131 = getelementptr inbounds %"class.sc_core::sc_fifo", ptr %130, i64 -1
  call void @_ZN7sc_core7sc_fifoIiED1Ev(ptr noundef nonnull align 8 dereferenceable(544) %131) #7
  %132 = icmp eq ptr %131, %77
  br i1 %132, label %133, label %129

133:                                              ; preds = %129
  call void @llvm.lifetime.end.p0(i64 1088, ptr %21) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #7
  call void @_ZN7sc_core9sc_vectorINS_7sc_fifoIiEEED2Ev(ptr noundef nonnull align 8 dereferenceable(144) %13) #7
  call void @llvm.lifetime.end.p0(i64 144, ptr %13) #7
  call void @_ZN7sc_core9sc_vectorINS_7sc_fifoIiEEED2Ev(ptr noundef nonnull align 8 dereferenceable(144) %12) #7
  call void @llvm.lifetime.end.p0(i64 144, ptr %12) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #7
  call void @_ZN6moduleD2Ev(ptr noundef nonnull align 8 dereferenceable(752) %6) #7
  call void @llvm.lifetime.end.p0(i64 752, ptr %6) #7
  %134 = load i32, ptr %3, align 4
  ret i32 %134

135:                                              ; preds = %125, %121
  %136 = getelementptr inbounds [2 x %"class.sc_core::sc_fifo"], ptr %21, i32 0, i32 0
  %137 = getelementptr inbounds %"class.sc_core::sc_fifo", ptr %136, i64 2
  br label %138

138:                                              ; preds = %138, %135
  %139 = phi ptr [ %137, %135 ], [ %140, %138 ]
  %140 = getelementptr inbounds %"class.sc_core::sc_fifo", ptr %139, i64 -1
  call void @_ZN7sc_core7sc_fifoIiED1Ev(ptr noundef nonnull align 8 dereferenceable(544) %140) #7
  %141 = icmp eq ptr %140, %136
  br i1 %141, label %142, label %138

142:                                              ; preds = %138
  br label %143

143:                                              ; preds = %142, %120
  call void @llvm.lifetime.end.p0(i64 1088, ptr %21) #7
  br label %144

144:                                              ; preds = %143, %107, %103, %99, %95
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #7
  call void @_ZN7sc_core9sc_vectorINS_7sc_fifoIiEEED2Ev(ptr noundef nonnull align 8 dereferenceable(144) %13) #7
  br label %145

145:                                              ; preds = %144, %91
  call void @llvm.lifetime.end.p0(i64 144, ptr %13) #7
  call void @_ZN7sc_core9sc_vectorINS_7sc_fifoIiEEED2Ev(ptr noundef nonnull align 8 dereferenceable(144) %12) #7
  br label %146

146:                                              ; preds = %145, %87
  call void @llvm.lifetime.end.p0(i64 144, ptr %12) #7
  br label %147

147:                                              ; preds = %146, %83
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #7
  call void @_ZN6moduleD2Ev(ptr noundef nonnull align 8 dereferenceable(752) %6) #7
  br label %148

148:                                              ; preds = %147, %79
  call void @llvm.lifetime.end.p0(i64 752, ptr %6) #7
  br label %149

149:                                              ; preds = %148
  %150 = load ptr, ptr %8, align 8
  %151 = load i32, ptr %9, align 4
  %152 = insertvalue { ptr, i32 } poison, ptr %150, 0
  %153 = insertvalue { ptr, i32 } %152, i32 %151, 1
  resume { ptr, i32 } %153
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @_ZN7sc_core14sc_module_nameC1EPKc(ptr noundef nonnull align 8 dereferenceable(33), ptr noundef) unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6moduleC2EN7sc_core14sc_module_nameE(ptr noundef nonnull align 8 dereferenceable(752), ptr noundef) unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nounwind
declare void @_ZN7sc_core14sc_module_nameD1Ev(ptr noundef nonnull align 8 dereferenceable(33)) unnamed_addr #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNK7sc_core14sc_vector_base4sizeEv(ptr noundef nonnull align 8 dereferenceable(144)) #4 align 2

declare void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_vectorINS_7sc_fifoIiEEEC2EPKcm(ptr noundef nonnull align 8 dereferenceable(144), ptr noundef, i64 noundef) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_vectorINS_11sc_fifo_outIiEEEclINS0_INS_7sc_fifoIiEEEEEENS_14sc_vector_iterIS2_NS_16sc_direct_accessIS2_EEEERT_(ptr dead_on_unwind noalias writable sret(%"class.sc_core::sc_vector_iter") align 8, ptr noundef nonnull align 8 dereferenceable(144), ptr noundef nonnull align 8 dereferenceable(144)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNK7sc_core14sc_vector_iterINS_11sc_fifo_outIiEENS_16sc_direct_accessIS2_EEEmiERKS5_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #4 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_vectorINS_11sc_fifo_outIiEEE5beginEv(ptr dead_on_unwind noalias writable sret(%"class.sc_core::sc_vector_iter") align 8, ptr noundef nonnull align 8 dereferenceable(144)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_vectorINS_11sc_fifo_outIiEEE4bindINS_14sc_vector_iterINS_7sc_fifoIiEENS_16sc_direct_accessIS7_EEEEEENS5_IS2_NS8_IS2_EEEET_SD_SC_(ptr dead_on_unwind noalias writable sret(%"class.sc_core::sc_vector_iter") align 8, ptr noundef nonnull align 8 dereferenceable(144), ptr noundef, ptr noundef, ptr noundef) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_vectorINS_7sc_fifoIiEEE5beginEv(ptr dead_on_unwind noalias writable sret(%"class.sc_core::sc_vector_iter.14") align 8, ptr noundef nonnull align 8 dereferenceable(144)) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_vectorINS_7sc_fifoIiEEE3endEv(ptr dead_on_unwind noalias writable sret(%"class.sc_core::sc_vector_iter.14") align 8, ptr noundef nonnull align 8 dereferenceable(144)) #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN7sc_core14sc_vector_iterINS_11sc_fifo_outIiEENS_16sc_direct_accessIS2_EEEC2ERKS5_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #5 align 2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #6

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK7sc_core14sc_vector_iterINS_11sc_fifo_outIiEENS_16sc_direct_accessIS2_EEEeqERKS5_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #4 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_vectorINS_11sc_fifo_outIiEEE3endEv(ptr dead_on_unwind noalias writable sret(%"class.sc_core::sc_vector_iter") align 8, ptr noundef nonnull align 8 dereferenceable(144)) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core7sc_fifoIiEC1Ei(ptr noundef nonnull align 8 dereferenceable(544), i32 noundef) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7sc_core7sc_fifoIiED1Ev(ptr noundef nonnull align 8 dereferenceable(544)) unnamed_addr #4 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_vectorINS_11sc_fifo_outIiEEEclIPNS_7sc_fifoIiEEEENS_14sc_vector_iterIS2_NS_16sc_direct_accessIS2_EEEET_SC_(ptr dead_on_unwind noalias writable sret(%"class.sc_core::sc_vector_iter") align 8, ptr noundef nonnull align 8 dereferenceable(144), ptr noundef, ptr noundef) #0 align 2

declare void @_ZN7sc_core8sc_startEv() #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7sc_core9sc_vectorINS_7sc_fifoIiEEED2Ev(ptr noundef nonnull align 8 dereferenceable(144)) unnamed_addr #4 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN6moduleD2Ev(ptr noundef nonnull align 8 dereferenceable(752)) unnamed_addr #5 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #7 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.module = type { %"class.sc_core::sc_module", %struct.sub_module, %"class.sc_core::sc_vector" }
%"class.sc_core::sc_module" = type { %"class.sc_core::sc_object", %"class.sc_core::sc_process_host", %"class.sc_core::sc_sensitive", %"class.sc_core::sc_sensitive_pos", %"class.sc_core::sc_sensitive_neg", i8, ptr, i32, ptr, ptr }
%"class.sc_core::sc_object" = type { ptr, ptr, %"class.std::vector", %"class.std::vector.0", %"class.std::__cxx11::basic_string", ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.sc_core::sc_process_host" = type { ptr }
%"class.sc_core::sc_sensitive" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_pos" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_neg" = type { ptr, i32, ptr }
%struct.sub_module = type { %"class.sc_core::sc_module", %"class.sc_core::sc_vector" }
%"class.sc_core::sc_vector" = type { %"class.sc_core::sc_vector_base" }
%"class.sc_core::sc_vector_base" = type { %"class.sc_core::sc_object", %"class.std::vector.8", ptr }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<void *, std::allocator<void *>>::_Vector_impl" }
%"struct.std::_Vector_base<void *, std::allocator<void *>>::_Vector_impl" = type { %"struct.std::_Vector_base<void *, std::allocator<void *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<void *, std::allocator<void *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_module_name" = type <{ ptr, ptr, ptr, ptr, i8, [7 x i8] }>
%"class.sc_core::sc_vector.13" = type { %"class.sc_core::sc_vector_base" }
%"class.sc_core::sc_vector_iter" = type { %"class.__gnu_cxx::__normal_iterator" }
%"class.__gnu_cxx::__normal_iterator" = type { ptr }
%"class.sc_core::sc_vector_iter.14" = type { %"class.__gnu_cxx::__normal_iterator" }
%"class.sc_core::sc_fifo" = type { %"class.sc_core::sc_fifo_in_if", %"class.sc_core::sc_fifo_out_if", %"class.sc_core::sc_prim_channel", i32, ptr, i32, i32, i32, ptr, ptr, i32, i32, i32, %"class.sc_core::sc_event", %"class.sc_core::sc_event" }
%"class.sc_core::sc_fifo_in_if" = type { %"class.sc_core::sc_fifo_nonblocking_in_if", %"class.sc_core::sc_fifo_blocking_in_if" }
%"class.sc_core::sc_fifo_nonblocking_in_if" = type { %"class.sc_core::sc_interface" }
%"class.sc_core::sc_interface" = type { ptr }
%"class.sc_core::sc_fifo_blocking_in_if" = type { %"class.sc_core::sc_interface" }
%"class.sc_core::sc_fifo_out_if" = type { %"class.sc_core::sc_fifo_nonblocking_out_if", %"class.sc_core::sc_fifo_blocking_out_if" }
%"class.sc_core::sc_fifo_nonblocking_out_if" = type { %"class.sc_core::sc_interface" }
%"class.sc_core::sc_fifo_blocking_out_if" = type { %"class.sc_core::sc_interface" }
%"class.sc_core::sc_prim_channel" = type { %"class.sc_core::sc_object", ptr, ptr }
%"class.sc_core::sc_event" = type { %"class.std::__cxx11::basic_string", ptr, ptr, i32, i32, ptr, %"class.std::vector.18", %"class.std::vector.18", %"class.std::vector.23", %"class.std::vector.23" }
%"class.std::vector.18" = type { %"struct.std::_Vector_base.19" }
%"struct.std::_Vector_base.19" = type { %"struct.std::_Vector_base<sc_core::sc_method_process *, std::allocator<sc_core::sc_method_process *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_method_process *, std::allocator<sc_core::sc_method_process *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_method_process *, std::allocator<sc_core::sc_method_process *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_method_process *, std::allocator<sc_core::sc_method_process *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.23" = type { %"struct.std::_Vector_base.24" }
%"struct.std::_Vector_base.24" = type { %"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@.str = external hidden unnamed_addr constant [4 x i8], align 1
@_ZN7sc_core23SC_ID_ASSERTION_FAILED_E = external constant [0 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [22 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [103 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [6 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [6 x i8], align 1
@.str.6 = external hidden unnamed_addr constant [37 x i8], align 1
@.str.7 = external hidden unnamed_addr constant [20 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @sc_main(i32 noundef %0, ptr nocapture noundef readnone %1) local_unnamed_addr #0 personality ptr @__gxx_personality_v0 {
  %3 = alloca %struct.module, align 8
  %4 = alloca %"class.sc_core::sc_module_name", align 8
  %5 = alloca %"class.sc_core::sc_vector.13", align 8
  %6 = alloca %"class.sc_core::sc_vector.13", align 8
  %7 = alloca %"class.sc_core::sc_vector_iter", align 8
  %8 = alloca %"class.sc_core::sc_vector_iter", align 8
  %9 = alloca %"class.sc_core::sc_vector_iter", align 8
  %10 = alloca %"class.sc_core::sc_vector_iter.14", align 8
  %11 = alloca %"class.sc_core::sc_vector_iter.14", align 8
  %12 = alloca %"class.sc_core::sc_vector_iter", align 8
  %13 = alloca %"class.sc_core::sc_vector_iter", align 8
  %14 = alloca [2 x %"class.sc_core::sc_fifo"], align 16
  %15 = alloca %"class.sc_core::sc_vector_iter", align 8
  call void @llvm.lifetime.start.p0(i64 752, ptr nonnull %3) #6
  call void @_ZN7sc_core14sc_module_nameC1EPKc(ptr noundef nonnull align 8 dereferenceable(33) %4, ptr noundef nonnull @.str)
  invoke void @_ZN6moduleC2EN7sc_core14sc_module_nameE(ptr noundef nonnull align 8 dereferenceable(752) %3, ptr noundef nonnull %4)
          to label %16 unwind label %45

16:                                               ; preds = %2
  call void @_ZN7sc_core14sc_module_nameD1Ev(ptr noundef nonnull align 8 dereferenceable(33) %4) #6
  %17 = getelementptr inbounds i8, ptr %3, i64 608
  %18 = call noundef i64 @_ZNK7sc_core14sc_vector_base4sizeEv(ptr noundef nonnull align 8 dereferenceable(144) %17)
  %19 = icmp eq i64 %18, 4
  br i1 %19, label %21, label %20

20:                                               ; preds = %16
  invoke void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef 3, ptr noundef nonnull @_ZN7sc_core23SC_ID_ASSERTION_FAILED_E, ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.3, i32 noundef 106)
          to label %21 unwind label %47

21:                                               ; preds = %20, %16
  call void @llvm.lifetime.start.p0(i64 144, ptr nonnull %5) #6
  invoke void @_ZN7sc_core9sc_vectorINS_7sc_fifoIiEEEC2EPKcm(ptr noundef nonnull align 8 dereferenceable(144) %5, ptr noundef nonnull @.str.4, i64 noundef 2)
          to label %22 unwind label %49

22:                                               ; preds = %21
  call void @llvm.lifetime.start.p0(i64 144, ptr nonnull %6) #6
  invoke void @_ZN7sc_core9sc_vectorINS_7sc_fifoIiEEEC2EPKcm(ptr noundef nonnull align 8 dereferenceable(144) %6, ptr noundef nonnull @.str.5, i64 noundef 4)
          to label %23 unwind label %51

23:                                               ; preds = %22
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %7) #6
  invoke void @_ZN7sc_core9sc_vectorINS_11sc_fifo_outIiEEEclINS0_INS_7sc_fifoIiEEEEEENS_14sc_vector_iterIS2_NS_16sc_direct_accessIS2_EEEERT_(ptr dead_on_unwind nonnull writable sret(%"class.sc_core::sc_vector_iter") align 8 %7, ptr noundef nonnull align 8 dereferenceable(144) %17, ptr noundef nonnull align 8 dereferenceable(144) %5)
          to label %24 unwind label %53

24:                                               ; preds = %23
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %8) #6
  invoke void @_ZN7sc_core9sc_vectorINS_11sc_fifo_outIiEEE5beginEv(ptr dead_on_unwind nonnull writable sret(%"class.sc_core::sc_vector_iter") align 8 %8, ptr noundef nonnull align 8 dereferenceable(144) %17)
          to label %25 unwind label %55

25:                                               ; preds = %24
  %26 = call noundef i64 @_ZNK7sc_core14sc_vector_iterINS_11sc_fifo_outIiEENS_16sc_direct_accessIS2_EEEmiERKS5_(ptr noundef nonnull align 8 dereferenceable(8) %7, ptr noundef nonnull align 8 dereferenceable(8) %8)
  %27 = icmp eq i64 %26, 2
  br i1 %27, label %29, label %28

28:                                               ; preds = %25
  invoke void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef 3, ptr noundef nonnull @_ZN7sc_core23SC_ID_ASSERTION_FAILED_E, ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.3, i32 noundef 114)
          to label %29 unwind label %55

29:                                               ; preds = %28, %25
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %8) #6
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %9) #6
  invoke void @_ZN7sc_core9sc_vectorINS_7sc_fifoIiEEE5beginEv(ptr dead_on_unwind nonnull writable sret(%"class.sc_core::sc_vector_iter.14") align 8 %10, ptr noundef nonnull align 8 dereferenceable(144) %6)
          to label %30 unwind label %57

30:                                               ; preds = %29
  invoke void @_ZN7sc_core9sc_vectorINS_7sc_fifoIiEEE3endEv(ptr dead_on_unwind nonnull writable sret(%"class.sc_core::sc_vector_iter.14") align 8 %11, ptr noundef nonnull align 8 dereferenceable(144) %6)
          to label %31 unwind label %57

31:                                               ; preds = %30
  call void @_ZN7sc_core14sc_vector_iterINS_11sc_fifo_outIiEENS_16sc_direct_accessIS2_EEEC2ERKS5_(ptr noundef nonnull align 8 dereferenceable(8) %12, ptr noundef nonnull align 8 dereferenceable(8) %7)
  invoke void @_ZN7sc_core9sc_vectorINS_11sc_fifo_outIiEEE4bindINS_14sc_vector_iterINS_7sc_fifoIiEENS_16sc_direct_accessIS7_EEEEEENS5_IS2_NS8_IS2_EEEET_SD_SC_(ptr dead_on_unwind nonnull writable sret(%"class.sc_core::sc_vector_iter") align 8 %9, ptr noundef nonnull align 8 dereferenceable(144) %17, ptr noundef nonnull %10, ptr noundef nonnull %11, ptr noundef nonnull %12)
          to label %32 unwind label %57

32:                                               ; preds = %31
  %33 = load i64, ptr %9, align 8
  store i64 %33, ptr %7, align 8
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %9) #6
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %13) #6
  invoke void @_ZN7sc_core9sc_vectorINS_11sc_fifo_outIiEEE3endEv(ptr dead_on_unwind nonnull writable sret(%"class.sc_core::sc_vector_iter") align 8 %13, ptr noundef nonnull align 8 dereferenceable(144) %17)
          to label %34 unwind label %59

34:                                               ; preds = %32
  %35 = call noundef zeroext i1 @_ZNK7sc_core14sc_vector_iterINS_11sc_fifo_outIiEENS_16sc_direct_accessIS2_EEEeqERKS5_(ptr noundef nonnull align 8 dereferenceable(8) %7, ptr noundef nonnull align 8 dereferenceable(8) %13)
  br i1 %35, label %37, label %36

36:                                               ; preds = %34
  invoke void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef 3, ptr noundef nonnull @_ZN7sc_core23SC_ID_ASSERTION_FAILED_E, ptr noundef nonnull @.str.7, ptr noundef nonnull @.str.3, i32 noundef 118)
          to label %37 unwind label %59

37:                                               ; preds = %36, %34
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %13) #6
  call void @llvm.lifetime.start.p0(i64 1088, ptr nonnull %14) #6
  %38 = getelementptr inbounds i8, ptr %14, i64 1088
  invoke void @_ZN7sc_core7sc_fifoIiEC1Ei(ptr noundef nonnull align 8 dereferenceable(544) %14, i32 noundef 16)
          to label %40 unwind label %.thread

.thread:                                          ; preds = %37
  %39 = landingpad { ptr, i32 }
          cleanup
  br label %.loopexit

40:                                               ; preds = %37
  %.ptr.1 = getelementptr inbounds i8, ptr %14, i64 544
  invoke void @_ZN7sc_core7sc_fifoIiEC1Ei(ptr noundef nonnull align 8 dereferenceable(544) %.ptr.1, i32 noundef 16)
          to label %41 unwind label %.preheader21.preheader

41:                                               ; preds = %40
  %42 = getelementptr inbounds i8, ptr %3, i64 464
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %15) #6
  invoke void @_ZN7sc_core9sc_vectorINS_11sc_fifo_outIiEEEclIPNS_7sc_fifoIiEEEENS_14sc_vector_iterIS2_NS_16sc_direct_accessIS2_EEEET_SC_(ptr dead_on_unwind nonnull writable sret(%"class.sc_core::sc_vector_iter") align 8 %15, ptr noundef nonnull align 8 dereferenceable(144) %42, ptr noundef nonnull %14, ptr noundef nonnull %38)
          to label %43 unwind label %62

43:                                               ; preds = %41
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %15) #6
  invoke void @_ZN7sc_core8sc_startEv()
          to label %.preheader.preheader unwind label %64

.preheader.preheader:                             ; preds = %43
  %44 = getelementptr inbounds i8, ptr %14, i64 544
  call void @_ZN7sc_core7sc_fifoIiED1Ev(ptr noundef nonnull align 8 dereferenceable(544) %44) #6
  call void @_ZN7sc_core7sc_fifoIiED1Ev(ptr noundef nonnull align 8 dereferenceable(544) %14) #6
  call void @llvm.lifetime.end.p0(i64 1088, ptr nonnull %14) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #6
  call void @_ZN7sc_core9sc_vectorINS_7sc_fifoIiEEED2Ev(ptr noundef nonnull align 8 dereferenceable(144) %6) #6
  call void @llvm.lifetime.end.p0(i64 144, ptr nonnull %6) #6
  call void @_ZN7sc_core9sc_vectorINS_7sc_fifoIiEEED2Ev(ptr noundef nonnull align 8 dereferenceable(144) %5) #6
  call void @llvm.lifetime.end.p0(i64 144, ptr nonnull %5) #6
  call void @_ZN6moduleD2Ev(ptr noundef nonnull align 8 dereferenceable(752) %3) #6
  call void @llvm.lifetime.end.p0(i64 752, ptr nonnull %3) #6
  ret i32 0

45:                                               ; preds = %2
  %46 = landingpad { ptr, i32 }
          cleanup
  call void @_ZN7sc_core14sc_module_nameD1Ev(ptr noundef nonnull align 8 dereferenceable(33) %4) #6
  br label %71

47:                                               ; preds = %20
  %48 = landingpad { ptr, i32 }
          cleanup
  br label %70

49:                                               ; preds = %21
  %50 = landingpad { ptr, i32 }
          cleanup
  br label %69

51:                                               ; preds = %22
  %52 = landingpad { ptr, i32 }
          cleanup
  br label %68

53:                                               ; preds = %23
  %54 = landingpad { ptr, i32 }
          cleanup
  br label %67

55:                                               ; preds = %28, %24
  %56 = landingpad { ptr, i32 }
          cleanup
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %8) #6
  br label %67

57:                                               ; preds = %31, %30, %29
  %58 = landingpad { ptr, i32 }
          cleanup
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %9) #6
  br label %67

59:                                               ; preds = %36, %32
  %60 = landingpad { ptr, i32 }
          cleanup
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %13) #6
  br label %67

.preheader21.preheader:                           ; preds = %40
  %61 = landingpad { ptr, i32 }
          cleanup
  call void @_ZN7sc_core7sc_fifoIiED1Ev(ptr noundef nonnull align 8 dereferenceable(544) %14) #6
  br label %.loopexit

62:                                               ; preds = %41
  %63 = landingpad { ptr, i32 }
          cleanup
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %15) #6
  br label %.loopexit.loopexit

64:                                               ; preds = %43
  %65 = landingpad { ptr, i32 }
          cleanup
  br label %.loopexit.loopexit

.loopexit.loopexit:                               ; preds = %64, %62
  %.pn = phi { ptr, i32 } [ %65, %64 ], [ %63, %62 ]
  %66 = getelementptr inbounds i8, ptr %14, i64 544
  call void @_ZN7sc_core7sc_fifoIiED1Ev(ptr noundef nonnull align 8 dereferenceable(544) %66) #6
  call void @_ZN7sc_core7sc_fifoIiED1Ev(ptr noundef nonnull align 8 dereferenceable(544) %14) #6
  br label %.loopexit

.loopexit:                                        ; preds = %.preheader21.preheader, %.thread, %.loopexit.loopexit
  %.pn.pn = phi { ptr, i32 } [ %.pn, %.loopexit.loopexit ], [ %39, %.thread ], [ %61, %.preheader21.preheader ]
  call void @llvm.lifetime.end.p0(i64 1088, ptr nonnull %14) #6
  br label %67

67:                                               ; preds = %.loopexit, %59, %57, %55, %53
  %.pn.pn.pn = phi { ptr, i32 } [ %.pn.pn, %.loopexit ], [ %60, %59 ], [ %58, %57 ], [ %56, %55 ], [ %54, %53 ]
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #6
  call void @_ZN7sc_core9sc_vectorINS_7sc_fifoIiEEED2Ev(ptr noundef nonnull align 8 dereferenceable(144) %6) #6
  br label %68

68:                                               ; preds = %67, %51
  %.pn.pn.pn.pn = phi { ptr, i32 } [ %.pn.pn.pn, %67 ], [ %52, %51 ]
  call void @llvm.lifetime.end.p0(i64 144, ptr nonnull %6) #6
  call void @_ZN7sc_core9sc_vectorINS_7sc_fifoIiEEED2Ev(ptr noundef nonnull align 8 dereferenceable(144) %5) #6
  br label %69

69:                                               ; preds = %68, %49
  %.pn.pn.pn.pn.pn = phi { ptr, i32 } [ %.pn.pn.pn.pn, %68 ], [ %50, %49 ]
  call void @llvm.lifetime.end.p0(i64 144, ptr nonnull %5) #6
  br label %70

70:                                               ; preds = %69, %47
  %.pn.pn.pn.pn.pn.pn = phi { ptr, i32 } [ %.pn.pn.pn.pn.pn, %69 ], [ %48, %47 ]
  call void @_ZN6moduleD2Ev(ptr noundef nonnull align 8 dereferenceable(752) %3) #6
  br label %71

71:                                               ; preds = %70, %45
  %.pn.pn.pn.pn.pn.pn.pn = phi { ptr, i32 } [ %.pn.pn.pn.pn.pn.pn, %70 ], [ %46, %45 ]
  call void @llvm.lifetime.end.p0(i64 752, ptr nonnull %3) #6
  resume { ptr, i32 } %.pn.pn.pn.pn.pn.pn.pn
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @_ZN7sc_core14sc_module_nameC1EPKc(ptr noundef nonnull align 8 dereferenceable(33), ptr noundef) unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6moduleC2EN7sc_core14sc_module_nameE(ptr noundef nonnull align 8 dereferenceable(752), ptr noundef) unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nounwind
declare void @_ZN7sc_core14sc_module_nameD1Ev(ptr noundef nonnull align 8 dereferenceable(33)) unnamed_addr #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNK7sc_core14sc_vector_base4sizeEv(ptr noundef nonnull align 8 dereferenceable(144)) local_unnamed_addr #4 align 2

declare void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_vectorINS_7sc_fifoIiEEEC2EPKcm(ptr noundef nonnull align 8 dereferenceable(144), ptr noundef, i64 noundef) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_vectorINS_11sc_fifo_outIiEEEclINS0_INS_7sc_fifoIiEEEEEENS_14sc_vector_iterIS2_NS_16sc_direct_accessIS2_EEEERT_(ptr dead_on_unwind noalias writable sret(%"class.sc_core::sc_vector_iter") align 8, ptr noundef nonnull align 8 dereferenceable(144), ptr noundef nonnull align 8 dereferenceable(144)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNK7sc_core14sc_vector_iterINS_11sc_fifo_outIiEENS_16sc_direct_accessIS2_EEEmiERKS5_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #4 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_vectorINS_11sc_fifo_outIiEEE5beginEv(ptr dead_on_unwind noalias writable sret(%"class.sc_core::sc_vector_iter") align 8, ptr noundef nonnull align 8 dereferenceable(144)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_vectorINS_11sc_fifo_outIiEEE4bindINS_14sc_vector_iterINS_7sc_fifoIiEENS_16sc_direct_accessIS7_EEEEEENS5_IS2_NS8_IS2_EEEET_SD_SC_(ptr dead_on_unwind noalias writable sret(%"class.sc_core::sc_vector_iter") align 8, ptr noundef nonnull align 8 dereferenceable(144), ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_vectorINS_7sc_fifoIiEEE5beginEv(ptr dead_on_unwind noalias writable sret(%"class.sc_core::sc_vector_iter.14") align 8, ptr noundef nonnull align 8 dereferenceable(144)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_vectorINS_7sc_fifoIiEEE3endEv(ptr dead_on_unwind noalias writable sret(%"class.sc_core::sc_vector_iter.14") align 8, ptr noundef nonnull align 8 dereferenceable(144)) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN7sc_core14sc_vector_iterINS_11sc_fifo_outIiEENS_16sc_direct_accessIS2_EEEC2ERKS5_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #5 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK7sc_core14sc_vector_iterINS_11sc_fifo_outIiEENS_16sc_direct_accessIS2_EEEeqERKS5_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #4 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_vectorINS_11sc_fifo_outIiEEE3endEv(ptr dead_on_unwind noalias writable sret(%"class.sc_core::sc_vector_iter") align 8, ptr noundef nonnull align 8 dereferenceable(144)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core7sc_fifoIiEC1Ei(ptr noundef nonnull align 8 dereferenceable(544), i32 noundef) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7sc_core7sc_fifoIiED1Ev(ptr noundef nonnull align 8 dereferenceable(544)) unnamed_addr #4 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_vectorINS_11sc_fifo_outIiEEEclIPNS_7sc_fifoIiEEEENS_14sc_vector_iterIS2_NS_16sc_direct_accessIS2_EEEET_SC_(ptr dead_on_unwind noalias writable sret(%"class.sc_core::sc_vector_iter") align 8, ptr noundef nonnull align 8 dereferenceable(144), ptr noundef, ptr noundef) local_unnamed_addr #0 align 2

declare void @_ZN7sc_core8sc_startEv() local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7sc_core9sc_vectorINS_7sc_fifoIiEEED2Ev(ptr noundef nonnull align 8 dereferenceable(144)) unnamed_addr #4 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN6moduleD2Ev(ptr noundef nonnull align 8 dereferenceable(752)) unnamed_addr #5 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LoopSimplifyPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass