; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Universal (Ip4RemoveGroupAddr)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i64 @Ip4RemoveGroupAddr(ptr noundef %0, i32 noundef %1, i32 noundef %2) #1 {
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  store i32 %2, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  store i32 0, ptr %7, align 4, !tbaa !9
  br label %8

8:                                                ; preds = %22, %3
  %9 = load i32, ptr %7, align 4, !tbaa !9
  %10 = load i32, ptr %5, align 4, !tbaa !9
  %11 = icmp ult i32 %9, %10
  br i1 %11, label %12, label %25

12:                                               ; preds = %8
  %13 = load ptr, ptr %4, align 8, !tbaa !5
  %14 = load i32, ptr %7, align 4, !tbaa !9
  %15 = zext i32 %14 to i64
  %16 = getelementptr inbounds i32, ptr %13, i64 %15
  %17 = load i32, ptr %16, align 4, !tbaa !9
  %18 = load i32, ptr %6, align 4, !tbaa !9
  %19 = icmp eq i32 %17, %18
  br i1 %19, label %20, label %21

20:                                               ; preds = %12
  br label %25

21:                                               ; preds = %12
  br label %22

22:                                               ; preds = %21
  %23 = load i32, ptr %7, align 4, !tbaa !9
  %24 = add i32 %23, 1
  store i32 %24, ptr %7, align 4, !tbaa !9
  br label %8, !llvm.loop !11

25:                                               ; preds = %20, %8
  br label %26

26:                                               ; preds = %31, %25
  %27 = load i32, ptr %7, align 4, !tbaa !9
  %28 = load i32, ptr %5, align 4, !tbaa !9
  %29 = sub i32 %28, 1
  %30 = icmp ult i32 %27, %29
  br i1 %30, label %31, label %44

31:                                               ; preds = %26
  %32 = load ptr, ptr %4, align 8, !tbaa !5
  %33 = load i32, ptr %7, align 4, !tbaa !9
  %34 = add i32 %33, 1
  %35 = zext i32 %34 to i64
  %36 = getelementptr inbounds i32, ptr %32, i64 %35
  %37 = load i32, ptr %36, align 4, !tbaa !9
  %38 = load ptr, ptr %4, align 8, !tbaa !5
  %39 = load i32, ptr %7, align 4, !tbaa !9
  %40 = zext i32 %39 to i64
  %41 = getelementptr inbounds i32, ptr %38, i64 %40
  store i32 %37, ptr %41, align 4, !tbaa !9
  %42 = load i32, ptr %7, align 4, !tbaa !9
  %43 = add i32 %42, 1
  store i32 %43, ptr %7, align 4, !tbaa !9
  br label %26, !llvm.loop !13

44:                                               ; preds = %26
  %45 = load i32, ptr %7, align 4, !tbaa !9
  %46 = zext i32 %45 to i64
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  ret i64 %46
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable
define dso_local range(i64 0, 4294967296) i64 @Ip4RemoveGroupAddr(ptr nocapture noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %.not = icmp eq i32 %1, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %3
  %wide.trip.count = zext i32 %1 to i64
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %7
  %indvars.iv = phi i64 [ 0, %.lr.ph.preheader ], [ %indvars.iv.next, %7 ]
  %4 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv
  %5 = load i32, ptr %4, align 4, !tbaa !5
  %6 = icmp eq i32 %5, %2
  br i1 %6, label %._crit_edge.loopexit.split.loop.exit, label %7

7:                                                ; preds = %.lr.ph
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !9

._crit_edge.loopexit.split.loop.exit:             ; preds = %.lr.ph
  %8 = trunc nuw i64 %indvars.iv to i32
  br label %._crit_edge

._crit_edge:                                      ; preds = %7, %._crit_edge.loopexit.split.loop.exit, %3
  %.0.lcssa = phi i32 [ 0, %3 ], [ %8, %._crit_edge.loopexit.split.loop.exit ], [ %1, %7 ]
  %9 = add i32 %1, -1
  %10 = icmp ult i32 %.0.lcssa, %9
  %11 = zext i32 %.0.lcssa to i64
  br i1 %10, label %.lr.ph18.preheader, label %._crit_edge19

.lr.ph18.preheader:                               ; preds = %._crit_edge
  %wide.trip.count26 = zext i32 %9 to i64
  %12 = sub nsw i64 %wide.trip.count26, %11
  %min.iters.check = icmp ult i64 %12, 8
  br i1 %min.iters.check, label %.lr.ph18.preheader32, label %vector.ph

vector.ph:                                        ; preds = %.lr.ph18.preheader
  %n.vec = and i64 %12, -8
  %ind.end = add nsw i64 %n.vec, %11
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %offset.idx = add i64 %index, %11
  %13 = getelementptr i32, ptr %0, i64 %offset.idx
  %14 = getelementptr i8, ptr %13, i64 4
  %15 = getelementptr i8, ptr %13, i64 20
  %wide.load = load <4 x i32>, ptr %14, align 4, !tbaa !5
  %wide.load31 = load <4 x i32>, ptr %15, align 4, !tbaa !5
  %16 = getelementptr inbounds i32, ptr %0, i64 %offset.idx
  %17 = getelementptr inbounds i8, ptr %16, i64 16
  store <4 x i32> %wide.load, ptr %16, align 4, !tbaa !5
  store <4 x i32> %wide.load31, ptr %17, align 4, !tbaa !5
  %index.next = add nuw i64 %index, 8
  %18 = icmp eq i64 %index.next, %n.vec
  br i1 %18, label %middle.block, label %vector.body, !llvm.loop !11

middle.block:                                     ; preds = %vector.body
  %cmp.n = icmp eq i64 %12, %n.vec
  br i1 %cmp.n, label %._crit_edge19, label %.lr.ph18.preheader32

.lr.ph18.preheader32:                             ; preds = %middle.block, %.lr.ph18.preheader
  %indvars.iv23.ph = phi i64 [ %11, %.lr.ph18.preheader ], [ %ind.end, %middle.block ]
  br label %.lr.ph18

.lr.ph18:                                         ; preds = %.lr.ph18.preheader32, %.lr.ph18
  %indvars.iv23 = phi i64 [ %indvars.iv.next24, %.lr.ph18 ], [ %indvars.iv23.ph, %.lr.ph18.preheader32 ]
  %indvars.iv.next24 = add nuw nsw i64 %indvars.iv23, 1
  %19 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv.next24
  %20 = load i32, ptr %19, align 4, !tbaa !5
  %21 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv23
  store i32 %20, ptr %21, align 4, !tbaa !5
  %exitcond27.not = icmp eq i64 %indvars.iv.next24, %wide.trip.count26
  br i1 %exitcond27.not, label %._crit_edge19, label %.lr.ph18, !llvm.loop !14

._crit_edge19:                                    ; preds = %.lr.ph18, %middle.block, %._crit_edge
  %.pre-phi = phi i64 [ %11, %._crit_edge ], [ %wide.trip.count26, %middle.block ], [ %wide.trip.count26, %.lr.ph18 ]
  ret i64 %.pre-phi
}

attributes #0 = { nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10, !12, !13}
!12 = !{!"llvm.loop.isvectorized", i32 1}
!13 = !{!"llvm.loop.unroll.runtime.disable"}
!14 = distinct !{!14, !10, !13, !12}


; Effective O3 passes: BDCEPass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass