; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/kernel (sc_thread_process)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_core::sc_thread_process" = type <{ %"class.sc_core::sc_process_b.base", [3 x i8], ptr, %"class.std::vector.18", i64, i32, [4 x i8] }>
%"class.sc_core::sc_process_b.base" = type <{ %"class.sc_core::sc_object", ptr, i32, i32, i32, i32, i8, i8, [6 x i8], ptr, i32, [4 x i8], ptr, ptr, i8, i8, i8, i8, [4 x i8], ptr, ptr, i32, i32, %"class.std::vector.8", ptr, ptr, ptr, ptr, { i64, i64 }, i32, [4 x i8], %"class.std::vector.13", i8, [7 x i8], ptr, ptr, i32, i8, [3 x i8], ptr, i32, i8 }>
%"class.sc_core::sc_object" = type { ptr, ptr, %"class.std::vector", %"class.std::vector.0", %"class.std::__cxx11::basic_string", ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<sc_core::sc_reset *, std::allocator<sc_core::sc_reset *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_reset *, std::allocator<sc_core::sc_reset *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_reset *, std::allocator<sc_core::sc_reset *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_reset *, std::allocator<sc_core::sc_reset *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.13" = type { %"struct.std::_Vector_base.14" }
%"struct.std::_Vector_base.14" = type { %"struct.std::_Vector_base<const sc_core::sc_event *, std::allocator<const sc_core::sc_event *>>::_Vector_impl" }
%"struct.std::_Vector_base<const sc_core::sc_event *, std::allocator<const sc_core::sc_event *>>::_Vector_impl" = type { %"struct.std::_Vector_base<const sc_core::sc_event *, std::allocator<const sc_core::sc_event *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<const sc_core::sc_event *, std::allocator<const sc_core::sc_event *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.18" = type { %"struct.std::_Vector_base.19" }
%"struct.std::_Vector_base.19" = type { %"struct.std::_Vector_base<sc_core::sc_process_monitor *, std::allocator<sc_core::sc_process_monitor *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_process_monitor *, std::allocator<sc_core::sc_process_monitor *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_process_monitor *, std::allocator<sc_core::sc_process_monitor *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_process_monitor *, std::allocator<sc_core::sc_process_monitor *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_process_b" = type <{ %"class.sc_core::sc_object", ptr, i32, i32, i32, i32, i8, i8, [6 x i8], ptr, i32, [4 x i8], ptr, ptr, i8, i8, i8, i8, [4 x i8], ptr, ptr, i32, i32, %"class.std::vector.8", ptr, ptr, ptr, ptr, { i64, i64 }, i32, [4 x i8], %"class.std::vector.13", i8, [7 x i8], ptr, ptr, i32, i8, [3 x i8], ptr, i32, i8, [3 x i8] }>
%"class.sc_core::sc_spawn_options" = type { i8, %"class.std::vector.33", %"class.std::vector.13", %"class.std::vector.38", %"class.std::vector.43", %"class.std::vector.48", i8, i32 }
%"class.std::vector.33" = type { %"struct.std::_Vector_base.34" }
%"struct.std::_Vector_base.34" = type { %"struct.std::_Vector_base<sc_core::sc_spawn_reset_base *, std::allocator<sc_core::sc_spawn_reset_base *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_spawn_reset_base *, std::allocator<sc_core::sc_spawn_reset_base *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_spawn_reset_base *, std::allocator<sc_core::sc_spawn_reset_base *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_spawn_reset_base *, std::allocator<sc_core::sc_spawn_reset_base *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.38" = type { %"struct.std::_Vector_base.39" }
%"struct.std::_Vector_base.39" = type { %"struct.std::_Vector_base<sc_core::sc_event_finder *, std::allocator<sc_core::sc_event_finder *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_event_finder *, std::allocator<sc_core::sc_event_finder *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_event_finder *, std::allocator<sc_core::sc_event_finder *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_event_finder *, std::allocator<sc_core::sc_event_finder *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.43" = type { %"struct.std::_Vector_base.44" }
%"struct.std::_Vector_base.44" = type { %"struct.std::_Vector_base<sc_core::sc_interface *, std::allocator<sc_core::sc_interface *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_interface *, std::allocator<sc_core::sc_interface *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_interface *, std::allocator<sc_core::sc_interface *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_interface *, std::allocator<sc_core::sc_interface *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.48" = type { %"struct.std::_Vector_base.49" }
%"struct.std::_Vector_base.49" = type { %"struct.std::_Vector_base<sc_core::sc_port_base *, std::allocator<sc_core::sc_port_base *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_port_base *, std::allocator<sc_core::sc_port_base *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_port_base *, std::allocator<sc_core::sc_port_base *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_port_base *, std::allocator<sc_core::sc_port_base *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@.str.2 = external hidden unnamed_addr constant [1 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [9 x i8], align 1
@_ZTVN7sc_core17sc_thread_processE = external dso_local unnamed_addr constant { [27 x ptr] }, align 8
@_ZTIN7sc_core15sc_process_hostE = external dso_local constant { ptr, ptr }, align 8
@_ZTIN7sc_core9sc_moduleE = external constant ptr
@_ZN7sc_core32SC_ID_MODULE_THREAD_AFTER_START_E = external constant [0 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef ptr @_ZN7sc_core22sc_get_curr_simcontextEv() #1

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind willreturn memory(read)
declare ptr @__dynamic_cast(ptr, ptr, ptr, i64) #2

declare void @_ZNK7sc_core12sc_process_b12report_errorEPKcS2_(ptr noundef nonnull align 8 dereferenceable(357), ptr noundef, ptr noundef) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN7sc_core13sc_is_runningEPKNS_13sc_simcontextE(ptr noundef) #4

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core17sc_thread_processC2EPKcbMNS_15sc_process_hostEFvvEPS3_PKNS_16sc_spawn_optionsE(ptr noundef nonnull align 8 dereferenceable(404) %0, ptr noundef %1, i1 noundef zeroext %2, i64 %3, i64 %4, ptr noundef %5, ptr noundef %6) unnamed_addr #5 align 2 personality ptr @__gxx_personality_v0 {
  %8 = alloca { i64, i64 }, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca i8, align 1
  %12 = alloca { i64, i64 }, align 8
  %13 = alloca ptr, align 8
  %14 = alloca ptr, align 8
  %15 = alloca { i64, i64 }, align 8
  %16 = alloca ptr, align 8
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = getelementptr inbounds { i64, i64 }, ptr %8, i32 0, i32 0
  store i64 %3, ptr %22, align 8
  %23 = getelementptr inbounds { i64, i64 }, ptr %8, i32 0, i32 1
  store i64 %4, ptr %23, align 8
  %24 = load { i64, i64 }, ptr %8, align 8, !tbaa !5
  store ptr %0, ptr %9, align 8, !tbaa !8
  store ptr %1, ptr %10, align 8, !tbaa !8
  %25 = zext i1 %2 to i8
  store i8 %25, ptr %11, align 1, !tbaa !10
  store { i64, i64 } %24, ptr %12, align 8, !tbaa !5
  store ptr %5, ptr %13, align 8, !tbaa !8
  store ptr %6, ptr %14, align 8, !tbaa !8
  %26 = load ptr, ptr %9, align 8
  %27 = load ptr, ptr %10, align 8, !tbaa !8
  %28 = icmp ne ptr %27, null
  br i1 %28, label %29, label %31

29:                                               ; preds = %7
  %30 = load ptr, ptr %10, align 8, !tbaa !8
  br label %33

31:                                               ; preds = %7
  %32 = call noundef ptr @_ZN7sc_core18sc_gen_unique_nameEPKcb(ptr noundef @.str.5, i1 noundef zeroext false)
  br label %33

33:                                               ; preds = %31, %29
  %34 = phi ptr [ %30, %29 ], [ %32, %31 ]
  %35 = load i8, ptr %11, align 1, !tbaa !10, !range !12, !noundef !13
  %36 = trunc i8 %35 to i1
  %37 = load { i64, i64 }, ptr %12, align 8, !tbaa !5
  %38 = load ptr, ptr %13, align 8, !tbaa !8
  %39 = load ptr, ptr %14, align 8, !tbaa !8
  store { i64, i64 } %37, ptr %15, align 8, !tbaa !5
  %40 = getelementptr inbounds { i64, i64 }, ptr %15, i32 0, i32 0
  %41 = load i64, ptr %40, align 8
  %42 = getelementptr inbounds { i64, i64 }, ptr %15, i32 0, i32 1
  %43 = load i64, ptr %42, align 8
  call void @_ZN7sc_core12sc_process_bC2EPKcbbMNS_15sc_process_hostEFvvEPS3_PKNS_16sc_spawn_optionsE(ptr noundef nonnull align 8 dereferenceable(357) %26, ptr noundef %34, i1 noundef zeroext true, i1 noundef zeroext %36, i64 %41, i64 %43, ptr noundef %38, ptr noundef %39)
  store ptr getelementptr inbounds inrange(-16, 200) ({ [27 x ptr] }, ptr @_ZTVN7sc_core17sc_thread_processE, i32 0, i32 0, i32 2), ptr %26, align 8, !tbaa !14
  %44 = getelementptr inbounds %"class.sc_core::sc_thread_process", ptr %26, i32 0, i32 2
  store ptr null, ptr %44, align 8, !tbaa !16
  %45 = getelementptr inbounds %"class.sc_core::sc_thread_process", ptr %26, i32 0, i32 3
  call void @llvm.memset.p0.i64(ptr align 8 %45, i8 0, i64 24, i1 false)
  call void @_ZNSt6vectorIPN7sc_core18sc_process_monitorESaIS2_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %45) #9
  %46 = getelementptr inbounds %"class.sc_core::sc_thread_process", ptr %26, i32 0, i32 4
  store i64 262144, ptr %46, align 8, !tbaa !47
  %47 = getelementptr inbounds %"class.sc_core::sc_thread_process", ptr %26, i32 0, i32 5
  store i32 0, ptr %47, align 8, !tbaa !48
  %48 = load ptr, ptr %13, align 8, !tbaa !8
  %49 = icmp eq ptr %48, null
  br i1 %49, label %52, label %50

50:                                               ; preds = %33
  %51 = call ptr @__dynamic_cast(ptr %48, ptr @_ZTIN7sc_core15sc_process_hostE, ptr @_ZTIN7sc_core9sc_moduleE, i64 112) #9
  br label %53

52:                                               ; preds = %33
  br label %53

53:                                               ; preds = %52, %50
  %54 = phi ptr [ %51, %50 ], [ null, %52 ]
  %55 = icmp ne ptr %54, null
  br i1 %55, label %56, label %67

56:                                               ; preds = %53
  %57 = invoke noundef ptr @_ZN7sc_core22sc_get_curr_simcontextEv()
          to label %58 unwind label %63

58:                                               ; preds = %56
  %59 = invoke noundef zeroext i1 @_ZN7sc_core13sc_is_runningEPKNS_13sc_simcontextE(ptr noundef %57)
          to label %60 unwind label %63

60:                                               ; preds = %58
  br i1 %59, label %61, label %67

61:                                               ; preds = %60
  invoke void @_ZNK7sc_core12sc_process_b12report_errorEPKcS2_(ptr noundef nonnull align 8 dereferenceable(357) %26, ptr noundef @_ZN7sc_core32SC_ID_MODULE_THREAD_AFTER_START_E, ptr noundef @.str.2)
          to label %62 unwind label %63

62:                                               ; preds = %61
  br label %67

63:                                               ; preds = %184, %61, %58, %56
  %64 = landingpad { ptr, i32 }
          cleanup
  %65 = extractvalue { ptr, i32 } %64, 0
  store ptr %65, ptr %16, align 8
  %66 = extractvalue { ptr, i32 } %64, 1
  store i32 %66, ptr %17, align 4
  br label %190

67:                                               ; preds = %62, %60, %53
  %68 = getelementptr inbounds %"class.sc_core::sc_process_b", ptr %26, i32 0, i32 21
  store i32 2, ptr %68, align 8, !tbaa !49
  %69 = load ptr, ptr %14, align 8, !tbaa !8
  %70 = icmp ne ptr %69, null
  br i1 %70, label %71, label %187

71:                                               ; preds = %67
  %72 = load ptr, ptr %14, align 8, !tbaa !8
  %73 = getelementptr inbounds %"class.sc_core::sc_spawn_options", ptr %72, i32 0, i32 0
  %74 = load i8, ptr %73, align 8, !tbaa !50, !range !12, !noundef !13
  %75 = trunc i8 %74 to i1
  %76 = getelementptr inbounds %"class.sc_core::sc_process_b", ptr %26, i32 0, i32 6
  %77 = zext i1 %75 to i8
  store i8 %77, ptr %76, align 8, !tbaa !68
  %78 = load ptr, ptr %14, align 8, !tbaa !8
  %79 = getelementptr inbounds %"class.sc_core::sc_spawn_options", ptr %78, i32 0, i32 7
  %80 = load i32, ptr %79, align 4, !tbaa !69
  %81 = icmp ne i32 %80, 0
  br i1 %81, label %82, label %88

82:                                               ; preds = %71
  %83 = load ptr, ptr %14, align 8, !tbaa !8
  %84 = getelementptr inbounds %"class.sc_core::sc_spawn_options", ptr %83, i32 0, i32 7
  %85 = load i32, ptr %84, align 4, !tbaa !69
  %86 = sext i32 %85 to i64
  %87 = getelementptr inbounds %"class.sc_core::sc_thread_process", ptr %26, i32 0, i32 4
  store i64 %86, ptr %87, align 8, !tbaa !47
  br label %88

88:                                               ; preds = %82, %71
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #9
  store i32 0, ptr %18, align 4, !tbaa !70
  br label %89

89:                                               ; preds = %105, %88
  %90 = load i32, ptr %18, align 4, !tbaa !70
  %91 = zext i32 %90 to i64
  %92 = load ptr, ptr %14, align 8, !tbaa !8
  %93 = getelementptr inbounds %"class.sc_core::sc_spawn_options", ptr %92, i32 0, i32 2
  %94 = call noundef i64 @_ZNKSt6vectorIPKN7sc_core8sc_eventESaIS3_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %93) #9
  %95 = icmp ult i64 %91, %94
  br i1 %95, label %97, label %96

96:                                               ; preds = %89
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #9
  br label %112

97:                                               ; preds = %89
  %98 = load ptr, ptr %14, align 8, !tbaa !8
  %99 = getelementptr inbounds %"class.sc_core::sc_spawn_options", ptr %98, i32 0, i32 2
  %100 = load i32, ptr %18, align 4, !tbaa !70
  %101 = zext i32 %100 to i64
  %102 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIPKN7sc_core8sc_eventESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %99, i64 noundef %101) #9
  %103 = load ptr, ptr %102, align 8, !tbaa !8
  invoke void @_ZN7sc_core12sc_sensitive23make_static_sensitivityEPNS_12sc_process_bERKNS_8sc_eventE(ptr noundef %26, ptr noundef nonnull align 8 dereferenceable(160) %103)
          to label %104 unwind label %108

104:                                              ; preds = %97
  br label %105

105:                                              ; preds = %104
  %106 = load i32, ptr %18, align 4, !tbaa !70
  %107 = add i32 %106, 1
  store i32 %107, ptr %18, align 4, !tbaa !70
  br label %89, !llvm.loop !71

108:                                              ; preds = %97
  %109 = landingpad { ptr, i32 }
          cleanup
  %110 = extractvalue { ptr, i32 } %109, 0
  store ptr %110, ptr %16, align 8
  %111 = extractvalue { ptr, i32 } %109, 1
  store i32 %111, ptr %17, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #9
  br label %190

112:                                              ; preds = %96
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #9
  store i32 0, ptr %19, align 4, !tbaa !70
  br label %113

113:                                              ; preds = %129, %112
  %114 = load i32, ptr %19, align 4, !tbaa !70
  %115 = zext i32 %114 to i64
  %116 = load ptr, ptr %14, align 8, !tbaa !8
  %117 = getelementptr inbounds %"class.sc_core::sc_spawn_options", ptr %116, i32 0, i32 5
  %118 = call noundef i64 @_ZNKSt6vectorIPN7sc_core12sc_port_baseESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %117) #9
  %119 = icmp ult i64 %115, %118
  br i1 %119, label %121, label %120

120:                                              ; preds = %113
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #9
  br label %136

121:                                              ; preds = %113
  %122 = load ptr, ptr %14, align 8, !tbaa !8
  %123 = getelementptr inbounds %"class.sc_core::sc_spawn_options", ptr %122, i32 0, i32 5
  %124 = load i32, ptr %19, align 4, !tbaa !70
  %125 = zext i32 %124 to i64
  %126 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIPN7sc_core12sc_port_baseESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %123, i64 noundef %125) #9
  %127 = load ptr, ptr %126, align 8, !tbaa !8
  invoke void @_ZN7sc_core12sc_sensitive23make_static_sensitivityEPNS_12sc_process_bERKNS_12sc_port_baseE(ptr noundef %26, ptr noundef nonnull align 8 dereferenceable(120) %127)
          to label %128 unwind label %132

128:                                              ; preds = %121
  br label %129

129:                                              ; preds = %128
  %130 = load i32, ptr %19, align 4, !tbaa !70
  %131 = add i32 %130, 1
  store i32 %131, ptr %19, align 4, !tbaa !70
  br label %113, !llvm.loop !73

132:                                              ; preds = %121
  %133 = landingpad { ptr, i32 }
          cleanup
  %134 = extractvalue { ptr, i32 } %133, 0
  store ptr %134, ptr %16, align 8
  %135 = extractvalue { ptr, i32 } %133, 1
  store i32 %135, ptr %17, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #9
  br label %190

136:                                              ; preds = %120
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #9
  store i32 0, ptr %20, align 4, !tbaa !70
  br label %137

137:                                              ; preds = %153, %136
  %138 = load i32, ptr %20, align 4, !tbaa !70
  %139 = zext i32 %138 to i64
  %140 = load ptr, ptr %14, align 8, !tbaa !8
  %141 = getelementptr inbounds %"class.sc_core::sc_spawn_options", ptr %140, i32 0, i32 4
  %142 = call noundef i64 @_ZNKSt6vectorIPN7sc_core12sc_interfaceESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %141) #9
  %143 = icmp ult i64 %139, %142
  br i1 %143, label %145, label %144

144:                                              ; preds = %137
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #9
  br label %160

145:                                              ; preds = %137
  %146 = load ptr, ptr %14, align 8, !tbaa !8
  %147 = getelementptr inbounds %"class.sc_core::sc_spawn_options", ptr %146, i32 0, i32 4
  %148 = load i32, ptr %20, align 4, !tbaa !70
  %149 = zext i32 %148 to i64
  %150 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIPN7sc_core12sc_interfaceESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %147, i64 noundef %149) #9
  %151 = load ptr, ptr %150, align 8, !tbaa !8
  invoke void @_ZN7sc_core12sc_sensitive23make_static_sensitivityEPNS_12sc_process_bERKNS_12sc_interfaceE(ptr noundef %26, ptr noundef nonnull align 8 dereferenceable(8) %151)
          to label %152 unwind label %156

152:                                              ; preds = %145
  br label %153

153:                                              ; preds = %152
  %154 = load i32, ptr %20, align 4, !tbaa !70
  %155 = add i32 %154, 1
  store i32 %155, ptr %20, align 4, !tbaa !70
  br label %137, !llvm.loop !74

156:                                              ; preds = %145
  %157 = landingpad { ptr, i32 }
          cleanup
  %158 = extractvalue { ptr, i32 } %157, 0
  store ptr %158, ptr %16, align 8
  %159 = extractvalue { ptr, i32 } %157, 1
  store i32 %159, ptr %17, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #9
  br label %190

160:                                              ; preds = %144
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #9
  store i32 0, ptr %21, align 4, !tbaa !70
  br label %161

161:                                              ; preds = %177, %160
  %162 = load i32, ptr %21, align 4, !tbaa !70
  %163 = zext i32 %162 to i64
  %164 = load ptr, ptr %14, align 8, !tbaa !8
  %165 = getelementptr inbounds %"class.sc_core::sc_spawn_options", ptr %164, i32 0, i32 3
  %166 = call noundef i64 @_ZNKSt6vectorIPN7sc_core15sc_event_finderESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %165) #9
  %167 = icmp ult i64 %163, %166
  br i1 %167, label %169, label %168

168:                                              ; preds = %161
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #9
  br label %184

169:                                              ; preds = %161
  %170 = load ptr, ptr %14, align 8, !tbaa !8
  %171 = getelementptr inbounds %"class.sc_core::sc_spawn_options", ptr %170, i32 0, i32 3
  %172 = load i32, ptr %21, align 4, !tbaa !70
  %173 = zext i32 %172 to i64
  %174 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIPN7sc_core15sc_event_finderESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %171, i64 noundef %173) #9
  %175 = load ptr, ptr %174, align 8, !tbaa !8
  invoke void @_ZN7sc_core12sc_sensitive23make_static_sensitivityEPNS_12sc_process_bERNS_15sc_event_finderE(ptr noundef %26, ptr noundef nonnull align 8 dereferenceable(16) %175)
          to label %176 unwind label %180

176:                                              ; preds = %169
  br label %177

177:                                              ; preds = %176
  %178 = load i32, ptr %21, align 4, !tbaa !70
  %179 = add i32 %178, 1
  store i32 %179, ptr %21, align 4, !tbaa !70
  br label %161, !llvm.loop !75

180:                                              ; preds = %169
  %181 = landingpad { ptr, i32 }
          cleanup
  %182 = extractvalue { ptr, i32 } %181, 0
  store ptr %182, ptr %16, align 8
  %183 = extractvalue { ptr, i32 } %181, 1
  store i32 %183, ptr %17, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #9
  br label %190

184:                                              ; preds = %168
  %185 = load ptr, ptr %14, align 8, !tbaa !8
  invoke void @_ZNK7sc_core16sc_spawn_options14specify_resetsEv(ptr noundef nonnull align 8 dereferenceable(136) %185)
          to label %186 unwind label %63

186:                                              ; preds = %184
  br label %189

187:                                              ; preds = %67
  %188 = getelementptr inbounds %"class.sc_core::sc_process_b", ptr %26, i32 0, i32 6
  store i8 0, ptr %188, align 8, !tbaa !68
  br label %189

189:                                              ; preds = %187, %186
  ret void

190:                                              ; preds = %180, %156, %132, %108, %63
  call void @_ZNSt6vectorIPN7sc_core18sc_process_monitorESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %45) #9
  call void @_ZN7sc_core12sc_process_bD2Ev(ptr noundef nonnull align 8 dereferenceable(357) %26) #9
  br label %191

191:                                              ; preds = %190
  %192 = load ptr, ptr %16, align 8
  %193 = load i32, ptr %17, align 4
  %194 = insertvalue { ptr, i32 } poison, ptr %192, 0
  %195 = insertvalue { ptr, i32 } %194, i32 %193, 1
  resume { ptr, i32 } %195
}

declare noundef ptr @_ZN7sc_core18sc_gen_unique_nameEPKcb(ptr noundef, i1 noundef zeroext) #3

declare void @_ZN7sc_core12sc_process_bC2EPKcbbMNS_15sc_process_hostEFvvEPS3_PKNS_16sc_spawn_optionsE(ptr noundef nonnull align 8 dereferenceable(357), ptr noundef, i1 noundef zeroext, i1 noundef zeroext, i64, i64, ptr noundef, ptr noundef) unnamed_addr #3

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #6

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIPN7sc_core18sc_process_monitorESaIS2_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #7 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIPKN7sc_core8sc_eventESaIS3_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #7 align 2

declare void @_ZN7sc_core12sc_sensitive23make_static_sensitivityEPNS_12sc_process_bERKNS_8sc_eventE(ptr noundef, ptr noundef nonnull align 8 dereferenceable(160)) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIPKN7sc_core8sc_eventESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #7 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIPN7sc_core12sc_port_baseESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #7 align 2

declare void @_ZN7sc_core12sc_sensitive23make_static_sensitivityEPNS_12sc_process_bERKNS_12sc_port_baseE(ptr noundef, ptr noundef nonnull align 8 dereferenceable(120)) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIPN7sc_core12sc_port_baseESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #7 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIPN7sc_core12sc_interfaceESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #7 align 2

declare void @_ZN7sc_core12sc_sensitive23make_static_sensitivityEPNS_12sc_process_bERKNS_12sc_interfaceE(ptr noundef, ptr noundef nonnull align 8 dereferenceable(8)) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIPN7sc_core12sc_interfaceESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #7 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIPN7sc_core15sc_event_finderESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #7 align 2

declare void @_ZN7sc_core12sc_sensitive23make_static_sensitivityEPNS_12sc_process_bERNS_15sc_event_finderE(ptr noundef, ptr noundef nonnull align 8 dereferenceable(16)) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIPN7sc_core15sc_event_finderESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #7 align 2

declare void @_ZNK7sc_core16sc_spawn_options14specify_resetsEv(ptr noundef nonnull align 8 dereferenceable(136)) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIPN7sc_core18sc_process_monitorESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #7 align 2

; Function Attrs: nounwind
declare void @_ZN7sc_core12sc_process_bD2Ev(ptr noundef nonnull align 8 dereferenceable(357)) unnamed_addr #8

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind willreturn memory(read) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #7 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #9 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"any pointer", !6, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"bool", !6, i64 0}
!12 = !{i8 0, i8 2}
!13 = !{}
!14 = !{!15, !15, i64 0}
!15 = !{!"vtable pointer", !7, i64 0}
!16 = !{!17, !9, i64 360}
!17 = !{!"_ZTSN7sc_core17sc_thread_processE", !18, i64 0, !9, i64 360, !43, i64 368, !30, i64 392, !31, i64 400}
!18 = !{!"_ZTSN7sc_core12sc_process_bE", !19, i64 0, !9, i64 112, !31, i64 120, !31, i64 124, !31, i64 128, !31, i64 132, !11, i64 136, !11, i64 137, !9, i64 144, !31, i64 152, !9, i64 160, !9, i64 168, !11, i64 176, !11, i64 177, !11, i64 178, !11, i64 179, !9, i64 184, !9, i64 192, !32, i64 200, !31, i64 204, !33, i64 208, !9, i64 232, !9, i64 240, !9, i64 248, !9, i64 256, !6, i64 264, !31, i64 280, !37, i64 288, !11, i64 312, !9, i64 320, !9, i64 328, !41, i64 336, !11, i64 340, !9, i64 344, !42, i64 352, !11, i64 356}
!19 = !{!"_ZTSN7sc_core9sc_objectE", !9, i64 8, !20, i64 16, !24, i64 40, !28, i64 64, !9, i64 96, !9, i64 104}
!20 = !{!"_ZTSSt6vectorIPN7sc_core8sc_eventESaIS2_EE", !21, i64 0}
!21 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE12_Vector_implE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!24 = !{!"_ZTSSt6vectorIPN7sc_core9sc_objectESaIS2_EE", !25, i64 0}
!25 = !{!"_ZTSSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE", !26, i64 0}
!26 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE12_Vector_implE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!28 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !29, i64 0, !30, i64 8, !6, i64 16}
!29 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !9, i64 0}
!30 = !{!"long", !6, i64 0}
!31 = !{!"int", !6, i64 0}
!32 = !{!"_ZTSN7sc_core17sc_curr_proc_kindE", !6, i64 0}
!33 = !{!"_ZTSSt6vectorIPN7sc_core8sc_resetESaIS2_EE", !34, i64 0}
!34 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_resetESaIS2_EE", !35, i64 0}
!35 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_resetESaIS2_EE12_Vector_implE", !36, i64 0}
!36 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_resetESaIS2_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!37 = !{!"_ZTSSt6vectorIPKN7sc_core8sc_eventESaIS3_EE", !38, i64 0}
!38 = !{!"_ZTSSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE", !39, i64 0}
!39 = !{!"_ZTSNSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE12_Vector_implE", !40, i64 0}
!40 = !{!"_ZTSNSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!41 = !{!"_ZTSN7sc_core12sc_process_b18process_throw_typeE", !6, i64 0}
!42 = !{!"_ZTSN7sc_core12sc_process_b9trigger_tE", !6, i64 0}
!43 = !{!"_ZTSSt6vectorIPN7sc_core18sc_process_monitorESaIS2_EE", !44, i64 0}
!44 = !{!"_ZTSSt12_Vector_baseIPN7sc_core18sc_process_monitorESaIS2_EE", !45, i64 0}
!45 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core18sc_process_monitorESaIS2_EE12_Vector_implE", !46, i64 0}
!46 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core18sc_process_monitorESaIS2_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!47 = !{!17, !30, i64 392}
!48 = !{!17, !31, i64 400}
!49 = !{!18, !32, i64 200}
!50 = !{!51, !11, i64 0}
!51 = !{!"_ZTSN7sc_core16sc_spawn_optionsE", !11, i64 0, !52, i64 8, !37, i64 32, !56, i64 56, !60, i64 80, !64, i64 104, !11, i64 128, !31, i64 132}
!52 = !{!"_ZTSSt6vectorIPN7sc_core19sc_spawn_reset_baseESaIS2_EE", !53, i64 0}
!53 = !{!"_ZTSSt12_Vector_baseIPN7sc_core19sc_spawn_reset_baseESaIS2_EE", !54, i64 0}
!54 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core19sc_spawn_reset_baseESaIS2_EE12_Vector_implE", !55, i64 0}
!55 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core19sc_spawn_reset_baseESaIS2_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!56 = !{!"_ZTSSt6vectorIPN7sc_core15sc_event_finderESaIS2_EE", !57, i64 0}
!57 = !{!"_ZTSSt12_Vector_baseIPN7sc_core15sc_event_finderESaIS2_EE", !58, i64 0}
!58 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core15sc_event_finderESaIS2_EE12_Vector_implE", !59, i64 0}
!59 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core15sc_event_finderESaIS2_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!60 = !{!"_ZTSSt6vectorIPN7sc_core12sc_interfaceESaIS2_EE", !61, i64 0}
!61 = !{!"_ZTSSt12_Vector_baseIPN7sc_core12sc_interfaceESaIS2_EE", !62, i64 0}
!62 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core12sc_interfaceESaIS2_EE12_Vector_implE", !63, i64 0}
!63 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core12sc_interfaceESaIS2_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!64 = !{!"_ZTSSt6vectorIPN7sc_core12sc_port_baseESaIS2_EE", !65, i64 0}
!65 = !{!"_ZTSSt12_Vector_baseIPN7sc_core12sc_port_baseESaIS2_EE", !66, i64 0}
!66 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core12sc_port_baseESaIS2_EE12_Vector_implE", !67, i64 0}
!67 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core12sc_port_baseESaIS2_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!68 = !{!18, !11, i64 136}
!69 = !{!51, !31, i64 132}
!70 = !{!31, !31, i64 0}
!71 = distinct !{!71, !72}
!72 = !{!"llvm.loop.mustprogress"}
!73 = distinct !{!73, !72}
!74 = distinct !{!74, !72}
!75 = distinct !{!75, !72}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.2 = external hidden unnamed_addr constant [1 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [9 x i8], align 1
@_ZTVN7sc_core17sc_thread_processE = external dso_local unnamed_addr constant { [27 x ptr] }, align 8
@_ZTIN7sc_core15sc_process_hostE = external dso_local constant { ptr, ptr }, align 8
@_ZTIN7sc_core9sc_moduleE = external constant ptr
@_ZN7sc_core32SC_ID_MODULE_THREAD_AFTER_START_E = external constant [0 x i8], align 1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef ptr @_ZN7sc_core22sc_get_curr_simcontextEv() local_unnamed_addr #0

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nofree nounwind willreturn memory(read)
declare ptr @__dynamic_cast(ptr, ptr, ptr, i64) local_unnamed_addr #1

declare void @_ZNK7sc_core12sc_process_b12report_errorEPKcS2_(ptr noundef nonnull align 8 dereferenceable(357), ptr noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN7sc_core13sc_is_runningEPKNS_13sc_simcontextE(ptr noundef) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core17sc_thread_processC2EPKcbMNS_15sc_process_hostEFvvEPS3_PKNS_16sc_spawn_optionsE(ptr noundef nonnull align 8 dereferenceable(404) %0, ptr noundef %1, i1 noundef zeroext %2, i64 %3, i64 %4, ptr noundef %5, ptr noundef %6) unnamed_addr #4 align 2 personality ptr @__gxx_personality_v0 {
  %.not = icmp eq ptr %1, null
  br i1 %.not, label %8, label %10

8:                                                ; preds = %7
  %9 = tail call noundef ptr @_ZN7sc_core18sc_gen_unique_nameEPKcb(ptr noundef nonnull @.str.5, i1 noundef zeroext false)
  br label %10

10:                                               ; preds = %7, %8
  %11 = phi ptr [ %9, %8 ], [ %1, %7 ]
  tail call void @_ZN7sc_core12sc_process_bC2EPKcbbMNS_15sc_process_hostEFvvEPS3_PKNS_16sc_spawn_optionsE(ptr noundef nonnull align 8 dereferenceable(357) %0, ptr noundef %11, i1 noundef zeroext true, i1 noundef zeroext %2, i64 %3, i64 %4, ptr noundef %5, ptr noundef %6)
  store ptr getelementptr inbounds inrange(-16, 200) (i8, ptr @_ZTVN7sc_core17sc_thread_processE, i64 16), ptr %0, align 8, !tbaa !5
  %12 = getelementptr inbounds i8, ptr %0, i64 360
  %13 = getelementptr inbounds i8, ptr %0, i64 368
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(32) %12, i8 0, i64 32, i1 false)
  tail call void @_ZNSt6vectorIPN7sc_core18sc_process_monitorESaIS2_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %13) #8
  %14 = getelementptr inbounds i8, ptr %0, i64 392
  store i64 262144, ptr %14, align 8, !tbaa !8
  %15 = getelementptr inbounds i8, ptr %0, i64 400
  store i32 0, ptr %15, align 8, !tbaa !42
  %16 = icmp eq ptr %5, null
  br i1 %16, label %.thread, label %17

17:                                               ; preds = %10
  %18 = tail call ptr @__dynamic_cast(ptr nonnull %5, ptr nonnull @_ZTIN7sc_core15sc_process_hostE, ptr nonnull @_ZTIN7sc_core9sc_moduleE, i64 112) #8
  %.not56 = icmp eq ptr %18, null
  br i1 %.not56, label %.thread, label %19

19:                                               ; preds = %17
  %20 = invoke noundef ptr @_ZN7sc_core22sc_get_curr_simcontextEv()
          to label %21 unwind label %24

21:                                               ; preds = %19
  %22 = tail call noundef zeroext i1 @_ZN7sc_core13sc_is_runningEPKNS_13sc_simcontextE(ptr noundef %20)
  br i1 %22, label %23, label %.thread

23:                                               ; preds = %21
  invoke void @_ZNK7sc_core12sc_process_b12report_errorEPKcS2_(ptr noundef nonnull align 8 dereferenceable(357) %0, ptr noundef nonnull @_ZN7sc_core32SC_ID_MODULE_THREAD_AFTER_START_E, ptr noundef nonnull @.str.2)
          to label %.thread unwind label %24

24:                                               ; preds = %._crit_edge, %23, %19
  %25 = landingpad { ptr, i32 }
          cleanup
  br label %86

.thread:                                          ; preds = %10, %23, %21, %17
  %26 = getelementptr inbounds i8, ptr %0, i64 200
  store i32 2, ptr %26, align 8, !tbaa !43
  %.not57 = icmp eq ptr %6, null
  br i1 %.not57, label %83, label %27

27:                                               ; preds = %.thread
  %28 = load i8, ptr %6, align 8, !tbaa !44, !range !62, !noundef !63
  %29 = getelementptr inbounds i8, ptr %0, i64 136
  store i8 %28, ptr %29, align 8, !tbaa !64
  %30 = getelementptr inbounds i8, ptr %6, i64 132
  %31 = load i32, ptr %30, align 4, !tbaa !65
  %.not58 = icmp eq i32 %31, 0
  br i1 %.not58, label %34, label %32

32:                                               ; preds = %27
  %33 = sext i32 %31 to i64
  store i64 %33, ptr %14, align 8, !tbaa !8
  br label %34

34:                                               ; preds = %32, %27
  %35 = getelementptr inbounds i8, ptr %6, i64 32
  %36 = tail call noundef i64 @_ZNKSt6vectorIPKN7sc_core8sc_eventESaIS3_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %35) #8
  %.not70 = icmp eq i64 %36, 0
  br i1 %.not70, label %.preheader62, label %.lr.ph

.preheader62:                                     ; preds = %42, %34
  %37 = getelementptr inbounds i8, ptr %6, i64 104
  %38 = tail call noundef i64 @_ZNKSt6vectorIPN7sc_core12sc_port_baseESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %37) #8
  %.not71 = icmp eq i64 %38, 0
  br i1 %.not71, label %.preheader61, label %.lr.ph65

.lr.ph:                                           ; preds = %34, %42
  %39 = phi i64 [ %44, %42 ], [ 0, %34 ]
  %.04563 = phi i32 [ %43, %42 ], [ 0, %34 ]
  %40 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIPKN7sc_core8sc_eventESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %35, i64 noundef %39) #8
  %41 = load ptr, ptr %40, align 8, !tbaa !66
  invoke void @_ZN7sc_core12sc_sensitive23make_static_sensitivityEPNS_12sc_process_bERKNS_8sc_eventE(ptr noundef nonnull %0, ptr noundef nonnull align 8 dereferenceable(160) %41)
          to label %42 unwind label %47

42:                                               ; preds = %.lr.ph
  %43 = add i32 %.04563, 1
  %44 = zext i32 %43 to i64
  %45 = tail call noundef i64 @_ZNKSt6vectorIPKN7sc_core8sc_eventESaIS3_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %35) #8
  %46 = icmp ugt i64 %45, %44
  br i1 %46, label %.lr.ph, label %.preheader62, !llvm.loop !67

47:                                               ; preds = %.lr.ph
  %48 = landingpad { ptr, i32 }
          cleanup
  br label %86

.preheader61:                                     ; preds = %54, %.preheader62
  %49 = getelementptr inbounds i8, ptr %6, i64 80
  %50 = tail call noundef i64 @_ZNKSt6vectorIPN7sc_core12sc_interfaceESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %49) #8
  %.not72 = icmp eq i64 %50, 0
  br i1 %.not72, label %.preheader, label %.lr.ph67

.lr.ph65:                                         ; preds = %.preheader62, %54
  %51 = phi i64 [ %56, %54 ], [ 0, %.preheader62 ]
  %.04464 = phi i32 [ %55, %54 ], [ 0, %.preheader62 ]
  %52 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIPN7sc_core12sc_port_baseESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %37, i64 noundef %51) #8
  %53 = load ptr, ptr %52, align 8, !tbaa !66
  invoke void @_ZN7sc_core12sc_sensitive23make_static_sensitivityEPNS_12sc_process_bERKNS_12sc_port_baseE(ptr noundef nonnull %0, ptr noundef nonnull align 8 dereferenceable(120) %53)
          to label %54 unwind label %59

54:                                               ; preds = %.lr.ph65
  %55 = add i32 %.04464, 1
  %56 = zext i32 %55 to i64
  %57 = tail call noundef i64 @_ZNKSt6vectorIPN7sc_core12sc_port_baseESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %37) #8
  %58 = icmp ugt i64 %57, %56
  br i1 %58, label %.lr.ph65, label %.preheader61, !llvm.loop !69

59:                                               ; preds = %.lr.ph65
  %60 = landingpad { ptr, i32 }
          cleanup
  br label %86

.preheader:                                       ; preds = %66, %.preheader61
  %61 = getelementptr inbounds i8, ptr %6, i64 56
  %62 = tail call noundef i64 @_ZNKSt6vectorIPN7sc_core15sc_event_finderESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %61) #8
  %.not73 = icmp eq i64 %62, 0
  br i1 %.not73, label %._crit_edge, label %.lr.ph69

.lr.ph67:                                         ; preds = %.preheader61, %66
  %63 = phi i64 [ %68, %66 ], [ 0, %.preheader61 ]
  %.04366 = phi i32 [ %67, %66 ], [ 0, %.preheader61 ]
  %64 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIPN7sc_core12sc_interfaceESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %49, i64 noundef %63) #8
  %65 = load ptr, ptr %64, align 8, !tbaa !66
  invoke void @_ZN7sc_core12sc_sensitive23make_static_sensitivityEPNS_12sc_process_bERKNS_12sc_interfaceE(ptr noundef nonnull %0, ptr noundef nonnull align 8 dereferenceable(8) %65)
          to label %66 unwind label %71

66:                                               ; preds = %.lr.ph67
  %67 = add i32 %.04366, 1
  %68 = zext i32 %67 to i64
  %69 = tail call noundef i64 @_ZNKSt6vectorIPN7sc_core12sc_interfaceESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %49) #8
  %70 = icmp ugt i64 %69, %68
  br i1 %70, label %.lr.ph67, label %.preheader, !llvm.loop !70

71:                                               ; preds = %.lr.ph67
  %72 = landingpad { ptr, i32 }
          cleanup
  br label %86

._crit_edge:                                      ; preds = %76, %.preheader
  invoke void @_ZNK7sc_core16sc_spawn_options14specify_resetsEv(ptr noundef nonnull align 8 dereferenceable(136) %6)
          to label %85 unwind label %24

.lr.ph69:                                         ; preds = %.preheader, %76
  %73 = phi i64 [ %78, %76 ], [ 0, %.preheader ]
  %.068 = phi i32 [ %77, %76 ], [ 0, %.preheader ]
  %74 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIPN7sc_core15sc_event_finderESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %61, i64 noundef %73) #8
  %75 = load ptr, ptr %74, align 8, !tbaa !66
  invoke void @_ZN7sc_core12sc_sensitive23make_static_sensitivityEPNS_12sc_process_bERNS_15sc_event_finderE(ptr noundef nonnull %0, ptr noundef nonnull align 8 dereferenceable(16) %75)
          to label %76 unwind label %81

76:                                               ; preds = %.lr.ph69
  %77 = add i32 %.068, 1
  %78 = zext i32 %77 to i64
  %79 = tail call noundef i64 @_ZNKSt6vectorIPN7sc_core15sc_event_finderESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %61) #8
  %80 = icmp ugt i64 %79, %78
  br i1 %80, label %.lr.ph69, label %._crit_edge, !llvm.loop !71

81:                                               ; preds = %.lr.ph69
  %82 = landingpad { ptr, i32 }
          cleanup
  br label %86

83:                                               ; preds = %.thread
  %84 = getelementptr inbounds i8, ptr %0, i64 136
  store i8 0, ptr %84, align 8, !tbaa !64
  br label %85

85:                                               ; preds = %._crit_edge, %83
  ret void

86:                                               ; preds = %81, %71, %59, %47, %24
  %.pn = phi { ptr, i32 } [ %48, %47 ], [ %60, %59 ], [ %72, %71 ], [ %82, %81 ], [ %25, %24 ]
  tail call void @_ZNSt6vectorIPN7sc_core18sc_process_monitorESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %13) #8
  tail call void @_ZN7sc_core12sc_process_bD2Ev(ptr noundef nonnull align 8 dereferenceable(357) %0) #8
  resume { ptr, i32 } %.pn
}

declare noundef ptr @_ZN7sc_core18sc_gen_unique_nameEPKcb(ptr noundef, i1 noundef zeroext) local_unnamed_addr #2

declare void @_ZN7sc_core12sc_process_bC2EPKcbbMNS_15sc_process_hostEFvvEPS3_PKNS_16sc_spawn_optionsE(ptr noundef nonnull align 8 dereferenceable(357), ptr noundef, i1 noundef zeroext, i1 noundef zeroext, i64, i64, ptr noundef, ptr noundef) unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #5

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIPN7sc_core18sc_process_monitorESaIS2_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #6 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIPKN7sc_core8sc_eventESaIS3_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #6 align 2

declare void @_ZN7sc_core12sc_sensitive23make_static_sensitivityEPNS_12sc_process_bERKNS_8sc_eventE(ptr noundef, ptr noundef nonnull align 8 dereferenceable(160)) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIPKN7sc_core8sc_eventESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #6 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIPN7sc_core12sc_port_baseESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #6 align 2

declare void @_ZN7sc_core12sc_sensitive23make_static_sensitivityEPNS_12sc_process_bERKNS_12sc_port_baseE(ptr noundef, ptr noundef nonnull align 8 dereferenceable(120)) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIPN7sc_core12sc_port_baseESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #6 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIPN7sc_core12sc_interfaceESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #6 align 2

declare void @_ZN7sc_core12sc_sensitive23make_static_sensitivityEPNS_12sc_process_bERKNS_12sc_interfaceE(ptr noundef, ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIPN7sc_core12sc_interfaceESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #6 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIPN7sc_core15sc_event_finderESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #6 align 2

declare void @_ZN7sc_core12sc_sensitive23make_static_sensitivityEPNS_12sc_process_bERNS_15sc_event_finderE(ptr noundef, ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIPN7sc_core15sc_event_finderESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #6 align 2

declare void @_ZNK7sc_core16sc_spawn_options14specify_resetsEv(ptr noundef nonnull align 8 dereferenceable(136)) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIPN7sc_core18sc_process_monitorESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #6 align 2

; Function Attrs: nounwind
declare void @_ZN7sc_core12sc_process_bD2Ev(ptr noundef nonnull align 8 dereferenceable(357)) unnamed_addr #7

attributes #0 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nofree nounwind willreturn memory(read) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #6 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"vtable pointer", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !24, i64 392}
!9 = !{!"_ZTSN7sc_core17sc_thread_processE", !10, i64 0, !12, i64 360, !38, i64 368, !24, i64 392, !25, i64 400}
!10 = !{!"_ZTSN7sc_core12sc_process_bE", !11, i64 0, !12, i64 112, !25, i64 120, !25, i64 124, !25, i64 128, !25, i64 132, !26, i64 136, !26, i64 137, !12, i64 144, !25, i64 152, !12, i64 160, !12, i64 168, !26, i64 176, !26, i64 177, !26, i64 178, !26, i64 179, !12, i64 184, !12, i64 192, !27, i64 200, !25, i64 204, !28, i64 208, !12, i64 232, !12, i64 240, !12, i64 248, !12, i64 256, !13, i64 264, !25, i64 280, !32, i64 288, !26, i64 312, !12, i64 320, !12, i64 328, !36, i64 336, !26, i64 340, !12, i64 344, !37, i64 352, !26, i64 356}
!11 = !{!"_ZTSN7sc_core9sc_objectE", !12, i64 8, !14, i64 16, !18, i64 40, !22, i64 64, !12, i64 96, !12, i64 104}
!12 = !{!"any pointer", !13, i64 0}
!13 = !{!"omnipotent char", !7, i64 0}
!14 = !{!"_ZTSSt6vectorIPN7sc_core8sc_eventESaIS2_EE", !15, i64 0}
!15 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE12_Vector_implE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE17_Vector_impl_dataE", !12, i64 0, !12, i64 8, !12, i64 16}
!18 = !{!"_ZTSSt6vectorIPN7sc_core9sc_objectESaIS2_EE", !19, i64 0}
!19 = !{!"_ZTSSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE12_Vector_implE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE17_Vector_impl_dataE", !12, i64 0, !12, i64 8, !12, i64 16}
!22 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !23, i64 0, !24, i64 8, !13, i64 16}
!23 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !12, i64 0}
!24 = !{!"long", !13, i64 0}
!25 = !{!"int", !13, i64 0}
!26 = !{!"bool", !13, i64 0}
!27 = !{!"_ZTSN7sc_core17sc_curr_proc_kindE", !13, i64 0}
!28 = !{!"_ZTSSt6vectorIPN7sc_core8sc_resetESaIS2_EE", !29, i64 0}
!29 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_resetESaIS2_EE", !30, i64 0}
!30 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_resetESaIS2_EE12_Vector_implE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_resetESaIS2_EE17_Vector_impl_dataE", !12, i64 0, !12, i64 8, !12, i64 16}
!32 = !{!"_ZTSSt6vectorIPKN7sc_core8sc_eventESaIS3_EE", !33, i64 0}
!33 = !{!"_ZTSSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE", !34, i64 0}
!34 = !{!"_ZTSNSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE12_Vector_implE", !35, i64 0}
!35 = !{!"_ZTSNSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE17_Vector_impl_dataE", !12, i64 0, !12, i64 8, !12, i64 16}
!36 = !{!"_ZTSN7sc_core12sc_process_b18process_throw_typeE", !13, i64 0}
!37 = !{!"_ZTSN7sc_core12sc_process_b9trigger_tE", !13, i64 0}
!38 = !{!"_ZTSSt6vectorIPN7sc_core18sc_process_monitorESaIS2_EE", !39, i64 0}
!39 = !{!"_ZTSSt12_Vector_baseIPN7sc_core18sc_process_monitorESaIS2_EE", !40, i64 0}
!40 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core18sc_process_monitorESaIS2_EE12_Vector_implE", !41, i64 0}
!41 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core18sc_process_monitorESaIS2_EE17_Vector_impl_dataE", !12, i64 0, !12, i64 8, !12, i64 16}
!42 = !{!9, !25, i64 400}
!43 = !{!10, !27, i64 200}
!44 = !{!45, !26, i64 0}
!45 = !{!"_ZTSN7sc_core16sc_spawn_optionsE", !26, i64 0, !46, i64 8, !32, i64 32, !50, i64 56, !54, i64 80, !58, i64 104, !26, i64 128, !25, i64 132}
!46 = !{!"_ZTSSt6vectorIPN7sc_core19sc_spawn_reset_baseESaIS2_EE", !47, i64 0}
!47 = !{!"_ZTSSt12_Vector_baseIPN7sc_core19sc_spawn_reset_baseESaIS2_EE", !48, i64 0}
!48 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core19sc_spawn_reset_baseESaIS2_EE12_Vector_implE", !49, i64 0}
!49 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core19sc_spawn_reset_baseESaIS2_EE17_Vector_impl_dataE", !12, i64 0, !12, i64 8, !12, i64 16}
!50 = !{!"_ZTSSt6vectorIPN7sc_core15sc_event_finderESaIS2_EE", !51, i64 0}
!51 = !{!"_ZTSSt12_Vector_baseIPN7sc_core15sc_event_finderESaIS2_EE", !52, i64 0}
!52 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core15sc_event_finderESaIS2_EE12_Vector_implE", !53, i64 0}
!53 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core15sc_event_finderESaIS2_EE17_Vector_impl_dataE", !12, i64 0, !12, i64 8, !12, i64 16}
!54 = !{!"_ZTSSt6vectorIPN7sc_core12sc_interfaceESaIS2_EE", !55, i64 0}
!55 = !{!"_ZTSSt12_Vector_baseIPN7sc_core12sc_interfaceESaIS2_EE", !56, i64 0}
!56 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core12sc_interfaceESaIS2_EE12_Vector_implE", !57, i64 0}
!57 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core12sc_interfaceESaIS2_EE17_Vector_impl_dataE", !12, i64 0, !12, i64 8, !12, i64 16}
!58 = !{!"_ZTSSt6vectorIPN7sc_core12sc_port_baseESaIS2_EE", !59, i64 0}
!59 = !{!"_ZTSSt12_Vector_baseIPN7sc_core12sc_port_baseESaIS2_EE", !60, i64 0}
!60 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core12sc_port_baseESaIS2_EE12_Vector_implE", !61, i64 0}
!61 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core12sc_port_baseESaIS2_EE17_Vector_impl_dataE", !12, i64 0, !12, i64 8, !12, i64 16}
!62 = !{i8 0, i8 2}
!63 = !{}
!64 = !{!10, !26, i64 136}
!65 = !{!45, !25, i64 132}
!66 = !{!12, !12, i64 0}
!67 = distinct !{!67, !68}
!68 = !{!"llvm.loop.mustprogress"}
!69 = distinct !{!69, !68}
!70 = distinct !{!70, !68}
!71 = distinct !{!71, !68}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,MemCpyOptPass,SROAPass,SimplifyCFGPass,TailCallElimPass