; LLVM IR from gem5/gem5 :: src/systemc/tests/systemc/misc/stars/star104726/star104726.ll (ZN5quant8do_quantEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Coeff8x8 = type { [8 x [8 x i16]] }
%struct.quant = type { %"class.sc_core::sc_module", %"class.sc_core::sc_in", %"class.sc_core::sc_in.13", %"class.sc_core::sc_in", %"class.sc_core::sc_in", %"class.sc_core::sc_out", %"class.sc_core::sc_out.28", %"class.sc_core::sc_out.28" }
%"class.sc_core::sc_module" = type { %"class.sc_core::sc_object", %"class.sc_core::sc_process_host", %"class.sc_core::sc_sensitive", %"class.sc_core::sc_sensitive_pos", %"class.sc_core::sc_sensitive_neg", i8, ptr, i32, ptr, ptr }
%"class.sc_core::sc_object" = type { ptr, ptr, %"class.std::vector", %"class.std::vector.0", %"class.std::__cxx11::basic_string", ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.sc_core::sc_process_host" = type { ptr }
%"class.sc_core::sc_sensitive" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_pos" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_neg" = type { ptr, i32, ptr }
%"class.sc_core::sc_in.13" = type { %"class.sc_core::sc_port.14", ptr, ptr }
%"class.sc_core::sc_port.14" = type { %"class.sc_core::sc_port_b.15" }
%"class.sc_core::sc_port_b.15" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.16" }
%"class.sc_core::sc_port_base" = type { %"class.sc_core::sc_object", ptr }
%"class.std::vector.16" = type { %"struct.std::_Vector_base.17" }
%"struct.std::_Vector_base.17" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<Coeff8x8> *, std::allocator<sc_core::sc_signal_in_if<Coeff8x8> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<Coeff8x8> *, std::allocator<sc_core::sc_signal_in_if<Coeff8x8> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<Coeff8x8> *, std::allocator<sc_core::sc_signal_in_if<Coeff8x8> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<Coeff8x8> *, std::allocator<sc_core::sc_signal_in_if<Coeff8x8> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_in" = type { %"class.sc_core::sc_port", ptr, ptr, ptr, ptr }
%"class.sc_core::sc_port" = type { %"class.sc_core::sc_port_b" }
%"class.sc_core::sc_port_b" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.8" }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_out" = type { %"class.sc_core::sc_inout" }
%"class.sc_core::sc_inout" = type { %"class.sc_core::sc_port.21", ptr, ptr, ptr }
%"class.sc_core::sc_port.21" = type { %"class.sc_core::sc_port_b.22" }
%"class.sc_core::sc_port_b.22" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.23" }
%"class.std::vector.23" = type { %"struct.std::_Vector_base.24" }
%"struct.std::_Vector_base.24" = type { %"struct.std::_Vector_base<sc_core::sc_signal_inout_if<Coeff8x8> *, std::allocator<sc_core::sc_signal_inout_if<Coeff8x8> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_inout_if<Coeff8x8> *, std::allocator<sc_core::sc_signal_inout_if<Coeff8x8> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_inout_if<Coeff8x8> *, std::allocator<sc_core::sc_signal_inout_if<Coeff8x8> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_inout_if<Coeff8x8> *, std::allocator<sc_core::sc_signal_inout_if<Coeff8x8> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_out.28" = type { %"class.sc_core::sc_inout.29" }
%"class.sc_core::sc_inout.29" = type { %"class.sc_core::sc_port.30", ptr, ptr, ptr, ptr, ptr }
%"class.sc_core::sc_port.30" = type { %"class.sc_core::sc_port_b.31" }
%"class.sc_core::sc_port_b.31" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.32" }
%"class.std::vector.32" = type { %"struct.std::_Vector_base.33" }
%"struct.std::_Vector_base.33" = type { %"struct.std::_Vector_base<sc_core::sc_signal_inout_if<bool> *, std::allocator<sc_core::sc_signal_inout_if<bool> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_inout_if<bool> *, std::allocator<sc_core::sc_signal_inout_if<bool> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_inout_if<bool> *, std::allocator<sc_core::sc_signal_inout_if<bool> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_inout_if<bool> *, std::allocator<sc_core::sc_signal_inout_if<bool> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@_ZL11coeff_quant = external hidden constant [8 x [8 x i8]], align 16

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5quant8do_quantEv(ptr noundef nonnull align 8 dereferenceable(1512) %0) #0 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca %struct.Coeff8x8, align 2
  %4 = alloca %struct.Coeff8x8, align 2
  %5 = alloca i16, align 2
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i8, align 1
  %9 = alloca i8, align 1
  %10 = alloca i8, align 1
  %11 = alloca i8, align 1
  store ptr %0, ptr %2, align 8, !tbaa !5
  %12 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 128, ptr %3) #3
  call void @_ZN8Coeff8x8C1Ev(ptr noundef nonnull align 2 dereferenceable(128) %3)
  call void @llvm.lifetime.start.p0(i64 128, ptr %4) #3
  call void @_ZN8Coeff8x8C1Ev(ptr noundef nonnull align 2 dereferenceable(128) %4)
  call void @llvm.lifetime.start.p0(i64 2, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  br label %13

13:                                               ; preds = %87, %1
  br label %14

14:                                               ; preds = %13
  %15 = getelementptr inbounds %struct.quant, ptr %12, i32 0, i32 6
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #3
  store i8 1, ptr %8, align 1, !tbaa !9
  call void @_ZN7sc_core8sc_inoutIbE5writeERKb(ptr noundef nonnull align 8 dereferenceable(192) %15, ptr noundef nonnull align 1 dereferenceable(1) %8)
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #3
  %16 = getelementptr inbounds %struct.quant, ptr %12, i32 0, i32 7
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #3
  store i8 0, ptr %9, align 1, !tbaa !9
  call void @_ZN7sc_core8sc_inoutIbE5writeERKb(ptr noundef nonnull align 8 dereferenceable(192) %16, ptr noundef nonnull align 1 dereferenceable(1) %9)
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #3
  br label %17

17:                                               ; preds = %18, %14
  call void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %12)
  br label %18

18:                                               ; preds = %17
  %19 = getelementptr inbounds %struct.quant, ptr %12, i32 0, i32 3
  %20 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNK7sc_core5sc_inIbEcvRKbEv(ptr noundef nonnull align 8 dereferenceable(184) %19)
  %21 = load i8, ptr %20, align 1, !tbaa !9, !range !11, !noundef !12
  %22 = trunc i8 %21 to i1
  %23 = zext i1 %22 to i32
  %24 = icmp eq i32 %23, 0
  br i1 %24, label %17, label %25, !llvm.loop !13

25:                                               ; preds = %18
  %26 = getelementptr inbounds %struct.quant, ptr %12, i32 0, i32 6
  call void @llvm.lifetime.start.p0(i64 1, ptr %10) #3
  store i8 0, ptr %10, align 1, !tbaa !9
  call void @_ZN7sc_core8sc_inoutIbE5writeERKb(ptr noundef nonnull align 8 dereferenceable(192) %26, ptr noundef nonnull align 1 dereferenceable(1) %10)
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #3
  %27 = getelementptr inbounds %struct.quant, ptr %12, i32 0, i32 2
  %28 = call noundef nonnull align 2 dereferenceable(128) ptr @_ZNK7sc_core5sc_inI8Coeff8x8E4readEv(ptr noundef nonnull align 8 dereferenceable(168) %27)
  call void @_ZN8Coeff8x8aSERKS_(ptr noundef nonnull align 2 dereferenceable(128) %3, ptr noundef nonnull align 2 dereferenceable(128) %28)
  store i32 0, ptr %7, align 4, !tbaa !15
  br label %29

29:                                               ; preds = %73, %25
  %30 = load i32, ptr %7, align 4, !tbaa !15
  %31 = icmp slt i32 %30, 8
  br i1 %31, label %32, label %76

32:                                               ; preds = %29
  store i32 0, ptr %6, align 4, !tbaa !15
  br label %33

33:                                               ; preds = %69, %32
  %34 = load i32, ptr %6, align 4, !tbaa !15
  %35 = icmp slt i32 %34, 8
  br i1 %35, label %36, label %72

36:                                               ; preds = %33
  %37 = load i32, ptr %7, align 4, !tbaa !15
  %38 = load i32, ptr %6, align 4, !tbaa !15
  %39 = call noundef signext i16 @_ZNK8Coeff8x83getEii(ptr noundef nonnull align 2 dereferenceable(128) %3, i32 noundef %37, i32 noundef %38)
  %40 = sext i16 %39 to i32
  %41 = shl i32 %40, 1
  %42 = load i32, ptr %7, align 4, !tbaa !15
  %43 = sext i32 %42 to i64
  %44 = getelementptr inbounds [8 x [8 x i8]], ptr @_ZL11coeff_quant, i64 0, i64 %43
  %45 = load i32, ptr %6, align 4, !tbaa !15
  %46 = sext i32 %45 to i64
  %47 = getelementptr inbounds [8 x i8], ptr %44, i64 0, i64 %46
  %48 = load i8, ptr %47, align 1, !tbaa !17
  %49 = zext i8 %48 to i16
  %50 = sext i16 %49 to i32
  %51 = sdiv i32 %41, %50
  %52 = trunc i32 %51 to i16
  store i16 %52, ptr %5, align 2, !tbaa !18
  %53 = load i32, ptr %7, align 4, !tbaa !15
  %54 = load i32, ptr %6, align 4, !tbaa !15
  %55 = load i16, ptr %5, align 2, !tbaa !18
  %56 = sext i16 %55 to i32
  %57 = icmp slt i32 %56, 0
  br i1 %57, label %58, label %61

58:                                               ; preds = %36
  %59 = load i16, ptr %5, align 2, !tbaa !18
  %60 = sext i16 %59 to i32
  br label %65

61:                                               ; preds = %36
  %62 = load i16, ptr %5, align 2, !tbaa !18
  %63 = sext i16 %62 to i32
  %64 = add nsw i32 %63, 1
  br label %65

65:                                               ; preds = %61, %58
  %66 = phi i32 [ %60, %58 ], [ %64, %61 ]
  %67 = ashr i32 %66, 1
  %68 = trunc i32 %67 to i16
  call void @_ZN8Coeff8x83putEiis(ptr noundef nonnull align 2 dereferenceable(128) %4, i32 noundef %53, i32 noundef %54, i16 noundef signext %68)
  br label %69

69:                                               ; preds = %65
  %70 = load i32, ptr %6, align 4, !tbaa !15
  %71 = add nsw i32 %70, 1
  store i32 %71, ptr %6, align 4, !tbaa !15
  br label %33, !llvm.loop !20

72:                                               ; preds = %33
  br label %73

73:                                               ; preds = %72
  %74 = load i32, ptr %7, align 4, !tbaa !15
  %75 = add nsw i32 %74, 1
  store i32 %75, ptr %7, align 4, !tbaa !15
  br label %29, !llvm.loop !21

76:                                               ; preds = %29
  %77 = getelementptr inbounds %struct.quant, ptr %12, i32 0, i32 5
  call void @_ZN7sc_core8sc_inoutI8Coeff8x8E5writeERKS1_(ptr noundef nonnull align 8 dereferenceable(176) %77, ptr noundef nonnull align 2 dereferenceable(128) %4)
  %78 = getelementptr inbounds %struct.quant, ptr %12, i32 0, i32 7
  call void @llvm.lifetime.start.p0(i64 1, ptr %11) #3
  store i8 1, ptr %11, align 1, !tbaa !9
  call void @_ZN7sc_core8sc_inoutIbE5writeERKb(ptr noundef nonnull align 8 dereferenceable(192) %78, ptr noundef nonnull align 1 dereferenceable(1) %11)
  call void @llvm.lifetime.end.p0(i64 1, ptr %11) #3
  br label %79

79:                                               ; preds = %80, %76
  call void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %12)
  br label %80

80:                                               ; preds = %79
  %81 = getelementptr inbounds %struct.quant, ptr %12, i32 0, i32 4
  %82 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNK7sc_core5sc_inIbEcvRKbEv(ptr noundef nonnull align 8 dereferenceable(184) %81)
  %83 = load i8, ptr %82, align 1, !tbaa !9, !range !11, !noundef !12
  %84 = trunc i8 %83 to i1
  %85 = zext i1 %84 to i32
  %86 = icmp eq i32 %85, 0
  br i1 %86, label %79, label %87, !llvm.loop !22

87:                                               ; preds = %80
  br label %13, !llvm.loop !23
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @_ZN8Coeff8x8C1Ev(ptr noundef nonnull align 2 dereferenceable(128)) unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core8sc_inoutIbE5writeERKb(ptr noundef nonnull align 8 dereferenceable(192), ptr noundef nonnull align 1 dereferenceable(1)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232)) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNK7sc_core5sc_inIbEcvRKbEv(ptr noundef nonnull align 8 dereferenceable(184)) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 2 dereferenceable(128) ptr @_ZNK7sc_core5sc_inI8Coeff8x8E4readEv(ptr noundef nonnull align 8 dereferenceable(168)) #0 align 2

declare void @_ZN8Coeff8x8aSERKS_(ptr noundef nonnull align 2 dereferenceable(128), ptr noundef nonnull align 2 dereferenceable(128)) #2

declare noundef signext i16 @_ZNK8Coeff8x83getEii(ptr noundef nonnull align 2 dereferenceable(128), i32 noundef, i32 noundef) #2

declare void @_ZN8Coeff8x83putEiis(ptr noundef nonnull align 2 dereferenceable(128), i32 noundef, i32 noundef, i16 noundef signext) #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core8sc_inoutI8Coeff8x8E5writeERKS1_(ptr noundef nonnull align 8 dereferenceable(176), ptr noundef nonnull align 2 dereferenceable(128)) #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{i8 0, i8 2}
!12 = !{}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{!16, !16, i64 0}
!16 = !{!"int", !7, i64 0}
!17 = !{!7, !7, i64 0}
!18 = !{!19, !19, i64 0}
!19 = !{!"short", !7, i64 0}
!20 = distinct !{!20, !14}
!21 = distinct !{!21, !14}
!22 = distinct !{!22, !14}
!23 = distinct !{!23, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Coeff8x8 = type { [8 x [8 x i16]] }

@_ZL11coeff_quant = external hidden local_unnamed_addr constant [8 x [8 x i8]], align 16

; Function Attrs: mustprogress noreturn uwtable
define dso_local void @_ZN5quant8do_quantEv(ptr noundef nonnull align 8 dereferenceable(1512) %0) local_unnamed_addr #0 align 2 {
  %2 = alloca %struct.Coeff8x8, align 2
  %3 = alloca %struct.Coeff8x8, align 2
  %4 = alloca i8, align 1
  %5 = alloca i8, align 1
  %6 = alloca i8, align 1
  %7 = alloca i8, align 1
  call void @llvm.lifetime.start.p0(i64 128, ptr nonnull %2) #4
  call void @_ZN8Coeff8x8C1Ev(ptr noundef nonnull align 2 dereferenceable(128) %2)
  call void @llvm.lifetime.start.p0(i64 128, ptr nonnull %3) #4
  call void @_ZN8Coeff8x8C1Ev(ptr noundef nonnull align 2 dereferenceable(128) %3)
  %8 = getelementptr inbounds i8, ptr %0, i64 1128
  %9 = getelementptr inbounds i8, ptr %0, i64 1320
  %10 = getelementptr inbounds i8, ptr %0, i64 584
  %11 = getelementptr inbounds i8, ptr %0, i64 416
  %12 = getelementptr inbounds i8, ptr %0, i64 952
  %13 = getelementptr inbounds i8, ptr %0, i64 768
  br label %14

14:                                               ; preds = %131, %1
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %4) #4
  store i8 1, ptr %4, align 1, !tbaa !5
  call void @_ZN7sc_core8sc_inoutIbE5writeERKb(ptr noundef nonnull align 8 dereferenceable(192) %8, ptr noundef nonnull align 1 dereferenceable(1) %4)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %4) #4
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %5) #4
  store i8 0, ptr %5, align 1, !tbaa !5
  call void @_ZN7sc_core8sc_inoutIbE5writeERKb(ptr noundef nonnull align 8 dereferenceable(192) %9, ptr noundef nonnull align 1 dereferenceable(1) %5)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %5) #4
  br label %15

15:                                               ; preds = %15, %14
  call void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
  %16 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNK7sc_core5sc_inIbEcvRKbEv(ptr noundef nonnull align 8 dereferenceable(184) %10)
  %17 = load i8, ptr %16, align 1, !tbaa !5, !range !9, !noundef !10
  %18 = icmp eq i8 %17, 0
  br i1 %18, label %15, label %19, !llvm.loop !11

19:                                               ; preds = %15
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %6) #4
  store i8 0, ptr %6, align 1, !tbaa !5
  call void @_ZN7sc_core8sc_inoutIbE5writeERKb(ptr noundef nonnull align 8 dereferenceable(192) %8, ptr noundef nonnull align 1 dereferenceable(1) %6)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %6) #4
  %20 = call noundef nonnull align 2 dereferenceable(128) ptr @_ZNK7sc_core5sc_inI8Coeff8x8E4readEv(ptr noundef nonnull align 8 dereferenceable(168) %11)
  call void @_ZN8Coeff8x8aSERKS_(ptr noundef nonnull align 2 dereferenceable(128) %2, ptr noundef nonnull align 2 dereferenceable(128) %20)
  br label %.preheader

.preheader:                                       ; preds = %19, %.preheader
  %indvars.iv = phi i64 [ 0, %19 ], [ %indvars.iv.next, %.preheader ]
  %21 = trunc nuw nsw i64 %indvars.iv to i32
  %22 = call noundef signext i16 @_ZNK8Coeff8x83getEii(ptr noundef nonnull align 2 dereferenceable(128) %2, i32 noundef %21, i32 noundef 0)
  %23 = sext i16 %22 to i32
  %24 = shl nsw i32 %23, 1
  %25 = getelementptr inbounds [8 x [8 x i8]], ptr @_ZL11coeff_quant, i64 0, i64 %indvars.iv, i64 0
  %26 = load i8, ptr %25, align 8, !tbaa !13
  %27 = zext i8 %26 to i32
  %28 = sdiv i32 %24, %27
  %sext = shl i32 %28, 16
  %29 = ashr exact i32 %sext, 16
  %30 = icmp sgt i32 %29, -1
  %31 = zext i1 %30 to i32
  %32 = add nsw i32 %29, %31
  %33 = lshr i32 %32, 1
  %34 = trunc i32 %33 to i16
  call void @_ZN8Coeff8x83putEiis(ptr noundef nonnull align 2 dereferenceable(128) %3, i32 noundef %21, i32 noundef 0, i16 noundef signext %34)
  %35 = call noundef signext i16 @_ZNK8Coeff8x83getEii(ptr noundef nonnull align 2 dereferenceable(128) %2, i32 noundef %21, i32 noundef 1)
  %36 = sext i16 %35 to i32
  %37 = shl nsw i32 %36, 1
  %38 = getelementptr inbounds [8 x [8 x i8]], ptr @_ZL11coeff_quant, i64 0, i64 %indvars.iv, i64 1
  %39 = load i8, ptr %38, align 1, !tbaa !13
  %40 = zext i8 %39 to i32
  %41 = sdiv i32 %37, %40
  %sext.1 = shl i32 %41, 16
  %42 = ashr exact i32 %sext.1, 16
  %43 = icmp sgt i32 %42, -1
  %44 = zext i1 %43 to i32
  %45 = add nsw i32 %42, %44
  %46 = lshr i32 %45, 1
  %47 = trunc i32 %46 to i16
  call void @_ZN8Coeff8x83putEiis(ptr noundef nonnull align 2 dereferenceable(128) %3, i32 noundef %21, i32 noundef 1, i16 noundef signext %47)
  %48 = call noundef signext i16 @_ZNK8Coeff8x83getEii(ptr noundef nonnull align 2 dereferenceable(128) %2, i32 noundef %21, i32 noundef 2)
  %49 = sext i16 %48 to i32
  %50 = shl nsw i32 %49, 1
  %51 = getelementptr inbounds [8 x [8 x i8]], ptr @_ZL11coeff_quant, i64 0, i64 %indvars.iv, i64 2
  %52 = load i8, ptr %51, align 2, !tbaa !13
  %53 = zext i8 %52 to i32
  %54 = sdiv i32 %50, %53
  %sext.2 = shl i32 %54, 16
  %55 = ashr exact i32 %sext.2, 16
  %56 = icmp sgt i32 %55, -1
  %57 = zext i1 %56 to i32
  %58 = add nsw i32 %55, %57
  %59 = lshr i32 %58, 1
  %60 = trunc i32 %59 to i16
  call void @_ZN8Coeff8x83putEiis(ptr noundef nonnull align 2 dereferenceable(128) %3, i32 noundef %21, i32 noundef 2, i16 noundef signext %60)
  %61 = call noundef signext i16 @_ZNK8Coeff8x83getEii(ptr noundef nonnull align 2 dereferenceable(128) %2, i32 noundef %21, i32 noundef 3)
  %62 = sext i16 %61 to i32
  %63 = shl nsw i32 %62, 1
  %64 = getelementptr inbounds [8 x [8 x i8]], ptr @_ZL11coeff_quant, i64 0, i64 %indvars.iv, i64 3
  %65 = load i8, ptr %64, align 1, !tbaa !13
  %66 = zext i8 %65 to i32
  %67 = sdiv i32 %63, %66
  %sext.3 = shl i32 %67, 16
  %68 = ashr exact i32 %sext.3, 16
  %69 = icmp sgt i32 %68, -1
  %70 = zext i1 %69 to i32
  %71 = add nsw i32 %68, %70
  %72 = lshr i32 %71, 1
  %73 = trunc i32 %72 to i16
  call void @_ZN8Coeff8x83putEiis(ptr noundef nonnull align 2 dereferenceable(128) %3, i32 noundef %21, i32 noundef 3, i16 noundef signext %73)
  %74 = call noundef signext i16 @_ZNK8Coeff8x83getEii(ptr noundef nonnull align 2 dereferenceable(128) %2, i32 noundef %21, i32 noundef 4)
  %75 = sext i16 %74 to i32
  %76 = shl nsw i32 %75, 1
  %77 = getelementptr inbounds [8 x [8 x i8]], ptr @_ZL11coeff_quant, i64 0, i64 %indvars.iv, i64 4
  %78 = load i8, ptr %77, align 4, !tbaa !13
  %79 = zext i8 %78 to i32
  %80 = sdiv i32 %76, %79
  %sext.4 = shl i32 %80, 16
  %81 = ashr exact i32 %sext.4, 16
  %82 = icmp sgt i32 %81, -1
  %83 = zext i1 %82 to i32
  %84 = add nsw i32 %81, %83
  %85 = lshr i32 %84, 1
  %86 = trunc i32 %85 to i16
  call void @_ZN8Coeff8x83putEiis(ptr noundef nonnull align 2 dereferenceable(128) %3, i32 noundef %21, i32 noundef 4, i16 noundef signext %86)
  %87 = call noundef signext i16 @_ZNK8Coeff8x83getEii(ptr noundef nonnull align 2 dereferenceable(128) %2, i32 noundef %21, i32 noundef 5)
  %88 = sext i16 %87 to i32
  %89 = shl nsw i32 %88, 1
  %90 = getelementptr inbounds [8 x [8 x i8]], ptr @_ZL11coeff_quant, i64 0, i64 %indvars.iv, i64 5
  %91 = load i8, ptr %90, align 1, !tbaa !13
  %92 = zext i8 %91 to i32
  %93 = sdiv i32 %89, %92
  %sext.5 = shl i32 %93, 16
  %94 = ashr exact i32 %sext.5, 16
  %95 = icmp sgt i32 %94, -1
  %96 = zext i1 %95 to i32
  %97 = add nsw i32 %94, %96
  %98 = lshr i32 %97, 1
  %99 = trunc i32 %98 to i16
  call void @_ZN8Coeff8x83putEiis(ptr noundef nonnull align 2 dereferenceable(128) %3, i32 noundef %21, i32 noundef 5, i16 noundef signext %99)
  %100 = call noundef signext i16 @_ZNK8Coeff8x83getEii(ptr noundef nonnull align 2 dereferenceable(128) %2, i32 noundef %21, i32 noundef 6)
  %101 = sext i16 %100 to i32
  %102 = shl nsw i32 %101, 1
  %103 = getelementptr inbounds [8 x [8 x i8]], ptr @_ZL11coeff_quant, i64 0, i64 %indvars.iv, i64 6
  %104 = load i8, ptr %103, align 2, !tbaa !13
  %105 = zext i8 %104 to i32
  %106 = sdiv i32 %102, %105
  %sext.6 = shl i32 %106, 16
  %107 = ashr exact i32 %sext.6, 16
  %108 = icmp sgt i32 %107, -1
  %109 = zext i1 %108 to i32
  %110 = add nsw i32 %107, %109
  %111 = lshr i32 %110, 1
  %112 = trunc i32 %111 to i16
  call void @_ZN8Coeff8x83putEiis(ptr noundef nonnull align 2 dereferenceable(128) %3, i32 noundef %21, i32 noundef 6, i16 noundef signext %112)
  %113 = call noundef signext i16 @_ZNK8Coeff8x83getEii(ptr noundef nonnull align 2 dereferenceable(128) %2, i32 noundef %21, i32 noundef 7)
  %114 = sext i16 %113 to i32
  %115 = shl nsw i32 %114, 1
  %116 = getelementptr inbounds [8 x [8 x i8]], ptr @_ZL11coeff_quant, i64 0, i64 %indvars.iv, i64 7
  %117 = load i8, ptr %116, align 1, !tbaa !13
  %118 = zext i8 %117 to i32
  %119 = sdiv i32 %115, %118
  %sext.7 = shl i32 %119, 16
  %120 = ashr exact i32 %sext.7, 16
  %121 = icmp sgt i32 %120, -1
  %122 = zext i1 %121 to i32
  %123 = add nsw i32 %120, %122
  %124 = lshr i32 %123, 1
  %125 = trunc i32 %124 to i16
  call void @_ZN8Coeff8x83putEiis(ptr noundef nonnull align 2 dereferenceable(128) %3, i32 noundef %21, i32 noundef 7, i16 noundef signext %125)
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, 8
  br i1 %exitcond.not, label %126, label %.preheader, !llvm.loop !14

126:                                              ; preds = %.preheader
  call void @_ZN7sc_core8sc_inoutI8Coeff8x8E5writeERKS1_(ptr noundef nonnull align 8 dereferenceable(176) %12, ptr noundef nonnull align 2 dereferenceable(128) %3)
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %7) #4
  store i8 1, ptr %7, align 1, !tbaa !5
  call void @_ZN7sc_core8sc_inoutIbE5writeERKb(ptr noundef nonnull align 8 dereferenceable(192) %9, ptr noundef nonnull align 1 dereferenceable(1) %7)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %7) #4
  br label %127

127:                                              ; preds = %127, %126
  call void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
  %128 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNK7sc_core5sc_inIbEcvRKbEv(ptr noundef nonnull align 8 dereferenceable(184) %13)
  %129 = load i8, ptr %128, align 1, !tbaa !5, !range !9, !noundef !10
  %130 = icmp eq i8 %129, 0
  br i1 %130, label %127, label %131, !llvm.loop !15

131:                                              ; preds = %127
  br label %14, !llvm.loop !16
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @_ZN8Coeff8x8C1Ev(ptr noundef nonnull align 2 dereferenceable(128)) unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core8sc_inoutIbE5writeERKb(ptr noundef nonnull align 8 dereferenceable(192), ptr noundef nonnull align 1 dereferenceable(1)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNK7sc_core5sc_inIbEcvRKbEv(ptr noundef nonnull align 8 dereferenceable(184)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 2 dereferenceable(128) ptr @_ZNK7sc_core5sc_inI8Coeff8x8E4readEv(ptr noundef nonnull align 8 dereferenceable(168)) local_unnamed_addr #3 align 2

declare void @_ZN8Coeff8x8aSERKS_(ptr noundef nonnull align 2 dereferenceable(128), ptr noundef nonnull align 2 dereferenceable(128)) local_unnamed_addr #2

declare noundef signext i16 @_ZNK8Coeff8x83getEii(ptr noundef nonnull align 2 dereferenceable(128), i32 noundef, i32 noundef) local_unnamed_addr #2

declare void @_ZN8Coeff8x83putEiis(ptr noundef nonnull align 2 dereferenceable(128), i32 noundef, i32 noundef, i16 noundef signext) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core8sc_inoutI8Coeff8x8E5writeERKS1_(ptr noundef nonnull align 8 dereferenceable(176), ptr noundef nonnull align 2 dereferenceable(128)) local_unnamed_addr #3 align 2

attributes #0 = { mustprogress noreturn uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"bool", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{i8 0, i8 2}
!10 = !{}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !12}
!15 = distinct !{!15, !12}
!16 = distinct !{!16, !12}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,LICMPass,LoopRotatePass,LoopSimplifyPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass