; LLVM IR from gem5/gem5 :: ext/mcpat/cacti/component.ll (ZN9Component14logical_effortEiddPdS0_ddbbd)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.TechnologyParameter = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, i64, %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::ScalingFactor", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType" }
%"class.TechnologyParameter::DeviceType" = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::InterconnectType" = type { double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::ScalingFactor" = type { double, double, double }
%"class.TechnologyParameter::MemoryType" = type { double, double, double, double, double, double }

@g_tp = external global %class.TechnologyParameter, align 8
@.str.1 = external hidden unnamed_addr constant [72 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [36 x i8], align 1
@__PRETTY_FUNCTION__._ZN9Component14logical_effortEiddPdS0_ddbbd = external hidden unnamed_addr constant [107 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN9Component14logical_effortEiddPdS0_ddbbd(ptr noundef nonnull align 8 dereferenceable(280) %0, i32 noundef %1, double noundef %2, double noundef %3, ptr noundef %4, ptr noundef %5, double noundef %6, double noundef %7, i1 noundef zeroext %8, i1 noundef zeroext %9, double noundef %10) #2 align 2 {
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca double, align 8
  %15 = alloca double, align 8
  %16 = alloca ptr, align 8
  %17 = alloca ptr, align 8
  %18 = alloca double, align 8
  %19 = alloca double, align 8
  %20 = alloca i8, align 1
  %21 = alloca i8, align 1
  %22 = alloca double, align 8
  %23 = alloca i32, align 4
  %24 = alloca double, align 8
  %25 = alloca i32, align 4
  %26 = alloca double, align 8
  %27 = alloca double, align 8
  store ptr %0, ptr %12, align 8, !tbaa !5
  store i32 %1, ptr %13, align 4, !tbaa !9
  store double %2, ptr %14, align 8, !tbaa !11
  store double %3, ptr %15, align 8, !tbaa !11
  store ptr %4, ptr %16, align 8, !tbaa !5
  store ptr %5, ptr %17, align 8, !tbaa !5
  store double %6, ptr %18, align 8, !tbaa !11
  store double %7, ptr %19, align 8, !tbaa !11
  %28 = zext i1 %8 to i8
  store i8 %28, ptr %20, align 1, !tbaa !13
  %29 = zext i1 %9 to i8
  store i8 %29, ptr %21, align 1, !tbaa !13
  store double %10, ptr %22, align 8, !tbaa !11
  %30 = load ptr, ptr %12, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #5
  %31 = load double, ptr %15, align 8, !tbaa !11
  %32 = call double @log(double noundef %31) #5
  %33 = call double @log(double noundef 4.000000e+00) #5
  %34 = fdiv double %32, %33
  %35 = fptosi double %34 to i32
  store i32 %35, ptr %23, align 4, !tbaa !9
  %36 = load i32, ptr %23, align 4, !tbaa !9
  %37 = srem i32 %36, 2
  %38 = icmp ne i32 %37, 0
  %39 = zext i1 %38 to i64
  %40 = select i1 %38, i32 1, i32 0
  %41 = load i32, ptr %23, align 4, !tbaa !9
  %42 = add nsw i32 %41, %40
  store i32 %42, ptr %23, align 4, !tbaa !9
  %43 = load i32, ptr %23, align 4, !tbaa !9
  %44 = load i32, ptr %13, align 4, !tbaa !9
  %45 = icmp sgt i32 %43, %44
  br i1 %45, label %46, label %48

46:                                               ; preds = %11
  %47 = load i32, ptr %23, align 4, !tbaa !9
  br label %50

48:                                               ; preds = %11
  %49 = load i32, ptr %13, align 4, !tbaa !9
  br label %50

50:                                               ; preds = %48, %46
  %51 = phi i32 [ %47, %46 ], [ %49, %48 ]
  store i32 %51, ptr %23, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %24) #5
  %52 = load double, ptr %15, align 8, !tbaa !11
  %53 = load i32, ptr %23, align 4, !tbaa !9
  %54 = sitofp i32 %53 to double
  %55 = fdiv double 1.000000e+00, %54
  %56 = call double @pow(double noundef %52, double noundef %55) #5
  store double %56, ptr %24, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #5
  %57 = load i32, ptr %23, align 4, !tbaa !9
  %58 = sub nsw i32 %57, 1
  store i32 %58, ptr %25, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %26) #5
  %59 = load double, ptr %18, align 8, !tbaa !11
  %60 = load double, ptr %24, align 8, !tbaa !11
  %61 = fdiv double %59, %60
  store double %61, ptr %26, align 8, !tbaa !11
  %62 = load double, ptr %19, align 8, !tbaa !11
  %63 = fadd double 1.000000e+00, %62
  %64 = fdiv double 1.000000e+00, %63
  %65 = load double, ptr %26, align 8, !tbaa !11
  %66 = fmul double %64, %65
  %67 = load i8, ptr %20, align 1, !tbaa !13, !range !15, !noundef !16
  %68 = trunc i8 %67 to i1
  %69 = load i8, ptr %21, align 1, !tbaa !13, !range !15, !noundef !16
  %70 = trunc i8 %69 to i1
  %71 = call noundef double @_Z6gate_Cddbbb(double noundef 1.000000e+00, double noundef 0.000000e+00, i1 noundef zeroext %68, i1 noundef zeroext false, i1 noundef zeroext %70)
  %72 = fdiv double %66, %71
  %73 = load ptr, ptr %16, align 8, !tbaa !5
  %74 = load i32, ptr %25, align 4, !tbaa !9
  %75 = sext i32 %74 to i64
  %76 = getelementptr inbounds double, ptr %73, i64 %75
  store double %72, ptr %76, align 8, !tbaa !11
  %77 = load ptr, ptr %16, align 8, !tbaa !5
  %78 = load i32, ptr %25, align 4, !tbaa !9
  %79 = sext i32 %78 to i64
  %80 = getelementptr inbounds double, ptr %77, i64 %79
  %81 = load double, ptr %80, align 8, !tbaa !11
  %82 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 1), align 8, !tbaa !17
  %83 = fcmp ogt double %81, %82
  br i1 %83, label %84, label %90

84:                                               ; preds = %50
  %85 = load ptr, ptr %16, align 8, !tbaa !5
  %86 = load i32, ptr %25, align 4, !tbaa !9
  %87 = sext i32 %86 to i64
  %88 = getelementptr inbounds double, ptr %85, i64 %87
  %89 = load double, ptr %88, align 8, !tbaa !11
  br label %92

90:                                               ; preds = %50
  %91 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 1), align 8, !tbaa !17
  br label %92

92:                                               ; preds = %90, %84
  %93 = phi double [ %89, %84 ], [ %91, %90 ]
  %94 = load ptr, ptr %16, align 8, !tbaa !5
  %95 = load i32, ptr %25, align 4, !tbaa !9
  %96 = sext i32 %95 to i64
  %97 = getelementptr inbounds double, ptr %94, i64 %96
  store double %93, ptr %97, align 8, !tbaa !11
  %98 = load double, ptr %19, align 8, !tbaa !11
  %99 = load ptr, ptr %16, align 8, !tbaa !5
  %100 = load i32, ptr %25, align 4, !tbaa !9
  %101 = sext i32 %100 to i64
  %102 = getelementptr inbounds double, ptr %99, i64 %101
  %103 = load double, ptr %102, align 8, !tbaa !11
  %104 = fmul double %98, %103
  %105 = load ptr, ptr %17, align 8, !tbaa !5
  %106 = load i32, ptr %25, align 4, !tbaa !9
  %107 = sext i32 %106 to i64
  %108 = getelementptr inbounds double, ptr %105, i64 %107
  store double %104, ptr %108, align 8, !tbaa !11
  %109 = load ptr, ptr %16, align 8, !tbaa !5
  %110 = load i32, ptr %25, align 4, !tbaa !9
  %111 = sext i32 %110 to i64
  %112 = getelementptr inbounds double, ptr %109, i64 %111
  %113 = load double, ptr %112, align 8, !tbaa !11
  %114 = load double, ptr %22, align 8, !tbaa !11
  %115 = fcmp ogt double %113, %114
  br i1 %115, label %116, label %188

116:                                              ; preds = %92
  call void @llvm.lifetime.start.p0(i64 8, ptr %27) #5
  %117 = load double, ptr %19, align 8, !tbaa !11
  %118 = fadd double 1.000000e+00, %117
  %119 = load double, ptr %22, align 8, !tbaa !11
  %120 = fmul double %118, %119
  %121 = load i8, ptr %20, align 1, !tbaa !13, !range !15, !noundef !16
  %122 = trunc i8 %121 to i1
  %123 = load i8, ptr %21, align 1, !tbaa !13, !range !15, !noundef !16
  %124 = trunc i8 %123 to i1
  %125 = call noundef double @_Z6gate_Cddbbb(double noundef %120, double noundef 0.000000e+00, i1 noundef zeroext %122, i1 noundef zeroext false, i1 noundef zeroext %124)
  store double %125, ptr %27, align 8, !tbaa !11
  %126 = load double, ptr %14, align 8, !tbaa !11
  %127 = load double, ptr %27, align 8, !tbaa !11
  %128 = fmul double %126, %127
  %129 = load ptr, ptr %16, align 8, !tbaa !5
  %130 = getelementptr inbounds double, ptr %129, i64 0
  %131 = load double, ptr %130, align 8, !tbaa !11
  %132 = load ptr, ptr %17, align 8, !tbaa !5
  %133 = getelementptr inbounds double, ptr %132, i64 0
  %134 = load double, ptr %133, align 8, !tbaa !11
  %135 = fadd double %131, %134
  %136 = load i8, ptr %20, align 1, !tbaa !13, !range !15, !noundef !16
  %137 = trunc i8 %136 to i1
  %138 = load i8, ptr %21, align 1, !tbaa !13, !range !15, !noundef !16
  %139 = trunc i8 %138 to i1
  %140 = call noundef double @_Z6gate_Cddbbb(double noundef %135, double noundef 0.000000e+00, i1 noundef zeroext %137, i1 noundef zeroext false, i1 noundef zeroext %139)
  %141 = fdiv double %128, %140
  store double %141, ptr %15, align 8, !tbaa !11
  %142 = load double, ptr %15, align 8, !tbaa !11
  %143 = call double @log(double noundef %142) #5
  %144 = call double @log(double noundef 4.000000e+00) #5
  %145 = fdiv double %143, %144
  %146 = fptosi double %145 to i32
  %147 = add nsw i32 %146, 1
  store i32 %147, ptr %23, align 4, !tbaa !9
  %148 = load i32, ptr %23, align 4, !tbaa !9
  %149 = srem i32 %148, 2
  %150 = icmp ne i32 %149, 0
  %151 = zext i1 %150 to i64
  %152 = select i1 %150, i32 1, i32 0
  %153 = load i32, ptr %23, align 4, !tbaa !9
  %154 = add nsw i32 %153, %152
  store i32 %154, ptr %23, align 4, !tbaa !9
  %155 = load i32, ptr %23, align 4, !tbaa !9
  %156 = load i32, ptr %13, align 4, !tbaa !9
  %157 = icmp sgt i32 %155, %156
  br i1 %157, label %158, label %160

158:                                              ; preds = %116
  %159 = load i32, ptr %23, align 4, !tbaa !9
  br label %162

160:                                              ; preds = %116
  %161 = load i32, ptr %13, align 4, !tbaa !9
  br label %162

162:                                              ; preds = %160, %158
  %163 = phi i32 [ %159, %158 ], [ %161, %160 ]
  store i32 %163, ptr %23, align 4, !tbaa !9
  %164 = load double, ptr %15, align 8, !tbaa !11
  %165 = load i32, ptr %23, align 4, !tbaa !9
  %166 = sub nsw i32 %165, 1
  %167 = sitofp i32 %166 to double
  %168 = fdiv double 1.000000e+00, %167
  %169 = call double @pow(double noundef %164, double noundef %168) #5
  store double %169, ptr %24, align 8, !tbaa !11
  %170 = load i32, ptr %23, align 4, !tbaa !9
  %171 = sub nsw i32 %170, 1
  store i32 %171, ptr %25, align 4, !tbaa !9
  %172 = load double, ptr %22, align 8, !tbaa !11
  %173 = load ptr, ptr %16, align 8, !tbaa !5
  %174 = load i32, ptr %25, align 4, !tbaa !9
  %175 = sext i32 %174 to i64
  %176 = getelementptr inbounds double, ptr %173, i64 %175
  store double %172, ptr %176, align 8, !tbaa !11
  %177 = load double, ptr %19, align 8, !tbaa !11
  %178 = load ptr, ptr %16, align 8, !tbaa !5
  %179 = load i32, ptr %25, align 4, !tbaa !9
  %180 = sext i32 %179 to i64
  %181 = getelementptr inbounds double, ptr %178, i64 %180
  %182 = load double, ptr %181, align 8, !tbaa !11
  %183 = fmul double %177, %182
  %184 = load ptr, ptr %17, align 8, !tbaa !5
  %185 = load i32, ptr %25, align 4, !tbaa !9
  %186 = sext i32 %185 to i64
  %187 = getelementptr inbounds double, ptr %184, i64 %186
  store double %183, ptr %187, align 8, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 8, ptr %27) #5
  br label %188

188:                                              ; preds = %162, %92
  %189 = load i32, ptr %23, align 4, !tbaa !9
  %190 = sub nsw i32 %189, 2
  store i32 %190, ptr %25, align 4, !tbaa !9
  br label %191

191:                                              ; preds = %233, %188
  %192 = load i32, ptr %25, align 4, !tbaa !9
  %193 = icmp sge i32 %192, 1
  br i1 %193, label %194, label %236

194:                                              ; preds = %191
  %195 = load ptr, ptr %16, align 8, !tbaa !5
  %196 = load i32, ptr %25, align 4, !tbaa !9
  %197 = add nsw i32 %196, 1
  %198 = sext i32 %197 to i64
  %199 = getelementptr inbounds double, ptr %195, i64 %198
  %200 = load double, ptr %199, align 8, !tbaa !11
  %201 = load double, ptr %24, align 8, !tbaa !11
  %202 = fdiv double %200, %201
  %203 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 1), align 8, !tbaa !17
  %204 = fcmp ogt double %202, %203
  br i1 %204, label %205, label %214

205:                                              ; preds = %194
  %206 = load ptr, ptr %16, align 8, !tbaa !5
  %207 = load i32, ptr %25, align 4, !tbaa !9
  %208 = add nsw i32 %207, 1
  %209 = sext i32 %208 to i64
  %210 = getelementptr inbounds double, ptr %206, i64 %209
  %211 = load double, ptr %210, align 8, !tbaa !11
  %212 = load double, ptr %24, align 8, !tbaa !11
  %213 = fdiv double %211, %212
  br label %216

214:                                              ; preds = %194
  %215 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 1), align 8, !tbaa !17
  br label %216

216:                                              ; preds = %214, %205
  %217 = phi double [ %213, %205 ], [ %215, %214 ]
  %218 = load ptr, ptr %16, align 8, !tbaa !5
  %219 = load i32, ptr %25, align 4, !tbaa !9
  %220 = sext i32 %219 to i64
  %221 = getelementptr inbounds double, ptr %218, i64 %220
  store double %217, ptr %221, align 8, !tbaa !11
  %222 = load double, ptr %19, align 8, !tbaa !11
  %223 = load ptr, ptr %16, align 8, !tbaa !5
  %224 = load i32, ptr %25, align 4, !tbaa !9
  %225 = sext i32 %224 to i64
  %226 = getelementptr inbounds double, ptr %223, i64 %225
  %227 = load double, ptr %226, align 8, !tbaa !11
  %228 = fmul double %222, %227
  %229 = load ptr, ptr %17, align 8, !tbaa !5
  %230 = load i32, ptr %25, align 4, !tbaa !9
  %231 = sext i32 %230 to i64
  %232 = getelementptr inbounds double, ptr %229, i64 %231
  store double %228, ptr %232, align 8, !tbaa !11
  br label %233

233:                                              ; preds = %216
  %234 = load i32, ptr %25, align 4, !tbaa !9
  %235 = add nsw i32 %234, -1
  store i32 %235, ptr %25, align 4, !tbaa !9
  br label %191, !llvm.loop !24

236:                                              ; preds = %191
  %237 = load i32, ptr %23, align 4, !tbaa !9
  %238 = icmp sle i32 %237, 20
  br i1 %238, label %239, label %240

239:                                              ; preds = %236
  br label %242

240:                                              ; preds = %236
  call void @__assert_fail(ptr noundef @.str.3, ptr noundef @.str.1, i32 noundef 218, ptr noundef @__PRETTY_FUNCTION__._ZN9Component14logical_effortEiddPdS0_ddbbd) #6
  unreachable

241:                                              ; No predecessors!
  br label %242

242:                                              ; preds = %241, %239
  %243 = load i32, ptr %23, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %26) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %24) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #5
  ret i32 %243
}

; Function Attrs: nounwind
declare double @log(double noundef) #3

; Function Attrs: nounwind
declare double @pow(double noundef, double noundef) #3

declare noundef double @_Z6gate_Cddbbb(double noundef, double noundef, i1 noundef zeroext, i1 noundef zeroext, i1 noundef zeroext) #4

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"double", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"bool", !7, i64 0}
!15 = !{i8 0, i8 2}
!16 = !{}
!17 = !{!18, !12, i64 8}
!18 = !{!"_ZTS19TechnologyParameter", !12, i64 0, !12, i64 8, !12, i64 16, !12, i64 24, !12, i64 32, !12, i64 40, !12, i64 48, !12, i64 56, !12, i64 64, !12, i64 72, !12, i64 80, !12, i64 88, !12, i64 96, !12, i64 104, !12, i64 112, !12, i64 120, !12, i64 128, !12, i64 136, !12, i64 144, !12, i64 152, !12, i64 160, !12, i64 168, !12, i64 176, !12, i64 184, !12, i64 192, !12, i64 200, !12, i64 208, !12, i64 216, !12, i64 224, !12, i64 232, !12, i64 240, !12, i64 248, !12, i64 256, !12, i64 264, !12, i64 272, !12, i64 280, !12, i64 288, !12, i64 296, !12, i64 304, !12, i64 312, !12, i64 320, !12, i64 328, !12, i64 336, !12, i64 344, !19, i64 352, !20, i64 360, !20, i64 528, !20, i64 696, !20, i64 864, !20, i64 1032, !21, i64 1200, !21, i64 1264, !21, i64 1328, !22, i64 1392, !23, i64 1416, !23, i64 1464, !23, i64 1512}
!19 = !{!"long", !7, i64 0}
!20 = !{!"_ZTSN19TechnologyParameter10DeviceTypeE", !12, i64 0, !12, i64 8, !12, i64 16, !12, i64 24, !12, i64 32, !12, i64 40, !12, i64 48, !12, i64 56, !12, i64 64, !12, i64 72, !12, i64 80, !12, i64 88, !12, i64 96, !12, i64 104, !12, i64 112, !12, i64 120, !12, i64 128, !12, i64 136, !12, i64 144, !12, i64 152, !12, i64 160}
!21 = !{!"_ZTSN19TechnologyParameter16InterconnectTypeE", !12, i64 0, !12, i64 8, !12, i64 16, !12, i64 24, !12, i64 32, !12, i64 40, !12, i64 48, !12, i64 56}
!22 = !{!"_ZTSN19TechnologyParameter13ScalingFactorE", !12, i64 0, !12, i64 8, !12, i64 16}
!23 = !{!"_ZTSN19TechnologyParameter10MemoryTypeE", !12, i64 0, !12, i64 8, !12, i64 16, !12, i64 24, !12, i64 32, !12, i64 40}
!24 = distinct !{!24, !25}
!25 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.TechnologyParameter = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, i64, %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::ScalingFactor", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType" }
%"class.TechnologyParameter::DeviceType" = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::InterconnectType" = type { double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::ScalingFactor" = type { double, double, double }
%"class.TechnologyParameter::MemoryType" = type { double, double, double, double, double, double }

@g_tp = external local_unnamed_addr global %class.TechnologyParameter, align 8
@.str.1 = external hidden unnamed_addr constant [72 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [36 x i8], align 1
@__PRETTY_FUNCTION__._ZN9Component14logical_effortEiddPdS0_ddbbd = external hidden unnamed_addr constant [107 x i8], align 1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local noundef range(i32 -2147483648, 21) i32 @_ZN9Component14logical_effortEiddPdS0_ddbbd(ptr nocapture noundef nonnull readnone align 8 dereferenceable(280) %0, i32 noundef %1, double noundef %2, double noundef %3, ptr nocapture noundef %4, ptr nocapture noundef %5, double noundef %6, double noundef %7, i1 noundef zeroext %8, i1 noundef zeroext %9, double noundef %10) local_unnamed_addr #1 align 2 {
  %12 = tail call double @log(double noundef %3) #5
  %13 = fdiv double %12, 0x3FF62E42FEFA39EF
  %14 = fptosi double %13 to i32
  %15 = and i32 %14, 1
  %16 = add nsw i32 %15, %14
  %17 = tail call i32 @llvm.smax.i32(i32 %16, i32 %1)
  %18 = sitofp i32 %17 to double
  %19 = fdiv double 1.000000e+00, %18
  %20 = tail call double @pow(double noundef %3, double noundef %19) #5
  %21 = add nsw i32 %17, -1
  %22 = fadd double %7, 1.000000e+00
  %23 = insertelement <2 x double> <double 1.000000e+00, double poison>, double %6, i64 1
  %24 = insertelement <2 x double> poison, double %22, i64 0
  %25 = insertelement <2 x double> %24, double %20, i64 1
  %26 = fdiv <2 x double> %23, %25
  %shift = shufflevector <2 x double> %26, <2 x double> poison, <2 x i32> <i32 1, i32 poison>
  %27 = fmul <2 x double> %26, %shift
  %28 = extractelement <2 x double> %27, i64 0
  %29 = tail call noundef double @_Z6gate_Cddbbb(double noundef 1.000000e+00, double noundef 0.000000e+00, i1 noundef zeroext %8, i1 noundef zeroext false, i1 noundef zeroext %9)
  %30 = fdiv double %28, %29
  %31 = sext i32 %21 to i64
  %32 = getelementptr inbounds double, ptr %4, i64 %31
  store double %30, ptr %32, align 8, !tbaa !5
  %33 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 8), align 8, !tbaa !9
  %34 = fcmp ogt double %30, %33
  %. = select i1 %34, double %30, double %33
  store double %., ptr %32, align 8, !tbaa !5
  %35 = fmul double %., %7
  %36 = getelementptr inbounds double, ptr %5, i64 %31
  store double %35, ptr %36, align 8, !tbaa !5
  %37 = load double, ptr %32, align 8, !tbaa !5
  %38 = fcmp ogt double %37, %10
  br i1 %38, label %39, label %61

39:                                               ; preds = %11
  %40 = fmul double %22, %10
  %41 = tail call noundef double @_Z6gate_Cddbbb(double noundef %40, double noundef 0.000000e+00, i1 noundef zeroext %8, i1 noundef zeroext false, i1 noundef zeroext %9)
  %42 = fmul double %41, %2
  %43 = load double, ptr %4, align 8, !tbaa !5
  %44 = load double, ptr %5, align 8, !tbaa !5
  %45 = fadd double %43, %44
  %46 = tail call noundef double @_Z6gate_Cddbbb(double noundef %45, double noundef 0.000000e+00, i1 noundef zeroext %8, i1 noundef zeroext false, i1 noundef zeroext %9)
  %47 = fdiv double %42, %46
  %48 = tail call double @log(double noundef %47) #5
  %49 = fdiv double %48, 0x3FF62E42FEFA39EF
  %50 = fptosi double %49 to i32
  %51 = or i32 %50, -2
  %sub = sub i32 %50, %51
  %52 = tail call i32 @llvm.smax.i32(i32 %sub, i32 %1)
  %53 = add nsw i32 %52, -1
  %54 = sitofp i32 %53 to double
  %55 = fdiv double 1.000000e+00, %54
  %56 = tail call double @pow(double noundef %47, double noundef %55) #5
  %57 = sext i32 %53 to i64
  %58 = getelementptr inbounds double, ptr %4, i64 %57
  store double %10, ptr %58, align 8, !tbaa !5
  %59 = fmul double %7, %10
  %60 = getelementptr inbounds double, ptr %5, i64 %57
  store double %59, ptr %60, align 8, !tbaa !5
  br label %61

61:                                               ; preds = %39, %11
  %.079 = phi double [ %56, %39 ], [ %20, %11 ]
  %.0 = phi i32 [ %52, %39 ], [ %17, %11 ]
  %62 = icmp sgt i32 %.0, 2
  br i1 %62, label %.lr.ph.lver.check, label %._crit_edge.thread

.lr.ph.lver.check:                                ; preds = %61
  %63 = add nsw i32 %.0, -2
  %64 = zext i32 %63 to i64
  %.not = icmp eq i32 %63, 0
  %65 = select i1 %.not, i64 0, i64 8
  %scevgep = getelementptr i8, ptr %4, i64 %65
  %66 = shl nuw nsw i64 %64, 3
  %67 = getelementptr i8, ptr %4, i64 %66
  %scevgep88 = getelementptr i8, ptr %67, i64 16
  %scevgep89 = getelementptr i8, ptr %5, i64 %65
  %68 = getelementptr i8, ptr %5, i64 %66
  %scevgep90 = getelementptr i8, ptr %68, i64 8
  %bound0 = icmp ult ptr %scevgep, %scevgep90
  %bound1 = icmp ult ptr %scevgep89, %scevgep88
  %found.conflict = and i1 %bound0, %bound1
  br i1 %found.conflict, label %.lr.ph.lver.orig, label %.lr.ph.ph

.lr.ph.lver.orig:                                 ; preds = %.lr.ph.lver.check, %.lr.ph.lver.orig
  %indvars.iv.lver.orig = phi i64 [ %indvars.iv.next.lver.orig, %.lr.ph.lver.orig ], [ %64, %.lr.ph.lver.check ]
  %69 = getelementptr inbounds double, ptr %4, i64 %indvars.iv.lver.orig
  %70 = getelementptr inbounds i8, ptr %69, i64 8
  %71 = load double, ptr %70, align 8, !tbaa !5
  %72 = fdiv double %71, %.079
  %73 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 8), align 8, !tbaa !9
  %74 = fcmp ogt double %72, %73
  %.85.lver.orig = select i1 %74, double %72, double %73
  store double %.85.lver.orig, ptr %69, align 8, !tbaa !5
  %75 = fmul double %.85.lver.orig, %7
  %76 = getelementptr inbounds double, ptr %5, i64 %indvars.iv.lver.orig
  store double %75, ptr %76, align 8, !tbaa !5
  %indvars.iv.next.lver.orig = add nsw i64 %indvars.iv.lver.orig, -1
  %77 = icmp ugt i64 %indvars.iv.lver.orig, 1
  br i1 %77, label %.lr.ph.lver.orig, label %._crit_edge, !llvm.loop !16

.lr.ph.ph:                                        ; preds = %.lr.ph.lver.check
  %78 = shl nuw nsw i64 %64, 3
  %79 = getelementptr i8, ptr %4, i64 %78
  %scevgep92 = getelementptr i8, ptr %79, i64 8
  %load_initial = load double, ptr %scevgep92, align 8
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.ph, %.lr.ph
  %store_forwarded = phi double [ %load_initial, %.lr.ph.ph ], [ %.85, %.lr.ph ]
  %indvars.iv = phi i64 [ %64, %.lr.ph.ph ], [ %indvars.iv.next, %.lr.ph ]
  %80 = getelementptr inbounds double, ptr %4, i64 %indvars.iv
  %81 = fdiv double %store_forwarded, %.079
  %82 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 8), align 8, !tbaa !9
  %83 = fcmp ogt double %81, %82
  %.85 = select i1 %83, double %81, double %82
  store double %.85, ptr %80, align 8, !tbaa !5
  %84 = fmul double %.85, %7
  %85 = getelementptr inbounds double, ptr %5, i64 %indvars.iv
  store double %84, ptr %85, align 8, !tbaa !5
  %indvars.iv.next = add nsw i64 %indvars.iv, -1
  %86 = icmp ugt i64 %indvars.iv, 1
  br i1 %86, label %.lr.ph, label %._crit_edge, !llvm.loop !16

._crit_edge:                                      ; preds = %.lr.ph, %.lr.ph.lver.orig
  %87 = icmp slt i32 %.0, 21
  br i1 %87, label %._crit_edge.thread, label %88

88:                                               ; preds = %._crit_edge
  tail call void @__assert_fail(ptr noundef nonnull @.str.3, ptr noundef nonnull @.str.1, i32 noundef 218, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN9Component14logical_effortEiddPdS0_ddbbd) #6
  unreachable

._crit_edge.thread:                               ; preds = %61, %._crit_edge
  ret i32 %.0
}

; Function Attrs: mustprogress nofree nounwind willreturn memory(write)
declare double @log(double noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nofree nounwind willreturn memory(write)
declare double @pow(double noundef, double noundef) local_unnamed_addr #2

declare noundef double @_Z6gate_Cddbbb(double noundef, double noundef, i1 noundef zeroext, i1 noundef zeroext, i1 noundef zeroext) local_unnamed_addr #3

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #4

attributes #0 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nofree nounwind willreturn memory(write) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nounwind }
attributes #6 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 8}
!10 = !{!"_ZTS19TechnologyParameter", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !6, i64 120, !6, i64 128, !6, i64 136, !6, i64 144, !6, i64 152, !6, i64 160, !6, i64 168, !6, i64 176, !6, i64 184, !6, i64 192, !6, i64 200, !6, i64 208, !6, i64 216, !6, i64 224, !6, i64 232, !6, i64 240, !6, i64 248, !6, i64 256, !6, i64 264, !6, i64 272, !6, i64 280, !6, i64 288, !6, i64 296, !6, i64 304, !6, i64 312, !6, i64 320, !6, i64 328, !6, i64 336, !6, i64 344, !11, i64 352, !12, i64 360, !12, i64 528, !12, i64 696, !12, i64 864, !12, i64 1032, !13, i64 1200, !13, i64 1264, !13, i64 1328, !14, i64 1392, !15, i64 1416, !15, i64 1464, !15, i64 1512}
!11 = !{!"long", !7, i64 0}
!12 = !{!"_ZTSN19TechnologyParameter10DeviceTypeE", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !6, i64 120, !6, i64 128, !6, i64 136, !6, i64 144, !6, i64 152, !6, i64 160}
!13 = !{!"_ZTSN19TechnologyParameter16InterconnectTypeE", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56}
!14 = !{!"_ZTSN19TechnologyParameter13ScalingFactorE", !6, i64 0, !6, i64 8, !6, i64 16}
!15 = !{!"_ZTSN19TechnologyParameter10MemoryTypeE", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalDCEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass,VectorCombinePass