; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/communication (sc_clock)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_core::sc_time" = type { i64 }
%"class.sc_core::sc_clock" = type { %"class.sc_core::sc_signal", %"class.sc_core::sc_time", double, %"class.sc_core::sc_time", i8, %"class.sc_core::sc_time", %"class.sc_core::sc_time", %"class.sc_core::sc_event", %"class.sc_core::sc_event" }
%"class.sc_core::sc_signal" = type { %"class.sc_core::sc_signal_inout_if", %"class.sc_core::sc_prim_channel", %"struct.sc_core::sc_writer_policy_check", ptr, i8, i64, ptr, i8, ptr, ptr }
%"class.sc_core::sc_signal_inout_if" = type { %"class.sc_core::sc_signal_in_if", %"class.sc_core::sc_signal_write_if" }
%"class.sc_core::sc_signal_in_if" = type { %"class.sc_core::sc_interface" }
%"class.sc_core::sc_interface" = type { ptr }
%"class.sc_core::sc_signal_write_if" = type { %"class.sc_core::sc_interface" }
%"class.sc_core::sc_prim_channel" = type { %"class.sc_core::sc_object", ptr, ptr }
%"class.sc_core::sc_object" = type { ptr, ptr, %"class.std::vector", %"class.std::vector.0", %"class.std::__cxx11::basic_string", ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"struct.sc_core::sc_writer_policy_check" = type { %"struct.sc_core::sc_writer_policy_check_port", %"struct.sc_core::sc_writer_policy_check_write" }
%"struct.sc_core::sc_writer_policy_check_port" = type { ptr }
%"struct.sc_core::sc_writer_policy_check_write" = type { i8, ptr }
%"class.sc_core::sc_event" = type { %"class.std::__cxx11::basic_string", ptr, ptr, i32, i32, ptr, %"class.std::vector.8", %"class.std::vector.8", %"class.std::vector.13", %"class.std::vector.13" }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<sc_core::sc_method_process *, std::allocator<sc_core::sc_method_process *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_method_process *, std::allocator<sc_core::sc_method_process *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_method_process *, std::allocator<sc_core::sc_method_process *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_method_process *, std::allocator<sc_core::sc_method_process *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.13" = type { %"struct.std::_Vector_base.14" }
%"struct.std::_Vector_base.14" = type { %"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@_ZN7sc_core12SC_ZERO_TIMEE = external global %"class.sc_core::sc_time", align 8
@_ZN7sc_core24SC_ID_CLOCK_PERIOD_ZERO_E = external constant [0 x i8], align 1
@.str.11 = external hidden unnamed_addr constant [20 x i8], align 1
@_ZN7sc_core27SC_ID_CLOCK_HIGH_TIME_ZERO_E = external constant [0 x i8], align 1
@.str.12 = external hidden unnamed_addr constant [47 x i8], align 1
@_ZN7sc_core26SC_ID_CLOCK_LOW_TIME_ZERO_E = external constant [0 x i8], align 1
@.str.13 = external hidden unnamed_addr constant [47 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core8sc_clock4initERKNS_7sc_timeEdS3_b(ptr noundef nonnull align 8 dereferenceable(592) %0, ptr noundef nonnull align 8 dereferenceable(8) %1, double noundef %2, ptr noundef nonnull align 8 dereferenceable(8) %3, i1 noundef zeroext %4) #1 align 2 {
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca double, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i8, align 1
  %11 = alloca %"class.sc_core::sc_time", align 8
  %12 = alloca %"class.sc_core::sc_time", align 8
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store double %2, ptr %8, align 8, !tbaa !9
  store ptr %3, ptr %9, align 8, !tbaa !5
  %13 = zext i1 %4 to i8
  store i8 %13, ptr %10, align 1, !tbaa !11
  %14 = load ptr, ptr %6, align 8
  %15 = load ptr, ptr %7, align 8, !tbaa !5
  %16 = call noundef zeroext i1 @_ZNK7sc_core7sc_timeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(8) %15, ptr noundef nonnull align 8 dereferenceable(8) @_ZN7sc_core12SC_ZERO_TIMEE)
  br i1 %16, label %17, label %18

17:                                               ; preds = %5
  call void @_ZNK7sc_core8sc_clock12report_errorEPKcS2_(ptr noundef nonnull align 8 dereferenceable(592) %14, ptr noundef @_ZN7sc_core24SC_ID_CLOCK_PERIOD_ZERO_E, ptr noundef @.str.11)
  br label %18

18:                                               ; preds = %17, %5
  %19 = load ptr, ptr %7, align 8, !tbaa !5
  %20 = getelementptr inbounds %"class.sc_core::sc_clock", ptr %14, i32 0, i32 1
  %21 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZN7sc_core7sc_timeaSERKS0_(ptr noundef nonnull align 8 dereferenceable(8) %20, ptr noundef nonnull align 8 dereferenceable(8) %19)
  %22 = load i8, ptr %10, align 1, !tbaa !11, !range !13, !noundef !14
  %23 = trunc i8 %22 to i1
  %24 = getelementptr inbounds %"class.sc_core::sc_clock", ptr %14, i32 0, i32 4
  %25 = zext i1 %23 to i8
  store i8 %25, ptr %24, align 8, !tbaa !15
  %26 = load double, ptr %8, align 8, !tbaa !9
  %27 = fcmp ole double %26, 0.000000e+00
  br i1 %27, label %31, label %28

28:                                               ; preds = %18
  %29 = load double, ptr %8, align 8, !tbaa !9
  %30 = fcmp oge double %29, 1.000000e+00
  br i1 %30, label %31, label %33

31:                                               ; preds = %28, %18
  %32 = getelementptr inbounds %"class.sc_core::sc_clock", ptr %14, i32 0, i32 2
  store double 5.000000e-01, ptr %32, align 8, !tbaa !50
  br label %36

33:                                               ; preds = %28
  %34 = load double, ptr %8, align 8, !tbaa !9
  %35 = getelementptr inbounds %"class.sc_core::sc_clock", ptr %14, i32 0, i32 2
  store double %34, ptr %35, align 8, !tbaa !50
  br label %36

36:                                               ; preds = %33, %31
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #4
  %37 = getelementptr inbounds %"class.sc_core::sc_clock", ptr %14, i32 0, i32 1
  %38 = getelementptr inbounds %"class.sc_core::sc_clock", ptr %14, i32 0, i32 2
  %39 = load double, ptr %38, align 8, !tbaa !50
  call void @_ZN7sc_coremlERKNS_7sc_timeEd(ptr dead_on_unwind writable sret(%"class.sc_core::sc_time") align 8 %11, ptr noundef nonnull align 8 dereferenceable(8) %37, double noundef %39)
  %40 = getelementptr inbounds %"class.sc_core::sc_clock", ptr %14, i32 0, i32 6
  %41 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZN7sc_core7sc_timeaSERKS0_(ptr noundef nonnull align 8 dereferenceable(8) %40, ptr noundef nonnull align 8 dereferenceable(8) %11)
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #4
  %42 = getelementptr inbounds %"class.sc_core::sc_clock", ptr %14, i32 0, i32 1
  %43 = getelementptr inbounds %"class.sc_core::sc_clock", ptr %14, i32 0, i32 6
  call void @_ZN7sc_coremiERKNS_7sc_timeES2_(ptr dead_on_unwind writable sret(%"class.sc_core::sc_time") align 8 %12, ptr noundef nonnull align 8 dereferenceable(8) %42, ptr noundef nonnull align 8 dereferenceable(8) %43)
  %44 = getelementptr inbounds %"class.sc_core::sc_clock", ptr %14, i32 0, i32 5
  %45 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZN7sc_core7sc_timeaSERKS0_(ptr noundef nonnull align 8 dereferenceable(8) %44, ptr noundef nonnull align 8 dereferenceable(8) %12)
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #4
  %46 = getelementptr inbounds %"class.sc_core::sc_clock", ptr %14, i32 0, i32 6
  %47 = call noundef zeroext i1 @_ZNK7sc_core7sc_timeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(8) %46, ptr noundef nonnull align 8 dereferenceable(8) @_ZN7sc_core12SC_ZERO_TIMEE)
  br i1 %47, label %48, label %49

48:                                               ; preds = %36
  call void @_ZNK7sc_core8sc_clock12report_errorEPKcS2_(ptr noundef nonnull align 8 dereferenceable(592) %14, ptr noundef @_ZN7sc_core27SC_ID_CLOCK_HIGH_TIME_ZERO_E, ptr noundef @.str.12)
  br label %49

49:                                               ; preds = %48, %36
  %50 = getelementptr inbounds %"class.sc_core::sc_clock", ptr %14, i32 0, i32 5
  %51 = call noundef zeroext i1 @_ZNK7sc_core7sc_timeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(8) %50, ptr noundef nonnull align 8 dereferenceable(8) @_ZN7sc_core12SC_ZERO_TIMEE)
  br i1 %51, label %52, label %53

52:                                               ; preds = %49
  call void @_ZNK7sc_core8sc_clock12report_errorEPKcS2_(ptr noundef nonnull align 8 dereferenceable(592) %14, ptr noundef @_ZN7sc_core26SC_ID_CLOCK_LOW_TIME_ZERO_E, ptr noundef @.str.13)
  br label %53

53:                                               ; preds = %52, %49
  %54 = load i8, ptr %10, align 1, !tbaa !11, !range !13, !noundef !14
  %55 = trunc i8 %54 to i1
  br i1 %55, label %56, label %59

56:                                               ; preds = %53
  %57 = getelementptr inbounds %"class.sc_core::sc_signal", ptr %14, i32 0, i32 4
  store i8 0, ptr %57, align 8, !tbaa !51
  %58 = getelementptr inbounds %"class.sc_core::sc_signal", ptr %14, i32 0, i32 7
  store i8 0, ptr %58, align 8, !tbaa !52
  br label %62

59:                                               ; preds = %53
  %60 = getelementptr inbounds %"class.sc_core::sc_signal", ptr %14, i32 0, i32 4
  store i8 1, ptr %60, align 8, !tbaa !51
  %61 = getelementptr inbounds %"class.sc_core::sc_signal", ptr %14, i32 0, i32 7
  store i8 1, ptr %61, align 8, !tbaa !52
  br label %62

62:                                               ; preds = %59, %56
  %63 = load ptr, ptr %9, align 8, !tbaa !5
  %64 = getelementptr inbounds %"class.sc_core::sc_clock", ptr %14, i32 0, i32 3
  %65 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZN7sc_core7sc_timeaSERKS0_(ptr noundef nonnull align 8 dereferenceable(8) %64, ptr noundef nonnull align 8 dereferenceable(8) %63)
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNK7sc_core8sc_clock12report_errorEPKcS2_(ptr noundef nonnull align 8 dereferenceable(592), ptr noundef, ptr noundef) #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK7sc_core7sc_timeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZN7sc_core7sc_timeaSERKS0_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN7sc_coremlERKNS_7sc_timeEd(ptr dead_on_unwind noalias writable sret(%"class.sc_core::sc_time") align 8, ptr noundef nonnull align 8 dereferenceable(8), double noundef) #3

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN7sc_coremiERKNS_7sc_timeES2_(ptr dead_on_unwind noalias writable sret(%"class.sc_core::sc_time") align 8, ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"double", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{i8 0, i8 2}
!14 = !{}
!15 = !{!16, !12, i64 248}
!16 = !{!"_ZTSN7sc_core8sc_clockE", !17, i64 0, !38, i64 224, !10, i64 232, !38, i64 240, !12, i64 248, !38, i64 256, !38, i64 264, !39, i64 272, !39, i64 432}
!17 = !{!"_ZTSN7sc_core9sc_signalIbLNS_16sc_writer_policyE0EEE", !18, i64 0, !21, i64 16, !34, i64 144, !6, i64 168, !12, i64 176, !37, i64 184, !6, i64 192, !12, i64 200, !6, i64 208, !6, i64 216}
!18 = !{!"_ZTSN7sc_core18sc_signal_inout_ifIbEE", !19, i64 0, !20, i64 8}
!19 = !{!"_ZTSN7sc_core15sc_signal_in_ifIbEE"}
!20 = !{!"_ZTSN7sc_core18sc_signal_write_ifIbEE"}
!21 = !{!"_ZTSN7sc_core15sc_prim_channelE", !22, i64 0, !6, i64 112, !6, i64 120}
!22 = !{!"_ZTSN7sc_core9sc_objectE", !6, i64 8, !23, i64 16, !27, i64 40, !31, i64 64, !6, i64 96, !6, i64 104}
!23 = !{!"_ZTSSt6vectorIPN7sc_core8sc_eventESaIS2_EE", !24, i64 0}
!24 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE", !25, i64 0}
!25 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE12_Vector_implE", !26, i64 0}
!26 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!27 = !{!"_ZTSSt6vectorIPN7sc_core9sc_objectESaIS2_EE", !28, i64 0}
!28 = !{!"_ZTSSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE", !29, i64 0}
!29 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE12_Vector_implE", !30, i64 0}
!30 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!31 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !32, i64 0, !33, i64 8, !7, i64 16}
!32 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!33 = !{!"long", !7, i64 0}
!34 = !{!"_ZTSN7sc_core22sc_writer_policy_checkILNS_16sc_writer_policyE0EEE", !35, i64 0, !36, i64 8}
!35 = !{!"_ZTSN7sc_core27sc_writer_policy_check_portE", !6, i64 0}
!36 = !{!"_ZTSN7sc_core28sc_writer_policy_check_writeE", !12, i64 0, !6, i64 8}
!37 = !{!"long long", !7, i64 0}
!38 = !{!"_ZTSN7sc_core7sc_timeE", !37, i64 0}
!39 = !{!"_ZTSN7sc_core8sc_eventE", !31, i64 0, !6, i64 32, !6, i64 40, !40, i64 48, !41, i64 52, !6, i64 56, !42, i64 64, !42, i64 88, !46, i64 112, !46, i64 136}
!40 = !{!"_ZTSN7sc_core8sc_event8notify_tE", !7, i64 0}
!41 = !{!"int", !7, i64 0}
!42 = !{!"_ZTSSt6vectorIPN7sc_core17sc_method_processESaIS2_EE", !43, i64 0}
!43 = !{!"_ZTSSt12_Vector_baseIPN7sc_core17sc_method_processESaIS2_EE", !44, i64 0}
!44 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core17sc_method_processESaIS2_EE12_Vector_implE", !45, i64 0}
!45 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core17sc_method_processESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!46 = !{!"_ZTSSt6vectorIPN7sc_core17sc_thread_processESaIS2_EE", !47, i64 0}
!47 = !{!"_ZTSSt12_Vector_baseIPN7sc_core17sc_thread_processESaIS2_EE", !48, i64 0}
!48 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core17sc_thread_processESaIS2_EE12_Vector_implE", !49, i64 0}
!49 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core17sc_thread_processESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!50 = !{!16, !10, i64 232}
!51 = !{!17, !12, i64 176}
!52 = !{!17, !12, i64 200}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_core::sc_time" = type { i64 }

@_ZN7sc_core12SC_ZERO_TIMEE = external global %"class.sc_core::sc_time", align 8
@_ZN7sc_core24SC_ID_CLOCK_PERIOD_ZERO_E = external constant [0 x i8], align 1
@.str.11 = external hidden unnamed_addr constant [20 x i8], align 1
@_ZN7sc_core27SC_ID_CLOCK_HIGH_TIME_ZERO_E = external constant [0 x i8], align 1
@.str.12 = external hidden unnamed_addr constant [47 x i8], align 1
@_ZN7sc_core26SC_ID_CLOCK_LOW_TIME_ZERO_E = external constant [0 x i8], align 1
@.str.13 = external hidden unnamed_addr constant [47 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core8sc_clock4initERKNS_7sc_timeEdS3_b(ptr noundef nonnull align 8 dereferenceable(592) %0, ptr noundef nonnull align 8 dereferenceable(8) %1, double noundef %2, ptr noundef nonnull align 8 dereferenceable(8) %3, i1 noundef zeroext %4) local_unnamed_addr #1 align 2 {
  %6 = alloca %"class.sc_core::sc_time", align 8
  %7 = alloca %"class.sc_core::sc_time", align 8
  %8 = zext i1 %4 to i8
  %9 = tail call noundef zeroext i1 @_ZNK7sc_core7sc_timeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(8) %1, ptr noundef nonnull align 8 dereferenceable(8) @_ZN7sc_core12SC_ZERO_TIMEE)
  br i1 %9, label %10, label %11

10:                                               ; preds = %5
  tail call void @_ZNK7sc_core8sc_clock12report_errorEPKcS2_(ptr noundef nonnull align 8 dereferenceable(592) %0, ptr noundef nonnull @_ZN7sc_core24SC_ID_CLOCK_PERIOD_ZERO_E, ptr noundef nonnull @.str.11)
  br label %11

11:                                               ; preds = %10, %5
  %12 = getelementptr inbounds i8, ptr %0, i64 224
  %13 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZN7sc_core7sc_timeaSERKS0_(ptr noundef nonnull align 8 dereferenceable(8) %12, ptr noundef nonnull align 8 dereferenceable(8) %1)
  %14 = getelementptr inbounds i8, ptr %0, i64 248
  store i8 %8, ptr %14, align 8, !tbaa !5
  %15 = fcmp ole double %2, 0.000000e+00
  %16 = fcmp oge double %2, 1.000000e+00
  %or.cond = or i1 %15, %16
  %.sink = select i1 %or.cond, double 5.000000e-01, double %2
  %17 = getelementptr inbounds i8, ptr %0, i64 232
  store double %.sink, ptr %17, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #4
  call void @_ZN7sc_coremlERKNS_7sc_timeEd(ptr dead_on_unwind nonnull writable sret(%"class.sc_core::sc_time") align 8 %6, ptr noundef nonnull align 8 dereferenceable(8) %12, double noundef %.sink)
  %18 = getelementptr inbounds i8, ptr %0, i64 264
  %19 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZN7sc_core7sc_timeaSERKS0_(ptr noundef nonnull align 8 dereferenceable(8) %18, ptr noundef nonnull align 8 dereferenceable(8) %6)
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %7) #4
  call void @_ZN7sc_coremiERKNS_7sc_timeES2_(ptr dead_on_unwind nonnull writable sret(%"class.sc_core::sc_time") align 8 %7, ptr noundef nonnull align 8 dereferenceable(8) %12, ptr noundef nonnull align 8 dereferenceable(8) %18)
  %20 = getelementptr inbounds i8, ptr %0, i64 256
  %21 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZN7sc_core7sc_timeaSERKS0_(ptr noundef nonnull align 8 dereferenceable(8) %20, ptr noundef nonnull align 8 dereferenceable(8) %7)
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #4
  %22 = call noundef zeroext i1 @_ZNK7sc_core7sc_timeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(8) %18, ptr noundef nonnull align 8 dereferenceable(8) @_ZN7sc_core12SC_ZERO_TIMEE)
  br i1 %22, label %23, label %24

23:                                               ; preds = %11
  call void @_ZNK7sc_core8sc_clock12report_errorEPKcS2_(ptr noundef nonnull align 8 dereferenceable(592) %0, ptr noundef nonnull @_ZN7sc_core27SC_ID_CLOCK_HIGH_TIME_ZERO_E, ptr noundef nonnull @.str.12)
  br label %24

24:                                               ; preds = %23, %11
  %25 = call noundef zeroext i1 @_ZNK7sc_core7sc_timeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(8) %20, ptr noundef nonnull align 8 dereferenceable(8) @_ZN7sc_core12SC_ZERO_TIMEE)
  br i1 %25, label %26, label %27

26:                                               ; preds = %24
  call void @_ZNK7sc_core8sc_clock12report_errorEPKcS2_(ptr noundef nonnull align 8 dereferenceable(592) %0, ptr noundef nonnull @_ZN7sc_core26SC_ID_CLOCK_LOW_TIME_ZERO_E, ptr noundef nonnull @.str.13)
  br label %27

27:                                               ; preds = %26, %24
  %not. = xor i1 %4, true
  %spec.select = zext i1 %not. to i8
  %28 = getelementptr inbounds i8, ptr %0, i64 176
  store i8 %spec.select, ptr %28, align 8
  %29 = getelementptr inbounds i8, ptr %0, i64 200
  store i8 %spec.select, ptr %29, align 8
  %30 = getelementptr inbounds i8, ptr %0, i64 240
  %31 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZN7sc_core7sc_timeaSERKS0_(ptr noundef nonnull align 8 dereferenceable(8) %30, ptr noundef nonnull align 8 dereferenceable(8) %3)
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNK7sc_core8sc_clock12report_errorEPKcS2_(ptr noundef nonnull align 8 dereferenceable(592), ptr noundef, ptr noundef) local_unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK7sc_core7sc_timeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZN7sc_core7sc_timeaSERKS0_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN7sc_coremlERKNS_7sc_timeEd(ptr dead_on_unwind noalias writable sret(%"class.sc_core::sc_time") align 8, ptr noundef nonnull align 8 dereferenceable(8), double noundef) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN7sc_coremiERKNS_7sc_timeES2_(ptr dead_on_unwind noalias writable sret(%"class.sc_core::sc_time") align 8, ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #3

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !30, i64 248}
!6 = !{!"_ZTSN7sc_core8sc_clockE", !7, i64 0, !32, i64 224, !33, i64 232, !32, i64 240, !30, i64 248, !32, i64 256, !32, i64 264, !34, i64 272, !34, i64 432}
!7 = !{!"_ZTSN7sc_core9sc_signalIbLNS_16sc_writer_policyE0EEE", !8, i64 0, !11, i64 16, !27, i64 144, !13, i64 168, !30, i64 176, !31, i64 184, !13, i64 192, !30, i64 200, !13, i64 208, !13, i64 216}
!8 = !{!"_ZTSN7sc_core18sc_signal_inout_ifIbEE", !9, i64 0, !10, i64 8}
!9 = !{!"_ZTSN7sc_core15sc_signal_in_ifIbEE"}
!10 = !{!"_ZTSN7sc_core18sc_signal_write_ifIbEE"}
!11 = !{!"_ZTSN7sc_core15sc_prim_channelE", !12, i64 0, !13, i64 112, !13, i64 120}
!12 = !{!"_ZTSN7sc_core9sc_objectE", !13, i64 8, !16, i64 16, !20, i64 40, !24, i64 64, !13, i64 96, !13, i64 104}
!13 = !{!"any pointer", !14, i64 0}
!14 = !{!"omnipotent char", !15, i64 0}
!15 = !{!"Simple C++ TBAA"}
!16 = !{!"_ZTSSt6vectorIPN7sc_core8sc_eventESaIS2_EE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!20 = !{!"_ZTSSt6vectorIPN7sc_core9sc_objectESaIS2_EE", !21, i64 0}
!21 = !{!"_ZTSSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE12_Vector_implE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!24 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !25, i64 0, !26, i64 8, !14, i64 16}
!25 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !13, i64 0}
!26 = !{!"long", !14, i64 0}
!27 = !{!"_ZTSN7sc_core22sc_writer_policy_checkILNS_16sc_writer_policyE0EEE", !28, i64 0, !29, i64 8}
!28 = !{!"_ZTSN7sc_core27sc_writer_policy_check_portE", !13, i64 0}
!29 = !{!"_ZTSN7sc_core28sc_writer_policy_check_writeE", !30, i64 0, !13, i64 8}
!30 = !{!"bool", !14, i64 0}
!31 = !{!"long long", !14, i64 0}
!32 = !{!"_ZTSN7sc_core7sc_timeE", !31, i64 0}
!33 = !{!"double", !14, i64 0}
!34 = !{!"_ZTSN7sc_core8sc_eventE", !24, i64 0, !13, i64 32, !13, i64 40, !35, i64 48, !36, i64 52, !13, i64 56, !37, i64 64, !37, i64 88, !41, i64 112, !41, i64 136}
!35 = !{!"_ZTSN7sc_core8sc_event8notify_tE", !14, i64 0}
!36 = !{!"int", !14, i64 0}
!37 = !{!"_ZTSSt6vectorIPN7sc_core17sc_method_processESaIS2_EE", !38, i64 0}
!38 = !{!"_ZTSSt12_Vector_baseIPN7sc_core17sc_method_processESaIS2_EE", !39, i64 0}
!39 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core17sc_method_processESaIS2_EE12_Vector_implE", !40, i64 0}
!40 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core17sc_method_processESaIS2_EE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!41 = !{!"_ZTSSt6vectorIPN7sc_core17sc_thread_processESaIS2_EE", !42, i64 0}
!42 = !{!"_ZTSSt12_Vector_baseIPN7sc_core17sc_thread_processESaIS2_EE", !43, i64 0}
!43 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core17sc_thread_processESaIS2_EE12_Vector_implE", !44, i64 0}
!44 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core17sc_thread_processESaIS2_EE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,MergedLoadStoreMotionPass,SROAPass,SimplifyCFGPass,TailCallElimPass