; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/utils (sc_hash)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_core::sc_phash_base" = type { ptr, i32, i32, i32, i32, double, ptr, ptr, ptr }
%"class.sc_core::sc_phash_elem" = type { ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef ptr @_ZN7sc_core13sc_phash_base12find_entry_qEjPKvPPPNS_13sc_phash_elemE(ptr noundef nonnull align 8 dereferenceable(56) %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) #1 align 2 {
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store ptr %2, ptr %7, align 8, !tbaa !5
  store ptr %3, ptr %8, align 8, !tbaa !5
  %11 = load ptr, ptr %5, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #2
  %12 = getelementptr inbounds %"class.sc_core::sc_phash_base", ptr %11, i32 0, i32 6
  %13 = load ptr, ptr %12, align 8, !tbaa !11
  %14 = load i32, ptr %6, align 4, !tbaa !9
  %15 = zext i32 %14 to i64
  %16 = getelementptr inbounds ptr, ptr %13, i64 %15
  store ptr %16, ptr %9, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #2
  %17 = load ptr, ptr %9, align 8, !tbaa !5
  %18 = load ptr, ptr %17, align 8, !tbaa !5
  store ptr %18, ptr %10, align 8, !tbaa !5
  br label %19

19:                                               ; preds = %30, %4
  %20 = load ptr, ptr %10, align 8, !tbaa !5
  %21 = icmp ne ptr %20, null
  br i1 %21, label %22, label %28

22:                                               ; preds = %19
  %23 = load ptr, ptr %10, align 8, !tbaa !5
  %24 = getelementptr inbounds %"class.sc_core::sc_phash_elem", ptr %23, i32 0, i32 0
  %25 = load ptr, ptr %24, align 8, !tbaa !14
  %26 = load ptr, ptr %7, align 8, !tbaa !5
  %27 = icmp ne ptr %25, %26
  br label %28

28:                                               ; preds = %22, %19
  %29 = phi i1 [ false, %19 ], [ %27, %22 ]
  br i1 %29, label %30, label %35

30:                                               ; preds = %28
  %31 = load ptr, ptr %10, align 8, !tbaa !5
  %32 = getelementptr inbounds %"class.sc_core::sc_phash_elem", ptr %31, i32 0, i32 2
  store ptr %32, ptr %9, align 8, !tbaa !5
  %33 = load ptr, ptr %9, align 8, !tbaa !5
  %34 = load ptr, ptr %33, align 8, !tbaa !5
  store ptr %34, ptr %10, align 8, !tbaa !5
  br label %19, !llvm.loop !16

35:                                               ; preds = %28
  %36 = load ptr, ptr %10, align 8, !tbaa !5
  %37 = icmp ne ptr %36, null
  br i1 %37, label %38, label %66

38:                                               ; preds = %35
  %39 = getelementptr inbounds %"class.sc_core::sc_phash_base", ptr %11, i32 0, i32 4
  %40 = load i32, ptr %39, align 4, !tbaa !18
  %41 = icmp ne i32 %40, 0
  br i1 %41, label %42, label %66

42:                                               ; preds = %38
  %43 = load ptr, ptr %10, align 8, !tbaa !5
  %44 = getelementptr inbounds %"class.sc_core::sc_phash_elem", ptr %43, i32 0, i32 2
  %45 = load ptr, ptr %44, align 8, !tbaa !19
  %46 = load ptr, ptr %9, align 8, !tbaa !5
  store ptr %45, ptr %46, align 8, !tbaa !5
  %47 = getelementptr inbounds %"class.sc_core::sc_phash_base", ptr %11, i32 0, i32 6
  %48 = load ptr, ptr %47, align 8, !tbaa !11
  %49 = load i32, ptr %6, align 4, !tbaa !9
  %50 = zext i32 %49 to i64
  %51 = getelementptr inbounds ptr, ptr %48, i64 %50
  %52 = load ptr, ptr %51, align 8, !tbaa !5
  %53 = load ptr, ptr %10, align 8, !tbaa !5
  %54 = getelementptr inbounds %"class.sc_core::sc_phash_elem", ptr %53, i32 0, i32 2
  store ptr %52, ptr %54, align 8, !tbaa !19
  %55 = load ptr, ptr %10, align 8, !tbaa !5
  %56 = getelementptr inbounds %"class.sc_core::sc_phash_base", ptr %11, i32 0, i32 6
  %57 = load ptr, ptr %56, align 8, !tbaa !11
  %58 = load i32, ptr %6, align 4, !tbaa !9
  %59 = zext i32 %58 to i64
  %60 = getelementptr inbounds ptr, ptr %57, i64 %59
  store ptr %55, ptr %60, align 8, !tbaa !5
  %61 = getelementptr inbounds %"class.sc_core::sc_phash_base", ptr %11, i32 0, i32 6
  %62 = load ptr, ptr %61, align 8, !tbaa !11
  %63 = load i32, ptr %6, align 4, !tbaa !9
  %64 = zext i32 %63 to i64
  %65 = getelementptr inbounds ptr, ptr %62, i64 %64
  store ptr %65, ptr %9, align 8, !tbaa !5
  br label %66

66:                                               ; preds = %42, %38, %35
  %67 = load ptr, ptr %8, align 8, !tbaa !5
  %68 = icmp ne ptr %67, null
  br i1 %68, label %69, label %72

69:                                               ; preds = %66
  %70 = load ptr, ptr %9, align 8, !tbaa !5
  %71 = load ptr, ptr %8, align 8, !tbaa !5
  store ptr %70, ptr %71, align 8, !tbaa !5
  br label %72

72:                                               ; preds = %69, %66
  %73 = load ptr, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #2
  ret ptr %73
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 32}
!12 = !{!"_ZTSN7sc_core13sc_phash_baseE", !6, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !13, i64 24, !6, i64 32, !6, i64 40, !6, i64 48}
!13 = !{!"double", !7, i64 0}
!14 = !{!15, !6, i64 0}
!15 = !{!"_ZTSN7sc_core13sc_phash_elemE", !6, i64 0, !6, i64 8, !6, i64 16}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = !{!12, !10, i64 20}
!19 = !{!15, !6, i64 16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable
define dso_local noundef ptr @_ZN7sc_core13sc_phash_base12find_entry_qEjPKvPPPNS_13sc_phash_elemE(ptr nocapture noundef nonnull readonly align 8 dereferenceable(56) %0, i32 noundef %1, ptr noundef readnone %2, ptr noundef writeonly %3) local_unnamed_addr #0 align 2 {
  %5 = getelementptr inbounds i8, ptr %0, i64 32
  %6 = load ptr, ptr %5, align 8, !tbaa !5
  %7 = zext i32 %1 to i64
  %8 = getelementptr inbounds ptr, ptr %6, i64 %7
  %.029 = load ptr, ptr %8, align 8, !tbaa !12
  %.not30 = icmp eq ptr %.029, null
  br i1 %.not30, label %.critedge24, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %4
  %9 = load ptr, ptr %.029, align 8, !tbaa !13
  %.not2140 = icmp eq ptr %9, %2
  br i1 %.not2140, label %.critedge, label %.lr.ph42

.lr.ph:                                           ; preds = %.lr.ph42
  %10 = load ptr, ptr %.0, align 8, !tbaa !13
  %.not21 = icmp eq ptr %10, %2
  br i1 %.not21, label %.critedge.loopexit, label %.lr.ph42, !llvm.loop !15

.lr.ph42:                                         ; preds = %.lr.ph.preheader, %.lr.ph
  %.03241 = phi ptr [ %.0, %.lr.ph ], [ %.029, %.lr.ph.preheader ]
  %11 = getelementptr inbounds i8, ptr %.03241, i64 16
  %.0 = load ptr, ptr %11, align 8, !tbaa !12
  %.not = icmp eq ptr %.0, null
  br i1 %.not, label %.critedge24.loopexit, label %.lr.ph, !llvm.loop !15

.critedge.loopexit:                               ; preds = %.lr.ph
  %12 = getelementptr inbounds i8, ptr %.03241, i64 16
  br label %.critedge

.critedge:                                        ; preds = %.critedge.loopexit, %.lr.ph.preheader
  %.032.lcssa = phi ptr [ %.029, %.lr.ph.preheader ], [ %.0, %.critedge.loopexit ]
  %.01931.lcssa = phi ptr [ %8, %.lr.ph.preheader ], [ %12, %.critedge.loopexit ]
  %13 = getelementptr inbounds i8, ptr %0, i64 20
  %14 = load i32, ptr %13, align 4
  %.not22 = icmp eq i32 %14, 0
  br i1 %.not22, label %.critedge24, label %15

15:                                               ; preds = %.critedge
  %16 = getelementptr inbounds i8, ptr %.032.lcssa, i64 16
  %17 = load ptr, ptr %16, align 8, !tbaa !17
  store ptr %17, ptr %.01931.lcssa, align 8, !tbaa !12
  %18 = load ptr, ptr %5, align 8, !tbaa !5
  %19 = getelementptr inbounds ptr, ptr %18, i64 %7
  %20 = load ptr, ptr %19, align 8, !tbaa !12
  store ptr %20, ptr %16, align 8, !tbaa !17
  store ptr %.032.lcssa, ptr %19, align 8, !tbaa !12
  %21 = load ptr, ptr %5, align 8, !tbaa !5
  %22 = getelementptr inbounds ptr, ptr %21, i64 %7
  br label %.critedge24

.critedge24.loopexit:                             ; preds = %.lr.ph42
  %23 = getelementptr inbounds i8, ptr %.03241, i64 16
  br label %.critedge24

.critedge24:                                      ; preds = %.critedge24.loopexit, %4, %15, %.critedge
  %.027 = phi ptr [ %.032.lcssa, %15 ], [ %.032.lcssa, %.critedge ], [ null, %4 ], [ null, %.critedge24.loopexit ]
  %.1 = phi ptr [ %22, %15 ], [ %.01931.lcssa, %.critedge ], [ %8, %4 ], [ %23, %.critedge24.loopexit ]
  %.not23 = icmp eq ptr %3, null
  br i1 %.not23, label %25, label %24

24:                                               ; preds = %.critedge24
  store ptr %.1, ptr %3, align 8, !tbaa !12
  br label %25

25:                                               ; preds = %24, %.critedge24
  ret ptr %.027
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 32}
!6 = !{!"_ZTSN7sc_core13sc_phash_baseE", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !11, i64 24, !7, i64 32, !7, i64 40, !7, i64 48}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"double", !8, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"_ZTSN7sc_core13sc_phash_elemE", !7, i64 0, !7, i64 8, !7, i64 16}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = !{!14, !7, i64 16}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass