; LLVM IR from gem5/gem5 :: ext/drampower/src (CmdScheduler)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.Data::MemorySpecification" = type { ptr, %"class.std::__cxx11::basic_string", %"class.Data::MemoryType", [4 x i8], %"class.Data::MemArchitectureSpec", %"class.Data::MemTimingSpec", %"class.Data::MemPowerSpec", %"class.Data::Parametrisable" }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.Data::MemoryType" = type { i32 }
%"class.Data::MemArchitectureSpec" = type <{ ptr, i64, i64, i64, i64, i64, i64, i64, i64, i8, i8, i8, [5 x i8], %"class.Data::Parametrisable" }>
%"class.Data::MemTimingSpec" = type { ptr, double, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, double, %"class.Data::Parametrisable" }
%"class.Data::MemPowerSpec" = type { ptr, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, %"class.Data::Parametrisable" }
%"class.Data::Parametrisable" = type { ptr, %"class.std::vector.14" }
%"class.std::vector.14" = type { %"struct.std::_Vector_base.15" }
%"struct.std::_Vector_base.15" = type { %"struct.std::_Vector_base<Data::Parameter, std::allocator<Data::Parameter>>::_Vector_impl" }
%"struct.std::_Vector_base<Data::Parameter, std::allocator<Data::Parameter>>::_Vector_impl" = type { %"struct.std::_Vector_base<Data::Parameter, std::allocator<Data::Parameter>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Data::Parameter, std::allocator<Data::Parameter>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.Data::cmdScheduler" = type { %"class.std::vector", %"class.Data::cmdScheduler::commandItem", %"class.Data::cmdScheduler::commandItem", %"class.Data::cmdScheduler::commandItem", %"class.std::vector.3", %"class.std::vector.3", %"class.std::vector.8", %"class.std::vector.3", %"class.std::vector.3", i32, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i8, i64, %"class.std::basic_ofstream" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Data::cmdScheduler::trans, std::allocator<Data::cmdScheduler::trans>>::_Vector_impl" }
%"struct.std::_Vector_base<Data::cmdScheduler::trans, std::allocator<Data::cmdScheduler::trans>>::_Vector_impl" = type { %"struct.std::_Vector_base<Data::cmdScheduler::trans, std::allocator<Data::cmdScheduler::trans>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Data::cmdScheduler::trans, std::allocator<Data::cmdScheduler::trans>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.Data::cmdScheduler::commandItem" = type { i64, i64, i64, %"class.std::__cxx11::basic_string", %"class.Data::cmdScheduler::physicalAddr" }
%"class.Data::cmdScheduler::physicalAddr" = type { i64, i64, i64, i64 }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<std::vector<Data::cmdScheduler::commandItem>, std::allocator<std::vector<Data::cmdScheduler::commandItem>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<Data::cmdScheduler::commandItem>, std::allocator<std::vector<Data::cmdScheduler::commandItem>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<Data::cmdScheduler::commandItem>, std::allocator<std::vector<Data::cmdScheduler::commandItem>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<Data::cmdScheduler::commandItem>, std::allocator<std::vector<Data::cmdScheduler::commandItem>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<Data::cmdScheduler::commandItem, std::allocator<Data::cmdScheduler::commandItem>>::_Vector_impl" }
%"struct.std::_Vector_base<Data::cmdScheduler::commandItem, std::allocator<Data::cmdScheduler::commandItem>>::_Vector_impl" = type { %"struct.std::_Vector_base<Data::cmdScheduler::commandItem, std::allocator<Data::cmdScheduler::commandItem>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Data::cmdScheduler::commandItem, std::allocator<Data::cmdScheduler::commandItem>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::basic_ofstream" = type { %"class.std::basic_ostream.base", %"class.std::basic_filebuf", %"class.std::basic_ios" }
%"class.std::basic_ostream.base" = type { ptr }
%"class.std::basic_filebuf" = type { %"class.std::basic_streambuf", %union.pthread_mutex_t, %"class.std::__basic_file", i32, %struct.__mbstate_t, %struct.__mbstate_t, %struct.__mbstate_t, ptr, i64, i8, i8, i8, i8, ptr, ptr, i8, ptr, ptr, i64, ptr, ptr }
%"class.std::basic_streambuf" = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, %"class.std::locale" }
%"class.std::locale" = type { ptr }
%union.pthread_mutex_t = type { %struct.__pthread_mutex_s }
%struct.__pthread_mutex_s = type { i32, i32, i32, i32, i32, i16, i16, %struct.__pthread_internal_list }
%struct.__pthread_internal_list = type { ptr, ptr }
%"class.std::__basic_file" = type <{ ptr, i8, [7 x i8] }>
%struct.__mbstate_t = type { i32, %union.anon.13 }
%union.anon.13 = type { i32 }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }

@.str.12 = external hidden unnamed_addr constant [10 x i8], align 1
@.str.13 = external hidden unnamed_addr constant [8 x i8], align 1
@.str.14 = external hidden unnamed_addr constant [5 x i8], align 1
@.str.15 = external hidden unnamed_addr constant [5 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEPKc(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIN4Data12cmdScheduler11commandItemESaIS2_EE9push_backERKS2_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(88)) #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIlERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Data12cmdScheduler12pdSchedulingEllRKNS_19MemorySpecificationE(ptr noundef nonnull align 8 dereferenceable(1080) %0, i64 noundef %1, i64 noundef %2, ptr noundef nonnull align 8 dereferenceable(736) %3) #1 align 2 {
  %5 = alloca ptr, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i64, align 8
  %10 = alloca ptr, align 8
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i64 %1, ptr %6, align 8, !tbaa !9
  store i64 %2, ptr %7, align 8, !tbaa !9
  store ptr %3, ptr %8, align 8, !tbaa !5
  %13 = load ptr, ptr %5, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #4
  store i64 0, ptr %9, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #4
  %14 = load ptr, ptr %8, align 8, !tbaa !5
  %15 = getelementptr inbounds %"class.Data::MemorySpecification", ptr %14, i32 0, i32 5
  store ptr %15, ptr %10, align 8, !tbaa !5
  %16 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %13, i32 0, i32 28
  %17 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIlERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %6, ptr noundef nonnull align 8 dereferenceable(8) %16)
  %18 = load i64, ptr %17, align 8, !tbaa !9
  store i64 %18, ptr %6, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #4
  %19 = load i64, ptr %7, align 8, !tbaa !9
  %20 = load i64, ptr %6, align 8, !tbaa !9
  %21 = sub nsw i64 %19, %20
  store i64 %21, ptr %12, align 8, !tbaa !9
  %22 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIlERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %9, ptr noundef nonnull align 8 dereferenceable(8) %12)
  %23 = load i64, ptr %22, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #4
  store i64 %23, ptr %11, align 8, !tbaa !9
  %24 = load i64, ptr %7, align 8, !tbaa !9
  %25 = load i64, ptr %6, align 8, !tbaa !9
  %26 = load ptr, ptr %10, align 8, !tbaa !5
  %27 = getelementptr inbounds %"class.Data::MemTimingSpec", ptr %26, i32 0, i32 30
  %28 = load i64, ptr %27, align 8, !tbaa !11
  %29 = add nsw i64 %25, %28
  %30 = icmp sgt i64 %24, %29
  br i1 %30, label %31, label %101

31:                                               ; preds = %4
  %32 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %13, i32 0, i32 14
  %33 = load i64, ptr %32, align 8, !tbaa !14
  %34 = icmp eq i64 %33, 1
  br i1 %34, label %35, label %101

35:                                               ; preds = %31
  %36 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %13, i32 0, i32 1
  %37 = getelementptr inbounds %"class.Data::cmdScheduler::commandItem", ptr %36, i32 0, i32 1
  store i64 0, ptr %37, align 8, !tbaa !42
  %38 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %13, i32 0, i32 1
  %39 = getelementptr inbounds %"class.Data::cmdScheduler::commandItem", ptr %38, i32 0, i32 3
  %40 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEPKc(ptr noundef nonnull align 8 dereferenceable(32) %39, ptr noundef @.str.12)
  %41 = load i64, ptr %6, align 8, !tbaa !9
  %42 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %13, i32 0, i32 1
  %43 = getelementptr inbounds %"class.Data::cmdScheduler::commandItem", ptr %42, i32 0, i32 2
  store i64 %41, ptr %43, align 8, !tbaa !43
  %44 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %13, i32 0, i32 7
  %45 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %13, i32 0, i32 1
  call void @_ZNSt6vectorIN4Data12cmdScheduler11commandItemESaIS2_EE9push_backERKS2_(ptr noundef nonnull align 8 dereferenceable(24) %44, ptr noundef nonnull align 8 dereferenceable(88) %45)
  %46 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %13, i32 0, i32 1
  %47 = getelementptr inbounds %"class.Data::cmdScheduler::commandItem", ptr %46, i32 0, i32 3
  %48 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEPKc(ptr noundef nonnull align 8 dereferenceable(32) %47, ptr noundef @.str.13)
  %49 = load i64, ptr %11, align 8, !tbaa !9
  %50 = load ptr, ptr %10, align 8, !tbaa !5
  %51 = getelementptr inbounds %"class.Data::MemTimingSpec", ptr %50, i32 0, i32 15
  %52 = load i64, ptr %51, align 8, !tbaa !44
  %53 = icmp sgt i64 %49, %52
  br i1 %53, label %54, label %64

54:                                               ; preds = %35
  %55 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %13, i32 0, i32 1
  %56 = getelementptr inbounds %"class.Data::cmdScheduler::commandItem", ptr %55, i32 0, i32 2
  %57 = load i64, ptr %56, align 8, !tbaa !43
  %58 = load ptr, ptr %10, align 8, !tbaa !5
  %59 = getelementptr inbounds %"class.Data::MemTimingSpec", ptr %58, i32 0, i32 15
  %60 = load i64, ptr %59, align 8, !tbaa !44
  %61 = add nsw i64 %57, %60
  %62 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %13, i32 0, i32 1
  %63 = getelementptr inbounds %"class.Data::cmdScheduler::commandItem", ptr %62, i32 0, i32 2
  store i64 %61, ptr %63, align 8, !tbaa !43
  br label %72

64:                                               ; preds = %35
  %65 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %13, i32 0, i32 1
  %66 = getelementptr inbounds %"class.Data::cmdScheduler::commandItem", ptr %65, i32 0, i32 2
  %67 = load i64, ptr %66, align 8, !tbaa !43
  %68 = load i64, ptr %11, align 8, !tbaa !9
  %69 = add nsw i64 %67, %68
  %70 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %13, i32 0, i32 1
  %71 = getelementptr inbounds %"class.Data::cmdScheduler::commandItem", ptr %70, i32 0, i32 2
  store i64 %69, ptr %71, align 8, !tbaa !43
  br label %72

72:                                               ; preds = %64, %54
  %73 = load ptr, ptr %8, align 8, !tbaa !5
  %74 = getelementptr inbounds %"class.Data::MemorySpecification", ptr %73, i32 0, i32 2
  %75 = call noundef zeroext i1 @_ZNK4Data10MemoryType13isLPDDRFamilyEv(ptr noundef nonnull align 4 dereferenceable(4) %74)
  br i1 %75, label %76, label %85

76:                                               ; preds = %72
  %77 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %13, i32 0, i32 1
  %78 = getelementptr inbounds %"class.Data::cmdScheduler::commandItem", ptr %77, i32 0, i32 2
  %79 = load i64, ptr %78, align 8, !tbaa !43
  %80 = load ptr, ptr %10, align 8, !tbaa !5
  %81 = getelementptr inbounds %"class.Data::MemTimingSpec", ptr %80, i32 0, i32 26
  %82 = load i64, ptr %81, align 8, !tbaa !45
  %83 = add nsw i64 %79, %82
  %84 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %13, i32 0, i32 28
  store i64 %83, ptr %84, align 8, !tbaa !46
  br label %98

85:                                               ; preds = %72
  %86 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %13, i32 0, i32 1
  %87 = getelementptr inbounds %"class.Data::cmdScheduler::commandItem", ptr %86, i32 0, i32 2
  %88 = load i64, ptr %87, align 8, !tbaa !43
  %89 = load ptr, ptr %10, align 8, !tbaa !5
  %90 = getelementptr inbounds %"class.Data::MemTimingSpec", ptr %89, i32 0, i32 27
  %91 = load i64, ptr %90, align 8, !tbaa !47
  %92 = add nsw i64 %88, %91
  %93 = load ptr, ptr %10, align 8, !tbaa !5
  %94 = getelementptr inbounds %"class.Data::MemTimingSpec", ptr %93, i32 0, i32 3
  %95 = load i64, ptr %94, align 8, !tbaa !48
  %96 = sub nsw i64 %92, %95
  %97 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %13, i32 0, i32 28
  store i64 %96, ptr %97, align 8, !tbaa !46
  br label %98

98:                                               ; preds = %85, %76
  %99 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %13, i32 0, i32 7
  %100 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %13, i32 0, i32 1
  call void @_ZNSt6vectorIN4Data12cmdScheduler11commandItemESaIS2_EE9push_backERKS2_(ptr noundef nonnull align 8 dereferenceable(24) %99, ptr noundef nonnull align 8 dereferenceable(88) %100)
  br label %164

101:                                              ; preds = %31, %4
  %102 = load i64, ptr %7, align 8, !tbaa !9
  %103 = load i64, ptr %6, align 8, !tbaa !9
  %104 = load ptr, ptr %10, align 8, !tbaa !5
  %105 = getelementptr inbounds %"class.Data::MemTimingSpec", ptr %104, i32 0, i32 31
  %106 = load i64, ptr %105, align 8, !tbaa !49
  %107 = add nsw i64 %103, %106
  %108 = icmp sgt i64 %102, %107
  br i1 %108, label %109, label %163

109:                                              ; preds = %101
  %110 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %13, i32 0, i32 14
  %111 = load i64, ptr %110, align 8, !tbaa !14
  %112 = icmp eq i64 %111, 2
  br i1 %112, label %113, label %163

113:                                              ; preds = %109
  %114 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %13, i32 0, i32 1
  %115 = getelementptr inbounds %"class.Data::cmdScheduler::commandItem", ptr %114, i32 0, i32 1
  store i64 0, ptr %115, align 8, !tbaa !42
  %116 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %13, i32 0, i32 1
  %117 = getelementptr inbounds %"class.Data::cmdScheduler::commandItem", ptr %116, i32 0, i32 3
  %118 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEPKc(ptr noundef nonnull align 8 dereferenceable(32) %117, ptr noundef @.str.14)
  %119 = load i64, ptr %6, align 8, !tbaa !9
  %120 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %13, i32 0, i32 1
  %121 = getelementptr inbounds %"class.Data::cmdScheduler::commandItem", ptr %120, i32 0, i32 2
  store i64 %119, ptr %121, align 8, !tbaa !43
  %122 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %13, i32 0, i32 7
  %123 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %13, i32 0, i32 1
  call void @_ZNSt6vectorIN4Data12cmdScheduler11commandItemESaIS2_EE9push_backERKS2_(ptr noundef nonnull align 8 dereferenceable(24) %122, ptr noundef nonnull align 8 dereferenceable(88) %123)
  %124 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %13, i32 0, i32 15
  store i64 1, ptr %124, align 8, !tbaa !50
  %125 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %13, i32 0, i32 1
  %126 = getelementptr inbounds %"class.Data::cmdScheduler::commandItem", ptr %125, i32 0, i32 3
  %127 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEPKc(ptr noundef nonnull align 8 dereferenceable(32) %126, ptr noundef @.str.15)
  %128 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %13, i32 0, i32 1
  %129 = getelementptr inbounds %"class.Data::cmdScheduler::commandItem", ptr %128, i32 0, i32 2
  %130 = load i64, ptr %129, align 8, !tbaa !43
  %131 = load i64, ptr %11, align 8, !tbaa !9
  %132 = add nsw i64 %130, %131
  %133 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %13, i32 0, i32 1
  %134 = getelementptr inbounds %"class.Data::cmdScheduler::commandItem", ptr %133, i32 0, i32 2
  store i64 %132, ptr %134, align 8, !tbaa !43
  %135 = load ptr, ptr %8, align 8, !tbaa !5
  %136 = getelementptr inbounds %"class.Data::MemorySpecification", ptr %135, i32 0, i32 2
  %137 = call noundef zeroext i1 @_ZNK4Data10MemoryType13isLPDDRFamilyEv(ptr noundef nonnull align 4 dereferenceable(4) %136)
  br i1 %137, label %138, label %147

138:                                              ; preds = %113
  %139 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %13, i32 0, i32 1
  %140 = getelementptr inbounds %"class.Data::cmdScheduler::commandItem", ptr %139, i32 0, i32 2
  %141 = load i64, ptr %140, align 8, !tbaa !43
  %142 = load ptr, ptr %10, align 8, !tbaa !5
  %143 = getelementptr inbounds %"class.Data::MemTimingSpec", ptr %142, i32 0, i32 28
  %144 = load i64, ptr %143, align 8, !tbaa !51
  %145 = add nsw i64 %141, %144
  %146 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %13, i32 0, i32 28
  store i64 %145, ptr %146, align 8, !tbaa !46
  br label %160

147:                                              ; preds = %113
  %148 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %13, i32 0, i32 1
  %149 = getelementptr inbounds %"class.Data::cmdScheduler::commandItem", ptr %148, i32 0, i32 2
  %150 = load i64, ptr %149, align 8, !tbaa !43
  %151 = load ptr, ptr %10, align 8, !tbaa !5
  %152 = getelementptr inbounds %"class.Data::MemTimingSpec", ptr %151, i32 0, i32 29
  %153 = load i64, ptr %152, align 8, !tbaa !52
  %154 = add nsw i64 %150, %153
  %155 = load ptr, ptr %10, align 8, !tbaa !5
  %156 = getelementptr inbounds %"class.Data::MemTimingSpec", ptr %155, i32 0, i32 3
  %157 = load i64, ptr %156, align 8, !tbaa !48
  %158 = sub nsw i64 %154, %157
  %159 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %13, i32 0, i32 28
  store i64 %158, ptr %159, align 8, !tbaa !46
  br label %160

160:                                              ; preds = %147, %138
  %161 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %13, i32 0, i32 7
  %162 = getelementptr inbounds %"class.Data::cmdScheduler", ptr %13, i32 0, i32 1
  call void @_ZNSt6vectorIN4Data12cmdScheduler11commandItemESaIS2_EE9push_backERKS2_(ptr noundef nonnull align 8 dereferenceable(24) %161, ptr noundef nonnull align 8 dereferenceable(88) %162)
  br label %163

163:                                              ; preds = %160, %109, %101
  br label %164

164:                                              ; preds = %163, %98
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #4
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK4Data10MemoryType13isLPDDRFamilyEv(ptr noundef nonnull align 4 dereferenceable(4)) #3 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !10, i64 240}
!12 = !{!"_ZTSN4Data13MemTimingSpecE", !13, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !10, i64 56, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !10, i64 144, !10, i64 152, !10, i64 160, !10, i64 168, !10, i64 176, !10, i64 184, !10, i64 192, !10, i64 200, !10, i64 208, !10, i64 216, !10, i64 224, !10, i64 232, !10, i64 240, !10, i64 248, !13, i64 256}
!13 = !{!"double", !7, i64 0}
!14 = !{!15, !10, i64 448}
!15 = !{!"_ZTSN4Data12cmdSchedulerE", !16, i64 0, !20, i64 24, !20, i64 112, !20, i64 200, !24, i64 288, !24, i64 312, !28, i64 336, !24, i64 360, !24, i64 384, !32, i64 408, !10, i64 416, !10, i64 424, !10, i64 432, !10, i64 440, !10, i64 448, !10, i64 456, !10, i64 464, !10, i64 472, !10, i64 480, !10, i64 488, !10, i64 496, !10, i64 504, !10, i64 512, !10, i64 520, !10, i64 528, !10, i64 536, !10, i64 544, !33, i64 552, !10, i64 560, !34, i64 568}
!16 = !{!"_ZTSSt6vectorIN4Data12cmdScheduler5transESaIS2_EE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIN4Data12cmdScheduler5transESaIS2_EE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIN4Data12cmdScheduler5transESaIS2_EE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIN4Data12cmdScheduler5transESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!20 = !{!"_ZTSN4Data12cmdScheduler11commandItemE", !10, i64 0, !10, i64 8, !10, i64 16, !21, i64 24, !23, i64 56}
!21 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !22, i64 0, !10, i64 8, !7, i64 16}
!22 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!23 = !{!"_ZTSN4Data12cmdScheduler12physicalAddrE", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24}
!24 = !{!"_ZTSSt6vectorIN4Data12cmdScheduler11commandItemESaIS2_EE", !25, i64 0}
!25 = !{!"_ZTSSt12_Vector_baseIN4Data12cmdScheduler11commandItemESaIS2_EE", !26, i64 0}
!26 = !{!"_ZTSNSt12_Vector_baseIN4Data12cmdScheduler11commandItemESaIS2_EE12_Vector_implE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseIN4Data12cmdScheduler11commandItemESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!28 = !{!"_ZTSSt6vectorIS_IN4Data12cmdScheduler11commandItemESaIS2_EESaIS4_EE", !29, i64 0}
!29 = !{!"_ZTSSt12_Vector_baseISt6vectorIN4Data12cmdScheduler11commandItemESaIS3_EESaIS5_EE", !30, i64 0}
!30 = !{!"_ZTSNSt12_Vector_baseISt6vectorIN4Data12cmdScheduler11commandItemESaIS3_EESaIS5_EE12_Vector_implE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseISt6vectorIN4Data12cmdScheduler11commandItemESaIS3_EESaIS5_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!32 = !{!"int", !7, i64 0}
!33 = !{!"bool", !7, i64 0}
!34 = !{!"_ZTSSt14basic_ofstreamIcSt11char_traitsIcEE", !35, i64 0, !36, i64 8}
!35 = !{!"_ZTSSo"}
!36 = !{!"_ZTSSt13basic_filebufIcSt11char_traitsIcEE", !37, i64 0, !7, i64 64, !39, i64 104, !40, i64 120, !41, i64 124, !41, i64 132, !41, i64 140, !6, i64 152, !10, i64 160, !33, i64 168, !33, i64 169, !33, i64 170, !7, i64 171, !6, i64 176, !6, i64 184, !33, i64 192, !6, i64 200, !6, i64 208, !10, i64 216, !6, i64 224, !6, i64 232}
!37 = !{!"_ZTSSt15basic_streambufIcSt11char_traitsIcEE", !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !38, i64 56}
!38 = !{!"_ZTSSt6locale", !6, i64 0}
!39 = !{!"_ZTSSt12__basic_fileIcE", !6, i64 0, !33, i64 8}
!40 = !{!"_ZTSSt13_Ios_Openmode", !7, i64 0}
!41 = !{!"_ZTS11__mbstate_t", !32, i64 0, !7, i64 4}
!42 = !{!15, !10, i64 32}
!43 = !{!15, !10, i64 40}
!44 = !{!12, !10, i64 120}
!45 = !{!12, !10, i64 208}
!46 = !{!15, !10, i64 560}
!47 = !{!12, !10, i64 216}
!48 = !{!12, !10, i64 24}
!49 = !{!12, !10, i64 248}
!50 = !{!15, !10, i64 456}
!51 = !{!12, !10, i64 224}
!52 = !{!12, !10, i64 232}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.12 = external hidden unnamed_addr constant [10 x i8], align 1
@.str.13 = external hidden unnamed_addr constant [8 x i8], align 1
@.str.14 = external hidden unnamed_addr constant [5 x i8], align 1
@.str.15 = external hidden unnamed_addr constant [5 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEPKc(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIN4Data12cmdScheduler11commandItemESaIS2_EE9push_backERKS2_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(88)) local_unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIlERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Data12cmdScheduler12pdSchedulingEllRKNS_19MemorySpecificationE(ptr noundef nonnull align 8 dereferenceable(1080) %0, i64 noundef %1, i64 noundef %2, ptr noundef nonnull align 8 dereferenceable(736) %3) local_unnamed_addr #1 align 2 {
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  store i64 %1, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #5
  store i64 0, ptr %6, align 8, !tbaa !5
  %8 = getelementptr inbounds i8, ptr %0, i64 560
  %9 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIlERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %5, ptr noundef nonnull align 8 dereferenceable(8) %8)
  %10 = load i64, ptr %9, align 8, !tbaa !5
  store i64 %10, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %7) #5
  %11 = sub nsw i64 %2, %10
  store i64 %11, ptr %7, align 8, !tbaa !5
  %12 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIlERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %6, ptr noundef nonnull align 8 dereferenceable(8) %7)
  %13 = load i64, ptr %12, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #5
  %14 = load i64, ptr %5, align 8, !tbaa !5
  %15 = getelementptr inbounds i8, ptr %3, i64 400
  %16 = load i64, ptr %15, align 8, !tbaa !9
  %17 = add nsw i64 %16, %14
  %18 = icmp slt i64 %17, %2
  %19 = getelementptr inbounds i8, ptr %0, i64 448
  %20 = load i64, ptr %19, align 8
  %21 = icmp eq i64 %20, 1
  %or.cond = select i1 %18, i1 %21, i1 false
  br i1 %or.cond, label %22, label %49

22:                                               ; preds = %4
  %23 = getelementptr inbounds i8, ptr %0, i64 24
  %24 = getelementptr inbounds i8, ptr %0, i64 32
  store i64 0, ptr %24, align 8, !tbaa !12
  %25 = getelementptr inbounds i8, ptr %0, i64 48
  %26 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEPKc(ptr noundef nonnull align 8 dereferenceable(32) %25, ptr noundef nonnull @.str.12)
  %27 = load i64, ptr %5, align 8, !tbaa !5
  %28 = getelementptr inbounds i8, ptr %0, i64 40
  store i64 %27, ptr %28, align 8, !tbaa !41
  %29 = getelementptr inbounds i8, ptr %0, i64 360
  call void @_ZNSt6vectorIN4Data12cmdScheduler11commandItemESaIS2_EE9push_backERKS2_(ptr noundef nonnull align 8 dereferenceable(24) %29, ptr noundef nonnull align 8 dereferenceable(88) %23)
  %30 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEPKc(ptr noundef nonnull align 8 dereferenceable(32) %25, ptr noundef nonnull @.str.13)
  %31 = getelementptr inbounds i8, ptr %3, i64 280
  %32 = load i64, ptr %31, align 8, !tbaa !42
  %33 = load i64, ptr %28, align 8
  %storemerge20.v = call i64 @llvm.smin.i64(i64 %13, i64 %32)
  %storemerge20 = add nsw i64 %33, %storemerge20.v
  store i64 %storemerge20, ptr %28, align 8, !tbaa !41
  %34 = getelementptr inbounds i8, ptr %3, i64 40
  %35 = call noundef zeroext i1 @_ZNK4Data10MemoryType13isLPDDRFamilyEv(ptr noundef nonnull align 4 dereferenceable(4) %34)
  %36 = load i64, ptr %28, align 8, !tbaa !41
  br i1 %35, label %37, label %41

37:                                               ; preds = %22
  %38 = getelementptr inbounds i8, ptr %3, i64 368
  %39 = load i64, ptr %38, align 8, !tbaa !43
  %40 = add nsw i64 %39, %36
  br label %48

41:                                               ; preds = %22
  %42 = getelementptr inbounds i8, ptr %3, i64 376
  %43 = load i64, ptr %42, align 8, !tbaa !44
  %44 = add nsw i64 %43, %36
  %45 = getelementptr inbounds i8, ptr %3, i64 184
  %46 = load i64, ptr %45, align 8, !tbaa !45
  %47 = sub i64 %44, %46
  br label %48

48:                                               ; preds = %41, %37
  %storemerge21 = phi i64 [ %47, %41 ], [ %40, %37 ]
  store i64 %storemerge21, ptr %8, align 8, !tbaa !46
  call void @_ZNSt6vectorIN4Data12cmdScheduler11commandItemESaIS2_EE9push_backERKS2_(ptr noundef nonnull align 8 dereferenceable(24) %29, ptr noundef nonnull align 8 dereferenceable(88) %23)
  br label %82

49:                                               ; preds = %4
  %50 = getelementptr inbounds i8, ptr %3, i64 408
  %51 = load i64, ptr %50, align 8, !tbaa !47
  %52 = add nsw i64 %51, %14
  %53 = icmp slt i64 %52, %2
  %54 = icmp eq i64 %20, 2
  %or.cond26 = select i1 %53, i1 %54, i1 false
  br i1 %or.cond26, label %55, label %82

55:                                               ; preds = %49
  %56 = getelementptr inbounds i8, ptr %0, i64 24
  %57 = getelementptr inbounds i8, ptr %0, i64 32
  store i64 0, ptr %57, align 8, !tbaa !12
  %58 = getelementptr inbounds i8, ptr %0, i64 48
  %59 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEPKc(ptr noundef nonnull align 8 dereferenceable(32) %58, ptr noundef nonnull @.str.14)
  %60 = load i64, ptr %5, align 8, !tbaa !5
  %61 = getelementptr inbounds i8, ptr %0, i64 40
  store i64 %60, ptr %61, align 8, !tbaa !41
  %62 = getelementptr inbounds i8, ptr %0, i64 360
  call void @_ZNSt6vectorIN4Data12cmdScheduler11commandItemESaIS2_EE9push_backERKS2_(ptr noundef nonnull align 8 dereferenceable(24) %62, ptr noundef nonnull align 8 dereferenceable(88) %56)
  %63 = getelementptr inbounds i8, ptr %0, i64 456
  store i64 1, ptr %63, align 8, !tbaa !48
  %64 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEPKc(ptr noundef nonnull align 8 dereferenceable(32) %58, ptr noundef nonnull @.str.15)
  %65 = load i64, ptr %61, align 8, !tbaa !41
  %66 = add nsw i64 %65, %13
  store i64 %66, ptr %61, align 8, !tbaa !41
  %67 = getelementptr inbounds i8, ptr %3, i64 40
  %68 = call noundef zeroext i1 @_ZNK4Data10MemoryType13isLPDDRFamilyEv(ptr noundef nonnull align 4 dereferenceable(4) %67)
  %69 = load i64, ptr %61, align 8, !tbaa !41
  br i1 %68, label %70, label %74

70:                                               ; preds = %55
  %71 = getelementptr inbounds i8, ptr %3, i64 384
  %72 = load i64, ptr %71, align 8, !tbaa !49
  %73 = add nsw i64 %72, %69
  br label %81

74:                                               ; preds = %55
  %75 = getelementptr inbounds i8, ptr %3, i64 392
  %76 = load i64, ptr %75, align 8, !tbaa !50
  %77 = add nsw i64 %76, %69
  %78 = getelementptr inbounds i8, ptr %3, i64 184
  %79 = load i64, ptr %78, align 8, !tbaa !45
  %80 = sub i64 %77, %79
  br label %81

81:                                               ; preds = %74, %70
  %storemerge = phi i64 [ %80, %74 ], [ %73, %70 ]
  store i64 %storemerge, ptr %8, align 8, !tbaa !46
  call void @_ZNSt6vectorIN4Data12cmdScheduler11commandItemESaIS2_EE9push_backERKS2_(ptr noundef nonnull align 8 dereferenceable(24) %62, ptr noundef nonnull align 8 dereferenceable(88) %56)
  br label %82

82:                                               ; preds = %49, %81, %48
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #5
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK4Data10MemoryType13isLPDDRFamilyEv(ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #3 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.smin.i64(i64, i64) #4

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 240}
!10 = !{!"_ZTSN4Data13MemTimingSpecE", !11, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !6, i64 120, !6, i64 128, !6, i64 136, !6, i64 144, !6, i64 152, !6, i64 160, !6, i64 168, !6, i64 176, !6, i64 184, !6, i64 192, !6, i64 200, !6, i64 208, !6, i64 216, !6, i64 224, !6, i64 232, !6, i64 240, !6, i64 248, !11, i64 256}
!11 = !{!"double", !7, i64 0}
!12 = !{!13, !6, i64 32}
!13 = !{!"_ZTSN4Data12cmdSchedulerE", !14, i64 0, !19, i64 24, !19, i64 112, !19, i64 200, !23, i64 288, !23, i64 312, !27, i64 336, !23, i64 360, !23, i64 384, !31, i64 408, !6, i64 416, !6, i64 424, !6, i64 432, !6, i64 440, !6, i64 448, !6, i64 456, !6, i64 464, !6, i64 472, !6, i64 480, !6, i64 488, !6, i64 496, !6, i64 504, !6, i64 512, !6, i64 520, !6, i64 528, !6, i64 536, !6, i64 544, !32, i64 552, !6, i64 560, !33, i64 568}
!14 = !{!"_ZTSSt6vectorIN4Data12cmdScheduler5transESaIS2_EE", !15, i64 0}
!15 = !{!"_ZTSSt12_Vector_baseIN4Data12cmdScheduler5transESaIS2_EE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIN4Data12cmdScheduler5transESaIS2_EE12_Vector_implE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIN4Data12cmdScheduler5transESaIS2_EE17_Vector_impl_dataE", !18, i64 0, !18, i64 8, !18, i64 16}
!18 = !{!"any pointer", !7, i64 0}
!19 = !{!"_ZTSN4Data12cmdScheduler11commandItemE", !6, i64 0, !6, i64 8, !6, i64 16, !20, i64 24, !22, i64 56}
!20 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !21, i64 0, !6, i64 8, !7, i64 16}
!21 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !18, i64 0}
!22 = !{!"_ZTSN4Data12cmdScheduler12physicalAddrE", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24}
!23 = !{!"_ZTSSt6vectorIN4Data12cmdScheduler11commandItemESaIS2_EE", !24, i64 0}
!24 = !{!"_ZTSSt12_Vector_baseIN4Data12cmdScheduler11commandItemESaIS2_EE", !25, i64 0}
!25 = !{!"_ZTSNSt12_Vector_baseIN4Data12cmdScheduler11commandItemESaIS2_EE12_Vector_implE", !26, i64 0}
!26 = !{!"_ZTSNSt12_Vector_baseIN4Data12cmdScheduler11commandItemESaIS2_EE17_Vector_impl_dataE", !18, i64 0, !18, i64 8, !18, i64 16}
!27 = !{!"_ZTSSt6vectorIS_IN4Data12cmdScheduler11commandItemESaIS2_EESaIS4_EE", !28, i64 0}
!28 = !{!"_ZTSSt12_Vector_baseISt6vectorIN4Data12cmdScheduler11commandItemESaIS3_EESaIS5_EE", !29, i64 0}
!29 = !{!"_ZTSNSt12_Vector_baseISt6vectorIN4Data12cmdScheduler11commandItemESaIS3_EESaIS5_EE12_Vector_implE", !30, i64 0}
!30 = !{!"_ZTSNSt12_Vector_baseISt6vectorIN4Data12cmdScheduler11commandItemESaIS3_EESaIS5_EE17_Vector_impl_dataE", !18, i64 0, !18, i64 8, !18, i64 16}
!31 = !{!"int", !7, i64 0}
!32 = !{!"bool", !7, i64 0}
!33 = !{!"_ZTSSt14basic_ofstreamIcSt11char_traitsIcEE", !34, i64 0, !35, i64 8}
!34 = !{!"_ZTSSo"}
!35 = !{!"_ZTSSt13basic_filebufIcSt11char_traitsIcEE", !36, i64 0, !7, i64 64, !38, i64 104, !39, i64 120, !40, i64 124, !40, i64 132, !40, i64 140, !18, i64 152, !6, i64 160, !32, i64 168, !32, i64 169, !32, i64 170, !7, i64 171, !18, i64 176, !18, i64 184, !32, i64 192, !18, i64 200, !18, i64 208, !6, i64 216, !18, i64 224, !18, i64 232}
!36 = !{!"_ZTSSt15basic_streambufIcSt11char_traitsIcEE", !18, i64 8, !18, i64 16, !18, i64 24, !18, i64 32, !18, i64 40, !18, i64 48, !37, i64 56}
!37 = !{!"_ZTSSt6locale", !18, i64 0}
!38 = !{!"_ZTSSt12__basic_fileIcE", !18, i64 0, !32, i64 8}
!39 = !{!"_ZTSSt13_Ios_Openmode", !7, i64 0}
!40 = !{!"_ZTS11__mbstate_t", !31, i64 0, !7, i64 4}
!41 = !{!13, !6, i64 40}
!42 = !{!10, !6, i64 120}
!43 = !{!10, !6, i64 208}
!44 = !{!10, !6, i64 216}
!45 = !{!10, !6, i64 24}
!46 = !{!13, !6, i64 560}
!47 = !{!10, !6, i64 248}
!48 = !{!13, !6, i64 456}
!49 = !{!10, !6, i64 224}
!50 = !{!10, !6, i64 232}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass