; LLVM IR from gem5/gem5 :: src/systemc/tlm_core/2/generic_payload (gp)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.tlm::tlm_generic_payload" = type <{ ptr, i64, i32, [4 x i8], ptr, i32, i32, i8, [7 x i8], ptr, i32, i32, i32, [4 x i8], %"class.tlm::tlm_array", ptr, i32, [4 x i8] }>
%"class.tlm::tlm_array" = type { %"class.std::vector", %"class.std::vector.0" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<tlm::tlm_extension_base *, std::allocator<tlm::tlm_extension_base *>>::_Vector_impl" }
%"struct.std::_Vector_base<tlm::tlm_extension_base *, std::allocator<tlm::tlm_extension_base *>>::_Vector_impl" = type { %"struct.std::_Vector_base<tlm::tlm_extension_base *, std::allocator<tlm::tlm_extension_base *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<tlm::tlm_extension_base *, std::allocator<tlm::tlm_extension_base *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<unsigned long, std::allocator<unsigned long>>::_Vector_impl" }
%"struct.std::_Vector_base<unsigned long, std::allocator<unsigned long>>::_Vector_impl" = type { %"struct.std::_Vector_base<unsigned long, std::allocator<unsigned long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<unsigned long, std::allocator<unsigned long>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIPN3tlm18tlm_extension_baseESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN3tlm18tlm_extension_baseESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN3tlm9tlm_arrayIPNS_18tlm_extension_baseEE17free_entire_cacheEv(ptr noundef nonnull align 8 dereferenceable(48)) #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN3tlm19tlm_generic_payload19free_all_extensionsEv(ptr noundef nonnull align 8 dereferenceable(132) %0) #2 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  %4 = load ptr, ptr %2, align 8
  %5 = getelementptr inbounds %"class.tlm::tlm_generic_payload", ptr %4, i32 0, i32 14
  call void @_ZN3tlm9tlm_arrayIPNS_18tlm_extension_baseEE17free_entire_cacheEv(ptr noundef nonnull align 8 dereferenceable(48) %5)
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  store i32 0, ptr %3, align 4, !tbaa !9
  br label %6

6:                                                ; preds = %34, %1
  %7 = load i32, ptr %3, align 4, !tbaa !9
  %8 = zext i32 %7 to i64
  %9 = getelementptr inbounds %"class.tlm::tlm_generic_payload", ptr %4, i32 0, i32 14
  %10 = call noundef i64 @_ZNKSt6vectorIPN3tlm18tlm_extension_baseESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %9) #3
  %11 = icmp ult i64 %8, %10
  br i1 %11, label %13, label %12

12:                                               ; preds = %6
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  br label %37

13:                                               ; preds = %6
  %14 = getelementptr inbounds %"class.tlm::tlm_generic_payload", ptr %4, i32 0, i32 14
  %15 = load i32, ptr %3, align 4, !tbaa !9
  %16 = zext i32 %15 to i64
  %17 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN3tlm18tlm_extension_baseESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %14, i64 noundef %16) #3
  %18 = load ptr, ptr %17, align 8, !tbaa !5
  %19 = icmp ne ptr %18, null
  br i1 %19, label %20, label %33

20:                                               ; preds = %13
  %21 = getelementptr inbounds %"class.tlm::tlm_generic_payload", ptr %4, i32 0, i32 14
  %22 = load i32, ptr %3, align 4, !tbaa !9
  %23 = zext i32 %22 to i64
  %24 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN3tlm18tlm_extension_baseESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %21, i64 noundef %23) #3
  %25 = load ptr, ptr %24, align 8, !tbaa !5
  %26 = load ptr, ptr %25, align 8, !tbaa !11
  %27 = getelementptr inbounds ptr, ptr %26, i64 1
  %28 = load ptr, ptr %27, align 8
  call void %28(ptr noundef nonnull align 8 dereferenceable(8) %25)
  %29 = getelementptr inbounds %"class.tlm::tlm_generic_payload", ptr %4, i32 0, i32 14
  %30 = load i32, ptr %3, align 4, !tbaa !9
  %31 = zext i32 %30 to i64
  %32 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN3tlm18tlm_extension_baseESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %29, i64 noundef %31) #3
  store ptr null, ptr %32, align 8, !tbaa !5
  br label %33

33:                                               ; preds = %20, %13
  br label %34

34:                                               ; preds = %33
  %35 = load i32, ptr %3, align 4, !tbaa !9
  %36 = add i32 %35, 1
  store i32 %36, ptr %3, align 4, !tbaa !9
  br label %6, !llvm.loop !13

37:                                               ; preds = %12
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"vtable pointer", !8, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIPN3tlm18tlm_extension_baseESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN3tlm18tlm_extension_baseESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN3tlm9tlm_arrayIPNS_18tlm_extension_baseEE17free_entire_cacheEv(ptr noundef nonnull align 8 dereferenceable(48)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN3tlm19tlm_generic_payload19free_all_extensionsEv(ptr noundef nonnull align 8 dereferenceable(132) %0) local_unnamed_addr #1 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 72
  tail call void @_ZN3tlm9tlm_arrayIPNS_18tlm_extension_baseEE17free_entire_cacheEv(ptr noundef nonnull align 8 dereferenceable(48) %2)
  %3 = tail call noundef i64 @_ZNKSt6vectorIPN3tlm18tlm_extension_baseESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2) #2
  %.not7 = icmp eq i64 %3, 0
  br i1 %.not7, label %._crit_edge, label %.lr.ph

._crit_edge:                                      ; preds = %14, %1
  ret void

.lr.ph:                                           ; preds = %1, %14
  %4 = phi i64 [ %16, %14 ], [ 0, %1 ]
  %.06 = phi i32 [ %15, %14 ], [ 0, %1 ]
  %5 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN3tlm18tlm_extension_baseESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %4) #2
  %6 = load ptr, ptr %5, align 8, !tbaa !5
  %.not = icmp eq ptr %6, null
  br i1 %.not, label %14, label %7

7:                                                ; preds = %.lr.ph
  %8 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN3tlm18tlm_extension_baseESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %4) #2
  %9 = load ptr, ptr %8, align 8, !tbaa !5
  %10 = load ptr, ptr %9, align 8, !tbaa !9
  %11 = getelementptr inbounds i8, ptr %10, i64 8
  %12 = load ptr, ptr %11, align 8
  tail call void %12(ptr noundef nonnull align 8 dereferenceable(8) %9)
  %13 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN3tlm18tlm_extension_baseESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %4) #2
  store ptr null, ptr %13, align 8, !tbaa !5
  br label %14

14:                                               ; preds = %.lr.ph, %7
  %15 = add i32 %.06, 1
  %16 = zext i32 %15 to i64
  %17 = tail call noundef i64 @_ZNKSt6vectorIPN3tlm18tlm_extension_baseESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2) #2
  %18 = icmp ugt i64 %17, %16
  br i1 %18, label %.lr.ph, label %._crit_edge, !llvm.loop !11
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"vtable pointer", !8, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass