; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/NetworkPkg/Ip6Dxe (Ip6CreateRouteCacheEntry)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.IP6_ROUTE_CACHE_ENTRY = type { %struct._LIST_ENTRY, i64, i64, %struct.EFI_IPv6_ADDRESS, %struct.EFI_IPv6_ADDRESS, %struct.EFI_IPv6_ADDRESS }
%struct._LIST_ENTRY = type { ptr, ptr }
%struct.EFI_IPv6_ADDRESS = type { [16 x i8] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare ptr @CopyMem(ptr noundef, ptr noundef, i64 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local ptr @Ip6CreateRouteCacheEntry(ptr noundef %0, ptr noundef %1, ptr noundef %2, i64 noundef %3) #2 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i64, align 8
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store ptr %2, ptr %8, align 8, !tbaa !5
  store i64 %3, ptr %9, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  %12 = call ptr @AllocatePool(i64 noundef 80)
  store ptr %12, ptr %10, align 8, !tbaa !5
  %13 = load ptr, ptr %10, align 8, !tbaa !5
  %14 = icmp eq ptr %13, null
  br i1 %14, label %15, label %16

15:                                               ; preds = %4
  store ptr null, ptr %5, align 8
  store i32 1, ptr %11, align 4
  br label %35

16:                                               ; preds = %4
  %17 = load ptr, ptr %10, align 8, !tbaa !5
  %18 = getelementptr inbounds %struct.IP6_ROUTE_CACHE_ENTRY, ptr %17, i32 0, i32 1
  store i64 1, ptr %18, align 8, !tbaa !11
  %19 = load i64, ptr %9, align 8, !tbaa !9
  %20 = load ptr, ptr %10, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.IP6_ROUTE_CACHE_ENTRY, ptr %20, i32 0, i32 2
  store i64 %19, ptr %21, align 8, !tbaa !15
  %22 = load ptr, ptr %10, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.IP6_ROUTE_CACHE_ENTRY, ptr %22, i32 0, i32 3
  %24 = load ptr, ptr %6, align 8, !tbaa !5
  %25 = call ptr @CopyMem(ptr noundef %23, ptr noundef %24, i64 noundef 16)
  %26 = load ptr, ptr %10, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.IP6_ROUTE_CACHE_ENTRY, ptr %26, i32 0, i32 4
  %28 = load ptr, ptr %7, align 8, !tbaa !5
  %29 = call ptr @CopyMem(ptr noundef %27, ptr noundef %28, i64 noundef 16)
  %30 = load ptr, ptr %10, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.IP6_ROUTE_CACHE_ENTRY, ptr %30, i32 0, i32 5
  %32 = load ptr, ptr %8, align 8, !tbaa !5
  %33 = call ptr @CopyMem(ptr noundef %31, ptr noundef %32, i64 noundef 16)
  %34 = load ptr, ptr %10, align 8, !tbaa !5
  store ptr %34, ptr %5, align 8
  store i32 1, ptr %11, align 4
  br label %35

35:                                               ; preds = %16, %15
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  %36 = load ptr, ptr %5, align 8
  ret ptr %36
}

declare ptr @AllocatePool(i64 noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = !{!12, !10, i64 16}
!12 = !{!"", !13, i64 0, !10, i64 16, !10, i64 24, !14, i64 32, !14, i64 48, !14, i64 64}
!13 = !{!"_LIST_ENTRY", !6, i64 0, !6, i64 8}
!14 = !{!"", !7, i64 0}
!15 = !{!12, !10, i64 24}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare ptr @CopyMem(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local ptr @Ip6CreateRouteCacheEntry(ptr noundef %0, ptr noundef %1, ptr noundef %2, i64 noundef %3) local_unnamed_addr #1 {
  %5 = tail call ptr @AllocatePool(i64 noundef 80) #2
  %6 = icmp eq ptr %5, null
  br i1 %6, label %16, label %7

7:                                                ; preds = %4
  %8 = getelementptr inbounds i8, ptr %5, i64 16
  store i64 1, ptr %8, align 8, !tbaa !5
  %9 = getelementptr inbounds i8, ptr %5, i64 24
  store i64 %3, ptr %9, align 8, !tbaa !13
  %10 = getelementptr inbounds i8, ptr %5, i64 32
  %11 = tail call ptr @CopyMem(ptr noundef nonnull %10, ptr noundef %0, i64 noundef 16) #2
  %12 = getelementptr inbounds i8, ptr %5, i64 48
  %13 = tail call ptr @CopyMem(ptr noundef nonnull %12, ptr noundef %1, i64 noundef 16) #2
  %14 = getelementptr inbounds i8, ptr %5, i64 64
  %15 = tail call ptr @CopyMem(ptr noundef nonnull %14, ptr noundef %2, i64 noundef 16) #2
  br label %16

16:                                               ; preds = %4, %7
  ret ptr %5
}

declare ptr @AllocatePool(i64 noundef) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 16}
!6 = !{!"", !7, i64 0, !11, i64 16, !11, i64 24, !12, i64 32, !12, i64 48, !12, i64 64}
!7 = !{!"_LIST_ENTRY", !8, i64 0, !8, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long long", !9, i64 0}
!12 = !{!"", !9, i64 0}
!13 = !{!6, !11, i64 24}


; Effective O3 passes: CorrelatedValuePropagationPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass