; LLVM IR from gem5/gem5 :: ext/mcpat/cacti/basic_circuit.ll (Z7tr_R_ondiibbb)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.TechnologyParameter = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, i64, %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::ScalingFactor", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType" }
%"class.TechnologyParameter::DeviceType" = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::InterconnectType" = type { double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::ScalingFactor" = type { double, double, double }
%"class.TechnologyParameter::MemoryType" = type { double, double, double, double, double, double }

@g_tp = external global %class.TechnologyParameter, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef double @_Z7tr_R_ondiibbb(double noundef %0, i32 noundef %1, i32 noundef %2, i1 noundef zeroext %3, i1 noundef zeroext %4, i1 noundef zeroext %5) #1 {
  %7 = alloca double, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i8, align 1
  %11 = alloca i8, align 1
  %12 = alloca i8, align 1
  %13 = alloca ptr, align 8
  %14 = alloca double, align 8
  store double %0, ptr %7, align 8, !tbaa !5
  store i32 %1, ptr %8, align 4, !tbaa !9
  store i32 %2, ptr %9, align 4, !tbaa !9
  %15 = zext i1 %3 to i8
  store i8 %15, ptr %10, align 1, !tbaa !11
  %16 = zext i1 %4 to i8
  store i8 %16, ptr %11, align 1, !tbaa !11
  %17 = zext i1 %5 to i8
  store i8 %17, ptr %12, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #2
  %18 = load i8, ptr %10, align 1, !tbaa !11, !range !13, !noundef !14
  %19 = trunc i8 %18 to i1
  br i1 %19, label %20, label %24

20:                                               ; preds = %6
  %21 = load i8, ptr %11, align 1, !tbaa !11, !range !13, !noundef !14
  %22 = trunc i8 %21 to i1
  br i1 %22, label %23, label %24

23:                                               ; preds = %20
  store ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 46), ptr %13, align 8, !tbaa !15
  br label %41

24:                                               ; preds = %20, %6
  %25 = load i8, ptr %10, align 1, !tbaa !11, !range !13, !noundef !14
  %26 = trunc i8 %25 to i1
  br i1 %26, label %27, label %31

27:                                               ; preds = %24
  %28 = load i8, ptr %12, align 1, !tbaa !11, !range !13, !noundef !14
  %29 = trunc i8 %28 to i1
  br i1 %29, label %30, label %31

30:                                               ; preds = %27
  store ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 47), ptr %13, align 8, !tbaa !15
  br label %40

31:                                               ; preds = %27, %24
  %32 = load i8, ptr %10, align 1, !tbaa !11, !range !13, !noundef !14
  %33 = trunc i8 %32 to i1
  br i1 %33, label %38, label %34

34:                                               ; preds = %31
  %35 = load i8, ptr %11, align 1, !tbaa !11, !range !13, !noundef !14
  %36 = trunc i8 %35 to i1
  br i1 %36, label %37, label %38

37:                                               ; preds = %34
  store ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 45), ptr %13, align 8, !tbaa !15
  br label %39

38:                                               ; preds = %34, %31
  store ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 48), ptr %13, align 8, !tbaa !15
  br label %39

39:                                               ; preds = %38, %37
  br label %40

40:                                               ; preds = %39, %30
  br label %41

41:                                               ; preds = %40, %23
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #2
  %42 = load i32, ptr %8, align 4, !tbaa !9
  %43 = icmp ne i32 %42, 0
  br i1 %43, label %44, label %48

44:                                               ; preds = %41
  %45 = load ptr, ptr %13, align 8, !tbaa !15
  %46 = getelementptr inbounds %"class.TechnologyParameter::DeviceType", ptr %45, i32 0, i32 7
  %47 = load double, ptr %46, align 8, !tbaa !17
  br label %52

48:                                               ; preds = %41
  %49 = load ptr, ptr %13, align 8, !tbaa !15
  %50 = getelementptr inbounds %"class.TechnologyParameter::DeviceType", ptr %49, i32 0, i32 8
  %51 = load double, ptr %50, align 8, !tbaa !19
  br label %52

52:                                               ; preds = %48, %44
  %53 = phi double [ %47, %44 ], [ %51, %48 ]
  store double %53, ptr %14, align 8, !tbaa !5
  %54 = load i32, ptr %9, align 4, !tbaa !9
  %55 = sitofp i32 %54 to double
  %56 = load double, ptr %14, align 8, !tbaa !5
  %57 = fmul double %55, %56
  %58 = load double, ptr %7, align 8, !tbaa !5
  %59 = fdiv double %57, %58
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #2
  ret double %59
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{i8 0, i8 2}
!14 = !{}
!15 = !{!16, !16, i64 0}
!16 = !{!"any pointer", !7, i64 0}
!17 = !{!18, !6, i64 56}
!18 = !{!"_ZTSN19TechnologyParameter10DeviceTypeE", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !6, i64 120, !6, i64 128, !6, i64 136, !6, i64 144, !6, i64 152, !6, i64 160}
!19 = !{!18, !6, i64 64}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.TechnologyParameter = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, i64, %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::ScalingFactor", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType" }
%"class.TechnologyParameter::DeviceType" = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::InterconnectType" = type { double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::ScalingFactor" = type { double, double, double }
%"class.TechnologyParameter::MemoryType" = type { double, double, double, double, double, double }

@g_tp = external local_unnamed_addr global %class.TechnologyParameter, align 8

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable
define dso_local noundef double @_Z7tr_R_ondiibbb(double noundef %0, i32 noundef %1, i32 noundef %2, i1 noundef zeroext %3, i1 noundef zeroext %4, i1 noundef zeroext %5) local_unnamed_addr #0 {
  %.not12 = xor i1 %4, true
  %brmerge.not = and i1 %3, %4
  br i1 %brmerge.not, label %9, label %7

7:                                                ; preds = %6
  %brmerge15.not = and i1 %3, %5
  br i1 %brmerge15.not, label %9, label %8

8:                                                ; preds = %7
  %brmerge17 = or i1 %.not12, %3
  %spec.select = select i1 %brmerge17, ptr getelementptr inbounds (i8, ptr @g_tp, i64 864), ptr getelementptr inbounds (i8, ptr @g_tp, i64 360)
  br label %9

9:                                                ; preds = %8, %7, %6
  %.0 = phi ptr [ getelementptr inbounds (i8, ptr @g_tp, i64 528), %6 ], [ getelementptr inbounds (i8, ptr @g_tp, i64 696), %7 ], [ %spec.select, %8 ]
  %.not = icmp eq i32 %1, 0
  %.in.v = select i1 %.not, i64 64, i64 56
  %.in = getelementptr inbounds i8, ptr %.0, i64 %.in.v
  %10 = load double, ptr %.in, align 8, !tbaa !5
  %11 = sitofp i32 %2 to double
  %12 = fmul double %10, %11
  %13 = fdiv double %12, %0
  ret double %13
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass