; LLVM IR from gem5/gem5 :: ext/softfloat (ui32_to_f16)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.float16_t = type { i16 }
%union.ui16_f16 = type { i16 }

; Function Attrs: nounwind uwtable
define dso_local i16 @ui32_to_f16(i32 noundef %0) #0 {
  %2 = alloca %struct.float16_t, align 2
  %3 = alloca i32, align 4
  %4 = alloca i8, align 1
  %5 = alloca %union.ui16_f16, align 2
  %6 = alloca i64, align 8
  %7 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %4) #5
  call void @llvm.lifetime.start.p0(i64 2, ptr %5) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #5
  %8 = load i32, ptr %3, align 4, !tbaa !5
  %9 = call zeroext i8 @softfloat_countLeadingZeros32(i32 noundef %8)
  %10 = zext i8 %9 to i32
  %11 = sub nsw i32 %10, 21
  %12 = trunc i32 %11 to i8
  store i8 %12, ptr %4, align 1, !tbaa !9
  %13 = load i8, ptr %4, align 1, !tbaa !9
  %14 = sext i8 %13 to i32
  %15 = icmp sle i32 0, %14
  br i1 %15, label %16, label %39

16:                                               ; preds = %1
  %17 = load i32, ptr %3, align 4, !tbaa !5
  %18 = icmp ne i32 %17, 0
  br i1 %18, label %19, label %35

19:                                               ; preds = %16
  %20 = load i8, ptr %4, align 1, !tbaa !9
  %21 = sext i8 %20 to i32
  %22 = sub nsw i32 24, %21
  %23 = trunc i32 %22 to i16
  %24 = zext i16 %23 to i32
  %25 = shl i32 %24, 10
  %26 = add nsw i32 0, %25
  %27 = sext i32 %26 to i64
  %28 = load i32, ptr %3, align 4, !tbaa !5
  %29 = zext i32 %28 to i64
  %30 = load i8, ptr %4, align 1, !tbaa !9
  %31 = sext i8 %30 to i32
  %32 = zext i32 %31 to i64
  %33 = shl i64 %29, %32
  %34 = add i64 %27, %33
  br label %36

35:                                               ; preds = %16
  br label %36

36:                                               ; preds = %35, %19
  %37 = phi i64 [ %34, %19 ], [ 0, %35 ]
  %38 = trunc i64 %37 to i16
  store i16 %38, ptr %5, align 2, !tbaa !9
  call void @llvm.memcpy.p0.p0.i64(ptr align 2 %2, ptr align 2 %5, i64 2, i1 false), !tbaa.struct !10
  store i32 1, ptr %7, align 4
  br label %78

39:                                               ; preds = %1
  %40 = load i8, ptr %4, align 1, !tbaa !9
  %41 = sext i8 %40 to i32
  %42 = add nsw i32 %41, 4
  %43 = trunc i32 %42 to i8
  store i8 %43, ptr %4, align 1, !tbaa !9
  %44 = load i8, ptr %4, align 1, !tbaa !9
  %45 = sext i8 %44 to i32
  %46 = icmp slt i32 %45, 0
  br i1 %46, label %47, label %62

47:                                               ; preds = %39
  %48 = load i32, ptr %3, align 4, !tbaa !5
  %49 = load i8, ptr %4, align 1, !tbaa !9
  %50 = sext i8 %49 to i32
  %51 = sub nsw i32 0, %50
  %52 = lshr i32 %48, %51
  %53 = load i32, ptr %3, align 4, !tbaa !5
  %54 = load i8, ptr %4, align 1, !tbaa !9
  %55 = sext i8 %54 to i32
  %56 = and i32 %55, 31
  %57 = shl i32 %53, %56
  %58 = icmp ne i32 %57, 0
  %59 = zext i1 %58 to i32
  %60 = or i32 %52, %59
  %61 = zext i32 %60 to i64
  br label %69

62:                                               ; preds = %39
  %63 = load i32, ptr %3, align 4, !tbaa !5
  %64 = zext i32 %63 to i64
  %65 = load i8, ptr %4, align 1, !tbaa !9
  %66 = sext i8 %65 to i32
  %67 = zext i32 %66 to i64
  %68 = shl i64 %64, %67
  br label %69

69:                                               ; preds = %62, %47
  %70 = phi i64 [ %61, %47 ], [ %68, %62 ]
  store i64 %70, ptr %6, align 8, !tbaa !13
  %71 = load i8, ptr %4, align 1, !tbaa !9
  %72 = sext i8 %71 to i32
  %73 = sub nsw i32 28, %72
  %74 = sext i32 %73 to i64
  %75 = load i64, ptr %6, align 8, !tbaa !13
  %76 = call i16 @softfloat_roundPackToF16(i1 noundef zeroext false, i64 noundef %74, i64 noundef %75)
  %77 = getelementptr inbounds %struct.float16_t, ptr %2, i32 0, i32 0
  store i16 %76, ptr %77, align 2
  store i32 1, ptr %7, align 4
  br label %78

78:                                               ; preds = %69, %36
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 2, ptr %5) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr %4) #5
  %79 = getelementptr inbounds %struct.float16_t, ptr %2, i32 0, i32 0
  %80 = load i16, ptr %79, align 2
  ret i16 %80
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i8 @softfloat_countLeadingZeros32(i32 noundef) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

declare i16 @softfloat_roundPackToF16(i1 noundef zeroext, i64 noundef, i64 noundef) #4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{i64 0, i64 2, !11}
!11 = !{!12, !12, i64 0}
!12 = !{!"short", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i16 @ui32_to_f16(i32 noundef %0) local_unnamed_addr #0 {
  %2 = tail call zeroext i8 @softfloat_countLeadingZeros32(i32 noundef %0)
  %3 = add i8 %2, -21
  %4 = icmp sgt i8 %3, -1
  br i1 %4, label %5, label %13

5:                                                ; preds = %1
  %.not = icmp eq i32 %0, 0
  br i1 %.not, label %35, label %6

6:                                                ; preds = %5
  %7 = zext nneg i8 %3 to i64
  %8 = shl nuw nsw i64 %7, 10
  %9 = zext i32 %0 to i64
  %10 = shl i64 %9, %7
  %reass.sub = sub i64 %10, %8
  %11 = trunc i64 %reass.sub to i16
  %12 = add i16 %11, 24576
  br label %35

13:                                               ; preds = %1
  %14 = add nsw i8 %2, -17
  %15 = sext i8 %14 to i32
  %16 = icmp slt i8 %2, 17
  br i1 %16, label %17, label %26

17:                                               ; preds = %13
  %18 = sub nsw i32 0, %15
  %19 = lshr i32 %0, %18
  %20 = and i32 %15, 31
  %21 = shl i32 %0, %20
  %22 = icmp ne i32 %21, 0
  %23 = zext i1 %22 to i32
  %24 = or i32 %19, %23
  %25 = zext nneg i32 %24 to i64
  br label %30

26:                                               ; preds = %13
  %27 = zext i32 %0 to i64
  %28 = zext nneg i32 %15 to i64
  %29 = shl nuw nsw i64 %27, %28
  br label %30

30:                                               ; preds = %26, %17
  %31 = phi i64 [ %25, %17 ], [ %29, %26 ]
  %32 = sub nsw i32 28, %15
  %33 = zext nneg i32 %32 to i64
  %34 = tail call i16 @softfloat_roundPackToF16(i1 noundef zeroext false, i64 noundef %33, i64 noundef %31) #3
  br label %35

35:                                               ; preds = %6, %5, %30
  %.sroa.016.0 = phi i16 [ %34, %30 ], [ %12, %6 ], [ 0, %5 ]
  ret i16 %.sroa.016.0
}

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i8 @softfloat_countLeadingZeros32(i32 noundef) local_unnamed_addr #1

declare i16 @softfloat_roundPackToF16(i1 noundef zeroext, i64 noundef, i64 noundef) local_unnamed_addr #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass