; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/datatypes/int (sc_signed)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::sc_logic" = type { i32 }
%"class.sc_dt::sc_signed" = type { %"class.sc_dt::sc_value_base", i32, i32, i32, ptr }
%"class.sc_dt::sc_value_base" = type { ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @__gxx_personality_v0(...)

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dt8safe_setEibPj(i32 noundef, i1 noundef zeroext, ptr noundef) #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt9sc_signed16convert_2C_to_SMEv(ptr noundef nonnull align 8 dereferenceable(32)) #3 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt9sc_signedaSERKNS_10sc_lv_baseE(ptr noundef nonnull align 8 dereferenceable(32) %0, ptr noundef nonnull align 8 dereferenceable(32) %1) #3 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca %"class.sc_dt::sc_logic", align 4
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %11 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #5
  %12 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %11, i32 0, i32 2
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #5
  %13 = load ptr, ptr %4, align 8, !tbaa !5
  %14 = call noundef i32 @_ZNK5sc_dt10sc_lv_base6lengthEv(ptr noundef nonnull align 8 dereferenceable(32) %13)
  store i32 %14, ptr %6, align 4, !tbaa !9
  %15 = call noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %12, ptr noundef nonnull align 4 dereferenceable(4) %6)
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #5
  store i32 %15, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  store i32 0, ptr %7, align 4, !tbaa !9
  br label %16

16:                                               ; preds = %30, %2
  %17 = load i32, ptr %7, align 4, !tbaa !9
  %18 = load i32, ptr %5, align 4, !tbaa !9
  %19 = icmp slt i32 %17, %18
  br i1 %19, label %20, label %37

20:                                               ; preds = %16
  %21 = load i32, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #5
  %22 = load ptr, ptr %4, align 8, !tbaa !5
  %23 = load i32, ptr %7, align 4, !tbaa !9
  %24 = call noundef i32 @_ZNK5sc_dt10sc_lv_base7get_bitEi(ptr noundef nonnull align 8 dereferenceable(32) %22, i32 noundef %23)
  call void @_ZN5sc_dt8sc_logicC2ENS_16sc_logic_value_tE(ptr noundef nonnull align 4 dereferenceable(4) %8, i32 noundef %24)
  %25 = invoke noundef zeroext i1 @_ZNK5sc_dt8sc_logic7to_boolEv(ptr noundef nonnull align 4 dereferenceable(4) %8)
          to label %26 unwind label %33

26:                                               ; preds = %20
  %27 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %11, i32 0, i32 4
  %28 = load ptr, ptr %27, align 8, !tbaa !11
  invoke void @_ZN5sc_dt8safe_setEibPj(i32 noundef %21, i1 noundef zeroext %25, ptr noundef %28)
          to label %29 unwind label %33

29:                                               ; preds = %26
  call void @_ZN5sc_dt8sc_logicD2Ev(ptr noundef nonnull align 4 dereferenceable(4) %8) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #5
  br label %30

30:                                               ; preds = %29
  %31 = load i32, ptr %7, align 4, !tbaa !9
  %32 = add nsw i32 %31, 1
  store i32 %32, ptr %7, align 4, !tbaa !9
  br label %16, !llvm.loop !14

33:                                               ; preds = %26, %20
  %34 = landingpad { ptr, i32 }
          cleanup
  %35 = extractvalue { ptr, i32 } %34, 0
  store ptr %35, ptr %9, align 8
  %36 = extractvalue { ptr, i32 } %34, 1
  store i32 %36, ptr %10, align 4
  call void @_ZN5sc_dt8sc_logicD2Ev(ptr noundef nonnull align 4 dereferenceable(4) %8) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #5
  br label %51

37:                                               ; preds = %16
  br label %38

38:                                               ; preds = %47, %37
  %39 = load i32, ptr %7, align 4, !tbaa !9
  %40 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %11, i32 0, i32 2
  %41 = load i32, ptr %40, align 4, !tbaa !16
  %42 = icmp slt i32 %39, %41
  br i1 %42, label %43, label %50

43:                                               ; preds = %38
  %44 = load i32, ptr %7, align 4, !tbaa !9
  %45 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %11, i32 0, i32 4
  %46 = load ptr, ptr %45, align 8, !tbaa !11
  call void @_ZN5sc_dt8safe_setEibPj(i32 noundef %44, i1 noundef zeroext false, ptr noundef %46)
  br label %47

47:                                               ; preds = %43
  %48 = load i32, ptr %7, align 4, !tbaa !9
  %49 = add nsw i32 %48, 1
  store i32 %49, ptr %7, align 4, !tbaa !9
  br label %38, !llvm.loop !17

50:                                               ; preds = %38
  call void @_ZN5sc_dt9sc_signed16convert_2C_to_SMEv(ptr noundef nonnull align 8 dereferenceable(32) %11)
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #5
  ret ptr %11

51:                                               ; preds = %33
  %52 = load ptr, ptr %9, align 8
  %53 = load i32, ptr %10, align 4
  %54 = insertvalue { ptr, i32 } poison, ptr %52, 0
  %55 = insertvalue { ptr, i32 } %54, i32 %53, 1
  resume { ptr, i32 } %55
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt10sc_lv_base6lengthEv(ptr noundef nonnull align 8 dereferenceable(32)) #4 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt10sc_lv_base7get_bitEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt8sc_logicC2ENS_16sc_logic_value_tE(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef) unnamed_addr #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK5sc_dt8sc_logic7to_boolEv(ptr noundef nonnull align 4 dereferenceable(4)) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt8sc_logicD2Ev(ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #4 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 24}
!12 = !{!"_ZTSN5sc_dt9sc_signedE", !13, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !6, i64 24}
!13 = !{!"_ZTSN5sc_dt13sc_value_baseE"}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = !{!12, !10, i64 12}
!17 = distinct !{!17, !15}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::sc_logic" = type { i32 }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @__gxx_personality_v0(...)

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dt8safe_setEibPj(i32 noundef, i1 noundef zeroext, ptr noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt9sc_signed16convert_2C_to_SMEv(ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt9sc_signedaSERKNS_10sc_lv_baseE(ptr noundef nonnull returned align 8 dereferenceable(32) %0, ptr noundef nonnull align 8 dereferenceable(32) %1) local_unnamed_addr #3 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca i32, align 4
  %4 = alloca %"class.sc_dt::sc_logic", align 4
  %5 = getelementptr inbounds i8, ptr %0, i64 12
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #5
  %6 = tail call noundef i32 @_ZNK5sc_dt10sc_lv_base6lengthEv(ptr noundef nonnull align 8 dereferenceable(32) %1)
  store i32 %6, ptr %3, align 4, !tbaa !5
  %7 = call noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %5, ptr noundef nonnull align 4 dereferenceable(4) %3)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #5
  %8 = icmp sgt i32 %7, 0
  br i1 %8, label %.lr.ph, label %.preheader

.lr.ph:                                           ; preds = %2
  %9 = getelementptr inbounds i8, ptr %0, i64 24
  br label %13

.preheader:                                       ; preds = %18, %2
  %.0.lcssa = phi i32 [ 0, %2 ], [ %7, %18 ]
  %10 = load i32, ptr %5, align 4, !tbaa !9
  %11 = icmp slt i32 %.0.lcssa, %10
  br i1 %11, label %.lr.ph15, label %._crit_edge

.lr.ph15:                                         ; preds = %.preheader
  %12 = getelementptr inbounds i8, ptr %0, i64 24
  br label %22

13:                                               ; preds = %.lr.ph, %18
  %.013 = phi i32 [ 0, %.lr.ph ], [ %19, %18 ]
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #5
  %14 = call noundef i32 @_ZNK5sc_dt10sc_lv_base7get_bitEi(ptr noundef nonnull align 8 dereferenceable(32) %1, i32 noundef %.013)
  call void @_ZN5sc_dt8sc_logicC2ENS_16sc_logic_value_tE(ptr noundef nonnull align 4 dereferenceable(4) %4, i32 noundef %14)
  %15 = invoke noundef zeroext i1 @_ZNK5sc_dt8sc_logic7to_boolEv(ptr noundef nonnull align 4 dereferenceable(4) %4)
          to label %16 unwind label %20

16:                                               ; preds = %13
  %17 = load ptr, ptr %9, align 8, !tbaa !13
  invoke void @_ZN5sc_dt8safe_setEibPj(i32 noundef %.013, i1 noundef zeroext %15, ptr noundef %17)
          to label %18 unwind label %20

18:                                               ; preds = %16
  call void @_ZN5sc_dt8sc_logicD2Ev(ptr noundef nonnull align 4 dereferenceable(4) %4) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #5
  %19 = add nuw nsw i32 %.013, 1
  %exitcond.not = icmp eq i32 %19, %7
  br i1 %exitcond.not, label %.preheader, label %13, !llvm.loop !14

20:                                               ; preds = %16, %13
  %21 = landingpad { ptr, i32 }
          cleanup
  call void @_ZN5sc_dt8sc_logicD2Ev(ptr noundef nonnull align 4 dereferenceable(4) %4) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #5
  resume { ptr, i32 } %21

22:                                               ; preds = %.lr.ph15, %22
  %.114 = phi i32 [ %.0.lcssa, %.lr.ph15 ], [ %24, %22 ]
  %23 = load ptr, ptr %12, align 8, !tbaa !13
  call void @_ZN5sc_dt8safe_setEibPj(i32 noundef %.114, i1 noundef zeroext false, ptr noundef %23)
  %24 = add nuw nsw i32 %.114, 1
  %25 = load i32, ptr %5, align 4, !tbaa !9
  %26 = icmp slt i32 %24, %25
  br i1 %26, label %22, label %._crit_edge, !llvm.loop !16

._crit_edge:                                      ; preds = %22, %.preheader
  call void @_ZN5sc_dt9sc_signed16convert_2C_to_SMEv(ptr noundef nonnull align 8 dereferenceable(32) %0)
  ret ptr %0
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt10sc_lv_base6lengthEv(ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #4 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt10sc_lv_base7get_bitEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt8sc_logicC2ENS_16sc_logic_value_tE(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef) unnamed_addr #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK5sc_dt8sc_logic7to_boolEv(ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt8sc_logicD2Ev(ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #4 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 12}
!10 = !{!"_ZTSN5sc_dt9sc_signedE", !11, i64 0, !6, i64 8, !6, i64 12, !6, i64 16, !12, i64 24}
!11 = !{!"_ZTSN5sc_dt13sc_value_baseE"}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!10, !12, i64 24}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass