; LLVM IR from gem5/gem5 :: ext/libfdt (fdt_sw)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.fdt_header = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.fdt_reserve_entry = type { i64, i64 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @fdt_set_off_dt_struct(ptr noundef, i32 noundef) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @fdt32_to_cpu(i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @fdt_add_reservemap_entry(ptr noundef %0, i64 noundef %1, i64 noundef %2) #2 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i64 %1, ptr %6, align 8, !tbaa !9
  store i64 %2, ptr %7, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  %12 = load ptr, ptr %5, align 8, !tbaa !5
  %13 = call i32 @_fdt_sw_check_header(ptr noundef %12)
  store i32 %13, ptr %10, align 4, !tbaa !11
  %14 = icmp ne i32 %13, 0
  br i1 %14, label %15, label %17

15:                                               ; preds = %3
  %16 = load i32, ptr %10, align 4, !tbaa !11
  store i32 %16, ptr %4, align 4
  store i32 1, ptr %11, align 4
  br label %18

17:                                               ; preds = %3
  store i32 0, ptr %11, align 4
  br label %18

18:                                               ; preds = %17, %15
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  %19 = load i32, ptr %11, align 4
  switch i32 %19, label %60 [
    i32 0, label %20
  ]

20:                                               ; preds = %18
  %21 = load ptr, ptr %5, align 8, !tbaa !5
  %22 = getelementptr inbounds %struct.fdt_header, ptr %21, i32 0, i32 9
  %23 = load i32, ptr %22, align 4, !tbaa !13
  %24 = call i32 @fdt32_to_cpu(i32 noundef %23)
  %25 = icmp ne i32 %24, 0
  br i1 %25, label %26, label %27

26:                                               ; preds = %20
  store i32 -7, ptr %4, align 4
  store i32 1, ptr %11, align 4
  br label %60

27:                                               ; preds = %20
  %28 = load ptr, ptr %5, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.fdt_header, ptr %28, i32 0, i32 2
  %30 = load i32, ptr %29, align 4, !tbaa !15
  %31 = call i32 @fdt32_to_cpu(i32 noundef %30)
  store i32 %31, ptr %9, align 4, !tbaa !11
  %32 = load i32, ptr %9, align 4, !tbaa !11
  %33 = sext i32 %32 to i64
  %34 = add i64 %33, 16
  %35 = load ptr, ptr %5, align 8, !tbaa !5
  %36 = getelementptr inbounds %struct.fdt_header, ptr %35, i32 0, i32 1
  %37 = load i32, ptr %36, align 4, !tbaa !16
  %38 = call i32 @fdt32_to_cpu(i32 noundef %37)
  %39 = zext i32 %38 to i64
  %40 = icmp ugt i64 %34, %39
  br i1 %40, label %41, label %42

41:                                               ; preds = %27
  store i32 -3, ptr %4, align 4
  store i32 1, ptr %11, align 4
  br label %60

42:                                               ; preds = %27
  %43 = load ptr, ptr %5, align 8, !tbaa !5
  %44 = load i32, ptr %9, align 4, !tbaa !11
  %45 = sext i32 %44 to i64
  %46 = getelementptr inbounds i8, ptr %43, i64 %45
  store ptr %46, ptr %8, align 8, !tbaa !5
  %47 = load i64, ptr %6, align 8, !tbaa !9
  %48 = call i64 @cpu_to_fdt64(i64 noundef %47)
  %49 = load ptr, ptr %8, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.fdt_reserve_entry, ptr %49, i32 0, i32 0
  store i64 %48, ptr %50, align 8, !tbaa !17
  %51 = load i64, ptr %7, align 8, !tbaa !9
  %52 = call i64 @cpu_to_fdt64(i64 noundef %51)
  %53 = load ptr, ptr %8, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.fdt_reserve_entry, ptr %53, i32 0, i32 1
  store i64 %52, ptr %54, align 8, !tbaa !19
  %55 = load ptr, ptr %5, align 8, !tbaa !5
  %56 = load i32, ptr %9, align 4, !tbaa !11
  %57 = sext i32 %56 to i64
  %58 = add i64 %57, 16
  %59 = trunc i64 %58 to i32
  call void @fdt_set_off_dt_struct(ptr noundef %55, i32 noundef %59)
  store i32 0, ptr %4, align 4
  store i32 1, ptr %11, align 4
  br label %60

60:                                               ; preds = %42, %41, %26, %18
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  %61 = load i32, ptr %4, align 4
  ret i32 %61
}

; Function Attrs: nounwind uwtable
declare hidden i32 @_fdt_sw_check_header(ptr noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden i64 @cpu_to_fdt64(i64 noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !12, i64 36}
!14 = !{!"fdt_header", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36}
!15 = !{!14, !12, i64 8}
!16 = !{!14, !12, i64 4}
!17 = !{!18, !10, i64 0}
!18 = !{!"fdt_reserve_entry", !10, i64 0, !10, i64 8}
!19 = !{!18, !10, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @fdt_set_off_dt_struct(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @fdt32_to_cpu(i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local i32 @fdt_add_reservemap_entry(ptr noundef %0, i64 noundef %1, i64 noundef %2) local_unnamed_addr #1 {
  %4 = tail call i32 @_fdt_sw_check_header(ptr noundef %0)
  %.not = icmp eq i32 %4, 0
  br i1 %.not, label %5, label %26

5:                                                ; preds = %3
  %6 = getelementptr inbounds i8, ptr %0, i64 36
  %7 = load i32, ptr %6, align 4, !tbaa !5
  %8 = tail call i32 @fdt32_to_cpu(i32 noundef %7)
  %.not17 = icmp eq i32 %8, 0
  br i1 %.not17, label %9, label %26

9:                                                ; preds = %5
  %10 = getelementptr inbounds i8, ptr %0, i64 8
  %11 = load i32, ptr %10, align 4, !tbaa !10
  %12 = tail call i32 @fdt32_to_cpu(i32 noundef %11)
  %13 = sext i32 %12 to i64
  %14 = add nsw i64 %13, 16
  %15 = getelementptr inbounds i8, ptr %0, i64 4
  %16 = load i32, ptr %15, align 4, !tbaa !11
  %17 = tail call i32 @fdt32_to_cpu(i32 noundef %16)
  %18 = zext i32 %17 to i64
  %19 = icmp ugt i64 %14, %18
  br i1 %19, label %26, label %20

20:                                               ; preds = %9
  %21 = getelementptr inbounds i8, ptr %0, i64 %13
  %22 = tail call i64 @cpu_to_fdt64(i64 noundef %1)
  store i64 %22, ptr %21, align 8, !tbaa !12
  %23 = tail call i64 @cpu_to_fdt64(i64 noundef %2)
  %24 = getelementptr inbounds i8, ptr %21, i64 8
  store i64 %23, ptr %24, align 8, !tbaa !15
  %25 = trunc nuw i64 %14 to i32
  tail call void @fdt_set_off_dt_struct(ptr noundef nonnull %0, i32 noundef %25)
  br label %26

26:                                               ; preds = %9, %5, %3, %20
  %.1 = phi i32 [ 0, %20 ], [ %4, %3 ], [ -7, %5 ], [ -3, %9 ]
  ret i32 %.1
}

; Function Attrs: nounwind uwtable
declare hidden i32 @_fdt_sw_check_header(ptr noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i64 @cpu_to_fdt64(i64 noundef) local_unnamed_addr #0

attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 36}
!6 = !{!"fdt_header", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 8}
!11 = !{!6, !7, i64 4}
!12 = !{!13, !14, i64 0}
!13 = !{!"fdt_reserve_entry", !14, i64 0, !14, i64 8}
!14 = !{!"long", !8, i64 0}
!15 = !{!13, !14, i64 8}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass