; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/MdePkg/Library (InternalSavePciWriteValueToBootScript)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [140 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [12 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local void @InternalSavePciWriteValueToBootScript(i32 noundef %0, i64 noundef %1, ptr noundef %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca i64, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i64, align 8
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !9
  store ptr %2, ptr %6, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  %8 = load i32, ptr %4, align 4, !tbaa !5
  %9 = load i64, ptr %5, align 8, !tbaa !9
  %10 = lshr i64 %9, 20
  %11 = and i64 %10, 255
  %12 = shl i64 %11, 24
  %13 = load i64, ptr %5, align 8, !tbaa !9
  %14 = lshr i64 %13, 15
  %15 = and i64 %14, 31
  %16 = shl i64 %15, 16
  %17 = add i64 %12, %16
  %18 = load i64, ptr %5, align 8, !tbaa !9
  %19 = lshr i64 %18, 12
  %20 = and i64 %19, 7
  %21 = shl i64 %20, 8
  %22 = add i64 %17, %21
  %23 = load i64, ptr %5, align 8, !tbaa !9
  %24 = and i64 %23, 4095
  %25 = add i64 %22, %24
  %26 = load ptr, ptr %6, align 8, !tbaa !11
  %27 = call i64 @S3BootScriptSavePciCfgWrite(i32 noundef %8, i64 noundef %25, i64 noundef 1, ptr noundef %26)
  store i64 %27, ptr %7, align 8, !tbaa !9
  br label %28

28:                                               ; preds = %3
  %29 = call zeroext i8 @DebugAssertEnabled()
  %30 = icmp ne i8 %29, 0
  br i1 %30, label %31, label %36

31:                                               ; preds = %28
  %32 = load i64, ptr %7, align 8, !tbaa !9
  %33 = icmp eq i64 %32, 0
  br i1 %33, label %35, label %34

34:                                               ; preds = %31
  call void @DebugAssert(ptr noundef @.str, i64 noundef 59, ptr noundef @.str.1)
  br label %35

35:                                               ; preds = %34, %31
  br label %36

36:                                               ; preds = %35, %28
  br label %37

37:                                               ; preds = %36
  br label %38

38:                                               ; preds = %37
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i64 @S3BootScriptSavePciCfgWrite(i32 noundef, i64 noundef, i64 noundef, ptr noundef) #2

declare zeroext i8 @DebugAssertEnabled() #2

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [140 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [12 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local void @InternalSavePciWriteValueToBootScript(i32 noundef %0, i64 noundef %1, ptr noundef %2) local_unnamed_addr #0 {
  %4 = shl i64 %1, 4
  %5 = and i64 %4, 4278190080
  %6 = shl i64 %1, 1
  %7 = and i64 %6, 2031616
  %8 = or disjoint i64 %5, %7
  %9 = lshr i64 %1, 4
  %10 = and i64 %9, 1792
  %11 = and i64 %1, 4095
  %12 = add nuw nsw i64 %10, %11
  %13 = or disjoint i64 %12, %8
  %14 = tail call i64 @S3BootScriptSavePciCfgWrite(i32 noundef %0, i64 noundef %13, i64 noundef 1, ptr noundef %2) #2
  %15 = tail call zeroext i8 @DebugAssertEnabled() #2
  %16 = icmp eq i8 %15, 0
  %17 = icmp eq i64 %14, 0
  %or.cond = select i1 %16, i1 true, i1 %17
  br i1 %or.cond, label %19, label %18

18:                                               ; preds = %3
  tail call void @DebugAssert(ptr noundef nonnull @.str, i64 noundef 59, ptr noundef nonnull @.str.1) #2
  br label %19

19:                                               ; preds = %18, %3
  ret void
}

declare i64 @S3BootScriptSavePciCfgWrite(i32 noundef, i64 noundef, i64 noundef, ptr noundef) local_unnamed_addr #1

declare zeroext i8 @DebugAssertEnabled() local_unnamed_addr #1

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass