; LLVM IR from wesley-a-leung/Resources :: Tests/C++/geometry/2d/ConvexPolygonFuzzTest.ll (Z11isInPolygonRKSt6vectorI2ptSaIS0_EES0_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.pt = type { x86_fp80, x86_fp80 }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z2ltee(x86_fp80 noundef, x86_fp80 noundef) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z3ccw2ptS_S_(ptr noundef byval(%struct.pt) align 16, ptr noundef byval(%struct.pt) align 16, ptr noundef byval(%struct.pt) align 16) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #3

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z5onSeg2ptS_S_(ptr noundef byval(%struct.pt) align 16, ptr noundef byval(%struct.pt) align 16, ptr noundef byval(%struct.pt) align 16) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI2ptSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z3modii(i32 noundef, i32 noundef) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 16 dereferenceable(32) ptr @_ZNKSt6vectorI2ptSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z11isInPolygonRKSt6vectorI2ptSaIS0_EES0_(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef byval(%struct.pt) align 16 %1) #2 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca %struct.pt, align 16
  %10 = alloca %struct.pt, align 16
  %11 = alloca %struct.pt, align 16
  %12 = alloca %struct.pt, align 16
  %13 = alloca %struct.pt, align 16
  %14 = alloca %struct.pt, align 16
  %15 = alloca %struct.pt, align 16
  %16 = alloca %struct.pt, align 16
  store ptr %0, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #5
  %17 = load ptr, ptr %4, align 8, !tbaa !5
  %18 = call noundef i64 @_ZNKSt6vectorI2ptSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %17) #5
  %19 = trunc i64 %18 to i32
  store i32 %19, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #5
  store i32 0, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  store i32 0, ptr %7, align 4, !tbaa !9
  br label %20

20:                                               ; preds = %69, %2
  %21 = load i32, ptr %7, align 4, !tbaa !9
  %22 = load i32, ptr %5, align 4, !tbaa !9
  %23 = icmp slt i32 %21, %22
  br i1 %23, label %25, label %24

24:                                               ; preds = %20
  store i32 2, ptr %8, align 4
  br label %72

25:                                               ; preds = %20
  call void @llvm.lifetime.start.p0(i64 32, ptr %9) #5
  %26 = load ptr, ptr %4, align 8, !tbaa !5
  %27 = load i32, ptr %7, align 4, !tbaa !9
  %28 = sext i32 %27 to i64
  %29 = call noundef nonnull align 16 dereferenceable(32) ptr @_ZNKSt6vectorI2ptSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %26, i64 noundef %28) #5
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %9, ptr align 16 %29, i64 32, i1 false), !tbaa.struct !11
  call void @llvm.lifetime.start.p0(i64 32, ptr %10) #5
  %30 = load ptr, ptr %4, align 8, !tbaa !5
  %31 = load i32, ptr %7, align 4, !tbaa !9
  %32 = add nsw i32 %31, 1
  %33 = load i32, ptr %5, align 4, !tbaa !9
  %34 = call noundef i32 @_Z3modii(i32 noundef %32, i32 noundef %33)
  %35 = sext i32 %34 to i64
  %36 = call noundef nonnull align 16 dereferenceable(32) ptr @_ZNKSt6vectorI2ptSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %30, i64 noundef %35) #5
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %10, ptr align 16 %36, i64 32, i1 false), !tbaa.struct !11
  %37 = getelementptr inbounds %struct.pt, ptr %10, i32 0, i32 1
  %38 = load x86_fp80, ptr %37, align 16, !tbaa !14
  %39 = getelementptr inbounds %struct.pt, ptr %9, i32 0, i32 1
  %40 = load x86_fp80, ptr %39, align 16, !tbaa !14
  %41 = call noundef zeroext i1 @_Z2ltee(x86_fp80 noundef %38, x86_fp80 noundef %40)
  br i1 %41, label %42, label %43

42:                                               ; preds = %25
  call void @_ZSt4swapI2ptENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS4_ESt18is_move_assignableIS4_EEE5valueEvE4typeERS4_SD_(ptr noundef nonnull align 16 dereferenceable(32) %9, ptr noundef nonnull align 16 dereferenceable(32) %10) #5
  br label %43

43:                                               ; preds = %42, %25
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %11, ptr align 16 %1, i64 32, i1 false), !tbaa.struct !11
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %12, ptr align 16 %9, i64 32, i1 false), !tbaa.struct !11
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %13, ptr align 16 %10, i64 32, i1 false), !tbaa.struct !11
  %44 = call noundef zeroext i1 @_Z5onSeg2ptS_S_(ptr noundef byval(%struct.pt) align 16 %11, ptr noundef byval(%struct.pt) align 16 %12, ptr noundef byval(%struct.pt) align 16 %13)
  br i1 %44, label %45, label %46

45:                                               ; preds = %43
  store i32 0, ptr %3, align 4
  store i32 1, ptr %8, align 4
  br label %66

46:                                               ; preds = %43
  %47 = getelementptr inbounds %struct.pt, ptr %1, i32 0, i32 1
  %48 = load x86_fp80, ptr %47, align 16, !tbaa !14
  %49 = getelementptr inbounds %struct.pt, ptr %9, i32 0, i32 1
  %50 = load x86_fp80, ptr %49, align 16, !tbaa !14
  %51 = call noundef zeroext i1 @_Z2ltee(x86_fp80 noundef %48, x86_fp80 noundef %50)
  br i1 %51, label %61, label %52

52:                                               ; preds = %46
  %53 = getelementptr inbounds %struct.pt, ptr %1, i32 0, i32 1
  %54 = load x86_fp80, ptr %53, align 16, !tbaa !14
  %55 = getelementptr inbounds %struct.pt, ptr %10, i32 0, i32 1
  %56 = load x86_fp80, ptr %55, align 16, !tbaa !14
  %57 = call noundef zeroext i1 @_Z2ltee(x86_fp80 noundef %54, x86_fp80 noundef %56)
  br i1 %57, label %58, label %61

58:                                               ; preds = %52
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %14, ptr align 16 %1, i64 32, i1 false), !tbaa.struct !11
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %15, ptr align 16 %9, i64 32, i1 false), !tbaa.struct !11
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %16, ptr align 16 %10, i64 32, i1 false), !tbaa.struct !11
  %59 = call noundef i32 @_Z3ccw2ptS_S_(ptr noundef byval(%struct.pt) align 16 %14, ptr noundef byval(%struct.pt) align 16 %15, ptr noundef byval(%struct.pt) align 16 %16)
  %60 = icmp sgt i32 %59, 0
  br label %61

61:                                               ; preds = %58, %52, %46
  %62 = phi i1 [ false, %52 ], [ false, %46 ], [ %60, %58 ]
  %63 = zext i1 %62 to i32
  %64 = load i32, ptr %6, align 4, !tbaa !9
  %65 = xor i32 %64, %63
  store i32 %65, ptr %6, align 4, !tbaa !9
  store i32 0, ptr %8, align 4
  br label %66

66:                                               ; preds = %61, %45
  call void @llvm.lifetime.end.p0(i64 32, ptr %10) #5
  call void @llvm.lifetime.end.p0(i64 32, ptr %9) #5
  %67 = load i32, ptr %8, align 4
  switch i32 %67, label %72 [
    i32 0, label %68
  ]

68:                                               ; preds = %66
  br label %69

69:                                               ; preds = %68
  %70 = load i32, ptr %7, align 4, !tbaa !9
  %71 = add nsw i32 %70, 1
  store i32 %71, ptr %7, align 4, !tbaa !9
  br label %20, !llvm.loop !16

72:                                               ; preds = %66, %24
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  %73 = load i32, ptr %8, align 4
  switch i32 %73, label %79 [
    i32 2, label %74
  ]

74:                                               ; preds = %72
  %75 = load i32, ptr %6, align 4, !tbaa !9
  %76 = icmp eq i32 %75, 0
  %77 = zext i1 %76 to i64
  %78 = select i1 %76, i32 -1, i32 1
  store i32 %78, ptr %3, align 4
  store i32 1, ptr %8, align 4
  br label %79

79:                                               ; preds = %74, %72
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #5
  %80 = load i32, ptr %3, align 4
  ret i32 %80
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapI2ptENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS4_ESt18is_move_assignableIS4_EEE5valueEvE4typeERS4_SD_(ptr noundef nonnull align 16 dereferenceable(32), ptr noundef nonnull align 16 dereferenceable(32)) #4

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{i64 0, i64 16, !12, i64 16, i64 16, !12}
!12 = !{!13, !13, i64 0}
!13 = !{!"long double", !7, i64 0}
!14 = !{!15, !13, i64 16}
!15 = !{!"_ZTS2pt", !13, i64 0, !13, i64 16}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.pt = type { x86_fp80, x86_fp80 }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z2ltee(x86_fp80 noundef, x86_fp80 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z3ccw2ptS_S_(ptr noundef byval(%struct.pt) align 16, ptr noundef byval(%struct.pt) align 16, ptr noundef byval(%struct.pt) align 16) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #3

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #3

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z5onSeg2ptS_S_(ptr noundef byval(%struct.pt) align 16, ptr noundef byval(%struct.pt) align 16, ptr noundef byval(%struct.pt) align 16) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI2ptSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z3modii(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 16 dereferenceable(32) ptr @_ZNKSt6vectorI2ptSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z11isInPolygonRKSt6vectorI2ptSaIS0_EES0_(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr nocapture noundef readonly byval(%struct.pt) align 16 %1) local_unnamed_addr #2 {
  %3 = alloca %struct.pt, align 16
  %4 = alloca %struct.pt, align 16
  %5 = tail call noundef i64 @_ZNKSt6vectorI2ptSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #5
  %6 = trunc i64 %5 to i32
  %.not26 = icmp sgt i32 %6, 0
  br i1 %.not26, label %.lr.ph, label %.thread39

.lr.ph:                                           ; preds = %2
  %7 = getelementptr inbounds i8, ptr %4, i64 16
  %8 = getelementptr inbounds i8, ptr %3, i64 16
  %9 = getelementptr inbounds i8, ptr %1, i64 16
  %10 = load x86_fp80, ptr %9, align 16
  %11 = and i64 %5, 2147483647
  %wide.trip.count = and i64 %5, 2147483647
  br label %12

12:                                               ; preds = %.lr.ph, %33
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %33 ]
  %.not29 = phi i1 [ true, %.lr.ph ], [ %.not, %33 ]
  %.01527 = phi i32 [ 0, %.lr.ph ], [ %36, %33 ]
  call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %3) #5
  %13 = call noundef nonnull align 16 dereferenceable(32) ptr @_ZNKSt6vectorI2ptSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #5
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(32) %3, ptr noundef nonnull align 16 dereferenceable(32) %13, i64 32, i1 false), !tbaa.struct !5
  call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %4) #5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %14 = trunc nuw nsw i64 %indvars.iv.next to i32
  %15 = call noundef i32 @_Z3modii(i32 noundef %14, i32 noundef %6)
  %16 = sext i32 %15 to i64
  %17 = call noundef nonnull align 16 dereferenceable(32) ptr @_ZNKSt6vectorI2ptSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %16) #5
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(32) %4, ptr noundef nonnull align 16 dereferenceable(32) %17, i64 32, i1 false), !tbaa.struct !5
  %18 = load x86_fp80, ptr %7, align 16, !tbaa !10
  %19 = load x86_fp80, ptr %8, align 16, !tbaa !10
  %20 = call noundef zeroext i1 @_Z2ltee(x86_fp80 noundef %18, x86_fp80 noundef %19)
  br i1 %20, label %21, label %22

21:                                               ; preds = %12
  call void @_ZSt4swapI2ptENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS4_ESt18is_move_assignableIS4_EEE5valueEvE4typeERS4_SD_(ptr noundef nonnull align 16 dereferenceable(32) %3, ptr noundef nonnull align 16 dereferenceable(32) %4) #5
  br label %22

22:                                               ; preds = %21, %12
  %23 = call noundef zeroext i1 @_Z5onSeg2ptS_S_(ptr noundef nonnull byval(%struct.pt) align 16 %1, ptr noundef nonnull byval(%struct.pt) align 16 %3, ptr noundef nonnull byval(%struct.pt) align 16 %4)
  br i1 %23, label %.thread, label %24

.thread:                                          ; preds = %22
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %4) #5
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %3) #5
  br label %.loopexit

24:                                               ; preds = %22
  %25 = load x86_fp80, ptr %8, align 16, !tbaa !10
  %26 = call noundef zeroext i1 @_Z2ltee(x86_fp80 noundef %10, x86_fp80 noundef %25)
  br i1 %26, label %33, label %27

27:                                               ; preds = %24
  %28 = load x86_fp80, ptr %7, align 16, !tbaa !10
  %29 = call noundef zeroext i1 @_Z2ltee(x86_fp80 noundef %10, x86_fp80 noundef %28)
  br i1 %29, label %30, label %33

30:                                               ; preds = %27
  %31 = call noundef i32 @_Z3ccw2ptS_S_(ptr noundef nonnull byval(%struct.pt) align 16 %1, ptr noundef nonnull byval(%struct.pt) align 16 %3, ptr noundef nonnull byval(%struct.pt) align 16 %4)
  %32 = icmp sgt i32 %31, 0
  br label %33

33:                                               ; preds = %24, %27, %30
  %34 = phi i1 [ false, %27 ], [ false, %24 ], [ %32, %30 ]
  %35 = zext i1 %34 to i32
  %36 = xor i32 %.01527, %35
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %4) #5
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %3) #5
  %.not = icmp ult i64 %indvars.iv.next, %11
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %.loopexit, label %12

.loopexit:                                        ; preds = %33, %.thread
  %.01525 = phi i32 [ %.01527, %.thread ], [ %36, %33 ]
  %.not23 = phi i1 [ %.not29, %.thread ], [ %.not, %33 ]
  %.01525.fr = freeze i32 %.01525
  %37 = icmp eq i32 %.01525.fr, 0
  %cond.fr3842 = freeze i1 %.not23
  %. = select i1 %37, i32 -1, i32 1
  %spec.select = select i1 %cond.fr3842, i32 0, i32 %.
  br label %.thread39

.thread39:                                        ; preds = %.loopexit, %2
  %38 = phi i32 [ -1, %2 ], [ %spec.select, %.loopexit ]
  ret i32 %38
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapI2ptENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS4_ESt18is_move_assignableIS4_EEE5valueEvE4typeERS4_SD_(ptr noundef nonnull align 16 dereferenceable(32), ptr noundef nonnull align 16 dereferenceable(32)) local_unnamed_addr #4

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{i64 0, i64 16, !6, i64 16, i64 16, !6}
!6 = !{!7, !7, i64 0}
!7 = !{!"long double", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!11, !7, i64 16}
!11 = !{!"_ZTS2pt", !7, i64 0, !7, i64 16}


; Effective O3 passes: CorrelatedValuePropagationPass,DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,MemCpyOptPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass