; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/communication/sc_port.ll (ZN7sc_core12sc_bind_infoD2Ev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.sc_core::sc_bind_info" = type { i32, i32, %"class.std::vector", i8, i32, i8, i8, %"class.std::vector.0", %"class.std::vector.0" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<sc_core::sc_bind_elem *, std::allocator<sc_core::sc_bind_elem *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_bind_elem *, std::allocator<sc_core::sc_bind_elem *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_bind_elem *, std::allocator<sc_core::sc_bind_elem *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_bind_elem *, std::allocator<sc_core::sc_bind_elem *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<sc_core::sc_bind_ef *, std::allocator<sc_core::sc_bind_ef *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_bind_ef *, std::allocator<sc_core::sc_bind_ef *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_bind_ef *, std::allocator<sc_core::sc_bind_ef *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_bind_ef *, std::allocator<sc_core::sc_bind_ef *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN7sc_core12sc_bind_infoD2Ev(ptr noundef nonnull align 8 dereferenceable(96) %0) unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  %4 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  %5 = invoke noundef i32 @_ZNK7sc_core12sc_bind_info4sizeEv(ptr noundef nonnull align 8 dereferenceable(96) %4)
          to label %6 unwind label %28

6:                                                ; preds = %1
  %7 = sub nsw i32 %5, 1
  store i32 %7, ptr %3, align 4, !tbaa !9
  br label %8

8:                                                ; preds = %21, %6
  %9 = load i32, ptr %3, align 4, !tbaa !9
  %10 = icmp sge i32 %9, 0
  br i1 %10, label %12, label %11

11:                                               ; preds = %8
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  br label %24

12:                                               ; preds = %8
  %13 = getelementptr inbounds %"struct.sc_core::sc_bind_info", ptr %4, i32 0, i32 2
  %14 = load i32, ptr %3, align 4, !tbaa !9
  %15 = sext i32 %14 to i64
  %16 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %13, i64 noundef %15) #4
  %17 = load ptr, ptr %16, align 8, !tbaa !5
  %18 = icmp eq ptr %17, null
  br i1 %18, label %20, label %19

19:                                               ; preds = %12
  call void @_ZdlPvm(ptr noundef %17, i64 noundef 16) #5
  br label %20

20:                                               ; preds = %19, %12
  br label %21

21:                                               ; preds = %20
  %22 = load i32, ptr %3, align 4, !tbaa !9
  %23 = add nsw i32 %22, -1
  store i32 %23, ptr %3, align 4, !tbaa !9
  br label %8, !llvm.loop !11

24:                                               ; preds = %11
  %25 = getelementptr inbounds %"struct.sc_core::sc_bind_info", ptr %4, i32 0, i32 8
  call void @_ZNSt6vectorIPN7sc_core10sc_bind_efESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %25) #4
  %26 = getelementptr inbounds %"struct.sc_core::sc_bind_info", ptr %4, i32 0, i32 7
  call void @_ZNSt6vectorIPN7sc_core10sc_bind_efESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %26) #4
  %27 = getelementptr inbounds %"struct.sc_core::sc_bind_info", ptr %4, i32 0, i32 2
  call void @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %27) #4
  ret void

28:                                               ; preds = %1
  %29 = landingpad { ptr, i32 }
          catch ptr null
  %30 = extractvalue { ptr, i32 } %29, 0
  call void @__clang_call_terminate(ptr %30) #6
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK7sc_core12sc_bind_info4sizeEv(ptr noundef nonnull align 8 dereferenceable(96)) #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: noinline noreturn nounwind uwtable
declare hidden void @__clang_call_terminate(ptr noundef) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIPN7sc_core10sc_bind_efESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { noinline noreturn nounwind uwtable "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { builtin nounwind }
attributes #6 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN7sc_core12sc_bind_infoD2Ev(ptr noundef nonnull align 8 dereferenceable(96) %0) unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  %2 = tail call noundef i32 @_ZNK7sc_core12sc_bind_info4sizeEv(ptr noundef nonnull align 8 dereferenceable(96) %0)
  %3 = icmp sgt i32 %2, 0
  br i1 %3, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %1
  %4 = getelementptr inbounds i8, ptr %0, i64 8
  %5 = zext nneg i32 %2 to i64
  br label %9

._crit_edge:                                      ; preds = %14, %1
  %6 = getelementptr inbounds i8, ptr %0, i64 72
  tail call void @_ZNSt6vectorIPN7sc_core10sc_bind_efESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %6) #2
  %7 = getelementptr inbounds i8, ptr %0, i64 48
  tail call void @_ZNSt6vectorIPN7sc_core10sc_bind_efESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %7) #2
  %8 = getelementptr inbounds i8, ptr %0, i64 8
  tail call void @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %8) #2
  ret void

9:                                                ; preds = %.lr.ph, %14
  %indvars.iv = phi i64 [ %5, %.lr.ph ], [ %indvars.iv.next, %14 ]
  %indvars.iv.next = add nsw i64 %indvars.iv, -1
  %10 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %indvars.iv.next) #2
  %11 = load ptr, ptr %10, align 8, !tbaa !5
  %12 = icmp eq ptr %11, null
  br i1 %12, label %14, label %13

13:                                               ; preds = %9
  tail call void @_ZdlPvm(ptr noundef nonnull %11, i64 noundef 16) #3
  br label %14

14:                                               ; preds = %9, %13
  %15 = icmp ugt i64 %indvars.iv, 1
  br i1 %15, label %9, label %._crit_edge, !llvm.loop !9
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK7sc_core12sc_bind_info4sizeEv(ptr noundef nonnull align 8 dereferenceable(96)) local_unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIPN7sc_core10sc_bind_efESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
attributes #3 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass