; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/kernel (sc_thread_process)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_process_b" = type <{ %"class.sc_core::sc_object", ptr, i32, i32, i32, i32, i8, i8, [6 x i8], ptr, i32, [4 x i8], ptr, ptr, i8, i8, i8, i8, [4 x i8], ptr, ptr, i32, i32, %"class.std::vector.8", ptr, ptr, ptr, ptr, { i64, i64 }, i32, [4 x i8], %"class.std::vector.13", i8, [7 x i8], ptr, ptr, i32, i8, [3 x i8], ptr, i32, i8, [3 x i8] }>
%"class.sc_core::sc_object" = type { ptr, ptr, %"class.std::vector", %"class.std::vector.0", %"class.std::__cxx11::basic_string", ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<sc_core::sc_reset *, std::allocator<sc_core::sc_reset *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_reset *, std::allocator<sc_core::sc_reset *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_reset *, std::allocator<sc_core::sc_reset *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_reset *, std::allocator<sc_core::sc_reset *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.13" = type { %"struct.std::_Vector_base.14" }
%"struct.std::_Vector_base.14" = type { %"struct.std::_Vector_base<const sc_core::sc_event *, std::allocator<const sc_core::sc_event *>>::_Vector_impl" }
%"struct.std::_Vector_base<const sc_core::sc_event *, std::allocator<const sc_core::sc_event *>>::_Vector_impl" = type { %"struct.std::_Vector_base<const sc_core::sc_event *, std::allocator<const sc_core::sc_event *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<const sc_core::sc_event *, std::allocator<const sc_core::sc_event *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_thread_process" = type <{ %"class.sc_core::sc_process_b.base", [3 x i8], ptr, %"class.std::vector.18", i64, i32, [4 x i8] }>
%"class.sc_core::sc_process_b.base" = type <{ %"class.sc_core::sc_object", ptr, i32, i32, i32, i32, i8, i8, [6 x i8], ptr, i32, [4 x i8], ptr, ptr, i8, i8, i8, i8, [4 x i8], ptr, ptr, i32, i32, %"class.std::vector.8", ptr, ptr, ptr, ptr, { i64, i64 }, i32, [4 x i8], %"class.std::vector.13", i8, [7 x i8], ptr, ptr, i32, i8, [3 x i8], ptr, i32, i8 }>
%"class.std::vector.18" = type { %"struct.std::_Vector_base.19" }
%"struct.std::_Vector_base.19" = type { %"struct.std::_Vector_base<sc_core::sc_process_monitor *, std::allocator<sc_core::sc_process_monitor *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_process_monitor *, std::allocator<sc_core::sc_process_monitor *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_process_monitor *, std::allocator<sc_core::sc_process_monitor *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_process_monitor *, std::allocator<sc_core::sc_process_monitor *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@_ZTIN7sc_core9sc_objectE = external constant ptr
@_ZTIN7sc_core12sc_process_bE = external constant ptr
@_ZN7sc_core37SC_ID_KILL_PROCESS_WHILE_UNITIALIZED_E = external constant [0 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [1 x i8], align 1
@_ZN7sc_core32SC_ID_PROCESS_ALREADY_UNWINDING_E = external constant [0 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [93 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef ptr @_ZN7sc_core22sc_get_curr_simcontextEv() #1

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNK7sc_core9sc_object10simcontextEv(ptr noundef nonnull align 8 dereferenceable(112)) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNK7sc_core9sc_object4nameEv(ptr noundef nonnull align 8 dereferenceable(112)) #2 align 2

declare void @_ZN7sc_core12sc_process_b18disconnect_processEv(ptr noundef nonnull align 8 dereferenceable(357)) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIPN7sc_core9sc_objectESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIPN7sc_core9sc_objectESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: nounwind willreturn memory(read)
declare ptr @__dynamic_cast(ptr, ptr, ptr, i64) #4

declare void @_ZNK7sc_core12sc_process_b12report_errorEPKcS2_(ptr noundef nonnull align 8 dereferenceable(357), ptr noundef, ptr noundef) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN7sc_core13sc_is_runningEPKNS_13sc_simcontextE(ptr noundef) #5

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core17sc_thread_process12kill_processENS_28sc_descendant_inclusion_infoE(ptr noundef nonnull align 8 dereferenceable(404) %0, i32 noundef %1) unnamed_addr #6 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca %"class.std::vector.0", align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  %11 = load ptr, ptr %3, align 8
  %12 = call noundef ptr @_ZN7sc_core22sc_get_curr_simcontextEv()
  %13 = call noundef zeroext i1 @_ZN7sc_core13sc_is_runningEPKNS_13sc_simcontextE(ptr noundef %12)
  br i1 %13, label %15, label %14

14:                                               ; preds = %2
  call void @_ZNK7sc_core12sc_process_b12report_errorEPKcS2_(ptr noundef nonnull align 8 dereferenceable(357) %11, ptr noundef @_ZN7sc_core37SC_ID_KILL_PROCESS_WHILE_UNITIALIZED_E, ptr noundef @.str.2)
  br label %15

15:                                               ; preds = %14, %2
  %16 = load i32, ptr %4, align 4, !tbaa !9
  %17 = icmp eq i32 %16, 1
  br i1 %17, label %18, label %59

18:                                               ; preds = %15
  call void @llvm.lifetime.start.p0(i64 24, ptr %5) #7
  %19 = load ptr, ptr %11, align 8, !tbaa !11
  %20 = getelementptr inbounds ptr, ptr %19, i64 5
  %21 = load ptr, ptr %20, align 8
  %22 = call noundef nonnull align 8 dereferenceable(24) ptr %21(ptr noundef nonnull align 8 dereferenceable(357) %11)
  call void @_ZNSt6vectorIPN7sc_core9sc_objectESaIS2_EEC2ERKS4_(ptr noundef nonnull align 8 dereferenceable(24) %5, ptr noundef nonnull align 8 dereferenceable(24) %22)
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #7
  %23 = call noundef i64 @_ZNKSt6vectorIPN7sc_core9sc_objectESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %5) #7
  %24 = trunc i64 %23 to i32
  store i32 %24, ptr %6, align 4, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #7
  store i32 0, ptr %7, align 4, !tbaa !13
  br label %25

25:                                               ; preds = %55, %18
  %26 = load i32, ptr %7, align 4, !tbaa !13
  %27 = load i32, ptr %6, align 4, !tbaa !13
  %28 = icmp slt i32 %26, %27
  br i1 %28, label %30, label %29

29:                                               ; preds = %25
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #7
  br label %58

30:                                               ; preds = %25
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #7
  %31 = load i32, ptr %7, align 4, !tbaa !13
  %32 = sext i32 %31 to i64
  %33 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIPN7sc_core9sc_objectESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %32) #7
  %34 = load ptr, ptr %33, align 8, !tbaa !5
  %35 = icmp eq ptr %34, null
  br i1 %35, label %38, label %36

36:                                               ; preds = %30
  %37 = call ptr @__dynamic_cast(ptr %34, ptr @_ZTIN7sc_core9sc_objectE, ptr @_ZTIN7sc_core12sc_process_bE, i64 0) #7
  br label %39

38:                                               ; preds = %30
  br label %39

39:                                               ; preds = %38, %36
  %40 = phi ptr [ %37, %36 ], [ null, %38 ]
  store ptr %40, ptr %8, align 8, !tbaa !5
  %41 = load ptr, ptr %8, align 8, !tbaa !5
  %42 = icmp ne ptr %41, null
  br i1 %42, label %43, label %54

43:                                               ; preds = %39
  %44 = load ptr, ptr %8, align 8, !tbaa !5
  %45 = load i32, ptr %4, align 4, !tbaa !9
  %46 = load ptr, ptr %44, align 8, !tbaa !11
  %47 = getelementptr inbounds ptr, ptr %46, i64 18
  %48 = load ptr, ptr %47, align 8
  invoke void %48(ptr noundef nonnull align 8 dereferenceable(357) %44, i32 noundef %45)
          to label %49 unwind label %50

49:                                               ; preds = %43
  br label %54

50:                                               ; preds = %43
  %51 = landingpad { ptr, i32 }
          cleanup
  %52 = extractvalue { ptr, i32 } %51, 0
  store ptr %52, ptr %9, align 8
  %53 = extractvalue { ptr, i32 } %51, 1
  store i32 %53, ptr %10, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #7
  call void @_ZNSt6vectorIPN7sc_core9sc_objectESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %5) #7
  call void @llvm.lifetime.end.p0(i64 24, ptr %5) #7
  br label %84

54:                                               ; preds = %49, %39
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #7
  br label %55

55:                                               ; preds = %54
  %56 = load i32, ptr %7, align 4, !tbaa !13
  %57 = add nsw i32 %56, 1
  store i32 %57, ptr %7, align 4, !tbaa !13
  br label %25, !llvm.loop !15

58:                                               ; preds = %29
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #7
  call void @_ZNSt6vectorIPN7sc_core9sc_objectESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %5) #7
  call void @llvm.lifetime.end.p0(i64 24, ptr %5) #7
  br label %59

59:                                               ; preds = %58, %15
  %60 = getelementptr inbounds %"class.sc_core::sc_process_b", ptr %11, i32 0, i32 41
  %61 = load i8, ptr %60, align 4, !tbaa !17, !range !43, !noundef !44
  %62 = trunc i8 %61 to i1
  br i1 %62, label %63, label %65

63:                                               ; preds = %59
  %64 = call noundef ptr @_ZNK7sc_core9sc_object4nameEv(ptr noundef nonnull align 8 dereferenceable(112) %11)
  call void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef 1, ptr noundef @_ZN7sc_core32SC_ID_PROCESS_ALREADY_UNWINDING_E, ptr noundef %64, ptr noundef @.str.3, i32 noundef 295)
  br label %83

65:                                               ; preds = %59
  %66 = getelementptr inbounds %"class.sc_core::sc_process_b", ptr %11, i32 0, i32 29
  %67 = load i32, ptr %66, align 8, !tbaa !45
  %68 = and i32 %67, 8
  %69 = icmp ne i32 %68, 0
  br i1 %69, label %70, label %71

70:                                               ; preds = %65
  br label %83

71:                                               ; preds = %65
  %72 = call noundef ptr @_ZN7sc_core22sc_get_curr_simcontextEv()
  %73 = call noundef zeroext i1 @_ZN7sc_core13sc_is_runningEPKNS_13sc_simcontextE(ptr noundef %72)
  br i1 %73, label %74, label %82

74:                                               ; preds = %71
  %75 = getelementptr inbounds %"class.sc_core::sc_process_b", ptr %11, i32 0, i32 16
  %76 = load i8, ptr %75, align 2, !tbaa !46, !range !43, !noundef !44
  %77 = trunc i8 %76 to i1
  br i1 %77, label %78, label %82

78:                                               ; preds = %74
  %79 = getelementptr inbounds %"class.sc_core::sc_process_b", ptr %11, i32 0, i32 36
  store i32 1, ptr %79, align 8, !tbaa !47
  %80 = getelementptr inbounds %"class.sc_core::sc_thread_process", ptr %11, i32 0, i32 5
  store i32 0, ptr %80, align 8, !tbaa !48
  %81 = call noundef ptr @_ZNK7sc_core9sc_object10simcontextEv(ptr noundef nonnull align 8 dereferenceable(112) %11)
  call void @_ZN7sc_core13sc_simcontext12preempt_withEPNS_17sc_thread_processE(ptr noundef nonnull align 8 dereferenceable(344) %81, ptr noundef %11)
  br label %83

82:                                               ; preds = %74, %71
  call void @_ZN7sc_core12sc_process_b18disconnect_processEv(ptr noundef nonnull align 8 dereferenceable(357) %11)
  br label %83

83:                                               ; preds = %82, %78, %70, %63
  ret void

84:                                               ; preds = %50
  %85 = load ptr, ptr %9, align 8
  %86 = load i32, ptr %10, align 4
  %87 = insertvalue { ptr, i32 } poison, ptr %85, 0
  %88 = insertvalue { ptr, i32 } %87, i32 %86, 1
  resume { ptr, i32 } %88
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIPN7sc_core9sc_objectESaIS2_EEC2ERKS4_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #6 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIPN7sc_core9sc_objectESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

declare void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) #3

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN7sc_core13sc_simcontext12preempt_withEPNS_17sc_thread_processE(ptr noundef nonnull align 8 dereferenceable(344), ptr noundef) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind willreturn memory(read) }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_ZTSN7sc_core28sc_descendant_inclusion_infoE", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"vtable pointer", !8, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !7, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = !{!18, !31, i64 356}
!18 = !{!"_ZTSN7sc_core12sc_process_bE", !19, i64 0, !6, i64 112, !14, i64 120, !14, i64 124, !14, i64 128, !14, i64 132, !31, i64 136, !31, i64 137, !6, i64 144, !14, i64 152, !6, i64 160, !6, i64 168, !31, i64 176, !31, i64 177, !31, i64 178, !31, i64 179, !6, i64 184, !6, i64 192, !32, i64 200, !14, i64 204, !33, i64 208, !6, i64 232, !6, i64 240, !6, i64 248, !6, i64 256, !7, i64 264, !14, i64 280, !37, i64 288, !31, i64 312, !6, i64 320, !6, i64 328, !41, i64 336, !31, i64 340, !6, i64 344, !42, i64 352, !31, i64 356}
!19 = !{!"_ZTSN7sc_core9sc_objectE", !6, i64 8, !20, i64 16, !24, i64 40, !28, i64 64, !6, i64 96, !6, i64 104}
!20 = !{!"_ZTSSt6vectorIPN7sc_core8sc_eventESaIS2_EE", !21, i64 0}
!21 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE12_Vector_implE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!24 = !{!"_ZTSSt6vectorIPN7sc_core9sc_objectESaIS2_EE", !25, i64 0}
!25 = !{!"_ZTSSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE", !26, i64 0}
!26 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE12_Vector_implE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!28 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !29, i64 0, !30, i64 8, !7, i64 16}
!29 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!30 = !{!"long", !7, i64 0}
!31 = !{!"bool", !7, i64 0}
!32 = !{!"_ZTSN7sc_core17sc_curr_proc_kindE", !7, i64 0}
!33 = !{!"_ZTSSt6vectorIPN7sc_core8sc_resetESaIS2_EE", !34, i64 0}
!34 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_resetESaIS2_EE", !35, i64 0}
!35 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_resetESaIS2_EE12_Vector_implE", !36, i64 0}
!36 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_resetESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!37 = !{!"_ZTSSt6vectorIPKN7sc_core8sc_eventESaIS3_EE", !38, i64 0}
!38 = !{!"_ZTSSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE", !39, i64 0}
!39 = !{!"_ZTSNSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE12_Vector_implE", !40, i64 0}
!40 = !{!"_ZTSNSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!41 = !{!"_ZTSN7sc_core12sc_process_b18process_throw_typeE", !7, i64 0}
!42 = !{!"_ZTSN7sc_core12sc_process_b9trigger_tE", !7, i64 0}
!43 = !{i8 0, i8 2}
!44 = !{}
!45 = !{!18, !14, i64 280}
!46 = !{!18, !31, i64 178}
!47 = !{!18, !41, i64 336}
!48 = !{!49, !14, i64 400}
!49 = !{!"_ZTSN7sc_core17sc_thread_processE", !18, i64 0, !6, i64 360, !50, i64 368, !30, i64 392, !14, i64 400}
!50 = !{!"_ZTSSt6vectorIPN7sc_core18sc_process_monitorESaIS2_EE", !51, i64 0}
!51 = !{!"_ZTSSt12_Vector_baseIPN7sc_core18sc_process_monitorESaIS2_EE", !52, i64 0}
!52 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core18sc_process_monitorESaIS2_EE12_Vector_implE", !53, i64 0}
!53 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core18sc_process_monitorESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@_ZTIN7sc_core9sc_objectE = external constant ptr
@_ZTIN7sc_core12sc_process_bE = external constant ptr
@_ZN7sc_core37SC_ID_KILL_PROCESS_WHILE_UNITIALIZED_E = external constant [0 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [1 x i8], align 1
@_ZN7sc_core32SC_ID_PROCESS_ALREADY_UNWINDING_E = external constant [0 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [93 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef ptr @_ZN7sc_core22sc_get_curr_simcontextEv() local_unnamed_addr #1

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNK7sc_core9sc_object10simcontextEv(ptr noundef nonnull align 8 dereferenceable(112)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNK7sc_core9sc_object4nameEv(ptr noundef nonnull align 8 dereferenceable(112)) local_unnamed_addr #2 align 2

declare void @_ZN7sc_core12sc_process_b18disconnect_processEv(ptr noundef nonnull align 8 dereferenceable(357)) local_unnamed_addr #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIPN7sc_core9sc_objectESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIPN7sc_core9sc_objectESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nofree nounwind willreturn memory(read)
declare ptr @__dynamic_cast(ptr, ptr, ptr, i64) local_unnamed_addr #4

declare void @_ZNK7sc_core12sc_process_b12report_errorEPKcS2_(ptr noundef nonnull align 8 dereferenceable(357), ptr noundef, ptr noundef) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN7sc_core13sc_is_runningEPKNS_13sc_simcontextE(ptr noundef) local_unnamed_addr #5

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core17sc_thread_process12kill_processENS_28sc_descendant_inclusion_infoE(ptr noundef nonnull align 8 dereferenceable(404) %0, i32 noundef %1) unnamed_addr #6 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca %"class.std::vector.0", align 8
  %4 = tail call noundef ptr @_ZN7sc_core22sc_get_curr_simcontextEv()
  %5 = tail call noundef zeroext i1 @_ZN7sc_core13sc_is_runningEPKNS_13sc_simcontextE(ptr noundef %4)
  br i1 %5, label %7, label %6

6:                                                ; preds = %2
  tail call void @_ZNK7sc_core12sc_process_b12report_errorEPKcS2_(ptr noundef nonnull align 8 dereferenceable(357) %0, ptr noundef nonnull @_ZN7sc_core37SC_ID_KILL_PROCESS_WHILE_UNITIALIZED_E, ptr noundef nonnull @.str.2)
  br label %7

7:                                                ; preds = %6, %2
  %8 = icmp eq i32 %1, 1
  br i1 %8, label %9, label %28

9:                                                ; preds = %7
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %3) #7
  %10 = load ptr, ptr %0, align 8, !tbaa !5
  %11 = getelementptr inbounds i8, ptr %10, i64 40
  %12 = load ptr, ptr %11, align 8
  %13 = tail call noundef nonnull align 8 dereferenceable(24) ptr %12(ptr noundef nonnull align 8 dereferenceable(357) %0)
  call void @_ZNSt6vectorIPN7sc_core9sc_objectESaIS2_EEC2ERKS4_(ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 8 dereferenceable(24) %13)
  %14 = call noundef i64 @_ZNKSt6vectorIPN7sc_core9sc_objectESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %3) #7
  %15 = trunc i64 %14 to i32
  %16 = icmp sgt i32 %15, 0
  br i1 %16, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %9
  %wide.trip.count = and i64 %14, 2147483647
  br label %.lr.ph

._crit_edge:                                      ; preds = %.thread, %9
  call void @_ZNSt6vectorIPN7sc_core9sc_objectESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3) #7
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %3) #7
  br label %28

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.thread
  %indvars.iv = phi i64 [ 0, %.lr.ph.preheader ], [ %indvars.iv.next, %.thread ]
  %17 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIPN7sc_core9sc_objectESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv) #7
  %18 = load ptr, ptr %17, align 8, !tbaa !8
  %19 = icmp eq ptr %18, null
  br i1 %19, label %.thread, label %20

20:                                               ; preds = %.lr.ph
  %21 = call ptr @__dynamic_cast(ptr nonnull %18, ptr nonnull @_ZTIN7sc_core9sc_objectE, ptr nonnull @_ZTIN7sc_core12sc_process_bE, i64 0) #7
  %.not13 = icmp eq ptr %21, null
  br i1 %.not13, label %.thread, label %22

22:                                               ; preds = %20
  %23 = load ptr, ptr %21, align 8, !tbaa !5
  %24 = getelementptr inbounds i8, ptr %23, i64 144
  %25 = load ptr, ptr %24, align 8
  invoke void %25(ptr noundef nonnull align 8 dereferenceable(357) %21, i32 noundef 1)
          to label %.thread unwind label %26

26:                                               ; preds = %22
  %27 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt6vectorIPN7sc_core9sc_objectESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3) #7
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %3) #7
  resume { ptr, i32 } %27

.thread:                                          ; preds = %.lr.ph, %22, %20
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !11

28:                                               ; preds = %._crit_edge, %7
  %29 = getelementptr inbounds i8, ptr %0, i64 356
  %30 = load i8, ptr %29, align 4, !tbaa !13, !range !40, !noundef !41
  %31 = trunc nuw i8 %30 to i1
  br i1 %31, label %32, label %34

32:                                               ; preds = %28
  %33 = call noundef ptr @_ZNK7sc_core9sc_object4nameEv(ptr noundef nonnull align 8 dereferenceable(112) %0)
  call void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef 1, ptr noundef nonnull @_ZN7sc_core32SC_ID_PROCESS_ALREADY_UNWINDING_E, ptr noundef %33, ptr noundef nonnull @.str.3, i32 noundef 295)
  br label %50

34:                                               ; preds = %28
  %35 = getelementptr inbounds i8, ptr %0, i64 280
  %36 = load i32, ptr %35, align 8, !tbaa !42
  %37 = and i32 %36, 8
  %.not = icmp eq i32 %37, 0
  br i1 %.not, label %38, label %50

38:                                               ; preds = %34
  %39 = call noundef ptr @_ZN7sc_core22sc_get_curr_simcontextEv()
  %40 = call noundef zeroext i1 @_ZN7sc_core13sc_is_runningEPKNS_13sc_simcontextE(ptr noundef %39)
  br i1 %40, label %41, label %49

41:                                               ; preds = %38
  %42 = getelementptr inbounds i8, ptr %0, i64 178
  %43 = load i8, ptr %42, align 2, !tbaa !43, !range !40, !noundef !41
  %44 = trunc nuw i8 %43 to i1
  br i1 %44, label %45, label %49

45:                                               ; preds = %41
  %46 = getelementptr inbounds i8, ptr %0, i64 336
  store i32 1, ptr %46, align 8, !tbaa !44
  %47 = getelementptr inbounds i8, ptr %0, i64 400
  store i32 0, ptr %47, align 8, !tbaa !45
  %48 = call noundef ptr @_ZNK7sc_core9sc_object10simcontextEv(ptr noundef nonnull align 8 dereferenceable(112) %0)
  call void @_ZN7sc_core13sc_simcontext12preempt_withEPNS_17sc_thread_processE(ptr noundef nonnull align 8 dereferenceable(344) %48, ptr noundef nonnull %0)
  br label %50

49:                                               ; preds = %41, %38
  call void @_ZN7sc_core12sc_process_b18disconnect_processEv(ptr noundef nonnull align 8 dereferenceable(357) %0)
  br label %50

50:                                               ; preds = %34, %49, %45, %32
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIPN7sc_core9sc_objectESaIS2_EEC2ERKS4_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #6 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIPN7sc_core9sc_objectESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

declare void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN7sc_core13sc_simcontext12preempt_withEPNS_17sc_thread_processE(ptr noundef nonnull align 8 dereferenceable(344), ptr noundef) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nofree nounwind willreturn memory(read) }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"vtable pointer", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!14, !28, i64 356}
!14 = !{!"_ZTSN7sc_core12sc_process_bE", !15, i64 0, !9, i64 112, !27, i64 120, !27, i64 124, !27, i64 128, !27, i64 132, !28, i64 136, !28, i64 137, !9, i64 144, !27, i64 152, !9, i64 160, !9, i64 168, !28, i64 176, !28, i64 177, !28, i64 178, !28, i64 179, !9, i64 184, !9, i64 192, !29, i64 200, !27, i64 204, !30, i64 208, !9, i64 232, !9, i64 240, !9, i64 248, !9, i64 256, !10, i64 264, !27, i64 280, !34, i64 288, !28, i64 312, !9, i64 320, !9, i64 328, !38, i64 336, !28, i64 340, !9, i64 344, !39, i64 352, !28, i64 356}
!15 = !{!"_ZTSN7sc_core9sc_objectE", !9, i64 8, !16, i64 16, !20, i64 40, !24, i64 64, !9, i64 96, !9, i64 104}
!16 = !{!"_ZTSSt6vectorIPN7sc_core8sc_eventESaIS2_EE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!20 = !{!"_ZTSSt6vectorIPN7sc_core9sc_objectESaIS2_EE", !21, i64 0}
!21 = !{!"_ZTSSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE12_Vector_implE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!24 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !25, i64 0, !26, i64 8, !10, i64 16}
!25 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !9, i64 0}
!26 = !{!"long", !10, i64 0}
!27 = !{!"int", !10, i64 0}
!28 = !{!"bool", !10, i64 0}
!29 = !{!"_ZTSN7sc_core17sc_curr_proc_kindE", !10, i64 0}
!30 = !{!"_ZTSSt6vectorIPN7sc_core8sc_resetESaIS2_EE", !31, i64 0}
!31 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_resetESaIS2_EE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_resetESaIS2_EE12_Vector_implE", !33, i64 0}
!33 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_resetESaIS2_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!34 = !{!"_ZTSSt6vectorIPKN7sc_core8sc_eventESaIS3_EE", !35, i64 0}
!35 = !{!"_ZTSSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE", !36, i64 0}
!36 = !{!"_ZTSNSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE12_Vector_implE", !37, i64 0}
!37 = !{!"_ZTSNSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!38 = !{!"_ZTSN7sc_core12sc_process_b18process_throw_typeE", !10, i64 0}
!39 = !{!"_ZTSN7sc_core12sc_process_b9trigger_tE", !10, i64 0}
!40 = !{i8 0, i8 2}
!41 = !{}
!42 = !{!14, !27, i64 280}
!43 = !{!14, !28, i64 178}
!44 = !{!14, !38, i64 336}
!45 = !{!46, !27, i64 400}
!46 = !{!"_ZTSN7sc_core17sc_thread_processE", !14, i64 0, !9, i64 360, !47, i64 368, !26, i64 392, !27, i64 400}
!47 = !{!"_ZTSSt6vectorIPN7sc_core18sc_process_monitorESaIS2_EE", !48, i64 0}
!48 = !{!"_ZTSSt12_Vector_baseIPN7sc_core18sc_process_monitorESaIS2_EE", !49, i64 0}
!49 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core18sc_process_monitorESaIS2_EE12_Vector_implE", !50, i64 0}
!50 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core18sc_process_monitorESaIS2_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass