; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/utils (sc_report_handler)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.sc_core::sc_msg_def" = type { ptr, i32, [4 x i32], i32, [4 x i32], i32, i32, [4 x i32], ptr, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN7sc_core17sc_report_handler8mdlookupEPKc(ptr noundef) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef ptr @_ZN7sc_core17sc_report_handler12add_msg_typeEPKc(ptr noundef) #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN7sc_core17sc_report_handler10stop_afterEPKci(ptr noundef %0, i32 noundef %1) #2 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #3
  %7 = load ptr, ptr %3, align 8, !tbaa !5
  %8 = call noundef ptr @_ZN7sc_core17sc_report_handler8mdlookupEPKc(ptr noundef %7)
  store ptr %8, ptr %5, align 8, !tbaa !5
  %9 = load ptr, ptr %5, align 8, !tbaa !5
  %10 = icmp ne ptr %9, null
  br i1 %10, label %14, label %11

11:                                               ; preds = %2
  %12 = load ptr, ptr %3, align 8, !tbaa !5
  %13 = call noundef ptr @_ZN7sc_core17sc_report_handler12add_msg_typeEPKc(ptr noundef %12)
  store ptr %13, ptr %5, align 8, !tbaa !5
  br label %14

14:                                               ; preds = %11, %2
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  %15 = load ptr, ptr %5, align 8, !tbaa !5
  %16 = getelementptr inbounds %"struct.sc_core::sc_msg_def", ptr %15, i32 0, i32 5
  %17 = load i32, ptr %16, align 8, !tbaa !11
  %18 = and i32 %17, 1
  %19 = icmp ne i32 %18, 0
  br i1 %19, label %20, label %24

20:                                               ; preds = %14
  %21 = load ptr, ptr %5, align 8, !tbaa !5
  %22 = getelementptr inbounds %"struct.sc_core::sc_msg_def", ptr %21, i32 0, i32 3
  %23 = load i32, ptr %22, align 4, !tbaa !13
  br label %25

24:                                               ; preds = %14
  br label %25

25:                                               ; preds = %24, %20
  %26 = phi i32 [ %23, %20 ], [ -1, %24 ]
  store i32 %26, ptr %6, align 4, !tbaa !9
  %27 = load i32, ptr %4, align 4, !tbaa !9
  %28 = icmp slt i32 %27, 0
  br i1 %28, label %29, label %34

29:                                               ; preds = %25
  %30 = load ptr, ptr %5, align 8, !tbaa !5
  %31 = getelementptr inbounds %"struct.sc_core::sc_msg_def", ptr %30, i32 0, i32 5
  %32 = load i32, ptr %31, align 8, !tbaa !11
  %33 = and i32 %32, -2
  store i32 %33, ptr %31, align 8, !tbaa !11
  br label %42

34:                                               ; preds = %25
  %35 = load ptr, ptr %5, align 8, !tbaa !5
  %36 = getelementptr inbounds %"struct.sc_core::sc_msg_def", ptr %35, i32 0, i32 5
  %37 = load i32, ptr %36, align 8, !tbaa !11
  %38 = or i32 %37, 1
  store i32 %38, ptr %36, align 8, !tbaa !11
  %39 = load i32, ptr %4, align 4, !tbaa !9
  %40 = load ptr, ptr %5, align 8, !tbaa !5
  %41 = getelementptr inbounds %"struct.sc_core::sc_msg_def", ptr %40, i32 0, i32 3
  store i32 %39, ptr %41, align 4, !tbaa !13
  br label %42

42:                                               ; preds = %34, %29
  %43 = load i32, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #3
  ret i32 %43
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 48}
!12 = !{!"_ZTSN7sc_core10sc_msg_defE", !6, i64 0, !10, i64 8, !7, i64 12, !10, i64 28, !7, i64 32, !10, i64 48, !10, i64 52, !7, i64 56, !6, i64 72, !10, i64 80}
!13 = !{!12, !10, i64 28}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN7sc_core17sc_report_handler8mdlookupEPKc(ptr noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef ptr @_ZN7sc_core17sc_report_handler12add_msg_typeEPKc(ptr noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN7sc_core17sc_report_handler10stop_afterEPKci(ptr noundef %0, i32 noundef %1) local_unnamed_addr #1 align 2 {
  %3 = tail call noundef ptr @_ZN7sc_core17sc_report_handler8mdlookupEPKc(ptr noundef %0)
  %.not = icmp eq ptr %3, null
  br i1 %.not, label %4, label %6

4:                                                ; preds = %2
  %5 = tail call noundef ptr @_ZN7sc_core17sc_report_handler12add_msg_typeEPKc(ptr noundef %0)
  br label %6

6:                                                ; preds = %4, %2
  %.0 = phi ptr [ %3, %2 ], [ %5, %4 ]
  %7 = getelementptr inbounds i8, ptr %.0, i64 48
  %8 = load i32, ptr %7, align 8, !tbaa !5
  %9 = and i32 %8, 1
  %.not12 = icmp eq i32 %9, 0
  br i1 %.not12, label %13, label %10

10:                                               ; preds = %6
  %11 = getelementptr inbounds i8, ptr %.0, i64 28
  %12 = load i32, ptr %11, align 4, !tbaa !11
  br label %13

13:                                               ; preds = %6, %10
  %14 = phi i32 [ %12, %10 ], [ -1, %6 ]
  %15 = icmp slt i32 %1, 0
  br i1 %15, label %16, label %18

16:                                               ; preds = %13
  %17 = and i32 %8, -2
  br label %21

18:                                               ; preds = %13
  %19 = or i32 %8, 1
  %20 = getelementptr inbounds i8, ptr %.0, i64 28
  store i32 %1, ptr %20, align 4, !tbaa !11
  br label %21

21:                                               ; preds = %18, %16
  %.sink = phi i32 [ %17, %16 ], [ %19, %18 ]
  store i32 %.sink, ptr %7, align 8
  ret i32 %14
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 48}
!6 = !{!"_ZTSN7sc_core10sc_msg_defE", !7, i64 0, !10, i64 8, !8, i64 12, !10, i64 28, !8, i64 32, !10, i64 48, !10, i64 52, !8, i64 56, !7, i64 72, !10, i64 80}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!6, !10, i64 28}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,MergedLoadStoreMotionPass,SROAPass,SimplifyCFGPass,TailCallElimPass