; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/communication/sc_port.ll (ZN7sc_core12sc_port_base13insert_parentEi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_core::sc_port_base" = type { %"class.sc_core::sc_object", ptr }
%"class.sc_core::sc_object" = type { ptr, ptr, %"class.std::vector.5", %"class.std::vector.10", %"class.std::__cxx11::basic_string", ptr, ptr }
%"class.std::vector.5" = type { %"struct.std::_Vector_base.6" }
%"struct.std::_Vector_base.6" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.10" = type { %"struct.std::_Vector_base.11" }
%"struct.std::_Vector_base.11" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"struct.sc_core::sc_bind_info" = type { i32, i32, %"class.std::vector", i8, i32, i8, i8, %"class.std::vector.0", %"class.std::vector.0" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<sc_core::sc_bind_elem *, std::allocator<sc_core::sc_bind_elem *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_bind_elem *, std::allocator<sc_core::sc_bind_elem *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_bind_elem *, std::allocator<sc_core::sc_bind_elem *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_bind_elem *, std::allocator<sc_core::sc_bind_elem *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<sc_core::sc_bind_ef *, std::allocator<sc_core::sc_bind_ef *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_bind_ef *, std::allocator<sc_core::sc_bind_ef *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_bind_ef *, std::allocator<sc_core::sc_bind_ef *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_bind_ef *, std::allocator<sc_core::sc_bind_ef *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.sc_core::sc_bind_elem" = type { ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK7sc_core12sc_bind_info4sizeEv(ptr noundef nonnull align 8 dereferenceable(96)) #1 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EE9push_backEOS2_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(8)) #4 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core12sc_port_base13insert_parentEi(ptr noundef nonnull align 8 dereferenceable(120) %0, i32 noundef %1) #4 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  %15 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #5
  %16 = getelementptr inbounds %"class.sc_core::sc_port_base", ptr %15, i32 0, i32 1
  %17 = load ptr, ptr %16, align 8, !tbaa !11
  %18 = getelementptr inbounds %"struct.sc_core::sc_bind_info", ptr %17, i32 0, i32 2
  store ptr %18, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #5
  %19 = load ptr, ptr %5, align 8, !tbaa !5
  %20 = load i32, ptr %4, align 4, !tbaa !9
  %21 = sext i32 %20 to i64
  %22 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %19, i64 noundef %21) #5
  %23 = load ptr, ptr %22, align 8, !tbaa !5
  %24 = getelementptr inbounds %"struct.sc_core::sc_bind_elem", ptr %23, i32 0, i32 1
  %25 = load ptr, ptr %24, align 8, !tbaa !25
  store ptr %25, ptr %6, align 8, !tbaa !5
  %26 = load ptr, ptr %5, align 8, !tbaa !5
  %27 = load i32, ptr %4, align 4, !tbaa !9
  %28 = sext i32 %27 to i64
  %29 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %26, i64 noundef %28) #5
  %30 = load ptr, ptr %29, align 8, !tbaa !5
  %31 = getelementptr inbounds %"struct.sc_core::sc_bind_elem", ptr %30, i32 0, i32 1
  store ptr null, ptr %31, align 8, !tbaa !25
  %32 = load ptr, ptr %6, align 8, !tbaa !5
  %33 = getelementptr inbounds %"class.sc_core::sc_port_base", ptr %32, i32 0, i32 1
  %34 = load ptr, ptr %33, align 8, !tbaa !11
  %35 = getelementptr inbounds %"struct.sc_core::sc_bind_info", ptr %34, i32 0, i32 2
  %36 = call noundef i64 @_ZNKSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %35) #5
  %37 = icmp eq i64 %36, 0
  br i1 %37, label %38, label %39

38:                                               ; preds = %2
  store i32 1, ptr %7, align 4
  br label %164

39:                                               ; preds = %2
  %40 = load ptr, ptr %6, align 8, !tbaa !5
  %41 = getelementptr inbounds %"class.sc_core::sc_port_base", ptr %40, i32 0, i32 1
  %42 = load ptr, ptr %41, align 8, !tbaa !11
  %43 = getelementptr inbounds %"struct.sc_core::sc_bind_info", ptr %42, i32 0, i32 2
  %44 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %43, i64 noundef 0) #5
  %45 = load ptr, ptr %44, align 8, !tbaa !5
  %46 = getelementptr inbounds %"struct.sc_core::sc_bind_elem", ptr %45, i32 0, i32 0
  %47 = load ptr, ptr %46, align 8, !tbaa !27
  %48 = load ptr, ptr %5, align 8, !tbaa !5
  %49 = load i32, ptr %4, align 4, !tbaa !9
  %50 = sext i32 %49 to i64
  %51 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %48, i64 noundef %50) #5
  %52 = load ptr, ptr %51, align 8, !tbaa !5
  %53 = getelementptr inbounds %"struct.sc_core::sc_bind_elem", ptr %52, i32 0, i32 0
  store ptr %47, ptr %53, align 8, !tbaa !27
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #5
  %54 = load ptr, ptr %6, align 8, !tbaa !5
  %55 = getelementptr inbounds %"class.sc_core::sc_port_base", ptr %54, i32 0, i32 1
  %56 = load ptr, ptr %55, align 8, !tbaa !11
  %57 = call noundef i32 @_ZNK7sc_core12sc_bind_info4sizeEv(ptr noundef nonnull align 8 dereferenceable(96) %56)
  %58 = sub nsw i32 %57, 1
  store i32 %58, ptr %8, align 4, !tbaa !9
  %59 = load i32, ptr %8, align 4, !tbaa !9
  %60 = icmp sgt i32 %59, 0
  br i1 %60, label %61, label %163

61:                                               ; preds = %39
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #5
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %62

62:                                               ; preds = %71, %61
  %63 = load i32, ptr %9, align 4, !tbaa !9
  %64 = load i32, ptr %8, align 4, !tbaa !9
  %65 = icmp slt i32 %63, %64
  br i1 %65, label %67, label %66

66:                                               ; preds = %62
  store i32 2, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #5
  br label %78

67:                                               ; preds = %62
  %68 = load ptr, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #5
  %69 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 16) #6
  invoke void @_ZN7sc_core12sc_bind_elemC1Ev(ptr noundef nonnull align 8 dereferenceable(16) %69)
          to label %70 unwind label %74

70:                                               ; preds = %67
  store ptr %69, ptr %10, align 8, !tbaa !5
  call void @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EE9push_backEOS2_(ptr noundef nonnull align 8 dereferenceable(24) %68, ptr noundef nonnull align 8 dereferenceable(8) %10)
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #5
  br label %71

71:                                               ; preds = %70
  %72 = load i32, ptr %9, align 4, !tbaa !9
  %73 = add nsw i32 %72, 1
  store i32 %73, ptr %9, align 4, !tbaa !9
  br label %62, !llvm.loop !28

74:                                               ; preds = %67
  %75 = landingpad { ptr, i32 }
          cleanup
  %76 = extractvalue { ptr, i32 } %75, 0
  store ptr %76, ptr %11, align 8
  %77 = extractvalue { ptr, i32 } %75, 1
  store i32 %77, ptr %12, align 4
  call void @_ZdlPvm(ptr noundef %69, i64 noundef 16) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #5
  br label %167

78:                                               ; preds = %66
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #5
  %79 = getelementptr inbounds %"class.sc_core::sc_port_base", ptr %15, i32 0, i32 1
  %80 = load ptr, ptr %79, align 8, !tbaa !11
  %81 = call noundef i32 @_ZNK7sc_core12sc_bind_info4sizeEv(ptr noundef nonnull align 8 dereferenceable(96) %80)
  %82 = load i32, ptr %8, align 4, !tbaa !9
  %83 = sub nsw i32 %81, %82
  %84 = sub nsw i32 %83, 1
  store i32 %84, ptr %13, align 4, !tbaa !9
  br label %85

85:                                               ; preds = %121, %78
  %86 = load i32, ptr %13, align 4, !tbaa !9
  %87 = load i32, ptr %4, align 4, !tbaa !9
  %88 = icmp sgt i32 %86, %87
  br i1 %88, label %90, label %89

89:                                               ; preds = %85
  store i32 5, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #5
  br label %124

90:                                               ; preds = %85
  %91 = load ptr, ptr %5, align 8, !tbaa !5
  %92 = load i32, ptr %13, align 4, !tbaa !9
  %93 = sext i32 %92 to i64
  %94 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %91, i64 noundef %93) #5
  %95 = load ptr, ptr %94, align 8, !tbaa !5
  %96 = getelementptr inbounds %"struct.sc_core::sc_bind_elem", ptr %95, i32 0, i32 0
  %97 = load ptr, ptr %96, align 8, !tbaa !27
  %98 = load ptr, ptr %5, align 8, !tbaa !5
  %99 = load i32, ptr %13, align 4, !tbaa !9
  %100 = load i32, ptr %8, align 4, !tbaa !9
  %101 = add nsw i32 %99, %100
  %102 = sext i32 %101 to i64
  %103 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %98, i64 noundef %102) #5
  %104 = load ptr, ptr %103, align 8, !tbaa !5
  %105 = getelementptr inbounds %"struct.sc_core::sc_bind_elem", ptr %104, i32 0, i32 0
  store ptr %97, ptr %105, align 8, !tbaa !27
  %106 = load ptr, ptr %5, align 8, !tbaa !5
  %107 = load i32, ptr %13, align 4, !tbaa !9
  %108 = sext i32 %107 to i64
  %109 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %106, i64 noundef %108) #5
  %110 = load ptr, ptr %109, align 8, !tbaa !5
  %111 = getelementptr inbounds %"struct.sc_core::sc_bind_elem", ptr %110, i32 0, i32 1
  %112 = load ptr, ptr %111, align 8, !tbaa !25
  %113 = load ptr, ptr %5, align 8, !tbaa !5
  %114 = load i32, ptr %13, align 4, !tbaa !9
  %115 = load i32, ptr %8, align 4, !tbaa !9
  %116 = add nsw i32 %114, %115
  %117 = sext i32 %116 to i64
  %118 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %113, i64 noundef %117) #5
  %119 = load ptr, ptr %118, align 8, !tbaa !5
  %120 = getelementptr inbounds %"struct.sc_core::sc_bind_elem", ptr %119, i32 0, i32 1
  store ptr %112, ptr %120, align 8, !tbaa !25
  br label %121

121:                                              ; preds = %90
  %122 = load i32, ptr %13, align 4, !tbaa !9
  %123 = add nsw i32 %122, -1
  store i32 %123, ptr %13, align 4, !tbaa !9
  br label %85, !llvm.loop !30

124:                                              ; preds = %89
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #5
  %125 = load i32, ptr %4, align 4, !tbaa !9
  %126 = add nsw i32 %125, 1
  store i32 %126, ptr %14, align 4, !tbaa !9
  br label %127

127:                                              ; preds = %159, %124
  %128 = load i32, ptr %14, align 4, !tbaa !9
  %129 = load i32, ptr %4, align 4, !tbaa !9
  %130 = load i32, ptr %8, align 4, !tbaa !9
  %131 = add nsw i32 %129, %130
  %132 = icmp sle i32 %128, %131
  br i1 %132, label %134, label %133

133:                                              ; preds = %127
  store i32 8, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #5
  br label %162

134:                                              ; preds = %127
  %135 = load ptr, ptr %6, align 8, !tbaa !5
  %136 = getelementptr inbounds %"class.sc_core::sc_port_base", ptr %135, i32 0, i32 1
  %137 = load ptr, ptr %136, align 8, !tbaa !11
  %138 = getelementptr inbounds %"struct.sc_core::sc_bind_info", ptr %137, i32 0, i32 2
  %139 = load i32, ptr %14, align 4, !tbaa !9
  %140 = load i32, ptr %4, align 4, !tbaa !9
  %141 = sub nsw i32 %139, %140
  %142 = sext i32 %141 to i64
  %143 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %138, i64 noundef %142) #5
  %144 = load ptr, ptr %143, align 8, !tbaa !5
  %145 = getelementptr inbounds %"struct.sc_core::sc_bind_elem", ptr %144, i32 0, i32 0
  %146 = load ptr, ptr %145, align 8, !tbaa !27
  %147 = load ptr, ptr %5, align 8, !tbaa !5
  %148 = load i32, ptr %14, align 4, !tbaa !9
  %149 = sext i32 %148 to i64
  %150 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %147, i64 noundef %149) #5
  %151 = load ptr, ptr %150, align 8, !tbaa !5
  %152 = getelementptr inbounds %"struct.sc_core::sc_bind_elem", ptr %151, i32 0, i32 0
  store ptr %146, ptr %152, align 8, !tbaa !27
  %153 = load ptr, ptr %5, align 8, !tbaa !5
  %154 = load i32, ptr %14, align 4, !tbaa !9
  %155 = sext i32 %154 to i64
  %156 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %153, i64 noundef %155) #5
  %157 = load ptr, ptr %156, align 8, !tbaa !5
  %158 = getelementptr inbounds %"struct.sc_core::sc_bind_elem", ptr %157, i32 0, i32 1
  store ptr null, ptr %158, align 8, !tbaa !25
  br label %159

159:                                              ; preds = %134
  %160 = load i32, ptr %14, align 4, !tbaa !9
  %161 = add nsw i32 %160, 1
  store i32 %161, ptr %14, align 4, !tbaa !9
  br label %127, !llvm.loop !31

162:                                              ; preds = %133
  br label %163

163:                                              ; preds = %162, %39
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #5
  store i32 0, ptr %7, align 4
  br label %164

164:                                              ; preds = %163, %38
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #5
  %165 = load i32, ptr %7, align 4
  switch i32 %165, label %172 [
    i32 0, label %166
    i32 1, label %166
  ]

166:                                              ; preds = %164, %164
  ret void

167:                                              ; preds = %74
  %168 = load ptr, ptr %11, align 8
  %169 = load i32, ptr %12, align 4
  %170 = insertvalue { ptr, i32 } poison, ptr %168, 0
  %171 = insertvalue { ptr, i32 } %170, i32 %169, 1
  resume { ptr, i32 } %171

172:                                              ; preds = %164
  unreachable
}

declare void @_ZN7sc_core12sc_bind_elemC1Ev(ptr)

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { builtin allocsize(0) }
attributes #7 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 112}
!12 = !{!"_ZTSN7sc_core12sc_port_baseE", !13, i64 0, !6, i64 112}
!13 = !{!"_ZTSN7sc_core9sc_objectE", !6, i64 8, !14, i64 16, !18, i64 40, !22, i64 64, !6, i64 96, !6, i64 104}
!14 = !{!"_ZTSSt6vectorIPN7sc_core8sc_eventESaIS2_EE", !15, i64 0}
!15 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE12_Vector_implE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!18 = !{!"_ZTSSt6vectorIPN7sc_core9sc_objectESaIS2_EE", !19, i64 0}
!19 = !{!"_ZTSSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE12_Vector_implE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!22 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !23, i64 0, !24, i64 8, !7, i64 16}
!23 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!24 = !{!"long", !7, i64 0}
!25 = !{!26, !6, i64 8}
!26 = !{!"_ZTSN7sc_core12sc_bind_elemE", !6, i64 0, !6, i64 8}
!27 = !{!26, !6, i64 0}
!28 = distinct !{!28, !29}
!29 = !{!"llvm.loop.mustprogress"}
!30 = distinct !{!30, !29}
!31 = distinct !{!31, !29}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK7sc_core12sc_bind_info4sizeEv(ptr noundef nonnull align 8 dereferenceable(96)) local_unnamed_addr #1 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EE9push_backEOS2_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #4 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core12sc_port_base13insert_parentEi(ptr nocapture noundef nonnull readonly align 8 dereferenceable(120) %0, i32 noundef %1) local_unnamed_addr #4 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca ptr, align 8
  %4 = getelementptr inbounds i8, ptr %0, i64 112
  %5 = load ptr, ptr %4, align 8, !tbaa !5
  %6 = getelementptr inbounds i8, ptr %5, i64 8
  %7 = sext i32 %1 to i64
  %8 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %6, i64 noundef %7) #5
  %9 = load ptr, ptr %8, align 8, !tbaa !22
  %10 = getelementptr inbounds i8, ptr %9, i64 8
  %11 = load ptr, ptr %10, align 8, !tbaa !23
  %12 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %6, i64 noundef %7) #5
  %13 = load ptr, ptr %12, align 8, !tbaa !22
  %14 = getelementptr inbounds i8, ptr %13, i64 8
  store ptr null, ptr %14, align 8, !tbaa !23
  %15 = getelementptr inbounds i8, ptr %11, i64 112
  %16 = load ptr, ptr %15, align 8, !tbaa !5
  %17 = getelementptr inbounds i8, ptr %16, i64 8
  %18 = tail call noundef i64 @_ZNKSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %17) #5
  %19 = icmp eq i64 %18, 0
  br i1 %19, label %.loopexit, label %20

20:                                               ; preds = %2
  %21 = load ptr, ptr %15, align 8, !tbaa !5
  %22 = getelementptr inbounds i8, ptr %21, i64 8
  %23 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %22, i64 noundef 0) #5
  %24 = load ptr, ptr %23, align 8, !tbaa !22
  %25 = load ptr, ptr %24, align 8, !tbaa !25
  %26 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %6, i64 noundef %7) #5
  %27 = load ptr, ptr %26, align 8, !tbaa !22
  store ptr %25, ptr %27, align 8, !tbaa !25
  %28 = load ptr, ptr %15, align 8, !tbaa !5
  %29 = tail call noundef i32 @_ZNK7sc_core12sc_bind_info4sizeEv(ptr noundef nonnull align 8 dereferenceable(96) %28)
  %30 = add i32 %29, -1
  %31 = icmp sgt i32 %29, 1
  br i1 %31, label %.lr.ph, label %.loopexit

._crit_edge:                                      ; preds = %39
  %32 = load ptr, ptr %4, align 8, !tbaa !5
  %33 = call noundef i32 @_ZNK7sc_core12sc_bind_info4sizeEv(ptr noundef nonnull align 8 dereferenceable(96) %32)
  %34 = sub i32 %33, %29
  %35 = icmp sgt i32 %34, %1
  br i1 %35, label %.lr.ph50.preheader, label %.lr.ph53.preheader

.lr.ph50.preheader:                               ; preds = %._crit_edge
  %36 = sext i32 %34 to i64
  %37 = sext i32 %30 to i64
  br label %.lr.ph50

.lr.ph:                                           ; preds = %20, %39
  %.04347 = phi i32 [ %40, %39 ], [ 0, %20 ]
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #5
  %38 = call noalias noundef nonnull dereferenceable(16) ptr @_Znwm(i64 noundef 16) #6
  invoke void @_ZN7sc_core12sc_bind_elemC1Ev(ptr noundef nonnull align 8 dereferenceable(16) %38)
          to label %39 unwind label %41

39:                                               ; preds = %.lr.ph
  store ptr %38, ptr %3, align 8, !tbaa !22
  call void @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EE9push_backEOS2_(ptr noundef nonnull align 8 dereferenceable(24) %6, ptr noundef nonnull align 8 dereferenceable(8) %3)
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #5
  %40 = add nuw nsw i32 %.04347, 1
  %exitcond.not = icmp eq i32 %40, %30
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !26

41:                                               ; preds = %.lr.ph
  %42 = landingpad { ptr, i32 }
          cleanup
  call void @_ZdlPvm(ptr noundef nonnull %38, i64 noundef 16) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #5
  resume { ptr, i32 } %42

.lr.ph53.preheader:                               ; preds = %.lr.ph50, %._crit_edge
  %43 = add nsw i32 %30, %1
  %44 = sext i32 %43 to i64
  br label %.lr.ph53

.lr.ph50:                                         ; preds = %.lr.ph50.preheader, %.lr.ph50
  %indvars.iv = phi i64 [ %36, %.lr.ph50.preheader ], [ %indvars.iv.next, %.lr.ph50 ]
  %45 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %6, i64 noundef %indvars.iv) #5
  %46 = load ptr, ptr %45, align 8, !tbaa !22
  %47 = load ptr, ptr %46, align 8, !tbaa !25
  %48 = add nsw i64 %indvars.iv, %37
  %49 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %6, i64 noundef %48) #5
  %50 = load ptr, ptr %49, align 8, !tbaa !22
  store ptr %47, ptr %50, align 8, !tbaa !25
  %51 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %6, i64 noundef %indvars.iv) #5
  %52 = load ptr, ptr %51, align 8, !tbaa !22
  %53 = getelementptr inbounds i8, ptr %52, i64 8
  %54 = load ptr, ptr %53, align 8, !tbaa !23
  %55 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %6, i64 noundef %48) #5
  %56 = load ptr, ptr %55, align 8, !tbaa !22
  %57 = getelementptr inbounds i8, ptr %56, i64 8
  store ptr %54, ptr %57, align 8, !tbaa !23
  %indvars.iv.next = add nsw i64 %indvars.iv, -1
  %58 = icmp sgt i64 %indvars.iv.next, %7
  br i1 %58, label %.lr.ph50, label %.lr.ph53.preheader, !llvm.loop !28

.lr.ph53:                                         ; preds = %.lr.ph53.preheader, %.lr.ph53
  %indvars.iv56 = phi i64 [ %7, %.lr.ph53.preheader ], [ %indvars.iv.next57, %.lr.ph53 ]
  %indvars.iv.next57 = add nsw i64 %indvars.iv56, 1
  %59 = load ptr, ptr %15, align 8, !tbaa !5
  %60 = getelementptr inbounds i8, ptr %59, i64 8
  %61 = sub nsw i64 %indvars.iv.next57, %7
  %62 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %60, i64 noundef %61) #5
  %63 = load ptr, ptr %62, align 8, !tbaa !22
  %64 = load ptr, ptr %63, align 8, !tbaa !25
  %65 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %6, i64 noundef %indvars.iv.next57) #5
  %66 = load ptr, ptr %65, align 8, !tbaa !22
  store ptr %64, ptr %66, align 8, !tbaa !25
  %67 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7sc_core12sc_bind_elemESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %6, i64 noundef %indvars.iv.next57) #5
  %68 = load ptr, ptr %67, align 8, !tbaa !22
  %69 = getelementptr inbounds i8, ptr %68, i64 8
  store ptr null, ptr %69, align 8, !tbaa !23
  %.not.not = icmp slt i64 %indvars.iv.next57, %44
  br i1 %.not.not, label %.lr.ph53, label %.loopexit, !llvm.loop !29

.loopexit:                                        ; preds = %.lr.ph53, %20, %2
  ret void
}

declare void @_ZN7sc_core12sc_bind_elemC1Ev(ptr) local_unnamed_addr

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { builtin allocsize(0) }
attributes #7 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 112}
!6 = !{!"_ZTSN7sc_core12sc_port_baseE", !7, i64 0, !8, i64 112}
!7 = !{!"_ZTSN7sc_core9sc_objectE", !8, i64 8, !11, i64 16, !15, i64 40, !19, i64 64, !8, i64 96, !8, i64 104}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"_ZTSSt6vectorIPN7sc_core8sc_eventESaIS2_EE", !12, i64 0}
!12 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE", !13, i64 0}
!13 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE12_Vector_implE", !14, i64 0}
!14 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE17_Vector_impl_dataE", !8, i64 0, !8, i64 8, !8, i64 16}
!15 = !{!"_ZTSSt6vectorIPN7sc_core9sc_objectESaIS2_EE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE17_Vector_impl_dataE", !8, i64 0, !8, i64 8, !8, i64 16}
!19 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !20, i64 0, !21, i64 8, !9, i64 16}
!20 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !8, i64 0}
!21 = !{!"long", !9, i64 0}
!22 = !{!8, !8, i64 0}
!23 = !{!24, !8, i64 8}
!24 = !{!"_ZTSN7sc_core12sc_bind_elemE", !8, i64 0, !8, i64 8}
!25 = !{!24, !8, i64 0}
!26 = distinct !{!26, !27}
!27 = !{!"llvm.loop.mustprogress"}
!28 = distinct !{!28, !27}
!29 = distinct !{!29, !27}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass