; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/datatypes/int (sc_signed)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::sc_signed" = type { %"class.sc_dt::sc_value_base", i32, i32, i32, ptr }
%"class.sc_dt::sc_value_base" = type { ptr }
%"class.sc_dt::sc_unsigned" = type { %"class.sc_dt::sc_value_base", i32, i32, i32, ptr }

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef, ptr noundef) #0

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dt11div_by_zeroIiEEvT_(i32 noundef) #0

declare void @_ZN5sc_dt18mod_on_help_signedERiiiPjiiPKj(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt9sc_signedrMERKNS_11sc_unsignedE(ptr noundef nonnull align 8 dereferenceable(32) %0, ptr noundef nonnull align 8 dereferenceable(32) %1) #2 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %5 = load ptr, ptr %3, align 8
  %6 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %5, i32 0, i32 1
  %7 = load i32, ptr %6, align 8, !tbaa !9
  %8 = icmp eq i32 %7, 0
  br i1 %8, label %14, label %9

9:                                                ; preds = %2
  %10 = load ptr, ptr %4, align 8, !tbaa !5
  %11 = getelementptr inbounds %"class.sc_dt::sc_unsigned", ptr %10, i32 0, i32 1
  %12 = load i32, ptr %11, align 8, !tbaa !13
  %13 = icmp eq i32 %12, 0
  br i1 %13, label %14, label %22

14:                                               ; preds = %9, %2
  %15 = load ptr, ptr %4, align 8, !tbaa !5
  %16 = getelementptr inbounds %"class.sc_dt::sc_unsigned", ptr %15, i32 0, i32 1
  %17 = load i32, ptr %16, align 8, !tbaa !13
  call void @_ZN5sc_dt11div_by_zeroIiEEvT_(i32 noundef %17)
  %18 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %5, i32 0, i32 3
  %19 = load i32, ptr %18, align 8, !tbaa !15
  %20 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %5, i32 0, i32 4
  %21 = load ptr, ptr %20, align 8, !tbaa !16
  call void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef %19, ptr noundef %21)
  br label %39

22:                                               ; preds = %9
  %23 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %5, i32 0, i32 1
  %24 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %5, i32 0, i32 2
  %25 = load i32, ptr %24, align 4, !tbaa !17
  %26 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %5, i32 0, i32 3
  %27 = load i32, ptr %26, align 8, !tbaa !15
  %28 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %5, i32 0, i32 4
  %29 = load ptr, ptr %28, align 8, !tbaa !16
  %30 = load ptr, ptr %4, align 8, !tbaa !5
  %31 = getelementptr inbounds %"class.sc_dt::sc_unsigned", ptr %30, i32 0, i32 2
  %32 = load i32, ptr %31, align 4, !tbaa !18
  %33 = load ptr, ptr %4, align 8, !tbaa !5
  %34 = getelementptr inbounds %"class.sc_dt::sc_unsigned", ptr %33, i32 0, i32 3
  %35 = load i32, ptr %34, align 8, !tbaa !19
  %36 = load ptr, ptr %4, align 8, !tbaa !5
  %37 = getelementptr inbounds %"class.sc_dt::sc_unsigned", ptr %36, i32 0, i32 4
  %38 = load ptr, ptr %37, align 8, !tbaa !20
  call void @_ZN5sc_dt18mod_on_help_signedERiiiPjiiPKj(ptr noundef nonnull align 4 dereferenceable(4) %23, i32 noundef %25, i32 noundef %27, ptr noundef %29, i32 noundef %32, i32 noundef %35, ptr noundef %38)
  br label %39

39:                                               ; preds = %22, %14
  ret ptr %5
}

attributes #0 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !12, i64 8}
!10 = !{!"_ZTSN5sc_dt9sc_signedE", !11, i64 0, !12, i64 8, !12, i64 12, !12, i64 16, !6, i64 24}
!11 = !{!"_ZTSN5sc_dt13sc_value_baseE"}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !12, i64 8}
!14 = !{!"_ZTSN5sc_dt11sc_unsignedE", !11, i64 0, !12, i64 8, !12, i64 12, !12, i64 16, !6, i64 24}
!15 = !{!10, !12, i64 16}
!16 = !{!10, !6, i64 24}
!17 = !{!10, !12, i64 12}
!18 = !{!14, !12, i64 12}
!19 = !{!14, !12, i64 16}
!20 = !{!14, !6, i64 24}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dt11div_by_zeroIiEEvT_(i32 noundef) local_unnamed_addr #0

declare void @_ZN5sc_dt18mod_on_help_signedERiiiPjiiPKj(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt9sc_signedrMERKNS_11sc_unsignedE(ptr noundef nonnull returned align 8 dereferenceable(32) %0, ptr nocapture noundef nonnull readonly align 8 dereferenceable(32) %1) local_unnamed_addr #2 align 2 {
  %3 = getelementptr inbounds i8, ptr %0, i64 8
  %4 = load i32, ptr %3, align 8, !tbaa !5
  %5 = icmp eq i32 %4, 0
  %6 = getelementptr inbounds i8, ptr %1, i64 8
  %7 = load i32, ptr %6, align 8
  %8 = icmp eq i32 %7, 0
  %or.cond = select i1 %5, i1 true, i1 %8
  br i1 %or.cond, label %9, label %14

9:                                                ; preds = %2
  tail call void @_ZN5sc_dt11div_by_zeroIiEEvT_(i32 noundef %7)
  %10 = getelementptr inbounds i8, ptr %0, i64 16
  %11 = load i32, ptr %10, align 8, !tbaa !12
  %12 = getelementptr inbounds i8, ptr %0, i64 24
  %13 = load ptr, ptr %12, align 8, !tbaa !13
  tail call void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef %11, ptr noundef %13)
  br label %27

14:                                               ; preds = %2
  %15 = getelementptr inbounds i8, ptr %0, i64 12
  %16 = load i32, ptr %15, align 4, !tbaa !14
  %17 = getelementptr inbounds i8, ptr %0, i64 16
  %18 = load i32, ptr %17, align 8, !tbaa !12
  %19 = getelementptr inbounds i8, ptr %0, i64 24
  %20 = load ptr, ptr %19, align 8, !tbaa !13
  %21 = getelementptr inbounds i8, ptr %1, i64 12
  %22 = load i32, ptr %21, align 4, !tbaa !15
  %23 = getelementptr inbounds i8, ptr %1, i64 16
  %24 = load i32, ptr %23, align 8, !tbaa !17
  %25 = getelementptr inbounds i8, ptr %1, i64 24
  %26 = load ptr, ptr %25, align 8, !tbaa !18
  tail call void @_ZN5sc_dt18mod_on_help_signedERiiiPjiiPKj(ptr noundef nonnull align 4 dereferenceable(4) %3, i32 noundef %16, i32 noundef %18, ptr noundef %20, i32 noundef %22, i32 noundef %24, ptr noundef %26)
  br label %27

27:                                               ; preds = %14, %9
  ret ptr %0
}

attributes #0 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 8}
!6 = !{!"_ZTSN5sc_dt9sc_signedE", !7, i64 0, !8, i64 8, !8, i64 12, !8, i64 16, !11, i64 24}
!7 = !{!"_ZTSN5sc_dt13sc_value_baseE"}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!6, !8, i64 16}
!13 = !{!6, !11, i64 24}
!14 = !{!6, !8, i64 12}
!15 = !{!16, !8, i64 12}
!16 = !{!"_ZTSN5sc_dt11sc_unsignedE", !7, i64 0, !8, i64 8, !8, i64 12, !8, i64 16, !11, i64 24}
!17 = !{!16, !8, i64 16}
!18 = !{!16, !11, i64 24}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass