; LLVM IR from ryanlayer/giggle :: src (metadata_index)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.11 = external hidden unnamed_addr constant [23 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: noreturn
declare void @err(i32 noundef, ptr noundef, ...) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @data_type_char_to_enum(i8 noundef signext %0) #2 {
  %2 = alloca i8, align 1
  %3 = alloca i32, align 4
  store i8 %0, ptr %2, align 1, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  %4 = load i8, ptr %2, align 1, !tbaa !5
  %5 = sext i8 %4 to i32
  switch i32 %5, label %14 [
    i32 99, label %6
    i32 98, label %7
    i32 104, label %8
    i32 105, label %9
    i32 108, label %10
    i32 102, label %11
    i32 100, label %12
    i32 115, label %13
  ]

6:                                                ; preds = %1
  store i32 0, ptr %3, align 4, !tbaa !8
  br label %17

7:                                                ; preds = %1
  store i32 1, ptr %3, align 4, !tbaa !8
  br label %17

8:                                                ; preds = %1
  store i32 2, ptr %3, align 4, !tbaa !8
  br label %17

9:                                                ; preds = %1
  store i32 3, ptr %3, align 4, !tbaa !8
  br label %17

10:                                               ; preds = %1
  store i32 4, ptr %3, align 4, !tbaa !8
  br label %17

11:                                               ; preds = %1
  store i32 5, ptr %3, align 4, !tbaa !8
  br label %17

12:                                               ; preds = %1
  store i32 6, ptr %3, align 4, !tbaa !8
  br label %17

13:                                               ; preds = %1
  store i32 7, ptr %3, align 4, !tbaa !8
  br label %17

14:                                               ; preds = %1
  %15 = load i8, ptr %2, align 1, !tbaa !5
  %16 = sext i8 %15 to i32
  call void (i32, ptr, ...) @err(i32 noundef 1, ptr noundef @.str.11, i32 noundef %16) #4
  unreachable

17:                                               ; preds = %13, %12, %11, %10, %9, %8, %7, %6
  %18 = load i32, ptr %3, align 4, !tbaa !8
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  ret i32 %18
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { noreturn }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !6, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.11 = external hidden unnamed_addr constant [23 x i8], align 1
@switch.table.data_type_char_to_enum = private unnamed_addr constant [18 x i32] [i32 1, i32 0, i32 6, i32 0, i32 5, i32 0, i32 2, i32 3, i32 0, i32 0, i32 4, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 7], align 4

; Function Attrs: noreturn
declare void @err(i32 noundef, ptr noundef, ...) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 8) i32 @data_type_char_to_enum(i8 noundef signext %0) local_unnamed_addr #1 {
  %switch.tableidx = add i8 %0, -98
  %2 = icmp ult i8 %switch.tableidx, 18
  br i1 %2, label %switch.hole_check, label %3

3:                                                ; preds = %switch.hole_check, %1
  %4 = sext i8 %0 to i32
  tail call void (i32, ptr, ...) @err(i32 noundef 1, ptr noundef nonnull @.str.11, i32 noundef %4) #2
  unreachable

switch.hole_check:                                ; preds = %1
  %switch.maskindex = zext nneg i8 %switch.tableidx to i32
  %switch.shifted = lshr i32 132311, %switch.maskindex
  %switch.lobit = trunc i32 %switch.shifted to i1
  br i1 %switch.lobit, label %switch.lookup, label %3

switch.lookup:                                    ; preds = %switch.hole_check
  %5 = zext nneg i8 %switch.tableidx to i64
  %switch.gep = getelementptr inbounds [18 x i32], ptr @switch.table.data_type_char_to_enum, i64 0, i64 %5
  %switch.load = load i32, ptr %switch.gep, align 4
  ret i32 %switch.load
}

attributes #0 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass