; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/datatypes/int (sc_signed)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::sc_signed" = type { %"class.sc_dt::sc_value_base", i32, i32, i32, ptr }
%"class.sc_dt::sc_value_base" = type { ptr }
%"class.sc_dt::sc_unsigned" = type { %"class.sc_dt::sc_value_base", i32, i32, i32, ptr }

@_ZTVN5sc_dt9sc_signedE = external dso_local unnamed_addr constant { [13 x ptr] }, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt9sc_signed6lengthEv(ptr noundef nonnull align 8 dereferenceable(32)) #1 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef, ptr noundef) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt9sc_signed16convert_2C_to_SMEv(ptr noundef nonnull align 8 dereferenceable(32)) #4 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt13one_and_zerosEi(i32 noundef) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt7bit_ordEi(i32 noundef) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt6sc_maxIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #3

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) #5

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) #6

; Function Attrs: nobuiltin nounwind
declare void @_ZdaPv(ptr noundef) #7

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt8vec_copyEiPjPKj(i32 noundef, ptr noundef, ptr noundef) #3

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #8

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt13sc_value_baseC2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt9sc_signed8num_bitsEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) #1 align 2

declare void @_ZN5sc_dt15vec_shift_rightEiPjij(i32 noundef, ptr noundef, i32 noundef, i32 noundef) #9

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt14vec_complementEiPj(i32 noundef, ptr noundef) #3

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5sc_dt9sc_signedC2EPKNS_11sc_unsignedEii(ptr noundef nonnull align 8 dereferenceable(32) %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) unnamed_addr #4 align 2 personality ptr @__gxx_personality_v0 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i8, align 1
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca ptr, align 8
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  %26 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !9
  store i32 %3, ptr %8, align 4, !tbaa !9
  %27 = load ptr, ptr %5, align 8
  %28 = getelementptr inbounds i8, ptr %27, i64 0
  call void @llvm.memset.p0.i64(ptr align 8 %28, i8 0, i64 8, i1 false)
  call void @_ZN5sc_dt13sc_value_baseC2Ev(ptr noundef nonnull align 8 dereferenceable(8) %27) #10
  store ptr getelementptr inbounds inrange(-16, 88) ({ [13 x ptr] }, ptr @_ZTVN5sc_dt9sc_signedE, i32 0, i32 0, i32 2), ptr %27, align 8, !tbaa !11
  %29 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %27, i32 0, i32 1
  store i32 0, ptr %29, align 8, !tbaa !13
  %30 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %27, i32 0, i32 2
  store i32 0, ptr %30, align 4, !tbaa !16
  %31 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %27, i32 0, i32 3
  store i32 0, ptr %31, align 8, !tbaa !17
  %32 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %27, i32 0, i32 4
  store ptr null, ptr %32, align 8, !tbaa !18
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #10
  store i8 0, ptr %9, align 1, !tbaa !19
  %33 = load i32, ptr %7, align 4, !tbaa !9
  %34 = load i32, ptr %8, align 4, !tbaa !9
  %35 = icmp slt i32 %33, %34
  br i1 %35, label %36, label %40

36:                                               ; preds = %4
  store i8 1, ptr %9, align 1, !tbaa !19
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #10
  %37 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %37, ptr %10, align 4, !tbaa !9
  %38 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %38, ptr %7, align 4, !tbaa !9
  %39 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %39, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #10
  br label %40

40:                                               ; preds = %36, %4
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #10
  store i32 0, ptr %11, align 4, !tbaa !9
  %41 = invoke noundef i32 @_ZN5sc_dt6sc_maxIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %8, ptr noundef nonnull align 4 dereferenceable(4) %11)
          to label %42 unwind label %75

42:                                               ; preds = %40
  store i32 %41, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #10
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #10
  %43 = load ptr, ptr %6, align 8, !tbaa !5
  %44 = getelementptr inbounds %"class.sc_dt::sc_unsigned", ptr %43, i32 0, i32 2
  %45 = load i32, ptr %44, align 4, !tbaa !21
  %46 = sub nsw i32 %45, 1
  store i32 %46, ptr %14, align 4, !tbaa !9
  %47 = invoke noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %7, ptr noundef nonnull align 4 dereferenceable(4) %14)
          to label %48 unwind label %79

48:                                               ; preds = %42
  store i32 %47, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #10
  %49 = load i32, ptr %7, align 4, !tbaa !9
  %50 = load i32, ptr %8, align 4, !tbaa !9
  %51 = sub nsw i32 %49, %50
  %52 = add nsw i32 %51, 1
  %53 = invoke noundef i32 @_ZNK5sc_dt9sc_signed8num_bitsEi(ptr noundef nonnull align 8 dereferenceable(32) %27, i32 noundef %52)
          to label %54 unwind label %83

54:                                               ; preds = %48
  %55 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %27, i32 0, i32 2
  store i32 %53, ptr %55, align 4, !tbaa !16
  %56 = load ptr, ptr %6, align 8, !tbaa !5
  %57 = getelementptr inbounds %"class.sc_dt::sc_unsigned", ptr %56, i32 0, i32 1
  %58 = load i32, ptr %57, align 8, !tbaa !23
  %59 = icmp eq i32 %58, 0
  br i1 %59, label %66, label %60

60:                                               ; preds = %54
  %61 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %27, i32 0, i32 2
  %62 = load i32, ptr %61, align 4, !tbaa !16
  %63 = invoke noundef i32 @_ZNK5sc_dt9sc_signed8num_bitsEi(ptr noundef nonnull align 8 dereferenceable(32) %27, i32 noundef 0)
          to label %64 unwind label %83

64:                                               ; preds = %60
  %65 = icmp sle i32 %62, %63
  br i1 %65, label %66, label %109

66:                                               ; preds = %64, %54
  %67 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %27, i32 0, i32 1
  store i32 0, ptr %67, align 8, !tbaa !13
  %68 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %27, i32 0, i32 2
  %69 = load i32, ptr %68, align 4, !tbaa !16
  %70 = invoke noundef i32 @_ZNK5sc_dt9sc_signed8num_bitsEi(ptr noundef nonnull align 8 dereferenceable(32) %27, i32 noundef 0)
          to label %71 unwind label %83

71:                                               ; preds = %66
  %72 = icmp sle i32 %69, %70
  br i1 %72, label %73, label %87

73:                                               ; preds = %71
  %74 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %27, i32 0, i32 2
  store i32 1, ptr %74, align 4, !tbaa !16
  br label %87

75:                                               ; preds = %40
  %76 = landingpad { ptr, i32 }
          cleanup
  %77 = extractvalue { ptr, i32 } %76, 0
  store ptr %77, ptr %12, align 8
  %78 = extractvalue { ptr, i32 } %76, 1
  store i32 %78, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #10
  br label %355

79:                                               ; preds = %42
  %80 = landingpad { ptr, i32 }
          cleanup
  %81 = extractvalue { ptr, i32 } %80, 0
  store ptr %81, ptr %12, align 8
  %82 = extractvalue { ptr, i32 } %80, 1
  store i32 %82, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #10
  br label %355

83:                                               ; preds = %102, %87, %66, %60, %48
  %84 = landingpad { ptr, i32 }
          cleanup
  %85 = extractvalue { ptr, i32 } %84, 0
  store ptr %85, ptr %12, align 8
  %86 = extractvalue { ptr, i32 } %84, 1
  store i32 %86, ptr %13, align 4
  br label %355

87:                                               ; preds = %73, %71
  %88 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %27, i32 0, i32 2
  %89 = load i32, ptr %88, align 4, !tbaa !16
  %90 = sub nsw i32 %89, 1
  %91 = sdiv i32 %90, 30
  %92 = add nsw i32 %91, 1
  %93 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %27, i32 0, i32 3
  store i32 %92, ptr %93, align 8, !tbaa !17
  %94 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %27, i32 0, i32 3
  %95 = load i32, ptr %94, align 8, !tbaa !17
  %96 = sext i32 %95 to i64
  %97 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %96, i64 4)
  %98 = extractvalue { i64, i1 } %97, 1
  %99 = extractvalue { i64, i1 } %97, 0
  %100 = select i1 %98, i64 -1, i64 %99
  %101 = invoke noalias noundef nonnull ptr @_Znam(i64 noundef %100) #11
          to label %102 unwind label %83

102:                                              ; preds = %87
  %103 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %27, i32 0, i32 4
  store ptr %101, ptr %103, align 8, !tbaa !18
  %104 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %27, i32 0, i32 3
  %105 = load i32, ptr %104, align 8, !tbaa !17
  %106 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %27, i32 0, i32 4
  %107 = load ptr, ptr %106, align 8, !tbaa !18
  invoke void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef %105, ptr noundef %107)
          to label %108 unwind label %83

108:                                              ; preds = %102
  store i32 1, ptr %15, align 4
  br label %350

109:                                              ; preds = %64
  %110 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %27, i32 0, i32 2
  %111 = load i32, ptr %110, align 4, !tbaa !16
  %112 = sub nsw i32 %111, 1
  %113 = sdiv i32 %112, 30
  %114 = add nsw i32 %113, 1
  %115 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %27, i32 0, i32 3
  store i32 %114, ptr %115, align 8, !tbaa !17
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #10
  %116 = load i32, ptr %7, align 4, !tbaa !9
  %117 = add nsw i32 %116, 1
  store i32 %117, ptr %16, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #10
  %118 = load i32, ptr %8, align 4, !tbaa !9
  %119 = add nsw i32 %118, 1
  store i32 %119, ptr %17, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #10
  %120 = load i32, ptr %16, align 4, !tbaa !9
  %121 = sub nsw i32 %120, 1
  %122 = sdiv i32 %121, 30
  %123 = add nsw i32 %122, 1
  %124 = sub nsw i32 %123, 1
  store i32 %124, ptr %18, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #10
  %125 = load i32, ptr %17, align 4, !tbaa !9
  %126 = sub nsw i32 %125, 1
  %127 = sdiv i32 %126, 30
  %128 = add nsw i32 %127, 1
  %129 = sub nsw i32 %128, 1
  store i32 %129, ptr %19, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #10
  %130 = load ptr, ptr %6, align 8, !tbaa !5
  %131 = getelementptr inbounds %"class.sc_dt::sc_unsigned", ptr %130, i32 0, i32 1
  %132 = load i32, ptr %131, align 8, !tbaa !23
  %133 = icmp eq i32 %132, -1
  br i1 %133, label %134, label %137

134:                                              ; preds = %109
  %135 = load i32, ptr %18, align 4, !tbaa !9
  %136 = add nsw i32 %135, 1
  store i32 %136, ptr %20, align 4, !tbaa !9
  br label %142

137:                                              ; preds = %109
  %138 = load i32, ptr %18, align 4, !tbaa !9
  %139 = load i32, ptr %19, align 4, !tbaa !9
  %140 = sub nsw i32 %138, %139
  %141 = add nsw i32 %140, 1
  store i32 %141, ptr %20, align 4, !tbaa !9
  br label %142

142:                                              ; preds = %137, %134
  %143 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %27, i32 0, i32 3
  %144 = load i32, ptr %143, align 8, !tbaa !17
  %145 = sext i32 %144 to i64
  %146 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %145, i64 4)
  %147 = extractvalue { i64, i1 } %146, 1
  %148 = extractvalue { i64, i1 } %146, 0
  %149 = select i1 %147, i64 -1, i64 %148
  %150 = invoke noalias noundef nonnull ptr @_Znam(i64 noundef %149) #11
          to label %151 unwind label %179

151:                                              ; preds = %142
  %152 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %27, i32 0, i32 4
  store ptr %150, ptr %152, align 8, !tbaa !18
  call void @llvm.lifetime.start.p0(i64 8, ptr %21) #10
  %153 = load i32, ptr %20, align 4, !tbaa !9
  %154 = sext i32 %153 to i64
  %155 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %154, i64 4)
  %156 = extractvalue { i64, i1 } %155, 1
  %157 = extractvalue { i64, i1 } %155, 0
  %158 = select i1 %156, i64 -1, i64 %157
  %159 = invoke noalias noundef nonnull ptr @_Znam(i64 noundef %158) #11
          to label %160 unwind label %183

160:                                              ; preds = %151
  store ptr %159, ptr %21, align 8, !tbaa !5
  %161 = load ptr, ptr %6, align 8, !tbaa !5
  %162 = getelementptr inbounds %"class.sc_dt::sc_unsigned", ptr %161, i32 0, i32 1
  %163 = load i32, ptr %162, align 8, !tbaa !23
  %164 = icmp eq i32 %163, -1
  br i1 %164, label %165, label %187

165:                                              ; preds = %160
  %166 = load i32, ptr %20, align 4, !tbaa !9
  %167 = load ptr, ptr %21, align 8, !tbaa !5
  %168 = load ptr, ptr %6, align 8, !tbaa !5
  %169 = getelementptr inbounds %"class.sc_dt::sc_unsigned", ptr %168, i32 0, i32 4
  %170 = load ptr, ptr %169, align 8, !tbaa !24
  invoke void @_ZN5sc_dt8vec_copyEiPjPKj(i32 noundef %166, ptr noundef %167, ptr noundef %170)
          to label %171 unwind label %183

171:                                              ; preds = %165
  %172 = load i32, ptr %20, align 4, !tbaa !9
  %173 = load ptr, ptr %21, align 8, !tbaa !5
  invoke void @_ZN5sc_dt14vec_complementEiPj(i32 noundef %172, ptr noundef %173)
          to label %174 unwind label %183

174:                                              ; preds = %171
  %175 = load i32, ptr %20, align 4, !tbaa !9
  %176 = load ptr, ptr %21, align 8, !tbaa !5
  %177 = load i32, ptr %8, align 4, !tbaa !9
  invoke void @_ZN5sc_dt15vec_shift_rightEiPjij(i32 noundef %175, ptr noundef %176, i32 noundef %177, i32 noundef 1073741823)
          to label %178 unwind label %183

178:                                              ; preds = %174
  br label %219

179:                                              ; preds = %142
  %180 = landingpad { ptr, i32 }
          cleanup
  %181 = extractvalue { ptr, i32 } %180, 0
  store ptr %181, ptr %12, align 8
  %182 = extractvalue { ptr, i32 } %180, 1
  store i32 %182, ptr %13, align 4
  br label %354

183:                                              ; preds = %344, %230, %227, %219, %211, %174, %171, %165, %151
  %184 = landingpad { ptr, i32 }
          cleanup
  %185 = extractvalue { ptr, i32 } %184, 0
  store ptr %185, ptr %12, align 8
  %186 = extractvalue { ptr, i32 } %184, 1
  store i32 %186, ptr %13, align 4
  br label %353

187:                                              ; preds = %160
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #10
  %188 = load i32, ptr %19, align 4, !tbaa !9
  store i32 %188, ptr %22, align 4, !tbaa !9
  br label %189

189:                                              ; preds = %208, %187
  %190 = load i32, ptr %22, align 4, !tbaa !9
  %191 = load i32, ptr %18, align 4, !tbaa !9
  %192 = icmp sle i32 %190, %191
  br i1 %192, label %194, label %193

193:                                              ; preds = %189
  store i32 2, ptr %15, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #10
  br label %211

194:                                              ; preds = %189
  %195 = load ptr, ptr %6, align 8, !tbaa !5
  %196 = getelementptr inbounds %"class.sc_dt::sc_unsigned", ptr %195, i32 0, i32 4
  %197 = load ptr, ptr %196, align 8, !tbaa !24
  %198 = load i32, ptr %22, align 4, !tbaa !9
  %199 = sext i32 %198 to i64
  %200 = getelementptr inbounds i32, ptr %197, i64 %199
  %201 = load i32, ptr %200, align 4, !tbaa !9
  %202 = load ptr, ptr %21, align 8, !tbaa !5
  %203 = load i32, ptr %22, align 4, !tbaa !9
  %204 = load i32, ptr %19, align 4, !tbaa !9
  %205 = sub nsw i32 %203, %204
  %206 = sext i32 %205 to i64
  %207 = getelementptr inbounds i32, ptr %202, i64 %206
  store i32 %201, ptr %207, align 4, !tbaa !9
  br label %208

208:                                              ; preds = %194
  %209 = load i32, ptr %22, align 4, !tbaa !9
  %210 = add nsw i32 %209, 1
  store i32 %210, ptr %22, align 4, !tbaa !9
  br label %189, !llvm.loop !25

211:                                              ; preds = %193
  %212 = load i32, ptr %20, align 4, !tbaa !9
  %213 = load ptr, ptr %21, align 8, !tbaa !5
  %214 = load i32, ptr %8, align 4, !tbaa !9
  %215 = load i32, ptr %19, align 4, !tbaa !9
  %216 = mul nsw i32 %215, 30
  %217 = sub nsw i32 %214, %216
  invoke void @_ZN5sc_dt15vec_shift_rightEiPjij(i32 noundef %212, ptr noundef %213, i32 noundef %217, i32 noundef 0)
          to label %218 unwind label %183

218:                                              ; preds = %211
  br label %219

219:                                              ; preds = %218, %178
  %220 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %27, i32 0, i32 3
  %221 = load i32, ptr %220, align 8, !tbaa !17
  %222 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %27, i32 0, i32 4
  %223 = load ptr, ptr %222, align 8, !tbaa !18
  invoke void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef %221, ptr noundef %223)
          to label %224 unwind label %183

224:                                              ; preds = %219
  %225 = load i8, ptr %9, align 1, !tbaa !19, !range !27, !noundef !28
  %226 = trunc i8 %225 to i1
  br i1 %226, label %235, label %227

227:                                              ; preds = %224
  %228 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %27, i32 0, i32 3
  %229 = invoke noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %20, ptr noundef nonnull align 4 dereferenceable(4) %228)
          to label %230 unwind label %183

230:                                              ; preds = %227
  %231 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %27, i32 0, i32 4
  %232 = load ptr, ptr %231, align 8, !tbaa !18
  %233 = load ptr, ptr %21, align 8, !tbaa !5
  invoke void @_ZN5sc_dt8vec_copyEiPjPKj(i32 noundef %229, ptr noundef %232, ptr noundef %233)
          to label %234 unwind label %183

234:                                              ; preds = %230
  br label %344

235:                                              ; preds = %224
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #10
  %236 = load i32, ptr %20, align 4, !tbaa !9
  %237 = sub nsw i32 %236, 1
  store i32 %237, ptr %23, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #10
  %238 = load i32, ptr %7, align 4, !tbaa !9
  %239 = load i32, ptr %8, align 4, !tbaa !9
  %240 = sub nsw i32 %238, %239
  %241 = invoke noundef i32 @_ZN5sc_dt7bit_ordEi(i32 noundef %240)
          to label %242 unwind label %265

242:                                              ; preds = %235
  %243 = invoke noundef i32 @_ZN5sc_dt13one_and_zerosEi(i32 noundef %241)
          to label %244 unwind label %265

244:                                              ; preds = %242
  store i32 %243, ptr %24, align 4, !tbaa !9
  br label %245

245:                                              ; preds = %262, %244
  %246 = load i32, ptr %24, align 4, !tbaa !9
  %247 = icmp ne i32 %246, 0
  br i1 %247, label %248, label %269

248:                                              ; preds = %245
  %249 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %27, i32 0, i32 3
  %250 = load i32, ptr %249, align 8, !tbaa !17
  %251 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %27, i32 0, i32 4
  %252 = load ptr, ptr %251, align 8, !tbaa !18
  %253 = load ptr, ptr %21, align 8, !tbaa !5
  %254 = load i32, ptr %23, align 4, !tbaa !9
  %255 = sext i32 %254 to i64
  %256 = getelementptr inbounds i32, ptr %253, i64 %255
  %257 = load i32, ptr %256, align 4, !tbaa !9
  %258 = load i32, ptr %24, align 4, !tbaa !9
  %259 = and i32 %257, %258
  %260 = icmp ne i32 %259, 0
  %261 = zext i1 %260 to i32
  invoke void @_ZN5sc_dt15vec_shift_rightEiPjij(i32 noundef %250, ptr noundef %252, i32 noundef 1, i32 noundef %261)
          to label %262 unwind label %265

262:                                              ; preds = %248
  %263 = load i32, ptr %24, align 4, !tbaa !9
  %264 = lshr i32 %263, 1
  store i32 %264, ptr %24, align 4, !tbaa !9
  br label %245, !llvm.loop !29

265:                                              ; preds = %248, %242, %235
  %266 = landingpad { ptr, i32 }
          cleanup
  %267 = extractvalue { ptr, i32 } %266, 0
  store ptr %267, ptr %12, align 8
  %268 = extractvalue { ptr, i32 } %266, 1
  store i32 %268, ptr %13, align 4
  br label %343

269:                                              ; preds = %245
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #10
  %270 = invoke noundef i32 @_ZN5sc_dt13one_and_zerosEi(i32 noundef 29)
          to label %271 unwind label %278

271:                                              ; preds = %269
  store i32 %270, ptr %25, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %26) #10
  %272 = load i32, ptr %20, align 4, !tbaa !9
  %273 = sub nsw i32 %272, 2
  store i32 %273, ptr %26, align 4, !tbaa !9
  br label %274

274:                                              ; preds = %309, %271
  %275 = load i32, ptr %26, align 4, !tbaa !9
  %276 = icmp sge i32 %275, 0
  br i1 %276, label %282, label %277

277:                                              ; preds = %274
  store i32 7, ptr %15, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %26) #10
  br label %312

278:                                              ; preds = %338, %329, %326, %317, %269
  %279 = landingpad { ptr, i32 }
          cleanup
  %280 = extractvalue { ptr, i32 } %279, 0
  store ptr %280, ptr %12, align 8
  %281 = extractvalue { ptr, i32 } %279, 1
  store i32 %281, ptr %13, align 4
  br label %342

282:                                              ; preds = %274
  %283 = load i32, ptr %25, align 4, !tbaa !9
  store i32 %283, ptr %24, align 4, !tbaa !9
  br label %284

284:                                              ; preds = %301, %282
  %285 = load i32, ptr %24, align 4, !tbaa !9
  %286 = icmp ne i32 %285, 0
  br i1 %286, label %287, label %308

287:                                              ; preds = %284
  %288 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %27, i32 0, i32 3
  %289 = load i32, ptr %288, align 8, !tbaa !17
  %290 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %27, i32 0, i32 4
  %291 = load ptr, ptr %290, align 8, !tbaa !18
  %292 = load ptr, ptr %21, align 8, !tbaa !5
  %293 = load i32, ptr %26, align 4, !tbaa !9
  %294 = sext i32 %293 to i64
  %295 = getelementptr inbounds i32, ptr %292, i64 %294
  %296 = load i32, ptr %295, align 4, !tbaa !9
  %297 = load i32, ptr %24, align 4, !tbaa !9
  %298 = and i32 %296, %297
  %299 = icmp ne i32 %298, 0
  %300 = zext i1 %299 to i32
  invoke void @_ZN5sc_dt15vec_shift_rightEiPjij(i32 noundef %289, ptr noundef %291, i32 noundef 1, i32 noundef %300)
          to label %301 unwind label %304

301:                                              ; preds = %287
  %302 = load i32, ptr %24, align 4, !tbaa !9
  %303 = lshr i32 %302, 1
  store i32 %303, ptr %24, align 4, !tbaa !9
  br label %284, !llvm.loop !30

304:                                              ; preds = %287
  %305 = landingpad { ptr, i32 }
          cleanup
  %306 = extractvalue { ptr, i32 } %305, 0
  store ptr %306, ptr %12, align 8
  %307 = extractvalue { ptr, i32 } %305, 1
  store i32 %307, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %26) #10
  br label %342

308:                                              ; preds = %284
  br label %309

309:                                              ; preds = %308
  %310 = load i32, ptr %26, align 4, !tbaa !9
  %311 = add nsw i32 %310, -1
  store i32 %311, ptr %26, align 4, !tbaa !9
  br label %274, !llvm.loop !31

312:                                              ; preds = %277
  %313 = load ptr, ptr %6, align 8, !tbaa !5
  %314 = getelementptr inbounds %"class.sc_dt::sc_unsigned", ptr %313, i32 0, i32 1
  %315 = load i32, ptr %314, align 8, !tbaa !23
  %316 = icmp eq i32 %315, -1
  br i1 %316, label %317, label %329

317:                                              ; preds = %312
  %318 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %27, i32 0, i32 3
  %319 = load i32, ptr %318, align 8, !tbaa !17
  %320 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %27, i32 0, i32 4
  %321 = load ptr, ptr %320, align 8, !tbaa !18
  %322 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %27, i32 0, i32 3
  %323 = load i32, ptr %322, align 8, !tbaa !17
  %324 = mul nsw i32 %323, 30
  %325 = invoke noundef i32 @_ZNK5sc_dt9sc_signed6lengthEv(ptr noundef nonnull align 8 dereferenceable(32) %27)
          to label %326 unwind label %278

326:                                              ; preds = %317
  %327 = sub nsw i32 %324, %325
  invoke void @_ZN5sc_dt15vec_shift_rightEiPjij(i32 noundef %319, ptr noundef %321, i32 noundef %327, i32 noundef 1073741823)
          to label %328 unwind label %278

328:                                              ; preds = %326
  br label %341

329:                                              ; preds = %312
  %330 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %27, i32 0, i32 3
  %331 = load i32, ptr %330, align 8, !tbaa !17
  %332 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %27, i32 0, i32 4
  %333 = load ptr, ptr %332, align 8, !tbaa !18
  %334 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %27, i32 0, i32 3
  %335 = load i32, ptr %334, align 8, !tbaa !17
  %336 = mul nsw i32 %335, 30
  %337 = invoke noundef i32 @_ZNK5sc_dt9sc_signed6lengthEv(ptr noundef nonnull align 8 dereferenceable(32) %27)
          to label %338 unwind label %278

338:                                              ; preds = %329
  %339 = sub nsw i32 %336, %337
  invoke void @_ZN5sc_dt15vec_shift_rightEiPjij(i32 noundef %331, ptr noundef %333, i32 noundef %339, i32 noundef 0)
          to label %340 unwind label %278

340:                                              ; preds = %338
  br label %341

341:                                              ; preds = %340, %328
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #10
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #10
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #10
  br label %344

342:                                              ; preds = %304, %278
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #10
  br label %343

343:                                              ; preds = %342, %265
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #10
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #10
  br label %353

344:                                              ; preds = %341, %234
  invoke void @_ZN5sc_dt9sc_signed16convert_2C_to_SMEv(ptr noundef nonnull align 8 dereferenceable(32) %27)
          to label %345 unwind label %183

345:                                              ; preds = %344
  %346 = load ptr, ptr %21, align 8, !tbaa !5
  %347 = icmp eq ptr %346, null
  br i1 %347, label %349, label %348

348:                                              ; preds = %345
  call void @_ZdaPv(ptr noundef %346) #12
  br label %349

349:                                              ; preds = %348, %345
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #10
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #10
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #10
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #10
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #10
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #10
  store i32 0, ptr %15, align 4
  br label %350

350:                                              ; preds = %349, %108
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #10
  %351 = load i32, ptr %15, align 4
  switch i32 %351, label %361 [
    i32 0, label %352
    i32 1, label %352
  ]

352:                                              ; preds = %350, %350
  ret void

353:                                              ; preds = %343, %183
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #10
  br label %354

354:                                              ; preds = %353, %179
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #10
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #10
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #10
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #10
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #10
  br label %355

355:                                              ; preds = %354, %83, %79, %75
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #10
  call void @_ZN5sc_dt13sc_value_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(8) %27) #10
  br label %356

356:                                              ; preds = %355
  %357 = load ptr, ptr %12, align 8
  %358 = load i32, ptr %13, align 4
  %359 = insertvalue { ptr, i32 } poison, ptr %357, 0
  %360 = insertvalue { ptr, i32 } %359, i32 %358, 1
  resume { ptr, i32 } %360

361:                                              ; preds = %350
  unreachable
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt13sc_value_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #6 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #9 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #10 = { nounwind }
attributes #11 = { builtin allocsize(0) }
attributes #12 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"vtable pointer", !8, i64 0}
!13 = !{!14, !10, i64 8}
!14 = !{!"_ZTSN5sc_dt9sc_signedE", !15, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !6, i64 24}
!15 = !{!"_ZTSN5sc_dt13sc_value_baseE"}
!16 = !{!14, !10, i64 12}
!17 = !{!14, !10, i64 16}
!18 = !{!14, !6, i64 24}
!19 = !{!20, !20, i64 0}
!20 = !{!"bool", !7, i64 0}
!21 = !{!22, !10, i64 12}
!22 = !{!"_ZTSN5sc_dt11sc_unsignedE", !15, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !6, i64 24}
!23 = !{!22, !10, i64 8}
!24 = !{!22, !6, i64 24}
!25 = distinct !{!25, !26}
!26 = !{!"llvm.loop.mustprogress"}
!27 = !{i8 0, i8 2}
!28 = !{}
!29 = distinct !{!29, !26}
!30 = distinct !{!30, !26}
!31 = distinct !{!31, !26}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZTVN5sc_dt9sc_signedE = external dso_local unnamed_addr constant { [13 x ptr] }, align 8

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt9sc_signed6lengthEv(ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #1 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt9sc_signed16convert_2C_to_SMEv(ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #4 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt13one_and_zerosEi(i32 noundef) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt7bit_ordEi(i32 noundef) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt6sc_maxIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #3

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) local_unnamed_addr #5

; Function Attrs: nobuiltin nounwind
declare void @_ZdaPv(ptr noundef) local_unnamed_addr #6

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt8vec_copyEiPjPKj(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt13sc_value_baseC2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt9sc_signed8num_bitsEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) local_unnamed_addr #1 align 2

declare void @_ZN5sc_dt15vec_shift_rightEiPjij(i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #7

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt14vec_complementEiPj(i32 noundef, ptr noundef) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5sc_dt9sc_signedC2EPKNS_11sc_unsignedEii(ptr noundef nonnull align 8 dereferenceable(32) %0, ptr nocapture noundef readonly %1, i32 noundef %2, i32 noundef %3) unnamed_addr #4 align 2 personality ptr @__gxx_personality_v0 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store i32 %2, ptr %5, align 4, !tbaa !5
  store i32 %3, ptr %6, align 4, !tbaa !5
  store i64 0, ptr %0, align 8
  tail call void @_ZN5sc_dt13sc_value_baseC2Ev(ptr noundef nonnull align 8 dereferenceable(8) %0) #8
  store ptr getelementptr inbounds inrange(-16, 88) (i8, ptr @_ZTVN5sc_dt9sc_signedE, i64 16), ptr %0, align 8, !tbaa !9
  %10 = getelementptr inbounds i8, ptr %0, i64 8
  store i32 0, ptr %10, align 8, !tbaa !11
  %11 = getelementptr inbounds i8, ptr %0, i64 12
  store i32 0, ptr %11, align 4, !tbaa !15
  %12 = getelementptr inbounds i8, ptr %0, i64 16
  store i32 0, ptr %12, align 8, !tbaa !16
  %13 = getelementptr inbounds i8, ptr %0, i64 24
  store ptr null, ptr %13, align 8, !tbaa !17
  %14 = icmp slt i32 %2, %3
  br i1 %14, label %15, label %16

15:                                               ; preds = %4
  store i32 %3, ptr %5, align 4, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !5
  br label %16

16:                                               ; preds = %15, %4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #8
  store i32 0, ptr %7, align 4, !tbaa !5
  %17 = call noundef i32 @_ZN5sc_dt6sc_maxIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %6, ptr noundef nonnull align 4 dereferenceable(4) %7)
  store i32 %17, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #8
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8) #8
  %18 = getelementptr inbounds i8, ptr %1, i64 12
  %19 = load i32, ptr %18, align 4, !tbaa !18
  %20 = add nsw i32 %19, -1
  store i32 %20, ptr %8, align 4, !tbaa !5
  %21 = call noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %5, ptr noundef nonnull align 4 dereferenceable(4) %8)
  store i32 %21, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #8
  %22 = load i32, ptr %6, align 4, !tbaa !5
  %23 = add i32 %21, 1
  %24 = sub i32 %23, %22
  %25 = call noundef i32 @_ZNK5sc_dt9sc_signed8num_bitsEi(ptr noundef nonnull align 8 dereferenceable(32) %0, i32 noundef %24)
  store i32 %25, ptr %11, align 4, !tbaa !15
  %26 = getelementptr inbounds i8, ptr %1, i64 8
  %27 = load i32, ptr %26, align 8, !tbaa !20
  %28 = icmp eq i32 %27, 0
  br i1 %28, label %31, label %29

29:                                               ; preds = %16
  %30 = call noundef i32 @_ZNK5sc_dt9sc_signed8num_bitsEi(ptr noundef nonnull align 8 dereferenceable(32) %0, i32 noundef 0)
  %.not = icmp sgt i32 %25, %30
  %.pre = load i32, ptr %11, align 4, !tbaa !15
  br i1 %.not, label %47, label %31

31:                                               ; preds = %29, %16
  %32 = phi i32 [ %.pre, %29 ], [ %25, %16 ]
  store i32 0, ptr %10, align 8, !tbaa !11
  %33 = call noundef i32 @_ZNK5sc_dt9sc_signed8num_bitsEi(ptr noundef nonnull align 8 dereferenceable(32) %0, i32 noundef 0)
  %.not64 = icmp sgt i32 %32, %33
  br i1 %.not64, label %._crit_edge87, label %35

._crit_edge87:                                    ; preds = %31
  %.pre88 = load i32, ptr %11, align 4, !tbaa !15
  %34 = freeze i32 %.pre88
  br label %38

35:                                               ; preds = %31
  store i32 1, ptr %11, align 4, !tbaa !15
  br label %38

36:                                               ; preds = %46, %38
  %37 = landingpad { ptr, i32 }
          cleanup
  br label %154

38:                                               ; preds = %._crit_edge87, %35
  %.fr = phi i32 [ %34, %._crit_edge87 ], [ 1, %35 ]
  %39 = add nsw i32 %.fr, -1
  %40 = sdiv i32 %39, 30
  %41 = add nsw i32 %40, 1
  store i32 %41, ptr %12, align 8, !tbaa !16
  %42 = sext i32 %41 to i64
  %43 = icmp slt i32 %.fr, -58
  %44 = shl nsw i64 %42, 2
  %spec.select = select i1 %43, i64 -1, i64 %44
  %45 = invoke noalias noundef nonnull ptr @_Znam(i64 noundef %spec.select) #9
          to label %46 unwind label %36

46:                                               ; preds = %38
  store ptr %45, ptr %13, align 8, !tbaa !17
  invoke void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef %41, ptr noundef nonnull %45)
          to label %152 unwind label %36

47:                                               ; preds = %29
  %48 = add nsw i32 %.pre, -1
  %49 = sdiv i32 %48, 30
  %50 = add nsw i32 %49, 1
  store i32 %50, ptr %12, align 8, !tbaa !16
  %51 = load i32, ptr %5, align 4, !tbaa !5
  %52 = load i32, ptr %6, align 4, !tbaa !5
  %53 = sdiv i32 %51, 30
  %54 = sdiv i32 %52, 30
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %9) #8
  %55 = load i32, ptr %26, align 8, !tbaa !20
  %56 = icmp eq i32 %55, -1
  %57 = select i1 %56, i32 0, i32 %54
  %storemerge.in = sub nsw i32 %53, %57
  %storemerge = add nsw i32 %storemerge.in, 1
  store i32 %storemerge, ptr %9, align 4, !tbaa !5
  %58 = sext i32 %50 to i64
  %59 = icmp slt i32 %.pre, -58
  %60 = shl nsw i64 %58, 2
  %61 = select i1 %59, i64 -1, i64 %60
  %62 = invoke noalias noundef nonnull ptr @_Znam(i64 noundef %61) #9
          to label %63 unwind label %88

63:                                               ; preds = %47
  store ptr %62, ptr %13, align 8, !tbaa !17
  %64 = sext i32 %storemerge to i64
  %65 = icmp slt i32 %storemerge.in, -1
  %66 = shl nsw i64 %64, 2
  %67 = select i1 %65, i64 -1, i64 %66
  %68 = invoke noalias noundef nonnull ptr @_Znam(i64 noundef %67) #9
          to label %69 unwind label %90

69:                                               ; preds = %63
  %70 = ptrtoint ptr %68 to i64
  br i1 %56, label %84, label %.preheader68

.preheader68:                                     ; preds = %69
  %.not5669 = icmp sgt i32 %54, %53
  br i1 %.not5669, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %.preheader68
  %71 = getelementptr inbounds i8, ptr %1, i64 24
  %72 = load ptr, ptr %71, align 8, !tbaa !21
  %73 = sext i32 %54 to i64
  %74 = add nsw i32 %53, 1
  %wide.trip.count = sext i32 %74 to i64
  %narrow = add nsw i32 %53, 1
  %narrow90 = sub nsw i32 %narrow, %54
  %75 = sext i32 %narrow90 to i64
  %min.iters.check = icmp ult i32 %narrow90, 8
  br i1 %min.iters.check, label %scalar.ph.preheader, label %vector.memcheck

scalar.ph.preheader:                              ; preds = %middle.block, %vector.memcheck, %.lr.ph
  %indvars.iv.ph = phi i64 [ %73, %vector.memcheck ], [ %73, %.lr.ph ], [ %ind.end, %middle.block ]
  br label %scalar.ph

vector.memcheck:                                  ; preds = %.lr.ph
  %76 = ptrtoint ptr %72 to i64
  %77 = shl nsw i64 %73, 2
  %78 = add i64 %77, %76
  %79 = sub i64 %70, %78
  %diff.check = icmp ult i64 %79, 32
  br i1 %diff.check, label %scalar.ph.preheader, label %vector.ph

vector.ph:                                        ; preds = %vector.memcheck
  %n.vec = and i64 %75, -8
  %ind.end = add nsw i64 %n.vec, %73
  %invariant.gep91 = getelementptr i32, ptr %72, i64 %73
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %gep92 = getelementptr i32, ptr %invariant.gep91, i64 %index
  %80 = getelementptr inbounds i8, ptr %gep92, i64 16
  %wide.load = load <4 x i32>, ptr %gep92, align 4, !tbaa !5
  %wide.load89 = load <4 x i32>, ptr %80, align 4, !tbaa !5
  %81 = getelementptr inbounds i32, ptr %68, i64 %index
  %82 = getelementptr inbounds i8, ptr %81, i64 16
  store <4 x i32> %wide.load, ptr %81, align 4, !tbaa !5
  store <4 x i32> %wide.load89, ptr %82, align 4, !tbaa !5
  %index.next = add nuw i64 %index, 8
  %83 = icmp eq i64 %index.next, %n.vec
  br i1 %83, label %middle.block, label %vector.body, !llvm.loop !22

middle.block:                                     ; preds = %vector.body
  %cmp.n = icmp eq i64 %n.vec, %75
  br i1 %cmp.n, label %._crit_edge, label %scalar.ph.preheader

84:                                               ; preds = %69
  %85 = getelementptr inbounds i8, ptr %1, i64 24
  %86 = load ptr, ptr %85, align 8, !tbaa !21
  call void @_ZN5sc_dt8vec_copyEiPjPKj(i32 noundef %storemerge, ptr noundef nonnull %68, ptr noundef %86)
  call void @_ZN5sc_dt14vec_complementEiPj(i32 noundef %storemerge, ptr noundef nonnull %68)
  %87 = load i32, ptr %6, align 4, !tbaa !5
  br label %._crit_edge.invoke

88:                                               ; preds = %47
  %89 = landingpad { ptr, i32 }
          cleanup
  br label %153

90:                                               ; preds = %._crit_edge.invoke, %150, %99, %63
  %91 = landingpad { ptr, i32 }
          cleanup
  br label %153

._crit_edge:                                      ; preds = %scalar.ph, %middle.block, %.preheader68
  %.neg = mul nsw i32 %54, -30
  %92 = add i32 %.neg, %52
  br label %._crit_edge.invoke

._crit_edge.invoke:                               ; preds = %84, %._crit_edge
  %93 = phi i32 [ %92, %._crit_edge ], [ %87, %84 ]
  %94 = phi i32 [ 0, %._crit_edge ], [ 1073741823, %84 ]
  invoke void @_ZN5sc_dt15vec_shift_rightEiPjij(i32 noundef %storemerge, ptr noundef nonnull %68, i32 noundef %93, i32 noundef %94)
          to label %99 unwind label %90

scalar.ph:                                        ; preds = %scalar.ph.preheader, %scalar.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %scalar.ph ], [ %indvars.iv.ph, %scalar.ph.preheader ]
  %95 = getelementptr inbounds i32, ptr %72, i64 %indvars.iv
  %96 = load i32, ptr %95, align 4, !tbaa !5
  %97 = sub nsw i64 %indvars.iv, %73
  %98 = getelementptr inbounds i32, ptr %68, i64 %97
  store i32 %96, ptr %98, align 4, !tbaa !5
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %scalar.ph, !llvm.loop !26

99:                                               ; preds = %._crit_edge.invoke
  %100 = load i32, ptr %12, align 8, !tbaa !16
  %101 = load ptr, ptr %13, align 8, !tbaa !17
  invoke void @_ZN5sc_dt8vec_zeroEiPj(i32 noundef %100, ptr noundef %101)
          to label %102 unwind label %90

102:                                              ; preds = %99
  br i1 %14, label %106, label %103

103:                                              ; preds = %102
  %104 = call noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %9, ptr noundef nonnull align 4 dereferenceable(4) %12)
  %105 = load ptr, ptr %13, align 8, !tbaa !17
  call void @_ZN5sc_dt8vec_copyEiPjPKj(i32 noundef %104, ptr noundef %105, ptr noundef nonnull %68)
  br label %150

106:                                              ; preds = %102
  %107 = load i32, ptr %5, align 4, !tbaa !5
  %108 = load i32, ptr %6, align 4, !tbaa !5
  %109 = sub nsw i32 %107, %108
  %110 = call noundef i32 @_ZN5sc_dt7bit_ordEi(i32 noundef %109)
  %111 = call noundef i32 @_ZN5sc_dt13one_and_zerosEi(i32 noundef %110)
  %.not5771 = icmp eq i32 %111, 0
  br i1 %.not5771, label %._crit_edge75, label %.lr.ph74

.lr.ph74:                                         ; preds = %106
  %invariant.gep = getelementptr i8, ptr %68, i64 -4
  %gep = getelementptr i32, ptr %invariant.gep, i64 %64
  br label %112

112:                                              ; preds = %.lr.ph74, %119
  %.04572 = phi i32 [ %111, %.lr.ph74 ], [ %120, %119 ]
  %113 = load i32, ptr %12, align 8, !tbaa !16
  %114 = load ptr, ptr %13, align 8, !tbaa !17
  %115 = load i32, ptr %gep, align 4, !tbaa !5
  %116 = and i32 %115, %.04572
  %117 = icmp ne i32 %116, 0
  %118 = zext i1 %117 to i32
  invoke void @_ZN5sc_dt15vec_shift_rightEiPjij(i32 noundef %113, ptr noundef %114, i32 noundef 1, i32 noundef %118)
          to label %119 unwind label %121

119:                                              ; preds = %112
  %120 = lshr i32 %.04572, 1
  %.not57 = icmp ult i32 %.04572, 2
  br i1 %.not57, label %._crit_edge75, label %112, !llvm.loop !27

121:                                              ; preds = %112
  %122 = landingpad { ptr, i32 }
          cleanup
  br label %153

._crit_edge75:                                    ; preds = %119, %106
  %123 = call noundef i32 @_ZN5sc_dt13one_and_zerosEi(i32 noundef 29)
  %124 = icmp slt i32 %storemerge.in, 1
  %.not5876 = icmp eq i32 %123, 0
  %or.cond = or i1 %124, %.not5876
  br i1 %or.cond, label %._crit_edge81, label %.preheader.preheader

.preheader.preheader:                             ; preds = %._crit_edge75
  %125 = add nsw i32 %storemerge.in, -1
  %126 = zext nneg i32 %125 to i64
  br label %.preheader

.preheader:                                       ; preds = %.preheader.preheader, %._crit_edge79
  %indvars.iv84 = phi i64 [ %126, %.preheader.preheader ], [ %indvars.iv.next85, %._crit_edge79 ]
  %127 = getelementptr inbounds i32, ptr %68, i64 %indvars.iv84
  br label %138

._crit_edge81:                                    ; preds = %._crit_edge79, %._crit_edge75
  %128 = load i32, ptr %26, align 8, !tbaa !20
  %129 = icmp eq i32 %128, -1
  %130 = load i32, ptr %12, align 8, !tbaa !16
  %131 = load ptr, ptr %13, align 8, !tbaa !17
  %132 = mul nsw i32 %130, 30
  %133 = call noundef i32 @_ZNK5sc_dt9sc_signed6lengthEv(ptr noundef nonnull align 8 dereferenceable(32) %0)
  %134 = sub nsw i32 %132, %133
  %135 = select i1 %129, i32 1073741823, i32 0
  invoke void @_ZN5sc_dt15vec_shift_rightEiPjij(i32 noundef %130, ptr noundef %131, i32 noundef %134, i32 noundef %135)
          to label %150 unwind label %136

136:                                              ; preds = %._crit_edge81
  %137 = landingpad { ptr, i32 }
          cleanup
  br label %153

138:                                              ; preds = %.preheader, %145
  %.177 = phi i32 [ %123, %.preheader ], [ %146, %145 ]
  %139 = load i32, ptr %12, align 8, !tbaa !16
  %140 = load ptr, ptr %13, align 8, !tbaa !17
  %141 = load i32, ptr %127, align 4, !tbaa !5
  %142 = and i32 %141, %.177
  %143 = icmp ne i32 %142, 0
  %144 = zext i1 %143 to i32
  invoke void @_ZN5sc_dt15vec_shift_rightEiPjij(i32 noundef %139, ptr noundef %140, i32 noundef 1, i32 noundef %144)
          to label %145 unwind label %147

145:                                              ; preds = %138
  %146 = lshr i32 %.177, 1
  %.not58 = icmp ult i32 %.177, 2
  br i1 %.not58, label %._crit_edge79, label %138, !llvm.loop !28

147:                                              ; preds = %138
  %148 = landingpad { ptr, i32 }
          cleanup
  br label %153

._crit_edge79:                                    ; preds = %145
  %indvars.iv.next85 = add nsw i64 %indvars.iv84, -1
  %149 = icmp sgt i64 %indvars.iv84, 0
  br i1 %149, label %.preheader, label %._crit_edge81, !llvm.loop !29

150:                                              ; preds = %._crit_edge81, %103
  invoke void @_ZN5sc_dt9sc_signed16convert_2C_to_SMEv(ptr noundef nonnull align 8 dereferenceable(32) %0)
          to label %151 unwind label %90

151:                                              ; preds = %150
  call void @_ZdaPv(ptr noundef nonnull %68) #10
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %9) #8
  br label %152

152:                                              ; preds = %46, %151
  ret void

153:                                              ; preds = %90, %136, %147, %121, %88
  %.pn60.pn.pn = phi { ptr, i32 } [ %89, %88 ], [ %91, %90 ], [ %122, %121 ], [ %148, %147 ], [ %137, %136 ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %9) #8
  br label %154

154:                                              ; preds = %153, %36
  %.pn65 = phi { ptr, i32 } [ %37, %36 ], [ %.pn60.pn.pn, %153 ]
  call void @_ZN5sc_dt13sc_value_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(8) %0) #8
  resume { ptr, i32 } %.pn65
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt13sc_value_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #1 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { nounwind }
attributes #9 = { builtin allocsize(0) }
attributes #10 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"vtable pointer", !8, i64 0}
!11 = !{!12, !6, i64 8}
!12 = !{!"_ZTSN5sc_dt9sc_signedE", !13, i64 0, !6, i64 8, !6, i64 12, !6, i64 16, !14, i64 24}
!13 = !{!"_ZTSN5sc_dt13sc_value_baseE"}
!14 = !{!"any pointer", !7, i64 0}
!15 = !{!12, !6, i64 12}
!16 = !{!12, !6, i64 16}
!17 = !{!12, !14, i64 24}
!18 = !{!19, !6, i64 12}
!19 = !{!"_ZTSN5sc_dt11sc_unsignedE", !13, i64 0, !6, i64 8, !6, i64 12, !6, i64 16, !14, i64 24}
!20 = !{!19, !6, i64 8}
!21 = !{!19, !14, i64 24}
!22 = distinct !{!22, !23, !24, !25}
!23 = !{!"llvm.loop.mustprogress"}
!24 = !{!"llvm.loop.isvectorized", i32 1}
!25 = !{!"llvm.loop.unroll.runtime.disable"}
!26 = distinct !{!26, !23, !24}
!27 = distinct !{!27, !23}
!28 = distinct !{!28, !23}
!29 = distinct !{!29, !23}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass