; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/datatypes/int (sc_signed)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::sc_signed_subref_r" = type <{ %"class.sc_dt::sc_value_base", i32, [4 x i8], ptr, i32, [4 x i8] }>
%"class.sc_dt::sc_value_base" = type { ptr }
%"class.sc_dt::sc_unsigned" = type { %"class.sc_dt::sc_value_base", i32, i32, i32, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt9sc_signed3setEib(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef, i1 noundef zeroext) #2 align 2

declare noundef zeroext i1 @_ZNK5sc_dt11sc_unsigned4testEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) #3

; Function Attrs: mustprogress uwtable
define dso_local noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt16sc_signed_subrefaSERKNS_11sc_unsignedE(ptr noundef nonnull align 8 dereferenceable(28) %0, ptr noundef nonnull align 8 dereferenceable(32) %1) #2 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %8 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  %9 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %8, i32 0, i32 1
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  %10 = load ptr, ptr %4, align 8, !tbaa !5
  %11 = getelementptr inbounds %"class.sc_dt::sc_unsigned", ptr %10, i32 0, i32 2
  %12 = load i32, ptr %11, align 4, !tbaa !9
  %13 = sub nsw i32 %12, 1
  %14 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %8, i32 0, i32 4
  %15 = load i32, ptr %14, align 8, !tbaa !13
  %16 = add nsw i32 %13, %15
  store i32 %16, ptr %7, align 4, !tbaa !15
  %17 = call noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %9, ptr noundef nonnull align 4 dereferenceable(4) %7)
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  store i32 %17, ptr %6, align 4, !tbaa !15
  %18 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %8, i32 0, i32 4
  %19 = load i32, ptr %18, align 8, !tbaa !13
  store i32 %19, ptr %5, align 4, !tbaa !15
  br label %20

20:                                               ; preds = %34, %2
  %21 = load i32, ptr %5, align 4, !tbaa !15
  %22 = load i32, ptr %6, align 4, !tbaa !15
  %23 = icmp sle i32 %21, %22
  br i1 %23, label %24, label %37

24:                                               ; preds = %20
  %25 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %8, i32 0, i32 3
  %26 = load ptr, ptr %25, align 8, !tbaa !16
  %27 = load i32, ptr %5, align 4, !tbaa !15
  %28 = load ptr, ptr %4, align 8, !tbaa !5
  %29 = load i32, ptr %5, align 4, !tbaa !15
  %30 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %8, i32 0, i32 4
  %31 = load i32, ptr %30, align 8, !tbaa !13
  %32 = sub nsw i32 %29, %31
  %33 = call noundef zeroext i1 @_ZNK5sc_dt11sc_unsigned4testEi(ptr noundef nonnull align 8 dereferenceable(32) %28, i32 noundef %32)
  call void @_ZN5sc_dt9sc_signed3setEib(ptr noundef nonnull align 8 dereferenceable(32) %26, i32 noundef %27, i1 noundef zeroext %33)
  br label %34

34:                                               ; preds = %24
  %35 = load i32, ptr %5, align 4, !tbaa !15
  %36 = add nsw i32 %35, 1
  store i32 %36, ptr %5, align 4, !tbaa !15
  br label %20, !llvm.loop !17

37:                                               ; preds = %20
  br label %38

38:                                               ; preds = %47, %37
  %39 = load i32, ptr %5, align 4, !tbaa !15
  %40 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %8, i32 0, i32 1
  %41 = load i32, ptr %40, align 8, !tbaa !19
  %42 = icmp sle i32 %39, %41
  br i1 %42, label %43, label %50

43:                                               ; preds = %38
  %44 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %8, i32 0, i32 3
  %45 = load ptr, ptr %44, align 8, !tbaa !16
  %46 = load i32, ptr %5, align 4, !tbaa !15
  call void @_ZN5sc_dt9sc_signed3setEib(ptr noundef nonnull align 8 dereferenceable(32) %45, i32 noundef %46, i1 noundef zeroext false)
  br label %47

47:                                               ; preds = %43
  %48 = load i32, ptr %5, align 4, !tbaa !15
  %49 = add nsw i32 %48, 1
  store i32 %49, ptr %5, align 4, !tbaa !15
  br label %38, !llvm.loop !20

50:                                               ; preds = %38
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  ret ptr %8
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !12, i64 12}
!10 = !{!"_ZTSN5sc_dt11sc_unsignedE", !11, i64 0, !12, i64 8, !12, i64 12, !12, i64 16, !6, i64 24}
!11 = !{!"_ZTSN5sc_dt13sc_value_baseE"}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !12, i64 24}
!14 = !{!"_ZTSN5sc_dt18sc_signed_subref_rE", !11, i64 0, !12, i64 8, !6, i64 16, !12, i64 24}
!15 = !{!12, !12, i64 0}
!16 = !{!14, !6, i64 16}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = !{!14, !12, i64 8}
!20 = distinct !{!20, !18}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt9sc_signed3setEib(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef, i1 noundef zeroext) local_unnamed_addr #2 align 2

declare noundef zeroext i1 @_ZNK5sc_dt11sc_unsigned4testEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
define dso_local noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt16sc_signed_subrefaSERKNS_11sc_unsignedE(ptr noundef nonnull returned align 8 dereferenceable(28) %0, ptr noundef nonnull align 8 dereferenceable(32) %1) local_unnamed_addr #2 align 2 {
  %3 = alloca i32, align 4
  %4 = getelementptr inbounds i8, ptr %0, i64 8
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #4
  %5 = getelementptr inbounds i8, ptr %1, i64 12
  %6 = load i32, ptr %5, align 4, !tbaa !5
  %7 = add nsw i32 %6, -1
  %8 = getelementptr inbounds i8, ptr %0, i64 24
  %9 = load i32, ptr %8, align 8, !tbaa !12
  %10 = add nsw i32 %7, %9
  store i32 %10, ptr %3, align 4, !tbaa !14
  %11 = call noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %4, ptr noundef nonnull align 4 dereferenceable(4) %3)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #4
  %12 = load i32, ptr %8, align 8, !tbaa !12
  %.not11 = icmp sgt i32 %12, %11
  br i1 %.not11, label %.preheader, label %.lr.ph

.lr.ph:                                           ; preds = %2
  %13 = getelementptr inbounds i8, ptr %0, i64 16
  %14 = add i32 %11, 1
  br label %17

.preheader:                                       ; preds = %17, %2
  %.0.lcssa = phi i32 [ %12, %2 ], [ %14, %17 ]
  %15 = load i32, ptr %4, align 8, !tbaa !15
  %.not1013 = icmp sgt i32 %.0.lcssa, %15
  br i1 %.not1013, label %._crit_edge, label %.lr.ph15

.lr.ph15:                                         ; preds = %.preheader
  %16 = getelementptr inbounds i8, ptr %0, i64 16
  br label %23

17:                                               ; preds = %.lr.ph, %17
  %.012 = phi i32 [ %12, %.lr.ph ], [ %22, %17 ]
  %18 = load ptr, ptr %13, align 8, !tbaa !16
  %19 = load i32, ptr %8, align 8, !tbaa !12
  %20 = sub nsw i32 %.012, %19
  %21 = call noundef zeroext i1 @_ZNK5sc_dt11sc_unsigned4testEi(ptr noundef nonnull align 8 dereferenceable(32) %1, i32 noundef %20)
  call void @_ZN5sc_dt9sc_signed3setEib(ptr noundef nonnull align 8 dereferenceable(32) %18, i32 noundef %.012, i1 noundef zeroext %21)
  %22 = add i32 %.012, 1
  %exitcond.not = icmp eq i32 %.012, %11
  br i1 %exitcond.not, label %.preheader, label %17, !llvm.loop !17

23:                                               ; preds = %.lr.ph15, %23
  %.114 = phi i32 [ %.0.lcssa, %.lr.ph15 ], [ %25, %23 ]
  %24 = load ptr, ptr %16, align 8, !tbaa !16
  call void @_ZN5sc_dt9sc_signed3setEib(ptr noundef nonnull align 8 dereferenceable(32) %24, i32 noundef %.114, i1 noundef zeroext false)
  %25 = add nsw i32 %.114, 1
  %26 = load i32, ptr %4, align 8, !tbaa !15
  %.not10.not = icmp slt i32 %.114, %26
  br i1 %.not10.not, label %23, label %._crit_edge, !llvm.loop !19

._crit_edge:                                      ; preds = %23, %.preheader
  ret ptr %0
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 12}
!6 = !{!"_ZTSN5sc_dt11sc_unsignedE", !7, i64 0, !8, i64 8, !8, i64 12, !8, i64 16, !11, i64 24}
!7 = !{!"_ZTSN5sc_dt13sc_value_baseE"}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !8, i64 24}
!13 = !{!"_ZTSN5sc_dt18sc_signed_subref_rE", !7, i64 0, !8, i64 8, !11, i64 16, !8, i64 24}
!14 = !{!8, !8, i64 0}
!15 = !{!13, !8, i64 8}
!16 = !{!13, !11, i64 16}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = distinct !{!19, !18}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass