; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Bus/Pci (WriteNvmeControllerConfiguration)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct._NVME_CONTROLLER_PRIVATE_DATA = type { i32, ptr, ptr, ptr, ptr, i64, ptr, %struct.NVM_EXPRESS_PASS_THRU_MODE, %struct._NVM_EXPRESS_PASS_THRU_PROTOCOL, ptr, ptr, ptr, [2 x ptr], [2 x ptr], [2 x ptr], [2 x ptr], [2 x %struct.NVME_SQTDBL], [2 x %struct.NVME_CQHDBL], [2 x i8], [2 x i16], %struct.NVME_CAP, ptr }
%struct.NVM_EXPRESS_PASS_THRU_MODE = type { i32, i32, i32, i32, i64, i32 }
%struct._NVM_EXPRESS_PASS_THRU_PROTOCOL = type { ptr, ptr, ptr, ptr, ptr }
%struct.NVME_SQTDBL = type { i16, i16 }
%struct.NVME_CQHDBL = type { i16, i16 }
%struct.NVME_CAP = type { i16, i8, i8, i16, i8, i8 }
%struct._EFI_PCI_IO_PROTOCOL = type { ptr, ptr, %struct.EFI_PCI_IO_PROTOCOL_ACCESS, %struct.EFI_PCI_IO_PROTOCOL_ACCESS, %struct.EFI_PCI_IO_PROTOCOL_CONFIG_ACCESS, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i64, ptr }
%struct.EFI_PCI_IO_PROTOCOL_ACCESS = type { ptr, ptr }
%struct.EFI_PCI_IO_PROTOCOL_CONFIG_ACCESS = type { ptr, ptr }
%struct.NVME_CC = type { i16, i8, i8 }

@.str = external hidden unnamed_addr constant [11 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [12 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [12 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [12 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [12 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [15 x i8], align 1
@.str.6 = external hidden unnamed_addr constant [15 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i64 @WriteNvmeControllerConfiguration(ptr noundef %0, ptr noundef %1) #1 {
  %3 = alloca i64, align 8
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i64, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %10 = load ptr, ptr %4, align 8, !tbaa !5
  %11 = getelementptr inbounds %struct._NVME_CONTROLLER_PRIVATE_DATA, ptr %10, i32 0, i32 4
  %12 = load ptr, ptr %11, align 8, !tbaa !9
  store ptr %12, ptr %6, align 8, !tbaa !5
  %13 = load ptr, ptr %5, align 8, !tbaa !5
  %14 = call i32 @ReadUnaligned32(ptr noundef %13)
  store i32 %14, ptr %8, align 4, !tbaa !17
  %15 = load ptr, ptr %6, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct._EFI_PCI_IO_PROTOCOL, ptr %15, i32 0, i32 2
  %17 = getelementptr inbounds %struct.EFI_PCI_IO_PROTOCOL_ACCESS, ptr %16, i32 0, i32 1
  %18 = load ptr, ptr %17, align 8, !tbaa !18
  %19 = load ptr, ptr %6, align 8, !tbaa !5
  %20 = call i64 %18(ptr noundef %19, i32 noundef 2, i8 noundef zeroext 0, i64 noundef 20, i64 noundef 1, ptr noundef %8)
  store i64 %20, ptr %7, align 8, !tbaa !21
  %21 = load i64, ptr %7, align 8, !tbaa !21
  %22 = icmp slt i64 %21, 0
  br i1 %22, label %23, label %25

23:                                               ; preds = %2
  %24 = load i64, ptr %7, align 8, !tbaa !21
  store i64 %24, ptr %3, align 8
  store i32 1, ptr %9, align 4
  br label %157

25:                                               ; preds = %2
  br label %26

26:                                               ; preds = %25
  %27 = call zeroext i8 @DebugPrintEnabled()
  %28 = icmp ne i8 %27, 0
  br i1 %28, label %29, label %41

29:                                               ; preds = %26
  br label %30

30:                                               ; preds = %29
  %31 = call zeroext i8 @DebugPrintLevelEnabled(i64 noundef 64)
  %32 = icmp ne i8 %31, 0
  br i1 %32, label %33, label %38

33:                                               ; preds = %30
  %34 = load ptr, ptr %5, align 8, !tbaa !5
  %35 = load i16, ptr %34, align 1
  %36 = and i16 %35, 1
  %37 = zext i16 %36 to i32
  call void (i64, ptr, ...) @DebugPrint(i64 noundef 64, ptr noundef @.str, i32 noundef %37)
  br label %38

38:                                               ; preds = %33, %30
  br label %39

39:                                               ; preds = %38
  br label %40

40:                                               ; preds = %39
  br label %41

41:                                               ; preds = %40, %26
  br label %42

42:                                               ; preds = %41
  br label %43

43:                                               ; preds = %42
  br label %44

44:                                               ; preds = %43
  %45 = call zeroext i8 @DebugPrintEnabled()
  %46 = icmp ne i8 %45, 0
  br i1 %46, label %47, label %60

47:                                               ; preds = %44
  br label %48

48:                                               ; preds = %47
  %49 = call zeroext i8 @DebugPrintLevelEnabled(i64 noundef 64)
  %50 = icmp ne i8 %49, 0
  br i1 %50, label %51, label %57

51:                                               ; preds = %48
  %52 = load ptr, ptr %5, align 8, !tbaa !5
  %53 = load i16, ptr %52, align 1
  %54 = lshr i16 %53, 4
  %55 = and i16 %54, 7
  %56 = zext i16 %55 to i32
  call void (i64, ptr, ...) @DebugPrint(i64 noundef 64, ptr noundef @.str.1, i32 noundef %56)
  br label %57

57:                                               ; preds = %51, %48
  br label %58

58:                                               ; preds = %57
  br label %59

59:                                               ; preds = %58
  br label %60

60:                                               ; preds = %59, %44
  br label %61

61:                                               ; preds = %60
  br label %62

62:                                               ; preds = %61
  br label %63

63:                                               ; preds = %62
  %64 = call zeroext i8 @DebugPrintEnabled()
  %65 = icmp ne i8 %64, 0
  br i1 %65, label %66, label %79

66:                                               ; preds = %63
  br label %67

67:                                               ; preds = %66
  %68 = call zeroext i8 @DebugPrintLevelEnabled(i64 noundef 64)
  %69 = icmp ne i8 %68, 0
  br i1 %69, label %70, label %76

70:                                               ; preds = %67
  %71 = load ptr, ptr %5, align 8, !tbaa !5
  %72 = load i16, ptr %71, align 1
  %73 = lshr i16 %72, 7
  %74 = and i16 %73, 15
  %75 = zext i16 %74 to i32
  call void (i64, ptr, ...) @DebugPrint(i64 noundef 64, ptr noundef @.str.2, i32 noundef %75)
  br label %76

76:                                               ; preds = %70, %67
  br label %77

77:                                               ; preds = %76
  br label %78

78:                                               ; preds = %77
  br label %79

79:                                               ; preds = %78, %63
  br label %80

80:                                               ; preds = %79
  br label %81

81:                                               ; preds = %80
  br label %82

82:                                               ; preds = %81
  %83 = call zeroext i8 @DebugPrintEnabled()
  %84 = icmp ne i8 %83, 0
  br i1 %84, label %85, label %98

85:                                               ; preds = %82
  br label %86

86:                                               ; preds = %85
  %87 = call zeroext i8 @DebugPrintLevelEnabled(i64 noundef 64)
  %88 = icmp ne i8 %87, 0
  br i1 %88, label %89, label %95

89:                                               ; preds = %86
  %90 = load ptr, ptr %5, align 8, !tbaa !5
  %91 = load i16, ptr %90, align 1
  %92 = lshr i16 %91, 11
  %93 = and i16 %92, 7
  %94 = zext i16 %93 to i32
  call void (i64, ptr, ...) @DebugPrint(i64 noundef 64, ptr noundef @.str.3, i32 noundef %94)
  br label %95

95:                                               ; preds = %89, %86
  br label %96

96:                                               ; preds = %95
  br label %97

97:                                               ; preds = %96
  br label %98

98:                                               ; preds = %97, %82
  br label %99

99:                                               ; preds = %98
  br label %100

100:                                              ; preds = %99
  br label %101

101:                                              ; preds = %100
  %102 = call zeroext i8 @DebugPrintEnabled()
  %103 = icmp ne i8 %102, 0
  br i1 %103, label %104, label %116

104:                                              ; preds = %101
  br label %105

105:                                              ; preds = %104
  %106 = call zeroext i8 @DebugPrintLevelEnabled(i64 noundef 64)
  %107 = icmp ne i8 %106, 0
  br i1 %107, label %108, label %113

108:                                              ; preds = %105
  %109 = load ptr, ptr %5, align 8, !tbaa !5
  %110 = load i16, ptr %109, align 1
  %111 = lshr i16 %110, 14
  %112 = zext i16 %111 to i32
  call void (i64, ptr, ...) @DebugPrint(i64 noundef 64, ptr noundef @.str.4, i32 noundef %112)
  br label %113

113:                                              ; preds = %108, %105
  br label %114

114:                                              ; preds = %113
  br label %115

115:                                              ; preds = %114
  br label %116

116:                                              ; preds = %115, %101
  br label %117

117:                                              ; preds = %116
  br label %118

118:                                              ; preds = %117
  br label %119

119:                                              ; preds = %118
  %120 = call zeroext i8 @DebugPrintEnabled()
  %121 = icmp ne i8 %120, 0
  br i1 %121, label %122, label %135

122:                                              ; preds = %119
  br label %123

123:                                              ; preds = %122
  %124 = call zeroext i8 @DebugPrintLevelEnabled(i64 noundef 64)
  %125 = icmp ne i8 %124, 0
  br i1 %125, label %126, label %132

126:                                              ; preds = %123
  %127 = load ptr, ptr %5, align 8, !tbaa !5
  %128 = getelementptr inbounds %struct.NVME_CC, ptr %127, i32 0, i32 1
  %129 = load i8, ptr %128, align 1
  %130 = and i8 %129, 15
  %131 = zext i8 %130 to i32
  call void (i64, ptr, ...) @DebugPrint(i64 noundef 64, ptr noundef @.str.5, i32 noundef %131)
  br label %132

132:                                              ; preds = %126, %123
  br label %133

133:                                              ; preds = %132
  br label %134

134:                                              ; preds = %133
  br label %135

135:                                              ; preds = %134, %119
  br label %136

136:                                              ; preds = %135
  br label %137

137:                                              ; preds = %136
  br label %138

138:                                              ; preds = %137
  %139 = call zeroext i8 @DebugPrintEnabled()
  %140 = icmp ne i8 %139, 0
  br i1 %140, label %141, label %154

141:                                              ; preds = %138
  br label %142

142:                                              ; preds = %141
  %143 = call zeroext i8 @DebugPrintLevelEnabled(i64 noundef 64)
  %144 = icmp ne i8 %143, 0
  br i1 %144, label %145, label %151

145:                                              ; preds = %142
  %146 = load ptr, ptr %5, align 8, !tbaa !5
  %147 = getelementptr inbounds %struct.NVME_CC, ptr %146, i32 0, i32 1
  %148 = load i8, ptr %147, align 1
  %149 = lshr i8 %148, 4
  %150 = zext i8 %149 to i32
  call void (i64, ptr, ...) @DebugPrint(i64 noundef 64, ptr noundef @.str.6, i32 noundef %150)
  br label %151

151:                                              ; preds = %145, %142
  br label %152

152:                                              ; preds = %151
  br label %153

153:                                              ; preds = %152
  br label %154

154:                                              ; preds = %153, %138
  br label %155

155:                                              ; preds = %154
  br label %156

156:                                              ; preds = %155
  store i64 0, ptr %3, align 8
  store i32 1, ptr %9, align 4
  br label %157

157:                                              ; preds = %156, %23
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  %158 = load i64, ptr %3, align 8
  ret i64 %158
}

declare i32 @ReadUnaligned32(ptr noundef) #2

declare zeroext i8 @DebugPrintEnabled() #2

declare zeroext i8 @DebugPrintLevelEnabled(i64 noundef) #2

declare void @DebugPrint(i64 noundef, ptr noundef, ...) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 32}
!10 = !{!"_NVME_CONTROLLER_PRIVATE_DATA", !11, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !12, i64 40, !6, i64 48, !13, i64 56, !14, i64 88, !6, i64 128, !6, i64 136, !6, i64 144, !7, i64 152, !7, i64 168, !7, i64 184, !7, i64 200, !7, i64 216, !7, i64 224, !7, i64 232, !7, i64 234, !15, i64 238, !6, i64 248}
!11 = !{!"int", !7, i64 0}
!12 = !{!"long long", !7, i64 0}
!13 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !12, i64 16, !11, i64 24}
!14 = !{!"_NVM_EXPRESS_PASS_THRU_PROTOCOL", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32}
!15 = !{!"", !16, i64 0, !7, i64 2, !7, i64 2, !7, i64 2, !7, i64 3, !16, i64 4, !16, i64 4, !16, i64 4, !16, i64 5, !7, i64 6, !7, i64 6, !7, i64 7}
!16 = !{!"short", !7, i64 0}
!17 = !{!11, !11, i64 0}
!18 = !{!19, !6, i64 24}
!19 = !{!"_EFI_PCI_IO_PROTOCOL", !6, i64 0, !6, i64 8, !20, i64 16, !20, i64 32, !20, i64 48, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !6, i64 120, !6, i64 128, !6, i64 136, !12, i64 144, !6, i64 152}
!20 = !{!"", !6, i64 0, !6, i64 8}
!21 = !{!12, !12, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [11 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [12 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [12 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [12 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [12 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [15 x i8], align 1
@.str.6 = external hidden unnamed_addr constant [15 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local range(i64 -9223372036854775808, 1) i64 @WriteNvmeControllerConfiguration(ptr nocapture noundef readonly %0, ptr noundef %1) local_unnamed_addr #1 {
  %3 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
  %4 = getelementptr inbounds i8, ptr %0, i64 32
  %5 = load ptr, ptr %4, align 8, !tbaa !5
  %6 = tail call i32 @ReadUnaligned32(ptr noundef %1) #3
  store i32 %6, ptr %3, align 4, !tbaa !16
  %7 = getelementptr inbounds i8, ptr %5, i64 24
  %8 = load ptr, ptr %7, align 8, !tbaa !17
  %9 = call i64 %8(ptr noundef %5, i32 noundef 2, i8 noundef zeroext 0, i64 noundef 20, i64 noundef 1, ptr noundef nonnull %3) #3
  %10 = icmp slt i64 %9, 0
  br i1 %10, label %72, label %11

11:                                               ; preds = %2
  %12 = call zeroext i8 @DebugPrintEnabled() #3
  %.not = icmp eq i8 %12, 0
  br i1 %.not, label %19, label %13

13:                                               ; preds = %11
  %14 = call zeroext i8 @DebugPrintLevelEnabled(i64 noundef 64) #3
  %.not14 = icmp eq i8 %14, 0
  br i1 %.not14, label %19, label %15

15:                                               ; preds = %13
  %16 = load i16, ptr %1, align 1
  %17 = and i16 %16, 1
  %18 = zext nneg i16 %17 to i32
  call void (i64, ptr, ...) @DebugPrint(i64 noundef 64, ptr noundef nonnull @.str, i32 noundef %18) #3
  br label %19

19:                                               ; preds = %11, %15, %13
  %20 = call zeroext i8 @DebugPrintEnabled() #3
  %.not15 = icmp eq i8 %20, 0
  br i1 %.not15, label %28, label %21

21:                                               ; preds = %19
  %22 = call zeroext i8 @DebugPrintLevelEnabled(i64 noundef 64) #3
  %.not16 = icmp eq i8 %22, 0
  br i1 %.not16, label %28, label %23

23:                                               ; preds = %21
  %24 = load i16, ptr %1, align 1
  %25 = lshr i16 %24, 4
  %26 = and i16 %25, 7
  %27 = zext nneg i16 %26 to i32
  call void (i64, ptr, ...) @DebugPrint(i64 noundef 64, ptr noundef nonnull @.str.1, i32 noundef %27) #3
  br label %28

28:                                               ; preds = %19, %23, %21
  %29 = call zeroext i8 @DebugPrintEnabled() #3
  %.not17 = icmp eq i8 %29, 0
  br i1 %.not17, label %37, label %30

30:                                               ; preds = %28
  %31 = call zeroext i8 @DebugPrintLevelEnabled(i64 noundef 64) #3
  %.not18 = icmp eq i8 %31, 0
  br i1 %.not18, label %37, label %32

32:                                               ; preds = %30
  %33 = load i16, ptr %1, align 1
  %34 = lshr i16 %33, 7
  %35 = and i16 %34, 15
  %36 = zext nneg i16 %35 to i32
  call void (i64, ptr, ...) @DebugPrint(i64 noundef 64, ptr noundef nonnull @.str.2, i32 noundef %36) #3
  br label %37

37:                                               ; preds = %28, %32, %30
  %38 = call zeroext i8 @DebugPrintEnabled() #3
  %.not19 = icmp eq i8 %38, 0
  br i1 %.not19, label %46, label %39

39:                                               ; preds = %37
  %40 = call zeroext i8 @DebugPrintLevelEnabled(i64 noundef 64) #3
  %.not20 = icmp eq i8 %40, 0
  br i1 %.not20, label %46, label %41

41:                                               ; preds = %39
  %42 = load i16, ptr %1, align 1
  %43 = lshr i16 %42, 11
  %44 = and i16 %43, 7
  %45 = zext nneg i16 %44 to i32
  call void (i64, ptr, ...) @DebugPrint(i64 noundef 64, ptr noundef nonnull @.str.3, i32 noundef %45) #3
  br label %46

46:                                               ; preds = %37, %41, %39
  %47 = call zeroext i8 @DebugPrintEnabled() #3
  %.not21 = icmp eq i8 %47, 0
  br i1 %.not21, label %54, label %48

48:                                               ; preds = %46
  %49 = call zeroext i8 @DebugPrintLevelEnabled(i64 noundef 64) #3
  %.not22 = icmp eq i8 %49, 0
  br i1 %.not22, label %54, label %50

50:                                               ; preds = %48
  %51 = load i16, ptr %1, align 1
  %52 = lshr i16 %51, 14
  %53 = zext nneg i16 %52 to i32
  call void (i64, ptr, ...) @DebugPrint(i64 noundef 64, ptr noundef nonnull @.str.4, i32 noundef %53) #3
  br label %54

54:                                               ; preds = %46, %50, %48
  %55 = call zeroext i8 @DebugPrintEnabled() #3
  %.not23 = icmp eq i8 %55, 0
  br i1 %.not23, label %63, label %56

56:                                               ; preds = %54
  %57 = call zeroext i8 @DebugPrintLevelEnabled(i64 noundef 64) #3
  %.not24 = icmp eq i8 %57, 0
  br i1 %.not24, label %63, label %58

58:                                               ; preds = %56
  %59 = getelementptr inbounds i8, ptr %1, i64 2
  %60 = load i8, ptr %59, align 1
  %61 = and i8 %60, 15
  %62 = zext nneg i8 %61 to i32
  call void (i64, ptr, ...) @DebugPrint(i64 noundef 64, ptr noundef nonnull @.str.5, i32 noundef %62) #3
  br label %63

63:                                               ; preds = %54, %58, %56
  %64 = call zeroext i8 @DebugPrintEnabled() #3
  %.not25 = icmp eq i8 %64, 0
  br i1 %.not25, label %72, label %65

65:                                               ; preds = %63
  %66 = call zeroext i8 @DebugPrintLevelEnabled(i64 noundef 64) #3
  %.not26 = icmp eq i8 %66, 0
  br i1 %.not26, label %72, label %67

67:                                               ; preds = %65
  %68 = getelementptr inbounds i8, ptr %1, i64 2
  %69 = load i8, ptr %68, align 1
  %70 = lshr i8 %69, 4
  %71 = zext nneg i8 %70 to i32
  call void (i64, ptr, ...) @DebugPrint(i64 noundef 64, ptr noundef nonnull @.str.6, i32 noundef %71) #3
  br label %72

72:                                               ; preds = %63, %67, %65, %2
  %.0 = phi i64 [ %9, %2 ], [ 0, %65 ], [ 0, %67 ], [ 0, %63 ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
  ret i64 %.0
}

declare i32 @ReadUnaligned32(ptr noundef) local_unnamed_addr #2

declare zeroext i8 @DebugPrintEnabled() local_unnamed_addr #2

declare zeroext i8 @DebugPrintLevelEnabled(i64 noundef) local_unnamed_addr #2

declare void @DebugPrint(i64 noundef, ptr noundef, ...) local_unnamed_addr #2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 32}
!6 = !{!"_NVME_CONTROLLER_PRIVATE_DATA", !7, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !11, i64 40, !10, i64 48, !12, i64 56, !13, i64 88, !10, i64 128, !10, i64 136, !10, i64 144, !8, i64 152, !8, i64 168, !8, i64 184, !8, i64 200, !8, i64 216, !8, i64 224, !8, i64 232, !8, i64 234, !14, i64 238, !10, i64 248}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!"long long", !8, i64 0}
!12 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !11, i64 16, !7, i64 24}
!13 = !{!"_NVM_EXPRESS_PASS_THRU_PROTOCOL", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32}
!14 = !{!"", !15, i64 0, !8, i64 2, !8, i64 2, !8, i64 2, !8, i64 3, !15, i64 4, !15, i64 4, !15, i64 4, !15, i64 5, !8, i64 6, !8, i64 6, !8, i64 7}
!15 = !{!"short", !8, i64 0}
!16 = !{!7, !7, i64 0}
!17 = !{!18, !10, i64 24}
!18 = !{!"_EFI_PCI_IO_PROTOCOL", !10, i64 0, !10, i64 8, !19, i64 16, !19, i64 32, !19, i64 48, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !11, i64 144, !10, i64 152}
!19 = !{!"", !10, i64 0, !10, i64 8}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass