; LLVM IR from hoodoer/ENNEoS :: enneosEncoder/Cga.ll (ZN3Cga19TournamentSelectionEi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.CGenome = type <{ i32, [4 x i8], %"class.std::vector.10", %"class.std::vector.15", ptr, i32, [4 x i8], double, double, double, i32, i32, i32, [4 x i8] }>
%"class.std::vector.10" = type { %"struct.std::_Vector_base.11" }
%"struct.std::_Vector_base.11" = type { %"struct.std::_Vector_base<SNeuronGene, std::allocator<SNeuronGene>>::_Vector_impl" }
%"struct.std::_Vector_base<SNeuronGene, std::allocator<SNeuronGene>>::_Vector_impl" = type { %"struct.std::_Vector_base<SNeuronGene, std::allocator<SNeuronGene>>::_Vector_impl_data" }
%"struct.std::_Vector_base<SNeuronGene, std::allocator<SNeuronGene>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.15" = type { %"struct.std::_Vector_base.16" }
%"struct.std::_Vector_base.16" = type { %"struct.std::_Vector_base<SLinkGene, std::allocator<SLinkGene>>::_Vector_impl" }
%"struct.std::_Vector_base<SLinkGene, std::allocator<SLinkGene>>::_Vector_impl" = type { %"struct.std::_Vector_base<SLinkGene, std::allocator<SLinkGene>>::_Vector_impl_data" }
%"struct.std::_Vector_base<SLinkGene, std::allocator<SLinkGene>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.Cga = type <{ %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector.0", ptr, i32, i32, i32, i32, double, double, i32, [4 x i8], double, %"class.std::vector.5", %"class.std::vector.5", double, i8, i8, [2 x i8], i32, i8, [7 x i8] }>
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<CGenome, std::allocator<CGenome>>::_Vector_impl" }
%"struct.std::_Vector_base<CGenome, std::allocator<CGenome>>::_Vector_impl" = type { %"struct.std::_Vector_base<CGenome, std::allocator<CGenome>>::_Vector_impl_data" }
%"struct.std::_Vector_base<CGenome, std::allocator<CGenome>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<CSpecies, std::allocator<CSpecies>>::_Vector_impl" }
%"struct.std::_Vector_base<CSpecies, std::allocator<CSpecies>>::_Vector_impl" = type { %"struct.std::_Vector_base<CSpecies, std::allocator<CSpecies>>::_Vector_impl_data" }
%"struct.std::_Vector_base<CSpecies, std::allocator<CSpecies>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.5" = type { %"struct.std::_Vector_base.6" }
%"struct.std::_Vector_base.6" = type { %"struct.std::_Vector_base<SplitDepth, std::allocator<SplitDepth>>::_Vector_impl" }
%"struct.std::_Vector_base<SplitDepth, std::allocator<SplitDepth>>::_Vector_impl" = type { %"struct.std::_Vector_base<SplitDepth, std::allocator<SplitDepth>>::_Vector_impl_data" }
%"struct.std::_Vector_base<SplitDepth, std::allocator<SplitDepth>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(108) ptr @_ZNSt6vectorI7CGenomeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI7CGenomeSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7RandIntii(i32 noundef, i32 noundef) #2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN3Cga19TournamentSelectionEi(ptr dead_on_unwind noalias writable sret(%class.CGenome) align 8 %0, ptr noundef nonnull align 8 dereferenceable(265) %1, i32 noundef %2) #3 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca double, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store ptr %0, ptr %4, align 8
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !9
  %11 = load ptr, ptr %5, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #5
  store double 0.000000e+00, ptr %7, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #5
  store i32 0, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #5
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %12

12:                                               ; preds = %38, %3
  %13 = load i32, ptr %9, align 4, !tbaa !9
  %14 = load i32, ptr %6, align 4, !tbaa !9
  %15 = icmp slt i32 %13, %14
  br i1 %15, label %17, label %16

16:                                               ; preds = %12
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #5
  br label %41

17:                                               ; preds = %12
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #5
  %18 = getelementptr inbounds %class.Cga, ptr %11, i32 0, i32 0
  %19 = call noundef i64 @_ZNKSt6vectorI7CGenomeSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %18) #5
  %20 = sub i64 %19, 1
  %21 = trunc i64 %20 to i32
  %22 = call noundef i32 @_Z7RandIntii(i32 noundef 0, i32 noundef %21)
  store i32 %22, ptr %10, align 4, !tbaa !9
  %23 = getelementptr inbounds %class.Cga, ptr %11, i32 0, i32 0
  %24 = load i32, ptr %10, align 4, !tbaa !9
  %25 = sext i32 %24 to i64
  %26 = call noundef nonnull align 8 dereferenceable(108) ptr @_ZNSt6vectorI7CGenomeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %23, i64 noundef %25) #5
  %27 = call noundef double @_ZNK7CGenome7FitnessEv(ptr noundef nonnull align 8 dereferenceable(108) %26)
  %28 = load double, ptr %7, align 8, !tbaa !11
  %29 = fcmp ogt double %27, %28
  br i1 %29, label %30, label %37

30:                                               ; preds = %17
  %31 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %31, ptr %8, align 4, !tbaa !9
  %32 = getelementptr inbounds %class.Cga, ptr %11, i32 0, i32 0
  %33 = load i32, ptr %10, align 4, !tbaa !9
  %34 = sext i32 %33 to i64
  %35 = call noundef nonnull align 8 dereferenceable(108) ptr @_ZNSt6vectorI7CGenomeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %32, i64 noundef %34) #5
  %36 = call noundef double @_ZNK7CGenome7FitnessEv(ptr noundef nonnull align 8 dereferenceable(108) %35)
  store double %36, ptr %7, align 8, !tbaa !11
  br label %37

37:                                               ; preds = %30, %17
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  br label %38

38:                                               ; preds = %37
  %39 = load i32, ptr %9, align 4, !tbaa !9
  %40 = add nsw i32 %39, 1
  store i32 %40, ptr %9, align 4, !tbaa !9
  br label %12, !llvm.loop !13

41:                                               ; preds = %16
  %42 = getelementptr inbounds %class.Cga, ptr %11, i32 0, i32 0
  %43 = load i32, ptr %8, align 4, !tbaa !9
  %44 = sext i32 %43 to i64
  %45 = call noundef nonnull align 8 dereferenceable(108) ptr @_ZNSt6vectorI7CGenomeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %42, i64 noundef %44) #5
  call void @_ZN7CGenomeC1ERKS_(ptr noundef nonnull align 8 dereferenceable(108) %0, ptr noundef nonnull align 8 dereferenceable(108) %45)
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #5
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef double @_ZNK7CGenome7FitnessEv(ptr noundef nonnull align 8 dereferenceable(108)) #1 align 2

declare void @_ZN7CGenomeC1ERKS_(ptr noundef nonnull align 8 dereferenceable(108), ptr noundef nonnull align 8 dereferenceable(108)) unnamed_addr #4

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"double", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.CGenome = type <{ i32, [4 x i8], %"class.std::vector.10", %"class.std::vector.15", ptr, i32, [4 x i8], double, double, double, i32, i32, i32, [4 x i8] }>
%"class.std::vector.10" = type { %"struct.std::_Vector_base.11" }
%"struct.std::_Vector_base.11" = type { %"struct.std::_Vector_base<SNeuronGene, std::allocator<SNeuronGene>>::_Vector_impl" }
%"struct.std::_Vector_base<SNeuronGene, std::allocator<SNeuronGene>>::_Vector_impl" = type { %"struct.std::_Vector_base<SNeuronGene, std::allocator<SNeuronGene>>::_Vector_impl_data" }
%"struct.std::_Vector_base<SNeuronGene, std::allocator<SNeuronGene>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.15" = type { %"struct.std::_Vector_base.16" }
%"struct.std::_Vector_base.16" = type { %"struct.std::_Vector_base<SLinkGene, std::allocator<SLinkGene>>::_Vector_impl" }
%"struct.std::_Vector_base<SLinkGene, std::allocator<SLinkGene>>::_Vector_impl" = type { %"struct.std::_Vector_base<SLinkGene, std::allocator<SLinkGene>>::_Vector_impl_data" }
%"struct.std::_Vector_base<SLinkGene, std::allocator<SLinkGene>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(108) ptr @_ZNSt6vectorI7CGenomeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI7CGenomeSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7RandIntii(i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN3Cga19TournamentSelectionEi(ptr dead_on_unwind noalias writable sret(%class.CGenome) align 8 %0, ptr noundef nonnull align 8 dereferenceable(265) %1, i32 noundef %2) local_unnamed_addr #2 align 2 {
  %4 = icmp sgt i32 %2, 0
  br i1 %4, label %.lr.ph, label %._crit_edge

._crit_edge.loopexit:                             ; preds = %18
  %5 = sext i32 %.110 to i64
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %3
  %.09.lcssa = phi i64 [ 0, %3 ], [ %5, %._crit_edge.loopexit ]
  %6 = tail call noundef nonnull align 8 dereferenceable(108) ptr @_ZNSt6vectorI7CGenomeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %.09.lcssa) #4
  tail call void @_ZN7CGenomeC1ERKS_(ptr noundef nonnull align 8 dereferenceable(108) %0, ptr noundef nonnull align 8 dereferenceable(108) %6)
  ret void

.lr.ph:                                           ; preds = %3, %18
  %.013 = phi double [ %.1, %18 ], [ 0.000000e+00, %3 ]
  %.0812 = phi i32 [ %19, %18 ], [ 0, %3 ]
  %.0911 = phi i32 [ %.110, %18 ], [ 0, %3 ]
  %7 = tail call noundef i64 @_ZNKSt6vectorI7CGenomeSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #4
  %8 = trunc i64 %7 to i32
  %9 = add i32 %8, -1
  %10 = tail call noundef i32 @_Z7RandIntii(i32 noundef 0, i32 noundef %9)
  %11 = sext i32 %10 to i64
  %12 = tail call noundef nonnull align 8 dereferenceable(108) ptr @_ZNSt6vectorI7CGenomeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %11) #4
  %13 = tail call noundef double @_ZNK7CGenome7FitnessEv(ptr noundef nonnull align 8 dereferenceable(108) %12)
  %14 = fcmp ogt double %13, %.013
  br i1 %14, label %15, label %18

15:                                               ; preds = %.lr.ph
  %16 = tail call noundef nonnull align 8 dereferenceable(108) ptr @_ZNSt6vectorI7CGenomeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %11) #4
  %17 = tail call noundef double @_ZNK7CGenome7FitnessEv(ptr noundef nonnull align 8 dereferenceable(108) %16)
  br label %18

18:                                               ; preds = %15, %.lr.ph
  %.110 = phi i32 [ %10, %15 ], [ %.0911, %.lr.ph ]
  %.1 = phi double [ %17, %15 ], [ %.013, %.lr.ph ]
  %19 = add nuw nsw i32 %.0812, 1
  %exitcond.not = icmp eq i32 %19, %2
  br i1 %exitcond.not, label %._crit_edge.loopexit, label %.lr.ph, !llvm.loop !5
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef double @_ZNK7CGenome7FitnessEv(ptr noundef nonnull align 8 dereferenceable(108)) local_unnamed_addr #0 align 2

declare void @_ZN7CGenomeC1ERKS_(ptr noundef nonnull align 8 dereferenceable(108), ptr noundef nonnull align 8 dereferenceable(108)) unnamed_addr #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass