; LLVM IR from gem5/gem5 :: src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/pr476 (test)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::sc_int" = type { %"class.sc_dt::sc_int_base" }
%"class.sc_dt::sc_int_base" = type { %"class.sc_dt::sc_value_base", i64, i32, i32 }
%"class.sc_dt::sc_value_base" = type { ptr }
%"class.sc_dt::sc_uint" = type { %"class.sc_dt::sc_uint_base" }
%"class.sc_dt::sc_uint_base" = type { %"class.sc_dt::sc_value_base", i64, i32, i32 }
%"class.sc_dt::sc_bigint" = type { %"class.sc_dt::sc_signed" }
%"class.sc_dt::sc_signed" = type { %"class.sc_dt::sc_value_base", i32, i32, i32, ptr }
%"class.sc_dt::sc_biguint" = type { %"class.sc_dt::sc_unsigned" }
%"class.sc_dt::sc_unsigned" = type { %"class.sc_dt::sc_value_base", i32, i32, i32, ptr }
%struct.test = type { %"class.sc_core::sc_module", %"class.sc_core::sc_in", ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr }
%"class.sc_core::sc_module" = type { %"class.sc_core::sc_object", %"class.sc_core::sc_process_host", %"class.sc_core::sc_sensitive", %"class.sc_core::sc_sensitive_pos", %"class.sc_core::sc_sensitive_neg", i8, ptr, i32, ptr, ptr }
%"class.sc_core::sc_object" = type { ptr, ptr, %"class.std::vector", %"class.std::vector.0", %"class.std::__cxx11::basic_string", ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.sc_core::sc_process_host" = type { ptr }
%"class.sc_core::sc_sensitive" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_pos" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_neg" = type { ptr, i32, ptr }
%"class.sc_core::sc_in" = type { %"class.sc_core::sc_port", ptr, ptr, ptr, ptr }
%"class.sc_core::sc_port" = type { %"class.sc_core::sc_port_b" }
%"class.sc_core::sc_port_b" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.8" }
%"class.sc_core::sc_port_base" = type { %"class.sc_core::sc_object", ptr }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4test5entryEv(ptr noundef nonnull align 8 dereferenceable(528) %0) #0 align 2 personality ptr @__gxx_personality_v0 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i16, align 2
  %5 = alloca i64, align 8
  %6 = alloca %"class.sc_dt::sc_int", align 8
  %7 = alloca %"class.sc_dt::sc_uint", align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca %"class.sc_dt::sc_bigint", align 8
  %11 = alloca %"class.sc_dt::sc_biguint", align 8
  %12 = alloca %"class.sc_dt::sc_signed", align 8
  %13 = alloca %"class.sc_dt::sc_unsigned", align 8
  %14 = alloca i32, align 4
  %15 = alloca %"class.sc_dt::sc_int", align 8
  %16 = alloca %"class.sc_dt::sc_uint", align 8
  %17 = alloca %"class.sc_dt::sc_signed", align 8
  %18 = alloca %"class.sc_dt::sc_unsigned", align 8
  %19 = alloca %"class.sc_dt::sc_signed", align 8
  %20 = alloca %"class.sc_dt::sc_unsigned", align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %21 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #5
  call void @llvm.lifetime.start.p0(i64 2, ptr %4) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #5
  call void @llvm.lifetime.start.p0(i64 24, ptr %6) #5
  call void @_ZN5sc_dt6sc_intILi4EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %6)
  call void @llvm.lifetime.start.p0(i64 24, ptr %7) #5
  invoke void @_ZN5sc_dt7sc_uintILi4EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %7)
          to label %22 unwind label %36

22:                                               ; preds = %1
  call void @llvm.lifetime.start.p0(i64 32, ptr %10) #5
  invoke void @_ZN5sc_dt9sc_bigintILi4EEC2Ev(ptr noundef nonnull align 8 dereferenceable(32) %10)
          to label %23 unwind label %40

23:                                               ; preds = %22
  call void @llvm.lifetime.start.p0(i64 32, ptr %11) #5
  invoke void @_ZN5sc_dt10sc_biguintILi4EEC2Ev(ptr noundef nonnull align 8 dereferenceable(32) %11)
          to label %24 unwind label %44

24:                                               ; preds = %23
  call void @llvm.lifetime.start.p0(i64 32, ptr %12) #5
  invoke void @_ZN5sc_dt9sc_signedC1Ei(ptr noundef nonnull align 8 dereferenceable(32) %12, i32 noundef 8)
          to label %25 unwind label %48

25:                                               ; preds = %24
  call void @llvm.lifetime.start.p0(i64 32, ptr %13) #5
  invoke void @_ZN5sc_dt11sc_unsignedC1Ei(ptr noundef nonnull align 8 dereferenceable(32) %13, i32 noundef 8)
          to label %26 unwind label %52

26:                                               ; preds = %25
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #5
  store i32 0, ptr %14, align 4, !tbaa !9
  store i32 0, ptr %3, align 4, !tbaa !9
  br label %27

27:                                               ; preds = %33, %26
  %28 = load i32, ptr %3, align 4, !tbaa !9
  %29 = icmp slt i32 %28, 3
  br i1 %29, label %30, label %56

30:                                               ; preds = %27
  %31 = load i32, ptr %14, align 4, !tbaa !9
  %32 = add nsw i32 %31, 1
  store i32 %32, ptr %14, align 4, !tbaa !9
  br label %33

33:                                               ; preds = %30
  %34 = load i32, ptr %3, align 4, !tbaa !9
  %35 = add nsw i32 %34, 1
  store i32 %35, ptr %3, align 4, !tbaa !9
  br label %27, !llvm.loop !11

36:                                               ; preds = %1
  %37 = landingpad { ptr, i32 }
          cleanup
  %38 = extractvalue { ptr, i32 } %37, 0
  store ptr %38, ptr %8, align 8
  %39 = extractvalue { ptr, i32 } %37, 1
  store i32 %39, ptr %9, align 4
  br label %159

40:                                               ; preds = %22
  %41 = landingpad { ptr, i32 }
          cleanup
  %42 = extractvalue { ptr, i32 } %41, 0
  store ptr %42, ptr %8, align 8
  %43 = extractvalue { ptr, i32 } %41, 1
  store i32 %43, ptr %9, align 4
  br label %158

44:                                               ; preds = %23
  %45 = landingpad { ptr, i32 }
          cleanup
  %46 = extractvalue { ptr, i32 } %45, 0
  store ptr %46, ptr %8, align 8
  %47 = extractvalue { ptr, i32 } %45, 1
  store i32 %47, ptr %9, align 4
  br label %157

48:                                               ; preds = %24
  %49 = landingpad { ptr, i32 }
          cleanup
  %50 = extractvalue { ptr, i32 } %49, 0
  store ptr %50, ptr %8, align 8
  %51 = extractvalue { ptr, i32 } %49, 1
  store i32 %51, ptr %9, align 4
  br label %156

52:                                               ; preds = %25
  %53 = landingpad { ptr, i32 }
          cleanup
  %54 = extractvalue { ptr, i32 } %53, 0
  store ptr %54, ptr %8, align 8
  %55 = extractvalue { ptr, i32 } %53, 1
  store i32 %55, ptr %9, align 4
  br label %155

56:                                               ; preds = %27
  store i16 0, ptr %4, align 2, !tbaa !13
  br label %57

57:                                               ; preds = %64, %56
  %58 = load i16, ptr %4, align 2, !tbaa !13
  %59 = sext i16 %58 to i32
  %60 = icmp slt i32 %59, 3
  br i1 %60, label %61, label %67

61:                                               ; preds = %57
  %62 = load i32, ptr %14, align 4, !tbaa !9
  %63 = add nsw i32 %62, 1
  store i32 %63, ptr %14, align 4, !tbaa !9
  br label %64

64:                                               ; preds = %61
  %65 = load i16, ptr %4, align 2, !tbaa !13
  %66 = add i16 %65, 1
  store i16 %66, ptr %4, align 2, !tbaa !13
  br label %57, !llvm.loop !15

67:                                               ; preds = %57
  store i64 0, ptr %5, align 8, !tbaa !16
  br label %68

68:                                               ; preds = %74, %67
  %69 = load i64, ptr %5, align 8, !tbaa !16
  %70 = icmp slt i64 %69, 3
  br i1 %70, label %71, label %77

71:                                               ; preds = %68
  %72 = load i32, ptr %14, align 4, !tbaa !9
  %73 = add nsw i32 %72, 1
  store i32 %73, ptr %14, align 4, !tbaa !9
  br label %74

74:                                               ; preds = %71
  %75 = load i64, ptr %5, align 8, !tbaa !16
  %76 = add nsw i64 %75, 1
  store i64 %76, ptr %5, align 8, !tbaa !16
  br label %68, !llvm.loop !18

77:                                               ; preds = %68
  %78 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt6sc_intILi4EEaSEi(ptr noundef nonnull align 8 dereferenceable(24) %6, i32 noundef 0)
          to label %79 unwind label %89

79:                                               ; preds = %77
  br label %80

80:                                               ; preds = %88, %79
  %81 = invoke noundef i64 @_ZNK5sc_dt11sc_int_basecvxEv(ptr noundef nonnull align 8 dereferenceable(24) %6)
          to label %82 unwind label %89

82:                                               ; preds = %80
  %83 = icmp slt i64 %81, 3
  br i1 %83, label %84, label %93

84:                                               ; preds = %82
  %85 = load i32, ptr %14, align 4, !tbaa !9
  %86 = add nsw i32 %85, 1
  store i32 %86, ptr %14, align 4, !tbaa !9
  br label %87

87:                                               ; preds = %84
  invoke void @_ZN5sc_dt6sc_intILi4EEppEi(ptr dead_on_unwind writable sret(%"class.sc_dt::sc_int") align 8 %15, ptr noundef nonnull align 8 dereferenceable(24) %6, i32 noundef 0)
          to label %88 unwind label %89

88:                                               ; preds = %87
  call void @_ZN5sc_dt13sc_value_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %15) #5
  br label %80, !llvm.loop !19

89:                                               ; preds = %153, %149, %147, %141, %138, %136, %130, %127, %125, %119, %116, %114, %108, %105, %103, %96, %93, %87, %80, %77
  %90 = landingpad { ptr, i32 }
          cleanup
  %91 = extractvalue { ptr, i32 } %90, 0
  store ptr %91, ptr %8, align 8
  %92 = extractvalue { ptr, i32 } %90, 1
  store i32 %92, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #5
  call void @_ZN5sc_dt11sc_unsignedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %13) #5
  br label %155

93:                                               ; preds = %82
  %94 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt7sc_uintILi4EEaSEi(ptr noundef nonnull align 8 dereferenceable(24) %7, i32 noundef 0)
          to label %95 unwind label %89

95:                                               ; preds = %93
  br label %96

96:                                               ; preds = %104, %95
  %97 = invoke noundef i64 @_ZNK5sc_dt12sc_uint_basecvyEv(ptr noundef nonnull align 8 dereferenceable(24) %7)
          to label %98 unwind label %89

98:                                               ; preds = %96
  %99 = icmp ult i64 %97, 3
  br i1 %99, label %100, label %105

100:                                              ; preds = %98
  %101 = load i32, ptr %14, align 4, !tbaa !9
  %102 = add nsw i32 %101, 1
  store i32 %102, ptr %14, align 4, !tbaa !9
  br label %103

103:                                              ; preds = %100
  invoke void @_ZN5sc_dt7sc_uintILi4EEppEi(ptr dead_on_unwind writable sret(%"class.sc_dt::sc_uint") align 8 %16, ptr noundef nonnull align 8 dereferenceable(24) %7, i32 noundef 0)
          to label %104 unwind label %89

104:                                              ; preds = %103
  call void @_ZN5sc_dt13sc_value_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %16) #5
  br label %96, !llvm.loop !20

105:                                              ; preds = %98
  %106 = invoke noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt9sc_signedaSEi(ptr noundef nonnull align 8 dereferenceable(32) %12, i32 noundef 0)
          to label %107 unwind label %89

107:                                              ; preds = %105
  br label %108

108:                                              ; preds = %115, %107
  %109 = invoke noundef zeroext i1 @_ZN5sc_dtltERKNS_9sc_signedEi(ptr noundef nonnull align 8 dereferenceable(32) %12, i32 noundef 3)
          to label %110 unwind label %89

110:                                              ; preds = %108
  br i1 %109, label %111, label %116

111:                                              ; preds = %110
  %112 = load i32, ptr %14, align 4, !tbaa !9
  %113 = add nsw i32 %112, 1
  store i32 %113, ptr %14, align 4, !tbaa !9
  br label %114

114:                                              ; preds = %111
  invoke void @_ZN5sc_dt9sc_signedppEi(ptr dead_on_unwind writable sret(%"class.sc_dt::sc_signed") align 8 %17, ptr noundef nonnull align 8 dereferenceable(32) %12, i32 noundef 0)
          to label %115 unwind label %89

115:                                              ; preds = %114
  call void @_ZN5sc_dt9sc_signedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %17) #5
  br label %108, !llvm.loop !21

116:                                              ; preds = %110
  %117 = invoke noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt11sc_unsignedaSEi(ptr noundef nonnull align 8 dereferenceable(32) %13, i32 noundef 0)
          to label %118 unwind label %89

118:                                              ; preds = %116
  br label %119

119:                                              ; preds = %126, %118
  %120 = invoke noundef zeroext i1 @_ZN5sc_dtltERKNS_11sc_unsignedEi(ptr noundef nonnull align 8 dereferenceable(32) %13, i32 noundef 3)
          to label %121 unwind label %89

121:                                              ; preds = %119
  br i1 %120, label %122, label %127

122:                                              ; preds = %121
  %123 = load i32, ptr %14, align 4, !tbaa !9
  %124 = add nsw i32 %123, 1
  store i32 %124, ptr %14, align 4, !tbaa !9
  br label %125

125:                                              ; preds = %122
  invoke void @_ZN5sc_dt11sc_unsignedppEi(ptr dead_on_unwind writable sret(%"class.sc_dt::sc_unsigned") align 8 %18, ptr noundef nonnull align 8 dereferenceable(32) %13, i32 noundef 0)
          to label %126 unwind label %89

126:                                              ; preds = %125
  call void @_ZN5sc_dt11sc_unsignedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %18) #5
  br label %119, !llvm.loop !22

127:                                              ; preds = %121
  %128 = invoke noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt9sc_bigintILi4EEaSEi(ptr noundef nonnull align 8 dereferenceable(32) %10, i32 noundef 0)
          to label %129 unwind label %89

129:                                              ; preds = %127
  br label %130

130:                                              ; preds = %137, %129
  %131 = invoke noundef zeroext i1 @_ZN5sc_dtltERKNS_9sc_signedEi(ptr noundef nonnull align 8 dereferenceable(32) %10, i32 noundef 3)
          to label %132 unwind label %89

132:                                              ; preds = %130
  br i1 %131, label %133, label %138

133:                                              ; preds = %132
  %134 = load i32, ptr %14, align 4, !tbaa !9
  %135 = add nsw i32 %134, 1
  store i32 %135, ptr %14, align 4, !tbaa !9
  br label %136

136:                                              ; preds = %133
  invoke void @_ZN5sc_dt9sc_signedppEi(ptr dead_on_unwind writable sret(%"class.sc_dt::sc_signed") align 8 %19, ptr noundef nonnull align 8 dereferenceable(32) %10, i32 noundef 0)
          to label %137 unwind label %89

137:                                              ; preds = %136
  call void @_ZN5sc_dt9sc_signedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %19) #5
  br label %130, !llvm.loop !23

138:                                              ; preds = %132
  %139 = invoke noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt10sc_biguintILi4EEaSEi(ptr noundef nonnull align 8 dereferenceable(32) %11, i32 noundef 0)
          to label %140 unwind label %89

140:                                              ; preds = %138
  br label %141

141:                                              ; preds = %148, %140
  %142 = invoke noundef zeroext i1 @_ZN5sc_dtltERKNS_11sc_unsignedEi(ptr noundef nonnull align 8 dereferenceable(32) %11, i32 noundef 3)
          to label %143 unwind label %89

143:                                              ; preds = %141
  br i1 %142, label %144, label %149

144:                                              ; preds = %143
  %145 = load i32, ptr %14, align 4, !tbaa !9
  %146 = add nsw i32 %145, 1
  store i32 %146, ptr %14, align 4, !tbaa !9
  br label %147

147:                                              ; preds = %144
  invoke void @_ZN5sc_dt11sc_unsignedppEi(ptr dead_on_unwind writable sret(%"class.sc_dt::sc_unsigned") align 8 %20, ptr noundef nonnull align 8 dereferenceable(32) %11, i32 noundef 0)
          to label %148 unwind label %89

148:                                              ; preds = %147
  call void @_ZN5sc_dt11sc_unsignedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %20) #5
  br label %141, !llvm.loop !24

149:                                              ; preds = %143
  %150 = getelementptr inbounds %struct.test, ptr %21, i32 0, i32 11
  %151 = load ptr, ptr %150, align 8, !tbaa !25
  %152 = invoke noundef nonnull align 8 dereferenceable(196) ptr @_ZN7sc_core9sc_signalIiLNS_16sc_writer_policyE0EEaSERKi(ptr noundef nonnull align 8 dereferenceable(196) %151, ptr noundef nonnull align 4 dereferenceable(4) %14)
          to label %153 unwind label %89

153:                                              ; preds = %149
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %21)
          to label %154 unwind label %89

154:                                              ; preds = %153
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #5
  call void @_ZN5sc_dt11sc_unsignedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %13) #5
  call void @llvm.lifetime.end.p0(i64 32, ptr %13) #5
  call void @_ZN5sc_dt9sc_signedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %12) #5
  call void @llvm.lifetime.end.p0(i64 32, ptr %12) #5
  call void @_ZN5sc_dt11sc_unsignedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %11) #5
  call void @llvm.lifetime.end.p0(i64 32, ptr %11) #5
  call void @_ZN5sc_dt9sc_signedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %10) #5
  call void @llvm.lifetime.end.p0(i64 32, ptr %10) #5
  call void @_ZN5sc_dt13sc_value_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %7) #5
  call void @llvm.lifetime.end.p0(i64 24, ptr %7) #5
  call void @_ZN5sc_dt13sc_value_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %6) #5
  call void @llvm.lifetime.end.p0(i64 24, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #5
  call void @llvm.lifetime.end.p0(i64 2, ptr %4) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #5
  ret void

155:                                              ; preds = %89, %52
  call void @llvm.lifetime.end.p0(i64 32, ptr %13) #5
  call void @_ZN5sc_dt9sc_signedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %12) #5
  br label %156

156:                                              ; preds = %155, %48
  call void @llvm.lifetime.end.p0(i64 32, ptr %12) #5
  call void @_ZN5sc_dt11sc_unsignedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %11) #5
  br label %157

157:                                              ; preds = %156, %44
  call void @llvm.lifetime.end.p0(i64 32, ptr %11) #5
  call void @_ZN5sc_dt9sc_signedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %10) #5
  br label %158

158:                                              ; preds = %157, %40
  call void @llvm.lifetime.end.p0(i64 32, ptr %10) #5
  call void @_ZN5sc_dt13sc_value_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %7) #5
  br label %159

159:                                              ; preds = %158, %36
  call void @llvm.lifetime.end.p0(i64 24, ptr %7) #5
  call void @_ZN5sc_dt13sc_value_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %6) #5
  call void @llvm.lifetime.end.p0(i64 24, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #5
  call void @llvm.lifetime.end.p0(i64 2, ptr %4) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #5
  br label %160

160:                                              ; preds = %159
  %161 = load ptr, ptr %8, align 8
  %162 = load i32, ptr %9, align 4
  %163 = insertvalue { ptr, i32 } poison, ptr %161, 0
  %164 = insertvalue { ptr, i32 } %163, i32 %162, 1
  resume { ptr, i32 } %164
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt6sc_intILi4EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt7sc_uintILi4EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt9sc_bigintILi4EEC2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt10sc_biguintILi4EEC2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #0 align 2

declare void @_ZN5sc_dt9sc_signedC1Ei(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) unnamed_addr #2

declare void @_ZN5sc_dt11sc_unsignedC1Ei(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt6sc_intILi4EEaSEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNK5sc_dt11sc_int_basecvxEv(ptr noundef nonnull align 8 dereferenceable(24)) #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt6sc_intILi4EEppEi(ptr dead_on_unwind noalias writable sret(%"class.sc_dt::sc_int") align 8, ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt7sc_uintILi4EEaSEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNK5sc_dt12sc_uint_basecvyEv(ptr noundef nonnull align 8 dereferenceable(24)) #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt7sc_uintILi4EEppEi(ptr dead_on_unwind noalias writable sret(%"class.sc_dt::sc_uint") align 8, ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt9sc_signedaSEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZN5sc_dtltERKNS_9sc_signedEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) #4

declare void @_ZN5sc_dt9sc_signedppEi(ptr dead_on_unwind writable sret(%"class.sc_dt::sc_signed") align 8, ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) #2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt11sc_unsignedaSEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZN5sc_dtltERKNS_11sc_unsignedEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) #4

declare void @_ZN5sc_dt11sc_unsignedppEi(ptr dead_on_unwind writable sret(%"class.sc_dt::sc_unsigned") align 8, ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) #2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt9sc_bigintILi4EEaSEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt10sc_biguintILi4EEaSEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(196) ptr @_ZN7sc_core9sc_signalIiLNS_16sc_writer_policyE0EEaSERKi(ptr noundef nonnull align 8 dereferenceable(196), ptr noundef nonnull align 4 dereferenceable(4)) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt11sc_unsignedD2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt9sc_signedD2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt13sc_value_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #3 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!14, !14, i64 0}
!14 = !{!"short", !7, i64 0}
!15 = distinct !{!15, !12}
!16 = !{!17, !17, i64 0}
!17 = !{!"long", !7, i64 0}
!18 = distinct !{!18, !12}
!19 = distinct !{!19, !12}
!20 = distinct !{!20, !12}
!21 = distinct !{!21, !12}
!22 = distinct !{!22, !12}
!23 = distinct !{!23, !12}
!24 = distinct !{!24, !12}
!25 = !{!26, !6, i64 488}
!26 = !{!"_ZTS4test", !27, i64 0, !47, i64 232, !6, i64 416, !6, i64 424, !6, i64 432, !6, i64 440, !6, i64 448, !6, i64 456, !6, i64 464, !6, i64 472, !6, i64 480, !6, i64 488, !6, i64 496, !6, i64 504, !6, i64 512, !6, i64 520}
!27 = !{!"_ZTSN7sc_core9sc_moduleE", !28, i64 0, !39, i64 112, !40, i64 120, !42, i64 144, !44, i64 168, !46, i64 192, !6, i64 200, !10, i64 208, !6, i64 216, !6, i64 224}
!28 = !{!"_ZTSN7sc_core9sc_objectE", !6, i64 8, !29, i64 16, !33, i64 40, !37, i64 64, !6, i64 96, !6, i64 104}
!29 = !{!"_ZTSSt6vectorIPN7sc_core8sc_eventESaIS2_EE", !30, i64 0}
!30 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE12_Vector_implE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!33 = !{!"_ZTSSt6vectorIPN7sc_core9sc_objectESaIS2_EE", !34, i64 0}
!34 = !{!"_ZTSSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE", !35, i64 0}
!35 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE12_Vector_implE", !36, i64 0}
!36 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!37 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !38, i64 0, !17, i64 8, !7, i64 16}
!38 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!39 = !{!"_ZTSN7sc_core15sc_process_hostE"}
!40 = !{!"_ZTSN7sc_core12sc_sensitiveE", !6, i64 0, !41, i64 8, !6, i64 16}
!41 = !{!"_ZTSN7sc_core12sc_sensitiveUt_E", !7, i64 0}
!42 = !{!"_ZTSN7sc_core16sc_sensitive_posE", !6, i64 0, !43, i64 8, !6, i64 16}
!43 = !{!"_ZTSN7sc_core16sc_sensitive_posUt_E", !7, i64 0}
!44 = !{!"_ZTSN7sc_core16sc_sensitive_negE", !6, i64 0, !45, i64 8, !6, i64 16}
!45 = !{!"_ZTSN7sc_core16sc_sensitive_negUt_E", !7, i64 0}
!46 = !{!"bool", !7, i64 0}
!47 = !{!"_ZTSN7sc_core5sc_inIbEE", !48, i64 0, !6, i64 152, !6, i64 160, !6, i64 168, !6, i64 176}
!48 = !{!"_ZTSN7sc_core7sc_portINS_15sc_signal_in_ifIbEELi1ELNS_14sc_port_policyE0EEE", !49, i64 0}
!49 = !{!"_ZTSN7sc_core9sc_port_bINS_15sc_signal_in_ifIbEEEE", !50, i64 0, !6, i64 120, !51, i64 128}
!50 = !{!"_ZTSN7sc_core12sc_port_baseE", !28, i64 0, !6, i64 112}
!51 = !{!"_ZTSSt6vectorIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE", !52, i64 0}
!52 = !{!"_ZTSSt12_Vector_baseIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE", !53, i64 0}
!53 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE12_Vector_implE", !54, i64 0}
!54 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::sc_int" = type { %"class.sc_dt::sc_int_base" }
%"class.sc_dt::sc_int_base" = type { %"class.sc_dt::sc_value_base", i64, i32, i32 }
%"class.sc_dt::sc_value_base" = type { ptr }
%"class.sc_dt::sc_uint" = type { %"class.sc_dt::sc_uint_base" }
%"class.sc_dt::sc_uint_base" = type { %"class.sc_dt::sc_value_base", i64, i32, i32 }
%"class.sc_dt::sc_bigint" = type { %"class.sc_dt::sc_signed" }
%"class.sc_dt::sc_signed" = type { %"class.sc_dt::sc_value_base", i32, i32, i32, ptr }
%"class.sc_dt::sc_biguint" = type { %"class.sc_dt::sc_unsigned" }
%"class.sc_dt::sc_unsigned" = type { %"class.sc_dt::sc_value_base", i32, i32, i32, ptr }

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4test5entryEv(ptr noundef nonnull align 8 dereferenceable(528) %0) local_unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  %2 = alloca %"class.sc_dt::sc_int", align 8
  %3 = alloca %"class.sc_dt::sc_uint", align 8
  %4 = alloca %"class.sc_dt::sc_bigint", align 8
  %5 = alloca %"class.sc_dt::sc_biguint", align 8
  %6 = alloca %"class.sc_dt::sc_signed", align 8
  %7 = alloca %"class.sc_dt::sc_unsigned", align 8
  %8 = alloca i32, align 4
  %9 = alloca %"class.sc_dt::sc_int", align 8
  %10 = alloca %"class.sc_dt::sc_uint", align 8
  %11 = alloca %"class.sc_dt::sc_signed", align 8
  %12 = alloca %"class.sc_dt::sc_unsigned", align 8
  %13 = alloca %"class.sc_dt::sc_signed", align 8
  %14 = alloca %"class.sc_dt::sc_unsigned", align 8
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %2) #5
  call void @_ZN5sc_dt6sc_intILi4EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %2)
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %3) #5
  invoke void @_ZN5sc_dt7sc_uintILi4EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3)
          to label %15 unwind label %20

15:                                               ; preds = %1
  call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %4) #5
  invoke void @_ZN5sc_dt9sc_bigintILi4EEC2Ev(ptr noundef nonnull align 8 dereferenceable(32) %4)
          to label %16 unwind label %22

16:                                               ; preds = %15
  call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %5) #5
  invoke void @_ZN5sc_dt10sc_biguintILi4EEC2Ev(ptr noundef nonnull align 8 dereferenceable(32) %5)
          to label %17 unwind label %24

17:                                               ; preds = %16
  call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %6) #5
  invoke void @_ZN5sc_dt9sc_signedC1Ei(ptr noundef nonnull align 8 dereferenceable(32) %6, i32 noundef 8)
          to label %18 unwind label %26

18:                                               ; preds = %17
  call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %7) #5
  invoke void @_ZN5sc_dt11sc_unsignedC1Ei(ptr noundef nonnull align 8 dereferenceable(32) %7, i32 noundef 8)
          to label %.preheader40 unwind label %28

.preheader40:                                     ; preds = %18
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8) #5
  store i32 9, ptr %8, align 4, !tbaa !5
  %19 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt6sc_intILi4EEaSEi(ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef 0)
          to label %.preheader35 unwind label %.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp

20:                                               ; preds = %1
  %21 = landingpad { ptr, i32 }
          cleanup
  br label %88

22:                                               ; preds = %15
  %23 = landingpad { ptr, i32 }
          cleanup
  br label %87

24:                                               ; preds = %16
  %25 = landingpad { ptr, i32 }
          cleanup
  br label %86

26:                                               ; preds = %17
  %27 = landingpad { ptr, i32 }
          cleanup
  br label %85

28:                                               ; preds = %18
  %29 = landingpad { ptr, i32 }
          cleanup
  br label %84

.preheader35:                                     ; preds = %.preheader40
  %30 = call noundef i64 @_ZNK5sc_dt11sc_int_basecvxEv(ptr noundef nonnull align 8 dereferenceable(24) %2)
  %31 = icmp slt i64 %30, 3
  br i1 %31, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %.preheader35, %34
  %32 = phi i32 [ %33, %34 ], [ 9, %.preheader35 ]
  %33 = add nuw nsw i32 %32, 1
  store i32 %33, ptr %8, align 4, !tbaa !5
  invoke void @_ZN5sc_dt6sc_intILi4EEppEi(ptr dead_on_unwind nonnull writable sret(%"class.sc_dt::sc_int") align 8 %9, ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef 0)
          to label %34 unwind label %.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit

34:                                               ; preds = %.lr.ph
  call void @_ZN5sc_dt13sc_value_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %9) #5
  %35 = call noundef i64 @_ZNK5sc_dt11sc_int_basecvxEv(ptr noundef nonnull align 8 dereferenceable(24) %2)
  %36 = icmp slt i64 %35, 3
  br i1 %36, label %.lr.ph, label %._crit_edge, !llvm.loop !9

.loopexit:                                        ; preds = %.preheader, %75
  %lpad.loopexit = landingpad { ptr, i32 }
          cleanup
  br label %.loopexit.split-lp

.loopexit.split-lp.loopexit:                      ; preds = %67, %.preheader21
  %lpad.loopexit22 = landingpad { ptr, i32 }
          cleanup
  br label %.loopexit.split-lp

.loopexit.split-lp.loopexit.split-lp.loopexit:    ; preds = %.preheader25, %59
  %lpad.loopexit26 = landingpad { ptr, i32 }
          cleanup
  br label %.loopexit.split-lp

.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit: ; preds = %51, %.preheader28
  %lpad.loopexit29 = landingpad { ptr, i32 }
          cleanup
  br label %.loopexit.split-lp

.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit: ; preds = %.lr.ph48
  %lpad.loopexit33 = landingpad { ptr, i32 }
          cleanup
  br label %.loopexit.split-lp

.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit: ; preds = %.lr.ph
  %lpad.loopexit36 = landingpad { ptr, i32 }
          cleanup
  br label %.loopexit.split-lp

.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp: ; preds = %82, %78, %70, %62, %54, %._crit_edge49, %._crit_edge, %.preheader40
  %lpad.loopexit.split-lp37 = landingpad { ptr, i32 }
          cleanup
  br label %.loopexit.split-lp

.loopexit.split-lp:                               ; preds = %.loopexit.split-lp.loopexit, %.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit, %.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit, %.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp, %.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit, %.loopexit.split-lp.loopexit.split-lp.loopexit, %.loopexit
  %lpad.phi = phi { ptr, i32 } [ %lpad.loopexit, %.loopexit ], [ %lpad.loopexit22, %.loopexit.split-lp.loopexit ], [ %lpad.loopexit26, %.loopexit.split-lp.loopexit.split-lp.loopexit ], [ %lpad.loopexit29, %.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit ], [ %lpad.loopexit33, %.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit ], [ %lpad.loopexit36, %.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit ], [ %lpad.loopexit.split-lp37, %.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #5
  call void @_ZN5sc_dt11sc_unsignedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %7) #5
  br label %84

._crit_edge:                                      ; preds = %34, %.preheader35
  %37 = phi i32 [ 9, %.preheader35 ], [ %33, %34 ]
  %38 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt7sc_uintILi4EEaSEi(ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef 0)
          to label %.preheader32 unwind label %.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp

.preheader32:                                     ; preds = %._crit_edge
  %39 = call noundef i64 @_ZNK5sc_dt12sc_uint_basecvyEv(ptr noundef nonnull align 8 dereferenceable(24) %3)
  %40 = icmp ult i64 %39, 3
  br i1 %40, label %.lr.ph48, label %._crit_edge49

.lr.ph48:                                         ; preds = %.preheader32, %43
  %41 = phi i32 [ %42, %43 ], [ %37, %.preheader32 ]
  %42 = add nsw i32 %41, 1
  store i32 %42, ptr %8, align 4, !tbaa !5
  invoke void @_ZN5sc_dt7sc_uintILi4EEppEi(ptr dead_on_unwind nonnull writable sret(%"class.sc_dt::sc_uint") align 8 %10, ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef 0)
          to label %43 unwind label %.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit

43:                                               ; preds = %.lr.ph48
  call void @_ZN5sc_dt13sc_value_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %10) #5
  %44 = call noundef i64 @_ZNK5sc_dt12sc_uint_basecvyEv(ptr noundef nonnull align 8 dereferenceable(24) %3)
  %45 = icmp ult i64 %44, 3
  br i1 %45, label %.lr.ph48, label %._crit_edge49, !llvm.loop !11

._crit_edge49:                                    ; preds = %43, %.preheader32
  %46 = phi i32 [ %37, %.preheader32 ], [ %42, %43 ]
  %47 = invoke noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt9sc_signedaSEi(ptr noundef nonnull align 8 dereferenceable(32) %6, i32 noundef 0)
          to label %.preheader28 unwind label %.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp

.preheader28:                                     ; preds = %._crit_edge49, %53
  %48 = phi i32 [ %52, %53 ], [ %46, %._crit_edge49 ]
  %49 = invoke noundef zeroext i1 @_ZN5sc_dtltERKNS_9sc_signedEi(ptr noundef nonnull align 8 dereferenceable(32) %6, i32 noundef 3)
          to label %50 unwind label %.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit

50:                                               ; preds = %.preheader28
  br i1 %49, label %51, label %54

51:                                               ; preds = %50
  %52 = add nsw i32 %48, 1
  store i32 %52, ptr %8, align 4, !tbaa !5
  invoke void @_ZN5sc_dt9sc_signedppEi(ptr dead_on_unwind nonnull writable sret(%"class.sc_dt::sc_signed") align 8 %11, ptr noundef nonnull align 8 dereferenceable(32) %6, i32 noundef 0)
          to label %53 unwind label %.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit

53:                                               ; preds = %51
  call void @_ZN5sc_dt9sc_signedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %11) #5
  br label %.preheader28, !llvm.loop !12

54:                                               ; preds = %50
  %55 = invoke noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt11sc_unsignedaSEi(ptr noundef nonnull align 8 dereferenceable(32) %7, i32 noundef 0)
          to label %.preheader25 unwind label %.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp

.preheader25:                                     ; preds = %54, %61
  %56 = phi i32 [ %60, %61 ], [ %48, %54 ]
  %57 = invoke noundef zeroext i1 @_ZN5sc_dtltERKNS_11sc_unsignedEi(ptr noundef nonnull align 8 dereferenceable(32) %7, i32 noundef 3)
          to label %58 unwind label %.loopexit.split-lp.loopexit.split-lp.loopexit

58:                                               ; preds = %.preheader25
  br i1 %57, label %59, label %62

59:                                               ; preds = %58
  %60 = add nsw i32 %56, 1
  store i32 %60, ptr %8, align 4, !tbaa !5
  invoke void @_ZN5sc_dt11sc_unsignedppEi(ptr dead_on_unwind nonnull writable sret(%"class.sc_dt::sc_unsigned") align 8 %12, ptr noundef nonnull align 8 dereferenceable(32) %7, i32 noundef 0)
          to label %61 unwind label %.loopexit.split-lp.loopexit.split-lp.loopexit

61:                                               ; preds = %59
  call void @_ZN5sc_dt11sc_unsignedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %12) #5
  br label %.preheader25, !llvm.loop !13

62:                                               ; preds = %58
  %63 = invoke noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt9sc_bigintILi4EEaSEi(ptr noundef nonnull align 8 dereferenceable(32) %4, i32 noundef 0)
          to label %.preheader21 unwind label %.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp

.preheader21:                                     ; preds = %62, %69
  %64 = phi i32 [ %68, %69 ], [ %56, %62 ]
  %65 = invoke noundef zeroext i1 @_ZN5sc_dtltERKNS_9sc_signedEi(ptr noundef nonnull align 8 dereferenceable(32) %4, i32 noundef 3)
          to label %66 unwind label %.loopexit.split-lp.loopexit

66:                                               ; preds = %.preheader21
  br i1 %65, label %67, label %70

67:                                               ; preds = %66
  %68 = add nsw i32 %64, 1
  store i32 %68, ptr %8, align 4, !tbaa !5
  invoke void @_ZN5sc_dt9sc_signedppEi(ptr dead_on_unwind nonnull writable sret(%"class.sc_dt::sc_signed") align 8 %13, ptr noundef nonnull align 8 dereferenceable(32) %4, i32 noundef 0)
          to label %69 unwind label %.loopexit.split-lp.loopexit

69:                                               ; preds = %67
  call void @_ZN5sc_dt9sc_signedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %13) #5
  br label %.preheader21, !llvm.loop !14

70:                                               ; preds = %66
  %71 = invoke noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt10sc_biguintILi4EEaSEi(ptr noundef nonnull align 8 dereferenceable(32) %5, i32 noundef 0)
          to label %.preheader unwind label %.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp

.preheader:                                       ; preds = %70, %77
  %72 = phi i32 [ %76, %77 ], [ %64, %70 ]
  %73 = invoke noundef zeroext i1 @_ZN5sc_dtltERKNS_11sc_unsignedEi(ptr noundef nonnull align 8 dereferenceable(32) %5, i32 noundef 3)
          to label %74 unwind label %.loopexit

74:                                               ; preds = %.preheader
  br i1 %73, label %75, label %78

75:                                               ; preds = %74
  %76 = add nsw i32 %72, 1
  store i32 %76, ptr %8, align 4, !tbaa !5
  invoke void @_ZN5sc_dt11sc_unsignedppEi(ptr dead_on_unwind nonnull writable sret(%"class.sc_dt::sc_unsigned") align 8 %14, ptr noundef nonnull align 8 dereferenceable(32) %5, i32 noundef 0)
          to label %77 unwind label %.loopexit

77:                                               ; preds = %75
  call void @_ZN5sc_dt11sc_unsignedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %14) #5
  br label %.preheader, !llvm.loop !15

78:                                               ; preds = %74
  %79 = getelementptr inbounds i8, ptr %0, i64 488
  %80 = load ptr, ptr %79, align 8, !tbaa !16
  %81 = invoke noundef nonnull align 8 dereferenceable(196) ptr @_ZN7sc_core9sc_signalIiLNS_16sc_writer_policyE0EEaSERKi(ptr noundef nonnull align 8 dereferenceable(196) %80, ptr noundef nonnull align 4 dereferenceable(4) %8)
          to label %82 unwind label %.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp

82:                                               ; preds = %78
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
          to label %83 unwind label %.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp.loopexit.split-lp

83:                                               ; preds = %82
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #5
  call void @_ZN5sc_dt11sc_unsignedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %7) #5
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %7) #5
  call void @_ZN5sc_dt9sc_signedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %6) #5
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %6) #5
  call void @_ZN5sc_dt11sc_unsignedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %5) #5
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %5) #5
  call void @_ZN5sc_dt9sc_signedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %4) #5
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %4) #5
  call void @_ZN5sc_dt13sc_value_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3) #5
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %3) #5
  call void @_ZN5sc_dt13sc_value_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %2) #5
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %2) #5
  ret void

84:                                               ; preds = %.loopexit.split-lp, %28
  %.pn = phi { ptr, i32 } [ %lpad.phi, %.loopexit.split-lp ], [ %29, %28 ]
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %7) #5
  call void @_ZN5sc_dt9sc_signedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %6) #5
  br label %85

85:                                               ; preds = %84, %26
  %.pn.pn = phi { ptr, i32 } [ %.pn, %84 ], [ %27, %26 ]
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %6) #5
  call void @_ZN5sc_dt11sc_unsignedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %5) #5
  br label %86

86:                                               ; preds = %85, %24
  %.pn.pn.pn = phi { ptr, i32 } [ %.pn.pn, %85 ], [ %25, %24 ]
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %5) #5
  call void @_ZN5sc_dt9sc_signedD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %4) #5
  br label %87

87:                                               ; preds = %86, %22
  %.pn.pn.pn.pn = phi { ptr, i32 } [ %.pn.pn.pn, %86 ], [ %23, %22 ]
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %4) #5
  call void @_ZN5sc_dt13sc_value_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3) #5
  br label %88

88:                                               ; preds = %87, %20
  %.pn.pn.pn.pn.pn = phi { ptr, i32 } [ %.pn.pn.pn.pn, %87 ], [ %21, %20 ]
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %3) #5
  call void @_ZN5sc_dt13sc_value_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %2) #5
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %2) #5
  resume { ptr, i32 } %.pn.pn.pn.pn.pn
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt6sc_intILi4EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt7sc_uintILi4EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt9sc_bigintILi4EEC2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt10sc_biguintILi4EEC2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #0 align 2

declare void @_ZN5sc_dt9sc_signedC1Ei(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) unnamed_addr #2

declare void @_ZN5sc_dt11sc_unsignedC1Ei(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt6sc_intILi4EEaSEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNK5sc_dt11sc_int_basecvxEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt6sc_intILi4EEppEi(ptr dead_on_unwind noalias writable sret(%"class.sc_dt::sc_int") align 8, ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt7sc_uintILi4EEaSEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNK5sc_dt12sc_uint_basecvyEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt7sc_uintILi4EEppEi(ptr dead_on_unwind noalias writable sret(%"class.sc_dt::sc_uint") align 8, ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt9sc_signedaSEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZN5sc_dtltERKNS_9sc_signedEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) local_unnamed_addr #4

declare void @_ZN5sc_dt9sc_signedppEi(ptr dead_on_unwind writable sret(%"class.sc_dt::sc_signed") align 8, ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt11sc_unsignedaSEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZN5sc_dtltERKNS_11sc_unsignedEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) local_unnamed_addr #4

declare void @_ZN5sc_dt11sc_unsignedppEi(ptr dead_on_unwind writable sret(%"class.sc_dt::sc_unsigned") align 8, ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt9sc_bigintILi4EEaSEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt10sc_biguintILi4EEaSEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(196) ptr @_ZN7sc_core9sc_signalIiLNS_16sc_writer_policyE0EEaSERKi(ptr noundef nonnull align 8 dereferenceable(196), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt11sc_unsignedD2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt9sc_signedD2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt13sc_value_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #3 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10}
!16 = !{!17, !20, i64 488}
!17 = !{!"_ZTS4test", !18, i64 0, !40, i64 232, !20, i64 416, !20, i64 424, !20, i64 432, !20, i64 440, !20, i64 448, !20, i64 456, !20, i64 464, !20, i64 472, !20, i64 480, !20, i64 488, !20, i64 496, !20, i64 504, !20, i64 512, !20, i64 520}
!18 = !{!"_ZTSN7sc_core9sc_moduleE", !19, i64 0, !32, i64 112, !33, i64 120, !35, i64 144, !37, i64 168, !39, i64 192, !20, i64 200, !6, i64 208, !20, i64 216, !20, i64 224}
!19 = !{!"_ZTSN7sc_core9sc_objectE", !20, i64 8, !21, i64 16, !25, i64 40, !29, i64 64, !20, i64 96, !20, i64 104}
!20 = !{!"any pointer", !7, i64 0}
!21 = !{!"_ZTSSt6vectorIPN7sc_core8sc_eventESaIS2_EE", !22, i64 0}
!22 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE12_Vector_implE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE17_Vector_impl_dataE", !20, i64 0, !20, i64 8, !20, i64 16}
!25 = !{!"_ZTSSt6vectorIPN7sc_core9sc_objectESaIS2_EE", !26, i64 0}
!26 = !{!"_ZTSSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE12_Vector_implE", !28, i64 0}
!28 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE17_Vector_impl_dataE", !20, i64 0, !20, i64 8, !20, i64 16}
!29 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !30, i64 0, !31, i64 8, !7, i64 16}
!30 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !20, i64 0}
!31 = !{!"long", !7, i64 0}
!32 = !{!"_ZTSN7sc_core15sc_process_hostE"}
!33 = !{!"_ZTSN7sc_core12sc_sensitiveE", !20, i64 0, !34, i64 8, !20, i64 16}
!34 = !{!"_ZTSN7sc_core12sc_sensitiveUt_E", !7, i64 0}
!35 = !{!"_ZTSN7sc_core16sc_sensitive_posE", !20, i64 0, !36, i64 8, !20, i64 16}
!36 = !{!"_ZTSN7sc_core16sc_sensitive_posUt_E", !7, i64 0}
!37 = !{!"_ZTSN7sc_core16sc_sensitive_negE", !20, i64 0, !38, i64 8, !20, i64 16}
!38 = !{!"_ZTSN7sc_core16sc_sensitive_negUt_E", !7, i64 0}
!39 = !{!"bool", !7, i64 0}
!40 = !{!"_ZTSN7sc_core5sc_inIbEE", !41, i64 0, !20, i64 152, !20, i64 160, !20, i64 168, !20, i64 176}
!41 = !{!"_ZTSN7sc_core7sc_portINS_15sc_signal_in_ifIbEELi1ELNS_14sc_port_policyE0EEE", !42, i64 0}
!42 = !{!"_ZTSN7sc_core9sc_port_bINS_15sc_signal_in_ifIbEEEE", !43, i64 0, !20, i64 120, !44, i64 128}
!43 = !{!"_ZTSN7sc_core12sc_port_baseE", !19, i64 0, !20, i64 112}
!44 = !{!"_ZTSSt6vectorIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE", !45, i64 0}
!45 = !{!"_ZTSSt12_Vector_baseIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE", !46, i64 0}
!46 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE12_Vector_implE", !47, i64 0}
!47 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core15sc_signal_in_ifIbEESaIS3_EE17_Vector_impl_dataE", !20, i64 0, !20, i64 8, !20, i64 16}


; Effective O3 passes: CorrelatedValuePropagationPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass