; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Bus/Pci (NvmeDisableController)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.NVME_CC = type { i16, i8, i8 }
%struct.NVME_CSTS = type { i32 }
%struct._NVME_CONTROLLER_PRIVATE_DATA = type { i32, ptr, ptr, ptr, ptr, i64, ptr, %struct.NVM_EXPRESS_PASS_THRU_MODE, %struct._NVM_EXPRESS_PASS_THRU_PROTOCOL, ptr, ptr, ptr, [2 x ptr], [2 x ptr], [2 x ptr], [2 x ptr], [2 x %struct.NVME_SQTDBL], [2 x %struct.NVME_CQHDBL], [2 x i8], [2 x i16], %struct.NVME_CAP, ptr }
%struct.NVM_EXPRESS_PASS_THRU_MODE = type { i32, i32, i32, i32, i64, i32 }
%struct._NVM_EXPRESS_PASS_THRU_PROTOCOL = type { ptr, ptr, ptr, ptr, ptr }
%struct.NVME_SQTDBL = type { i16, i16 }
%struct.NVME_CQHDBL = type { i16, i16 }
%struct.NVME_CAP = type { i16, i8, i8, i16, i8, i8 }
%struct.EFI_BOOT_SERVICES = type { %struct.EFI_TABLE_HEADER, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr }
%struct.EFI_TABLE_HEADER = type { i64, i32, i32, i32, i32 }

@gBS = external global ptr, align 8
@.str.11 = external hidden unnamed_addr constant [47 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i64 @ReadNvmeControllerConfiguration(ptr noundef, ptr noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local i64 @WriteNvmeControllerConfiguration(ptr noundef, ptr noundef) #1

declare zeroext i8 @DebugPrintEnabled() #2

declare zeroext i8 @DebugPrintLevelEnabled(i64 noundef) #2

declare void @DebugPrint(i64 noundef, ptr noundef, ...) #2

; Function Attrs: nounwind uwtable
declare dso_local i64 @ReadNvmeControllerStatus(ptr noundef, ptr noundef) #1

; Function Attrs: nounwind uwtable
define dso_local i64 @NvmeDisableController(ptr noundef %0) #1 {
  %2 = alloca i64, align 8
  %3 = alloca ptr, align 8
  %4 = alloca %struct.NVME_CC, align 1
  %5 = alloca %struct.NVME_CSTS, align 1
  %6 = alloca i64, align 8
  %7 = alloca i32, align 4
  %8 = alloca i8, align 1
  %9 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #3
  %10 = load ptr, ptr %3, align 8, !tbaa !5
  %11 = call i64 @ReadNvmeControllerConfiguration(ptr noundef %10, ptr noundef %4)
  store i64 %11, ptr %6, align 8, !tbaa !9
  %12 = load i64, ptr %6, align 8, !tbaa !9
  %13 = icmp slt i64 %12, 0
  br i1 %13, label %14, label %16

14:                                               ; preds = %1
  %15 = load i64, ptr %6, align 8, !tbaa !9
  store i64 %15, ptr %2, align 8
  store i32 1, ptr %9, align 4
  br label %87

16:                                               ; preds = %1
  %17 = load i16, ptr %4, align 1
  %18 = and i16 %17, -2
  %19 = or i16 %18, 0
  store i16 %19, ptr %4, align 1
  %20 = load ptr, ptr %3, align 8, !tbaa !5
  %21 = call i64 @WriteNvmeControllerConfiguration(ptr noundef %20, ptr noundef %4)
  store i64 %21, ptr %6, align 8, !tbaa !9
  %22 = load i64, ptr %6, align 8, !tbaa !9
  %23 = icmp slt i64 %22, 0
  br i1 %23, label %24, label %26

24:                                               ; preds = %16
  %25 = load i64, ptr %6, align 8, !tbaa !9
  store i64 %25, ptr %2, align 8
  store i32 1, ptr %9, align 4
  br label %87

26:                                               ; preds = %16
  %27 = load ptr, ptr %3, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct._NVME_CONTROLLER_PRIVATE_DATA, ptr %27, i32 0, i32 20
  %29 = getelementptr inbounds %struct.NVME_CAP, ptr %28, i32 0, i32 2
  %30 = load i8, ptr %29, align 1, !tbaa !11
  %31 = zext i8 %30 to i32
  %32 = icmp eq i32 %31, 0
  br i1 %32, label %33, label %34

33:                                               ; preds = %26
  store i8 1, ptr %8, align 1, !tbaa !18
  br label %39

34:                                               ; preds = %26
  %35 = load ptr, ptr %3, align 8, !tbaa !5
  %36 = getelementptr inbounds %struct._NVME_CONTROLLER_PRIVATE_DATA, ptr %35, i32 0, i32 20
  %37 = getelementptr inbounds %struct.NVME_CAP, ptr %36, i32 0, i32 2
  %38 = load i8, ptr %37, align 1, !tbaa !11
  store i8 %38, ptr %8, align 1, !tbaa !18
  br label %39

39:                                               ; preds = %34, %33
  %40 = load i8, ptr %8, align 1, !tbaa !18
  %41 = zext i8 %40 to i32
  %42 = mul nsw i32 %41, 500
  store i32 %42, ptr %7, align 4, !tbaa !19
  br label %43

43:                                               ; preds = %63, %39
  %44 = load i32, ptr %7, align 4, !tbaa !19
  %45 = icmp ne i32 %44, 0
  br i1 %45, label %46, label %66

46:                                               ; preds = %43
  %47 = load ptr, ptr @gBS, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.EFI_BOOT_SERVICES, ptr %47, i32 0, i32 29
  %49 = load ptr, ptr %48, align 8, !tbaa !20
  %50 = call i64 %49(i64 noundef 1000)
  %51 = load ptr, ptr %3, align 8, !tbaa !5
  %52 = call i64 @ReadNvmeControllerStatus(ptr noundef %51, ptr noundef %5)
  store i64 %52, ptr %6, align 8, !tbaa !9
  %53 = load i64, ptr %6, align 8, !tbaa !9
  %54 = icmp slt i64 %53, 0
  br i1 %54, label %55, label %57

55:                                               ; preds = %46
  %56 = load i64, ptr %6, align 8, !tbaa !9
  store i64 %56, ptr %2, align 8
  store i32 1, ptr %9, align 4
  br label %87

57:                                               ; preds = %46
  %58 = load i32, ptr %5, align 1
  %59 = and i32 %58, 1
  %60 = icmp eq i32 %59, 0
  br i1 %60, label %61, label %62

61:                                               ; preds = %57
  br label %66

62:                                               ; preds = %57
  br label %63

63:                                               ; preds = %62
  %64 = load i32, ptr %7, align 4, !tbaa !19
  %65 = add i32 %64, -1
  store i32 %65, ptr %7, align 4, !tbaa !19
  br label %43, !llvm.loop !23

66:                                               ; preds = %61, %43
  %67 = load i32, ptr %7, align 4, !tbaa !19
  %68 = icmp eq i32 %67, 0
  br i1 %68, label %69, label %70

69:                                               ; preds = %66
  store i64 -9223372036854775801, ptr %6, align 8, !tbaa !9
  br label %70

70:                                               ; preds = %69, %66
  br label %71

71:                                               ; preds = %70
  %72 = call zeroext i8 @DebugPrintEnabled()
  %73 = icmp ne i8 %72, 0
  br i1 %73, label %74, label %83

74:                                               ; preds = %71
  br label %75

75:                                               ; preds = %74
  %76 = call zeroext i8 @DebugPrintLevelEnabled(i64 noundef 64)
  %77 = icmp ne i8 %76, 0
  br i1 %77, label %78, label %80

78:                                               ; preds = %75
  %79 = load i64, ptr %6, align 8, !tbaa !9
  call void (i64, ptr, ...) @DebugPrint(i64 noundef 64, ptr noundef @.str.11, i64 noundef %79)
  br label %80

80:                                               ; preds = %78, %75
  br label %81

81:                                               ; preds = %80
  br label %82

82:                                               ; preds = %81
  br label %83

83:                                               ; preds = %82, %71
  br label %84

84:                                               ; preds = %83
  br label %85

85:                                               ; preds = %84
  %86 = load i64, ptr %6, align 8, !tbaa !9
  store i64 %86, ptr %2, align 8
  store i32 1, ptr %9, align 4
  br label %87

87:                                               ; preds = %85, %55, %24, %14
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  %88 = load i64, ptr %2, align 8
  ret i64 %88
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = !{!12, !7, i64 241}
!12 = !{!"_NVME_CONTROLLER_PRIVATE_DATA", !13, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !10, i64 40, !6, i64 48, !14, i64 56, !15, i64 88, !6, i64 128, !6, i64 136, !6, i64 144, !7, i64 152, !7, i64 168, !7, i64 184, !7, i64 200, !7, i64 216, !7, i64 224, !7, i64 232, !7, i64 234, !16, i64 238, !6, i64 248}
!13 = !{!"int", !7, i64 0}
!14 = !{!"", !13, i64 0, !13, i64 4, !13, i64 8, !13, i64 12, !10, i64 16, !13, i64 24}
!15 = !{!"_NVM_EXPRESS_PASS_THRU_PROTOCOL", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32}
!16 = !{!"", !17, i64 0, !7, i64 2, !7, i64 2, !7, i64 2, !7, i64 3, !17, i64 4, !17, i64 4, !17, i64 4, !17, i64 5, !7, i64 6, !7, i64 6, !7, i64 7}
!17 = !{!"short", !7, i64 0}
!18 = !{!7, !7, i64 0}
!19 = !{!13, !13, i64 0}
!20 = !{!21, !6, i64 248}
!21 = !{!"", !22, i64 0, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !6, i64 120, !6, i64 128, !6, i64 136, !6, i64 144, !6, i64 152, !6, i64 160, !6, i64 168, !6, i64 176, !6, i64 184, !6, i64 192, !6, i64 200, !6, i64 208, !6, i64 216, !6, i64 224, !6, i64 232, !6, i64 240, !6, i64 248, !6, i64 256, !6, i64 264, !6, i64 272, !6, i64 280, !6, i64 288, !6, i64 296, !6, i64 304, !6, i64 312, !6, i64 320, !6, i64 328, !6, i64 336, !6, i64 344, !6, i64 352, !6, i64 360, !6, i64 368}
!22 = !{!"", !10, i64 0, !13, i64 8, !13, i64 12, !13, i64 16, !13, i64 20}
!23 = distinct !{!23, !24}
!24 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.NVME_CC = type { i16, i8, i8 }
%struct.NVME_CSTS = type { i32 }

@gBS = external local_unnamed_addr global ptr, align 8
@.str.11 = external hidden unnamed_addr constant [47 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i64 @ReadNvmeControllerConfiguration(ptr noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local i64 @WriteNvmeControllerConfiguration(ptr noundef, ptr noundef) local_unnamed_addr #1

declare zeroext i8 @DebugPrintEnabled() local_unnamed_addr #2

declare zeroext i8 @DebugPrintLevelEnabled(i64 noundef) local_unnamed_addr #2

declare void @DebugPrint(i64 noundef, ptr noundef, ...) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
declare dso_local i64 @ReadNvmeControllerStatus(ptr noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local i64 @NvmeDisableController(ptr noundef %0) local_unnamed_addr #1 {
  %2 = alloca %struct.NVME_CC, align 2
  %3 = alloca %struct.NVME_CSTS, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
  %4 = call i64 @ReadNvmeControllerConfiguration(ptr noundef %0, ptr noundef nonnull %2)
  %5 = icmp slt i64 %4, 0
  br i1 %5, label %.loopexit, label %6

6:                                                ; preds = %1
  %7 = load i16, ptr %2, align 2
  %8 = and i16 %7, -2
  store i16 %8, ptr %2, align 2
  %9 = call i64 @WriteNvmeControllerConfiguration(ptr noundef %0, ptr noundef nonnull %2)
  %10 = icmp slt i64 %9, 0
  br i1 %10, label %.loopexit, label %11

11:                                               ; preds = %6
  %12 = getelementptr inbounds i8, ptr %0, i64 241
  %13 = load i8, ptr %12, align 1, !tbaa !5
  %14 = icmp eq i8 %13, 0
  %15 = zext i8 %13 to i32
  %16 = mul nuw nsw i32 %15, 500
  %spec.select27 = select i1 %14, i32 500, i32 %16
  %.not28 = icmp eq i32 %spec.select27, 0
  br i1 %.not28, label %._crit_edge, label %.lr.ph

select.unfold:                                    ; preds = %24
  %17 = add nsw i32 %.01729, -1
  %.not = icmp eq i32 %17, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph, !llvm.loop !16

.lr.ph:                                           ; preds = %11, %select.unfold
  %.01729 = phi i32 [ %17, %select.unfold ], [ %spec.select27, %11 ]
  %18 = load ptr, ptr @gBS, align 8, !tbaa !18
  %19 = getelementptr inbounds i8, ptr %18, i64 248
  %20 = load ptr, ptr %19, align 8, !tbaa !19
  %21 = call i64 %20(i64 noundef 1000) #3
  %22 = call i64 @ReadNvmeControllerStatus(ptr noundef %0, ptr noundef nonnull %3)
  %23 = icmp slt i64 %22, 0
  br i1 %23, label %.loopexit, label %24

24:                                               ; preds = %.lr.ph
  %25 = load i32, ptr %3, align 4
  %26 = and i32 %25, 1
  %27 = icmp eq i32 %26, 0
  br i1 %27, label %._crit_edge, label %select.unfold

._crit_edge:                                      ; preds = %select.unfold, %24, %11
  %spec.select = phi i64 [ -9223372036854775801, %11 ], [ %22, %24 ], [ -9223372036854775801, %select.unfold ]
  %28 = call zeroext i8 @DebugPrintEnabled() #3
  %.not25 = icmp eq i8 %28, 0
  br i1 %.not25, label %.loopexit, label %29

29:                                               ; preds = %._crit_edge
  %30 = call zeroext i8 @DebugPrintLevelEnabled(i64 noundef 64) #3
  %.not26 = icmp eq i8 %30, 0
  br i1 %.not26, label %.loopexit, label %31

31:                                               ; preds = %29
  call void (i64, ptr, ...) @DebugPrint(i64 noundef 64, ptr noundef nonnull @.str.11, i64 noundef %spec.select) #3
  br label %.loopexit

.loopexit:                                        ; preds = %.lr.ph, %._crit_edge, %31, %29, %6, %1
  %.019 = phi i64 [ %4, %1 ], [ %9, %6 ], [ %spec.select, %29 ], [ %spec.select, %31 ], [ %spec.select, %._crit_edge ], [ %22, %.lr.ph ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
  ret i64 %.019
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 241}
!6 = !{!"_NVME_CONTROLLER_PRIVATE_DATA", !7, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !11, i64 40, !10, i64 48, !12, i64 56, !13, i64 88, !10, i64 128, !10, i64 136, !10, i64 144, !8, i64 152, !8, i64 168, !8, i64 184, !8, i64 200, !8, i64 216, !8, i64 224, !8, i64 232, !8, i64 234, !14, i64 238, !10, i64 248}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!"long long", !8, i64 0}
!12 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !11, i64 16, !7, i64 24}
!13 = !{!"_NVM_EXPRESS_PASS_THRU_PROTOCOL", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32}
!14 = !{!"", !15, i64 0, !8, i64 2, !8, i64 2, !8, i64 2, !8, i64 3, !15, i64 4, !15, i64 4, !15, i64 4, !15, i64 5, !8, i64 6, !8, i64 6, !8, i64 7}
!15 = !{!"short", !8, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = !{!10, !10, i64 0}
!19 = !{!20, !10, i64 248}
!20 = !{!"", !21, i64 0, !10, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !10, i64 56, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !10, i64 144, !10, i64 152, !10, i64 160, !10, i64 168, !10, i64 176, !10, i64 184, !10, i64 192, !10, i64 200, !10, i64 208, !10, i64 216, !10, i64 224, !10, i64 232, !10, i64 240, !10, i64 248, !10, i64 256, !10, i64 264, !10, i64 272, !10, i64 280, !10, i64 288, !10, i64 296, !10, i64 304, !10, i64 312, !10, i64 320, !10, i64 328, !10, i64 336, !10, i64 344, !10, i64 352, !10, i64 360, !10, i64 368}
!21 = !{!"", !11, i64 0, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass