; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/datatypes/int (sc_signed)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::sc_signed_subref_r" = type <{ %"class.sc_dt::sc_value_base", i32, [4 x i8], ptr, i32, [4 x i8] }>
%"class.sc_dt::sc_value_base" = type { ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt9sc_signed3setEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt9sc_signed3setEib(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef, i1 noundef zeroext) #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5sc_dt16sc_signed_subref10concat_setEyi(ptr noundef nonnull align 8 dereferenceable(28) %0, i64 noundef %1, i32 noundef %2) unnamed_addr #2 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca i64, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !9
  store i32 %2, ptr %6, align 4, !tbaa !11
  %10 = load ptr, ptr %4, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %11 = load i32, ptr %6, align 4, !tbaa !11
  %12 = icmp slt i32 %11, 64
  br i1 %12, label %13, label %56

13:                                               ; preds = %3
  %14 = load i64, ptr %5, align 8, !tbaa !9
  %15 = load i32, ptr %6, align 4, !tbaa !11
  %16 = zext i32 %15 to i64
  %17 = lshr i64 %14, %16
  store i64 %17, ptr %5, align 8, !tbaa !9
  %18 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %10, i32 0, i32 1
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %19 = load i32, ptr %6, align 4, !tbaa !11
  %20 = sub nsw i32 63, %19
  %21 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %10, i32 0, i32 4
  %22 = load i32, ptr %21, align 8, !tbaa !13
  %23 = add nsw i32 %20, %22
  store i32 %23, ptr %9, align 4, !tbaa !11
  %24 = call noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %18, ptr noundef nonnull align 4 dereferenceable(4) %9)
  store i32 %24, ptr %8, align 4, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  %25 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %10, i32 0, i32 4
  %26 = load i32, ptr %25, align 8, !tbaa !13
  store i32 %26, ptr %7, align 4, !tbaa !11
  br label %27

27:                                               ; preds = %40, %13
  %28 = load i32, ptr %7, align 4, !tbaa !11
  %29 = load i32, ptr %8, align 4, !tbaa !11
  %30 = icmp sle i32 %28, %29
  br i1 %30, label %31, label %43

31:                                               ; preds = %27
  %32 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %10, i32 0, i32 3
  %33 = load ptr, ptr %32, align 8, !tbaa !16
  %34 = load i32, ptr %7, align 4, !tbaa !11
  %35 = load i64, ptr %5, align 8, !tbaa !9
  %36 = and i64 %35, 1
  %37 = icmp ne i64 %36, 0
  call void @_ZN5sc_dt9sc_signed3setEib(ptr noundef nonnull align 8 dereferenceable(32) %33, i32 noundef %34, i1 noundef zeroext %37)
  %38 = load i64, ptr %5, align 8, !tbaa !9
  %39 = lshr i64 %38, 1
  store i64 %39, ptr %5, align 8, !tbaa !9
  br label %40

40:                                               ; preds = %31
  %41 = load i32, ptr %7, align 4, !tbaa !11
  %42 = add nsw i32 %41, 1
  store i32 %42, ptr %7, align 4, !tbaa !11
  br label %27, !llvm.loop !17

43:                                               ; preds = %27
  br label %44

44:                                               ; preds = %52, %43
  %45 = load i32, ptr %7, align 4, !tbaa !11
  %46 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %10, i32 0, i32 1
  %47 = load i32, ptr %46, align 8, !tbaa !19
  %48 = icmp sle i32 %45, %47
  br i1 %48, label %49, label %55

49:                                               ; preds = %44
  %50 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %10, i32 0, i32 3
  %51 = load ptr, ptr %50, align 8, !tbaa !16
  call void @_ZN5sc_dt9sc_signed3setEi(ptr noundef nonnull align 8 dereferenceable(32) %51, i32 noundef 0)
  br label %52

52:                                               ; preds = %49
  %53 = load i32, ptr %7, align 4, !tbaa !11
  %54 = add nsw i32 %53, 1
  store i32 %54, ptr %7, align 4, !tbaa !11
  br label %44, !llvm.loop !20

55:                                               ; preds = %44
  br label %71

56:                                               ; preds = %3
  %57 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %10, i32 0, i32 4
  %58 = load i32, ptr %57, align 8, !tbaa !13
  store i32 %58, ptr %7, align 4, !tbaa !11
  br label %59

59:                                               ; preds = %67, %56
  %60 = load i32, ptr %7, align 4, !tbaa !11
  %61 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %10, i32 0, i32 1
  %62 = load i32, ptr %61, align 8, !tbaa !19
  %63 = icmp sle i32 %60, %62
  br i1 %63, label %64, label %70

64:                                               ; preds = %59
  %65 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %10, i32 0, i32 3
  %66 = load ptr, ptr %65, align 8, !tbaa !16
  call void @_ZN5sc_dt9sc_signed3setEi(ptr noundef nonnull align 8 dereferenceable(32) %66, i32 noundef 0)
  br label %67

67:                                               ; preds = %64
  %68 = load i32, ptr %7, align 4, !tbaa !11
  %69 = add nsw i32 %68, 1
  store i32 %69, ptr %7, align 4, !tbaa !11
  br label %59, !llvm.loop !21

70:                                               ; preds = %59
  br label %71

71:                                               ; preds = %70, %55
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !12, i64 24}
!14 = !{!"_ZTSN5sc_dt18sc_signed_subref_rE", !15, i64 0, !12, i64 8, !6, i64 16, !12, i64 24}
!15 = !{!"_ZTSN5sc_dt13sc_value_baseE"}
!16 = !{!14, !6, i64 16}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = !{!14, !12, i64 8}
!20 = distinct !{!20, !18}
!21 = distinct !{!21, !18}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt9sc_signed3setEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt9sc_signed3setEib(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef, i1 noundef zeroext) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5sc_dt16sc_signed_subref10concat_setEyi(ptr noundef nonnull align 8 dereferenceable(28) %0, i64 noundef %1, i32 noundef %2) unnamed_addr #2 align 2 {
  %4 = alloca i32, align 4
  %5 = icmp slt i32 %2, 64
  br i1 %5, label %6, label %29

6:                                                ; preds = %3
  %7 = getelementptr inbounds i8, ptr %0, i64 8
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
  %8 = getelementptr inbounds i8, ptr %0, i64 24
  %9 = load i32, ptr %8, align 8, !tbaa !5
  %reass.sub28 = sub i32 %9, %2
  %10 = add i32 %reass.sub28, 63
  store i32 %10, ptr %4, align 4, !tbaa !12
  %11 = call noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %7, ptr noundef nonnull align 4 dereferenceable(4) %4)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
  %12 = load i32, ptr %8, align 8, !tbaa !5
  %.not1621 = icmp sgt i32 %12, %11
  br i1 %.not1621, label %.preheader, label %.lr.ph24

.lr.ph24:                                         ; preds = %6
  %13 = zext nneg i32 %2 to i64
  %14 = lshr i64 %1, %13
  %15 = getelementptr inbounds i8, ptr %0, i64 16
  %16 = add i32 %11, 1
  br label %19

.preheader:                                       ; preds = %19, %6
  %.014.lcssa = phi i32 [ %12, %6 ], [ %16, %19 ]
  %17 = load i32, ptr %7, align 8, !tbaa !13
  %.not1725 = icmp sgt i32 %.014.lcssa, %17
  br i1 %.not1725, label %.loopexit, label %.lr.ph27

.lr.ph27:                                         ; preds = %.preheader
  %18 = getelementptr inbounds i8, ptr %0, i64 16
  br label %25

19:                                               ; preds = %.lr.ph24, %19
  %.023 = phi i64 [ %14, %.lr.ph24 ], [ %23, %19 ]
  %.01422 = phi i32 [ %12, %.lr.ph24 ], [ %24, %19 ]
  %20 = load ptr, ptr %15, align 8, !tbaa !14
  %21 = and i64 %.023, 1
  %22 = icmp ne i64 %21, 0
  call void @_ZN5sc_dt9sc_signed3setEib(ptr noundef nonnull align 8 dereferenceable(32) %20, i32 noundef %.01422, i1 noundef zeroext %22)
  %23 = lshr i64 %.023, 1
  %24 = add i32 %.01422, 1
  %exitcond.not = icmp eq i32 %.01422, %11
  br i1 %exitcond.not, label %.preheader, label %19, !llvm.loop !15

25:                                               ; preds = %.lr.ph27, %25
  %.126 = phi i32 [ %.014.lcssa, %.lr.ph27 ], [ %27, %25 ]
  %26 = load ptr, ptr %18, align 8, !tbaa !14
  call void @_ZN5sc_dt9sc_signed3setEi(ptr noundef nonnull align 8 dereferenceable(32) %26, i32 noundef 0)
  %27 = add nsw i32 %.126, 1
  %28 = load i32, ptr %7, align 8, !tbaa !13
  %.not17.not = icmp slt i32 %.126, %28
  br i1 %.not17.not, label %25, label %.loopexit, !llvm.loop !17

29:                                               ; preds = %3
  %30 = getelementptr inbounds i8, ptr %0, i64 24
  %31 = load i32, ptr %30, align 8, !tbaa !5
  %32 = getelementptr inbounds i8, ptr %0, i64 8
  %33 = load i32, ptr %32, align 8, !tbaa !13
  %.not19 = icmp sgt i32 %31, %33
  br i1 %.not19, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %29
  %34 = getelementptr inbounds i8, ptr %0, i64 16
  br label %35

35:                                               ; preds = %.lr.ph, %35
  %.220 = phi i32 [ %31, %.lr.ph ], [ %37, %35 ]
  %36 = load ptr, ptr %34, align 8, !tbaa !14
  tail call void @_ZN5sc_dt9sc_signed3setEi(ptr noundef nonnull align 8 dereferenceable(32) %36, i32 noundef 0)
  %37 = add nsw i32 %.220, 1
  %38 = load i32, ptr %32, align 8, !tbaa !13
  %.not.not = icmp slt i32 %.220, %38
  br i1 %.not.not, label %35, label %.loopexit, !llvm.loop !18

.loopexit:                                        ; preds = %35, %25, %29, %.preheader
  ret void
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 24}
!6 = !{!"_ZTSN5sc_dt18sc_signed_subref_rE", !7, i64 0, !8, i64 8, !11, i64 16, !8, i64 24}
!7 = !{!"_ZTSN5sc_dt13sc_value_baseE"}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!6, !8, i64 8}
!14 = !{!6, !11, i64 16}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = distinct !{!17, !16}
!18 = distinct !{!18, !16}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass