; LLVM IR from gem5/gem5 :: ext/mcpat/cacti/uca.ll (ZN3UCAD2Ev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.UCA = type { %class.Component, %class.DynamicParameter, %class.Bank, ptr, ptr, ptr, ptr, ptr, %class.powerDef, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double }
%class.Component = type { %class.Area, %class.powerDef, %class.powerDef, double, double }
%class.Area = type { double, double, double }
%class.DynamicParameter = type <{ i8, i8, i8, i8, i32, i32, i32, double, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, [7 x i8], double, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i8], double, i32, i32, i32, i32, i32, i32, i32, i8, [3 x i8], %class.Area, %class.Area, i8, [7 x i8] }>
%class.Bank = type { %class.Component, ptr, %class.Mat, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, i32, i32, i32 }
%class.Mat = type { %class.Component, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, double, double, double, double, double, double, double, double, double, double, double, double, double, %class.Subarray, %class.powerDef, %class.powerDef, %class.powerDef, double, i32, i32, double, %class.Area, %class.Area, i8, i8, i8, i8, i32, %class.powerDef, double, double, double, double, double, double, %class.powerDef, i32, i32, i32, i32, double, i32, i32, i32, i32, i32, i32 }
%class.Subarray = type { %class.Component, ptr, i32, i32, i32, i32, %class.Area, %class.Area, i8, double, double, double, double, double, double, double, double }
%class.powerDef = type { %class.powerComponents, %class.powerComponents, %class.powerComponents }
%class.powerComponents = type { double, double, double, double, double }

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) #0

; Function Attrs: nounwind
declare void @_ZN4BankD1Ev(ptr noundef nonnull align 8 dereferenceable(3416)) unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN3UCAD2Ev(ptr noundef nonnull align 8 dereferenceable(4320) %0) unnamed_addr #2 align 2 {
  %2 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %3 = load ptr, ptr %2, align 8
  %4 = getelementptr inbounds %class.UCA, ptr %3, i32 0, i32 3
  %5 = load ptr, ptr %4, align 8, !tbaa !9
  %6 = icmp eq ptr %5, null
  br i1 %6, label %8, label %7

7:                                                ; preds = %1
  call void @_ZN9ComponentD2Ev(ptr noundef nonnull align 8 dereferenceable(544) %5) #3
  call void @_ZdlPvm(ptr noundef %5, i64 noundef 544) #4
  br label %8

8:                                                ; preds = %7, %1
  %9 = getelementptr inbounds %class.UCA, ptr %3, i32 0, i32 4
  %10 = load ptr, ptr %9, align 8, !tbaa !22
  %11 = icmp eq ptr %10, null
  br i1 %11, label %13, label %12

12:                                               ; preds = %8
  call void @_ZN9ComponentD2Ev(ptr noundef nonnull align 8 dereferenceable(544) %10) #3
  call void @_ZdlPvm(ptr noundef %10, i64 noundef 544) #4
  br label %13

13:                                               ; preds = %12, %8
  %14 = getelementptr inbounds %class.UCA, ptr %3, i32 0, i32 5
  %15 = load ptr, ptr %14, align 8, !tbaa !23
  %16 = icmp eq ptr %15, null
  br i1 %16, label %18, label %17

17:                                               ; preds = %13
  call void @_ZN9ComponentD2Ev(ptr noundef nonnull align 8 dereferenceable(544) %15) #3
  call void @_ZdlPvm(ptr noundef %15, i64 noundef 544) #4
  br label %18

18:                                               ; preds = %17, %13
  %19 = getelementptr inbounds %class.UCA, ptr %3, i32 0, i32 2
  call void @_ZN4BankD1Ev(ptr noundef nonnull align 8 dereferenceable(3416) %19) #3
  call void @_ZN9ComponentD2Ev(ptr noundef nonnull align 8 dereferenceable(280) %3) #3
  ret void
}

; Function Attrs: nounwind
declare void @_ZN9ComponentD2Ev(ptr noundef nonnull align 8 dereferenceable(280)) unnamed_addr #1

attributes #0 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 3968}
!10 = !{!"_ZTS3UCA", !11, i64 0, !16, i64 280, !19, i64 552, !6, i64 3968, !6, i64 3976, !6, i64 3984, !6, i64 3992, !6, i64 4000, !14, i64 4008, !18, i64 4128, !18, i64 4132, !18, i64 4136, !18, i64 4140, !18, i64 4144, !18, i64 4148, !18, i64 4152, !18, i64 4156, !18, i64 4160, !18, i64 4164, !13, i64 4168, !13, i64 4176, !13, i64 4184, !13, i64 4192, !13, i64 4200, !13, i64 4208, !13, i64 4216, !13, i64 4224, !13, i64 4232, !13, i64 4240, !13, i64 4248, !13, i64 4256, !13, i64 4264, !13, i64 4272, !13, i64 4280, !13, i64 4288, !13, i64 4296, !13, i64 4304, !13, i64 4312}
!11 = !{!"_ZTS9Component", !12, i64 0, !14, i64 24, !14, i64 144, !13, i64 264, !13, i64 272}
!12 = !{!"_ZTS4Area", !13, i64 0, !13, i64 8, !13, i64 16}
!13 = !{!"double", !7, i64 0}
!14 = !{!"_ZTS8powerDef", !15, i64 0, !15, i64 40, !15, i64 80}
!15 = !{!"_ZTS15powerComponents", !13, i64 0, !13, i64 8, !13, i64 16, !13, i64 24, !13, i64 32}
!16 = !{!"_ZTS16DynamicParameter", !17, i64 0, !17, i64 1, !17, i64 2, !17, i64 3, !18, i64 4, !18, i64 8, !18, i64 12, !13, i64 16, !18, i64 24, !18, i64 28, !18, i64 32, !18, i64 36, !18, i64 40, !18, i64 44, !18, i64 48, !18, i64 52, !18, i64 56, !18, i64 60, !18, i64 64, !18, i64 68, !18, i64 72, !18, i64 76, !18, i64 80, !18, i64 84, !18, i64 88, !18, i64 92, !18, i64 96, !18, i64 100, !18, i64 104, !18, i64 108, !18, i64 112, !18, i64 116, !17, i64 120, !13, i64 128, !18, i64 136, !18, i64 140, !18, i64 144, !18, i64 148, !18, i64 152, !18, i64 156, !18, i64 160, !18, i64 164, !18, i64 168, !13, i64 176, !18, i64 184, !18, i64 188, !18, i64 192, !18, i64 196, !18, i64 200, !18, i64 204, !18, i64 208, !17, i64 212, !12, i64 216, !12, i64 240, !17, i64 264}
!17 = !{!"bool", !7, i64 0}
!18 = !{!"int", !7, i64 0}
!19 = !{!"_ZTS4Bank", !11, i64 0, !6, i64 280, !20, i64 288, !6, i64 3352, !6, i64 3360, !6, i64 3368, !6, i64 3376, !6, i64 3384, !18, i64 3392, !18, i64 3396, !18, i64 3400, !18, i64 3404, !18, i64 3408, !18, i64 3412}
!20 = !{!"_ZTS3Mat", !11, i64 0, !6, i64 280, !6, i64 288, !6, i64 296, !6, i64 304, !6, i64 312, !6, i64 320, !6, i64 328, !6, i64 336, !6, i64 344, !6, i64 352, !6, i64 360, !6, i64 368, !6, i64 376, !6, i64 384, !6, i64 392, !6, i64 400, !6, i64 408, !6, i64 416, !6, i64 424, !6, i64 432, !14, i64 440, !14, i64 560, !14, i64 680, !14, i64 800, !14, i64 920, !14, i64 1040, !14, i64 1160, !14, i64 1280, !14, i64 1400, !14, i64 1520, !14, i64 1640, !13, i64 1760, !13, i64 1768, !13, i64 1776, !13, i64 1784, !13, i64 1792, !13, i64 1800, !13, i64 1808, !13, i64 1816, !13, i64 1824, !13, i64 1832, !13, i64 1840, !13, i64 1848, !13, i64 1856, !21, i64 1864, !14, i64 2288, !14, i64 2408, !14, i64 2528, !13, i64 2648, !18, i64 2656, !18, i64 2660, !13, i64 2664, !12, i64 2672, !12, i64 2696, !17, i64 2720, !17, i64 2721, !17, i64 2722, !17, i64 2723, !18, i64 2724, !14, i64 2728, !13, i64 2848, !13, i64 2856, !13, i64 2864, !13, i64 2872, !13, i64 2880, !13, i64 2888, !14, i64 2896, !18, i64 3016, !18, i64 3020, !18, i64 3024, !18, i64 3028, !13, i64 3032, !18, i64 3040, !18, i64 3044, !18, i64 3048, !18, i64 3052, !18, i64 3056, !18, i64 3060}
!21 = !{!"_ZTS8Subarray", !11, i64 0, !6, i64 280, !18, i64 288, !18, i64 292, !18, i64 296, !18, i64 300, !12, i64 304, !12, i64 328, !17, i64 352, !13, i64 360, !13, i64 368, !13, i64 376, !13, i64 384, !13, i64 392, !13, i64 400, !13, i64 408, !13, i64 416}
!22 = !{!10, !6, i64 3976}
!23 = !{!10, !6, i64 3984}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: nounwind
declare void @_ZN4BankD1Ev(ptr noundef nonnull align 8 dereferenceable(3416)) unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN3UCAD2Ev(ptr noundef nonnull align 8 dereferenceable(4320) %0) unnamed_addr #2 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 3968
  %3 = load ptr, ptr %2, align 8, !tbaa !5
  %4 = icmp eq ptr %3, null
  br i1 %4, label %6, label %5

5:                                                ; preds = %1
  tail call void @_ZN9ComponentD2Ev(ptr noundef nonnull align 8 dereferenceable(544) %3) #3
  tail call void @_ZdlPvm(ptr noundef nonnull %3, i64 noundef 544) #4
  br label %6

6:                                                ; preds = %5, %1
  %7 = getelementptr inbounds i8, ptr %0, i64 3976
  %8 = load ptr, ptr %7, align 8, !tbaa !21
  %9 = icmp eq ptr %8, null
  br i1 %9, label %11, label %10

10:                                               ; preds = %6
  tail call void @_ZN9ComponentD2Ev(ptr noundef nonnull align 8 dereferenceable(544) %8) #3
  tail call void @_ZdlPvm(ptr noundef nonnull %8, i64 noundef 544) #4
  br label %11

11:                                               ; preds = %10, %6
  %12 = getelementptr inbounds i8, ptr %0, i64 3984
  %13 = load ptr, ptr %12, align 8, !tbaa !22
  %14 = icmp eq ptr %13, null
  br i1 %14, label %16, label %15

15:                                               ; preds = %11
  tail call void @_ZN9ComponentD2Ev(ptr noundef nonnull align 8 dereferenceable(544) %13) #3
  tail call void @_ZdlPvm(ptr noundef nonnull %13, i64 noundef 544) #4
  br label %16

16:                                               ; preds = %15, %11
  %17 = getelementptr inbounds i8, ptr %0, i64 552
  tail call void @_ZN4BankD1Ev(ptr noundef nonnull align 8 dereferenceable(3416) %17) #3
  tail call void @_ZN9ComponentD2Ev(ptr noundef nonnull align 8 dereferenceable(280) %0) #3
  ret void
}

; Function Attrs: nounwind
declare void @_ZN9ComponentD2Ev(ptr noundef nonnull align 8 dereferenceable(280)) unnamed_addr #1

attributes #0 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !18, i64 3968}
!6 = !{!"_ZTS3UCA", !7, i64 0, !14, i64 280, !17, i64 552, !18, i64 3968, !18, i64 3976, !18, i64 3984, !18, i64 3992, !18, i64 4000, !12, i64 4008, !16, i64 4128, !16, i64 4132, !16, i64 4136, !16, i64 4140, !16, i64 4144, !16, i64 4148, !16, i64 4152, !16, i64 4156, !16, i64 4160, !16, i64 4164, !9, i64 4168, !9, i64 4176, !9, i64 4184, !9, i64 4192, !9, i64 4200, !9, i64 4208, !9, i64 4216, !9, i64 4224, !9, i64 4232, !9, i64 4240, !9, i64 4248, !9, i64 4256, !9, i64 4264, !9, i64 4272, !9, i64 4280, !9, i64 4288, !9, i64 4296, !9, i64 4304, !9, i64 4312}
!7 = !{!"_ZTS9Component", !8, i64 0, !12, i64 24, !12, i64 144, !9, i64 264, !9, i64 272}
!8 = !{!"_ZTS4Area", !9, i64 0, !9, i64 8, !9, i64 16}
!9 = !{!"double", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C++ TBAA"}
!12 = !{!"_ZTS8powerDef", !13, i64 0, !13, i64 40, !13, i64 80}
!13 = !{!"_ZTS15powerComponents", !9, i64 0, !9, i64 8, !9, i64 16, !9, i64 24, !9, i64 32}
!14 = !{!"_ZTS16DynamicParameter", !15, i64 0, !15, i64 1, !15, i64 2, !15, i64 3, !16, i64 4, !16, i64 8, !16, i64 12, !9, i64 16, !16, i64 24, !16, i64 28, !16, i64 32, !16, i64 36, !16, i64 40, !16, i64 44, !16, i64 48, !16, i64 52, !16, i64 56, !16, i64 60, !16, i64 64, !16, i64 68, !16, i64 72, !16, i64 76, !16, i64 80, !16, i64 84, !16, i64 88, !16, i64 92, !16, i64 96, !16, i64 100, !16, i64 104, !16, i64 108, !16, i64 112, !16, i64 116, !15, i64 120, !9, i64 128, !16, i64 136, !16, i64 140, !16, i64 144, !16, i64 148, !16, i64 152, !16, i64 156, !16, i64 160, !16, i64 164, !16, i64 168, !9, i64 176, !16, i64 184, !16, i64 188, !16, i64 192, !16, i64 196, !16, i64 200, !16, i64 204, !16, i64 208, !15, i64 212, !8, i64 216, !8, i64 240, !15, i64 264}
!15 = !{!"bool", !10, i64 0}
!16 = !{!"int", !10, i64 0}
!17 = !{!"_ZTS4Bank", !7, i64 0, !18, i64 280, !19, i64 288, !18, i64 3352, !18, i64 3360, !18, i64 3368, !18, i64 3376, !18, i64 3384, !16, i64 3392, !16, i64 3396, !16, i64 3400, !16, i64 3404, !16, i64 3408, !16, i64 3412}
!18 = !{!"any pointer", !10, i64 0}
!19 = !{!"_ZTS3Mat", !7, i64 0, !18, i64 280, !18, i64 288, !18, i64 296, !18, i64 304, !18, i64 312, !18, i64 320, !18, i64 328, !18, i64 336, !18, i64 344, !18, i64 352, !18, i64 360, !18, i64 368, !18, i64 376, !18, i64 384, !18, i64 392, !18, i64 400, !18, i64 408, !18, i64 416, !18, i64 424, !18, i64 432, !12, i64 440, !12, i64 560, !12, i64 680, !12, i64 800, !12, i64 920, !12, i64 1040, !12, i64 1160, !12, i64 1280, !12, i64 1400, !12, i64 1520, !12, i64 1640, !9, i64 1760, !9, i64 1768, !9, i64 1776, !9, i64 1784, !9, i64 1792, !9, i64 1800, !9, i64 1808, !9, i64 1816, !9, i64 1824, !9, i64 1832, !9, i64 1840, !9, i64 1848, !9, i64 1856, !20, i64 1864, !12, i64 2288, !12, i64 2408, !12, i64 2528, !9, i64 2648, !16, i64 2656, !16, i64 2660, !9, i64 2664, !8, i64 2672, !8, i64 2696, !15, i64 2720, !15, i64 2721, !15, i64 2722, !15, i64 2723, !16, i64 2724, !12, i64 2728, !9, i64 2848, !9, i64 2856, !9, i64 2864, !9, i64 2872, !9, i64 2880, !9, i64 2888, !12, i64 2896, !16, i64 3016, !16, i64 3020, !16, i64 3024, !16, i64 3028, !9, i64 3032, !16, i64 3040, !16, i64 3044, !16, i64 3048, !16, i64 3052, !16, i64 3056, !16, i64 3060}
!20 = !{!"_ZTS8Subarray", !7, i64 0, !18, i64 280, !16, i64 288, !16, i64 292, !16, i64 296, !16, i64 300, !8, i64 304, !8, i64 328, !15, i64 352, !9, i64 360, !9, i64 368, !9, i64 376, !9, i64 384, !9, i64 392, !9, i64 400, !9, i64 408, !9, i64 416}
!21 = !{!6, !18, i64 3976}
!22 = !{!6, !18, i64 3984}


; Effective O3 passes: CorrelatedValuePropagationPass,GlobalOptPass,InstCombinePass,SROAPass,TailCallElimPass