; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/datatypes/int/sc_signed.ll (ZN5sc_dt16sc_signed_subrefaSEl)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::sc_signed_subref_r" = type <{ %"class.sc_dt::sc_value_base", i32, [4 x i8], ptr, i32, [4 x i8] }>
%"class.sc_dt::sc_value_base" = type { ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt9sc_signed3setEib(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef, i1 noundef zeroext) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt16sc_signed_subrefaSEl(ptr noundef nonnull align 8 dereferenceable(28) %0, i64 noundef %1) #1 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i64 %1, ptr %4, align 8, !tbaa !9
  %7 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #2
  %8 = load i64, ptr %4, align 8, !tbaa !9
  store i64 %8, ptr %5, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  %9 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %7, i32 0, i32 4
  %10 = load i32, ptr %9, align 8, !tbaa !11
  store i32 %10, ptr %6, align 4, !tbaa !15
  br label %11

11:                                               ; preds = %26, %2
  %12 = load i32, ptr %6, align 4, !tbaa !15
  %13 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %7, i32 0, i32 1
  %14 = load i32, ptr %13, align 8, !tbaa !16
  %15 = icmp sle i32 %12, %14
  br i1 %15, label %17, label %16

16:                                               ; preds = %11
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  br label %29

17:                                               ; preds = %11
  %18 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %7, i32 0, i32 3
  %19 = load ptr, ptr %18, align 8, !tbaa !17
  %20 = load i32, ptr %6, align 4, !tbaa !15
  %21 = load i64, ptr %5, align 8, !tbaa !9
  %22 = and i64 %21, 1
  %23 = icmp ne i64 %22, 0
  call void @_ZN5sc_dt9sc_signed3setEib(ptr noundef nonnull align 8 dereferenceable(32) %19, i32 noundef %20, i1 noundef zeroext %23)
  %24 = load i64, ptr %5, align 8, !tbaa !9
  %25 = lshr i64 %24, 1
  store i64 %25, ptr %5, align 8, !tbaa !9
  br label %26

26:                                               ; preds = %17
  %27 = load i32, ptr %6, align 4, !tbaa !15
  %28 = add nsw i32 %27, 1
  store i32 %28, ptr %6, align 4, !tbaa !15
  br label %11, !llvm.loop !18

29:                                               ; preds = %16
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #2
  ret ptr %7
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !14, i64 24}
!12 = !{!"_ZTSN5sc_dt18sc_signed_subref_rE", !13, i64 0, !14, i64 8, !6, i64 16, !14, i64 24}
!13 = !{!"_ZTSN5sc_dt13sc_value_baseE"}
!14 = !{!"int", !7, i64 0}
!15 = !{!14, !14, i64 0}
!16 = !{!12, !14, i64 8}
!17 = !{!12, !6, i64 16}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt9sc_signed3setEib(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef, i1 noundef zeroext) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt16sc_signed_subrefaSEl(ptr noundef nonnull readonly returned align 8 dereferenceable(28) %0, i64 noundef %1) local_unnamed_addr #0 align 2 {
  %3 = getelementptr inbounds i8, ptr %0, i64 24
  %4 = load i32, ptr %3, align 8, !tbaa !5
  %5 = getelementptr inbounds i8, ptr %0, i64 8
  %6 = load i32, ptr %5, align 8, !tbaa !12
  %.not7 = icmp sgt i32 %4, %6
  br i1 %.not7, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %2
  %7 = getelementptr inbounds i8, ptr %0, i64 16
  br label %8

._crit_edge:                                      ; preds = %8, %2
  ret ptr %0

8:                                                ; preds = %.lr.ph, %8
  %.09 = phi i32 [ %4, %.lr.ph ], [ %13, %8 ]
  %.068 = phi i64 [ %1, %.lr.ph ], [ %12, %8 ]
  %9 = load ptr, ptr %7, align 8, !tbaa !13
  %10 = and i64 %.068, 1
  %11 = icmp ne i64 %10, 0
  tail call void @_ZN5sc_dt9sc_signed3setEib(ptr noundef nonnull align 8 dereferenceable(32) %9, i32 noundef %.09, i1 noundef zeroext %11)
  %12 = lshr i64 %.068, 1
  %13 = add nsw i32 %.09, 1
  %14 = load i32, ptr %5, align 8, !tbaa !12
  %.not.not = icmp slt i32 %.09, %14
  br i1 %.not.not, label %8, label %._crit_edge, !llvm.loop !14
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 24}
!6 = !{!"_ZTSN5sc_dt18sc_signed_subref_rE", !7, i64 0, !8, i64 8, !11, i64 16, !8, i64 24}
!7 = !{!"_ZTSN5sc_dt13sc_value_baseE"}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!6, !8, i64 8}
!13 = !{!6, !11, i64 16}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass