; LLVM IR from gem5/gem5 :: ext/mcpat/logic.ll (ZN8Pipeline20compute_stage_vectorEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Pipeline = type { %class.McPATComponent, %class.InputParameter, %class.uca_org_t, %class.CoreParameters, i32, i8, i8, double, i8, double, double, double }
%class.McPATComponent = type { ptr, %class.Component, ptr, %class.InputParameter, %"class.std::__cxx11::basic_string", double, %"class.std::vector", %class.McPATOutput, %class.statsDef, %class.statsDef, %class.powerDef, %class.powerDef }
%class.Component = type { %class.Area, %class.powerDef, %class.powerDef, double, double }
%class.Area = type { double, double, double }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<McPATComponent *, std::allocator<McPATComponent *>>::_Vector_impl" }
%"struct.std::_Vector_base<McPATComponent *, std::allocator<McPATComponent *>>::_Vector_impl" = type { %"struct.std::_Vector_base<McPATComponent *, std::allocator<McPATComponent *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<McPATComponent *, std::allocator<McPATComponent *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.McPATOutput = type { double, double, double, double, double, double }
%class.statsDef = type { %class.statsComponents, %class.statsComponents, %class.statsComponents, %class.statsComponents, %class.statsComponents, %class.statsComponents, %class.statsComponents }
%class.statsComponents = type { double, double, double }
%class.powerDef = type { %class.powerComponents, %class.powerComponents, %class.powerComponents }
%class.powerComponents = type { double, double, double, double, double }
%class.InputParameter = type { i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, i32, double, double, i32, i32, i32, i32, i32, i8, i8, i8, i8, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i8, i8, i32, i32, i8, double, double, i8, i32, i32, i8 }
%class.uca_org_t = type { ptr, ptr, double, double, double, double, %class.powerDef, double, double, double, [100 x i8], double, i8, %struct.results_mem_array, %struct.results_mem_array }
%struct.results_mem_array = type { i32, i32, double, i32, i32, i32, i32, i32, i32, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double }
%class.CoreParameters = type { i8, i8, i8, i32, i32, i32, double, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, double, i32, i32, i32, i32, i8, i8, [4 x double], i32, i32, i32, i32, i32, i32, i32, double, double, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, double, double, i32, double, double }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN8Pipeline20compute_stage_vectorEv(ptr noundef nonnull align 8 dereferenceable(10448) %0) #2 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca double, align 8
  %4 = alloca double, align 8
  %5 = alloca double, align 8
  %6 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  %7 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  %8 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %9 = getelementptr inbounds %class.CoreParameters, ptr %8, i32 0, i32 1
  %10 = load i8, ptr %9, align 1, !tbaa !9, !range !38, !noundef !39
  %11 = trunc i8 %10 to i1
  br i1 %11, label %12, label %16

12:                                               ; preds = %1
  %13 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %14 = getelementptr inbounds %class.CoreParameters, ptr %13, i32 0, i32 31
  %15 = load i32, ptr %14, align 8, !tbaa !40
  br label %20

16:                                               ; preds = %1
  %17 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %18 = getelementptr inbounds %class.CoreParameters, ptr %17, i32 0, i32 30
  %19 = load i32, ptr %18, align 4, !tbaa !41
  br label %20

20:                                               ; preds = %16, %12
  %21 = phi i32 [ %15, %12 ], [ %19, %16 ]
  store i32 %21, ptr %6, align 4, !tbaa !42
  %22 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 5
  %23 = load i8, ptr %22, align 4, !tbaa !43, !range !38, !noundef !39
  %24 = trunc i8 %23 to i1
  br i1 %24, label %35, label %25

25:                                               ; preds = %20
  %26 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 1
  %27 = getelementptr inbounds %class.InputParameter, ptr %26, i32 0, i32 88
  %28 = load i32, ptr %27, align 4, !tbaa !44
  %29 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 1
  %30 = getelementptr inbounds %class.InputParameter, ptr %29, i32 0, i32 89
  %31 = load i32, ptr %30, align 8, !tbaa !45
  %32 = mul nsw i32 %28, %31
  %33 = sitofp i32 %32 to double
  %34 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 7
  store double %33, ptr %34, align 8, !tbaa !46
  br label %414

35:                                               ; preds = %20
  %36 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %37 = getelementptr inbounds %class.CoreParameters, ptr %36, i32 0, i32 3
  %38 = load i32, ptr %37, align 4, !tbaa !47
  %39 = icmp eq i32 %38, 1
  br i1 %39, label %40, label %160

40:                                               ; preds = %35
  %41 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %42 = getelementptr inbounds %class.CoreParameters, ptr %41, i32 0, i32 29
  %43 = load i32, ptr %42, align 8, !tbaa !48
  %44 = mul nsw i32 %43, 2
  %45 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %46 = getelementptr inbounds %class.CoreParameters, ptr %45, i32 0, i32 32
  %47 = load i32, ptr %46, align 4, !tbaa !49
  %48 = mul nsw i32 %44, %47
  %49 = sitofp i32 %48 to double
  %50 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 7
  %51 = load double, ptr %50, align 8, !tbaa !46
  %52 = fadd double %51, %49
  store double %52, ptr %50, align 8, !tbaa !46
  %53 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %54 = getelementptr inbounds %class.CoreParameters, ptr %53, i32 0, i32 17
  %55 = load i32, ptr %54, align 8, !tbaa !50
  %56 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %57 = getelementptr inbounds %class.CoreParameters, ptr %56, i32 0, i32 28
  %58 = load i32, ptr %57, align 4, !tbaa !51
  %59 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %60 = getelementptr inbounds %class.CoreParameters, ptr %59, i32 0, i32 29
  %61 = load i32, ptr %60, align 8, !tbaa !48
  %62 = add nsw i32 %58, %61
  %63 = mul nsw i32 %55, %62
  %64 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %65 = getelementptr inbounds %class.CoreParameters, ptr %64, i32 0, i32 32
  %66 = load i32, ptr %65, align 4, !tbaa !49
  %67 = mul nsw i32 %63, %66
  %68 = sitofp i32 %67 to double
  %69 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 7
  %70 = load double, ptr %69, align 8, !tbaa !46
  %71 = fadd double %70, %68
  store double %71, ptr %69, align 8, !tbaa !46
  %72 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %73 = getelementptr inbounds %class.CoreParameters, ptr %72, i32 0, i32 45
  %74 = load i8, ptr %73, align 1, !tbaa !52, !range !38, !noundef !39
  %75 = trunc i8 %74 to i1
  br i1 %75, label %76, label %88

76:                                               ; preds = %40
  %77 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %78 = getelementptr inbounds %class.CoreParameters, ptr %77, i32 0, i32 32
  %79 = load i32, ptr %78, align 4, !tbaa !49
  %80 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %81 = getelementptr inbounds %class.CoreParameters, ptr %80, i32 0, i32 26
  %82 = load i32, ptr %81, align 4, !tbaa !53
  %83 = mul nsw i32 %79, %82
  %84 = sitofp i32 %83 to double
  %85 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 7
  %86 = load double, ptr %85, align 8, !tbaa !46
  %87 = fadd double %86, %84
  store double %87, ptr %85, align 8, !tbaa !46
  br label %88

88:                                               ; preds = %76, %40
  %89 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %90 = getelementptr inbounds %class.CoreParameters, ptr %89, i32 0, i32 18
  %91 = load i32, ptr %90, align 4, !tbaa !54
  %92 = sitofp i32 %91 to double
  %93 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %94 = getelementptr inbounds %class.CoreParameters, ptr %93, i32 0, i32 28
  %95 = load i32, ptr %94, align 4, !tbaa !51
  %96 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %97 = getelementptr inbounds %class.CoreParameters, ptr %96, i32 0, i32 29
  %98 = load i32, ptr %97, align 8, !tbaa !48
  %99 = add nsw i32 %95, %98
  %100 = sitofp i32 %99 to double
  %101 = load i32, ptr %6, align 4, !tbaa !42
  %102 = call noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef 2.000000e+00, i32 noundef %101)
  %103 = fadd double %100, %102
  %104 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %105 = getelementptr inbounds %class.CoreParameters, ptr %104, i32 0, i32 40
  %106 = load i32, ptr %105, align 8, !tbaa !55
  %107 = mul nsw i32 2, %106
  %108 = sitofp i32 %107 to double
  %109 = fadd double %103, %108
  %110 = fmul double %92, %109
  %111 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %112 = getelementptr inbounds %class.CoreParameters, ptr %111, i32 0, i32 32
  %113 = load i32, ptr %112, align 4, !tbaa !49
  %114 = sitofp i32 %113 to double
  %115 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 7
  %116 = load double, ptr %115, align 8, !tbaa !46
  %117 = call double @llvm.fmuladd.f64(double %110, double %114, double %116)
  store double %117, ptr %115, align 8, !tbaa !46
  %118 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %119 = getelementptr inbounds %class.CoreParameters, ptr %118, i32 0, i32 19
  %120 = load i32, ptr %119, align 8, !tbaa !56
  %121 = sitofp i32 %120 to double
  %122 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %123 = getelementptr inbounds %class.CoreParameters, ptr %122, i32 0, i32 7
  %124 = load i32, ptr %123, align 8, !tbaa !57
  %125 = mul nsw i32 3, %124
  %126 = sitofp i32 %125 to double
  %127 = load i32, ptr %6, align 4, !tbaa !42
  %128 = call noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef 2.000000e+00, i32 noundef %127)
  %129 = fadd double %126, %128
  %130 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %131 = getelementptr inbounds %class.CoreParameters, ptr %130, i32 0, i32 40
  %132 = load i32, ptr %131, align 8, !tbaa !55
  %133 = mul nsw i32 16, %132
  %134 = sitofp i32 %133 to double
  %135 = fadd double %129, %134
  %136 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 7
  %137 = load double, ptr %136, align 8, !tbaa !46
  %138 = call double @llvm.fmuladd.f64(double %121, double %135, double %137)
  store double %138, ptr %136, align 8, !tbaa !46
  %139 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %140 = getelementptr inbounds %class.CoreParameters, ptr %139, i32 0, i32 19
  %141 = load i32, ptr %140, align 8, !tbaa !56
  %142 = sitofp i32 %141 to double
  %143 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %144 = getelementptr inbounds %class.CoreParameters, ptr %143, i32 0, i32 40
  %145 = load i32, ptr %144, align 8, !tbaa !55
  %146 = mul nsw i32 2, %145
  %147 = sitofp i32 %146 to double
  %148 = load i32, ptr %6, align 4, !tbaa !42
  %149 = call noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef 2.000000e+00, i32 noundef %148)
  %150 = fadd double %147, %149
  %151 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %152 = getelementptr inbounds %class.CoreParameters, ptr %151, i32 0, i32 40
  %153 = load i32, ptr %152, align 8, !tbaa !55
  %154 = mul nsw i32 16, %153
  %155 = sitofp i32 %154 to double
  %156 = fadd double %150, %155
  %157 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 7
  %158 = load double, ptr %157, align 8, !tbaa !46
  %159 = call double @llvm.fmuladd.f64(double %142, double %156, double %158)
  store double %159, ptr %157, align 8, !tbaa !46
  store double 6.000000e+00, ptr %3, align 8, !tbaa !58
  br label %371

160:                                              ; preds = %35
  %161 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %162 = getelementptr inbounds %class.CoreParameters, ptr %161, i32 0, i32 29
  %163 = load i32, ptr %162, align 8, !tbaa !48
  %164 = mul nsw i32 %163, 2
  %165 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %166 = getelementptr inbounds %class.CoreParameters, ptr %165, i32 0, i32 32
  %167 = load i32, ptr %166, align 4, !tbaa !49
  %168 = mul nsw i32 %164, %167
  %169 = sitofp i32 %168 to double
  %170 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 7
  %171 = load double, ptr %170, align 8, !tbaa !46
  %172 = fadd double %171, %169
  store double %172, ptr %170, align 8, !tbaa !46
  %173 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %174 = getelementptr inbounds %class.CoreParameters, ptr %173, i32 0, i32 17
  %175 = load i32, ptr %174, align 8, !tbaa !50
  %176 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %177 = getelementptr inbounds %class.CoreParameters, ptr %176, i32 0, i32 28
  %178 = load i32, ptr %177, align 4, !tbaa !51
  %179 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %180 = getelementptr inbounds %class.CoreParameters, ptr %179, i32 0, i32 29
  %181 = load i32, ptr %180, align 8, !tbaa !48
  %182 = add nsw i32 %178, %181
  %183 = mul nsw i32 %175, %182
  %184 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %185 = getelementptr inbounds %class.CoreParameters, ptr %184, i32 0, i32 32
  %186 = load i32, ptr %185, align 4, !tbaa !49
  %187 = mul nsw i32 %183, %186
  %188 = sitofp i32 %187 to double
  %189 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 7
  %190 = load double, ptr %189, align 8, !tbaa !46
  %191 = fadd double %190, %188
  store double %191, ptr %189, align 8, !tbaa !46
  %192 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %193 = getelementptr inbounds %class.CoreParameters, ptr %192, i32 0, i32 18
  %194 = load i32, ptr %193, align 4, !tbaa !54
  %195 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %196 = getelementptr inbounds %class.CoreParameters, ptr %195, i32 0, i32 28
  %197 = load i32, ptr %196, align 4, !tbaa !51
  %198 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %199 = getelementptr inbounds %class.CoreParameters, ptr %198, i32 0, i32 29
  %200 = load i32, ptr %199, align 8, !tbaa !48
  %201 = add nsw i32 %197, %200
  %202 = mul nsw i32 %194, %201
  %203 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %204 = getelementptr inbounds %class.CoreParameters, ptr %203, i32 0, i32 32
  %205 = load i32, ptr %204, align 4, !tbaa !49
  %206 = mul nsw i32 %202, %205
  %207 = sitofp i32 %206 to double
  %208 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 7
  %209 = load double, ptr %208, align 8, !tbaa !46
  %210 = fadd double %209, %207
  store double %210, ptr %208, align 8, !tbaa !46
  %211 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %212 = getelementptr inbounds %class.CoreParameters, ptr %211, i32 0, i32 18
  %213 = load i32, ptr %212, align 4, !tbaa !54
  %214 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %215 = getelementptr inbounds %class.CoreParameters, ptr %214, i32 0, i32 28
  %216 = load i32, ptr %215, align 4, !tbaa !51
  %217 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %218 = getelementptr inbounds %class.CoreParameters, ptr %217, i32 0, i32 29
  %219 = load i32, ptr %218, align 8, !tbaa !48
  %220 = add nsw i32 %216, %219
  %221 = mul nsw i32 %213, %220
  %222 = sitofp i32 %221 to double
  %223 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 7
  %224 = load double, ptr %223, align 8, !tbaa !46
  %225 = fadd double %224, %222
  store double %225, ptr %223, align 8, !tbaa !46
  %226 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %227 = getelementptr inbounds %class.CoreParameters, ptr %226, i32 0, i32 19
  %228 = load i32, ptr %227, align 8, !tbaa !56
  %229 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %230 = getelementptr inbounds %class.CoreParameters, ptr %229, i32 0, i32 28
  %231 = load i32, ptr %230, align 4, !tbaa !51
  %232 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %233 = getelementptr inbounds %class.CoreParameters, ptr %232, i32 0, i32 29
  %234 = load i32, ptr %233, align 8, !tbaa !48
  %235 = add nsw i32 %231, %234
  %236 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %237 = getelementptr inbounds %class.CoreParameters, ptr %236, i32 0, i32 11
  %238 = load i32, ptr %237, align 8, !tbaa !59
  %239 = mul nsw i32 3, %238
  %240 = add nsw i32 %235, %239
  %241 = mul nsw i32 %228, %240
  %242 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %243 = getelementptr inbounds %class.CoreParameters, ptr %242, i32 0, i32 32
  %244 = load i32, ptr %243, align 4, !tbaa !49
  %245 = mul nsw i32 %241, %244
  %246 = sitofp i32 %245 to double
  %247 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 7
  %248 = load double, ptr %247, align 8, !tbaa !46
  %249 = fadd double %248, %246
  store double %249, ptr %247, align 8, !tbaa !46
  %250 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %251 = getelementptr inbounds %class.CoreParameters, ptr %250, i32 0, i32 19
  %252 = load i32, ptr %251, align 8, !tbaa !56
  %253 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %254 = getelementptr inbounds %class.CoreParameters, ptr %253, i32 0, i32 28
  %255 = load i32, ptr %254, align 4, !tbaa !51
  %256 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %257 = getelementptr inbounds %class.CoreParameters, ptr %256, i32 0, i32 11
  %258 = load i32, ptr %257, align 8, !tbaa !59
  %259 = mul nsw i32 3, %258
  %260 = add nsw i32 %255, %259
  %261 = mul nsw i32 %252, %260
  %262 = sitofp i32 %261 to double
  %263 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 7
  %264 = load double, ptr %263, align 8, !tbaa !46
  %265 = fadd double %264, %262
  store double %265, ptr %263, align 8, !tbaa !46
  %266 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %267 = getelementptr inbounds %class.CoreParameters, ptr %266, i32 0, i32 19
  %268 = load i32, ptr %267, align 8, !tbaa !56
  %269 = sitofp i32 %268 to double
  %270 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %271 = getelementptr inbounds %class.CoreParameters, ptr %270, i32 0, i32 11
  %272 = load i32, ptr %271, align 8, !tbaa !59
  %273 = mul nsw i32 3, %272
  %274 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %275 = getelementptr inbounds %class.CoreParameters, ptr %274, i32 0, i32 29
  %276 = load i32, ptr %275, align 8, !tbaa !48
  %277 = add nsw i32 %273, %276
  %278 = sitofp i32 %277 to double
  %279 = load i32, ptr %6, align 4, !tbaa !42
  %280 = call noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef 2.000000e+00, i32 noundef %279)
  %281 = fadd double %278, %280
  %282 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 7
  %283 = load double, ptr %282, align 8, !tbaa !46
  %284 = call double @llvm.fmuladd.f64(double %269, double %281, double %283)
  store double %284, ptr %282, align 8, !tbaa !46
  %285 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %286 = getelementptr inbounds %class.CoreParameters, ptr %285, i32 0, i32 19
  %287 = load i32, ptr %286, align 8, !tbaa !56
  %288 = sitofp i32 %287 to double
  %289 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %290 = getelementptr inbounds %class.CoreParameters, ptr %289, i32 0, i32 40
  %291 = load i32, ptr %290, align 8, !tbaa !55
  %292 = mul nsw i32 2, %291
  %293 = sitofp i32 %292 to double
  %294 = load i32, ptr %6, align 4, !tbaa !42
  %295 = call noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef 2.000000e+00, i32 noundef %294)
  %296 = fadd double %293, %295
  %297 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 7
  %298 = load double, ptr %297, align 8, !tbaa !46
  %299 = call double @llvm.fmuladd.f64(double %288, double %296, double %298)
  store double %299, ptr %297, align 8, !tbaa !46
  %300 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %301 = getelementptr inbounds %class.CoreParameters, ptr %300, i32 0, i32 19
  %302 = load i32, ptr %301, align 8, !tbaa !56
  %303 = sitofp i32 %302 to double
  %304 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %305 = getelementptr inbounds %class.CoreParameters, ptr %304, i32 0, i32 40
  %306 = load i32, ptr %305, align 8, !tbaa !55
  %307 = mul nsw i32 2, %306
  %308 = sitofp i32 %307 to double
  %309 = load i32, ptr %6, align 4, !tbaa !42
  %310 = call noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef 2.000000e+00, i32 noundef %309)
  %311 = fadd double %308, %310
  %312 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 7
  %313 = load double, ptr %312, align 8, !tbaa !46
  %314 = call double @llvm.fmuladd.f64(double %303, double %311, double %313)
  store double %314, ptr %312, align 8, !tbaa !46
  %315 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %316 = getelementptr inbounds %class.CoreParameters, ptr %315, i32 0, i32 19
  %317 = load i32, ptr %316, align 8, !tbaa !56
  %318 = sitofp i32 %317 to double
  %319 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %320 = getelementptr inbounds %class.CoreParameters, ptr %319, i32 0, i32 40
  %321 = load i32, ptr %320, align 8, !tbaa !55
  %322 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %323 = getelementptr inbounds %class.CoreParameters, ptr %322, i32 0, i32 42
  %324 = load i32, ptr %323, align 8, !tbaa !60
  %325 = add nsw i32 %321, %324
  %326 = sitofp i32 %325 to double
  %327 = load i32, ptr %6, align 4, !tbaa !42
  %328 = call noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef 2.000000e+00, i32 noundef %327)
  %329 = fadd double %326, %328
  %330 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 7
  %331 = load double, ptr %330, align 8, !tbaa !46
  %332 = call double @llvm.fmuladd.f64(double %318, double %329, double %331)
  store double %332, ptr %330, align 8, !tbaa !46
  %333 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %334 = getelementptr inbounds %class.CoreParameters, ptr %333, i32 0, i32 19
  %335 = load i32, ptr %334, align 8, !tbaa !56
  %336 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %337 = getelementptr inbounds %class.CoreParameters, ptr %336, i32 0, i32 40
  %338 = load i32, ptr %337, align 8, !tbaa !55
  %339 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %340 = getelementptr inbounds %class.CoreParameters, ptr %339, i32 0, i32 11
  %341 = load i32, ptr %340, align 8, !tbaa !59
  %342 = add nsw i32 %338, %341
  %343 = mul nsw i32 %335, %342
  %344 = sitofp i32 %343 to double
  %345 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 7
  %346 = load double, ptr %345, align 8, !tbaa !46
  %347 = fadd double %346, %344
  store double %347, ptr %345, align 8, !tbaa !46
  %348 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %349 = getelementptr inbounds %class.CoreParameters, ptr %348, i32 0, i32 21
  %350 = load i32, ptr %349, align 8, !tbaa !61
  %351 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %352 = getelementptr inbounds %class.CoreParameters, ptr %351, i32 0, i32 40
  %353 = load i32, ptr %352, align 8, !tbaa !55
  %354 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %355 = getelementptr inbounds %class.CoreParameters, ptr %354, i32 0, i32 42
  %356 = load i32, ptr %355, align 8, !tbaa !60
  %357 = add nsw i32 %353, %356
  %358 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %359 = getelementptr inbounds %class.CoreParameters, ptr %358, i32 0, i32 11
  %360 = load i32, ptr %359, align 8, !tbaa !59
  %361 = add nsw i32 %357, %360
  %362 = mul nsw i32 %350, %361
  %363 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %364 = getelementptr inbounds %class.CoreParameters, ptr %363, i32 0, i32 32
  %365 = load i32, ptr %364, align 4, !tbaa !49
  %366 = mul nsw i32 %362, %365
  %367 = sitofp i32 %366 to double
  %368 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 7
  %369 = load double, ptr %368, align 8, !tbaa !46
  %370 = fadd double %369, %367
  store double %370, ptr %368, align 8, !tbaa !46
  store double 1.200000e+01, ptr %3, align 8, !tbaa !58
  br label %371

371:                                              ; preds = %160, %88
  %372 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 7
  %373 = load double, ptr %372, align 8, !tbaa !46
  %374 = fmul double %373, 1.500000e+00
  %375 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 7
  store double %374, ptr %375, align 8, !tbaa !46
  %376 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 7
  %377 = load double, ptr %376, align 8, !tbaa !46
  store double %377, ptr %4, align 8, !tbaa !58
  %378 = load double, ptr %4, align 8, !tbaa !58
  %379 = load double, ptr %3, align 8, !tbaa !58
  %380 = fdiv double %378, %379
  store double %380, ptr %5, align 8, !tbaa !58
  %381 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %382 = getelementptr inbounds %class.CoreParameters, ptr %381, i32 0, i32 3
  %383 = load i32, ptr %382, align 4, !tbaa !47
  %384 = icmp eq i32 %383, 1
  br i1 %384, label %385, label %399

385:                                              ; preds = %371
  %386 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %387 = getelementptr inbounds %class.CoreParameters, ptr %386, i32 0, i32 33
  %388 = load i32, ptr %387, align 8, !tbaa !62
  %389 = icmp sgt i32 %388, 6
  br i1 %389, label %390, label %398

390:                                              ; preds = %385
  %391 = load double, ptr %5, align 8, !tbaa !58
  %392 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %393 = getelementptr inbounds %class.CoreParameters, ptr %392, i32 0, i32 33
  %394 = load i32, ptr %393, align 8, !tbaa !62
  %395 = sitofp i32 %394 to double
  %396 = fmul double %391, %395
  %397 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 7
  store double %396, ptr %397, align 8, !tbaa !46
  br label %398

398:                                              ; preds = %390, %385
  br label %413

399:                                              ; preds = %371
  %400 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %401 = getelementptr inbounds %class.CoreParameters, ptr %400, i32 0, i32 33
  %402 = load i32, ptr %401, align 8, !tbaa !62
  %403 = icmp sgt i32 %402, 12
  br i1 %403, label %404, label %412

404:                                              ; preds = %399
  %405 = load double, ptr %5, align 8, !tbaa !58
  %406 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 3
  %407 = getelementptr inbounds %class.CoreParameters, ptr %406, i32 0, i32 33
  %408 = load i32, ptr %407, align 8, !tbaa !62
  %409 = sitofp i32 %408 to double
  %410 = fmul double %405, %409
  %411 = getelementptr inbounds %class.Pipeline, ptr %7, i32 0, i32 7
  store double %410, ptr %411, align 8, !tbaa !46
  br label %412

412:                                              ; preds = %404, %399
  br label %413

413:                                              ; preds = %412, %398
  br label %414

414:                                              ; preds = %413, %25
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #4
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef, i32 noundef) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !19, i64 9921}
!10 = !{!"_ZTS8Pipeline", !11, i64 0, !17, i64 1352, !31, i64 1720, !33, i64 9920, !37, i64 10400, !19, i64 10404, !19, i64 10405, !14, i64 10408, !19, i64 10416, !14, i64 10424, !14, i64 10432, !14, i64 10440}
!11 = !{!"_ZTS14McPATComponent", !12, i64 8, !6, i64 288, !17, i64 296, !21, i64 664, !14, i64 696, !24, i64 704, !28, i64 728, !29, i64 776, !29, i64 944, !15, i64 1112, !15, i64 1232}
!12 = !{!"_ZTS9Component", !13, i64 0, !15, i64 24, !15, i64 144, !14, i64 264, !14, i64 272}
!13 = !{!"_ZTS4Area", !14, i64 0, !14, i64 8, !14, i64 16}
!14 = !{!"double", !7, i64 0}
!15 = !{!"_ZTS8powerDef", !16, i64 0, !16, i64 40, !16, i64 80}
!16 = !{!"_ZTS15powerComponents", !14, i64 0, !14, i64 8, !14, i64 16, !14, i64 24, !14, i64 32}
!17 = !{!"_ZTS14InputParameter", !18, i64 0, !18, i64 4, !18, i64 8, !18, i64 12, !18, i64 16, !19, i64 20, !18, i64 24, !18, i64 28, !18, i64 32, !18, i64 36, !18, i64 40, !18, i64 44, !14, i64 48, !14, i64 56, !18, i64 64, !18, i64 68, !18, i64 72, !18, i64 76, !18, i64 80, !19, i64 84, !19, i64 85, !19, i64 86, !19, i64 87, !19, i64 88, !18, i64 92, !18, i64 96, !18, i64 100, !18, i64 104, !18, i64 108, !18, i64 112, !18, i64 116, !18, i64 120, !18, i64 124, !18, i64 128, !18, i64 132, !18, i64 136, !18, i64 140, !18, i64 144, !18, i64 148, !20, i64 152, !18, i64 156, !19, i64 160, !18, i64 164, !18, i64 168, !18, i64 172, !18, i64 176, !18, i64 180, !18, i64 184, !18, i64 188, !19, i64 192, !18, i64 196, !18, i64 200, !18, i64 204, !18, i64 208, !18, i64 212, !18, i64 216, !18, i64 220, !18, i64 224, !18, i64 228, !18, i64 232, !18, i64 236, !18, i64 240, !18, i64 244, !18, i64 248, !18, i64 252, !18, i64 256, !18, i64 260, !18, i64 264, !18, i64 268, !18, i64 272, !18, i64 276, !18, i64 280, !18, i64 284, !18, i64 288, !18, i64 292, !18, i64 296, !19, i64 300, !18, i64 304, !18, i64 308, !18, i64 312, !19, i64 316, !19, i64 317, !18, i64 320, !18, i64 324, !19, i64 328, !14, i64 336, !14, i64 344, !19, i64 352, !18, i64 356, !18, i64 360, !19, i64 364}
!18 = !{!"int", !7, i64 0}
!19 = !{!"bool", !7, i64 0}
!20 = !{!"_ZTS9Wire_type", !7, i64 0}
!21 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !22, i64 0, !23, i64 8, !7, i64 16}
!22 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!23 = !{!"long", !7, i64 0}
!24 = !{!"_ZTSSt6vectorIP14McPATComponentSaIS1_EE", !25, i64 0}
!25 = !{!"_ZTSSt12_Vector_baseIP14McPATComponentSaIS1_EE", !26, i64 0}
!26 = !{!"_ZTSNSt12_Vector_baseIP14McPATComponentSaIS1_EE12_Vector_implE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseIP14McPATComponentSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!28 = !{!"_ZTS11McPATOutput", !14, i64 0, !14, i64 8, !14, i64 16, !14, i64 24, !14, i64 32, !14, i64 40}
!29 = !{!"_ZTS8statsDef", !30, i64 0, !30, i64 24, !30, i64 48, !30, i64 72, !30, i64 96, !30, i64 120, !30, i64 144}
!30 = !{!"_ZTS15statsComponents", !14, i64 0, !14, i64 8, !14, i64 16}
!31 = !{!"_ZTS9uca_org_t", !6, i64 0, !6, i64 8, !14, i64 16, !14, i64 24, !14, i64 32, !14, i64 40, !15, i64 48, !14, i64 168, !14, i64 176, !14, i64 184, !7, i64 192, !14, i64 296, !19, i64 304, !32, i64 312, !32, i64 4256}
!32 = !{!"_ZTS17results_mem_array", !18, i64 0, !18, i64 4, !14, i64 8, !18, i64 16, !18, i64 20, !18, i64 24, !18, i64 28, !18, i64 32, !18, i64 36, !14, i64 40, !14, i64 48, !14, i64 56, !14, i64 64, !14, i64 72, !14, i64 80, !14, i64 88, !14, i64 96, !14, i64 104, !14, i64 112, !14, i64 120, !14, i64 128, !14, i64 136, !14, i64 144, !14, i64 152, !14, i64 160, !14, i64 168, !14, i64 176, !14, i64 184, !14, i64 192, !14, i64 200, !14, i64 208, !14, i64 216, !14, i64 224, !14, i64 232, !14, i64 240, !14, i64 248, !14, i64 256, !14, i64 264, !15, i64 272, !15, i64 392, !15, i64 512, !15, i64 632, !15, i64 752, !15, i64 872, !15, i64 992, !15, i64 1112, !15, i64 1232, !15, i64 1352, !15, i64 1472, !15, i64 1592, !15, i64 1712, !15, i64 1832, !15, i64 1952, !15, i64 2072, !15, i64 2192, !15, i64 2312, !15, i64 2432, !15, i64 2552, !15, i64 2672, !15, i64 2792, !15, i64 2912, !15, i64 3032, !15, i64 3152, !15, i64 3272, !15, i64 3392, !15, i64 3512, !15, i64 3632, !14, i64 3752, !14, i64 3760, !14, i64 3768, !14, i64 3776, !14, i64 3784, !14, i64 3792, !14, i64 3800, !14, i64 3808, !14, i64 3816, !14, i64 3824, !14, i64 3832, !14, i64 3840, !14, i64 3848, !14, i64 3856, !14, i64 3864, !14, i64 3872, !14, i64 3880, !14, i64 3888, !14, i64 3896, !14, i64 3904, !14, i64 3912, !14, i64 3920, !14, i64 3928, !14, i64 3936}
!33 = !{!"_ZTS14CoreParameters", !19, i64 0, !19, i64 1, !19, i64 2, !34, i64 4, !35, i64 8, !36, i64 12, !14, i64 16, !18, i64 24, !18, i64 28, !18, i64 32, !18, i64 36, !18, i64 40, !18, i64 44, !18, i64 48, !18, i64 52, !18, i64 56, !18, i64 60, !18, i64 64, !18, i64 68, !18, i64 72, !18, i64 76, !18, i64 80, !18, i64 84, !18, i64 88, !18, i64 92, !18, i64 96, !18, i64 100, !18, i64 104, !18, i64 108, !18, i64 112, !18, i64 116, !18, i64 120, !18, i64 124, !18, i64 128, !18, i64 132, !18, i64 136, !18, i64 140, !18, i64 144, !18, i64 148, !14, i64 152, !18, i64 160, !18, i64 164, !18, i64 168, !18, i64 172, !19, i64 176, !19, i64 177, !7, i64 184, !18, i64 216, !18, i64 220, !18, i64 224, !18, i64 228, !18, i64 232, !18, i64 236, !18, i64 240, !14, i64 248, !14, i64 256, !18, i64 264, !18, i64 268, !18, i64 272, !18, i64 276, !18, i64 280, !18, i64 284, !18, i64 288, !18, i64 292, !18, i64 296, !18, i64 300, !18, i64 304, !18, i64 308, !18, i64 312, !18, i64 316, !18, i64 320, !18, i64 324, !18, i64 328, !18, i64 332, !18, i64 336, !18, i64 340, !18, i64 344, !18, i64 348, !18, i64 352, !18, i64 356, !18, i64 360, !18, i64 364, !18, i64 368, !18, i64 372, !18, i64 376, !18, i64 380, !18, i64 384, !18, i64 388, !18, i64 392, !18, i64 396, !18, i64 400, !18, i64 404, !18, i64 408, !18, i64 412, !18, i64 416, !18, i64 420, !20, i64 424, !20, i64 428, !18, i64 432, !14, i64 440, !14, i64 448, !18, i64 456, !14, i64 464, !14, i64 472}
!34 = !{!"_ZTS9Core_type", !7, i64 0}
!35 = !{!"_ZTS13Renaming_type", !7, i64 0}
!36 = !{!"_ZTS14Scheduler_type", !7, i64 0}
!37 = !{!"_ZTS9Device_ty", !7, i64 0}
!38 = !{i8 0, i8 2}
!39 = !{}
!40 = !{!10, !18, i64 10040}
!41 = !{!10, !18, i64 10036}
!42 = !{!18, !18, i64 0}
!43 = !{!10, !19, i64 10404}
!44 = !{!10, !18, i64 1708}
!45 = !{!10, !18, i64 1712}
!46 = !{!10, !14, i64 10408}
!47 = !{!10, !34, i64 9924}
!48 = !{!10, !18, i64 10032}
!49 = !{!10, !18, i64 10044}
!50 = !{!10, !18, i64 9984}
!51 = !{!10, !18, i64 10028}
!52 = !{!10, !19, i64 10097}
!53 = !{!10, !18, i64 10020}
!54 = !{!10, !18, i64 9988}
!55 = !{!10, !18, i64 10080}
!56 = !{!10, !18, i64 9992}
!57 = !{!10, !18, i64 9944}
!58 = !{!14, !14, i64 0}
!59 = !{!10, !18, i64 9960}
!60 = !{!10, !18, i64 10088}
!61 = !{!10, !18, i64 10000}
!62 = !{!10, !18, i64 10048}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN8Pipeline20compute_stage_vectorEv(ptr nocapture noundef nonnull align 8 dereferenceable(10448) %0) local_unnamed_addr #1 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 9921
  %3 = load i8, ptr %2, align 1, !tbaa !5, !range !37, !noundef !38
  %4 = trunc nuw i8 %3 to i1
  %.in.v = select i1 %4, i64 10040, i64 10036
  %.in = getelementptr inbounds i8, ptr %0, i64 %.in.v
  %5 = load i32, ptr %.in, align 4, !tbaa !39
  %6 = getelementptr inbounds i8, ptr %0, i64 10404
  %7 = load i8, ptr %6, align 4, !tbaa !40, !range !37, !noundef !38
  %8 = trunc nuw i8 %7 to i1
  br i1 %8, label %17, label %9

9:                                                ; preds = %1
  %10 = getelementptr inbounds i8, ptr %0, i64 1708
  %11 = load i32, ptr %10, align 4, !tbaa !41
  %12 = getelementptr inbounds i8, ptr %0, i64 1712
  %13 = load i32, ptr %12, align 8, !tbaa !42
  %14 = mul nsw i32 %13, %11
  %15 = sitofp i32 %14 to double
  %16 = getelementptr inbounds i8, ptr %0, i64 10408
  store double %15, ptr %16, align 8, !tbaa !43
  br label %189

17:                                               ; preds = %1
  %18 = getelementptr inbounds i8, ptr %0, i64 9924
  %19 = load i32, ptr %18, align 4, !tbaa !44
  %20 = icmp eq i32 %19, 1
  %21 = getelementptr inbounds i8, ptr %0, i64 10032
  %22 = load i32, ptr %21, align 8, !tbaa !45
  %23 = shl nsw i32 %22, 1
  %24 = getelementptr inbounds i8, ptr %0, i64 10044
  %25 = load i32, ptr %24, align 4, !tbaa !46
  %26 = mul nsw i32 %23, %25
  %27 = sitofp i32 %26 to double
  %28 = getelementptr inbounds i8, ptr %0, i64 10408
  %29 = load double, ptr %28, align 8, !tbaa !43
  %30 = fadd double %29, %27
  %31 = getelementptr inbounds i8, ptr %0, i64 9984
  %32 = load i32, ptr %31, align 8, !tbaa !47
  %33 = getelementptr inbounds i8, ptr %0, i64 10028
  %34 = load i32, ptr %33, align 4, !tbaa !48
  %35 = add nsw i32 %34, %22
  %36 = mul i32 %32, %25
  %37 = mul i32 %36, %35
  %38 = sitofp i32 %37 to double
  %39 = fadd double %30, %38
  br i1 %20, label %40, label %94

40:                                               ; preds = %17
  store double %39, ptr %28, align 8, !tbaa !43
  %41 = getelementptr inbounds i8, ptr %0, i64 10097
  %42 = load i8, ptr %41, align 1, !tbaa !49, !range !37, !noundef !38
  %43 = trunc nuw i8 %42 to i1
  br i1 %43, label %44, label %50

44:                                               ; preds = %40
  %45 = getelementptr inbounds i8, ptr %0, i64 10020
  %46 = load i32, ptr %45, align 4, !tbaa !50
  %47 = mul nsw i32 %46, %25
  %48 = sitofp i32 %47 to double
  %49 = fadd double %39, %48
  store double %49, ptr %28, align 8, !tbaa !43
  br label %50

50:                                               ; preds = %44, %40
  %51 = getelementptr inbounds i8, ptr %0, i64 9988
  %52 = load i32, ptr %51, align 4, !tbaa !51
  %53 = sitofp i32 %52 to double
  %54 = sitofp i32 %35 to double
  %55 = tail call noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef 2.000000e+00, i32 noundef %5)
  %56 = fadd double %55, %54
  %57 = getelementptr inbounds i8, ptr %0, i64 10080
  %58 = load i32, ptr %57, align 8, !tbaa !52
  %59 = shl nsw i32 %58, 1
  %60 = sitofp i32 %59 to double
  %61 = fadd double %56, %60
  %62 = fmul double %61, %53
  %63 = load i32, ptr %24, align 4, !tbaa !46
  %64 = sitofp i32 %63 to double
  %65 = load double, ptr %28, align 8, !tbaa !43
  %66 = tail call double @llvm.fmuladd.f64(double %62, double %64, double %65)
  store double %66, ptr %28, align 8, !tbaa !43
  %67 = getelementptr inbounds i8, ptr %0, i64 9992
  %68 = load i32, ptr %67, align 8, !tbaa !53
  %69 = sitofp i32 %68 to double
  %70 = getelementptr inbounds i8, ptr %0, i64 9944
  %71 = load i32, ptr %70, align 8, !tbaa !54
  %72 = mul nsw i32 %71, 3
  %73 = sitofp i32 %72 to double
  %74 = tail call noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef 2.000000e+00, i32 noundef %5)
  %75 = fadd double %74, %73
  %76 = load i32, ptr %57, align 8, !tbaa !52
  %77 = shl nsw i32 %76, 4
  %78 = sitofp i32 %77 to double
  %79 = fadd double %75, %78
  %80 = load double, ptr %28, align 8, !tbaa !43
  %81 = tail call double @llvm.fmuladd.f64(double %69, double %79, double %80)
  store double %81, ptr %28, align 8, !tbaa !43
  %82 = load i32, ptr %67, align 8, !tbaa !53
  %83 = sitofp i32 %82 to double
  %84 = shl nsw i32 %76, 1
  %85 = sitofp i32 %84 to double
  %86 = tail call noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef 2.000000e+00, i32 noundef %5)
  %87 = fadd double %86, %85
  %88 = load i32, ptr %57, align 8, !tbaa !52
  %89 = shl nsw i32 %88, 4
  %90 = sitofp i32 %89 to double
  %91 = fadd double %87, %90
  %92 = load double, ptr %28, align 8, !tbaa !43
  %93 = tail call double @llvm.fmuladd.f64(double %83, double %91, double %92)
  br label %170

94:                                               ; preds = %17
  %95 = getelementptr inbounds i8, ptr %0, i64 9988
  %96 = load i32, ptr %95, align 4, !tbaa !51
  %97 = mul nsw i32 %96, %35
  %98 = mul nsw i32 %97, %25
  %99 = sitofp i32 %98 to double
  %100 = fadd double %39, %99
  %101 = sitofp i32 %97 to double
  %102 = fadd double %100, %101
  %103 = getelementptr inbounds i8, ptr %0, i64 9992
  %104 = load i32, ptr %103, align 8, !tbaa !53
  %105 = getelementptr inbounds i8, ptr %0, i64 9960
  %106 = load i32, ptr %105, align 8, !tbaa !55
  %107 = mul nsw i32 %106, 3
  %108 = add nsw i32 %107, %35
  %109 = mul i32 %104, %25
  %110 = mul i32 %109, %108
  %111 = sitofp i32 %110 to double
  %112 = fadd double %102, %111
  %113 = add nsw i32 %107, %34
  %114 = mul nsw i32 %113, %104
  %115 = sitofp i32 %114 to double
  %116 = fadd double %112, %115
  store double %116, ptr %28, align 8, !tbaa !43
  %117 = sitofp i32 %104 to double
  %118 = add nsw i32 %107, %22
  %119 = sitofp i32 %118 to double
  %120 = tail call noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef 2.000000e+00, i32 noundef %5)
  %121 = fadd double %120, %119
  %122 = load double, ptr %28, align 8, !tbaa !43
  %123 = tail call double @llvm.fmuladd.f64(double %117, double %121, double %122)
  store double %123, ptr %28, align 8, !tbaa !43
  %124 = load i32, ptr %103, align 8, !tbaa !53
  %125 = sitofp i32 %124 to double
  %126 = getelementptr inbounds i8, ptr %0, i64 10080
  %127 = load i32, ptr %126, align 8, !tbaa !52
  %128 = shl nsw i32 %127, 1
  %129 = sitofp i32 %128 to double
  %130 = tail call noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef 2.000000e+00, i32 noundef %5)
  %131 = fadd double %130, %129
  %132 = load double, ptr %28, align 8, !tbaa !43
  %133 = tail call double @llvm.fmuladd.f64(double %125, double %131, double %132)
  store double %133, ptr %28, align 8, !tbaa !43
  %134 = load i32, ptr %103, align 8, !tbaa !53
  %135 = sitofp i32 %134 to double
  %136 = load i32, ptr %126, align 8, !tbaa !52
  %137 = shl nsw i32 %136, 1
  %138 = sitofp i32 %137 to double
  %139 = tail call noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef 2.000000e+00, i32 noundef %5)
  %140 = fadd double %139, %138
  %141 = load double, ptr %28, align 8, !tbaa !43
  %142 = tail call double @llvm.fmuladd.f64(double %135, double %140, double %141)
  store double %142, ptr %28, align 8, !tbaa !43
  %143 = load i32, ptr %103, align 8, !tbaa !53
  %144 = sitofp i32 %143 to double
  %145 = load i32, ptr %126, align 8, !tbaa !52
  %146 = getelementptr inbounds i8, ptr %0, i64 10088
  %147 = load i32, ptr %146, align 8, !tbaa !56
  %148 = add nsw i32 %147, %145
  %149 = sitofp i32 %148 to double
  %150 = tail call noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef 2.000000e+00, i32 noundef %5)
  %151 = fadd double %150, %149
  %152 = load double, ptr %28, align 8, !tbaa !43
  %153 = tail call double @llvm.fmuladd.f64(double %144, double %151, double %152)
  %154 = load i32, ptr %103, align 8, !tbaa !53
  %155 = load i32, ptr %126, align 8, !tbaa !52
  %156 = load i32, ptr %105, align 8, !tbaa !55
  %157 = add i32 %156, %155
  %158 = mul nsw i32 %157, %154
  %159 = sitofp i32 %158 to double
  %160 = fadd double %153, %159
  %161 = getelementptr inbounds i8, ptr %0, i64 10000
  %162 = load i32, ptr %161, align 8, !tbaa !57
  %163 = load i32, ptr %146, align 8, !tbaa !56
  %164 = add i32 %157, %163
  %165 = load i32, ptr %24, align 4, !tbaa !46
  %166 = mul i32 %165, %162
  %167 = mul i32 %166, %164
  %168 = sitofp i32 %167 to double
  %169 = fadd double %160, %168
  br label %170

170:                                              ; preds = %94, %50
  %171 = phi double [ %93, %50 ], [ %169, %94 ]
  %.0 = phi double [ 6.000000e+00, %50 ], [ 1.200000e+01, %94 ]
  %172 = getelementptr inbounds i8, ptr %0, i64 10408
  %173 = fmul double %171, 1.500000e+00
  store double %173, ptr %172, align 8, !tbaa !43
  %174 = fdiv double %173, %.0
  %175 = load i32, ptr %18, align 4, !tbaa !44
  %176 = icmp eq i32 %175, 1
  %177 = getelementptr inbounds i8, ptr %0, i64 10048
  %178 = load i32, ptr %177, align 8, !tbaa !58
  br i1 %176, label %179, label %184

179:                                              ; preds = %170
  %180 = icmp sgt i32 %178, 6
  br i1 %180, label %181, label %189

181:                                              ; preds = %179
  %182 = uitofp nneg i32 %178 to double
  %183 = fmul double %174, %182
  store double %183, ptr %172, align 8, !tbaa !43
  br label %189

184:                                              ; preds = %170
  %185 = icmp sgt i32 %178, 12
  br i1 %185, label %186, label %189

186:                                              ; preds = %184
  %187 = uitofp nneg i32 %178 to double
  %188 = fmul double %174, %187
  store double %188, ptr %172, align 8, !tbaa !43
  br label %189

189:                                              ; preds = %181, %179, %186, %184, %9
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef, i32 noundef) local_unnamed_addr #2

attributes #0 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !18, i64 9921}
!6 = !{!"_ZTS8Pipeline", !7, i64 0, !16, i64 1352, !30, i64 1720, !32, i64 9920, !36, i64 10400, !18, i64 10404, !18, i64 10405, !10, i64 10408, !18, i64 10416, !10, i64 10424, !10, i64 10432, !10, i64 10440}
!7 = !{!"_ZTS14McPATComponent", !8, i64 8, !15, i64 288, !16, i64 296, !20, i64 664, !10, i64 696, !23, i64 704, !27, i64 728, !28, i64 776, !28, i64 944, !13, i64 1112, !13, i64 1232}
!8 = !{!"_ZTS9Component", !9, i64 0, !13, i64 24, !13, i64 144, !10, i64 264, !10, i64 272}
!9 = !{!"_ZTS4Area", !10, i64 0, !10, i64 8, !10, i64 16}
!10 = !{!"double", !11, i64 0}
!11 = !{!"omnipotent char", !12, i64 0}
!12 = !{!"Simple C++ TBAA"}
!13 = !{!"_ZTS8powerDef", !14, i64 0, !14, i64 40, !14, i64 80}
!14 = !{!"_ZTS15powerComponents", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32}
!15 = !{!"any pointer", !11, i64 0}
!16 = !{!"_ZTS14InputParameter", !17, i64 0, !17, i64 4, !17, i64 8, !17, i64 12, !17, i64 16, !18, i64 20, !17, i64 24, !17, i64 28, !17, i64 32, !17, i64 36, !17, i64 40, !17, i64 44, !10, i64 48, !10, i64 56, !17, i64 64, !17, i64 68, !17, i64 72, !17, i64 76, !17, i64 80, !18, i64 84, !18, i64 85, !18, i64 86, !18, i64 87, !18, i64 88, !17, i64 92, !17, i64 96, !17, i64 100, !17, i64 104, !17, i64 108, !17, i64 112, !17, i64 116, !17, i64 120, !17, i64 124, !17, i64 128, !17, i64 132, !17, i64 136, !17, i64 140, !17, i64 144, !17, i64 148, !19, i64 152, !17, i64 156, !18, i64 160, !17, i64 164, !17, i64 168, !17, i64 172, !17, i64 176, !17, i64 180, !17, i64 184, !17, i64 188, !18, i64 192, !17, i64 196, !17, i64 200, !17, i64 204, !17, i64 208, !17, i64 212, !17, i64 216, !17, i64 220, !17, i64 224, !17, i64 228, !17, i64 232, !17, i64 236, !17, i64 240, !17, i64 244, !17, i64 248, !17, i64 252, !17, i64 256, !17, i64 260, !17, i64 264, !17, i64 268, !17, i64 272, !17, i64 276, !17, i64 280, !17, i64 284, !17, i64 288, !17, i64 292, !17, i64 296, !18, i64 300, !17, i64 304, !17, i64 308, !17, i64 312, !18, i64 316, !18, i64 317, !17, i64 320, !17, i64 324, !18, i64 328, !10, i64 336, !10, i64 344, !18, i64 352, !17, i64 356, !17, i64 360, !18, i64 364}
!17 = !{!"int", !11, i64 0}
!18 = !{!"bool", !11, i64 0}
!19 = !{!"_ZTS9Wire_type", !11, i64 0}
!20 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !21, i64 0, !22, i64 8, !11, i64 16}
!21 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !15, i64 0}
!22 = !{!"long", !11, i64 0}
!23 = !{!"_ZTSSt6vectorIP14McPATComponentSaIS1_EE", !24, i64 0}
!24 = !{!"_ZTSSt12_Vector_baseIP14McPATComponentSaIS1_EE", !25, i64 0}
!25 = !{!"_ZTSNSt12_Vector_baseIP14McPATComponentSaIS1_EE12_Vector_implE", !26, i64 0}
!26 = !{!"_ZTSNSt12_Vector_baseIP14McPATComponentSaIS1_EE17_Vector_impl_dataE", !15, i64 0, !15, i64 8, !15, i64 16}
!27 = !{!"_ZTS11McPATOutput", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40}
!28 = !{!"_ZTS8statsDef", !29, i64 0, !29, i64 24, !29, i64 48, !29, i64 72, !29, i64 96, !29, i64 120, !29, i64 144}
!29 = !{!"_ZTS15statsComponents", !10, i64 0, !10, i64 8, !10, i64 16}
!30 = !{!"_ZTS9uca_org_t", !15, i64 0, !15, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40, !13, i64 48, !10, i64 168, !10, i64 176, !10, i64 184, !11, i64 192, !10, i64 296, !18, i64 304, !31, i64 312, !31, i64 4256}
!31 = !{!"_ZTS17results_mem_array", !17, i64 0, !17, i64 4, !10, i64 8, !17, i64 16, !17, i64 20, !17, i64 24, !17, i64 28, !17, i64 32, !17, i64 36, !10, i64 40, !10, i64 48, !10, i64 56, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !10, i64 144, !10, i64 152, !10, i64 160, !10, i64 168, !10, i64 176, !10, i64 184, !10, i64 192, !10, i64 200, !10, i64 208, !10, i64 216, !10, i64 224, !10, i64 232, !10, i64 240, !10, i64 248, !10, i64 256, !10, i64 264, !13, i64 272, !13, i64 392, !13, i64 512, !13, i64 632, !13, i64 752, !13, i64 872, !13, i64 992, !13, i64 1112, !13, i64 1232, !13, i64 1352, !13, i64 1472, !13, i64 1592, !13, i64 1712, !13, i64 1832, !13, i64 1952, !13, i64 2072, !13, i64 2192, !13, i64 2312, !13, i64 2432, !13, i64 2552, !13, i64 2672, !13, i64 2792, !13, i64 2912, !13, i64 3032, !13, i64 3152, !13, i64 3272, !13, i64 3392, !13, i64 3512, !13, i64 3632, !10, i64 3752, !10, i64 3760, !10, i64 3768, !10, i64 3776, !10, i64 3784, !10, i64 3792, !10, i64 3800, !10, i64 3808, !10, i64 3816, !10, i64 3824, !10, i64 3832, !10, i64 3840, !10, i64 3848, !10, i64 3856, !10, i64 3864, !10, i64 3872, !10, i64 3880, !10, i64 3888, !10, i64 3896, !10, i64 3904, !10, i64 3912, !10, i64 3920, !10, i64 3928, !10, i64 3936}
!32 = !{!"_ZTS14CoreParameters", !18, i64 0, !18, i64 1, !18, i64 2, !33, i64 4, !34, i64 8, !35, i64 12, !10, i64 16, !17, i64 24, !17, i64 28, !17, i64 32, !17, i64 36, !17, i64 40, !17, i64 44, !17, i64 48, !17, i64 52, !17, i64 56, !17, i64 60, !17, i64 64, !17, i64 68, !17, i64 72, !17, i64 76, !17, i64 80, !17, i64 84, !17, i64 88, !17, i64 92, !17, i64 96, !17, i64 100, !17, i64 104, !17, i64 108, !17, i64 112, !17, i64 116, !17, i64 120, !17, i64 124, !17, i64 128, !17, i64 132, !17, i64 136, !17, i64 140, !17, i64 144, !17, i64 148, !10, i64 152, !17, i64 160, !17, i64 164, !17, i64 168, !17, i64 172, !18, i64 176, !18, i64 177, !11, i64 184, !17, i64 216, !17, i64 220, !17, i64 224, !17, i64 228, !17, i64 232, !17, i64 236, !17, i64 240, !10, i64 248, !10, i64 256, !17, i64 264, !17, i64 268, !17, i64 272, !17, i64 276, !17, i64 280, !17, i64 284, !17, i64 288, !17, i64 292, !17, i64 296, !17, i64 300, !17, i64 304, !17, i64 308, !17, i64 312, !17, i64 316, !17, i64 320, !17, i64 324, !17, i64 328, !17, i64 332, !17, i64 336, !17, i64 340, !17, i64 344, !17, i64 348, !17, i64 352, !17, i64 356, !17, i64 360, !17, i64 364, !17, i64 368, !17, i64 372, !17, i64 376, !17, i64 380, !17, i64 384, !17, i64 388, !17, i64 392, !17, i64 396, !17, i64 400, !17, i64 404, !17, i64 408, !17, i64 412, !17, i64 416, !17, i64 420, !19, i64 424, !19, i64 428, !17, i64 432, !10, i64 440, !10, i64 448, !17, i64 456, !10, i64 464, !10, i64 472}
!33 = !{!"_ZTS9Core_type", !11, i64 0}
!34 = !{!"_ZTS13Renaming_type", !11, i64 0}
!35 = !{!"_ZTS14Scheduler_type", !11, i64 0}
!36 = !{!"_ZTS9Device_ty", !11, i64 0}
!37 = !{i8 0, i8 2}
!38 = !{}
!39 = !{!17, !17, i64 0}
!40 = !{!6, !18, i64 10404}
!41 = !{!6, !17, i64 1708}
!42 = !{!6, !17, i64 1712}
!43 = !{!6, !10, i64 10408}
!44 = !{!6, !33, i64 9924}
!45 = !{!6, !17, i64 10032}
!46 = !{!6, !17, i64 10044}
!47 = !{!6, !17, i64 9984}
!48 = !{!6, !17, i64 10028}
!49 = !{!6, !18, i64 10097}
!50 = !{!6, !17, i64 10020}
!51 = !{!6, !17, i64 9988}
!52 = !{!6, !17, i64 10080}
!53 = !{!6, !17, i64 9992}
!54 = !{!6, !17, i64 9944}
!55 = !{!6, !17, i64 9960}
!56 = !{!6, !17, i64 10088}
!57 = !{!6, !17, i64 10000}
!58 = !{!6, !17, i64 10048}


; Effective O3 passes: DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass