; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/SourceLevelDebugPkg (XhcDataTransfer)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct._URB = type <{ i64, i32, i32, i32, i64, i64, i8, i32 }>

@.str = external hidden unnamed_addr constant [191 x i8], align 1
@.str.11 = external hidden unnamed_addr constant [20 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare zeroext i8 @DebugAssertEnabled() #1

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare ptr @CopyMem(ptr noundef, ptr noundef, i64 noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local void @XhcExecTransfer(ptr noundef, ptr noundef, i64 noundef) #2

; Function Attrs: nounwind uwtable
declare dso_local ptr @XhcCreateUrb(ptr noundef, i32 noundef, ptr noundef, i64 noundef) #2

; Function Attrs: nounwind uwtable
define dso_local i64 @XhcDataTransfer(ptr noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3, i64 noundef %4) #2 {
  %6 = alloca i64, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca i64, align 8
  %12 = alloca ptr, align 8
  %13 = alloca i64, align 8
  %14 = alloca i32, align 4
  store ptr %0, ptr %7, align 8, !tbaa !5
  store i32 %1, ptr %8, align 4, !tbaa !9
  store ptr %2, ptr %9, align 8, !tbaa !5
  store ptr %3, ptr %10, align 8, !tbaa !5
  store i64 %4, ptr %11, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #3
  %15 = load ptr, ptr %10, align 8, !tbaa !5
  %16 = icmp eq ptr %15, null
  br i1 %16, label %24, label %17

17:                                               ; preds = %5
  %18 = load ptr, ptr %10, align 8, !tbaa !5
  %19 = load i64, ptr %18, align 8, !tbaa !11
  %20 = icmp eq i64 %19, 0
  br i1 %20, label %24, label %21

21:                                               ; preds = %17
  %22 = load ptr, ptr %9, align 8, !tbaa !5
  %23 = icmp eq ptr %22, null
  br i1 %23, label %24, label %25

24:                                               ; preds = %21, %17, %5
  store i64 -9223372036854775806, ptr %6, align 8
  store i32 1, ptr %14, align 4
  br label %70

25:                                               ; preds = %21
  %26 = load ptr, ptr %7, align 8, !tbaa !5
  %27 = load i32, ptr %8, align 4, !tbaa !9
  %28 = load ptr, ptr %9, align 8, !tbaa !5
  %29 = load ptr, ptr %10, align 8, !tbaa !5
  %30 = load i64, ptr %29, align 8, !tbaa !11
  %31 = call ptr @XhcCreateUrb(ptr noundef %26, i32 noundef %27, ptr noundef %28, i64 noundef %30)
  store ptr %31, ptr %12, align 8, !tbaa !5
  br label %32

32:                                               ; preds = %25
  %33 = call zeroext i8 @DebugAssertEnabled()
  %34 = icmp ne i8 %33, 0
  br i1 %34, label %35, label %40

35:                                               ; preds = %32
  %36 = load ptr, ptr %12, align 8, !tbaa !5
  %37 = icmp ne ptr %36, null
  br i1 %37, label %39, label %38

38:                                               ; preds = %35
  call void @DebugAssert(ptr noundef @.str, i64 noundef 584, ptr noundef @.str.11)
  br label %39

39:                                               ; preds = %38, %35
  br label %40

40:                                               ; preds = %39, %32
  br label %41

41:                                               ; preds = %40
  br label %42

42:                                               ; preds = %41
  %43 = load ptr, ptr %7, align 8, !tbaa !5
  %44 = load ptr, ptr %12, align 8, !tbaa !5
  %45 = load i64, ptr %11, align 8, !tbaa !11
  call void @XhcExecTransfer(ptr noundef %43, ptr noundef %44, i64 noundef %45)
  %46 = load ptr, ptr %12, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct._URB, ptr %46, i32 0, i32 3
  %48 = load i32, ptr %47, align 1, !tbaa !13
  %49 = zext i32 %48 to i64
  %50 = load ptr, ptr %10, align 8, !tbaa !5
  store i64 %49, ptr %50, align 8, !tbaa !11
  store i64 -9223372036854775790, ptr %13, align 8, !tbaa !11
  %51 = load ptr, ptr %12, align 8, !tbaa !5
  %52 = getelementptr inbounds %struct._URB, ptr %51, i32 0, i32 2
  %53 = load i32, ptr %52, align 1, !tbaa !15
  %54 = icmp eq i32 %53, 0
  br i1 %54, label %55, label %56

55:                                               ; preds = %42
  store i64 0, ptr %13, align 8, !tbaa !11
  br label %56

56:                                               ; preds = %55, %42
  %57 = load i32, ptr %8, align 4, !tbaa !9
  %58 = icmp eq i32 %57, 0
  br i1 %58, label %59, label %68

59:                                               ; preds = %56
  %60 = load ptr, ptr %9, align 8, !tbaa !5
  %61 = load ptr, ptr %12, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct._URB, ptr %61, i32 0, i32 0
  %63 = load i64, ptr %62, align 1, !tbaa !16
  %64 = inttoptr i64 %63 to ptr
  %65 = load ptr, ptr %10, align 8, !tbaa !5
  %66 = load i64, ptr %65, align 8, !tbaa !11
  %67 = call ptr @CopyMem(ptr noundef %60, ptr noundef %64, i64 noundef %66)
  br label %68

68:                                               ; preds = %59, %56
  %69 = load i64, ptr %13, align 8, !tbaa !11
  store i64 %69, ptr %6, align 8
  store i32 1, ptr %14, align 4
  br label %70

70:                                               ; preds = %68, %24
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #3
  %71 = load i64, ptr %6, align 8
  ret i64 %71
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long long", !7, i64 0}
!13 = !{!14, !10, i64 16}
!14 = !{!"_URB", !12, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !12, i64 20, !12, i64 28, !7, i64 36, !10, i64 37}
!15 = !{!14, !10, i64 12}
!16 = !{!14, !12, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [191 x i8], align 1
@.str.11 = external hidden unnamed_addr constant [20 x i8], align 1

declare zeroext i8 @DebugAssertEnabled() local_unnamed_addr #0

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #0

declare ptr @CopyMem(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @XhcExecTransfer(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local ptr @XhcCreateUrb(ptr noundef, i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local range(i64 -9223372036854775806, 1) i64 @XhcDataTransfer(ptr noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3, i64 noundef %4) local_unnamed_addr #1 {
  %6 = icmp eq ptr %3, null
  br i1 %6, label %29, label %7

7:                                                ; preds = %5
  %8 = load i64, ptr %3, align 8, !tbaa !5
  %9 = icmp eq i64 %8, 0
  %10 = icmp eq ptr %2, null
  %or.cond = or i1 %10, %9
  br i1 %or.cond, label %29, label %11

11:                                               ; preds = %7
  %12 = tail call ptr @XhcCreateUrb(ptr noundef %0, i32 noundef %1, ptr noundef nonnull %2, i64 noundef %8)
  %13 = tail call zeroext i8 @DebugAssertEnabled() #2
  %14 = icmp eq i8 %13, 0
  %15 = icmp ne ptr %12, null
  %or.cond3 = select i1 %14, i1 true, i1 %15
  br i1 %or.cond3, label %17, label %16

16:                                               ; preds = %11
  tail call void @DebugAssert(ptr noundef nonnull @.str, i64 noundef 584, ptr noundef nonnull @.str.11) #2
  br label %17

17:                                               ; preds = %16, %11
  tail call void @XhcExecTransfer(ptr noundef %0, ptr noundef %12, i64 noundef %4)
  %18 = getelementptr inbounds i8, ptr %12, i64 16
  %19 = load i32, ptr %18, align 1, !tbaa !9
  %20 = zext i32 %19 to i64
  store i64 %20, ptr %3, align 8, !tbaa !5
  %21 = getelementptr inbounds i8, ptr %12, i64 12
  %22 = load i32, ptr %21, align 1, !tbaa !12
  %23 = icmp eq i32 %22, 0
  %spec.store.select = select i1 %23, i64 0, i64 -9223372036854775790
  %24 = icmp eq i32 %1, 0
  br i1 %24, label %25, label %29

25:                                               ; preds = %17
  %26 = load i64, ptr %12, align 1, !tbaa !13
  %27 = inttoptr i64 %26 to ptr
  %28 = tail call ptr @CopyMem(ptr noundef nonnull %2, ptr noundef %27, i64 noundef %20) #2
  br label %29

29:                                               ; preds = %17, %25, %5, %7
  %.0 = phi i64 [ -9223372036854775806, %7 ], [ -9223372036854775806, %5 ], [ %spec.store.select, %25 ], [ %spec.store.select, %17 ]
  ret i64 %.0
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 16}
!10 = !{!"_URB", !6, i64 0, !11, i64 8, !11, i64 12, !11, i64 16, !6, i64 20, !6, i64 28, !7, i64 36, !11, i64 37}
!11 = !{!"int", !7, i64 0}
!12 = !{!10, !11, i64 12}
!13 = !{!10, !6, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass