; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/datatypes/fx (sc_fxnum)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::scfx_ieee_double" = type { %"union.sc_dt::ieee_double" }
%"union.sc_dt::ieee_double" = type { double }
%"class.sc_dt::sc_bitref" = type { %"class.sc_dt::sc_bitref_r.base", [4 x i8] }
%"class.sc_dt::sc_bitref_r.base" = type <{ ptr, i32 }>
%"class.sc_dt::sc_fxnum_fast" = type { double, %"class.sc_dt::scfx_params", i8, i8, ptr }
%"class.sc_dt::scfx_params" = type { %"class.sc_dt::sc_fxtype_params", i32, %"class.sc_dt::sc_fxcast_switch" }
%"class.sc_dt::sc_fxtype_params" = type { i32, i32, i32, i32, i32 }
%"class.sc_dt::sc_fxcast_switch" = type { i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK5sc_dt13sc_fxnum_fast9get_sliceEiiRNS_10sc_bv_baseE(ptr noundef nonnull align 8 dereferenceable(48) %0, i32 noundef %1, i32 noundef %2, ptr noundef nonnull align 8 dereferenceable(24) %3) #1 align 2 {
  %5 = alloca i1, align 1
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  %10 = alloca %"class.sc_dt::scfx_ieee_double", align 8
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i8, align 1
  %18 = alloca i32, align 4
  %19 = alloca %"class.sc_dt::sc_bitref", align 8
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !9
  store i32 %2, ptr %8, align 4, !tbaa !9
  store ptr %3, ptr %9, align 8, !tbaa !5
  %20 = load ptr, ptr %6, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #5
  %21 = getelementptr inbounds %"class.sc_dt::sc_fxnum_fast", ptr %20, i32 0, i32 0
  %22 = load double, ptr %21, align 8, !tbaa !11
  call void @_ZN5sc_dt16scfx_ieee_doubleC2Ed(ptr noundef nonnull align 8 dereferenceable(8) %10, double noundef %22)
  %23 = call noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double6is_nanEv(ptr noundef nonnull align 8 dereferenceable(8) %10)
  br i1 %23, label %26, label %24

24:                                               ; preds = %4
  %25 = call noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double6is_infEv(ptr noundef nonnull align 8 dereferenceable(8) %10)
  br i1 %25, label %26, label %27

26:                                               ; preds = %24, %4
  store i1 false, ptr %5, align 1
  store i32 1, ptr %11, align 4
  br label %115

27:                                               ; preds = %24
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #5
  %28 = call noundef i32 @_ZNK5sc_dt16scfx_ieee_double9mantissa0Ev(ptr noundef nonnull align 8 dereferenceable(8) %10)
  store i32 %28, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #5
  %29 = call noundef i32 @_ZNK5sc_dt16scfx_ieee_double9mantissa1Ev(ptr noundef nonnull align 8 dereferenceable(8) %10)
  store i32 %29, ptr %13, align 4, !tbaa !9
  %30 = call noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double9is_normalEv(ptr noundef nonnull align 8 dereferenceable(8) %10)
  br i1 %30, label %31, label %34

31:                                               ; preds = %27
  %32 = load i32, ptr %12, align 4, !tbaa !9
  %33 = add i32 %32, 1048576
  store i32 %33, ptr %12, align 4, !tbaa !9
  br label %34

34:                                               ; preds = %31, %27
  %35 = call noundef i32 @_ZNK5sc_dt16scfx_ieee_double8negativeEv(ptr noundef nonnull align 8 dereferenceable(8) %10)
  %36 = icmp ne i32 %35, 0
  br i1 %36, label %37, label %52

37:                                               ; preds = %34
  %38 = load i32, ptr %12, align 4, !tbaa !9
  %39 = xor i32 %38, -1
  store i32 %39, ptr %12, align 4, !tbaa !9
  %40 = load i32, ptr %13, align 4, !tbaa !9
  %41 = xor i32 %40, -1
  store i32 %41, ptr %13, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #5
  %42 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %42, ptr %14, align 4, !tbaa !9
  %43 = load i32, ptr %13, align 4, !tbaa !9
  %44 = add i32 %43, 1
  store i32 %44, ptr %13, align 4, !tbaa !9
  %45 = load i32, ptr %13, align 4, !tbaa !9
  %46 = load i32, ptr %14, align 4, !tbaa !9
  %47 = icmp ule i32 %45, %46
  br i1 %47, label %48, label %51

48:                                               ; preds = %37
  %49 = load i32, ptr %12, align 4, !tbaa !9
  %50 = add i32 %49, 1
  store i32 %50, ptr %12, align 4, !tbaa !9
  br label %51

51:                                               ; preds = %48, %37
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #5
  br label %52

52:                                               ; preds = %51, %34
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #5
  %53 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %53, ptr %15, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #5
  store i32 0, ptr %16, align 4, !tbaa !9
  br label %54

54:                                               ; preds = %111, %52
  %55 = load i32, ptr %16, align 4, !tbaa !9
  %56 = load ptr, ptr %9, align 8, !tbaa !5
  %57 = call noundef i32 @_ZNK5sc_dt10sc_bv_base6lengthEv(ptr noundef nonnull align 8 dereferenceable(24) %56)
  %58 = icmp slt i32 %55, %57
  br i1 %58, label %60, label %59

59:                                               ; preds = %54
  store i32 2, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #5
  br label %114

60:                                               ; preds = %54
  call void @llvm.lifetime.start.p0(i64 1, ptr %17) #5
  store i8 0, ptr %17, align 1, !tbaa !22
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #5
  %61 = load i32, ptr %15, align 4, !tbaa !9
  %62 = call noundef i32 @_ZNK5sc_dt16scfx_ieee_double8exponentEv(ptr noundef nonnull align 8 dereferenceable(8) %10)
  %63 = sub nsw i32 %61, %62
  store i32 %63, ptr %18, align 4, !tbaa !9
  %64 = load i32, ptr %18, align 4, !tbaa !9
  %65 = add nsw i32 %64, 20
  store i32 %65, ptr %18, align 4, !tbaa !9
  %66 = icmp sge i32 %65, 32
  br i1 %66, label %67, label %72

67:                                               ; preds = %60
  %68 = load i32, ptr %12, align 4, !tbaa !9
  %69 = and i32 %68, -2147483648
  %70 = icmp ne i32 %69, 0
  %71 = zext i1 %70 to i8
  store i8 %71, ptr %17, align 1, !tbaa !22
  br label %95

72:                                               ; preds = %60
  %73 = load i32, ptr %18, align 4, !tbaa !9
  %74 = icmp sge i32 %73, 0
  br i1 %74, label %75, label %82

75:                                               ; preds = %72
  %76 = load i32, ptr %12, align 4, !tbaa !9
  %77 = load i32, ptr %18, align 4, !tbaa !9
  %78 = shl i32 1, %77
  %79 = and i32 %76, %78
  %80 = icmp ne i32 %79, 0
  %81 = zext i1 %80 to i8
  store i8 %81, ptr %17, align 1, !tbaa !22
  br label %94

82:                                               ; preds = %72
  %83 = load i32, ptr %18, align 4, !tbaa !9
  %84 = add nsw i32 %83, 32
  store i32 %84, ptr %18, align 4, !tbaa !9
  %85 = icmp sge i32 %84, 0
  br i1 %85, label %86, label %93

86:                                               ; preds = %82
  %87 = load i32, ptr %13, align 4, !tbaa !9
  %88 = load i32, ptr %18, align 4, !tbaa !9
  %89 = shl i32 1, %88
  %90 = and i32 %87, %89
  %91 = icmp ne i32 %90, 0
  %92 = zext i1 %91 to i8
  store i8 %92, ptr %17, align 1, !tbaa !22
  br label %93

93:                                               ; preds = %86, %82
  br label %94

94:                                               ; preds = %93, %75
  br label %95

95:                                               ; preds = %94, %67
  %96 = load i8, ptr %17, align 1, !tbaa !22, !range !23, !noundef !24
  %97 = trunc i8 %96 to i1
  call void @llvm.lifetime.start.p0(i64 16, ptr %19) #5
  %98 = load ptr, ptr %9, align 8, !tbaa !5
  %99 = load i32, ptr %16, align 4, !tbaa !9
  call void @_ZN5sc_dt8sc_proxyINS_10sc_bv_baseEEixEi(ptr dead_on_unwind writable sret(%"class.sc_dt::sc_bitref") align 8 %19, ptr noundef nonnull align 8 dereferenceable(8) %98, i32 noundef %99)
  %100 = call noundef nonnull align 8 dereferenceable(12) ptr @_ZN5sc_dt9sc_bitrefINS_10sc_bv_baseEEaSEb(ptr noundef nonnull align 8 dereferenceable(12) %19, i1 noundef zeroext %97)
  call void @llvm.lifetime.end.p0(i64 16, ptr %19) #5
  %101 = load i32, ptr %7, align 4, !tbaa !9
  %102 = load i32, ptr %8, align 4, !tbaa !9
  %103 = icmp sge i32 %101, %102
  br i1 %103, label %104, label %107

104:                                              ; preds = %95
  %105 = load i32, ptr %15, align 4, !tbaa !9
  %106 = add nsw i32 %105, 1
  store i32 %106, ptr %15, align 4, !tbaa !9
  br label %110

107:                                              ; preds = %95
  %108 = load i32, ptr %15, align 4, !tbaa !9
  %109 = add nsw i32 %108, -1
  store i32 %109, ptr %15, align 4, !tbaa !9
  br label %110

110:                                              ; preds = %107, %104
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr %17) #5
  br label %111

111:                                              ; preds = %110
  %112 = load i32, ptr %16, align 4, !tbaa !9
  %113 = add nsw i32 %112, 1
  store i32 %113, ptr %16, align 4, !tbaa !9
  br label %54, !llvm.loop !25

114:                                              ; preds = %59
  store i1 true, ptr %5, align 1
  store i32 1, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #5
  br label %115

115:                                              ; preds = %114, %26
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #5
  %116 = load i1, ptr %5, align 1
  ret i1 %116
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt16scfx_ieee_doubleC2Ed(ptr noundef nonnull align 8 dereferenceable(8), double noundef) unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double6is_nanEv(ptr noundef nonnull align 8 dereferenceable(8)) #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double6is_infEv(ptr noundef nonnull align 8 dereferenceable(8)) #3 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt16scfx_ieee_double8negativeEv(ptr noundef nonnull align 8 dereferenceable(8)) #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt16scfx_ieee_double9mantissa0Ev(ptr noundef nonnull align 8 dereferenceable(8)) #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt16scfx_ieee_double9mantissa1Ev(ptr noundef nonnull align 8 dereferenceable(8)) #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double9is_normalEv(ptr noundef nonnull align 8 dereferenceable(8)) #3 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt16scfx_ieee_double8exponentEv(ptr noundef nonnull align 8 dereferenceable(8)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt10sc_bv_base6lengthEv(ptr noundef nonnull align 8 dereferenceable(24)) #4 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt8sc_proxyINS_10sc_bv_baseEEixEi(ptr dead_on_unwind noalias writable sret(%"class.sc_dt::sc_bitref") align 8, ptr noundef nonnull align 8 dereferenceable(8), i32 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(12) ptr @_ZN5sc_dt9sc_bitrefINS_10sc_bv_baseEEaSEb(ptr noundef nonnull align 8 dereferenceable(12), i1 noundef zeroext) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"_ZTSN5sc_dt13sc_fxnum_fastE", !13, i64 0, !14, i64 8, !21, i64 36, !21, i64 37, !6, i64 40}
!13 = !{!"double", !7, i64 0}
!14 = !{!"_ZTSN5sc_dt11scfx_paramsE", !15, i64 0, !18, i64 20, !19, i64 24}
!15 = !{!"_ZTSN5sc_dt16sc_fxtype_paramsE", !10, i64 0, !10, i64 4, !16, i64 8, !17, i64 12, !10, i64 16}
!16 = !{!"_ZTSN5sc_dt9sc_q_modeE", !7, i64 0}
!17 = !{!"_ZTSN5sc_dt9sc_o_modeE", !7, i64 0}
!18 = !{!"_ZTSN5sc_dt6sc_encE", !7, i64 0}
!19 = !{!"_ZTSN5sc_dt16sc_fxcast_switchE", !20, i64 0}
!20 = !{!"_ZTSN5sc_dt9sc_switchE", !7, i64 0}
!21 = !{!"bool", !7, i64 0}
!22 = !{!21, !21, i64 0}
!23 = !{i8 0, i8 2}
!24 = !{}
!25 = distinct !{!25, !26}
!26 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::scfx_ieee_double" = type { %"union.sc_dt::ieee_double" }
%"union.sc_dt::ieee_double" = type { double }
%"class.sc_dt::sc_bitref" = type { %"class.sc_dt::sc_bitref_r.base", [4 x i8] }
%"class.sc_dt::sc_bitref_r.base" = type <{ ptr, i32 }>

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK5sc_dt13sc_fxnum_fast9get_sliceEiiRNS_10sc_bv_baseE(ptr nocapture noundef nonnull readonly align 8 dereferenceable(48) %0, i32 noundef %1, i32 noundef %2, ptr noundef nonnull align 8 dereferenceable(24) %3) local_unnamed_addr #1 align 2 {
  %5 = alloca %"class.sc_dt::scfx_ieee_double", align 8
  %6 = alloca %"class.sc_dt::sc_bitref", align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #5
  %7 = load double, ptr %0, align 8, !tbaa !5
  call void @_ZN5sc_dt16scfx_ieee_doubleC2Ed(ptr noundef nonnull align 8 dereferenceable(8) %5, double noundef %7)
  %8 = call noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double6is_nanEv(ptr noundef nonnull align 8 dereferenceable(8) %5)
  br i1 %8, label %.loopexit, label %9

9:                                                ; preds = %4
  %10 = call noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double6is_infEv(ptr noundef nonnull align 8 dereferenceable(8) %5)
  br i1 %10, label %.loopexit, label %11

11:                                               ; preds = %9
  %12 = call noundef i32 @_ZNK5sc_dt16scfx_ieee_double9mantissa0Ev(ptr noundef nonnull align 8 dereferenceable(8) %5)
  %13 = call noundef i32 @_ZNK5sc_dt16scfx_ieee_double9mantissa1Ev(ptr noundef nonnull align 8 dereferenceable(8) %5)
  %14 = call noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double9is_normalEv(ptr noundef nonnull align 8 dereferenceable(8) %5)
  %15 = add i32 %12, 1048576
  %spec.select = select i1 %14, i32 %15, i32 %12
  %16 = call noundef i32 @_ZNK5sc_dt16scfx_ieee_double8negativeEv(ptr noundef nonnull align 8 dereferenceable(8) %5)
  %.not = icmp eq i32 %16, 0
  br i1 %.not, label %22, label %17

17:                                               ; preds = %11
  %18 = xor i32 %spec.select, -1
  %19 = xor i32 %13, -1
  %20 = sub i32 0, %13
  %.not37 = icmp ugt i32 %20, %19
  %21 = sub i32 0, %spec.select
  %spec.select39 = select i1 %.not37, i32 %18, i32 %21
  br label %22

22:                                               ; preds = %17, %11
  %.2 = phi i32 [ %spec.select39, %17 ], [ %spec.select, %11 ]
  %.032 = phi i32 [ %20, %17 ], [ %13, %11 ]
  %23 = call noundef i32 @_ZNK5sc_dt10sc_bv_base6lengthEv(ptr noundef nonnull align 8 dereferenceable(24) %3)
  %24 = icmp sgt i32 %23, 0
  br i1 %24, label %.lr.ph, label %.loopexit

.lr.ph:                                           ; preds = %22
  %25 = icmp slt i32 %.2, 0
  %.not38 = icmp slt i32 %1, %2
  %.1.v = select i1 %.not38, i32 -1, i32 1
  br label %26

26:                                               ; preds = %.lr.ph, %44
  %.02941 = phi i32 [ 0, %.lr.ph ], [ %46, %44 ]
  %.03040 = phi i32 [ %2, %.lr.ph ], [ %.1, %44 ]
  %27 = call noundef i32 @_ZNK5sc_dt16scfx_ieee_double8exponentEv(ptr noundef nonnull align 8 dereferenceable(8) %5)
  %28 = sub nsw i32 %.03040, %27
  %29 = add nsw i32 %28, 20
  %30 = icmp sgt i32 %28, 11
  br i1 %30, label %44, label %31

31:                                               ; preds = %26
  %32 = icmp sgt i32 %28, -21
  br i1 %32, label %33, label %37

33:                                               ; preds = %31
  %34 = shl nuw i32 1, %29
  %35 = and i32 %34, %.2
  %36 = icmp ne i32 %35, 0
  br label %44

37:                                               ; preds = %31
  %38 = icmp ugt i32 %28, -53
  br i1 %38, label %39, label %44

39:                                               ; preds = %37
  %40 = add nsw i32 %28, 52
  %41 = shl nuw i32 1, %40
  %42 = and i32 %41, %.032
  %43 = icmp ne i32 %42, 0
  br label %44

44:                                               ; preds = %26, %33, %39, %37
  %.0 = phi i1 [ %36, %33 ], [ %43, %39 ], [ false, %37 ], [ %25, %26 ]
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %6) #5
  call void @_ZN5sc_dt8sc_proxyINS_10sc_bv_baseEEixEi(ptr dead_on_unwind nonnull writable sret(%"class.sc_dt::sc_bitref") align 8 %6, ptr noundef nonnull align 8 dereferenceable(8) %3, i32 noundef %.02941)
  %45 = call noundef nonnull align 8 dereferenceable(12) ptr @_ZN5sc_dt9sc_bitrefINS_10sc_bv_baseEEaSEb(ptr noundef nonnull align 8 dereferenceable(12) %6, i1 noundef zeroext %.0)
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %6) #5
  %.1 = add nsw i32 %.03040, %.1.v
  %46 = add nuw nsw i32 %.02941, 1
  %47 = call noundef i32 @_ZNK5sc_dt10sc_bv_base6lengthEv(ptr noundef nonnull align 8 dereferenceable(24) %3)
  %48 = icmp slt i32 %46, %47
  br i1 %48, label %26, label %.loopexit, !llvm.loop !20

.loopexit:                                        ; preds = %44, %22, %4, %9
  %.031 = phi i1 [ false, %9 ], [ false, %4 ], [ true, %22 ], [ true, %44 ]
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #5
  ret i1 %.031
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt16scfx_ieee_doubleC2Ed(ptr noundef nonnull align 8 dereferenceable(8), double noundef) unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double6is_nanEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double6is_infEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #3 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt16scfx_ieee_double8negativeEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt16scfx_ieee_double9mantissa0Ev(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt16scfx_ieee_double9mantissa1Ev(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK5sc_dt16scfx_ieee_double9is_normalEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #3 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt16scfx_ieee_double8exponentEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt10sc_bv_base6lengthEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #4 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt8sc_proxyINS_10sc_bv_baseEEixEi(ptr dead_on_unwind noalias writable sret(%"class.sc_dt::sc_bitref") align 8, ptr noundef nonnull align 8 dereferenceable(8), i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(12) ptr @_ZN5sc_dt9sc_bitrefINS_10sc_bv_baseEEaSEb(ptr noundef nonnull align 8 dereferenceable(12), i1 noundef zeroext) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTSN5sc_dt13sc_fxnum_fastE", !7, i64 0, !10, i64 8, !18, i64 36, !18, i64 37, !19, i64 40}
!7 = !{!"double", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTSN5sc_dt11scfx_paramsE", !11, i64 0, !15, i64 20, !16, i64 24}
!11 = !{!"_ZTSN5sc_dt16sc_fxtype_paramsE", !12, i64 0, !12, i64 4, !13, i64 8, !14, i64 12, !12, i64 16}
!12 = !{!"int", !8, i64 0}
!13 = !{!"_ZTSN5sc_dt9sc_q_modeE", !8, i64 0}
!14 = !{!"_ZTSN5sc_dt9sc_o_modeE", !8, i64 0}
!15 = !{!"_ZTSN5sc_dt6sc_encE", !8, i64 0}
!16 = !{!"_ZTSN5sc_dt16sc_fxcast_switchE", !17, i64 0}
!17 = !{!"_ZTSN5sc_dt9sc_switchE", !8, i64 0}
!18 = !{!"bool", !8, i64 0}
!19 = !{!"any pointer", !8, i64 0}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass