; LLVM IR from gem5/gem5 :: src/systemc/tests/systemc/compliance_1666/test235a (test235a)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.sc_core::sc_signal" = type <{ %"class.sc_core::sc_signal_inout_if", %"class.sc_core::sc_prim_channel", %"struct.sc_core::sc_writer_policy_check", ptr, i32, [4 x i8], i64, i32, [4 x i8] }>
%"class.sc_core::sc_signal_inout_if" = type { %"class.sc_core::sc_signal_in_if", %"class.sc_core::sc_signal_write_if" }
%"class.sc_core::sc_signal_in_if" = type { %"class.sc_core::sc_interface" }
%"class.sc_core::sc_interface" = type { ptr }
%"class.sc_core::sc_signal_write_if" = type { %"class.sc_core::sc_interface" }
%"class.sc_core::sc_prim_channel" = type { %"class.sc_core::sc_object", ptr, ptr }
%"class.sc_core::sc_object" = type { ptr, ptr, %"class.std::vector", %"class.std::vector.0", %"class.std::__cxx11::basic_string", ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"struct.sc_core::sc_writer_policy_check" = type { %"struct.sc_core::sc_writer_policy_check_port", %"struct.sc_core::sc_writer_policy_check_write" }
%"struct.sc_core::sc_writer_policy_check_port" = type { ptr }
%"struct.sc_core::sc_writer_policy_check_write" = type { i8, ptr }
%struct.Top = type { %"class.sc_core::sc_module", %"class.sc_core::sc_port", %"class.sc_core::sc_port", %"class.sc_core::sc_port", %"class.sc_core::sc_port", ptr, %"class.sc_core::sc_signal", %"class.sc_core::sc_signal", %"class.sc_core::sc_signal", %"class.sc_core::sc_signal" }
%"class.sc_core::sc_module" = type { %"class.sc_core::sc_object", %"class.sc_core::sc_process_host", %"class.sc_core::sc_sensitive", %"class.sc_core::sc_sensitive_pos", %"class.sc_core::sc_sensitive_neg", i8, ptr, i32, ptr, ptr }
%"class.sc_core::sc_process_host" = type { ptr }
%"class.sc_core::sc_sensitive" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_pos" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_neg" = type { ptr, i32, ptr }
%"class.sc_core::sc_port" = type { %"class.sc_core::sc_port_b" }
%"class.sc_core::sc_port_b" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.8" }
%"class.sc_core::sc_port_base" = type { %"class.sc_core::sc_object", ptr }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<int> *, std::allocator<sc_core::sc_signal_in_if<int> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<int> *, std::allocator<sc_core::sc_signal_in_if<int> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<int> *, std::allocator<sc_core::sc_signal_in_if<int> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<int> *, std::allocator<sc_core::sc_signal_in_if<int> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_module_name" = type <{ ptr, ptr, ptr, ptr, i8, [7 x i8] }>

@_ZSt4cout = external global %"class.std::basic_ostream", align 8
@.str = external hidden unnamed_addr constant [20 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [4 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [8 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local i32 @sc_main(i32 noundef %0, ptr noundef %1) #0 personality ptr @__gxx_personality_v0 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca %"class.sc_core::sc_signal", align 8
  %6 = alloca %"class.sc_core::sc_signal", align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca %"class.sc_core::sc_signal", align 8
  %10 = alloca %"class.sc_core::sc_signal", align 8
  %11 = alloca %struct.Top, align 8
  %12 = alloca %"class.sc_core::sc_module_name", align 8
  store i32 %0, ptr %3, align 4, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !9
  %13 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, ptr noundef @.str)
  %14 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %13, ptr noundef @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  call void @llvm.lifetime.start.p0(i64 200, ptr %5) #7
  call void @_ZN7sc_core9sc_signalIiLNS_16sc_writer_policyE0EEC1Ev(ptr noundef nonnull align 8 dereferenceable(196) %5)
  call void @llvm.lifetime.start.p0(i64 200, ptr %6) #7
  invoke void @_ZN7sc_core9sc_signalIiLNS_16sc_writer_policyE0EEC1Ev(ptr noundef nonnull align 8 dereferenceable(196) %6)
          to label %15 unwind label %35

15:                                               ; preds = %2
  call void @llvm.lifetime.start.p0(i64 200, ptr %9) #7
  invoke void @_ZN7sc_core9sc_signalIiLNS_16sc_writer_policyE0EEC1Ev(ptr noundef nonnull align 8 dereferenceable(196) %9)
          to label %16 unwind label %39

16:                                               ; preds = %15
  call void @llvm.lifetime.start.p0(i64 200, ptr %10) #7
  invoke void @_ZN7sc_core9sc_signalIiLNS_16sc_writer_policyE0EEC1Ev(ptr noundef nonnull align 8 dereferenceable(196) %10)
          to label %17 unwind label %43

17:                                               ; preds = %16
  call void @llvm.lifetime.start.p0(i64 1648, ptr %11) #7
  invoke void @_ZN7sc_core14sc_module_nameC1EPKc(ptr noundef nonnull align 8 dereferenceable(33) %12, ptr noundef @.str.2)
          to label %18 unwind label %47

18:                                               ; preds = %17
  invoke void @_ZN3TopC2EN7sc_core14sc_module_nameE(ptr noundef nonnull align 8 dereferenceable(1648) %11, ptr noundef %12)
          to label %19 unwind label %51

19:                                               ; preds = %18
  call void @_ZN7sc_core14sc_module_nameD1Ev(ptr noundef nonnull align 8 dereferenceable(33) %12) #7
  %20 = getelementptr inbounds %struct.Top, ptr %11, i32 0, i32 1
  invoke void @_ZN7sc_core9sc_port_bINS_15sc_signal_in_ifIiEEEclERS2_(ptr noundef nonnull align 8 dereferenceable(152) %20, ptr noundef nonnull align 8 dereferenceable(8) %5)
          to label %21 unwind label %55

21:                                               ; preds = %19
  %22 = getelementptr inbounds %struct.Top, ptr %11, i32 0, i32 1
  invoke void @_ZN7sc_core9sc_port_bINS_15sc_signal_in_ifIiEEEclERS2_(ptr noundef nonnull align 8 dereferenceable(152) %22, ptr noundef nonnull align 8 dereferenceable(8) %6)
          to label %23 unwind label %55

23:                                               ; preds = %21
  %24 = getelementptr inbounds %struct.Top, ptr %11, i32 0, i32 2
  invoke void @_ZN7sc_core9sc_port_bINS_15sc_signal_in_ifIiEEEclERS2_(ptr noundef nonnull align 8 dereferenceable(152) %24, ptr noundef nonnull align 8 dereferenceable(8) %9)
          to label %25 unwind label %55

25:                                               ; preds = %23
  %26 = getelementptr inbounds %struct.Top, ptr %11, i32 0, i32 3
  invoke void @_ZN7sc_core9sc_port_bINS_15sc_signal_in_ifIiEEEclERS2_(ptr noundef nonnull align 8 dereferenceable(152) %26, ptr noundef nonnull align 8 dereferenceable(8) %10)
          to label %27 unwind label %55

27:                                               ; preds = %25
  invoke void @_ZN7sc_core8sc_startEiNS_12sc_time_unitENS_20sc_starvation_policyE(i32 noundef 1, i32 noundef 2, i32 noundef 1)
          to label %28 unwind label %55

28:                                               ; preds = %27
  %29 = invoke noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, ptr noundef @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
          to label %30 unwind label %55

30:                                               ; preds = %28
  %31 = invoke noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) %29, ptr noundef @.str.3)
          to label %32 unwind label %55

32:                                               ; preds = %30
  %33 = invoke noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %31, ptr noundef @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
          to label %34 unwind label %55

34:                                               ; preds = %32
  call void @_ZN3TopD2Ev(ptr noundef nonnull align 8 dereferenceable(1648) %11) #7
  call void @llvm.lifetime.end.p0(i64 1648, ptr %11) #7
  call void @_ZN7sc_core9sc_signalIiLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(196) %10) #7
  call void @llvm.lifetime.end.p0(i64 200, ptr %10) #7
  call void @_ZN7sc_core9sc_signalIiLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(196) %9) #7
  call void @llvm.lifetime.end.p0(i64 200, ptr %9) #7
  call void @_ZN7sc_core9sc_signalIiLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(196) %6) #7
  call void @llvm.lifetime.end.p0(i64 200, ptr %6) #7
  call void @_ZN7sc_core9sc_signalIiLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(196) %5) #7
  call void @llvm.lifetime.end.p0(i64 200, ptr %5) #7
  ret i32 0

35:                                               ; preds = %2
  %36 = landingpad { ptr, i32 }
          cleanup
  %37 = extractvalue { ptr, i32 } %36, 0
  store ptr %37, ptr %7, align 8
  %38 = extractvalue { ptr, i32 } %36, 1
  store i32 %38, ptr %8, align 4
  br label %62

39:                                               ; preds = %15
  %40 = landingpad { ptr, i32 }
          cleanup
  %41 = extractvalue { ptr, i32 } %40, 0
  store ptr %41, ptr %7, align 8
  %42 = extractvalue { ptr, i32 } %40, 1
  store i32 %42, ptr %8, align 4
  br label %61

43:                                               ; preds = %16
  %44 = landingpad { ptr, i32 }
          cleanup
  %45 = extractvalue { ptr, i32 } %44, 0
  store ptr %45, ptr %7, align 8
  %46 = extractvalue { ptr, i32 } %44, 1
  store i32 %46, ptr %8, align 4
  br label %60

47:                                               ; preds = %17
  %48 = landingpad { ptr, i32 }
          cleanup
  %49 = extractvalue { ptr, i32 } %48, 0
  store ptr %49, ptr %7, align 8
  %50 = extractvalue { ptr, i32 } %48, 1
  store i32 %50, ptr %8, align 4
  br label %59

51:                                               ; preds = %18
  %52 = landingpad { ptr, i32 }
          cleanup
  %53 = extractvalue { ptr, i32 } %52, 0
  store ptr %53, ptr %7, align 8
  %54 = extractvalue { ptr, i32 } %52, 1
  store i32 %54, ptr %8, align 4
  call void @_ZN7sc_core14sc_module_nameD1Ev(ptr noundef nonnull align 8 dereferenceable(33) %12) #7
  br label %59

55:                                               ; preds = %32, %30, %28, %27, %25, %23, %21, %19
  %56 = landingpad { ptr, i32 }
          cleanup
  %57 = extractvalue { ptr, i32 } %56, 0
  store ptr %57, ptr %7, align 8
  %58 = extractvalue { ptr, i32 } %56, 1
  store i32 %58, ptr %8, align 4
  call void @_ZN3TopD2Ev(ptr noundef nonnull align 8 dereferenceable(1648) %11) #7
  br label %59

59:                                               ; preds = %55, %51, %47
  call void @llvm.lifetime.end.p0(i64 1648, ptr %11) #7
  call void @_ZN7sc_core9sc_signalIiLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(196) %10) #7
  br label %60

60:                                               ; preds = %59, %43
  call void @llvm.lifetime.end.p0(i64 200, ptr %10) #7
  call void @_ZN7sc_core9sc_signalIiLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(196) %9) #7
  br label %61

61:                                               ; preds = %60, %39
  call void @llvm.lifetime.end.p0(i64 200, ptr %9) #7
  call void @_ZN7sc_core9sc_signalIiLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(196) %6) #7
  br label %62

62:                                               ; preds = %61, %35
  call void @llvm.lifetime.end.p0(i64 200, ptr %6) #7
  call void @_ZN7sc_core9sc_signalIiLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(196) %5) #7
  call void @llvm.lifetime.end.p0(i64 200, ptr %5) #7
  br label %63

63:                                               ; preds = %62
  %64 = load ptr, ptr %7, align 8
  %65 = load i32, ptr %8, align 4
  %66 = insertvalue { ptr, i32 } poison, ptr %64, 0
  %67 = insertvalue { ptr, i32 } %66, i32 %65, 1
  resume { ptr, i32 } %67
}

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) #1

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(8)) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_signalIiLNS_16sc_writer_policyE0EEC1Ev(ptr noundef nonnull align 8 dereferenceable(196)) unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

declare void @_ZN7sc_core14sc_module_nameC1EPKc(ptr noundef nonnull align 8 dereferenceable(33), ptr noundef) unnamed_addr #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN3TopC2EN7sc_core14sc_module_nameE(ptr noundef nonnull align 8 dereferenceable(1648), ptr noundef) unnamed_addr #0 align 2

; Function Attrs: nounwind
declare void @_ZN7sc_core14sc_module_nameD1Ev(ptr noundef nonnull align 8 dereferenceable(33)) unnamed_addr #4

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_port_bINS_15sc_signal_in_ifIiEEEclERS2_(ptr noundef nonnull align 8 dereferenceable(152), ptr noundef nonnull align 8 dereferenceable(8)) #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN7sc_core8sc_startEiNS_12sc_time_unitENS_20sc_starvation_policyE(i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN3TopD2Ev(ptr noundef nonnull align 8 dereferenceable(1648)) unnamed_addr #5 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7sc_core9sc_signalIiLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(196)) unnamed_addr #6 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.sc_core::sc_signal" = type <{ %"class.sc_core::sc_signal_inout_if", %"class.sc_core::sc_prim_channel", %"struct.sc_core::sc_writer_policy_check", ptr, i32, [4 x i8], i64, i32, [4 x i8] }>
%"class.sc_core::sc_signal_inout_if" = type { %"class.sc_core::sc_signal_in_if", %"class.sc_core::sc_signal_write_if" }
%"class.sc_core::sc_signal_in_if" = type { %"class.sc_core::sc_interface" }
%"class.sc_core::sc_interface" = type { ptr }
%"class.sc_core::sc_signal_write_if" = type { %"class.sc_core::sc_interface" }
%"class.sc_core::sc_prim_channel" = type { %"class.sc_core::sc_object", ptr, ptr }
%"class.sc_core::sc_object" = type { ptr, ptr, %"class.std::vector", %"class.std::vector.0", %"class.std::__cxx11::basic_string", ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"struct.sc_core::sc_writer_policy_check" = type { %"struct.sc_core::sc_writer_policy_check_port", %"struct.sc_core::sc_writer_policy_check_write" }
%"struct.sc_core::sc_writer_policy_check_port" = type { ptr }
%"struct.sc_core::sc_writer_policy_check_write" = type { i8, ptr }
%struct.Top = type { %"class.sc_core::sc_module", %"class.sc_core::sc_port", %"class.sc_core::sc_port", %"class.sc_core::sc_port", %"class.sc_core::sc_port", ptr, %"class.sc_core::sc_signal", %"class.sc_core::sc_signal", %"class.sc_core::sc_signal", %"class.sc_core::sc_signal" }
%"class.sc_core::sc_module" = type { %"class.sc_core::sc_object", %"class.sc_core::sc_process_host", %"class.sc_core::sc_sensitive", %"class.sc_core::sc_sensitive_pos", %"class.sc_core::sc_sensitive_neg", i8, ptr, i32, ptr, ptr }
%"class.sc_core::sc_process_host" = type { ptr }
%"class.sc_core::sc_sensitive" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_pos" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_neg" = type { ptr, i32, ptr }
%"class.sc_core::sc_port" = type { %"class.sc_core::sc_port_b" }
%"class.sc_core::sc_port_b" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.8" }
%"class.sc_core::sc_port_base" = type { %"class.sc_core::sc_object", ptr }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<int> *, std::allocator<sc_core::sc_signal_in_if<int> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<int> *, std::allocator<sc_core::sc_signal_in_if<int> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<int> *, std::allocator<sc_core::sc_signal_in_if<int> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<int> *, std::allocator<sc_core::sc_signal_in_if<int> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_module_name" = type <{ ptr, ptr, ptr, ptr, i8, [7 x i8] }>

@_ZSt4cout = external global %"class.std::basic_ostream", align 8
@.str = external hidden unnamed_addr constant [20 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [4 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [8 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @sc_main(i32 noundef %0, ptr nocapture noundef readnone %1) local_unnamed_addr #0 personality ptr @__gxx_personality_v0 {
  %3 = alloca %"class.sc_core::sc_signal", align 8
  %4 = alloca %"class.sc_core::sc_signal", align 8
  %5 = alloca %"class.sc_core::sc_signal", align 8
  %6 = alloca %"class.sc_core::sc_signal", align 8
  %7 = alloca %struct.Top, align 8
  %8 = alloca %"class.sc_core::sc_module_name", align 8
  %9 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, ptr noundef nonnull @.str)
  %10 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %9, ptr noundef nonnull @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  call void @llvm.lifetime.start.p0(i64 200, ptr nonnull %3) #7
  call void @_ZN7sc_core9sc_signalIiLNS_16sc_writer_policyE0EEC1Ev(ptr noundef nonnull align 8 dereferenceable(196) %3)
  call void @llvm.lifetime.start.p0(i64 200, ptr nonnull %4) #7
  invoke void @_ZN7sc_core9sc_signalIiLNS_16sc_writer_policyE0EEC1Ev(ptr noundef nonnull align 8 dereferenceable(196) %4)
          to label %11 unwind label %30

11:                                               ; preds = %2
  call void @llvm.lifetime.start.p0(i64 200, ptr nonnull %5) #7
  invoke void @_ZN7sc_core9sc_signalIiLNS_16sc_writer_policyE0EEC1Ev(ptr noundef nonnull align 8 dereferenceable(196) %5)
          to label %12 unwind label %32

12:                                               ; preds = %11
  call void @llvm.lifetime.start.p0(i64 200, ptr nonnull %6) #7
  invoke void @_ZN7sc_core9sc_signalIiLNS_16sc_writer_policyE0EEC1Ev(ptr noundef nonnull align 8 dereferenceable(196) %6)
          to label %13 unwind label %34

13:                                               ; preds = %12
  call void @llvm.lifetime.start.p0(i64 1648, ptr nonnull %7) #7
  invoke void @_ZN7sc_core14sc_module_nameC1EPKc(ptr noundef nonnull align 8 dereferenceable(33) %8, ptr noundef nonnull @.str.2)
          to label %14 unwind label %36

14:                                               ; preds = %13
  invoke void @_ZN3TopC2EN7sc_core14sc_module_nameE(ptr noundef nonnull align 8 dereferenceable(1648) %7, ptr noundef nonnull %8)
          to label %15 unwind label %38

15:                                               ; preds = %14
  call void @_ZN7sc_core14sc_module_nameD1Ev(ptr noundef nonnull align 8 dereferenceable(33) %8) #7
  %16 = getelementptr inbounds i8, ptr %7, i64 232
  invoke void @_ZN7sc_core9sc_port_bINS_15sc_signal_in_ifIiEEEclERS2_(ptr noundef nonnull align 8 dereferenceable(152) %16, ptr noundef nonnull align 8 dereferenceable(8) %3)
          to label %17 unwind label %40

17:                                               ; preds = %15
  invoke void @_ZN7sc_core9sc_port_bINS_15sc_signal_in_ifIiEEEclERS2_(ptr noundef nonnull align 8 dereferenceable(152) %16, ptr noundef nonnull align 8 dereferenceable(8) %4)
          to label %18 unwind label %40

18:                                               ; preds = %17
  %19 = getelementptr inbounds i8, ptr %7, i64 384
  invoke void @_ZN7sc_core9sc_port_bINS_15sc_signal_in_ifIiEEEclERS2_(ptr noundef nonnull align 8 dereferenceable(152) %19, ptr noundef nonnull align 8 dereferenceable(8) %5)
          to label %20 unwind label %40

20:                                               ; preds = %18
  %21 = getelementptr inbounds i8, ptr %7, i64 536
  invoke void @_ZN7sc_core9sc_port_bINS_15sc_signal_in_ifIiEEEclERS2_(ptr noundef nonnull align 8 dereferenceable(152) %21, ptr noundef nonnull align 8 dereferenceable(8) %6)
          to label %22 unwind label %40

22:                                               ; preds = %20
  invoke void @_ZN7sc_core8sc_startEiNS_12sc_time_unitENS_20sc_starvation_policyE(i32 noundef 1, i32 noundef 2, i32 noundef 1)
          to label %23 unwind label %40

23:                                               ; preds = %22
  %24 = invoke noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, ptr noundef nonnull @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
          to label %25 unwind label %40

25:                                               ; preds = %23
  %26 = invoke noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) %24, ptr noundef nonnull @.str.3)
          to label %27 unwind label %40

27:                                               ; preds = %25
  %28 = invoke noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %26, ptr noundef nonnull @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
          to label %29 unwind label %40

29:                                               ; preds = %27
  call void @_ZN3TopD2Ev(ptr noundef nonnull align 8 dereferenceable(1648) %7) #7
  call void @llvm.lifetime.end.p0(i64 1648, ptr nonnull %7) #7
  call void @_ZN7sc_core9sc_signalIiLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(196) %6) #7
  call void @llvm.lifetime.end.p0(i64 200, ptr nonnull %6) #7
  call void @_ZN7sc_core9sc_signalIiLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(196) %5) #7
  call void @llvm.lifetime.end.p0(i64 200, ptr nonnull %5) #7
  call void @_ZN7sc_core9sc_signalIiLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(196) %4) #7
  call void @llvm.lifetime.end.p0(i64 200, ptr nonnull %4) #7
  call void @_ZN7sc_core9sc_signalIiLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(196) %3) #7
  call void @llvm.lifetime.end.p0(i64 200, ptr nonnull %3) #7
  ret i32 0

30:                                               ; preds = %2
  %31 = landingpad { ptr, i32 }
          cleanup
  br label %45

32:                                               ; preds = %11
  %33 = landingpad { ptr, i32 }
          cleanup
  br label %44

34:                                               ; preds = %12
  %35 = landingpad { ptr, i32 }
          cleanup
  br label %43

36:                                               ; preds = %13
  %37 = landingpad { ptr, i32 }
          cleanup
  br label %42

38:                                               ; preds = %14
  %39 = landingpad { ptr, i32 }
          cleanup
  call void @_ZN7sc_core14sc_module_nameD1Ev(ptr noundef nonnull align 8 dereferenceable(33) %8) #7
  br label %42

40:                                               ; preds = %27, %25, %23, %22, %20, %18, %17, %15
  %41 = landingpad { ptr, i32 }
          cleanup
  call void @_ZN3TopD2Ev(ptr noundef nonnull align 8 dereferenceable(1648) %7) #7
  br label %42

42:                                               ; preds = %40, %38, %36
  %.pn = phi { ptr, i32 } [ %41, %40 ], [ %39, %38 ], [ %37, %36 ]
  call void @llvm.lifetime.end.p0(i64 1648, ptr nonnull %7) #7
  call void @_ZN7sc_core9sc_signalIiLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(196) %6) #7
  br label %43

43:                                               ; preds = %42, %34
  %.pn.pn = phi { ptr, i32 } [ %.pn, %42 ], [ %35, %34 ]
  call void @llvm.lifetime.end.p0(i64 200, ptr nonnull %6) #7
  call void @_ZN7sc_core9sc_signalIiLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(196) %5) #7
  br label %44

44:                                               ; preds = %43, %32
  %.pn.pn.pn = phi { ptr, i32 } [ %.pn.pn, %43 ], [ %33, %32 ]
  call void @llvm.lifetime.end.p0(i64 200, ptr nonnull %5) #7
  call void @_ZN7sc_core9sc_signalIiLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(196) %4) #7
  br label %45

45:                                               ; preds = %44, %30
  %.pn.pn.pn.pn = phi { ptr, i32 } [ %.pn.pn.pn, %44 ], [ %31, %30 ]
  call void @llvm.lifetime.end.p0(i64 200, ptr nonnull %4) #7
  call void @_ZN7sc_core9sc_signalIiLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(196) %3) #7
  call void @llvm.lifetime.end.p0(i64 200, ptr nonnull %3) #7
  resume { ptr, i32 } %.pn.pn.pn.pn
}

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(8)) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_signalIiLNS_16sc_writer_policyE0EEC1Ev(ptr noundef nonnull align 8 dereferenceable(196)) unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

declare void @_ZN7sc_core14sc_module_nameC1EPKc(ptr noundef nonnull align 8 dereferenceable(33), ptr noundef) unnamed_addr #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN3TopC2EN7sc_core14sc_module_nameE(ptr noundef nonnull align 8 dereferenceable(1648), ptr noundef) unnamed_addr #0 align 2

; Function Attrs: nounwind
declare void @_ZN7sc_core14sc_module_nameD1Ev(ptr noundef nonnull align 8 dereferenceable(33)) unnamed_addr #4

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_port_bINS_15sc_signal_in_ifIiEEEclERS2_(ptr noundef nonnull align 8 dereferenceable(152), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN7sc_core8sc_startEiNS_12sc_time_unitENS_20sc_starvation_policyE(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN3TopD2Ev(ptr noundef nonnull align 8 dereferenceable(1648)) unnamed_addr #5 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7sc_core9sc_signalIiLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(196)) unnamed_addr #6 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass