; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Bus/Ufs (UfsInitUtpPrdt)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.UTP_TR_PRD = type { i32, i32, i32, i32 }

@.str.10 = external hidden unnamed_addr constant [154 x i8], align 1
@.str.26 = external hidden unnamed_addr constant [49 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i64 @DivU64x32(i64 noundef, i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare zeroext i8 @DebugAssertEnabled() #1

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) #1

; Function Attrs: nounwind uwtable
define dso_local i64 @UfsInitUtpPrdt(ptr noundef %0, ptr noundef %1, i32 noundef %2) #2 {
  %4 = alloca i64, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca ptr, align 8
  %11 = alloca i64, align 8
  %12 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  %13 = load i32, ptr %7, align 4, !tbaa !9
  %14 = icmp eq i32 %13, 0
  br i1 %14, label %15, label %16

15:                                               ; preds = %3
  store i64 0, ptr %4, align 8
  store i32 1, ptr %12, align 4
  br label %97

16:                                               ; preds = %3
  br label %17

17:                                               ; preds = %16
  %18 = call zeroext i8 @DebugAssertEnabled()
  %19 = icmp ne i8 %18, 0
  br i1 %19, label %20, label %27

20:                                               ; preds = %17
  %21 = load ptr, ptr %6, align 8, !tbaa !5
  %22 = ptrtoint ptr %21 to i64
  %23 = and i64 %22, 3
  %24 = icmp eq i64 %23, 0
  br i1 %24, label %26, label %25

25:                                               ; preds = %20
  call void @DebugAssert(ptr noundef @.str.10, i64 noundef 338, ptr noundef @.str.26)
  br label %26

26:                                               ; preds = %25, %20
  br label %27

27:                                               ; preds = %26, %17
  br label %28

28:                                               ; preds = %27
  br label %29

29:                                               ; preds = %28
  %30 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %30, ptr %9, align 4, !tbaa !9
  %31 = load ptr, ptr %6, align 8, !tbaa !5
  store ptr %31, ptr %10, align 8, !tbaa !5
  %32 = load i32, ptr %7, align 4, !tbaa !9
  %33 = zext i32 %32 to i64
  %34 = add i64 %33, 262144
  %35 = sub i64 %34, 1
  %36 = call i64 @DivU64x32(i64 noundef %35, i32 noundef 262144)
  store i64 %36, ptr %11, align 8, !tbaa !11
  store i32 0, ptr %8, align 4, !tbaa !9
  br label %37

37:                                               ; preds = %93, %29
  %38 = load i32, ptr %8, align 4, !tbaa !9
  %39 = zext i32 %38 to i64
  %40 = load i64, ptr %11, align 8, !tbaa !11
  %41 = icmp ult i64 %39, %40
  br i1 %41, label %42, label %96

42:                                               ; preds = %37
  %43 = load i32, ptr %9, align 4, !tbaa !9
  %44 = icmp ult i32 %43, 262144
  br i1 %44, label %45, label %57

45:                                               ; preds = %42
  %46 = load i32, ptr %9, align 4, !tbaa !9
  %47 = sub i32 %46, 1
  %48 = load ptr, ptr %5, align 8, !tbaa !5
  %49 = load i32, ptr %8, align 4, !tbaa !9
  %50 = zext i32 %49 to i64
  %51 = getelementptr inbounds %struct.UTP_TR_PRD, ptr %48, i64 %50
  %52 = getelementptr inbounds %struct.UTP_TR_PRD, ptr %51, i32 0, i32 3
  %53 = load i32, ptr %52, align 1
  %54 = and i32 %47, 262143
  %55 = and i32 %53, -262144
  %56 = or i32 %55, %54
  store i32 %56, ptr %52, align 1
  br label %66

57:                                               ; preds = %42
  %58 = load ptr, ptr %5, align 8, !tbaa !5
  %59 = load i32, ptr %8, align 4, !tbaa !9
  %60 = zext i32 %59 to i64
  %61 = getelementptr inbounds %struct.UTP_TR_PRD, ptr %58, i64 %60
  %62 = getelementptr inbounds %struct.UTP_TR_PRD, ptr %61, i32 0, i32 3
  %63 = load i32, ptr %62, align 1
  %64 = and i32 %63, -262144
  %65 = or i32 %64, 262143
  store i32 %65, ptr %62, align 1
  br label %66

66:                                               ; preds = %57, %45
  %67 = load ptr, ptr %10, align 8, !tbaa !5
  %68 = ptrtoint ptr %67 to i64
  %69 = call i64 @RShiftU64(i64 noundef %68, i64 noundef 2)
  %70 = trunc i64 %69 to i32
  %71 = load ptr, ptr %5, align 8, !tbaa !5
  %72 = load i32, ptr %8, align 4, !tbaa !9
  %73 = zext i32 %72 to i64
  %74 = getelementptr inbounds %struct.UTP_TR_PRD, ptr %71, i64 %73
  %75 = load i32, ptr %74, align 1
  %76 = and i32 %70, 1073741823
  %77 = shl i32 %76, 2
  %78 = and i32 %75, 3
  %79 = or i32 %78, %77
  store i32 %79, ptr %74, align 1
  %80 = load ptr, ptr %10, align 8, !tbaa !5
  %81 = ptrtoint ptr %80 to i64
  %82 = call i64 @RShiftU64(i64 noundef %81, i64 noundef 32)
  %83 = trunc i64 %82 to i32
  %84 = load ptr, ptr %5, align 8, !tbaa !5
  %85 = load i32, ptr %8, align 4, !tbaa !9
  %86 = zext i32 %85 to i64
  %87 = getelementptr inbounds %struct.UTP_TR_PRD, ptr %84, i64 %86
  %88 = getelementptr inbounds %struct.UTP_TR_PRD, ptr %87, i32 0, i32 1
  store i32 %83, ptr %88, align 1, !tbaa !13
  %89 = load i32, ptr %9, align 4, !tbaa !9
  %90 = sub i32 %89, 262144
  store i32 %90, ptr %9, align 4, !tbaa !9
  %91 = load ptr, ptr %10, align 8, !tbaa !5
  %92 = getelementptr inbounds i8, ptr %91, i64 262144
  store ptr %92, ptr %10, align 8, !tbaa !5
  br label %93

93:                                               ; preds = %66
  %94 = load i32, ptr %8, align 4, !tbaa !9
  %95 = add i32 %94, 1
  store i32 %95, ptr %8, align 4, !tbaa !9
  br label %37, !llvm.loop !15

96:                                               ; preds = %37
  store i64 0, ptr %4, align 8
  store i32 1, ptr %12, align 4
  br label %97

97:                                               ; preds = %96, %15
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  %98 = load i64, ptr %4, align 8
  ret i64 %98
}

declare i64 @RShiftU64(i64 noundef, i64 noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long long", !7, i64 0}
!13 = !{!14, !10, i64 4}
!14 = !{!"", !10, i64 0, !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 14}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.UTP_TR_PRD = type { i32, i32, i32, i32 }

@.str.10 = external hidden unnamed_addr constant [154 x i8], align 1
@.str.26 = external hidden unnamed_addr constant [49 x i8], align 1

declare i64 @DivU64x32(i64 noundef, i32 noundef) local_unnamed_addr #0

declare zeroext i8 @DebugAssertEnabled() local_unnamed_addr #0

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local noundef i64 @UfsInitUtpPrdt(ptr nocapture noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #1 {
  %4 = icmp eq i32 %2, 0
  br i1 %4, label %.loopexit, label %5

5:                                                ; preds = %3
  %6 = tail call zeroext i8 @DebugAssertEnabled() #2
  %.not = icmp eq i8 %6, 0
  %7 = ptrtoint ptr %1 to i64
  %8 = and i64 %7, 3
  %9 = icmp eq i64 %8, 0
  %or.cond = or i1 %9, %.not
  br i1 %or.cond, label %11, label %10

10:                                               ; preds = %5
  tail call void @DebugAssert(ptr noundef nonnull @.str.10, i64 noundef 338, ptr noundef nonnull @.str.26) #2
  br label %11

11:                                               ; preds = %10, %5
  %12 = zext i32 %2 to i64
  %13 = add nuw nsw i64 %12, 262143
  %14 = tail call i64 @DivU64x32(i64 noundef %13, i32 noundef 262144) #2
  %.not31 = icmp eq i64 %14, 0
  br i1 %.not31, label %.loopexit, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %11
  %15 = add i32 %2, 262143
  %16 = and i32 %15, 262143
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %17 = phi i64 [ %38, %.lr.ph ], [ 0, %.lr.ph.preheader ]
  %.02230 = phi ptr [ %36, %.lr.ph ], [ %1, %.lr.ph.preheader ]
  %.02329 = phi i32 [ %35, %.lr.ph ], [ %2, %.lr.ph.preheader ]
  %.02428 = phi i32 [ %37, %.lr.ph ], [ 0, %.lr.ph.preheader ]
  %18 = icmp ult i32 %.02329, 262144
  %19 = getelementptr inbounds %struct.UTP_TR_PRD, ptr %0, i64 %17, i32 3
  %20 = load i32, ptr %19, align 1
  %21 = or i32 %20, 262143
  %22 = and i32 %20, -262144
  %23 = or disjoint i32 %22, %16
  %.sink = select i1 %18, i32 %23, i32 %21
  store i32 %.sink, ptr %19, align 1
  %24 = ptrtoint ptr %.02230 to i64
  %25 = tail call i64 @RShiftU64(i64 noundef %24, i64 noundef 2) #2
  %26 = trunc i64 %25 to i32
  %27 = getelementptr inbounds %struct.UTP_TR_PRD, ptr %0, i64 %17
  %28 = load i32, ptr %27, align 1
  %29 = shl i32 %26, 2
  %30 = and i32 %28, 3
  %31 = or disjoint i32 %30, %29
  store i32 %31, ptr %27, align 1
  %32 = tail call i64 @RShiftU64(i64 noundef %24, i64 noundef 32) #2
  %33 = trunc i64 %32 to i32
  %34 = getelementptr inbounds i8, ptr %27, i64 4
  store i32 %33, ptr %34, align 1, !tbaa !5
  %35 = add i32 %.02329, -262144
  %36 = getelementptr inbounds i8, ptr %.02230, i64 262144
  %37 = add i32 %.02428, 1
  %38 = zext i32 %37 to i64
  %39 = icmp ugt i64 %14, %38
  br i1 %39, label %.lr.ph, label %.loopexit, !llvm.loop !10

.loopexit:                                        ; preds = %.lr.ph, %11, %3
  ret i64 0
}

declare i64 @RShiftU64(i64 noundef, i64 noundef) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"", !7, i64 0, !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 14}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass