; LLVM IR from beagleboard/librobotcontrol :: library/src (motor)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@channels = external hidden global i32, align 4
@dirA_chip = external hidden global [4 x i32], align 16
@dirA_pin = external hidden global [4 x i32], align 16
@dirB_chip = external hidden global [4 x i32], align 16
@dirB_pin = external hidden global [4 x i32], align 16
@pwmss = external hidden global [4 x i32], align 16
@pwmch = external hidden global [4 x i32], align 16
@stderr = external global ptr, align 8
@init_flag = external hidden global i32, align 4
@.str.7 = external hidden unnamed_addr constant [62 x i8], align 1
@.str.8 = external hidden unnamed_addr constant [49 x i8], align 1
@polarity = external hidden constant [4 x double], align 16
@.str.9 = external hidden unnamed_addr constant [58 x i8], align 1
@.str.10 = external hidden unnamed_addr constant [52 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
declare i64 @llvm.expect.i64(i64, i64) #1

; Function Attrs: nounwind
declare i32 @fprintf(ptr noundef, ptr noundef, ...) #2

declare i32 @rc_gpio_set_value(i32 noundef, i32 noundef, i32 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @rc_motor_set(i32 noundef %0, double noundef %1) #4 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca double, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store double %1, ptr %5, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #5
  %10 = load i32, ptr %4, align 4, !tbaa !5
  %11 = icmp slt i32 %10, 0
  br i1 %11, label %16, label %12

12:                                               ; preds = %2
  %13 = load i32, ptr %4, align 4, !tbaa !5
  %14 = load i32, ptr @channels, align 4, !tbaa !5
  %15 = icmp sgt i32 %13, %14
  br label %16

16:                                               ; preds = %12, %2
  %17 = phi i1 [ true, %2 ], [ %15, %12 ]
  %18 = xor i1 %17, true
  %19 = xor i1 %18, true
  %20 = zext i1 %19 to i32
  %21 = sext i32 %20 to i64
  %22 = call i64 @llvm.expect.i64(i64 %21, i64 0)
  %23 = icmp ne i64 %22, 0
  br i1 %23, label %24, label %28

24:                                               ; preds = %16
  %25 = load ptr, ptr @stderr, align 8, !tbaa !11
  %26 = load i32, ptr @channels, align 4, !tbaa !5
  %27 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %25, ptr noundef @.str.7, i32 noundef %26) #5
  store i32 -1, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %183

28:                                               ; preds = %16
  %29 = load i32, ptr @init_flag, align 4, !tbaa !5
  %30 = icmp eq i32 %29, 0
  %31 = xor i1 %30, true
  %32 = xor i1 %31, true
  %33 = zext i1 %32 to i32
  %34 = sext i32 %33 to i64
  %35 = call i64 @llvm.expect.i64(i64 %34, i64 0)
  %36 = icmp ne i64 %35, 0
  br i1 %36, label %37, label %40

37:                                               ; preds = %28
  %38 = load ptr, ptr @stderr, align 8, !tbaa !11
  %39 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %38, ptr noundef @.str.8) #5
  store i32 -1, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %183

40:                                               ; preds = %28
  %41 = load double, ptr %5, align 8, !tbaa !9
  %42 = fcmp ogt double %41, 1.000000e+00
  br i1 %42, label %43, label %44

43:                                               ; preds = %40
  store double 1.000000e+00, ptr %5, align 8, !tbaa !9
  br label %49

44:                                               ; preds = %40
  %45 = load double, ptr %5, align 8, !tbaa !9
  %46 = fcmp olt double %45, -1.000000e+00
  br i1 %46, label %47, label %48

47:                                               ; preds = %44
  store double -1.000000e+00, ptr %5, align 8, !tbaa !9
  br label %48

48:                                               ; preds = %47, %44
  br label %49

49:                                               ; preds = %48, %43
  %50 = load i32, ptr %4, align 4, !tbaa !5
  %51 = icmp eq i32 %50, 0
  br i1 %51, label %52, label %68

52:                                               ; preds = %49
  store i32 1, ptr %8, align 4, !tbaa !5
  br label %53

53:                                               ; preds = %64, %52
  %54 = load i32, ptr %8, align 4, !tbaa !5
  %55 = load i32, ptr @channels, align 4, !tbaa !5
  %56 = icmp sle i32 %54, %55
  br i1 %56, label %57, label %67

57:                                               ; preds = %53
  %58 = load i32, ptr %8, align 4, !tbaa !5
  %59 = load double, ptr %5, align 8, !tbaa !9
  %60 = call i32 @rc_motor_set(i32 noundef %58, double noundef %59)
  %61 = icmp eq i32 %60, -1
  br i1 %61, label %62, label %63

62:                                               ; preds = %57
  store i32 -1, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %183

63:                                               ; preds = %57
  br label %64

64:                                               ; preds = %63
  %65 = load i32, ptr %8, align 4, !tbaa !5
  %66 = add nsw i32 %65, 1
  store i32 %66, ptr %8, align 4, !tbaa !5
  br label %53, !llvm.loop !13

67:                                               ; preds = %53
  store i32 0, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %183

68:                                               ; preds = %49
  %69 = load double, ptr %5, align 8, !tbaa !9
  %70 = load i32, ptr %4, align 4, !tbaa !5
  %71 = sub nsw i32 %70, 1
  %72 = sext i32 %71 to i64
  %73 = getelementptr inbounds [4 x double], ptr @polarity, i64 0, i64 %72
  %74 = load double, ptr %73, align 8, !tbaa !9
  %75 = fmul double %69, %74
  store double %75, ptr %5, align 8, !tbaa !9
  %76 = load double, ptr %5, align 8, !tbaa !9
  %77 = fcmp oge double %76, 0.000000e+00
  br i1 %77, label %78, label %79

78:                                               ; preds = %68
  store i32 1, ptr %6, align 4, !tbaa !5
  store i32 0, ptr %7, align 4, !tbaa !5
  br label %82

79:                                               ; preds = %68
  store i32 0, ptr %6, align 4, !tbaa !5
  store i32 1, ptr %7, align 4, !tbaa !5
  %80 = load double, ptr %5, align 8, !tbaa !9
  %81 = fneg double %80
  store double %81, ptr %5, align 8, !tbaa !9
  br label %82

82:                                               ; preds = %79, %78
  %83 = load i32, ptr %4, align 4, !tbaa !5
  %84 = sub nsw i32 %83, 1
  %85 = sext i32 %84 to i64
  %86 = getelementptr inbounds [4 x i32], ptr @dirA_chip, i64 0, i64 %85
  %87 = load i32, ptr %86, align 4, !tbaa !5
  %88 = load i32, ptr %4, align 4, !tbaa !5
  %89 = sub nsw i32 %88, 1
  %90 = sext i32 %89 to i64
  %91 = getelementptr inbounds [4 x i32], ptr @dirA_pin, i64 0, i64 %90
  %92 = load i32, ptr %91, align 4, !tbaa !5
  %93 = load i32, ptr %6, align 4, !tbaa !5
  %94 = call i32 @rc_gpio_set_value(i32 noundef %87, i32 noundef %92, i32 noundef %93)
  %95 = icmp ne i32 %94, 0
  %96 = xor i1 %95, true
  %97 = xor i1 %96, true
  %98 = zext i1 %97 to i32
  %99 = sext i32 %98 to i64
  %100 = call i64 @llvm.expect.i64(i64 %99, i64 0)
  %101 = icmp ne i64 %100, 0
  br i1 %101, label %102, label %115

102:                                              ; preds = %82
  %103 = load ptr, ptr @stderr, align 8, !tbaa !11
  %104 = load i32, ptr %4, align 4, !tbaa !5
  %105 = sub nsw i32 %104, 1
  %106 = sext i32 %105 to i64
  %107 = getelementptr inbounds [4 x i32], ptr @dirA_chip, i64 0, i64 %106
  %108 = load i32, ptr %107, align 4, !tbaa !5
  %109 = load i32, ptr %4, align 4, !tbaa !5
  %110 = sub nsw i32 %109, 1
  %111 = sext i32 %110 to i64
  %112 = getelementptr inbounds [4 x i32], ptr @dirA_pin, i64 0, i64 %111
  %113 = load i32, ptr %112, align 4, !tbaa !5
  %114 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %103, ptr noundef @.str.9, i32 noundef %108, i32 noundef %113) #5
  store i32 -1, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %183

115:                                              ; preds = %82
  %116 = load i32, ptr %4, align 4, !tbaa !5
  %117 = sub nsw i32 %116, 1
  %118 = sext i32 %117 to i64
  %119 = getelementptr inbounds [4 x i32], ptr @dirB_chip, i64 0, i64 %118
  %120 = load i32, ptr %119, align 4, !tbaa !5
  %121 = load i32, ptr %4, align 4, !tbaa !5
  %122 = sub nsw i32 %121, 1
  %123 = sext i32 %122 to i64
  %124 = getelementptr inbounds [4 x i32], ptr @dirB_pin, i64 0, i64 %123
  %125 = load i32, ptr %124, align 4, !tbaa !5
  %126 = load i32, ptr %7, align 4, !tbaa !5
  %127 = call i32 @rc_gpio_set_value(i32 noundef %120, i32 noundef %125, i32 noundef %126)
  %128 = icmp ne i32 %127, 0
  %129 = xor i1 %128, true
  %130 = xor i1 %129, true
  %131 = zext i1 %130 to i32
  %132 = sext i32 %131 to i64
  %133 = call i64 @llvm.expect.i64(i64 %132, i64 0)
  %134 = icmp ne i64 %133, 0
  br i1 %134, label %135, label %148

135:                                              ; preds = %115
  %136 = load ptr, ptr @stderr, align 8, !tbaa !11
  %137 = load i32, ptr %4, align 4, !tbaa !5
  %138 = sub nsw i32 %137, 1
  %139 = sext i32 %138 to i64
  %140 = getelementptr inbounds [4 x i32], ptr @dirB_chip, i64 0, i64 %139
  %141 = load i32, ptr %140, align 4, !tbaa !5
  %142 = load i32, ptr %4, align 4, !tbaa !5
  %143 = sub nsw i32 %142, 1
  %144 = sext i32 %143 to i64
  %145 = getelementptr inbounds [4 x i32], ptr @dirB_pin, i64 0, i64 %144
  %146 = load i32, ptr %145, align 4, !tbaa !5
  %147 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %136, ptr noundef @.str.9, i32 noundef %141, i32 noundef %146) #5
  store i32 -1, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %183

148:                                              ; preds = %115
  %149 = load i32, ptr %4, align 4, !tbaa !5
  %150 = sub nsw i32 %149, 1
  %151 = sext i32 %150 to i64
  %152 = getelementptr inbounds [4 x i32], ptr @pwmss, i64 0, i64 %151
  %153 = load i32, ptr %152, align 4, !tbaa !5
  %154 = load i32, ptr %4, align 4, !tbaa !5
  %155 = sub nsw i32 %154, 1
  %156 = sext i32 %155 to i64
  %157 = getelementptr inbounds [4 x i32], ptr @pwmch, i64 0, i64 %156
  %158 = load i32, ptr %157, align 4, !tbaa !5
  %159 = trunc i32 %158 to i8
  %160 = load double, ptr %5, align 8, !tbaa !9
  %161 = call i32 @rc_pwm_set_duty(i32 noundef %153, i8 noundef signext %159, double noundef %160)
  %162 = icmp ne i32 %161, 0
  %163 = xor i1 %162, true
  %164 = xor i1 %163, true
  %165 = zext i1 %164 to i32
  %166 = sext i32 %165 to i64
  %167 = call i64 @llvm.expect.i64(i64 %166, i64 0)
  %168 = icmp ne i64 %167, 0
  br i1 %168, label %169, label %182

169:                                              ; preds = %148
  %170 = load ptr, ptr @stderr, align 8, !tbaa !11
  %171 = load i32, ptr %4, align 4, !tbaa !5
  %172 = sub nsw i32 %171, 1
  %173 = sext i32 %172 to i64
  %174 = getelementptr inbounds [4 x i32], ptr @pwmss, i64 0, i64 %173
  %175 = load i32, ptr %174, align 4, !tbaa !5
  %176 = load i32, ptr %4, align 4, !tbaa !5
  %177 = sub nsw i32 %176, 1
  %178 = sext i32 %177 to i64
  %179 = getelementptr inbounds [4 x i32], ptr @pwmch, i64 0, i64 %178
  %180 = load i32, ptr %179, align 4, !tbaa !5
  %181 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %170, ptr noundef @.str.10, i32 noundef %175, i32 noundef %180) #5
  store i32 -1, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %183

182:                                              ; preds = %148
  store i32 0, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %183

183:                                              ; preds = %182, %169, %135, %102, %67, %62, %37, %24
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #5
  %184 = load i32, ptr %3, align 4
  ret i32 %184
}

declare i32 @rc_pwm_set_duty(i32 noundef, i8 noundef signext, double noundef) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(none) }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"double", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@channels = external hidden local_unnamed_addr global i32, align 4
@dirA_chip = external hidden local_unnamed_addr global [4 x i32], align 16
@dirA_pin = external hidden local_unnamed_addr global [4 x i32], align 16
@dirB_chip = external hidden local_unnamed_addr global [4 x i32], align 16
@dirB_pin = external hidden local_unnamed_addr global [4 x i32], align 16
@pwmss = external hidden local_unnamed_addr global [4 x i32], align 16
@pwmch = external hidden local_unnamed_addr global [4 x i32], align 16
@stderr = external local_unnamed_addr global ptr, align 8
@init_flag = external hidden local_unnamed_addr global i32, align 4
@.str.7 = external hidden unnamed_addr constant [62 x i8], align 1
@.str.8 = external hidden unnamed_addr constant [49 x i8], align 1
@polarity = external hidden local_unnamed_addr constant [4 x double], align 16
@.str.9 = external hidden unnamed_addr constant [58 x i8], align 1
@.str.10 = external hidden unnamed_addr constant [52 x i8], align 1

; Function Attrs: nofree nounwind
declare noundef i32 @fprintf(ptr nocapture noundef, ptr nocapture noundef readonly, ...) local_unnamed_addr #0

declare i32 @rc_gpio_set_value(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local range(i32 -1, 1) i32 @rc_motor_set(i32 noundef %0, double noundef %1) local_unnamed_addr #2 {
  %3 = icmp slt i32 %0, 0
  %4 = load i32, ptr @channels, align 4
  %5 = icmp slt i32 %4, %0
  %6 = select i1 %3, i1 true, i1 %5, !prof !5
  br i1 %6, label %7, label %10, !prof !5

7:                                                ; preds = %2
  %8 = load ptr, ptr @stderr, align 8, !tbaa !6
  %9 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %8, ptr noundef nonnull @.str.7, i32 noundef %4) #3
  br label %.loopexit

10:                                               ; preds = %2
  %11 = load i32, ptr @init_flag, align 4, !tbaa !10
  %12 = icmp eq i32 %11, 0
  br i1 %12, label %13, label %16, !prof !5

13:                                               ; preds = %10
  %14 = load ptr, ptr @stderr, align 8, !tbaa !6
  %15 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %14, ptr noundef nonnull @.str.8) #3
  br label %.loopexit

16:                                               ; preds = %10
  %17 = fcmp ogt double %1, 1.000000e+00
  br i1 %17, label %21, label %18

18:                                               ; preds = %16
  %19 = fcmp olt double %1, -1.000000e+00
  br i1 %19, label %20, label %21

20:                                               ; preds = %18
  br label %21

21:                                               ; preds = %16, %18, %20
  %.030 = phi double [ -1.000000e+00, %20 ], [ %1, %18 ], [ 1.000000e+00, %16 ]
  %22 = icmp eq i32 %0, 0
  br i1 %22, label %.preheader, label %28

.preheader:                                       ; preds = %21
  %.not3839 = icmp slt i32 %4, 1
  br i1 %.not3839, label %.loopexit, label %.lr.ph

23:                                               ; preds = %.lr.ph
  %24 = add nuw nsw i32 %.040, 1
  %25 = load i32, ptr @channels, align 4, !tbaa !10
  %.not38.not = icmp slt i32 %.040, %25
  br i1 %.not38.not, label %.lr.ph, label %.loopexit, !llvm.loop !12

.lr.ph:                                           ; preds = %.preheader, %23
  %.040 = phi i32 [ %24, %23 ], [ 1, %.preheader ]
  %26 = tail call i32 @rc_motor_set(i32 noundef %.040, double noundef %.030)
  %27 = icmp eq i32 %26, -1
  br i1 %27, label %.loopexit, label %23

28:                                               ; preds = %21
  %29 = add nsw i32 %0, -1
  %30 = zext nneg i32 %29 to i64
  %31 = getelementptr inbounds [4 x double], ptr @polarity, i64 0, i64 %30
  %32 = load double, ptr %31, align 8, !tbaa !14
  %33 = fmul double %.030, %32
  %34 = fcmp oge double %33, 0.000000e+00
  %35 = fneg double %33
  %.1 = select i1 %34, double %33, double %35
  %.029 = zext i1 %34 to i32
  %36 = getelementptr inbounds [4 x i32], ptr @dirA_chip, i64 0, i64 %30
  %37 = load i32, ptr %36, align 4, !tbaa !10
  %38 = getelementptr inbounds [4 x i32], ptr @dirA_pin, i64 0, i64 %30
  %39 = load i32, ptr %38, align 4, !tbaa !10
  %40 = tail call i32 @rc_gpio_set_value(i32 noundef %37, i32 noundef %39, i32 noundef %.029) #4
  %.not = icmp eq i32 %40, 0
  br i1 %.not, label %46, label %41, !prof !16

41:                                               ; preds = %28
  %42 = load ptr, ptr @stderr, align 8, !tbaa !6
  %43 = load i32, ptr %36, align 4, !tbaa !10
  %44 = load i32, ptr %38, align 4, !tbaa !10
  %45 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %42, ptr noundef nonnull @.str.9, i32 noundef %43, i32 noundef %44) #3
  br label %.loopexit

46:                                               ; preds = %28
  %not. = xor i1 %34, true
  %.028 = zext i1 %not. to i32
  %47 = getelementptr inbounds [4 x i32], ptr @dirB_chip, i64 0, i64 %30
  %48 = load i32, ptr %47, align 4, !tbaa !10
  %49 = getelementptr inbounds [4 x i32], ptr @dirB_pin, i64 0, i64 %30
  %50 = load i32, ptr %49, align 4, !tbaa !10
  %51 = tail call i32 @rc_gpio_set_value(i32 noundef %48, i32 noundef %50, i32 noundef %.028) #4
  %.not36 = icmp eq i32 %51, 0
  br i1 %.not36, label %57, label %52, !prof !16

52:                                               ; preds = %46
  %53 = load ptr, ptr @stderr, align 8, !tbaa !6
  %54 = load i32, ptr %47, align 4, !tbaa !10
  %55 = load i32, ptr %49, align 4, !tbaa !10
  %56 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %53, ptr noundef nonnull @.str.9, i32 noundef %54, i32 noundef %55) #3
  br label %.loopexit

57:                                               ; preds = %46
  %58 = getelementptr inbounds [4 x i32], ptr @pwmss, i64 0, i64 %30
  %59 = load i32, ptr %58, align 4, !tbaa !10
  %60 = getelementptr inbounds [4 x i32], ptr @pwmch, i64 0, i64 %30
  %61 = load i32, ptr %60, align 4, !tbaa !10
  %62 = trunc i32 %61 to i8
  %63 = tail call i32 @rc_pwm_set_duty(i32 noundef %59, i8 noundef signext %62, double noundef %.1) #4
  %.not37 = icmp eq i32 %63, 0
  br i1 %.not37, label %.loopexit, label %64, !prof !16

64:                                               ; preds = %57
  %65 = load ptr, ptr @stderr, align 8, !tbaa !6
  %66 = load i32, ptr %58, align 4, !tbaa !10
  %67 = load i32, ptr %60, align 4, !tbaa !10
  %68 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %65, ptr noundef nonnull @.str.10, i32 noundef %66, i32 noundef %67) #3
  br label %.loopexit

.loopexit:                                        ; preds = %.lr.ph, %23, %.preheader, %57, %64, %52, %41, %13, %7
  %.031 = phi i32 [ -1, %7 ], [ -1, %13 ], [ -1, %41 ], [ -1, %52 ], [ -1, %64 ], [ 0, %57 ], [ 0, %.preheader ], [ -1, %.lr.ph ], [ 0, %23 ]
  ret i32 %.031
}

declare i32 @rc_pwm_set_duty(i32 noundef, i8 noundef signext, double noundef) local_unnamed_addr #1

attributes #0 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { cold nounwind }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!"branch_weights", !"expected", i32 1, i32 2000}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = !{!15, !15, i64 0}
!15 = !{!"double", !8, i64 0}
!16 = !{!"branch_weights", !"expected", i32 2000, i32 1}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LowerExpectIntrinsicPass,SROAPass,SimplifyCFGPass,TailCallElimPass