; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Bus/Pci (WriteNvmeAdminSubmissionQueueBaseAddress)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct._NVME_CONTROLLER_PRIVATE_DATA = type { i32, ptr, ptr, ptr, ptr, i64, ptr, %struct.NVM_EXPRESS_PASS_THRU_MODE, %struct._NVM_EXPRESS_PASS_THRU_PROTOCOL, ptr, ptr, ptr, [2 x ptr], [2 x ptr], [2 x ptr], [2 x ptr], [2 x %struct.NVME_SQTDBL], [2 x %struct.NVME_CQHDBL], [2 x i8], [2 x i16], %struct.NVME_CAP, ptr }
%struct.NVM_EXPRESS_PASS_THRU_MODE = type { i32, i32, i32, i32, i64, i32 }
%struct._NVM_EXPRESS_PASS_THRU_PROTOCOL = type { ptr, ptr, ptr, ptr, ptr }
%struct.NVME_SQTDBL = type { i16, i16 }
%struct.NVME_CQHDBL = type { i16, i16 }
%struct.NVME_CAP = type { i16, i8, i8, i16, i8, i8 }
%struct._EFI_PCI_IO_PROTOCOL = type { ptr, ptr, %struct.EFI_PCI_IO_PROTOCOL_ACCESS, %struct.EFI_PCI_IO_PROTOCOL_ACCESS, %struct.EFI_PCI_IO_PROTOCOL_CONFIG_ACCESS, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i64, ptr }
%struct.EFI_PCI_IO_PROTOCOL_ACCESS = type { ptr, ptr }
%struct.EFI_PCI_IO_PROTOCOL_CONFIG_ACCESS = type { ptr, ptr }

@.str.9 = external hidden unnamed_addr constant [15 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare zeroext i8 @DebugPrintEnabled() #1

declare zeroext i8 @DebugPrintLevelEnabled(i64 noundef) #1

declare void @DebugPrint(i64 noundef, ptr noundef, ...) #1

; Function Attrs: nounwind uwtable
define dso_local i64 @WriteNvmeAdminSubmissionQueueBaseAddress(ptr noundef %0, ptr noundef %1) #2 {
  %3 = alloca i64, align 8
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  %10 = load ptr, ptr %4, align 8, !tbaa !5
  %11 = getelementptr inbounds %struct._NVME_CONTROLLER_PRIVATE_DATA, ptr %10, i32 0, i32 4
  %12 = load ptr, ptr %11, align 8, !tbaa !9
  store ptr %12, ptr %6, align 8, !tbaa !5
  %13 = load ptr, ptr %5, align 8, !tbaa !5
  %14 = call i64 @ReadUnaligned64(ptr noundef %13)
  store i64 %14, ptr %8, align 8, !tbaa !17
  %15 = load ptr, ptr %6, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct._EFI_PCI_IO_PROTOCOL, ptr %15, i32 0, i32 2
  %17 = getelementptr inbounds %struct.EFI_PCI_IO_PROTOCOL_ACCESS, ptr %16, i32 0, i32 1
  %18 = load ptr, ptr %17, align 8, !tbaa !18
  %19 = load ptr, ptr %6, align 8, !tbaa !5
  %20 = call i64 %18(ptr noundef %19, i32 noundef 2, i8 noundef zeroext 0, i64 noundef 40, i64 noundef 2, ptr noundef %8)
  store i64 %20, ptr %7, align 8, !tbaa !17
  %21 = load i64, ptr %7, align 8, !tbaa !17
  %22 = icmp slt i64 %21, 0
  br i1 %22, label %23, label %25

23:                                               ; preds = %2
  %24 = load i64, ptr %7, align 8, !tbaa !17
  store i64 %24, ptr %3, align 8
  store i32 1, ptr %9, align 4
  br label %43

25:                                               ; preds = %2
  br label %26

26:                                               ; preds = %25
  %27 = call zeroext i8 @DebugPrintEnabled()
  %28 = icmp ne i8 %27, 0
  br i1 %28, label %29, label %40

29:                                               ; preds = %26
  br label %30

30:                                               ; preds = %29
  %31 = call zeroext i8 @DebugPrintLevelEnabled(i64 noundef 64)
  %32 = icmp ne i8 %31, 0
  br i1 %32, label %33, label %37

33:                                               ; preds = %30
  %34 = load ptr, ptr %5, align 8, !tbaa !5
  %35 = load i64, ptr %34, align 1
  %36 = lshr i64 %35, 12
  call void (i64, ptr, ...) @DebugPrint(i64 noundef 64, ptr noundef @.str.9, i64 noundef %36)
  br label %37

37:                                               ; preds = %33, %30
  br label %38

38:                                               ; preds = %37
  br label %39

39:                                               ; preds = %38
  br label %40

40:                                               ; preds = %39, %26
  br label %41

41:                                               ; preds = %40
  br label %42

42:                                               ; preds = %41
  store i64 0, ptr %3, align 8
  store i32 1, ptr %9, align 4
  br label %43

43:                                               ; preds = %42, %23
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  %44 = load i64, ptr %3, align 8
  ret i64 %44
}

declare i64 @ReadUnaligned64(ptr noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 32}
!10 = !{!"_NVME_CONTROLLER_PRIVATE_DATA", !11, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !12, i64 40, !6, i64 48, !13, i64 56, !14, i64 88, !6, i64 128, !6, i64 136, !6, i64 144, !7, i64 152, !7, i64 168, !7, i64 184, !7, i64 200, !7, i64 216, !7, i64 224, !7, i64 232, !7, i64 234, !15, i64 238, !6, i64 248}
!11 = !{!"int", !7, i64 0}
!12 = !{!"long long", !7, i64 0}
!13 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !12, i64 16, !11, i64 24}
!14 = !{!"_NVM_EXPRESS_PASS_THRU_PROTOCOL", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32}
!15 = !{!"", !16, i64 0, !7, i64 2, !7, i64 2, !7, i64 2, !7, i64 3, !16, i64 4, !16, i64 4, !16, i64 4, !16, i64 5, !7, i64 6, !7, i64 6, !7, i64 7}
!16 = !{!"short", !7, i64 0}
!17 = !{!12, !12, i64 0}
!18 = !{!19, !6, i64 24}
!19 = !{!"_EFI_PCI_IO_PROTOCOL", !6, i64 0, !6, i64 8, !20, i64 16, !20, i64 32, !20, i64 48, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !6, i64 120, !6, i64 128, !6, i64 136, !12, i64 144, !6, i64 152}
!20 = !{!"", !6, i64 0, !6, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.9 = external hidden unnamed_addr constant [15 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare zeroext i8 @DebugPrintEnabled() local_unnamed_addr #1

declare zeroext i8 @DebugPrintLevelEnabled(i64 noundef) local_unnamed_addr #1

declare void @DebugPrint(i64 noundef, ptr noundef, ...) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local range(i64 -9223372036854775808, 1) i64 @WriteNvmeAdminSubmissionQueueBaseAddress(ptr nocapture noundef readonly %0, ptr noundef %1) local_unnamed_addr #2 {
  %3 = alloca i64, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
  %4 = getelementptr inbounds i8, ptr %0, i64 32
  %5 = load ptr, ptr %4, align 8, !tbaa !5
  %6 = tail call i64 @ReadUnaligned64(ptr noundef %1) #3
  store i64 %6, ptr %3, align 8, !tbaa !16
  %7 = getelementptr inbounds i8, ptr %5, i64 24
  %8 = load ptr, ptr %7, align 8, !tbaa !17
  %9 = call i64 %8(ptr noundef %5, i32 noundef 2, i8 noundef zeroext 0, i64 noundef 40, i64 noundef 2, ptr noundef nonnull %3) #3
  %10 = icmp slt i64 %9, 0
  br i1 %10, label %18, label %11

11:                                               ; preds = %2
  %12 = call zeroext i8 @DebugPrintEnabled() #3
  %.not = icmp eq i8 %12, 0
  br i1 %.not, label %18, label %13

13:                                               ; preds = %11
  %14 = call zeroext i8 @DebugPrintLevelEnabled(i64 noundef 64) #3
  %.not8 = icmp eq i8 %14, 0
  br i1 %.not8, label %18, label %15

15:                                               ; preds = %13
  %16 = load i64, ptr %1, align 1
  %17 = lshr i64 %16, 12
  call void (i64, ptr, ...) @DebugPrint(i64 noundef 64, ptr noundef nonnull @.str.9, i64 noundef %17) #3
  br label %18

18:                                               ; preds = %11, %15, %13, %2
  %.0 = phi i64 [ %9, %2 ], [ 0, %13 ], [ 0, %15 ], [ 0, %11 ]
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
  ret i64 %.0
}

declare i64 @ReadUnaligned64(ptr noundef) local_unnamed_addr #1

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 32}
!6 = !{!"_NVME_CONTROLLER_PRIVATE_DATA", !7, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !11, i64 40, !10, i64 48, !12, i64 56, !13, i64 88, !10, i64 128, !10, i64 136, !10, i64 144, !8, i64 152, !8, i64 168, !8, i64 184, !8, i64 200, !8, i64 216, !8, i64 224, !8, i64 232, !8, i64 234, !14, i64 238, !10, i64 248}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!"long long", !8, i64 0}
!12 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !11, i64 16, !7, i64 24}
!13 = !{!"_NVM_EXPRESS_PASS_THRU_PROTOCOL", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32}
!14 = !{!"", !15, i64 0, !8, i64 2, !8, i64 2, !8, i64 2, !8, i64 3, !15, i64 4, !15, i64 4, !15, i64 4, !15, i64 5, !8, i64 6, !8, i64 6, !8, i64 7}
!15 = !{!"short", !8, i64 0}
!16 = !{!11, !11, i64 0}
!17 = !{!18, !10, i64 24}
!18 = !{!"_EFI_PCI_IO_PROTOCOL", !10, i64 0, !10, i64 8, !19, i64 16, !19, i64 32, !19, i64 48, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !11, i64 144, !10, i64 152}
!19 = !{!"", !10, i64 0, !10, i64 8}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass