; LLVM IR from hoodoer/ENNEoS :: enneosEncoder/Cga.ll (ZN3CgaD2Ev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Cga = type <{ %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector.0", ptr, i32, i32, i32, i32, double, double, i32, [4 x i8], double, %"class.std::vector.5", %"class.std::vector.5", double, i8, i8, [2 x i8], i32, i8, [7 x i8] }>
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<CGenome, std::allocator<CGenome>>::_Vector_impl" }
%"struct.std::_Vector_base<CGenome, std::allocator<CGenome>>::_Vector_impl" = type { %"struct.std::_Vector_base<CGenome, std::allocator<CGenome>>::_Vector_impl_data" }
%"struct.std::_Vector_base<CGenome, std::allocator<CGenome>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<CSpecies, std::allocator<CSpecies>>::_Vector_impl" }
%"struct.std::_Vector_base<CSpecies, std::allocator<CSpecies>>::_Vector_impl" = type { %"struct.std::_Vector_base<CSpecies, std::allocator<CSpecies>>::_Vector_impl_data" }
%"struct.std::_Vector_base<CSpecies, std::allocator<CSpecies>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.5" = type { %"struct.std::_Vector_base.6" }
%"struct.std::_Vector_base.6" = type { %"struct.std::_Vector_base<SplitDepth, std::allocator<SplitDepth>>::_Vector_impl" }
%"struct.std::_Vector_base<SplitDepth, std::allocator<SplitDepth>>::_Vector_impl" = type { %"struct.std::_Vector_base<SplitDepth, std::allocator<SplitDepth>>::_Vector_impl_data" }
%"struct.std::_Vector_base<SplitDepth, std::allocator<SplitDepth>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorI10SplitDepthSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorI8CSpeciesSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorI7CGenomeSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN3CgaD2Ev(ptr noundef nonnull align 8 dereferenceable(265) %0) unnamed_addr #1 align 2 {
  %2 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %3 = load ptr, ptr %2, align 8
  %4 = getelementptr inbounds %class.Cga, ptr %3, i32 0, i32 6
  %5 = load ptr, ptr %4, align 8, !tbaa !9
  %6 = icmp ne ptr %5, null
  br i1 %6, label %7, label %14

7:                                                ; preds = %1
  %8 = getelementptr inbounds %class.Cga, ptr %3, i32 0, i32 6
  %9 = load ptr, ptr %8, align 8, !tbaa !9
  %10 = icmp eq ptr %9, null
  br i1 %10, label %12, label %11

11:                                               ; preds = %7
  call void @_ZN11CInnovationD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %9) #3
  call void @_ZdlPvm(ptr noundef %9, i64 noundef 32) #4
  br label %12

12:                                               ; preds = %11, %7
  %13 = getelementptr inbounds %class.Cga, ptr %3, i32 0, i32 6
  store ptr null, ptr %13, align 8, !tbaa !9
  br label %14

14:                                               ; preds = %12, %1
  %15 = getelementptr inbounds %class.Cga, ptr %3, i32 0, i32 17
  call void @_ZNSt6vectorI10SplitDepthSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %15) #3
  %16 = getelementptr inbounds %class.Cga, ptr %3, i32 0, i32 16
  call void @_ZNSt6vectorI10SplitDepthSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %16) #3
  %17 = getelementptr inbounds %class.Cga, ptr %3, i32 0, i32 5
  call void @_ZNSt6vectorI8CSpeciesSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %17) #3
  %18 = getelementptr inbounds %class.Cga, ptr %3, i32 0, i32 4
  call void @_ZNSt6vectorI7CGenomeSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %18) #3
  %19 = getelementptr inbounds %class.Cga, ptr %3, i32 0, i32 3
  call void @_ZNSt6vectorI7CGenomeSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %19) #3
  %20 = getelementptr inbounds %class.Cga, ptr %3, i32 0, i32 2
  call void @_ZNSt6vectorI7CGenomeSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %20) #3
  %21 = getelementptr inbounds %class.Cga, ptr %3, i32 0, i32 1
  call void @_ZNSt6vectorI7CGenomeSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %21) #3
  %22 = getelementptr inbounds %class.Cga, ptr %3, i32 0, i32 0
  call void @_ZNSt6vectorI7CGenomeSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %22) #3
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN11CInnovationD2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #2 align 2

attributes #0 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 144}
!10 = !{!"_ZTS3Cga", !11, i64 0, !11, i64 24, !11, i64 48, !11, i64 72, !11, i64 96, !15, i64 120, !6, i64 144, !19, i64 152, !19, i64 156, !19, i64 160, !19, i64 164, !20, i64 168, !20, i64 176, !19, i64 184, !20, i64 192, !21, i64 200, !21, i64 224, !20, i64 248, !25, i64 256, !25, i64 257, !26, i64 260, !25, i64 264}
!11 = !{!"_ZTSSt6vectorI7CGenomeSaIS0_EE", !12, i64 0}
!12 = !{!"_ZTSSt12_Vector_baseI7CGenomeSaIS0_EE", !13, i64 0}
!13 = !{!"_ZTSNSt12_Vector_baseI7CGenomeSaIS0_EE12_Vector_implE", !14, i64 0}
!14 = !{!"_ZTSNSt12_Vector_baseI7CGenomeSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!15 = !{!"_ZTSSt6vectorI8CSpeciesSaIS0_EE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseI8CSpeciesSaIS0_EE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseI8CSpeciesSaIS0_EE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseI8CSpeciesSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!19 = !{!"int", !7, i64 0}
!20 = !{!"double", !7, i64 0}
!21 = !{!"_ZTSSt6vectorI10SplitDepthSaIS0_EE", !22, i64 0}
!22 = !{!"_ZTSSt12_Vector_baseI10SplitDepthSaIS0_EE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseI10SplitDepthSaIS0_EE12_Vector_implE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseI10SplitDepthSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!25 = !{!"bool", !7, i64 0}
!26 = !{!"_ZTS13UnderFlowMode", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorI10SplitDepthSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorI8CSpeciesSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorI7CGenomeSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN3CgaD2Ev(ptr noundef nonnull align 8 dereferenceable(265) %0) unnamed_addr #1 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 144
  %3 = load ptr, ptr %2, align 8, !tbaa !5
  %.not = icmp eq ptr %3, null
  br i1 %.not, label %5, label %4

4:                                                ; preds = %1
  tail call void @_ZN11CInnovationD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %3) #3
  tail call void @_ZdlPvm(ptr noundef nonnull %3, i64 noundef 32) #4
  store ptr null, ptr %2, align 8, !tbaa !5
  br label %5

5:                                                ; preds = %4, %1
  %6 = getelementptr inbounds i8, ptr %0, i64 224
  tail call void @_ZNSt6vectorI10SplitDepthSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %6) #3
  %7 = getelementptr inbounds i8, ptr %0, i64 200
  tail call void @_ZNSt6vectorI10SplitDepthSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %7) #3
  %8 = getelementptr inbounds i8, ptr %0, i64 120
  tail call void @_ZNSt6vectorI8CSpeciesSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %8) #3
  %9 = getelementptr inbounds i8, ptr %0, i64 96
  tail call void @_ZNSt6vectorI7CGenomeSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %9) #3
  %10 = getelementptr inbounds i8, ptr %0, i64 72
  tail call void @_ZNSt6vectorI7CGenomeSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %10) #3
  %11 = getelementptr inbounds i8, ptr %0, i64 48
  tail call void @_ZNSt6vectorI7CGenomeSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %11) #3
  %12 = getelementptr inbounds i8, ptr %0, i64 24
  tail call void @_ZNSt6vectorI7CGenomeSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %12) #3
  tail call void @_ZNSt6vectorI7CGenomeSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %0) #3
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN11CInnovationD2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #2 align 2

attributes #0 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 144}
!6 = !{!"_ZTS3Cga", !7, i64 0, !7, i64 24, !7, i64 48, !7, i64 72, !7, i64 96, !14, i64 120, !11, i64 144, !18, i64 152, !18, i64 156, !18, i64 160, !18, i64 164, !19, i64 168, !19, i64 176, !18, i64 184, !19, i64 192, !20, i64 200, !20, i64 224, !19, i64 248, !24, i64 256, !24, i64 257, !25, i64 260, !24, i64 264}
!7 = !{!"_ZTSSt6vectorI7CGenomeSaIS0_EE", !8, i64 0}
!8 = !{!"_ZTSSt12_Vector_baseI7CGenomeSaIS0_EE", !9, i64 0}
!9 = !{!"_ZTSNSt12_Vector_baseI7CGenomeSaIS0_EE12_Vector_implE", !10, i64 0}
!10 = !{!"_ZTSNSt12_Vector_baseI7CGenomeSaIS0_EE17_Vector_impl_dataE", !11, i64 0, !11, i64 8, !11, i64 16}
!11 = !{!"any pointer", !12, i64 0}
!12 = !{!"omnipotent char", !13, i64 0}
!13 = !{!"Simple C++ TBAA"}
!14 = !{!"_ZTSSt6vectorI8CSpeciesSaIS0_EE", !15, i64 0}
!15 = !{!"_ZTSSt12_Vector_baseI8CSpeciesSaIS0_EE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseI8CSpeciesSaIS0_EE12_Vector_implE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseI8CSpeciesSaIS0_EE17_Vector_impl_dataE", !11, i64 0, !11, i64 8, !11, i64 16}
!18 = !{!"int", !12, i64 0}
!19 = !{!"double", !12, i64 0}
!20 = !{!"_ZTSSt6vectorI10SplitDepthSaIS0_EE", !21, i64 0}
!21 = !{!"_ZTSSt12_Vector_baseI10SplitDepthSaIS0_EE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseI10SplitDepthSaIS0_EE12_Vector_implE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseI10SplitDepthSaIS0_EE17_Vector_impl_dataE", !11, i64 0, !11, i64 8, !11, i64 16}
!24 = !{!"bool", !12, i64 0}
!25 = !{!"_ZTS13UnderFlowMode", !12, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass