; LLVM IR from hoodoer/ENNEoS :: enneosEncoder/phenotype.ll (ZN10CNeuralNet6UpdateERKSt6vectorIdSaIdEENS_8run_typeE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.CNeuralNet = type { %"class.std::vector.5", i32, i32, double, i32, %"class.std::vector.0" }
%"class.std::vector.5" = type { %"struct.std::_Vector_base.6" }
%"struct.std::_Vector_base.6" = type { %"struct.std::_Vector_base<SNeuron *, std::allocator<SNeuron *>>::_Vector_impl" }
%"struct.std::_Vector_base<SNeuron *, std::allocator<SNeuron *>>::_Vector_impl" = type { %"struct.std::_Vector_base<SNeuron *, std::allocator<SNeuron *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<SNeuron *, std::allocator<SNeuron *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.SNeuron = type { i32, i32, double, double, double, double, double, %"class.std::vector.10", %"class.std::vector.10" }
%"class.std::vector.10" = type { %"struct.std::_Vector_base.11" }
%"struct.std::_Vector_base.11" = type { %"struct.std::_Vector_base<SLink, std::allocator<SLink>>::_Vector_impl" }
%"struct.std::_Vector_base<SLink, std::allocator<SLink>>::_Vector_impl" = type { %"struct.std::_Vector_base<SLink, std::allocator<SLink>>::_Vector_impl_data" }
%"struct.std::_Vector_base<SLink, std::allocator<SLink>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.SLink = type <{ double, ptr, ptr, i8, [7 x i8] }>

; Function Attrs: mustprogress uwtable
declare dso_local noundef float @_Z7Sigmoidff(float noundef, float noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIP7SNeuronSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7SNeuronSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEE9push_backERKd(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(8)) #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN10CNeuralNet6UpdateERKSt6vectorIdSaIdEENS_8run_typeE(ptr dead_on_unwind noalias writable sret(%"class.std::vector.0") align 8 %0, ptr noundef nonnull align 8 dereferenceable(72) %1, ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef %3) #0 align 2 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca double, align 8
  %14 = alloca i32, align 4
  %15 = alloca double, align 8
  %16 = alloca double, align 8
  %17 = alloca i32, align 4
  store ptr %0, ptr %5, align 8
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  store i32 %3, ptr %8, align 4, !tbaa !9
  %18 = load ptr, ptr %6, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  store i32 0, ptr %9, align 4, !tbaa !11
  %19 = load i32, ptr %8, align 4, !tbaa !9
  %20 = icmp eq i32 %19, 0
  br i1 %20, label %21, label %24

21:                                               ; preds = %4
  %22 = getelementptr inbounds %class.CNeuralNet, ptr %18, i32 0, i32 1
  %23 = load i32, ptr %22, align 8, !tbaa !13
  store i32 %23, ptr %9, align 4, !tbaa !11
  br label %25

24:                                               ; preds = %4
  store i32 1, ptr %9, align 4, !tbaa !11
  br label %25

25:                                               ; preds = %24, %21
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  store i32 0, ptr %10, align 4, !tbaa !11
  br label %26

26:                                               ; preds = %154, %25
  %27 = load i32, ptr %10, align 4, !tbaa !11
  %28 = load i32, ptr %9, align 4, !tbaa !11
  %29 = icmp slt i32 %27, %28
  br i1 %29, label %31, label %30

30:                                               ; preds = %26
  store i32 2, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  br label %157

31:                                               ; preds = %26
  %32 = getelementptr inbounds %class.CNeuralNet, ptr %18, i32 0, i32 5
  call void @_ZNSt6vectorIdSaIdEE5clearEv(ptr noundef nonnull align 8 dereferenceable(24) %32) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  store i32 0, ptr %12, align 4, !tbaa !11
  br label %33

33:                                               ; preds = %42, %31
  %34 = getelementptr inbounds %class.CNeuralNet, ptr %18, i32 0, i32 0
  %35 = load i32, ptr %12, align 4, !tbaa !11
  %36 = sext i32 %35 to i64
  %37 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7SNeuronSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %34, i64 noundef %36) #4
  %38 = load ptr, ptr %37, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.SNeuron, ptr %38, i32 0, i32 0
  %40 = load i32, ptr %39, align 8, !tbaa !24
  %41 = icmp eq i32 %40, 0
  br i1 %41, label %42, label %56

42:                                               ; preds = %33
  %43 = load ptr, ptr %7, align 8, !tbaa !5
  %44 = load i32, ptr %12, align 4, !tbaa !11
  %45 = sext i32 %44 to i64
  %46 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %43, i64 noundef %45) #4
  %47 = load double, ptr %46, align 8, !tbaa !31
  %48 = getelementptr inbounds %class.CNeuralNet, ptr %18, i32 0, i32 0
  %49 = load i32, ptr %12, align 4, !tbaa !11
  %50 = sext i32 %49 to i64
  %51 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7SNeuronSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %48, i64 noundef %50) #4
  %52 = load ptr, ptr %51, align 8, !tbaa !5
  %53 = getelementptr inbounds %struct.SNeuron, ptr %52, i32 0, i32 3
  store double %47, ptr %53, align 8, !tbaa !32
  %54 = load i32, ptr %12, align 4, !tbaa !11
  %55 = add nsw i32 %54, 1
  store i32 %55, ptr %12, align 4, !tbaa !11
  br label %33, !llvm.loop !33

56:                                               ; preds = %33
  %57 = getelementptr inbounds %class.CNeuralNet, ptr %18, i32 0, i32 0
  %58 = load i32, ptr %12, align 4, !tbaa !11
  %59 = add nsw i32 %58, 1
  store i32 %59, ptr %12, align 4, !tbaa !11
  %60 = sext i32 %58 to i64
  %61 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7SNeuronSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %57, i64 noundef %60) #4
  %62 = load ptr, ptr %61, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.SNeuron, ptr %62, i32 0, i32 3
  store double 1.000000e+00, ptr %63, align 8, !tbaa !32
  br label %64

64:                                               ; preds = %150, %56
  %65 = load i32, ptr %12, align 4, !tbaa !11
  %66 = sext i32 %65 to i64
  %67 = getelementptr inbounds %class.CNeuralNet, ptr %18, i32 0, i32 0
  %68 = call noundef i64 @_ZNKSt6vectorIP7SNeuronSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %67) #4
  %69 = icmp ult i64 %66, %68
  br i1 %69, label %70, label %153

70:                                               ; preds = %64
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #4
  store double 0.000000e+00, ptr %13, align 8, !tbaa !31
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #4
  store i32 0, ptr %14, align 4, !tbaa !11
  br label %71

71:                                               ; preds = %112, %70
  %72 = load i32, ptr %14, align 4, !tbaa !11
  %73 = sext i32 %72 to i64
  %74 = getelementptr inbounds %class.CNeuralNet, ptr %18, i32 0, i32 0
  %75 = load i32, ptr %12, align 4, !tbaa !11
  %76 = sext i32 %75 to i64
  %77 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7SNeuronSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %74, i64 noundef %76) #4
  %78 = load ptr, ptr %77, align 8, !tbaa !5
  %79 = getelementptr inbounds %struct.SNeuron, ptr %78, i32 0, i32 7
  %80 = call noundef i64 @_ZNKSt6vectorI5SLinkSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %79) #4
  %81 = icmp ult i64 %73, %80
  br i1 %81, label %83, label %82

82:                                               ; preds = %71
  store i32 9, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #4
  br label %115

83:                                               ; preds = %71
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #4
  %84 = getelementptr inbounds %class.CNeuralNet, ptr %18, i32 0, i32 0
  %85 = load i32, ptr %12, align 4, !tbaa !11
  %86 = sext i32 %85 to i64
  %87 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7SNeuronSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %84, i64 noundef %86) #4
  %88 = load ptr, ptr %87, align 8, !tbaa !5
  %89 = getelementptr inbounds %struct.SNeuron, ptr %88, i32 0, i32 7
  %90 = load i32, ptr %14, align 4, !tbaa !11
  %91 = sext i32 %90 to i64
  %92 = call noundef nonnull align 8 dereferenceable(25) ptr @_ZNSt6vectorI5SLinkSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %89, i64 noundef %91) #4
  %93 = getelementptr inbounds %struct.SLink, ptr %92, i32 0, i32 0
  %94 = load double, ptr %93, align 8, !tbaa !35
  store double %94, ptr %15, align 8, !tbaa !31
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #4
  %95 = getelementptr inbounds %class.CNeuralNet, ptr %18, i32 0, i32 0
  %96 = load i32, ptr %12, align 4, !tbaa !11
  %97 = sext i32 %96 to i64
  %98 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7SNeuronSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %95, i64 noundef %97) #4
  %99 = load ptr, ptr %98, align 8, !tbaa !5
  %100 = getelementptr inbounds %struct.SNeuron, ptr %99, i32 0, i32 7
  %101 = load i32, ptr %14, align 4, !tbaa !11
  %102 = sext i32 %101 to i64
  %103 = call noundef nonnull align 8 dereferenceable(25) ptr @_ZNSt6vectorI5SLinkSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %100, i64 noundef %102) #4
  %104 = getelementptr inbounds %struct.SLink, ptr %103, i32 0, i32 1
  %105 = load ptr, ptr %104, align 8, !tbaa !38
  %106 = getelementptr inbounds %struct.SNeuron, ptr %105, i32 0, i32 3
  %107 = load double, ptr %106, align 8, !tbaa !32
  store double %107, ptr %16, align 8, !tbaa !31
  %108 = load double, ptr %15, align 8, !tbaa !31
  %109 = load double, ptr %16, align 8, !tbaa !31
  %110 = load double, ptr %13, align 8, !tbaa !31
  %111 = call double @llvm.fmuladd.f64(double %108, double %109, double %110)
  store double %111, ptr %13, align 8, !tbaa !31
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #4
  br label %112

112:                                              ; preds = %83
  %113 = load i32, ptr %14, align 4, !tbaa !11
  %114 = add nsw i32 %113, 1
  store i32 %114, ptr %14, align 4, !tbaa !11
  br label %71, !llvm.loop !39

115:                                              ; preds = %82
  %116 = load double, ptr %13, align 8, !tbaa !31
  %117 = fptrunc double %116 to float
  %118 = getelementptr inbounds %class.CNeuralNet, ptr %18, i32 0, i32 0
  %119 = load i32, ptr %12, align 4, !tbaa !11
  %120 = sext i32 %119 to i64
  %121 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7SNeuronSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %118, i64 noundef %120) #4
  %122 = load ptr, ptr %121, align 8, !tbaa !5
  %123 = getelementptr inbounds %struct.SNeuron, ptr %122, i32 0, i32 6
  %124 = load double, ptr %123, align 8, !tbaa !40
  %125 = fptrunc double %124 to float
  %126 = call noundef float @_Z7Sigmoidff(float noundef %117, float noundef %125)
  %127 = fpext float %126 to double
  %128 = getelementptr inbounds %class.CNeuralNet, ptr %18, i32 0, i32 0
  %129 = load i32, ptr %12, align 4, !tbaa !11
  %130 = sext i32 %129 to i64
  %131 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7SNeuronSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %128, i64 noundef %130) #4
  %132 = load ptr, ptr %131, align 8, !tbaa !5
  %133 = getelementptr inbounds %struct.SNeuron, ptr %132, i32 0, i32 3
  store double %127, ptr %133, align 8, !tbaa !32
  %134 = getelementptr inbounds %class.CNeuralNet, ptr %18, i32 0, i32 0
  %135 = load i32, ptr %12, align 4, !tbaa !11
  %136 = sext i32 %135 to i64
  %137 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7SNeuronSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %134, i64 noundef %136) #4
  %138 = load ptr, ptr %137, align 8, !tbaa !5
  %139 = getelementptr inbounds %struct.SNeuron, ptr %138, i32 0, i32 0
  %140 = load i32, ptr %139, align 8, !tbaa !24
  %141 = icmp eq i32 %140, 2
  br i1 %141, label %142, label %150

142:                                              ; preds = %115
  %143 = getelementptr inbounds %class.CNeuralNet, ptr %18, i32 0, i32 5
  %144 = getelementptr inbounds %class.CNeuralNet, ptr %18, i32 0, i32 0
  %145 = load i32, ptr %12, align 4, !tbaa !11
  %146 = sext i32 %145 to i64
  %147 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7SNeuronSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %144, i64 noundef %146) #4
  %148 = load ptr, ptr %147, align 8, !tbaa !5
  %149 = getelementptr inbounds %struct.SNeuron, ptr %148, i32 0, i32 3
  call void @_ZNSt6vectorIdSaIdEE9push_backERKd(ptr noundef nonnull align 8 dereferenceable(24) %143, ptr noundef nonnull align 8 dereferenceable(8) %149)
  br label %150

150:                                              ; preds = %142, %115
  %151 = load i32, ptr %12, align 4, !tbaa !11
  %152 = add nsw i32 %151, 1
  store i32 %152, ptr %12, align 4, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #4
  br label %64, !llvm.loop !41

153:                                              ; preds = %64
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  br label %154

154:                                              ; preds = %153
  %155 = load i32, ptr %10, align 4, !tbaa !11
  %156 = add nsw i32 %155, 1
  store i32 %156, ptr %10, align 4, !tbaa !11
  br label %26, !llvm.loop !42

157:                                              ; preds = %30
  %158 = load i32, ptr %8, align 4, !tbaa !9
  %159 = icmp eq i32 %158, 0
  br i1 %159, label %160, label %179

160:                                              ; preds = %157
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #4
  store i32 0, ptr %17, align 4, !tbaa !11
  br label %161

161:                                              ; preds = %175, %160
  %162 = load i32, ptr %17, align 4, !tbaa !11
  %163 = sext i32 %162 to i64
  %164 = getelementptr inbounds %class.CNeuralNet, ptr %18, i32 0, i32 0
  %165 = call noundef i64 @_ZNKSt6vectorIP7SNeuronSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %164) #4
  %166 = icmp ult i64 %163, %165
  br i1 %166, label %168, label %167

167:                                              ; preds = %161
  store i32 12, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #4
  br label %178

168:                                              ; preds = %161
  %169 = getelementptr inbounds %class.CNeuralNet, ptr %18, i32 0, i32 0
  %170 = load i32, ptr %17, align 4, !tbaa !11
  %171 = sext i32 %170 to i64
  %172 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7SNeuronSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %169, i64 noundef %171) #4
  %173 = load ptr, ptr %172, align 8, !tbaa !5
  %174 = getelementptr inbounds %struct.SNeuron, ptr %173, i32 0, i32 3
  store double 0.000000e+00, ptr %174, align 8, !tbaa !32
  br label %175

175:                                              ; preds = %168
  %176 = load i32, ptr %17, align 4, !tbaa !11
  %177 = add nsw i32 %176, 1
  store i32 %177, ptr %17, align 4, !tbaa !11
  br label %161, !llvm.loop !43

178:                                              ; preds = %167
  br label %179

179:                                              ; preds = %178, %157
  %180 = getelementptr inbounds %class.CNeuralNet, ptr %18, i32 0, i32 5
  call void @_ZNSt6vectorIdSaIdEEC2ERKS1_(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %180)
  store i32 1, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEE5clearEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI5SLinkSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(25) ptr @_ZNSt6vectorI5SLinkSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEEC2ERKS1_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_ZTSN10CNeuralNet8run_typeE", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !12, i64 24}
!14 = !{!"_ZTS10CNeuralNet", !15, i64 0, !12, i64 24, !12, i64 28, !19, i64 32, !12, i64 40, !20, i64 48}
!15 = !{!"_ZTSSt6vectorIP7SNeuronSaIS1_EE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseIP7SNeuronSaIS1_EE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIP7SNeuronSaIS1_EE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIP7SNeuronSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!19 = !{!"double", !7, i64 0}
!20 = !{!"_ZTSSt6vectorIdSaIdEE", !21, i64 0}
!21 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!24 = !{!25, !26, i64 0}
!25 = !{!"_ZTS7SNeuron", !26, i64 0, !12, i64 4, !19, i64 8, !19, i64 16, !19, i64 24, !19, i64 32, !19, i64 40, !27, i64 48, !27, i64 72}
!26 = !{!"_ZTS11neuron_type", !7, i64 0}
!27 = !{!"_ZTSSt6vectorI5SLinkSaIS0_EE", !28, i64 0}
!28 = !{!"_ZTSSt12_Vector_baseI5SLinkSaIS0_EE", !29, i64 0}
!29 = !{!"_ZTSNSt12_Vector_baseI5SLinkSaIS0_EE12_Vector_implE", !30, i64 0}
!30 = !{!"_ZTSNSt12_Vector_baseI5SLinkSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!31 = !{!19, !19, i64 0}
!32 = !{!25, !19, i64 16}
!33 = distinct !{!33, !34}
!34 = !{!"llvm.loop.mustprogress"}
!35 = !{!36, !19, i64 0}
!36 = !{!"_ZTS5SLink", !19, i64 0, !6, i64 8, !6, i64 16, !37, i64 24}
!37 = !{!"bool", !7, i64 0}
!38 = !{!36, !6, i64 8}
!39 = distinct !{!39, !34}
!40 = !{!25, !19, i64 40}
!41 = distinct !{!41, !34}
!42 = distinct !{!42, !34}
!43 = distinct !{!43, !34}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress uwtable
declare dso_local noundef float @_Z7Sigmoidff(float noundef, float noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIP7SNeuronSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7SNeuronSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEE9push_backERKd(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN10CNeuralNet6UpdateERKSt6vectorIdSaIdEENS_8run_typeE(ptr dead_on_unwind noalias writable sret(%"class.std::vector.0") align 8 %0, ptr noundef nonnull align 8 dereferenceable(72) %1, ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef %3) local_unnamed_addr #0 align 2 {
  %5 = icmp eq i32 %3, 0
  %6 = getelementptr inbounds i8, ptr %1, i64 24
  %7 = load i32, ptr %6, align 8
  %.031 = select i1 %5, i32 %7, i32 1
  %8 = icmp sgt i32 %.031, 0
  br i1 %8, label %.lr.ph52, label %._crit_edge53

.lr.ph52:                                         ; preds = %4
  %9 = getelementptr inbounds i8, ptr %1, i64 48
  br label %11

._crit_edge53:                                    ; preds = %._crit_edge49, %4
  br i1 %5, label %.preheader, label %.loopexit

.preheader:                                       ; preds = %._crit_edge53
  %10 = tail call noundef i64 @_ZNKSt6vectorIP7SNeuronSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #3
  %.not56 = icmp eq i64 %10, 0
  br i1 %.not56, label %.loopexit, label %.lr.ph55

11:                                               ; preds = %.lr.ph52, %._crit_edge49
  %.03250 = phi i32 [ 0, %.lr.ph52 ], [ %76, %._crit_edge49 ]
  tail call void @_ZNSt6vectorIdSaIdEE5clearEv(ptr noundef nonnull align 8 dereferenceable(24) %9) #3
  %12 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7SNeuronSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef 0) #3
  %13 = load ptr, ptr %12, align 8, !tbaa !5
  %14 = load i32, ptr %13, align 8, !tbaa !9
  %15 = icmp eq i32 %14, 0
  br i1 %15, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %11, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %11 ]
  %16 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %indvars.iv) #3
  %17 = load double, ptr %16, align 8, !tbaa !18
  %18 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7SNeuronSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv) #3
  %19 = load ptr, ptr %18, align 8, !tbaa !5
  %20 = getelementptr inbounds i8, ptr %19, i64 16
  store double %17, ptr %20, align 8, !tbaa !19
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %21 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7SNeuronSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv.next) #3
  %22 = load ptr, ptr %21, align 8, !tbaa !5
  %23 = load i32, ptr %22, align 8, !tbaa !9
  %24 = icmp eq i32 %23, 0
  br i1 %24, label %.lr.ph, label %._crit_edge, !llvm.loop !20

._crit_edge:                                      ; preds = %.lr.ph, %11
  %.lcssa = phi i64 [ 0, %11 ], [ %indvars.iv.next, %.lr.ph ]
  %25 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7SNeuronSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %.lcssa) #3
  %26 = load ptr, ptr %25, align 8, !tbaa !5
  %27 = getelementptr inbounds i8, ptr %26, i64 16
  store double 1.000000e+00, ptr %27, align 8, !tbaa !19
  %.147 = add i64 %.lcssa, 1
  %28 = and i64 %.147, 4294967295
  %29 = tail call noundef i64 @_ZNKSt6vectorIP7SNeuronSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #3
  %30 = icmp ugt i64 %29, %28
  br i1 %30, label %.preheader39, label %._crit_edge49

.preheader39:                                     ; preds = %._crit_edge, %73
  %indvars.iv64 = phi i64 [ %indvars.iv.next65, %73 ], [ %28, %._crit_edge ]
  %31 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7SNeuronSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv64) #3
  %32 = load ptr, ptr %31, align 8, !tbaa !5
  %33 = getelementptr inbounds i8, ptr %32, i64 48
  %34 = tail call noundef i64 @_ZNKSt6vectorI5SLinkSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %33) #3
  %.not = icmp eq i64 %34, 0
  br i1 %.not, label %._crit_edge45, label %.lr.ph44

._crit_edge45:                                    ; preds = %.lr.ph44, %.preheader39
  %.034.lcssa = phi double [ 0.000000e+00, %.preheader39 ], [ %63, %.lr.ph44 ]
  %35 = fptrunc double %.034.lcssa to float
  %36 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7SNeuronSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv64) #3
  %37 = load ptr, ptr %36, align 8, !tbaa !5
  %38 = getelementptr inbounds i8, ptr %37, i64 40
  %39 = load double, ptr %38, align 8, !tbaa !22
  %40 = fptrunc double %39 to float
  %41 = tail call noundef float @_Z7Sigmoidff(float noundef %35, float noundef %40)
  %42 = fpext float %41 to double
  %43 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7SNeuronSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv64) #3
  %44 = load ptr, ptr %43, align 8, !tbaa !5
  %45 = getelementptr inbounds i8, ptr %44, i64 16
  store double %42, ptr %45, align 8, !tbaa !19
  %46 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7SNeuronSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv64) #3
  %47 = load ptr, ptr %46, align 8, !tbaa !5
  %48 = load i32, ptr %47, align 8, !tbaa !9
  %49 = icmp eq i32 %48, 2
  br i1 %49, label %69, label %73

.lr.ph44:                                         ; preds = %.preheader39, %.lr.ph44
  %indvars.iv61 = phi i64 [ %indvars.iv.next62, %.lr.ph44 ], [ 0, %.preheader39 ]
  %.03442 = phi double [ %63, %.lr.ph44 ], [ 0.000000e+00, %.preheader39 ]
  %50 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7SNeuronSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv64) #3
  %51 = load ptr, ptr %50, align 8, !tbaa !5
  %52 = getelementptr inbounds i8, ptr %51, i64 48
  %53 = tail call noundef nonnull align 8 dereferenceable(25) ptr @_ZNSt6vectorI5SLinkSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %52, i64 noundef %indvars.iv61) #3
  %54 = load double, ptr %53, align 8, !tbaa !23
  %55 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7SNeuronSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv64) #3
  %56 = load ptr, ptr %55, align 8, !tbaa !5
  %57 = getelementptr inbounds i8, ptr %56, i64 48
  %58 = tail call noundef nonnull align 8 dereferenceable(25) ptr @_ZNSt6vectorI5SLinkSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %57, i64 noundef %indvars.iv61) #3
  %59 = getelementptr inbounds i8, ptr %58, i64 8
  %60 = load ptr, ptr %59, align 8, !tbaa !26
  %61 = getelementptr inbounds i8, ptr %60, i64 16
  %62 = load double, ptr %61, align 8, !tbaa !19
  %63 = tail call double @llvm.fmuladd.f64(double %54, double %62, double %.03442)
  %indvars.iv.next62 = add nuw nsw i64 %indvars.iv61, 1
  %64 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7SNeuronSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv64) #3
  %65 = load ptr, ptr %64, align 8, !tbaa !5
  %66 = getelementptr inbounds i8, ptr %65, i64 48
  %67 = tail call noundef i64 @_ZNKSt6vectorI5SLinkSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %66) #3
  %68 = icmp ugt i64 %67, %indvars.iv.next62
  br i1 %68, label %.lr.ph44, label %._crit_edge45, !llvm.loop !27

69:                                               ; preds = %._crit_edge45
  %70 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7SNeuronSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv64) #3
  %71 = load ptr, ptr %70, align 8, !tbaa !5
  %72 = getelementptr inbounds i8, ptr %71, i64 16
  tail call void @_ZNSt6vectorIdSaIdEE9push_backERKd(ptr noundef nonnull align 8 dereferenceable(24) %9, ptr noundef nonnull align 8 dereferenceable(8) %72)
  br label %73

73:                                               ; preds = %69, %._crit_edge45
  %indvars.iv.next65 = add nuw nsw i64 %indvars.iv64, 1
  %74 = tail call noundef i64 @_ZNKSt6vectorIP7SNeuronSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #3
  %75 = icmp ugt i64 %74, %indvars.iv.next65
  br i1 %75, label %.preheader39, label %._crit_edge49, !llvm.loop !28

._crit_edge49:                                    ; preds = %73, %._crit_edge
  %76 = add nuw nsw i32 %.03250, 1
  %exitcond.not = icmp eq i32 %76, %.031
  br i1 %exitcond.not, label %._crit_edge53, label %11, !llvm.loop !29

.lr.ph55:                                         ; preds = %.preheader, %.lr.ph55
  %indvars.iv67 = phi i64 [ %indvars.iv.next68, %.lr.ph55 ], [ 0, %.preheader ]
  %77 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7SNeuronSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv67) #3
  %78 = load ptr, ptr %77, align 8, !tbaa !5
  %79 = getelementptr inbounds i8, ptr %78, i64 16
  store double 0.000000e+00, ptr %79, align 8, !tbaa !19
  %indvars.iv.next68 = add nuw nsw i64 %indvars.iv67, 1
  %80 = tail call noundef i64 @_ZNKSt6vectorIP7SNeuronSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #3
  %81 = icmp ugt i64 %80, %indvars.iv.next68
  br i1 %81, label %.lr.ph55, label %.loopexit, !llvm.loop !30

.loopexit:                                        ; preds = %.lr.ph55, %.preheader, %._crit_edge53
  %82 = getelementptr inbounds i8, ptr %1, i64 48
  tail call void @_ZNSt6vectorIdSaIdEEC2ERKS1_(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %82)
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEE5clearEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI5SLinkSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(25) ptr @_ZNSt6vectorI5SLinkSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEEC2ERKS1_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"_ZTS7SNeuron", !11, i64 0, !12, i64 4, !13, i64 8, !13, i64 16, !13, i64 24, !13, i64 32, !13, i64 40, !14, i64 48, !14, i64 72}
!11 = !{!"_ZTS11neuron_type", !7, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!"double", !7, i64 0}
!14 = !{!"_ZTSSt6vectorI5SLinkSaIS0_EE", !15, i64 0}
!15 = !{!"_ZTSSt12_Vector_baseI5SLinkSaIS0_EE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseI5SLinkSaIS0_EE12_Vector_implE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseI5SLinkSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!18 = !{!13, !13, i64 0}
!19 = !{!10, !13, i64 16}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
!22 = !{!10, !13, i64 40}
!23 = !{!24, !13, i64 0}
!24 = !{!"_ZTS5SLink", !13, i64 0, !6, i64 8, !6, i64 16, !25, i64 24}
!25 = !{!"bool", !7, i64 0}
!26 = !{!24, !6, i64 8}
!27 = distinct !{!27, !21}
!28 = distinct !{!28, !21}
!29 = distinct !{!29, !21}
!30 = distinct !{!30, !21}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass