; LLVM IR from hoodoer/ENNEoS :: enneosEncoder/genotype.ll (ZN7CGenome24MutateActivationResponseEdd)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.CGenome = type <{ i32, [4 x i8], %"class.std::vector", %"class.std::vector.0", ptr, i32, [4 x i8], double, double, double, i32, i32, i32, [4 x i8] }>
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<SNeuronGene, std::allocator<SNeuronGene>>::_Vector_impl" }
%"struct.std::_Vector_base<SNeuronGene, std::allocator<SNeuronGene>>::_Vector_impl" = type { %"struct.std::_Vector_base<SNeuronGene, std::allocator<SNeuronGene>>::_Vector_impl_data" }
%"struct.std::_Vector_base<SNeuronGene, std::allocator<SNeuronGene>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<SLinkGene, std::allocator<SLinkGene>>::_Vector_impl" }
%"struct.std::_Vector_base<SLinkGene, std::allocator<SLinkGene>>::_Vector_impl" = type { %"struct.std::_Vector_base<SLinkGene, std::allocator<SLinkGene>>::_Vector_impl_data" }
%"struct.std::_Vector_base<SLinkGene, std::allocator<SLinkGene>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.SNeuronGene = type { i32, i32, i8, double, double, double }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(40) ptr @_ZNSt6vectorI11SNeuronGeneSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef double @_Z13RandomClampedv() #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI11SNeuronGeneSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef double @_Z10RandDoublev() #3

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #4

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7CGenome24MutateActivationResponseEdd(ptr noundef nonnull align 8 dereferenceable(108) %0, double noundef %1, double noundef %2) #5 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca double, align 8
  %6 = alloca double, align 8
  %7 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store double %1, ptr %5, align 8, !tbaa !9
  store double %2, ptr %6, align 8, !tbaa !9
  %8 = load ptr, ptr %4, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #6
  store i32 0, ptr %7, align 4, !tbaa !11
  br label %9

9:                                                ; preds = %31, %3
  %10 = load i32, ptr %7, align 4, !tbaa !11
  %11 = zext i32 %10 to i64
  %12 = getelementptr inbounds %class.CGenome, ptr %8, i32 0, i32 2
  %13 = call noundef i64 @_ZNKSt6vectorI11SNeuronGeneSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %12) #6
  %14 = icmp ult i64 %11, %13
  br i1 %14, label %16, label %15

15:                                               ; preds = %9
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #6
  br label %34

16:                                               ; preds = %9
  %17 = call noundef double @_Z10RandDoublev()
  %18 = load double, ptr %5, align 8, !tbaa !9
  %19 = fcmp olt double %17, %18
  br i1 %19, label %20, label %30

20:                                               ; preds = %16
  %21 = call noundef double @_Z13RandomClampedv()
  %22 = load double, ptr %6, align 8, !tbaa !9
  %23 = getelementptr inbounds %class.CGenome, ptr %8, i32 0, i32 2
  %24 = load i32, ptr %7, align 4, !tbaa !11
  %25 = zext i32 %24 to i64
  %26 = call noundef nonnull align 8 dereferenceable(40) ptr @_ZNSt6vectorI11SNeuronGeneSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %23, i64 noundef %25) #6
  %27 = getelementptr inbounds %struct.SNeuronGene, ptr %26, i32 0, i32 5
  %28 = load double, ptr %27, align 8, !tbaa !13
  %29 = call double @llvm.fmuladd.f64(double %21, double %22, double %28)
  store double %29, ptr %27, align 8, !tbaa !13
  br label %30

30:                                               ; preds = %20, %16
  br label %31

31:                                               ; preds = %30
  %32 = load i32, ptr %7, align 4, !tbaa !11
  %33 = add i32 %32, 1
  store i32 %33, ptr %7, align 4, !tbaa !11
  br label %9, !llvm.loop !17

34:                                               ; preds = %15
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"double", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !10, i64 32}
!14 = !{!"_ZTS11SNeuronGene", !12, i64 0, !15, i64 4, !16, i64 8, !10, i64 16, !10, i64 24, !10, i64 32}
!15 = !{!"_ZTS11neuron_type", !7, i64 0}
!16 = !{!"bool", !7, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(40) ptr @_ZNSt6vectorI11SNeuronGeneSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef double @_Z13RandomClampedv() local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI11SNeuronGeneSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef double @_Z10RandDoublev() local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #3

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7CGenome24MutateActivationResponseEdd(ptr noundef nonnull align 8 dereferenceable(108) %0, double noundef %1, double noundef %2) local_unnamed_addr #4 align 2 {
  %4 = getelementptr inbounds i8, ptr %0, i64 8
  %5 = tail call noundef i64 @_ZNKSt6vectorI11SNeuronGeneSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %4) #5
  %.not = icmp eq i64 %5, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

._crit_edge:                                      ; preds = %15, %3
  ret void

.lr.ph:                                           ; preds = %3, %15
  %6 = phi i64 [ %17, %15 ], [ 0, %3 ]
  %.06 = phi i32 [ %16, %15 ], [ 0, %3 ]
  %7 = tail call noundef double @_Z10RandDoublev()
  %8 = fcmp olt double %7, %1
  br i1 %8, label %9, label %15

9:                                                ; preds = %.lr.ph
  %10 = tail call noundef double @_Z13RandomClampedv()
  %11 = tail call noundef nonnull align 8 dereferenceable(40) ptr @_ZNSt6vectorI11SNeuronGeneSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %6) #5
  %12 = getelementptr inbounds i8, ptr %11, i64 32
  %13 = load double, ptr %12, align 8, !tbaa !5
  %14 = tail call double @llvm.fmuladd.f64(double %10, double %2, double %13)
  store double %14, ptr %12, align 8, !tbaa !5
  br label %15

15:                                               ; preds = %.lr.ph, %9
  %16 = add i32 %.06, 1
  %17 = zext i32 %16 to i64
  %18 = tail call noundef i64 @_ZNKSt6vectorI11SNeuronGeneSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %4) #5
  %19 = icmp ugt i64 %18, %17
  br i1 %19, label %.lr.ph, label %._crit_edge, !llvm.loop !13
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !12, i64 32}
!6 = !{!"_ZTS11SNeuronGene", !7, i64 0, !10, i64 4, !11, i64 8, !12, i64 16, !12, i64 24, !12, i64 32}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTS11neuron_type", !8, i64 0}
!11 = !{!"bool", !8, i64 0}
!12 = !{!"double", !8, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass