; LLVM IR from gem5/gem5 :: ext/mcpat/cacti/subarray.ll (ZN8Subarray9compute_CEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.TechnologyParameter = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, i64, %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::ScalingFactor", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType" }
%"class.TechnologyParameter::DeviceType" = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::InterconnectType" = type { double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::ScalingFactor" = type { double, double, double }
%"class.TechnologyParameter::MemoryType" = type { double, double, double, double, double, double }
%class.Subarray = type { %class.Component, ptr, i32, i32, i32, i32, %class.Area, %class.Area, i8, double, double, double, double, double, double, double, double }
%class.Component = type { %class.Area, %class.powerDef, %class.powerDef, double, double }
%class.powerDef = type { %class.powerComponents, %class.powerComponents, %class.powerComponents }
%class.powerComponents = type { double, double, double, double, double }
%class.Area = type { double, double, double }
%class.DynamicParameter = type <{ i8, i8, i8, i8, i32, i32, i32, double, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, [7 x i8], double, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i8], double, i32, i32, i32, i32, i32, i32, i32, i8, [3 x i8], %class.Area, %class.Area, i8, [7 x i8] }>

@g_tp = external global %class.TechnologyParameter, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN8Subarray9compute_CEv(ptr noundef nonnull align 8 dereferenceable(424) %0) #2 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca double, align 8
  %4 = alloca double, align 8
  %5 = alloca double, align 8
  %6 = alloca double, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %7 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #4
  %8 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 6
  %9 = getelementptr inbounds %class.Area, ptr %8, i32 0, i32 0
  %10 = load double, ptr %9, align 8, !tbaa !9
  %11 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::InterconnectType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 50), i32 0, i32 2), align 8, !tbaa !18
  %12 = fmul double %10, %11
  store double %12, ptr %3, align 8, !tbaa !25
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #4
  %13 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 6
  %14 = getelementptr inbounds %class.Area, ptr %13, i32 0, i32 0
  %15 = load double, ptr %14, align 8, !tbaa !9
  %16 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::InterconnectType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 50), i32 0, i32 1), align 8, !tbaa !26
  %17 = fmul double %15, %16
  store double %17, ptr %4, align 8, !tbaa !25
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #4
  %18 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 6
  %19 = getelementptr inbounds %class.Area, ptr %18, i32 0, i32 1
  %20 = load double, ptr %19, align 8, !tbaa !27
  %21 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::InterconnectType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 50), i32 0, i32 2), align 8, !tbaa !18
  %22 = fmul double %20, %21
  store double %22, ptr %5, align 8, !tbaa !25
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #4
  %23 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 1
  %24 = load ptr, ptr %23, align 8, !tbaa !28
  %25 = getelementptr inbounds %class.DynamicParameter, ptr %24, i32 0, i32 32
  %26 = load i8, ptr %25, align 8, !tbaa !29, !range !31, !noundef !32
  %27 = trunc i8 %26 to i1
  br i1 %27, label %28, label %67

28:                                               ; preds = %1
  %29 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::MemoryType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 55), i32 0, i32 2), align 8, !tbaa !33
  %30 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 55), align 8, !tbaa !34
  %31 = call noundef double @_Z11gate_C_passddbbb(double noundef %29, double noundef %30, i1 noundef zeroext true, i1 noundef zeroext true, i1 noundef zeroext false)
  %32 = load double, ptr %3, align 8, !tbaa !25
  %33 = fadd double %31, %32
  %34 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 3
  %35 = load i32, ptr %34, align 4, !tbaa !35
  %36 = uitofp i32 %35 to double
  %37 = fmul double %33, %36
  %38 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 9
  store double %37, ptr %38, align 8, !tbaa !36
  %39 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 1
  %40 = load ptr, ptr %39, align 8, !tbaa !28
  %41 = getelementptr inbounds %class.DynamicParameter, ptr %40, i32 0, i32 43
  %42 = load i32, ptr %41, align 8, !tbaa !37
  %43 = icmp eq i32 %42, 4
  br i1 %43, label %44, label %51

44:                                               ; preds = %28
  %45 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 2
  %46 = load i32, ptr %45, align 8, !tbaa !38
  %47 = uitofp i32 %46 to double
  %48 = load double, ptr %5, align 8, !tbaa !25
  %49 = fmul double %47, %48
  %50 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 15
  store double %49, ptr %50, align 8, !tbaa !39
  br label %66

51:                                               ; preds = %28
  %52 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::MemoryType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 55), i32 0, i32 2), align 8, !tbaa !33
  %53 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 6
  %54 = getelementptr inbounds %class.Area, ptr %53, i32 0, i32 0
  %55 = load double, ptr %54, align 8, !tbaa !9
  %56 = call noundef double @_Z8drain_C_diiidbbb(double noundef %52, i32 noundef 1, i32 noundef 1, i32 noundef 0, double noundef %55, i1 noundef zeroext true, i1 noundef zeroext true, i1 noundef zeroext false)
  %57 = fdiv double %56, 2.000000e+00
  store double %57, ptr %6, align 8, !tbaa !25
  %58 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 2
  %59 = load i32, ptr %58, align 8, !tbaa !38
  %60 = uitofp i32 %59 to double
  %61 = load double, ptr %6, align 8, !tbaa !25
  %62 = load double, ptr %5, align 8, !tbaa !25
  %63 = fadd double %61, %62
  %64 = fmul double %60, %63
  %65 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 15
  store double %64, ptr %65, align 8, !tbaa !39
  br label %66

66:                                               ; preds = %51, %44
  br label %234

67:                                               ; preds = %1
  %68 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 8
  %69 = load i8, ptr %68, align 8, !tbaa !40, !range !31, !noundef !32
  %70 = trunc i8 %69 to i1
  br i1 %70, label %105, label %71

71:                                               ; preds = %67
  %72 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 1
  %73 = load ptr, ptr %72, align 8, !tbaa !28
  %74 = getelementptr inbounds %class.DynamicParameter, ptr %73, i32 0, i32 2
  %75 = load i8, ptr %74, align 2, !tbaa !41, !range !31, !noundef !32
  %76 = trunc i8 %75 to i1
  br i1 %76, label %105, label %77

77:                                               ; preds = %71
  %78 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::MemoryType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 54), i32 0, i32 2), align 8, !tbaa !42
  %79 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 54), align 8, !tbaa !43
  %80 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::MemoryType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 54), i32 0, i32 2), align 8, !tbaa !42
  %81 = call double @llvm.fmuladd.f64(double -2.000000e+00, double %80, double %79)
  %82 = fdiv double %81, 2.000000e+00
  %83 = call noundef double @_Z11gate_C_passddbbb(double noundef %78, double noundef %82, i1 noundef zeroext false, i1 noundef zeroext true, i1 noundef zeroext false)
  %84 = load double, ptr %3, align 8, !tbaa !25
  %85 = call double @llvm.fmuladd.f64(double %83, double 2.000000e+00, double %84)
  %86 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 3
  %87 = load i32, ptr %86, align 4, !tbaa !35
  %88 = uitofp i32 %87 to double
  %89 = fmul double %85, %88
  %90 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 9
  store double %89, ptr %90, align 8, !tbaa !36
  %91 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::MemoryType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 54), i32 0, i32 2), align 8, !tbaa !42
  %92 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 6
  %93 = getelementptr inbounds %class.Area, ptr %92, i32 0, i32 0
  %94 = load double, ptr %93, align 8, !tbaa !9
  %95 = call noundef double @_Z8drain_C_diiidbbb(double noundef %91, i32 noundef 1, i32 noundef 1, i32 noundef 0, double noundef %94, i1 noundef zeroext false, i1 noundef zeroext true, i1 noundef zeroext false)
  %96 = fdiv double %95, 2.000000e+00
  store double %96, ptr %6, align 8, !tbaa !25
  %97 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 2
  %98 = load i32, ptr %97, align 8, !tbaa !38
  %99 = uitofp i32 %98 to double
  %100 = load double, ptr %6, align 8, !tbaa !25
  %101 = load double, ptr %5, align 8, !tbaa !25
  %102 = fadd double %100, %101
  %103 = fmul double %99, %102
  %104 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 15
  store double %103, ptr %104, align 8, !tbaa !39
  br label %233

105:                                              ; preds = %71, %67
  %106 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 7
  %107 = getelementptr inbounds %class.Area, ptr %106, i32 0, i32 0
  %108 = load double, ptr %107, align 8, !tbaa !44
  %109 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::InterconnectType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 50), i32 0, i32 2), align 8, !tbaa !18
  %110 = fmul double %108, %109
  store double %110, ptr %3, align 8, !tbaa !25
  %111 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 7
  %112 = getelementptr inbounds %class.Area, ptr %111, i32 0, i32 0
  %113 = load double, ptr %112, align 8, !tbaa !44
  %114 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::InterconnectType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 50), i32 0, i32 1), align 8, !tbaa !26
  %115 = fmul double %113, %114
  store double %115, ptr %4, align 8, !tbaa !25
  %116 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::MemoryType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 56), i32 0, i32 2), align 8, !tbaa !45
  %117 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 56), align 8, !tbaa !46
  %118 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::MemoryType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 56), i32 0, i32 2), align 8, !tbaa !45
  %119 = call double @llvm.fmuladd.f64(double -2.000000e+00, double %118, double %117)
  %120 = fdiv double %119, 2.000000e+00
  %121 = call noundef double @_Z11gate_C_passddbbb(double noundef %116, double noundef %120, i1 noundef zeroext false, i1 noundef zeroext true, i1 noundef zeroext false)
  %122 = load double, ptr %3, align 8, !tbaa !25
  %123 = call double @llvm.fmuladd.f64(double %121, double 2.000000e+00, double %122)
  %124 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 4
  %125 = load i32, ptr %124, align 8, !tbaa !47
  %126 = sitofp i32 %125 to double
  %127 = fmul double %123, %126
  %128 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 10
  store double %127, ptr %128, align 8, !tbaa !48
  %129 = load double, ptr %4, align 8, !tbaa !25
  %130 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 4
  %131 = load i32, ptr %130, align 8, !tbaa !47
  %132 = sitofp i32 %131 to double
  %133 = fmul double %129, %132
  %134 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 13
  store double %133, ptr %134, align 8, !tbaa !49
  %135 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 1
  %136 = load ptr, ptr %135, align 8, !tbaa !28
  %137 = getelementptr inbounds %class.DynamicParameter, ptr %136, i32 0, i32 2
  %138 = load i8, ptr %137, align 2, !tbaa !41, !range !31, !noundef !32
  %139 = trunc i8 %138 to i1
  br i1 %139, label %170, label %140

140:                                              ; preds = %105
  %141 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 6
  %142 = getelementptr inbounds %class.Area, ptr %141, i32 0, i32 0
  %143 = load double, ptr %142, align 8, !tbaa !9
  %144 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::InterconnectType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 50), i32 0, i32 2), align 8, !tbaa !18
  %145 = fmul double %143, %144
  store double %145, ptr %3, align 8, !tbaa !25
  %146 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 6
  %147 = getelementptr inbounds %class.Area, ptr %146, i32 0, i32 0
  %148 = load double, ptr %147, align 8, !tbaa !9
  %149 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::InterconnectType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 50), i32 0, i32 1), align 8, !tbaa !26
  %150 = fmul double %148, %149
  store double %150, ptr %4, align 8, !tbaa !25
  %151 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::MemoryType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 54), i32 0, i32 2), align 8, !tbaa !42
  %152 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 54), align 8, !tbaa !43
  %153 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::MemoryType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 54), i32 0, i32 2), align 8, !tbaa !42
  %154 = call double @llvm.fmuladd.f64(double -2.000000e+00, double %153, double %152)
  %155 = fdiv double %154, 2.000000e+00
  %156 = call noundef double @_Z11gate_C_passddbbb(double noundef %151, double noundef %155, i1 noundef zeroext false, i1 noundef zeroext true, i1 noundef zeroext false)
  %157 = load double, ptr %3, align 8, !tbaa !25
  %158 = call double @llvm.fmuladd.f64(double %156, double 2.000000e+00, double %157)
  %159 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 5
  %160 = load i32, ptr %159, align 4, !tbaa !50
  %161 = sitofp i32 %160 to double
  %162 = fmul double %158, %161
  %163 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 11
  store double %162, ptr %163, align 8, !tbaa !51
  %164 = load double, ptr %4, align 8, !tbaa !25
  %165 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 5
  %166 = load i32, ptr %165, align 4, !tbaa !50
  %167 = sitofp i32 %166 to double
  %168 = fmul double %164, %167
  %169 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 14
  store double %168, ptr %169, align 8, !tbaa !52
  br label %173

170:                                              ; preds = %105
  %171 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 14
  store double 0.000000e+00, ptr %171, align 8, !tbaa !52
  %172 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 11
  store double 0.000000e+00, ptr %172, align 8, !tbaa !51
  br label %173

173:                                              ; preds = %170, %140
  %174 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 10
  %175 = load double, ptr %174, align 8, !tbaa !48
  %176 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 11
  %177 = load double, ptr %176, align 8, !tbaa !51
  %178 = fadd double %175, %177
  %179 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 9
  store double %178, ptr %179, align 8, !tbaa !36
  %180 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 50), align 8, !tbaa !53
  %181 = fmul double 1.440000e+02, %180
  %182 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::InterconnectType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 50), i32 0, i32 2), align 8, !tbaa !18
  %183 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 9
  %184 = load double, ptr %183, align 8, !tbaa !36
  %185 = call double @llvm.fmuladd.f64(double %181, double %182, double %184)
  store double %185, ptr %183, align 8, !tbaa !36
  %186 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 13
  %187 = load double, ptr %186, align 8, !tbaa !49
  %188 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 14
  %189 = load double, ptr %188, align 8, !tbaa !52
  %190 = fadd double %187, %189
  %191 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 12
  store double %190, ptr %191, align 8, !tbaa !54
  %192 = load double, ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 50), align 8, !tbaa !53
  %193 = fmul double 1.440000e+02, %192
  %194 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::InterconnectType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 50), i32 0, i32 1), align 8, !tbaa !26
  %195 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 12
  %196 = load double, ptr %195, align 8, !tbaa !54
  %197 = call double @llvm.fmuladd.f64(double %193, double %194, double %196)
  store double %197, ptr %195, align 8, !tbaa !54
  %198 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 7
  %199 = getelementptr inbounds %class.Area, ptr %198, i32 0, i32 1
  %200 = load double, ptr %199, align 8, !tbaa !55
  %201 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::InterconnectType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 50), i32 0, i32 2), align 8, !tbaa !18
  %202 = fmul double %200, %201
  store double %202, ptr %5, align 8, !tbaa !25
  %203 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::MemoryType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 56), i32 0, i32 2), align 8, !tbaa !45
  %204 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 7
  %205 = getelementptr inbounds %class.Area, ptr %204, i32 0, i32 0
  %206 = load double, ptr %205, align 8, !tbaa !44
  %207 = call noundef double @_Z8drain_C_diiidbbb(double noundef %203, i32 noundef 1, i32 noundef 1, i32 noundef 0, double noundef %206, i1 noundef zeroext false, i1 noundef zeroext true, i1 noundef zeroext false)
  %208 = fdiv double %207, 2.000000e+00
  store double %208, ptr %6, align 8, !tbaa !25
  %209 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 2
  %210 = load i32, ptr %209, align 8, !tbaa !38
  %211 = add i32 %210, 1
  %212 = uitofp i32 %211 to double
  %213 = load double, ptr %6, align 8, !tbaa !25
  %214 = load double, ptr %5, align 8, !tbaa !25
  %215 = fadd double %213, %214
  %216 = fmul double %212, %215
  %217 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 16
  store double %216, ptr %217, align 8, !tbaa !56
  %218 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::MemoryType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 54), i32 0, i32 2), align 8, !tbaa !42
  %219 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 6
  %220 = getelementptr inbounds %class.Area, ptr %219, i32 0, i32 0
  %221 = load double, ptr %220, align 8, !tbaa !9
  %222 = call noundef double @_Z8drain_C_diiidbbb(double noundef %218, i32 noundef 1, i32 noundef 1, i32 noundef 0, double noundef %221, i1 noundef zeroext false, i1 noundef zeroext true, i1 noundef zeroext false)
  %223 = fdiv double %222, 2.000000e+00
  store double %223, ptr %6, align 8, !tbaa !25
  %224 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 2
  %225 = load i32, ptr %224, align 8, !tbaa !38
  %226 = add i32 %225, 1
  %227 = uitofp i32 %226 to double
  %228 = load double, ptr %6, align 8, !tbaa !25
  %229 = load double, ptr %5, align 8, !tbaa !25
  %230 = fadd double %228, %229
  %231 = fmul double %227, %230
  %232 = getelementptr inbounds %class.Subarray, ptr %7, i32 0, i32 15
  store double %231, ptr %232, align 8, !tbaa !39
  br label %233

233:                                              ; preds = %173, %77
  br label %234

234:                                              ; preds = %233, %66
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #4
  ret void
}

declare noundef double @_Z11gate_C_passddbbb(double noundef, double noundef, i1 noundef zeroext, i1 noundef zeroext, i1 noundef zeroext) #3

declare noundef double @_Z8drain_C_diiidbbb(double noundef, i32 noundef, i32 noundef, i32 noundef, double noundef, i1 noundef zeroext, i1 noundef zeroext, i1 noundef zeroext) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !13, i64 304}
!10 = !{!"_ZTS8Subarray", !11, i64 0, !6, i64 280, !16, i64 288, !16, i64 292, !16, i64 296, !16, i64 300, !12, i64 304, !12, i64 328, !17, i64 352, !13, i64 360, !13, i64 368, !13, i64 376, !13, i64 384, !13, i64 392, !13, i64 400, !13, i64 408, !13, i64 416}
!11 = !{!"_ZTS9Component", !12, i64 0, !14, i64 24, !14, i64 144, !13, i64 264, !13, i64 272}
!12 = !{!"_ZTS4Area", !13, i64 0, !13, i64 8, !13, i64 16}
!13 = !{!"double", !7, i64 0}
!14 = !{!"_ZTS8powerDef", !15, i64 0, !15, i64 40, !15, i64 80}
!15 = !{!"_ZTS15powerComponents", !13, i64 0, !13, i64 8, !13, i64 16, !13, i64 24, !13, i64 32}
!16 = !{!"int", !7, i64 0}
!17 = !{!"bool", !7, i64 0}
!18 = !{!19, !13, i64 1216}
!19 = !{!"_ZTS19TechnologyParameter", !13, i64 0, !13, i64 8, !13, i64 16, !13, i64 24, !13, i64 32, !13, i64 40, !13, i64 48, !13, i64 56, !13, i64 64, !13, i64 72, !13, i64 80, !13, i64 88, !13, i64 96, !13, i64 104, !13, i64 112, !13, i64 120, !13, i64 128, !13, i64 136, !13, i64 144, !13, i64 152, !13, i64 160, !13, i64 168, !13, i64 176, !13, i64 184, !13, i64 192, !13, i64 200, !13, i64 208, !13, i64 216, !13, i64 224, !13, i64 232, !13, i64 240, !13, i64 248, !13, i64 256, !13, i64 264, !13, i64 272, !13, i64 280, !13, i64 288, !13, i64 296, !13, i64 304, !13, i64 312, !13, i64 320, !13, i64 328, !13, i64 336, !13, i64 344, !20, i64 352, !21, i64 360, !21, i64 528, !21, i64 696, !21, i64 864, !21, i64 1032, !22, i64 1200, !22, i64 1264, !22, i64 1328, !23, i64 1392, !24, i64 1416, !24, i64 1464, !24, i64 1512}
!20 = !{!"long", !7, i64 0}
!21 = !{!"_ZTSN19TechnologyParameter10DeviceTypeE", !13, i64 0, !13, i64 8, !13, i64 16, !13, i64 24, !13, i64 32, !13, i64 40, !13, i64 48, !13, i64 56, !13, i64 64, !13, i64 72, !13, i64 80, !13, i64 88, !13, i64 96, !13, i64 104, !13, i64 112, !13, i64 120, !13, i64 128, !13, i64 136, !13, i64 144, !13, i64 152, !13, i64 160}
!22 = !{!"_ZTSN19TechnologyParameter16InterconnectTypeE", !13, i64 0, !13, i64 8, !13, i64 16, !13, i64 24, !13, i64 32, !13, i64 40, !13, i64 48, !13, i64 56}
!23 = !{!"_ZTSN19TechnologyParameter13ScalingFactorE", !13, i64 0, !13, i64 8, !13, i64 16}
!24 = !{!"_ZTSN19TechnologyParameter10MemoryTypeE", !13, i64 0, !13, i64 8, !13, i64 16, !13, i64 24, !13, i64 32, !13, i64 40}
!25 = !{!13, !13, i64 0}
!26 = !{!19, !13, i64 1208}
!27 = !{!10, !13, i64 312}
!28 = !{!10, !6, i64 280}
!29 = !{!30, !17, i64 120}
!30 = !{!"_ZTS16DynamicParameter", !17, i64 0, !17, i64 1, !17, i64 2, !17, i64 3, !16, i64 4, !16, i64 8, !16, i64 12, !13, i64 16, !16, i64 24, !16, i64 28, !16, i64 32, !16, i64 36, !16, i64 40, !16, i64 44, !16, i64 48, !16, i64 52, !16, i64 56, !16, i64 60, !16, i64 64, !16, i64 68, !16, i64 72, !16, i64 76, !16, i64 80, !16, i64 84, !16, i64 88, !16, i64 92, !16, i64 96, !16, i64 100, !16, i64 104, !16, i64 108, !16, i64 112, !16, i64 116, !17, i64 120, !13, i64 128, !16, i64 136, !16, i64 140, !16, i64 144, !16, i64 148, !16, i64 152, !16, i64 156, !16, i64 160, !16, i64 164, !16, i64 168, !13, i64 176, !16, i64 184, !16, i64 188, !16, i64 192, !16, i64 196, !16, i64 200, !16, i64 204, !16, i64 208, !17, i64 212, !12, i64 216, !12, i64 240, !17, i64 264}
!31 = !{i8 0, i8 2}
!32 = !{}
!33 = !{!19, !13, i64 1480}
!34 = !{!19, !13, i64 1464}
!35 = !{!10, !16, i64 292}
!36 = !{!10, !13, i64 360}
!37 = !{!30, !16, i64 168}
!38 = !{!10, !16, i64 288}
!39 = !{!10, !13, i64 408}
!40 = !{!10, !17, i64 352}
!41 = !{!30, !17, i64 2}
!42 = !{!19, !13, i64 1432}
!43 = !{!19, !13, i64 1416}
!44 = !{!10, !13, i64 328}
!45 = !{!19, !13, i64 1528}
!46 = !{!19, !13, i64 1512}
!47 = !{!10, !16, i64 296}
!48 = !{!10, !13, i64 368}
!49 = !{!10, !13, i64 392}
!50 = !{!10, !16, i64 300}
!51 = !{!10, !13, i64 376}
!52 = !{!10, !13, i64 400}
!53 = !{!19, !13, i64 1200}
!54 = !{!10, !13, i64 384}
!55 = !{!10, !13, i64 336}
!56 = !{!10, !13, i64 416}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.TechnologyParameter = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, i64, %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::ScalingFactor", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType" }
%"class.TechnologyParameter::DeviceType" = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::InterconnectType" = type { double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::ScalingFactor" = type { double, double, double }
%"class.TechnologyParameter::MemoryType" = type { double, double, double, double, double, double }

@g_tp = external local_unnamed_addr global %class.TechnologyParameter, align 8

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN8Subarray9compute_CEv(ptr nocapture noundef nonnull align 8 dereferenceable(424) %0) local_unnamed_addr #1 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 304
  %3 = load double, ptr %2, align 8, !tbaa !5
  %4 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 1216), align 8, !tbaa !17
  %5 = fmul double %3, %4
  %6 = getelementptr inbounds i8, ptr %0, i64 312
  %7 = load double, ptr %6, align 8, !tbaa !24
  %8 = fmul double %4, %7
  %9 = getelementptr inbounds i8, ptr %0, i64 280
  %10 = load ptr, ptr %9, align 8, !tbaa !25
  %11 = getelementptr inbounds i8, ptr %10, i64 120
  %12 = load i8, ptr %11, align 8, !tbaa !26, !range !28, !noundef !29
  %13 = trunc nuw i8 %12 to i1
  br i1 %13, label %14, label %43

14:                                               ; preds = %1
  %15 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 1480), align 8, !tbaa !30
  %16 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 1464), align 8, !tbaa !31
  %17 = tail call noundef double @_Z11gate_C_passddbbb(double noundef %15, double noundef %16, i1 noundef zeroext true, i1 noundef zeroext true, i1 noundef zeroext false)
  %18 = fadd double %5, %17
  %19 = getelementptr inbounds i8, ptr %0, i64 292
  %20 = load i32, ptr %19, align 4, !tbaa !32
  %21 = uitofp i32 %20 to double
  %22 = fmul double %18, %21
  %23 = getelementptr inbounds i8, ptr %0, i64 360
  store double %22, ptr %23, align 8, !tbaa !33
  %24 = load ptr, ptr %9, align 8, !tbaa !25
  %25 = getelementptr inbounds i8, ptr %24, i64 168
  %26 = load i32, ptr %25, align 8, !tbaa !34
  %27 = icmp eq i32 %26, 4
  br i1 %27, label %28, label %33

28:                                               ; preds = %14
  %29 = getelementptr inbounds i8, ptr %0, i64 288
  %30 = load i32, ptr %29, align 8, !tbaa !35
  %31 = uitofp i32 %30 to double
  %32 = fmul double %8, %31
  br label %150

33:                                               ; preds = %14
  %34 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 1480), align 8, !tbaa !30
  %35 = load double, ptr %2, align 8, !tbaa !5
  %36 = tail call noundef double @_Z8drain_C_diiidbbb(double noundef %34, i32 noundef 1, i32 noundef 1, i32 noundef 0, double noundef %35, i1 noundef zeroext true, i1 noundef zeroext true, i1 noundef zeroext false)
  %37 = fmul double %36, 5.000000e-01
  %38 = getelementptr inbounds i8, ptr %0, i64 288
  %39 = load i32, ptr %38, align 8, !tbaa !35
  %40 = uitofp i32 %39 to double
  %41 = fadd double %8, %37
  %42 = fmul double %41, %40
  br label %150

43:                                               ; preds = %1
  %44 = getelementptr inbounds i8, ptr %0, i64 352
  %45 = load i8, ptr %44, align 8, !tbaa !36, !range !28, !noundef !29
  %46 = trunc nuw i8 %45 to i1
  br i1 %46, label %72, label %47

47:                                               ; preds = %43
  %48 = getelementptr inbounds i8, ptr %10, i64 2
  %49 = load i8, ptr %48, align 2, !tbaa !37, !range !28, !noundef !29
  %50 = trunc nuw i8 %49 to i1
  br i1 %50, label %72, label %51

51:                                               ; preds = %47
  %52 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 1432), align 8, !tbaa !38
  %53 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 1416), align 8, !tbaa !39
  %54 = tail call double @llvm.fmuladd.f64(double %52, double -2.000000e+00, double %53)
  %55 = fmul double %54, 5.000000e-01
  %56 = tail call noundef double @_Z11gate_C_passddbbb(double noundef %52, double noundef %55, i1 noundef zeroext false, i1 noundef zeroext true, i1 noundef zeroext false)
  %57 = tail call double @llvm.fmuladd.f64(double %56, double 2.000000e+00, double %5)
  %58 = getelementptr inbounds i8, ptr %0, i64 292
  %59 = load i32, ptr %58, align 4, !tbaa !32
  %60 = uitofp i32 %59 to double
  %61 = fmul double %57, %60
  %62 = getelementptr inbounds i8, ptr %0, i64 360
  store double %61, ptr %62, align 8, !tbaa !33
  %63 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 1432), align 8, !tbaa !38
  %64 = load double, ptr %2, align 8, !tbaa !5
  %65 = tail call noundef double @_Z8drain_C_diiidbbb(double noundef %63, i32 noundef 1, i32 noundef 1, i32 noundef 0, double noundef %64, i1 noundef zeroext false, i1 noundef zeroext true, i1 noundef zeroext false)
  %66 = fmul double %65, 5.000000e-01
  %67 = getelementptr inbounds i8, ptr %0, i64 288
  %68 = load i32, ptr %67, align 8, !tbaa !35
  %69 = uitofp i32 %68 to double
  %70 = fadd double %8, %66
  %71 = fmul double %70, %69
  br label %150

72:                                               ; preds = %47, %43
  %73 = getelementptr inbounds i8, ptr %0, i64 328
  %74 = load double, ptr %73, align 8, !tbaa !40
  %75 = fmul double %4, %74
  %76 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 1208), align 8, !tbaa !41
  %77 = fmul double %74, %76
  %78 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 1528), align 8, !tbaa !42
  %79 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 1512), align 8, !tbaa !43
  %80 = tail call double @llvm.fmuladd.f64(double %78, double -2.000000e+00, double %79)
  %81 = fmul double %80, 5.000000e-01
  %82 = tail call noundef double @_Z11gate_C_passddbbb(double noundef %78, double noundef %81, i1 noundef zeroext false, i1 noundef zeroext true, i1 noundef zeroext false)
  %83 = tail call double @llvm.fmuladd.f64(double %82, double 2.000000e+00, double %75)
  %84 = getelementptr inbounds i8, ptr %0, i64 296
  %85 = load i32, ptr %84, align 8, !tbaa !44
  %86 = sitofp i32 %85 to double
  %87 = fmul double %83, %86
  %88 = getelementptr inbounds i8, ptr %0, i64 368
  store double %87, ptr %88, align 8, !tbaa !45
  %89 = fmul double %77, %86
  %90 = getelementptr inbounds i8, ptr %0, i64 392
  store double %89, ptr %90, align 8, !tbaa !46
  %91 = load ptr, ptr %9, align 8, !tbaa !25
  %92 = getelementptr inbounds i8, ptr %91, i64 2
  %93 = load i8, ptr %92, align 2, !tbaa !37, !range !28, !noundef !29
  %94 = trunc nuw i8 %93 to i1
  br i1 %94, label %112, label %95

95:                                               ; preds = %72
  %96 = load double, ptr %2, align 8, !tbaa !5
  %97 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 1216), align 8, !tbaa !17
  %98 = fmul double %96, %97
  %99 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 1208), align 8, !tbaa !41
  %100 = fmul double %96, %99
  %101 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 1432), align 8, !tbaa !38
  %102 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 1416), align 8, !tbaa !39
  %103 = tail call double @llvm.fmuladd.f64(double %101, double -2.000000e+00, double %102)
  %104 = fmul double %103, 5.000000e-01
  %105 = tail call noundef double @_Z11gate_C_passddbbb(double noundef %101, double noundef %104, i1 noundef zeroext false, i1 noundef zeroext true, i1 noundef zeroext false)
  %106 = tail call double @llvm.fmuladd.f64(double %105, double 2.000000e+00, double %98)
  %107 = getelementptr inbounds i8, ptr %0, i64 300
  %108 = load i32, ptr %107, align 4, !tbaa !47
  %109 = sitofp i32 %108 to double
  %110 = fmul double %106, %109
  %111 = fmul double %100, %109
  %.pre = load double, ptr %88, align 8, !tbaa !45
  %.pre17 = load double, ptr %90, align 8, !tbaa !46
  br label %112

112:                                              ; preds = %72, %95
  %113 = phi double [ %.pre17, %95 ], [ %89, %72 ]
  %114 = phi double [ %.pre, %95 ], [ %87, %72 ]
  %.sink16 = phi double [ %111, %95 ], [ 0.000000e+00, %72 ]
  %.sink = phi double [ %110, %95 ], [ 0.000000e+00, %72 ]
  %115 = getelementptr inbounds i8, ptr %0, i64 400
  store double %.sink16, ptr %115, align 8
  %116 = getelementptr inbounds i8, ptr %0, i64 376
  store double %.sink, ptr %116, align 8
  %117 = fadd double %114, %.sink
  %118 = getelementptr inbounds i8, ptr %0, i64 360
  %119 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 1200), align 8, !tbaa !48
  %120 = fmul double %119, 1.440000e+02
  %121 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 1216), align 8, !tbaa !17
  %122 = tail call double @llvm.fmuladd.f64(double %120, double %121, double %117)
  store double %122, ptr %118, align 8, !tbaa !33
  %123 = fadd double %113, %.sink16
  %124 = getelementptr inbounds i8, ptr %0, i64 384
  %125 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 1208), align 8, !tbaa !41
  %126 = tail call double @llvm.fmuladd.f64(double %120, double %125, double %123)
  store double %126, ptr %124, align 8, !tbaa !49
  %127 = getelementptr inbounds i8, ptr %0, i64 336
  %128 = load double, ptr %127, align 8, !tbaa !50
  %129 = fmul double %121, %128
  %130 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 1528), align 8, !tbaa !42
  %131 = load double, ptr %73, align 8, !tbaa !40
  %132 = tail call noundef double @_Z8drain_C_diiidbbb(double noundef %130, i32 noundef 1, i32 noundef 1, i32 noundef 0, double noundef %131, i1 noundef zeroext false, i1 noundef zeroext true, i1 noundef zeroext false)
  %133 = fmul double %132, 5.000000e-01
  %134 = getelementptr inbounds i8, ptr %0, i64 288
  %135 = load i32, ptr %134, align 8, !tbaa !35
  %136 = add i32 %135, 1
  %137 = uitofp i32 %136 to double
  %138 = fadd double %129, %133
  %139 = fmul double %138, %137
  %140 = getelementptr inbounds i8, ptr %0, i64 416
  store double %139, ptr %140, align 8, !tbaa !51
  %141 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 1432), align 8, !tbaa !38
  %142 = load double, ptr %2, align 8, !tbaa !5
  %143 = tail call noundef double @_Z8drain_C_diiidbbb(double noundef %141, i32 noundef 1, i32 noundef 1, i32 noundef 0, double noundef %142, i1 noundef zeroext false, i1 noundef zeroext true, i1 noundef zeroext false)
  %144 = fmul double %143, 5.000000e-01
  %145 = load i32, ptr %134, align 8, !tbaa !35
  %146 = add i32 %145, 1
  %147 = uitofp i32 %146 to double
  %148 = fadd double %129, %144
  %149 = fmul double %148, %147
  br label %150

150:                                              ; preds = %51, %112, %28, %33
  %.sink18 = phi double [ %71, %51 ], [ %149, %112 ], [ %32, %28 ], [ %42, %33 ]
  %151 = getelementptr inbounds i8, ptr %0, i64 408
  store double %.sink18, ptr %151, align 8, !tbaa !52
  ret void
}

declare noundef double @_Z11gate_C_passddbbb(double noundef, double noundef, i1 noundef zeroext, i1 noundef zeroext, i1 noundef zeroext) local_unnamed_addr #2

declare noundef double @_Z8drain_C_diiidbbb(double noundef, i32 noundef, i32 noundef, i32 noundef, double noundef, i1 noundef zeroext, i1 noundef zeroext, i1 noundef zeroext) local_unnamed_addr #2

attributes #0 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !9, i64 304}
!6 = !{!"_ZTS8Subarray", !7, i64 0, !14, i64 280, !15, i64 288, !15, i64 292, !15, i64 296, !15, i64 300, !8, i64 304, !8, i64 328, !16, i64 352, !9, i64 360, !9, i64 368, !9, i64 376, !9, i64 384, !9, i64 392, !9, i64 400, !9, i64 408, !9, i64 416}
!7 = !{!"_ZTS9Component", !8, i64 0, !12, i64 24, !12, i64 144, !9, i64 264, !9, i64 272}
!8 = !{!"_ZTS4Area", !9, i64 0, !9, i64 8, !9, i64 16}
!9 = !{!"double", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C++ TBAA"}
!12 = !{!"_ZTS8powerDef", !13, i64 0, !13, i64 40, !13, i64 80}
!13 = !{!"_ZTS15powerComponents", !9, i64 0, !9, i64 8, !9, i64 16, !9, i64 24, !9, i64 32}
!14 = !{!"any pointer", !10, i64 0}
!15 = !{!"int", !10, i64 0}
!16 = !{!"bool", !10, i64 0}
!17 = !{!18, !9, i64 1216}
!18 = !{!"_ZTS19TechnologyParameter", !9, i64 0, !9, i64 8, !9, i64 16, !9, i64 24, !9, i64 32, !9, i64 40, !9, i64 48, !9, i64 56, !9, i64 64, !9, i64 72, !9, i64 80, !9, i64 88, !9, i64 96, !9, i64 104, !9, i64 112, !9, i64 120, !9, i64 128, !9, i64 136, !9, i64 144, !9, i64 152, !9, i64 160, !9, i64 168, !9, i64 176, !9, i64 184, !9, i64 192, !9, i64 200, !9, i64 208, !9, i64 216, !9, i64 224, !9, i64 232, !9, i64 240, !9, i64 248, !9, i64 256, !9, i64 264, !9, i64 272, !9, i64 280, !9, i64 288, !9, i64 296, !9, i64 304, !9, i64 312, !9, i64 320, !9, i64 328, !9, i64 336, !9, i64 344, !19, i64 352, !20, i64 360, !20, i64 528, !20, i64 696, !20, i64 864, !20, i64 1032, !21, i64 1200, !21, i64 1264, !21, i64 1328, !22, i64 1392, !23, i64 1416, !23, i64 1464, !23, i64 1512}
!19 = !{!"long", !10, i64 0}
!20 = !{!"_ZTSN19TechnologyParameter10DeviceTypeE", !9, i64 0, !9, i64 8, !9, i64 16, !9, i64 24, !9, i64 32, !9, i64 40, !9, i64 48, !9, i64 56, !9, i64 64, !9, i64 72, !9, i64 80, !9, i64 88, !9, i64 96, !9, i64 104, !9, i64 112, !9, i64 120, !9, i64 128, !9, i64 136, !9, i64 144, !9, i64 152, !9, i64 160}
!21 = !{!"_ZTSN19TechnologyParameter16InterconnectTypeE", !9, i64 0, !9, i64 8, !9, i64 16, !9, i64 24, !9, i64 32, !9, i64 40, !9, i64 48, !9, i64 56}
!22 = !{!"_ZTSN19TechnologyParameter13ScalingFactorE", !9, i64 0, !9, i64 8, !9, i64 16}
!23 = !{!"_ZTSN19TechnologyParameter10MemoryTypeE", !9, i64 0, !9, i64 8, !9, i64 16, !9, i64 24, !9, i64 32, !9, i64 40}
!24 = !{!6, !9, i64 312}
!25 = !{!6, !14, i64 280}
!26 = !{!27, !16, i64 120}
!27 = !{!"_ZTS16DynamicParameter", !16, i64 0, !16, i64 1, !16, i64 2, !16, i64 3, !15, i64 4, !15, i64 8, !15, i64 12, !9, i64 16, !15, i64 24, !15, i64 28, !15, i64 32, !15, i64 36, !15, i64 40, !15, i64 44, !15, i64 48, !15, i64 52, !15, i64 56, !15, i64 60, !15, i64 64, !15, i64 68, !15, i64 72, !15, i64 76, !15, i64 80, !15, i64 84, !15, i64 88, !15, i64 92, !15, i64 96, !15, i64 100, !15, i64 104, !15, i64 108, !15, i64 112, !15, i64 116, !16, i64 120, !9, i64 128, !15, i64 136, !15, i64 140, !15, i64 144, !15, i64 148, !15, i64 152, !15, i64 156, !15, i64 160, !15, i64 164, !15, i64 168, !9, i64 176, !15, i64 184, !15, i64 188, !15, i64 192, !15, i64 196, !15, i64 200, !15, i64 204, !15, i64 208, !16, i64 212, !8, i64 216, !8, i64 240, !16, i64 264}
!28 = !{i8 0, i8 2}
!29 = !{}
!30 = !{!18, !9, i64 1480}
!31 = !{!18, !9, i64 1464}
!32 = !{!6, !15, i64 292}
!33 = !{!6, !9, i64 360}
!34 = !{!27, !15, i64 168}
!35 = !{!6, !15, i64 288}
!36 = !{!6, !16, i64 352}
!37 = !{!27, !16, i64 2}
!38 = !{!18, !9, i64 1432}
!39 = !{!18, !9, i64 1416}
!40 = !{!6, !9, i64 328}
!41 = !{!18, !9, i64 1208}
!42 = !{!18, !9, i64 1528}
!43 = !{!18, !9, i64 1512}
!44 = !{!6, !15, i64 296}
!45 = !{!6, !9, i64 368}
!46 = !{!6, !9, i64 392}
!47 = !{!6, !15, i64 300}
!48 = !{!18, !9, i64 1200}
!49 = !{!6, !9, i64 384}
!50 = !{!6, !9, i64 336}
!51 = !{!6, !9, i64 416}
!52 = !{!6, !9, i64 408}


; Effective O3 passes: DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,MergedLoadStoreMotionPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass