; LLVM IR from gem5/gem5 :: src/systemc/tests/systemc/misc/stars/star111657 (star111657)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::sc_uint" = type { %"class.sc_dt::sc_uint_base" }
%"class.sc_dt::sc_uint_base" = type { %"class.sc_dt::sc_value_base", i64, i32, i32 }
%"class.sc_dt::sc_value_base" = type { ptr }
%struct.io_controller_m = type { %"class.sc_core::sc_module", %"class.sc_core::sc_in", %"class.sc_core::sc_out", %"class.sc_core::sc_out", %"class.sc_core::sc_inout.20", %"class.sc_core::sc_out.28", %"class.sc_core::sc_out.28", %"class.sc_core::sc_out.29", %"class.sc_core::sc_out.29", %"class.sc_core::sc_out.29", %"class.sc_core::sc_out.29", %"class.sc_core::sc_in", %"class.sc_core::sc_in", %"class.sc_core::sc_in", %"class.sc_core::sc_out.38", %"class.sc_core::sc_out.29", %"class.sc_core::sc_in.47", %"class.sc_core::sc_in", %"class.sc_core::sc_in", %"class.sc_core::sc_in", %"class.sc_core::sc_signal", %"class.sc_core::sc_signal", %"class.sc_core::sc_signal", %"class.sc_core::sc_signal", %"class.sc_dt::sc_uint", %"class.sc_dt::sc_uint", %"class.sc_core::sc_signal", %"class.sc_core::sc_signal", [400 x %"class.sc_dt::sc_uint"], [400 x %"class.sc_dt::sc_uint"] }
%"class.sc_core::sc_module" = type { %"class.sc_core::sc_object", %"class.sc_core::sc_process_host", %"class.sc_core::sc_sensitive", %"class.sc_core::sc_sensitive_pos", %"class.sc_core::sc_sensitive_neg", i8, ptr, i32, ptr, ptr }
%"class.sc_core::sc_object" = type { ptr, ptr, %"class.std::vector", %"class.std::vector.0", %"class.std::__cxx11::basic_string", ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.sc_core::sc_process_host" = type { ptr }
%"class.sc_core::sc_sensitive" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_pos" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_neg" = type { ptr, i32, ptr }
%"class.sc_core::sc_out" = type { %"class.sc_core::sc_inout" }
%"class.sc_core::sc_inout" = type { %"class.sc_core::sc_port.13", ptr, ptr, ptr }
%"class.sc_core::sc_port.13" = type { %"class.sc_core::sc_port_b.14" }
%"class.sc_core::sc_port_b.14" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.15" }
%"class.sc_core::sc_port_base" = type { %"class.sc_core::sc_object", ptr }
%"class.std::vector.15" = type { %"struct.std::_Vector_base.16" }
%"struct.std::_Vector_base.16" = type { %"struct.std::_Vector_base<sc_core::sc_signal_inout_if<sc_dt::sc_uint<30>> *, std::allocator<sc_core::sc_signal_inout_if<sc_dt::sc_uint<30>> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_inout_if<sc_dt::sc_uint<30>> *, std::allocator<sc_core::sc_signal_inout_if<sc_dt::sc_uint<30>> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_inout_if<sc_dt::sc_uint<30>> *, std::allocator<sc_core::sc_signal_inout_if<sc_dt::sc_uint<30>> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_inout_if<sc_dt::sc_uint<30>> *, std::allocator<sc_core::sc_signal_inout_if<sc_dt::sc_uint<30>> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_inout.20" = type { %"class.sc_core::sc_port.21", ptr, ptr, ptr }
%"class.sc_core::sc_port.21" = type { %"class.sc_core::sc_port_b.22" }
%"class.sc_core::sc_port_b.22" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.23" }
%"class.std::vector.23" = type { %"struct.std::_Vector_base.24" }
%"struct.std::_Vector_base.24" = type { %"struct.std::_Vector_base<sc_core::sc_signal_inout_if<sc_dt::sc_uint<32>> *, std::allocator<sc_core::sc_signal_inout_if<sc_dt::sc_uint<32>> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_inout_if<sc_dt::sc_uint<32>> *, std::allocator<sc_core::sc_signal_inout_if<sc_dt::sc_uint<32>> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_inout_if<sc_dt::sc_uint<32>> *, std::allocator<sc_core::sc_signal_inout_if<sc_dt::sc_uint<32>> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_inout_if<sc_dt::sc_uint<32>> *, std::allocator<sc_core::sc_signal_inout_if<sc_dt::sc_uint<32>> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_out.28" = type { %"class.sc_core::sc_inout.20" }
%"class.sc_core::sc_out.38" = type { %"class.sc_core::sc_inout.39" }
%"class.sc_core::sc_inout.39" = type { %"class.sc_core::sc_port.40", ptr, ptr, ptr }
%"class.sc_core::sc_port.40" = type { %"class.sc_core::sc_port_b.41" }
%"class.sc_core::sc_port_b.41" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.42" }
%"class.std::vector.42" = type { %"struct.std::_Vector_base.43" }
%"struct.std::_Vector_base.43" = type { %"struct.std::_Vector_base<sc_core::sc_signal_inout_if<sc_dt::sc_uint<4>> *, std::allocator<sc_core::sc_signal_inout_if<sc_dt::sc_uint<4>> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_inout_if<sc_dt::sc_uint<4>> *, std::allocator<sc_core::sc_signal_inout_if<sc_dt::sc_uint<4>> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_inout_if<sc_dt::sc_uint<4>> *, std::allocator<sc_core::sc_signal_inout_if<sc_dt::sc_uint<4>> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_inout_if<sc_dt::sc_uint<4>> *, std::allocator<sc_core::sc_signal_inout_if<sc_dt::sc_uint<4>> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_out.29" = type { %"class.sc_core::sc_inout.30" }
%"class.sc_core::sc_inout.30" = type { %"class.sc_core::sc_port.31", ptr, ptr, ptr, ptr, ptr }
%"class.sc_core::sc_port.31" = type { %"class.sc_core::sc_port_b.32" }
%"class.sc_core::sc_port_b.32" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.33" }
%"class.std::vector.33" = type { %"struct.std::_Vector_base.34" }
%"struct.std::_Vector_base.34" = type { %"struct.std::_Vector_base<sc_core::sc_signal_inout_if<bool> *, std::allocator<sc_core::sc_signal_inout_if<bool> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_inout_if<bool> *, std::allocator<sc_core::sc_signal_inout_if<bool> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_inout_if<bool> *, std::allocator<sc_core::sc_signal_inout_if<bool> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_inout_if<bool> *, std::allocator<sc_core::sc_signal_inout_if<bool> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_in.47" = type { %"class.sc_core::sc_port.48", ptr, ptr }
%"class.sc_core::sc_port.48" = type { %"class.sc_core::sc_port_b.49" }
%"class.sc_core::sc_port_b.49" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.50" }
%"class.std::vector.50" = type { %"struct.std::_Vector_base.51" }
%"struct.std::_Vector_base.51" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<sc_dt::sc_uint<4>> *, std::allocator<sc_core::sc_signal_in_if<sc_dt::sc_uint<4>> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<sc_dt::sc_uint<4>> *, std::allocator<sc_core::sc_signal_in_if<sc_dt::sc_uint<4>> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<sc_dt::sc_uint<4>> *, std::allocator<sc_core::sc_signal_in_if<sc_dt::sc_uint<4>> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<sc_dt::sc_uint<4>> *, std::allocator<sc_core::sc_signal_in_if<sc_dt::sc_uint<4>> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_in" = type { %"class.sc_core::sc_port", ptr, ptr, ptr, ptr }
%"class.sc_core::sc_port" = type { %"class.sc_core::sc_port_b" }
%"class.sc_core::sc_port_b" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.8" }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_signal" = type { %"class.sc_core::sc_signal_inout_if", %"class.sc_core::sc_prim_channel", %"struct.sc_core::sc_writer_policy_check", ptr, i8, i64, ptr, i8, ptr, ptr }
%"class.sc_core::sc_signal_inout_if" = type { %"class.sc_core::sc_signal_in_if", %"class.sc_core::sc_signal_write_if" }
%"class.sc_core::sc_signal_in_if" = type { %"class.sc_core::sc_interface" }
%"class.sc_core::sc_interface" = type { ptr }
%"class.sc_core::sc_signal_write_if" = type { %"class.sc_core::sc_interface" }
%"class.sc_core::sc_prim_channel" = type { %"class.sc_core::sc_object", ptr, ptr }
%"struct.sc_core::sc_writer_policy_check" = type { %"struct.sc_core::sc_writer_policy_check_port", %"struct.sc_core::sc_writer_policy_check_write" }
%"struct.sc_core::sc_writer_policy_check_port" = type { ptr }
%"struct.sc_core::sc_writer_policy_check_write" = type { i8, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt7sc_uintILi32EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232)) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt7sc_uintILi32EEaSERKS1_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt12sc_uint_base5rangeEii(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef, i32 noundef) #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(224) ptr @_ZN7sc_core9sc_signalIbLNS_16sc_writer_policyE0EEaSERKb(ptr noundef nonnull align 8 dereferenceable(224), ptr noundef nonnull align 1 dereferenceable(1)) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN15io_controller_m5shiftEv(ptr noundef nonnull align 8 dereferenceable(24296) %0) #1 align 2 personality ptr @__gxx_personality_v0 {
  %2 = alloca ptr, align 8
  %3 = alloca %"class.sc_dt::sc_uint", align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i8, align 1
  %8 = alloca i8, align 1
  store ptr %0, ptr %2, align 8, !tbaa !5
  %9 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 24, ptr %3) #4
  call void @_ZN5sc_dt7sc_uintILi32EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3)
  br label %10

10:                                               ; preds = %117, %1
  br label %11

11:                                               ; preds = %10
  br label %12

12:                                               ; preds = %21, %11
  %13 = getelementptr inbounds %struct.io_controller_m, ptr %9, i32 0, i32 17
  %14 = invoke noundef nonnull align 1 dereferenceable(1) ptr @_ZNK7sc_core5sc_inIbE4readEv(ptr noundef nonnull align 8 dereferenceable(184) %13)
          to label %15 unwind label %22

15:                                               ; preds = %12
  %16 = load i8, ptr %14, align 1, !tbaa !9, !range !11, !noundef !12
  %17 = trunc i8 %16 to i1
  %18 = zext i1 %17 to i32
  %19 = icmp eq i32 %18, 0
  br i1 %19, label %20, label %26

20:                                               ; preds = %15
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %9)
          to label %21 unwind label %22

21:                                               ; preds = %20
  br label %12, !llvm.loop !13

22:                                               ; preds = %116, %112, %20, %12
  %23 = landingpad { ptr, i32 }
          cleanup
  %24 = extractvalue { ptr, i32 } %23, 0
  store ptr %24, ptr %4, align 8
  %25 = extractvalue { ptr, i32 } %23, 1
  store i32 %25, ptr %5, align 4
  br label %126

26:                                               ; preds = %15
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  store i32 0, ptr %6, align 4, !tbaa !15
  br label %27

27:                                               ; preds = %102, %26
  %28 = load i32, ptr %6, align 4, !tbaa !15
  %29 = icmp slt i32 %28, 400
  br i1 %29, label %31, label %30

30:                                               ; preds = %27
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  br label %109

31:                                               ; preds = %27
  %32 = getelementptr inbounds %struct.io_controller_m, ptr %9, i32 0, i32 16
  %33 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZNK7sc_core5sc_inIN5sc_dt7sc_uintILi4EEEEcvRKS3_Ev(ptr noundef nonnull align 8 dereferenceable(168) %32)
          to label %34 unwind label %105

34:                                               ; preds = %31
  %35 = invoke noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt12sc_uint_base5rangeEii(ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef 3, i32 noundef 0)
          to label %36 unwind label %105

36:                                               ; preds = %34
  %37 = invoke noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt14sc_uint_subrefaSERKNS_12sc_uint_baseE(ptr noundef nonnull align 8 dereferenceable(28) %35, ptr noundef nonnull align 8 dereferenceable(24) %33)
          to label %38 unwind label %105

38:                                               ; preds = %36
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %9)
          to label %39 unwind label %105

39:                                               ; preds = %38
  %40 = getelementptr inbounds %struct.io_controller_m, ptr %9, i32 0, i32 16
  %41 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZNK7sc_core5sc_inIN5sc_dt7sc_uintILi4EEEEcvRKS3_Ev(ptr noundef nonnull align 8 dereferenceable(168) %40)
          to label %42 unwind label %105

42:                                               ; preds = %39
  %43 = invoke noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt12sc_uint_base5rangeEii(ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef 7, i32 noundef 4)
          to label %44 unwind label %105

44:                                               ; preds = %42
  %45 = invoke noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt14sc_uint_subrefaSERKNS_12sc_uint_baseE(ptr noundef nonnull align 8 dereferenceable(28) %43, ptr noundef nonnull align 8 dereferenceable(24) %41)
          to label %46 unwind label %105

46:                                               ; preds = %44
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %9)
          to label %47 unwind label %105

47:                                               ; preds = %46
  %48 = getelementptr inbounds %struct.io_controller_m, ptr %9, i32 0, i32 16
  %49 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZNK7sc_core5sc_inIN5sc_dt7sc_uintILi4EEEEcvRKS3_Ev(ptr noundef nonnull align 8 dereferenceable(168) %48)
          to label %50 unwind label %105

50:                                               ; preds = %47
  %51 = invoke noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt12sc_uint_base5rangeEii(ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef 11, i32 noundef 8)
          to label %52 unwind label %105

52:                                               ; preds = %50
  %53 = invoke noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt14sc_uint_subrefaSERKNS_12sc_uint_baseE(ptr noundef nonnull align 8 dereferenceable(28) %51, ptr noundef nonnull align 8 dereferenceable(24) %49)
          to label %54 unwind label %105

54:                                               ; preds = %52
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %9)
          to label %55 unwind label %105

55:                                               ; preds = %54
  %56 = getelementptr inbounds %struct.io_controller_m, ptr %9, i32 0, i32 16
  %57 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZNK7sc_core5sc_inIN5sc_dt7sc_uintILi4EEEEcvRKS3_Ev(ptr noundef nonnull align 8 dereferenceable(168) %56)
          to label %58 unwind label %105

58:                                               ; preds = %55
  %59 = invoke noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt12sc_uint_base5rangeEii(ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef 15, i32 noundef 12)
          to label %60 unwind label %105

60:                                               ; preds = %58
  %61 = invoke noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt14sc_uint_subrefaSERKNS_12sc_uint_baseE(ptr noundef nonnull align 8 dereferenceable(28) %59, ptr noundef nonnull align 8 dereferenceable(24) %57)
          to label %62 unwind label %105

62:                                               ; preds = %60
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %9)
          to label %63 unwind label %105

63:                                               ; preds = %62
  %64 = getelementptr inbounds %struct.io_controller_m, ptr %9, i32 0, i32 16
  %65 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZNK7sc_core5sc_inIN5sc_dt7sc_uintILi4EEEEcvRKS3_Ev(ptr noundef nonnull align 8 dereferenceable(168) %64)
          to label %66 unwind label %105

66:                                               ; preds = %63
  %67 = invoke noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt12sc_uint_base5rangeEii(ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef 19, i32 noundef 16)
          to label %68 unwind label %105

68:                                               ; preds = %66
  %69 = invoke noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt14sc_uint_subrefaSERKNS_12sc_uint_baseE(ptr noundef nonnull align 8 dereferenceable(28) %67, ptr noundef nonnull align 8 dereferenceable(24) %65)
          to label %70 unwind label %105

70:                                               ; preds = %68
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %9)
          to label %71 unwind label %105

71:                                               ; preds = %70
  %72 = getelementptr inbounds %struct.io_controller_m, ptr %9, i32 0, i32 16
  %73 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZNK7sc_core5sc_inIN5sc_dt7sc_uintILi4EEEEcvRKS3_Ev(ptr noundef nonnull align 8 dereferenceable(168) %72)
          to label %74 unwind label %105

74:                                               ; preds = %71
  %75 = invoke noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt12sc_uint_base5rangeEii(ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef 23, i32 noundef 20)
          to label %76 unwind label %105

76:                                               ; preds = %74
  %77 = invoke noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt14sc_uint_subrefaSERKNS_12sc_uint_baseE(ptr noundef nonnull align 8 dereferenceable(28) %75, ptr noundef nonnull align 8 dereferenceable(24) %73)
          to label %78 unwind label %105

78:                                               ; preds = %76
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %9)
          to label %79 unwind label %105

79:                                               ; preds = %78
  %80 = getelementptr inbounds %struct.io_controller_m, ptr %9, i32 0, i32 16
  %81 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZNK7sc_core5sc_inIN5sc_dt7sc_uintILi4EEEEcvRKS3_Ev(ptr noundef nonnull align 8 dereferenceable(168) %80)
          to label %82 unwind label %105

82:                                               ; preds = %79
  %83 = invoke noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt12sc_uint_base5rangeEii(ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef 27, i32 noundef 24)
          to label %84 unwind label %105

84:                                               ; preds = %82
  %85 = invoke noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt14sc_uint_subrefaSERKNS_12sc_uint_baseE(ptr noundef nonnull align 8 dereferenceable(28) %83, ptr noundef nonnull align 8 dereferenceable(24) %81)
          to label %86 unwind label %105

86:                                               ; preds = %84
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %9)
          to label %87 unwind label %105

87:                                               ; preds = %86
  %88 = getelementptr inbounds %struct.io_controller_m, ptr %9, i32 0, i32 16
  %89 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZNK7sc_core5sc_inIN5sc_dt7sc_uintILi4EEEEcvRKS3_Ev(ptr noundef nonnull align 8 dereferenceable(168) %88)
          to label %90 unwind label %105

90:                                               ; preds = %87
  %91 = invoke noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt12sc_uint_base5rangeEii(ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef 31, i32 noundef 28)
          to label %92 unwind label %105

92:                                               ; preds = %90
  %93 = invoke noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt14sc_uint_subrefaSERKNS_12sc_uint_baseE(ptr noundef nonnull align 8 dereferenceable(28) %91, ptr noundef nonnull align 8 dereferenceable(24) %89)
          to label %94 unwind label %105

94:                                               ; preds = %92
  %95 = getelementptr inbounds %struct.io_controller_m, ptr %9, i32 0, i32 29
  %96 = load i32, ptr %6, align 4, !tbaa !15
  %97 = sext i32 %96 to i64
  %98 = getelementptr inbounds [400 x %"class.sc_dt::sc_uint"], ptr %95, i64 0, i64 %97
  %99 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt7sc_uintILi32EEaSERKS1_(ptr noundef nonnull align 8 dereferenceable(24) %98, ptr noundef nonnull align 8 dereferenceable(24) %3)
          to label %100 unwind label %105

100:                                              ; preds = %94
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %9)
          to label %101 unwind label %105

101:                                              ; preds = %100
  br label %102

102:                                              ; preds = %101
  %103 = load i32, ptr %6, align 4, !tbaa !15
  %104 = add nsw i32 %103, 1
  store i32 %104, ptr %6, align 4, !tbaa !15
  br label %27, !llvm.loop !17

105:                                              ; preds = %100, %94, %92, %90, %87, %86, %84, %82, %79, %78, %76, %74, %71, %70, %68, %66, %63, %62, %60, %58, %55, %54, %52, %50, %47, %46, %44, %42, %39, %38, %36, %34, %31
  %106 = landingpad { ptr, i32 }
          cleanup
  %107 = extractvalue { ptr, i32 } %106, 0
  store ptr %107, ptr %4, align 8
  %108 = extractvalue { ptr, i32 } %106, 1
  store i32 %108, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  br label %126

109:                                              ; preds = %30
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #4
  store i8 1, ptr %7, align 1, !tbaa !9
  %110 = getelementptr inbounds %struct.io_controller_m, ptr %9, i32 0, i32 22
  %111 = invoke noundef nonnull align 8 dereferenceable(224) ptr @_ZN7sc_core9sc_signalIbLNS_16sc_writer_policyE0EEaSERKb(ptr noundef nonnull align 8 dereferenceable(224) %110, ptr noundef nonnull align 1 dereferenceable(1) %7)
          to label %112 unwind label %118

112:                                              ; preds = %109
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #4
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %9)
          to label %113 unwind label %22

113:                                              ; preds = %112
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #4
  store i8 0, ptr %8, align 1, !tbaa !9
  %114 = getelementptr inbounds %struct.io_controller_m, ptr %9, i32 0, i32 22
  %115 = invoke noundef nonnull align 8 dereferenceable(224) ptr @_ZN7sc_core9sc_signalIbLNS_16sc_writer_policyE0EEaSERKb(ptr noundef nonnull align 8 dereferenceable(224) %114, ptr noundef nonnull align 1 dereferenceable(1) %8)
          to label %116 unwind label %122

116:                                              ; preds = %113
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #4
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %9)
          to label %117 unwind label %22

117:                                              ; preds = %116
  br label %10, !llvm.loop !18

118:                                              ; preds = %109
  %119 = landingpad { ptr, i32 }
          cleanup
  %120 = extractvalue { ptr, i32 } %119, 0
  store ptr %120, ptr %4, align 8
  %121 = extractvalue { ptr, i32 } %119, 1
  store i32 %121, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #4
  br label %126

122:                                              ; preds = %113
  %123 = landingpad { ptr, i32 }
          cleanup
  %124 = extractvalue { ptr, i32 } %123, 0
  store ptr %124, ptr %4, align 8
  %125 = extractvalue { ptr, i32 } %123, 1
  store i32 %125, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #4
  br label %126

126:                                              ; preds = %122, %118, %105, %22
  call void @_ZN5sc_dt13sc_value_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr %3) #4
  br label %127

127:                                              ; preds = %126
  %128 = load ptr, ptr %4, align 8
  %129 = load i32, ptr %5, align 4
  %130 = insertvalue { ptr, i32 } poison, ptr %128, 0
  %131 = insertvalue { ptr, i32 } %130, i32 %129, 1
  resume { ptr, i32 } %131
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNK7sc_core5sc_inIbE4readEv(ptr noundef nonnull align 8 dereferenceable(184)) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNK7sc_core5sc_inIN5sc_dt7sc_uintILi4EEEEcvRKS3_Ev(ptr noundef nonnull align 8 dereferenceable(168)) #1 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt14sc_uint_subrefaSERKNS_12sc_uint_baseE(ptr noundef nonnull align 8 dereferenceable(28), ptr noundef nonnull align 8 dereferenceable(24)) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt13sc_value_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #2 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{i8 0, i8 2}
!12 = !{}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{!16, !16, i64 0}
!16 = !{!"int", !7, i64 0}
!17 = distinct !{!17, !14}
!18 = distinct !{!18, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::sc_uint" = type { %"class.sc_dt::sc_uint_base" }
%"class.sc_dt::sc_uint_base" = type { %"class.sc_dt::sc_value_base", i64, i32, i32 }
%"class.sc_dt::sc_value_base" = type { ptr }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt7sc_uintILi32EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt7sc_uintILi32EEaSERKS1_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt12sc_uint_base5rangeEii(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef, i32 noundef) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(224) ptr @_ZN7sc_core9sc_signalIbLNS_16sc_writer_policyE0EEaSERKb(ptr noundef nonnull align 8 dereferenceable(224), ptr noundef nonnull align 1 dereferenceable(1)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress noreturn uwtable
define dso_local void @_ZN15io_controller_m5shiftEv(ptr noundef nonnull align 8 dereferenceable(24296) %0) local_unnamed_addr #4 align 2 personality ptr @__gxx_personality_v0 {
  %2 = alloca %"class.sc_dt::sc_uint", align 8
  %3 = alloca i8, align 1
  %4 = alloca i8, align 1
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %2) #5
  call void @_ZN5sc_dt7sc_uintILi32EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %2)
  %5 = getelementptr inbounds i8, ptr %0, i64 3152
  %6 = getelementptr inbounds i8, ptr %0, i64 2984
  %7 = getelementptr inbounds i8, ptr %0, i64 14696
  %8 = getelementptr inbounds i8, ptr %0, i64 4152
  br label %9

9:                                                ; preds = %.backedge, %1
  %10 = invoke noundef nonnull align 1 dereferenceable(1) ptr @_ZNK7sc_core5sc_inIbE4readEv(ptr noundef nonnull align 8 dereferenceable(184) %5)
          to label %11 unwind label %.loopexit

11:                                               ; preds = %9
  %12 = load i8, ptr %10, align 1, !tbaa !5, !range !9, !noundef !10
  %13 = icmp eq i8 %12, 0
  br i1 %13, label %14, label %.preheader

14:                                               ; preds = %11
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
          to label %.backedge unwind label %.loopexit

.backedge:                                        ; preds = %14, %80
  br label %9, !llvm.loop !11

.loopexit:                                        ; preds = %9, %14
  %lpad.loopexit = landingpad { ptr, i32 }
          cleanup
  br label %85

.loopexit.split-lp:                               ; preds = %77, %80
  %lpad.loopexit.split-lp = landingpad { ptr, i32 }
          cleanup
  br label %85

15:                                               ; preds = %74
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %3) #5
  store i8 1, ptr %3, align 1, !tbaa !5
  %16 = invoke noundef nonnull align 8 dereferenceable(224) ptr @_ZN7sc_core9sc_signalIbLNS_16sc_writer_policyE0EEaSERKb(ptr noundef nonnull align 8 dereferenceable(224) %8, ptr noundef nonnull align 1 dereferenceable(1) %3)
          to label %77 unwind label %81

.preheader:                                       ; preds = %11, %74
  %indvars.iv = phi i64 [ %indvars.iv.next, %74 ], [ 0, %11 ]
  %17 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZNK7sc_core5sc_inIN5sc_dt7sc_uintILi4EEEEcvRKS3_Ev(ptr noundef nonnull align 8 dereferenceable(168) %6)
          to label %18 unwind label %75

18:                                               ; preds = %.preheader
  %19 = invoke noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt12sc_uint_base5rangeEii(ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef 3, i32 noundef 0)
          to label %20 unwind label %75

20:                                               ; preds = %18
  %21 = invoke noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt14sc_uint_subrefaSERKNS_12sc_uint_baseE(ptr noundef nonnull align 8 dereferenceable(28) %19, ptr noundef nonnull align 8 dereferenceable(24) %17)
          to label %22 unwind label %75

22:                                               ; preds = %20
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
          to label %23 unwind label %75

23:                                               ; preds = %22
  %24 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZNK7sc_core5sc_inIN5sc_dt7sc_uintILi4EEEEcvRKS3_Ev(ptr noundef nonnull align 8 dereferenceable(168) %6)
          to label %25 unwind label %75

25:                                               ; preds = %23
  %26 = invoke noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt12sc_uint_base5rangeEii(ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef 7, i32 noundef 4)
          to label %27 unwind label %75

27:                                               ; preds = %25
  %28 = invoke noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt14sc_uint_subrefaSERKNS_12sc_uint_baseE(ptr noundef nonnull align 8 dereferenceable(28) %26, ptr noundef nonnull align 8 dereferenceable(24) %24)
          to label %29 unwind label %75

29:                                               ; preds = %27
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
          to label %30 unwind label %75

30:                                               ; preds = %29
  %31 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZNK7sc_core5sc_inIN5sc_dt7sc_uintILi4EEEEcvRKS3_Ev(ptr noundef nonnull align 8 dereferenceable(168) %6)
          to label %32 unwind label %75

32:                                               ; preds = %30
  %33 = invoke noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt12sc_uint_base5rangeEii(ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef 11, i32 noundef 8)
          to label %34 unwind label %75

34:                                               ; preds = %32
  %35 = invoke noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt14sc_uint_subrefaSERKNS_12sc_uint_baseE(ptr noundef nonnull align 8 dereferenceable(28) %33, ptr noundef nonnull align 8 dereferenceable(24) %31)
          to label %36 unwind label %75

36:                                               ; preds = %34
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
          to label %37 unwind label %75

37:                                               ; preds = %36
  %38 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZNK7sc_core5sc_inIN5sc_dt7sc_uintILi4EEEEcvRKS3_Ev(ptr noundef nonnull align 8 dereferenceable(168) %6)
          to label %39 unwind label %75

39:                                               ; preds = %37
  %40 = invoke noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt12sc_uint_base5rangeEii(ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef 15, i32 noundef 12)
          to label %41 unwind label %75

41:                                               ; preds = %39
  %42 = invoke noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt14sc_uint_subrefaSERKNS_12sc_uint_baseE(ptr noundef nonnull align 8 dereferenceable(28) %40, ptr noundef nonnull align 8 dereferenceable(24) %38)
          to label %43 unwind label %75

43:                                               ; preds = %41
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
          to label %44 unwind label %75

44:                                               ; preds = %43
  %45 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZNK7sc_core5sc_inIN5sc_dt7sc_uintILi4EEEEcvRKS3_Ev(ptr noundef nonnull align 8 dereferenceable(168) %6)
          to label %46 unwind label %75

46:                                               ; preds = %44
  %47 = invoke noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt12sc_uint_base5rangeEii(ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef 19, i32 noundef 16)
          to label %48 unwind label %75

48:                                               ; preds = %46
  %49 = invoke noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt14sc_uint_subrefaSERKNS_12sc_uint_baseE(ptr noundef nonnull align 8 dereferenceable(28) %47, ptr noundef nonnull align 8 dereferenceable(24) %45)
          to label %50 unwind label %75

50:                                               ; preds = %48
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
          to label %51 unwind label %75

51:                                               ; preds = %50
  %52 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZNK7sc_core5sc_inIN5sc_dt7sc_uintILi4EEEEcvRKS3_Ev(ptr noundef nonnull align 8 dereferenceable(168) %6)
          to label %53 unwind label %75

53:                                               ; preds = %51
  %54 = invoke noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt12sc_uint_base5rangeEii(ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef 23, i32 noundef 20)
          to label %55 unwind label %75

55:                                               ; preds = %53
  %56 = invoke noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt14sc_uint_subrefaSERKNS_12sc_uint_baseE(ptr noundef nonnull align 8 dereferenceable(28) %54, ptr noundef nonnull align 8 dereferenceable(24) %52)
          to label %57 unwind label %75

57:                                               ; preds = %55
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
          to label %58 unwind label %75

58:                                               ; preds = %57
  %59 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZNK7sc_core5sc_inIN5sc_dt7sc_uintILi4EEEEcvRKS3_Ev(ptr noundef nonnull align 8 dereferenceable(168) %6)
          to label %60 unwind label %75

60:                                               ; preds = %58
  %61 = invoke noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt12sc_uint_base5rangeEii(ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef 27, i32 noundef 24)
          to label %62 unwind label %75

62:                                               ; preds = %60
  %63 = invoke noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt14sc_uint_subrefaSERKNS_12sc_uint_baseE(ptr noundef nonnull align 8 dereferenceable(28) %61, ptr noundef nonnull align 8 dereferenceable(24) %59)
          to label %64 unwind label %75

64:                                               ; preds = %62
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
          to label %65 unwind label %75

65:                                               ; preds = %64
  %66 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZNK7sc_core5sc_inIN5sc_dt7sc_uintILi4EEEEcvRKS3_Ev(ptr noundef nonnull align 8 dereferenceable(168) %6)
          to label %67 unwind label %75

67:                                               ; preds = %65
  %68 = invoke noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt12sc_uint_base5rangeEii(ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef 31, i32 noundef 28)
          to label %69 unwind label %75

69:                                               ; preds = %67
  %70 = invoke noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt14sc_uint_subrefaSERKNS_12sc_uint_baseE(ptr noundef nonnull align 8 dereferenceable(28) %68, ptr noundef nonnull align 8 dereferenceable(24) %66)
          to label %71 unwind label %75

71:                                               ; preds = %69
  %72 = getelementptr inbounds [400 x %"class.sc_dt::sc_uint"], ptr %7, i64 0, i64 %indvars.iv
  %73 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt7sc_uintILi32EEaSERKS1_(ptr noundef nonnull align 8 dereferenceable(24) %72, ptr noundef nonnull align 8 dereferenceable(24) %2)
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
          to label %74 unwind label %75

74:                                               ; preds = %71
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, 400
  br i1 %exitcond.not, label %15, label %.preheader, !llvm.loop !13

75:                                               ; preds = %71, %69, %67, %65, %64, %62, %60, %58, %57, %55, %53, %51, %50, %48, %46, %44, %43, %41, %39, %37, %36, %34, %32, %30, %29, %27, %25, %23, %22, %20, %18, %.preheader
  %76 = landingpad { ptr, i32 }
          cleanup
  br label %85

77:                                               ; preds = %15
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %3) #5
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
          to label %78 unwind label %.loopexit.split-lp

78:                                               ; preds = %77
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %4) #5
  store i8 0, ptr %4, align 1, !tbaa !5
  %79 = invoke noundef nonnull align 8 dereferenceable(224) ptr @_ZN7sc_core9sc_signalIbLNS_16sc_writer_policyE0EEaSERKb(ptr noundef nonnull align 8 dereferenceable(224) %8, ptr noundef nonnull align 1 dereferenceable(1) %4)
          to label %80 unwind label %83

80:                                               ; preds = %78
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %4) #5
  invoke void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
          to label %.backedge unwind label %.loopexit.split-lp

81:                                               ; preds = %15
  %82 = landingpad { ptr, i32 }
          cleanup
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %3) #5
  br label %85

83:                                               ; preds = %78
  %84 = landingpad { ptr, i32 }
          cleanup
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %4) #5
  br label %85

85:                                               ; preds = %.loopexit, %.loopexit.split-lp, %83, %81, %75
  %.pn = phi { ptr, i32 } [ %76, %75 ], [ %84, %83 ], [ %82, %81 ], [ %lpad.loopexit, %.loopexit ], [ %lpad.loopexit.split-lp, %.loopexit.split-lp ]
  call void @_ZN5sc_dt13sc_value_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %2) #5
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %2) #5
  resume { ptr, i32 } %.pn
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNK7sc_core5sc_inIbE4readEv(ptr noundef nonnull align 8 dereferenceable(184)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNK7sc_core5sc_inIN5sc_dt7sc_uintILi4EEEEcvRKS3_Ev(ptr noundef nonnull align 8 dereferenceable(168)) local_unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(28) ptr @_ZN5sc_dt14sc_uint_subrefaSERKNS_12sc_uint_baseE(ptr noundef nonnull align 8 dereferenceable(28), ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt13sc_value_baseD2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #2 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress noreturn uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"bool", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{i8 0, i8 2}
!10 = !{}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass