; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Library (NetIp6IsNetEqual)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.EFI_IPv6_ADDRESS = type { [16 x i8] }

@.str.12 = external hidden unnamed_addr constant [144 x i8], align 1
@.str.17 = external hidden unnamed_addr constant [71 x i8], align 1
@.str.18 = external hidden unnamed_addr constant [10 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare zeroext i8 @DebugAssertEnabled() #1

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) #1

; Function Attrs: nounwind uwtable
define dso_local zeroext i8 @NetIp6IsNetEqual(ptr noundef %0, ptr noundef %1, i8 noundef zeroext %2) #2 {
  %4 = alloca i8, align 1
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i8, align 1
  %8 = alloca i8, align 1
  %9 = alloca i8, align 1
  %10 = alloca i8, align 1
  %11 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i8 %2, ptr %7, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %10) #3
  br label %12

12:                                               ; preds = %3
  %13 = call zeroext i8 @DebugAssertEnabled()
  %14 = icmp ne i8 %13, 0
  br i1 %14, label %15, label %27

15:                                               ; preds = %12
  %16 = load ptr, ptr %5, align 8, !tbaa !5
  %17 = icmp ne ptr %16, null
  br i1 %17, label %18, label %25

18:                                               ; preds = %15
  %19 = load ptr, ptr %6, align 8, !tbaa !5
  %20 = icmp ne ptr %19, null
  br i1 %20, label %21, label %25

21:                                               ; preds = %18
  %22 = load i8, ptr %7, align 1, !tbaa !9
  %23 = zext i8 %22 to i32
  %24 = icmp slt i32 %23, 129
  br i1 %24, label %26, label %25

25:                                               ; preds = %21, %18, %15
  call void @DebugAssert(ptr noundef @.str.12, i64 noundef 799, ptr noundef @.str.17)
  br label %26

26:                                               ; preds = %25, %21
  br label %27

27:                                               ; preds = %26, %12
  br label %28

28:                                               ; preds = %27
  br label %29

29:                                               ; preds = %28
  %30 = load i8, ptr %7, align 1, !tbaa !9
  %31 = zext i8 %30 to i32
  %32 = icmp eq i32 %31, 0
  br i1 %32, label %33, label %34

33:                                               ; preds = %29
  store i8 1, ptr %4, align 1
  store i32 1, ptr %11, align 4
  br label %96

34:                                               ; preds = %29
  %35 = load i8, ptr %7, align 1, !tbaa !9
  %36 = zext i8 %35 to i32
  %37 = sdiv i32 %36, 8
  %38 = trunc i32 %37 to i8
  store i8 %38, ptr %8, align 1, !tbaa !9
  %39 = load i8, ptr %7, align 1, !tbaa !9
  %40 = zext i8 %39 to i32
  %41 = srem i32 %40, 8
  %42 = trunc i32 %41 to i8
  store i8 %42, ptr %9, align 1, !tbaa !9
  %43 = load ptr, ptr %5, align 8, !tbaa !5
  %44 = load ptr, ptr %6, align 8, !tbaa !5
  %45 = load i8, ptr %8, align 1, !tbaa !9
  %46 = zext i8 %45 to i64
  %47 = call i64 @CompareMem(ptr noundef %43, ptr noundef %44, i64 noundef %46)
  %48 = icmp ne i64 %47, 0
  br i1 %48, label %49, label %50

49:                                               ; preds = %34
  store i8 0, ptr %4, align 1
  store i32 1, ptr %11, align 4
  br label %96

50:                                               ; preds = %34
  %51 = load i8, ptr %9, align 1, !tbaa !9
  %52 = zext i8 %51 to i32
  %53 = icmp sgt i32 %52, 0
  br i1 %53, label %54, label %95

54:                                               ; preds = %50
  %55 = load i8, ptr %9, align 1, !tbaa !9
  %56 = zext i8 %55 to i32
  %57 = sub nsw i32 8, %56
  %58 = shl i32 255, %57
  %59 = trunc i32 %58 to i8
  store i8 %59, ptr %10, align 1, !tbaa !9
  br label %60

60:                                               ; preds = %54
  %61 = call zeroext i8 @DebugAssertEnabled()
  %62 = icmp ne i8 %61, 0
  br i1 %62, label %63, label %69

63:                                               ; preds = %60
  %64 = load i8, ptr %8, align 1, !tbaa !9
  %65 = zext i8 %64 to i32
  %66 = icmp slt i32 %65, 16
  br i1 %66, label %68, label %67

67:                                               ; preds = %63
  call void @DebugAssert(ptr noundef @.str.12, i64 noundef 815, ptr noundef @.str.18)
  br label %68

68:                                               ; preds = %67, %63
  br label %69

69:                                               ; preds = %68, %60
  br label %70

70:                                               ; preds = %69
  br label %71

71:                                               ; preds = %70
  %72 = load ptr, ptr %5, align 8, !tbaa !5
  %73 = getelementptr inbounds %struct.EFI_IPv6_ADDRESS, ptr %72, i32 0, i32 0
  %74 = load i8, ptr %8, align 1, !tbaa !9
  %75 = zext i8 %74 to i64
  %76 = getelementptr inbounds [16 x i8], ptr %73, i64 0, i64 %75
  %77 = load i8, ptr %76, align 1, !tbaa !9
  %78 = zext i8 %77 to i32
  %79 = load i8, ptr %10, align 1, !tbaa !9
  %80 = zext i8 %79 to i32
  %81 = and i32 %78, %80
  %82 = load ptr, ptr %6, align 8, !tbaa !5
  %83 = getelementptr inbounds %struct.EFI_IPv6_ADDRESS, ptr %82, i32 0, i32 0
  %84 = load i8, ptr %8, align 1, !tbaa !9
  %85 = zext i8 %84 to i64
  %86 = getelementptr inbounds [16 x i8], ptr %83, i64 0, i64 %85
  %87 = load i8, ptr %86, align 1, !tbaa !9
  %88 = zext i8 %87 to i32
  %89 = load i8, ptr %10, align 1, !tbaa !9
  %90 = zext i8 %89 to i32
  %91 = and i32 %88, %90
  %92 = icmp ne i32 %81, %91
  br i1 %92, label %93, label %94

93:                                               ; preds = %71
  store i8 0, ptr %4, align 1
  store i32 1, ptr %11, align 4
  br label %96

94:                                               ; preds = %71
  br label %95

95:                                               ; preds = %94, %50
  store i8 1, ptr %4, align 1
  store i32 1, ptr %11, align 4
  br label %96

96:                                               ; preds = %95, %93, %49, %33
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #3
  %97 = load i8, ptr %4, align 1
  ret i8 %97
}

declare i64 @CompareMem(ptr noundef, ptr noundef, i64 noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.12 = external hidden unnamed_addr constant [144 x i8], align 1
@.str.17 = external hidden unnamed_addr constant [71 x i8], align 1
@.str.18 = external hidden unnamed_addr constant [10 x i8], align 1

declare zeroext i8 @DebugAssertEnabled() local_unnamed_addr #0

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local zeroext range(i8 0, 2) i8 @NetIp6IsNetEqual(ptr noundef %0, ptr noundef %1, i8 noundef zeroext %2) local_unnamed_addr #1 {
  %4 = tail call zeroext i8 @DebugAssertEnabled() #2
  %.not = icmp eq i8 %4, 0
  br i1 %.not, label %10, label %5

5:                                                ; preds = %3
  %6 = icmp ne ptr %0, null
  %7 = icmp ne ptr %1, null
  %or.cond = and i1 %6, %7
  %8 = icmp ult i8 %2, -127
  %or.cond4 = and i1 %or.cond, %8
  br i1 %or.cond4, label %10, label %9

9:                                                ; preds = %5
  tail call void @DebugAssert(ptr noundef nonnull @.str.12, i64 noundef 799, ptr noundef nonnull @.str.17) #2
  br label %10

10:                                               ; preds = %9, %5, %3
  %11 = icmp eq i8 %2, 0
  br i1 %11, label %34, label %12

12:                                               ; preds = %10
  %13 = lshr i8 %2, 3
  %14 = zext nneg i8 %13 to i64
  %15 = tail call i64 @CompareMem(ptr noundef %0, ptr noundef %1, i64 noundef %14) #2
  %.not27 = icmp eq i64 %15, 0
  br i1 %.not27, label %16, label %34

16:                                               ; preds = %12
  %17 = and i8 %2, 7
  %.not28 = icmp eq i8 %17, 0
  br i1 %.not28, label %33, label %18

18:                                               ; preds = %16
  %narrow = sub nuw nsw i8 8, %17
  %19 = zext nneg i8 %narrow to i16
  %20 = shl nuw nsw i16 255, %19
  %21 = tail call zeroext i8 @DebugAssertEnabled() #2
  %22 = icmp eq i8 %21, 0
  %23 = icmp sgt i8 %2, -1
  %or.cond7 = or i1 %23, %22
  br i1 %or.cond7, label %25, label %24

24:                                               ; preds = %18
  tail call void @DebugAssert(ptr noundef nonnull @.str.12, i64 noundef 815, ptr noundef nonnull @.str.18) #2
  br label %25

25:                                               ; preds = %24, %18
  %26 = getelementptr inbounds [16 x i8], ptr %0, i64 0, i64 %14
  %27 = load i8, ptr %26, align 1, !tbaa !5
  %28 = getelementptr inbounds [16 x i8], ptr %1, i64 0, i64 %14
  %29 = load i8, ptr %28, align 1, !tbaa !5
  %30 = xor i8 %29, %27
  %31 = zext i8 %30 to i16
  %32 = and i16 %20, %31
  %.not29 = icmp eq i16 %32, 0
  br i1 %.not29, label %33, label %34

33:                                               ; preds = %25, %16
  br label %34

34:                                               ; preds = %25, %12, %10, %33
  %.0 = phi i8 [ 1, %33 ], [ 1, %10 ], [ 0, %12 ], [ 0, %25 ]
  ret i8 %.0
}

declare i64 @CompareMem(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass