; LLVM IR from gem5/gem5 :: src/systemc/tests/systemc/misc/sim_tests/popc/popc.ll (ZN5proc15entryEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%struct.proc1 = type { %"class.sc_core::sc_module", %"class.sc_core::sc_in", %"class.sc_core::sc_in", %"class.sc_core::sc_in.13", %"class.sc_core::sc_out", %"class.sc_core::sc_out", %"class.sc_core::sc_out.28" }
%"class.sc_core::sc_module" = type { %"class.sc_core::sc_object", %"class.sc_core::sc_process_host", %"class.sc_core::sc_sensitive", %"class.sc_core::sc_sensitive_pos", %"class.sc_core::sc_sensitive_neg", i8, ptr, i32, ptr, ptr }
%"class.sc_core::sc_object" = type { ptr, ptr, %"class.std::vector", %"class.std::vector.0", %"class.std::__cxx11::basic_string", ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.sc_core::sc_process_host" = type { ptr }
%"class.sc_core::sc_sensitive" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_pos" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_neg" = type { ptr, i32, ptr }
%"class.sc_core::sc_in" = type { %"class.sc_core::sc_port", ptr, ptr, ptr, ptr }
%"class.sc_core::sc_port" = type { %"class.sc_core::sc_port_b" }
%"class.sc_core::sc_port_b" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.8" }
%"class.sc_core::sc_port_base" = type { %"class.sc_core::sc_object", ptr }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_in.13" = type { %"class.sc_core::sc_port.14", ptr, ptr }
%"class.sc_core::sc_port.14" = type { %"class.sc_core::sc_port_b.15" }
%"class.sc_core::sc_port_b.15" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.16" }
%"class.std::vector.16" = type { %"struct.std::_Vector_base.17" }
%"struct.std::_Vector_base.17" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<int> *, std::allocator<sc_core::sc_signal_in_if<int> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<int> *, std::allocator<sc_core::sc_signal_in_if<int> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<int> *, std::allocator<sc_core::sc_signal_in_if<int> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<int> *, std::allocator<sc_core::sc_signal_in_if<int> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_out" = type { %"class.sc_core::sc_inout" }
%"class.sc_core::sc_inout" = type { %"class.sc_core::sc_port.21", ptr, ptr, ptr, ptr, ptr }
%"class.sc_core::sc_port.21" = type { %"class.sc_core::sc_port_b.22" }
%"class.sc_core::sc_port_b.22" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.23" }
%"class.std::vector.23" = type { %"struct.std::_Vector_base.24" }
%"struct.std::_Vector_base.24" = type { %"struct.std::_Vector_base<sc_core::sc_signal_inout_if<bool> *, std::allocator<sc_core::sc_signal_inout_if<bool> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_inout_if<bool> *, std::allocator<sc_core::sc_signal_inout_if<bool> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_inout_if<bool> *, std::allocator<sc_core::sc_signal_inout_if<bool> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_inout_if<bool> *, std::allocator<sc_core::sc_signal_inout_if<bool> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_out.28" = type { %"class.sc_core::sc_inout.29" }
%"class.sc_core::sc_inout.29" = type { %"class.sc_core::sc_port.30", ptr, ptr, ptr }
%"class.sc_core::sc_port.30" = type { %"class.sc_core::sc_port_b.31" }
%"class.sc_core::sc_port_b.31" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.32" }
%"class.std::vector.32" = type { %"struct.std::_Vector_base.33" }
%"struct.std::_Vector_base.33" = type { %"struct.std::_Vector_base<sc_core::sc_signal_inout_if<int> *, std::allocator<sc_core::sc_signal_inout_if<int> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_inout_if<int> *, std::allocator<sc_core::sc_signal_inout_if<int> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_inout_if<int> *, std::allocator<sc_core::sc_signal_inout_if<int> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_inout_if<int> *, std::allocator<sc_core::sc_signal_inout_if<int> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@.str = external hidden unnamed_addr constant [35 x i8], align 1
@_ZSt4cout = external global %"class.std::basic_ostream", align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5proc15entryEv(ptr noundef nonnull align 8 dereferenceable(1328) %0) #0 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i8, align 1
  %6 = alloca i8, align 1
  %7 = alloca i8, align 1
  %8 = alloca i8, align 1
  %9 = alloca [8192 x i8], align 16
  %10 = alloca i8, align 1
  %11 = alloca i8, align 1
  store ptr %0, ptr %2, align 8, !tbaa !5
  %12 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #5
  store i32 1, ptr %4, align 4, !tbaa !9
  store i32 0, ptr %3, align 4, !tbaa !9
  %13 = getelementptr inbounds %struct.proc1, ptr %12, i32 0, i32 5
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #5
  store i8 0, ptr %5, align 1, !tbaa !11
  call void @_ZN7sc_core8sc_inoutIbE5writeERKb(ptr noundef nonnull align 8 dereferenceable(192) %13, ptr noundef nonnull align 1 dereferenceable(1) %5)
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #5
  %14 = getelementptr inbounds %struct.proc1, ptr %12, i32 0, i32 4
  call void @llvm.lifetime.start.p0(i64 1, ptr %6) #5
  store i8 0, ptr %6, align 1, !tbaa !11
  call void @_ZN7sc_core8sc_inoutIbE5writeERKb(ptr noundef nonnull align 8 dereferenceable(192) %14, ptr noundef nonnull align 1 dereferenceable(1) %6)
  call void @llvm.lifetime.end.p0(i64 1, ptr %6) #5
  call void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %12)
  br label %15

15:                                               ; preds = %58, %1
  br label %16

16:                                               ; preds = %15
  %17 = getelementptr inbounds %struct.proc1, ptr %12, i32 0, i32 6
  call void @_ZN7sc_core8sc_inoutIiE5writeERKi(ptr noundef nonnull align 8 dereferenceable(176) %17, ptr noundef nonnull align 4 dereferenceable(4) %4)
  %18 = getelementptr inbounds %struct.proc1, ptr %12, i32 0, i32 5
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #5
  store i8 1, ptr %7, align 1, !tbaa !11
  call void @_ZN7sc_core8sc_inoutIbE5writeERKb(ptr noundef nonnull align 8 dereferenceable(192) %18, ptr noundef nonnull align 1 dereferenceable(1) %7)
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #5
  br label %19

19:                                               ; preds = %20, %16
  call void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %12)
  br label %20

20:                                               ; preds = %19
  %21 = getelementptr inbounds %struct.proc1, ptr %12, i32 0, i32 2
  %22 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNK7sc_core5sc_inIbEcvRKbEv(ptr noundef nonnull align 8 dereferenceable(184) %21)
  %23 = load i8, ptr %22, align 1, !tbaa !11, !range !13, !noundef !14
  %24 = trunc i8 %23 to i1
  %25 = zext i1 %24 to i32
  %26 = icmp eq i32 %25, 0
  br i1 %26, label %19, label %27, !llvm.loop !15

27:                                               ; preds = %20
  %28 = getelementptr inbounds %struct.proc1, ptr %12, i32 0, i32 5
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #5
  store i8 0, ptr %8, align 1, !tbaa !11
  call void @_ZN7sc_core8sc_inoutIbE5writeERKb(ptr noundef nonnull align 8 dereferenceable(192) %28, ptr noundef nonnull align 1 dereferenceable(1) %8)
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #5
  br label %29

29:                                               ; preds = %30, %27
  call void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %12)
  br label %30

30:                                               ; preds = %29
  %31 = getelementptr inbounds %struct.proc1, ptr %12, i32 0, i32 2
  %32 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNK7sc_core5sc_inIbEcvRKbEv(ptr noundef nonnull align 8 dereferenceable(184) %31)
  %33 = load i8, ptr %32, align 1, !tbaa !11, !range !13, !noundef !14
  %34 = trunc i8 %33 to i1
  %35 = zext i1 %34 to i32
  %36 = icmp eq i32 %35, 1
  br i1 %36, label %29, label %37, !llvm.loop !17

37:                                               ; preds = %30
  call void @llvm.lifetime.start.p0(i64 8192, ptr %9) #5
  %38 = getelementptr inbounds [8192 x i8], ptr %9, i64 0, i64 0
  %39 = load i32, ptr %4, align 4, !tbaa !9
  %40 = getelementptr inbounds %struct.proc1, ptr %12, i32 0, i32 3
  %41 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNK7sc_core5sc_inIiE4readEv(ptr noundef nonnull align 8 dereferenceable(168) %40)
  %42 = load i32, ptr %41, align 4, !tbaa !9
  %43 = call i32 (ptr, ptr, ...) @sprintf(ptr noundef %38, ptr noundef @.str, i32 noundef %39, i32 noundef %42) #5
  %44 = getelementptr inbounds [8192 x i8], ptr %9, i64 0, i64 0
  %45 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, ptr noundef %44)
  %46 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %45, ptr noundef @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  %47 = load i32, ptr %3, align 4, !tbaa !9
  %48 = add nsw i32 %47, 1
  store i32 %48, ptr %3, align 4, !tbaa !9
  %49 = load i32, ptr %3, align 4, !tbaa !9
  %50 = icmp eq i32 %49, 3
  br i1 %50, label %51, label %54

51:                                               ; preds = %37
  %52 = getelementptr inbounds %struct.proc1, ptr %12, i32 0, i32 4
  call void @llvm.lifetime.start.p0(i64 1, ptr %10) #5
  store i8 1, ptr %10, align 1, !tbaa !11
  call void @_ZN7sc_core8sc_inoutIbE5writeERKb(ptr noundef nonnull align 8 dereferenceable(192) %52, ptr noundef nonnull align 1 dereferenceable(1) %10)
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #5
  call void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %12)
  %53 = getelementptr inbounds %struct.proc1, ptr %12, i32 0, i32 4
  call void @llvm.lifetime.start.p0(i64 1, ptr %11) #5
  store i8 0, ptr %11, align 1, !tbaa !11
  call void @_ZN7sc_core8sc_inoutIbE5writeERKb(ptr noundef nonnull align 8 dereferenceable(192) %53, ptr noundef nonnull align 1 dereferenceable(1) %11)
  call void @llvm.lifetime.end.p0(i64 1, ptr %11) #5
  call void @_ZN7sc_core9sc_module4waitEi(ptr noundef nonnull align 8 dereferenceable(232) %12, i32 noundef 2)
  br label %54

54:                                               ; preds = %51, %37
  %55 = load i32, ptr %3, align 4, !tbaa !9
  %56 = icmp eq i32 %55, 16
  br i1 %56, label %57, label %58

57:                                               ; preds = %54
  call void @_ZN7sc_core7sc_stopEv()
  br label %58

58:                                               ; preds = %57, %54
  %59 = load i32, ptr %4, align 4, !tbaa !9
  %60 = shl i32 %59, 1
  %61 = or i32 %60, 1
  store i32 %61, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8192, ptr %9) #5
  br label %15, !llvm.loop !18
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core8sc_inoutIbE5writeERKb(ptr noundef nonnull align 8 dereferenceable(192), ptr noundef nonnull align 1 dereferenceable(1)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232)) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core8sc_inoutIiE5writeERKi(ptr noundef nonnull align 8 dereferenceable(176), ptr noundef nonnull align 4 dereferenceable(4)) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNK7sc_core5sc_inIbEcvRKbEv(ptr noundef nonnull align 8 dereferenceable(184)) #0 align 2

; Function Attrs: nounwind
declare i32 @sprintf(ptr noundef, ptr noundef, ...) #2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNK7sc_core5sc_inIiE4readEv(ptr noundef nonnull align 8 dereferenceable(168)) #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) #3

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(8)) #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_module4waitEi(ptr noundef nonnull align 8 dereferenceable(232), i32 noundef) #0 align 2

declare void @_ZN7sc_core7sc_stopEv() #4

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{i8 0, i8 2}
!14 = !{}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = distinct !{!17, !16}
!18 = distinct !{!18, !16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }

@.str = external hidden unnamed_addr constant [35 x i8], align 1
@_ZSt4cout = external global %"class.std::basic_ostream", align 8

; Function Attrs: mustprogress noreturn uwtable
define dso_local void @_ZN5proc15entryEv(ptr noundef nonnull align 8 dereferenceable(1328) %0) local_unnamed_addr #0 align 2 {
  %2 = alloca i32, align 4
  %3 = alloca i8, align 1
  %4 = alloca i8, align 1
  %5 = alloca i8, align 1
  %6 = alloca i8, align 1
  %7 = alloca [8192 x i8], align 16
  %8 = alloca i8, align 1
  %9 = alloca i8, align 1
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #6
  store i32 1, ptr %2, align 4, !tbaa !5
  %10 = getelementptr inbounds i8, ptr %0, i64 960
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %3) #6
  store i8 0, ptr %3, align 1, !tbaa !9
  call void @_ZN7sc_core8sc_inoutIbE5writeERKb(ptr noundef nonnull align 8 dereferenceable(192) %10, ptr noundef nonnull align 1 dereferenceable(1) %3)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %3) #6
  %11 = getelementptr inbounds i8, ptr %0, i64 768
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %4) #6
  store i8 0, ptr %4, align 1, !tbaa !9
  call void @_ZN7sc_core8sc_inoutIbE5writeERKb(ptr noundef nonnull align 8 dereferenceable(192) %11, ptr noundef nonnull align 1 dereferenceable(1) %4)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %4) #6
  call void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
  %12 = getelementptr inbounds i8, ptr %0, i64 1152
  %13 = getelementptr inbounds i8, ptr %0, i64 416
  %14 = getelementptr inbounds i8, ptr %0, i64 600
  br label %15

15:                                               ; preds = %35, %1
  %.0 = phi i32 [ 0, %1 ], [ %32, %35 ]
  call void @_ZN7sc_core8sc_inoutIiE5writeERKi(ptr noundef nonnull align 8 dereferenceable(176) %12, ptr noundef nonnull align 4 dereferenceable(4) %2)
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %5) #6
  store i8 1, ptr %5, align 1, !tbaa !9
  call void @_ZN7sc_core8sc_inoutIbE5writeERKb(ptr noundef nonnull align 8 dereferenceable(192) %10, ptr noundef nonnull align 1 dereferenceable(1) %5)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %5) #6
  br label %16

16:                                               ; preds = %16, %15
  call void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
  %17 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNK7sc_core5sc_inIbEcvRKbEv(ptr noundef nonnull align 8 dereferenceable(184) %13)
  %18 = load i8, ptr %17, align 1, !tbaa !9, !range !11, !noundef !12
  %19 = icmp eq i8 %18, 0
  br i1 %19, label %16, label %20, !llvm.loop !13

20:                                               ; preds = %16
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %6) #6
  store i8 0, ptr %6, align 1, !tbaa !9
  call void @_ZN7sc_core8sc_inoutIbE5writeERKb(ptr noundef nonnull align 8 dereferenceable(192) %10, ptr noundef nonnull align 1 dereferenceable(1) %6)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %6) #6
  br label %21

21:                                               ; preds = %21, %20
  call void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
  %22 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNK7sc_core5sc_inIbEcvRKbEv(ptr noundef nonnull align 8 dereferenceable(184) %13)
  %23 = load i8, ptr %22, align 1, !tbaa !9, !range !11, !noundef !12
  %24 = trunc nuw i8 %23 to i1
  br i1 %24, label %21, label %25, !llvm.loop !15

25:                                               ; preds = %21
  call void @llvm.lifetime.start.p0(i64 8192, ptr nonnull %7) #6
  %26 = load i32, ptr %2, align 4, !tbaa !5
  %27 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNK7sc_core5sc_inIiE4readEv(ptr noundef nonnull align 8 dereferenceable(168) %14)
  %28 = load i32, ptr %27, align 4, !tbaa !5
  %29 = call i32 (ptr, ptr, ...) @sprintf(ptr noundef nonnull dereferenceable(1) %7, ptr noundef nonnull dereferenceable(1) @.str, i32 noundef %26, i32 noundef %28) #6
  %30 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, ptr noundef nonnull %7)
  %31 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %30, ptr noundef nonnull @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  %32 = add nuw nsw i32 %.0, 1
  switch i32 %.0, label %35 [
    i32 2, label %33
    i32 15, label %34
  ]

33:                                               ; preds = %25
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %8) #6
  store i8 1, ptr %8, align 1, !tbaa !9
  call void @_ZN7sc_core8sc_inoutIbE5writeERKb(ptr noundef nonnull align 8 dereferenceable(192) %11, ptr noundef nonnull align 1 dereferenceable(1) %8)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %8) #6
  call void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %9) #6
  store i8 0, ptr %9, align 1, !tbaa !9
  call void @_ZN7sc_core8sc_inoutIbE5writeERKb(ptr noundef nonnull align 8 dereferenceable(192) %11, ptr noundef nonnull align 1 dereferenceable(1) %9)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %9) #6
  call void @_ZN7sc_core9sc_module4waitEi(ptr noundef nonnull align 8 dereferenceable(232) %0, i32 noundef 2)
  br label %35

34:                                               ; preds = %25
  call void @_ZN7sc_core7sc_stopEv()
  br label %35

35:                                               ; preds = %33, %25, %34
  %36 = load i32, ptr %2, align 4, !tbaa !5
  %37 = shl i32 %36, 1
  %38 = or disjoint i32 %37, 1
  store i32 %38, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8192, ptr nonnull %7) #6
  br label %15, !llvm.loop !16
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core8sc_inoutIbE5writeERKb(ptr noundef nonnull align 8 dereferenceable(192), ptr noundef nonnull align 1 dereferenceable(1)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core8sc_inoutIiE5writeERKi(ptr noundef nonnull align 8 dereferenceable(176), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNK7sc_core5sc_inIbEcvRKbEv(ptr noundef nonnull align 8 dereferenceable(184)) local_unnamed_addr #2 align 2

; Function Attrs: nofree nounwind
declare noundef i32 @sprintf(ptr noalias nocapture noundef writeonly, ptr nocapture noundef readonly, ...) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNK7sc_core5sc_inIiE4readEv(ptr noundef nonnull align 8 dereferenceable(168)) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) local_unnamed_addr #4

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(8)) #4

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_module4waitEi(ptr noundef nonnull align 8 dereferenceable(232), i32 noundef) local_unnamed_addr #2 align 2

declare void @_ZN7sc_core7sc_stopEv() local_unnamed_addr #5

attributes #0 = { mustprogress noreturn uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{i8 0, i8 2}
!12 = !{}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,LCSSAPass,LICMPass,LoopInstSimplifyPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass