; LLVM IR from gem5/gem5 :: src/systemc/tests/systemc/misc/stars/star110089 (star110089)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.lp_struct = type { i32, i64, i32, i32, i32, i32, i8 }
%struct.lp_write_buf = type { %"class.sc_core::sc_module", %"class.sc_core::sc_in", %"class.sc_core::sc_in", %"class.sc_core::sc_in.13", %"class.sc_core::sc_in.13", %"class.sc_core::sc_in.21", %"class.sc_core::sc_out", %"class.sc_core::sc_out.36", %"class.sc_core::sc_out.45", %"class.sc_core::sc_inout.54", %"class.sc_core::sc_in.62", %"class.sc_core::sc_out.36", %"class.sc_core::sc_out.70", %"class.sc_core::sc_in.62", %"class.sc_core::sc_out.45", %"class.sc_core::sc_out.36", %"class.sc_core::sc_out.36", %"class.sc_core::sc_out.36" }
%"class.sc_core::sc_module" = type { %"class.sc_core::sc_object", %"class.sc_core::sc_process_host", %"class.sc_core::sc_sensitive", %"class.sc_core::sc_sensitive_pos", %"class.sc_core::sc_sensitive_neg", i8, ptr, i32, ptr, ptr }
%"class.sc_core::sc_object" = type { ptr, ptr, %"class.std::vector", %"class.std::vector.0", %"class.std::__cxx11::basic_string", ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.sc_core::sc_process_host" = type { ptr }
%"class.sc_core::sc_sensitive" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_pos" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_neg" = type { ptr, i32, ptr }
%"class.sc_core::sc_in" = type { %"class.sc_core::sc_port", ptr, ptr, ptr, ptr }
%"class.sc_core::sc_port" = type { %"class.sc_core::sc_port_b" }
%"class.sc_core::sc_port_b" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.8" }
%"class.sc_core::sc_port_base" = type { %"class.sc_core::sc_object", ptr }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_in.13" = type { %"class.sc_core::sc_port.14", ptr, ptr }
%"class.sc_core::sc_port.14" = type { %"class.sc_core::sc_port_b.15" }
%"class.sc_core::sc_port_b.15" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.16" }
%"class.std::vector.16" = type { %"struct.std::_Vector_base.17" }
%"struct.std::_Vector_base.17" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<unsigned int> *, std::allocator<sc_core::sc_signal_in_if<unsigned int> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<unsigned int> *, std::allocator<sc_core::sc_signal_in_if<unsigned int> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<unsigned int> *, std::allocator<sc_core::sc_signal_in_if<unsigned int> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<unsigned int> *, std::allocator<sc_core::sc_signal_in_if<unsigned int> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_in.21" = type { %"class.sc_core::sc_port.22", ptr, ptr }
%"class.sc_core::sc_port.22" = type { %"class.sc_core::sc_port_b.23" }
%"class.sc_core::sc_port_b.23" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.24" }
%"class.std::vector.24" = type { %"struct.std::_Vector_base.25" }
%"struct.std::_Vector_base.25" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<int> *, std::allocator<sc_core::sc_signal_in_if<int> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<int> *, std::allocator<sc_core::sc_signal_in_if<int> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<int> *, std::allocator<sc_core::sc_signal_in_if<int> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<int> *, std::allocator<sc_core::sc_signal_in_if<int> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_out" = type { %"class.sc_core::sc_inout" }
%"class.sc_core::sc_inout" = type { %"class.sc_core::sc_port.29", ptr, ptr, ptr }
%"class.sc_core::sc_port.29" = type { %"class.sc_core::sc_port_b.30" }
%"class.sc_core::sc_port_b.30" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.31" }
%"class.std::vector.31" = type { %"struct.std::_Vector_base.32" }
%"struct.std::_Vector_base.32" = type { %"struct.std::_Vector_base<sc_core::sc_signal_inout_if<int> *, std::allocator<sc_core::sc_signal_inout_if<int> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_inout_if<int> *, std::allocator<sc_core::sc_signal_inout_if<int> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_inout_if<int> *, std::allocator<sc_core::sc_signal_inout_if<int> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_inout_if<int> *, std::allocator<sc_core::sc_signal_inout_if<int> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_inout.54" = type { %"class.sc_core::sc_port.55", ptr, ptr, ptr }
%"class.sc_core::sc_port.55" = type { %"class.sc_core::sc_port_b.56" }
%"class.sc_core::sc_port_b.56" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.57" }
%"class.std::vector.57" = type { %"struct.std::_Vector_base.58" }
%"struct.std::_Vector_base.58" = type { %"struct.std::_Vector_base<sc_core::sc_signal_inout_if<unsigned int> *, std::allocator<sc_core::sc_signal_inout_if<unsigned int> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_inout_if<unsigned int> *, std::allocator<sc_core::sc_signal_inout_if<unsigned int> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_inout_if<unsigned int> *, std::allocator<sc_core::sc_signal_inout_if<unsigned int> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_inout_if<unsigned int> *, std::allocator<sc_core::sc_signal_inout_if<unsigned int> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_out.70" = type { %"class.sc_core::sc_inout.54" }
%"class.sc_core::sc_in.62" = type { %"class.sc_core::sc_port.63", ptr, ptr }
%"class.sc_core::sc_port.63" = type { %"class.sc_core::sc_port_b.64" }
%"class.sc_core::sc_port_b.64" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.65" }
%"class.std::vector.65" = type { %"struct.std::_Vector_base.66" }
%"struct.std::_Vector_base.66" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<char> *, std::allocator<sc_core::sc_signal_in_if<char> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<char> *, std::allocator<sc_core::sc_signal_in_if<char> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<char> *, std::allocator<sc_core::sc_signal_in_if<char> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<char> *, std::allocator<sc_core::sc_signal_in_if<char> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_out.45" = type { %"class.sc_core::sc_inout.46" }
%"class.sc_core::sc_inout.46" = type { %"class.sc_core::sc_port.47", ptr, ptr, ptr }
%"class.sc_core::sc_port.47" = type { %"class.sc_core::sc_port_b.48" }
%"class.sc_core::sc_port_b.48" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.49" }
%"class.std::vector.49" = type { %"struct.std::_Vector_base.50" }
%"struct.std::_Vector_base.50" = type { %"struct.std::_Vector_base<sc_core::sc_signal_inout_if<char> *, std::allocator<sc_core::sc_signal_inout_if<char> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_inout_if<char> *, std::allocator<sc_core::sc_signal_inout_if<char> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_inout_if<char> *, std::allocator<sc_core::sc_signal_inout_if<char> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_inout_if<char> *, std::allocator<sc_core::sc_signal_inout_if<char> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_out.36" = type { %"class.sc_core::sc_inout.37" }
%"class.sc_core::sc_inout.37" = type { %"class.sc_core::sc_port.38", ptr, ptr, ptr, ptr, ptr }
%"class.sc_core::sc_port.38" = type { %"class.sc_core::sc_port_b.39" }
%"class.sc_core::sc_port_b.39" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.40" }
%"class.std::vector.40" = type { %"struct.std::_Vector_base.41" }
%"struct.std::_Vector_base.41" = type { %"struct.std::_Vector_base<sc_core::sc_signal_inout_if<bool> *, std::allocator<sc_core::sc_signal_inout_if<bool> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_inout_if<bool> *, std::allocator<sc_core::sc_signal_inout_if<bool> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_inout_if<bool> *, std::allocator<sc_core::sc_signal_inout_if<bool> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_inout_if<bool> *, std::allocator<sc_core::sc_signal_inout_if<bool> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232)) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN12lp_write_buf14lp_write_buf_fEjji(ptr noundef nonnull align 8 dereferenceable(3280) %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #1 align 2 {
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca [3 x %struct.lp_struct], align 16
  %12 = alloca i64, align 8
  %13 = alloca i64, align 8
  %14 = alloca i64, align 8
  %15 = alloca i32, align 4
  %16 = alloca i8, align 1
  %17 = alloca i8, align 1
  %18 = alloca i8, align 1
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !9
  store i32 %2, ptr %8, align 4, !tbaa !9
  store i32 %3, ptr %9, align 4, !tbaa !9
  %19 = load ptr, ptr %6, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  call void @llvm.lifetime.start.p0(i64 120, ptr %11) #2
  %20 = load i32, ptr %7, align 4, !tbaa !9
  %21 = zext i32 %20 to i64
  %22 = getelementptr inbounds [3 x %struct.lp_struct], ptr %11, i64 0, i64 %21
  %23 = getelementptr inbounds %struct.lp_struct, ptr %22, i32 0, i32 0
  store i32 5, ptr %23, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #2
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #2
  store i64 0, ptr %13, align 8, !tbaa !14
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #2
  %24 = load i32, ptr %7, align 4, !tbaa !9
  %25 = icmp uge i32 %24, 3
  br i1 %25, label %26, label %27

26:                                               ; preds = %4
  call void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %19)
  store i32 -6, ptr %5, align 4
  store i32 1, ptr %15, align 4
  br label %111

27:                                               ; preds = %4
  %28 = load i32, ptr %7, align 4, !tbaa !9
  %29 = zext i32 %28 to i64
  %30 = getelementptr inbounds [3 x %struct.lp_struct], ptr %11, i64 0, i64 %29
  %31 = getelementptr inbounds %struct.lp_struct, ptr %30, i32 0, i32 0
  %32 = load i32, ptr %31, align 8, !tbaa !11
  %33 = icmp eq i32 %32, 0
  br i1 %33, label %34, label %35

34:                                               ; preds = %27
  call void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %19)
  store i32 -6, ptr %5, align 4
  store i32 1, ptr %15, align 4
  br label %111

35:                                               ; preds = %27
  %36 = load i32, ptr %7, align 4, !tbaa !9
  %37 = zext i32 %36 to i64
  %38 = getelementptr inbounds [3 x %struct.lp_struct], ptr %11, i64 0, i64 %37
  %39 = getelementptr inbounds %struct.lp_struct, ptr %38, i32 0, i32 5
  store i32 0, ptr %39, align 4, !tbaa !15
  %40 = load i32, ptr %7, align 4, !tbaa !9
  %41 = zext i32 %40 to i64
  %42 = getelementptr inbounds [3 x %struct.lp_struct], ptr %11, i64 0, i64 %41
  %43 = getelementptr inbounds %struct.lp_struct, ptr %42, i32 0, i32 6
  %44 = load volatile i8, ptr %43, align 8
  %45 = and i8 %44, -2
  %46 = or i8 %45, 0
  store volatile i8 %46, ptr %43, align 8
  %47 = load i32, ptr %7, align 4, !tbaa !9
  %48 = zext i32 %47 to i64
  %49 = getelementptr inbounds [3 x %struct.lp_struct], ptr %11, i64 0, i64 %48
  %50 = getelementptr inbounds %struct.lp_struct, ptr %49, i32 0, i32 6
  %51 = load volatile i8, ptr %50, align 8
  %52 = and i8 %51, -3
  %53 = or i8 %52, 2
  store volatile i8 %53, ptr %50, align 8
  call void @llvm.lifetime.start.p0(i64 1, ptr %16) #2
  store i8 12, ptr %16, align 1, !tbaa !16
  %54 = getelementptr inbounds %struct.lp_write_buf, ptr %19, i32 0, i32 8
  %55 = call noundef nonnull align 8 dereferenceable(176) ptr @_ZN7sc_core6sc_outIcEaSERKc(ptr noundef nonnull align 8 dereferenceable(176) %54, ptr noundef nonnull align 1 dereferenceable(1) %16)
  call void @llvm.lifetime.end.p0(i64 1, ptr %16) #2
  store i32 0, ptr %10, align 4, !tbaa !9
  call void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %19)
  br label %56

56:                                               ; preds = %99, %35
  call void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %19)
  store i64 0, ptr %14, align 8, !tbaa !14
  %57 = load i32, ptr %9, align 4, !tbaa !9
  %58 = icmp sle i32 %57, 32
  br i1 %58, label %59, label %61

59:                                               ; preds = %56
  %60 = load i32, ptr %9, align 4, !tbaa !9
  br label %62

61:                                               ; preds = %56
  br label %62

62:                                               ; preds = %61, %59
  %63 = phi i32 [ %60, %59 ], [ 32, %61 ]
  %64 = sext i32 %63 to i64
  store i64 %64, ptr %12, align 8, !tbaa !14
  %65 = load i32, ptr %7, align 4, !tbaa !9
  %66 = zext i32 %65 to i64
  %67 = getelementptr inbounds [3 x %struct.lp_struct], ptr %11, i64 0, i64 %66
  %68 = getelementptr inbounds %struct.lp_struct, ptr %67, i32 0, i32 4
  %69 = load i32, ptr %68, align 8, !tbaa !17
  %70 = load i32, ptr %8, align 4, !tbaa !9
  %71 = load i64, ptr %12, align 8, !tbaa !14
  %72 = call noundef i32 @_ZN12lp_write_buf14copy_from_userEjjm(ptr noundef nonnull align 8 dereferenceable(3280) %19, i32 noundef %69, i32 noundef %70, i64 noundef %71)
  %73 = icmp ne i32 %72, 0
  br i1 %73, label %74, label %77

74:                                               ; preds = %62
  call void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %19)
  call void @llvm.lifetime.start.p0(i64 1, ptr %17) #2
  store i8 12, ptr %17, align 1, !tbaa !16
  %75 = getelementptr inbounds %struct.lp_write_buf, ptr %19, i32 0, i32 8
  %76 = call noundef nonnull align 8 dereferenceable(176) ptr @_ZN7sc_core6sc_outIcEaSERKc(ptr noundef nonnull align 8 dereferenceable(176) %75, ptr noundef nonnull align 1 dereferenceable(1) %17)
  call void @llvm.lifetime.end.p0(i64 1, ptr %17) #2
  store i32 -14, ptr %10, align 4, !tbaa !9
  br label %92

77:                                               ; preds = %62
  %78 = load i64, ptr %12, align 8, !tbaa !14
  store i64 %78, ptr %14, align 8, !tbaa !14
  %79 = load i64, ptr %14, align 8, !tbaa !14
  %80 = load i64, ptr %13, align 8, !tbaa !14
  %81 = add i64 %80, %79
  store i64 %81, ptr %13, align 8, !tbaa !14
  %82 = load i64, ptr %14, align 8, !tbaa !14
  %83 = load i32, ptr %8, align 4, !tbaa !9
  %84 = zext i32 %83 to i64
  %85 = add i64 %84, %82
  %86 = trunc i64 %85 to i32
  store i32 %86, ptr %8, align 4, !tbaa !9
  %87 = load i64, ptr %14, align 8, !tbaa !14
  %88 = load i32, ptr %9, align 4, !tbaa !9
  %89 = sext i32 %88 to i64
  %90 = sub i64 %89, %87
  %91 = trunc i64 %90 to i32
  store i32 %91, ptr %9, align 4, !tbaa !9
  call void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %19)
  br label %92

92:                                               ; preds = %77, %74
  br label %93

93:                                               ; preds = %92
  %94 = load i32, ptr %9, align 4, !tbaa !9
  %95 = icmp sgt i32 %94, 0
  br i1 %95, label %96, label %99

96:                                               ; preds = %93
  %97 = load i32, ptr %10, align 4, !tbaa !9
  %98 = icmp sge i32 %97, 0
  br label %99

99:                                               ; preds = %96, %93
  %100 = phi i1 [ false, %93 ], [ %98, %96 ]
  br i1 %100, label %56, label %101, !llvm.loop !18

101:                                              ; preds = %99
  call void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %19)
  %102 = load i32, ptr %10, align 4, !tbaa !9
  %103 = icmp sge i32 %102, 0
  br i1 %103, label %104, label %109

104:                                              ; preds = %101
  call void @llvm.lifetime.start.p0(i64 1, ptr %18) #2
  store i8 12, ptr %18, align 1, !tbaa !16
  %105 = getelementptr inbounds %struct.lp_write_buf, ptr %19, i32 0, i32 8
  %106 = call noundef nonnull align 8 dereferenceable(176) ptr @_ZN7sc_core6sc_outIcEaSERKc(ptr noundef nonnull align 8 dereferenceable(176) %105, ptr noundef nonnull align 1 dereferenceable(1) %18)
  call void @llvm.lifetime.end.p0(i64 1, ptr %18) #2
  %107 = load i64, ptr %13, align 8, !tbaa !14
  %108 = trunc i64 %107 to i32
  store i32 %108, ptr %5, align 4
  store i32 1, ptr %15, align 4
  br label %111

109:                                              ; preds = %101
  %110 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %110, ptr %5, align 4
  store i32 1, ptr %15, align 4
  br label %111

111:                                              ; preds = %109, %104, %34, %26
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #2
  call void @llvm.lifetime.end.p0(i64 120, ptr %11) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  %112 = load i32, ptr %5, align 4
  ret i32 %112
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(176) ptr @_ZN7sc_core6sc_outIcEaSERKc(ptr noundef nonnull align 8 dereferenceable(176), ptr noundef nonnull align 1 dereferenceable(1)) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZN12lp_write_buf14copy_from_userEjjm(ptr noundef nonnull align 8 dereferenceable(3280), i32 noundef, i32 noundef, i64 noundef) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"_ZTS9lp_struct", !10, i64 0, !13, i64 8, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 32}
!13 = !{!"long", !7, i64 0}
!14 = !{!13, !13, i64 0}
!15 = !{!12, !10, i64 28}
!16 = !{!7, !7, i64 0}
!17 = !{!12, !10, i64 24}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.lp_struct = type { i32, i64, i32, i32, i32, i32, i8 }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN12lp_write_buf14lp_write_buf_fEjji(ptr noundef nonnull align 8 dereferenceable(3280) %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #1 align 2 {
  %5 = alloca [3 x %struct.lp_struct], align 16
  %6 = alloca i8, align 1
  %7 = alloca i8, align 1
  %8 = alloca i8, align 1
  call void @llvm.lifetime.start.p0(i64 120, ptr nonnull %5) #3
  %9 = zext i32 %1 to i64
  %10 = getelementptr inbounds [3 x %struct.lp_struct], ptr %5, i64 0, i64 %9
  store i32 5, ptr %10, align 8, !tbaa !5
  %11 = icmp ugt i32 %1, 2
  br i1 %11, label %12, label %13

12:                                               ; preds = %4
  tail call void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
  br label %37

13:                                               ; preds = %4
  %14 = getelementptr inbounds i8, ptr %10, i64 28
  store i32 0, ptr %14, align 4, !tbaa !11
  %15 = getelementptr inbounds i8, ptr %10, i64 32
  %16 = load volatile i8, ptr %15, align 8
  %17 = and i8 %16, -2
  store volatile i8 %17, ptr %15, align 8
  %18 = load volatile i8, ptr %15, align 8
  %19 = or i8 %18, 2
  store volatile i8 %19, ptr %15, align 8
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %6) #3
  store i8 12, ptr %6, align 1, !tbaa !12
  %20 = getelementptr inbounds i8, ptr %0, i64 1472
  %21 = call noundef nonnull align 8 dereferenceable(176) ptr @_ZN7sc_core6sc_outIcEaSERKc(ptr noundef nonnull align 8 dereferenceable(176) %20, ptr noundef nonnull align 1 dereferenceable(1) %6)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %6) #3
  call void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
  %22 = getelementptr inbounds i8, ptr %10, i64 24
  br label %23

23:                                               ; preds = %28, %13
  %.029 = phi i32 [ %2, %13 ], [ %30, %28 ]
  %.027 = phi i32 [ %3, %13 ], [ %31, %28 ]
  %.0 = phi i32 [ 0, %13 ], [ %29, %28 ]
  call void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
  %24 = call i32 @llvm.smin.i32(i32 %.027, i32 32)
  %25 = sext i32 %24 to i64
  %26 = load i32, ptr %22, align 8, !tbaa !13
  %27 = call noundef i32 @_ZN12lp_write_buf14copy_from_userEjjm(ptr noundef nonnull align 8 dereferenceable(3280) %0, i32 noundef %26, i32 noundef %.029, i64 noundef %25)
  %.not = icmp eq i32 %27, 0
  br i1 %.not, label %28, label %33

28:                                               ; preds = %23
  %29 = add i32 %.0, %24
  %30 = add i32 %24, %.029
  %31 = sub i32 %.027, %24
  call void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
  %32 = icmp sgt i32 %31, 0
  br i1 %32, label %23, label %35, !llvm.loop !14

33:                                               ; preds = %23
  call void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %7) #3
  store i8 12, ptr %7, align 1, !tbaa !12
  %34 = call noundef nonnull align 8 dereferenceable(176) ptr @_ZN7sc_core6sc_outIcEaSERKc(ptr noundef nonnull align 8 dereferenceable(176) %20, ptr noundef nonnull align 1 dereferenceable(1) %7)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %7) #3
  call void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
  br label %37

35:                                               ; preds = %28
  call void @_ZN7sc_core9sc_module4waitEv(ptr noundef nonnull align 8 dereferenceable(232) %0)
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %8) #3
  store i8 12, ptr %8, align 1, !tbaa !12
  %36 = call noundef nonnull align 8 dereferenceable(176) ptr @_ZN7sc_core6sc_outIcEaSERKc(ptr noundef nonnull align 8 dereferenceable(176) %20, ptr noundef nonnull align 1 dereferenceable(1) %8)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %8) #3
  br label %37

37:                                               ; preds = %33, %35, %12
  %.024 = phi i32 [ -6, %12 ], [ %29, %35 ], [ -14, %33 ]
  call void @llvm.lifetime.end.p0(i64 120, ptr nonnull %5) #3
  ret i32 %.024
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(176) ptr @_ZN7sc_core6sc_outIcEaSERKc(ptr noundef nonnull align 8 dereferenceable(176), ptr noundef nonnull align 1 dereferenceable(1)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZN12lp_write_buf14copy_from_userEjjm(ptr noundef nonnull align 8 dereferenceable(3280), i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS9lp_struct", !7, i64 0, !10, i64 8, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 32}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!6, !7, i64 28}
!12 = !{!8, !8, i64 0}
!13 = !{!6, !7, i64 24}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: AggressiveInstCombinePass,ConstraintEliminationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass