; LLVM IR from gem5/gem5 :: src/systemc/tests/systemc/misc/sim_tests/biquad/biquad3 (main)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_core::sc_signal" = type <{ %"class.sc_core::sc_signal_inout_if", %"class.sc_core::sc_prim_channel", %"struct.sc_core::sc_writer_policy_check", ptr, float, [4 x i8], i64, float, [4 x i8] }>
%"class.sc_core::sc_signal_inout_if" = type { %"class.sc_core::sc_signal_in_if", %"class.sc_core::sc_signal_write_if" }
%"class.sc_core::sc_signal_in_if" = type { %"class.sc_core::sc_interface" }
%"class.sc_core::sc_interface" = type { ptr }
%"class.sc_core::sc_signal_write_if" = type { %"class.sc_core::sc_interface" }
%"class.sc_core::sc_prim_channel" = type { %"class.sc_core::sc_object", ptr, ptr }
%"class.sc_core::sc_object" = type { ptr, ptr, %"class.std::vector", %"class.std::vector.0", %"class.std::__cxx11::basic_string", ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"struct.sc_core::sc_writer_policy_check" = type { %"struct.sc_core::sc_writer_policy_check_port", %"struct.sc_core::sc_writer_policy_check_write" }
%"struct.sc_core::sc_writer_policy_check_port" = type { ptr }
%"struct.sc_core::sc_writer_policy_check_write" = type { i8, ptr }
%"class.sc_core::sc_signal.8" = type { %"class.sc_core::sc_signal_inout_if.9", %"class.sc_core::sc_prim_channel", %"struct.sc_core::sc_writer_policy_check", ptr, i8, i64, ptr, i8, ptr, ptr }
%"class.sc_core::sc_signal_inout_if.9" = type { %"class.sc_core::sc_signal_in_if.10", %"class.sc_core::sc_signal_write_if.11" }
%"class.sc_core::sc_signal_in_if.10" = type { %"class.sc_core::sc_interface" }
%"class.sc_core::sc_signal_write_if.11" = type { %"class.sc_core::sc_interface" }
%"class.sc_core::sc_clock" = type { %"class.sc_core::sc_signal.8", %"class.sc_core::sc_time", double, %"class.sc_core::sc_time", i8, %"class.sc_core::sc_time", %"class.sc_core::sc_time", %"class.sc_core::sc_event", %"class.sc_core::sc_event" }
%"class.sc_core::sc_time" = type { i64 }
%"class.sc_core::sc_event" = type { %"class.std::__cxx11::basic_string", ptr, ptr, i32, i32, ptr, %"class.std::vector.12", %"class.std::vector.12", %"class.std::vector.17", %"class.std::vector.17" }
%"class.std::vector.12" = type { %"struct.std::_Vector_base.13" }
%"struct.std::_Vector_base.13" = type { %"struct.std::_Vector_base<sc_core::sc_method_process *, std::allocator<sc_core::sc_method_process *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_method_process *, std::allocator<sc_core::sc_method_process *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_method_process *, std::allocator<sc_core::sc_method_process *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_method_process *, std::allocator<sc_core::sc_method_process *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.17" = type { %"struct.std::_Vector_base.18" }
%"struct.std::_Vector_base.18" = type { %"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.biquad = type { %"class.sc_core::sc_module", %"class.sc_core::sc_in", %"class.sc_core::sc_in.27", %"class.sc_core::sc_out", i32, [4 x float], [5 x float] }
%"class.sc_core::sc_module" = type { %"class.sc_core::sc_object", %"class.sc_core::sc_process_host", %"class.sc_core::sc_sensitive", %"class.sc_core::sc_sensitive_pos", %"class.sc_core::sc_sensitive_neg", i8, ptr, i32, ptr, ptr }
%"class.sc_core::sc_process_host" = type { ptr }
%"class.sc_core::sc_sensitive" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_pos" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_neg" = type { ptr, i32, ptr }
%"class.sc_core::sc_in" = type { %"class.sc_core::sc_port", ptr, ptr }
%"class.sc_core::sc_port" = type { %"class.sc_core::sc_port_b" }
%"class.sc_core::sc_port_b" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.22" }
%"class.sc_core::sc_port_base" = type { %"class.sc_core::sc_object", ptr }
%"class.std::vector.22" = type { %"struct.std::_Vector_base.23" }
%"struct.std::_Vector_base.23" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<float> *, std::allocator<sc_core::sc_signal_in_if<float> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<float> *, std::allocator<sc_core::sc_signal_in_if<float> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<float> *, std::allocator<sc_core::sc_signal_in_if<float> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<float> *, std::allocator<sc_core::sc_signal_in_if<float> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_in.27" = type { %"class.sc_core::sc_port.28", ptr, ptr, ptr, ptr }
%"class.sc_core::sc_port.28" = type { %"class.sc_core::sc_port_b.29" }
%"class.sc_core::sc_port_b.29" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.30" }
%"class.std::vector.30" = type { %"struct.std::_Vector_base.31" }
%"struct.std::_Vector_base.31" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_out" = type { %"class.sc_core::sc_inout" }
%"class.sc_core::sc_inout" = type { %"class.sc_core::sc_port.35", ptr, ptr, ptr }
%"class.sc_core::sc_port.35" = type { %"class.sc_core::sc_port_b.36" }
%"class.sc_core::sc_port_b.36" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.37" }
%"class.std::vector.37" = type { %"struct.std::_Vector_base.38" }
%"struct.std::_Vector_base.38" = type { %"struct.std::_Vector_base<sc_core::sc_signal_inout_if<float> *, std::allocator<sc_core::sc_signal_inout_if<float> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_inout_if<float> *, std::allocator<sc_core::sc_signal_inout_if<float> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_inout_if<float> *, std::allocator<sc_core::sc_signal_inout_if<float> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_inout_if<float> *, std::allocator<sc_core::sc_signal_inout_if<float> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_module_name" = type <{ ptr, ptr, ptr, ptr, i8, [7 x i8] }>
%struct.testbench = type { %"class.sc_core::sc_module", %"class.sc_core::sc_in.27", %"class.sc_core::sc_in", %"class.sc_core::sc_out.42", %"class.sc_core::sc_out" }
%"class.sc_core::sc_out.42" = type { %"class.sc_core::sc_inout.43" }
%"class.sc_core::sc_inout.43" = type { %"class.sc_core::sc_port.44", ptr, ptr, ptr, ptr, ptr }
%"class.sc_core::sc_port.44" = type { %"class.sc_core::sc_port_b.45" }
%"class.sc_core::sc_port_b.45" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.46" }
%"class.std::vector.46" = type { %"struct.std::_Vector_base.47" }
%"struct.std::_Vector_base.47" = type { %"struct.std::_Vector_base<sc_core::sc_signal_inout_if<bool> *, std::allocator<sc_core::sc_signal_inout_if<bool> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_inout_if<bool> *, std::allocator<sc_core::sc_signal_inout_if<bool> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_inout_if<bool> *, std::allocator<sc_core::sc_signal_inout_if<bool> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_inout_if<bool> *, std::allocator<sc_core::sc_signal_inout_if<bool> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.delay_line = type { %"class.sc_core::sc_module", %"class.sc_core::sc_in", %"class.sc_core::sc_out", i32, ptr }

@signal_freq = external dso_local global float, align 4
@.str = external hidden unnamed_addr constant [6 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [8 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [3 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [6 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local i32 @sc_main(i32 noundef %0, ptr noundef %1) #0 personality ptr @__gxx_personality_v0 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca %"class.sc_core::sc_signal", align 8
  %6 = alloca %"class.sc_core::sc_signal", align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca %"class.sc_core::sc_signal.8", align 8
  %10 = alloca %"class.sc_core::sc_signal", align 8
  %11 = alloca float, align 4
  %12 = alloca float, align 4
  %13 = alloca i8, align 1
  %14 = alloca float, align 4
  %15 = alloca %"class.sc_core::sc_clock", align 8
  %16 = alloca %struct.biquad, align 8
  %17 = alloca %"class.sc_core::sc_module_name", align 8
  %18 = alloca %struct.testbench, align 8
  %19 = alloca %"class.sc_core::sc_module_name", align 8
  %20 = alloca %struct.delay_line, align 8
  %21 = alloca %"class.sc_core::sc_module_name", align 8
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 200, ptr %5) #8
  call void @_ZN7sc_core9sc_signalIfLNS_16sc_writer_policyE0EEC1Ev(ptr noundef nonnull align 8 dereferenceable(196) %5)
  call void @llvm.lifetime.start.p0(i64 200, ptr %6) #8
  invoke void @_ZN7sc_core9sc_signalIfLNS_16sc_writer_policyE0EEC1Ev(ptr noundef nonnull align 8 dereferenceable(196) %6)
          to label %24 unwind label %47

24:                                               ; preds = %2
  call void @llvm.lifetime.start.p0(i64 224, ptr %9) #8
  invoke void @_ZN7sc_core9sc_signalIbLNS_16sc_writer_policyE0EEC1Ev(ptr noundef nonnull align 8 dereferenceable(224) %9)
          to label %25 unwind label %51

25:                                               ; preds = %24
  call void @llvm.lifetime.start.p0(i64 200, ptr %10) #8
  invoke void @_ZN7sc_core9sc_signalIfLNS_16sc_writer_policyE0EEC1Ev(ptr noundef nonnull align 8 dereferenceable(196) %10)
          to label %26 unwind label %55

26:                                               ; preds = %25
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #8
  store float 0.000000e+00, ptr %11, align 4, !tbaa !11
  %27 = invoke noundef nonnull align 8 dereferenceable(196) ptr @_ZN7sc_core9sc_signalIfLNS_16sc_writer_policyE0EEaSERKf(ptr noundef nonnull align 8 dereferenceable(196) %5, ptr noundef nonnull align 4 dereferenceable(4) %11)
          to label %28 unwind label %59

28:                                               ; preds = %26
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #8
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #8
  store float 0.000000e+00, ptr %12, align 4, !tbaa !11
  %29 = invoke noundef nonnull align 8 dereferenceable(196) ptr @_ZN7sc_core9sc_signalIfLNS_16sc_writer_policyE0EEaSERKf(ptr noundef nonnull align 8 dereferenceable(196) %6, ptr noundef nonnull align 4 dereferenceable(4) %12)
          to label %30 unwind label %63

30:                                               ; preds = %28
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #8
  call void @llvm.lifetime.start.p0(i64 1, ptr %13) #8
  store i8 0, ptr %13, align 1, !tbaa !13
  %31 = invoke noundef nonnull align 8 dereferenceable(224) ptr @_ZN7sc_core9sc_signalIbLNS_16sc_writer_policyE0EEaSERKb(ptr noundef nonnull align 8 dereferenceable(224) %9, ptr noundef nonnull align 1 dereferenceable(1) %13)
          to label %32 unwind label %67

32:                                               ; preds = %30
  call void @llvm.lifetime.end.p0(i64 1, ptr %13) #8
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #8
  store float 0.000000e+00, ptr %14, align 4, !tbaa !11
  %33 = invoke noundef nonnull align 8 dereferenceable(196) ptr @_ZN7sc_core9sc_signalIfLNS_16sc_writer_policyE0EEaSERKf(ptr noundef nonnull align 8 dereferenceable(196) %10, ptr noundef nonnull align 4 dereferenceable(4) %14)
          to label %34 unwind label %71

34:                                               ; preds = %32
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #8
  call void @llvm.lifetime.start.p0(i64 592, ptr %15) #8
  invoke void @_ZN7sc_core8sc_clockC1EPKcdNS_12sc_time_unitEd(ptr noundef nonnull align 8 dereferenceable(592) %15, ptr noundef @.str, double noundef 1.000000e+01, i32 noundef 2, double noundef 5.000000e-01)
          to label %35 unwind label %75

35:                                               ; preds = %34
  call void @llvm.lifetime.start.p0(i64 800, ptr %16) #8
  invoke void @_ZN7sc_core14sc_module_nameC1EPKc(ptr noundef nonnull align 8 dereferenceable(33) %17, ptr noundef @.str.2)
          to label %36 unwind label %79

36:                                               ; preds = %35
  invoke void @_ZN6biquadC2EN7sc_core14sc_module_nameERNS0_9sc_signalIfLNS0_16sc_writer_policyE0EEERNS2_IbLS3_0EEES5_(ptr noundef nonnull align 8 dereferenceable(800) %16, ptr noundef %17, ptr noundef nonnull align 8 dereferenceable(196) %5, ptr noundef nonnull align 8 dereferenceable(224) %9, ptr noundef nonnull align 8 dereferenceable(196) %6)
          to label %37 unwind label %83

37:                                               ; preds = %36
  call void @_ZN7sc_core14sc_module_nameD1Ev(ptr noundef nonnull align 8 dereferenceable(33) %17) #8
  call void @llvm.lifetime.start.p0(i64 952, ptr %18) #8
  invoke void @_ZN7sc_core14sc_module_nameC1EPKc(ptr noundef nonnull align 8 dereferenceable(33) %19, ptr noundef @.str.3)
          to label %38 unwind label %87

38:                                               ; preds = %37
  invoke void @_ZN9testbenchC2EN7sc_core14sc_module_nameERNS0_8sc_clockERNS0_9sc_signalIfLNS0_16sc_writer_policyE0EEERNS4_IbLS5_0EEES7_(ptr noundef nonnull align 8 dereferenceable(952) %18, ptr noundef %19, ptr noundef nonnull align 8 dereferenceable(592) %15, ptr noundef nonnull align 8 dereferenceable(196) %10, ptr noundef nonnull align 8 dereferenceable(224) %9, ptr noundef nonnull align 8 dereferenceable(196) %5)
          to label %39 unwind label %91

39:                                               ; preds = %38
  call void @_ZN7sc_core14sc_module_nameD1Ev(ptr noundef nonnull align 8 dereferenceable(33) %19) #8
  call void @llvm.lifetime.start.p0(i64 592, ptr %20) #8
  invoke void @_ZN7sc_core14sc_module_nameC1EPKc(ptr noundef nonnull align 8 dereferenceable(33) %21, ptr noundef @.str.4)
          to label %40 unwind label %95

40:                                               ; preds = %39
  invoke void @_ZN10delay_lineC2EN7sc_core14sc_module_nameERNS0_9sc_signalIfLNS0_16sc_writer_policyE0EEES5_i(ptr noundef nonnull align 8 dereferenceable(592) %20, ptr noundef %21, ptr noundef nonnull align 8 dereferenceable(196) %6, ptr noundef nonnull align 8 dereferenceable(196) %10, i32 noundef 300)
          to label %41 unwind label %99

41:                                               ; preds = %40
  call void @_ZN7sc_core14sc_module_nameD1Ev(ptr noundef nonnull align 8 dereferenceable(33) %21) #8
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #8
  store i32 10000, ptr %22, align 4, !tbaa !5
  store float 1.000000e+05, ptr @signal_freq, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #8
  store i32 1, ptr %23, align 4, !tbaa !5
  br label %42

42:                                               ; preds = %131, %41
  %43 = load i32, ptr %23, align 4, !tbaa !5
  %44 = load i32, ptr %3, align 4, !tbaa !5
  %45 = icmp slt i32 %43, %44
  br i1 %45, label %103, label %46

46:                                               ; preds = %42
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #8
  br label %134

47:                                               ; preds = %2
  %48 = landingpad { ptr, i32 }
          cleanup
  %49 = extractvalue { ptr, i32 } %48, 0
  store ptr %49, ptr %7, align 8
  %50 = extractvalue { ptr, i32 } %48, 1
  store i32 %50, ptr %8, align 4
  br label %148

51:                                               ; preds = %24
  %52 = landingpad { ptr, i32 }
          cleanup
  %53 = extractvalue { ptr, i32 } %52, 0
  store ptr %53, ptr %7, align 8
  %54 = extractvalue { ptr, i32 } %52, 1
  store i32 %54, ptr %8, align 4
  br label %147

55:                                               ; preds = %25
  %56 = landingpad { ptr, i32 }
          cleanup
  %57 = extractvalue { ptr, i32 } %56, 0
  store ptr %57, ptr %7, align 8
  %58 = extractvalue { ptr, i32 } %56, 1
  store i32 %58, ptr %8, align 4
  br label %146

59:                                               ; preds = %26
  %60 = landingpad { ptr, i32 }
          cleanup
  %61 = extractvalue { ptr, i32 } %60, 0
  store ptr %61, ptr %7, align 8
  %62 = extractvalue { ptr, i32 } %60, 1
  store i32 %62, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #8
  br label %145

63:                                               ; preds = %28
  %64 = landingpad { ptr, i32 }
          cleanup
  %65 = extractvalue { ptr, i32 } %64, 0
  store ptr %65, ptr %7, align 8
  %66 = extractvalue { ptr, i32 } %64, 1
  store i32 %66, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #8
  br label %145

67:                                               ; preds = %30
  %68 = landingpad { ptr, i32 }
          cleanup
  %69 = extractvalue { ptr, i32 } %68, 0
  store ptr %69, ptr %7, align 8
  %70 = extractvalue { ptr, i32 } %68, 1
  store i32 %70, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 1, ptr %13) #8
  br label %145

71:                                               ; preds = %32
  %72 = landingpad { ptr, i32 }
          cleanup
  %73 = extractvalue { ptr, i32 } %72, 0
  store ptr %73, ptr %7, align 8
  %74 = extractvalue { ptr, i32 } %72, 1
  store i32 %74, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #8
  br label %145

75:                                               ; preds = %34
  %76 = landingpad { ptr, i32 }
          cleanup
  %77 = extractvalue { ptr, i32 } %76, 0
  store ptr %77, ptr %7, align 8
  %78 = extractvalue { ptr, i32 } %76, 1
  store i32 %78, ptr %8, align 4
  br label %144

79:                                               ; preds = %35
  %80 = landingpad { ptr, i32 }
          cleanup
  %81 = extractvalue { ptr, i32 } %80, 0
  store ptr %81, ptr %7, align 8
  %82 = extractvalue { ptr, i32 } %80, 1
  store i32 %82, ptr %8, align 4
  br label %143

83:                                               ; preds = %36
  %84 = landingpad { ptr, i32 }
          cleanup
  %85 = extractvalue { ptr, i32 } %84, 0
  store ptr %85, ptr %7, align 8
  %86 = extractvalue { ptr, i32 } %84, 1
  store i32 %86, ptr %8, align 4
  call void @_ZN7sc_core14sc_module_nameD1Ev(ptr noundef nonnull align 8 dereferenceable(33) %17) #8
  br label %143

87:                                               ; preds = %37
  %88 = landingpad { ptr, i32 }
          cleanup
  %89 = extractvalue { ptr, i32 } %88, 0
  store ptr %89, ptr %7, align 8
  %90 = extractvalue { ptr, i32 } %88, 1
  store i32 %90, ptr %8, align 4
  br label %142

91:                                               ; preds = %38
  %92 = landingpad { ptr, i32 }
          cleanup
  %93 = extractvalue { ptr, i32 } %92, 0
  store ptr %93, ptr %7, align 8
  %94 = extractvalue { ptr, i32 } %92, 1
  store i32 %94, ptr %8, align 4
  call void @_ZN7sc_core14sc_module_nameD1Ev(ptr noundef nonnull align 8 dereferenceable(33) %19) #8
  br label %142

95:                                               ; preds = %39
  %96 = landingpad { ptr, i32 }
          cleanup
  %97 = extractvalue { ptr, i32 } %96, 0
  store ptr %97, ptr %7, align 8
  %98 = extractvalue { ptr, i32 } %96, 1
  store i32 %98, ptr %8, align 4
  br label %141

99:                                               ; preds = %40
  %100 = landingpad { ptr, i32 }
          cleanup
  %101 = extractvalue { ptr, i32 } %100, 0
  store ptr %101, ptr %7, align 8
  %102 = extractvalue { ptr, i32 } %100, 1
  store i32 %102, ptr %8, align 4
  call void @_ZN7sc_core14sc_module_nameD1Ev(ptr noundef nonnull align 8 dereferenceable(33) %21) #8
  br label %141

103:                                              ; preds = %42
  %104 = load ptr, ptr %4, align 8, !tbaa !9
  %105 = load i32, ptr %23, align 4, !tbaa !5
  %106 = sext i32 %105 to i64
  %107 = getelementptr inbounds ptr, ptr %104, i64 %106
  %108 = load ptr, ptr %107, align 8, !tbaa !9
  %109 = getelementptr inbounds i8, ptr %108, i64 0
  %110 = load i8, ptr %109, align 1, !tbaa !15
  %111 = sext i8 %110 to i32
  %112 = icmp eq i32 %111, 45
  br i1 %112, label %113, label %124

113:                                              ; preds = %103
  %114 = load ptr, ptr %4, align 8, !tbaa !9
  %115 = load i32, ptr %23, align 4, !tbaa !5
  %116 = add nsw i32 %115, 1
  %117 = sext i32 %116 to i64
  %118 = getelementptr inbounds ptr, ptr %114, i64 %117
  %119 = load ptr, ptr %118, align 8, !tbaa !9
  %120 = call double @atof(ptr noundef %119) #9
  %121 = fptrunc double %120 to float
  store float %121, ptr @signal_freq, align 4, !tbaa !11
  %122 = load i32, ptr %23, align 4, !tbaa !5
  %123 = add nsw i32 %122, 1
  store i32 %123, ptr %23, align 4, !tbaa !5
  br label %131

124:                                              ; preds = %103
  %125 = load ptr, ptr %4, align 8, !tbaa !9
  %126 = load i32, ptr %23, align 4, !tbaa !5
  %127 = sext i32 %126 to i64
  %128 = getelementptr inbounds ptr, ptr %125, i64 %127
  %129 = load ptr, ptr %128, align 8, !tbaa !9
  %130 = call i32 @atoi(ptr noundef %129) #9
  store i32 %130, ptr %22, align 4, !tbaa !5
  br label %131

131:                                              ; preds = %124, %113
  %132 = load i32, ptr %23, align 4, !tbaa !5
  %133 = add nsw i32 %132, 1
  store i32 %133, ptr %23, align 4, !tbaa !5
  br label %42, !llvm.loop !16

134:                                              ; preds = %46
  %135 = load i32, ptr %22, align 4, !tbaa !5
  invoke void @_ZN7sc_core8sc_startEiNS_12sc_time_unitENS_20sc_starvation_policyE(i32 noundef %135, i32 noundef 2, i32 noundef 1)
          to label %136 unwind label %137

136:                                              ; preds = %134
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #8
  call void @_ZN10delay_lineD2Ev(ptr noundef nonnull align 8 dereferenceable(592) %20) #8
  call void @llvm.lifetime.end.p0(i64 592, ptr %20) #8
  call void @_ZN9testbenchD2Ev(ptr noundef nonnull align 8 dereferenceable(952) %18) #8
  call void @llvm.lifetime.end.p0(i64 952, ptr %18) #8
  call void @_ZN6biquadD2Ev(ptr noundef nonnull align 8 dereferenceable(800) %16) #8
  call void @llvm.lifetime.end.p0(i64 800, ptr %16) #8
  call void @_ZN7sc_core8sc_clockD1Ev(ptr noundef nonnull align 8 dereferenceable(592) %15) #8
  call void @llvm.lifetime.end.p0(i64 592, ptr %15) #8
  call void @_ZN7sc_core9sc_signalIfLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(196) %10) #8
  call void @llvm.lifetime.end.p0(i64 200, ptr %10) #8
  call void @_ZN7sc_core9sc_signalIbLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(224) %9) #8
  call void @llvm.lifetime.end.p0(i64 224, ptr %9) #8
  call void @_ZN7sc_core9sc_signalIfLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(196) %6) #8
  call void @llvm.lifetime.end.p0(i64 200, ptr %6) #8
  call void @_ZN7sc_core9sc_signalIfLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(196) %5) #8
  call void @llvm.lifetime.end.p0(i64 200, ptr %5) #8
  ret i32 0

137:                                              ; preds = %134
  %138 = landingpad { ptr, i32 }
          cleanup
  %139 = extractvalue { ptr, i32 } %138, 0
  store ptr %139, ptr %7, align 8
  %140 = extractvalue { ptr, i32 } %138, 1
  store i32 %140, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #8
  call void @_ZN10delay_lineD2Ev(ptr noundef nonnull align 8 dereferenceable(592) %20) #8
  br label %141

141:                                              ; preds = %137, %99, %95
  call void @llvm.lifetime.end.p0(i64 592, ptr %20) #8
  call void @_ZN9testbenchD2Ev(ptr noundef nonnull align 8 dereferenceable(952) %18) #8
  br label %142

142:                                              ; preds = %141, %91, %87
  call void @llvm.lifetime.end.p0(i64 952, ptr %18) #8
  call void @_ZN6biquadD2Ev(ptr noundef nonnull align 8 dereferenceable(800) %16) #8
  br label %143

143:                                              ; preds = %142, %83, %79
  call void @llvm.lifetime.end.p0(i64 800, ptr %16) #8
  call void @_ZN7sc_core8sc_clockD1Ev(ptr noundef nonnull align 8 dereferenceable(592) %15) #8
  br label %144

144:                                              ; preds = %143, %75
  call void @llvm.lifetime.end.p0(i64 592, ptr %15) #8
  br label %145

145:                                              ; preds = %144, %71, %67, %63, %59
  call void @_ZN7sc_core9sc_signalIfLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(196) %10) #8
  br label %146

146:                                              ; preds = %145, %55
  call void @llvm.lifetime.end.p0(i64 200, ptr %10) #8
  call void @_ZN7sc_core9sc_signalIbLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(224) %9) #8
  br label %147

147:                                              ; preds = %146, %51
  call void @llvm.lifetime.end.p0(i64 224, ptr %9) #8
  call void @_ZN7sc_core9sc_signalIfLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(196) %6) #8
  br label %148

148:                                              ; preds = %147, %47
  call void @llvm.lifetime.end.p0(i64 200, ptr %6) #8
  call void @_ZN7sc_core9sc_signalIfLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(196) %5) #8
  call void @llvm.lifetime.end.p0(i64 200, ptr %5) #8
  br label %149

149:                                              ; preds = %148
  %150 = load ptr, ptr %7, align 8
  %151 = load i32, ptr %8, align 4
  %152 = insertvalue { ptr, i32 } poison, ptr %150, 0
  %153 = insertvalue { ptr, i32 } %152, i32 %151, 1
  resume { ptr, i32 } %153
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_signalIfLNS_16sc_writer_policyE0EEC1Ev(ptr noundef nonnull align 8 dereferenceable(196)) unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_signalIbLNS_16sc_writer_policyE0EEC1Ev(ptr noundef nonnull align 8 dereferenceable(224)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(196) ptr @_ZN7sc_core9sc_signalIfLNS_16sc_writer_policyE0EEaSERKf(ptr noundef nonnull align 8 dereferenceable(196), ptr noundef nonnull align 4 dereferenceable(4)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(224) ptr @_ZN7sc_core9sc_signalIbLNS_16sc_writer_policyE0EEaSERKb(ptr noundef nonnull align 8 dereferenceable(224), ptr noundef nonnull align 1 dereferenceable(1)) #0 align 2

declare void @_ZN7sc_core8sc_clockC1EPKcdNS_12sc_time_unitEd(ptr noundef nonnull align 8 dereferenceable(592), ptr noundef, double noundef, i32 noundef, double noundef) unnamed_addr #2

declare void @_ZN7sc_core14sc_module_nameC1EPKc(ptr noundef nonnull align 8 dereferenceable(33), ptr noundef) unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6biquadC2EN7sc_core14sc_module_nameERNS0_9sc_signalIfLNS0_16sc_writer_policyE0EEERNS2_IbLS3_0EEES5_(ptr noundef nonnull align 8 dereferenceable(800), ptr noundef, ptr noundef nonnull align 8 dereferenceable(196), ptr noundef nonnull align 8 dereferenceable(224), ptr noundef nonnull align 8 dereferenceable(196)) unnamed_addr #0 align 2

; Function Attrs: nounwind
declare void @_ZN7sc_core14sc_module_nameD1Ev(ptr noundef nonnull align 8 dereferenceable(33)) unnamed_addr #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN9testbenchC2EN7sc_core14sc_module_nameERNS0_8sc_clockERNS0_9sc_signalIfLNS0_16sc_writer_policyE0EEERNS4_IbLS5_0EEES7_(ptr noundef nonnull align 8 dereferenceable(952), ptr noundef, ptr noundef nonnull align 8 dereferenceable(592), ptr noundef nonnull align 8 dereferenceable(196), ptr noundef nonnull align 8 dereferenceable(224), ptr noundef nonnull align 8 dereferenceable(196)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN10delay_lineC2EN7sc_core14sc_module_nameERNS0_9sc_signalIfLNS0_16sc_writer_policyE0EEES5_i(ptr noundef nonnull align 8 dereferenceable(592), ptr noundef, ptr noundef nonnull align 8 dereferenceable(196), ptr noundef nonnull align 8 dereferenceable(196), i32 noundef) unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind willreturn memory(read) uwtable
declare double @atof(ptr noundef nonnull) #4

; Function Attrs: inlinehint mustprogress nounwind willreturn memory(read) uwtable
declare i32 @atoi(ptr noundef nonnull) #4

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN7sc_core8sc_startEiNS_12sc_time_unitENS_20sc_starvation_policyE(i32 noundef, i32 noundef, i32 noundef) #5

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN10delay_lineD2Ev(ptr noundef nonnull align 8 dereferenceable(592)) unnamed_addr #6 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN9testbenchD2Ev(ptr noundef nonnull align 8 dereferenceable(952)) unnamed_addr #6 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN6biquadD2Ev(ptr noundef nonnull align 8 dereferenceable(800)) unnamed_addr #6 align 2

; Function Attrs: nounwind
declare void @_ZN7sc_core8sc_clockD1Ev(ptr noundef nonnull align 8 dereferenceable(592)) unnamed_addr #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7sc_core9sc_signalIfLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(196)) unnamed_addr #7 align 2

; Function Attrs: nounwind
declare void @_ZN7sc_core9sc_signalIbLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(224)) unnamed_addr #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind willreturn memory(read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { nounwind }
attributes #9 = { nounwind willreturn memory(read) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"float", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"bool", !7, i64 0}
!15 = !{!7, !7, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_core::sc_signal" = type <{ %"class.sc_core::sc_signal_inout_if", %"class.sc_core::sc_prim_channel", %"struct.sc_core::sc_writer_policy_check", ptr, float, [4 x i8], i64, float, [4 x i8] }>
%"class.sc_core::sc_signal_inout_if" = type { %"class.sc_core::sc_signal_in_if", %"class.sc_core::sc_signal_write_if" }
%"class.sc_core::sc_signal_in_if" = type { %"class.sc_core::sc_interface" }
%"class.sc_core::sc_interface" = type { ptr }
%"class.sc_core::sc_signal_write_if" = type { %"class.sc_core::sc_interface" }
%"class.sc_core::sc_prim_channel" = type { %"class.sc_core::sc_object", ptr, ptr }
%"class.sc_core::sc_object" = type { ptr, ptr, %"class.std::vector", %"class.std::vector.0", %"class.std::__cxx11::basic_string", ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"struct.sc_core::sc_writer_policy_check" = type { %"struct.sc_core::sc_writer_policy_check_port", %"struct.sc_core::sc_writer_policy_check_write" }
%"struct.sc_core::sc_writer_policy_check_port" = type { ptr }
%"struct.sc_core::sc_writer_policy_check_write" = type { i8, ptr }
%"class.sc_core::sc_signal.8" = type { %"class.sc_core::sc_signal_inout_if.9", %"class.sc_core::sc_prim_channel", %"struct.sc_core::sc_writer_policy_check", ptr, i8, i64, ptr, i8, ptr, ptr }
%"class.sc_core::sc_signal_inout_if.9" = type { %"class.sc_core::sc_signal_in_if.10", %"class.sc_core::sc_signal_write_if.11" }
%"class.sc_core::sc_signal_in_if.10" = type { %"class.sc_core::sc_interface" }
%"class.sc_core::sc_signal_write_if.11" = type { %"class.sc_core::sc_interface" }
%"class.sc_core::sc_clock" = type { %"class.sc_core::sc_signal.8", %"class.sc_core::sc_time", double, %"class.sc_core::sc_time", i8, %"class.sc_core::sc_time", %"class.sc_core::sc_time", %"class.sc_core::sc_event", %"class.sc_core::sc_event" }
%"class.sc_core::sc_time" = type { i64 }
%"class.sc_core::sc_event" = type { %"class.std::__cxx11::basic_string", ptr, ptr, i32, i32, ptr, %"class.std::vector.12", %"class.std::vector.12", %"class.std::vector.17", %"class.std::vector.17" }
%"class.std::vector.12" = type { %"struct.std::_Vector_base.13" }
%"struct.std::_Vector_base.13" = type { %"struct.std::_Vector_base<sc_core::sc_method_process *, std::allocator<sc_core::sc_method_process *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_method_process *, std::allocator<sc_core::sc_method_process *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_method_process *, std::allocator<sc_core::sc_method_process *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_method_process *, std::allocator<sc_core::sc_method_process *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.17" = type { %"struct.std::_Vector_base.18" }
%"struct.std::_Vector_base.18" = type { %"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.biquad = type { %"class.sc_core::sc_module", %"class.sc_core::sc_in", %"class.sc_core::sc_in.27", %"class.sc_core::sc_out", i32, [4 x float], [5 x float] }
%"class.sc_core::sc_module" = type { %"class.sc_core::sc_object", %"class.sc_core::sc_process_host", %"class.sc_core::sc_sensitive", %"class.sc_core::sc_sensitive_pos", %"class.sc_core::sc_sensitive_neg", i8, ptr, i32, ptr, ptr }
%"class.sc_core::sc_process_host" = type { ptr }
%"class.sc_core::sc_sensitive" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_pos" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_neg" = type { ptr, i32, ptr }
%"class.sc_core::sc_in" = type { %"class.sc_core::sc_port", ptr, ptr }
%"class.sc_core::sc_port" = type { %"class.sc_core::sc_port_b" }
%"class.sc_core::sc_port_b" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.22" }
%"class.sc_core::sc_port_base" = type { %"class.sc_core::sc_object", ptr }
%"class.std::vector.22" = type { %"struct.std::_Vector_base.23" }
%"struct.std::_Vector_base.23" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<float> *, std::allocator<sc_core::sc_signal_in_if<float> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<float> *, std::allocator<sc_core::sc_signal_in_if<float> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<float> *, std::allocator<sc_core::sc_signal_in_if<float> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<float> *, std::allocator<sc_core::sc_signal_in_if<float> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_in.27" = type { %"class.sc_core::sc_port.28", ptr, ptr, ptr, ptr }
%"class.sc_core::sc_port.28" = type { %"class.sc_core::sc_port_b.29" }
%"class.sc_core::sc_port_b.29" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.30" }
%"class.std::vector.30" = type { %"struct.std::_Vector_base.31" }
%"struct.std::_Vector_base.31" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_in_if<bool> *, std::allocator<sc_core::sc_signal_in_if<bool> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_out" = type { %"class.sc_core::sc_inout" }
%"class.sc_core::sc_inout" = type { %"class.sc_core::sc_port.35", ptr, ptr, ptr }
%"class.sc_core::sc_port.35" = type { %"class.sc_core::sc_port_b.36" }
%"class.sc_core::sc_port_b.36" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.37" }
%"class.std::vector.37" = type { %"struct.std::_Vector_base.38" }
%"struct.std::_Vector_base.38" = type { %"struct.std::_Vector_base<sc_core::sc_signal_inout_if<float> *, std::allocator<sc_core::sc_signal_inout_if<float> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_inout_if<float> *, std::allocator<sc_core::sc_signal_inout_if<float> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_inout_if<float> *, std::allocator<sc_core::sc_signal_inout_if<float> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_inout_if<float> *, std::allocator<sc_core::sc_signal_inout_if<float> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sc_core::sc_module_name" = type <{ ptr, ptr, ptr, ptr, i8, [7 x i8] }>
%struct.testbench = type { %"class.sc_core::sc_module", %"class.sc_core::sc_in.27", %"class.sc_core::sc_in", %"class.sc_core::sc_out.42", %"class.sc_core::sc_out" }
%"class.sc_core::sc_out.42" = type { %"class.sc_core::sc_inout.43" }
%"class.sc_core::sc_inout.43" = type { %"class.sc_core::sc_port.44", ptr, ptr, ptr, ptr, ptr }
%"class.sc_core::sc_port.44" = type { %"class.sc_core::sc_port_b.45" }
%"class.sc_core::sc_port_b.45" = type { %"class.sc_core::sc_port_base", ptr, %"class.std::vector.46" }
%"class.std::vector.46" = type { %"struct.std::_Vector_base.47" }
%"struct.std::_Vector_base.47" = type { %"struct.std::_Vector_base<sc_core::sc_signal_inout_if<bool> *, std::allocator<sc_core::sc_signal_inout_if<bool> *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_signal_inout_if<bool> *, std::allocator<sc_core::sc_signal_inout_if<bool> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_signal_inout_if<bool> *, std::allocator<sc_core::sc_signal_inout_if<bool> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_signal_inout_if<bool> *, std::allocator<sc_core::sc_signal_inout_if<bool> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.delay_line = type { %"class.sc_core::sc_module", %"class.sc_core::sc_in", %"class.sc_core::sc_out", i32, ptr }

@signal_freq = external dso_local local_unnamed_addr global float, align 4
@.str = external hidden unnamed_addr constant [6 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [8 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [3 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [6 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @sc_main(i32 noundef %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 personality ptr @__gxx_personality_v0 {
  %3 = alloca %"class.sc_core::sc_signal", align 8
  %4 = alloca %"class.sc_core::sc_signal", align 8
  %5 = alloca %"class.sc_core::sc_signal.8", align 8
  %6 = alloca %"class.sc_core::sc_signal", align 8
  %7 = alloca float, align 4
  %8 = alloca float, align 4
  %9 = alloca i8, align 1
  %10 = alloca float, align 4
  %11 = alloca %"class.sc_core::sc_clock", align 8
  %12 = alloca %struct.biquad, align 8
  %13 = alloca %"class.sc_core::sc_module_name", align 8
  %14 = alloca %struct.testbench, align 8
  %15 = alloca %"class.sc_core::sc_module_name", align 8
  %16 = alloca %struct.delay_line, align 8
  %17 = alloca %"class.sc_core::sc_module_name", align 8
  call void @llvm.lifetime.start.p0(i64 200, ptr nonnull %3) #8
  call void @_ZN7sc_core9sc_signalIfLNS_16sc_writer_policyE0EEC1Ev(ptr noundef nonnull align 8 dereferenceable(196) %3)
  call void @llvm.lifetime.start.p0(i64 200, ptr nonnull %4) #8
  invoke void @_ZN7sc_core9sc_signalIfLNS_16sc_writer_policyE0EEC1Ev(ptr noundef nonnull align 8 dereferenceable(196) %4)
          to label %18 unwind label %37

18:                                               ; preds = %2
  call void @llvm.lifetime.start.p0(i64 224, ptr nonnull %5) #8
  invoke void @_ZN7sc_core9sc_signalIbLNS_16sc_writer_policyE0EEC1Ev(ptr noundef nonnull align 8 dereferenceable(224) %5)
          to label %19 unwind label %39

19:                                               ; preds = %18
  call void @llvm.lifetime.start.p0(i64 200, ptr nonnull %6) #8
  invoke void @_ZN7sc_core9sc_signalIfLNS_16sc_writer_policyE0EEC1Ev(ptr noundef nonnull align 8 dereferenceable(196) %6)
          to label %20 unwind label %41

20:                                               ; preds = %19
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #8
  store float 0.000000e+00, ptr %7, align 4, !tbaa !5
  %21 = invoke noundef nonnull align 8 dereferenceable(196) ptr @_ZN7sc_core9sc_signalIfLNS_16sc_writer_policyE0EEaSERKf(ptr noundef nonnull align 8 dereferenceable(196) %3, ptr noundef nonnull align 4 dereferenceable(4) %7)
          to label %22 unwind label %43

22:                                               ; preds = %20
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #8
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8) #8
  store float 0.000000e+00, ptr %8, align 4, !tbaa !5
  %23 = invoke noundef nonnull align 8 dereferenceable(196) ptr @_ZN7sc_core9sc_signalIfLNS_16sc_writer_policyE0EEaSERKf(ptr noundef nonnull align 8 dereferenceable(196) %4, ptr noundef nonnull align 4 dereferenceable(4) %8)
          to label %24 unwind label %45

24:                                               ; preds = %22
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #8
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %9) #8
  store i8 0, ptr %9, align 1, !tbaa !9
  %25 = invoke noundef nonnull align 8 dereferenceable(224) ptr @_ZN7sc_core9sc_signalIbLNS_16sc_writer_policyE0EEaSERKb(ptr noundef nonnull align 8 dereferenceable(224) %5, ptr noundef nonnull align 1 dereferenceable(1) %9)
          to label %26 unwind label %47

26:                                               ; preds = %24
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %9) #8
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %10) #8
  store float 0.000000e+00, ptr %10, align 4, !tbaa !5
  %27 = invoke noundef nonnull align 8 dereferenceable(196) ptr @_ZN7sc_core9sc_signalIfLNS_16sc_writer_policyE0EEaSERKf(ptr noundef nonnull align 8 dereferenceable(196) %6, ptr noundef nonnull align 4 dereferenceable(4) %10)
          to label %28 unwind label %49

28:                                               ; preds = %26
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %10) #8
  call void @llvm.lifetime.start.p0(i64 592, ptr nonnull %11) #8
  invoke void @_ZN7sc_core8sc_clockC1EPKcdNS_12sc_time_unitEd(ptr noundef nonnull align 8 dereferenceable(592) %11, ptr noundef nonnull @.str, double noundef 1.000000e+01, i32 noundef 2, double noundef 5.000000e-01)
          to label %29 unwind label %51

29:                                               ; preds = %28
  call void @llvm.lifetime.start.p0(i64 800, ptr nonnull %12) #8
  invoke void @_ZN7sc_core14sc_module_nameC1EPKc(ptr noundef nonnull align 8 dereferenceable(33) %13, ptr noundef nonnull @.str.2)
          to label %30 unwind label %53

30:                                               ; preds = %29
  invoke void @_ZN6biquadC2EN7sc_core14sc_module_nameERNS0_9sc_signalIfLNS0_16sc_writer_policyE0EEERNS2_IbLS3_0EEES5_(ptr noundef nonnull align 8 dereferenceable(800) %12, ptr noundef nonnull %13, ptr noundef nonnull align 8 dereferenceable(196) %3, ptr noundef nonnull align 8 dereferenceable(224) %5, ptr noundef nonnull align 8 dereferenceable(196) %4)
          to label %31 unwind label %55

31:                                               ; preds = %30
  call void @_ZN7sc_core14sc_module_nameD1Ev(ptr noundef nonnull align 8 dereferenceable(33) %13) #8
  call void @llvm.lifetime.start.p0(i64 952, ptr nonnull %14) #8
  invoke void @_ZN7sc_core14sc_module_nameC1EPKc(ptr noundef nonnull align 8 dereferenceable(33) %15, ptr noundef nonnull @.str.3)
          to label %32 unwind label %57

32:                                               ; preds = %31
  invoke void @_ZN9testbenchC2EN7sc_core14sc_module_nameERNS0_8sc_clockERNS0_9sc_signalIfLNS0_16sc_writer_policyE0EEERNS4_IbLS5_0EEES7_(ptr noundef nonnull align 8 dereferenceable(952) %14, ptr noundef nonnull %15, ptr noundef nonnull align 8 dereferenceable(592) %11, ptr noundef nonnull align 8 dereferenceable(196) %6, ptr noundef nonnull align 8 dereferenceable(224) %5, ptr noundef nonnull align 8 dereferenceable(196) %3)
          to label %33 unwind label %59

33:                                               ; preds = %32
  call void @_ZN7sc_core14sc_module_nameD1Ev(ptr noundef nonnull align 8 dereferenceable(33) %15) #8
  call void @llvm.lifetime.start.p0(i64 592, ptr nonnull %16) #8
  invoke void @_ZN7sc_core14sc_module_nameC1EPKc(ptr noundef nonnull align 8 dereferenceable(33) %17, ptr noundef nonnull @.str.4)
          to label %34 unwind label %61

34:                                               ; preds = %33
  invoke void @_ZN10delay_lineC2EN7sc_core14sc_module_nameERNS0_9sc_signalIfLNS0_16sc_writer_policyE0EEES5_i(ptr noundef nonnull align 8 dereferenceable(592) %16, ptr noundef nonnull %17, ptr noundef nonnull align 8 dereferenceable(196) %4, ptr noundef nonnull align 8 dereferenceable(196) %6, i32 noundef 300)
          to label %35 unwind label %63

35:                                               ; preds = %34
  call void @_ZN7sc_core14sc_module_nameD1Ev(ptr noundef nonnull align 8 dereferenceable(33) %17) #8
  store float 1.000000e+05, ptr @signal_freq, align 4, !tbaa !5
  %36 = icmp sgt i32 %0, 1
  br i1 %36, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %79, %35
  %.012.lcssa = phi i32 [ 10000, %35 ], [ %.113, %79 ]
  invoke void @_ZN7sc_core8sc_startEiNS_12sc_time_unitENS_20sc_starvation_policyE(i32 noundef %.012.lcssa, i32 noundef 2, i32 noundef 1)
          to label %82 unwind label %83

37:                                               ; preds = %2
  %38 = landingpad { ptr, i32 }
          cleanup
  br label %92

39:                                               ; preds = %18
  %40 = landingpad { ptr, i32 }
          cleanup
  br label %91

41:                                               ; preds = %19
  %42 = landingpad { ptr, i32 }
          cleanup
  br label %90

43:                                               ; preds = %20
  %44 = landingpad { ptr, i32 }
          cleanup
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #8
  br label %89

45:                                               ; preds = %22
  %46 = landingpad { ptr, i32 }
          cleanup
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #8
  br label %89

47:                                               ; preds = %24
  %48 = landingpad { ptr, i32 }
          cleanup
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %9) #8
  br label %89

49:                                               ; preds = %26
  %50 = landingpad { ptr, i32 }
          cleanup
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %10) #8
  br label %89

51:                                               ; preds = %28
  %52 = landingpad { ptr, i32 }
          cleanup
  br label %88

53:                                               ; preds = %29
  %54 = landingpad { ptr, i32 }
          cleanup
  br label %87

55:                                               ; preds = %30
  %56 = landingpad { ptr, i32 }
          cleanup
  call void @_ZN7sc_core14sc_module_nameD1Ev(ptr noundef nonnull align 8 dereferenceable(33) %13) #8
  br label %87

57:                                               ; preds = %31
  %58 = landingpad { ptr, i32 }
          cleanup
  br label %86

59:                                               ; preds = %32
  %60 = landingpad { ptr, i32 }
          cleanup
  call void @_ZN7sc_core14sc_module_nameD1Ev(ptr noundef nonnull align 8 dereferenceable(33) %15) #8
  br label %86

61:                                               ; preds = %33
  %62 = landingpad { ptr, i32 }
          cleanup
  br label %85

63:                                               ; preds = %34
  %64 = landingpad { ptr, i32 }
          cleanup
  call void @_ZN7sc_core14sc_module_nameD1Ev(ptr noundef nonnull align 8 dereferenceable(33) %17) #8
  br label %85

.lr.ph:                                           ; preds = %35, %79
  %.033 = phi i32 [ %80, %79 ], [ 1, %35 ]
  %.01232 = phi i32 [ %.113, %79 ], [ 10000, %35 ]
  %65 = sext i32 %.033 to i64
  %66 = getelementptr inbounds ptr, ptr %1, i64 %65
  %67 = load ptr, ptr %66, align 8, !tbaa !11
  %68 = load i8, ptr %67, align 1, !tbaa !13
  %69 = icmp eq i8 %68, 45
  br i1 %69, label %70, label %77

70:                                               ; preds = %.lr.ph
  %71 = add nsw i32 %.033, 1
  %72 = sext i32 %71 to i64
  %73 = getelementptr inbounds ptr, ptr %1, i64 %72
  %74 = load ptr, ptr %73, align 8, !tbaa !11
  %75 = call double @atof(ptr noundef %74) #9
  %76 = fptrunc double %75 to float
  store float %76, ptr @signal_freq, align 4, !tbaa !5
  br label %79

77:                                               ; preds = %.lr.ph
  %78 = call i32 @atoi(ptr nocapture noundef %67) #9
  br label %79

79:                                               ; preds = %77, %70
  %.113 = phi i32 [ %.01232, %70 ], [ %78, %77 ]
  %.1 = phi i32 [ %71, %70 ], [ %.033, %77 ]
  %80 = add nsw i32 %.1, 1
  %81 = icmp slt i32 %80, %0
  br i1 %81, label %.lr.ph, label %._crit_edge, !llvm.loop !14

82:                                               ; preds = %._crit_edge
  call void @_ZN10delay_lineD2Ev(ptr noundef nonnull align 8 dereferenceable(592) %16) #8
  call void @llvm.lifetime.end.p0(i64 592, ptr nonnull %16) #8
  call void @_ZN9testbenchD2Ev(ptr noundef nonnull align 8 dereferenceable(952) %14) #8
  call void @llvm.lifetime.end.p0(i64 952, ptr nonnull %14) #8
  call void @_ZN6biquadD2Ev(ptr noundef nonnull align 8 dereferenceable(800) %12) #8
  call void @llvm.lifetime.end.p0(i64 800, ptr nonnull %12) #8
  call void @_ZN7sc_core8sc_clockD1Ev(ptr noundef nonnull align 8 dereferenceable(592) %11) #8
  call void @llvm.lifetime.end.p0(i64 592, ptr nonnull %11) #8
  call void @_ZN7sc_core9sc_signalIfLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(196) %6) #8
  call void @llvm.lifetime.end.p0(i64 200, ptr nonnull %6) #8
  call void @_ZN7sc_core9sc_signalIbLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(224) %5) #8
  call void @llvm.lifetime.end.p0(i64 224, ptr nonnull %5) #8
  call void @_ZN7sc_core9sc_signalIfLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(196) %4) #8
  call void @llvm.lifetime.end.p0(i64 200, ptr nonnull %4) #8
  call void @_ZN7sc_core9sc_signalIfLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(196) %3) #8
  call void @llvm.lifetime.end.p0(i64 200, ptr nonnull %3) #8
  ret i32 0

83:                                               ; preds = %._crit_edge
  %84 = landingpad { ptr, i32 }
          cleanup
  call void @_ZN10delay_lineD2Ev(ptr noundef nonnull align 8 dereferenceable(592) %16) #8
  br label %85

85:                                               ; preds = %83, %63, %61
  %.pn = phi { ptr, i32 } [ %84, %83 ], [ %64, %63 ], [ %62, %61 ]
  call void @llvm.lifetime.end.p0(i64 592, ptr nonnull %16) #8
  call void @_ZN9testbenchD2Ev(ptr noundef nonnull align 8 dereferenceable(952) %14) #8
  br label %86

86:                                               ; preds = %85, %59, %57
  %.pn.pn = phi { ptr, i32 } [ %.pn, %85 ], [ %60, %59 ], [ %58, %57 ]
  call void @llvm.lifetime.end.p0(i64 952, ptr nonnull %14) #8
  call void @_ZN6biquadD2Ev(ptr noundef nonnull align 8 dereferenceable(800) %12) #8
  br label %87

87:                                               ; preds = %86, %55, %53
  %.pn.pn.pn = phi { ptr, i32 } [ %.pn.pn, %86 ], [ %56, %55 ], [ %54, %53 ]
  call void @llvm.lifetime.end.p0(i64 800, ptr nonnull %12) #8
  call void @_ZN7sc_core8sc_clockD1Ev(ptr noundef nonnull align 8 dereferenceable(592) %11) #8
  br label %88

88:                                               ; preds = %87, %51
  %.pn.pn.pn.pn = phi { ptr, i32 } [ %.pn.pn.pn, %87 ], [ %52, %51 ]
  call void @llvm.lifetime.end.p0(i64 592, ptr nonnull %11) #8
  br label %89

89:                                               ; preds = %88, %49, %47, %45, %43
  %.pn.pn.pn.pn.pn = phi { ptr, i32 } [ %.pn.pn.pn.pn, %88 ], [ %50, %49 ], [ %48, %47 ], [ %46, %45 ], [ %44, %43 ]
  call void @_ZN7sc_core9sc_signalIfLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(196) %6) #8
  br label %90

90:                                               ; preds = %89, %41
  %.pn.pn.pn.pn.pn.pn = phi { ptr, i32 } [ %.pn.pn.pn.pn.pn, %89 ], [ %42, %41 ]
  call void @llvm.lifetime.end.p0(i64 200, ptr nonnull %6) #8
  call void @_ZN7sc_core9sc_signalIbLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(224) %5) #8
  br label %91

91:                                               ; preds = %90, %39
  %.pn.pn.pn.pn.pn.pn.pn = phi { ptr, i32 } [ %.pn.pn.pn.pn.pn.pn, %90 ], [ %40, %39 ]
  call void @llvm.lifetime.end.p0(i64 224, ptr nonnull %5) #8
  call void @_ZN7sc_core9sc_signalIfLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(196) %4) #8
  br label %92

92:                                               ; preds = %91, %37
  %.pn.pn.pn.pn.pn.pn.pn.pn = phi { ptr, i32 } [ %.pn.pn.pn.pn.pn.pn.pn, %91 ], [ %38, %37 ]
  call void @llvm.lifetime.end.p0(i64 200, ptr nonnull %4) #8
  call void @_ZN7sc_core9sc_signalIfLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(196) %3) #8
  call void @llvm.lifetime.end.p0(i64 200, ptr nonnull %3) #8
  resume { ptr, i32 } %.pn.pn.pn.pn.pn.pn.pn.pn
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_signalIfLNS_16sc_writer_policyE0EEC1Ev(ptr noundef nonnull align 8 dereferenceable(196)) unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core9sc_signalIbLNS_16sc_writer_policyE0EEC1Ev(ptr noundef nonnull align 8 dereferenceable(224)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(196) ptr @_ZN7sc_core9sc_signalIfLNS_16sc_writer_policyE0EEaSERKf(ptr noundef nonnull align 8 dereferenceable(196), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(224) ptr @_ZN7sc_core9sc_signalIbLNS_16sc_writer_policyE0EEaSERKb(ptr noundef nonnull align 8 dereferenceable(224), ptr noundef nonnull align 1 dereferenceable(1)) local_unnamed_addr #0 align 2

declare void @_ZN7sc_core8sc_clockC1EPKcdNS_12sc_time_unitEd(ptr noundef nonnull align 8 dereferenceable(592), ptr noundef, double noundef, i32 noundef, double noundef) unnamed_addr #2

declare void @_ZN7sc_core14sc_module_nameC1EPKc(ptr noundef nonnull align 8 dereferenceable(33), ptr noundef) unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6biquadC2EN7sc_core14sc_module_nameERNS0_9sc_signalIfLNS0_16sc_writer_policyE0EEERNS2_IbLS3_0EEES5_(ptr noundef nonnull align 8 dereferenceable(800), ptr noundef, ptr noundef nonnull align 8 dereferenceable(196), ptr noundef nonnull align 8 dereferenceable(224), ptr noundef nonnull align 8 dereferenceable(196)) unnamed_addr #0 align 2

; Function Attrs: nounwind
declare void @_ZN7sc_core14sc_module_nameD1Ev(ptr noundef nonnull align 8 dereferenceable(33)) unnamed_addr #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN9testbenchC2EN7sc_core14sc_module_nameERNS0_8sc_clockERNS0_9sc_signalIfLNS0_16sc_writer_policyE0EEERNS4_IbLS5_0EEES7_(ptr noundef nonnull align 8 dereferenceable(952), ptr noundef, ptr noundef nonnull align 8 dereferenceable(592), ptr noundef nonnull align 8 dereferenceable(196), ptr noundef nonnull align 8 dereferenceable(224), ptr noundef nonnull align 8 dereferenceable(196)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN10delay_lineC2EN7sc_core14sc_module_nameERNS0_9sc_signalIfLNS0_16sc_writer_policyE0EEES5_i(ptr noundef nonnull align 8 dereferenceable(592), ptr noundef, ptr noundef nonnull align 8 dereferenceable(196), ptr noundef nonnull align 8 dereferenceable(196), i32 noundef) unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nofree nounwind willreturn memory(read) uwtable
declare double @atof(ptr nocapture noundef nonnull) local_unnamed_addr #4

; Function Attrs: inlinehint mustprogress nofree nounwind willreturn memory(read) uwtable
declare i32 @atoi(ptr nocapture noundef nonnull) local_unnamed_addr #4

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN7sc_core8sc_startEiNS_12sc_time_unitENS_20sc_starvation_policyE(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #5

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN10delay_lineD2Ev(ptr noundef nonnull align 8 dereferenceable(592)) unnamed_addr #6 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN9testbenchD2Ev(ptr noundef nonnull align 8 dereferenceable(952)) unnamed_addr #6 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN6biquadD2Ev(ptr noundef nonnull align 8 dereferenceable(800)) unnamed_addr #6 align 2

; Function Attrs: nounwind
declare void @_ZN7sc_core8sc_clockD1Ev(ptr noundef nonnull align 8 dereferenceable(592)) unnamed_addr #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7sc_core9sc_signalIfLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(196)) unnamed_addr #7 align 2

; Function Attrs: nounwind
declare void @_ZN7sc_core9sc_signalIbLNS_16sc_writer_policyE0EED1Ev(ptr noundef nonnull align 8 dereferenceable(224)) unnamed_addr #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nofree nounwind willreturn memory(read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { nounwind }
attributes #9 = { nounwind willreturn memory(read) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass