; LLVM IR from gem5/gem5 :: src/systemc/dt/bit/sc_lv_base.ll (ZN5sc_dt10sc_lv_base4initEiRKNS_8sc_logicE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::sc_lv_base" = type { %"class.sc_dt::sc_proxy", i32, i32, ptr, ptr }
%"class.sc_dt::sc_proxy" = type { ptr }

@.str.5 = external hidden unnamed_addr constant [76 x i8], align 1
@_ZN7sc_core18SC_ID_ZERO_LENGTH_E = external constant [0 x i8], align 1
@_ZN5sc_dtL10data_arrayE = external hidden constant [4 x i32], align 16
@_ZN5sc_dtL10ctrl_arrayE = external hidden constant [4 x i32], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt8sc_logic5valueEv(ptr noundef nonnull align 4 dereferenceable(4)) #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt10sc_lv_base10clean_tailEv(ptr noundef nonnull align 8 dereferenceable(32)) #2 align 2

declare void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) #3

; Function Attrs: noreturn
declare void @_ZN7sc_core8sc_abortEv() #4

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5sc_dt10sc_lv_base4initEiRKNS_8sc_logicE(ptr noundef nonnull align 8 dereferenceable(32) %0, i32 noundef %1, ptr noundef nonnull align 4 dereferenceable(4) %2) #5 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  store ptr %2, ptr %6, align 8, !tbaa !5
  %11 = load ptr, ptr %4, align 8
  %12 = load i32, ptr %5, align 4, !tbaa !9
  %13 = icmp sle i32 %12, 0
  br i1 %13, label %14, label %15

14:                                               ; preds = %3
  call void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef 2, ptr noundef @_ZN7sc_core18SC_ID_ZERO_LENGTH_E, ptr noundef null, ptr noundef @.str.5, i32 noundef 94)
  call void @_ZN7sc_core8sc_abortEv() #8
  unreachable

15:                                               ; preds = %3
  %16 = load i32, ptr %5, align 4, !tbaa !9
  %17 = getelementptr inbounds %"class.sc_dt::sc_lv_base", ptr %11, i32 0, i32 1
  store i32 %16, ptr %17, align 8, !tbaa !11
  %18 = getelementptr inbounds %"class.sc_dt::sc_lv_base", ptr %11, i32 0, i32 1
  %19 = load i32, ptr %18, align 8, !tbaa !11
  %20 = sub nsw i32 %19, 1
  %21 = sdiv i32 %20, 32
  %22 = add nsw i32 %21, 1
  %23 = getelementptr inbounds %"class.sc_dt::sc_lv_base", ptr %11, i32 0, i32 2
  store i32 %22, ptr %23, align 4, !tbaa !14
  %24 = getelementptr inbounds %"class.sc_dt::sc_lv_base", ptr %11, i32 0, i32 2
  %25 = load i32, ptr %24, align 4, !tbaa !14
  %26 = mul nsw i32 %25, 2
  %27 = sext i32 %26 to i64
  %28 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %27, i64 4)
  %29 = extractvalue { i64, i1 } %28, 1
  %30 = extractvalue { i64, i1 } %28, 0
  %31 = select i1 %29, i64 -1, i64 %30
  %32 = call noalias noundef nonnull ptr @_Znam(i64 noundef %31) #9
  %33 = getelementptr inbounds %"class.sc_dt::sc_lv_base", ptr %11, i32 0, i32 3
  store ptr %32, ptr %33, align 8, !tbaa !15
  %34 = getelementptr inbounds %"class.sc_dt::sc_lv_base", ptr %11, i32 0, i32 3
  %35 = load ptr, ptr %34, align 8, !tbaa !15
  %36 = getelementptr inbounds %"class.sc_dt::sc_lv_base", ptr %11, i32 0, i32 2
  %37 = load i32, ptr %36, align 4, !tbaa !14
  %38 = sext i32 %37 to i64
  %39 = getelementptr inbounds i32, ptr %35, i64 %38
  %40 = getelementptr inbounds %"class.sc_dt::sc_lv_base", ptr %11, i32 0, i32 4
  store ptr %39, ptr %40, align 8, !tbaa !16
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #10
  %41 = load ptr, ptr %6, align 8, !tbaa !5
  %42 = call noundef i32 @_ZNK5sc_dt8sc_logic5valueEv(ptr noundef nonnull align 4 dereferenceable(4) %41)
  %43 = zext i32 %42 to i64
  %44 = getelementptr inbounds [4 x i32], ptr @_ZN5sc_dtL10data_arrayE, i64 0, i64 %43
  %45 = load i32, ptr %44, align 4, !tbaa !9
  store i32 %45, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #10
  %46 = load ptr, ptr %6, align 8, !tbaa !5
  %47 = call noundef i32 @_ZNK5sc_dt8sc_logic5valueEv(ptr noundef nonnull align 4 dereferenceable(4) %46)
  %48 = zext i32 %47 to i64
  %49 = getelementptr inbounds [4 x i32], ptr @_ZN5sc_dtL10ctrl_arrayE, i64 0, i64 %48
  %50 = load i32, ptr %49, align 4, !tbaa !9
  store i32 %50, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #10
  %51 = getelementptr inbounds %"class.sc_dt::sc_lv_base", ptr %11, i32 0, i32 2
  %52 = load i32, ptr %51, align 4, !tbaa !14
  store i32 %52, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #10
  store i32 0, ptr %10, align 4, !tbaa !9
  br label %53

53:                                               ; preds = %71, %15
  %54 = load i32, ptr %10, align 4, !tbaa !9
  %55 = load i32, ptr %9, align 4, !tbaa !9
  %56 = icmp slt i32 %54, %55
  br i1 %56, label %58, label %57

57:                                               ; preds = %53
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #10
  br label %74

58:                                               ; preds = %53
  %59 = load i32, ptr %7, align 4, !tbaa !9
  %60 = getelementptr inbounds %"class.sc_dt::sc_lv_base", ptr %11, i32 0, i32 3
  %61 = load ptr, ptr %60, align 8, !tbaa !15
  %62 = load i32, ptr %10, align 4, !tbaa !9
  %63 = sext i32 %62 to i64
  %64 = getelementptr inbounds i32, ptr %61, i64 %63
  store i32 %59, ptr %64, align 4, !tbaa !9
  %65 = load i32, ptr %8, align 4, !tbaa !9
  %66 = getelementptr inbounds %"class.sc_dt::sc_lv_base", ptr %11, i32 0, i32 4
  %67 = load ptr, ptr %66, align 8, !tbaa !16
  %68 = load i32, ptr %10, align 4, !tbaa !9
  %69 = sext i32 %68 to i64
  %70 = getelementptr inbounds i32, ptr %67, i64 %69
  store i32 %65, ptr %70, align 4, !tbaa !9
  br label %71

71:                                               ; preds = %58
  %72 = load i32, ptr %10, align 4, !tbaa !9
  %73 = add nsw i32 %72, 1
  store i32 %73, ptr %10, align 4, !tbaa !9
  br label %53, !llvm.loop !17

74:                                               ; preds = %57
  call void @_ZN5sc_dt10sc_lv_base10clean_tailEv(ptr noundef nonnull align 8 dereferenceable(32) %11)
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #10
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #10
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #10
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) #6

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) #7

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #7 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { noreturn }
attributes #9 = { builtin allocsize(0) }
attributes #10 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 8}
!12 = !{!"_ZTSN5sc_dt10sc_lv_baseE", !13, i64 0, !10, i64 8, !10, i64 12, !6, i64 16, !6, i64 24}
!13 = !{!"_ZTSN5sc_dt8sc_proxyINS_10sc_lv_baseEEE"}
!14 = !{!12, !10, i64 12}
!15 = !{!12, !6, i64 16}
!16 = !{!12, !6, i64 24}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.5 = external hidden unnamed_addr constant [76 x i8], align 1
@_ZN7sc_core18SC_ID_ZERO_LENGTH_E = external constant [0 x i8], align 1
@_ZN5sc_dtL10data_arrayE = external hidden local_unnamed_addr constant [4 x i32], align 16
@_ZN5sc_dtL10ctrl_arrayE = external hidden local_unnamed_addr constant [4 x i32], align 16

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt8sc_logic5valueEv(ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt10sc_lv_base10clean_tailEv(ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #1 align 2

declare void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: noreturn
declare void @_ZN7sc_core8sc_abortEv() local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5sc_dt10sc_lv_base4initEiRKNS_8sc_logicE(ptr noundef nonnull align 8 dereferenceable(32) %0, i32 noundef %1, ptr noundef nonnull align 4 dereferenceable(4) %2) local_unnamed_addr #4 align 2 {
  %4 = icmp slt i32 %1, 1
  br i1 %4, label %5, label %6

5:                                                ; preds = %3
  tail call void @_ZN7sc_core17sc_report_handler6reportENS_11sc_severityEPKcS3_S3_i(i32 noundef 2, ptr noundef nonnull @_ZN7sc_core18SC_ID_ZERO_LENGTH_E, ptr noundef null, ptr noundef nonnull @.str.5, i32 noundef 94)
  tail call void @_ZN7sc_core8sc_abortEv() #6
  unreachable

6:                                                ; preds = %3
  %7 = getelementptr inbounds i8, ptr %0, i64 8
  store i32 %1, ptr %7, align 8, !tbaa !5
  %8 = add nsw i32 %1, -1
  %9 = lshr i32 %8, 5
  %10 = add nuw nsw i32 %9, 1
  %11 = getelementptr inbounds i8, ptr %0, i64 12
  store i32 %10, ptr %11, align 4, !tbaa !12
  %12 = shl nuw nsw i32 %10, 3
  %13 = zext nneg i32 %12 to i64
  %14 = tail call noalias noundef nonnull ptr @_Znam(i64 noundef %13) #7
  %15 = getelementptr inbounds i8, ptr %0, i64 16
  store ptr %14, ptr %15, align 8, !tbaa !13
  %16 = zext nneg i32 %10 to i64
  %17 = getelementptr inbounds i32, ptr %14, i64 %16
  %18 = getelementptr inbounds i8, ptr %0, i64 24
  store ptr %17, ptr %18, align 8, !tbaa !14
  %19 = tail call noundef i32 @_ZNK5sc_dt8sc_logic5valueEv(ptr noundef nonnull align 4 dereferenceable(4) %2)
  %20 = zext i32 %19 to i64
  %21 = getelementptr inbounds [4 x i32], ptr @_ZN5sc_dtL10data_arrayE, i64 0, i64 %20
  %22 = load i32, ptr %21, align 4, !tbaa !15
  %23 = tail call noundef i32 @_ZNK5sc_dt8sc_logic5valueEv(ptr noundef nonnull align 4 dereferenceable(4) %2)
  %24 = zext i32 %23 to i64
  %25 = getelementptr inbounds [4 x i32], ptr @_ZN5sc_dtL10ctrl_arrayE, i64 0, i64 %24
  %26 = load i32, ptr %25, align 4, !tbaa !15
  %27 = load i32, ptr %11, align 4, !tbaa !12
  %28 = icmp sgt i32 %27, 0
  br i1 %28, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %6
  %29 = load ptr, ptr %15, align 8, !tbaa !13
  %30 = load ptr, ptr %18, align 8, !tbaa !14
  %wide.trip.count = zext nneg i32 %27 to i64
  %min.iters.check = icmp ult i32 %27, 8
  %31 = ptrtoint ptr %30 to i64
  %32 = ptrtoint ptr %29 to i64
  %33 = sub i64 %31, %32
  %diff.check = icmp ult i64 %33, 32
  %or.cond = select i1 %min.iters.check, i1 true, i1 %diff.check
  br i1 %or.cond, label %scalar.ph.preheader, label %vector.ph

scalar.ph.preheader:                              ; preds = %middle.block, %.lr.ph
  %indvars.iv.ph = phi i64 [ 0, %.lr.ph ], [ %n.vec, %middle.block ]
  %xtraiter = and i64 %wide.trip.count, 3
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %scalar.ph.prol.loopexit, label %scalar.ph.prol

scalar.ph.prol:                                   ; preds = %scalar.ph.preheader, %scalar.ph.prol
  %indvars.iv.prol = phi i64 [ %indvars.iv.next.prol, %scalar.ph.prol ], [ %indvars.iv.ph, %scalar.ph.preheader ]
  %prol.iter = phi i64 [ %prol.iter.next, %scalar.ph.prol ], [ 0, %scalar.ph.preheader ]
  %34 = getelementptr inbounds i32, ptr %29, i64 %indvars.iv.prol
  store i32 %22, ptr %34, align 4, !tbaa !15
  %35 = getelementptr inbounds i32, ptr %30, i64 %indvars.iv.prol
  store i32 %26, ptr %35, align 4, !tbaa !15
  %indvars.iv.next.prol = add nuw nsw i64 %indvars.iv.prol, 1
  %prol.iter.next = add i64 %prol.iter, 1
  %prol.iter.cmp.not = icmp eq i64 %prol.iter.next, %xtraiter
  br i1 %prol.iter.cmp.not, label %scalar.ph.prol.loopexit, label %scalar.ph.prol, !llvm.loop !16

scalar.ph.prol.loopexit:                          ; preds = %scalar.ph.prol, %scalar.ph.preheader
  %indvars.iv.unr = phi i64 [ %indvars.iv.ph, %scalar.ph.preheader ], [ %indvars.iv.next.prol, %scalar.ph.prol ]
  %36 = sub nsw i64 %indvars.iv.ph, %wide.trip.count
  %37 = icmp ugt i64 %36, -4
  br i1 %37, label %._crit_edge, label %scalar.ph

vector.ph:                                        ; preds = %.lr.ph
  %n.vec = and i64 %wide.trip.count, 2147483640
  %broadcast.splatinsert = insertelement <4 x i32> poison, i32 %22, i64 0
  %broadcast.splat = shufflevector <4 x i32> %broadcast.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer
  %broadcast.splatinsert14 = insertelement <4 x i32> poison, i32 %26, i64 0
  %broadcast.splat15 = shufflevector <4 x i32> %broadcast.splatinsert14, <4 x i32> poison, <4 x i32> zeroinitializer
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %38 = getelementptr inbounds i32, ptr %29, i64 %index
  %39 = getelementptr inbounds i8, ptr %38, i64 16
  store <4 x i32> %broadcast.splat, ptr %38, align 4, !tbaa !15
  store <4 x i32> %broadcast.splat, ptr %39, align 4, !tbaa !15
  %40 = getelementptr inbounds i32, ptr %30, i64 %index
  %41 = getelementptr inbounds i8, ptr %40, i64 16
  store <4 x i32> %broadcast.splat15, ptr %40, align 4, !tbaa !15
  store <4 x i32> %broadcast.splat15, ptr %41, align 4, !tbaa !15
  %index.next = add nuw i64 %index, 8
  %42 = icmp eq i64 %index.next, %n.vec
  br i1 %42, label %middle.block, label %vector.body, !llvm.loop !18

middle.block:                                     ; preds = %vector.body
  %cmp.n = icmp eq i64 %n.vec, %wide.trip.count
  br i1 %cmp.n, label %._crit_edge, label %scalar.ph.preheader

._crit_edge:                                      ; preds = %scalar.ph.prol.loopexit, %scalar.ph, %middle.block, %6
  tail call void @_ZN5sc_dt10sc_lv_base10clean_tailEv(ptr noundef nonnull align 8 dereferenceable(32) %0)
  ret void

scalar.ph:                                        ; preds = %scalar.ph.prol.loopexit, %scalar.ph
  %indvars.iv = phi i64 [ %indvars.iv.next.3, %scalar.ph ], [ %indvars.iv.unr, %scalar.ph.prol.loopexit ]
  %43 = getelementptr inbounds i32, ptr %29, i64 %indvars.iv
  store i32 %22, ptr %43, align 4, !tbaa !15
  %44 = getelementptr inbounds i32, ptr %30, i64 %indvars.iv
  store i32 %26, ptr %44, align 4, !tbaa !15
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %45 = getelementptr inbounds i32, ptr %29, i64 %indvars.iv.next
  store i32 %22, ptr %45, align 4, !tbaa !15
  %46 = getelementptr inbounds i32, ptr %30, i64 %indvars.iv.next
  store i32 %26, ptr %46, align 4, !tbaa !15
  %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2
  %47 = getelementptr inbounds i32, ptr %29, i64 %indvars.iv.next.1
  store i32 %22, ptr %47, align 4, !tbaa !15
  %48 = getelementptr inbounds i32, ptr %30, i64 %indvars.iv.next.1
  store i32 %26, ptr %48, align 4, !tbaa !15
  %indvars.iv.next.2 = add nuw nsw i64 %indvars.iv, 3
  %49 = getelementptr inbounds i32, ptr %29, i64 %indvars.iv.next.2
  store i32 %22, ptr %49, align 4, !tbaa !15
  %50 = getelementptr inbounds i32, ptr %30, i64 %indvars.iv.next.2
  store i32 %26, ptr %50, align 4, !tbaa !15
  %indvars.iv.next.3 = add nuw nsw i64 %indvars.iv, 4
  %exitcond.not.3 = icmp eq i64 %indvars.iv.next.3, %wide.trip.count
  br i1 %exitcond.not.3, label %._crit_edge, label %scalar.ph, !llvm.loop !22
}

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) local_unnamed_addr #5

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { noreturn }
attributes #7 = { builtin allocsize(0) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 8}
!6 = !{!"_ZTSN5sc_dt10sc_lv_baseE", !7, i64 0, !8, i64 8, !8, i64 12, !11, i64 16, !11, i64 24}
!7 = !{!"_ZTSN5sc_dt8sc_proxyINS_10sc_lv_baseEEE"}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!6, !8, i64 12}
!13 = !{!6, !11, i64 16}
!14 = !{!6, !11, i64 24}
!15 = !{!8, !8, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.unroll.disable"}
!18 = distinct !{!18, !19, !20, !21}
!19 = !{!"llvm.loop.mustprogress"}
!20 = !{!"llvm.loop.isvectorized", i32 1}
!21 = !{!"llvm.loop.unroll.runtime.disable"}
!22 = distinct !{!22, !19, !20}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,SROAPass,SimplifyCFGPass,TailCallElimPass