; LLVM IR from thalium/icebox :: third_party/virtualbox/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Bus/Ufs (UfsControllerStop)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct._UFS_PASS_THRU_PRIVATE_DATA = type { i32, ptr, %struct.EFI_EXT_SCSI_PASS_THRU_MODE, %struct._EFI_EXT_SCSI_PASS_THRU_PROTOCOL, ptr, i64, i32, i8, ptr, i8, ptr, ptr, i8, ptr, %struct.UFS_EXPOSED_LUNS }
%struct.EFI_EXT_SCSI_PASS_THRU_MODE = type { i32, i32, i32 }
%struct._EFI_EXT_SCSI_PASS_THRU_PROTOCOL = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr }
%struct.UFS_EXPOSED_LUNS = type { [12 x i8], i16 }

@.str.10 = external hidden unnamed_addr constant [154 x i8], align 1
@.str.45 = external hidden unnamed_addr constant [34 x i8], align 1
@.str.46 = external hidden unnamed_addr constant [26 x i8], align 1

; Function Attrs: nounwind uwtable
declare dso_local i64 @UfsWaitMemSet(i64 noundef, i32 noundef, i32 noundef, i64 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @MmioRead32(i64 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

declare zeroext i8 @DebugPrintEnabled() #2

declare zeroext i8 @DebugPrintLevelEnabled(i64 noundef) #2

declare void @DebugPrint(i64 noundef, ptr noundef, ...) #2

declare zeroext i8 @DebugAssertEnabled() #2

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) #2

declare i32 @MmioWrite32(i64 noundef, i32 noundef) #2

declare i64 @MultU64x32(i64 noundef, i32 noundef) #2

; Function Attrs: nounwind uwtable
define dso_local i64 @UfsControllerStop(ptr noundef %0) #0 {
  %2 = alloca i64, align 8
  %3 = alloca ptr, align 8
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  %8 = load ptr, ptr %3, align 8, !tbaa !5
  %9 = getelementptr inbounds %struct._UFS_PASS_THRU_PRIVATE_DATA, ptr %8, i32 0, i32 5
  %10 = load i64, ptr %9, align 8, !tbaa !9
  %11 = add i64 %10, 128
  store i64 %11, ptr %5, align 8, !tbaa !17
  %12 = load i64, ptr %5, align 8, !tbaa !17
  %13 = call i32 @MmioWrite32(i64 noundef %12, i32 noundef 0)
  %14 = load ptr, ptr %3, align 8, !tbaa !5
  %15 = getelementptr inbounds %struct._UFS_PASS_THRU_PRIVATE_DATA, ptr %14, i32 0, i32 5
  %16 = load i64, ptr %15, align 8, !tbaa !9
  %17 = add i64 %16, 96
  store i64 %17, ptr %5, align 8, !tbaa !17
  %18 = load i64, ptr %5, align 8, !tbaa !17
  %19 = call i32 @MmioWrite32(i64 noundef %18, i32 noundef 0)
  %20 = load ptr, ptr %3, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct._UFS_PASS_THRU_PRIVATE_DATA, ptr %20, i32 0, i32 5
  %22 = load i64, ptr %21, align 8, !tbaa !9
  %23 = add i64 %22, 52
  store i64 %23, ptr %5, align 8, !tbaa !17
  %24 = load i64, ptr %5, align 8, !tbaa !17
  %25 = call i32 @MmioRead32(i64 noundef %24)
  store i32 %25, ptr %6, align 4, !tbaa !18
  br label %26

26:                                               ; preds = %1
  %27 = call zeroext i8 @DebugAssertEnabled()
  %28 = icmp ne i8 %27, 0
  br i1 %28, label %29, label %35

29:                                               ; preds = %26
  %30 = load i32, ptr %6, align 4, !tbaa !18
  %31 = and i32 %30, 1
  %32 = icmp eq i32 %31, 1
  br i1 %32, label %34, label %33

33:                                               ; preds = %29
  call void @DebugAssert(ptr noundef @.str.10, i64 noundef 1985, ptr noundef @.str.45)
  br label %34

34:                                               ; preds = %33, %29
  br label %35

35:                                               ; preds = %34, %26
  br label %36

36:                                               ; preds = %35
  br label %37

37:                                               ; preds = %36
  %38 = load i64, ptr %5, align 8, !tbaa !17
  %39 = call i32 @MmioWrite32(i64 noundef %38, i32 noundef 0)
  %40 = load i64, ptr %5, align 8, !tbaa !17
  %41 = call i64 @MultU64x32(i64 noundef 3, i32 noundef 10000000)
  %42 = call i64 @UfsWaitMemSet(i64 noundef %40, i32 noundef 1, i32 noundef 0, i64 noundef %41)
  store i64 %42, ptr %4, align 8, !tbaa !17
  %43 = load i64, ptr %4, align 8, !tbaa !17
  %44 = icmp slt i64 %43, 0
  br i1 %44, label %45, label %46

45:                                               ; preds = %37
  store i64 -9223372036854775801, ptr %2, align 8
  store i32 1, ptr %7, align 4
  br label %61

46:                                               ; preds = %37
  br label %47

47:                                               ; preds = %46
  %48 = call zeroext i8 @DebugPrintEnabled()
  %49 = icmp ne i8 %48, 0
  br i1 %49, label %50, label %58

50:                                               ; preds = %47
  br label %51

51:                                               ; preds = %50
  %52 = call zeroext i8 @DebugPrintLevelEnabled(i64 noundef 64)
  %53 = icmp ne i8 %52, 0
  br i1 %53, label %54, label %55

54:                                               ; preds = %51
  call void (i64, ptr, ...) @DebugPrint(i64 noundef 64, ptr noundef @.str.46)
  br label %55

55:                                               ; preds = %54, %51
  br label %56

56:                                               ; preds = %55
  br label %57

57:                                               ; preds = %56
  br label %58

58:                                               ; preds = %57, %47
  br label %59

59:                                               ; preds = %58
  br label %60

60:                                               ; preds = %59
  store i64 0, ptr %2, align 8
  store i32 1, ptr %7, align 4
  br label %61

61:                                               ; preds = %60, %45
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #3
  %62 = load i64, ptr %2, align 8
  ret i64 %62
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !14, i64 104}
!10 = !{!"_UFS_PASS_THRU_PRIVATE_DATA", !11, i64 0, !6, i64 8, !12, i64 16, !13, i64 32, !6, i64 96, !14, i64 104, !11, i64 112, !7, i64 116, !6, i64 120, !7, i64 128, !6, i64 136, !6, i64 144, !7, i64 152, !6, i64 160, !15, i64 168}
!11 = !{!"int", !7, i64 0}
!12 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8}
!13 = !{!"_EFI_EXT_SCSI_PASS_THRU_PROTOCOL", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56}
!14 = !{!"long long", !7, i64 0}
!15 = !{!"", !7, i64 0, !16, i64 12, !16, i64 13}
!16 = !{!"short", !7, i64 0}
!17 = !{!14, !14, i64 0}
!18 = !{!11, !11, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.10 = external hidden unnamed_addr constant [154 x i8], align 1
@.str.45 = external hidden unnamed_addr constant [34 x i8], align 1
@.str.46 = external hidden unnamed_addr constant [26 x i8], align 1

; Function Attrs: nounwind uwtable
declare dso_local i64 @UfsWaitMemSet(i64 noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #0

declare i32 @MmioRead32(i64 noundef) local_unnamed_addr #1

declare zeroext i8 @DebugPrintEnabled() local_unnamed_addr #1

declare zeroext i8 @DebugPrintLevelEnabled(i64 noundef) local_unnamed_addr #1

declare void @DebugPrint(i64 noundef, ptr noundef, ...) local_unnamed_addr #1

declare zeroext i8 @DebugAssertEnabled() local_unnamed_addr #1

declare void @DebugAssert(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #1

declare i32 @MmioWrite32(i64 noundef, i32 noundef) local_unnamed_addr #1

declare i64 @MultU64x32(i64 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local range(i64 -9223372036854775801, 1) i64 @UfsControllerStop(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
  %2 = getelementptr inbounds i8, ptr %0, i64 104
  %3 = load i64, ptr %2, align 8, !tbaa !5
  %4 = add i64 %3, 128
  %5 = tail call i32 @MmioWrite32(i64 noundef %4, i32 noundef 0) #2
  %6 = load i64, ptr %2, align 8, !tbaa !5
  %7 = add i64 %6, 96
  %8 = tail call i32 @MmioWrite32(i64 noundef %7, i32 noundef 0) #2
  %9 = load i64, ptr %2, align 8, !tbaa !5
  %10 = add i64 %9, 52
  %11 = tail call i32 @MmioRead32(i64 noundef %10) #2
  %12 = tail call zeroext i8 @DebugAssertEnabled() #2
  %.not = icmp ne i8 %12, 0
  %13 = and i32 %11, 1
  %.not10 = icmp eq i32 %13, 0
  %or.cond = select i1 %.not, i1 %.not10, i1 false
  br i1 %or.cond, label %14, label %15

14:                                               ; preds = %1
  tail call void @DebugAssert(ptr noundef nonnull @.str.10, i64 noundef 1985, ptr noundef nonnull @.str.45) #2
  br label %15

15:                                               ; preds = %14, %1
  %16 = tail call i32 @MmioWrite32(i64 noundef %10, i32 noundef 0) #2
  %17 = tail call i64 @MultU64x32(i64 noundef 3, i32 noundef 10000000) #2
  %18 = tail call i64 @UfsWaitMemSet(i64 noundef %10, i32 noundef 1, i32 noundef 0, i64 noundef %17)
  %19 = icmp slt i64 %18, 0
  br i1 %19, label %25, label %20

20:                                               ; preds = %15
  %21 = tail call zeroext i8 @DebugPrintEnabled() #2
  %.not11 = icmp eq i8 %21, 0
  br i1 %.not11, label %25, label %22

22:                                               ; preds = %20
  %23 = tail call zeroext i8 @DebugPrintLevelEnabled(i64 noundef 64) #2
  %.not12 = icmp eq i8 %23, 0
  br i1 %.not12, label %25, label %24

24:                                               ; preds = %22
  tail call void (i64, ptr, ...) @DebugPrint(i64 noundef 64, ptr noundef nonnull @.str.46) #2
  br label %25

25:                                               ; preds = %20, %24, %22, %15
  %.0 = phi i64 [ -9223372036854775801, %15 ], [ 0, %22 ], [ 0, %24 ], [ 0, %20 ]
  ret i64 %.0
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !13, i64 104}
!6 = !{!"_UFS_PASS_THRU_PRIVATE_DATA", !7, i64 0, !10, i64 8, !11, i64 16, !12, i64 32, !10, i64 96, !13, i64 104, !7, i64 112, !8, i64 116, !10, i64 120, !8, i64 128, !10, i64 136, !10, i64 144, !8, i64 152, !10, i64 160, !14, i64 168}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8}
!12 = !{!"_EFI_EXT_SCSI_PASS_THRU_PROTOCOL", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !10, i64 56}
!13 = !{!"long long", !8, i64 0}
!14 = !{!"", !8, i64 0, !15, i64 12, !15, i64 13}
!15 = !{!"short", !8, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass