; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/datatypes/int (sc_signed)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::sc_signed" = type { %"class.sc_dt::sc_value_base", i32, i32, i32, ptr }
%"class.sc_dt::sc_value_base" = type { ptr }
%"class.sc_dt::sc_signed_subref_r" = type <{ %"class.sc_dt::sc_value_base", i32, [4 x i8], ptr, i32, [4 x i8] }>

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK5sc_dt9sc_signed4testEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt9sc_signed3setEib(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef, i1 noundef zeroext) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5sc_dt16sc_signed_subref10concat_setERKNS_9sc_signedEi(ptr noundef nonnull align 8 dereferenceable(28) %0, ptr noundef nonnull align 8 dereferenceable(32) %1, i32 noundef %2) unnamed_addr #1 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i8, align 1
  %11 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !9
  %12 = load ptr, ptr %4, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %10) #3
  %13 = load ptr, ptr %5, align 8, !tbaa !5
  %14 = load ptr, ptr %5, align 8, !tbaa !5
  %15 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %14, i32 0, i32 2
  %16 = load i32, ptr %15, align 4, !tbaa !11
  %17 = sub nsw i32 %16, 1
  %18 = call noundef zeroext i1 @_ZNK5sc_dt9sc_signed4testEi(ptr noundef nonnull align 8 dereferenceable(32) %13, i32 noundef %17)
  %19 = zext i1 %18 to i8
  store i8 %19, ptr %10, align 1, !tbaa !14
  %20 = load ptr, ptr %5, align 8, !tbaa !5
  %21 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %20, i32 0, i32 2
  %22 = load i32, ptr %21, align 4, !tbaa !11
  %23 = load i32, ptr %6, align 4, !tbaa !9
  %24 = add nsw i32 %23, 1
  %25 = sub nsw i32 %22, %24
  store i32 %25, ptr %8, align 4, !tbaa !9
  %26 = load i32, ptr %8, align 4, !tbaa !9
  %27 = icmp sge i32 %26, 0
  br i1 %27, label %28, label %70

28:                                               ; preds = %3
  %29 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %12, i32 0, i32 1
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  %30 = load i32, ptr %8, align 4, !tbaa !9
  %31 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %12, i32 0, i32 4
  %32 = load i32, ptr %31, align 8, !tbaa !16
  %33 = add nsw i32 %30, %32
  store i32 %33, ptr %11, align 4, !tbaa !9
  %34 = call noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %29, ptr noundef nonnull align 4 dereferenceable(4) %11)
  store i32 %34, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  %35 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %35, ptr %9, align 4, !tbaa !9
  %36 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %12, i32 0, i32 4
  %37 = load i32, ptr %36, align 8, !tbaa !16
  store i32 %37, ptr %7, align 4, !tbaa !9
  br label %38

38:                                               ; preds = %49, %28
  %39 = load i32, ptr %7, align 4, !tbaa !9
  %40 = load i32, ptr %8, align 4, !tbaa !9
  %41 = icmp sle i32 %39, %40
  br i1 %41, label %42, label %54

42:                                               ; preds = %38
  %43 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %12, i32 0, i32 3
  %44 = load ptr, ptr %43, align 8, !tbaa !18
  %45 = load i32, ptr %7, align 4, !tbaa !9
  %46 = load ptr, ptr %5, align 8, !tbaa !5
  %47 = load i32, ptr %9, align 4, !tbaa !9
  %48 = call noundef zeroext i1 @_ZNK5sc_dt9sc_signed4testEi(ptr noundef nonnull align 8 dereferenceable(32) %46, i32 noundef %47)
  call void @_ZN5sc_dt9sc_signed3setEib(ptr noundef nonnull align 8 dereferenceable(32) %44, i32 noundef %45, i1 noundef zeroext %48)
  br label %49

49:                                               ; preds = %42
  %50 = load i32, ptr %7, align 4, !tbaa !9
  %51 = add nsw i32 %50, 1
  store i32 %51, ptr %7, align 4, !tbaa !9
  %52 = load i32, ptr %9, align 4, !tbaa !9
  %53 = add nsw i32 %52, 1
  store i32 %53, ptr %9, align 4, !tbaa !9
  br label %38, !llvm.loop !19

54:                                               ; preds = %38
  br label %55

55:                                               ; preds = %66, %54
  %56 = load i32, ptr %7, align 4, !tbaa !9
  %57 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %12, i32 0, i32 1
  %58 = load i32, ptr %57, align 8, !tbaa !21
  %59 = icmp sle i32 %56, %58
  br i1 %59, label %60, label %69

60:                                               ; preds = %55
  %61 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %12, i32 0, i32 3
  %62 = load ptr, ptr %61, align 8, !tbaa !18
  %63 = load i32, ptr %7, align 4, !tbaa !9
  %64 = load i8, ptr %10, align 1, !tbaa !14, !range !22, !noundef !23
  %65 = trunc i8 %64 to i1
  call void @_ZN5sc_dt9sc_signed3setEib(ptr noundef nonnull align 8 dereferenceable(32) %62, i32 noundef %63, i1 noundef zeroext %65)
  br label %66

66:                                               ; preds = %60
  %67 = load i32, ptr %7, align 4, !tbaa !9
  %68 = add nsw i32 %67, 1
  store i32 %68, ptr %7, align 4, !tbaa !9
  br label %55, !llvm.loop !24

69:                                               ; preds = %55
  br label %88

70:                                               ; preds = %3
  %71 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %12, i32 0, i32 4
  %72 = load i32, ptr %71, align 8, !tbaa !16
  store i32 %72, ptr %7, align 4, !tbaa !9
  br label %73

73:                                               ; preds = %84, %70
  %74 = load i32, ptr %7, align 4, !tbaa !9
  %75 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %12, i32 0, i32 1
  %76 = load i32, ptr %75, align 8, !tbaa !21
  %77 = icmp sle i32 %74, %76
  br i1 %77, label %78, label %87

78:                                               ; preds = %73
  %79 = getelementptr inbounds %"class.sc_dt::sc_signed_subref_r", ptr %12, i32 0, i32 3
  %80 = load ptr, ptr %79, align 8, !tbaa !18
  %81 = load i32, ptr %7, align 4, !tbaa !9
  %82 = load i8, ptr %10, align 1, !tbaa !14, !range !22, !noundef !23
  %83 = trunc i8 %82 to i1
  call void @_ZN5sc_dt9sc_signed3setEib(ptr noundef nonnull align 8 dereferenceable(32) %80, i32 noundef %81, i1 noundef zeroext %83)
  br label %84

84:                                               ; preds = %78
  %85 = load i32, ptr %7, align 4, !tbaa !9
  %86 = add nsw i32 %85, 1
  store i32 %86, ptr %7, align 4, !tbaa !9
  br label %73, !llvm.loop !25

87:                                               ; preds = %73
  br label %88

88:                                               ; preds = %87, %69
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 12}
!12 = !{!"_ZTSN5sc_dt9sc_signedE", !13, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !6, i64 24}
!13 = !{!"_ZTSN5sc_dt13sc_value_baseE"}
!14 = !{!15, !15, i64 0}
!15 = !{!"bool", !7, i64 0}
!16 = !{!17, !10, i64 24}
!17 = !{!"_ZTSN5sc_dt18sc_signed_subref_rE", !13, i64 0, !10, i64 8, !6, i64 16, !10, i64 24}
!18 = !{!17, !6, i64 16}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = !{!17, !10, i64 8}
!22 = !{i8 0, i8 2}
!23 = !{}
!24 = distinct !{!24, !20}
!25 = distinct !{!25, !20}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK5sc_dt9sc_signed4testEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt9sc_signed3setEib(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef, i1 noundef zeroext) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5sc_dt16sc_signed_subref10concat_setERKNS_9sc_signedEi(ptr noundef nonnull align 8 dereferenceable(28) %0, ptr noundef nonnull align 8 dereferenceable(32) %1, i32 noundef %2) unnamed_addr #1 align 2 {
  %4 = alloca i32, align 4
  %5 = getelementptr inbounds i8, ptr %1, i64 12
  %6 = load i32, ptr %5, align 4, !tbaa !5
  %7 = add nsw i32 %6, -1
  %8 = tail call noundef zeroext i1 @_ZNK5sc_dt9sc_signed4testEi(ptr noundef nonnull align 8 dereferenceable(32) %1, i32 noundef %7)
  %9 = load i32, ptr %5, align 4, !tbaa !5
  %.neg = xor i32 %2, -1
  %10 = add i32 %9, %.neg
  %11 = icmp sgt i32 %10, -1
  br i1 %11, label %12, label %32

12:                                               ; preds = %3
  %13 = getelementptr inbounds i8, ptr %0, i64 8
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
  %14 = getelementptr inbounds i8, ptr %0, i64 24
  %15 = load i32, ptr %14, align 8, !tbaa !12
  %16 = add nsw i32 %15, %10
  store i32 %16, ptr %4, align 4, !tbaa !14
  %17 = call noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %13, ptr noundef nonnull align 4 dereferenceable(4) %4)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
  %18 = load i32, ptr %14, align 8, !tbaa !12
  %.not2429 = icmp sgt i32 %18, %17
  br i1 %.not2429, label %.preheader, label %.lr.ph32

.lr.ph32:                                         ; preds = %12
  %19 = getelementptr inbounds i8, ptr %0, i64 16
  %20 = add i32 %17, 1
  br label %23

.preheader:                                       ; preds = %23, %12
  %.0.lcssa = phi i32 [ %18, %12 ], [ %20, %23 ]
  %21 = load i32, ptr %13, align 8, !tbaa !15
  %.not2533 = icmp sgt i32 %.0.lcssa, %21
  br i1 %.not2533, label %.loopexit, label %.lr.ph35

.lr.ph35:                                         ; preds = %.preheader
  %22 = getelementptr inbounds i8, ptr %0, i64 16
  br label %28

23:                                               ; preds = %.lr.ph32, %23
  %.031 = phi i32 [ %18, %.lr.ph32 ], [ %26, %23 ]
  %.02230 = phi i32 [ %2, %.lr.ph32 ], [ %27, %23 ]
  %24 = load ptr, ptr %19, align 8, !tbaa !16
  %25 = call noundef zeroext i1 @_ZNK5sc_dt9sc_signed4testEi(ptr noundef nonnull align 8 dereferenceable(32) %1, i32 noundef %.02230)
  call void @_ZN5sc_dt9sc_signed3setEib(ptr noundef nonnull align 8 dereferenceable(32) %24, i32 noundef %.031, i1 noundef zeroext %25)
  %26 = add i32 %.031, 1
  %27 = add nsw i32 %.02230, 1
  %exitcond.not = icmp eq i32 %.031, %17
  br i1 %exitcond.not, label %.preheader, label %23, !llvm.loop !17

28:                                               ; preds = %.lr.ph35, %28
  %.134 = phi i32 [ %.0.lcssa, %.lr.ph35 ], [ %30, %28 ]
  %29 = load ptr, ptr %22, align 8, !tbaa !16
  call void @_ZN5sc_dt9sc_signed3setEib(ptr noundef nonnull align 8 dereferenceable(32) %29, i32 noundef %.134, i1 noundef zeroext %8)
  %30 = add nsw i32 %.134, 1
  %31 = load i32, ptr %13, align 8, !tbaa !15
  %.not25.not = icmp slt i32 %.134, %31
  br i1 %.not25.not, label %28, label %.loopexit, !llvm.loop !19

32:                                               ; preds = %3
  %33 = getelementptr inbounds i8, ptr %0, i64 24
  %34 = load i32, ptr %33, align 8, !tbaa !12
  %35 = getelementptr inbounds i8, ptr %0, i64 8
  %36 = load i32, ptr %35, align 8, !tbaa !15
  %.not27 = icmp sgt i32 %34, %36
  br i1 %.not27, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %32
  %37 = getelementptr inbounds i8, ptr %0, i64 16
  br label %38

38:                                               ; preds = %.lr.ph, %38
  %.228 = phi i32 [ %34, %.lr.ph ], [ %40, %38 ]
  %39 = load ptr, ptr %37, align 8, !tbaa !16
  tail call void @_ZN5sc_dt9sc_signed3setEib(ptr noundef nonnull align 8 dereferenceable(32) %39, i32 noundef %.228, i1 noundef zeroext %8)
  %40 = add nsw i32 %.228, 1
  %41 = load i32, ptr %35, align 8, !tbaa !15
  %.not.not = icmp slt i32 %.228, %41
  br i1 %.not.not, label %38, label %.loopexit, !llvm.loop !20

.loopexit:                                        ; preds = %38, %28, %32, %.preheader
  ret void
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 12}
!6 = !{!"_ZTSN5sc_dt9sc_signedE", !7, i64 0, !8, i64 8, !8, i64 12, !8, i64 16, !11, i64 24}
!7 = !{!"_ZTSN5sc_dt13sc_value_baseE"}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !8, i64 24}
!13 = !{!"_ZTSN5sc_dt18sc_signed_subref_rE", !7, i64 0, !8, i64 8, !11, i64 16, !8, i64 24}
!14 = !{!8, !8, i64 0}
!15 = !{!13, !8, i64 8}
!16 = !{!13, !11, i64 16}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = distinct !{!19, !18}
!20 = distinct !{!20, !18}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass