; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/kernel (sc_process)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_core::sc_process_b" = type <{ %"class.sc_core::sc_object", ptr, i32, i32, i32, i32, i8, i8, [6 x i8], ptr, i32, [4 x i8], ptr, ptr, i8, i8, i8, i8, [4 x i8], ptr, ptr, i32, i32, %"class.std::vector.18", ptr, ptr, ptr, ptr, { i64, i64 }, i32, [4 x i8], %"class.std::vector.23", i8, [7 x i8], ptr, ptr, i32, i8, [3 x i8], ptr, i32, i8, [3 x i8] }>
%"class.sc_core::sc_object" = type { ptr, ptr, %"class.std::vector", %"class.std::vector.0", %"class.std::__cxx11::basic_string", ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector.18" = type { %"struct.std::_Vector_base.19" }
%"struct.std::_Vector_base.19" = type { %"struct.std::_Vector_base<sc_core::sc_reset *, std::allocator<sc_core::sc_reset *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_reset *, std::allocator<sc_core::sc_reset *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_reset *, std::allocator<sc_core::sc_reset *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_reset *, std::allocator<sc_core::sc_reset *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.23" = type { %"struct.std::_Vector_base.24" }
%"struct.std::_Vector_base.24" = type { %"struct.std::_Vector_base<const sc_core::sc_event *, std::allocator<const sc_core::sc_event *>>::_Vector_impl" }
%"struct.std::_Vector_base<const sc_core::sc_event *, std::allocator<const sc_core::sc_event *>>::_Vector_impl" = type { %"struct.std::_Vector_base<const sc_core::sc_event *, std::allocator<const sc_core::sc_event *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<const sc_core::sc_event *, std::allocator<const sc_core::sc_event *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress uwtable
define dso_local noundef ptr @_ZN7sc_core12sc_process_b15gen_unique_nameEPKcb(ptr noundef nonnull align 8 dereferenceable(357) %0, ptr noundef %1, i1 noundef zeroext %2) #0 align 2 personality ptr @__gxx_personality_v0 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i8, align 1
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  %9 = zext i1 %2 to i8
  store i8 %9, ptr %6, align 1, !tbaa !9
  %10 = load ptr, ptr %4, align 8
  %11 = getelementptr inbounds %"class.sc_core::sc_process_b", ptr %10, i32 0, i32 20
  %12 = load ptr, ptr %11, align 8, !tbaa !11
  %13 = icmp ne ptr %12, null
  br i1 %13, label %22, label %14

14:                                               ; preds = %3
  %15 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 8248) #4
  invoke void @_ZN7sc_core11sc_name_genC1Ev(ptr noundef nonnull align 8 dereferenceable(8248) %15)
          to label %16 unwind label %18

16:                                               ; preds = %14
  %17 = getelementptr inbounds %"class.sc_core::sc_process_b", ptr %10, i32 0, i32 20
  store ptr %15, ptr %17, align 8, !tbaa !11
  br label %22

18:                                               ; preds = %14
  %19 = landingpad { ptr, i32 }
          cleanup
  %20 = extractvalue { ptr, i32 } %19, 0
  store ptr %20, ptr %7, align 8
  %21 = extractvalue { ptr, i32 } %19, 1
  store i32 %21, ptr %8, align 4
  call void @_ZdlPvm(ptr noundef %15, i64 noundef 8248) #5
  br label %29

22:                                               ; preds = %16, %3
  %23 = getelementptr inbounds %"class.sc_core::sc_process_b", ptr %10, i32 0, i32 20
  %24 = load ptr, ptr %23, align 8, !tbaa !11
  %25 = load ptr, ptr %5, align 8, !tbaa !5
  %26 = load i8, ptr %6, align 1, !tbaa !9, !range !37, !noundef !38
  %27 = trunc i8 %26 to i1
  %28 = call noundef ptr @_ZN7sc_core11sc_name_gen15gen_unique_nameEPKcb(ptr noundef nonnull align 8 dereferenceable(8248) %24, ptr noundef %25, i1 noundef zeroext %27)
  ret ptr %28

29:                                               ; preds = %18
  %30 = load ptr, ptr %7, align 8
  %31 = load i32, ptr %8, align 4
  %32 = insertvalue { ptr, i32 } poison, ptr %30, 0
  %33 = insertvalue { ptr, i32 } %32, i32 %31, 1
  resume { ptr, i32 } %33
}

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) #1

declare void @_ZN7sc_core11sc_name_genC1Ev(ptr noundef nonnull align 8 dereferenceable(8248)) unnamed_addr #2

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) #3

declare noundef ptr @_ZN7sc_core11sc_name_gen15gen_unique_nameEPKcb(ptr noundef nonnull align 8 dereferenceable(8248), ptr noundef, i1 noundef zeroext) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { builtin allocsize(0) }
attributes #5 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!12, !6, i64 192}
!12 = !{!"_ZTSN7sc_core12sc_process_bE", !13, i64 0, !6, i64 112, !25, i64 120, !25, i64 124, !25, i64 128, !25, i64 132, !10, i64 136, !10, i64 137, !6, i64 144, !25, i64 152, !6, i64 160, !6, i64 168, !10, i64 176, !10, i64 177, !10, i64 178, !10, i64 179, !6, i64 184, !6, i64 192, !26, i64 200, !25, i64 204, !27, i64 208, !6, i64 232, !6, i64 240, !6, i64 248, !6, i64 256, !7, i64 264, !25, i64 280, !31, i64 288, !10, i64 312, !6, i64 320, !6, i64 328, !35, i64 336, !10, i64 340, !6, i64 344, !36, i64 352, !10, i64 356}
!13 = !{!"_ZTSN7sc_core9sc_objectE", !6, i64 8, !14, i64 16, !18, i64 40, !22, i64 64, !6, i64 96, !6, i64 104}
!14 = !{!"_ZTSSt6vectorIPN7sc_core8sc_eventESaIS2_EE", !15, i64 0}
!15 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE12_Vector_implE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!18 = !{!"_ZTSSt6vectorIPN7sc_core9sc_objectESaIS2_EE", !19, i64 0}
!19 = !{!"_ZTSSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE12_Vector_implE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!22 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !23, i64 0, !24, i64 8, !7, i64 16}
!23 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!24 = !{!"long", !7, i64 0}
!25 = !{!"int", !7, i64 0}
!26 = !{!"_ZTSN7sc_core17sc_curr_proc_kindE", !7, i64 0}
!27 = !{!"_ZTSSt6vectorIPN7sc_core8sc_resetESaIS2_EE", !28, i64 0}
!28 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_resetESaIS2_EE", !29, i64 0}
!29 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_resetESaIS2_EE12_Vector_implE", !30, i64 0}
!30 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_resetESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!31 = !{!"_ZTSSt6vectorIPKN7sc_core8sc_eventESaIS3_EE", !32, i64 0}
!32 = !{!"_ZTSSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE", !33, i64 0}
!33 = !{!"_ZTSNSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE12_Vector_implE", !34, i64 0}
!34 = !{!"_ZTSNSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!35 = !{!"_ZTSN7sc_core12sc_process_b18process_throw_typeE", !7, i64 0}
!36 = !{!"_ZTSN7sc_core12sc_process_b9trigger_tE", !7, i64 0}
!37 = !{i8 0, i8 2}
!38 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress uwtable
define dso_local noundef ptr @_ZN7sc_core12sc_process_b15gen_unique_nameEPKcb(ptr nocapture noundef nonnull align 8 dereferenceable(357) %0, ptr noundef %1, i1 noundef zeroext %2) local_unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  %4 = getelementptr inbounds i8, ptr %0, i64 192
  %5 = load ptr, ptr %4, align 8, !tbaa !5
  %.not = icmp eq ptr %5, null
  br i1 %.not, label %6, label %11

6:                                                ; preds = %3
  %7 = tail call noalias noundef nonnull dereferenceable(8248) ptr @_Znwm(i64 noundef 8248) #4
  invoke void @_ZN7sc_core11sc_name_genC1Ev(ptr noundef nonnull align 8 dereferenceable(8248) %7)
          to label %8 unwind label %9

8:                                                ; preds = %6
  store ptr %7, ptr %4, align 8, !tbaa !5
  br label %11

9:                                                ; preds = %6
  %10 = landingpad { ptr, i32 }
          cleanup
  tail call void @_ZdlPvm(ptr noundef nonnull %7, i64 noundef 8248) #5
  resume { ptr, i32 } %10

11:                                               ; preds = %8, %3
  %12 = phi ptr [ %7, %8 ], [ %5, %3 ]
  %13 = tail call noundef ptr @_ZN7sc_core11sc_name_gen15gen_unique_nameEPKcb(ptr noundef nonnull align 8 dereferenceable(8248) %12, ptr noundef %1, i1 noundef zeroext %2)
  ret ptr %13
}

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) local_unnamed_addr #1

declare void @_ZN7sc_core11sc_name_genC1Ev(ptr noundef nonnull align 8 dereferenceable(8248)) unnamed_addr #2

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) local_unnamed_addr #3

declare noundef ptr @_ZN7sc_core11sc_name_gen15gen_unique_nameEPKcb(ptr noundef nonnull align 8 dereferenceable(8248), ptr noundef, i1 noundef zeroext) local_unnamed_addr #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { builtin allocsize(0) }
attributes #5 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 192}
!6 = !{!"_ZTSN7sc_core12sc_process_bE", !7, i64 0, !8, i64 112, !22, i64 120, !22, i64 124, !22, i64 128, !22, i64 132, !23, i64 136, !23, i64 137, !8, i64 144, !22, i64 152, !8, i64 160, !8, i64 168, !23, i64 176, !23, i64 177, !23, i64 178, !23, i64 179, !8, i64 184, !8, i64 192, !24, i64 200, !22, i64 204, !25, i64 208, !8, i64 232, !8, i64 240, !8, i64 248, !8, i64 256, !9, i64 264, !22, i64 280, !29, i64 288, !23, i64 312, !8, i64 320, !8, i64 328, !33, i64 336, !23, i64 340, !8, i64 344, !34, i64 352, !23, i64 356}
!7 = !{!"_ZTSN7sc_core9sc_objectE", !8, i64 8, !11, i64 16, !15, i64 40, !19, i64 64, !8, i64 96, !8, i64 104}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"_ZTSSt6vectorIPN7sc_core8sc_eventESaIS2_EE", !12, i64 0}
!12 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE", !13, i64 0}
!13 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE12_Vector_implE", !14, i64 0}
!14 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE17_Vector_impl_dataE", !8, i64 0, !8, i64 8, !8, i64 16}
!15 = !{!"_ZTSSt6vectorIPN7sc_core9sc_objectESaIS2_EE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE17_Vector_impl_dataE", !8, i64 0, !8, i64 8, !8, i64 16}
!19 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !20, i64 0, !21, i64 8, !9, i64 16}
!20 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !8, i64 0}
!21 = !{!"long", !9, i64 0}
!22 = !{!"int", !9, i64 0}
!23 = !{!"bool", !9, i64 0}
!24 = !{!"_ZTSN7sc_core17sc_curr_proc_kindE", !9, i64 0}
!25 = !{!"_ZTSSt6vectorIPN7sc_core8sc_resetESaIS2_EE", !26, i64 0}
!26 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_resetESaIS2_EE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_resetESaIS2_EE12_Vector_implE", !28, i64 0}
!28 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_resetESaIS2_EE17_Vector_impl_dataE", !8, i64 0, !8, i64 8, !8, i64 16}
!29 = !{!"_ZTSSt6vectorIPKN7sc_core8sc_eventESaIS3_EE", !30, i64 0}
!30 = !{!"_ZTSSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE12_Vector_implE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseIPKN7sc_core8sc_eventESaIS3_EE17_Vector_impl_dataE", !8, i64 0, !8, i64 8, !8, i64 16}
!33 = !{!"_ZTSN7sc_core12sc_process_b18process_throw_typeE", !9, i64 0}
!34 = !{!"_ZTSN7sc_core12sc_process_b9trigger_tE", !9, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass