; LLVM IR from gem5/gem5 :: ext/mcpat/logic.ll (ZN7DFFCell16compute_DFF_cellEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.TechnologyParameter = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, i64, %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::ScalingFactor", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType" }
%"class.TechnologyParameter::DeviceType" = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::InterconnectType" = type { double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::ScalingFactor" = type { double, double, double }
%"class.TechnologyParameter::MemoryType" = type { double, double, double, double, double, double }
%class.DFFCell = type { %class.Component, %class.InputParameter, i8, double, double, double, double, i32, i32, i32, i32, i32, %class.powerDef, %class.powerDef, %class.powerDef, %class.powerDef }
%class.Component = type { %class.Area, %class.powerDef, %class.powerDef, double, double }
%class.Area = type { double, double, double }
%class.InputParameter = type { i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, i32, double, double, i32, i32, i32, i32, i32, i8, i8, i8, i8, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i8, i8, i32, i32, i8, double, double, i8, i32, i32, i8 }
%class.powerDef = type { %class.powerComponents, %class.powerComponents, %class.powerComponents }
%class.powerComponents = type { double, double, double, double, double }

@g_tp = external global %class.TechnologyParameter, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #1

declare noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef, double noundef, i32 noundef, i32 noundef, i1 noundef zeroext, i1 noundef zeroext, i1 noundef zeroext, i32 noundef) #2

declare noundef double @_Z6gate_Cddbbb(double noundef, double noundef, i1 noundef zeroext, i1 noundef zeroext, i1 noundef zeroext) #2

declare noundef double @_Z17cmos_Isub_leakageddi9Gate_typebbb17Half_net_topology(double noundef, double noundef, i32 noundef, i32 noundef, i1 noundef zeroext, i1 noundef zeroext, i1 noundef zeroext, i32 noundef) #2

; Function Attrs: mustprogress uwtable
declare dso_local noundef double @_ZN7DFFCell13fpfp_node_capEjj(ptr noundef nonnull align 8 dereferenceable(1192), i32 noundef, i32 noundef) #3 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7DFFCell16compute_DFF_cellEv(ptr noundef nonnull align 8 dereferenceable(1192) %0) #3 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca double, align 8
  %4 = alloca double, align 8
  %5 = alloca double, align 8
  %6 = alloca double, align 8
  %7 = alloca double, align 8
  %8 = alloca double, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %9 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #4
  %10 = call noundef double @_ZN7DFFCell13fpfp_node_capEjj(ptr noundef nonnull align 8 dereferenceable(1192) %9, i32 noundef 2, i32 noundef 1)
  store double %10, ptr %8, align 8, !tbaa !9
  store double %10, ptr %7, align 8, !tbaa !9
  store double %10, ptr %3, align 8, !tbaa !9
  %11 = call noundef double @_ZN7DFFCell13fpfp_node_capEjj(ptr noundef nonnull align 8 dereferenceable(1192) %9, i32 noundef 2, i32 noundef 3)
  store double %11, ptr %4, align 8, !tbaa !9
  %12 = call noundef double @_ZN7DFFCell13fpfp_node_capEjj(ptr noundef nonnull align 8 dereferenceable(1192) %9, i32 noundef 3, i32 noundef 2)
  store double %12, ptr %5, align 8, !tbaa !9
  %13 = call noundef double @_ZN7DFFCell13fpfp_node_capEjj(ptr noundef nonnull align 8 dereferenceable(1192) %9, i32 noundef 2, i32 noundef 2)
  store double %13, ptr %6, align 8, !tbaa !9
  %14 = getelementptr inbounds %class.DFFCell, ptr %9, i32 0, i32 4
  %15 = load double, ptr %14, align 8, !tbaa !11
  %16 = getelementptr inbounds %class.DFFCell, ptr %9, i32 0, i32 5
  %17 = load double, ptr %16, align 8, !tbaa !21
  %18 = fadd double %15, %17
  %19 = getelementptr inbounds %class.DFFCell, ptr %9, i32 0, i32 2
  %20 = load i8, ptr %19, align 8, !tbaa !22, !range !23, !noundef !24
  %21 = trunc i8 %20 to i1
  %22 = call noundef double @_Z6gate_Cddbbb(double noundef %18, double noundef 0.000000e+00, i1 noundef zeroext %21, i1 noundef zeroext false, i1 noundef zeroext false)
  %23 = fmul double 2.000000e+00, %22
  %24 = getelementptr inbounds %class.DFFCell, ptr %9, i32 0, i32 6
  store double %23, ptr %24, align 8, !tbaa !25
  %25 = load double, ptr %6, align 8, !tbaa !9
  %26 = load double, ptr %3, align 8, !tbaa !9
  %27 = fadd double %25, %26
  %28 = load double, ptr %4, align 8, !tbaa !9
  %29 = fadd double %27, %28
  %30 = load double, ptr %5, align 8, !tbaa !9
  %31 = fadd double %29, %30
  %32 = load double, ptr %7, align 8, !tbaa !9
  %33 = fadd double %31, %32
  %34 = load double, ptr %8, align 8, !tbaa !9
  %35 = fadd double %33, %34
  %36 = getelementptr inbounds %class.DFFCell, ptr %9, i32 0, i32 3
  %37 = load double, ptr %36, align 8, !tbaa !26
  %38 = call double @llvm.fmuladd.f64(double 2.000000e+00, double %37, double %35)
  %39 = fmul double %38, 5.000000e-01
  %40 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::DeviceType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 48), i32 0, i32 9), align 8, !tbaa !27
  %41 = fmul double %39, %40
  %42 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::DeviceType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 48), i32 0, i32 9), align 8, !tbaa !27
  %43 = getelementptr inbounds %class.DFFCell, ptr %9, i32 0, i32 12
  %44 = getelementptr inbounds %class.powerDef, ptr %43, i32 0, i32 0
  %45 = getelementptr inbounds %class.powerComponents, ptr %44, i32 0, i32 0
  %46 = load double, ptr %45, align 8, !tbaa !34
  %47 = call double @llvm.fmuladd.f64(double %41, double %42, double %46)
  store double %47, ptr %45, align 8, !tbaa !34
  %48 = load double, ptr %5, align 8, !tbaa !9
  %49 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::DeviceType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 48), i32 0, i32 9), align 8, !tbaa !27
  %50 = fmul double %48, %49
  %51 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::DeviceType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 48), i32 0, i32 9), align 8, !tbaa !27
  %52 = getelementptr inbounds %class.DFFCell, ptr %9, i32 0, i32 13
  %53 = getelementptr inbounds %class.powerDef, ptr %52, i32 0, i32 0
  %54 = getelementptr inbounds %class.powerComponents, ptr %53, i32 0, i32 0
  %55 = load double, ptr %54, align 8, !tbaa !35
  %56 = call double @llvm.fmuladd.f64(double %50, double %51, double %55)
  store double %56, ptr %54, align 8, !tbaa !35
  %57 = load double, ptr %4, align 8, !tbaa !9
  %58 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::DeviceType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 48), i32 0, i32 9), align 8, !tbaa !27
  %59 = fmul double %57, %58
  %60 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::DeviceType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 48), i32 0, i32 9), align 8, !tbaa !27
  %61 = getelementptr inbounds %class.DFFCell, ptr %9, i32 0, i32 14
  %62 = getelementptr inbounds %class.powerDef, ptr %61, i32 0, i32 0
  %63 = getelementptr inbounds %class.powerComponents, ptr %62, i32 0, i32 0
  %64 = load double, ptr %63, align 8, !tbaa !36
  %65 = call double @llvm.fmuladd.f64(double %59, double %60, double %64)
  store double %65, ptr %63, align 8, !tbaa !36
  %66 = getelementptr inbounds %class.DFFCell, ptr %9, i32 0, i32 6
  %67 = load double, ptr %66, align 8, !tbaa !25
  %68 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::DeviceType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 48), i32 0, i32 9), align 8, !tbaa !27
  %69 = fmul double %67, %68
  %70 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::DeviceType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 48), i32 0, i32 9), align 8, !tbaa !27
  %71 = getelementptr inbounds %class.DFFCell, ptr %9, i32 0, i32 15
  %72 = getelementptr inbounds %class.powerDef, ptr %71, i32 0, i32 0
  %73 = getelementptr inbounds %class.powerComponents, ptr %72, i32 0, i32 0
  %74 = load double, ptr %73, align 8, !tbaa !37
  %75 = call double @llvm.fmuladd.f64(double %69, double %70, double %74)
  store double %75, ptr %73, align 8, !tbaa !37
  %76 = getelementptr inbounds %class.DFFCell, ptr %9, i32 0, i32 4
  %77 = load double, ptr %76, align 8, !tbaa !11
  %78 = getelementptr inbounds %class.DFFCell, ptr %9, i32 0, i32 5
  %79 = load double, ptr %78, align 8, !tbaa !21
  %80 = call noundef double @_Z17cmos_Isub_leakageddi9Gate_typebbb17Half_net_topology(double noundef %77, double noundef %79, i32 noundef 2, i32 noundef 3, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %81 = getelementptr inbounds %class.DFFCell, ptr %9, i32 0, i32 4
  %82 = load double, ptr %81, align 8, !tbaa !11
  %83 = getelementptr inbounds %class.DFFCell, ptr %9, i32 0, i32 4
  %84 = load double, ptr %83, align 8, !tbaa !11
  %85 = call noundef double @_Z17cmos_Isub_leakageddi9Gate_typebbb17Half_net_topology(double noundef %82, double noundef %84, i32 noundef 3, i32 noundef 3, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %86 = call double @llvm.fmuladd.f64(double %80, double 5.000000e+00, double %85)
  %87 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::DeviceType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 48), i32 0, i32 9), align 8, !tbaa !27
  %88 = getelementptr inbounds %class.DFFCell, ptr %9, i32 0, i32 12
  %89 = getelementptr inbounds %class.powerDef, ptr %88, i32 0, i32 0
  %90 = getelementptr inbounds %class.powerComponents, ptr %89, i32 0, i32 1
  %91 = load double, ptr %90, align 8, !tbaa !38
  %92 = call double @llvm.fmuladd.f64(double %86, double %87, double %91)
  store double %92, ptr %90, align 8, !tbaa !38
  %93 = getelementptr inbounds %class.DFFCell, ptr %9, i32 0, i32 4
  %94 = load double, ptr %93, align 8, !tbaa !11
  %95 = getelementptr inbounds %class.DFFCell, ptr %9, i32 0, i32 5
  %96 = load double, ptr %95, align 8, !tbaa !21
  %97 = call noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef %94, double noundef %96, i32 noundef 2, i32 noundef 3, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %98 = getelementptr inbounds %class.DFFCell, ptr %9, i32 0, i32 4
  %99 = load double, ptr %98, align 8, !tbaa !11
  %100 = getelementptr inbounds %class.DFFCell, ptr %9, i32 0, i32 4
  %101 = load double, ptr %100, align 8, !tbaa !11
  %102 = call noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef %99, double noundef %101, i32 noundef 3, i32 noundef 3, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %103 = call double @llvm.fmuladd.f64(double %97, double 5.000000e+00, double %102)
  %104 = load double, ptr getelementptr inbounds (%"class.TechnologyParameter::DeviceType", ptr getelementptr inbounds (%class.TechnologyParameter, ptr @g_tp, i32 0, i32 48), i32 0, i32 9), align 8, !tbaa !27
  %105 = getelementptr inbounds %class.DFFCell, ptr %9, i32 0, i32 12
  %106 = getelementptr inbounds %class.powerDef, ptr %105, i32 0, i32 0
  %107 = getelementptr inbounds %class.powerComponents, ptr %106, i32 0, i32 2
  %108 = load double, ptr %107, align 8, !tbaa !39
  %109 = call double @llvm.fmuladd.f64(double %103, double %104, double %108)
  store double %109, ptr %107, align 8, !tbaa !39
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #4
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"double", !7, i64 0}
!11 = !{!12, !10, i64 664}
!12 = !{!"_ZTS7DFFCell", !13, i64 0, !17, i64 280, !19, i64 648, !10, i64 656, !10, i64 664, !10, i64 672, !10, i64 680, !18, i64 688, !18, i64 692, !18, i64 696, !18, i64 700, !18, i64 704, !15, i64 712, !15, i64 832, !15, i64 952, !15, i64 1072}
!13 = !{!"_ZTS9Component", !14, i64 0, !15, i64 24, !15, i64 144, !10, i64 264, !10, i64 272}
!14 = !{!"_ZTS4Area", !10, i64 0, !10, i64 8, !10, i64 16}
!15 = !{!"_ZTS8powerDef", !16, i64 0, !16, i64 40, !16, i64 80}
!16 = !{!"_ZTS15powerComponents", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32}
!17 = !{!"_ZTS14InputParameter", !18, i64 0, !18, i64 4, !18, i64 8, !18, i64 12, !18, i64 16, !19, i64 20, !18, i64 24, !18, i64 28, !18, i64 32, !18, i64 36, !18, i64 40, !18, i64 44, !10, i64 48, !10, i64 56, !18, i64 64, !18, i64 68, !18, i64 72, !18, i64 76, !18, i64 80, !19, i64 84, !19, i64 85, !19, i64 86, !19, i64 87, !19, i64 88, !18, i64 92, !18, i64 96, !18, i64 100, !18, i64 104, !18, i64 108, !18, i64 112, !18, i64 116, !18, i64 120, !18, i64 124, !18, i64 128, !18, i64 132, !18, i64 136, !18, i64 140, !18, i64 144, !18, i64 148, !20, i64 152, !18, i64 156, !19, i64 160, !18, i64 164, !18, i64 168, !18, i64 172, !18, i64 176, !18, i64 180, !18, i64 184, !18, i64 188, !19, i64 192, !18, i64 196, !18, i64 200, !18, i64 204, !18, i64 208, !18, i64 212, !18, i64 216, !18, i64 220, !18, i64 224, !18, i64 228, !18, i64 232, !18, i64 236, !18, i64 240, !18, i64 244, !18, i64 248, !18, i64 252, !18, i64 256, !18, i64 260, !18, i64 264, !18, i64 268, !18, i64 272, !18, i64 276, !18, i64 280, !18, i64 284, !18, i64 288, !18, i64 292, !18, i64 296, !19, i64 300, !18, i64 304, !18, i64 308, !18, i64 312, !19, i64 316, !19, i64 317, !18, i64 320, !18, i64 324, !19, i64 328, !10, i64 336, !10, i64 344, !19, i64 352, !18, i64 356, !18, i64 360, !19, i64 364}
!18 = !{!"int", !7, i64 0}
!19 = !{!"bool", !7, i64 0}
!20 = !{!"_ZTS9Wire_type", !7, i64 0}
!21 = !{!12, !10, i64 672}
!22 = !{!12, !19, i64 648}
!23 = !{i8 0, i8 2}
!24 = !{}
!25 = !{!12, !10, i64 680}
!26 = !{!12, !10, i64 656}
!27 = !{!28, !10, i64 936}
!28 = !{!"_ZTS19TechnologyParameter", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !10, i64 56, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !10, i64 144, !10, i64 152, !10, i64 160, !10, i64 168, !10, i64 176, !10, i64 184, !10, i64 192, !10, i64 200, !10, i64 208, !10, i64 216, !10, i64 224, !10, i64 232, !10, i64 240, !10, i64 248, !10, i64 256, !10, i64 264, !10, i64 272, !10, i64 280, !10, i64 288, !10, i64 296, !10, i64 304, !10, i64 312, !10, i64 320, !10, i64 328, !10, i64 336, !10, i64 344, !29, i64 352, !30, i64 360, !30, i64 528, !30, i64 696, !30, i64 864, !30, i64 1032, !31, i64 1200, !31, i64 1264, !31, i64 1328, !32, i64 1392, !33, i64 1416, !33, i64 1464, !33, i64 1512}
!29 = !{!"long", !7, i64 0}
!30 = !{!"_ZTSN19TechnologyParameter10DeviceTypeE", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !10, i64 56, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !10, i64 144, !10, i64 152, !10, i64 160}
!31 = !{!"_ZTSN19TechnologyParameter16InterconnectTypeE", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !10, i64 56}
!32 = !{!"_ZTSN19TechnologyParameter13ScalingFactorE", !10, i64 0, !10, i64 8, !10, i64 16}
!33 = !{!"_ZTSN19TechnologyParameter10MemoryTypeE", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40}
!34 = !{!12, !10, i64 712}
!35 = !{!12, !10, i64 832}
!36 = !{!12, !10, i64 952}
!37 = !{!12, !10, i64 1072}
!38 = !{!12, !10, i64 720}
!39 = !{!12, !10, i64 728}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.TechnologyParameter = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, i64, %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::DeviceType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::InterconnectType", %"class.TechnologyParameter::ScalingFactor", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType", %"class.TechnologyParameter::MemoryType" }
%"class.TechnologyParameter::DeviceType" = type { double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::InterconnectType" = type { double, double, double, double, double, double, double, double }
%"class.TechnologyParameter::ScalingFactor" = type { double, double, double }
%"class.TechnologyParameter::MemoryType" = type { double, double, double, double, double, double }

@g_tp = external local_unnamed_addr global %class.TechnologyParameter, align 8

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #0

declare noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef, double noundef, i32 noundef, i32 noundef, i1 noundef zeroext, i1 noundef zeroext, i1 noundef zeroext, i32 noundef) local_unnamed_addr #1

declare noundef double @_Z6gate_Cddbbb(double noundef, double noundef, i1 noundef zeroext, i1 noundef zeroext, i1 noundef zeroext) local_unnamed_addr #1

declare noundef double @_Z17cmos_Isub_leakageddi9Gate_typebbb17Half_net_topology(double noundef, double noundef, i32 noundef, i32 noundef, i1 noundef zeroext, i1 noundef zeroext, i1 noundef zeroext, i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef double @_ZN7DFFCell13fpfp_node_capEjj(ptr noundef nonnull align 8 dereferenceable(1192), i32 noundef, i32 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7DFFCell16compute_DFF_cellEv(ptr noundef nonnull align 8 dereferenceable(1192) %0) local_unnamed_addr #2 align 2 {
  %2 = tail call noundef double @_ZN7DFFCell13fpfp_node_capEjj(ptr noundef nonnull align 8 dereferenceable(1192) %0, i32 noundef 2, i32 noundef 1)
  %3 = tail call noundef double @_ZN7DFFCell13fpfp_node_capEjj(ptr noundef nonnull align 8 dereferenceable(1192) %0, i32 noundef 2, i32 noundef 3)
  %4 = tail call noundef double @_ZN7DFFCell13fpfp_node_capEjj(ptr noundef nonnull align 8 dereferenceable(1192) %0, i32 noundef 3, i32 noundef 2)
  %5 = tail call noundef double @_ZN7DFFCell13fpfp_node_capEjj(ptr noundef nonnull align 8 dereferenceable(1192) %0, i32 noundef 2, i32 noundef 2)
  %6 = getelementptr inbounds i8, ptr %0, i64 664
  %7 = load double, ptr %6, align 8, !tbaa !5
  %8 = getelementptr inbounds i8, ptr %0, i64 672
  %9 = load double, ptr %8, align 8, !tbaa !18
  %10 = fadd double %7, %9
  %11 = getelementptr inbounds i8, ptr %0, i64 648
  %12 = load i8, ptr %11, align 8, !tbaa !19, !range !20, !noundef !21
  %13 = trunc nuw i8 %12 to i1
  %14 = tail call noundef double @_Z6gate_Cddbbb(double noundef %10, double noundef 0.000000e+00, i1 noundef zeroext %13, i1 noundef zeroext false, i1 noundef zeroext false)
  %15 = fmul double %14, 2.000000e+00
  %16 = getelementptr inbounds i8, ptr %0, i64 680
  store double %15, ptr %16, align 8, !tbaa !22
  %17 = fadd double %2, %5
  %18 = fadd double %3, %17
  %19 = fadd double %4, %18
  %20 = fadd double %2, %19
  %21 = fadd double %2, %20
  %22 = getelementptr inbounds i8, ptr %0, i64 656
  %23 = load double, ptr %22, align 8, !tbaa !23
  %24 = tail call double @llvm.fmuladd.f64(double %23, double 2.000000e+00, double %21)
  %25 = fmul double %24, 5.000000e-01
  %26 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 936), align 8, !tbaa !24
  %27 = fmul double %26, %25
  %28 = getelementptr inbounds i8, ptr %0, i64 712
  %29 = load double, ptr %28, align 8, !tbaa !31
  %30 = tail call double @llvm.fmuladd.f64(double %27, double %26, double %29)
  store double %30, ptr %28, align 8, !tbaa !31
  %31 = fmul double %4, %26
  %32 = getelementptr inbounds i8, ptr %0, i64 832
  %33 = load double, ptr %32, align 8, !tbaa !32
  %34 = tail call double @llvm.fmuladd.f64(double %31, double %26, double %33)
  store double %34, ptr %32, align 8, !tbaa !32
  %35 = fmul double %3, %26
  %36 = getelementptr inbounds i8, ptr %0, i64 952
  %37 = load double, ptr %36, align 8, !tbaa !33
  %38 = tail call double @llvm.fmuladd.f64(double %35, double %26, double %37)
  store double %38, ptr %36, align 8, !tbaa !33
  %39 = fmul double %15, %26
  %40 = getelementptr inbounds i8, ptr %0, i64 1072
  %41 = load double, ptr %40, align 8, !tbaa !34
  %42 = tail call double @llvm.fmuladd.f64(double %39, double %26, double %41)
  store double %42, ptr %40, align 8, !tbaa !34
  %43 = load double, ptr %6, align 8, !tbaa !5
  %44 = load double, ptr %8, align 8, !tbaa !18
  %45 = tail call noundef double @_Z17cmos_Isub_leakageddi9Gate_typebbb17Half_net_topology(double noundef %43, double noundef %44, i32 noundef 2, i32 noundef 3, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %46 = load double, ptr %6, align 8, !tbaa !5
  %47 = tail call noundef double @_Z17cmos_Isub_leakageddi9Gate_typebbb17Half_net_topology(double noundef %46, double noundef %46, i32 noundef 3, i32 noundef 3, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %48 = tail call double @llvm.fmuladd.f64(double %45, double 5.000000e+00, double %47)
  %49 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 936), align 8, !tbaa !24
  %50 = getelementptr inbounds i8, ptr %0, i64 720
  %51 = load double, ptr %50, align 8, !tbaa !35
  %52 = tail call double @llvm.fmuladd.f64(double %48, double %49, double %51)
  store double %52, ptr %50, align 8, !tbaa !35
  %53 = load double, ptr %6, align 8, !tbaa !5
  %54 = load double, ptr %8, align 8, !tbaa !18
  %55 = tail call noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef %53, double noundef %54, i32 noundef 2, i32 noundef 3, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %56 = load double, ptr %6, align 8, !tbaa !5
  %57 = tail call noundef double @_Z15cmos_Ig_leakageddi9Gate_typebbb17Half_net_topology(double noundef %56, double noundef %56, i32 noundef 3, i32 noundef 3, i1 noundef zeroext false, i1 noundef zeroext false, i1 noundef zeroext false, i32 noundef 1)
  %58 = tail call double @llvm.fmuladd.f64(double %55, double 5.000000e+00, double %57)
  %59 = load double, ptr getelementptr inbounds (i8, ptr @g_tp, i64 936), align 8, !tbaa !24
  %60 = getelementptr inbounds i8, ptr %0, i64 728
  %61 = load double, ptr %60, align 8, !tbaa !36
  %62 = tail call double @llvm.fmuladd.f64(double %58, double %59, double %61)
  store double %62, ptr %60, align 8, !tbaa !36
  ret void
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !9, i64 664}
!6 = !{!"_ZTS7DFFCell", !7, i64 0, !14, i64 280, !16, i64 648, !9, i64 656, !9, i64 664, !9, i64 672, !9, i64 680, !15, i64 688, !15, i64 692, !15, i64 696, !15, i64 700, !15, i64 704, !12, i64 712, !12, i64 832, !12, i64 952, !12, i64 1072}
!7 = !{!"_ZTS9Component", !8, i64 0, !12, i64 24, !12, i64 144, !9, i64 264, !9, i64 272}
!8 = !{!"_ZTS4Area", !9, i64 0, !9, i64 8, !9, i64 16}
!9 = !{!"double", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C++ TBAA"}
!12 = !{!"_ZTS8powerDef", !13, i64 0, !13, i64 40, !13, i64 80}
!13 = !{!"_ZTS15powerComponents", !9, i64 0, !9, i64 8, !9, i64 16, !9, i64 24, !9, i64 32}
!14 = !{!"_ZTS14InputParameter", !15, i64 0, !15, i64 4, !15, i64 8, !15, i64 12, !15, i64 16, !16, i64 20, !15, i64 24, !15, i64 28, !15, i64 32, !15, i64 36, !15, i64 40, !15, i64 44, !9, i64 48, !9, i64 56, !15, i64 64, !15, i64 68, !15, i64 72, !15, i64 76, !15, i64 80, !16, i64 84, !16, i64 85, !16, i64 86, !16, i64 87, !16, i64 88, !15, i64 92, !15, i64 96, !15, i64 100, !15, i64 104, !15, i64 108, !15, i64 112, !15, i64 116, !15, i64 120, !15, i64 124, !15, i64 128, !15, i64 132, !15, i64 136, !15, i64 140, !15, i64 144, !15, i64 148, !17, i64 152, !15, i64 156, !16, i64 160, !15, i64 164, !15, i64 168, !15, i64 172, !15, i64 176, !15, i64 180, !15, i64 184, !15, i64 188, !16, i64 192, !15, i64 196, !15, i64 200, !15, i64 204, !15, i64 208, !15, i64 212, !15, i64 216, !15, i64 220, !15, i64 224, !15, i64 228, !15, i64 232, !15, i64 236, !15, i64 240, !15, i64 244, !15, i64 248, !15, i64 252, !15, i64 256, !15, i64 260, !15, i64 264, !15, i64 268, !15, i64 272, !15, i64 276, !15, i64 280, !15, i64 284, !15, i64 288, !15, i64 292, !15, i64 296, !16, i64 300, !15, i64 304, !15, i64 308, !15, i64 312, !16, i64 316, !16, i64 317, !15, i64 320, !15, i64 324, !16, i64 328, !9, i64 336, !9, i64 344, !16, i64 352, !15, i64 356, !15, i64 360, !16, i64 364}
!15 = !{!"int", !10, i64 0}
!16 = !{!"bool", !10, i64 0}
!17 = !{!"_ZTS9Wire_type", !10, i64 0}
!18 = !{!6, !9, i64 672}
!19 = !{!6, !16, i64 648}
!20 = !{i8 0, i8 2}
!21 = !{}
!22 = !{!6, !9, i64 680}
!23 = !{!6, !9, i64 656}
!24 = !{!25, !9, i64 936}
!25 = !{!"_ZTS19TechnologyParameter", !9, i64 0, !9, i64 8, !9, i64 16, !9, i64 24, !9, i64 32, !9, i64 40, !9, i64 48, !9, i64 56, !9, i64 64, !9, i64 72, !9, i64 80, !9, i64 88, !9, i64 96, !9, i64 104, !9, i64 112, !9, i64 120, !9, i64 128, !9, i64 136, !9, i64 144, !9, i64 152, !9, i64 160, !9, i64 168, !9, i64 176, !9, i64 184, !9, i64 192, !9, i64 200, !9, i64 208, !9, i64 216, !9, i64 224, !9, i64 232, !9, i64 240, !9, i64 248, !9, i64 256, !9, i64 264, !9, i64 272, !9, i64 280, !9, i64 288, !9, i64 296, !9, i64 304, !9, i64 312, !9, i64 320, !9, i64 328, !9, i64 336, !9, i64 344, !26, i64 352, !27, i64 360, !27, i64 528, !27, i64 696, !27, i64 864, !27, i64 1032, !28, i64 1200, !28, i64 1264, !28, i64 1328, !29, i64 1392, !30, i64 1416, !30, i64 1464, !30, i64 1512}
!26 = !{!"long", !10, i64 0}
!27 = !{!"_ZTSN19TechnologyParameter10DeviceTypeE", !9, i64 0, !9, i64 8, !9, i64 16, !9, i64 24, !9, i64 32, !9, i64 40, !9, i64 48, !9, i64 56, !9, i64 64, !9, i64 72, !9, i64 80, !9, i64 88, !9, i64 96, !9, i64 104, !9, i64 112, !9, i64 120, !9, i64 128, !9, i64 136, !9, i64 144, !9, i64 152, !9, i64 160}
!28 = !{!"_ZTSN19TechnologyParameter16InterconnectTypeE", !9, i64 0, !9, i64 8, !9, i64 16, !9, i64 24, !9, i64 32, !9, i64 40, !9, i64 48, !9, i64 56}
!29 = !{!"_ZTSN19TechnologyParameter13ScalingFactorE", !9, i64 0, !9, i64 8, !9, i64 16}
!30 = !{!"_ZTSN19TechnologyParameter10MemoryTypeE", !9, i64 0, !9, i64 8, !9, i64 16, !9, i64 24, !9, i64 32, !9, i64 40}
!31 = !{!6, !9, i64 712}
!32 = !{!6, !9, i64 832}
!33 = !{!6, !9, i64 952}
!34 = !{!6, !9, i64 1072}
!35 = !{!6, !9, i64 720}
!36 = !{!6, !9, i64 728}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,TailCallElimPass