; LLVM IR from gem5/gem5 :: ext/fputils (fp80)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%union.fp64_t = type { i64 }
%union.fp80_t = type { %struct.anon }
%struct.anon = type { i64, i16, [3 x i16] }

@.str.1 = external hidden unnamed_addr constant [62 x i8], align 1
@fp64_snan = external constant %union.fp64_t, align 8
@fp64_nsnan = external constant %union.fp64_t, align 8
@fp64_qnani = external constant %union.fp64_t, align 8
@.str.2 = external hidden unnamed_addr constant [18 x i8], align 1
@__PRETTY_FUNCTION__.fp80_cvtfp64 = external hidden unnamed_addr constant [28 x i8], align 1
@fp64_qnan = external constant %union.fp64_t, align 8
@fp64_nqnan = external constant %union.fp64_t, align 8

; Function Attrs: nounwind uwtable
declare dso_local i32 @fp80_sgn(i64, i64) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @fp80_isspecial(i64, i64) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @fp80_isinf(i64, i64) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @fp80_isqnan(i64, i64) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @fp80_isqnani(i64, i64) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @fp80_issnan(i64, i64) #0

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #2

; Function Attrs: nounwind uwtable
define dso_local i64 @fp80_cvtfp64(i64 %0, i64 %1) #0 {
  %3 = alloca %union.fp64_t, align 8
  %4 = alloca %union.fp80_t, align 8
  %5 = alloca i32, align 4
  %6 = alloca i64, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i64, align 8
  %10 = alloca i32, align 4
  %11 = alloca i64, align 8
  %12 = getelementptr inbounds { i64, i64 }, ptr %4, i32 0, i32 0
  store i64 %0, ptr %12, align 8
  %13 = getelementptr inbounds { i64, i64 }, ptr %4, i32 0, i32 1
  store i64 %1, ptr %13, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #5
  %14 = getelementptr inbounds %struct.anon, ptr %4, i32 0, i32 1
  %15 = load i16, ptr %14, align 8, !tbaa !5
  %16 = zext i16 %15 to i32
  %17 = and i32 %16, 32768
  store i32 %17, ptr %5, align 4, !tbaa !8
  %18 = getelementptr inbounds { i64, i64 }, ptr %4, i32 0, i32 0
  %19 = load i64, ptr %18, align 8
  %20 = getelementptr inbounds { i64, i64 }, ptr %4, i32 0, i32 1
  %21 = load i64, ptr %20, align 8
  %22 = call i32 @fp80_isspecial(i64 %19, i64 %21)
  %23 = icmp ne i32 %22, 0
  br i1 %23, label %71, label %24

24:                                               ; preds = %2
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #5
  %25 = getelementptr inbounds %struct.anon, ptr %4, i32 0, i32 0
  %26 = load i64, ptr %25, align 8, !tbaa !5
  store i64 %26, ptr %6, align 8, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  %27 = getelementptr inbounds %struct.anon, ptr %4, i32 0, i32 1
  %28 = load i16, ptr %27, align 8, !tbaa !5
  %29 = zext i16 %28 to i32
  %30 = and i32 %29, 32767
  %31 = sub nsw i32 %30, 16383
  store i32 %31, ptr %7, align 4, !tbaa !8
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #5
  %32 = load i32, ptr %7, align 4, !tbaa !8
  %33 = add nsw i32 %32, 1023
  store i32 %33, ptr %8, align 4, !tbaa !8
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #5
  %34 = load i64, ptr %6, align 8, !tbaa !10
  %35 = lshr i64 %34, 11
  store i64 %35, ptr %9, align 8, !tbaa !10
  %36 = load i32, ptr %8, align 4, !tbaa !8
  %37 = icmp sgt i32 %36, 0
  br i1 %37, label %38, label %47

38:                                               ; preds = %24
  %39 = load i32, ptr %8, align 4, !tbaa !8
  %40 = icmp slt i32 %39, 2047
  br i1 %40, label %41, label %47

41:                                               ; preds = %38
  %42 = load i32, ptr %5, align 4, !tbaa !8
  %43 = load i64, ptr %9, align 8, !tbaa !10
  %44 = load i32, ptr %8, align 4, !tbaa !8
  %45 = call i64 @build_fp64(i32 noundef %42, i64 noundef %43, i32 noundef %44)
  %46 = getelementptr inbounds %union.fp64_t, ptr %3, i32 0, i32 0
  store i64 %45, ptr %46, align 8
  store i32 1, ptr %10, align 4
  br label %70

47:                                               ; preds = %38, %24
  %48 = load i32, ptr %8, align 4, !tbaa !8
  %49 = icmp sle i32 %48, 0
  br i1 %49, label %50, label %66

50:                                               ; preds = %47
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #5
  %51 = load i32, ptr %8, align 4, !tbaa !8
  %52 = icmp slt i32 -64, %51
  br i1 %52, label %53, label %59

53:                                               ; preds = %50
  %54 = load i64, ptr %9, align 8, !tbaa !10
  %55 = load i32, ptr %8, align 4, !tbaa !8
  %56 = sub nsw i32 0, %55
  %57 = zext i32 %56 to i64
  %58 = lshr i64 %54, %57
  br label %60

59:                                               ; preds = %50
  br label %60

60:                                               ; preds = %59, %53
  %61 = phi i64 [ %58, %53 ], [ 0, %59 ]
  store i64 %61, ptr %11, align 8, !tbaa !10
  %62 = load i32, ptr %5, align 4, !tbaa !8
  %63 = load i64, ptr %11, align 8, !tbaa !10
  %64 = call i64 @build_fp64(i32 noundef %62, i64 noundef %63, i32 noundef 0)
  %65 = getelementptr inbounds %union.fp64_t, ptr %3, i32 0, i32 0
  store i64 %64, ptr %65, align 8
  store i32 1, ptr %10, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #5
  br label %70

66:                                               ; preds = %47
  %67 = load i32, ptr %5, align 4, !tbaa !8
  %68 = call i64 @build_fp64(i32 noundef %67, i64 noundef 0, i32 noundef 2047)
  %69 = getelementptr inbounds %union.fp64_t, ptr %3, i32 0, i32 0
  store i64 %68, ptr %69, align 8
  store i32 1, ptr %10, align 4
  br label %70

70:                                               ; preds = %66, %60, %41
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #5
  br label %126

71:                                               ; preds = %2
  %72 = getelementptr inbounds { i64, i64 }, ptr %4, i32 0, i32 0
  %73 = load i64, ptr %72, align 8
  %74 = getelementptr inbounds { i64, i64 }, ptr %4, i32 0, i32 1
  %75 = load i64, ptr %74, align 8
  %76 = call i32 @fp80_isinf(i64 %73, i64 %75)
  %77 = icmp ne i32 %76, 0
  br i1 %77, label %78, label %82

78:                                               ; preds = %71
  %79 = load i32, ptr %5, align 4, !tbaa !8
  %80 = call i64 @build_fp64(i32 noundef %79, i64 noundef 0, i32 noundef 2047)
  %81 = getelementptr inbounds %union.fp64_t, ptr %3, i32 0, i32 0
  store i64 %80, ptr %81, align 8
  store i32 1, ptr %10, align 4
  br label %126

82:                                               ; preds = %71
  %83 = getelementptr inbounds { i64, i64 }, ptr %4, i32 0, i32 0
  %84 = load i64, ptr %83, align 8
  %85 = getelementptr inbounds { i64, i64 }, ptr %4, i32 0, i32 1
  %86 = load i64, ptr %85, align 8
  %87 = call i32 @fp80_issnan(i64 %84, i64 %86)
  %88 = icmp ne i32 %87, 0
  br i1 %88, label %89, label %99

89:                                               ; preds = %82
  %90 = getelementptr inbounds { i64, i64 }, ptr %4, i32 0, i32 0
  %91 = load i64, ptr %90, align 8
  %92 = getelementptr inbounds { i64, i64 }, ptr %4, i32 0, i32 1
  %93 = load i64, ptr %92, align 8
  %94 = call i32 @fp80_sgn(i64 %91, i64 %93)
  %95 = icmp sgt i32 %94, 0
  br i1 %95, label %96, label %97

96:                                               ; preds = %89
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %3, ptr align 8 @fp64_snan, i64 8, i1 false), !tbaa.struct !12
  br label %98

97:                                               ; preds = %89
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %3, ptr align 8 @fp64_nsnan, i64 8, i1 false), !tbaa.struct !12
  br label %98

98:                                               ; preds = %97, %96
  store i32 1, ptr %10, align 4
  br label %126

99:                                               ; preds = %82
  %100 = getelementptr inbounds { i64, i64 }, ptr %4, i32 0, i32 0
  %101 = load i64, ptr %100, align 8
  %102 = getelementptr inbounds { i64, i64 }, ptr %4, i32 0, i32 1
  %103 = load i64, ptr %102, align 8
  %104 = call i32 @fp80_isqnani(i64 %101, i64 %103)
  %105 = icmp ne i32 %104, 0
  br i1 %105, label %106, label %107

106:                                              ; preds = %99
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %3, ptr align 8 @fp64_qnani, i64 8, i1 false), !tbaa.struct !12
  store i32 1, ptr %10, align 4
  br label %126

107:                                              ; preds = %99
  %108 = getelementptr inbounds { i64, i64 }, ptr %4, i32 0, i32 0
  %109 = load i64, ptr %108, align 8
  %110 = getelementptr inbounds { i64, i64 }, ptr %4, i32 0, i32 1
  %111 = load i64, ptr %110, align 8
  %112 = call i32 @fp80_isqnan(i64 %109, i64 %111)
  %113 = icmp ne i32 %112, 0
  br i1 %113, label %114, label %115

114:                                              ; preds = %107
  br label %116

115:                                              ; preds = %107
  call void @__assert_fail(ptr noundef @.str.2, ptr noundef @.str.1, i32 noundef 183, ptr noundef @__PRETTY_FUNCTION__.fp80_cvtfp64) #6
  unreachable

116:                                              ; preds = %114
  %117 = getelementptr inbounds { i64, i64 }, ptr %4, i32 0, i32 0
  %118 = load i64, ptr %117, align 8
  %119 = getelementptr inbounds { i64, i64 }, ptr %4, i32 0, i32 1
  %120 = load i64, ptr %119, align 8
  %121 = call i32 @fp80_sgn(i64 %118, i64 %120)
  %122 = icmp sgt i32 %121, 0
  br i1 %122, label %123, label %124

123:                                              ; preds = %116
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %3, ptr align 8 @fp64_qnan, i64 8, i1 false), !tbaa.struct !12
  br label %125

124:                                              ; preds = %116
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %3, ptr align 8 @fp64_nqnan, i64 8, i1 false), !tbaa.struct !12
  br label %125

125:                                              ; preds = %124, %123
  store i32 1, ptr %10, align 4
  br label %126

126:                                              ; preds = %125, %106, %98, %78, %70
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #5
  %127 = getelementptr inbounds %union.fp64_t, ptr %3, i32 0, i32 0
  %128 = load i64, ptr %127, align 8
  ret i64 %128
}

; Function Attrs: inlinehint nounwind uwtable
declare hidden i64 @build_fp64(i32 noundef, i64 noundef, i32 noundef) #3

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #4

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #5 = { nounwind }
attributes #6 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !6, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !6, i64 0}
!12 = !{i64 0, i64 8, !5}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%union.fp64_t = type { i64 }

@.str.1 = external hidden unnamed_addr constant [62 x i8], align 1
@fp64_snan = external local_unnamed_addr constant %union.fp64_t, align 8
@fp64_nsnan = external local_unnamed_addr constant %union.fp64_t, align 8
@fp64_qnani = external local_unnamed_addr constant %union.fp64_t, align 8
@.str.2 = external hidden unnamed_addr constant [18 x i8], align 1
@__PRETTY_FUNCTION__.fp80_cvtfp64 = external hidden unnamed_addr constant [28 x i8], align 1
@fp64_qnan = external local_unnamed_addr constant %union.fp64_t, align 8
@fp64_nqnan = external local_unnamed_addr constant %union.fp64_t, align 8

; Function Attrs: nounwind uwtable
declare dso_local i32 @fp80_sgn(i64, i64) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @fp80_isspecial(i64, i64) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @fp80_isinf(i64, i64) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @fp80_isqnan(i64, i64) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @fp80_isqnani(i64, i64) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @fp80_issnan(i64, i64) local_unnamed_addr #0

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local i64 @fp80_cvtfp64(i64 %0, i64 %1) local_unnamed_addr #0 {
  %3 = trunc i64 %1 to i32
  %4 = and i32 %3, 32768
  %5 = tail call i32 @fp80_isspecial(i64 %0, i64 %1)
  %.not = icmp eq i32 %5, 0
  br i1 %.not, label %6, label %24

6:                                                ; preds = %2
  %7 = and i32 %3, 32767
  %8 = lshr i64 %0, 11
  %9 = add nsw i32 %7, -15361
  %or.cond = icmp ult i32 %9, 2046
  br i1 %or.cond, label %10, label %13

10:                                               ; preds = %6
  %11 = add nsw i32 %7, -15360
  %12 = tail call i64 @build_fp64(i32 noundef %4, i64 noundef %8, i32 noundef %11)
  br label %42

13:                                               ; preds = %6
  %14 = icmp ult i32 %7, 15361
  br i1 %14, label %15, label %22

15:                                               ; preds = %13
  %16 = icmp ugt i32 %7, 15296
  %17 = sub nuw nsw i32 15360, %7
  %18 = zext nneg i32 %17 to i64
  %19 = lshr i64 %8, %18
  %20 = select i1 %16, i64 %19, i64 0
  %21 = tail call i64 @build_fp64(i32 noundef %4, i64 noundef %20, i32 noundef 0)
  br label %42

22:                                               ; preds = %13
  %23 = tail call i64 @build_fp64(i32 noundef %4, i64 noundef 0, i32 noundef 2047)
  br label %42

24:                                               ; preds = %2
  %25 = tail call i32 @fp80_isinf(i64 %0, i64 %1)
  %.not90 = icmp eq i32 %25, 0
  br i1 %.not90, label %28, label %26

26:                                               ; preds = %24
  %27 = tail call i64 @build_fp64(i32 noundef %4, i64 noundef 0, i32 noundef 2047)
  br label %42

28:                                               ; preds = %24
  %29 = tail call i32 @fp80_issnan(i64 %0, i64 %1)
  %.not91 = icmp eq i32 %29, 0
  br i1 %.not91, label %33, label %30

30:                                               ; preds = %28
  %31 = tail call i32 @fp80_sgn(i64 %0, i64 %1)
  %32 = icmp sgt i32 %31, 0
  %fp64_snan.val = load i64, ptr @fp64_snan, align 8
  %fp64_nsnan.val = load i64, ptr @fp64_nsnan, align 8
  %.sroa.085.1 = select i1 %32, i64 %fp64_snan.val, i64 %fp64_nsnan.val
  br label %42

33:                                               ; preds = %28
  %34 = tail call i32 @fp80_isqnani(i64 %0, i64 %1)
  %.not92 = icmp eq i32 %34, 0
  br i1 %.not92, label %36, label %35

35:                                               ; preds = %33
  %.sroa.085.0.copyload87 = load i64, ptr @fp64_qnani, align 8, !tbaa !5
  br label %42

36:                                               ; preds = %33
  %37 = tail call i32 @fp80_isqnan(i64 %0, i64 %1)
  %.not93 = icmp eq i32 %37, 0
  br i1 %.not93, label %38, label %39

38:                                               ; preds = %36
  tail call void @__assert_fail(ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.1, i32 noundef 183, ptr noundef nonnull @__PRETTY_FUNCTION__.fp80_cvtfp64) #3
  unreachable

39:                                               ; preds = %36
  %40 = tail call i32 @fp80_sgn(i64 %0, i64 %1)
  %41 = icmp sgt i32 %40, 0
  %fp64_qnan.val = load i64, ptr @fp64_qnan, align 8
  %fp64_nqnan.val = load i64, ptr @fp64_nqnan, align 8
  %.sroa.085.2 = select i1 %41, i64 %fp64_qnan.val, i64 %fp64_nqnan.val
  br label %42

42:                                               ; preds = %10, %15, %22, %39, %35, %30, %26
  %.sroa.085.3 = phi i64 [ %27, %26 ], [ %.sroa.085.1, %30 ], [ %.sroa.085.0.copyload87, %35 ], [ %.sroa.085.2, %39 ], [ %12, %10 ], [ %21, %15 ], [ %23, %22 ]
  ret i64 %.sroa.085.3
}

; Function Attrs: inlinehint nounwind uwtable
declare hidden i64 @build_fp64(i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass