; LLVM IR from gem5/gem5 :: src/systemc/dt/int/sc_signed.ll (ZN5sc_dt9sc_signedaSERKNS_10sc_bv_baseE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::sc_signed" = type { %"class.sc_dt::sc_value_base", i32, i32, i32, ptr }
%"class.sc_dt::sc_value_base" = type { ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt9sc_signedaSERKNS_10sc_bv_baseE(ptr noundef nonnull align 8 dereferenceable(32) %0, ptr noundef nonnull align 8 dereferenceable(24) %1) #1 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %8 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #5
  %9 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %8, i32 0, i32 2
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #5
  %10 = load ptr, ptr %4, align 8, !tbaa !5
  %11 = call noundef i32 @_ZNK5sc_dt10sc_bv_base6lengthEv(ptr noundef nonnull align 8 dereferenceable(24) %10)
  store i32 %11, ptr %6, align 4, !tbaa !9
  %12 = call noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %9, ptr noundef nonnull align 4 dereferenceable(4) %6)
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #5
  store i32 %12, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  store i32 0, ptr %7, align 4, !tbaa !9
  br label %13

13:                                               ; preds = %24, %2
  %14 = load i32, ptr %7, align 4, !tbaa !9
  %15 = load i32, ptr %5, align 4, !tbaa !9
  %16 = icmp slt i32 %14, %15
  br i1 %16, label %17, label %27

17:                                               ; preds = %13
  %18 = load i32, ptr %7, align 4, !tbaa !9
  %19 = load ptr, ptr %4, align 8, !tbaa !5
  %20 = load i32, ptr %7, align 4, !tbaa !9
  %21 = call noundef zeroext i1 @_ZNK5sc_dt10sc_bv_base7get_bitEi(ptr noundef nonnull align 8 dereferenceable(24) %19, i32 noundef %20)
  %22 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %8, i32 0, i32 4
  %23 = load ptr, ptr %22, align 8, !tbaa !11
  call void @_ZN5sc_dt8safe_setEibPj(i32 noundef %18, i1 noundef zeroext %21, ptr noundef %23)
  br label %24

24:                                               ; preds = %17
  %25 = load i32, ptr %7, align 4, !tbaa !9
  %26 = add nsw i32 %25, 1
  store i32 %26, ptr %7, align 4, !tbaa !9
  br label %13, !llvm.loop !14

27:                                               ; preds = %13
  br label %28

28:                                               ; preds = %37, %27
  %29 = load i32, ptr %7, align 4, !tbaa !9
  %30 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %8, i32 0, i32 2
  %31 = load i32, ptr %30, align 4, !tbaa !16
  %32 = icmp slt i32 %29, %31
  br i1 %32, label %33, label %40

33:                                               ; preds = %28
  %34 = load i32, ptr %7, align 4, !tbaa !9
  %35 = getelementptr inbounds %"class.sc_dt::sc_signed", ptr %8, i32 0, i32 4
  %36 = load ptr, ptr %35, align 8, !tbaa !11
  call void @_ZN5sc_dt8safe_setEibPj(i32 noundef %34, i1 noundef zeroext false, ptr noundef %36)
  br label %37

37:                                               ; preds = %33
  %38 = load i32, ptr %7, align 4, !tbaa !9
  %39 = add nsw i32 %38, 1
  store i32 %39, ptr %7, align 4, !tbaa !9
  br label %28, !llvm.loop !17

40:                                               ; preds = %28
  call void @_ZN5sc_dt9sc_signed16convert_2C_to_SMEv(ptr noundef nonnull align 8 dereferenceable(32) %8)
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #5
  ret ptr %8
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt10sc_bv_base6lengthEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dt8safe_setEibPj(i32 noundef, i1 noundef zeroext, ptr noundef) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK5sc_dt10sc_bv_base7get_bitEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) #4 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt9sc_signed16convert_2C_to_SMEv(ptr noundef nonnull align 8 dereferenceable(32)) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 24}
!12 = !{!"_ZTSN5sc_dt9sc_signedE", !13, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !6, i64 24}
!13 = !{!"_ZTSN5sc_dt13sc_value_baseE"}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = !{!12, !10, i64 12}
!17 = distinct !{!17, !15}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZN5sc_dt9sc_signedaSERKNS_10sc_bv_baseE(ptr noundef nonnull returned align 8 dereferenceable(32) %0, ptr noundef nonnull align 8 dereferenceable(24) %1) local_unnamed_addr #1 align 2 {
  %3 = alloca i32, align 4
  %4 = getelementptr inbounds i8, ptr %0, i64 12
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #5
  %5 = tail call noundef i32 @_ZNK5sc_dt10sc_bv_base6lengthEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  store i32 %5, ptr %3, align 4, !tbaa !5
  %6 = call noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4) %4, ptr noundef nonnull align 4 dereferenceable(4) %3)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #5
  %7 = icmp sgt i32 %6, 0
  br i1 %7, label %.lr.ph, label %.preheader

.lr.ph:                                           ; preds = %2
  %8 = getelementptr inbounds i8, ptr %0, i64 24
  br label %12

.preheader:                                       ; preds = %12, %2
  %.0.lcssa = phi i32 [ 0, %2 ], [ %6, %12 ]
  %9 = load i32, ptr %4, align 4, !tbaa !9
  %10 = icmp slt i32 %.0.lcssa, %9
  br i1 %10, label %.lr.ph12, label %._crit_edge

.lr.ph12:                                         ; preds = %.preheader
  %11 = getelementptr inbounds i8, ptr %0, i64 24
  br label %16

12:                                               ; preds = %.lr.ph, %12
  %.010 = phi i32 [ 0, %.lr.ph ], [ %15, %12 ]
  %13 = call noundef zeroext i1 @_ZNK5sc_dt10sc_bv_base7get_bitEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %.010)
  %14 = load ptr, ptr %8, align 8, !tbaa !13
  call void @_ZN5sc_dt8safe_setEibPj(i32 noundef %.010, i1 noundef zeroext %13, ptr noundef %14)
  %15 = add nuw nsw i32 %.010, 1
  %exitcond.not = icmp eq i32 %15, %6
  br i1 %exitcond.not, label %.preheader, label %12, !llvm.loop !14

16:                                               ; preds = %.lr.ph12, %16
  %.111 = phi i32 [ %.0.lcssa, %.lr.ph12 ], [ %18, %16 ]
  %17 = load ptr, ptr %11, align 8, !tbaa !13
  call void @_ZN5sc_dt8safe_setEibPj(i32 noundef %.111, i1 noundef zeroext false, ptr noundef %17)
  %18 = add nuw nsw i32 %.111, 1
  %19 = load i32, ptr %4, align 4, !tbaa !9
  %20 = icmp slt i32 %18, %19
  br i1 %20, label %16, label %._crit_edge, !llvm.loop !16

._crit_edge:                                      ; preds = %16, %.preheader
  call void @_ZN5sc_dt9sc_signed16convert_2C_to_SMEv(ptr noundef nonnull align 8 dereferenceable(32) %0)
  ret ptr %0
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5sc_dt6sc_minIiEEKT_RS2_S3_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5sc_dt10sc_bv_base6lengthEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN5sc_dt8safe_setEibPj(i32 noundef, i1 noundef zeroext, ptr noundef) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK5sc_dt10sc_bv_base7get_bitEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) local_unnamed_addr #4 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt9sc_signed16convert_2C_to_SMEv(ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 12}
!10 = !{!"_ZTSN5sc_dt9sc_signedE", !11, i64 0, !6, i64 8, !6, i64 12, !6, i64 16, !12, i64 24}
!11 = !{!"_ZTSN5sc_dt13sc_value_baseE"}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!10, !12, i64 24}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass