; LLVM IR from beagleboard/librobotcontrol :: library/src (motor)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@channels = external hidden global i32, align 4
@dirA_chip = external hidden global [4 x i32], align 16
@dirA_pin = external hidden global [4 x i32], align 16
@dirB_chip = external hidden global [4 x i32], align 16
@dirB_pin = external hidden global [4 x i32], align 16
@pwmss = external hidden global [4 x i32], align 16
@pwmch = external hidden global [4 x i32], align 16
@stderr = external global ptr, align 8
@init_flag = external hidden global i32, align 4
@.str.15 = external hidden unnamed_addr constant [64 x i8], align 1
@.str.16 = external hidden unnamed_addr constant [51 x i8], align 1
@.str.17 = external hidden unnamed_addr constant [60 x i8], align 1
@.str.18 = external hidden unnamed_addr constant [54 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
declare i64 @llvm.expect.i64(i64, i64) #1

; Function Attrs: nounwind
declare i32 @fprintf(ptr noundef, ptr noundef, ...) #2

declare i32 @rc_gpio_set_value(i32 noundef, i32 noundef, i32 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @rc_pwm_set_duty(i32 noundef, i8 noundef signext, double noundef) #3

; Function Attrs: nounwind uwtable
define dso_local i32 @rc_motor_brake(i32 noundef %0) #4 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #5
  %6 = load i32, ptr %3, align 4, !tbaa !5
  %7 = icmp slt i32 %6, 0
  br i1 %7, label %12, label %8

8:                                                ; preds = %1
  %9 = load i32, ptr %3, align 4, !tbaa !5
  %10 = load i32, ptr @channels, align 4, !tbaa !5
  %11 = icmp sgt i32 %9, %10
  br label %12

12:                                               ; preds = %8, %1
  %13 = phi i1 [ true, %1 ], [ %11, %8 ]
  %14 = xor i1 %13, true
  %15 = xor i1 %14, true
  %16 = zext i1 %15 to i32
  %17 = sext i32 %16 to i64
  %18 = call i64 @llvm.expect.i64(i64 %17, i64 0)
  %19 = icmp ne i64 %18, 0
  br i1 %19, label %20, label %24

20:                                               ; preds = %12
  %21 = load ptr, ptr @stderr, align 8, !tbaa !9
  %22 = load i32, ptr @channels, align 4, !tbaa !5
  %23 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %21, ptr noundef @.str.15, i32 noundef %22) #5
  store i32 -1, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %152

24:                                               ; preds = %12
  %25 = load i32, ptr @init_flag, align 4, !tbaa !5
  %26 = icmp eq i32 %25, 0
  %27 = xor i1 %26, true
  %28 = xor i1 %27, true
  %29 = zext i1 %28 to i32
  %30 = sext i32 %29 to i64
  %31 = call i64 @llvm.expect.i64(i64 %30, i64 0)
  %32 = icmp ne i64 %31, 0
  br i1 %32, label %33, label %36

33:                                               ; preds = %24
  %34 = load ptr, ptr @stderr, align 8, !tbaa !9
  %35 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %34, ptr noundef @.str.16) #5
  store i32 -1, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %152

36:                                               ; preds = %24
  %37 = load i32, ptr %3, align 4, !tbaa !5
  %38 = icmp eq i32 %37, 0
  br i1 %38, label %39, label %54

39:                                               ; preds = %36
  store i32 1, ptr %4, align 4, !tbaa !5
  br label %40

40:                                               ; preds = %50, %39
  %41 = load i32, ptr %4, align 4, !tbaa !5
  %42 = load i32, ptr @channels, align 4, !tbaa !5
  %43 = icmp sle i32 %41, %42
  br i1 %43, label %44, label %53

44:                                               ; preds = %40
  %45 = load i32, ptr %4, align 4, !tbaa !5
  %46 = call i32 @rc_motor_brake(i32 noundef %45)
  %47 = icmp eq i32 %46, -1
  br i1 %47, label %48, label %49

48:                                               ; preds = %44
  store i32 -1, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %152

49:                                               ; preds = %44
  br label %50

50:                                               ; preds = %49
  %51 = load i32, ptr %4, align 4, !tbaa !5
  %52 = add nsw i32 %51, 1
  store i32 %52, ptr %4, align 4, !tbaa !5
  br label %40, !llvm.loop !11

53:                                               ; preds = %40
  store i32 0, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %152

54:                                               ; preds = %36
  %55 = load i32, ptr %3, align 4, !tbaa !5
  %56 = sub nsw i32 %55, 1
  %57 = sext i32 %56 to i64
  %58 = getelementptr inbounds [4 x i32], ptr @dirA_chip, i64 0, i64 %57
  %59 = load i32, ptr %58, align 4, !tbaa !5
  %60 = load i32, ptr %3, align 4, !tbaa !5
  %61 = sub nsw i32 %60, 1
  %62 = sext i32 %61 to i64
  %63 = getelementptr inbounds [4 x i32], ptr @dirA_pin, i64 0, i64 %62
  %64 = load i32, ptr %63, align 4, !tbaa !5
  %65 = call i32 @rc_gpio_set_value(i32 noundef %59, i32 noundef %64, i32 noundef 1)
  %66 = icmp ne i32 %65, 0
  %67 = xor i1 %66, true
  %68 = xor i1 %67, true
  %69 = zext i1 %68 to i32
  %70 = sext i32 %69 to i64
  %71 = call i64 @llvm.expect.i64(i64 %70, i64 0)
  %72 = icmp ne i64 %71, 0
  br i1 %72, label %73, label %86

73:                                               ; preds = %54
  %74 = load ptr, ptr @stderr, align 8, !tbaa !9
  %75 = load i32, ptr %3, align 4, !tbaa !5
  %76 = sub nsw i32 %75, 1
  %77 = sext i32 %76 to i64
  %78 = getelementptr inbounds [4 x i32], ptr @dirA_chip, i64 0, i64 %77
  %79 = load i32, ptr %78, align 4, !tbaa !5
  %80 = load i32, ptr %3, align 4, !tbaa !5
  %81 = sub nsw i32 %80, 1
  %82 = sext i32 %81 to i64
  %83 = getelementptr inbounds [4 x i32], ptr @dirA_pin, i64 0, i64 %82
  %84 = load i32, ptr %83, align 4, !tbaa !5
  %85 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %74, ptr noundef @.str.17, i32 noundef %79, i32 noundef %84) #5
  store i32 -1, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %152

86:                                               ; preds = %54
  %87 = load i32, ptr %3, align 4, !tbaa !5
  %88 = sub nsw i32 %87, 1
  %89 = sext i32 %88 to i64
  %90 = getelementptr inbounds [4 x i32], ptr @dirB_chip, i64 0, i64 %89
  %91 = load i32, ptr %90, align 4, !tbaa !5
  %92 = load i32, ptr %3, align 4, !tbaa !5
  %93 = sub nsw i32 %92, 1
  %94 = sext i32 %93 to i64
  %95 = getelementptr inbounds [4 x i32], ptr @dirB_pin, i64 0, i64 %94
  %96 = load i32, ptr %95, align 4, !tbaa !5
  %97 = call i32 @rc_gpio_set_value(i32 noundef %91, i32 noundef %96, i32 noundef 1)
  %98 = icmp ne i32 %97, 0
  %99 = xor i1 %98, true
  %100 = xor i1 %99, true
  %101 = zext i1 %100 to i32
  %102 = sext i32 %101 to i64
  %103 = call i64 @llvm.expect.i64(i64 %102, i64 0)
  %104 = icmp ne i64 %103, 0
  br i1 %104, label %105, label %118

105:                                              ; preds = %86
  %106 = load ptr, ptr @stderr, align 8, !tbaa !9
  %107 = load i32, ptr %3, align 4, !tbaa !5
  %108 = sub nsw i32 %107, 1
  %109 = sext i32 %108 to i64
  %110 = getelementptr inbounds [4 x i32], ptr @dirB_chip, i64 0, i64 %109
  %111 = load i32, ptr %110, align 4, !tbaa !5
  %112 = load i32, ptr %3, align 4, !tbaa !5
  %113 = sub nsw i32 %112, 1
  %114 = sext i32 %113 to i64
  %115 = getelementptr inbounds [4 x i32], ptr @dirB_pin, i64 0, i64 %114
  %116 = load i32, ptr %115, align 4, !tbaa !5
  %117 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %106, ptr noundef @.str.17, i32 noundef %111, i32 noundef %116) #5
  store i32 -1, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %152

118:                                              ; preds = %86
  %119 = load i32, ptr %3, align 4, !tbaa !5
  %120 = sub nsw i32 %119, 1
  %121 = sext i32 %120 to i64
  %122 = getelementptr inbounds [4 x i32], ptr @pwmss, i64 0, i64 %121
  %123 = load i32, ptr %122, align 4, !tbaa !5
  %124 = load i32, ptr %3, align 4, !tbaa !5
  %125 = sub nsw i32 %124, 1
  %126 = sext i32 %125 to i64
  %127 = getelementptr inbounds [4 x i32], ptr @pwmch, i64 0, i64 %126
  %128 = load i32, ptr %127, align 4, !tbaa !5
  %129 = trunc i32 %128 to i8
  %130 = call i32 @rc_pwm_set_duty(i32 noundef %123, i8 noundef signext %129, double noundef 0.000000e+00)
  %131 = icmp ne i32 %130, 0
  %132 = xor i1 %131, true
  %133 = xor i1 %132, true
  %134 = zext i1 %133 to i32
  %135 = sext i32 %134 to i64
  %136 = call i64 @llvm.expect.i64(i64 %135, i64 0)
  %137 = icmp ne i64 %136, 0
  br i1 %137, label %138, label %151

138:                                              ; preds = %118
  %139 = load ptr, ptr @stderr, align 8, !tbaa !9
  %140 = load i32, ptr %3, align 4, !tbaa !5
  %141 = sub nsw i32 %140, 1
  %142 = sext i32 %141 to i64
  %143 = getelementptr inbounds [4 x i32], ptr @pwmss, i64 0, i64 %142
  %144 = load i32, ptr %143, align 4, !tbaa !5
  %145 = load i32, ptr %3, align 4, !tbaa !5
  %146 = sub nsw i32 %145, 1
  %147 = sext i32 %146 to i64
  %148 = getelementptr inbounds [4 x i32], ptr @pwmch, i64 0, i64 %147
  %149 = load i32, ptr %148, align 4, !tbaa !5
  %150 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %139, ptr noundef @.str.18, i32 noundef %144, i32 noundef %149) #5
  store i32 -1, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %152

151:                                              ; preds = %118
  store i32 0, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %152

152:                                              ; preds = %151, %138, %105, %73, %53, %48, %33, %20
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #5
  %153 = load i32, ptr %2, align 4
  ret i32 %153
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(none) }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@channels = external hidden local_unnamed_addr global i32, align 4
@dirA_chip = external hidden local_unnamed_addr global [4 x i32], align 16
@dirA_pin = external hidden local_unnamed_addr global [4 x i32], align 16
@dirB_chip = external hidden local_unnamed_addr global [4 x i32], align 16
@dirB_pin = external hidden local_unnamed_addr global [4 x i32], align 16
@pwmss = external hidden local_unnamed_addr global [4 x i32], align 16
@pwmch = external hidden local_unnamed_addr global [4 x i32], align 16
@stderr = external local_unnamed_addr global ptr, align 8
@init_flag = external hidden local_unnamed_addr global i32, align 4
@.str.15 = external hidden unnamed_addr constant [64 x i8], align 1
@.str.16 = external hidden unnamed_addr constant [51 x i8], align 1
@.str.17 = external hidden unnamed_addr constant [60 x i8], align 1
@.str.18 = external hidden unnamed_addr constant [54 x i8], align 1

; Function Attrs: nofree nounwind
declare noundef i32 @fprintf(ptr nocapture noundef, ptr nocapture noundef readonly, ...) local_unnamed_addr #0

declare i32 @rc_gpio_set_value(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare i32 @rc_pwm_set_duty(i32 noundef, i8 noundef signext, double noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local range(i32 -1, 1) i32 @rc_motor_brake(i32 noundef %0) local_unnamed_addr #2 {
  %2 = icmp slt i32 %0, 0
  %3 = load i32, ptr @channels, align 4
  %4 = icmp slt i32 %3, %0
  %5 = select i1 %2, i1 true, i1 %4, !prof !5
  br i1 %5, label %6, label %9, !prof !5

6:                                                ; preds = %1
  %7 = load ptr, ptr @stderr, align 8, !tbaa !6
  %8 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %7, ptr noundef nonnull @.str.15, i32 noundef %3) #3
  br label %.loopexit

9:                                                ; preds = %1
  %10 = load i32, ptr @init_flag, align 4, !tbaa !10
  %11 = icmp eq i32 %10, 0
  br i1 %11, label %12, label %15, !prof !5

12:                                               ; preds = %9
  %13 = load ptr, ptr @stderr, align 8, !tbaa !6
  %14 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %13, ptr noundef nonnull @.str.16) #3
  br label %.loopexit

15:                                               ; preds = %9
  %16 = icmp eq i32 %0, 0
  br i1 %16, label %.preheader, label %22

.preheader:                                       ; preds = %15
  %.not2324 = icmp slt i32 %3, 1
  br i1 %.not2324, label %.loopexit, label %.lr.ph

17:                                               ; preds = %.lr.ph
  %18 = add nuw nsw i32 %.025, 1
  %19 = load i32, ptr @channels, align 4, !tbaa !10
  %.not23.not = icmp slt i32 %.025, %19
  br i1 %.not23.not, label %.lr.ph, label %.loopexit, !llvm.loop !12

.lr.ph:                                           ; preds = %.preheader, %17
  %.025 = phi i32 [ %18, %17 ], [ 1, %.preheader ]
  %20 = tail call i32 @rc_motor_brake(i32 noundef %.025)
  %21 = icmp eq i32 %20, -1
  br i1 %21, label %.loopexit, label %17

22:                                               ; preds = %15
  %23 = add nsw i32 %0, -1
  %24 = zext nneg i32 %23 to i64
  %25 = getelementptr inbounds [4 x i32], ptr @dirA_chip, i64 0, i64 %24
  %26 = load i32, ptr %25, align 4, !tbaa !10
  %27 = getelementptr inbounds [4 x i32], ptr @dirA_pin, i64 0, i64 %24
  %28 = load i32, ptr %27, align 4, !tbaa !10
  %29 = tail call i32 @rc_gpio_set_value(i32 noundef %26, i32 noundef %28, i32 noundef 1) #4
  %.not = icmp eq i32 %29, 0
  br i1 %.not, label %35, label %30, !prof !14

30:                                               ; preds = %22
  %31 = load ptr, ptr @stderr, align 8, !tbaa !6
  %32 = load i32, ptr %25, align 4, !tbaa !10
  %33 = load i32, ptr %27, align 4, !tbaa !10
  %34 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %31, ptr noundef nonnull @.str.17, i32 noundef %32, i32 noundef %33) #3
  br label %.loopexit

35:                                               ; preds = %22
  %36 = getelementptr inbounds [4 x i32], ptr @dirB_chip, i64 0, i64 %24
  %37 = load i32, ptr %36, align 4, !tbaa !10
  %38 = getelementptr inbounds [4 x i32], ptr @dirB_pin, i64 0, i64 %24
  %39 = load i32, ptr %38, align 4, !tbaa !10
  %40 = tail call i32 @rc_gpio_set_value(i32 noundef %37, i32 noundef %39, i32 noundef 1) #4
  %.not21 = icmp eq i32 %40, 0
  br i1 %.not21, label %46, label %41, !prof !14

41:                                               ; preds = %35
  %42 = load ptr, ptr @stderr, align 8, !tbaa !6
  %43 = load i32, ptr %36, align 4, !tbaa !10
  %44 = load i32, ptr %38, align 4, !tbaa !10
  %45 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %42, ptr noundef nonnull @.str.17, i32 noundef %43, i32 noundef %44) #3
  br label %.loopexit

46:                                               ; preds = %35
  %47 = getelementptr inbounds [4 x i32], ptr @pwmss, i64 0, i64 %24
  %48 = load i32, ptr %47, align 4, !tbaa !10
  %49 = getelementptr inbounds [4 x i32], ptr @pwmch, i64 0, i64 %24
  %50 = load i32, ptr %49, align 4, !tbaa !10
  %51 = trunc i32 %50 to i8
  %52 = tail call i32 @rc_pwm_set_duty(i32 noundef %48, i8 noundef signext %51, double noundef 0.000000e+00) #4
  %.not22 = icmp eq i32 %52, 0
  br i1 %.not22, label %.loopexit, label %53, !prof !14

53:                                               ; preds = %46
  %54 = load ptr, ptr @stderr, align 8, !tbaa !6
  %55 = load i32, ptr %47, align 4, !tbaa !10
  %56 = load i32, ptr %49, align 4, !tbaa !10
  %57 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %54, ptr noundef nonnull @.str.18, i32 noundef %55, i32 noundef %56) #3
  br label %.loopexit

.loopexit:                                        ; preds = %.lr.ph, %17, %.preheader, %46, %53, %41, %30, %12, %6
  %.019 = phi i32 [ -1, %6 ], [ -1, %12 ], [ -1, %30 ], [ -1, %41 ], [ -1, %53 ], [ 0, %46 ], [ 0, %.preheader ], [ -1, %.lr.ph ], [ 0, %17 ]
  ret i32 %.019
}

attributes #0 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { cold nounwind }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!"branch_weights", !"expected", i32 1, i32 2000}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = !{!"branch_weights", !"expected", i32 2000, i32 1}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LowerExpectIntrinsicPass,SROAPass,SimplifyCFGPass,TailCallElimPass