; LLVM IR from beagleboard/librobotcontrol :: library/src/io (i2c)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.rc_i2c_state_t = type { i8, i32, i32, i32 }

@i2c = external hidden global [6 x %struct.rc_i2c_state_t], align 16
@stderr = external global ptr, align 8
@.str.5 = external hidden unnamed_addr constant [54 x i8], align 1
@.str.6 = external hidden unnamed_addr constant [53 x i8], align 1
@.str.7 = external hidden unnamed_addr constant [73 x i8], align 1

; Function Attrs: nounwind uwtable
declare hidden i32 @__check_bus_range(i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
declare i64 @llvm.expect.i64(i64, i64) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nounwind
declare i32 @fprintf(ptr noundef, ptr noundef, ...) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nounwind uwtable
define dso_local i32 @rc_i2c_read_bytes(i32 noundef %0, i8 noundef zeroext %1, i64 noundef %2, ptr noundef %3) #0 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i8, align 1
  %8 = alloca i64, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  store i32 %0, ptr %6, align 4, !tbaa !5
  store i8 %1, ptr %7, align 1, !tbaa !9
  store i64 %2, ptr %8, align 8, !tbaa !10
  store ptr %3, ptr %9, align 8, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #5
  %13 = load i32, ptr %6, align 4, !tbaa !5
  %14 = call i32 @__check_bus_range(i32 noundef %13)
  %15 = icmp ne i32 %14, 0
  %16 = xor i1 %15, true
  %17 = xor i1 %16, true
  %18 = zext i1 %17 to i32
  %19 = sext i32 %18 to i64
  %20 = call i64 @llvm.expect.i64(i64 %19, i64 0)
  %21 = icmp ne i64 %20, 0
  br i1 %21, label %22, label %23

22:                                               ; preds = %4
  store i32 -1, ptr %5, align 4
  store i32 1, ptr %12, align 4
  br label %110

23:                                               ; preds = %4
  %24 = load i32, ptr %6, align 4, !tbaa !5
  %25 = sext i32 %24 to i64
  %26 = getelementptr inbounds [6 x %struct.rc_i2c_state_t], ptr @i2c, i64 0, i64 %25
  %27 = getelementptr inbounds %struct.rc_i2c_state_t, ptr %26, i32 0, i32 2
  %28 = load i32, ptr %27, align 8, !tbaa !14
  %29 = icmp eq i32 %28, 0
  %30 = xor i1 %29, true
  %31 = xor i1 %30, true
  %32 = zext i1 %31 to i32
  %33 = sext i32 %32 to i64
  %34 = call i64 @llvm.expect.i64(i64 %33, i64 0)
  %35 = icmp ne i64 %34, 0
  br i1 %35, label %36, label %39

36:                                               ; preds = %23
  %37 = load ptr, ptr @stderr, align 8, !tbaa !12
  %38 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %37, ptr noundef @.str.5) #5
  store i32 -1, ptr %5, align 4
  store i32 1, ptr %12, align 4
  br label %110

39:                                               ; preds = %23
  %40 = load i32, ptr %6, align 4, !tbaa !5
  %41 = sext i32 %40 to i64
  %42 = getelementptr inbounds [6 x %struct.rc_i2c_state_t], ptr @i2c, i64 0, i64 %41
  %43 = getelementptr inbounds %struct.rc_i2c_state_t, ptr %42, i32 0, i32 3
  %44 = load i32, ptr %43, align 4, !tbaa !16
  store i32 %44, ptr %11, align 4, !tbaa !5
  %45 = load i32, ptr %6, align 4, !tbaa !5
  %46 = sext i32 %45 to i64
  %47 = getelementptr inbounds [6 x %struct.rc_i2c_state_t], ptr @i2c, i64 0, i64 %46
  %48 = getelementptr inbounds %struct.rc_i2c_state_t, ptr %47, i32 0, i32 3
  store i32 1, ptr %48, align 4, !tbaa !16
  %49 = load i32, ptr %6, align 4, !tbaa !5
  %50 = sext i32 %49 to i64
  %51 = getelementptr inbounds [6 x %struct.rc_i2c_state_t], ptr @i2c, i64 0, i64 %50
  %52 = getelementptr inbounds %struct.rc_i2c_state_t, ptr %51, i32 0, i32 1
  %53 = load i32, ptr %52, align 4, !tbaa !17
  %54 = call i64 @write(i32 noundef %53, ptr noundef %7, i64 noundef 1)
  %55 = trunc i64 %54 to i32
  store i32 %55, ptr %10, align 4, !tbaa !5
  %56 = load i32, ptr %10, align 4, !tbaa !5
  %57 = icmp ne i32 %56, 1
  %58 = xor i1 %57, true
  %59 = xor i1 %58, true
  %60 = zext i1 %59 to i32
  %61 = sext i32 %60 to i64
  %62 = call i64 @llvm.expect.i64(i64 %61, i64 0)
  %63 = icmp ne i64 %62, 0
  br i1 %63, label %64, label %72

64:                                               ; preds = %39
  %65 = load ptr, ptr @stderr, align 8, !tbaa !12
  %66 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %65, ptr noundef @.str.6) #5
  %67 = load i32, ptr %11, align 4, !tbaa !5
  %68 = load i32, ptr %6, align 4, !tbaa !5
  %69 = sext i32 %68 to i64
  %70 = getelementptr inbounds [6 x %struct.rc_i2c_state_t], ptr @i2c, i64 0, i64 %69
  %71 = getelementptr inbounds %struct.rc_i2c_state_t, ptr %70, i32 0, i32 3
  store i32 %67, ptr %71, align 4, !tbaa !16
  store i32 -1, ptr %5, align 4
  store i32 1, ptr %12, align 4
  br label %110

72:                                               ; preds = %39
  %73 = load i32, ptr %6, align 4, !tbaa !5
  %74 = sext i32 %73 to i64
  %75 = getelementptr inbounds [6 x %struct.rc_i2c_state_t], ptr @i2c, i64 0, i64 %74
  %76 = getelementptr inbounds %struct.rc_i2c_state_t, ptr %75, i32 0, i32 1
  %77 = load i32, ptr %76, align 4, !tbaa !17
  %78 = load ptr, ptr %9, align 8, !tbaa !12
  %79 = load i64, ptr %8, align 8, !tbaa !10
  %80 = call i64 @read(i32 noundef %77, ptr noundef %78, i64 noundef %79)
  %81 = trunc i64 %80 to i32
  store i32 %81, ptr %10, align 4, !tbaa !5
  %82 = load i32, ptr %10, align 4, !tbaa !5
  %83 = sext i32 %82 to i64
  %84 = load i64, ptr %8, align 8, !tbaa !10
  %85 = icmp ne i64 %83, %84
  %86 = xor i1 %85, true
  %87 = xor i1 %86, true
  %88 = zext i1 %87 to i32
  %89 = sext i32 %88 to i64
  %90 = call i64 @llvm.expect.i64(i64 %89, i64 0)
  %91 = icmp ne i64 %90, 0
  br i1 %91, label %92, label %103

92:                                               ; preds = %72
  %93 = load ptr, ptr @stderr, align 8, !tbaa !12
  %94 = load i32, ptr %10, align 4, !tbaa !5
  %95 = load i64, ptr %8, align 8, !tbaa !10
  %96 = trunc i64 %95 to i32
  %97 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %93, ptr noundef @.str.7, i32 noundef %94, i32 noundef %96) #5
  %98 = load i32, ptr %11, align 4, !tbaa !5
  %99 = load i32, ptr %6, align 4, !tbaa !5
  %100 = sext i32 %99 to i64
  %101 = getelementptr inbounds [6 x %struct.rc_i2c_state_t], ptr @i2c, i64 0, i64 %100
  %102 = getelementptr inbounds %struct.rc_i2c_state_t, ptr %101, i32 0, i32 3
  store i32 %98, ptr %102, align 4, !tbaa !16
  store i32 -1, ptr %5, align 4
  store i32 1, ptr %12, align 4
  br label %110

103:                                              ; preds = %72
  %104 = load i32, ptr %11, align 4, !tbaa !5
  %105 = load i32, ptr %6, align 4, !tbaa !5
  %106 = sext i32 %105 to i64
  %107 = getelementptr inbounds [6 x %struct.rc_i2c_state_t], ptr @i2c, i64 0, i64 %106
  %108 = getelementptr inbounds %struct.rc_i2c_state_t, ptr %107, i32 0, i32 3
  store i32 %104, ptr %108, align 4, !tbaa !16
  %109 = load i32, ptr %10, align 4, !tbaa !5
  store i32 %109, ptr %5, align 4
  store i32 1, ptr %12, align 4
  br label %110

110:                                              ; preds = %103, %92, %64, %36, %22
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  %111 = load i32, ptr %5, align 4
  ret i32 %111
}

declare i64 @write(i32 noundef, ptr noundef, i64 noundef) #4

declare i64 @read(i32 noundef, ptr noundef, i64 noundef) #4

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(none) }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"any pointer", !7, i64 0}
!14 = !{!15, !6, i64 8}
!15 = !{!"rc_i2c_state_t", !7, i64 0, !6, i64 4, !6, i64 8, !6, i64 12}
!16 = !{!15, !6, i64 12}
!17 = !{!15, !6, i64 4}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.rc_i2c_state_t = type { i8, i32, i32, i32 }

@i2c = external hidden local_unnamed_addr global [6 x %struct.rc_i2c_state_t], align 16
@stderr = external local_unnamed_addr global ptr, align 8
@.str.5 = external hidden unnamed_addr constant [54 x i8], align 1
@.str.6 = external hidden unnamed_addr constant [53 x i8], align 1
@.str.7 = external hidden unnamed_addr constant [73 x i8], align 1

; Function Attrs: nounwind uwtable
declare hidden i32 @__check_bus_range(i32 noundef) local_unnamed_addr #0

; Function Attrs: nofree nounwind
declare noundef i32 @fprintf(ptr nocapture noundef, ptr nocapture noundef readonly, ...) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local noundef i32 @rc_i2c_read_bytes(i32 noundef %0, i8 noundef zeroext %1, i64 noundef %2, ptr nocapture noundef %3) local_unnamed_addr #0 {
  %5 = alloca i8, align 1
  store i8 %1, ptr %5, align 1, !tbaa !5
  %6 = tail call i32 @__check_bus_range(i32 noundef %0)
  %.not = icmp eq i32 %6, 0
  br i1 %.not, label %7, label %36, !prof !8

7:                                                ; preds = %4
  %8 = sext i32 %0 to i64
  %9 = getelementptr inbounds [6 x %struct.rc_i2c_state_t], ptr @i2c, i64 0, i64 %8
  %10 = getelementptr inbounds i8, ptr %9, i64 8
  %11 = load i32, ptr %10, align 8, !tbaa !9
  %12 = icmp eq i32 %11, 0
  br i1 %12, label %13, label %16, !prof !12

13:                                               ; preds = %7
  %14 = load ptr, ptr @stderr, align 8, !tbaa !13
  %15 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %14, ptr noundef nonnull @.str.5) #3
  br label %36

16:                                               ; preds = %7
  %17 = getelementptr inbounds i8, ptr %9, i64 12
  %18 = load i32, ptr %17, align 4, !tbaa !15
  store i32 1, ptr %17, align 4, !tbaa !15
  %19 = getelementptr inbounds i8, ptr %9, i64 4
  %20 = load i32, ptr %19, align 4, !tbaa !16
  %21 = call i64 @write(i32 noundef %20, ptr noundef nonnull %5, i64 noundef 1) #4
  %22 = and i64 %21, 4294967295
  %.not21 = icmp eq i64 %22, 1
  br i1 %.not21, label %26, label %23, !prof !8

23:                                               ; preds = %16
  %24 = load ptr, ptr @stderr, align 8, !tbaa !13
  %25 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %24, ptr noundef nonnull @.str.6) #3
  store i32 %18, ptr %17, align 4, !tbaa !15
  br label %36

26:                                               ; preds = %16
  %27 = load i32, ptr %19, align 4, !tbaa !16
  %28 = tail call i64 @read(i32 noundef %27, ptr noundef %3, i64 noundef %2) #4
  %29 = trunc i64 %28 to i32
  %sext = shl i64 %28, 32
  %30 = ashr exact i64 %sext, 32
  %.not22 = icmp eq i64 %30, %2
  br i1 %.not22, label %35, label %31, !prof !8

31:                                               ; preds = %26
  %32 = load ptr, ptr @stderr, align 8, !tbaa !13
  %33 = trunc i64 %2 to i32
  %34 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %32, ptr noundef nonnull @.str.7, i32 noundef %29, i32 noundef %33) #3
  store i32 %18, ptr %17, align 4, !tbaa !15
  br label %36

35:                                               ; preds = %26
  store i32 %18, ptr %17, align 4, !tbaa !15
  br label %36

36:                                               ; preds = %4, %35, %31, %23, %13
  %.0 = phi i32 [ -1, %13 ], [ -1, %23 ], [ -1, %31 ], [ %29, %35 ], [ -1, %4 ]
  ret i32 %.0
}

; Function Attrs: nofree
declare noundef i64 @write(i32 noundef, ptr nocapture noundef readonly, i64 noundef) local_unnamed_addr #2

; Function Attrs: nofree
declare noundef i64 @read(i32 noundef, ptr nocapture noundef, i64 noundef) local_unnamed_addr #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nofree "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { cold nounwind }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!"branch_weights", !"expected", i32 2000, i32 1}
!9 = !{!10, !11, i64 8}
!10 = !{!"rc_i2c_state_t", !6, i64 0, !11, i64 4, !11, i64 8, !11, i64 12}
!11 = !{!"int", !6, i64 0}
!12 = !{!"branch_weights", !"expected", i32 1, i32 2000}
!13 = !{!14, !14, i64 0}
!14 = !{!"any pointer", !6, i64 0}
!15 = !{!10, !11, i64 12}
!16 = !{!10, !11, i64 4}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,LowerExpectIntrinsicPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass