; LLVM IR from beagleboard/librobotcontrol :: library/src/io (i2c)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.rc_i2c_state_t = type { i8, i32, i32, i32 }

@i2c = external hidden global [6 x %struct.rc_i2c_state_t], align 16
@stderr = external global ptr, align 8
@.str.3 = external hidden unnamed_addr constant [62 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [72 x i8], align 1

; Function Attrs: nounwind uwtable
declare hidden i32 @__check_bus_range(i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
declare i64 @llvm.expect.i64(i64, i64) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @rc_i2c_set_device_address(i32 noundef %0, i8 noundef zeroext %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i8, align 1
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i8 %1, ptr %5, align 1, !tbaa !9
  %6 = load i32, ptr %4, align 4, !tbaa !5
  %7 = call i32 @__check_bus_range(i32 noundef %6)
  %8 = icmp ne i32 %7, 0
  %9 = xor i1 %8, true
  %10 = xor i1 %9, true
  %11 = zext i1 %10 to i32
  %12 = sext i32 %11 to i64
  %13 = call i64 @llvm.expect.i64(i64 %12, i64 0)
  %14 = icmp ne i64 %13, 0
  br i1 %14, label %15, label %16

15:                                               ; preds = %2
  store i32 -1, ptr %3, align 4
  br label %68

16:                                               ; preds = %2
  %17 = load i32, ptr %4, align 4, !tbaa !5
  %18 = sext i32 %17 to i64
  %19 = getelementptr inbounds [6 x %struct.rc_i2c_state_t], ptr @i2c, i64 0, i64 %18
  %20 = getelementptr inbounds %struct.rc_i2c_state_t, ptr %19, i32 0, i32 2
  %21 = load i32, ptr %20, align 8, !tbaa !10
  %22 = icmp eq i32 %21, 0
  %23 = xor i1 %22, true
  %24 = xor i1 %23, true
  %25 = zext i1 %24 to i32
  %26 = sext i32 %25 to i64
  %27 = call i64 @llvm.expect.i64(i64 %26, i64 0)
  %28 = icmp ne i64 %27, 0
  br i1 %28, label %29, label %32

29:                                               ; preds = %16
  %30 = load ptr, ptr @stderr, align 8, !tbaa !12
  %31 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %30, ptr noundef @.str.3) #3
  store i32 -1, ptr %3, align 4
  br label %68

32:                                               ; preds = %16
  %33 = load i32, ptr %4, align 4, !tbaa !5
  %34 = sext i32 %33 to i64
  %35 = getelementptr inbounds [6 x %struct.rc_i2c_state_t], ptr @i2c, i64 0, i64 %34
  %36 = getelementptr inbounds %struct.rc_i2c_state_t, ptr %35, i32 0, i32 0
  %37 = load i8, ptr %36, align 16, !tbaa !14
  %38 = zext i8 %37 to i32
  %39 = load i8, ptr %5, align 1, !tbaa !9
  %40 = zext i8 %39 to i32
  %41 = icmp eq i32 %38, %40
  br i1 %41, label %42, label %43

42:                                               ; preds = %32
  store i32 0, ptr %3, align 4
  br label %68

43:                                               ; preds = %32
  %44 = load i32, ptr %4, align 4, !tbaa !5
  %45 = sext i32 %44 to i64
  %46 = getelementptr inbounds [6 x %struct.rc_i2c_state_t], ptr @i2c, i64 0, i64 %45
  %47 = getelementptr inbounds %struct.rc_i2c_state_t, ptr %46, i32 0, i32 1
  %48 = load i32, ptr %47, align 4, !tbaa !15
  %49 = load i8, ptr %5, align 1, !tbaa !9
  %50 = zext i8 %49 to i32
  %51 = call i32 (i32, i64, ...) @ioctl(i32 noundef %48, i64 noundef 1795, i32 noundef %50) #3
  %52 = icmp slt i32 %51, 0
  %53 = xor i1 %52, true
  %54 = xor i1 %53, true
  %55 = zext i1 %54 to i32
  %56 = sext i32 %55 to i64
  %57 = call i64 @llvm.expect.i64(i64 %56, i64 0)
  %58 = icmp ne i64 %57, 0
  br i1 %58, label %59, label %62

59:                                               ; preds = %43
  %60 = load ptr, ptr @stderr, align 8, !tbaa !12
  %61 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %60, ptr noundef @.str.4) #3
  store i32 -1, ptr %3, align 4
  br label %68

62:                                               ; preds = %43
  %63 = load i8, ptr %5, align 1, !tbaa !9
  %64 = load i32, ptr %4, align 4, !tbaa !5
  %65 = sext i32 %64 to i64
  %66 = getelementptr inbounds [6 x %struct.rc_i2c_state_t], ptr @i2c, i64 0, i64 %65
  %67 = getelementptr inbounds %struct.rc_i2c_state_t, ptr %66, i32 0, i32 0
  store i8 %63, ptr %67, align 16, !tbaa !14
  store i32 0, ptr %3, align 4
  br label %68

68:                                               ; preds = %62, %59, %42, %29, %15
  %69 = load i32, ptr %3, align 4
  ret i32 %69
}

; Function Attrs: nounwind
declare i32 @fprintf(ptr noundef, ptr noundef, ...) #2

; Function Attrs: nounwind
declare i32 @ioctl(i32 noundef, i64 noundef, ...) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(none) }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !6, i64 8}
!11 = !{!"rc_i2c_state_t", !7, i64 0, !6, i64 4, !6, i64 8, !6, i64 12}
!12 = !{!13, !13, i64 0}
!13 = !{!"any pointer", !7, i64 0}
!14 = !{!11, !7, i64 0}
!15 = !{!11, !6, i64 4}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.rc_i2c_state_t = type { i8, i32, i32, i32 }

@i2c = external hidden local_unnamed_addr global [6 x %struct.rc_i2c_state_t], align 16
@stderr = external local_unnamed_addr global ptr, align 8
@.str.3 = external hidden unnamed_addr constant [62 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [72 x i8], align 1

; Function Attrs: nounwind uwtable
declare hidden i32 @__check_bus_range(i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 -1, 1) i32 @rc_i2c_set_device_address(i32 noundef %0, i8 noundef zeroext %1) local_unnamed_addr #0 {
  %3 = tail call i32 @__check_bus_range(i32 noundef %0)
  %.not = icmp eq i32 %3, 0
  br i1 %.not, label %4, label %26, !prof !5

4:                                                ; preds = %2
  %5 = sext i32 %0 to i64
  %6 = getelementptr inbounds [6 x %struct.rc_i2c_state_t], ptr @i2c, i64 0, i64 %5
  %7 = getelementptr inbounds i8, ptr %6, i64 8
  %8 = load i32, ptr %7, align 8, !tbaa !6
  %9 = icmp eq i32 %8, 0
  br i1 %9, label %10, label %13, !prof !11

10:                                               ; preds = %4
  %11 = load ptr, ptr @stderr, align 8, !tbaa !12
  %12 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %11, ptr noundef nonnull @.str.3) #3
  br label %26

13:                                               ; preds = %4
  %14 = load i8, ptr %6, align 16, !tbaa !14
  %15 = icmp eq i8 %14, %1
  br i1 %15, label %26, label %16

16:                                               ; preds = %13
  %17 = zext i8 %1 to i32
  %18 = getelementptr inbounds i8, ptr %6, i64 4
  %19 = load i32, ptr %18, align 4, !tbaa !15
  %20 = tail call i32 (i32, i64, ...) @ioctl(i32 noundef %19, i64 noundef 1795, i32 noundef %17) #4
  %21 = icmp slt i32 %20, 0
  br i1 %21, label %22, label %25, !prof !11

22:                                               ; preds = %16
  %23 = load ptr, ptr @stderr, align 8, !tbaa !12
  %24 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %23, ptr noundef nonnull @.str.4) #3
  br label %26

25:                                               ; preds = %16
  store i8 %1, ptr %6, align 16, !tbaa !14
  br label %26

26:                                               ; preds = %13, %2, %25, %22, %10
  %.0 = phi i32 [ -1, %10 ], [ -1, %22 ], [ 0, %25 ], [ -1, %2 ], [ 0, %13 ]
  ret i32 %.0
}

; Function Attrs: nofree nounwind
declare noundef i32 @fprintf(ptr nocapture noundef, ptr nocapture noundef readonly, ...) local_unnamed_addr #1

; Function Attrs: nounwind
declare i32 @ioctl(i32 noundef, i64 noundef, ...) local_unnamed_addr #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { cold nounwind }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!"branch_weights", !"expected", i32 2000, i32 1}
!6 = !{!7, !10, i64 8}
!7 = !{!"rc_i2c_state_t", !8, i64 0, !10, i64 4, !10, i64 8, !10, i64 12}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"branch_weights", !"expected", i32 1, i32 2000}
!12 = !{!13, !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!7, !8, i64 0}
!15 = !{!7, !10, i64 4}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,LowerExpectIntrinsicPass,SROAPass,SimplifyCFGPass,TailCallElimPass