; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/kernel (sc_wait_cthread)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare void @_ZN7sc_core4waitEPNS_13sc_simcontextE(ptr noundef) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core10at_negedgeERKNS_15sc_signal_in_ifIbEEPNS_13sc_simcontextE(ptr noundef nonnull align 8 dereferenceable(8) %0, ptr noundef %1) #1 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %5 = load ptr, ptr %3, align 8, !tbaa !5
  %6 = load ptr, ptr %5, align 8, !tbaa !9
  %7 = getelementptr inbounds ptr, ptr %6, i64 7
  %8 = load ptr, ptr %7, align 8
  %9 = call noundef nonnull align 1 dereferenceable(1) ptr %8(ptr noundef nonnull align 8 dereferenceable(8) %5)
  %10 = load i8, ptr %9, align 1, !tbaa !11, !range !13, !noundef !14
  %11 = trunc i8 %10 to i1
  %12 = zext i1 %11 to i32
  %13 = icmp eq i32 %12, 0
  br i1 %13, label %14, label %28

14:                                               ; preds = %2
  br label %15

15:                                               ; preds = %17, %14
  %16 = load ptr, ptr %4, align 8, !tbaa !5
  call void @_ZN7sc_core4waitEPNS_13sc_simcontextE(ptr noundef %16)
  br label %17

17:                                               ; preds = %15
  %18 = load ptr, ptr %3, align 8, !tbaa !5
  %19 = load ptr, ptr %18, align 8, !tbaa !9
  %20 = getelementptr inbounds ptr, ptr %19, i64 7
  %21 = load ptr, ptr %20, align 8
  %22 = call noundef nonnull align 1 dereferenceable(1) ptr %21(ptr noundef nonnull align 8 dereferenceable(8) %18)
  %23 = load i8, ptr %22, align 1, !tbaa !11, !range !13, !noundef !14
  %24 = trunc i8 %23 to i1
  %25 = zext i1 %24 to i32
  %26 = icmp eq i32 %25, 0
  br i1 %26, label %15, label %27, !llvm.loop !15

27:                                               ; preds = %17
  br label %28

28:                                               ; preds = %27, %2
  br label %29

29:                                               ; preds = %31, %28
  %30 = load ptr, ptr %4, align 8, !tbaa !5
  call void @_ZN7sc_core4waitEPNS_13sc_simcontextE(ptr noundef %30)
  br label %31

31:                                               ; preds = %29
  %32 = load ptr, ptr %3, align 8, !tbaa !5
  %33 = load ptr, ptr %32, align 8, !tbaa !9
  %34 = getelementptr inbounds ptr, ptr %33, i64 7
  %35 = load ptr, ptr %34, align 8
  %36 = call noundef nonnull align 1 dereferenceable(1) ptr %35(ptr noundef nonnull align 8 dereferenceable(8) %32)
  %37 = load i8, ptr %36, align 1, !tbaa !11, !range !13, !noundef !14
  %38 = trunc i8 %37 to i1
  %39 = zext i1 %38 to i32
  %40 = icmp eq i32 %39, 1
  br i1 %40, label %29, label %41, !llvm.loop !17

41:                                               ; preds = %31
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"vtable pointer", !8, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{i8 0, i8 2}
!14 = !{}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = distinct !{!17, !16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare void @_ZN7sc_core4waitEPNS_13sc_simcontextE(ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core10at_negedgeERKNS_15sc_signal_in_ifIbEEPNS_13sc_simcontextE(ptr noundef nonnull align 8 dereferenceable(8) %0, ptr noundef %1) local_unnamed_addr #1 {
  %3 = load ptr, ptr %0, align 8, !tbaa !5
  %4 = getelementptr inbounds i8, ptr %3, i64 56
  %5 = load ptr, ptr %4, align 8
  %6 = tail call noundef nonnull align 1 dereferenceable(1) ptr %5(ptr noundef nonnull align 8 dereferenceable(8) %0)
  %7 = load i8, ptr %6, align 1, !tbaa !8, !range !11, !noundef !12
  %8 = icmp eq i8 %7, 0
  br i1 %8, label %.preheader, label %.loopexit.preheader

.preheader:                                       ; preds = %2, %.preheader
  tail call void @_ZN7sc_core4waitEPNS_13sc_simcontextE(ptr noundef %1)
  %9 = load ptr, ptr %0, align 8, !tbaa !5
  %10 = getelementptr inbounds i8, ptr %9, i64 56
  %11 = load ptr, ptr %10, align 8
  %12 = tail call noundef nonnull align 1 dereferenceable(1) ptr %11(ptr noundef nonnull align 8 dereferenceable(8) %0)
  %13 = load i8, ptr %12, align 1, !tbaa !8, !range !11, !noundef !12
  %14 = icmp eq i8 %13, 0
  br i1 %14, label %.preheader, label %.loopexit.preheader, !llvm.loop !13

.loopexit.preheader:                              ; preds = %.preheader, %2
  br label %.loopexit

.loopexit:                                        ; preds = %.loopexit.preheader, %.loopexit
  tail call void @_ZN7sc_core4waitEPNS_13sc_simcontextE(ptr noundef %1)
  %15 = load ptr, ptr %0, align 8, !tbaa !5
  %16 = getelementptr inbounds i8, ptr %15, i64 56
  %17 = load ptr, ptr %16, align 8
  %18 = tail call noundef nonnull align 1 dereferenceable(1) ptr %17(ptr noundef nonnull align 8 dereferenceable(8) %0)
  %19 = load i8, ptr %18, align 1, !tbaa !8, !range !11, !noundef !12
  %20 = trunc nuw i8 %19 to i1
  br i1 %20, label %.loopexit, label %21, !llvm.loop !15

21:                                               ; preds = %.loopexit
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"vtable pointer", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"bool", !10, i64 0}
!10 = !{!"omnipotent char", !7, i64 0}
!11 = !{i8 0, i8 2}
!12 = !{}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,JumpThreadingPass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass