; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/communication (sc_event_queue)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_core::sc_time" = type { i64 }
%"class.sc_core::sc_event_queue" = type <{ %"class.sc_core::sc_event_queue_if", %"class.sc_core::sc_module", %"class.sc_core::sc_ppq", %"class.sc_core::sc_event", i64, i32, [4 x i8] }>
%"class.sc_core::sc_event_queue_if" = type { %"class.sc_core::sc_interface" }
%"class.sc_core::sc_interface" = type { ptr }
%"class.sc_core::sc_module" = type { %"class.sc_core::sc_object", %"class.sc_core::sc_process_host", %"class.sc_core::sc_sensitive", %"class.sc_core::sc_sensitive_pos", %"class.sc_core::sc_sensitive_neg", i8, ptr, i32, ptr, ptr }
%"class.sc_core::sc_object" = type { ptr, ptr, %"class.std::vector", %"class.std::vector.0", %"class.std::__cxx11::basic_string", ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.sc_core::sc_process_host" = type { ptr }
%"class.sc_core::sc_sensitive" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_pos" = type { ptr, i32, ptr }
%"class.sc_core::sc_sensitive_neg" = type { ptr, i32, ptr }
%"class.sc_core::sc_ppq" = type { %"class.sc_core::sc_ppq_base" }
%"class.sc_core::sc_ppq_base" = type { ptr, i32, i32, ptr }
%"class.sc_core::sc_event" = type { %"class.std::__cxx11::basic_string", ptr, ptr, i32, i32, ptr, %"class.std::vector.8", %"class.std::vector.8", %"class.std::vector.13", %"class.std::vector.13" }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<sc_core::sc_method_process *, std::allocator<sc_core::sc_method_process *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_method_process *, std::allocator<sc_core::sc_method_process *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_method_process *, std::allocator<sc_core::sc_method_process *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_method_process *, std::allocator<sc_core::sc_method_process *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.13" = type { %"struct.std::_Vector_base.14" }
%"struct.std::_Vector_base.14" = type { %"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@.str.3 = external hidden unnamed_addr constant [20 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [97 x i8], align 1
@__PRETTY_FUNCTION__._ZN7sc_core14sc_event_queue10fire_eventEv = external hidden unnamed_addr constant [43 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core14sc_event_queue10fire_eventEv(ptr noundef nonnull align 8 dereferenceable(436) %0) #1 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca ptr, align 8
  %4 = alloca %"class.sc_core::sc_time", align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %5 = load ptr, ptr %2, align 8
  %6 = getelementptr inbounds %"class.sc_core::sc_event_queue", ptr %5, i32 0, i32 2
  %7 = call noundef zeroext i1 @_ZNK7sc_core11sc_ppq_base5emptyEv(ptr noundef nonnull align 8 dereferenceable(24) %6)
  br i1 %7, label %8, label %9

8:                                                ; preds = %1
  br label %32

9:                                                ; preds = %1
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #8
  %10 = getelementptr inbounds %"class.sc_core::sc_event_queue", ptr %5, i32 0, i32 2
  %11 = call noundef ptr @_ZN7sc_core6sc_ppqIPNS_7sc_timeEE11extract_topEv(ptr noundef nonnull align 8 dereferenceable(24) %10)
  store ptr %11, ptr %3, align 8, !tbaa !5
  %12 = load ptr, ptr %3, align 8, !tbaa !5
  %13 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZN7sc_core13sc_time_stampEv()
  %14 = call noundef zeroext i1 @_ZNK7sc_core7sc_timeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(8) %12, ptr noundef nonnull align 8 dereferenceable(8) %13)
  br i1 %14, label %15, label %16

15:                                               ; preds = %9
  br label %18

16:                                               ; preds = %9
  call void @__assert_fail(ptr noundef @.str.3, ptr noundef @.str.4, i32 noundef 92, ptr noundef @__PRETTY_FUNCTION__._ZN7sc_core14sc_event_queue10fire_eventEv) #9
  unreachable

17:                                               ; No predecessors!
  br label %18

18:                                               ; preds = %17, %15
  %19 = load ptr, ptr %3, align 8, !tbaa !5
  %20 = icmp eq ptr %19, null
  br i1 %20, label %22, label %21

21:                                               ; preds = %18
  call void @_ZdlPvm(ptr noundef %19, i64 noundef 8) #10
  br label %22

22:                                               ; preds = %21, %18
  %23 = getelementptr inbounds %"class.sc_core::sc_event_queue", ptr %5, i32 0, i32 2
  %24 = call noundef i32 @_ZNK7sc_core11sc_ppq_base4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %23)
  %25 = icmp sgt i32 %24, 0
  br i1 %25, label %26, label %31

26:                                               ; preds = %22
  %27 = getelementptr inbounds %"class.sc_core::sc_event_queue", ptr %5, i32 0, i32 3
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #8
  %28 = getelementptr inbounds %"class.sc_core::sc_event_queue", ptr %5, i32 0, i32 2
  %29 = call noundef ptr @_ZNK7sc_core6sc_ppqIPNS_7sc_timeEE3topEv(ptr noundef nonnull align 8 dereferenceable(24) %28)
  %30 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZN7sc_core13sc_time_stampEv()
  call void @_ZN7sc_coremiERKNS_7sc_timeES2_(ptr dead_on_unwind writable sret(%"class.sc_core::sc_time") align 8 %4, ptr noundef nonnull align 8 dereferenceable(8) %29, ptr noundef nonnull align 8 dereferenceable(8) %30)
  call void @_ZN7sc_core8sc_event6notifyERKNS_7sc_timeE(ptr noundef nonnull align 8 dereferenceable(160) %27, ptr noundef nonnull align 8 dereferenceable(8) %4)
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #8
  br label %31

31:                                               ; preds = %26, %22
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #8
  br label %32

32:                                               ; preds = %31, %8
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK7sc_core11sc_ppq_base4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef ptr @_ZN7sc_core6sc_ppqIPNS_7sc_timeEE11extract_topEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) #3

declare noundef nonnull align 8 dereferenceable(8) ptr @_ZN7sc_core13sc_time_stampEv() #4

; Function Attrs: mustprogress uwtable
declare dso_local noundef ptr @_ZNK7sc_core6sc_ppqIPNS_7sc_timeEE3topEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

declare void @_ZN7sc_core8sc_event6notifyERKNS_7sc_timeE(ptr noundef nonnull align 8 dereferenceable(160), ptr noundef nonnull align 8 dereferenceable(8)) #4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK7sc_core11sc_ppq_base5emptyEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK7sc_core7sc_timeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #5 align 2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #6

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN7sc_coremiERKNS_7sc_timeES2_(ptr dead_on_unwind noalias writable sret(%"class.sc_core::sc_time") align 8, ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #7

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { nounwind }
attributes #9 = { noreturn nounwind }
attributes #10 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_core::sc_time" = type { i64 }

@.str.3 = external hidden unnamed_addr constant [20 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [97 x i8], align 1
@__PRETTY_FUNCTION__._ZN7sc_core14sc_event_queue10fire_eventEv = external hidden unnamed_addr constant [43 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core14sc_event_queue10fire_eventEv(ptr noundef nonnull align 8 dereferenceable(436) %0) local_unnamed_addr #1 align 2 {
  %2 = alloca %"class.sc_core::sc_time", align 8
  %3 = getelementptr inbounds i8, ptr %0, i64 240
  %4 = tail call noundef zeroext i1 @_ZNK7sc_core11sc_ppq_base5emptyEv(ptr noundef nonnull align 8 dereferenceable(24) %3)
  br i1 %4, label %17, label %5

5:                                                ; preds = %1
  %6 = tail call noundef ptr @_ZN7sc_core6sc_ppqIPNS_7sc_timeEE11extract_topEv(ptr noundef nonnull align 8 dereferenceable(24) %3)
  %7 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZN7sc_core13sc_time_stampEv()
  %8 = tail call noundef zeroext i1 @_ZNK7sc_core7sc_timeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(8) %6, ptr noundef nonnull align 8 dereferenceable(8) %7)
  br i1 %8, label %10, label %9

9:                                                ; preds = %5
  tail call void @__assert_fail(ptr noundef nonnull @.str.3, ptr noundef nonnull @.str.4, i32 noundef 92, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN7sc_core14sc_event_queue10fire_eventEv) #8
  unreachable

10:                                               ; preds = %5
  tail call void @_ZdlPvm(ptr noundef %6, i64 noundef 8) #9
  %11 = tail call noundef i32 @_ZNK7sc_core11sc_ppq_base4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %3)
  %12 = icmp sgt i32 %11, 0
  br i1 %12, label %13, label %17

13:                                               ; preds = %10
  %14 = getelementptr inbounds i8, ptr %0, i64 264
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #10
  %15 = tail call noundef ptr @_ZNK7sc_core6sc_ppqIPNS_7sc_timeEE3topEv(ptr noundef nonnull align 8 dereferenceable(24) %3)
  %16 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZN7sc_core13sc_time_stampEv()
  call void @_ZN7sc_coremiERKNS_7sc_timeES2_(ptr dead_on_unwind nonnull writable sret(%"class.sc_core::sc_time") align 8 %2, ptr noundef nonnull align 8 dereferenceable(8) %15, ptr noundef nonnull align 8 dereferenceable(8) %16)
  call void @_ZN7sc_core8sc_event6notifyERKNS_7sc_timeE(ptr noundef nonnull align 8 dereferenceable(160) %14, ptr noundef nonnull align 8 dereferenceable(8) %2)
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #10
  br label %17

17:                                               ; preds = %10, %13, %1
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK7sc_core11sc_ppq_base4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef ptr @_ZN7sc_core6sc_ppqIPNS_7sc_timeEE11extract_topEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) local_unnamed_addr #3

declare noundef nonnull align 8 dereferenceable(8) ptr @_ZN7sc_core13sc_time_stampEv() local_unnamed_addr #4

; Function Attrs: mustprogress uwtable
declare dso_local noundef ptr @_ZNK7sc_core6sc_ppqIPNS_7sc_timeEE3topEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

declare void @_ZN7sc_core8sc_event6notifyERKNS_7sc_timeE(ptr noundef nonnull align 8 dereferenceable(160), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK7sc_core11sc_ppq_base5emptyEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK7sc_core7sc_timeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #5 align 2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #6

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN7sc_coremiERKNS_7sc_timeES2_(ptr dead_on_unwind noalias writable sret(%"class.sc_core::sc_time") align 8, ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #7

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { noreturn nounwind }
attributes #9 = { builtin nounwind }
attributes #10 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass