; LLVM IR from gem5/gem5 :: ext/softfloat (s_negXM)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @softfloat_negXM(i8 noundef zeroext %0, ptr noundef %1) #0 {
  %3 = alloca i8, align 1
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i8, align 1
  %8 = alloca i32, align 4
  store i8 %0, ptr %3, align 1, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !8
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  store i32 0, ptr %5, align 4, !tbaa !10
  %9 = load i8, ptr %3, align 1, !tbaa !5
  %10 = zext i8 %9 to i32
  %11 = sub nsw i32 %10, 1
  store i32 %11, ptr %6, align 4, !tbaa !10
  store i8 1, ptr %7, align 1, !tbaa !5
  br label %12

12:                                               ; preds = %37, %2
  %13 = load ptr, ptr %4, align 8, !tbaa !8
  %14 = load i32, ptr %5, align 4, !tbaa !10
  %15 = zext i32 %14 to i64
  %16 = getelementptr inbounds i32, ptr %13, i64 %15
  %17 = load i32, ptr %16, align 4, !tbaa !10
  %18 = xor i32 %17, -1
  %19 = load i8, ptr %7, align 1, !tbaa !5
  %20 = zext i8 %19 to i32
  %21 = add i32 %18, %20
  store i32 %21, ptr %8, align 4, !tbaa !10
  %22 = load i32, ptr %8, align 4, !tbaa !10
  %23 = load ptr, ptr %4, align 8, !tbaa !8
  %24 = load i32, ptr %5, align 4, !tbaa !10
  %25 = zext i32 %24 to i64
  %26 = getelementptr inbounds i32, ptr %23, i64 %25
  store i32 %22, ptr %26, align 4, !tbaa !10
  %27 = load i32, ptr %5, align 4, !tbaa !10
  %28 = load i32, ptr %6, align 4, !tbaa !10
  %29 = icmp eq i32 %27, %28
  br i1 %29, label %30, label %31

30:                                               ; preds = %12
  br label %38

31:                                               ; preds = %12
  %32 = load i32, ptr %5, align 4, !tbaa !10
  %33 = add i32 %32, 1
  store i32 %33, ptr %5, align 4, !tbaa !10
  %34 = load i32, ptr %8, align 4, !tbaa !10
  %35 = icmp ne i32 %34, 0
  br i1 %35, label %36, label %37

36:                                               ; preds = %31
  store i8 0, ptr %7, align 1, !tbaa !5
  br label %37

37:                                               ; preds = %36, %31
  br label %12

38:                                               ; preds = %30
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"any pointer", !6, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !6, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable
define dso_local void @softfloat_negXM(i8 noundef zeroext %0, ptr nocapture noundef %1) local_unnamed_addr #0 {
  %3 = zext i8 %0 to i32
  %4 = add nsw i32 %3, -1
  %5 = load i32, ptr %1, align 4, !tbaa !5
  %6 = sub i32 0, %5
  store i32 %6, ptr %1, align 4, !tbaa !5
  %7 = icmp eq i32 %4, 0
  br i1 %7, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %2
  %8 = zext i32 %4 to i64
  %xtraiter = and i64 %8, 1
  %9 = icmp eq i32 %4, 1
  br i1 %9, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph.preheader.new

.lr.ph.preheader.new:                             ; preds = %.lr.ph.preheader
  %unroll_iter = and i64 %8, 4294967294
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph, %.lr.ph.preheader.new
  %indvars.iv = phi i64 [ 0, %.lr.ph.preheader.new ], [ %indvars.iv.next.1, %.lr.ph ]
  %10 = phi i32 [ %6, %.lr.ph.preheader.new ], [ %20, %.lr.ph ]
  %.01011 = phi i8 [ 1, %.lr.ph.preheader.new ], [ %spec.select.1, %.lr.ph ]
  %niter = phi i64 [ 0, %.lr.ph.preheader.new ], [ %niter.next.1, %.lr.ph ]
  %indvars.iv.next = or disjoint i64 %indvars.iv, 1
  %.not = icmp eq i32 %10, 0
  %spec.select = select i1 %.not, i8 %.01011, i8 0
  %11 = getelementptr inbounds i32, ptr %1, i64 %indvars.iv.next
  %12 = load i32, ptr %11, align 4, !tbaa !5
  %13 = xor i32 %12, -1
  %14 = zext nneg i8 %spec.select to i32
  %15 = add i32 %13, %14
  store i32 %15, ptr %11, align 4, !tbaa !5
  %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2
  %.not.1 = icmp eq i32 %15, 0
  %spec.select.1 = select i1 %.not.1, i8 %spec.select, i8 0
  %16 = getelementptr inbounds i32, ptr %1, i64 %indvars.iv.next.1
  %17 = load i32, ptr %16, align 4, !tbaa !5
  %18 = xor i32 %17, -1
  %19 = zext nneg i8 %spec.select.1 to i32
  %20 = add i32 %18, %19
  store i32 %20, ptr %16, align 4, !tbaa !5
  %niter.next.1 = add i64 %niter, 2
  %niter.ncmp.1 = icmp eq i64 %niter.next.1, %unroll_iter
  br i1 %niter.ncmp.1, label %._crit_edge.loopexit.unr-lcssa.loopexit, label %.lr.ph

._crit_edge.loopexit.unr-lcssa.loopexit:          ; preds = %.lr.ph
  %21 = add nuw nsw i64 %indvars.iv, 3
  %22 = zext nneg i8 %spec.select.1 to i32
  br label %._crit_edge.loopexit.unr-lcssa

._crit_edge.loopexit.unr-lcssa:                   ; preds = %._crit_edge.loopexit.unr-lcssa.loopexit, %.lr.ph.preheader
  %indvars.iv.unr = phi i64 [ 1, %.lr.ph.preheader ], [ %21, %._crit_edge.loopexit.unr-lcssa.loopexit ]
  %.unr = phi i32 [ %6, %.lr.ph.preheader ], [ %20, %._crit_edge.loopexit.unr-lcssa.loopexit ]
  %.01011.unr = phi i32 [ 1, %.lr.ph.preheader ], [ %22, %._crit_edge.loopexit.unr-lcssa.loopexit ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge, label %.lr.ph.epil

.lr.ph.epil:                                      ; preds = %._crit_edge.loopexit.unr-lcssa
  %.not.epil = icmp eq i32 %.unr, 0
  %23 = getelementptr inbounds i32, ptr %1, i64 %indvars.iv.unr
  %24 = load i32, ptr %23, align 4, !tbaa !5
  %25 = xor i32 %24, -1
  %26 = select i1 %.not.epil, i32 %.01011.unr, i32 0
  %27 = add i32 %26, %25
  store i32 %27, ptr %23, align 4, !tbaa !5
  br label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph.epil, %._crit_edge.loopexit.unr-lcssa, %2
  ret void
}

attributes #0 = { nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass