; LLVM IR from luminousmen/ZUC :: ZUC.ll (Z26LFSRWithInitializationModej)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@LFSR_S = external dso_local global [16 x i32], align 16

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z4AddMjj(i32 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z26LFSRWithInitializationModej(i32 noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store i32 %0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  %6 = load i32, ptr @LFSR_S, align 16, !tbaa !5
  store i32 %6, ptr %3, align 4, !tbaa !5
  %7 = load i32, ptr @LFSR_S, align 16, !tbaa !5
  %8 = shl i32 %7, 8
  %9 = load i32, ptr @LFSR_S, align 16, !tbaa !5
  %10 = lshr i32 %9, 23
  %11 = or i32 %8, %10
  %12 = and i32 %11, 2147483647
  store i32 %12, ptr %4, align 4, !tbaa !5
  %13 = load i32, ptr %3, align 4, !tbaa !5
  %14 = load i32, ptr %4, align 4, !tbaa !5
  %15 = call noundef i32 @_Z4AddMjj(i32 noundef %13, i32 noundef %14)
  store i32 %15, ptr %3, align 4, !tbaa !5
  %16 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @LFSR_S, i64 0, i64 4), align 16, !tbaa !5
  %17 = shl i32 %16, 20
  %18 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @LFSR_S, i64 0, i64 4), align 16, !tbaa !5
  %19 = lshr i32 %18, 11
  %20 = or i32 %17, %19
  %21 = and i32 %20, 2147483647
  store i32 %21, ptr %4, align 4, !tbaa !5
  %22 = load i32, ptr %3, align 4, !tbaa !5
  %23 = load i32, ptr %4, align 4, !tbaa !5
  %24 = call noundef i32 @_Z4AddMjj(i32 noundef %22, i32 noundef %23)
  store i32 %24, ptr %3, align 4, !tbaa !5
  %25 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @LFSR_S, i64 0, i64 10), align 8, !tbaa !5
  %26 = shl i32 %25, 21
  %27 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @LFSR_S, i64 0, i64 10), align 8, !tbaa !5
  %28 = lshr i32 %27, 10
  %29 = or i32 %26, %28
  %30 = and i32 %29, 2147483647
  store i32 %30, ptr %4, align 4, !tbaa !5
  %31 = load i32, ptr %3, align 4, !tbaa !5
  %32 = load i32, ptr %4, align 4, !tbaa !5
  %33 = call noundef i32 @_Z4AddMjj(i32 noundef %31, i32 noundef %32)
  store i32 %33, ptr %3, align 4, !tbaa !5
  %34 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @LFSR_S, i64 0, i64 13), align 4, !tbaa !5
  %35 = shl i32 %34, 17
  %36 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @LFSR_S, i64 0, i64 13), align 4, !tbaa !5
  %37 = lshr i32 %36, 14
  %38 = or i32 %35, %37
  %39 = and i32 %38, 2147483647
  store i32 %39, ptr %4, align 4, !tbaa !5
  %40 = load i32, ptr %3, align 4, !tbaa !5
  %41 = load i32, ptr %4, align 4, !tbaa !5
  %42 = call noundef i32 @_Z4AddMjj(i32 noundef %40, i32 noundef %41)
  store i32 %42, ptr %3, align 4, !tbaa !5
  %43 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @LFSR_S, i64 0, i64 15), align 4, !tbaa !5
  %44 = shl i32 %43, 15
  %45 = load i32, ptr getelementptr inbounds ([16 x i32], ptr @LFSR_S, i64 0, i64 15), align 4, !tbaa !5
  %46 = lshr i32 %45, 16
  %47 = or i32 %44, %46
  %48 = and i32 %47, 2147483647
  store i32 %48, ptr %4, align 4, !tbaa !5
  %49 = load i32, ptr %3, align 4, !tbaa !5
  %50 = load i32, ptr %4, align 4, !tbaa !5
  %51 = call noundef i32 @_Z4AddMjj(i32 noundef %49, i32 noundef %50)
  store i32 %51, ptr %3, align 4, !tbaa !5
  %52 = load i32, ptr %3, align 4, !tbaa !5
  %53 = load i32, ptr %2, align 4, !tbaa !5
  %54 = call noundef i32 @_Z4AddMjj(i32 noundef %52, i32 noundef %53)
  store i32 %54, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 0, ptr %5, align 4, !tbaa !5
  br label %55

55:                                               ; preds = %68, %1
  %56 = load i32, ptr %5, align 4, !tbaa !5
  %57 = icmp slt i32 %56, 15
  br i1 %57, label %59, label %58

58:                                               ; preds = %55
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  br label %71

59:                                               ; preds = %55
  %60 = load i32, ptr %5, align 4, !tbaa !5
  %61 = add nsw i32 %60, 1
  %62 = sext i32 %61 to i64
  %63 = getelementptr inbounds [16 x i32], ptr @LFSR_S, i64 0, i64 %62
  %64 = load i32, ptr %63, align 4, !tbaa !5
  %65 = load i32, ptr %5, align 4, !tbaa !5
  %66 = sext i32 %65 to i64
  %67 = getelementptr inbounds [16 x i32], ptr @LFSR_S, i64 0, i64 %66
  store i32 %64, ptr %67, align 4, !tbaa !5
  br label %68

68:                                               ; preds = %59
  %69 = load i32, ptr %5, align 4, !tbaa !5
  %70 = add nsw i32 %69, 1
  store i32 %70, ptr %5, align 4, !tbaa !5
  br label %55, !llvm.loop !9

71:                                               ; preds = %58
  %72 = load i32, ptr %3, align 4, !tbaa !5
  store i32 %72, ptr getelementptr inbounds ([16 x i32], ptr @LFSR_S, i64 0, i64 15), align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@LFSR_S = external dso_local local_unnamed_addr global [16 x i32], align 16

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z4AddMjj(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z26LFSRWithInitializationModej(i32 noundef %0) local_unnamed_addr #0 {
  %2 = load i32, ptr @LFSR_S, align 16, !tbaa !5
  %3 = shl i32 %2, 8
  %4 = lshr i32 %2, 23
  %.masked = and i32 %3, 2147483392
  %5 = or i32 %.masked, %4
  %6 = tail call noundef i32 @_Z4AddMjj(i32 noundef %2, i32 noundef %5)
  %7 = load i32, ptr getelementptr inbounds (i8, ptr @LFSR_S, i64 16), align 16, !tbaa !5
  %8 = shl i32 %7, 20
  %9 = lshr i32 %7, 11
  %.masked17 = and i32 %8, 2146435072
  %10 = or i32 %.masked17, %9
  %11 = tail call noundef i32 @_Z4AddMjj(i32 noundef %6, i32 noundef %10)
  %12 = load i32, ptr getelementptr inbounds (i8, ptr @LFSR_S, i64 40), align 8, !tbaa !5
  %13 = shl i32 %12, 21
  %14 = lshr i32 %12, 10
  %.masked18 = and i32 %13, 2145386496
  %15 = or i32 %.masked18, %14
  %16 = tail call noundef i32 @_Z4AddMjj(i32 noundef %11, i32 noundef %15)
  %17 = load i32, ptr getelementptr inbounds (i8, ptr @LFSR_S, i64 52), align 4, !tbaa !5
  %18 = shl i32 %17, 17
  %19 = lshr i32 %17, 14
  %.masked19 = and i32 %18, 2147352576
  %20 = or i32 %.masked19, %19
  %21 = tail call noundef i32 @_Z4AddMjj(i32 noundef %16, i32 noundef %20)
  %22 = load i32, ptr getelementptr inbounds (i8, ptr @LFSR_S, i64 60), align 4, !tbaa !5
  %23 = shl i32 %22, 15
  %24 = lshr i32 %22, 16
  %.masked20 = and i32 %23, 2147450880
  %25 = or i32 %.masked20, %24
  %26 = tail call noundef i32 @_Z4AddMjj(i32 noundef %21, i32 noundef %25)
  %27 = tail call noundef i32 @_Z4AddMjj(i32 noundef %26, i32 noundef %0)
  tail call void @llvm.memmove.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(60) @LFSR_S, ptr noundef nonnull align 4 dereferenceable(60) getelementptr inbounds (i8, ptr @LFSR_S, i64 4), i64 60, i1 false), !tbaa !5
  store i32 %27, ptr getelementptr inbounds (i8, ptr @LFSR_S, i64 60), align 4, !tbaa !5
  ret void
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memmove.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1 immarg) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LoopIdiomRecognizePass,LoopRotatePass,SROAPass,SimplifyCFGPass,TailCallElimPass