; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/kernel/sc_simcontext.ll (ZN7sc_core13sc_simcontext4initEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_core::sc_time" = type { i64 }
%"class.sc_core::sc_simcontext" = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, %"struct.sc_core::sc_curr_proc_info", ptr, i8, i32, %"class.std::vector.26", %"class.std::vector", %"class.std::vector.0", %"class.std::vector", ptr, %"class.std::vector.31", i8, ptr, ptr, ptr, %"class.sc_core::sc_time", %"class.sc_core::sc_time", ptr, i64, i64, i8, i8, i8, i8, i32, ptr, i8, i8, i32, i8, ptr, ptr }
%"struct.sc_core::sc_curr_proc_info" = type <{ ptr, i32, [4 x i8] }>
%"class.std::vector.26" = type { %"struct.std::_Vector_base.27" }
%"struct.std::_Vector_base.27" = type { %"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_thread_process *, std::allocator<sc_core::sc_thread_process *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_object *, std::allocator<sc_core::sc_object *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_event *, std::allocator<sc_core::sc_event *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.31" = type { %"struct.std::_Vector_base.32" }
%"struct.std::_Vector_base.32" = type { %"struct.std::_Vector_base<sc_core::sc_trace_file *, std::allocator<sc_core::sc_trace_file *>>::_Vector_impl" }
%"struct.std::_Vector_base<sc_core::sc_trace_file *, std::allocator<sc_core::sc_trace_file *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sc_core::sc_trace_file *, std::allocator<sc_core::sc_trace_file *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sc_core::sc_trace_file *, std::allocator<sc_core::sc_trace_file *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@.str.4 = external hidden unnamed_addr constant [22 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [8 x i8], align 1
@_ZN7sc_core12SC_ZERO_TIMEE = external global %"class.sc_core::sc_time", align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZN7sc_core22sc_notify_time_compareEPKvS1_(ptr noundef, ptr noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core13sc_simcontext4initEv(ptr noundef nonnull align 8 dereferenceable(344) %0) #1 align 2 personality ptr @__gxx_personality_v0 {
  %2 = alloca ptr, align 8
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %6 = load ptr, ptr %2, align 8
  %7 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 112) #8
  invoke void @_ZN7sc_core17sc_object_managerC1Ev(ptr noundef nonnull align 8 dereferenceable(105) %7)
          to label %8 unwind label %78

8:                                                ; preds = %1
  %9 = getelementptr inbounds %"class.sc_core::sc_simcontext", ptr %6, i32 0, i32 0
  store ptr %7, ptr %9, align 8, !tbaa !9
  %10 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 40) #8
  invoke void @_ZN7sc_core18sc_module_registryC1ERNS_13sc_simcontextE(ptr noundef nonnull align 8 dereferenceable(40) %10, ptr noundef nonnull align 8 dereferenceable(344) %6)
          to label %11 unwind label %82

11:                                               ; preds = %8
  %12 = getelementptr inbounds %"class.sc_core::sc_simcontext", ptr %6, i32 0, i32 1
  store ptr %10, ptr %12, align 8, !tbaa !35
  %13 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 40) #8
  invoke void @_ZN7sc_core16sc_port_registryC1ERNS_13sc_simcontextE(ptr noundef nonnull align 8 dereferenceable(40) %13, ptr noundef nonnull align 8 dereferenceable(344) %6)
          to label %14 unwind label %86

14:                                               ; preds = %11
  %15 = getelementptr inbounds %"class.sc_core::sc_simcontext", ptr %6, i32 0, i32 2
  store ptr %13, ptr %15, align 8, !tbaa !36
  %16 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 40) #8
  invoke void @_ZN7sc_core18sc_export_registryC1ERNS_13sc_simcontextE(ptr noundef nonnull align 8 dereferenceable(40) %16, ptr noundef nonnull align 8 dereferenceable(344) %6)
          to label %17 unwind label %90

17:                                               ; preds = %14
  %18 = getelementptr inbounds %"class.sc_core::sc_simcontext", ptr %6, i32 0, i32 3
  store ptr %16, ptr %18, align 8, !tbaa !37
  %19 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 56) #8
  invoke void @_ZN7sc_core24sc_prim_channel_registryC1ERNS_13sc_simcontextE(ptr noundef nonnull align 8 dereferenceable(56) %19, ptr noundef nonnull align 8 dereferenceable(344) %6)
          to label %20 unwind label %94

20:                                               ; preds = %17
  %21 = getelementptr inbounds %"class.sc_core::sc_simcontext", ptr %6, i32 0, i32 4
  store ptr %19, ptr %21, align 8, !tbaa !38
  %22 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 1) #8
  invoke void @_ZN7sc_core26sc_phase_callback_registryC1ERNS_13sc_simcontextE(ptr noundef nonnull align 1 dereferenceable(1) %22, ptr noundef nonnull align 8 dereferenceable(344) %6)
          to label %23 unwind label %98

23:                                               ; preds = %20
  %24 = getelementptr inbounds %"class.sc_core::sc_simcontext", ptr %6, i32 0, i32 5
  store ptr %22, ptr %24, align 8, !tbaa !39
  %25 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 8248) #8
  invoke void @_ZN7sc_core11sc_name_genC1Ev(ptr noundef nonnull align 8 dereferenceable(8248) %25)
          to label %26 unwind label %102

26:                                               ; preds = %23
  %27 = getelementptr inbounds %"class.sc_core::sc_simcontext", ptr %6, i32 0, i32 6
  store ptr %25, ptr %27, align 8, !tbaa !40
  %28 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 16) #8
  invoke void @_ZN7sc_core16sc_process_tableC1Ev(ptr noundef nonnull align 8 dereferenceable(16) %28)
          to label %29 unwind label %106

29:                                               ; preds = %26
  %30 = getelementptr inbounds %"class.sc_core::sc_simcontext", ptr %6, i32 0, i32 7
  store ptr %28, ptr %30, align 8, !tbaa !41
  %31 = getelementptr inbounds %"class.sc_core::sc_simcontext", ptr %6, i32 0, i32 9
  store ptr null, ptr %31, align 8, !tbaa !42
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #9
  %32 = call ptr @getenv(ptr noundef @.str.4) #9
  store ptr %32, ptr %5, align 8, !tbaa !5
  %33 = load ptr, ptr %5, align 8, !tbaa !5
  %34 = icmp eq ptr %33, null
  br i1 %34, label %39, label %35

35:                                               ; preds = %29
  %36 = load ptr, ptr %5, align 8, !tbaa !5
  %37 = call i32 @strcmp(ptr noundef %36, ptr noundef @.str.5) #10
  %38 = icmp ne i32 %37, 0
  br label %39

39:                                               ; preds = %35, %29
  %40 = phi i1 [ true, %29 ], [ %38, %35 ]
  %41 = zext i1 %40 to i64
  %42 = select i1 %40, i1 true, i1 false
  %43 = getelementptr inbounds %"class.sc_core::sc_simcontext", ptr %6, i32 0, i32 10
  %44 = zext i1 %42 to i8
  store i8 %44, ptr %43, align 8, !tbaa !43
  call void @_ZN7sc_core13sc_simcontext15reset_curr_procEv(ptr noundef nonnull align 8 dereferenceable(344) %6)
  %45 = getelementptr inbounds %"class.sc_core::sc_simcontext", ptr %6, i32 0, i32 11
  store i32 -1, ptr %45, align 4, !tbaa !44
  %46 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 24) #8
  invoke void @_ZN7sc_core6sc_ppqIPNS_14sc_event_timedEEC2EiPFiPKvS5_E(ptr noundef nonnull align 8 dereferenceable(24) %46, i32 noundef 128, ptr noundef @_ZN7sc_core22sc_notify_time_compareEPKvS1_)
          to label %47 unwind label %110

47:                                               ; preds = %39
  %48 = getelementptr inbounds %"class.sc_core::sc_simcontext", ptr %6, i32 0, i32 16
  store ptr %46, ptr %48, align 8, !tbaa !45
  %49 = getelementptr inbounds %"class.sc_core::sc_simcontext", ptr %6, i32 0, i32 18
  store i8 0, ptr %49, align 8, !tbaa !46
  %50 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 48) #8
  invoke void @_ZN7sc_core11sc_runnableC2Ev(ptr noundef nonnull align 8 dereferenceable(48) %50)
          to label %51 unwind label %114

51:                                               ; preds = %47
  %52 = getelementptr inbounds %"class.sc_core::sc_simcontext", ptr %6, i32 0, i32 19
  store ptr %50, ptr %52, align 8, !tbaa !47
  %53 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 16) #8
  invoke void @_ZN7sc_core8sc_plistIPNS_12sc_process_bEEC2Ev(ptr noundef nonnull align 8 dereferenceable(16) %53)
          to label %54 unwind label %118

54:                                               ; preds = %51
  %55 = getelementptr inbounds %"class.sc_core::sc_simcontext", ptr %6, i32 0, i32 20
  store ptr %53, ptr %55, align 8, !tbaa !48
  %56 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 32) #8
  invoke void @_ZN7sc_core14sc_time_paramsC1Ev(ptr noundef nonnull align 8 dereferenceable(25) %56)
          to label %57 unwind label %122

57:                                               ; preds = %54
  %58 = getelementptr inbounds %"class.sc_core::sc_simcontext", ptr %6, i32 0, i32 21
  store ptr %56, ptr %58, align 8, !tbaa !49
  %59 = getelementptr inbounds %"class.sc_core::sc_simcontext", ptr %6, i32 0, i32 22
  %60 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZN7sc_core7sc_timeaSERKS0_(ptr noundef nonnull align 8 dereferenceable(8) %59, ptr noundef nonnull align 8 dereferenceable(8) @_ZN7sc_core12SC_ZERO_TIMEE)
  %61 = getelementptr inbounds %"class.sc_core::sc_simcontext", ptr %6, i32 0, i32 23
  %62 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZN7sc_core7sc_timeaSERKS0_(ptr noundef nonnull align 8 dereferenceable(8) %61, ptr noundef nonnull align 8 dereferenceable(8) @_ZN7sc_core12SC_ZERO_TIMEE)
  %63 = getelementptr inbounds %"class.sc_core::sc_simcontext", ptr %6, i32 0, i32 25
  store i64 0, ptr %63, align 8, !tbaa !50
  %64 = getelementptr inbounds %"class.sc_core::sc_simcontext", ptr %6, i32 0, i32 26
  store i64 0, ptr %64, align 8, !tbaa !51
  %65 = getelementptr inbounds %"class.sc_core::sc_simcontext", ptr %6, i32 0, i32 27
  store i8 0, ptr %65, align 8, !tbaa !52
  %66 = getelementptr inbounds %"class.sc_core::sc_simcontext", ptr %6, i32 0, i32 28
  store i8 0, ptr %66, align 1, !tbaa !53
  %67 = getelementptr inbounds %"class.sc_core::sc_simcontext", ptr %6, i32 0, i32 29
  store i8 0, ptr %67, align 2, !tbaa !54
  %68 = getelementptr inbounds %"class.sc_core::sc_simcontext", ptr %6, i32 0, i32 30
  store i8 0, ptr %68, align 1, !tbaa !55
  %69 = getelementptr inbounds %"class.sc_core::sc_simcontext", ptr %6, i32 0, i32 31
  store i32 0, ptr %69, align 4, !tbaa !56
  %70 = getelementptr inbounds %"class.sc_core::sc_simcontext", ptr %6, i32 0, i32 32
  store ptr null, ptr %70, align 8, !tbaa !57
  %71 = getelementptr inbounds %"class.sc_core::sc_simcontext", ptr %6, i32 0, i32 37
  store ptr null, ptr %71, align 8, !tbaa !58
  %72 = getelementptr inbounds %"class.sc_core::sc_simcontext", ptr %6, i32 0, i32 24
  store ptr null, ptr %72, align 8, !tbaa !59
  %73 = getelementptr inbounds %"class.sc_core::sc_simcontext", ptr %6, i32 0, i32 38
  store ptr null, ptr %73, align 8, !tbaa !60
  %74 = getelementptr inbounds %"class.sc_core::sc_simcontext", ptr %6, i32 0, i32 33
  store i8 0, ptr %74, align 8, !tbaa !61
  %75 = getelementptr inbounds %"class.sc_core::sc_simcontext", ptr %6, i32 0, i32 36
  store i8 0, ptr %75, align 8, !tbaa !62
  %76 = getelementptr inbounds %"class.sc_core::sc_simcontext", ptr %6, i32 0, i32 34
  store i8 0, ptr %76, align 1, !tbaa !63
  %77 = getelementptr inbounds %"class.sc_core::sc_simcontext", ptr %6, i32 0, i32 35
  store i32 1, ptr %77, align 4, !tbaa !64
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #9
  ret void

78:                                               ; preds = %1
  %79 = landingpad { ptr, i32 }
          cleanup
  %80 = extractvalue { ptr, i32 } %79, 0
  store ptr %80, ptr %3, align 8
  %81 = extractvalue { ptr, i32 } %79, 1
  store i32 %81, ptr %4, align 4
  call void @_ZdlPvm(ptr noundef %7, i64 noundef 112) #11
  br label %127

82:                                               ; preds = %8
  %83 = landingpad { ptr, i32 }
          cleanup
  %84 = extractvalue { ptr, i32 } %83, 0
  store ptr %84, ptr %3, align 8
  %85 = extractvalue { ptr, i32 } %83, 1
  store i32 %85, ptr %4, align 4
  call void @_ZdlPvm(ptr noundef %10, i64 noundef 40) #11
  br label %127

86:                                               ; preds = %11
  %87 = landingpad { ptr, i32 }
          cleanup
  %88 = extractvalue { ptr, i32 } %87, 0
  store ptr %88, ptr %3, align 8
  %89 = extractvalue { ptr, i32 } %87, 1
  store i32 %89, ptr %4, align 4
  call void @_ZdlPvm(ptr noundef %13, i64 noundef 40) #11
  br label %127

90:                                               ; preds = %14
  %91 = landingpad { ptr, i32 }
          cleanup
  %92 = extractvalue { ptr, i32 } %91, 0
  store ptr %92, ptr %3, align 8
  %93 = extractvalue { ptr, i32 } %91, 1
  store i32 %93, ptr %4, align 4
  call void @_ZdlPvm(ptr noundef %16, i64 noundef 40) #11
  br label %127

94:                                               ; preds = %17
  %95 = landingpad { ptr, i32 }
          cleanup
  %96 = extractvalue { ptr, i32 } %95, 0
  store ptr %96, ptr %3, align 8
  %97 = extractvalue { ptr, i32 } %95, 1
  store i32 %97, ptr %4, align 4
  call void @_ZdlPvm(ptr noundef %19, i64 noundef 56) #11
  br label %127

98:                                               ; preds = %20
  %99 = landingpad { ptr, i32 }
          cleanup
  %100 = extractvalue { ptr, i32 } %99, 0
  store ptr %100, ptr %3, align 8
  %101 = extractvalue { ptr, i32 } %99, 1
  store i32 %101, ptr %4, align 4
  call void @_ZdlPvm(ptr noundef %22, i64 noundef 1) #11
  br label %127

102:                                              ; preds = %23
  %103 = landingpad { ptr, i32 }
          cleanup
  %104 = extractvalue { ptr, i32 } %103, 0
  store ptr %104, ptr %3, align 8
  %105 = extractvalue { ptr, i32 } %103, 1
  store i32 %105, ptr %4, align 4
  call void @_ZdlPvm(ptr noundef %25, i64 noundef 8248) #11
  br label %127

106:                                              ; preds = %26
  %107 = landingpad { ptr, i32 }
          cleanup
  %108 = extractvalue { ptr, i32 } %107, 0
  store ptr %108, ptr %3, align 8
  %109 = extractvalue { ptr, i32 } %107, 1
  store i32 %109, ptr %4, align 4
  call void @_ZdlPvm(ptr noundef %28, i64 noundef 16) #11
  br label %127

110:                                              ; preds = %39
  %111 = landingpad { ptr, i32 }
          cleanup
  %112 = extractvalue { ptr, i32 } %111, 0
  store ptr %112, ptr %3, align 8
  %113 = extractvalue { ptr, i32 } %111, 1
  store i32 %113, ptr %4, align 4
  call void @_ZdlPvm(ptr noundef %46, i64 noundef 24) #11
  br label %126

114:                                              ; preds = %47
  %115 = landingpad { ptr, i32 }
          cleanup
  %116 = extractvalue { ptr, i32 } %115, 0
  store ptr %116, ptr %3, align 8
  %117 = extractvalue { ptr, i32 } %115, 1
  store i32 %117, ptr %4, align 4
  call void @_ZdlPvm(ptr noundef %50, i64 noundef 48) #11
  br label %126

118:                                              ; preds = %51
  %119 = landingpad { ptr, i32 }
          cleanup
  %120 = extractvalue { ptr, i32 } %119, 0
  store ptr %120, ptr %3, align 8
  %121 = extractvalue { ptr, i32 } %119, 1
  store i32 %121, ptr %4, align 4
  call void @_ZdlPvm(ptr noundef %53, i64 noundef 16) #11
  br label %126

122:                                              ; preds = %54
  %123 = landingpad { ptr, i32 }
          cleanup
  %124 = extractvalue { ptr, i32 } %123, 0
  store ptr %124, ptr %3, align 8
  %125 = extractvalue { ptr, i32 } %123, 1
  store i32 %125, ptr %4, align 4
  call void @_ZdlPvm(ptr noundef %56, i64 noundef 32) #11
  br label %126

126:                                              ; preds = %122, %118, %114, %110
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #9
  br label %127

127:                                              ; preds = %126, %106, %102, %98, %94, %90, %86, %82, %78
  %128 = load ptr, ptr %3, align 8
  %129 = load i32, ptr %4, align 4
  %130 = insertvalue { ptr, i32 } poison, ptr %128, 0
  %131 = insertvalue { ptr, i32 } %130, i32 %129, 1
  resume { ptr, i32 } %131
}

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) #2

declare void @_ZN7sc_core17sc_object_managerC1Ev(ptr noundef nonnull align 8 dereferenceable(105)) unnamed_addr #3

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) #4

declare void @_ZN7sc_core18sc_module_registryC1ERNS_13sc_simcontextE(ptr noundef nonnull align 8 dereferenceable(40), ptr noundef nonnull align 8 dereferenceable(344)) unnamed_addr #3

declare void @_ZN7sc_core16sc_port_registryC1ERNS_13sc_simcontextE(ptr noundef nonnull align 8 dereferenceable(40), ptr noundef nonnull align 8 dereferenceable(344)) unnamed_addr #3

declare void @_ZN7sc_core18sc_export_registryC1ERNS_13sc_simcontextE(ptr noundef nonnull align 8 dereferenceable(40), ptr noundef nonnull align 8 dereferenceable(344)) unnamed_addr #3

declare void @_ZN7sc_core24sc_prim_channel_registryC1ERNS_13sc_simcontextE(ptr noundef nonnull align 8 dereferenceable(56), ptr noundef nonnull align 8 dereferenceable(344)) unnamed_addr #3

declare void @_ZN7sc_core26sc_phase_callback_registryC1ERNS_13sc_simcontextE(ptr noundef nonnull align 1 dereferenceable(1), ptr noundef nonnull align 8 dereferenceable(344)) unnamed_addr #3

declare void @_ZN7sc_core11sc_name_genC1Ev(ptr noundef nonnull align 8 dereferenceable(8248)) unnamed_addr #3

; Function Attrs: nounwind
declare ptr @getenv(ptr noundef) #5

; Function Attrs: nounwind willreturn memory(read)
declare i32 @strcmp(ptr noundef, ptr noundef) #6

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN7sc_core13sc_simcontext15reset_curr_procEv(ptr noundef nonnull align 8 dereferenceable(344)) #7 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core6sc_ppqIPNS_14sc_event_timedEEC2EiPFiPKvS5_E(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef, ptr noundef) unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN7sc_core11sc_runnableC2Ev(ptr noundef nonnull align 8 dereferenceable(48)) unnamed_addr #7 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core8sc_plistIPNS_12sc_process_bEEC2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #1 align 2

declare void @_ZN7sc_core14sc_time_paramsC1Ev(ptr noundef nonnull align 8 dereferenceable(25)) unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZN7sc_core7sc_timeaSERKS0_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #7 align 2

declare void @_ZN7sc_core16sc_process_tableC1Ev(ptr)

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind willreturn memory(read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { builtin allocsize(0) }
attributes #9 = { nounwind }
attributes #10 = { nounwind willreturn memory(read) }
attributes #11 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"_ZTSN7sc_core13sc_simcontextE", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56, !11, i64 64, !6, i64 80, !13, i64 88, !14, i64 92, !15, i64 96, !19, i64 120, !23, i64 144, !19, i64 168, !6, i64 192, !27, i64 200, !13, i64 224, !6, i64 232, !6, i64 240, !6, i64 248, !31, i64 256, !31, i64 264, !6, i64 272, !32, i64 280, !32, i64 288, !13, i64 296, !13, i64 297, !13, i64 298, !13, i64 299, !33, i64 300, !6, i64 304, !13, i64 312, !13, i64 313, !34, i64 316, !13, i64 320, !6, i64 328, !6, i64 336}
!11 = !{!"_ZTSN7sc_core17sc_curr_proc_infoE", !6, i64 0, !12, i64 8}
!12 = !{!"_ZTSN7sc_core17sc_curr_proc_kindE", !7, i64 0}
!13 = !{!"bool", !7, i64 0}
!14 = !{!"int", !7, i64 0}
!15 = !{!"_ZTSSt6vectorIPN7sc_core17sc_thread_processESaIS2_EE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseIPN7sc_core17sc_thread_processESaIS2_EE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core17sc_thread_processESaIS2_EE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core17sc_thread_processESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!19 = !{!"_ZTSSt6vectorIPN7sc_core8sc_eventESaIS2_EE", !20, i64 0}
!20 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE12_Vector_implE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!23 = !{!"_ZTSSt6vectorIPN7sc_core9sc_objectESaIS2_EE", !24, i64 0}
!24 = !{!"_ZTSSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE", !25, i64 0}
!25 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE12_Vector_implE", !26, i64 0}
!26 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!27 = !{!"_ZTSSt6vectorIPN7sc_core13sc_trace_fileESaIS2_EE", !28, i64 0}
!28 = !{!"_ZTSSt12_Vector_baseIPN7sc_core13sc_trace_fileESaIS2_EE", !29, i64 0}
!29 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core13sc_trace_fileESaIS2_EE12_Vector_implE", !30, i64 0}
!30 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core13sc_trace_fileESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!31 = !{!"_ZTSN7sc_core7sc_timeE", !32, i64 0}
!32 = !{!"long long", !7, i64 0}
!33 = !{!"_ZTSN7sc_core13sc_simcontext16execution_phasesE", !7, i64 0}
!34 = !{!"_ZTSN7sc_core9sc_statusE", !7, i64 0}
!35 = !{!10, !6, i64 8}
!36 = !{!10, !6, i64 16}
!37 = !{!10, !6, i64 24}
!38 = !{!10, !6, i64 32}
!39 = !{!10, !6, i64 40}
!40 = !{!10, !6, i64 48}
!41 = !{!10, !6, i64 56}
!42 = !{!10, !6, i64 80}
!43 = !{!10, !13, i64 88}
!44 = !{!10, !14, i64 92}
!45 = !{!10, !6, i64 192}
!46 = !{!10, !13, i64 224}
!47 = !{!10, !6, i64 232}
!48 = !{!10, !6, i64 240}
!49 = !{!10, !6, i64 248}
!50 = !{!10, !32, i64 280}
!51 = !{!10, !32, i64 288}
!52 = !{!10, !13, i64 296}
!53 = !{!10, !13, i64 297}
!54 = !{!10, !13, i64 298}
!55 = !{!10, !13, i64 299}
!56 = !{!10, !33, i64 300}
!57 = !{!10, !6, i64 304}
!58 = !{!10, !6, i64 328}
!59 = !{!10, !6, i64 272}
!60 = !{!10, !6, i64 336}
!61 = !{!10, !13, i64 312}
!62 = !{!10, !13, i64 320}
!63 = !{!10, !13, i64 313}
!64 = !{!10, !34, i64 316}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_core::sc_time" = type { i64 }

@.str.4 = external hidden unnamed_addr constant [22 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [8 x i8], align 1
@_ZN7sc_core12SC_ZERO_TIMEE = external global %"class.sc_core::sc_time", align 8

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZN7sc_core22sc_notify_time_compareEPKvS1_(ptr noundef, ptr noundef) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7sc_core13sc_simcontext4initEv(ptr noundef nonnull align 8 dereferenceable(344) %0) local_unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  %2 = tail call noalias noundef nonnull dereferenceable(112) ptr @_Znwm(i64 noundef 112) #8
  invoke void @_ZN7sc_core17sc_object_managerC1Ev(ptr noundef nonnull align 8 dereferenceable(105) %2)
          to label %3 unwind label %56

3:                                                ; preds = %1
  store ptr %2, ptr %0, align 8, !tbaa !5
  %4 = tail call noalias noundef nonnull dereferenceable(40) ptr @_Znwm(i64 noundef 40) #8
  invoke void @_ZN7sc_core18sc_module_registryC1ERNS_13sc_simcontextE(ptr noundef nonnull align 8 dereferenceable(40) %4, ptr noundef nonnull align 8 dereferenceable(344) %0)
          to label %5 unwind label %58

5:                                                ; preds = %3
  %6 = getelementptr inbounds i8, ptr %0, i64 8
  store ptr %4, ptr %6, align 8, !tbaa !34
  %7 = tail call noalias noundef nonnull dereferenceable(40) ptr @_Znwm(i64 noundef 40) #8
  invoke void @_ZN7sc_core16sc_port_registryC1ERNS_13sc_simcontextE(ptr noundef nonnull align 8 dereferenceable(40) %7, ptr noundef nonnull align 8 dereferenceable(344) %0)
          to label %8 unwind label %60

8:                                                ; preds = %5
  %9 = getelementptr inbounds i8, ptr %0, i64 16
  store ptr %7, ptr %9, align 8, !tbaa !35
  %10 = tail call noalias noundef nonnull dereferenceable(40) ptr @_Znwm(i64 noundef 40) #8
  invoke void @_ZN7sc_core18sc_export_registryC1ERNS_13sc_simcontextE(ptr noundef nonnull align 8 dereferenceable(40) %10, ptr noundef nonnull align 8 dereferenceable(344) %0)
          to label %11 unwind label %62

11:                                               ; preds = %8
  %12 = getelementptr inbounds i8, ptr %0, i64 24
  store ptr %10, ptr %12, align 8, !tbaa !36
  %13 = tail call noalias noundef nonnull dereferenceable(56) ptr @_Znwm(i64 noundef 56) #8
  invoke void @_ZN7sc_core24sc_prim_channel_registryC1ERNS_13sc_simcontextE(ptr noundef nonnull align 8 dereferenceable(56) %13, ptr noundef nonnull align 8 dereferenceable(344) %0)
          to label %14 unwind label %64

14:                                               ; preds = %11
  %15 = getelementptr inbounds i8, ptr %0, i64 32
  store ptr %13, ptr %15, align 8, !tbaa !37
  %16 = tail call noalias noundef nonnull dereferenceable(1) ptr @_Znwm(i64 noundef 1) #8
  invoke void @_ZN7sc_core26sc_phase_callback_registryC1ERNS_13sc_simcontextE(ptr noundef nonnull align 1 dereferenceable(1) %16, ptr noundef nonnull align 8 dereferenceable(344) %0)
          to label %17 unwind label %66

17:                                               ; preds = %14
  %18 = getelementptr inbounds i8, ptr %0, i64 40
  store ptr %16, ptr %18, align 8, !tbaa !38
  %19 = tail call noalias noundef nonnull dereferenceable(8248) ptr @_Znwm(i64 noundef 8248) #8
  invoke void @_ZN7sc_core11sc_name_genC1Ev(ptr noundef nonnull align 8 dereferenceable(8248) %19)
          to label %20 unwind label %68

20:                                               ; preds = %17
  %21 = getelementptr inbounds i8, ptr %0, i64 48
  store ptr %19, ptr %21, align 8, !tbaa !39
  %22 = tail call noalias noundef nonnull dereferenceable(16) ptr @_Znwm(i64 noundef 16) #8
  invoke void @_ZN7sc_core16sc_process_tableC1Ev(ptr noundef nonnull align 8 dereferenceable(16) %22)
          to label %23 unwind label %70

23:                                               ; preds = %20
  %24 = getelementptr inbounds i8, ptr %0, i64 56
  store ptr %22, ptr %24, align 8, !tbaa !40
  %25 = getelementptr inbounds i8, ptr %0, i64 80
  store ptr null, ptr %25, align 8, !tbaa !41
  %26 = tail call ptr @getenv(ptr noundef nonnull @.str.4) #9
  %27 = icmp eq ptr %26, null
  br i1 %27, label %32, label %28

28:                                               ; preds = %23
  %29 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(1) %26, ptr noundef nonnull dereferenceable(1) @.str.5) #10
  %30 = icmp ne i32 %29, 0
  %31 = zext i1 %30 to i8
  br label %32

32:                                               ; preds = %28, %23
  %33 = phi i8 [ 1, %23 ], [ %31, %28 ]
  %34 = getelementptr inbounds i8, ptr %0, i64 88
  store i8 %33, ptr %34, align 8, !tbaa !42
  tail call void @_ZN7sc_core13sc_simcontext15reset_curr_procEv(ptr noundef nonnull align 8 dereferenceable(344) %0)
  %35 = getelementptr inbounds i8, ptr %0, i64 92
  store i32 -1, ptr %35, align 4, !tbaa !43
  %36 = tail call noalias noundef nonnull dereferenceable(24) ptr @_Znwm(i64 noundef 24) #8
  invoke void @_ZN7sc_core6sc_ppqIPNS_14sc_event_timedEEC2EiPFiPKvS5_E(ptr noundef nonnull align 8 dereferenceable(24) %36, i32 noundef 128, ptr noundef nonnull @_ZN7sc_core22sc_notify_time_compareEPKvS1_)
          to label %37 unwind label %72

37:                                               ; preds = %32
  %38 = getelementptr inbounds i8, ptr %0, i64 192
  store ptr %36, ptr %38, align 8, !tbaa !44
  %39 = getelementptr inbounds i8, ptr %0, i64 224
  store i8 0, ptr %39, align 8, !tbaa !45
  %40 = tail call noalias noundef nonnull dereferenceable(48) ptr @_Znwm(i64 noundef 48) #8
  tail call void @_ZN7sc_core11sc_runnableC2Ev(ptr noundef nonnull align 8 dereferenceable(48) %40)
  %41 = getelementptr inbounds i8, ptr %0, i64 232
  store ptr %40, ptr %41, align 8, !tbaa !46
  %42 = tail call noalias noundef nonnull dereferenceable(16) ptr @_Znwm(i64 noundef 16) #8
  invoke void @_ZN7sc_core8sc_plistIPNS_12sc_process_bEEC2Ev(ptr noundef nonnull align 8 dereferenceable(16) %42)
          to label %43 unwind label %74

43:                                               ; preds = %37
  %44 = getelementptr inbounds i8, ptr %0, i64 240
  store ptr %42, ptr %44, align 8, !tbaa !47
  %45 = tail call noalias noundef nonnull dereferenceable(32) ptr @_Znwm(i64 noundef 32) #8
  invoke void @_ZN7sc_core14sc_time_paramsC1Ev(ptr noundef nonnull align 8 dereferenceable(25) %45)
          to label %46 unwind label %76

46:                                               ; preds = %43
  %47 = getelementptr inbounds i8, ptr %0, i64 248
  store ptr %45, ptr %47, align 8, !tbaa !48
  %48 = getelementptr inbounds i8, ptr %0, i64 256
  %49 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZN7sc_core7sc_timeaSERKS0_(ptr noundef nonnull align 8 dereferenceable(8) %48, ptr noundef nonnull align 8 dereferenceable(8) @_ZN7sc_core12SC_ZERO_TIMEE)
  %50 = getelementptr inbounds i8, ptr %0, i64 264
  %51 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZN7sc_core7sc_timeaSERKS0_(ptr noundef nonnull align 8 dereferenceable(8) %50, ptr noundef nonnull align 8 dereferenceable(8) @_ZN7sc_core12SC_ZERO_TIMEE)
  %52 = getelementptr inbounds i8, ptr %0, i64 328
  %53 = getelementptr inbounds i8, ptr %0, i64 272
  %54 = getelementptr inbounds i8, ptr %0, i64 320
  store i8 0, ptr %54, align 8, !tbaa !49
  %55 = getelementptr inbounds i8, ptr %0, i64 316
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(42) %53, i8 0, i64 42, i1 false)
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %52, i8 0, i64 16, i1 false)
  store i32 1, ptr %55, align 4, !tbaa !50
  ret void

56:                                               ; preds = %1
  %57 = landingpad { ptr, i32 }
          cleanup
  tail call void @_ZdlPvm(ptr noundef nonnull %2, i64 noundef 112) #11
  br label %78

58:                                               ; preds = %3
  %59 = landingpad { ptr, i32 }
          cleanup
  tail call void @_ZdlPvm(ptr noundef nonnull %4, i64 noundef 40) #11
  br label %78

60:                                               ; preds = %5
  %61 = landingpad { ptr, i32 }
          cleanup
  tail call void @_ZdlPvm(ptr noundef nonnull %7, i64 noundef 40) #11
  br label %78

62:                                               ; preds = %8
  %63 = landingpad { ptr, i32 }
          cleanup
  tail call void @_ZdlPvm(ptr noundef nonnull %10, i64 noundef 40) #11
  br label %78

64:                                               ; preds = %11
  %65 = landingpad { ptr, i32 }
          cleanup
  tail call void @_ZdlPvm(ptr noundef nonnull %13, i64 noundef 56) #11
  br label %78

66:                                               ; preds = %14
  %67 = landingpad { ptr, i32 }
          cleanup
  tail call void @_ZdlPvm(ptr noundef nonnull %16, i64 noundef 1) #11
  br label %78

68:                                               ; preds = %17
  %69 = landingpad { ptr, i32 }
          cleanup
  tail call void @_ZdlPvm(ptr noundef nonnull %19, i64 noundef 8248) #11
  br label %78

70:                                               ; preds = %20
  %71 = landingpad { ptr, i32 }
          cleanup
  tail call void @_ZdlPvm(ptr noundef nonnull %22, i64 noundef 16) #11
  br label %78

72:                                               ; preds = %32
  %73 = landingpad { ptr, i32 }
          cleanup
  tail call void @_ZdlPvm(ptr noundef nonnull %36, i64 noundef 24) #11
  br label %78

74:                                               ; preds = %37
  %75 = landingpad { ptr, i32 }
          cleanup
  tail call void @_ZdlPvm(ptr noundef nonnull %42, i64 noundef 16) #11
  br label %78

76:                                               ; preds = %43
  %77 = landingpad { ptr, i32 }
          cleanup
  tail call void @_ZdlPvm(ptr noundef nonnull %45, i64 noundef 32) #11
  br label %78

78:                                               ; preds = %72, %74, %76, %70, %68, %66, %64, %62, %60, %58, %56
  %.pn.pn = phi { ptr, i32 } [ %71, %70 ], [ %69, %68 ], [ %67, %66 ], [ %65, %64 ], [ %63, %62 ], [ %61, %60 ], [ %59, %58 ], [ %57, %56 ], [ %77, %76 ], [ %75, %74 ], [ %73, %72 ]
  resume { ptr, i32 } %.pn.pn
}

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) local_unnamed_addr #1

declare void @_ZN7sc_core17sc_object_managerC1Ev(ptr noundef nonnull align 8 dereferenceable(105)) unnamed_addr #2

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) local_unnamed_addr #3

declare void @_ZN7sc_core18sc_module_registryC1ERNS_13sc_simcontextE(ptr noundef nonnull align 8 dereferenceable(40), ptr noundef nonnull align 8 dereferenceable(344)) unnamed_addr #2

declare void @_ZN7sc_core16sc_port_registryC1ERNS_13sc_simcontextE(ptr noundef nonnull align 8 dereferenceable(40), ptr noundef nonnull align 8 dereferenceable(344)) unnamed_addr #2

declare void @_ZN7sc_core18sc_export_registryC1ERNS_13sc_simcontextE(ptr noundef nonnull align 8 dereferenceable(40), ptr noundef nonnull align 8 dereferenceable(344)) unnamed_addr #2

declare void @_ZN7sc_core24sc_prim_channel_registryC1ERNS_13sc_simcontextE(ptr noundef nonnull align 8 dereferenceable(56), ptr noundef nonnull align 8 dereferenceable(344)) unnamed_addr #2

declare void @_ZN7sc_core26sc_phase_callback_registryC1ERNS_13sc_simcontextE(ptr noundef nonnull align 1 dereferenceable(1), ptr noundef nonnull align 8 dereferenceable(344)) unnamed_addr #2

declare void @_ZN7sc_core11sc_name_genC1Ev(ptr noundef nonnull align 8 dereferenceable(8248)) unnamed_addr #2

; Function Attrs: nofree nounwind memory(read)
declare noundef ptr @getenv(ptr nocapture noundef) local_unnamed_addr #4

; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare i32 @strcmp(ptr nocapture noundef, ptr nocapture noundef) local_unnamed_addr #5

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN7sc_core13sc_simcontext15reset_curr_procEv(ptr noundef nonnull align 8 dereferenceable(344)) local_unnamed_addr #6 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core6sc_ppqIPNS_14sc_event_timedEEC2EiPFiPKvS5_E(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef, ptr noundef) unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN7sc_core11sc_runnableC2Ev(ptr noundef nonnull align 8 dereferenceable(48)) unnamed_addr #6 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7sc_core8sc_plistIPNS_12sc_process_bEEC2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #0 align 2

declare void @_ZN7sc_core14sc_time_paramsC1Ev(ptr noundef nonnull align 8 dereferenceable(25)) unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZN7sc_core7sc_timeaSERKS0_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #6 align 2

declare void @_ZN7sc_core16sc_process_tableC1Ev(ptr) local_unnamed_addr

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #7

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nofree nounwind memory(read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress nofree nounwind willreturn memory(argmem: read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #8 = { builtin allocsize(0) }
attributes #9 = { nounwind }
attributes #10 = { nounwind willreturn memory(read) }
attributes #11 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTSN7sc_core13sc_simcontextE", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 32, !7, i64 40, !7, i64 48, !7, i64 56, !10, i64 64, !7, i64 80, !12, i64 88, !13, i64 92, !14, i64 96, !18, i64 120, !22, i64 144, !18, i64 168, !7, i64 192, !26, i64 200, !12, i64 224, !7, i64 232, !7, i64 240, !7, i64 248, !30, i64 256, !30, i64 264, !7, i64 272, !31, i64 280, !31, i64 288, !12, i64 296, !12, i64 297, !12, i64 298, !12, i64 299, !32, i64 300, !7, i64 304, !12, i64 312, !12, i64 313, !33, i64 316, !12, i64 320, !7, i64 328, !7, i64 336}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTSN7sc_core17sc_curr_proc_infoE", !7, i64 0, !11, i64 8}
!11 = !{!"_ZTSN7sc_core17sc_curr_proc_kindE", !8, i64 0}
!12 = !{!"bool", !8, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = !{!"_ZTSSt6vectorIPN7sc_core17sc_thread_processESaIS2_EE", !15, i64 0}
!15 = !{!"_ZTSSt12_Vector_baseIPN7sc_core17sc_thread_processESaIS2_EE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core17sc_thread_processESaIS2_EE12_Vector_implE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core17sc_thread_processESaIS2_EE17_Vector_impl_dataE", !7, i64 0, !7, i64 8, !7, i64 16}
!18 = !{!"_ZTSSt6vectorIPN7sc_core8sc_eventESaIS2_EE", !19, i64 0}
!19 = !{!"_ZTSSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE12_Vector_implE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core8sc_eventESaIS2_EE17_Vector_impl_dataE", !7, i64 0, !7, i64 8, !7, i64 16}
!22 = !{!"_ZTSSt6vectorIPN7sc_core9sc_objectESaIS2_EE", !23, i64 0}
!23 = !{!"_ZTSSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE12_Vector_implE", !25, i64 0}
!25 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core9sc_objectESaIS2_EE17_Vector_impl_dataE", !7, i64 0, !7, i64 8, !7, i64 16}
!26 = !{!"_ZTSSt6vectorIPN7sc_core13sc_trace_fileESaIS2_EE", !27, i64 0}
!27 = !{!"_ZTSSt12_Vector_baseIPN7sc_core13sc_trace_fileESaIS2_EE", !28, i64 0}
!28 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core13sc_trace_fileESaIS2_EE12_Vector_implE", !29, i64 0}
!29 = !{!"_ZTSNSt12_Vector_baseIPN7sc_core13sc_trace_fileESaIS2_EE17_Vector_impl_dataE", !7, i64 0, !7, i64 8, !7, i64 16}
!30 = !{!"_ZTSN7sc_core7sc_timeE", !31, i64 0}
!31 = !{!"long long", !8, i64 0}
!32 = !{!"_ZTSN7sc_core13sc_simcontext16execution_phasesE", !8, i64 0}
!33 = !{!"_ZTSN7sc_core9sc_statusE", !8, i64 0}
!34 = !{!6, !7, i64 8}
!35 = !{!6, !7, i64 16}
!36 = !{!6, !7, i64 24}
!37 = !{!6, !7, i64 32}
!38 = !{!6, !7, i64 40}
!39 = !{!6, !7, i64 48}
!40 = !{!6, !7, i64 56}
!41 = !{!6, !7, i64 80}
!42 = !{!6, !12, i64 88}
!43 = !{!6, !13, i64 92}
!44 = !{!6, !7, i64 192}
!45 = !{!6, !12, i64 224}
!46 = !{!6, !7, i64 232}
!47 = !{!6, !7, i64 240}
!48 = !{!6, !7, i64 248}
!49 = !{!6, !12, i64 320}
!50 = !{!6, !33, i64 316}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,MemCpyOptPass,SROAPass,SimplifyCFGPass,TailCallElimPass