; LLVM IR from gem5/gem5 :: src/systemc/tests/systemc/examples/aes/aes.ll (Z11str2biguintPc)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::sc_biguint" = type { %"class.sc_dt::sc_unsigned" }
%"class.sc_dt::sc_unsigned" = type { %"class.sc_dt::sc_value_base", i32, i32, i32, ptr }
%"class.sc_dt::sc_value_base" = type { ptr }

@__dso_handle = external hidden global i8
@_ZZ11str2biguintPcE1a = external hidden global %"class.sc_dt::sc_biguint", align 8
@_ZGVZ11str2biguintPcE1a = external hidden global i64, align 8

; Function Attrs: nounwind
declare i32 @__cxa_atexit(ptr, ptr, ptr) #0

; Function Attrs: nounwind
declare i32 @__cxa_guard_acquire(ptr) #0

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nounwind
declare void @__cxa_guard_abort(ptr) #0

; Function Attrs: nounwind
declare void @__cxa_guard_release(ptr) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt10sc_biguintILi128EEC2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt11sc_unsignedixEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt11sc_unsignedD2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #3 align 2

declare noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt18sc_unsigned_bitrefaSEb(ptr noundef nonnull align 8 dereferenceable(24), i1 noundef zeroext) #4

; Function Attrs: mustprogress uwtable
define dso_local void @_Z11str2biguintPc(ptr dead_on_unwind noalias writable sret(%"class.sc_dt::sc_biguint") align 8 %0, ptr noundef %1) #2 personality ptr @__gxx_personality_v0 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca [16 x i8], align 16
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %3, align 8
  store ptr %1, ptr %4, align 8, !tbaa !5
  %10 = load atomic i8, ptr @_ZGVZ11str2biguintPcE1a acquire, align 8
  %11 = icmp eq i8 %10, 0
  br i1 %11, label %12, label %18, !prof !9

12:                                               ; preds = %2
  %13 = call i32 @__cxa_guard_acquire(ptr @_ZGVZ11str2biguintPcE1a) #0
  %14 = icmp ne i32 %13, 0
  br i1 %14, label %15, label %18

15:                                               ; preds = %12
  invoke void @_ZN5sc_dt10sc_biguintILi128EEC2Ev(ptr noundef nonnull align 8 dereferenceable(32) @_ZZ11str2biguintPcE1a)
          to label %16 unwind label %40

16:                                               ; preds = %15
  %17 = call i32 @__cxa_atexit(ptr @_ZN5sc_dt11sc_unsignedD2Ev, ptr @_ZZ11str2biguintPcE1a, ptr @__dso_handle) #0
  call void @__cxa_guard_release(ptr @_ZGVZ11str2biguintPcE1a) #0
  br label %18

18:                                               ; preds = %16, %12, %2
  call void @llvm.lifetime.start.p0(i64 16, ptr %7) #0
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #0
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #0
  store i32 0, ptr %8, align 4, !tbaa !10
  br label %19

19:                                               ; preds = %35, %18
  %20 = load i32, ptr %8, align 4, !tbaa !10
  %21 = icmp slt i32 %20, 16
  br i1 %21, label %22, label %27

22:                                               ; preds = %19
  %23 = load ptr, ptr %4, align 8, !tbaa !5
  %24 = load i8, ptr %23, align 1, !tbaa !12
  %25 = sext i8 %24 to i32
  %26 = icmp ne i32 %25, 0
  br label %27

27:                                               ; preds = %22, %19
  %28 = phi i1 [ false, %19 ], [ %26, %22 ]
  br i1 %28, label %29, label %44

29:                                               ; preds = %27
  %30 = load ptr, ptr %4, align 8, !tbaa !5
  %31 = load i8, ptr %30, align 1, !tbaa !12
  %32 = load i32, ptr %8, align 4, !tbaa !10
  %33 = sext i32 %32 to i64
  %34 = getelementptr inbounds [16 x i8], ptr %7, i64 0, i64 %33
  store i8 %31, ptr %34, align 1, !tbaa !12
  br label %35

35:                                               ; preds = %29
  %36 = load i32, ptr %8, align 4, !tbaa !10
  %37 = add nsw i32 %36, 1
  store i32 %37, ptr %8, align 4, !tbaa !10
  %38 = load ptr, ptr %4, align 8, !tbaa !5
  %39 = getelementptr inbounds i8, ptr %38, i32 1
  store ptr %39, ptr %4, align 8, !tbaa !5
  br label %19, !llvm.loop !13

40:                                               ; preds = %15
  %41 = landingpad { ptr, i32 }
          cleanup
  %42 = extractvalue { ptr, i32 } %41, 0
  store ptr %42, ptr %5, align 8
  %43 = extractvalue { ptr, i32 } %41, 1
  store i32 %43, ptr %6, align 4
  call void @__cxa_guard_abort(ptr @_ZGVZ11str2biguintPcE1a) #0
  br label %138

44:                                               ; preds = %27
  br label %45

45:                                               ; preds = %48, %44
  %46 = load i32, ptr %8, align 4, !tbaa !10
  %47 = icmp slt i32 %46, 16
  br i1 %47, label %48, label %53

48:                                               ; preds = %45
  %49 = load i32, ptr %8, align 4, !tbaa !10
  %50 = add nsw i32 %49, 1
  store i32 %50, ptr %8, align 4, !tbaa !10
  %51 = sext i32 %49 to i64
  %52 = getelementptr inbounds [16 x i8], ptr %7, i64 0, i64 %51
  store i8 32, ptr %52, align 1, !tbaa !12
  br label %45, !llvm.loop !15

53:                                               ; preds = %45
  store i32 0, ptr %8, align 4, !tbaa !10
  br label %54

54:                                               ; preds = %134, %53
  %55 = load i32, ptr %8, align 4, !tbaa !10
  %56 = icmp slt i32 %55, 16
  br i1 %56, label %57, label %137

57:                                               ; preds = %54
  %58 = load i32, ptr %8, align 4, !tbaa !10
  %59 = sext i32 %58 to i64
  %60 = getelementptr inbounds [16 x i8], ptr %7, i64 0, i64 %59
  %61 = load i8, ptr %60, align 1, !tbaa !12
  %62 = sext i8 %61 to i32
  store i32 %62, ptr %9, align 4, !tbaa !10
  %63 = load i32, ptr %9, align 4, !tbaa !10
  %64 = and i32 %63, 1
  %65 = icmp ne i32 %64, 0
  %66 = load i32, ptr %8, align 4, !tbaa !10
  %67 = mul nsw i32 %66, 8
  %68 = add nsw i32 %67, 0
  %69 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt11sc_unsignedixEi(ptr noundef nonnull align 8 dereferenceable(32) @_ZZ11str2biguintPcE1a, i32 noundef %68)
  %70 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt18sc_unsigned_bitrefaSEb(ptr noundef nonnull align 8 dereferenceable(24) %69, i1 noundef zeroext %65)
  %71 = load i32, ptr %9, align 4, !tbaa !10
  %72 = ashr i32 %71, 1
  %73 = and i32 %72, 1
  %74 = icmp ne i32 %73, 0
  %75 = load i32, ptr %8, align 4, !tbaa !10
  %76 = mul nsw i32 %75, 8
  %77 = add nsw i32 %76, 1
  %78 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt11sc_unsignedixEi(ptr noundef nonnull align 8 dereferenceable(32) @_ZZ11str2biguintPcE1a, i32 noundef %77)
  %79 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt18sc_unsigned_bitrefaSEb(ptr noundef nonnull align 8 dereferenceable(24) %78, i1 noundef zeroext %74)
  %80 = load i32, ptr %9, align 4, !tbaa !10
  %81 = ashr i32 %80, 2
  %82 = and i32 %81, 1
  %83 = icmp ne i32 %82, 0
  %84 = load i32, ptr %8, align 4, !tbaa !10
  %85 = mul nsw i32 %84, 8
  %86 = add nsw i32 %85, 2
  %87 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt11sc_unsignedixEi(ptr noundef nonnull align 8 dereferenceable(32) @_ZZ11str2biguintPcE1a, i32 noundef %86)
  %88 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt18sc_unsigned_bitrefaSEb(ptr noundef nonnull align 8 dereferenceable(24) %87, i1 noundef zeroext %83)
  %89 = load i32, ptr %9, align 4, !tbaa !10
  %90 = ashr i32 %89, 3
  %91 = and i32 %90, 1
  %92 = icmp ne i32 %91, 0
  %93 = load i32, ptr %8, align 4, !tbaa !10
  %94 = mul nsw i32 %93, 8
  %95 = add nsw i32 %94, 3
  %96 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt11sc_unsignedixEi(ptr noundef nonnull align 8 dereferenceable(32) @_ZZ11str2biguintPcE1a, i32 noundef %95)
  %97 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt18sc_unsigned_bitrefaSEb(ptr noundef nonnull align 8 dereferenceable(24) %96, i1 noundef zeroext %92)
  %98 = load i32, ptr %9, align 4, !tbaa !10
  %99 = ashr i32 %98, 4
  %100 = and i32 %99, 1
  %101 = icmp ne i32 %100, 0
  %102 = load i32, ptr %8, align 4, !tbaa !10
  %103 = mul nsw i32 %102, 8
  %104 = add nsw i32 %103, 4
  %105 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt11sc_unsignedixEi(ptr noundef nonnull align 8 dereferenceable(32) @_ZZ11str2biguintPcE1a, i32 noundef %104)
  %106 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt18sc_unsigned_bitrefaSEb(ptr noundef nonnull align 8 dereferenceable(24) %105, i1 noundef zeroext %101)
  %107 = load i32, ptr %9, align 4, !tbaa !10
  %108 = ashr i32 %107, 5
  %109 = and i32 %108, 1
  %110 = icmp ne i32 %109, 0
  %111 = load i32, ptr %8, align 4, !tbaa !10
  %112 = mul nsw i32 %111, 8
  %113 = add nsw i32 %112, 5
  %114 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt11sc_unsignedixEi(ptr noundef nonnull align 8 dereferenceable(32) @_ZZ11str2biguintPcE1a, i32 noundef %113)
  %115 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt18sc_unsigned_bitrefaSEb(ptr noundef nonnull align 8 dereferenceable(24) %114, i1 noundef zeroext %110)
  %116 = load i32, ptr %9, align 4, !tbaa !10
  %117 = ashr i32 %116, 6
  %118 = and i32 %117, 1
  %119 = icmp ne i32 %118, 0
  %120 = load i32, ptr %8, align 4, !tbaa !10
  %121 = mul nsw i32 %120, 8
  %122 = add nsw i32 %121, 6
  %123 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt11sc_unsignedixEi(ptr noundef nonnull align 8 dereferenceable(32) @_ZZ11str2biguintPcE1a, i32 noundef %122)
  %124 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt18sc_unsigned_bitrefaSEb(ptr noundef nonnull align 8 dereferenceable(24) %123, i1 noundef zeroext %119)
  %125 = load i32, ptr %9, align 4, !tbaa !10
  %126 = ashr i32 %125, 7
  %127 = and i32 %126, 1
  %128 = icmp ne i32 %127, 0
  %129 = load i32, ptr %8, align 4, !tbaa !10
  %130 = mul nsw i32 %129, 8
  %131 = add nsw i32 %130, 7
  %132 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt11sc_unsignedixEi(ptr noundef nonnull align 8 dereferenceable(32) @_ZZ11str2biguintPcE1a, i32 noundef %131)
  %133 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt18sc_unsigned_bitrefaSEb(ptr noundef nonnull align 8 dereferenceable(24) %132, i1 noundef zeroext %128)
  br label %134

134:                                              ; preds = %57
  %135 = load i32, ptr %8, align 4, !tbaa !10
  %136 = add nsw i32 %135, 1
  store i32 %136, ptr %8, align 4, !tbaa !10
  br label %54, !llvm.loop !16

137:                                              ; preds = %54
  call void @_ZN5sc_dt10sc_biguintILi128EEC2ERKS1_(ptr noundef nonnull align 8 dereferenceable(32) %0, ptr noundef nonnull align 8 dereferenceable(32) @_ZZ11str2biguintPcE1a)
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #0
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #0
  call void @llvm.lifetime.end.p0(i64 16, ptr %7) #0
  ret void

138:                                              ; preds = %40
  %139 = load ptr, ptr %5, align 8
  %140 = load i32, ptr %6, align 4
  %141 = insertvalue { ptr, i32 } poison, ptr %139, 0
  %142 = insertvalue { ptr, i32 } %141, i32 %140, 1
  resume { ptr, i32 } %142
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt10sc_biguintILi128EEC2ERKS1_(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #2 align 2

attributes #0 = { nounwind }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!"branch_weights", i32 1, i32 1048575}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{!7, !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_dt::sc_biguint" = type { %"class.sc_dt::sc_unsigned" }
%"class.sc_dt::sc_unsigned" = type { %"class.sc_dt::sc_value_base", i32, i32, i32, ptr }
%"class.sc_dt::sc_value_base" = type { ptr }

@__dso_handle = external hidden global i8
@_ZZ11str2biguintPcE1a = external hidden global %"class.sc_dt::sc_biguint", align 8
@_ZGVZ11str2biguintPcE1a = external hidden global i64, align 8

; Function Attrs: nofree nounwind
declare i32 @__cxa_atexit(ptr, ptr, ptr) local_unnamed_addr #0

; Function Attrs: nofree nounwind
declare i32 @__cxa_guard_acquire(ptr) local_unnamed_addr #0

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nofree nounwind
declare void @__cxa_guard_abort(ptr) local_unnamed_addr #0

; Function Attrs: nofree nounwind
declare void @__cxa_guard_release(ptr) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt10sc_biguintILi128EEC2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt11sc_unsignedixEi(ptr noundef nonnull align 8 dereferenceable(32), i32 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5sc_dt11sc_unsignedD2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #3 align 2

declare noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt18sc_unsigned_bitrefaSEb(ptr noundef nonnull align 8 dereferenceable(24), i1 noundef zeroext) local_unnamed_addr #4

; Function Attrs: mustprogress uwtable
define dso_local void @_Z11str2biguintPc(ptr dead_on_unwind noalias writable sret(%"class.sc_dt::sc_biguint") align 8 %0, ptr nocapture noundef readonly %1) local_unnamed_addr #2 personality ptr @__gxx_personality_v0 {
  %3 = alloca [16 x i8], align 16
  %4 = load atomic i8, ptr @_ZGVZ11str2biguintPcE1a acquire, align 8
  %5 = icmp eq i8 %4, 0
  br i1 %5, label %6, label %11, !prof !5

6:                                                ; preds = %2
  %7 = tail call i32 @__cxa_guard_acquire(ptr nonnull @_ZGVZ11str2biguintPcE1a) #6
  %.not = icmp eq i32 %7, 0
  br i1 %.not, label %11, label %8

8:                                                ; preds = %6
  invoke void @_ZN5sc_dt10sc_biguintILi128EEC2Ev(ptr noundef nonnull align 8 dereferenceable(32) @_ZZ11str2biguintPcE1a)
          to label %9 unwind label %72

9:                                                ; preds = %8
  %10 = tail call i32 @__cxa_atexit(ptr nonnull @_ZN5sc_dt11sc_unsignedD2Ev, ptr nonnull @_ZZ11str2biguintPcE1a, ptr nonnull @__dso_handle) #6
  tail call void @__cxa_guard_release(ptr nonnull @_ZGVZ11str2biguintPcE1a) #6
  br label %11

11:                                               ; preds = %9, %6, %2
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3) #6
  %12 = load i8, ptr %1, align 1, !tbaa !6
  %.not29 = icmp eq i8 %12, 0
  br i1 %.not29, label %.lr.ph.preheader, label %13

13:                                               ; preds = %11
  store i8 %12, ptr %3, align 16, !tbaa !6
  %14 = getelementptr inbounds i8, ptr %1, i64 1
  %15 = load i8, ptr %14, align 1, !tbaa !6
  %.not29.1 = icmp eq i8 %15, 0
  br i1 %.not29.1, label %.lr.ph.preheader, label %16

16:                                               ; preds = %13
  %17 = getelementptr inbounds i8, ptr %3, i64 1
  store i8 %15, ptr %17, align 1, !tbaa !6
  %18 = getelementptr inbounds i8, ptr %1, i64 2
  %19 = load i8, ptr %18, align 1, !tbaa !6
  %.not29.2 = icmp eq i8 %19, 0
  br i1 %.not29.2, label %.lr.ph.preheader, label %20

20:                                               ; preds = %16
  %21 = getelementptr inbounds i8, ptr %3, i64 2
  store i8 %19, ptr %21, align 2, !tbaa !6
  %22 = getelementptr inbounds i8, ptr %1, i64 3
  %23 = load i8, ptr %22, align 1, !tbaa !6
  %.not29.3 = icmp eq i8 %23, 0
  br i1 %.not29.3, label %.lr.ph.preheader, label %24

24:                                               ; preds = %20
  %25 = getelementptr inbounds i8, ptr %3, i64 3
  store i8 %23, ptr %25, align 1, !tbaa !6
  %26 = getelementptr inbounds i8, ptr %1, i64 4
  %27 = load i8, ptr %26, align 1, !tbaa !6
  %.not29.4 = icmp eq i8 %27, 0
  br i1 %.not29.4, label %.lr.ph.preheader, label %28

28:                                               ; preds = %24
  %29 = getelementptr inbounds i8, ptr %3, i64 4
  store i8 %27, ptr %29, align 4, !tbaa !6
  %30 = getelementptr inbounds i8, ptr %1, i64 5
  %31 = load i8, ptr %30, align 1, !tbaa !6
  %.not29.5 = icmp eq i8 %31, 0
  br i1 %.not29.5, label %.lr.ph.preheader, label %32

32:                                               ; preds = %28
  %33 = getelementptr inbounds i8, ptr %3, i64 5
  store i8 %31, ptr %33, align 1, !tbaa !6
  %34 = getelementptr inbounds i8, ptr %1, i64 6
  %35 = load i8, ptr %34, align 1, !tbaa !6
  %.not29.6 = icmp eq i8 %35, 0
  br i1 %.not29.6, label %.lr.ph.preheader, label %36

36:                                               ; preds = %32
  %37 = getelementptr inbounds i8, ptr %3, i64 6
  store i8 %35, ptr %37, align 2, !tbaa !6
  %38 = getelementptr inbounds i8, ptr %1, i64 7
  %39 = load i8, ptr %38, align 1, !tbaa !6
  %.not29.7 = icmp eq i8 %39, 0
  br i1 %.not29.7, label %.lr.ph.preheader, label %40

40:                                               ; preds = %36
  %41 = getelementptr inbounds i8, ptr %3, i64 7
  store i8 %39, ptr %41, align 1, !tbaa !6
  %42 = getelementptr inbounds i8, ptr %1, i64 8
  %43 = load i8, ptr %42, align 1, !tbaa !6
  %.not29.8 = icmp eq i8 %43, 0
  br i1 %.not29.8, label %.lr.ph.preheader, label %44

44:                                               ; preds = %40
  %45 = getelementptr inbounds i8, ptr %3, i64 8
  store i8 %43, ptr %45, align 8, !tbaa !6
  %46 = getelementptr inbounds i8, ptr %1, i64 9
  %47 = load i8, ptr %46, align 1, !tbaa !6
  %.not29.9 = icmp eq i8 %47, 0
  br i1 %.not29.9, label %.lr.ph.preheader, label %48

48:                                               ; preds = %44
  %49 = getelementptr inbounds i8, ptr %3, i64 9
  store i8 %47, ptr %49, align 1, !tbaa !6
  %50 = getelementptr inbounds i8, ptr %1, i64 10
  %51 = load i8, ptr %50, align 1, !tbaa !6
  %.not29.10 = icmp eq i8 %51, 0
  br i1 %.not29.10, label %.lr.ph.preheader, label %52

52:                                               ; preds = %48
  %53 = getelementptr inbounds i8, ptr %3, i64 10
  store i8 %51, ptr %53, align 2, !tbaa !6
  %54 = getelementptr inbounds i8, ptr %1, i64 11
  %55 = load i8, ptr %54, align 1, !tbaa !6
  %.not29.11 = icmp eq i8 %55, 0
  br i1 %.not29.11, label %.lr.ph.preheader, label %56

56:                                               ; preds = %52
  %57 = getelementptr inbounds i8, ptr %3, i64 11
  store i8 %55, ptr %57, align 1, !tbaa !6
  %58 = getelementptr inbounds i8, ptr %1, i64 12
  %59 = load i8, ptr %58, align 1, !tbaa !6
  %.not29.12 = icmp eq i8 %59, 0
  br i1 %.not29.12, label %.lr.ph.preheader, label %60

60:                                               ; preds = %56
  %61 = getelementptr inbounds i8, ptr %3, i64 12
  store i8 %59, ptr %61, align 4, !tbaa !6
  %62 = getelementptr inbounds i8, ptr %1, i64 13
  %63 = load i8, ptr %62, align 1, !tbaa !6
  %.not29.13 = icmp eq i8 %63, 0
  br i1 %.not29.13, label %.lr.ph.preheader, label %64

64:                                               ; preds = %60
  %65 = getelementptr inbounds i8, ptr %3, i64 13
  store i8 %63, ptr %65, align 1, !tbaa !6
  %66 = getelementptr inbounds i8, ptr %1, i64 14
  %67 = load i8, ptr %66, align 1, !tbaa !6
  %.not29.14 = icmp eq i8 %67, 0
  br i1 %.not29.14, label %.lr.ph.preheader, label %68

68:                                               ; preds = %64
  %69 = getelementptr inbounds i8, ptr %3, i64 14
  store i8 %67, ptr %69, align 2, !tbaa !6
  %70 = getelementptr inbounds i8, ptr %1, i64 15
  %71 = load i8, ptr %70, align 1, !tbaa !6
  %.not29.15 = icmp eq i8 %71, 0
  br i1 %.not29.15, label %.lr.ph.preheader, label %.critedge

72:                                               ; preds = %8
  %73 = landingpad { ptr, i32 }
          cleanup
  tail call void @__cxa_guard_abort(ptr nonnull @_ZGVZ11str2biguintPcE1a) #6
  resume { ptr, i32 } %73

.critedge:                                        ; preds = %68
  %74 = getelementptr inbounds i8, ptr %3, i64 15
  store i8 %71, ptr %74, align 1, !tbaa !6
  br label %.preheader.preheader

.lr.ph.preheader:                                 ; preds = %11, %13, %16, %20, %24, %28, %32, %36, %40, %44, %48, %52, %56, %60, %64, %68
  %.028.lcssa.ph = phi i32 [ 15, %68 ], [ 14, %64 ], [ 13, %60 ], [ 12, %56 ], [ 11, %52 ], [ 10, %48 ], [ 9, %44 ], [ 8, %40 ], [ 7, %36 ], [ 6, %32 ], [ 5, %28 ], [ 4, %24 ], [ 3, %20 ], [ 2, %16 ], [ 1, %13 ], [ 0, %11 ]
  %75 = zext nneg i32 %.028.lcssa.ph to i64
  %scevgep = getelementptr i8, ptr %3, i64 %75
  %narrow = sub nuw nsw i32 16, %.028.lcssa.ph
  %76 = zext nneg i32 %narrow to i64
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(1) %scevgep, i8 32, i64 %76, i1 false), !tbaa !6
  br label %.preheader.preheader

.preheader.preheader:                             ; preds = %.critedge, %.lr.ph.preheader
  br label %.preheader

.preheader:                                       ; preds = %.preheader.preheader, %.preheader
  %indvars.iv = phi i64 [ %indvars.iv.next, %.preheader ], [ 0, %.preheader.preheader ]
  %77 = getelementptr inbounds [16 x i8], ptr %3, i64 0, i64 %indvars.iv
  %78 = load i8, ptr %77, align 1, !tbaa !6
  %79 = zext i8 %78 to i32
  %80 = and i32 %79, 1
  %81 = icmp ne i32 %80, 0
  %82 = shl nuw nsw i64 %indvars.iv, 3
  %83 = trunc nuw nsw i64 %82 to i32
  %84 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt11sc_unsignedixEi(ptr noundef nonnull align 8 dereferenceable(32) @_ZZ11str2biguintPcE1a, i32 noundef %83)
  %85 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt18sc_unsigned_bitrefaSEb(ptr noundef nonnull align 8 dereferenceable(24) %84, i1 noundef zeroext %81)
  %86 = and i32 %79, 2
  %87 = icmp ne i32 %86, 0
  %88 = trunc i64 %82 to i32
  %89 = or disjoint i32 %88, 1
  %90 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt11sc_unsignedixEi(ptr noundef nonnull align 8 dereferenceable(32) @_ZZ11str2biguintPcE1a, i32 noundef %89)
  %91 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt18sc_unsigned_bitrefaSEb(ptr noundef nonnull align 8 dereferenceable(24) %90, i1 noundef zeroext %87)
  %92 = and i32 %79, 4
  %93 = icmp ne i32 %92, 0
  %94 = trunc i64 %82 to i32
  %95 = or disjoint i32 %94, 2
  %96 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt11sc_unsignedixEi(ptr noundef nonnull align 8 dereferenceable(32) @_ZZ11str2biguintPcE1a, i32 noundef %95)
  %97 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt18sc_unsigned_bitrefaSEb(ptr noundef nonnull align 8 dereferenceable(24) %96, i1 noundef zeroext %93)
  %98 = and i32 %79, 8
  %99 = icmp ne i32 %98, 0
  %100 = trunc i64 %82 to i32
  %101 = or disjoint i32 %100, 3
  %102 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt11sc_unsignedixEi(ptr noundef nonnull align 8 dereferenceable(32) @_ZZ11str2biguintPcE1a, i32 noundef %101)
  %103 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt18sc_unsigned_bitrefaSEb(ptr noundef nonnull align 8 dereferenceable(24) %102, i1 noundef zeroext %99)
  %104 = and i32 %79, 16
  %105 = icmp ne i32 %104, 0
  %106 = trunc i64 %82 to i32
  %107 = or disjoint i32 %106, 4
  %108 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt11sc_unsignedixEi(ptr noundef nonnull align 8 dereferenceable(32) @_ZZ11str2biguintPcE1a, i32 noundef %107)
  %109 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt18sc_unsigned_bitrefaSEb(ptr noundef nonnull align 8 dereferenceable(24) %108, i1 noundef zeroext %105)
  %110 = and i32 %79, 32
  %111 = icmp ne i32 %110, 0
  %112 = trunc i64 %82 to i32
  %113 = or disjoint i32 %112, 5
  %114 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt11sc_unsignedixEi(ptr noundef nonnull align 8 dereferenceable(32) @_ZZ11str2biguintPcE1a, i32 noundef %113)
  %115 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt18sc_unsigned_bitrefaSEb(ptr noundef nonnull align 8 dereferenceable(24) %114, i1 noundef zeroext %111)
  %116 = and i32 %79, 64
  %117 = icmp ne i32 %116, 0
  %118 = trunc i64 %82 to i32
  %119 = or disjoint i32 %118, 6
  %120 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt11sc_unsignedixEi(ptr noundef nonnull align 8 dereferenceable(32) @_ZZ11str2biguintPcE1a, i32 noundef %119)
  %121 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt18sc_unsigned_bitrefaSEb(ptr noundef nonnull align 8 dereferenceable(24) %120, i1 noundef zeroext %117)
  %122 = icmp slt i8 %78, 0
  %123 = trunc i64 %82 to i32
  %124 = or disjoint i32 %123, 7
  %125 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt11sc_unsignedixEi(ptr noundef nonnull align 8 dereferenceable(32) @_ZZ11str2biguintPcE1a, i32 noundef %124)
  %126 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZN5sc_dt18sc_unsigned_bitrefaSEb(ptr noundef nonnull align 8 dereferenceable(24) %125, i1 noundef zeroext %122)
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, 16
  br i1 %exitcond.not, label %127, label %.preheader, !llvm.loop !9

127:                                              ; preds = %.preheader
  tail call void @_ZN5sc_dt10sc_biguintILi128EEC2ERKS1_(ptr noundef nonnull align 8 dereferenceable(32) %0, ptr noundef nonnull align 8 dereferenceable(32) @_ZZ11str2biguintPcE1a)
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3) #6
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5sc_dt10sc_biguintILi128EEC2ERKS1_(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #2 align 2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #5

attributes #0 = { nofree nounwind }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!"branch_weights", i32 1, i32 1048575}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: BDCEPass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LoopIdiomRecognizePass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass