; LLVM IR from gem5/gem5 :: ext/systemc/src/sysc/utils (sc_hash)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sc_core::sc_phash_base" = type { ptr, i32, i32, i32, i32, double, ptr, ptr, ptr }
%"class.sc_core::sc_phash_elem" = type { ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7sc_core13sc_phash_elemD2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7sc_core13sc_phash_elemdlEPvm(ptr noundef, i64 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN7sc_core13sc_phash_base18remove_by_contentsEPFbPKvPvES3_PFvS3_E(ptr noundef nonnull align 8 dereferenceable(56) %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) #2 align 2 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  store ptr %3, ptr %8, align 8, !tbaa !5
  %13 = load ptr, ptr %5, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  store i32 0, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  store i32 0, ptr %12, align 4, !tbaa !9
  br label %14

14:                                               ; preds = %65, %4
  %15 = load i32, ptr %12, align 4, !tbaa !9
  %16 = getelementptr inbounds %"class.sc_core::sc_phash_base", ptr %13, i32 0, i32 1
  %17 = load i32, ptr %16, align 8, !tbaa !11
  %18 = icmp slt i32 %15, %17
  br i1 %18, label %20, label %19

19:                                               ; preds = %14
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  br label %68

20:                                               ; preds = %14
  %21 = getelementptr inbounds %"class.sc_core::sc_phash_base", ptr %13, i32 0, i32 6
  %22 = load ptr, ptr %21, align 8, !tbaa !14
  %23 = load i32, ptr %12, align 4, !tbaa !9
  %24 = sext i32 %23 to i64
  %25 = getelementptr inbounds ptr, ptr %22, i64 %24
  store ptr %25, ptr %9, align 8, !tbaa !5
  %26 = load ptr, ptr %9, align 8, !tbaa !5
  %27 = load ptr, ptr %26, align 8, !tbaa !5
  store ptr %27, ptr %10, align 8, !tbaa !5
  br label %28

28:                                               ; preds = %63, %20
  %29 = load ptr, ptr %10, align 8, !tbaa !5
  %30 = icmp ne ptr %29, null
  br i1 %30, label %31, label %64

31:                                               ; preds = %28
  %32 = load ptr, ptr %6, align 8, !tbaa !5
  %33 = load ptr, ptr %10, align 8, !tbaa !5
  %34 = getelementptr inbounds %"class.sc_core::sc_phash_elem", ptr %33, i32 0, i32 1
  %35 = load ptr, ptr %34, align 8, !tbaa !15
  %36 = load ptr, ptr %7, align 8, !tbaa !5
  %37 = call noundef zeroext i1 %32(ptr noundef %35, ptr noundef %36)
  br i1 %37, label %43, label %38

38:                                               ; preds = %31
  %39 = load ptr, ptr %10, align 8, !tbaa !5
  %40 = getelementptr inbounds %"class.sc_core::sc_phash_elem", ptr %39, i32 0, i32 2
  store ptr %40, ptr %9, align 8, !tbaa !5
  %41 = load ptr, ptr %9, align 8, !tbaa !5
  %42 = load ptr, ptr %41, align 8, !tbaa !5
  store ptr %42, ptr %10, align 8, !tbaa !5
  br label %63

43:                                               ; preds = %31
  %44 = load ptr, ptr %10, align 8, !tbaa !5
  %45 = getelementptr inbounds %"class.sc_core::sc_phash_elem", ptr %44, i32 0, i32 2
  %46 = load ptr, ptr %45, align 8, !tbaa !17
  %47 = load ptr, ptr %9, align 8, !tbaa !5
  store ptr %46, ptr %47, align 8, !tbaa !5
  %48 = load ptr, ptr %8, align 8, !tbaa !5
  %49 = load ptr, ptr %10, align 8, !tbaa !5
  %50 = getelementptr inbounds %"class.sc_core::sc_phash_elem", ptr %49, i32 0, i32 0
  %51 = load ptr, ptr %50, align 8, !tbaa !18
  call void %48(ptr noundef %51)
  %52 = load ptr, ptr %10, align 8, !tbaa !5
  %53 = icmp eq ptr %52, null
  br i1 %53, label %55, label %54

54:                                               ; preds = %43
  call void @_ZN7sc_core13sc_phash_elemD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %52) #3
  call void @_ZN7sc_core13sc_phash_elemdlEPvm(ptr noundef %52, i64 noundef 24) #3
  br label %55

55:                                               ; preds = %54, %43
  %56 = load ptr, ptr %9, align 8, !tbaa !5
  %57 = load ptr, ptr %56, align 8, !tbaa !5
  store ptr %57, ptr %10, align 8, !tbaa !5
  %58 = getelementptr inbounds %"class.sc_core::sc_phash_base", ptr %13, i32 0, i32 2
  %59 = load i32, ptr %58, align 4, !tbaa !19
  %60 = add nsw i32 %59, -1
  store i32 %60, ptr %58, align 4, !tbaa !19
  %61 = load i32, ptr %11, align 4, !tbaa !9
  %62 = add nsw i32 %61, 1
  store i32 %62, ptr %11, align 4, !tbaa !9
  br label %63

63:                                               ; preds = %55, %38
  br label %28, !llvm.loop !20

64:                                               ; preds = %28
  br label %65

65:                                               ; preds = %64
  %66 = load i32, ptr %12, align 4, !tbaa !9
  %67 = add nsw i32 %66, 1
  store i32 %67, ptr %12, align 4, !tbaa !9
  br label %14, !llvm.loop !22

68:                                               ; preds = %19
  %69 = load i32, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  ret i32 %69
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 8}
!12 = !{!"_ZTSN7sc_core13sc_phash_baseE", !6, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !13, i64 24, !6, i64 32, !6, i64 40, !6, i64 48}
!13 = !{!"double", !7, i64 0}
!14 = !{!12, !6, i64 32}
!15 = !{!16, !6, i64 8}
!16 = !{!"_ZTSN7sc_core13sc_phash_elemE", !6, i64 0, !6, i64 8, !6, i64 16}
!17 = !{!16, !6, i64 16}
!18 = !{!16, !6, i64 0}
!19 = !{!12, !10, i64 12}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
!22 = distinct !{!22, !21}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7sc_core13sc_phash_elemD2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7sc_core13sc_phash_elemdlEPvm(ptr noundef, i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN7sc_core13sc_phash_base18remove_by_contentsEPFbPKvPvES3_PFvS3_E(ptr nocapture noundef nonnull align 8 dereferenceable(56) %0, ptr nocapture noundef readonly %1, ptr noundef %2, ptr nocapture noundef readonly %3) local_unnamed_addr #1 align 2 {
  %5 = getelementptr inbounds i8, ptr %0, i64 8
  %6 = load i32, ptr %5, align 8, !tbaa !5
  %7 = icmp sgt i32 %6, 0
  br i1 %7, label %.lr.ph30, label %._crit_edge31

.lr.ph30:                                         ; preds = %4
  %8 = getelementptr inbounds i8, ptr %0, i64 32
  %9 = getelementptr inbounds i8, ptr %0, i64 12
  br label %10

._crit_edge31:                                    ; preds = %._crit_edge, %4
  %.018.lcssa = phi i32 [ 0, %4 ], [ %.1.lcssa, %._crit_edge ]
  ret i32 %.018.lcssa

10:                                               ; preds = %.lr.ph30, %._crit_edge
  %11 = phi i32 [ %6, %.lr.ph30 ], [ %27, %._crit_edge ]
  %indvars.iv = phi i64 [ 0, %.lr.ph30 ], [ %indvars.iv.next, %._crit_edge ]
  %.01827 = phi i32 [ 0, %.lr.ph30 ], [ %.1.lcssa, %._crit_edge ]
  %12 = load ptr, ptr %8, align 8, !tbaa !12
  %13 = getelementptr inbounds ptr, ptr %12, i64 %indvars.iv
  %14 = load ptr, ptr %13, align 8, !tbaa !13
  %.not23 = icmp eq ptr %14, null
  br i1 %.not23, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %10, %26
  %.126 = phi i32 [ %.2, %26 ], [ %.01827, %10 ]
  %.01925 = phi ptr [ %.120, %26 ], [ %14, %10 ]
  %.02124 = phi ptr [ %.122, %26 ], [ %13, %10 ]
  %15 = getelementptr inbounds i8, ptr %.01925, i64 8
  %16 = load ptr, ptr %15, align 8, !tbaa !14
  %17 = tail call noundef zeroext i1 %1(ptr noundef %16, ptr noundef %2)
  %18 = getelementptr inbounds i8, ptr %.01925, i64 16
  %19 = load ptr, ptr %18, align 8, !tbaa !13
  br i1 %17, label %20, label %26

20:                                               ; preds = %.lr.ph
  store ptr %19, ptr %.02124, align 8, !tbaa !13
  %21 = load ptr, ptr %.01925, align 8, !tbaa !16
  tail call void %3(ptr noundef %21)
  tail call void @_ZN7sc_core13sc_phash_elemD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %.01925) #2
  tail call void @_ZN7sc_core13sc_phash_elemdlEPvm(ptr noundef nonnull %.01925, i64 noundef 24) #2
  %22 = load ptr, ptr %.02124, align 8, !tbaa !13
  %23 = load i32, ptr %9, align 4, !tbaa !17
  %24 = add nsw i32 %23, -1
  store i32 %24, ptr %9, align 4, !tbaa !17
  %25 = add nsw i32 %.126, 1
  br label %26

26:                                               ; preds = %.lr.ph, %20
  %.122 = phi ptr [ %.02124, %20 ], [ %18, %.lr.ph ]
  %.120 = phi ptr [ %22, %20 ], [ %19, %.lr.ph ]
  %.2 = phi i32 [ %25, %20 ], [ %.126, %.lr.ph ]
  %.not = icmp eq ptr %.120, null
  br i1 %.not, label %._crit_edge.loopexit, label %.lr.ph, !llvm.loop !18

._crit_edge.loopexit:                             ; preds = %26
  %.pre = load i32, ptr %5, align 8, !tbaa !5
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %10
  %27 = phi i32 [ %11, %10 ], [ %.pre, %._crit_edge.loopexit ]
  %.1.lcssa = phi i32 [ %.01827, %10 ], [ %.2, %._crit_edge.loopexit ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %28 = sext i32 %27 to i64
  %29 = icmp slt i64 %indvars.iv.next, %28
  br i1 %29, label %10, label %._crit_edge31, !llvm.loop !20
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"_ZTSN7sc_core13sc_phash_baseE", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !11, i64 24, !7, i64 32, !7, i64 40, !7, i64 48}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"double", !8, i64 0}
!12 = !{!6, !7, i64 32}
!13 = !{!7, !7, i64 0}
!14 = !{!15, !7, i64 8}
!15 = !{!"_ZTSN7sc_core13sc_phash_elemE", !7, i64 0, !7, i64 8, !7, i64 16}
!16 = !{!15, !7, i64 0}
!17 = !{!6, !10, i64 12}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
!20 = distinct !{!20, !19}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass