; LLVM IR from mitdbg/deneva :: system/sim_manager.ll (ZN10SimManager7is_doneEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.SimManager = type { i8, i8, i64, i8, i8, i64, i64, i64, i64, i64, i64, i64, i64, i64 }

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZN10SimManager7timeoutEv(ptr noundef nonnull align 8 dereferenceable(96)) #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN10SimManager7is_doneEv(ptr noundef nonnull align 8 dereferenceable(96) %0) #0 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca i8, align 1
  store ptr %0, ptr %2, align 8, !tbaa !5
  %4 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 1, ptr %3) #2
  %5 = getelementptr inbounds %class.SimManager, ptr %4, i32 0, i32 4
  %6 = load volatile i8, ptr %5, align 1, !tbaa !9, !range !13, !noundef !14
  %7 = trunc i8 %6 to i1
  br i1 %7, label %10, label %8

8:                                                ; preds = %1
  %9 = call noundef zeroext i1 @_ZN10SimManager7timeoutEv(ptr noundef nonnull align 8 dereferenceable(96) %4)
  br label %10

10:                                               ; preds = %8, %1
  %11 = phi i1 [ true, %1 ], [ %9, %8 ]
  %12 = zext i1 %11 to i8
  store i8 %12, ptr %3, align 1, !tbaa !15
  %13 = load i8, ptr %3, align 1, !tbaa !15, !range !13, !noundef !14
  %14 = trunc i8 %13 to i1
  br i1 %14, label %15, label %20

15:                                               ; preds = %10
  %16 = getelementptr inbounds %class.SimManager, ptr %4, i32 0, i32 4
  %17 = load volatile i8, ptr %16, align 1, !tbaa !9, !range !13, !noundef !14
  %18 = trunc i8 %17 to i1
  br i1 %18, label %20, label %19

19:                                               ; preds = %15
  call void @_ZN10SimManager8set_doneEv(ptr noundef nonnull align 8 dereferenceable(96) %4)
  br label %20

20:                                               ; preds = %19, %15, %10
  %21 = load i8, ptr %3, align 1, !tbaa !15, !range !13, !noundef !14
  %22 = trunc i8 %21 to i1
  call void @llvm.lifetime.end.p0(i64 1, ptr %3) #2
  ret i1 %22
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN10SimManager8set_doneEv(ptr noundef nonnull align 8 dereferenceable(96)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 17}
!10 = !{!"_ZTS10SimManager", !11, i64 0, !11, i64 1, !12, i64 8, !11, i64 16, !11, i64 17, !12, i64 24, !12, i64 32, !12, i64 40, !12, i64 48, !12, i64 56, !12, i64 64, !12, i64 72, !12, i64 80, !12, i64 88}
!11 = !{!"bool", !7, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{i8 0, i8 2}
!14 = !{}
!15 = !{!11, !11, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZN10SimManager7timeoutEv(ptr noundef nonnull align 8 dereferenceable(96)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN10SimManager7is_doneEv(ptr noundef nonnull align 8 dereferenceable(96) %0) local_unnamed_addr #0 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 17
  %3 = load volatile i8, ptr %2, align 1, !tbaa !5, !range !11, !noundef !12
  %4 = trunc nuw i8 %3 to i1
  br i1 %4, label %.thread, label %5

5:                                                ; preds = %1
  %6 = tail call noundef zeroext i1 @_ZN10SimManager7timeoutEv(ptr noundef nonnull align 8 dereferenceable(96) %0)
  br i1 %6, label %.thread, label %10

.thread:                                          ; preds = %1, %5
  %7 = load volatile i8, ptr %2, align 1, !tbaa !5, !range !11, !noundef !12
  %8 = trunc nuw i8 %7 to i1
  br i1 %8, label %10, label %9

9:                                                ; preds = %.thread
  tail call void @_ZN10SimManager8set_doneEv(ptr noundef nonnull align 8 dereferenceable(96) %0)
  br label %10

10:                                               ; preds = %9, %.thread, %5
  %11 = phi i1 [ true, %9 ], [ true, %.thread ], [ false, %5 ]
  ret i1 %11
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN10SimManager8set_doneEv(ptr noundef nonnull align 8 dereferenceable(96)) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 17}
!6 = !{!"_ZTS10SimManager", !7, i64 0, !7, i64 1, !10, i64 8, !7, i64 16, !7, i64 17, !10, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !10, i64 56, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88}
!7 = !{!"bool", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{i8 0, i8 2}
!12 = !{}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,SROAPass,TailCallElimPass