; LLVM IR from tangjz/acm-icpc :: codeforces/complete/756F.ll (Z3geniiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::pair" = type { i32, i32 }

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z7mod_invi(i32 noundef) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7mod_powii(i32 noundef, i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt4pairIiiEC2IiiTnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS3_S4_EEEbE4typeELb1EEEOS3_OS4_(ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local i64 @_Z3geniiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #0 {
  %6 = alloca %"struct.std::pair", align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  store i32 %0, ptr %7, align 4, !tbaa !5
  store i32 %1, ptr %8, align 4, !tbaa !5
  store i32 %2, ptr %9, align 4, !tbaa !5
  store i32 %3, ptr %10, align 4, !tbaa !5
  store i32 %4, ptr %11, align 4, !tbaa !5
  %17 = load i32, ptr %11, align 4, !tbaa !5
  %18 = icmp eq i32 %17, 1
  br i1 %18, label %19, label %33

19:                                               ; preds = %5
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %20 = load i32, ptr %7, align 4, !tbaa !5
  %21 = load i32, ptr %8, align 4, !tbaa !5
  %22 = add nsw i32 %20, %21
  %23 = sext i32 %22 to i64
  %24 = sub nsw i64 %23, 1
  %25 = load i32, ptr %8, align 4, !tbaa !5
  %26 = load i32, ptr %7, align 4, !tbaa !5
  %27 = sub nsw i32 %25, %26
  %28 = sext i32 %27 to i64
  %29 = mul nsw i64 %24, %28
  %30 = ashr i64 %29, 1
  %31 = srem i64 %30, 1000000007
  %32 = trunc i64 %31 to i32
  store i32 %32, ptr %12, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  store i32 1, ptr %13, align 4, !tbaa !5
  call void @_ZNSt4pairIiiEC2IiiTnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS3_S4_EEEbE4typeELb1EEEOS3_OS4_(ptr noundef nonnull align 4 dereferenceable(8) %6, ptr noundef nonnull align 4 dereferenceable(4) %12, ptr noundef nonnull align 4 dereferenceable(4) %13)
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  br label %81

33:                                               ; preds = %5
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  %34 = load i32, ptr %11, align 4, !tbaa !5
  %35 = sub nsw i32 %34, 1
  %36 = call noundef i32 @_Z7mod_invi(i32 noundef %35)
  store i32 %36, ptr %14, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  %37 = load i32, ptr %11, align 4, !tbaa !5
  %38 = load i32, ptr %9, align 4, !tbaa !5
  %39 = load i32, ptr %10, align 4, !tbaa !5
  %40 = icmp slt i32 %38, %39
  br i1 %40, label %41, label %45

41:                                               ; preds = %33
  %42 = load i32, ptr %10, align 4, !tbaa !5
  %43 = load i32, ptr %9, align 4, !tbaa !5
  %44 = sub nsw i32 %42, %43
  br label %51

45:                                               ; preds = %33
  %46 = load i32, ptr %10, align 4, !tbaa !5
  %47 = load i32, ptr %9, align 4, !tbaa !5
  %48 = sub nsw i32 %46, %47
  %49 = add nsw i32 %48, 1000000007
  %50 = sub nsw i32 %49, 1
  br label %51

51:                                               ; preds = %45, %41
  %52 = phi i32 [ %44, %41 ], [ %50, %45 ]
  %53 = call noundef i32 @_Z7mod_powii(i32 noundef %37, i32 noundef %52)
  store i32 %53, ptr %15, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #3
  %54 = load i32, ptr %7, align 4, !tbaa !5
  %55 = sext i32 %54 to i64
  %56 = load i32, ptr %15, align 4, !tbaa !5
  %57 = sext i32 %56 to i64
  %58 = mul nsw i64 %55, %57
  %59 = load i32, ptr %8, align 4, !tbaa !5
  %60 = sext i32 %59 to i64
  %61 = sub nsw i64 %58, %60
  %62 = load i32, ptr %15, align 4, !tbaa !5
  %63 = sext i32 %62 to i64
  %64 = sub nsw i64 %63, 1
  %65 = load i32, ptr %14, align 4, !tbaa !5
  %66 = sext i32 %65 to i64
  %67 = mul nsw i64 %64, %66
  %68 = add nsw i64 %61, %67
  %69 = srem i64 %68, 1000000007
  %70 = load i32, ptr %14, align 4, !tbaa !5
  %71 = sext i32 %70 to i64
  %72 = mul nsw i64 %69, %71
  %73 = srem i64 %72, 1000000007
  %74 = trunc i64 %73 to i32
  store i32 %74, ptr %16, align 4, !tbaa !5
  %75 = load i32, ptr %16, align 4, !tbaa !5
  %76 = icmp slt i32 %75, 0
  br i1 %76, label %77, label %80

77:                                               ; preds = %51
  %78 = load i32, ptr %16, align 4, !tbaa !5
  %79 = add nsw i32 %78, 1000000007
  store i32 %79, ptr %16, align 4, !tbaa !5
  br label %80

80:                                               ; preds = %77, %51
  call void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %6, ptr noundef nonnull align 4 dereferenceable(4) %16, ptr noundef nonnull align 4 dereferenceable(4) %15)
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  br label %81

81:                                               ; preds = %80, %19
  %82 = load i64, ptr %6, align 4
  ret i64 %82
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::pair" = type { i32, i32 }

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z7mod_invi(i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7mod_powii(i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt4pairIiiEC2IiiTnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS3_S4_EEEbE4typeELb1EEEOS3_OS4_(ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local i64 @_Z3geniiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #0 {
  %6 = alloca %"struct.std::pair", align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = icmp eq i32 %4, 1
  br i1 %11, label %12, label %22

12:                                               ; preds = %5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #3
  %13 = add nsw i32 %1, %0
  %14 = sext i32 %13 to i64
  %15 = add nsw i64 %14, -1
  %16 = sub nsw i32 %1, %0
  %17 = sext i32 %16 to i64
  %18 = mul nsw i64 %15, %17
  %19 = ashr i64 %18, 1
  %20 = srem i64 %19, 1000000007
  %21 = trunc nsw i64 %20 to i32
  store i32 %21, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8) #3
  store i32 1, ptr %8, align 4, !tbaa !5
  call void @_ZNSt4pairIiiEC2IiiTnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS3_S4_EEEbE4typeELb1EEEOS3_OS4_(ptr noundef nonnull align 4 dereferenceable(8) %6, ptr noundef nonnull align 4 dereferenceable(4) %7, ptr noundef nonnull align 4 dereferenceable(4) %8)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #3
  br label %45

22:                                               ; preds = %5
  %23 = add nsw i32 %4, -1
  %24 = tail call noundef i32 @_Z7mod_invi(i32 noundef %23)
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %9) #3
  %25 = icmp slt i32 %2, %3
  %26 = sub nsw i32 %3, %2
  %27 = add nsw i32 %26, 1000000006
  %28 = select i1 %25, i32 %26, i32 %27
  %29 = tail call noundef i32 @_Z7mod_powii(i32 noundef %4, i32 noundef %28)
  store i32 %29, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %10) #3
  %30 = sext i32 %0 to i64
  %31 = sext i32 %29 to i64
  %32 = mul nsw i64 %31, %30
  %33 = sext i32 %1 to i64
  %34 = sub nsw i64 %32, %33
  %35 = add nsw i64 %31, -1
  %36 = sext i32 %24 to i64
  %37 = mul nsw i64 %35, %36
  %38 = add nsw i64 %34, %37
  %39 = srem i64 %38, 1000000007
  %40 = mul nsw i64 %39, %36
  %41 = srem i64 %40, 1000000007
  %42 = trunc nsw i64 %41 to i32
  %43 = icmp slt i64 %41, 0
  %44 = add nsw i32 %42, 1000000007
  %storemerge = select i1 %43, i32 %44, i32 %42
  store i32 %storemerge, ptr %10, align 4, !tbaa !5
  call void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %6, ptr noundef nonnull align 4 dereferenceable(4) %10, ptr noundef nonnull align 4 dereferenceable(4) %9)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %9) #3
  br label %45

45:                                               ; preds = %22, %12
  %46 = load i64, ptr %6, align 8
  ret i64 %46
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass