; LLVM IR from tangjz/acm-icpc :: lydsy/2993.ll (Z7seg_sftiiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Segment = type { [3 x i32], i32 }

@seg = external dso_local global [600003 x %struct.Segment], align 16

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z6seg_upR7SegmentRKS_S2_(ptr noundef nonnull align 4 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(16)) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z8seg_downR7SegmentS0_S0_(ptr noundef nonnull align 4 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(16)) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7Segment5shiftERKi(ptr noundef nonnull align 4 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(4)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7seg_idxii(i32 noundef, i32 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z7seg_sftiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #1 {
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  store i32 %0, ptr %6, align 4, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !5
  store i32 %4, ptr %10, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  %17 = load i32, ptr %6, align 4, !tbaa !5
  %18 = load i32, ptr %7, align 4, !tbaa !5
  %19 = call noundef i32 @_Z7seg_idxii(i32 noundef %17, i32 noundef %18)
  store i32 %19, ptr %11, align 4, !tbaa !5
  %20 = load i32, ptr %8, align 4, !tbaa !5
  %21 = load i32, ptr %6, align 4, !tbaa !5
  %22 = icmp sle i32 %20, %21
  br i1 %22, label %23, label %31

23:                                               ; preds = %5
  %24 = load i32, ptr %7, align 4, !tbaa !5
  %25 = load i32, ptr %9, align 4, !tbaa !5
  %26 = icmp sle i32 %24, %25
  br i1 %26, label %27, label %31

27:                                               ; preds = %23
  %28 = load i32, ptr %11, align 4, !tbaa !5
  %29 = sext i32 %28 to i64
  %30 = getelementptr inbounds [600003 x %struct.Segment], ptr @seg, i64 0, i64 %29
  call void @_ZN7Segment5shiftERKi(ptr noundef nonnull align 4 dereferenceable(16) %30, ptr noundef nonnull align 4 dereferenceable(4) %10)
  store i32 1, ptr %12, align 4
  br label %82

31:                                               ; preds = %23, %5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  store i32 0, ptr %13, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #4
  %32 = load i32, ptr %6, align 4, !tbaa !5
  %33 = load i32, ptr %7, align 4, !tbaa !5
  %34 = add nsw i32 %32, %33
  %35 = ashr i32 %34, 1
  store i32 %35, ptr %14, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #4
  %36 = load i32, ptr %6, align 4, !tbaa !5
  %37 = load i32, ptr %14, align 4, !tbaa !5
  %38 = call noundef i32 @_Z7seg_idxii(i32 noundef %36, i32 noundef %37)
  store i32 %38, ptr %15, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #4
  %39 = load i32, ptr %14, align 4, !tbaa !5
  %40 = add nsw i32 %39, 1
  %41 = load i32, ptr %7, align 4, !tbaa !5
  %42 = call noundef i32 @_Z7seg_idxii(i32 noundef %40, i32 noundef %41)
  store i32 %42, ptr %16, align 4, !tbaa !5
  %43 = load i32, ptr %11, align 4, !tbaa !5
  %44 = sext i32 %43 to i64
  %45 = getelementptr inbounds [600003 x %struct.Segment], ptr @seg, i64 0, i64 %44
  %46 = load i32, ptr %15, align 4, !tbaa !5
  %47 = sext i32 %46 to i64
  %48 = getelementptr inbounds [600003 x %struct.Segment], ptr @seg, i64 0, i64 %47
  %49 = load i32, ptr %16, align 4, !tbaa !5
  %50 = sext i32 %49 to i64
  %51 = getelementptr inbounds [600003 x %struct.Segment], ptr @seg, i64 0, i64 %50
  call void @_Z8seg_downR7SegmentS0_S0_(ptr noundef nonnull align 4 dereferenceable(16) %45, ptr noundef nonnull align 4 dereferenceable(16) %48, ptr noundef nonnull align 4 dereferenceable(16) %51)
  %52 = load i32, ptr %8, align 4, !tbaa !5
  %53 = load i32, ptr %14, align 4, !tbaa !5
  %54 = icmp sle i32 %52, %53
  br i1 %54, label %55, label %61

55:                                               ; preds = %31
  %56 = load i32, ptr %6, align 4, !tbaa !5
  %57 = load i32, ptr %14, align 4, !tbaa !5
  %58 = load i32, ptr %8, align 4, !tbaa !5
  %59 = load i32, ptr %9, align 4, !tbaa !5
  %60 = load i32, ptr %10, align 4, !tbaa !5
  call void @_Z7seg_sftiiiii(i32 noundef %56, i32 noundef %57, i32 noundef %58, i32 noundef %59, i32 noundef %60)
  br label %61

61:                                               ; preds = %55, %31
  %62 = load i32, ptr %9, align 4, !tbaa !5
  %63 = load i32, ptr %14, align 4, !tbaa !5
  %64 = icmp sgt i32 %62, %63
  br i1 %64, label %65, label %72

65:                                               ; preds = %61
  %66 = load i32, ptr %14, align 4, !tbaa !5
  %67 = add nsw i32 %66, 1
  %68 = load i32, ptr %7, align 4, !tbaa !5
  %69 = load i32, ptr %8, align 4, !tbaa !5
  %70 = load i32, ptr %9, align 4, !tbaa !5
  %71 = load i32, ptr %10, align 4, !tbaa !5
  call void @_Z7seg_sftiiiii(i32 noundef %67, i32 noundef %68, i32 noundef %69, i32 noundef %70, i32 noundef %71)
  br label %72

72:                                               ; preds = %65, %61
  %73 = load i32, ptr %11, align 4, !tbaa !5
  %74 = sext i32 %73 to i64
  %75 = getelementptr inbounds [600003 x %struct.Segment], ptr @seg, i64 0, i64 %74
  %76 = load i32, ptr %15, align 4, !tbaa !5
  %77 = sext i32 %76 to i64
  %78 = getelementptr inbounds [600003 x %struct.Segment], ptr @seg, i64 0, i64 %77
  %79 = load i32, ptr %16, align 4, !tbaa !5
  %80 = sext i32 %79 to i64
  %81 = getelementptr inbounds [600003 x %struct.Segment], ptr @seg, i64 0, i64 %80
  call void @_Z6seg_upR7SegmentRKS_S2_(ptr noundef nonnull align 4 dereferenceable(16) %75, ptr noundef nonnull align 4 dereferenceable(16) %78, ptr noundef nonnull align 4 dereferenceable(16) %81)
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  store i32 0, ptr %12, align 4
  br label %82

82:                                               ; preds = %72, %27
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  %83 = load i32, ptr %12, align 4
  switch i32 %83, label %85 [
    i32 0, label %84
    i32 1, label %84
  ]

84:                                               ; preds = %82, %82
  ret void

85:                                               ; preds = %82
  unreachable
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Segment = type { [3 x i32], i32 }

@seg = external dso_local global [600003 x %struct.Segment], align 16

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z6seg_upR7SegmentRKS_S2_(ptr noundef nonnull align 4 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(16)) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z8seg_downR7SegmentS0_S0_(ptr noundef nonnull align 4 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(16)) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7Segment5shiftERKi(ptr noundef nonnull align 4 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7seg_idxii(i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z7seg_sftiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #1 {
  %6 = alloca i32, align 4
  store i32 %4, ptr %6, align 4, !tbaa !5
  %7 = tail call noundef i32 @_Z7seg_idxii(i32 noundef %0, i32 noundef %1)
  %.not = icmp sgt i32 %2, %0
  %.not33 = icmp sgt i32 %1, %3
  %or.cond = or i1 %.not, %.not33
  br i1 %or.cond, label %11, label %8

8:                                                ; preds = %5
  %9 = sext i32 %7 to i64
  %10 = getelementptr inbounds [600003 x %struct.Segment], ptr @seg, i64 0, i64 %9
  call void @_ZN7Segment5shiftERKi(ptr noundef nonnull align 4 dereferenceable(16) %10, ptr noundef nonnull align 4 dereferenceable(4) %6)
  br label %28

11:                                               ; preds = %5
  %12 = add nsw i32 %1, %0
  %13 = ashr i32 %12, 1
  %14 = tail call noundef i32 @_Z7seg_idxii(i32 noundef %0, i32 noundef %13)
  %15 = add nsw i32 %13, 1
  %16 = tail call noundef i32 @_Z7seg_idxii(i32 noundef %15, i32 noundef %1)
  %17 = sext i32 %7 to i64
  %18 = getelementptr inbounds [600003 x %struct.Segment], ptr @seg, i64 0, i64 %17
  %19 = sext i32 %14 to i64
  %20 = getelementptr inbounds [600003 x %struct.Segment], ptr @seg, i64 0, i64 %19
  %21 = sext i32 %16 to i64
  %22 = getelementptr inbounds [600003 x %struct.Segment], ptr @seg, i64 0, i64 %21
  tail call void @_Z8seg_downR7SegmentS0_S0_(ptr noundef nonnull align 4 dereferenceable(16) %18, ptr noundef nonnull align 4 dereferenceable(16) %20, ptr noundef nonnull align 4 dereferenceable(16) %22)
  %.not34 = icmp slt i32 %13, %2
  br i1 %.not34, label %24, label %23

23:                                               ; preds = %11
  tail call void @_Z7seg_sftiiiii(i32 noundef %0, i32 noundef %13, i32 noundef %2, i32 noundef %3, i32 noundef %4)
  br label %24

24:                                               ; preds = %23, %11
  %25 = icmp slt i32 %13, %3
  br i1 %25, label %26, label %27

26:                                               ; preds = %24
  tail call void @_Z7seg_sftiiiii(i32 noundef %15, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4)
  br label %27

27:                                               ; preds = %26, %24
  tail call void @_Z6seg_upR7SegmentRKS_S2_(ptr noundef nonnull align 4 dereferenceable(16) %18, ptr noundef nonnull align 4 dereferenceable(16) %20, ptr noundef nonnull align 4 dereferenceable(16) %22)
  br label %28

28:                                               ; preds = %27, %8
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass