; LLVM IR from Yinxiaoli/iros2015_folding :: src/folding_planner_cmake/lib/blackbill/thread (thread)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class._BlackBill::_Thread::CThread" = type { %class.event, ptr }
%class.event = type { %class.delegator_chain }
%class.delegator_chain = type { ptr, %"class.std::vector" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<delegator<void>, std::allocator<delegator<void>>>::_Vector_impl" }
%"struct.std::_Vector_base<delegator<void>, std::allocator<delegator<void>>>::_Vector_impl" = type { %"struct.std::_Vector_base<delegator<void>, std::allocator<delegator<void>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<delegator<void>, std::allocator<delegator<void>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5eventI8NullTypeS0_S0_S0_S0_ED2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN10_BlackBill7_Thread7CThreadD2Ev(ptr noundef nonnull align 8 dereferenceable(40) %0) unnamed_addr #2 align 2 {
  %2 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %3 = load ptr, ptr %2, align 8
  %4 = getelementptr inbounds %"class._BlackBill::_Thread::CThread", ptr %3, i32 0, i32 1
  %5 = load ptr, ptr %4, align 8, !tbaa !9
  %6 = icmp eq ptr %5, null
  br i1 %6, label %8, label %7

7:                                                ; preds = %1
  call void @_ZN10_BlackBill7_Thread11CThreadImplD1Ev(ptr noundef nonnull align 8 dereferenceable(8) %5) #4
  call void @_ZdlPvm(ptr noundef %5, i64 noundef 8) #5
  br label %8

8:                                                ; preds = %7, %1
  %9 = getelementptr inbounds %"class._BlackBill::_Thread::CThread", ptr %3, i32 0, i32 1
  store ptr null, ptr %9, align 8, !tbaa !9
  %10 = getelementptr inbounds %"class._BlackBill::_Thread::CThread", ptr %3, i32 0, i32 0
  call void @_ZN5eventI8NullTypeS0_S0_S0_S0_ED2Ev(ptr noundef nonnull align 8 dereferenceable(32) %10) #4
  ret void
}

; Function Attrs: nounwind
declare void @_ZN10_BlackBill7_Thread11CThreadImplD1Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #3

attributes #0 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 32}
!10 = !{!"_ZTSN10_BlackBill7_Thread7CThreadE", !11, i64 0, !6, i64 32}
!11 = !{!"_ZTS5eventI8NullTypeS0_S0_S0_S0_E", !12, i64 0}
!12 = !{!"_ZTS15delegator_chainIv8NullTypeS0_S0_S0_S0_E", !13, i64 8}
!13 = !{!"_ZTSSt6vectorI9delegatorIv8NullTypeS1_S1_S1_S1_S1_ESaIS2_EE", !14, i64 0}
!14 = !{!"_ZTSSt12_Vector_baseI9delegatorIv8NullTypeS1_S1_S1_S1_S1_ESaIS2_EE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseI9delegatorIv8NullTypeS1_S1_S1_S1_S1_ESaIS2_EE12_Vector_implE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseI9delegatorIv8NullTypeS1_S1_S1_S1_S1_ESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5eventI8NullTypeS0_S0_S0_S0_ED2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN10_BlackBill7_Thread7CThreadD2Ev(ptr noundef nonnull align 8 dereferenceable(40) %0) unnamed_addr #2 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 32
  %3 = load ptr, ptr %2, align 8, !tbaa !5
  %4 = icmp eq ptr %3, null
  br i1 %4, label %6, label %5

5:                                                ; preds = %1
  tail call void @_ZN10_BlackBill7_Thread11CThreadImplD1Ev(ptr noundef nonnull align 8 dereferenceable(8) %3) #4
  tail call void @_ZdlPvm(ptr noundef nonnull %3, i64 noundef 8) #5
  br label %6

6:                                                ; preds = %5, %1
  store ptr null, ptr %2, align 8, !tbaa !5
  tail call void @_ZN5eventI8NullTypeS0_S0_S0_S0_ED2Ev(ptr noundef nonnull align 8 dereferenceable(32) %0) #4
  ret void
}

; Function Attrs: nounwind
declare void @_ZN10_BlackBill7_Thread11CThreadImplD1Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #3

attributes #0 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !13, i64 32}
!6 = !{!"_ZTSN10_BlackBill7_Thread7CThreadE", !7, i64 0, !13, i64 32}
!7 = !{!"_ZTS5eventI8NullTypeS0_S0_S0_S0_E", !8, i64 0}
!8 = !{!"_ZTS15delegator_chainIv8NullTypeS0_S0_S0_S0_E", !9, i64 8}
!9 = !{!"_ZTSSt6vectorI9delegatorIv8NullTypeS1_S1_S1_S1_S1_ESaIS2_EE", !10, i64 0}
!10 = !{!"_ZTSSt12_Vector_baseI9delegatorIv8NullTypeS1_S1_S1_S1_S1_ESaIS2_EE", !11, i64 0}
!11 = !{!"_ZTSNSt12_Vector_baseI9delegatorIv8NullTypeS1_S1_S1_S1_S1_ESaIS2_EE12_Vector_implE", !12, i64 0}
!12 = !{!"_ZTSNSt12_Vector_baseI9delegatorIv8NullTypeS1_S1_S1_S1_S1_ESaIS2_EE17_Vector_impl_dataE", !13, i64 0, !13, i64 8, !13, i64 16}
!13 = !{!"any pointer", !14, i64 0}
!14 = !{!"omnipotent char", !15, i64 0}
!15 = !{!"Simple C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InstCombinePass,SROAPass,TailCallElimPass