; LLVM IR from mwarning/KadNode :: src (kad)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.gconf_t = type { i64, i64, ptr, ptr, ptr, ptr, ptr, i8, i8, i32, i32, i32, i32, ptr, i8, [8 x i8], i64, i64, i64, [8 x i32], [8 x i32] }

@gconf = external global ptr, align 8
@.str.68 = external hidden unnamed_addr constant [4 x i8], align 1
@.str.69 = external hidden unnamed_addr constant [8 x i8], align 1
@g_dht_socket4 = external hidden global i32, align 4
@.str.70 = external hidden unnamed_addr constant [3 x i8], align 1
@g_dht_socket6 = external hidden global i32, align 4
@.str.71 = external hidden unnamed_addr constant [5 x i8], align 1
@.str.72 = external hidden unnamed_addr constant [35 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @dht_init(i32 noundef, i32 noundef, ptr noundef, ptr noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local void @dht_handler(i32 noundef, i32 noundef) #1

declare void @log_print(i32 noundef, ptr noundef, ...) #2

declare zeroext i1 @bytes_random(ptr noundef, i64 noundef) #2

; Function Attrs: nounwind uwtable
define dso_local zeroext i1 @kad_setup() #1 {
  %1 = alloca i1, align 1
  %2 = alloca [20 x i8], align 16
  %3 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 20, ptr %2) #3
  %4 = getelementptr inbounds [20 x i8], ptr %2, i64 0, i64 0
  %5 = call zeroext i1 @bytes_random(ptr noundef %4, i64 noundef 20)
  %6 = load ptr, ptr @gconf, align 8, !tbaa !5
  %7 = getelementptr inbounds %struct.gconf_t, ptr %6, i32 0, i32 12
  %8 = load i32, ptr %7, align 8, !tbaa !9
  %9 = load ptr, ptr @gconf, align 8, !tbaa !5
  %10 = getelementptr inbounds %struct.gconf_t, ptr %9, i32 0, i32 13
  %11 = load ptr, ptr %10, align 8, !tbaa !14
  %12 = call i32 @net_bind(ptr noundef @.str.68, ptr noundef @.str.69, i32 noundef %8, ptr noundef %11, i32 noundef 17)
  store i32 %12, ptr @g_dht_socket4, align 4, !tbaa !15
  %13 = load ptr, ptr @gconf, align 8, !tbaa !5
  %14 = getelementptr inbounds %struct.gconf_t, ptr %13, i32 0, i32 12
  %15 = load i32, ptr %14, align 8, !tbaa !9
  %16 = load ptr, ptr @gconf, align 8, !tbaa !5
  %17 = getelementptr inbounds %struct.gconf_t, ptr %16, i32 0, i32 13
  %18 = load ptr, ptr %17, align 8, !tbaa !14
  %19 = call i32 @net_bind(ptr noundef @.str.68, ptr noundef @.str.70, i32 noundef %15, ptr noundef %18, i32 noundef 17)
  store i32 %19, ptr @g_dht_socket6, align 4, !tbaa !15
  %20 = load i32, ptr @g_dht_socket4, align 4, !tbaa !15
  %21 = icmp sge i32 %20, 0
  br i1 %21, label %22, label %24

22:                                               ; preds = %0
  %23 = load i32, ptr @g_dht_socket4, align 4, !tbaa !15
  call void @net_add_handler(i32 noundef %23, ptr noundef @dht_handler)
  br label %24

24:                                               ; preds = %22, %0
  %25 = load i32, ptr @g_dht_socket6, align 4, !tbaa !15
  %26 = icmp sge i32 %25, 0
  br i1 %26, label %27, label %29

27:                                               ; preds = %24
  %28 = load i32, ptr @g_dht_socket6, align 4, !tbaa !15
  call void @net_add_handler(i32 noundef %28, ptr noundef @dht_handler)
  br label %29

29:                                               ; preds = %27, %24
  %30 = load i32, ptr @g_dht_socket4, align 4, !tbaa !15
  %31 = icmp slt i32 %30, 0
  br i1 %31, label %32, label %36

32:                                               ; preds = %29
  %33 = load i32, ptr @g_dht_socket6, align 4, !tbaa !15
  %34 = icmp slt i32 %33, 0
  br i1 %34, label %35, label %36

35:                                               ; preds = %32
  store i1 false, ptr %1, align 1
  store i32 1, ptr %3, align 4
  br label %44

36:                                               ; preds = %32, %29
  %37 = load i32, ptr @g_dht_socket4, align 4, !tbaa !15
  %38 = load i32, ptr @g_dht_socket6, align 4, !tbaa !15
  %39 = getelementptr inbounds [20 x i8], ptr %2, i64 0, i64 0
  %40 = call i32 @dht_init(i32 noundef %37, i32 noundef %38, ptr noundef %39, ptr noundef @.str.71)
  %41 = icmp slt i32 %40, 0
  br i1 %41, label %42, label %43

42:                                               ; preds = %36
  call void (i32, ptr, ...) @log_print(i32 noundef 3, ptr noundef @.str.72)
  store i1 false, ptr %1, align 1
  store i32 1, ptr %3, align 4
  br label %44

43:                                               ; preds = %36
  store i1 true, ptr %1, align 1
  store i32 1, ptr %3, align 4
  br label %44

44:                                               ; preds = %43, %42, %35
  call void @llvm.lifetime.end.p0(i64 20, ptr %2) #3
  %45 = load i1, ptr %1, align 1
  ret i1 %45
}

declare i32 @net_bind(ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) #2

declare void @net_add_handler(i32 noundef, ptr noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !13, i64 72}
!10 = !{!"gconf_t", !11, i64 0, !11, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !12, i64 56, !12, i64 57, !13, i64 60, !13, i64 64, !13, i64 68, !13, i64 72, !6, i64 80, !7, i64 88, !7, i64 89, !11, i64 104, !11, i64 112, !11, i64 120, !7, i64 128, !7, i64 160}
!11 = !{!"long", !7, i64 0}
!12 = !{!"_Bool", !7, i64 0}
!13 = !{!"int", !7, i64 0}
!14 = !{!10, !6, i64 80}
!15 = !{!13, !13, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@gconf = external local_unnamed_addr global ptr, align 8
@.str.68 = external hidden unnamed_addr constant [4 x i8], align 1
@.str.69 = external hidden unnamed_addr constant [8 x i8], align 1
@g_dht_socket4 = external hidden local_unnamed_addr global i32, align 4
@.str.70 = external hidden unnamed_addr constant [3 x i8], align 1
@g_dht_socket6 = external hidden local_unnamed_addr global i32, align 4
@.str.71 = external hidden unnamed_addr constant [5 x i8], align 1
@.str.72 = external hidden unnamed_addr constant [35 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @dht_init(i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local void @dht_handler(i32 noundef, i32 noundef) #1

declare void @log_print(i32 noundef, ptr noundef, ...) local_unnamed_addr #2

declare zeroext i1 @bytes_random(ptr noundef, i64 noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local noundef zeroext i1 @kad_setup() local_unnamed_addr #1 {
  %1 = alloca [20 x i8], align 16
  call void @llvm.lifetime.start.p0(i64 20, ptr nonnull %1) #3
  %2 = call zeroext i1 @bytes_random(ptr noundef nonnull %1, i64 noundef 20) #3
  %3 = load ptr, ptr @gconf, align 8, !tbaa !5
  %4 = getelementptr inbounds i8, ptr %3, i64 72
  %5 = load i32, ptr %4, align 8, !tbaa !9
  %6 = getelementptr inbounds i8, ptr %3, i64 80
  %7 = load ptr, ptr %6, align 8, !tbaa !14
  %8 = call i32 @net_bind(ptr noundef nonnull @.str.68, ptr noundef nonnull @.str.69, i32 noundef %5, ptr noundef %7, i32 noundef 17) #3
  store i32 %8, ptr @g_dht_socket4, align 4, !tbaa !15
  %9 = load ptr, ptr @gconf, align 8, !tbaa !5
  %10 = getelementptr inbounds i8, ptr %9, i64 72
  %11 = load i32, ptr %10, align 8, !tbaa !9
  %12 = getelementptr inbounds i8, ptr %9, i64 80
  %13 = load ptr, ptr %12, align 8, !tbaa !14
  %14 = call i32 @net_bind(ptr noundef nonnull @.str.68, ptr noundef nonnull @.str.70, i32 noundef %11, ptr noundef %13, i32 noundef 17) #3
  store i32 %14, ptr @g_dht_socket6, align 4, !tbaa !15
  %15 = load i32, ptr @g_dht_socket4, align 4, !tbaa !15
  %16 = icmp sgt i32 %15, -1
  br i1 %16, label %17, label %18

17:                                               ; preds = %0
  call void @net_add_handler(i32 noundef %15, ptr noundef nonnull @dht_handler) #3
  %.pr = load i32, ptr @g_dht_socket6, align 4
  br label %18

18:                                               ; preds = %17, %0
  %19 = phi i32 [ %.pr, %17 ], [ %14, %0 ]
  %20 = icmp sgt i32 %19, -1
  br i1 %20, label %21, label %22

21:                                               ; preds = %18
  call void @net_add_handler(i32 noundef %19, ptr noundef nonnull @dht_handler) #3
  %.pre = load i32, ptr @g_dht_socket6, align 4
  br label %22

22:                                               ; preds = %21, %18
  %23 = phi i32 [ %.pre, %21 ], [ %19, %18 ]
  %24 = load i32, ptr @g_dht_socket4, align 4, !tbaa !15
  %25 = icmp slt i32 %24, 0
  %26 = icmp slt i32 %23, 0
  %or.cond = select i1 %25, i1 %26, i1 false
  br i1 %or.cond, label %31, label %27

27:                                               ; preds = %22
  %28 = call i32 @dht_init(i32 noundef %24, i32 noundef %23, ptr noundef nonnull %1, ptr noundef nonnull @.str.71)
  %29 = icmp slt i32 %28, 0
  br i1 %29, label %30, label %31

30:                                               ; preds = %27
  call void (i32, ptr, ...) @log_print(i32 noundef 3, ptr noundef nonnull @.str.72) #3
  br label %31

31:                                               ; preds = %27, %22, %30
  %.0 = phi i1 [ false, %30 ], [ false, %22 ], [ true, %27 ]
  call void @llvm.lifetime.end.p0(i64 20, ptr nonnull %1) #3
  ret i1 %.0
}

declare i32 @net_bind(ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2

declare void @net_add_handler(i32 noundef, ptr noundef) local_unnamed_addr #2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !13, i64 72}
!10 = !{!"gconf_t", !11, i64 0, !11, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !12, i64 56, !12, i64 57, !13, i64 60, !13, i64 64, !13, i64 68, !13, i64 72, !6, i64 80, !7, i64 88, !7, i64 89, !11, i64 104, !11, i64 112, !11, i64 120, !7, i64 128, !7, i64 160}
!11 = !{!"long", !7, i64 0}
!12 = !{!"_Bool", !7, i64 0}
!13 = !{!"int", !7, i64 0}
!14 = !{!10, !6, i64 80}
!15 = !{!13, !13, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass