; LLVM IR from tangjz/acm-icpc :: lydsy/2987.ll (Z5solvexxx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z5solvexxx(i64 noundef %0, i64 noundef %1, i64 noundef %2) #0 {
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  %13 = alloca i32, align 4
  store i64 %0, ptr %4, align 8, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !5
  store i64 %2, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #4
  %14 = load i64, ptr %5, align 8, !tbaa !5
  %15 = load i64, ptr %6, align 8, !tbaa !5
  %16 = call noundef i64 @_ZSt5__gcdIxET_S0_S0_(i64 noundef %14, i64 noundef %15)
  store i64 %16, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #4
  store i64 0, ptr %8, align 8, !tbaa !5
  %17 = load i64, ptr %7, align 8, !tbaa !5
  %18 = load i64, ptr %4, align 8, !tbaa !5
  %19 = sdiv i64 %18, %17
  store i64 %19, ptr %4, align 8, !tbaa !5
  %20 = load i64, ptr %7, align 8, !tbaa !5
  %21 = load i64, ptr %5, align 8, !tbaa !5
  %22 = sdiv i64 %21, %20
  store i64 %22, ptr %5, align 8, !tbaa !5
  %23 = load i64, ptr %7, align 8, !tbaa !5
  %24 = load i64, ptr %6, align 8, !tbaa !5
  %25 = sdiv i64 %24, %23
  store i64 %25, ptr %6, align 8, !tbaa !5
  %26 = load i64, ptr %5, align 8, !tbaa !5
  %27 = load i64, ptr %6, align 8, !tbaa !5
  %28 = icmp sgt i64 %26, %27
  br i1 %28, label %29, label %30

29:                                               ; preds = %3
  call void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) %5, ptr noundef nonnull align 8 dereferenceable(8) %6) #4
  br label %30

30:                                               ; preds = %29, %3
  br label %31

31:                                               ; preds = %93, %30
  br label %32

32:                                               ; preds = %31
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #4
  %33 = load i64, ptr %4, align 8, !tbaa !5
  %34 = load i64, ptr %6, align 8, !tbaa !5
  %35 = sdiv i64 %33, %34
  store i64 %35, ptr %9, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #4
  %36 = load i64, ptr %6, align 8, !tbaa !5
  %37 = load i64, ptr %5, align 8, !tbaa !5
  %38 = sdiv i64 %36, %37
  store i64 %38, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #4
  %39 = load i64, ptr %6, align 8, !tbaa !5
  %40 = load i64, ptr %10, align 8, !tbaa !5
  %41 = load i64, ptr %5, align 8, !tbaa !5
  %42 = mul nsw i64 %40, %41
  %43 = sub nsw i64 %39, %42
  store i64 %43, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #4
  %44 = load i64, ptr %4, align 8, !tbaa !5
  %45 = load i64, ptr %9, align 8, !tbaa !5
  %46 = load i64, ptr %11, align 8, !tbaa !5
  %47 = mul nsw i64 %45, %46
  %48 = sub nsw i64 %44, %47
  %49 = load i64, ptr %5, align 8, !tbaa !5
  %50 = sdiv i64 %48, %49
  store i64 %50, ptr %12, align 8, !tbaa !5
  %51 = load i64, ptr %9, align 8, !tbaa !5
  %52 = load i64, ptr %9, align 8, !tbaa !5
  %53 = add nsw i64 %52, 1
  %54 = mul nsw i64 %51, %53
  %55 = sdiv i64 %54, 2
  %56 = load i64, ptr %10, align 8, !tbaa !5
  %57 = mul nsw i64 %55, %56
  %58 = load i64, ptr %8, align 8, !tbaa !5
  %59 = sub nsw i64 %58, %57
  store i64 %59, ptr %8, align 8, !tbaa !5
  %60 = load i64, ptr %11, align 8, !tbaa !5
  %61 = icmp ne i64 %60, 0
  br i1 %61, label %70, label %62

62:                                               ; preds = %32
  %63 = load i64, ptr %4, align 8, !tbaa !5
  %64 = add nsw i64 %63, 1
  %65 = load i64, ptr %9, align 8, !tbaa !5
  %66 = add nsw i64 %65, 1
  %67 = mul nsw i64 %64, %66
  %68 = load i64, ptr %8, align 8, !tbaa !5
  %69 = add nsw i64 %68, %67
  store i64 %69, ptr %8, align 8, !tbaa !5
  store i32 3, ptr %13, align 4
  br label %91

70:                                               ; preds = %32
  %71 = load i64, ptr %12, align 8, !tbaa !5
  %72 = load i64, ptr %9, align 8, !tbaa !5
  %73 = add nsw i64 %72, 1
  %74 = mul nsw i64 %71, %73
  %75 = load i64, ptr %8, align 8, !tbaa !5
  %76 = add nsw i64 %75, %74
  store i64 %76, ptr %8, align 8, !tbaa !5
  %77 = load i64, ptr %12, align 8, !tbaa !5
  %78 = load i64, ptr %5, align 8, !tbaa !5
  %79 = mul nsw i64 %77, %78
  %80 = load i64, ptr %4, align 8, !tbaa !5
  %81 = sub nsw i64 %80, %79
  store i64 %81, ptr %4, align 8, !tbaa !5
  %82 = load i64, ptr %5, align 8, !tbaa !5
  store i64 %82, ptr %6, align 8, !tbaa !5
  %83 = load i64, ptr %11, align 8, !tbaa !5
  store i64 %83, ptr %5, align 8, !tbaa !5
  %84 = load i64, ptr %4, align 8, !tbaa !5
  %85 = load i64, ptr %5, align 8, !tbaa !5
  %86 = sdiv i64 %84, %85
  %87 = load i64, ptr %9, align 8, !tbaa !5
  %88 = sub nsw i64 %86, %87
  %89 = load i64, ptr %8, align 8, !tbaa !5
  %90 = sub nsw i64 %89, %88
  store i64 %90, ptr %8, align 8, !tbaa !5
  store i32 0, ptr %13, align 4
  br label %91

91:                                               ; preds = %70, %62
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #4
  %92 = load i32, ptr %13, align 4
  switch i32 %92, label %96 [
    i32 0, label %93
    i32 3, label %94
  ]

93:                                               ; preds = %91
  br label %31, !llvm.loop !9

94:                                               ; preds = %91
  %95 = load i64, ptr %8, align 8, !tbaa !5
  store i32 1, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #4
  ret i64 %95

96:                                               ; preds = %91
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZSt5__gcdIxET_S0_S0_(i64 noundef, i64 noundef) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z5solvexxx(i64 noundef %0, i64 noundef %1, i64 noundef %2) local_unnamed_addr #0 {
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = tail call noundef i64 @_ZSt5__gcdIxET_S0_S0_(i64 noundef %1, i64 noundef %2)
  %7 = sdiv i64 %0, %6
  %8 = sdiv i64 %1, %6
  store i64 %8, ptr %4, align 8, !tbaa !5
  %9 = sdiv i64 %2, %6
  store i64 %9, ptr %5, align 8, !tbaa !5
  %10 = icmp sgt i64 %8, %9
  br i1 %10, label %11, label %.preheader

11:                                               ; preds = %3
  call void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) %4, ptr noundef nonnull align 8 dereferenceable(8) %5) #2
  %.promoted.pre = load i64, ptr %5, align 8, !tbaa !5
  %.promoted41.pre = load i64, ptr %4, align 8, !tbaa !5
  br label %.preheader

.preheader:                                       ; preds = %11, %3
  %.ph = phi i64 [ %8, %3 ], [ %.promoted41.pre, %11 ]
  %.ph47 = phi i64 [ %9, %3 ], [ %.promoted.pre, %11 ]
  br label %12

12:                                               ; preds = %.preheader, %21
  %13 = phi i64 [ %.recomposed, %21 ], [ %.ph, %.preheader ]
  %14 = phi i64 [ %13, %21 ], [ %.ph47, %.preheader ]
  %.029 = phi i64 [ %30, %21 ], [ 0, %.preheader ]
  %.028 = phi i64 [ %27, %21 ], [ %7, %.preheader ]
  %15 = sdiv i64 %.028, %14
  %16 = sdiv i64 %14, %13
  %.recomposed = srem i64 %14, %13
  %17 = mul nsw i64 %16, %13
  %18 = add nsw i64 %15, 1
  %19 = mul nsw i64 %18, %15
  %.neg = sdiv i64 %19, -2
  %.neg32 = mul i64 %.neg, %16
  %20 = add i64 %.neg32, %.029
  %.not = icmp eq i64 %14, %17
  br i1 %.not, label %31, label %21

21:                                               ; preds = %12
  %22 = mul nsw i64 %.recomposed, %15
  %23 = sub nsw i64 %.028, %22
  %24 = sdiv i64 %23, %13
  %25 = mul nsw i64 %24, %18
  %26 = mul nsw i64 %24, %13
  %27 = sub nsw i64 %.028, %26
  %28 = sdiv i64 %27, %.recomposed
  %.neg33 = add i64 %20, %15
  %29 = add i64 %.neg33, %25
  %30 = sub i64 %29, %28
  br label %12

31:                                               ; preds = %12
  %32 = add nsw i64 %.028, 1
  %33 = mul nsw i64 %18, %32
  %34 = add nsw i64 %20, %33
  ret i64 %34
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZSt5__gcdIxET_S0_S0_(i64 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: DSEPass,DivRemPairsPass,EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass