; LLVM IR from tangjz/acm-icpc :: self_training/2015-03-15/I.ll (Z5cha_siiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@sz = external dso_local global [20002 x i64], align 16
@mx = external dso_local global [20002 x i64], align 16
@tag = external dso_local global [20002 x i64], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z3idxii(i32 noundef, i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z9push_downRKiS0_S0_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z7push_upRKiS0_S0_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #3

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5cha_siiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #3 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  store i32 %0, ptr %5, align 4, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !5
  store i32 %3, ptr %8, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  %14 = load i32, ptr %5, align 4, !tbaa !5
  %15 = load i32, ptr %6, align 4, !tbaa !5
  %16 = call noundef i32 @_Z3idxii(i32 noundef %14, i32 noundef %15)
  store i32 %16, ptr %9, align 4, !tbaa !5
  %17 = load i32, ptr %7, align 4, !tbaa !5
  %18 = load i32, ptr %5, align 4, !tbaa !5
  %19 = icmp sle i32 %17, %18
  br i1 %19, label %20, label %40

20:                                               ; preds = %4
  %21 = load i32, ptr %6, align 4, !tbaa !5
  %22 = load i32, ptr %8, align 4, !tbaa !5
  %23 = icmp sle i32 %21, %22
  br i1 %23, label %24, label %40

24:                                               ; preds = %20
  %25 = load i32, ptr %9, align 4, !tbaa !5
  %26 = sext i32 %25 to i64
  %27 = getelementptr inbounds [20002 x i64], ptr @sz, i64 0, i64 %26
  %28 = load i64, ptr %27, align 8, !tbaa !9
  %29 = mul nsw i64 %28, 2
  store i64 %29, ptr %27, align 8, !tbaa !9
  %30 = load i32, ptr %9, align 4, !tbaa !5
  %31 = sext i32 %30 to i64
  %32 = getelementptr inbounds [20002 x i64], ptr @mx, i64 0, i64 %31
  %33 = load i64, ptr %32, align 8, !tbaa !9
  %34 = mul nsw i64 %33, 2
  store i64 %34, ptr %32, align 8, !tbaa !9
  %35 = load i32, ptr %9, align 4, !tbaa !5
  %36 = sext i32 %35 to i64
  %37 = getelementptr inbounds [20002 x i64], ptr @tag, i64 0, i64 %36
  %38 = load i64, ptr %37, align 8, !tbaa !9
  %39 = mul nsw i64 %38, 2
  store i64 %39, ptr %37, align 8, !tbaa !9
  store i32 1, ptr %10, align 4
  br label %71

40:                                               ; preds = %20, %4
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  %41 = load i32, ptr %5, align 4, !tbaa !5
  %42 = load i32, ptr %6, align 4, !tbaa !5
  %43 = add nsw i32 %41, %42
  %44 = ashr i32 %43, 1
  store i32 %44, ptr %11, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  %45 = load i32, ptr %5, align 4, !tbaa !5
  %46 = load i32, ptr %11, align 4, !tbaa !5
  %47 = call noundef i32 @_Z3idxii(i32 noundef %45, i32 noundef %46)
  store i32 %47, ptr %12, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  %48 = load i32, ptr %11, align 4, !tbaa !5
  %49 = add nsw i32 %48, 1
  %50 = load i32, ptr %6, align 4, !tbaa !5
  %51 = call noundef i32 @_Z3idxii(i32 noundef %49, i32 noundef %50)
  store i32 %51, ptr %13, align 4, !tbaa !5
  call void @_Z9push_downRKiS0_S0_(ptr noundef nonnull align 4 dereferenceable(4) %9, ptr noundef nonnull align 4 dereferenceable(4) %12, ptr noundef nonnull align 4 dereferenceable(4) %13)
  %52 = load i32, ptr %7, align 4, !tbaa !5
  %53 = load i32, ptr %11, align 4, !tbaa !5
  %54 = icmp sle i32 %52, %53
  br i1 %54, label %55, label %60

55:                                               ; preds = %40
  %56 = load i32, ptr %5, align 4, !tbaa !5
  %57 = load i32, ptr %11, align 4, !tbaa !5
  %58 = load i32, ptr %7, align 4, !tbaa !5
  %59 = load i32, ptr %8, align 4, !tbaa !5
  call void @_Z5cha_siiii(i32 noundef %56, i32 noundef %57, i32 noundef %58, i32 noundef %59)
  br label %60

60:                                               ; preds = %55, %40
  %61 = load i32, ptr %8, align 4, !tbaa !5
  %62 = load i32, ptr %11, align 4, !tbaa !5
  %63 = icmp sgt i32 %61, %62
  br i1 %63, label %64, label %70

64:                                               ; preds = %60
  %65 = load i32, ptr %11, align 4, !tbaa !5
  %66 = add nsw i32 %65, 1
  %67 = load i32, ptr %6, align 4, !tbaa !5
  %68 = load i32, ptr %7, align 4, !tbaa !5
  %69 = load i32, ptr %8, align 4, !tbaa !5
  call void @_Z5cha_siiii(i32 noundef %66, i32 noundef %67, i32 noundef %68, i32 noundef %69)
  br label %70

70:                                               ; preds = %64, %60
  call void @_Z7push_upRKiS0_S0_(ptr noundef nonnull align 4 dereferenceable(4) %9, ptr noundef nonnull align 4 dereferenceable(4) %12, ptr noundef nonnull align 4 dereferenceable(4) %13)
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  store i32 0, ptr %10, align 4
  br label %71

71:                                               ; preds = %70, %24
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  %72 = load i32, ptr %10, align 4
  switch i32 %72, label %74 [
    i32 0, label %73
    i32 1, label %73
  ]

73:                                               ; preds = %71, %71
  ret void

74:                                               ; preds = %71
  unreachable
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@sz = external dso_local local_unnamed_addr global [20002 x i64], align 16
@mx = external dso_local local_unnamed_addr global [20002 x i64], align 16
@tag = external dso_local local_unnamed_addr global [20002 x i64], align 16

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z3idxii(i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z9push_downRKiS0_S0_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z7push_upRKiS0_S0_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5cha_siiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #3 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #4
  %8 = tail call noundef i32 @_Z3idxii(i32 noundef %0, i32 noundef %1)
  store i32 %8, ptr %5, align 4, !tbaa !5
  %.not = icmp sgt i32 %2, %0
  %.not26 = icmp sgt i32 %1, %3
  %or.cond = or i1 %.not, %.not26
  br i1 %or.cond, label %20, label %9

9:                                                ; preds = %4
  %10 = sext i32 %8 to i64
  %11 = getelementptr inbounds [20002 x i64], ptr @sz, i64 0, i64 %10
  %12 = load i64, ptr %11, align 8, !tbaa !9
  %13 = shl nsw i64 %12, 1
  store i64 %13, ptr %11, align 8, !tbaa !9
  %14 = getelementptr inbounds [20002 x i64], ptr @mx, i64 0, i64 %10
  %15 = load i64, ptr %14, align 8, !tbaa !9
  %16 = shl nsw i64 %15, 1
  store i64 %16, ptr %14, align 8, !tbaa !9
  %17 = getelementptr inbounds [20002 x i64], ptr @tag, i64 0, i64 %10
  %18 = load i64, ptr %17, align 8, !tbaa !9
  %19 = shl nsw i64 %18, 1
  store i64 %19, ptr %17, align 8, !tbaa !9
  br label %31

20:                                               ; preds = %4
  %21 = add nsw i32 %1, %0
  %22 = ashr i32 %21, 1
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #4
  %23 = tail call noundef i32 @_Z3idxii(i32 noundef %0, i32 noundef %22)
  store i32 %23, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #4
  %24 = add nsw i32 %22, 1
  %25 = tail call noundef i32 @_Z3idxii(i32 noundef %24, i32 noundef %1)
  store i32 %25, ptr %7, align 4, !tbaa !5
  call void @_Z9push_downRKiS0_S0_(ptr noundef nonnull align 4 dereferenceable(4) %5, ptr noundef nonnull align 4 dereferenceable(4) %6, ptr noundef nonnull align 4 dereferenceable(4) %7)
  %.not27 = icmp slt i32 %22, %2
  br i1 %.not27, label %27, label %26

26:                                               ; preds = %20
  call void @_Z5cha_siiii(i32 noundef %0, i32 noundef %22, i32 noundef %2, i32 noundef %3)
  br label %27

27:                                               ; preds = %26, %20
  %28 = icmp slt i32 %22, %3
  br i1 %28, label %29, label %30

29:                                               ; preds = %27
  call void @_Z5cha_siiii(i32 noundef %24, i32 noundef %1, i32 noundef %2, i32 noundef %3)
  br label %30

30:                                               ; preds = %29, %27
  call void @_Z7push_upRKiS0_S0_(ptr noundef nonnull align 4 dereferenceable(4) %5, ptr noundef nonnull align 4 dereferenceable(4) %6, ptr noundef nonnull align 4 dereferenceable(4) %7)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #4
  br label %31

31:                                               ; preds = %30, %9
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #4
  ret void
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass