; LLVM IR from tangjz/acm-icpc :: lydsy (3078)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@n = external dso_local global i32, align 4
@m = external dso_local global i32, align 4
@N = external dso_local global i32, align 4
@M = external dso_local global i32, align 4
@S = external dso_local global i32, align 4
@T = external dso_local global i32, align 4
@lnk = external dso_local global [10201 x i32], align 16
@str = external dso_local global [101 x [101 x i8]], align 16
@vis = external dso_local global [10201 x i8], align 16
@.str = external hidden unnamed_addr constant [5 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [3 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z7addEdgeiii(i32 noundef, i32 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z3bfsv() #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z3dfsii(i32 noundef, i32 noundef) #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z5checkii(i32 noundef, i32 noundef) #3

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #4 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  br label %8

8:                                                ; preds = %212, %0
  %9 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef @n, ptr noundef @m)
  %10 = icmp eq i32 %9, 2
  br i1 %10, label %11, label %16

11:                                               ; preds = %8
  %12 = load i32, ptr @n, align 4, !tbaa !5
  %13 = load i32, ptr @m, align 4, !tbaa !5
  %14 = add nsw i32 %12, %13
  %15 = icmp ne i32 %14, 0
  br label %16

16:                                               ; preds = %11, %8
  %17 = phi i1 [ false, %8 ], [ %15, %11 ]
  br i1 %17, label %18, label %214

18:                                               ; preds = %16
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #8
  store i32 0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #8
  store i32 0, ptr %3, align 4, !tbaa !5
  %19 = load i32, ptr @n, align 4, !tbaa !5
  %20 = load i32, ptr @m, align 4, !tbaa !5
  %21 = mul nsw i32 %19, %20
  %22 = add nsw i32 %21, 2
  store i32 %22, ptr @N, align 4, !tbaa !5
  store i32 0, ptr @M, align 4, !tbaa !5
  %23 = load i32, ptr @N, align 4, !tbaa !5
  %24 = sub nsw i32 %23, 2
  store i32 %24, ptr @S, align 4, !tbaa !5
  %25 = load i32, ptr @N, align 4, !tbaa !5
  %26 = sub nsw i32 %25, 1
  store i32 %26, ptr @T, align 4, !tbaa !5
  %27 = load i32, ptr @N, align 4, !tbaa !5
  %28 = sext i32 %27 to i64
  %29 = mul i64 %28, 4
  call void @llvm.memset.p0.i64(ptr align 16 @lnk, i8 -1, i64 %29, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #8
  store i32 0, ptr %4, align 4, !tbaa !5
  br label %30

30:                                               ; preds = %176, %18
  %31 = load i32, ptr %4, align 4, !tbaa !5
  %32 = load i32, ptr @n, align 4, !tbaa !5
  %33 = icmp slt i32 %31, %32
  br i1 %33, label %35, label %34

34:                                               ; preds = %30
  store i32 4, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #8
  br label %179

35:                                               ; preds = %30
  %36 = load i32, ptr %4, align 4, !tbaa !5
  %37 = sext i32 %36 to i64
  %38 = getelementptr inbounds [101 x [101 x i8]], ptr @str, i64 0, i64 %37
  %39 = getelementptr inbounds [101 x i8], ptr %38, i64 0, i64 0
  %40 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str.1, ptr noundef %39)
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #8
  store i32 0, ptr %6, align 4, !tbaa !5
  br label %41

41:                                               ; preds = %172, %35
  %42 = load i32, ptr %6, align 4, !tbaa !5
  %43 = load i32, ptr @m, align 4, !tbaa !5
  %44 = icmp slt i32 %42, %43
  br i1 %44, label %46, label %45

45:                                               ; preds = %41
  store i32 7, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #8
  br label %175

46:                                               ; preds = %41
  %47 = load i32, ptr %4, align 4, !tbaa !5
  %48 = sext i32 %47 to i64
  %49 = getelementptr inbounds [101 x [101 x i8]], ptr @str, i64 0, i64 %48
  %50 = load i32, ptr %6, align 4, !tbaa !5
  %51 = sext i32 %50 to i64
  %52 = getelementptr inbounds [101 x i8], ptr %49, i64 0, i64 %51
  %53 = load i8, ptr %52, align 1, !tbaa !9
  %54 = sext i8 %53 to i32
  %55 = icmp eq i32 %54, 88
  br i1 %55, label %56, label %57

56:                                               ; preds = %46
  br label %172

57:                                               ; preds = %46
  %58 = load i32, ptr %4, align 4, !tbaa !5
  %59 = sext i32 %58 to i64
  %60 = getelementptr inbounds [101 x [101 x i8]], ptr @str, i64 0, i64 %59
  %61 = load i32, ptr %6, align 4, !tbaa !5
  %62 = sext i32 %61 to i64
  %63 = getelementptr inbounds [101 x i8], ptr %60, i64 0, i64 %62
  store i8 65, ptr %63, align 1, !tbaa !9
  %64 = load i32, ptr %4, align 4, !tbaa !5
  %65 = and i32 %64, 1
  %66 = load i32, ptr %6, align 4, !tbaa !5
  %67 = and i32 %66, 1
  %68 = icmp eq i32 %65, %67
  br i1 %68, label %69, label %120

69:                                               ; preds = %57
  %70 = load i32, ptr %2, align 4, !tbaa !5
  %71 = add nsw i32 %70, 1
  store i32 %71, ptr %2, align 4, !tbaa !5
  %72 = load i32, ptr @S, align 4, !tbaa !5
  %73 = load i32, ptr %4, align 4, !tbaa !5
  %74 = load i32, ptr %6, align 4, !tbaa !5
  %75 = call noundef i32 @_Z4tidxii(i32 noundef %73, i32 noundef %74)
  call void @_Z7addEdgeiii(i32 noundef %72, i32 noundef %75, i32 noundef 1)
  %76 = load i32, ptr %4, align 4, !tbaa !5
  %77 = icmp sgt i32 %76, 0
  br i1 %77, label %78, label %97

78:                                               ; preds = %69
  %79 = load i32, ptr %4, align 4, !tbaa !5
  %80 = sub nsw i32 %79, 1
  %81 = sext i32 %80 to i64
  %82 = getelementptr inbounds [101 x [101 x i8]], ptr @str, i64 0, i64 %81
  %83 = load i32, ptr %6, align 4, !tbaa !5
  %84 = sext i32 %83 to i64
  %85 = getelementptr inbounds [101 x i8], ptr %82, i64 0, i64 %84
  %86 = load i8, ptr %85, align 1, !tbaa !9
  %87 = sext i8 %86 to i32
  %88 = icmp ne i32 %87, 88
  br i1 %88, label %89, label %97

89:                                               ; preds = %78
  %90 = load i32, ptr %4, align 4, !tbaa !5
  %91 = load i32, ptr %6, align 4, !tbaa !5
  %92 = call noundef i32 @_Z4tidxii(i32 noundef %90, i32 noundef %91)
  %93 = load i32, ptr %4, align 4, !tbaa !5
  %94 = sub nsw i32 %93, 1
  %95 = load i32, ptr %6, align 4, !tbaa !5
  %96 = call noundef i32 @_Z4tidxii(i32 noundef %94, i32 noundef %95)
  call void @_Z7addEdgeiii(i32 noundef %92, i32 noundef %96, i32 noundef 1)
  br label %97

97:                                               ; preds = %89, %78, %69
  %98 = load i32, ptr %6, align 4, !tbaa !5
  %99 = icmp sgt i32 %98, 0
  br i1 %99, label %100, label %119

100:                                              ; preds = %97
  %101 = load i32, ptr %4, align 4, !tbaa !5
  %102 = sext i32 %101 to i64
  %103 = getelementptr inbounds [101 x [101 x i8]], ptr @str, i64 0, i64 %102
  %104 = load i32, ptr %6, align 4, !tbaa !5
  %105 = sub nsw i32 %104, 1
  %106 = sext i32 %105 to i64
  %107 = getelementptr inbounds [101 x i8], ptr %103, i64 0, i64 %106
  %108 = load i8, ptr %107, align 1, !tbaa !9
  %109 = sext i8 %108 to i32
  %110 = icmp ne i32 %109, 88
  br i1 %110, label %111, label %119

111:                                              ; preds = %100
  %112 = load i32, ptr %4, align 4, !tbaa !5
  %113 = load i32, ptr %6, align 4, !tbaa !5
  %114 = call noundef i32 @_Z4tidxii(i32 noundef %112, i32 noundef %113)
  %115 = load i32, ptr %4, align 4, !tbaa !5
  %116 = load i32, ptr %6, align 4, !tbaa !5
  %117 = sub nsw i32 %116, 1
  %118 = call noundef i32 @_Z4tidxii(i32 noundef %115, i32 noundef %117)
  call void @_Z7addEdgeiii(i32 noundef %114, i32 noundef %118, i32 noundef 1)
  br label %119

119:                                              ; preds = %111, %100, %97
  br label %171

120:                                              ; preds = %57
  %121 = load i32, ptr %3, align 4, !tbaa !5
  %122 = add nsw i32 %121, 1
  store i32 %122, ptr %3, align 4, !tbaa !5
  %123 = load i32, ptr %4, align 4, !tbaa !5
  %124 = load i32, ptr %6, align 4, !tbaa !5
  %125 = call noundef i32 @_Z4tidxii(i32 noundef %123, i32 noundef %124)
  %126 = load i32, ptr @T, align 4, !tbaa !5
  call void @_Z7addEdgeiii(i32 noundef %125, i32 noundef %126, i32 noundef 1)
  %127 = load i32, ptr %4, align 4, !tbaa !5
  %128 = icmp sgt i32 %127, 0
  br i1 %128, label %129, label %148

129:                                              ; preds = %120
  %130 = load i32, ptr %4, align 4, !tbaa !5
  %131 = sub nsw i32 %130, 1
  %132 = sext i32 %131 to i64
  %133 = getelementptr inbounds [101 x [101 x i8]], ptr @str, i64 0, i64 %132
  %134 = load i32, ptr %6, align 4, !tbaa !5
  %135 = sext i32 %134 to i64
  %136 = getelementptr inbounds [101 x i8], ptr %133, i64 0, i64 %135
  %137 = load i8, ptr %136, align 1, !tbaa !9
  %138 = sext i8 %137 to i32
  %139 = icmp ne i32 %138, 88
  br i1 %139, label %140, label %148

140:                                              ; preds = %129
  %141 = load i32, ptr %4, align 4, !tbaa !5
  %142 = sub nsw i32 %141, 1
  %143 = load i32, ptr %6, align 4, !tbaa !5
  %144 = call noundef i32 @_Z4tidxii(i32 noundef %142, i32 noundef %143)
  %145 = load i32, ptr %4, align 4, !tbaa !5
  %146 = load i32, ptr %6, align 4, !tbaa !5
  %147 = call noundef i32 @_Z4tidxii(i32 noundef %145, i32 noundef %146)
  call void @_Z7addEdgeiii(i32 noundef %144, i32 noundef %147, i32 noundef 1)
  br label %148

148:                                              ; preds = %140, %129, %120
  %149 = load i32, ptr %6, align 4, !tbaa !5
  %150 = icmp sgt i32 %149, 0
  br i1 %150, label %151, label %170

151:                                              ; preds = %148
  %152 = load i32, ptr %4, align 4, !tbaa !5
  %153 = sext i32 %152 to i64
  %154 = getelementptr inbounds [101 x [101 x i8]], ptr @str, i64 0, i64 %153
  %155 = load i32, ptr %6, align 4, !tbaa !5
  %156 = sub nsw i32 %155, 1
  %157 = sext i32 %156 to i64
  %158 = getelementptr inbounds [101 x i8], ptr %154, i64 0, i64 %157
  %159 = load i8, ptr %158, align 1, !tbaa !9
  %160 = sext i8 %159 to i32
  %161 = icmp ne i32 %160, 88
  br i1 %161, label %162, label %170

162:                                              ; preds = %151
  %163 = load i32, ptr %4, align 4, !tbaa !5
  %164 = load i32, ptr %6, align 4, !tbaa !5
  %165 = sub nsw i32 %164, 1
  %166 = call noundef i32 @_Z4tidxii(i32 noundef %163, i32 noundef %165)
  %167 = load i32, ptr %4, align 4, !tbaa !5
  %168 = load i32, ptr %6, align 4, !tbaa !5
  %169 = call noundef i32 @_Z4tidxii(i32 noundef %167, i32 noundef %168)
  call void @_Z7addEdgeiii(i32 noundef %166, i32 noundef %169, i32 noundef 1)
  br label %170

170:                                              ; preds = %162, %151, %148
  br label %171

171:                                              ; preds = %170, %119
  br label %172

172:                                              ; preds = %171, %56
  %173 = load i32, ptr %6, align 4, !tbaa !5
  %174 = add nsw i32 %173, 1
  store i32 %174, ptr %6, align 4, !tbaa !5
  br label %41, !llvm.loop !10

175:                                              ; preds = %45
  br label %176

176:                                              ; preds = %175
  %177 = load i32, ptr %4, align 4, !tbaa !5
  %178 = add nsw i32 %177, 1
  store i32 %178, ptr %4, align 4, !tbaa !5
  br label %30, !llvm.loop !12

179:                                              ; preds = %34
  br label %180

180:                                              ; preds = %188, %179
  %181 = call noundef zeroext i1 @_Z3bfsv()
  br i1 %181, label %182, label %189

182:                                              ; preds = %180
  br label %183

183:                                              ; preds = %187, %182
  %184 = load i32, ptr @S, align 4, !tbaa !5
  %185 = call noundef i32 @_Z3dfsii(i32 noundef %184, i32 noundef 10201)
  %186 = icmp ne i32 %185, 0
  br i1 %186, label %187, label %188

187:                                              ; preds = %183
  br label %183, !llvm.loop !13

188:                                              ; preds = %183
  br label %180, !llvm.loop !14

189:                                              ; preds = %180
  %190 = load i32, ptr @N, align 4, !tbaa !5
  %191 = sext i32 %190 to i64
  %192 = mul i64 %191, 1
  call void @llvm.memset.p0.i64(ptr align 16 @vis, i8 0, i64 %192, i1 false)
  %193 = load i32, ptr @S, align 4, !tbaa !5
  call void @_Z5checkii(i32 noundef %193, i32 noundef 0)
  %194 = load i32, ptr @N, align 4, !tbaa !5
  %195 = sext i32 %194 to i64
  %196 = mul i64 %195, 1
  call void @llvm.memset.p0.i64(ptr align 16 @vis, i8 0, i64 %196, i1 false)
  %197 = load i32, ptr @T, align 4, !tbaa !5
  call void @_Z5checkii(i32 noundef %197, i32 noundef 1)
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #8
  store i32 0, ptr %7, align 4, !tbaa !5
  br label %198

198:                                              ; preds = %209, %189
  %199 = load i32, ptr %7, align 4, !tbaa !5
  %200 = load i32, ptr @n, align 4, !tbaa !5
  %201 = icmp slt i32 %199, %200
  br i1 %201, label %203, label %202

202:                                              ; preds = %198
  store i32 14, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #8
  br label %212

203:                                              ; preds = %198
  %204 = load i32, ptr %7, align 4, !tbaa !5
  %205 = sext i32 %204 to i64
  %206 = getelementptr inbounds [101 x [101 x i8]], ptr @str, i64 0, i64 %205
  %207 = getelementptr inbounds [101 x i8], ptr %206, i64 0, i64 0
  %208 = call i32 @puts(ptr noundef %207)
  br label %209

209:                                              ; preds = %203
  %210 = load i32, ptr %7, align 4, !tbaa !5
  %211 = add nsw i32 %210, 1
  store i32 %211, ptr %7, align 4, !tbaa !5
  br label %198, !llvm.loop !15

212:                                              ; preds = %202
  %213 = call i32 @putchar(i32 noundef 10)
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #8
  br label %8, !llvm.loop !16

214:                                              ; preds = %16
  ret i32 0
}

declare i32 @__isoc99_scanf(ptr noundef, ...) #5

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z4tidxii(i32 noundef, i32 noundef) #6

declare i32 @puts(ptr noundef) #5

; Function Attrs: inlinehint mustprogress uwtable
declare i32 @putchar(i32 noundef) #7

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11}
!13 = distinct !{!13, !11}
!14 = distinct !{!14, !11}
!15 = distinct !{!15, !11}
!16 = distinct !{!16, !11}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@n = external dso_local global i32, align 4
@m = external dso_local global i32, align 4
@N = external dso_local local_unnamed_addr global i32, align 4
@M = external dso_local local_unnamed_addr global i32, align 4
@S = external dso_local local_unnamed_addr global i32, align 4
@T = external dso_local local_unnamed_addr global i32, align 4
@lnk = external dso_local local_unnamed_addr global [10201 x i32], align 16
@str = external dso_local global [101 x [101 x i8]], align 16
@vis = external dso_local local_unnamed_addr global [10201 x i8], align 16
@.str = external hidden unnamed_addr constant [5 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [3 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z7addEdgeiii(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z3bfsv() local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z3dfsii(i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z5checkii(i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() local_unnamed_addr #3 {
  %1 = tail call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull @n, ptr noundef nonnull @m)
  %2 = icmp eq i32 %1, 2
  %3 = load i32, ptr @n, align 4
  %4 = load i32, ptr @m, align 4
  %5 = sub i32 0, %4
  %6 = icmp ne i32 %3, %5
  %7 = select i1 %2, i1 %6, i1 false
  br i1 %7, label %.lr.ph78, label %._crit_edge79

.lr.ph78:                                         ; preds = %0, %._crit_edge76
  %8 = phi i32 [ %118, %._crit_edge76 ], [ %4, %0 ]
  %9 = phi i32 [ %117, %._crit_edge76 ], [ %3, %0 ]
  %10 = mul nsw i32 %8, %9
  %11 = add nsw i32 %10, 2
  store i32 %11, ptr @N, align 4, !tbaa !5
  store i32 0, ptr @M, align 4, !tbaa !5
  store i32 %10, ptr @S, align 4, !tbaa !5
  %12 = add nsw i32 %10, 1
  store i32 %12, ptr @T, align 4, !tbaa !5
  %13 = sext i32 %11 to i64
  %14 = shl nsw i64 %13, 2
  tail call void @llvm.memset.p0.i64(ptr nonnull align 16 @lnk, i8 -1, i64 %14, i1 false)
  %15 = icmp sgt i32 %9, 0
  br i1 %15, label %.lr.ph71, label %.preheader62

.preheader62:                                     ; preds = %._crit_edge, %.lr.ph78
  %16 = tail call noundef zeroext i1 @_Z3bfsv()
  br i1 %16, label %.preheader, label %._crit_edge72

.lr.ph71:                                         ; preds = %.lr.ph78, %._crit_edge
  %indvars.iv82 = phi i64 [ %indvars.iv.next83, %._crit_edge ], [ 0, %.lr.ph78 ]
  %17 = getelementptr inbounds [101 x [101 x i8]], ptr @str, i64 0, i64 %indvars.iv82
  %18 = tail call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str.1, ptr noundef nonnull %17)
  %19 = load i32, ptr @m, align 4, !tbaa !5
  %20 = icmp sgt i32 %19, 0
  br i1 %20, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %.lr.ph71
  %.not54 = icmp eq i64 %indvars.iv82, 0
  %21 = add nsw i64 %indvars.iv82, -1
  %22 = load i8, ptr %17, align 1, !tbaa !9
  %23 = icmp eq i8 %22, 88
  br i1 %23, label %47, label %24

24:                                               ; preds = %.lr.ph
  store i8 65, ptr %17, align 1, !tbaa !9
  %25 = trunc nuw nsw i64 %indvars.iv82 to i32
  %26 = and i32 %25, 1
  %27 = icmp eq i32 %26, 0
  br i1 %27, label %37, label %28

28:                                               ; preds = %24
  %29 = tail call noundef i32 @_Z4tidxii(i32 noundef %25, i32 noundef 0)
  %30 = load i32, ptr @T, align 4, !tbaa !5
  tail call void @_Z7addEdgeiii(i32 noundef %29, i32 noundef %30, i32 noundef 1)
  br i1 %.not54, label %47, label %31

31:                                               ; preds = %28
  %32 = getelementptr inbounds [101 x [101 x i8]], ptr @str, i64 0, i64 %21, i64 0
  %33 = load i8, ptr %32, align 1, !tbaa !9
  %.not55.peel = icmp eq i8 %33, 88
  br i1 %.not55.peel, label %47, label %34

34:                                               ; preds = %31
  %35 = trunc nsw i64 %21 to i32
  %36 = tail call noundef i32 @_Z4tidxii(i32 noundef %35, i32 noundef 0)
  br label %.sink.split

37:                                               ; preds = %24
  %38 = load i32, ptr @S, align 4, !tbaa !5
  %39 = tail call noundef i32 @_Z4tidxii(i32 noundef %25, i32 noundef 0)
  tail call void @_Z7addEdgeiii(i32 noundef %38, i32 noundef %39, i32 noundef 1)
  br i1 %.not54, label %47, label %40

40:                                               ; preds = %37
  %41 = getelementptr inbounds [101 x [101 x i8]], ptr @str, i64 0, i64 %21, i64 0
  %42 = load i8, ptr %41, align 1, !tbaa !9
  %.not59.peel = icmp eq i8 %42, 88
  br i1 %.not59.peel, label %47, label %43

43:                                               ; preds = %40
  %44 = tail call noundef i32 @_Z4tidxii(i32 noundef %25, i32 noundef 0)
  %45 = trunc nsw i64 %21 to i32
  br label %.sink.split

.sink.split:                                      ; preds = %34, %43
  %.sink96 = phi i32 [ %45, %43 ], [ %25, %34 ]
  %.sink = phi i32 [ %44, %43 ], [ %36, %34 ]
  %46 = tail call noundef i32 @_Z4tidxii(i32 noundef %.sink96, i32 noundef 0)
  tail call void @_Z7addEdgeiii(i32 noundef %.sink, i32 noundef %46, i32 noundef 1)
  br label %47

47:                                               ; preds = %.sink.split, %37, %40, %28, %31, %.lr.ph
  %48 = load i32, ptr @m, align 4, !tbaa !5
  %49 = icmp sgt i32 %48, 1
  br i1 %49, label %.peel.next, label %._crit_edge

.peel.next:                                       ; preds = %47
  %50 = trunc nuw nsw i64 %indvars.iv82 to i32
  %51 = trunc nsw i64 %21 to i32
  %52 = trunc nsw i64 %21 to i32
  br label %56

._crit_edge:                                      ; preds = %98, %47, %.lr.ph71
  %indvars.iv.next83 = add nuw nsw i64 %indvars.iv82, 1
  %53 = load i32, ptr @n, align 4, !tbaa !5
  %54 = sext i32 %53 to i64
  %55 = icmp slt i64 %indvars.iv.next83, %54
  br i1 %55, label %.lr.ph71, label %.preheader62, !llvm.loop !10

56:                                               ; preds = %.peel.next, %98
  %indvars.iv = phi i64 [ 1, %.peel.next ], [ %indvars.iv.next, %98 ]
  %57 = getelementptr inbounds [101 x [101 x i8]], ptr @str, i64 0, i64 %indvars.iv82, i64 %indvars.iv
  %58 = load i8, ptr %57, align 1, !tbaa !9
  %59 = icmp eq i8 %58, 88
  br i1 %59, label %98, label %60

60:                                               ; preds = %56
  store i8 65, ptr %57, align 1, !tbaa !9
  %61 = trunc nuw nsw i64 %indvars.iv to i32
  %62 = xor i32 %61, %50
  %63 = and i32 %62, 1
  %64 = icmp eq i32 %63, 0
  br i1 %64, label %65, label %81

65:                                               ; preds = %60
  %66 = load i32, ptr @S, align 4, !tbaa !5
  %67 = tail call noundef i32 @_Z4tidxii(i32 noundef %50, i32 noundef %61)
  tail call void @_Z7addEdgeiii(i32 noundef %66, i32 noundef %67, i32 noundef 1)
  br i1 %.not54, label %74, label %68

68:                                               ; preds = %65
  %69 = getelementptr inbounds [101 x [101 x i8]], ptr @str, i64 0, i64 %21, i64 %indvars.iv
  %70 = load i8, ptr %69, align 1, !tbaa !9
  %.not59 = icmp eq i8 %70, 88
  br i1 %.not59, label %74, label %71

71:                                               ; preds = %68
  %72 = tail call noundef i32 @_Z4tidxii(i32 noundef %50, i32 noundef %61)
  %73 = tail call noundef i32 @_Z4tidxii(i32 noundef %52, i32 noundef %61)
  tail call void @_Z7addEdgeiii(i32 noundef %72, i32 noundef %73, i32 noundef 1)
  br label %74

74:                                               ; preds = %65, %68, %71
  %75 = add nsw i64 %indvars.iv, -1
  %76 = getelementptr inbounds [101 x [101 x i8]], ptr @str, i64 0, i64 %indvars.iv82, i64 %75
  %77 = load i8, ptr %76, align 1, !tbaa !9
  %.not61 = icmp eq i8 %77, 88
  br i1 %.not61, label %98, label %78

78:                                               ; preds = %74
  %79 = tail call noundef i32 @_Z4tidxii(i32 noundef %50, i32 noundef %61)
  %80 = trunc nsw i64 %75 to i32
  br label %.sink.split97

81:                                               ; preds = %60
  %82 = tail call noundef i32 @_Z4tidxii(i32 noundef %50, i32 noundef %61)
  %83 = load i32, ptr @T, align 4, !tbaa !5
  tail call void @_Z7addEdgeiii(i32 noundef %82, i32 noundef %83, i32 noundef 1)
  br i1 %.not54, label %90, label %84

84:                                               ; preds = %81
  %85 = getelementptr inbounds [101 x [101 x i8]], ptr @str, i64 0, i64 %21, i64 %indvars.iv
  %86 = load i8, ptr %85, align 1, !tbaa !9
  %.not55 = icmp eq i8 %86, 88
  br i1 %.not55, label %90, label %87

87:                                               ; preds = %84
  %88 = tail call noundef i32 @_Z4tidxii(i32 noundef %51, i32 noundef %61)
  %89 = tail call noundef i32 @_Z4tidxii(i32 noundef %50, i32 noundef %61)
  tail call void @_Z7addEdgeiii(i32 noundef %88, i32 noundef %89, i32 noundef 1)
  br label %90

90:                                               ; preds = %81, %84, %87
  %91 = add nsw i64 %indvars.iv, -1
  %92 = getelementptr inbounds [101 x [101 x i8]], ptr @str, i64 0, i64 %indvars.iv82, i64 %91
  %93 = load i8, ptr %92, align 1, !tbaa !9
  %.not57 = icmp eq i8 %93, 88
  br i1 %.not57, label %98, label %94

94:                                               ; preds = %90
  %95 = trunc nsw i64 %91 to i32
  %96 = tail call noundef i32 @_Z4tidxii(i32 noundef %50, i32 noundef %95)
  br label %.sink.split97

.sink.split97:                                    ; preds = %94, %78
  %.sink100 = phi i32 [ %80, %78 ], [ %61, %94 ]
  %.sink98 = phi i32 [ %79, %78 ], [ %96, %94 ]
  %97 = tail call noundef i32 @_Z4tidxii(i32 noundef %50, i32 noundef %.sink100)
  tail call void @_Z7addEdgeiii(i32 noundef %.sink98, i32 noundef %97, i32 noundef 1)
  br label %98

98:                                               ; preds = %.sink.split97, %74, %90, %56
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %99 = load i32, ptr @m, align 4, !tbaa !5
  %100 = sext i32 %99 to i64
  %101 = icmp slt i64 %indvars.iv.next, %100
  br i1 %101, label %56, label %._crit_edge, !llvm.loop !12

.preheader:                                       ; preds = %.preheader62, %.preheader.backedge
  %102 = load i32, ptr @S, align 4, !tbaa !5
  %103 = tail call noundef i32 @_Z3dfsii(i32 noundef %102, i32 noundef 10201)
  %.not = icmp eq i32 %103, 0
  br i1 %.not, label %104, label %.preheader.backedge

.preheader.backedge:                              ; preds = %.preheader, %104
  br label %.preheader, !llvm.loop !14

104:                                              ; preds = %.preheader
  %105 = tail call noundef zeroext i1 @_Z3bfsv()
  br i1 %105, label %.preheader.backedge, label %._crit_edge72

._crit_edge72:                                    ; preds = %104, %.preheader62
  %106 = load i32, ptr @N, align 4, !tbaa !5
  %107 = sext i32 %106 to i64
  tail call void @llvm.memset.p0.i64(ptr nonnull align 16 @vis, i8 0, i64 %107, i1 false)
  %108 = load i32, ptr @S, align 4, !tbaa !5
  tail call void @_Z5checkii(i32 noundef %108, i32 noundef 0)
  %109 = load i32, ptr @N, align 4, !tbaa !5
  %110 = sext i32 %109 to i64
  tail call void @llvm.memset.p0.i64(ptr nonnull align 16 @vis, i8 0, i64 %110, i1 false)
  %111 = load i32, ptr @T, align 4, !tbaa !5
  tail call void @_Z5checkii(i32 noundef %111, i32 noundef 1)
  %112 = load i32, ptr @n, align 4, !tbaa !5
  %113 = icmp sgt i32 %112, 0
  br i1 %113, label %.lr.ph75, label %._crit_edge76

._crit_edge76:                                    ; preds = %.lr.ph75, %._crit_edge72
  %114 = tail call i32 @putchar(i32 noundef 10)
  %115 = tail call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull @n, ptr noundef nonnull @m)
  %116 = icmp eq i32 %115, 2
  %117 = load i32, ptr @n, align 4
  %118 = load i32, ptr @m, align 4
  %119 = sub i32 0, %118
  %120 = icmp ne i32 %117, %119
  %121 = select i1 %116, i1 %120, i1 false
  br i1 %121, label %.lr.ph78, label %._crit_edge79, !llvm.loop !15

.lr.ph75:                                         ; preds = %._crit_edge72, %.lr.ph75
  %indvars.iv85 = phi i64 [ %indvars.iv.next86, %.lr.ph75 ], [ 0, %._crit_edge72 ]
  %122 = getelementptr inbounds [101 x [101 x i8]], ptr @str, i64 0, i64 %indvars.iv85
  %123 = tail call i32 @puts(ptr noundef nonnull dereferenceable(1) %122)
  %indvars.iv.next86 = add nuw nsw i64 %indvars.iv85, 1
  %124 = load i32, ptr @n, align 4, !tbaa !5
  %125 = sext i32 %124 to i64
  %126 = icmp slt i64 %indvars.iv.next86, %125
  br i1 %126, label %.lr.ph75, label %._crit_edge76, !llvm.loop !16

._crit_edge79:                                    ; preds = %._crit_edge76, %0
  ret i32 0
}

; Function Attrs: nofree nounwind
declare noundef i32 @__isoc99_scanf(ptr nocapture noundef readonly, ...) local_unnamed_addr #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z4tidxii(i32 noundef, i32 noundef) local_unnamed_addr #5

; Function Attrs: nofree nounwind
declare noundef i32 @puts(ptr nocapture noundef readonly) local_unnamed_addr #4

; Function Attrs: inlinehint mustprogress nofree nounwind uwtable
declare noundef i32 @putchar(i32 noundef) local_unnamed_addr #6

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { inlinehint mustprogress nofree nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11, !13}
!13 = !{!"llvm.loop.peeled.count", i32 1}
!14 = distinct !{!14, !11}
!15 = distinct !{!15, !11}
!16 = distinct !{!16, !11}


; Effective O3 passes: BDCEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LICMPass,LoopFullUnrollPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass