; LLVM IR from tangjz/acm-icpc :: codeforces/1615F.ll (Z5solvev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Info = type { i32, i32 }

@_ZZ5solvevE1s = external hidden global [2001 x i8], align 16
@_ZZ5solvevE1t = external hidden global [2001 x i8], align 16
@.str = external hidden unnamed_addr constant [7 x i8], align 1
@_ZZ5solvevE3cur = external hidden global i32, align 4
@_ZZ5solvevE3pre = external hidden global i32, align 4
@_ZZ5solvevE2dp = external hidden global [2 x [4001 x %struct.Info]], align 16
@.str.2 = external hidden unnamed_addr constant [4 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5solvev() #0 {
  %1 = alloca i32, align 4
  %2 = alloca %struct.Info, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #7
  %13 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef %1, ptr noundef @_ZZ5solvevE1s, ptr noundef @_ZZ5solvevE1t)
  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #7
  %14 = getelementptr inbounds %struct.Info, ptr %2, i32 0, i32 0
  store i32 1, ptr %14, align 4, !tbaa !5
  %15 = getelementptr inbounds %struct.Info, ptr %2, i32 0, i32 1
  store i32 0, ptr %15, align 4, !tbaa !10
  %16 = load i32, ptr @_ZZ5solvevE3cur, align 4, !tbaa !11
  %17 = sext i32 %16 to i64
  %18 = getelementptr inbounds [2 x [4001 x %struct.Info]], ptr @_ZZ5solvevE2dp, i64 0, i64 %17
  %19 = load i32, ptr %1, align 4, !tbaa !11
  %20 = add nsw i32 %19, 0
  %21 = sext i32 %20 to i64
  %22 = getelementptr inbounds [4001 x %struct.Info], ptr %18, i64 0, i64 %21
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %22, ptr align 4 %2, i64 8, i1 false), !tbaa.struct !12
  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #7
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #7
  store i32 0, ptr %3, align 4, !tbaa !11
  br label %23

23:                                               ; preds = %140, %0
  %24 = load i32, ptr %3, align 4, !tbaa !11
  %25 = load i32, ptr %1, align 4, !tbaa !11
  %26 = icmp slt i32 %24, %25
  br i1 %26, label %28, label %27

27:                                               ; preds = %23
  store i32 2, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #7
  br label %143

28:                                               ; preds = %23
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) @_ZZ5solvevE3cur, ptr noundef nonnull align 4 dereferenceable(4) @_ZZ5solvevE3pre) #7
  %29 = load i32, ptr @_ZZ5solvevE3cur, align 4, !tbaa !11
  %30 = sext i32 %29 to i64
  %31 = getelementptr inbounds [2 x [4001 x %struct.Info]], ptr @_ZZ5solvevE2dp, i64 0, i64 %30
  %32 = getelementptr inbounds [4001 x %struct.Info], ptr %31, i64 0, i64 0
  %33 = load i32, ptr %1, align 4, !tbaa !11
  %34 = sext i32 %33 to i64
  %35 = getelementptr inbounds %struct.Info, ptr %32, i64 %34
  %36 = load i32, ptr %3, align 4, !tbaa !11
  %37 = add nsw i32 %36, 1
  %38 = sext i32 %37 to i64
  %39 = sub i64 0, %38
  %40 = getelementptr inbounds %struct.Info, ptr %35, i64 %39
  %41 = load i32, ptr %3, align 4, !tbaa !11
  %42 = add nsw i32 %41, 1
  %43 = shl i32 %42, 1
  %44 = or i32 %43, 1
  %45 = sext i32 %44 to i64
  %46 = mul i64 %45, 8
  call void @llvm.memset.p0.i64(ptr align 4 %40, i8 0, i64 %46, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #7
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #7
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #7
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #7
  %47 = load i32, ptr %3, align 4, !tbaa !11
  %48 = sext i32 %47 to i64
  %49 = getelementptr inbounds [2001 x i8], ptr @_ZZ5solvevE1s, i64 0, i64 %48
  %50 = load i8, ptr %49, align 1, !tbaa !13
  %51 = sext i8 %50 to i32
  %52 = icmp eq i32 %51, 63
  br i1 %52, label %53, label %54

53:                                               ; preds = %28
  store i32 0, ptr %5, align 4, !tbaa !11
  store i32 1, ptr %6, align 4, !tbaa !11
  br label %64

54:                                               ; preds = %28
  %55 = load i32, ptr %3, align 4, !tbaa !11
  %56 = sext i32 %55 to i64
  %57 = getelementptr inbounds [2001 x i8], ptr @_ZZ5solvevE1s, i64 0, i64 %56
  %58 = load i8, ptr %57, align 1, !tbaa !13
  %59 = sext i8 %58 to i32
  %60 = sub nsw i32 %59, 48
  %61 = load i32, ptr %3, align 4, !tbaa !11
  %62 = and i32 %61, 1
  %63 = xor i32 %60, %62
  store i32 %63, ptr %6, align 4, !tbaa !11
  store i32 %63, ptr %5, align 4, !tbaa !11
  br label %64

64:                                               ; preds = %54, %53
  %65 = load i32, ptr %3, align 4, !tbaa !11
  %66 = sext i32 %65 to i64
  %67 = getelementptr inbounds [2001 x i8], ptr @_ZZ5solvevE1t, i64 0, i64 %66
  %68 = load i8, ptr %67, align 1, !tbaa !13
  %69 = sext i8 %68 to i32
  %70 = icmp eq i32 %69, 63
  br i1 %70, label %71, label %72

71:                                               ; preds = %64
  store i32 0, ptr %7, align 4, !tbaa !11
  store i32 1, ptr %8, align 4, !tbaa !11
  br label %82

72:                                               ; preds = %64
  %73 = load i32, ptr %3, align 4, !tbaa !11
  %74 = sext i32 %73 to i64
  %75 = getelementptr inbounds [2001 x i8], ptr @_ZZ5solvevE1t, i64 0, i64 %74
  %76 = load i8, ptr %75, align 1, !tbaa !13
  %77 = sext i8 %76 to i32
  %78 = sub nsw i32 %77, 48
  %79 = load i32, ptr %3, align 4, !tbaa !11
  %80 = and i32 %79, 1
  %81 = xor i32 %78, %80
  store i32 %81, ptr %8, align 4, !tbaa !11
  store i32 %81, ptr %7, align 4, !tbaa !11
  br label %82

82:                                               ; preds = %72, %71
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #7
  %83 = load i32, ptr %3, align 4, !tbaa !11
  %84 = sub nsw i32 0, %83
  store i32 %84, ptr %9, align 4, !tbaa !11
  br label %85

85:                                               ; preds = %136, %82
  %86 = load i32, ptr %9, align 4, !tbaa !11
  %87 = load i32, ptr %3, align 4, !tbaa !11
  %88 = icmp sle i32 %86, %87
  br i1 %88, label %90, label %89

89:                                               ; preds = %85
  store i32 5, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #7
  br label %139

90:                                               ; preds = %85
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #7
  %91 = load i32, ptr %5, align 4, !tbaa !11
  store i32 %91, ptr %10, align 4, !tbaa !11
  br label %92

92:                                               ; preds = %132, %90
  %93 = load i32, ptr %10, align 4, !tbaa !11
  %94 = load i32, ptr %6, align 4, !tbaa !11
  %95 = icmp sle i32 %93, %94
  br i1 %95, label %97, label %96

96:                                               ; preds = %92
  store i32 8, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #7
  br label %135

97:                                               ; preds = %92
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #7
  %98 = load i32, ptr %7, align 4, !tbaa !11
  store i32 %98, ptr %11, align 4, !tbaa !11
  br label %99

99:                                               ; preds = %128, %97
  %100 = load i32, ptr %11, align 4, !tbaa !11
  %101 = load i32, ptr %8, align 4, !tbaa !11
  %102 = icmp sle i32 %100, %101
  br i1 %102, label %104, label %103

103:                                              ; preds = %99
  store i32 11, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #7
  br label %131

104:                                              ; preds = %99
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #7
  %105 = load i32, ptr %9, align 4, !tbaa !11
  %106 = load i32, ptr %10, align 4, !tbaa !11
  %107 = add nsw i32 %105, %106
  %108 = load i32, ptr %11, align 4, !tbaa !11
  %109 = sub nsw i32 %107, %108
  store i32 %109, ptr %12, align 4, !tbaa !11
  %110 = load i32, ptr @_ZZ5solvevE3cur, align 4, !tbaa !11
  %111 = sext i32 %110 to i64
  %112 = getelementptr inbounds [2 x [4001 x %struct.Info]], ptr @_ZZ5solvevE2dp, i64 0, i64 %111
  %113 = load i32, ptr %1, align 4, !tbaa !11
  %114 = load i32, ptr %12, align 4, !tbaa !11
  %115 = add nsw i32 %113, %114
  %116 = sext i32 %115 to i64
  %117 = getelementptr inbounds [4001 x %struct.Info], ptr %112, i64 0, i64 %116
  %118 = load i32, ptr @_ZZ5solvevE3pre, align 4, !tbaa !11
  %119 = sext i32 %118 to i64
  %120 = getelementptr inbounds [2 x [4001 x %struct.Info]], ptr @_ZZ5solvevE2dp, i64 0, i64 %119
  %121 = load i32, ptr %1, align 4, !tbaa !11
  %122 = load i32, ptr %9, align 4, !tbaa !11
  %123 = add nsw i32 %121, %122
  %124 = sext i32 %123 to i64
  %125 = getelementptr inbounds [4001 x %struct.Info], ptr %120, i64 0, i64 %124
  %126 = load i32, ptr %12, align 4, !tbaa !11
  %127 = call i32 @llvm.abs.i32(i32 %126, i1 true)
  call void @_Z6appendR4InfoRKS_i(ptr noundef nonnull align 4 dereferenceable(8) %117, ptr noundef nonnull align 4 dereferenceable(8) %125, i32 noundef %127)
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #7
  br label %128

128:                                              ; preds = %104
  %129 = load i32, ptr %11, align 4, !tbaa !11
  %130 = add nsw i32 %129, 1
  store i32 %130, ptr %11, align 4, !tbaa !11
  br label %99, !llvm.loop !14

131:                                              ; preds = %103
  br label %132

132:                                              ; preds = %131
  %133 = load i32, ptr %10, align 4, !tbaa !11
  %134 = add nsw i32 %133, 1
  store i32 %134, ptr %10, align 4, !tbaa !11
  br label %92, !llvm.loop !16

135:                                              ; preds = %96
  br label %136

136:                                              ; preds = %135
  %137 = load i32, ptr %9, align 4, !tbaa !11
  %138 = add nsw i32 %137, 1
  store i32 %138, ptr %9, align 4, !tbaa !11
  br label %85, !llvm.loop !17

139:                                              ; preds = %89
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #7
  br label %140

140:                                              ; preds = %139
  %141 = load i32, ptr %3, align 4, !tbaa !11
  %142 = add nsw i32 %141, 1
  store i32 %142, ptr %3, align 4, !tbaa !11
  br label %23, !llvm.loop !18

143:                                              ; preds = %27
  %144 = load i32, ptr @_ZZ5solvevE3cur, align 4, !tbaa !11
  %145 = sext i32 %144 to i64
  %146 = getelementptr inbounds [2 x [4001 x %struct.Info]], ptr @_ZZ5solvevE2dp, i64 0, i64 %145
  %147 = load i32, ptr %1, align 4, !tbaa !11
  %148 = add nsw i32 %147, 0
  %149 = sext i32 %148 to i64
  %150 = getelementptr inbounds [4001 x %struct.Info], ptr %146, i64 0, i64 %149
  %151 = getelementptr inbounds %struct.Info, ptr %150, i32 0, i32 1
  %152 = load i32, ptr %151, align 4, !tbaa !10
  %153 = call i32 (ptr, ...) @printf(ptr noundef @.str.2, i32 noundef %152)
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #7
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @__isoc99_scanf(ptr noundef, ...) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #4

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #5

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_Z6appendR4InfoRKS_i(ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(8), i32 noundef) #4

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.abs.i32(i32, i1 immarg) #6

declare i32 @printf(ptr noundef, ...) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #6 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #7 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS4Info", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!6, !7, i64 4}
!11 = !{!7, !7, i64 0}
!12 = !{i64 0, i64 4, !11, i64 4, i64 4, !11}
!13 = !{!8, !8, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}
!17 = distinct !{!17, !15}
!18 = distinct !{!18, !15}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Info = type { i32, i32 }

@_ZZ5solvevE1s = external hidden global [2001 x i8], align 16
@_ZZ5solvevE1t = external hidden global [2001 x i8], align 16
@.str = external hidden unnamed_addr constant [7 x i8], align 1
@_ZZ5solvevE3cur = external hidden global i32, align 4
@_ZZ5solvevE3pre = external hidden global i32, align 4
@_ZZ5solvevE2dp = external hidden global [2 x [4001 x %struct.Info]], align 16
@.str.2 = external hidden unnamed_addr constant [4 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z5solvev() local_unnamed_addr #0 {
  %1 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #6
  %2 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull %1, ptr noundef nonnull @_ZZ5solvevE1s, ptr noundef nonnull @_ZZ5solvevE1t)
  %3 = load i32, ptr @_ZZ5solvevE3cur, align 4, !tbaa !5
  %4 = sext i32 %3 to i64
  %5 = load i32, ptr %1, align 4, !tbaa !5
  %6 = sext i32 %5 to i64
  %7 = getelementptr inbounds [2 x [4001 x %struct.Info]], ptr @_ZZ5solvevE2dp, i64 0, i64 %4, i64 %6
  store i32 1, ptr %7, align 8, !tbaa !5
  %.sroa.4.0..sroa_idx = getelementptr inbounds i8, ptr %7, i64 4
  store i32 0, ptr %.sroa.4.0..sroa_idx, align 4, !tbaa !5
  %8 = icmp sgt i32 %5, 0
  br i1 %8, label %.preheader40.lr.ph, label %._crit_edge54

.loopexit.loopexit56:                             ; preds = %._crit_edge45.split
  %.pre = load i32, ptr %1, align 4, !tbaa !5
  %.pre67 = sext i32 %.pre to i64
  br label %.loopexit

.loopexit:                                        ; preds = %.preheader40.lr.ph, %.loopexit.loopexit56
  %.pre-phi68 = phi i64 [ %.pre67, %.loopexit.loopexit56 ], [ %17, %.preheader40.lr.ph ]
  %9 = icmp slt i64 %indvars.iv.next62, %.pre-phi68
  %indvars.iv.next = add nuw i32 %indvars.iv, 1
  br i1 %9, label %.preheader40.lr.ph, label %._crit_edge54.loopexit, !llvm.loop !9

._crit_edge54.loopexit:                           ; preds = %.loopexit
  %.pre64 = load i32, ptr @_ZZ5solvevE3cur, align 4, !tbaa !5
  %.pre65 = sext i32 %.pre64 to i64
  br label %._crit_edge54

._crit_edge54:                                    ; preds = %._crit_edge54.loopexit, %0
  %.pre-phi66 = phi i64 [ %.pre65, %._crit_edge54.loopexit ], [ %4, %0 ]
  %.pre-phi = phi i64 [ %.pre-phi68, %._crit_edge54.loopexit ], [ %6, %0 ]
  %10 = getelementptr inbounds [2 x [4001 x %struct.Info]], ptr @_ZZ5solvevE2dp, i64 0, i64 %.pre-phi66, i64 %.pre-phi, i32 1
  %11 = load i32, ptr %10, align 4, !tbaa !11
  %12 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.2, i32 noundef %11)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #6
  ret void

.preheader40.lr.ph:                               ; preds = %0, %.loopexit
  %indvars.iv61 = phi i64 [ %indvars.iv.next62, %.loopexit ], [ 0, %0 ]
  %indvars.iv = phi i32 [ %indvars.iv.next, %.loopexit ], [ 1, %0 ]
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) @_ZZ5solvevE3cur, ptr noundef nonnull align 4 dereferenceable(4) @_ZZ5solvevE3pre) #6
  %13 = load i32, ptr @_ZZ5solvevE3cur, align 4, !tbaa !5
  %14 = sext i32 %13 to i64
  %15 = getelementptr inbounds [2 x [4001 x %struct.Info]], ptr @_ZZ5solvevE2dp, i64 0, i64 %14
  %16 = load i32, ptr %1, align 4, !tbaa !5
  %17 = sext i32 %16 to i64
  %18 = getelementptr inbounds %struct.Info, ptr %15, i64 %17
  %indvars.iv.next62 = add nuw nsw i64 %indvars.iv61, 1
  %19 = xor i64 %indvars.iv61, -1
  %20 = getelementptr inbounds %struct.Info, ptr %18, i64 %19
  %indvars.iv.next62.tr = trunc i64 %indvars.iv.next62 to i32
  %21 = shl i32 %indvars.iv.next62.tr, 1
  %22 = or disjoint i32 %21, 1
  %23 = sext i32 %22 to i64
  %24 = shl nsw i64 %23, 3
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(1) %20, i8 0, i64 %24, i1 false)
  %25 = getelementptr inbounds [2001 x i8], ptr @_ZZ5solvevE1s, i64 0, i64 %indvars.iv61
  %26 = load i8, ptr %25, align 1, !tbaa !13
  %27 = icmp eq i8 %26, 63
  %28 = sext i8 %26 to i32
  %29 = add nsw i32 %28, -48
  %30 = trunc nuw nsw i64 %indvars.iv61 to i32
  %31 = and i32 %30, 1
  %32 = xor i32 %29, %31
  %.034 = select i1 %27, i32 0, i32 %32
  %.033 = select i1 %27, i32 1, i32 %32
  %33 = getelementptr inbounds [2001 x i8], ptr @_ZZ5solvevE1t, i64 0, i64 %indvars.iv61
  %34 = load i8, ptr %33, align 1, !tbaa !13
  %35 = icmp eq i8 %34, 63
  %36 = sext i8 %34 to i32
  %37 = add nsw i32 %36, -48
  %38 = xor i32 %37, %31
  %.032 = select i1 %35, i32 0, i32 %38
  %.031 = select i1 %35, i32 1, i32 %38
  %.not3843 = icmp sgt i32 %.034, %.033
  %.not3941 = icmp sgt i32 %.032, %.031
  %or.cond = select i1 %.not3843, i1 true, i1 %.not3941
  br i1 %or.cond, label %.loopexit, label %.preheader40.preheader

.preheader40.preheader:                           ; preds = %.preheader40.lr.ph
  %39 = trunc i64 %indvars.iv61 to i32
  %40 = sub i32 0, %39
  br label %.preheader40

.preheader40:                                     ; preds = %.preheader40.preheader, %._crit_edge45.split
  %.03047 = phi i32 [ %42, %._crit_edge45.split ], [ %40, %.preheader40.preheader ]
  br label %.preheader

.preheader:                                       ; preds = %.preheader40, %._crit_edge
  %.02944 = phi i32 [ %.034, %.preheader40 ], [ %43, %._crit_edge ]
  %41 = add nsw i32 %.02944, %.03047
  br label %44

._crit_edge45.split:                              ; preds = %._crit_edge
  %42 = add i32 %.03047, 1
  %exitcond60.not = icmp eq i32 %42, %indvars.iv
  br i1 %exitcond60.not, label %.loopexit.loopexit56, label %.preheader40, !llvm.loop !14

._crit_edge:                                      ; preds = %44
  %43 = add nsw i32 %.02944, 1
  %exitcond59.not = icmp eq i32 %.02944, %.033
  br i1 %exitcond59.not, label %._crit_edge45.split, label %.preheader, !llvm.loop !15

44:                                               ; preds = %.preheader, %44
  %.02842 = phi i32 [ %.032, %.preheader ], [ %58, %44 ]
  %45 = sub i32 %41, %.02842
  %46 = load i32, ptr @_ZZ5solvevE3cur, align 4, !tbaa !5
  %47 = sext i32 %46 to i64
  %48 = load i32, ptr %1, align 4, !tbaa !5
  %49 = add nsw i32 %48, %45
  %50 = sext i32 %49 to i64
  %51 = getelementptr inbounds [2 x [4001 x %struct.Info]], ptr @_ZZ5solvevE2dp, i64 0, i64 %47, i64 %50
  %52 = load i32, ptr @_ZZ5solvevE3pre, align 4, !tbaa !5
  %53 = sext i32 %52 to i64
  %54 = add nsw i32 %48, %.03047
  %55 = sext i32 %54 to i64
  %56 = getelementptr inbounds [2 x [4001 x %struct.Info]], ptr @_ZZ5solvevE2dp, i64 0, i64 %53, i64 %55
  %57 = call i32 @llvm.abs.i32(i32 %45, i1 true)
  call void @_Z6appendR4InfoRKS_i(ptr noundef nonnull align 4 dereferenceable(8) %51, ptr noundef nonnull align 4 dereferenceable(8) %56, i32 noundef %57)
  %58 = add nsw i32 %.02842, 1
  %exitcond.not = icmp eq i32 %.02842, %.031
  br i1 %exitcond.not, label %._crit_edge, label %44, !llvm.loop !16
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nofree nounwind
declare noundef i32 @__isoc99_scanf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #3

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_Z6appendR4InfoRKS_i(ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(8), i32 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.abs.i32(i32, i1 immarg) #5

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #5 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !6, i64 4}
!12 = !{!"_ZTS4Info", !6, i64 0, !6, i64 4}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10}
!16 = distinct !{!16, !10}


; Effective O3 passes: BDCEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass