; LLVM IR from shupx/swarm_sync_sim :: src/px4_rotor_sim/src/mavros_px4_quadrotor_sim/px4_modules/mc_pos_control/Takeof_d03bedc6 (ZN7Takeoff18updateTakeoffStateEbbbfbRKm)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Takeoff = type { i32, [4 x i8], %"class.systemlib::Hysteresis", float, float, float, [4 x i8] }
%"class.systemlib::Hysteresis" = type <{ i64, i64, i64, i8, i8, [6 x i8] }>

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7Takeoff18updateTakeoffStateEbbbfbRKm(ptr noundef nonnull align 8 dereferenceable(52) %0, i1 noundef zeroext %1, i1 noundef zeroext %2, i1 noundef zeroext %3, float noundef %4, i1 noundef zeroext %5, ptr noundef nonnull align 8 dereferenceable(8) %6) #0 align 2 {
  %8 = alloca ptr, align 8
  %9 = alloca i8, align 1
  %10 = alloca i8, align 1
  %11 = alloca i8, align 1
  %12 = alloca float, align 4
  %13 = alloca i8, align 1
  %14 = alloca ptr, align 8
  store ptr %0, ptr %8, align 8, !tbaa !5
  %15 = zext i1 %1 to i8
  store i8 %15, ptr %9, align 1, !tbaa !9
  %16 = zext i1 %2 to i8
  store i8 %16, ptr %10, align 1, !tbaa !9
  %17 = zext i1 %3 to i8
  store i8 %17, ptr %11, align 1, !tbaa !9
  store float %4, ptr %12, align 4, !tbaa !11
  %18 = zext i1 %5 to i8
  store i8 %18, ptr %13, align 1, !tbaa !9
  store ptr %6, ptr %14, align 8, !tbaa !5
  %19 = load ptr, ptr %8, align 8
  %20 = getelementptr inbounds %class.Takeoff, ptr %19, i32 0, i32 2
  %21 = load i8, ptr %9, align 1, !tbaa !9, !range !13, !noundef !14
  %22 = trunc i8 %21 to i1
  %23 = load ptr, ptr %14, align 8, !tbaa !5
  call void @_ZN9systemlib10Hysteresis20set_state_and_updateEbRKm(ptr noundef nonnull align 8 dereferenceable(26) %20, i1 noundef zeroext %22, ptr noundef nonnull align 8 dereferenceable(8) %23)
  %24 = getelementptr inbounds %class.Takeoff, ptr %19, i32 0, i32 0
  %25 = load i32, ptr %24, align 8, !tbaa !15
  switch i32 %25, label %62 [
    i32 1, label %26
    i32 2, label %33
    i32 3, label %40
    i32 4, label %48
    i32 5, label %56
  ]

26:                                               ; preds = %7
  %27 = load i8, ptr %9, align 1, !tbaa !9, !range !13, !noundef !14
  %28 = trunc i8 %27 to i1
  br i1 %28, label %29, label %31

29:                                               ; preds = %26
  %30 = getelementptr inbounds %class.Takeoff, ptr %19, i32 0, i32 0
  store i32 2, ptr %30, align 8, !tbaa !15
  br label %32

31:                                               ; preds = %26
  br label %63

32:                                               ; preds = %29
  br label %33

33:                                               ; preds = %32, %7
  %34 = getelementptr inbounds %class.Takeoff, ptr %19, i32 0, i32 2
  %35 = call noundef zeroext i1 @_ZNK9systemlib10Hysteresis9get_stateEv(ptr noundef nonnull align 8 dereferenceable(26) %34)
  br i1 %35, label %36, label %38

36:                                               ; preds = %33
  %37 = getelementptr inbounds %class.Takeoff, ptr %19, i32 0, i32 0
  store i32 3, ptr %37, align 8, !tbaa !15
  br label %39

38:                                               ; preds = %33
  br label %63

39:                                               ; preds = %36
  br label %40

40:                                               ; preds = %39, %7
  %41 = load i8, ptr %11, align 1, !tbaa !9, !range !13, !noundef !14
  %42 = trunc i8 %41 to i1
  br i1 %42, label %43, label %46

43:                                               ; preds = %40
  %44 = getelementptr inbounds %class.Takeoff, ptr %19, i32 0, i32 0
  store i32 4, ptr %44, align 8, !tbaa !15
  %45 = getelementptr inbounds %class.Takeoff, ptr %19, i32 0, i32 5
  store float 0.000000e+00, ptr %45, align 8, !tbaa !20
  br label %47

46:                                               ; preds = %40
  br label %63

47:                                               ; preds = %43
  br label %48

48:                                               ; preds = %47, %7
  %49 = getelementptr inbounds %class.Takeoff, ptr %19, i32 0, i32 5
  %50 = load float, ptr %49, align 8, !tbaa !20
  %51 = fcmp oge float %50, 1.000000e+00
  br i1 %51, label %52, label %54

52:                                               ; preds = %48
  %53 = getelementptr inbounds %class.Takeoff, ptr %19, i32 0, i32 0
  store i32 5, ptr %53, align 8, !tbaa !15
  br label %55

54:                                               ; preds = %48
  br label %63

55:                                               ; preds = %52
  br label %56

56:                                               ; preds = %55, %7
  %57 = load i8, ptr %10, align 1, !tbaa !9, !range !13, !noundef !14
  %58 = trunc i8 %57 to i1
  br i1 %58, label %59, label %61

59:                                               ; preds = %56
  %60 = getelementptr inbounds %class.Takeoff, ptr %19, i32 0, i32 0
  store i32 3, ptr %60, align 8, !tbaa !15
  br label %61

61:                                               ; preds = %59, %56
  br label %63

62:                                               ; preds = %7
  br label %63

63:                                               ; preds = %62, %61, %54, %46, %38, %31
  %64 = load i8, ptr %9, align 1, !tbaa !9, !range !13, !noundef !14
  %65 = trunc i8 %64 to i1
  br i1 %65, label %66, label %71

66:                                               ; preds = %63
  %67 = load i8, ptr %13, align 1, !tbaa !9, !range !13, !noundef !14
  %68 = trunc i8 %67 to i1
  br i1 %68, label %69, label %71

69:                                               ; preds = %66
  %70 = getelementptr inbounds %class.Takeoff, ptr %19, i32 0, i32 0
  store i32 5, ptr %70, align 8, !tbaa !15
  br label %71

71:                                               ; preds = %69, %66, %63
  %72 = load i8, ptr %9, align 1, !tbaa !9, !range !13, !noundef !14
  %73 = trunc i8 %72 to i1
  br i1 %73, label %76, label %74

74:                                               ; preds = %71
  %75 = getelementptr inbounds %class.Takeoff, ptr %19, i32 0, i32 0
  store i32 1, ptr %75, align 8, !tbaa !15
  br label %76

76:                                               ; preds = %74, %71
  ret void
}

declare void @_ZN9systemlib10Hysteresis20set_state_and_updateEbRKm(ptr noundef nonnull align 8 dereferenceable(26), i1 noundef zeroext, ptr noundef nonnull align 8 dereferenceable(8)) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK9systemlib10Hysteresis9get_stateEv(ptr noundef nonnull align 8 dereferenceable(26)) #2 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"float", !7, i64 0}
!13 = !{i8 0, i8 2}
!14 = !{}
!15 = !{!16, !17, i64 0}
!16 = !{!"_ZTS7Takeoff", !17, i64 0, !18, i64 8, !12, i64 40, !12, i64 44, !12, i64 48}
!17 = !{!"_ZTS12TakeoffState", !7, i64 0}
!18 = !{!"_ZTSN9systemlib10HysteresisE", !19, i64 0, !19, i64 8, !19, i64 16, !10, i64 24, !10, i64 25}
!19 = !{!"long", !7, i64 0}
!20 = !{!16, !12, i64 48}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7Takeoff18updateTakeoffStateEbbbfbRKm(ptr noundef nonnull align 8 dereferenceable(52) %0, i1 noundef zeroext %1, i1 noundef zeroext %2, i1 noundef zeroext %3, float noundef %4, i1 noundef zeroext %5, ptr noundef nonnull align 8 dereferenceable(8) %6) local_unnamed_addr #0 align 2 {
  %8 = getelementptr inbounds i8, ptr %0, i64 8
  tail call void @_ZN9systemlib10Hysteresis20set_state_and_updateEbRKm(ptr noundef nonnull align 8 dereferenceable(26) %8, i1 noundef zeroext %1, ptr noundef nonnull align 8 dereferenceable(8) %6)
  %9 = load i32, ptr %0, align 8, !tbaa !5
  switch i32 %9, label %22 [
    i32 1, label %10
    i32 2, label %12
    i32 3, label %15
    i32 4, label %17
    i32 5, label %20
  ]

10:                                               ; preds = %7
  br i1 %1, label %11, label %.critedge9

11:                                               ; preds = %10
  store i32 2, ptr %0, align 8, !tbaa !5
  br label %12

12:                                               ; preds = %11, %7
  %13 = tail call noundef zeroext i1 @_ZNK9systemlib10Hysteresis9get_stateEv(ptr noundef nonnull align 8 dereferenceable(26) %8)
  br i1 %13, label %14, label %22

14:                                               ; preds = %12
  store i32 3, ptr %0, align 8, !tbaa !5
  br label %15

15:                                               ; preds = %14, %7
  br i1 %3, label %.thread, label %22

.thread:                                          ; preds = %15
  store i32 4, ptr %0, align 8, !tbaa !5
  %16 = getelementptr inbounds i8, ptr %0, i64 48
  store float 0.000000e+00, ptr %16, align 8, !tbaa !14
  br label %22

17:                                               ; preds = %7
  %.phi.trans.insert = getelementptr inbounds i8, ptr %0, i64 48
  %.pre = load float, ptr %.phi.trans.insert, align 8, !tbaa !14
  %18 = fcmp ult float %.pre, 1.000000e+00
  br i1 %18, label %22, label %19

19:                                               ; preds = %17
  store i32 5, ptr %0, align 8, !tbaa !5
  br label %20

20:                                               ; preds = %19, %7
  br i1 %2, label %21, label %22

21:                                               ; preds = %20
  store i32 3, ptr %0, align 8, !tbaa !5
  br label %22

22:                                               ; preds = %.thread, %7, %20, %21, %17, %15, %12
  %brmerge.demorgan = and i1 %1, %5
  br i1 %brmerge.demorgan, label %23, label %.critedge

23:                                               ; preds = %22
  store i32 5, ptr %0, align 8, !tbaa !5
  br label %.critedge

.critedge:                                        ; preds = %22, %23
  br i1 %1, label %24, label %.critedge9

.critedge9:                                       ; preds = %10, %.critedge
  store i32 1, ptr %0, align 8, !tbaa !5
  br label %24

24:                                               ; preds = %.critedge9, %.critedge
  ret void
}

declare void @_ZN9systemlib10Hysteresis20set_state_and_updateEbRKm(ptr noundef nonnull align 8 dereferenceable(26), i1 noundef zeroext, ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK9systemlib10Hysteresis9get_stateEv(ptr noundef nonnull align 8 dereferenceable(26)) local_unnamed_addr #2 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS7Takeoff", !7, i64 0, !10, i64 8, !13, i64 40, !13, i64 44, !13, i64 48}
!7 = !{!"_ZTS12TakeoffState", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTSN9systemlib10HysteresisE", !11, i64 0, !11, i64 8, !11, i64 16, !12, i64 24, !12, i64 25}
!11 = !{!"long", !8, i64 0}
!12 = !{!"bool", !8, i64 0}
!13 = !{!"float", !8, i64 0}
!14 = !{!6, !13, i64 48}


; Effective O3 passes: BDCEPass,EarlyCSEPass,GVNPass,GlobalOptPass,InstCombinePass,JumpThreadingPass,SROAPass,SimplifyCFGPass,TailCallElimPass