; LLVM IR from tangjz/acm-icpc :: lydsy (5481)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@n = external dso_local global i32, align 4
@f0 = external dso_local global i32, align 4
@f1 = external dso_local global i32, align 4
@f2 = external dso_local global i32, align 4
@c0 = external dso_local global i32, align 4
@c1 = external dso_local global i32, align 4
@c2 = external dso_local global i32, align 4
@ans = external dso_local global i32, align 4
@.str = external hidden unnamed_addr constant [3 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [2 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [4 x i8], align 1

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  %4 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef @n)
  %5 = load i32, ptr @n, align 4, !tbaa !5
  %6 = icmp eq i32 %5, 1
  br i1 %6, label %7, label %9

7:                                                ; preds = %0
  %8 = call i32 @puts(ptr noundef @.str.1)
  store i32 0, ptr %1, align 4
  br label %80

9:                                                ; preds = %0
  store i32 1, ptr @ans, align 4, !tbaa !5
  store i32 1, ptr @c1, align 4, !tbaa !5
  store i32 1, ptr @f2, align 4, !tbaa !5
  store i32 1, ptr @f0, align 4, !tbaa !5
  store i32 3, ptr @c0, align 4, !tbaa !5
  store i32 6, ptr @c2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #4
  store i32 3, ptr %2, align 4, !tbaa !5
  br label %10

10:                                               ; preds = %73, %9
  %11 = load i32, ptr %2, align 4, !tbaa !5
  %12 = load i32, ptr @n, align 4, !tbaa !5
  %13 = icmp sle i32 %11, %12
  br i1 %13, label %15, label %14

14:                                               ; preds = %10
  store i32 2, ptr %3, align 4
  br label %76

15:                                               ; preds = %10
  %16 = load i32, ptr @c0, align 4, !tbaa !5
  %17 = sext i32 %16 to i64
  %18 = load i32, ptr @f1, align 4, !tbaa !5
  %19 = sext i32 %18 to i64
  %20 = mul nsw i64 %17, %19
  %21 = load i32, ptr @c1, align 4, !tbaa !5
  %22 = sext i32 %21 to i64
  %23 = load i32, ptr @f0, align 4, !tbaa !5
  %24 = sext i32 %23 to i64
  %25 = mul nsw i64 %22, %24
  %26 = add nsw i64 %20, %25
  %27 = srem i64 %26, 998244353
  %28 = load i32, ptr @c2, align 4, !tbaa !5
  %29 = sext i32 %28 to i64
  %30 = mul nsw i64 %27, %29
  %31 = srem i64 %30, 998244353
  %32 = trunc i64 %31 to i32
  store i32 %32, ptr @f0, align 4, !tbaa !5
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) @f0, ptr noundef nonnull align 4 dereferenceable(4) @f1) #4
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) @f1, ptr noundef nonnull align 4 dereferenceable(4) @f2) #4
  %33 = load i32, ptr @f2, align 4, !tbaa !5
  %34 = load i32, ptr @ans, align 4, !tbaa !5
  %35 = add nsw i32 %34, %33
  store i32 %35, ptr @ans, align 4, !tbaa !5
  %36 = icmp sge i32 %35, 998244353
  br i1 %36, label %37, label %41

37:                                               ; preds = %15
  %38 = load i32, ptr @ans, align 4, !tbaa !5
  %39 = sub nsw i32 %38, 998244353
  store i32 %39, ptr @ans, align 4, !tbaa !5
  %40 = icmp ne i32 %39, 0
  br label %41

41:                                               ; preds = %37, %15
  %42 = phi i1 [ false, %15 ], [ %40, %37 ]
  %43 = load i32, ptr %2, align 4, !tbaa !5
  %44 = load i32, ptr @n, align 4, !tbaa !5
  %45 = icmp eq i32 %43, %44
  br i1 %45, label %46, label %47

46:                                               ; preds = %41
  store i32 2, ptr %3, align 4
  br label %76

47:                                               ; preds = %41
  %48 = load i32, ptr @c2, align 4, !tbaa !5
  %49 = sext i32 %48 to i64
  %50 = load i32, ptr %2, align 4, !tbaa !5
  %51 = sext i32 %50 to i64
  %52 = mul nsw i64 3, %51
  %53 = sub nsw i64 %52, 1
  %54 = load i32, ptr %2, align 4, !tbaa !5
  %55 = sext i32 %54 to i64
  %56 = mul nsw i64 %53, %55
  %57 = sdiv i64 %56, 2
  %58 = add nsw i64 %49, %57
  %59 = srem i64 %58, 998244353
  %60 = trunc i64 %59 to i32
  store i32 %60, ptr @c2, align 4, !tbaa !5
  %61 = load i32, ptr @c0, align 4, !tbaa !5
  %62 = load i32, ptr @c1, align 4, !tbaa !5
  %63 = add nsw i32 %62, %61
  store i32 %63, ptr @c1, align 4, !tbaa !5
  %64 = icmp sge i32 %63, 998244353
  br i1 %64, label %65, label %69

65:                                               ; preds = %47
  %66 = load i32, ptr @c1, align 4, !tbaa !5
  %67 = sub nsw i32 %66, 998244353
  store i32 %67, ptr @c1, align 4, !tbaa !5
  %68 = icmp ne i32 %67, 0
  br label %69

69:                                               ; preds = %65, %47
  %70 = phi i1 [ false, %47 ], [ %68, %65 ]
  %71 = load i32, ptr @c0, align 4, !tbaa !5
  %72 = add nsw i32 %71, 2
  store i32 %72, ptr @c0, align 4, !tbaa !5
  br label %73

73:                                               ; preds = %69
  %74 = load i32, ptr %2, align 4, !tbaa !5
  %75 = add nsw i32 %74, 1
  store i32 %75, ptr %2, align 4, !tbaa !5
  br label %10, !llvm.loop !9

76:                                               ; preds = %46, %14
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #4
  br label %77

77:                                               ; preds = %76
  %78 = load i32, ptr @ans, align 4, !tbaa !5
  %79 = call i32 (ptr, ...) @printf(ptr noundef @.str.2, i32 noundef %78)
  store i32 0, ptr %1, align 4
  br label %80

80:                                               ; preds = %77, %7
  %81 = load i32, ptr %1, align 4
  ret i32 %81
}

declare i32 @__isoc99_scanf(ptr noundef, ...) #1

declare i32 @puts(ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

declare i32 @printf(ptr noundef, ...) #1

attributes #0 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@n = external dso_local global i32, align 4
@f0 = external dso_local global i32, align 4
@f1 = external dso_local global i32, align 4
@f2 = external dso_local global i32, align 4
@c0 = external dso_local local_unnamed_addr global i32, align 4
@c1 = external dso_local local_unnamed_addr global i32, align 4
@c2 = external dso_local local_unnamed_addr global i32, align 4
@ans = external dso_local local_unnamed_addr global i32, align 4
@.str = external hidden unnamed_addr constant [3 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [2 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [4 x i8], align 1

; Function Attrs: mustprogress norecurse nounwind uwtable
define dso_local noundef i32 @main() local_unnamed_addr #0 {
  %1 = tail call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull @n)
  %2 = load i32, ptr @n, align 4, !tbaa !5
  %3 = icmp eq i32 %2, 1
  br i1 %3, label %4, label %6

4:                                                ; preds = %0
  %5 = tail call i32 @puts(ptr noundef nonnull dereferenceable(1) @.str.1)
  br label %50

6:                                                ; preds = %0
  store i32 1, ptr @ans, align 4, !tbaa !5
  store i32 1, ptr @c1, align 4, !tbaa !5
  store i32 1, ptr @f2, align 4, !tbaa !5
  store i32 1, ptr @f0, align 4, !tbaa !5
  store i32 3, ptr @c0, align 4, !tbaa !5
  store i32 6, ptr @c2, align 4, !tbaa !5
  %.not11 = icmp slt i32 %2, 3
  br i1 %.not11, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %6, %31
  %7 = phi i64 [ %39, %31 ], [ 6, %6 ]
  %8 = phi i32 [ %spec.select10, %31 ], [ 1, %6 ]
  %9 = phi i32 [ %46, %31 ], [ 3, %6 ]
  %indvars.iv = phi i64 [ %indvars.iv.next, %31 ], [ 3, %6 ]
  %10 = sext i32 %9 to i64
  %11 = load i32, ptr @f1, align 4, !tbaa !5
  %12 = sext i32 %11 to i64
  %13 = mul nsw i64 %12, %10
  %14 = sext i32 %8 to i64
  %15 = load i32, ptr @f0, align 4, !tbaa !5
  %16 = sext i32 %15 to i64
  %17 = mul nsw i64 %16, %14
  %18 = add nsw i64 %17, %13
  %19 = srem i64 %18, 998244353
  %20 = mul nsw i64 %19, %7
  %21 = srem i64 %20, 998244353
  %22 = trunc nsw i64 %21 to i32
  store i32 %22, ptr @f0, align 4, !tbaa !5
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) @f0, ptr noundef nonnull align 4 dereferenceable(4) @f1) #3
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) @f1, ptr noundef nonnull align 4 dereferenceable(4) @f2) #3
  %23 = load i32, ptr @f2, align 4, !tbaa !5
  %24 = load i32, ptr @ans, align 4, !tbaa !5
  %25 = add nsw i32 %24, %23
  %26 = icmp sgt i32 %25, 998244352
  %27 = add nsw i32 %25, -998244353
  %spec.select = select i1 %26, i32 %27, i32 %25
  store i32 %spec.select, ptr @ans, align 4, !tbaa !5
  %28 = load i32, ptr @n, align 4, !tbaa !5
  %29 = zext i32 %28 to i64
  %30 = icmp eq i64 %indvars.iv, %29
  br i1 %30, label %._crit_edge, label %31

31:                                               ; preds = %.lr.ph
  %32 = load i32, ptr @c2, align 4, !tbaa !5
  %33 = sext i32 %32 to i64
  %34 = mul nuw nsw i64 %indvars.iv, 3
  %35 = add nsw i64 %34, -1
  %36 = mul nsw i64 %35, %indvars.iv
  %37 = sdiv i64 %36, 2
  %38 = add nsw i64 %37, %33
  %39 = srem i64 %38, 998244353
  %40 = trunc nsw i64 %39 to i32
  store i32 %40, ptr @c2, align 4, !tbaa !5
  %41 = load i32, ptr @c0, align 4, !tbaa !5
  %42 = load i32, ptr @c1, align 4, !tbaa !5
  %43 = add nsw i32 %42, %41
  %44 = icmp sgt i32 %43, 998244352
  %45 = add nsw i32 %43, -998244353
  %spec.select10 = select i1 %44, i32 %45, i32 %43
  store i32 %spec.select10, ptr @c1, align 4, !tbaa !5
  %46 = add nsw i32 %41, 2
  store i32 %46, ptr @c0, align 4, !tbaa !5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %47 = sext i32 %28 to i64
  %.not.not = icmp slt i64 %indvars.iv, %47
  br i1 %.not.not, label %.lr.ph, label %._crit_edge, !llvm.loop !9

._crit_edge:                                      ; preds = %31, %.lr.ph, %6
  %48 = phi i32 [ 1, %6 ], [ %spec.select, %.lr.ph ], [ %spec.select, %31 ]
  %49 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.2, i32 noundef %48)
  br label %50

50:                                               ; preds = %._crit_edge, %4
  ret i32 0
}

; Function Attrs: nofree nounwind
declare noundef i32 @__isoc99_scanf(ptr nocapture noundef readonly, ...) local_unnamed_addr #1

; Function Attrs: nofree nounwind
declare noundef i32 @puts(ptr nocapture noundef readonly) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #1

attributes #0 = { mustprogress norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass