; LLVM IR from intel/intel-ipsec-mb :: lib/x86_64 (cpu_feature)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.anon = type { i32, i64, ptr }
%struct.cpuid_regs = type { i32, i32, i32, i32 }

@cpu_feature_detect.feat_tab = external hidden constant [28 x %struct.anon], align 16
@cpuid_1_0 = external hidden global %struct.cpuid_regs, align 4
@cpuid_7_0 = external hidden global %struct.cpuid_regs, align 4
@cpuid_7_1 = external hidden global %struct.cpuid_regs, align 4
@cpuid_24_0 = external hidden global %struct.cpuid_regs, align 4

; Function Attrs: nounwind uwtable
define hidden i64 @cpu_feature_detect() #0 {
  %1 = alloca %struct.cpuid_regs, align 4
  %2 = alloca i32, align 4
  %3 = alloca i64, align 8
  %4 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 16, ptr %1) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #3
  store i32 0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #3
  store i64 0, ptr %3, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  call void @mbcpuid(i32 noundef 0, i32 noundef 0, ptr noundef %1)
  %5 = getelementptr inbounds %struct.cpuid_regs, ptr %1, i32 0, i32 0
  %6 = load i32, ptr %5, align 4, !tbaa !11
  store i32 %6, ptr %2, align 4, !tbaa !5
  %7 = load i32, ptr %2, align 4, !tbaa !5
  %8 = icmp uge i32 %7, 1
  br i1 %8, label %9, label %10

9:                                                ; preds = %0
  call void @mbcpuid(i32 noundef 1, i32 noundef 0, ptr noundef @cpuid_1_0)
  br label %10

10:                                               ; preds = %9, %0
  %11 = load i32, ptr %2, align 4, !tbaa !5
  %12 = icmp uge i32 %11, 7
  br i1 %12, label %13, label %14

13:                                               ; preds = %10
  call void @mbcpuid(i32 noundef 7, i32 noundef 0, ptr noundef @cpuid_7_0)
  call void @mbcpuid(i32 noundef 7, i32 noundef 1, ptr noundef @cpuid_7_1)
  call void @mbcpuid(i32 noundef 36, i32 noundef 0, ptr noundef @cpuid_24_0)
  br label %14

14:                                               ; preds = %13, %10
  store i32 0, ptr %4, align 4, !tbaa !5
  br label %15

15:                                               ; preds = %45, %14
  %16 = load i32, ptr %4, align 4, !tbaa !5
  %17 = zext i32 %16 to i64
  %18 = icmp ult i64 %17, 28
  br i1 %18, label %19, label %48

19:                                               ; preds = %15
  %20 = load i32, ptr %2, align 4, !tbaa !5
  %21 = load i32, ptr %4, align 4, !tbaa !5
  %22 = zext i32 %21 to i64
  %23 = getelementptr inbounds [28 x %struct.anon], ptr @cpu_feature_detect.feat_tab, i64 0, i64 %22
  %24 = getelementptr inbounds %struct.anon, ptr %23, i32 0, i32 0
  %25 = load i32, ptr %24, align 8, !tbaa !13
  %26 = icmp ult i32 %20, %25
  br i1 %26, label %27, label %28

27:                                               ; preds = %19
  br label %45

28:                                               ; preds = %19
  %29 = load i32, ptr %4, align 4, !tbaa !5
  %30 = zext i32 %29 to i64
  %31 = getelementptr inbounds [28 x %struct.anon], ptr @cpu_feature_detect.feat_tab, i64 0, i64 %30
  %32 = getelementptr inbounds %struct.anon, ptr %31, i32 0, i32 2
  %33 = load ptr, ptr %32, align 8, !tbaa !16
  %34 = call i32 %33()
  %35 = icmp ne i32 %34, 0
  br i1 %35, label %36, label %44

36:                                               ; preds = %28
  %37 = load i32, ptr %4, align 4, !tbaa !5
  %38 = zext i32 %37 to i64
  %39 = getelementptr inbounds [28 x %struct.anon], ptr @cpu_feature_detect.feat_tab, i64 0, i64 %38
  %40 = getelementptr inbounds %struct.anon, ptr %39, i32 0, i32 1
  %41 = load i64, ptr %40, align 8, !tbaa !17
  %42 = load i64, ptr %3, align 8, !tbaa !9
  %43 = or i64 %42, %41
  store i64 %43, ptr %3, align 8, !tbaa !9
  br label %44

44:                                               ; preds = %36, %28
  br label %45

45:                                               ; preds = %44, %27
  %46 = load i32, ptr %4, align 4, !tbaa !5
  %47 = add i32 %46, 1
  store i32 %47, ptr %4, align 4, !tbaa !5
  br label %15, !llvm.loop !18

48:                                               ; preds = %15
  %49 = load i64, ptr %3, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr %1) #3
  ret i64 %49
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @mbcpuid(i32 noundef, i32 noundef, ptr noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"cpuid_regs", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12}
!13 = !{!14, !6, i64 0}
!14 = !{!"", !6, i64 0, !10, i64 8, !15, i64 16}
!15 = !{!"any pointer", !7, i64 0}
!16 = !{!14, !15, i64 16}
!17 = !{!14, !10, i64 8}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.anon = type { i32, i64, ptr }
%struct.cpuid_regs = type { i32, i32, i32, i32 }

@cpu_feature_detect.feat_tab = external hidden local_unnamed_addr constant [28 x %struct.anon], align 16
@cpuid_1_0 = external hidden global %struct.cpuid_regs, align 4
@cpuid_7_0 = external hidden global %struct.cpuid_regs, align 4
@cpuid_7_1 = external hidden global %struct.cpuid_regs, align 4
@cpuid_24_0 = external hidden global %struct.cpuid_regs, align 4

; Function Attrs: nounwind uwtable
define hidden i64 @cpu_feature_detect() local_unnamed_addr #0 {
  %1 = alloca %struct.cpuid_regs, align 4
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %1) #3
  call void @mbcpuid(i32 noundef 0, i32 noundef 0, ptr noundef nonnull %1) #3
  %2 = load i32, ptr %1, align 4, !tbaa !5
  %.not = icmp eq i32 %2, 0
  br i1 %.not, label %.thread.preheader, label %3

3:                                                ; preds = %0
  call void @mbcpuid(i32 noundef 1, i32 noundef 0, ptr noundef nonnull @cpuid_1_0) #3
  %4 = icmp ugt i32 %2, 6
  br i1 %4, label %5, label %.thread.preheader

5:                                                ; preds = %3
  call void @mbcpuid(i32 noundef 7, i32 noundef 0, ptr noundef nonnull @cpuid_7_0) #3
  call void @mbcpuid(i32 noundef 7, i32 noundef 1, ptr noundef nonnull @cpuid_7_1) #3
  call void @mbcpuid(i32 noundef 36, i32 noundef 0, ptr noundef nonnull @cpuid_24_0) #3
  br label %.thread.preheader

.thread.preheader:                                ; preds = %0, %5, %3
  br label %.thread

.thread:                                          ; preds = %.thread.preheader, %17
  %indvars.iv = phi i64 [ %indvars.iv.next, %17 ], [ 0, %.thread.preheader ]
  %.01013 = phi i64 [ %.1, %17 ], [ 0, %.thread.preheader ]
  %6 = getelementptr inbounds [28 x %struct.anon], ptr @cpu_feature_detect.feat_tab, i64 0, i64 %indvars.iv
  %7 = load i32, ptr %6, align 8, !tbaa !10
  %8 = icmp ult i32 %2, %7
  br i1 %8, label %17, label %9

9:                                                ; preds = %.thread
  %10 = getelementptr inbounds i8, ptr %6, i64 16
  %11 = load ptr, ptr %10, align 8, !tbaa !14
  %12 = call i32 %11() #3
  %.not12 = icmp eq i32 %12, 0
  br i1 %.not12, label %17, label %13

13:                                               ; preds = %9
  %14 = getelementptr inbounds i8, ptr %6, i64 8
  %15 = load i64, ptr %14, align 8, !tbaa !15
  %16 = or i64 %15, %.01013
  br label %17

17:                                               ; preds = %9, %13, %.thread
  %.1 = phi i64 [ %.01013, %.thread ], [ %16, %13 ], [ %.01013, %9 ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, 28
  br i1 %exitcond.not, label %18, label %.thread, !llvm.loop !16

18:                                               ; preds = %17
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %1) #3
  ret i64 %.1
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @mbcpuid(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"cpuid_regs", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"", !7, i64 0, !12, i64 8, !13, i64 16}
!12 = !{!"long", !8, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!11, !13, i64 16}
!15 = !{!11, !12, i64 8}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass