; LLVM IR from tangjz/acm-icpc :: timus (1914)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZZ4mainE3mat = external hidden global [101 x [101 x i32]], align 16
@.str.2 = external hidden unnamed_addr constant [3 x i8], align 1
@_ZZ4mainE3ord = external hidden global [41 x i32], align 16
@_ZL3mod = external hidden constant [40 x i32], align 16
@.str.3 = external hidden unnamed_addr constant [27 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [6 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z3detiiPA101_i(i32 noundef, i32 noundef, ptr noundef) #2

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #3 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #6
  %9 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str.2, ptr noundef %2)
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #6
  store i32 0, ptr %3, align 4, !tbaa !5
  br label %10

10:                                               ; preds = %34, %0
  %11 = load i32, ptr %3, align 4, !tbaa !5
  %12 = load i32, ptr %2, align 4, !tbaa !5
  %13 = icmp slt i32 %11, %12
  br i1 %13, label %15, label %14

14:                                               ; preds = %10
  store i32 2, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #6
  br label %37

15:                                               ; preds = %10
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #6
  store i32 0, ptr %5, align 4, !tbaa !5
  br label %16

16:                                               ; preds = %30, %15
  %17 = load i32, ptr %5, align 4, !tbaa !5
  %18 = load i32, ptr %2, align 4, !tbaa !5
  %19 = icmp slt i32 %17, %18
  br i1 %19, label %21, label %20

20:                                               ; preds = %16
  store i32 5, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #6
  br label %33

21:                                               ; preds = %16
  %22 = load i32, ptr %3, align 4, !tbaa !5
  %23 = sext i32 %22 to i64
  %24 = getelementptr inbounds [101 x [101 x i32]], ptr @_ZZ4mainE3mat, i64 0, i64 %23
  %25 = getelementptr inbounds [101 x i32], ptr %24, i64 0, i64 0
  %26 = load i32, ptr %5, align 4, !tbaa !5
  %27 = sext i32 %26 to i64
  %28 = getelementptr inbounds i32, ptr %25, i64 %27
  %29 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str.2, ptr noundef %28)
  br label %30

30:                                               ; preds = %21
  %31 = load i32, ptr %5, align 4, !tbaa !5
  %32 = add nsw i32 %31, 1
  store i32 %32, ptr %5, align 4, !tbaa !5
  br label %16, !llvm.loop !9

33:                                               ; preds = %20
  br label %34

34:                                               ; preds = %33
  %35 = load i32, ptr %3, align 4, !tbaa !5
  %36 = add nsw i32 %35, 1
  store i32 %36, ptr %3, align 4, !tbaa !5
  br label %10, !llvm.loop !11

37:                                               ; preds = %14
  %38 = call i64 @time(ptr noundef null) #6
  %39 = trunc i64 %38 to i32
  call void @srand(i32 noundef %39) #6
  call void @_ZSt4iotaIPiiEvT_S1_T0_(ptr noundef @_ZZ4mainE3ord, ptr noundef getelementptr inbounds (i32, ptr @_ZZ4mainE3ord, i64 40), i32 noundef 0)
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #6
  store i32 0, ptr %6, align 4, !tbaa !5
  br label %40

40:                                               ; preds = %79, %37
  %41 = load i32, ptr %6, align 4, !tbaa !5
  %42 = icmp slt i32 %41, 5
  br i1 %42, label %44, label %43

43:                                               ; preds = %40
  store i32 8, ptr %4, align 4
  br label %82

44:                                               ; preds = %40
  %45 = load i32, ptr %6, align 4, !tbaa !5
  %46 = sext i32 %45 to i64
  %47 = getelementptr inbounds [41 x i32], ptr @_ZZ4mainE3ord, i64 0, i64 %46
  %48 = call i32 @rand() #6
  %49 = load i32, ptr %6, align 4, !tbaa !5
  %50 = sub nsw i32 40, %49
  %51 = srem i32 %48, %50
  %52 = load i32, ptr %6, align 4, !tbaa !5
  %53 = add nsw i32 %51, %52
  %54 = sext i32 %53 to i64
  %55 = getelementptr inbounds [41 x i32], ptr @_ZZ4mainE3ord, i64 0, i64 %54
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %47, ptr noundef nonnull align 4 dereferenceable(4) %55) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #6
  %56 = load i32, ptr %6, align 4, !tbaa !5
  %57 = sext i32 %56 to i64
  %58 = getelementptr inbounds [41 x i32], ptr @_ZZ4mainE3ord, i64 0, i64 %57
  %59 = load i32, ptr %58, align 4, !tbaa !5
  %60 = sext i32 %59 to i64
  %61 = getelementptr inbounds [40 x i32], ptr @_ZL3mod, i64 0, i64 %60
  %62 = load i32, ptr %61, align 4, !tbaa !5
  store i32 %62, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #6
  %63 = load i32, ptr %2, align 4, !tbaa !5
  %64 = load i32, ptr %7, align 4, !tbaa !5
  %65 = call noundef i32 @_Z3detiiPA101_i(i32 noundef %63, i32 noundef %64, ptr noundef @_ZZ4mainE3mat)
  store i32 %65, ptr %8, align 4, !tbaa !5
  %66 = load i32, ptr %8, align 4, !tbaa !5
  %67 = icmp ne i32 %66, 1
  br i1 %67, label %68, label %75

68:                                               ; preds = %44
  %69 = load i32, ptr %8, align 4, !tbaa !5
  %70 = load i32, ptr %7, align 4, !tbaa !5
  %71 = sub nsw i32 %70, 1
  %72 = icmp ne i32 %69, %71
  br i1 %72, label %73, label %75

73:                                               ; preds = %68
  %74 = call i32 @puts(ptr noundef @.str.3)
  store i32 0, ptr %1, align 4
  store i32 1, ptr %4, align 4
  br label %76

75:                                               ; preds = %68, %44
  store i32 0, ptr %4, align 4
  br label %76

76:                                               ; preds = %75, %73
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #6
  %77 = load i32, ptr %4, align 4
  switch i32 %77, label %82 [
    i32 0, label %78
  ]

78:                                               ; preds = %76
  br label %79

79:                                               ; preds = %78
  %80 = load i32, ptr %6, align 4, !tbaa !5
  %81 = add nsw i32 %80, 1
  store i32 %81, ptr %6, align 4, !tbaa !5
  br label %40, !llvm.loop !12

82:                                               ; preds = %76, %43
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #6
  %83 = load i32, ptr %4, align 4
  switch i32 %83, label %86 [
    i32 8, label %84
  ]

84:                                               ; preds = %82
  %85 = call i32 @puts(ptr noundef @.str.4)
  store i32 0, ptr %1, align 4
  store i32 1, ptr %4, align 4
  br label %86

86:                                               ; preds = %84, %82
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #6
  %87 = load i32, ptr %1, align 4
  ret i32 %87
}

declare i32 @__isoc99_scanf(ptr noundef, ...) #4

; Function Attrs: nounwind
declare void @srand(i32 noundef) #5

; Function Attrs: nounwind
declare i64 @time(ptr noundef) #5

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZSt4iotaIPiiEvT_S1_T0_(ptr noundef, ptr noundef, i32 noundef) #2

; Function Attrs: nounwind
declare i32 @rand() #5

declare i32 @puts(ptr noundef) #4

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZZ4mainE3mat = external hidden global [101 x [101 x i32]], align 16
@.str.2 = external hidden unnamed_addr constant [3 x i8], align 1
@_ZZ4mainE3ord = external hidden global [41 x i32], align 16
@_ZL3mod = external hidden local_unnamed_addr constant [40 x i32], align 16
@.str.3 = external hidden unnamed_addr constant [27 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [6 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z3detiiPA101_i(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: mustprogress norecurse nounwind uwtable
define dso_local noundef i32 @main() local_unnamed_addr #3 {
  %1 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #6
  %2 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str.2, ptr noundef nonnull %1)
  %3 = load i32, ptr %1, align 4, !tbaa !5
  %4 = icmp sgt i32 %3, 0
  br i1 %4, label %.preheader, label %._crit_edge31

.preheader:                                       ; preds = %0, %._crit_edge
  %5 = phi i32 [ %21, %._crit_edge ], [ %3, %0 ]
  %indvars.iv35 = phi i64 [ %indvars.iv.next36, %._crit_edge ], [ 0, %0 ]
  %6 = icmp sgt i32 %5, 0
  br i1 %6, label %.lr.ph, label %.preheader.._crit_edge_crit_edge

.preheader.._crit_edge_crit_edge:                 ; preds = %.preheader
  %.pre = sext i32 %5 to i64
  br label %._crit_edge

.lr.ph:                                           ; preds = %.preheader
  %7 = getelementptr inbounds [101 x [101 x i32]], ptr @_ZZ4mainE3mat, i64 0, i64 %indvars.iv35
  br label %23

._crit_edge31:                                    ; preds = %._crit_edge, %0
  %8 = call i64 @time(ptr noundef null) #6
  %9 = trunc i64 %8 to i32
  call void @srand(i32 noundef %9) #6
  call void @_ZSt4iotaIPiiEvT_S1_T0_(ptr noundef nonnull @_ZZ4mainE3ord, ptr noundef nonnull getelementptr inbounds (i8, ptr @_ZZ4mainE3ord, i64 160), i32 noundef 0)
  %10 = call i32 @rand() #6
  %11 = srem i32 %10, 40
  %12 = sext i32 %11 to i64
  %13 = getelementptr inbounds [41 x i32], ptr @_ZZ4mainE3ord, i64 0, i64 %12
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) @_ZZ4mainE3ord, ptr noundef nonnull align 4 dereferenceable(4) %13) #6
  %14 = load i32, ptr @_ZZ4mainE3ord, align 16, !tbaa !5
  %15 = sext i32 %14 to i64
  %16 = getelementptr inbounds [40 x i32], ptr @_ZL3mod, i64 0, i64 %15
  %17 = load i32, ptr %16, align 4, !tbaa !5
  %18 = load i32, ptr %1, align 4, !tbaa !5
  %19 = call noundef i32 @_Z3detiiPA101_i(i32 noundef %18, i32 noundef %17, ptr noundef nonnull @_ZZ4mainE3mat)
  %.not = icmp eq i32 %19, 1
  %20 = add nsw i32 %17, -1
  %.not26 = icmp eq i32 %19, %20
  %or.cond = select i1 %.not, i1 true, i1 %.not26
  br i1 %or.cond, label %29, label %.critedge

._crit_edge:                                      ; preds = %23, %.preheader.._crit_edge_crit_edge
  %.pre-phi = phi i64 [ %.pre, %.preheader.._crit_edge_crit_edge ], [ %27, %23 ]
  %21 = phi i32 [ %5, %.preheader.._crit_edge_crit_edge ], [ %26, %23 ]
  %indvars.iv.next36 = add nuw nsw i64 %indvars.iv35, 1
  %22 = icmp slt i64 %indvars.iv.next36, %.pre-phi
  br i1 %22, label %.preheader, label %._crit_edge31, !llvm.loop !9

23:                                               ; preds = %.lr.ph, %23
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %23 ]
  %24 = getelementptr inbounds i32, ptr %7, i64 %indvars.iv
  %25 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str.2, ptr noundef nonnull %24)
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %26 = load i32, ptr %1, align 4, !tbaa !5
  %27 = sext i32 %26 to i64
  %28 = icmp slt i64 %indvars.iv.next, %27
  br i1 %28, label %23, label %._crit_edge, !llvm.loop !12

29:                                               ; preds = %._crit_edge31
  %30 = call i32 @rand() #6
  %31 = srem i32 %30, 39
  %32 = add nsw i32 %31, 1
  %33 = sext i32 %32 to i64
  %34 = getelementptr inbounds [41 x i32], ptr @_ZZ4mainE3ord, i64 0, i64 %33
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) getelementptr inbounds (i8, ptr @_ZZ4mainE3ord, i64 4), ptr noundef nonnull align 4 dereferenceable(4) %34) #6
  %35 = load i32, ptr getelementptr inbounds (i8, ptr @_ZZ4mainE3ord, i64 4), align 4, !tbaa !5
  %36 = sext i32 %35 to i64
  %37 = getelementptr inbounds [40 x i32], ptr @_ZL3mod, i64 0, i64 %36
  %38 = load i32, ptr %37, align 4, !tbaa !5
  %39 = load i32, ptr %1, align 4, !tbaa !5
  %40 = call noundef i32 @_Z3detiiPA101_i(i32 noundef %39, i32 noundef %38, ptr noundef nonnull @_ZZ4mainE3mat)
  %.not.1 = icmp eq i32 %40, 1
  %41 = add nsw i32 %38, -1
  %.not26.1 = icmp eq i32 %40, %41
  %or.cond.1 = select i1 %.not.1, i1 true, i1 %.not26.1
  br i1 %or.cond.1, label %42, label %.critedge

42:                                               ; preds = %29
  %43 = call i32 @rand() #6
  %44 = srem i32 %43, 38
  %45 = add nsw i32 %44, 2
  %46 = sext i32 %45 to i64
  %47 = getelementptr inbounds [41 x i32], ptr @_ZZ4mainE3ord, i64 0, i64 %46
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) getelementptr inbounds (i8, ptr @_ZZ4mainE3ord, i64 8), ptr noundef nonnull align 4 dereferenceable(4) %47) #6
  %48 = load i32, ptr getelementptr inbounds (i8, ptr @_ZZ4mainE3ord, i64 8), align 8, !tbaa !5
  %49 = sext i32 %48 to i64
  %50 = getelementptr inbounds [40 x i32], ptr @_ZL3mod, i64 0, i64 %49
  %51 = load i32, ptr %50, align 4, !tbaa !5
  %52 = load i32, ptr %1, align 4, !tbaa !5
  %53 = call noundef i32 @_Z3detiiPA101_i(i32 noundef %52, i32 noundef %51, ptr noundef nonnull @_ZZ4mainE3mat)
  %.not.2 = icmp eq i32 %53, 1
  %54 = add nsw i32 %51, -1
  %.not26.2 = icmp eq i32 %53, %54
  %or.cond.2 = select i1 %.not.2, i1 true, i1 %.not26.2
  br i1 %or.cond.2, label %55, label %.critedge

55:                                               ; preds = %42
  %56 = call i32 @rand() #6
  %57 = srem i32 %56, 37
  %58 = add nsw i32 %57, 3
  %59 = sext i32 %58 to i64
  %60 = getelementptr inbounds [41 x i32], ptr @_ZZ4mainE3ord, i64 0, i64 %59
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) getelementptr inbounds (i8, ptr @_ZZ4mainE3ord, i64 12), ptr noundef nonnull align 4 dereferenceable(4) %60) #6
  %61 = load i32, ptr getelementptr inbounds (i8, ptr @_ZZ4mainE3ord, i64 12), align 4, !tbaa !5
  %62 = sext i32 %61 to i64
  %63 = getelementptr inbounds [40 x i32], ptr @_ZL3mod, i64 0, i64 %62
  %64 = load i32, ptr %63, align 4, !tbaa !5
  %65 = load i32, ptr %1, align 4, !tbaa !5
  %66 = call noundef i32 @_Z3detiiPA101_i(i32 noundef %65, i32 noundef %64, ptr noundef nonnull @_ZZ4mainE3mat)
  %.not.3 = icmp eq i32 %66, 1
  %67 = add nsw i32 %64, -1
  %.not26.3 = icmp eq i32 %66, %67
  %or.cond.3 = select i1 %.not.3, i1 true, i1 %.not26.3
  br i1 %or.cond.3, label %68, label %.critedge

68:                                               ; preds = %55
  %69 = call i32 @rand() #6
  %70 = srem i32 %69, 36
  %71 = add nsw i32 %70, 4
  %72 = sext i32 %71 to i64
  %73 = getelementptr inbounds [41 x i32], ptr @_ZZ4mainE3ord, i64 0, i64 %72
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) getelementptr inbounds (i8, ptr @_ZZ4mainE3ord, i64 16), ptr noundef nonnull align 4 dereferenceable(4) %73) #6
  %74 = load i32, ptr getelementptr inbounds (i8, ptr @_ZZ4mainE3ord, i64 16), align 16, !tbaa !5
  %75 = sext i32 %74 to i64
  %76 = getelementptr inbounds [40 x i32], ptr @_ZL3mod, i64 0, i64 %75
  %77 = load i32, ptr %76, align 4, !tbaa !5
  %78 = load i32, ptr %1, align 4, !tbaa !5
  %79 = call noundef i32 @_Z3detiiPA101_i(i32 noundef %78, i32 noundef %77, ptr noundef nonnull @_ZZ4mainE3mat)
  %.not.4 = icmp eq i32 %79, 1
  %80 = add nsw i32 %77, -1
  %.not26.4 = icmp eq i32 %79, %80
  %or.cond.4 = select i1 %.not.4, i1 true, i1 %.not26.4
  br i1 %or.cond.4, label %.critedge28, label %.critedge

.critedge:                                        ; preds = %68, %55, %42, %29, %._crit_edge31
  br label %.critedge28

.critedge28:                                      ; preds = %68, %.critedge
  %.str.3.sink = phi ptr [ @.str.3, %.critedge ], [ @.str.4, %68 ]
  %81 = call i32 @puts(ptr noundef nonnull dereferenceable(1) %.str.3.sink)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #6
  ret i32 0
}

; Function Attrs: nofree nounwind
declare noundef i32 @__isoc99_scanf(ptr nocapture noundef readonly, ...) local_unnamed_addr #4

; Function Attrs: nounwind
declare void @srand(i32 noundef) local_unnamed_addr #5

; Function Attrs: nounwind
declare i64 @time(ptr noundef) local_unnamed_addr #5

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZSt4iotaIPiiEvT_S1_T0_(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: nounwind
declare i32 @rand() local_unnamed_addr #5

; Function Attrs: nofree nounwind
declare noundef i32 @puts(ptr nocapture noundef readonly) local_unnamed_addr #4

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10, !11}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.unswitch.partial.disable"}
!12 = distinct !{!12, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SCCPPass,SROAPass,SimpleLoopUnswitchPass,SimplifyCFGPass