; LLVM IR from ubaldot/defrecs :: stm32f4x/ADC_Readings/Drivers/CMSIS/DSP/Source/FastMathFunctions (q15)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i32 @arm_atan2_q15(i16 noundef signext %0, i16 noundef signext %1, ptr noundef %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca i16, align 2
  %6 = alloca i16, align 2
  %7 = alloca ptr, align 8
  store i16 %0, ptr %5, align 2, !tbaa !5
  store i16 %1, ptr %6, align 2, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !9
  %8 = load i16, ptr %6, align 2, !tbaa !5
  %9 = sext i16 %8 to i32
  %10 = icmp sgt i32 %9, 0
  br i1 %10, label %11, label %16

11:                                               ; preds = %3
  %12 = load i16, ptr %5, align 2, !tbaa !5
  %13 = load i16, ptr %6, align 2, !tbaa !5
  %14 = call signext i16 @arm_atan_q15(i16 noundef signext %12, i16 noundef signext %13)
  %15 = load ptr, ptr %7, align 8, !tbaa !9
  store i16 %14, ptr %15, align 2, !tbaa !5
  store i32 0, ptr %4, align 4
  br label %73

16:                                               ; preds = %3
  %17 = load i16, ptr %6, align 2, !tbaa !5
  %18 = sext i16 %17 to i32
  %19 = icmp slt i32 %18, 0
  br i1 %19, label %20, label %55

20:                                               ; preds = %16
  %21 = load i16, ptr %5, align 2, !tbaa !5
  %22 = sext i16 %21 to i32
  %23 = icmp sgt i32 %22, 0
  br i1 %23, label %24, label %32

24:                                               ; preds = %20
  %25 = load i16, ptr %5, align 2, !tbaa !5
  %26 = load i16, ptr %6, align 2, !tbaa !5
  %27 = call signext i16 @arm_atan_q15(i16 noundef signext %25, i16 noundef signext %26)
  %28 = sext i16 %27 to i32
  %29 = add nsw i32 %28, 25736
  %30 = trunc i32 %29 to i16
  %31 = load ptr, ptr %7, align 8, !tbaa !9
  store i16 %30, ptr %31, align 2, !tbaa !5
  br label %54

32:                                               ; preds = %20
  %33 = load i16, ptr %5, align 2, !tbaa !5
  %34 = sext i16 %33 to i32
  %35 = icmp slt i32 %34, 0
  br i1 %35, label %36, label %44

36:                                               ; preds = %32
  %37 = load i16, ptr %5, align 2, !tbaa !5
  %38 = load i16, ptr %6, align 2, !tbaa !5
  %39 = call signext i16 @arm_atan_q15(i16 noundef signext %37, i16 noundef signext %38)
  %40 = sext i16 %39 to i32
  %41 = sub nsw i32 %40, 25736
  %42 = trunc i32 %41 to i16
  %43 = load ptr, ptr %7, align 8, !tbaa !9
  store i16 %42, ptr %43, align 2, !tbaa !5
  br label %53

44:                                               ; preds = %32
  %45 = load i16, ptr %5, align 2, !tbaa !5
  %46 = sext i16 %45 to i32
  %47 = icmp slt i32 %46, 0
  br i1 %47, label %48, label %50

48:                                               ; preds = %44
  %49 = load ptr, ptr %7, align 8, !tbaa !9
  store i16 -25736, ptr %49, align 2, !tbaa !5
  br label %52

50:                                               ; preds = %44
  %51 = load ptr, ptr %7, align 8, !tbaa !9
  store i16 25736, ptr %51, align 2, !tbaa !5
  br label %52

52:                                               ; preds = %50, %48
  br label %53

53:                                               ; preds = %52, %36
  br label %54

54:                                               ; preds = %53, %24
  store i32 0, ptr %4, align 4
  br label %73

55:                                               ; preds = %16
  %56 = load i16, ptr %6, align 2, !tbaa !5
  %57 = sext i16 %56 to i32
  %58 = icmp eq i32 %57, 0
  br i1 %58, label %59, label %72

59:                                               ; preds = %55
  %60 = load i16, ptr %5, align 2, !tbaa !5
  %61 = sext i16 %60 to i32
  %62 = icmp sgt i32 %61, 0
  br i1 %62, label %63, label %65

63:                                               ; preds = %59
  %64 = load ptr, ptr %7, align 8, !tbaa !9
  store i16 12868, ptr %64, align 2, !tbaa !5
  store i32 0, ptr %4, align 4
  br label %73

65:                                               ; preds = %59
  %66 = load i16, ptr %5, align 2, !tbaa !5
  %67 = sext i16 %66 to i32
  %68 = icmp slt i32 %67, 0
  br i1 %68, label %69, label %71

69:                                               ; preds = %65
  %70 = load ptr, ptr %7, align 8, !tbaa !9
  store i16 -12868, ptr %70, align 2, !tbaa !5
  store i32 0, ptr %4, align 4
  br label %73

71:                                               ; preds = %65
  br label %72

72:                                               ; preds = %71, %55
  store i32 -4, ptr %4, align 4
  br label %73

73:                                               ; preds = %72, %69, %63, %54, %11
  %74 = load i32, ptr %4, align 4
  ret i32 %74
}

; Function Attrs: alwaysinline nounwind uwtable
declare hidden signext i16 @arm_atan_q15(i16 noundef signext, i16 noundef signext) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"short", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local range(i32 -4, 1) i32 @arm_atan2_q15(i16 noundef signext %0, i16 noundef signext %1, ptr nocapture noundef writeonly %2) local_unnamed_addr #0 {
  %4 = icmp sgt i16 %1, 0
  br i1 %4, label %5, label %7

5:                                                ; preds = %3
  %6 = tail call signext i16 @arm_atan_q15(i16 noundef signext %0, i16 noundef signext %1)
  br label %.sink.split

7:                                                ; preds = %3
  %8 = icmp slt i16 %1, 0
  %9 = icmp sgt i16 %0, 0
  br i1 %8, label %10, label %19

10:                                               ; preds = %7
  br i1 %9, label %11, label %14

11:                                               ; preds = %10
  %12 = tail call signext i16 @arm_atan_q15(i16 noundef signext %0, i16 noundef signext %1)
  %13 = add i16 %12, 25736
  br label %.sink.split

14:                                               ; preds = %10
  %15 = icmp slt i16 %0, 0
  br i1 %15, label %16, label %.sink.split

16:                                               ; preds = %14
  %17 = tail call signext i16 @arm_atan_q15(i16 noundef signext %0, i16 noundef signext %1)
  %18 = add i16 %17, -25736
  br label %.sink.split

19:                                               ; preds = %7
  br i1 %9, label %.sink.split, label %20

20:                                               ; preds = %19
  %21 = icmp slt i16 %0, 0
  br i1 %21, label %.sink.split, label %22

.sink.split:                                      ; preds = %20, %19, %14, %5, %16, %11
  %.sink = phi i16 [ %13, %11 ], [ %18, %16 ], [ %6, %5 ], [ 25736, %14 ], [ 12868, %19 ], [ -12868, %20 ]
  store i16 %.sink, ptr %2, align 2, !tbaa !5
  br label %22

22:                                               ; preds = %.sink.split, %20
  %.0 = phi i32 [ -4, %20 ], [ 0, %.sink.split ]
  ret i32 %.0
}

; Function Attrs: alwaysinline nounwind uwtable
declare hidden signext i16 @arm_atan_q15(i16 noundef signext, i16 noundef signext) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"short", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass