; LLVM IR from tangjz/acm-icpc :: codeforces/complete/1033D.ll (Z11pollard_rhox)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZZ11pollard_rhoxE3seq = external hidden global [1000001 x i64], align 16

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z7mod_addxxx(i64 noundef, i64 noundef, i64 noundef) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z7mod_mulxxx(i64 noundef, i64 noundef, i64 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z3gcdxx(i64 noundef, i64 noundef) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z11pollard_rhox(i64 noundef %0) #2 {
  %2 = alloca i64, align 8
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca i32, align 4
  store i64 %0, ptr %3, align 8, !tbaa !5
  br label %13

13:                                               ; preds = %101, %1
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #5
  %14 = call i32 @rand() #5
  %15 = sext i32 %14 to i64
  %16 = load i64, ptr %3, align 8, !tbaa !5
  %17 = srem i64 %15, %16
  store i64 %17, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #5
  %18 = load i64, ptr %4, align 8, !tbaa !5
  store i64 %18, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #5
  %19 = call i32 @rand() #5
  %20 = sext i32 %19 to i64
  %21 = load i64, ptr %3, align 8, !tbaa !5
  %22 = srem i64 %20, %21
  store i64 %22, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #5
  store ptr @_ZZ11pollard_rhoxE3seq, ptr %7, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #5
  store ptr @_ZZ11pollard_rhoxE3seq, ptr %8, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #5
  store i64 0, ptr %9, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #5
  store i64 1, ptr %10, align 8, !tbaa !5
  br label %23

23:                                               ; preds = %83, %13
  br label %24

24:                                               ; preds = %23
  %25 = load i64, ptr %5, align 8, !tbaa !5
  %26 = load i64, ptr %5, align 8, !tbaa !5
  %27 = load i64, ptr %3, align 8, !tbaa !5
  %28 = call noundef i64 @_Z7mod_mulxxx(i64 noundef %25, i64 noundef %26, i64 noundef %27)
  %29 = load i64, ptr %6, align 8, !tbaa !5
  %30 = load i64, ptr %3, align 8, !tbaa !5
  %31 = call noundef i64 @_Z7mod_addxxx(i64 noundef %28, i64 noundef %29, i64 noundef %30)
  store i64 %31, ptr %5, align 8, !tbaa !5
  %32 = load ptr, ptr %8, align 8, !tbaa !9
  %33 = getelementptr inbounds i64, ptr %32, i32 1
  store ptr %33, ptr %8, align 8, !tbaa !9
  store i64 %31, ptr %32, align 8, !tbaa !5
  %34 = load i64, ptr %5, align 8, !tbaa !5
  %35 = load i64, ptr %5, align 8, !tbaa !5
  %36 = load i64, ptr %3, align 8, !tbaa !5
  %37 = call noundef i64 @_Z7mod_mulxxx(i64 noundef %34, i64 noundef %35, i64 noundef %36)
  %38 = load i64, ptr %6, align 8, !tbaa !5
  %39 = load i64, ptr %3, align 8, !tbaa !5
  %40 = call noundef i64 @_Z7mod_addxxx(i64 noundef %37, i64 noundef %38, i64 noundef %39)
  store i64 %40, ptr %5, align 8, !tbaa !5
  %41 = load ptr, ptr %8, align 8, !tbaa !9
  %42 = getelementptr inbounds i64, ptr %41, i32 1
  store ptr %42, ptr %8, align 8, !tbaa !9
  store i64 %40, ptr %41, align 8, !tbaa !5
  %43 = load ptr, ptr %7, align 8, !tbaa !9
  %44 = getelementptr inbounds i64, ptr %43, i32 1
  store ptr %44, ptr %7, align 8, !tbaa !9
  %45 = load i64, ptr %43, align 8, !tbaa !5
  store i64 %45, ptr %4, align 8, !tbaa !5
  %46 = load i64, ptr %5, align 8, !tbaa !5
  %47 = icmp eq i64 %45, %46
  br i1 %47, label %48, label %49

48:                                               ; preds = %24
  br label %84

49:                                               ; preds = %24
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #5
  %50 = load i64, ptr %10, align 8, !tbaa !5
  store i64 %50, ptr %11, align 8, !tbaa !5
  %51 = load i64, ptr %10, align 8, !tbaa !5
  %52 = load i64, ptr %5, align 8, !tbaa !5
  %53 = load i64, ptr %4, align 8, !tbaa !5
  %54 = sub nsw i64 %52, %53
  %55 = call noundef i64 @_ZSt3absx(i64 noundef %54)
  %56 = load i64, ptr %3, align 8, !tbaa !5
  %57 = call noundef i64 @_Z7mod_mulxxx(i64 noundef %51, i64 noundef %55, i64 noundef %56)
  store i64 %57, ptr %10, align 8, !tbaa !5
  %58 = load i64, ptr %10, align 8, !tbaa !5
  %59 = icmp ne i64 %58, 0
  br i1 %59, label %64, label %60

60:                                               ; preds = %49
  %61 = load i64, ptr %11, align 8, !tbaa !5
  %62 = load i64, ptr %3, align 8, !tbaa !5
  %63 = call noundef i64 @_Z3gcdxx(i64 noundef %61, i64 noundef %62)
  store i64 %63, ptr %2, align 8
  store i32 1, ptr %12, align 4
  br label %81

64:                                               ; preds = %49
  %65 = load i64, ptr %9, align 8, !tbaa !5
  %66 = add nsw i64 %65, 1
  store i64 %66, ptr %9, align 8, !tbaa !5
  %67 = icmp eq i64 %66, 25
  br i1 %67, label %68, label %80

68:                                               ; preds = %64
  %69 = load i64, ptr %10, align 8, !tbaa !5
  %70 = load i64, ptr %3, align 8, !tbaa !5
  %71 = call noundef i64 @_Z3gcdxx(i64 noundef %69, i64 noundef %70)
  store i64 %71, ptr %10, align 8, !tbaa !5
  %72 = icmp sgt i64 %71, 1
  br i1 %72, label %73, label %79

73:                                               ; preds = %68
  %74 = load i64, ptr %10, align 8, !tbaa !5
  %75 = load i64, ptr %3, align 8, !tbaa !5
  %76 = icmp slt i64 %74, %75
  br i1 %76, label %77, label %79

77:                                               ; preds = %73
  %78 = load i64, ptr %10, align 8, !tbaa !5
  store i64 %78, ptr %2, align 8
  store i32 1, ptr %12, align 4
  br label %81

79:                                               ; preds = %73, %68
  store i64 0, ptr %9, align 8, !tbaa !5
  br label %80

80:                                               ; preds = %79, %64
  store i32 0, ptr %12, align 4
  br label %81

81:                                               ; preds = %80, %77, %60
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #5
  %82 = load i32, ptr %12, align 4
  switch i32 %82, label %99 [
    i32 0, label %83
  ]

83:                                               ; preds = %81
  br label %23, !llvm.loop !11

84:                                               ; preds = %48
  %85 = load i64, ptr %9, align 8, !tbaa !5
  %86 = icmp ne i64 %85, 0
  br i1 %86, label %87, label %98

87:                                               ; preds = %84
  %88 = load i64, ptr %10, align 8, !tbaa !5
  %89 = load i64, ptr %3, align 8, !tbaa !5
  %90 = call noundef i64 @_Z3gcdxx(i64 noundef %88, i64 noundef %89)
  store i64 %90, ptr %10, align 8, !tbaa !5
  %91 = icmp sgt i64 %90, 1
  br i1 %91, label %92, label %98

92:                                               ; preds = %87
  %93 = load i64, ptr %10, align 8, !tbaa !5
  %94 = load i64, ptr %3, align 8, !tbaa !5
  %95 = icmp slt i64 %93, %94
  br i1 %95, label %96, label %98

96:                                               ; preds = %92
  %97 = load i64, ptr %10, align 8, !tbaa !5
  store i64 %97, ptr %2, align 8
  store i32 1, ptr %12, align 4
  br label %99

98:                                               ; preds = %92, %87, %84
  store i32 0, ptr %12, align 4
  br label %99

99:                                               ; preds = %98, %96, %81
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #5
  %100 = load i32, ptr %12, align 4
  switch i32 %100, label %104 [
    i32 0, label %101
    i32 1, label %102
  ]

101:                                              ; preds = %99
  br label %13, !llvm.loop !13

102:                                              ; preds = %99
  %103 = load i64, ptr %2, align 8
  ret i64 %103

104:                                              ; preds = %99
  unreachable
}

; Function Attrs: nounwind
declare i32 @rand() #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZSt3absx(i64 noundef) #4

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZZ11pollard_rhoxE3seq = external hidden local_unnamed_addr global [1000001 x i64], align 16

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z7mod_addxxx(i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z7mod_mulxxx(i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z3gcdxx(i64 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z11pollard_rhox(i64 noundef %0) local_unnamed_addr #0 {
  br label %2

2:                                                ; preds = %.backedge95, %1
  %3 = tail call i32 @rand() #3
  %4 = sext i32 %3 to i64
  %5 = srem i64 %4, %0
  %6 = tail call i32 @rand() #3
  %7 = sext i32 %6 to i64
  %8 = srem i64 %7, %0
  br label %9

9:                                                ; preds = %.backedge, %2
  %.049 = phi i64 [ %5, %2 ], [ %14, %.backedge ]
  %.048 = phi ptr [ @_ZZ11pollard_rhoxE3seq, %2 ], [ %16, %.backedge ]
  %.047 = phi ptr [ @_ZZ11pollard_rhoxE3seq, %2 ], [ %15, %.backedge ]
  %.044 = phi i64 [ 0, %2 ], [ %.044.be, %.backedge ]
  %.041 = phi i64 [ 1, %2 ], [ %.041.be, %.backedge ]
  %10 = tail call noundef i64 @_Z7mod_mulxxx(i64 noundef %.049, i64 noundef %.049, i64 noundef %0)
  %11 = tail call noundef i64 @_Z7mod_addxxx(i64 noundef %10, i64 noundef %8, i64 noundef %0)
  %12 = getelementptr inbounds i8, ptr %.047, i64 8
  store i64 %11, ptr %.047, align 8, !tbaa !5
  %13 = tail call noundef i64 @_Z7mod_mulxxx(i64 noundef %11, i64 noundef %11, i64 noundef %0)
  %14 = tail call noundef i64 @_Z7mod_addxxx(i64 noundef %13, i64 noundef %8, i64 noundef %0)
  %15 = getelementptr inbounds i8, ptr %.047, i64 16
  store i64 %14, ptr %12, align 8, !tbaa !5
  %16 = getelementptr inbounds i8, ptr %.048, i64 8
  %17 = load i64, ptr %.048, align 8, !tbaa !5
  %18 = icmp eq i64 %17, %14
  br i1 %18, label %32, label %19

19:                                               ; preds = %9
  %20 = sub nsw i64 %14, %17
  %21 = tail call noundef i64 @_ZSt3absx(i64 noundef %20)
  %22 = tail call noundef i64 @_Z7mod_mulxxx(i64 noundef %.041, i64 noundef %21, i64 noundef %0)
  %.not = icmp eq i64 %22, 0
  br i1 %.not, label %23, label %25

23:                                               ; preds = %19
  %24 = tail call noundef i64 @_Z3gcdxx(i64 noundef %.041, i64 noundef %0)
  br label %.thread

25:                                               ; preds = %19
  %26 = add nsw i64 %.044, 1
  %27 = icmp eq i64 %26, 25
  br i1 %27, label %28, label %.backedge

28:                                               ; preds = %25
  %29 = tail call noundef i64 @_Z3gcdxx(i64 noundef %22, i64 noundef %0)
  %30 = icmp sgt i64 %29, 1
  %31 = icmp slt i64 %29, %0
  %or.cond = and i1 %30, %31
  br i1 %or.cond, label %.thread, label %.backedge

.backedge:                                        ; preds = %28, %25
  %.044.be = phi i64 [ 0, %28 ], [ %26, %25 ]
  %.041.be = phi i64 [ %29, %28 ], [ %22, %25 ]
  br label %9, !llvm.loop !9

32:                                               ; preds = %9
  %.not58 = icmp eq i64 %.044, 0
  br i1 %.not58, label %.backedge95, label %33

.backedge95:                                      ; preds = %32, %33
  br label %2

33:                                               ; preds = %32
  %34 = tail call noundef i64 @_Z3gcdxx(i64 noundef %.041, i64 noundef %0)
  %35 = icmp sgt i64 %34, 1
  %36 = icmp slt i64 %34, %0
  %or.cond59 = and i1 %35, %36
  br i1 %or.cond59, label %.thread, label %.backedge95

.thread:                                          ; preds = %33, %28, %23
  %.3.ph = phi i64 [ %24, %23 ], [ %29, %28 ], [ %34, %33 ]
  ret i64 %.3.ph
}

; Function Attrs: nounwind
declare i32 @rand() local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZSt3absx(i64 noundef) local_unnamed_addr #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass