; LLVM IR from mitdbg/deneva :: system/txn.ll (ZN10TxnManager17received_responseE2RC)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.TxnManager = type { ptr, ptr, ptr, i8, ptr, i32, i8, i32, i32, i8, i64, i64, i64, i64, ptr, ptr, ptr, i64, i8, i8, ptr, ptr, i64, i64, i64, %class.TxnStats, i32, i32, i32, i8, i32, %class.Array.0, i32, ptr, ptr, i32, %union.sem_t }
%class.TxnStats = type { i64, i64, i64, i64, i64, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, i64, i64, double, double, double, double, double, double, double, double }
%class.Array.0 = type { ptr, i64, i64 }
%union.sem_t = type { i64, [24 x i8] }
%class.Transaction = type <{ %class.Array, i64, i64, i64, i64, i64, i32, [4 x i8], %class.Array.0, i64, i64, i32, [4 x i8] }>
%class.Array = type { ptr, i64, i64 }

@.str.1 = external hidden unnamed_addr constant [62 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [36 x i8], align 1
@__PRETTY_FUNCTION__._ZN10TxnManager17received_responseE2RC = external hidden unnamed_addr constant [38 x i8], align 1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_ZN10TxnManager17received_responseE2RC(ptr noundef nonnull align 8 dereferenceable(544) %0, i32 noundef %1) #1 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  %5 = load ptr, ptr %3, align 8
  %6 = getelementptr inbounds %class.TxnManager, ptr %5, i32 0, i32 20
  %7 = load ptr, ptr %6, align 8, !tbaa !11
  %8 = getelementptr inbounds %class.Transaction, ptr %7, i32 0, i32 11
  %9 = load i32, ptr %8, align 8, !tbaa !21
  %10 = icmp eq i32 %9, 0
  br i1 %10, label %17, label %11

11:                                               ; preds = %2
  %12 = getelementptr inbounds %class.TxnManager, ptr %5, i32 0, i32 20
  %13 = load ptr, ptr %12, align 8, !tbaa !11
  %14 = getelementptr inbounds %class.Transaction, ptr %13, i32 0, i32 11
  %15 = load i32, ptr %14, align 8, !tbaa !21
  %16 = icmp eq i32 %15, 2
  br label %17

17:                                               ; preds = %11, %2
  %18 = phi i1 [ true, %2 ], [ %16, %11 ]
  br i1 %18, label %19, label %20

19:                                               ; preds = %17
  br label %22

20:                                               ; preds = %17
  call void @__assert_fail(ptr noundef @.str.5, ptr noundef @.str.1, i32 noundef 545, ptr noundef @__PRETTY_FUNCTION__._ZN10TxnManager17received_responseE2RC) #2
  unreachable

21:                                               ; No predecessors!
  br label %22

22:                                               ; preds = %21, %19
  %23 = getelementptr inbounds %class.TxnManager, ptr %5, i32 0, i32 20
  %24 = load ptr, ptr %23, align 8, !tbaa !11
  %25 = getelementptr inbounds %class.Transaction, ptr %24, i32 0, i32 11
  %26 = load i32, ptr %25, align 8, !tbaa !21
  %27 = icmp eq i32 %26, 0
  br i1 %27, label %28, label %33

28:                                               ; preds = %22
  %29 = load i32, ptr %4, align 4, !tbaa !9
  %30 = getelementptr inbounds %class.TxnManager, ptr %5, i32 0, i32 20
  %31 = load ptr, ptr %30, align 8, !tbaa !11
  %32 = getelementptr inbounds %class.Transaction, ptr %31, i32 0, i32 11
  store i32 %29, ptr %32, align 8, !tbaa !21
  br label %33

33:                                               ; preds = %28, %22
  %34 = getelementptr inbounds %class.TxnManager, ptr %5, i32 0, i32 32
  %35 = load i32, ptr %34, align 8, !tbaa !25
  %36 = add nsw i32 %35, -1
  store i32 %36, ptr %34, align 8, !tbaa !25
  %37 = getelementptr inbounds %class.TxnManager, ptr %5, i32 0, i32 32
  %38 = load i32, ptr %37, align 8, !tbaa !25
  ret i32 %38
}

attributes #0 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_ZTS2RC", !7, i64 0}
!11 = !{!12, !6, i64 136}
!12 = !{!"_ZTS10TxnManager", !6, i64 8, !6, i64 16, !13, i64 24, !6, i64 32, !14, i64 40, !13, i64 44, !14, i64 48, !14, i64 52, !13, i64 56, !15, i64 64, !15, i64 72, !15, i64 80, !15, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !15, i64 120, !13, i64 128, !13, i64 129, !6, i64 136, !6, i64 144, !15, i64 152, !15, i64 160, !15, i64 168, !16, i64 176, !14, i64 432, !14, i64 436, !14, i64 440, !13, i64 444, !18, i64 448, !19, i64 456, !14, i64 480, !6, i64 488, !6, i64 496, !20, i64 504, !7, i64 512}
!13 = !{!"bool", !7, i64 0}
!14 = !{!"int", !7, i64 0}
!15 = !{!"long", !7, i64 0}
!16 = !{!"_ZTS8TxnStats", !15, i64 0, !15, i64 8, !15, i64 16, !15, i64 24, !15, i64 32, !17, i64 40, !17, i64 48, !17, i64 56, !17, i64 64, !17, i64 72, !17, i64 80, !17, i64 88, !17, i64 96, !17, i64 104, !17, i64 112, !17, i64 120, !17, i64 128, !17, i64 136, !17, i64 144, !17, i64 152, !17, i64 160, !17, i64 168, !15, i64 176, !15, i64 184, !17, i64 192, !17, i64 200, !17, i64 208, !17, i64 216, !17, i64 224, !17, i64 232, !17, i64 240, !17, i64 248}
!17 = !{!"double", !7, i64 0}
!18 = !{!"_ZTS12CALVIN_PHASE", !7, i64 0}
!19 = !{!"_ZTS5ArrayIP5row_tE", !6, i64 0, !15, i64 8, !15, i64 16}
!20 = !{!"_ZTS8access_t", !7, i64 0}
!21 = !{!22, !10, i64 112}
!22 = !{!"_ZTS11Transaction", !23, i64 0, !15, i64 24, !15, i64 32, !15, i64 40, !15, i64 48, !15, i64 56, !24, i64 64, !19, i64 72, !15, i64 96, !15, i64 104, !10, i64 112}
!23 = !{!"_ZTS5ArrayIP6AccessE", !6, i64 0, !15, i64 8, !15, i64 16}
!24 = !{!"_ZTS8TxnState", !7, i64 0}
!25 = !{!12, !14, i64 480}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [62 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [36 x i8], align 1
@__PRETTY_FUNCTION__._ZN10TxnManager17received_responseE2RC = external hidden unnamed_addr constant [38 x i8], align 1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef range(i32 -2147483648, 2147483647) i32 @_ZN10TxnManager17received_responseE2RC(ptr nocapture noundef nonnull align 8 dereferenceable(544) %0, i32 noundef %1) local_unnamed_addr #1 align 2 {
  %3 = getelementptr inbounds i8, ptr %0, i64 136
  %4 = load ptr, ptr %3, align 8, !tbaa !5
  %5 = getelementptr inbounds i8, ptr %4, i64 112
  %6 = load i32, ptr %5, align 8, !tbaa !18
  switch i32 %6, label %7 [
    i32 0, label %8
    i32 2, label %9
  ]

7:                                                ; preds = %2
  tail call void @__assert_fail(ptr noundef nonnull @.str.5, ptr noundef nonnull @.str.1, i32 noundef 545, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN10TxnManager17received_responseE2RC) #2
  unreachable

8:                                                ; preds = %2
  store i32 %1, ptr %5, align 8, !tbaa !18
  br label %9

9:                                                ; preds = %2, %8
  %10 = getelementptr inbounds i8, ptr %0, i64 480
  %11 = load i32, ptr %10, align 8, !tbaa !23
  %12 = add nsw i32 %11, -1
  store i32 %12, ptr %10, align 8, !tbaa !23
  ret i32 %12
}

attributes #0 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 136}
!6 = !{!"_ZTS10TxnManager", !7, i64 8, !7, i64 16, !10, i64 24, !7, i64 32, !11, i64 40, !10, i64 44, !11, i64 48, !11, i64 52, !10, i64 56, !12, i64 64, !12, i64 72, !12, i64 80, !12, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !12, i64 120, !10, i64 128, !10, i64 129, !7, i64 136, !7, i64 144, !12, i64 152, !12, i64 160, !12, i64 168, !13, i64 176, !11, i64 432, !11, i64 436, !11, i64 440, !10, i64 444, !15, i64 448, !16, i64 456, !11, i64 480, !7, i64 488, !7, i64 496, !17, i64 504, !8, i64 512}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"bool", !8, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!"long", !8, i64 0}
!13 = !{!"_ZTS8TxnStats", !12, i64 0, !12, i64 8, !12, i64 16, !12, i64 24, !12, i64 32, !14, i64 40, !14, i64 48, !14, i64 56, !14, i64 64, !14, i64 72, !14, i64 80, !14, i64 88, !14, i64 96, !14, i64 104, !14, i64 112, !14, i64 120, !14, i64 128, !14, i64 136, !14, i64 144, !14, i64 152, !14, i64 160, !14, i64 168, !12, i64 176, !12, i64 184, !14, i64 192, !14, i64 200, !14, i64 208, !14, i64 216, !14, i64 224, !14, i64 232, !14, i64 240, !14, i64 248}
!14 = !{!"double", !8, i64 0}
!15 = !{!"_ZTS12CALVIN_PHASE", !8, i64 0}
!16 = !{!"_ZTS5ArrayIP5row_tE", !7, i64 0, !12, i64 8, !12, i64 16}
!17 = !{!"_ZTS8access_t", !8, i64 0}
!18 = !{!19, !22, i64 112}
!19 = !{!"_ZTS11Transaction", !20, i64 0, !12, i64 24, !12, i64 32, !12, i64 40, !12, i64 48, !12, i64 56, !21, i64 64, !16, i64 72, !12, i64 96, !12, i64 104, !22, i64 112}
!20 = !{!"_ZTS5ArrayIP6AccessE", !7, i64 0, !12, i64 8, !12, i64 16}
!21 = !{!"_ZTS8TxnState", !8, i64 0}
!22 = !{!"_ZTS2RC", !8, i64 0}
!23 = !{!6, !11, i64 480}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass