; LLVM IR from Yinxiaoli/iros2015_folding :: src/folding_planner_cmake/project/2dregistration_v2 (mesh2d)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.SHalfEdge = type { ptr, ptr, ptr, ptr, ptr, i32, i32, i8, i8 }
%struct.SVertex = type { ptr, i8, i32, i8, i8 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z26testEdgeFlipRetainManifoldPK9SHalfEdge(ptr noundef %0) #1 {
  %2 = alloca i1, align 1
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #2
  %11 = load ptr, ptr %3, align 8, !tbaa !5
  %12 = getelementptr inbounds %struct.SHalfEdge, ptr %11, i32 0, i32 3
  %13 = load ptr, ptr %12, align 8, !tbaa !9
  %14 = getelementptr inbounds %struct.SHalfEdge, ptr %13, i32 0, i32 1
  %15 = load ptr, ptr %14, align 8, !tbaa !13
  store ptr %15, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #2
  %16 = load ptr, ptr %3, align 8, !tbaa !5
  %17 = getelementptr inbounds %struct.SHalfEdge, ptr %16, i32 0, i32 0
  %18 = load ptr, ptr %17, align 8, !tbaa !14
  %19 = getelementptr inbounds %struct.SHalfEdge, ptr %18, i32 0, i32 3
  %20 = load ptr, ptr %19, align 8, !tbaa !9
  %21 = getelementptr inbounds %struct.SHalfEdge, ptr %20, i32 0, i32 1
  %22 = load ptr, ptr %21, align 8, !tbaa !13
  store ptr %22, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #2
  %23 = load ptr, ptr %4, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.SVertex, ptr %23, i32 0, i32 0
  %25 = load ptr, ptr %24, align 8, !tbaa !15
  store ptr %25, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #2
  %26 = load ptr, ptr %6, align 8, !tbaa !5
  store ptr %26, ptr %7, align 8, !tbaa !5
  br label %27

27:                                               ; preds = %53, %1
  br label %28

28:                                               ; preds = %27
  %29 = load ptr, ptr %7, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.SHalfEdge, ptr %29, i32 0, i32 1
  %31 = load ptr, ptr %30, align 8, !tbaa !13
  %32 = load ptr, ptr %5, align 8, !tbaa !5
  %33 = icmp eq ptr %31, %32
  br i1 %33, label %34, label %35

34:                                               ; preds = %28
  store i1 false, ptr %2, align 1
  store i32 1, ptr %8, align 4
  br label %87

35:                                               ; preds = %28
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #2
  %36 = load ptr, ptr %7, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.SHalfEdge, ptr %36, i32 0, i32 2
  %38 = load ptr, ptr %37, align 8, !tbaa !17
  store ptr %38, ptr %9, align 8, !tbaa !5
  %39 = load ptr, ptr %9, align 8, !tbaa !5
  %40 = getelementptr inbounds %struct.SHalfEdge, ptr %39, i32 0, i32 0
  %41 = load ptr, ptr %40, align 8, !tbaa !14
  store ptr %41, ptr %7, align 8, !tbaa !5
  %42 = load ptr, ptr %7, align 8, !tbaa !5
  %43 = icmp eq ptr %42, null
  br i1 %43, label %44, label %45

44:                                               ; preds = %35
  store i32 3, ptr %8, align 4
  br label %51

45:                                               ; preds = %35
  %46 = load ptr, ptr %7, align 8, !tbaa !5
  %47 = load ptr, ptr %6, align 8, !tbaa !5
  %48 = icmp eq ptr %46, %47
  br i1 %48, label %49, label %50

49:                                               ; preds = %45
  store i32 3, ptr %8, align 4
  br label %51

50:                                               ; preds = %45
  store i32 0, ptr %8, align 4
  br label %51

51:                                               ; preds = %50, %49, %44
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #2
  %52 = load i32, ptr %8, align 4
  switch i32 %52, label %89 [
    i32 0, label %53
    i32 3, label %54
  ]

53:                                               ; preds = %51
  br label %27, !llvm.loop !18

54:                                               ; preds = %51
  %55 = load ptr, ptr %5, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.SVertex, ptr %55, i32 0, i32 0
  %57 = load ptr, ptr %56, align 8, !tbaa !15
  store ptr %57, ptr %6, align 8, !tbaa !5
  %58 = load ptr, ptr %6, align 8, !tbaa !5
  store ptr %58, ptr %7, align 8, !tbaa !5
  br label %59

59:                                               ; preds = %85, %54
  br label %60

60:                                               ; preds = %59
  %61 = load ptr, ptr %7, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.SHalfEdge, ptr %61, i32 0, i32 1
  %63 = load ptr, ptr %62, align 8, !tbaa !13
  %64 = load ptr, ptr %4, align 8, !tbaa !5
  %65 = icmp eq ptr %63, %64
  br i1 %65, label %66, label %67

66:                                               ; preds = %60
  store i1 false, ptr %2, align 1
  store i32 1, ptr %8, align 4
  br label %87

67:                                               ; preds = %60
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #2
  %68 = load ptr, ptr %7, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.SHalfEdge, ptr %68, i32 0, i32 2
  %70 = load ptr, ptr %69, align 8, !tbaa !17
  store ptr %70, ptr %10, align 8, !tbaa !5
  %71 = load ptr, ptr %10, align 8, !tbaa !5
  %72 = getelementptr inbounds %struct.SHalfEdge, ptr %71, i32 0, i32 0
  %73 = load ptr, ptr %72, align 8, !tbaa !14
  store ptr %73, ptr %7, align 8, !tbaa !5
  %74 = load ptr, ptr %7, align 8, !tbaa !5
  %75 = icmp eq ptr %74, null
  br i1 %75, label %76, label %77

76:                                               ; preds = %67
  store i32 5, ptr %8, align 4
  br label %83

77:                                               ; preds = %67
  %78 = load ptr, ptr %7, align 8, !tbaa !5
  %79 = load ptr, ptr %6, align 8, !tbaa !5
  %80 = icmp eq ptr %78, %79
  br i1 %80, label %81, label %82

81:                                               ; preds = %77
  store i32 5, ptr %8, align 4
  br label %83

82:                                               ; preds = %77
  store i32 0, ptr %8, align 4
  br label %83

83:                                               ; preds = %82, %81, %76
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #2
  %84 = load i32, ptr %8, align 4
  switch i32 %84, label %89 [
    i32 0, label %85
    i32 5, label %86
  ]

85:                                               ; preds = %83
  br label %59, !llvm.loop !20

86:                                               ; preds = %83
  store i1 true, ptr %2, align 1
  store i32 1, ptr %8, align 4
  br label %87

87:                                               ; preds = %86, %66, %34
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #2
  %88 = load i1, ptr %2, align 1
  ret i1 %88

89:                                               ; preds = %83, %51
  unreachable
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 24}
!10 = !{!"_ZTS9SHalfEdge", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !11, i64 40, !11, i64 44, !12, i64 48, !12, i64 49}
!11 = !{!"int", !7, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{!10, !6, i64 8}
!14 = !{!10, !6, i64 0}
!15 = !{!16, !6, i64 0}
!16 = !{!"_ZTS7SVertex", !6, i64 0, !12, i64 8, !11, i64 12, !12, i64 16, !12, i64 17}
!17 = !{!10, !6, i64 16}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
!20 = distinct !{!20, !19}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable
define dso_local noundef zeroext i1 @_Z26testEdgeFlipRetainManifoldPK9SHalfEdge(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
  %2 = getelementptr inbounds i8, ptr %0, i64 24
  %3 = load ptr, ptr %2, align 8, !tbaa !5
  %4 = getelementptr inbounds i8, ptr %3, i64 8
  %5 = load ptr, ptr %4, align 8, !tbaa !12
  %6 = load ptr, ptr %0, align 8, !tbaa !13
  %7 = getelementptr inbounds i8, ptr %6, i64 24
  %8 = load ptr, ptr %7, align 8, !tbaa !5
  %9 = getelementptr inbounds i8, ptr %8, i64 8
  %10 = load ptr, ptr %9, align 8, !tbaa !12
  %11 = load ptr, ptr %5, align 8, !tbaa !14
  br label %12

12:                                               ; preds = %16, %1
  %.023 = phi ptr [ %11, %1 ], [ %19, %16 ]
  %13 = getelementptr inbounds i8, ptr %.023, i64 8
  %14 = load ptr, ptr %13, align 8, !tbaa !12
  %15 = icmp eq ptr %14, %10
  br i1 %15, label %.loopexit, label %16

16:                                               ; preds = %12
  %17 = getelementptr inbounds i8, ptr %.023, i64 16
  %18 = load ptr, ptr %17, align 8, !tbaa !16
  %19 = load ptr, ptr %18, align 8, !tbaa !13
  %20 = icmp ne ptr %19, null
  %21 = icmp ne ptr %19, %11
  %.not32 = select i1 %20, i1 %21, i1 false
  br i1 %.not32, label %12, label %22

22:                                               ; preds = %16
  %23 = load ptr, ptr %10, align 8, !tbaa !14
  br label %24

24:                                               ; preds = %27, %22
  %.124 = phi ptr [ %23, %22 ], [ %30, %27 ]
  %25 = getelementptr inbounds i8, ptr %.124, i64 8
  %26 = load ptr, ptr %25, align 8, !tbaa !12
  %.not = icmp ne ptr %26, %5
  br i1 %.not, label %27, label %.loopexit

27:                                               ; preds = %24
  %28 = getelementptr inbounds i8, ptr %.124, i64 16
  %29 = load ptr, ptr %28, align 8, !tbaa !16
  %30 = load ptr, ptr %29, align 8, !tbaa !13
  %31 = icmp ne ptr %30, null
  %32 = icmp ne ptr %30, %23
  %.not34 = select i1 %31, i1 %32, i1 false
  br i1 %.not34, label %24, label %.loopexit

.loopexit:                                        ; preds = %12, %27, %24
  %.0 = phi i1 [ %.not, %24 ], [ %.not, %27 ], [ false, %12 ]
  ret i1 %.0
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 24}
!6 = !{!"_ZTS9SHalfEdge", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 32, !10, i64 40, !10, i64 44, !11, i64 48, !11, i64 49}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"bool", !8, i64 0}
!12 = !{!6, !7, i64 8}
!13 = !{!6, !7, i64 0}
!14 = !{!15, !7, i64 0}
!15 = !{!"_ZTS7SVertex", !7, i64 0, !11, i64 8, !10, i64 12, !11, i64 16, !11, i64 17}
!16 = !{!6, !7, i64 16}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass