; LLVM IR from tangjz/acm-icpc :: codeforces/complete/796F.ll (Z7seg_updiiiiib)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@seg = external dso_local global [600003 x i32], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7seg_idxii(i32 noundef, i32 noundef) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z7seg_updiiiiib(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i1 noundef zeroext %5) #2 {
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i8, align 1
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  store i32 %0, ptr %7, align 4, !tbaa !5
  store i32 %1, ptr %8, align 4, !tbaa !5
  store i32 %2, ptr %9, align 4, !tbaa !5
  store i32 %3, ptr %10, align 4, !tbaa !5
  store i32 %4, ptr %11, align 4, !tbaa !5
  %15 = zext i1 %5 to i8
  store i8 %15, ptr %12, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  %16 = load i32, ptr %7, align 4, !tbaa !5
  %17 = load i32, ptr %8, align 4, !tbaa !5
  %18 = call noundef i32 @_Z7seg_idxii(i32 noundef %16, i32 noundef %17)
  store i32 %18, ptr %13, align 4, !tbaa !5
  %19 = load i32, ptr %9, align 4, !tbaa !5
  %20 = load i32, ptr %7, align 4, !tbaa !5
  %21 = icmp sle i32 %19, %20
  br i1 %21, label %22, label %42

22:                                               ; preds = %6
  %23 = load i32, ptr %8, align 4, !tbaa !5
  %24 = load i32, ptr %10, align 4, !tbaa !5
  %25 = icmp sle i32 %23, %24
  br i1 %25, label %26, label %42

26:                                               ; preds = %22
  %27 = load i8, ptr %12, align 1, !tbaa !9, !range !11, !noundef !12
  %28 = trunc i8 %27 to i1
  br i1 %28, label %29, label %31

29:                                               ; preds = %26
  %30 = load i32, ptr %11, align 4, !tbaa !5
  br label %37

31:                                               ; preds = %26
  %32 = load i32, ptr %13, align 4, !tbaa !5
  %33 = sext i32 %32 to i64
  %34 = getelementptr inbounds [600003 x i32], ptr @seg, i64 0, i64 %33
  %35 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %34, ptr noundef nonnull align 4 dereferenceable(4) %11)
  %36 = load i32, ptr %35, align 4, !tbaa !5
  br label %37

37:                                               ; preds = %31, %29
  %38 = phi i32 [ %30, %29 ], [ %36, %31 ]
  %39 = load i32, ptr %13, align 4, !tbaa !5
  %40 = sext i32 %39 to i64
  %41 = getelementptr inbounds [600003 x i32], ptr @seg, i64 0, i64 %40
  store i32 %38, ptr %41, align 4, !tbaa !5
  br label %92

42:                                               ; preds = %22, %6
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  %43 = load i32, ptr %7, align 4, !tbaa !5
  %44 = load i32, ptr %8, align 4, !tbaa !5
  %45 = add nsw i32 %43, %44
  %46 = ashr i32 %45, 1
  store i32 %46, ptr %14, align 4, !tbaa !5
  %47 = load i32, ptr %9, align 4, !tbaa !5
  %48 = load i32, ptr %14, align 4, !tbaa !5
  %49 = icmp sle i32 %47, %48
  br i1 %49, label %50, label %58

50:                                               ; preds = %42
  %51 = load i32, ptr %7, align 4, !tbaa !5
  %52 = load i32, ptr %14, align 4, !tbaa !5
  %53 = load i32, ptr %9, align 4, !tbaa !5
  %54 = load i32, ptr %10, align 4, !tbaa !5
  %55 = load i32, ptr %11, align 4, !tbaa !5
  %56 = load i8, ptr %12, align 1, !tbaa !9, !range !11, !noundef !12
  %57 = trunc i8 %56 to i1
  call void @_Z7seg_updiiiiib(i32 noundef %51, i32 noundef %52, i32 noundef %53, i32 noundef %54, i32 noundef %55, i1 noundef zeroext %57)
  br label %58

58:                                               ; preds = %50, %42
  %59 = load i32, ptr %10, align 4, !tbaa !5
  %60 = load i32, ptr %14, align 4, !tbaa !5
  %61 = icmp sgt i32 %59, %60
  br i1 %61, label %62, label %71

62:                                               ; preds = %58
  %63 = load i32, ptr %14, align 4, !tbaa !5
  %64 = add nsw i32 %63, 1
  %65 = load i32, ptr %8, align 4, !tbaa !5
  %66 = load i32, ptr %9, align 4, !tbaa !5
  %67 = load i32, ptr %10, align 4, !tbaa !5
  %68 = load i32, ptr %11, align 4, !tbaa !5
  %69 = load i8, ptr %12, align 1, !tbaa !9, !range !11, !noundef !12
  %70 = trunc i8 %69 to i1
  call void @_Z7seg_updiiiiib(i32 noundef %64, i32 noundef %65, i32 noundef %66, i32 noundef %67, i32 noundef %68, i1 noundef zeroext %70)
  br label %71

71:                                               ; preds = %62, %58
  %72 = load i8, ptr %12, align 1, !tbaa !9, !range !11, !noundef !12
  %73 = trunc i8 %72 to i1
  br i1 %73, label %74, label %91

74:                                               ; preds = %71
  %75 = load i32, ptr %7, align 4, !tbaa !5
  %76 = load i32, ptr %14, align 4, !tbaa !5
  %77 = call noundef i32 @_Z7seg_idxii(i32 noundef %75, i32 noundef %76)
  %78 = sext i32 %77 to i64
  %79 = getelementptr inbounds [600003 x i32], ptr @seg, i64 0, i64 %78
  %80 = load i32, ptr %14, align 4, !tbaa !5
  %81 = add nsw i32 %80, 1
  %82 = load i32, ptr %8, align 4, !tbaa !5
  %83 = call noundef i32 @_Z7seg_idxii(i32 noundef %81, i32 noundef %82)
  %84 = sext i32 %83 to i64
  %85 = getelementptr inbounds [600003 x i32], ptr @seg, i64 0, i64 %84
  %86 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %79, ptr noundef nonnull align 4 dereferenceable(4) %85)
  %87 = load i32, ptr %86, align 4, !tbaa !5
  %88 = load i32, ptr %13, align 4, !tbaa !5
  %89 = sext i32 %88 to i64
  %90 = getelementptr inbounds [600003 x i32], ptr @seg, i64 0, i64 %89
  store i32 %87, ptr %90, align 4, !tbaa !5
  br label %91

91:                                               ; preds = %74, %71
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  br label %92

92:                                               ; preds = %91, %37
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{i8 0, i8 2}
!12 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@seg = external dso_local global [600003 x i32], align 16

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7seg_idxii(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z7seg_updiiiiib(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i1 noundef zeroext %5) local_unnamed_addr #1 {
  %7 = alloca i32, align 4
  store i32 %4, ptr %7, align 4, !tbaa !5
  %8 = tail call noundef i32 @_Z7seg_idxii(i32 noundef %0, i32 noundef %1)
  %.not = icmp sgt i32 %2, %0
  %.not33 = icmp sgt i32 %1, %3
  %or.cond = or i1 %.not, %.not33
  br i1 %or.cond, label %13, label %9

9:                                                ; preds = %6
  %.pre35 = sext i32 %8 to i64
  br i1 %5, label %.sink.split, label %10

10:                                               ; preds = %9
  %11 = getelementptr inbounds [600003 x i32], ptr @seg, i64 0, i64 %.pre35
  %12 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %11, ptr noundef nonnull align 4 dereferenceable(4) %7)
  %.pre = load i32, ptr %12, align 4, !tbaa !5
  br label %.sink.split

13:                                               ; preds = %6
  %14 = add nsw i32 %1, %0
  %15 = ashr i32 %14, 1
  %.not34 = icmp slt i32 %15, %2
  br i1 %.not34, label %17, label %16

16:                                               ; preds = %13
  tail call void @_Z7seg_updiiiiib(i32 noundef %0, i32 noundef %15, i32 noundef %2, i32 noundef %3, i32 noundef %4, i1 noundef zeroext %5)
  br label %17

17:                                               ; preds = %16, %13
  %18 = icmp slt i32 %15, %3
  br i1 %18, label %19, label %21

19:                                               ; preds = %17
  %20 = add nsw i32 %15, 1
  tail call void @_Z7seg_updiiiiib(i32 noundef %20, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i1 noundef zeroext %5)
  br label %21

21:                                               ; preds = %19, %17
  br i1 %5, label %22, label %34

22:                                               ; preds = %21
  %23 = tail call noundef i32 @_Z7seg_idxii(i32 noundef %0, i32 noundef %15)
  %24 = sext i32 %23 to i64
  %25 = getelementptr inbounds [600003 x i32], ptr @seg, i64 0, i64 %24
  %26 = add nsw i32 %15, 1
  %27 = tail call noundef i32 @_Z7seg_idxii(i32 noundef %26, i32 noundef %1)
  %28 = sext i32 %27 to i64
  %29 = getelementptr inbounds [600003 x i32], ptr @seg, i64 0, i64 %28
  %30 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %25, ptr noundef nonnull align 4 dereferenceable(4) %29)
  %31 = load i32, ptr %30, align 4, !tbaa !5
  %32 = sext i32 %8 to i64
  br label %.sink.split

.sink.split:                                      ; preds = %10, %9, %22
  %.sink37 = phi i64 [ %32, %22 ], [ %.pre35, %9 ], [ %.pre35, %10 ]
  %.sink = phi i32 [ %31, %22 ], [ %4, %9 ], [ %.pre, %10 ]
  %33 = getelementptr inbounds [600003 x i32], ptr @seg, i64 0, i64 %.sink37
  store i32 %.sink, ptr %33, align 4, !tbaa !5
  br label %34

34:                                               ; preds = %.sink.split, %21
  ret void
}

attributes #0 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: BDCEPass,EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass