; LLVM IR from ubaldot/defrecs :: stm32f4x/ADC_Readings/Drivers/CMSIS/DSP/Source/StatisticsFunctions (q7)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @arm_mse_q7(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3) #0 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i8, align 1
  %12 = alloca i8, align 1
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !9
  store ptr %3, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  store i32 0, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %11) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %12) #3
  %13 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %13, ptr %9, align 4, !tbaa !9
  br label %14

14:                                               ; preds = %17, %4
  %15 = load i32, ptr %9, align 4, !tbaa !9
  %16 = icmp ugt i32 %15, 0
  br i1 %16, label %17, label %49

17:                                               ; preds = %14
  %18 = load ptr, ptr %5, align 8, !tbaa !5
  %19 = getelementptr inbounds i8, ptr %18, i32 1
  store ptr %19, ptr %5, align 8, !tbaa !5
  %20 = load i8, ptr %18, align 1, !tbaa !11
  %21 = sext i8 %20 to i32
  %22 = ashr i32 %21, 1
  %23 = trunc i32 %22 to i8
  store i8 %23, ptr %11, align 1, !tbaa !11
  %24 = load ptr, ptr %6, align 8, !tbaa !5
  %25 = getelementptr inbounds i8, ptr %24, i32 1
  store ptr %25, ptr %6, align 8, !tbaa !5
  %26 = load i8, ptr %24, align 1, !tbaa !11
  %27 = sext i8 %26 to i32
  %28 = ashr i32 %27, 1
  %29 = trunc i32 %28 to i8
  store i8 %29, ptr %12, align 1, !tbaa !11
  %30 = load i8, ptr %11, align 1, !tbaa !11
  %31 = sext i8 %30 to i16
  %32 = sext i16 %31 to i32
  %33 = load i8, ptr %12, align 1, !tbaa !11
  %34 = sext i8 %33 to i16
  %35 = sext i16 %34 to i32
  %36 = sub nsw i32 %32, %35
  %37 = call i32 @__SSAT(i32 noundef %36, i32 noundef 8)
  %38 = trunc i32 %37 to i8
  store i8 %38, ptr %11, align 1, !tbaa !11
  %39 = load i8, ptr %11, align 1, !tbaa !11
  %40 = sext i8 %39 to i16
  %41 = sext i16 %40 to i32
  %42 = load i8, ptr %11, align 1, !tbaa !11
  %43 = sext i8 %42 to i32
  %44 = mul nsw i32 %41, %43
  %45 = load i32, ptr %10, align 4, !tbaa !9
  %46 = add nsw i32 %45, %44
  store i32 %46, ptr %10, align 4, !tbaa !9
  %47 = load i32, ptr %9, align 4, !tbaa !9
  %48 = add i32 %47, -1
  store i32 %48, ptr %9, align 4, !tbaa !9
  br label %14, !llvm.loop !12

49:                                               ; preds = %14
  %50 = load i32, ptr %10, align 4, !tbaa !9
  %51 = load i32, ptr %7, align 4, !tbaa !9
  %52 = udiv i32 %50, %51
  %53 = trunc i32 %52 to i16
  %54 = sext i16 %53 to i32
  %55 = ashr i32 %54, 5
  %56 = call i32 @__SSAT(i32 noundef %55, i32 noundef 8)
  %57 = trunc i32 %56 to i8
  %58 = load ptr, ptr %8, align 8, !tbaa !5
  store i8 %57, ptr %58, align 1, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 1, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @__SSAT(i32 noundef, i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @arm_mse_q7(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, i32 noundef %2, ptr nocapture noundef writeonly %3) local_unnamed_addr #0 {
  %.not17 = icmp eq i32 %2, 0
  br i1 %.not17, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %4, %.lr.ph
  %.021 = phi ptr [ %5, %.lr.ph ], [ %0, %4 ]
  %.01220 = phi ptr [ %8, %.lr.ph ], [ %1, %4 ]
  %.01319 = phi i32 [ %15, %.lr.ph ], [ 0, %4 ]
  %.01418 = phi i32 [ %16, %.lr.ph ], [ %2, %4 ]
  %5 = getelementptr inbounds i8, ptr %.021, i64 1
  %6 = load i8, ptr %.021, align 1, !tbaa !5
  %7 = ashr i8 %6, 1
  %8 = getelementptr inbounds i8, ptr %.01220, i64 1
  %9 = load i8, ptr %.01220, align 1, !tbaa !5
  %10 = ashr i8 %9, 1
  %narrow = sub nsw i8 %7, %10
  %11 = sext i8 %narrow to i32
  %12 = tail call i32 @__SSAT(i32 noundef %11, i32 noundef 8)
  %sext15 = shl i32 %12, 24
  %13 = ashr exact i32 %sext15, 24
  %14 = mul nsw i32 %13, %13
  %15 = add nuw nsw i32 %14, %.01319
  %16 = add i32 %.01418, -1
  %.not = icmp eq i32 %16, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph, !llvm.loop !8

._crit_edge:                                      ; preds = %.lr.ph, %4
  %.013.lcssa = phi i32 [ 0, %4 ], [ %15, %.lr.ph ]
  %17 = udiv i32 %.013.lcssa, %2
  %sext = shl i32 %17, 16
  %18 = ashr i32 %sext, 21
  %19 = tail call i32 @__SSAT(i32 noundef %18, i32 noundef 8)
  %20 = trunc i32 %19 to i8
  store i8 %20, ptr %3, align 1, !tbaa !5
  ret void
}

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @__SSAT(i32 noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass