; LLVM IR from mitdbg/deneva :: system/pool.ll (ZN7RowPool4initEP8Workloadm)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.mem_alloc = type { i8 }
%class.RowPool = type { ptr, ptr }

@g_total_thread_cnt = external global i32, align 4
@mem_allocator = external global %class.mem_alloc, align 1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) #0

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) #1

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

declare noundef ptr @_ZN9mem_alloc5allocEm(ptr noundef nonnull align 1 dereferenceable(1), i64 noundef) #4

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7RowPool4initEP8Workloadm(ptr noundef nonnull align 8 dereferenceable(16) %0, ptr noundef %1, i64 noundef %2) #5 align 2 personality ptr @__gxx_personality_v0 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i64, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i64, align 8
  %9 = alloca i32, align 4
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  %12 = alloca i64, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i64 %2, ptr %6, align 8, !tbaa !9
  %13 = load ptr, ptr %4, align 8
  %14 = load ptr, ptr %5, align 8, !tbaa !5
  %15 = getelementptr inbounds %class.RowPool, ptr %13, i32 0, i32 1
  store ptr %14, ptr %15, align 8, !tbaa !11
  %16 = load i32, ptr @g_total_thread_cnt, align 4, !tbaa !13
  %17 = zext i32 %16 to i64
  %18 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %17, i64 8)
  %19 = extractvalue { i64, i1 } %18, 1
  %20 = extractvalue { i64, i1 } %18, 0
  %21 = select i1 %19, i64 -1, i64 %20
  %22 = call noalias noundef nonnull ptr @_Znam(i64 noundef %21) #6
  %23 = getelementptr inbounds %class.RowPool, ptr %13, i32 0, i32 0
  store ptr %22, ptr %23, align 8, !tbaa !15
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #7
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #7
  store i64 0, ptr %8, align 8, !tbaa !9
  br label %24

24:                                               ; preds = %55, %3
  %25 = load i64, ptr %8, align 8, !tbaa !9
  %26 = load i32, ptr @g_total_thread_cnt, align 4, !tbaa !13
  %27 = zext i32 %26 to i64
  %28 = icmp ult i64 %25, %27
  br i1 %28, label %30, label %29

29:                                               ; preds = %24
  store i32 2, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #7
  br label %58

30:                                               ; preds = %24
  %31 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 136) #6
  %32 = load i64, ptr %6, align 8, !tbaa !9
  invoke void @_ZN5boost8lockfree5queueIP5row_tJEEC2Em(ptr noundef nonnull align 8 dereferenceable(136) %31, i64 noundef %32)
          to label %33 unwind label %43

33:                                               ; preds = %30
  %34 = getelementptr inbounds %class.RowPool, ptr %13, i32 0, i32 0
  %35 = load ptr, ptr %34, align 8, !tbaa !15
  %36 = load i64, ptr %8, align 8, !tbaa !9
  %37 = getelementptr inbounds ptr, ptr %35, i64 %36
  store ptr %31, ptr %37, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #7
  store i64 0, ptr %12, align 8, !tbaa !9
  br label %38

38:                                               ; preds = %51, %33
  %39 = load i64, ptr %12, align 8, !tbaa !9
  %40 = load i64, ptr %6, align 8, !tbaa !9
  %41 = icmp ult i64 %39, %40
  br i1 %41, label %47, label %42

42:                                               ; preds = %38
  store i32 5, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #7
  br label %54

43:                                               ; preds = %30
  %44 = landingpad { ptr, i32 }
          cleanup
  %45 = extractvalue { ptr, i32 } %44, 0
  store ptr %45, ptr %10, align 8
  %46 = extractvalue { ptr, i32 } %44, 1
  store i32 %46, ptr %11, align 4
  call void @_ZdlPvm(ptr noundef %31, i64 noundef 136) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #7
  br label %59

47:                                               ; preds = %38
  %48 = call noundef ptr @_ZN9mem_alloc5allocEm(ptr noundef nonnull align 1 dereferenceable(1) @mem_allocator, i64 noundef 64)
  store ptr %48, ptr %7, align 8, !tbaa !5
  %49 = load i64, ptr %8, align 8, !tbaa !9
  %50 = load ptr, ptr %7, align 8, !tbaa !5
  call void @_ZN7RowPool3putEmP5row_t(ptr noundef nonnull align 8 dereferenceable(16) %13, i64 noundef %49, ptr noundef %50)
  br label %51

51:                                               ; preds = %47
  %52 = load i64, ptr %12, align 8, !tbaa !9
  %53 = add i64 %52, 1
  store i64 %53, ptr %12, align 8, !tbaa !9
  br label %38, !llvm.loop !16

54:                                               ; preds = %42
  br label %55

55:                                               ; preds = %54
  %56 = load i64, ptr %8, align 8, !tbaa !9
  %57 = add i64 %56, 1
  store i64 %57, ptr %8, align 8, !tbaa !9
  br label %24, !llvm.loop !18

58:                                               ; preds = %29
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #7
  ret void

59:                                               ; preds = %43
  %60 = load ptr, ptr %10, align 8
  %61 = load i32, ptr %11, align 4
  %62 = insertvalue { ptr, i32 } poison, ptr %60, 0
  %63 = insertvalue { ptr, i32 } %62, i32 %61, 1
  resume { ptr, i32 } %63
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5boost8lockfree5queueIP5row_tJEEC2Em(ptr noundef nonnull align 8 dereferenceable(136), i64 noundef) unnamed_addr #5 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7RowPool3putEmP5row_t(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef, ptr noundef) #5 align 2

attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #1 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { builtin allocsize(0) }
attributes #7 = { nounwind }
attributes #8 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !6, i64 8}
!12 = !{!"_ZTS7RowPool", !6, i64 0, !6, i64 8}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !7, i64 0}
!15 = !{!12, !6, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = distinct !{!18, !17}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.mem_alloc = type { i8 }

@g_total_thread_cnt = external local_unnamed_addr global i32, align 4
@mem_allocator = external global %class.mem_alloc, align 1

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) local_unnamed_addr #0

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) local_unnamed_addr #0

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) local_unnamed_addr #1

declare noundef ptr @_ZN9mem_alloc5allocEm(ptr noundef nonnull align 1 dereferenceable(1), i64 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7RowPool4initEP8Workloadm(ptr noundef nonnull align 8 dereferenceable(16) %0, ptr noundef %1, i64 noundef %2) local_unnamed_addr #3 align 2 personality ptr @__gxx_personality_v0 {
  %4 = getelementptr inbounds i8, ptr %0, i64 8
  store ptr %1, ptr %4, align 8, !tbaa !5
  %5 = load i32, ptr @g_total_thread_cnt, align 4, !tbaa !10
  %6 = zext i32 %5 to i64
  %7 = shl nuw nsw i64 %6, 3
  %8 = tail call noalias noundef nonnull ptr @_Znam(i64 noundef %7) #4
  store ptr %8, ptr %0, align 8, !tbaa !12
  %.not = icmp eq i32 %5, 0
  br i1 %.not, label %._crit_edge17, label %.lr.ph16

.lr.ph16:                                         ; preds = %3
  %.not19 = icmp eq i64 %2, 0
  br i1 %.not19, label %.lr.ph16.split, label %.lr.ph16.split.us

.lr.ph16.split.us:                                ; preds = %.lr.ph16, %._crit_edge.us
  %.01214.us = phi i64 [ %15, %._crit_edge.us ], [ 0, %.lr.ph16 ]
  %9 = tail call noalias noundef nonnull dereferenceable(136) ptr @_Znwm(i64 noundef 136) #4
  invoke void @_ZN5boost8lockfree5queueIP5row_tJEEC2Em(ptr noundef nonnull align 8 dereferenceable(136) %9, i64 noundef %2)
          to label %.lr.ph.us unwind label %.split.us

.lr.ph.us:                                        ; preds = %.lr.ph16.split.us
  %10 = load ptr, ptr %0, align 8, !tbaa !12
  %11 = getelementptr inbounds ptr, ptr %10, i64 %.01214.us
  store ptr %9, ptr %11, align 8, !tbaa !13
  br label %12

12:                                               ; preds = %.lr.ph.us, %12
  %.013.us = phi i64 [ 0, %.lr.ph.us ], [ %14, %12 ]
  %13 = tail call noundef ptr @_ZN9mem_alloc5allocEm(ptr noundef nonnull align 1 dereferenceable(1) @mem_allocator, i64 noundef 64)
  tail call void @_ZN7RowPool3putEmP5row_t(ptr noundef nonnull align 8 dereferenceable(16) %0, i64 noundef %.01214.us, ptr noundef %13)
  %14 = add nuw i64 %.013.us, 1
  %exitcond.not = icmp eq i64 %14, %2
  br i1 %exitcond.not, label %._crit_edge.us, label %12, !llvm.loop !14

._crit_edge.us:                                   ; preds = %12
  %15 = add nuw nsw i64 %.01214.us, 1
  %16 = load i32, ptr @g_total_thread_cnt, align 4, !tbaa !10
  %17 = zext i32 %16 to i64
  %18 = icmp ult i64 %15, %17
  br i1 %18, label %.lr.ph16.split.us, label %._crit_edge17, !llvm.loop !16

.split.us:                                        ; preds = %.lr.ph16.split.us
  %19 = landingpad { ptr, i32 }
          cleanup
  br label %29

._crit_edge17:                                    ; preds = %._crit_edge.us, %21, %3
  ret void

.lr.ph16.split:                                   ; preds = %.lr.ph16, %21
  %.01214 = phi i64 [ %24, %21 ], [ 0, %.lr.ph16 ]
  %20 = tail call noalias noundef nonnull dereferenceable(136) ptr @_Znwm(i64 noundef 136) #4
  invoke void @_ZN5boost8lockfree5queueIP5row_tJEEC2Em(ptr noundef nonnull align 8 dereferenceable(136) %20, i64 noundef 0)
          to label %21 unwind label %.split

21:                                               ; preds = %.lr.ph16.split
  %22 = load ptr, ptr %0, align 8, !tbaa !12
  %23 = getelementptr inbounds ptr, ptr %22, i64 %.01214
  store ptr %20, ptr %23, align 8, !tbaa !13
  %24 = add nuw nsw i64 %.01214, 1
  %25 = load i32, ptr @g_total_thread_cnt, align 4, !tbaa !10
  %26 = zext i32 %25 to i64
  %27 = icmp ult i64 %24, %26
  br i1 %27, label %.lr.ph16.split, label %._crit_edge17, !llvm.loop !16

.split:                                           ; preds = %.lr.ph16.split
  %28 = landingpad { ptr, i32 }
          cleanup
  br label %29

29:                                               ; preds = %.split.us, %.split
  %.us-phi = phi ptr [ %20, %.split ], [ %9, %.split.us ]
  %.us-phi18 = phi { ptr, i32 } [ %28, %.split ], [ %19, %.split.us ]
  tail call void @_ZdlPvm(ptr noundef nonnull %.us-phi, i64 noundef 136) #5
  resume { ptr, i32 } %.us-phi18
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5boost8lockfree5queueIP5row_tJEEC2Em(ptr noundef nonnull align 8 dereferenceable(136), i64 noundef) unnamed_addr #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7RowPool3putEmP5row_t(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef, ptr noundef) local_unnamed_addr #3 align 2

attributes #0 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { builtin allocsize(0) }
attributes #5 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"_ZTS7RowPool", !7, i64 0, !7, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!6, !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass