; LLVM IR from tangjz/acm-icpc :: codeforces/gym (100443B)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Edge = type { i32, i32, i32 }

@N = external dso_local global i32, align 4
@M = external dso_local global i32, align 4
@S = external dso_local global i32, align 4
@T = external dso_local global i32, align 4
@lnk = external dso_local global [301 x i32], align 16
@e = external dso_local global [60003 x %struct.Edge], align 16
@t = external dso_local global i32, align 4
@n = external dso_local global i32, align 4
@m = external dso_local global i32, align 4
@pL = external dso_local global [301 x i32], align 16
@pR = external dso_local global [301 x i32], align 16
@lim = external dso_local global [301 x i32], align 16
@.str = external hidden unnamed_addr constant [3 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [5 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [7 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [13 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z7addEdgeiii(i32 noundef, i32 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z5dinicv() #3

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #4 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  %15 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef @t)
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #7
  store i32 1, ptr %2, align 4, !tbaa !5
  br label %16

16:                                               ; preds = %199, %0
  %17 = load i32, ptr %2, align 4, !tbaa !5
  %18 = load i32, ptr @t, align 4, !tbaa !5
  %19 = icmp sle i32 %17, %18
  br i1 %19, label %21, label %20

20:                                               ; preds = %16
  store i32 2, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #7
  br label %202

21:                                               ; preds = %16
  %22 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str.1, ptr noundef @n, ptr noundef @m)
  %23 = load i32, ptr @n, align 4, !tbaa !5
  %24 = shl i32 %23, 1
  %25 = add nsw i32 %24, 4
  store i32 %25, ptr @N, align 4, !tbaa !5
  store i32 0, ptr @M, align 4, !tbaa !5
  %26 = load i32, ptr @N, align 4, !tbaa !5
  %27 = sub nsw i32 %26, 4
  store i32 %27, ptr @S, align 4, !tbaa !5
  %28 = load i32, ptr @N, align 4, !tbaa !5
  %29 = sub nsw i32 %28, 3
  store i32 %29, ptr @T, align 4, !tbaa !5
  %30 = load i32, ptr @N, align 4, !tbaa !5
  %31 = sext i32 %30 to i64
  %32 = mul i64 %31, 4
  call void @llvm.memset.p0.i64(ptr align 16 @lnk, i8 -1, i64 %32, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #7
  store i32 0, ptr %4, align 4, !tbaa !5
  br label %33

33:                                               ; preds = %59, %21
  %34 = load i32, ptr %4, align 4, !tbaa !5
  %35 = load i32, ptr @n, align 4, !tbaa !5
  %36 = icmp slt i32 %34, %35
  br i1 %36, label %38, label %37

37:                                               ; preds = %33
  store i32 5, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #7
  br label %62

38:                                               ; preds = %33
  %39 = load i32, ptr %4, align 4, !tbaa !5
  %40 = sext i32 %39 to i64
  %41 = getelementptr inbounds i32, ptr @pL, i64 %40
  %42 = load i32, ptr %4, align 4, !tbaa !5
  %43 = sext i32 %42 to i64
  %44 = getelementptr inbounds i32, ptr @pR, i64 %43
  %45 = load i32, ptr %4, align 4, !tbaa !5
  %46 = sext i32 %45 to i64
  %47 = getelementptr inbounds i32, ptr @lim, i64 %46
  %48 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str.2, ptr noundef %41, ptr noundef %44, ptr noundef %47)
  %49 = load i32, ptr @S, align 4, !tbaa !5
  %50 = load i32, ptr %4, align 4, !tbaa !5
  call void @_Z7addEdgeiii(i32 noundef %49, i32 noundef %50, i32 noundef 1061109567)
  %51 = load i32, ptr %4, align 4, !tbaa !5
  %52 = load i32, ptr @n, align 4, !tbaa !5
  %53 = load i32, ptr %4, align 4, !tbaa !5
  %54 = add nsw i32 %52, %53
  call void @_Z7addEdgeiii(i32 noundef %51, i32 noundef %54, i32 noundef 1061109567)
  %55 = load i32, ptr @n, align 4, !tbaa !5
  %56 = load i32, ptr %4, align 4, !tbaa !5
  %57 = add nsw i32 %55, %56
  %58 = load i32, ptr @T, align 4, !tbaa !5
  call void @_Z7addEdgeiii(i32 noundef %57, i32 noundef %58, i32 noundef 1061109567)
  br label %59

59:                                               ; preds = %38
  %60 = load i32, ptr %4, align 4, !tbaa !5
  %61 = add nsw i32 %60, 1
  store i32 %61, ptr %4, align 4, !tbaa !5
  br label %33, !llvm.loop !9

62:                                               ; preds = %37
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #7
  store i32 0, ptr %5, align 4, !tbaa !5
  br label %63

63:                                               ; preds = %101, %62
  %64 = load i32, ptr %5, align 4, !tbaa !5
  %65 = load i32, ptr @n, align 4, !tbaa !5
  %66 = icmp slt i32 %64, %65
  br i1 %66, label %68, label %67

67:                                               ; preds = %63
  store i32 8, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #7
  br label %104

68:                                               ; preds = %63
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #7
  store i32 0, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #7
  br label %69

69:                                               ; preds = %97, %68
  %70 = load i32, ptr %6, align 4, !tbaa !5
  %71 = load i32, ptr @n, align 4, !tbaa !5
  %72 = icmp slt i32 %70, %71
  br i1 %72, label %74, label %73

73:                                               ; preds = %69
  store i32 11, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #7
  br label %100

74:                                               ; preds = %69
  %75 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef %7)
  %76 = load i32, ptr %5, align 4, !tbaa !5
  %77 = load i32, ptr %6, align 4, !tbaa !5
  %78 = icmp ne i32 %76, %77
  br i1 %78, label %79, label %96

79:                                               ; preds = %74
  %80 = load i32, ptr %5, align 4, !tbaa !5
  %81 = sext i32 %80 to i64
  %82 = getelementptr inbounds [301 x i32], ptr @pR, i64 0, i64 %81
  %83 = load i32, ptr %82, align 4, !tbaa !5
  %84 = load i32, ptr %7, align 4, !tbaa !5
  %85 = add nsw i32 %83, %84
  %86 = load i32, ptr %6, align 4, !tbaa !5
  %87 = sext i32 %86 to i64
  %88 = getelementptr inbounds [301 x i32], ptr @pL, i64 0, i64 %87
  %89 = load i32, ptr %88, align 4, !tbaa !5
  %90 = icmp slt i32 %85, %89
  br i1 %90, label %91, label %96

91:                                               ; preds = %79
  %92 = load i32, ptr @n, align 4, !tbaa !5
  %93 = load i32, ptr %5, align 4, !tbaa !5
  %94 = add nsw i32 %92, %93
  %95 = load i32, ptr %6, align 4, !tbaa !5
  call void @_Z7addEdgeiii(i32 noundef %94, i32 noundef %95, i32 noundef 1061109567)
  br label %96

96:                                               ; preds = %91, %79, %74
  br label %97

97:                                               ; preds = %96
  %98 = load i32, ptr %6, align 4, !tbaa !5
  %99 = add nsw i32 %98, 1
  store i32 %99, ptr %6, align 4, !tbaa !5
  br label %69, !llvm.loop !11

100:                                              ; preds = %73
  br label %101

101:                                              ; preds = %100
  %102 = load i32, ptr %5, align 4, !tbaa !5
  %103 = add nsw i32 %102, 1
  store i32 %103, ptr %5, align 4, !tbaa !5
  br label %63, !llvm.loop !12

104:                                              ; preds = %67
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #7
  %105 = load i32, ptr @N, align 4, !tbaa !5
  %106 = sub nsw i32 %105, 2
  store i32 %106, ptr %8, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #7
  %107 = load i32, ptr @N, align 4, !tbaa !5
  %108 = sub nsw i32 %107, 1
  store i32 %108, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #7
  %109 = load i32, ptr @M, align 4, !tbaa !5
  store i32 %109, ptr %10, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #7
  store i32 0, ptr %11, align 4, !tbaa !5
  br label %110

110:                                              ; preds = %141, %104
  %111 = load i32, ptr %11, align 4, !tbaa !5
  %112 = load i32, ptr @n, align 4, !tbaa !5
  %113 = icmp slt i32 %111, %112
  br i1 %113, label %115, label %114

114:                                              ; preds = %110
  store i32 14, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #7
  br label %144

115:                                              ; preds = %110
  %116 = load i32, ptr %11, align 4, !tbaa !5
  %117 = sext i32 %116 to i64
  %118 = getelementptr inbounds [301 x i32], ptr @lim, i64 0, i64 %117
  %119 = load i32, ptr %118, align 4, !tbaa !5
  %120 = sub nsw i32 %119, 1
  %121 = load i32, ptr @m, align 4, !tbaa !5
  %122 = sdiv i32 %120, %121
  %123 = add nsw i32 %122, 1
  %124 = load i32, ptr %11, align 4, !tbaa !5
  %125 = sext i32 %124 to i64
  %126 = getelementptr inbounds [301 x i32], ptr @lim, i64 0, i64 %125
  store i32 %123, ptr %126, align 4, !tbaa !5
  %127 = load i32, ptr %8, align 4, !tbaa !5
  %128 = load i32, ptr @n, align 4, !tbaa !5
  %129 = load i32, ptr %11, align 4, !tbaa !5
  %130 = add nsw i32 %128, %129
  %131 = load i32, ptr %11, align 4, !tbaa !5
  %132 = sext i32 %131 to i64
  %133 = getelementptr inbounds [301 x i32], ptr @lim, i64 0, i64 %132
  %134 = load i32, ptr %133, align 4, !tbaa !5
  call void @_Z7addEdgeiii(i32 noundef %127, i32 noundef %130, i32 noundef %134)
  %135 = load i32, ptr %11, align 4, !tbaa !5
  %136 = load i32, ptr %9, align 4, !tbaa !5
  %137 = load i32, ptr %11, align 4, !tbaa !5
  %138 = sext i32 %137 to i64
  %139 = getelementptr inbounds [301 x i32], ptr @lim, i64 0, i64 %138
  %140 = load i32, ptr %139, align 4, !tbaa !5
  call void @_Z7addEdgeiii(i32 noundef %135, i32 noundef %136, i32 noundef %140)
  br label %141

141:                                              ; preds = %115
  %142 = load i32, ptr %11, align 4, !tbaa !5
  %143 = add nsw i32 %142, 1
  store i32 %143, ptr %11, align 4, !tbaa !5
  br label %110, !llvm.loop !13

144:                                              ; preds = %114
  %145 = load i32, ptr @T, align 4, !tbaa !5
  %146 = load i32, ptr @S, align 4, !tbaa !5
  call void @_Z7addEdgeiii(i32 noundef %145, i32 noundef %146, i32 noundef 1061109567)
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) @S, ptr noundef nonnull align 4 dereferenceable(4) %8) #7
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) @T, ptr noundef nonnull align 4 dereferenceable(4) %9) #7
  %147 = call noundef i32 @_Z5dinicv()
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #7
  %148 = load i32, ptr @M, align 4, !tbaa !5
  %149 = sub nsw i32 %148, 1
  %150 = sext i32 %149 to i64
  %151 = getelementptr inbounds [60003 x %struct.Edge], ptr @e, i64 0, i64 %150
  %152 = getelementptr inbounds %struct.Edge, ptr %151, i32 0, i32 2
  %153 = load i32, ptr %152, align 4, !tbaa !14
  store i32 %153, ptr %12, align 4, !tbaa !5
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) @S, ptr noundef nonnull align 4 dereferenceable(4) %8) #7
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) @T, ptr noundef nonnull align 4 dereferenceable(4) %9) #7
  br label %154

154:                                              ; preds = %189, %144
  %155 = load i32, ptr %10, align 4, !tbaa !5
  %156 = load i32, ptr @M, align 4, !tbaa !5
  %157 = icmp slt i32 %155, %156
  br i1 %157, label %158, label %192

158:                                              ; preds = %154
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #7
  %159 = load i32, ptr @M, align 4, !tbaa !5
  %160 = sub nsw i32 %159, 1
  %161 = sext i32 %160 to i64
  %162 = getelementptr inbounds [60003 x %struct.Edge], ptr @e, i64 0, i64 %161
  %163 = getelementptr inbounds %struct.Edge, ptr %162, i32 0, i32 1
  %164 = load i32, ptr %163, align 4, !tbaa !16
  store i32 %164, ptr %13, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #7
  %165 = load i32, ptr @M, align 4, !tbaa !5
  %166 = sub nsw i32 %165, 2
  %167 = sext i32 %166 to i64
  %168 = getelementptr inbounds [60003 x %struct.Edge], ptr @e, i64 0, i64 %167
  %169 = getelementptr inbounds %struct.Edge, ptr %168, i32 0, i32 1
  %170 = load i32, ptr %169, align 4, !tbaa !16
  store i32 %170, ptr %14, align 4, !tbaa !5
  %171 = load i32, ptr @M, align 4, !tbaa !5
  %172 = sub nsw i32 %171, 2
  %173 = sext i32 %172 to i64
  %174 = getelementptr inbounds [60003 x %struct.Edge], ptr @e, i64 0, i64 %173
  %175 = getelementptr inbounds %struct.Edge, ptr %174, i32 0, i32 0
  %176 = load i32, ptr %175, align 4, !tbaa !17
  %177 = load i32, ptr %13, align 4, !tbaa !5
  %178 = sext i32 %177 to i64
  %179 = getelementptr inbounds [301 x i32], ptr @lnk, i64 0, i64 %178
  store i32 %176, ptr %179, align 4, !tbaa !5
  %180 = load i32, ptr @M, align 4, !tbaa !5
  %181 = sub nsw i32 %180, 1
  %182 = sext i32 %181 to i64
  %183 = getelementptr inbounds [60003 x %struct.Edge], ptr @e, i64 0, i64 %182
  %184 = getelementptr inbounds %struct.Edge, ptr %183, i32 0, i32 0
  %185 = load i32, ptr %184, align 4, !tbaa !17
  %186 = load i32, ptr %14, align 4, !tbaa !5
  %187 = sext i32 %186 to i64
  %188 = getelementptr inbounds [301 x i32], ptr @lnk, i64 0, i64 %187
  store i32 %185, ptr %188, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #7
  br label %189

189:                                              ; preds = %158
  %190 = load i32, ptr @M, align 4, !tbaa !5
  %191 = sub nsw i32 %190, 2
  store i32 %191, ptr @M, align 4, !tbaa !5
  br label %154, !llvm.loop !18

192:                                              ; preds = %154
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) @S, ptr noundef nonnull align 4 dereferenceable(4) @T) #7
  %193 = call noundef i32 @_Z5dinicv()
  %194 = load i32, ptr %12, align 4, !tbaa !5
  %195 = sub nsw i32 %194, %193
  store i32 %195, ptr %12, align 4, !tbaa !5
  %196 = load i32, ptr %2, align 4, !tbaa !5
  %197 = load i32, ptr %12, align 4, !tbaa !5
  %198 = call i32 (ptr, ...) @printf(ptr noundef @.str.3, i32 noundef %196, i32 noundef %197)
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #7
  br label %199

199:                                              ; preds = %192
  %200 = load i32, ptr %2, align 4, !tbaa !5
  %201 = add nsw i32 %200, 1
  store i32 %201, ptr %2, align 4, !tbaa !5
  br label %16, !llvm.loop !19

202:                                              ; preds = %20
  ret i32 0
}

declare i32 @__isoc99_scanf(ptr noundef, ...) #5

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #6

declare i32 @printf(ptr noundef, ...) #5

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}
!14 = !{!15, !6, i64 8}
!15 = !{!"_ZTS4Edge", !6, i64 0, !6, i64 4, !6, i64 8}
!16 = !{!15, !6, i64 4}
!17 = !{!15, !6, i64 0}
!18 = distinct !{!18, !10}
!19 = distinct !{!19, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Edge = type { i32, i32, i32 }

@N = external dso_local local_unnamed_addr global i32, align 4
@M = external dso_local local_unnamed_addr global i32, align 4
@S = external dso_local global i32, align 4
@T = external dso_local global i32, align 4
@lnk = external dso_local local_unnamed_addr global [301 x i32], align 16
@e = external dso_local local_unnamed_addr global [60003 x %struct.Edge], align 16
@t = external dso_local global i32, align 4
@n = external dso_local global i32, align 4
@m = external dso_local global i32, align 4
@pL = external dso_local global [301 x i32], align 16
@pR = external dso_local global [301 x i32], align 16
@lim = external dso_local global [301 x i32], align 16
@.str = external hidden unnamed_addr constant [3 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [5 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [7 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [13 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z7addEdgeiii(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z5dinicv() local_unnamed_addr #3

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() local_unnamed_addr #4 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = tail call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull @t)
  %5 = load i32, ptr @t, align 4, !tbaa !5
  %.not54 = icmp slt i32 %5, 1
  br i1 %.not54, label %._crit_edge58, label %.lr.ph57

._crit_edge58:                                    ; preds = %99, %0
  ret i32 0

.lr.ph57:                                         ; preds = %0, %99
  %.055 = phi i32 [ %103, %99 ], [ 1, %0 ]
  %6 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str.1, ptr noundef nonnull @n, ptr noundef nonnull @m)
  %7 = load i32, ptr @n, align 4, !tbaa !5
  %8 = shl i32 %7, 1
  %9 = add nsw i32 %8, 4
  store i32 %9, ptr @N, align 4, !tbaa !5
  store i32 0, ptr @M, align 4, !tbaa !5
  store i32 %8, ptr @S, align 4, !tbaa !5
  %10 = or disjoint i32 %8, 1
  store i32 %10, ptr @T, align 4, !tbaa !5
  %11 = sext i32 %9 to i64
  %12 = shl nsw i64 %11, 2
  call void @llvm.memset.p0.i64(ptr nonnull align 16 @lnk, i8 -1, i64 %12, i1 false)
  %13 = icmp sgt i32 %7, 0
  br i1 %13, label %.lr.ph, label %._crit_edge46

.preheader:                                       ; preds = %.lr.ph
  %14 = icmp sgt i32 %26, 0
  br i1 %14, label %.lr.ph45.split, label %._crit_edge46

.lr.ph:                                           ; preds = %.lr.ph57, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %.lr.ph57 ]
  %15 = getelementptr inbounds i32, ptr @pL, i64 %indvars.iv
  %16 = getelementptr inbounds i32, ptr @pR, i64 %indvars.iv
  %17 = getelementptr inbounds i32, ptr @lim, i64 %indvars.iv
  %18 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str.2, ptr noundef nonnull %15, ptr noundef nonnull %16, ptr noundef nonnull %17)
  %19 = load i32, ptr @S, align 4, !tbaa !5
  %20 = trunc nuw nsw i64 %indvars.iv to i32
  call void @_Z7addEdgeiii(i32 noundef %19, i32 noundef %20, i32 noundef 1061109567)
  %21 = load i32, ptr @n, align 4, !tbaa !5
  %22 = add nsw i32 %21, %20
  call void @_Z7addEdgeiii(i32 noundef %20, i32 noundef %22, i32 noundef 1061109567)
  %23 = load i32, ptr @n, align 4, !tbaa !5
  %24 = add nsw i32 %23, %20
  %25 = load i32, ptr @T, align 4, !tbaa !5
  call void @_Z7addEdgeiii(i32 noundef %24, i32 noundef %25, i32 noundef 1061109567)
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %26 = load i32, ptr @n, align 4, !tbaa !5
  %27 = sext i32 %26 to i64
  %28 = icmp slt i64 %indvars.iv.next, %27
  br i1 %28, label %.lr.ph, label %.preheader, !llvm.loop !9

._crit_edge46:                                    ; preds = %._crit_edge, %.lr.ph57, %.preheader
  %29 = phi i32 [ %26, %.preheader ], [ %7, %.lr.ph57 ], [ %39, %._crit_edge ]
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #7
  %30 = load i32, ptr @N, align 4, !tbaa !5
  %31 = add nsw i32 %30, -2
  store i32 %31, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #7
  %32 = add nsw i32 %30, -1
  store i32 %32, ptr %3, align 4, !tbaa !5
  %33 = load i32, ptr @M, align 4, !tbaa !5
  %34 = icmp sgt i32 %29, 0
  br i1 %34, label %.lr.ph49, label %._crit_edge50

.lr.ph45.split:                                   ; preds = %.preheader, %._crit_edge
  %35 = phi i32 [ %39, %._crit_edge ], [ %26, %.preheader ]
  %indvars.iv64 = phi i64 [ %indvars.iv.next65, %._crit_edge ], [ 0, %.preheader ]
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #7
  %36 = icmp sgt i32 %35, 0
  br i1 %36, label %.lr.ph43, label %.lr.ph45.split.._crit_edge_crit_edge

.lr.ph45.split.._crit_edge_crit_edge:             ; preds = %.lr.ph45.split
  %.pre = sext i32 %35 to i64
  br label %._crit_edge

.lr.ph43:                                         ; preds = %.lr.ph45.split
  %37 = getelementptr inbounds [301 x i32], ptr @pR, i64 0, i64 %indvars.iv64
  %38 = trunc nuw nsw i64 %indvars.iv64 to i32
  br label %41

._crit_edge:                                      ; preds = %54, %.lr.ph45.split.._crit_edge_crit_edge
  %.pre-phi = phi i64 [ %.pre, %.lr.ph45.split.._crit_edge_crit_edge ], [ %56, %54 ]
  %39 = phi i32 [ %35, %.lr.ph45.split.._crit_edge_crit_edge ], [ %55, %54 ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #7
  %indvars.iv.next65 = add nuw nsw i64 %indvars.iv64, 1
  %40 = icmp slt i64 %indvars.iv.next65, %.pre-phi
  br i1 %40, label %.lr.ph45.split, label %._crit_edge46, !llvm.loop !11

41:                                               ; preds = %.lr.ph43, %54
  %indvars.iv61 = phi i64 [ 0, %.lr.ph43 ], [ %indvars.iv.next62, %54 ]
  %42 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull %1)
  %.not40 = icmp eq i64 %indvars.iv64, %indvars.iv61
  br i1 %.not40, label %54, label %43

43:                                               ; preds = %41
  %44 = load i32, ptr %37, align 4, !tbaa !5
  %45 = load i32, ptr %1, align 4, !tbaa !5
  %46 = add nsw i32 %45, %44
  %47 = getelementptr inbounds [301 x i32], ptr @pL, i64 0, i64 %indvars.iv61
  %48 = load i32, ptr %47, align 4, !tbaa !5
  %49 = icmp slt i32 %46, %48
  br i1 %49, label %50, label %54

50:                                               ; preds = %43
  %51 = load i32, ptr @n, align 4, !tbaa !5
  %52 = add nsw i32 %51, %38
  %53 = trunc nuw nsw i64 %indvars.iv61 to i32
  call void @_Z7addEdgeiii(i32 noundef %52, i32 noundef %53, i32 noundef 1061109567)
  br label %54

54:                                               ; preds = %41, %43, %50
  %indvars.iv.next62 = add nuw nsw i64 %indvars.iv61, 1
  %55 = load i32, ptr @n, align 4, !tbaa !5
  %56 = sext i32 %55 to i64
  %57 = icmp slt i64 %indvars.iv.next62, %56
  br i1 %57, label %41, label %._crit_edge, !llvm.loop !13

._crit_edge50:                                    ; preds = %.lr.ph49, %._crit_edge46
  %58 = load i32, ptr @T, align 4, !tbaa !5
  %59 = load i32, ptr @S, align 4, !tbaa !5
  call void @_Z7addEdgeiii(i32 noundef %58, i32 noundef %59, i32 noundef 1061109567)
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) @S, ptr noundef nonnull align 4 dereferenceable(4) %2) #7
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) @T, ptr noundef nonnull align 4 dereferenceable(4) %3) #7
  %60 = call noundef i32 @_Z5dinicv()
  %61 = load i32, ptr @M, align 4, !tbaa !5
  %62 = add nsw i32 %61, -1
  %63 = sext i32 %62 to i64
  %64 = getelementptr inbounds [60003 x %struct.Edge], ptr @e, i64 0, i64 %63, i32 2
  %65 = load i32, ptr %64, align 4, !tbaa !14
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) @S, ptr noundef nonnull align 4 dereferenceable(4) %2) #7
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) @T, ptr noundef nonnull align 4 dereferenceable(4) %3) #7
  %M.promoted = load i32, ptr @M, align 4, !tbaa !5
  %66 = icmp slt i32 %33, %M.promoted
  br i1 %66, label %.lr.ph52.preheader, label %99

.lr.ph52.preheader:                               ; preds = %._crit_edge50
  %67 = sext i32 %M.promoted to i64
  %68 = sext i32 %33 to i64
  br label %.lr.ph52

.lr.ph49:                                         ; preds = %._crit_edge46, %.lr.ph49
  %indvars.iv67 = phi i64 [ %indvars.iv.next68, %.lr.ph49 ], [ 0, %._crit_edge46 ]
  %69 = phi i32 [ %81, %.lr.ph49 ], [ %29, %._crit_edge46 ]
  %70 = getelementptr inbounds [301 x i32], ptr @lim, i64 0, i64 %indvars.iv67
  %71 = load i32, ptr %70, align 4, !tbaa !5
  %72 = add nsw i32 %71, -1
  %73 = load i32, ptr @m, align 4, !tbaa !5
  %74 = sdiv i32 %72, %73
  %75 = add nsw i32 %74, 1
  store i32 %75, ptr %70, align 4, !tbaa !5
  %76 = load i32, ptr %2, align 4, !tbaa !5
  %77 = trunc nuw nsw i64 %indvars.iv67 to i32
  %78 = add nsw i32 %69, %77
  call void @_Z7addEdgeiii(i32 noundef %76, i32 noundef %78, i32 noundef %75)
  %79 = load i32, ptr %3, align 4, !tbaa !5
  %80 = load i32, ptr %70, align 4, !tbaa !5
  call void @_Z7addEdgeiii(i32 noundef %77, i32 noundef %79, i32 noundef %80)
  %indvars.iv.next68 = add nuw nsw i64 %indvars.iv67, 1
  %81 = load i32, ptr @n, align 4, !tbaa !5
  %82 = sext i32 %81 to i64
  %83 = icmp slt i64 %indvars.iv.next68, %82
  br i1 %83, label %.lr.ph49, label %._crit_edge50, !llvm.loop !16

.lr.ph52:                                         ; preds = %.lr.ph52.preheader, %.lr.ph52
  %indvars.iv70 = phi i64 [ %67, %.lr.ph52.preheader ], [ %indvars.iv.next71, %.lr.ph52 ]
  %84 = add nsw i64 %indvars.iv70, -1
  %85 = getelementptr inbounds [60003 x %struct.Edge], ptr @e, i64 0, i64 %84, i32 1
  %86 = load i32, ptr %85, align 4, !tbaa !17
  %indvars.iv.next71 = add nsw i64 %indvars.iv70, -2
  %87 = getelementptr inbounds [60003 x %struct.Edge], ptr @e, i64 0, i64 %indvars.iv.next71
  %88 = getelementptr inbounds i8, ptr %87, i64 4
  %89 = load i32, ptr %88, align 4, !tbaa !17
  %90 = load i32, ptr %87, align 4, !tbaa !18
  %91 = sext i32 %86 to i64
  %92 = getelementptr inbounds [301 x i32], ptr @lnk, i64 0, i64 %91
  store i32 %90, ptr %92, align 4, !tbaa !5
  %93 = getelementptr inbounds [60003 x %struct.Edge], ptr @e, i64 0, i64 %84
  %94 = load i32, ptr %93, align 4, !tbaa !18
  %95 = sext i32 %89 to i64
  %96 = getelementptr inbounds [301 x i32], ptr @lnk, i64 0, i64 %95
  store i32 %94, ptr %96, align 4, !tbaa !5
  %97 = icmp sgt i64 %indvars.iv.next71, %68
  br i1 %97, label %.lr.ph52, label %._crit_edge53, !llvm.loop !19

._crit_edge53:                                    ; preds = %.lr.ph52
  %98 = trunc nsw i64 %indvars.iv.next71 to i32
  store i32 %98, ptr @M, align 4, !tbaa !5
  br label %99

99:                                               ; preds = %._crit_edge53, %._crit_edge50
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) @S, ptr noundef nonnull align 4 dereferenceable(4) @T) #7
  %100 = call noundef i32 @_Z5dinicv()
  %101 = sub nsw i32 %65, %100
  %102 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.3, i32 noundef %.055, i32 noundef %101)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #7
  %103 = add nuw nsw i32 %.055, 1
  %104 = load i32, ptr @t, align 4, !tbaa !5
  %.not.not = icmp slt i32 %.055, %104
  br i1 %.not.not, label %.lr.ph57, label %._crit_edge58, !llvm.loop !20
}

; Function Attrs: nofree nounwind
declare noundef i32 @__isoc99_scanf(ptr nocapture noundef readonly, ...) local_unnamed_addr #5

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #6

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #5

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10, !12}
!12 = !{!"llvm.loop.unswitch.partial.disable"}
!13 = distinct !{!13, !10}
!14 = !{!15, !6, i64 8}
!15 = !{!"_ZTS4Edge", !6, i64 0, !6, i64 4, !6, i64 8}
!16 = distinct !{!16, !10}
!17 = !{!15, !6, i64 4}
!18 = !{!15, !6, i64 0}
!19 = distinct !{!19, !10}
!20 = distinct !{!20, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SCCPPass,SROAPass,SimpleLoopUnswitchPass,SimplifyCFGPass,TailCallElimPass