; LLVM IR from tangjz/acm-icpc :: codeforces/482B.ll (Z6updateiiiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@seg = external dso_local global [262144 x i32], align 16

; Function Attrs: mustprogress uwtable
define dso_local void @_Z6updateiiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) #0 {
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  store i32 %0, ptr %7, align 4, !tbaa !5
  store i32 %1, ptr %8, align 4, !tbaa !5
  store i32 %2, ptr %9, align 4, !tbaa !5
  store i32 %3, ptr %10, align 4, !tbaa !5
  store i32 %4, ptr %11, align 4, !tbaa !5
  store i32 %5, ptr %12, align 4, !tbaa !5
  %14 = load i32, ptr %10, align 4, !tbaa !5
  %15 = load i32, ptr %8, align 4, !tbaa !5
  %16 = icmp eq i32 %14, %15
  br i1 %16, label %17, label %28

17:                                               ; preds = %6
  %18 = load i32, ptr %11, align 4, !tbaa !5
  %19 = load i32, ptr %9, align 4, !tbaa !5
  %20 = icmp eq i32 %18, %19
  br i1 %20, label %21, label %28

21:                                               ; preds = %17
  %22 = load i32, ptr %12, align 4, !tbaa !5
  %23 = load i32, ptr %7, align 4, !tbaa !5
  %24 = sext i32 %23 to i64
  %25 = getelementptr inbounds [262144 x i32], ptr @seg, i64 0, i64 %24
  %26 = load i32, ptr %25, align 4, !tbaa !5
  %27 = or i32 %26, %22
  store i32 %27, ptr %25, align 4, !tbaa !5
  br label %78

28:                                               ; preds = %17, %6
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #2
  %29 = load i32, ptr %8, align 4, !tbaa !5
  %30 = load i32, ptr %9, align 4, !tbaa !5
  %31 = add nsw i32 %29, %30
  %32 = ashr i32 %31, 1
  store i32 %32, ptr %13, align 4, !tbaa !5
  %33 = load i32, ptr %11, align 4, !tbaa !5
  %34 = load i32, ptr %13, align 4, !tbaa !5
  %35 = icmp sle i32 %33, %34
  br i1 %35, label %36, label %44

36:                                               ; preds = %28
  %37 = load i32, ptr %7, align 4, !tbaa !5
  %38 = shl i32 %37, 1
  %39 = load i32, ptr %8, align 4, !tbaa !5
  %40 = load i32, ptr %13, align 4, !tbaa !5
  %41 = load i32, ptr %10, align 4, !tbaa !5
  %42 = load i32, ptr %11, align 4, !tbaa !5
  %43 = load i32, ptr %12, align 4, !tbaa !5
  call void @_Z6updateiiiiii(i32 noundef %38, i32 noundef %39, i32 noundef %40, i32 noundef %41, i32 noundef %42, i32 noundef %43)
  br label %77

44:                                               ; preds = %28
  %45 = load i32, ptr %13, align 4, !tbaa !5
  %46 = load i32, ptr %10, align 4, !tbaa !5
  %47 = icmp slt i32 %45, %46
  br i1 %47, label %48, label %58

48:                                               ; preds = %44
  %49 = load i32, ptr %7, align 4, !tbaa !5
  %50 = shl i32 %49, 1
  %51 = add nsw i32 %50, 1
  %52 = load i32, ptr %13, align 4, !tbaa !5
  %53 = add nsw i32 %52, 1
  %54 = load i32, ptr %9, align 4, !tbaa !5
  %55 = load i32, ptr %10, align 4, !tbaa !5
  %56 = load i32, ptr %11, align 4, !tbaa !5
  %57 = load i32, ptr %12, align 4, !tbaa !5
  call void @_Z6updateiiiiii(i32 noundef %51, i32 noundef %53, i32 noundef %54, i32 noundef %55, i32 noundef %56, i32 noundef %57)
  br label %76

58:                                               ; preds = %44
  %59 = load i32, ptr %7, align 4, !tbaa !5
  %60 = shl i32 %59, 1
  %61 = load i32, ptr %8, align 4, !tbaa !5
  %62 = load i32, ptr %13, align 4, !tbaa !5
  %63 = load i32, ptr %10, align 4, !tbaa !5
  %64 = load i32, ptr %13, align 4, !tbaa !5
  %65 = load i32, ptr %12, align 4, !tbaa !5
  call void @_Z6updateiiiiii(i32 noundef %60, i32 noundef %61, i32 noundef %62, i32 noundef %63, i32 noundef %64, i32 noundef %65)
  %66 = load i32, ptr %7, align 4, !tbaa !5
  %67 = shl i32 %66, 1
  %68 = add nsw i32 %67, 1
  %69 = load i32, ptr %13, align 4, !tbaa !5
  %70 = add nsw i32 %69, 1
  %71 = load i32, ptr %9, align 4, !tbaa !5
  %72 = load i32, ptr %13, align 4, !tbaa !5
  %73 = add nsw i32 %72, 1
  %74 = load i32, ptr %11, align 4, !tbaa !5
  %75 = load i32, ptr %12, align 4, !tbaa !5
  call void @_Z6updateiiiiii(i32 noundef %68, i32 noundef %70, i32 noundef %71, i32 noundef %73, i32 noundef %74, i32 noundef %75)
  br label %76

76:                                               ; preds = %58, %48
  br label %77

77:                                               ; preds = %76, %36
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #2
  br label %78

78:                                               ; preds = %77, %21
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@seg = external dso_local local_unnamed_addr global [262144 x i32], align 16

; Function Attrs: mustprogress nofree nosync nounwind memory(readwrite, argmem: none, inaccessiblemem: none) uwtable
define dso_local void @_Z6updateiiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) local_unnamed_addr #0 {
  %7 = icmp eq i32 %3, %1
  %8 = icmp eq i32 %4, %2
  %or.cond485460 = and i1 %8, %7
  br i1 %or.cond485460, label %tailrecurse.outer._crit_edge, label %.lr.ph.lr.ph

.lr.ph.lr.ph:                                     ; preds = %6, %tailrecurse.outer.outer
  %9 = phi i1 [ true, %tailrecurse.outer.outer ], [ %7, %6 ]
  %.tr42.ph.ph64 = phi i32 [ %29, %tailrecurse.outer.outer ], [ %3, %6 ]
  %.tr41.ph.ph63 = phi i32 [ %.us-phi53, %tailrecurse.outer.outer ], [ %2, %6 ]
  %.tr40.ph.ph62 = phi i32 [ %29, %tailrecurse.outer.outer ], [ %1, %6 ]
  %.tr.ph.ph61 = phi i32 [ %28, %tailrecurse.outer.outer ], [ %0, %6 ]
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.lr.ph, %tailrecurse.outer
  %10 = phi i1 [ %9, %.lr.ph.lr.ph ], [ %27, %tailrecurse.outer ]
  %.tr41.ph57 = phi i32 [ %.tr41.ph.ph63, %.lr.ph.lr.ph ], [ %.us-phi53, %tailrecurse.outer ]
  %.tr40.ph56 = phi i32 [ %.tr40.ph.ph62, %.lr.ph.lr.ph ], [ %26, %tailrecurse.outer ]
  %.tr.ph55 = phi i32 [ %.tr.ph.ph61, %.lr.ph.lr.ph ], [ %25, %tailrecurse.outer ]
  br i1 %10, label %.lr.ph.split, label %tailrecurse.us

tailrecurse.us:                                   ; preds = %.lr.ph, %tailrecurse.us
  %.tr4150.us = phi i32 [ %12, %tailrecurse.us ], [ %.tr41.ph57, %.lr.ph ]
  %.tr49.us = phi i32 [ %13, %tailrecurse.us ], [ %.tr.ph55, %.lr.ph ]
  %11 = add i32 %.tr4150.us, %.tr40.ph56
  %12 = ashr i32 %11, 1
  %.not.us = icmp slt i32 %12, %4
  %13 = shl i32 %.tr49.us, 1
  br i1 %.not.us, label %.split.us, label %tailrecurse.us

tailrecurse.outer._crit_edge:                     ; preds = %tailrecurse.outer.outer, %tailrecurse.outer, %tailrecurse, %6
  %.tr.lcssa = phi i32 [ %0, %6 ], [ %20, %tailrecurse ], [ %25, %tailrecurse.outer ], [ %28, %tailrecurse.outer.outer ]
  %14 = sext i32 %.tr.lcssa to i64
  %15 = getelementptr inbounds [262144 x i32], ptr @seg, i64 0, i64 %14
  %16 = load i32, ptr %15, align 4, !tbaa !5
  %17 = or i32 %16, %5
  store i32 %17, ptr %15, align 4, !tbaa !5
  ret void

.lr.ph.split:                                     ; preds = %.lr.ph, %tailrecurse
  %.tr4150 = phi i32 [ %19, %tailrecurse ], [ %.tr41.ph57, %.lr.ph ]
  %.tr49 = phi i32 [ %20, %tailrecurse ], [ %.tr.ph55, %.lr.ph ]
  %18 = add i32 %.tr4150, %.tr40.ph56
  %19 = ashr i32 %18, 1
  %.not = icmp slt i32 %19, %4
  br i1 %.not, label %.split.us, label %tailrecurse

tailrecurse:                                      ; preds = %.lr.ph.split
  %20 = shl i32 %.tr49, 1
  %21 = icmp eq i32 %19, %4
  br i1 %21, label %tailrecurse.outer._crit_edge, label %.lr.ph.split

.split.us:                                        ; preds = %tailrecurse.us, %.lr.ph.split
  %.us-phi = phi i32 [ %19, %.lr.ph.split ], [ %12, %tailrecurse.us ]
  %.us-phi52 = phi i32 [ %.tr49, %.lr.ph.split ], [ %.tr49.us, %tailrecurse.us ]
  %.us-phi53 = phi i32 [ %.tr4150, %.lr.ph.split ], [ %.tr4150.us, %tailrecurse.us ]
  %22 = icmp slt i32 %.us-phi, %.tr42.ph.ph64
  %23 = shl i32 %.us-phi52, 1
  %24 = icmp eq i32 %.us-phi53, %4
  br i1 %22, label %tailrecurse.outer, label %tailrecurse.outer.outer

tailrecurse.outer:                                ; preds = %.split.us
  %25 = or disjoint i32 %23, 1
  %26 = add nsw i32 %.us-phi, 1
  %27 = icmp eq i32 %.tr42.ph.ph64, %26
  %or.cond48 = and i1 %24, %27
  br i1 %or.cond48, label %tailrecurse.outer._crit_edge, label %.lr.ph

tailrecurse.outer.outer:                          ; preds = %.split.us
  tail call void @_Z6updateiiiiii(i32 noundef %23, i32 noundef %.tr40.ph56, i32 noundef %.us-phi, i32 noundef %.tr42.ph.ph64, i32 noundef %.us-phi, i32 noundef %5)
  %28 = or disjoint i32 %23, 1
  %29 = add nsw i32 %.us-phi, 1
  br i1 %24, label %tailrecurse.outer._crit_edge, label %.lr.ph.lr.ph
}

attributes #0 = { mustprogress nofree nosync nounwind memory(readwrite, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass