; LLVM IR from tangjz/acm-icpc :: lydsy/2905.ll (Z6updateiiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@seg = external dso_local global [600002 x i32], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z6updateiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #1 {
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  store i32 %0, ptr %6, align 4, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !5
  store i32 %4, ptr %10, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  %14 = load i32, ptr %6, align 4, !tbaa !5
  %15 = load i32, ptr %7, align 4, !tbaa !5
  %16 = call noundef i32 @_Z7seg_idxii(i32 noundef %14, i32 noundef %15)
  store i32 %16, ptr %11, align 4, !tbaa !5
  %17 = load i32, ptr %8, align 4, !tbaa !5
  %18 = load i32, ptr %6, align 4, !tbaa !5
  %19 = icmp sle i32 %17, %18
  br i1 %19, label %20, label %29

20:                                               ; preds = %5
  %21 = load i32, ptr %7, align 4, !tbaa !5
  %22 = load i32, ptr %9, align 4, !tbaa !5
  %23 = icmp sle i32 %21, %22
  br i1 %23, label %24, label %29

24:                                               ; preds = %20
  %25 = load i32, ptr %11, align 4, !tbaa !5
  %26 = sext i32 %25 to i64
  %27 = getelementptr inbounds [600002 x i32], ptr @seg, i64 0, i64 %26
  %28 = load i32, ptr %10, align 4, !tbaa !5
  call void @_Z3updRii(ptr noundef nonnull align 4 dereferenceable(4) %27, i32 noundef %28)
  store i32 1, ptr %12, align 4
  br label %55

29:                                               ; preds = %20, %5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  %30 = load i32, ptr %6, align 4, !tbaa !5
  %31 = load i32, ptr %7, align 4, !tbaa !5
  %32 = add nsw i32 %30, %31
  %33 = ashr i32 %32, 1
  store i32 %33, ptr %13, align 4, !tbaa !5
  %34 = load i32, ptr %8, align 4, !tbaa !5
  %35 = load i32, ptr %13, align 4, !tbaa !5
  %36 = icmp sle i32 %34, %35
  br i1 %36, label %37, label %43

37:                                               ; preds = %29
  %38 = load i32, ptr %6, align 4, !tbaa !5
  %39 = load i32, ptr %13, align 4, !tbaa !5
  %40 = load i32, ptr %8, align 4, !tbaa !5
  %41 = load i32, ptr %9, align 4, !tbaa !5
  %42 = load i32, ptr %10, align 4, !tbaa !5
  call void @_Z6updateiiiii(i32 noundef %38, i32 noundef %39, i32 noundef %40, i32 noundef %41, i32 noundef %42)
  br label %43

43:                                               ; preds = %37, %29
  %44 = load i32, ptr %9, align 4, !tbaa !5
  %45 = load i32, ptr %13, align 4, !tbaa !5
  %46 = icmp sgt i32 %44, %45
  br i1 %46, label %47, label %54

47:                                               ; preds = %43
  %48 = load i32, ptr %13, align 4, !tbaa !5
  %49 = add nsw i32 %48, 1
  %50 = load i32, ptr %7, align 4, !tbaa !5
  %51 = load i32, ptr %8, align 4, !tbaa !5
  %52 = load i32, ptr %9, align 4, !tbaa !5
  %53 = load i32, ptr %10, align 4, !tbaa !5
  call void @_Z6updateiiiii(i32 noundef %49, i32 noundef %50, i32 noundef %51, i32 noundef %52, i32 noundef %53)
  br label %54

54:                                               ; preds = %47, %43
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  store i32 0, ptr %12, align 4
  br label %55

55:                                               ; preds = %54, %24
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  %56 = load i32, ptr %12, align 4
  switch i32 %56, label %58 [
    i32 0, label %57
    i32 1, label %57
  ]

57:                                               ; preds = %55, %55
  ret void

58:                                               ; preds = %55
  unreachable
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7seg_idxii(i32 noundef, i32 noundef) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_Z3updRii(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@seg = external dso_local global [600002 x i32], align 16

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z6updateiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #0 {
  %6 = tail call noundef i32 @_Z7seg_idxii(i32 noundef %0, i32 noundef %1)
  %.not33 = icmp sgt i32 %2, %0
  %.not26 = icmp sgt i32 %1, %3
  %or.cond34 = or i1 %.not26, %.not33
  br i1 %or.cond34, label %.lr.ph, label %tailrecurse._crit_edge

.lr.ph:                                           ; preds = %5
  br i1 %.not26, label %.lr.ph.split.us, label %.lr.ph.split

.lr.ph.split.us:                                  ; preds = %.lr.ph, %tailrecurse.us
  %.tr35.us = phi i32 [ %9, %tailrecurse.us ], [ %0, %.lr.ph ]
  %7 = add nsw i32 %.tr35.us, %1
  %8 = ashr i32 %7, 1
  %.not27.us = icmp slt i32 %8, %2
  br i1 %.not27.us, label %12, label %11

tailrecurse.us:                                   ; preds = %12
  %9 = add nsw i32 %8, 1
  %10 = tail call noundef i32 @_Z7seg_idxii(i32 noundef %9, i32 noundef %1)
  br label %.lr.ph.split.us

11:                                               ; preds = %.lr.ph.split.us
  tail call void @_Z6updateiiiii(i32 noundef %.tr35.us, i32 noundef %8, i32 noundef %2, i32 noundef %3, i32 noundef %4)
  br label %12

12:                                               ; preds = %11, %.lr.ph.split.us
  %13 = icmp slt i32 %8, %3
  br i1 %13, label %tailrecurse.us, label %.loopexit

tailrecurse:                                      ; preds = %21
  %14 = add nsw i32 %19, 1
  %15 = tail call noundef i32 @_Z7seg_idxii(i32 noundef %14, i32 noundef %1)
  %.not = icmp slt i32 %14, %2
  br i1 %.not, label %.lr.ph.split, label %tailrecurse._crit_edge

tailrecurse._crit_edge:                           ; preds = %tailrecurse, %5
  %.lcssa = phi i32 [ %6, %5 ], [ %15, %tailrecurse ]
  %16 = sext i32 %.lcssa to i64
  %17 = getelementptr inbounds [600002 x i32], ptr @seg, i64 0, i64 %16
  tail call void @_Z3updRii(ptr noundef nonnull align 4 dereferenceable(4) %17, i32 noundef %4)
  br label %.loopexit

.lr.ph.split:                                     ; preds = %.lr.ph, %tailrecurse
  %.tr35 = phi i32 [ %14, %tailrecurse ], [ %0, %.lr.ph ]
  %18 = add nsw i32 %.tr35, %1
  %19 = ashr i32 %18, 1
  %.not27 = icmp slt i32 %19, %2
  br i1 %.not27, label %21, label %20

20:                                               ; preds = %.lr.ph.split
  tail call void @_Z6updateiiiii(i32 noundef %.tr35, i32 noundef %19, i32 noundef %2, i32 noundef %3, i32 noundef %4)
  br label %21

21:                                               ; preds = %20, %.lr.ph.split
  %22 = icmp slt i32 %19, %3
  br i1 %22, label %tailrecurse, label %.loopexit

.loopexit:                                        ; preds = %21, %12, %tailrecurse._crit_edge
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7seg_idxii(i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_Z3updRii(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef) local_unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass