; LLVM IR from tangjz/acm-icpc :: hdu/6118.ll (ZN4MCMF5solveEiPxS0_PA501_x)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZN4MCMF1nE = external dso_local global i32, align 4
@_ZN4MCMF1mE = external dso_local global i32, align 4
@_ZN4MCMF1sE = external dso_local global i32, align 4
@_ZN4MCMF1tE = external dso_local global i32, align 4
@_ZN4MCMF3lnkE = external dso_local global [2001 x i32], align 16
@_ZN4MCMF4flowE = external dso_local global i64, align 8
@_ZN4MCMF4costE = external dso_local global i64, align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4MCMF7AddEdgeEiixx(i32 noundef, i32 noundef, i64 noundef, i64 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZN4MCMF11BellmanFordEv() #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #4

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_ZN4MCMF5solveEiPxS0_PA501_x(i32 noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) #2 {
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  store i32 %0, ptr %5, align 4, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !9
  store ptr %2, ptr %7, align 8, !tbaa !9
  store ptr %3, ptr %8, align 8, !tbaa !9
  %13 = load i32, ptr %5, align 4, !tbaa !5
  %14 = shl i32 %13, 1
  %15 = add nsw i32 %14, 2
  store i32 %15, ptr @_ZN4MCMF1nE, align 4, !tbaa !5
  store i32 0, ptr @_ZN4MCMF1mE, align 4, !tbaa !5
  %16 = load i32, ptr @_ZN4MCMF1nE, align 4, !tbaa !5
  %17 = sext i32 %16 to i64
  %18 = mul i64 %17, 4
  call void @llvm.memset.p0.i64(ptr align 16 @_ZN4MCMF3lnkE, i8 -1, i64 %18, i1 false)
  %19 = load i32, ptr %5, align 4, !tbaa !5
  %20 = shl i32 %19, 1
  store i32 %20, ptr @_ZN4MCMF1sE, align 4, !tbaa !5
  %21 = load i32, ptr %5, align 4, !tbaa !5
  %22 = shl i32 %21, 1
  %23 = or i32 %22, 1
  store i32 %23, ptr @_ZN4MCMF1tE, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #5
  store i32 0, ptr %9, align 4, !tbaa !5
  br label %24

24:                                               ; preds = %46, %4
  %25 = load i32, ptr %9, align 4, !tbaa !5
  %26 = load i32, ptr %5, align 4, !tbaa !5
  %27 = icmp slt i32 %25, %26
  br i1 %27, label %29, label %28

28:                                               ; preds = %24
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #5
  br label %49

29:                                               ; preds = %24
  %30 = load i32, ptr @_ZN4MCMF1sE, align 4, !tbaa !5
  %31 = load i32, ptr %9, align 4, !tbaa !5
  %32 = load ptr, ptr %6, align 8, !tbaa !9
  %33 = load i32, ptr %9, align 4, !tbaa !5
  %34 = sext i32 %33 to i64
  %35 = getelementptr inbounds i64, ptr %32, i64 %34
  %36 = load i64, ptr %35, align 8, !tbaa !11
  call void @_ZN4MCMF7AddEdgeEiixx(i32 noundef %30, i32 noundef %31, i64 noundef %36, i64 noundef 0)
  %37 = load i32, ptr %5, align 4, !tbaa !5
  %38 = load i32, ptr %9, align 4, !tbaa !5
  %39 = add nsw i32 %37, %38
  %40 = load i32, ptr @_ZN4MCMF1tE, align 4, !tbaa !5
  %41 = load ptr, ptr %7, align 8, !tbaa !9
  %42 = load i32, ptr %9, align 4, !tbaa !5
  %43 = sext i32 %42 to i64
  %44 = getelementptr inbounds i64, ptr %41, i64 %43
  %45 = load i64, ptr %44, align 8, !tbaa !11
  call void @_ZN4MCMF7AddEdgeEiixx(i32 noundef %39, i32 noundef %40, i64 noundef %45, i64 noundef 0)
  br label %46

46:                                               ; preds = %29
  %47 = load i32, ptr %9, align 4, !tbaa !5
  %48 = add nsw i32 %47, 1
  store i32 %48, ptr %9, align 4, !tbaa !5
  br label %24, !llvm.loop !13

49:                                               ; preds = %28
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #5
  store i32 0, ptr %10, align 4, !tbaa !5
  br label %50

50:                                               ; preds = %99, %49
  %51 = load i32, ptr %10, align 4, !tbaa !5
  %52 = load i32, ptr %5, align 4, !tbaa !5
  %53 = icmp slt i32 %51, %52
  br i1 %53, label %55, label %54

54:                                               ; preds = %50
  store i32 5, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  br label %102

55:                                               ; preds = %50
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #5
  store i32 0, ptr %12, align 4, !tbaa !5
  br label %56

56:                                               ; preds = %95, %55
  %57 = load i32, ptr %12, align 4, !tbaa !5
  %58 = load i32, ptr %5, align 4, !tbaa !5
  %59 = icmp slt i32 %57, %58
  br i1 %59, label %61, label %60

60:                                               ; preds = %56
  store i32 8, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #5
  br label %98

61:                                               ; preds = %56
  %62 = load ptr, ptr %8, align 8, !tbaa !9
  %63 = load i32, ptr %10, align 4, !tbaa !5
  %64 = sext i32 %63 to i64
  %65 = getelementptr inbounds [501 x i64], ptr %62, i64 %64
  %66 = load i32, ptr %12, align 4, !tbaa !5
  %67 = sext i32 %66 to i64
  %68 = getelementptr inbounds [501 x i64], ptr %65, i64 0, i64 %67
  %69 = load i64, ptr %68, align 8, !tbaa !11
  %70 = icmp sgt i64 %69, 0
  br i1 %70, label %71, label %94

71:                                               ; preds = %61
  %72 = load i32, ptr %10, align 4, !tbaa !5
  %73 = load i32, ptr %5, align 4, !tbaa !5
  %74 = load i32, ptr %12, align 4, !tbaa !5
  %75 = add nsw i32 %73, %74
  %76 = load ptr, ptr %6, align 8, !tbaa !9
  %77 = load i32, ptr %10, align 4, !tbaa !5
  %78 = sext i32 %77 to i64
  %79 = getelementptr inbounds i64, ptr %76, i64 %78
  %80 = load ptr, ptr %7, align 8, !tbaa !9
  %81 = load i32, ptr %12, align 4, !tbaa !5
  %82 = sext i32 %81 to i64
  %83 = getelementptr inbounds i64, ptr %80, i64 %82
  %84 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %79, ptr noundef nonnull align 8 dereferenceable(8) %83)
  %85 = load i64, ptr %84, align 8, !tbaa !11
  %86 = load ptr, ptr %8, align 8, !tbaa !9
  %87 = load i32, ptr %10, align 4, !tbaa !5
  %88 = sext i32 %87 to i64
  %89 = getelementptr inbounds [501 x i64], ptr %86, i64 %88
  %90 = load i32, ptr %12, align 4, !tbaa !5
  %91 = sext i32 %90 to i64
  %92 = getelementptr inbounds [501 x i64], ptr %89, i64 0, i64 %91
  %93 = load i64, ptr %92, align 8, !tbaa !11
  call void @_ZN4MCMF7AddEdgeEiixx(i32 noundef %72, i32 noundef %75, i64 noundef %85, i64 noundef %93)
  br label %94

94:                                               ; preds = %71, %61
  br label %95

95:                                               ; preds = %94
  %96 = load i32, ptr %12, align 4, !tbaa !5
  %97 = add nsw i32 %96, 1
  store i32 %97, ptr %12, align 4, !tbaa !5
  br label %56, !llvm.loop !15

98:                                               ; preds = %60
  br label %99

99:                                               ; preds = %98
  %100 = load i32, ptr %10, align 4, !tbaa !5
  %101 = add nsw i32 %100, 1
  store i32 %101, ptr %10, align 4, !tbaa !5
  br label %50, !llvm.loop !16

102:                                              ; preds = %54
  store i64 0, ptr @_ZN4MCMF4costE, align 8, !tbaa !11
  store i64 0, ptr @_ZN4MCMF4flowE, align 8, !tbaa !11
  br label %103

103:                                              ; preds = %105, %102
  %104 = call noundef zeroext i1 @_ZN4MCMF11BellmanFordEv()
  br i1 %104, label %105, label %106

105:                                              ; preds = %103
  br label %103, !llvm.loop !17

106:                                              ; preds = %103
  %107 = load i64, ptr @_ZN4MCMF4costE, align 8, !tbaa !11
  ret i64 %107
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long long", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}
!17 = distinct !{!17, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZN4MCMF1nE = external dso_local local_unnamed_addr global i32, align 4
@_ZN4MCMF1mE = external dso_local local_unnamed_addr global i32, align 4
@_ZN4MCMF1sE = external dso_local local_unnamed_addr global i32, align 4
@_ZN4MCMF1tE = external dso_local local_unnamed_addr global i32, align 4
@_ZN4MCMF3lnkE = external dso_local local_unnamed_addr global [2001 x i32], align 16
@_ZN4MCMF4flowE = external dso_local local_unnamed_addr global i64, align 8
@_ZN4MCMF4costE = external dso_local local_unnamed_addr global i64, align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4MCMF7AddEdgeEiixx(i32 noundef, i32 noundef, i64 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZN4MCMF11BellmanFordEv() local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_ZN4MCMF5solveEiPxS0_PA501_x(i32 noundef %0, ptr noundef %1, ptr noundef %2, ptr nocapture noundef readonly %3) local_unnamed_addr #1 {
  %5 = shl i32 %0, 1
  %6 = add nsw i32 %5, 2
  store i32 %6, ptr @_ZN4MCMF1nE, align 4, !tbaa !5
  store i32 0, ptr @_ZN4MCMF1mE, align 4, !tbaa !5
  %7 = sext i32 %6 to i64
  %8 = shl nsw i64 %7, 2
  tail call void @llvm.memset.p0.i64(ptr nonnull align 16 @_ZN4MCMF3lnkE, i8 -1, i64 %8, i1 false)
  store i32 %5, ptr @_ZN4MCMF1sE, align 4, !tbaa !5
  %9 = or disjoint i32 %5, 1
  store i32 %9, ptr @_ZN4MCMF1tE, align 4, !tbaa !5
  %10 = icmp sgt i32 %0, 0
  br i1 %10, label %.lr.ph.preheader, label %._crit_edge39

.lr.ph.preheader:                                 ; preds = %4
  %11 = zext nneg i32 %0 to i64
  br label %.lr.ph

.preheader34:                                     ; preds = %.lr.ph
  br i1 %10, label %.preheader.us.preheader, label %._crit_edge39

.preheader.us.preheader:                          ; preds = %.preheader34
  %12 = zext nneg i32 %0 to i64
  br label %.preheader.us

.preheader.us:                                    ; preds = %.preheader.us.preheader, %._crit_edge.us
  %indvars.iv46 = phi i64 [ 0, %.preheader.us.preheader ], [ %indvars.iv.next47, %._crit_edge.us ]
  %13 = getelementptr inbounds i64, ptr %1, i64 %indvars.iv46
  %14 = trunc nuw nsw i64 %indvars.iv46 to i32
  br label %15

15:                                               ; preds = %.preheader.us, %26
  %indvars.iv41 = phi i64 [ 0, %.preheader.us ], [ %indvars.iv.next42, %26 ]
  %16 = getelementptr inbounds [501 x i64], ptr %3, i64 %indvars.iv46, i64 %indvars.iv41
  %17 = load i64, ptr %16, align 8, !tbaa !9
  %18 = icmp sgt i64 %17, 0
  br i1 %18, label %19, label %26

19:                                               ; preds = %15
  %20 = getelementptr inbounds i64, ptr %2, i64 %indvars.iv41
  %21 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %13, ptr noundef nonnull align 8 dereferenceable(8) %20)
  %22 = load i64, ptr %21, align 8, !tbaa !9
  %23 = load i64, ptr %16, align 8, !tbaa !9
  %24 = trunc i64 %indvars.iv41 to i32
  %25 = add i32 %24, %0
  tail call void @_ZN4MCMF7AddEdgeEiixx(i32 noundef %14, i32 noundef %25, i64 noundef %22, i64 noundef %23)
  br label %26

26:                                               ; preds = %19, %15
  %indvars.iv.next42 = add nuw nsw i64 %indvars.iv41, 1
  %exitcond45.not = icmp eq i64 %indvars.iv.next42, %12
  br i1 %exitcond45.not, label %._crit_edge.us, label %15, !llvm.loop !11

._crit_edge.us:                                   ; preds = %26
  %indvars.iv.next47 = add nuw nsw i64 %indvars.iv46, 1
  %exitcond50.not = icmp eq i64 %indvars.iv.next47, %12
  br i1 %exitcond50.not, label %._crit_edge39, label %.preheader.us, !llvm.loop !13

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %indvars.iv = phi i64 [ 0, %.lr.ph.preheader ], [ %indvars.iv.next, %.lr.ph ]
  %27 = load i32, ptr @_ZN4MCMF1sE, align 4, !tbaa !5
  %28 = getelementptr inbounds i64, ptr %1, i64 %indvars.iv
  %29 = load i64, ptr %28, align 8, !tbaa !9
  %30 = trunc nuw nsw i64 %indvars.iv to i32
  tail call void @_ZN4MCMF7AddEdgeEiixx(i32 noundef %27, i32 noundef %30, i64 noundef %29, i64 noundef 0)
  %31 = load i32, ptr @_ZN4MCMF1tE, align 4, !tbaa !5
  %32 = getelementptr inbounds i64, ptr %2, i64 %indvars.iv
  %33 = load i64, ptr %32, align 8, !tbaa !9
  %34 = trunc i64 %indvars.iv to i32
  %35 = add i32 %34, %0
  tail call void @_ZN4MCMF7AddEdgeEiixx(i32 noundef %35, i32 noundef %31, i64 noundef %33, i64 noundef 0)
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %11
  br i1 %exitcond.not, label %.preheader34, label %.lr.ph, !llvm.loop !14

._crit_edge39:                                    ; preds = %._crit_edge.us, %4, %.preheader34
  store i64 0, ptr @_ZN4MCMF4costE, align 8, !tbaa !9
  store i64 0, ptr @_ZN4MCMF4flowE, align 8, !tbaa !9
  br label %36

36:                                               ; preds = %36, %._crit_edge39
  %37 = tail call noundef zeroext i1 @_ZN4MCMF11BellmanFordEv()
  br i1 %37, label %36, label %38, !llvm.loop !15

38:                                               ; preds = %36
  %39 = load i64, ptr @_ZN4MCMF4costE, align 8, !tbaa !9
  ret i64 %39
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}
!15 = distinct !{!15, !12}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass