; LLVM IR from pms67/HadesFCS :: Firmware/F4Quad/Middlewares/Third_Party/FreeRTOS/Source (tasks)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.tskTaskControlBlock = type { ptr, %struct.xLIST_ITEM, %struct.xLIST_ITEM, i64, ptr, [16 x i8], i64, i64, i32, i8, i8 }
%struct.xLIST_ITEM = type { i32, ptr, ptr, ptr, ptr }

; Function Attrs: nounwind uwtable
define dso_local ptr @xTaskCreateStatic(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, i64 noundef %4, ptr noundef %5, ptr noundef %6) #0 {
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca ptr, align 8
  %12 = alloca i64, align 8
  %13 = alloca ptr, align 8
  %14 = alloca ptr, align 8
  %15 = alloca ptr, align 8
  %16 = alloca ptr, align 8
  %17 = alloca i64, align 8
  store ptr %0, ptr %8, align 8, !tbaa !5
  store ptr %1, ptr %9, align 8, !tbaa !5
  store i32 %2, ptr %10, align 4, !tbaa !9
  store ptr %3, ptr %11, align 8, !tbaa !5
  store i64 %4, ptr %12, align 8, !tbaa !11
  store ptr %5, ptr %13, align 8, !tbaa !5
  store ptr %6, ptr %14, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #3
  %18 = load ptr, ptr %13, align 8, !tbaa !5
  %19 = icmp ne ptr %18, null
  %20 = zext i1 %19 to i32
  %21 = icmp eq i32 %20, 0
  br i1 %21, label %22, label %24

22:                                               ; preds = %7
  call void @vPortRaiseBASEPRI()
  br label %23

23:                                               ; preds = %23, %22
  br label %23

24:                                               ; preds = %7
  %25 = load ptr, ptr %14, align 8, !tbaa !5
  %26 = icmp ne ptr %25, null
  %27 = zext i1 %26 to i32
  %28 = icmp eq i32 %27, 0
  br i1 %28, label %29, label %31

29:                                               ; preds = %24
  call void @vPortRaiseBASEPRI()
  br label %30

30:                                               ; preds = %30, %29
  br label %30

31:                                               ; preds = %24
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #3
  store volatile i64 144, ptr %17, align 8, !tbaa !11
  %32 = load volatile i64, ptr %17, align 8, !tbaa !11
  %33 = icmp eq i64 %32, 144
  %34 = zext i1 %33 to i32
  %35 = icmp eq i32 %34, 0
  br i1 %35, label %36, label %38

36:                                               ; preds = %31
  call void @vPortRaiseBASEPRI()
  br label %37

37:                                               ; preds = %37, %36
  br label %37

38:                                               ; preds = %31
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #3
  %39 = load ptr, ptr %14, align 8, !tbaa !5
  %40 = icmp ne ptr %39, null
  br i1 %40, label %41, label %58

41:                                               ; preds = %38
  %42 = load ptr, ptr %13, align 8, !tbaa !5
  %43 = icmp ne ptr %42, null
  br i1 %43, label %44, label %58

44:                                               ; preds = %41
  %45 = load ptr, ptr %14, align 8, !tbaa !5
  store ptr %45, ptr %15, align 8, !tbaa !5
  %46 = load ptr, ptr %13, align 8, !tbaa !5
  %47 = load ptr, ptr %15, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %47, i32 0, i32 4
  store ptr %46, ptr %48, align 8, !tbaa !13
  %49 = load ptr, ptr %15, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %49, i32 0, i32 10
  store i8 2, ptr %50, align 1, !tbaa !16
  %51 = load ptr, ptr %8, align 8, !tbaa !5
  %52 = load ptr, ptr %9, align 8, !tbaa !5
  %53 = load i32, ptr %10, align 4, !tbaa !9
  %54 = load ptr, ptr %11, align 8, !tbaa !5
  %55 = load i64, ptr %12, align 8, !tbaa !11
  %56 = load ptr, ptr %15, align 8, !tbaa !5
  call void @prvInitialiseNewTask(ptr noundef %51, ptr noundef %52, i32 noundef %53, ptr noundef %54, i64 noundef %55, ptr noundef %16, ptr noundef %56, ptr noundef null)
  %57 = load ptr, ptr %15, align 8, !tbaa !5
  call void @prvAddNewTaskToReadyList(ptr noundef %57)
  br label %59

58:                                               ; preds = %41, %38
  store ptr null, ptr %16, align 8, !tbaa !5
  br label %59

59:                                               ; preds = %58, %44
  %60 = load ptr, ptr %16, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #3
  ret ptr %60
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @vPortRaiseBASEPRI() #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare hidden void @prvInitialiseNewTask(ptr noundef, ptr noundef, i32 noundef, ptr noundef, i64 noundef, ptr noundef, ptr noundef, ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @prvAddNewTaskToReadyList(ptr noundef) #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!14, !6, i64 96}
!14 = !{!"tskTaskControlBlock", !6, i64 0, !15, i64 8, !15, i64 48, !12, i64 88, !6, i64 96, !7, i64 104, !12, i64 120, !12, i64 128, !10, i64 136, !7, i64 140, !7, i64 141}
!15 = !{!"xLIST_ITEM", !10, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32}
!16 = !{!14, !7, i64 141}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local ptr @xTaskCreateStatic(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, i64 noundef %4, ptr noundef %5, ptr noundef %6) local_unnamed_addr #0 {
  %8 = alloca ptr, align 8
  %9 = alloca i64, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %8) #3
  %.not17 = icmp eq ptr %5, null
  br i1 %.not17, label %10, label %12

10:                                               ; preds = %7
  tail call void @vPortRaiseBASEPRI()
  br label %11

11:                                               ; preds = %11, %10
  br label %11

12:                                               ; preds = %7
  %.not18 = icmp eq ptr %6, null
  br i1 %.not18, label %13, label %15

13:                                               ; preds = %12
  tail call void @vPortRaiseBASEPRI()
  br label %14

14:                                               ; preds = %14, %13
  br label %14

15:                                               ; preds = %12
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %9)
  store volatile i64 144, ptr %9, align 8, !tbaa !5
  %.0..0..0..0. = load volatile i64, ptr %9, align 8, !tbaa !5
  %.not = icmp eq i64 %.0..0..0..0., 144
  br i1 %.not, label %18, label %16

16:                                               ; preds = %15
  tail call void @vPortRaiseBASEPRI()
  br label %17

17:                                               ; preds = %17, %16
  br label %17

18:                                               ; preds = %15
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %9)
  %19 = getelementptr inbounds i8, ptr %6, i64 96
  store ptr %5, ptr %19, align 8, !tbaa !9
  %20 = getelementptr inbounds i8, ptr %6, i64 141
  store i8 2, ptr %20, align 1, !tbaa !14
  call void @prvInitialiseNewTask(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, i64 noundef %4, ptr noundef nonnull %8, ptr noundef nonnull %6, ptr noundef null)
  call void @prvAddNewTaskToReadyList(ptr noundef nonnull %6)
  %21 = load ptr, ptr %8, align 8, !tbaa !15
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %8) #3
  ret ptr %21
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @vPortRaiseBASEPRI() local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare hidden void @prvInitialiseNewTask(ptr noundef, ptr noundef, i32 noundef, ptr noundef, i64 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare hidden void @prvAddNewTaskToReadyList(ptr noundef) local_unnamed_addr #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 96}
!10 = !{!"tskTaskControlBlock", !11, i64 0, !12, i64 8, !12, i64 48, !6, i64 88, !11, i64 96, !7, i64 104, !6, i64 120, !6, i64 128, !13, i64 136, !7, i64 140, !7, i64 141}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!"xLIST_ITEM", !13, i64 0, !11, i64 8, !11, i64 16, !11, i64 24, !11, i64 32}
!13 = !{!"int", !7, i64 0}
!14 = !{!10, !7, i64 141}
!15 = !{!11, !11, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,SROAPass,SimplifyCFGPass,TailCallElimPass