; LLVM IR from tangjz/acm-icpc :: poj/2586.ll (Z5solveii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [8 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [4 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5solveii(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  store i32 4, ptr %5, align 4, !tbaa !5
  br label %11

11:                                               ; preds = %51, %2
  %12 = load i32, ptr %5, align 4, !tbaa !5
  %13 = icmp sge i32 %12, 0
  br i1 %13, label %15, label %14

14:                                               ; preds = %11
  store i32 2, ptr %6, align 4
  br label %54

15:                                               ; preds = %11
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  %16 = load i32, ptr %3, align 4, !tbaa !5
  %17 = load i32, ptr %5, align 4, !tbaa !5
  %18 = mul nsw i32 %16, %17
  %19 = load i32, ptr %4, align 4, !tbaa !5
  %20 = load i32, ptr %5, align 4, !tbaa !5
  %21 = sub nsw i32 5, %20
  %22 = mul nsw i32 %19, %21
  %23 = sub nsw i32 %18, %22
  store i32 %23, ptr %7, align 4, !tbaa !5
  %24 = load i32, ptr %7, align 4, !tbaa !5
  %25 = icmp sge i32 %24, 0
  br i1 %25, label %26, label %27

26:                                               ; preds = %15
  store i32 4, ptr %6, align 4
  br label %49

27:                                               ; preds = %15
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  %28 = load i32, ptr %5, align 4, !tbaa !5
  %29 = mul nsw i32 %28, 2
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  store i32 2, ptr %9, align 4, !tbaa !5
  %30 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %5, ptr noundef nonnull align 4 dereferenceable(4) %9)
  %31 = load i32, ptr %30, align 4, !tbaa !5
  %32 = add nsw i32 %29, %31
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  store i32 %32, ptr %8, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  %33 = load i32, ptr %3, align 4, !tbaa !5
  %34 = load i32, ptr %8, align 4, !tbaa !5
  %35 = mul nsw i32 %33, %34
  %36 = load i32, ptr %4, align 4, !tbaa !5
  %37 = load i32, ptr %8, align 4, !tbaa !5
  %38 = sub nsw i32 12, %37
  %39 = mul nsw i32 %36, %38
  %40 = sub nsw i32 %35, %39
  store i32 %40, ptr %10, align 4, !tbaa !5
  %41 = load i32, ptr %10, align 4, !tbaa !5
  %42 = icmp slt i32 %41, 0
  br i1 %42, label %43, label %45

43:                                               ; preds = %27
  %44 = call i32 @puts(ptr noundef @.str)
  br label %48

45:                                               ; preds = %27
  %46 = load i32, ptr %10, align 4, !tbaa !5
  %47 = call i32 (ptr, ...) @printf(ptr noundef @.str.1, i32 noundef %46)
  br label %48

48:                                               ; preds = %45, %43
  store i32 1, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  br label %49

49:                                               ; preds = %48, %26
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  %50 = load i32, ptr %6, align 4
  switch i32 %50, label %54 [
    i32 4, label %51
  ]

51:                                               ; preds = %49
  %52 = load i32, ptr %5, align 4, !tbaa !5
  %53 = add nsw i32 %52, -1
  store i32 %53, ptr %5, align 4, !tbaa !5
  br label %11, !llvm.loop !9

54:                                               ; preds = %49, %14
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  %55 = load i32, ptr %6, align 4
  switch i32 %55, label %57 [
    i32 2, label %56
    i32 1, label %56
  ]

56:                                               ; preds = %54, %54
  ret void

57:                                               ; preds = %54
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

declare i32 @puts(ptr noundef) #3

declare i32 @printf(ptr noundef, ...) #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [8 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [4 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z5solveii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #4
  %5 = shl nsw i32 %0, 2
  %6 = sub i32 %5, %1
  %7 = icmp sgt i32 %6, -1
  br i1 %7, label %.critedge, label %8

8:                                                ; preds = %.critedge.3, %.critedge.2, %.critedge.1, %.critedge, %2
  %storemerge17.lcssa = phi i32 [ 4, %2 ], [ 3, %.critedge ], [ 2, %.critedge.1 ], [ 1, %.critedge.2 ], [ 0, %.critedge.3 ]
  store i32 %storemerge17.lcssa, ptr %3, align 4, !tbaa !5
  %9 = shl nuw nsw i32 %storemerge17.lcssa, 1
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #4
  store i32 2, ptr %4, align 4, !tbaa !5
  %10 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %3, ptr noundef nonnull align 4 dereferenceable(4) %4)
  %11 = load i32, ptr %10, align 4, !tbaa !5
  %12 = add nsw i32 %11, %9
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #4
  %13 = mul nsw i32 %12, %0
  %.neg13 = add i32 %12, -12
  %.neg14 = mul i32 %.neg13, %1
  %14 = add i32 %.neg14, %13
  %15 = icmp slt i32 %14, 0
  br i1 %15, label %16, label %18

16:                                               ; preds = %8
  %17 = call i32 @puts(ptr noundef nonnull dereferenceable(1) @.str)
  br label %.critedge.4

18:                                               ; preds = %8
  %19 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1, i32 noundef %14)
  br label %.critedge.4

.critedge:                                        ; preds = %2
  %20 = mul nsw i32 %0, 3
  %21 = shl i32 %1, 1
  %22 = sub i32 %20, %21
  %23 = icmp sgt i32 %22, -1
  br i1 %23, label %.critedge.1, label %8

.critedge.1:                                      ; preds = %.critedge
  %24 = shl nsw i32 %0, 1
  %.neg12.2 = mul i32 %1, -3
  %25 = add i32 %.neg12.2, %24
  %26 = icmp sgt i32 %25, -1
  br i1 %26, label %.critedge.2, label %8

.critedge.2:                                      ; preds = %.critedge.1
  %27 = shl i32 %1, 2
  %28 = sub i32 %0, %27
  %29 = icmp sgt i32 %28, -1
  br i1 %29, label %.critedge.3, label %8

.critedge.3:                                      ; preds = %.critedge.2
  %.neg12.4 = mul i32 %1, -5
  %30 = icmp sgt i32 %.neg12.4, -1
  br i1 %30, label %.critedge.4, label %8

.critedge.4:                                      ; preds = %.critedge.3, %18, %16
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #4
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nofree nounwind
declare noundef i32 @puts(ptr nocapture noundef readonly) local_unnamed_addr #3

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass