; LLVM IR from tangjz/acm-icpc :: codeforces/complete (317A)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@x = external dso_local global i64, align 8
@y = external dso_local global i64, align 8
@m = external dso_local global i64, align 8
@.str = external hidden unnamed_addr constant [16 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [3 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [4 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [7 x i8], align 1

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i64, align 8
  %3 = alloca i64, align 8
  %4 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #4
  store i64 0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #4
  %5 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef @x, ptr noundef @y, ptr noundef @m)
  %6 = load i64, ptr @x, align 8, !tbaa !5
  %7 = load i64, ptr @m, align 8, !tbaa !5
  %8 = icmp sge i64 %6, %7
  br i1 %8, label %13, label %9

9:                                                ; preds = %0
  %10 = load i64, ptr @y, align 8, !tbaa !5
  %11 = load i64, ptr @m, align 8, !tbaa !5
  %12 = icmp sge i64 %10, %11
  br i1 %12, label %13, label %15

13:                                               ; preds = %9, %0
  %14 = call i32 (ptr, ...) @printf(ptr noundef @.str.1)
  store i32 0, ptr %1, align 4
  store i32 1, ptr %4, align 4
  br label %51

15:                                               ; preds = %9
  %16 = load i64, ptr @x, align 8, !tbaa !5
  %17 = icmp sle i64 %16, 0
  br i1 %17, label %18, label %23

18:                                               ; preds = %15
  %19 = load i64, ptr @y, align 8, !tbaa !5
  %20 = icmp sle i64 %19, 0
  br i1 %20, label %21, label %23

21:                                               ; preds = %18
  %22 = call i32 (ptr, ...) @printf(ptr noundef @.str.2)
  store i32 0, ptr %1, align 4
  store i32 1, ptr %4, align 4
  br label %51

23:                                               ; preds = %18, %15
  %24 = load i64, ptr @x, align 8, !tbaa !5
  %25 = load i64, ptr @y, align 8, !tbaa !5
  %26 = icmp sgt i64 %24, %25
  br i1 %26, label %27, label %28

27:                                               ; preds = %23
  call void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) @x, ptr noundef nonnull align 8 dereferenceable(8) @y) #4
  br label %28

28:                                               ; preds = %27, %23
  br label %29

29:                                               ; preds = %33, %28
  %30 = load i64, ptr @y, align 8, !tbaa !5
  %31 = load i64, ptr @m, align 8, !tbaa !5
  %32 = icmp slt i64 %30, %31
  br i1 %32, label %33, label %48

33:                                               ; preds = %29
  %34 = load i64, ptr @y, align 8, !tbaa !5
  %35 = load i64, ptr @x, align 8, !tbaa !5
  %36 = sub nsw i64 %34, %35
  %37 = load i64, ptr @y, align 8, !tbaa !5
  %38 = sdiv i64 %36, %37
  %39 = add nsw i64 %38, 1
  store i64 %39, ptr %3, align 8, !tbaa !5
  %40 = load i64, ptr %3, align 8, !tbaa !5
  %41 = load i64, ptr %2, align 8, !tbaa !5
  %42 = add nsw i64 %41, %40
  store i64 %42, ptr %2, align 8, !tbaa !5
  %43 = load i64, ptr %3, align 8, !tbaa !5
  %44 = load i64, ptr @y, align 8, !tbaa !5
  %45 = mul nsw i64 %43, %44
  %46 = load i64, ptr @x, align 8, !tbaa !5
  %47 = add nsw i64 %46, %45
  store i64 %47, ptr @x, align 8, !tbaa !5
  call void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) @x, ptr noundef nonnull align 8 dereferenceable(8) @y) #4
  br label %29, !llvm.loop !9

48:                                               ; preds = %29
  %49 = load i64, ptr %2, align 8, !tbaa !5
  %50 = call i32 (ptr, ...) @printf(ptr noundef @.str.3, i64 noundef %49)
  store i32 0, ptr %1, align 4
  store i32 1, ptr %4, align 4
  br label %51

51:                                               ; preds = %48, %21, %13
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #4
  %52 = load i32, ptr %1, align 4
  ret i32 %52
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @__isoc99_scanf(ptr noundef, ...) #2

declare i32 @printf(ptr noundef, ...) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@x = external dso_local global i64, align 8
@y = external dso_local global i64, align 8
@m = external dso_local global i64, align 8
@.str = external hidden unnamed_addr constant [16 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [3 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [4 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [7 x i8], align 1

; Function Attrs: mustprogress norecurse nounwind uwtable
define dso_local noundef i32 @main() local_unnamed_addr #0 {
  %1 = tail call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull @x, ptr noundef nonnull @y, ptr noundef nonnull @m)
  %2 = load i64, ptr @x, align 8, !tbaa !5
  %3 = load i64, ptr @m, align 8, !tbaa !5
  %.not = icmp slt i64 %2, %3
  br i1 %.not, label %4, label %6

4:                                                ; preds = %0
  %5 = load i64, ptr @y, align 8
  %.not10 = icmp slt i64 %5, %3
  br i1 %.not10, label %8, label %6

6:                                                ; preds = %4, %0
  %7 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1)
  br label %32

8:                                                ; preds = %4
  %9 = icmp slt i64 %2, 1
  %10 = icmp slt i64 %5, 1
  %or.cond = and i1 %9, %10
  br i1 %or.cond, label %11, label %13

11:                                               ; preds = %8
  %12 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.2)
  br label %32

13:                                               ; preds = %8
  %14 = icmp sgt i64 %2, %5
  br i1 %14, label %15, label %16

15:                                               ; preds = %13
  tail call void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) @x, ptr noundef nonnull align 8 dereferenceable(8) @y) #3
  %.pre = load i64, ptr @y, align 8, !tbaa !5
  %.pre12 = load i64, ptr @m, align 8, !tbaa !5
  br label %16

16:                                               ; preds = %15, %13
  %17 = phi i64 [ %.pre12, %15 ], [ %3, %13 ]
  %18 = phi i64 [ %.pre, %15 ], [ %5, %13 ]
  %19 = icmp slt i64 %18, %17
  br i1 %19, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %16, %.lr.ph
  %20 = phi i64 [ %28, %.lr.ph ], [ %18, %16 ]
  %.0611 = phi i64 [ %25, %.lr.ph ], [ 0, %16 ]
  %21 = load i64, ptr @x, align 8, !tbaa !5
  %22 = sub nsw i64 %20, %21
  %23 = sdiv i64 %22, %20
  %24 = add nsw i64 %23, 1
  %25 = add nsw i64 %24, %.0611
  %26 = mul nsw i64 %24, %20
  %27 = add nsw i64 %26, %21
  store i64 %27, ptr @x, align 8, !tbaa !5
  tail call void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) @x, ptr noundef nonnull align 8 dereferenceable(8) @y) #3
  %28 = load i64, ptr @y, align 8, !tbaa !5
  %29 = load i64, ptr @m, align 8, !tbaa !5
  %30 = icmp slt i64 %28, %29
  br i1 %30, label %.lr.ph, label %._crit_edge, !llvm.loop !9

._crit_edge:                                      ; preds = %.lr.ph, %16
  %.06.lcssa = phi i64 [ 0, %16 ], [ %25, %.lr.ph ]
  %31 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.3, i64 noundef %.06.lcssa)
  br label %32

32:                                               ; preds = %._crit_edge, %11, %6
  ret i32 0
}

; Function Attrs: nofree nounwind
declare noundef i32 @__isoc99_scanf(ptr nocapture noundef readonly, ...) local_unnamed_addr #1

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2

attributes #0 = { mustprogress norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass