; LLVM IR from tangjz/acm-icpc :: hdu/6067.ll (Z3NTTiPii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@w = external dso_local global [131073 x i32], align 16
@ivs = external dso_local global i32, align 4
@bitRev = external dso_local global [131073 x i32], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3NTTiPii(i32 noundef %0, ptr noundef %1, i32 noundef %2) #1 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca ptr, align 8
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !9
  store i32 %2, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  store i32 1, ptr %7, align 4, !tbaa !5
  br label %16

16:                                               ; preds = %41, %3
  %17 = load i32, ptr %7, align 4, !tbaa !5
  %18 = load i32, ptr %4, align 4, !tbaa !5
  %19 = icmp slt i32 %17, %18
  br i1 %19, label %21, label %20

20:                                               ; preds = %16
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  br label %44

21:                                               ; preds = %16
  %22 = load i32, ptr %7, align 4, !tbaa !5
  %23 = load i32, ptr %7, align 4, !tbaa !5
  %24 = sext i32 %23 to i64
  %25 = getelementptr inbounds [131073 x i32], ptr @bitRev, i64 0, i64 %24
  %26 = load i32, ptr %25, align 4, !tbaa !5
  %27 = icmp slt i32 %22, %26
  br i1 %27, label %28, label %40

28:                                               ; preds = %21
  %29 = load ptr, ptr %5, align 8, !tbaa !9
  %30 = load i32, ptr %7, align 4, !tbaa !5
  %31 = sext i32 %30 to i64
  %32 = getelementptr inbounds i32, ptr %29, i64 %31
  %33 = load ptr, ptr %5, align 8, !tbaa !9
  %34 = load i32, ptr %7, align 4, !tbaa !5
  %35 = sext i32 %34 to i64
  %36 = getelementptr inbounds [131073 x i32], ptr @bitRev, i64 0, i64 %35
  %37 = load i32, ptr %36, align 4, !tbaa !5
  %38 = sext i32 %37 to i64
  %39 = getelementptr inbounds i32, ptr %33, i64 %38
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %32, ptr noundef nonnull align 4 dereferenceable(4) %39) #4
  br label %40

40:                                               ; preds = %28, %21
  br label %41

41:                                               ; preds = %40
  %42 = load i32, ptr %7, align 4, !tbaa !5
  %43 = add nsw i32 %42, 1
  store i32 %43, ptr %7, align 4, !tbaa !5
  br label %16, !llvm.loop !11

44:                                               ; preds = %20
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  store i32 1, ptr %8, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  store i32 1, ptr %9, align 4, !tbaa !5
  br label %45

45:                                               ; preds = %120, %44
  %46 = load i32, ptr %9, align 4, !tbaa !5
  %47 = load i32, ptr %4, align 4, !tbaa !5
  %48 = icmp slt i32 %46, %47
  br i1 %48, label %50, label %49

49:                                               ; preds = %45
  store i32 5, ptr %10, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  br label %125

50:                                               ; preds = %45
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  store i32 0, ptr %11, align 4, !tbaa !5
  br label %51

51:                                               ; preds = %114, %50
  %52 = load i32, ptr %11, align 4, !tbaa !5
  %53 = load i32, ptr %4, align 4, !tbaa !5
  %54 = icmp slt i32 %52, %53
  br i1 %54, label %56, label %55

55:                                               ; preds = %51
  store i32 8, ptr %10, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  br label %119

56:                                               ; preds = %51
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  store i32 0, ptr %12, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #4
  %57 = load ptr, ptr %5, align 8, !tbaa !9
  %58 = load i32, ptr %11, align 4, !tbaa !5
  %59 = sext i32 %58 to i64
  %60 = getelementptr inbounds i32, ptr %57, i64 %59
  store ptr %60, ptr %13, align 8, !tbaa !9
  br label %61

61:                                               ; preds = %110, %56
  %62 = load i32, ptr %12, align 4, !tbaa !5
  %63 = load i32, ptr %9, align 4, !tbaa !5
  %64 = icmp slt i32 %62, %63
  br i1 %64, label %66, label %65

65:                                               ; preds = %61
  store i32 11, ptr %10, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  br label %113

66:                                               ; preds = %61
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #4
  %67 = load i32, ptr %12, align 4, !tbaa !5
  %68 = load i32, ptr %8, align 4, !tbaa !5
  %69 = sub nsw i32 17, %68
  %70 = shl i32 %67, %69
  %71 = sext i32 %70 to i64
  %72 = getelementptr inbounds [131073 x i32], ptr @w, i64 0, i64 %71
  %73 = load i32, ptr %72, align 4, !tbaa !5
  %74 = sext i32 %73 to i64
  %75 = load ptr, ptr %13, align 8, !tbaa !9
  %76 = load i32, ptr %12, align 4, !tbaa !5
  %77 = load i32, ptr %9, align 4, !tbaa !5
  %78 = add nsw i32 %76, %77
  %79 = sext i32 %78 to i64
  %80 = getelementptr inbounds i32, ptr %75, i64 %79
  %81 = load i32, ptr %80, align 4, !tbaa !5
  %82 = sext i32 %81 to i64
  %83 = mul nsw i64 %74, %82
  %84 = srem i64 %83, 786433
  %85 = trunc i64 %84 to i32
  store i32 %85, ptr %14, align 4, !tbaa !5
  %86 = load ptr, ptr %13, align 8, !tbaa !9
  %87 = load i32, ptr %12, align 4, !tbaa !5
  %88 = sext i32 %87 to i64
  %89 = getelementptr inbounds i32, ptr %86, i64 %88
  %90 = load i32, ptr %89, align 4, !tbaa !5
  %91 = load i32, ptr %14, align 4, !tbaa !5
  %92 = call noundef i32 @_Z7mod_subii(i32 noundef %90, i32 noundef %91)
  %93 = load ptr, ptr %13, align 8, !tbaa !9
  %94 = load i32, ptr %12, align 4, !tbaa !5
  %95 = load i32, ptr %9, align 4, !tbaa !5
  %96 = add nsw i32 %94, %95
  %97 = sext i32 %96 to i64
  %98 = getelementptr inbounds i32, ptr %93, i64 %97
  store i32 %92, ptr %98, align 4, !tbaa !5
  %99 = load ptr, ptr %13, align 8, !tbaa !9
  %100 = load i32, ptr %12, align 4, !tbaa !5
  %101 = sext i32 %100 to i64
  %102 = getelementptr inbounds i32, ptr %99, i64 %101
  %103 = load i32, ptr %102, align 4, !tbaa !5
  %104 = load i32, ptr %14, align 4, !tbaa !5
  %105 = call noundef i32 @_Z7mod_addii(i32 noundef %103, i32 noundef %104)
  %106 = load ptr, ptr %13, align 8, !tbaa !9
  %107 = load i32, ptr %12, align 4, !tbaa !5
  %108 = sext i32 %107 to i64
  %109 = getelementptr inbounds i32, ptr %106, i64 %108
  store i32 %105, ptr %109, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #4
  br label %110

110:                                              ; preds = %66
  %111 = load i32, ptr %12, align 4, !tbaa !5
  %112 = add nsw i32 %111, 1
  store i32 %112, ptr %12, align 4, !tbaa !5
  br label %61, !llvm.loop !13

113:                                              ; preds = %65
  br label %114

114:                                              ; preds = %113
  %115 = load i32, ptr %9, align 4, !tbaa !5
  %116 = shl i32 %115, 1
  %117 = load i32, ptr %11, align 4, !tbaa !5
  %118 = add nsw i32 %117, %116
  store i32 %118, ptr %11, align 4, !tbaa !5
  br label %51, !llvm.loop !14

119:                                              ; preds = %55
  br label %120

120:                                              ; preds = %119
  %121 = load i32, ptr %8, align 4, !tbaa !5
  %122 = add nsw i32 %121, 1
  store i32 %122, ptr %8, align 4, !tbaa !5
  %123 = load i32, ptr %9, align 4, !tbaa !5
  %124 = shl i32 %123, 1
  store i32 %124, ptr %9, align 4, !tbaa !5
  br label %45, !llvm.loop !15

125:                                              ; preds = %49
  %126 = load i32, ptr %6, align 4, !tbaa !5
  %127 = icmp eq i32 %126, -1
  br i1 %127, label %128, label %160

128:                                              ; preds = %125
  %129 = load ptr, ptr %5, align 8, !tbaa !9
  %130 = getelementptr inbounds i32, ptr %129, i64 1
  %131 = load ptr, ptr %5, align 8, !tbaa !9
  %132 = load i32, ptr %4, align 4, !tbaa !5
  %133 = sext i32 %132 to i64
  %134 = getelementptr inbounds i32, ptr %131, i64 %133
  call void @_ZSt7reverseIPiEvT_S1_(ptr noundef %130, ptr noundef %134)
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #4
  store i32 0, ptr %15, align 4, !tbaa !5
  br label %135

135:                                              ; preds = %156, %128
  %136 = load i32, ptr %15, align 4, !tbaa !5
  %137 = load i32, ptr %4, align 4, !tbaa !5
  %138 = icmp slt i32 %136, %137
  br i1 %138, label %140, label %139

139:                                              ; preds = %135
  store i32 14, ptr %10, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #4
  br label %159

140:                                              ; preds = %135
  %141 = load ptr, ptr %5, align 8, !tbaa !9
  %142 = load i32, ptr %15, align 4, !tbaa !5
  %143 = sext i32 %142 to i64
  %144 = getelementptr inbounds i32, ptr %141, i64 %143
  %145 = load i32, ptr %144, align 4, !tbaa !5
  %146 = sext i32 %145 to i64
  %147 = load i32, ptr @ivs, align 4, !tbaa !5
  %148 = sext i32 %147 to i64
  %149 = mul nsw i64 %146, %148
  %150 = srem i64 %149, 786433
  %151 = trunc i64 %150 to i32
  %152 = load ptr, ptr %5, align 8, !tbaa !9
  %153 = load i32, ptr %15, align 4, !tbaa !5
  %154 = sext i32 %153 to i64
  %155 = getelementptr inbounds i32, ptr %152, i64 %154
  store i32 %151, ptr %155, align 4, !tbaa !5
  br label %156

156:                                              ; preds = %140
  %157 = load i32, ptr %15, align 4, !tbaa !5
  %158 = add nsw i32 %157, 1
  store i32 %158, ptr %15, align 4, !tbaa !5
  br label %135, !llvm.loop !16

159:                                              ; preds = %139
  br label %160

160:                                              ; preds = %159, %125
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7mod_subii(i32 noundef, i32 noundef) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7mod_addii(i32 noundef, i32 noundef) #2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZSt7reverseIPiEvT_S1_(ptr noundef, ptr noundef) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}
!15 = distinct !{!15, !12}
!16 = distinct !{!16, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@w = external dso_local local_unnamed_addr global [131073 x i32], align 16
@ivs = external dso_local local_unnamed_addr global i32, align 4
@bitRev = external dso_local local_unnamed_addr global [131073 x i32], align 16

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3NTTiPii(i32 noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = icmp sgt i32 %0, 1
  br i1 %4, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %3
  %wide.trip.count = zext nneg i32 %0 to i64
  br label %.lr.ph

.preheader55:                                     ; preds = %39
  br i1 %4, label %.preheader.us.preheader, label %._crit_edge

.preheader.us.preheader:                          ; preds = %.preheader55
  %5 = zext nneg i32 %0 to i64
  br label %.preheader.us

.preheader.us:                                    ; preds = %.preheader.us.preheader, %._crit_edge61.us
  %.04964.us = phi i32 [ %11, %._crit_edge61.us ], [ 1, %.preheader.us.preheader ]
  %.05262.us = phi i32 [ %8, %._crit_edge61.us ], [ 1, %.preheader.us.preheader ]
  %6 = icmp sgt i32 %.05262.us, 0
  %7 = sub nsw i32 17, %.04964.us
  %8 = shl i32 %.05262.us, 1
  br i1 %6, label %.lr.ph58.us.us.preheader, label %._crit_edge61.us

.lr.ph58.us.us.preheader:                         ; preds = %.preheader.us
  %9 = zext nneg i32 %.05262.us to i64
  %10 = sext i32 %8 to i64
  br label %.lr.ph58.us.us

._crit_edge61.us:                                 ; preds = %._crit_edge.us.us, %.preheader.us
  %11 = add nuw nsw i32 %.04964.us, 1
  %12 = icmp slt i32 %8, %0
  br i1 %12, label %.preheader.us, label %._crit_edge, !llvm.loop !5

.lr.ph58.us.us:                                   ; preds = %.lr.ph58.us.us.preheader, %._crit_edge.us.us
  %indvars.iv78 = phi i64 [ 0, %.lr.ph58.us.us.preheader ], [ %indvars.iv.next79, %._crit_edge.us.us ]
  %13 = getelementptr inbounds i32, ptr %1, i64 %indvars.iv78
  %invariant.gep = getelementptr inbounds i32, ptr %13, i64 %9
  br label %14

14:                                               ; preds = %14, %.lr.ph58.us.us
  %indvars.iv73 = phi i64 [ %indvars.iv.next74, %14 ], [ 0, %.lr.ph58.us.us ]
  %15 = trunc nuw nsw i64 %indvars.iv73 to i32
  %16 = shl i32 %15, %7
  %17 = sext i32 %16 to i64
  %18 = getelementptr inbounds [131073 x i32], ptr @w, i64 0, i64 %17
  %19 = load i32, ptr %18, align 4, !tbaa !7
  %20 = sext i32 %19 to i64
  %gep = getelementptr inbounds i32, ptr %invariant.gep, i64 %indvars.iv73
  %21 = load i32, ptr %gep, align 4, !tbaa !7
  %22 = sext i32 %21 to i64
  %23 = mul nsw i64 %22, %20
  %24 = srem i64 %23, 786433
  %25 = trunc nsw i64 %24 to i32
  %26 = getelementptr inbounds i32, ptr %13, i64 %indvars.iv73
  %27 = load i32, ptr %26, align 4, !tbaa !7
  %28 = tail call noundef i32 @_Z7mod_subii(i32 noundef %27, i32 noundef %25)
  store i32 %28, ptr %gep, align 4, !tbaa !7
  %29 = load i32, ptr %26, align 4, !tbaa !7
  %30 = tail call noundef i32 @_Z7mod_addii(i32 noundef %29, i32 noundef %25)
  store i32 %30, ptr %26, align 4, !tbaa !7
  %indvars.iv.next74 = add nuw nsw i64 %indvars.iv73, 1
  %exitcond77.not = icmp eq i64 %indvars.iv.next74, %9
  br i1 %exitcond77.not, label %._crit_edge.us.us, label %14, !llvm.loop !11

._crit_edge.us.us:                                ; preds = %14
  %indvars.iv.next79 = add nsw i64 %indvars.iv78, %10
  %31 = icmp slt i64 %indvars.iv.next79, %5
  br i1 %31, label %.lr.ph58.us.us, label %._crit_edge61.us, !llvm.loop !12

.lr.ph:                                           ; preds = %.lr.ph.preheader, %39
  %indvars.iv = phi i64 [ 1, %.lr.ph.preheader ], [ %indvars.iv.next, %39 ]
  %32 = getelementptr inbounds [131073 x i32], ptr @bitRev, i64 0, i64 %indvars.iv
  %33 = load i32, ptr %32, align 4, !tbaa !7
  %34 = sext i32 %33 to i64
  %35 = icmp slt i64 %indvars.iv, %34
  br i1 %35, label %36, label %39

36:                                               ; preds = %.lr.ph
  %37 = getelementptr inbounds i32, ptr %1, i64 %indvars.iv
  %38 = getelementptr inbounds i32, ptr %1, i64 %34
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %37, ptr noundef nonnull align 4 dereferenceable(4) %38) #3
  br label %39

39:                                               ; preds = %.lr.ph, %36
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %.preheader55, label %.lr.ph, !llvm.loop !13

._crit_edge:                                      ; preds = %._crit_edge61.us, %3, %.preheader55
  %40 = icmp eq i32 %2, -1
  br i1 %40, label %41, label %.loopexit

41:                                               ; preds = %._crit_edge
  %42 = getelementptr inbounds i8, ptr %1, i64 4
  %43 = sext i32 %0 to i64
  %44 = getelementptr inbounds i32, ptr %1, i64 %43
  tail call void @_ZSt7reverseIPiEvT_S1_(ptr noundef nonnull %42, ptr noundef %44)
  %45 = icmp sgt i32 %0, 0
  br i1 %45, label %.lr.ph70.preheader, label %.loopexit

.lr.ph70.preheader:                               ; preds = %41
  %wide.trip.count84 = zext nneg i32 %0 to i64
  %xtraiter = and i64 %wide.trip.count84, 1
  %46 = icmp eq i32 %0, 1
  br i1 %46, label %.loopexit.loopexit.unr-lcssa, label %.lr.ph70.preheader.new

.lr.ph70.preheader.new:                           ; preds = %.lr.ph70.preheader
  %unroll_iter = and i64 %wide.trip.count84, 2147483646
  br label %.lr.ph70

.lr.ph70:                                         ; preds = %.lr.ph70, %.lr.ph70.preheader.new
  %indvars.iv81 = phi i64 [ 0, %.lr.ph70.preheader.new ], [ %indvars.iv.next82.1, %.lr.ph70 ]
  %niter = phi i64 [ 0, %.lr.ph70.preheader.new ], [ %niter.next.1, %.lr.ph70 ]
  %47 = getelementptr inbounds i32, ptr %1, i64 %indvars.iv81
  %48 = load i32, ptr %47, align 4, !tbaa !7
  %49 = sext i32 %48 to i64
  %50 = load i32, ptr @ivs, align 4, !tbaa !7
  %51 = sext i32 %50 to i64
  %52 = mul nsw i64 %51, %49
  %53 = srem i64 %52, 786433
  %54 = trunc nsw i64 %53 to i32
  store i32 %54, ptr %47, align 4, !tbaa !7
  %indvars.iv.next82 = or disjoint i64 %indvars.iv81, 1
  %55 = getelementptr inbounds i32, ptr %1, i64 %indvars.iv.next82
  %56 = load i32, ptr %55, align 4, !tbaa !7
  %57 = sext i32 %56 to i64
  %58 = load i32, ptr @ivs, align 4, !tbaa !7
  %59 = sext i32 %58 to i64
  %60 = mul nsw i64 %59, %57
  %61 = srem i64 %60, 786433
  %62 = trunc nsw i64 %61 to i32
  store i32 %62, ptr %55, align 4, !tbaa !7
  %indvars.iv.next82.1 = add nuw nsw i64 %indvars.iv81, 2
  %niter.next.1 = add i64 %niter, 2
  %niter.ncmp.1 = icmp eq i64 %niter.next.1, %unroll_iter
  br i1 %niter.ncmp.1, label %.loopexit.loopexit.unr-lcssa, label %.lr.ph70, !llvm.loop !14

.loopexit.loopexit.unr-lcssa:                     ; preds = %.lr.ph70, %.lr.ph70.preheader
  %indvars.iv81.unr = phi i64 [ 0, %.lr.ph70.preheader ], [ %indvars.iv.next82.1, %.lr.ph70 ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %.loopexit, label %.lr.ph70.epil

.lr.ph70.epil:                                    ; preds = %.loopexit.loopexit.unr-lcssa
  %63 = getelementptr inbounds i32, ptr %1, i64 %indvars.iv81.unr
  %64 = load i32, ptr %63, align 4, !tbaa !7
  %65 = sext i32 %64 to i64
  %66 = load i32, ptr @ivs, align 4, !tbaa !7
  %67 = sext i32 %66 to i64
  %68 = mul nsw i64 %67, %65
  %69 = srem i64 %68, 786433
  %70 = trunc nsw i64 %69 to i32
  store i32 %70, ptr %63, align 4, !tbaa !7
  br label %.loopexit

.loopexit:                                        ; preds = %.lr.ph70.epil, %.loopexit.loopexit.unr-lcssa, %41, %._crit_edge
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7mod_subii(i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7mod_addii(i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZSt7reverseIPiEvT_S1_(ptr noundef, ptr noundef) local_unnamed_addr #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!8, !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = distinct !{!11, !6}
!12 = distinct !{!12, !6}
!13 = distinct !{!13, !6}
!14 = distinct !{!14, !6}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass