; LLVM IR from tangjz/acm-icpc :: hdu (5532)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@t = external dso_local global i32, align 4
@n = external dso_local global i32, align 4
@a = external dso_local global [100010 x i32], align 16
@.str = external hidden unnamed_addr constant [3 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [4 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [3 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z5checkv() #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #2 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  %5 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef @t)
  br label %6

6:                                                ; preds = %49, %27, %0
  %7 = load i32, ptr @t, align 4, !tbaa !5
  %8 = add nsw i32 %7, -1
  store i32 %8, ptr @t, align 4, !tbaa !5
  %9 = icmp ne i32 %7, 0
  br i1 %9, label %10, label %54

10:                                               ; preds = %6
  %11 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef @n)
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #5
  store i32 0, ptr %2, align 4, !tbaa !5
  br label %12

12:                                               ; preds = %22, %10
  %13 = load i32, ptr %2, align 4, !tbaa !5
  %14 = load i32, ptr @n, align 4, !tbaa !5
  %15 = icmp slt i32 %13, %14
  br i1 %15, label %17, label %16

16:                                               ; preds = %12
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #5
  br label %25

17:                                               ; preds = %12
  %18 = load i32, ptr %2, align 4, !tbaa !5
  %19 = sext i32 %18 to i64
  %20 = getelementptr inbounds i32, ptr @a, i64 %19
  %21 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef %20)
  br label %22

22:                                               ; preds = %17
  %23 = load i32, ptr %2, align 4, !tbaa !5
  %24 = add nsw i32 %23, 1
  store i32 %24, ptr %2, align 4, !tbaa !5
  br label %12, !llvm.loop !9

25:                                               ; preds = %16
  %26 = call noundef zeroext i1 @_Z5checkv()
  br i1 %26, label %27, label %29

27:                                               ; preds = %25
  %28 = call i32 @puts(ptr noundef @.str.1)
  br label %6, !llvm.loop !11

29:                                               ; preds = %25
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #5
  store i32 0, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #5
  %30 = load i32, ptr @n, align 4, !tbaa !5
  %31 = sub nsw i32 %30, 1
  store i32 %31, ptr %4, align 4, !tbaa !5
  br label %32

32:                                               ; preds = %44, %29
  %33 = load i32, ptr %3, align 4, !tbaa !5
  %34 = load i32, ptr %4, align 4, !tbaa !5
  %35 = icmp slt i32 %33, %34
  br i1 %35, label %37, label %36

36:                                               ; preds = %32
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #5
  br label %49

37:                                               ; preds = %32
  %38 = load i32, ptr %3, align 4, !tbaa !5
  %39 = sext i32 %38 to i64
  %40 = getelementptr inbounds [100010 x i32], ptr @a, i64 0, i64 %39
  %41 = load i32, ptr %4, align 4, !tbaa !5
  %42 = sext i32 %41 to i64
  %43 = getelementptr inbounds [100010 x i32], ptr @a, i64 0, i64 %42
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %40, ptr noundef nonnull align 4 dereferenceable(4) %43) #5
  br label %44

44:                                               ; preds = %37
  %45 = load i32, ptr %3, align 4, !tbaa !5
  %46 = add nsw i32 %45, 1
  store i32 %46, ptr %3, align 4, !tbaa !5
  %47 = load i32, ptr %4, align 4, !tbaa !5
  %48 = add nsw i32 %47, -1
  store i32 %48, ptr %4, align 4, !tbaa !5
  br label %32, !llvm.loop !12

49:                                               ; preds = %36
  %50 = call noundef zeroext i1 @_Z5checkv()
  %51 = zext i1 %50 to i64
  %52 = select i1 %50, ptr @.str.1, ptr @.str.2
  %53 = call i32 @puts(ptr noundef %52)
  br label %6, !llvm.loop !11

54:                                               ; preds = %6
  ret i32 0
}

declare i32 @__isoc99_scanf(ptr noundef, ...) #3

declare i32 @puts(ptr noundef) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #4

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@t = external dso_local global i32, align 4
@n = external dso_local global i32, align 4
@a = external dso_local global [100010 x i32], align 16
@.str = external hidden unnamed_addr constant [3 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [4 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [3 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z5checkv() local_unnamed_addr #0

; Function Attrs: mustprogress norecurse nounwind uwtable
define dso_local noundef i32 @main() local_unnamed_addr #1 {
  %1 = tail call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull @t)
  %2 = load i32, ptr @t, align 4, !tbaa !5
  %3 = add nsw i32 %2, -1
  store i32 %3, ptr @t, align 4, !tbaa !5
  %.not18 = icmp eq i32 %2, 0
  br i1 %.not18, label %._crit_edge21, label %.lr.ph20

.lr.ph20:                                         ; preds = %0, %.backedge
  %4 = tail call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull @n)
  %5 = load i32, ptr @n, align 4, !tbaa !5
  %6 = icmp sgt i32 %5, 0
  br i1 %6, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %.lr.ph20
  %7 = tail call noundef zeroext i1 @_Z5checkv()
  br i1 %7, label %.backedge, label %16

.lr.ph:                                           ; preds = %.lr.ph20, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %.lr.ph20 ]
  %8 = getelementptr inbounds i32, ptr @a, i64 %indvars.iv
  %9 = tail call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull %8)
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %10 = load i32, ptr @n, align 4, !tbaa !5
  %11 = sext i32 %10 to i64
  %12 = icmp slt i64 %indvars.iv.next, %11
  br i1 %12, label %.lr.ph, label %._crit_edge, !llvm.loop !9

.backedge:                                        ; preds = %._crit_edge, %._crit_edge17
  %.str.1.sink = phi ptr [ %22, %._crit_edge17 ], [ @.str.1, %._crit_edge ]
  %13 = tail call i32 @puts(ptr noundef nonnull dereferenceable(1) %.str.1.sink)
  %14 = load i32, ptr @t, align 4, !tbaa !5
  %15 = add nsw i32 %14, -1
  store i32 %15, ptr @t, align 4, !tbaa !5
  %.not = icmp eq i32 %14, 0
  br i1 %.not, label %._crit_edge21, label %.lr.ph20, !llvm.loop !11

16:                                               ; preds = %._crit_edge
  %17 = load i32, ptr @n, align 4, !tbaa !5
  %18 = icmp sgt i32 %17, 1
  br i1 %18, label %.lr.ph16.preheader, label %._crit_edge17

.lr.ph16.preheader:                               ; preds = %16
  %19 = zext nneg i32 %17 to i64
  %20 = add nsw i64 %19, -1
  br label %.lr.ph16

._crit_edge17:                                    ; preds = %.lr.ph16, %16
  %21 = tail call noundef zeroext i1 @_Z5checkv()
  %22 = select i1 %21, ptr @.str.1, ptr @.str.2
  br label %.backedge

.lr.ph16:                                         ; preds = %.lr.ph16.preheader, %.lr.ph16
  %indvars.iv25 = phi i64 [ 0, %.lr.ph16.preheader ], [ %indvars.iv.next26, %.lr.ph16 ]
  %indvars.iv23 = phi i64 [ %20, %.lr.ph16.preheader ], [ %indvars.iv.next24, %.lr.ph16 ]
  %23 = getelementptr inbounds [100010 x i32], ptr @a, i64 0, i64 %indvars.iv25
  %24 = getelementptr inbounds [100010 x i32], ptr @a, i64 0, i64 %indvars.iv23
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %23, ptr noundef nonnull align 4 dereferenceable(4) %24) #4
  %indvars.iv.next26 = add nuw nsw i64 %indvars.iv25, 1
  %indvars.iv.next24 = add nsw i64 %indvars.iv23, -1
  %25 = icmp slt i64 %indvars.iv.next26, %indvars.iv.next24
  br i1 %25, label %.lr.ph16, label %._crit_edge17, !llvm.loop !12

._crit_edge21:                                    ; preds = %.backedge, %0
  ret i32 0
}

; Function Attrs: nofree nounwind
declare noundef i32 @__isoc99_scanf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

; Function Attrs: nofree nounwind
declare noundef i32 @puts(ptr nocapture noundef readonly) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass