; LLVM IR from tangjz/acm-icpc :: hdu/6089.ll (Z7seg_queP7SegmentiiiiRi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Segment = type { i32, i32, i64 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7seg_idxii(i32 noundef, i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_Z7seg_queP7Segmentiii(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #2

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z7seg_queP7SegmentiiiiRi(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, ptr noundef nonnull align 4 dereferenceable(4) %5) #2 {
  %7 = alloca i64, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca ptr, align 8
  %14 = alloca i64, align 8
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  store ptr %0, ptr %8, align 8, !tbaa !5
  store i32 %1, ptr %9, align 4, !tbaa !9
  store i32 %2, ptr %10, align 4, !tbaa !9
  store i32 %3, ptr %11, align 4, !tbaa !9
  store i32 %4, ptr %12, align 4, !tbaa !9
  store ptr %5, ptr %13, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #3
  store i64 0, ptr %14, align 8, !tbaa !11
  %17 = load i32, ptr %11, align 4, !tbaa !9
  %18 = load i32, ptr %9, align 4, !tbaa !9
  %19 = icmp sle i32 %17, %18
  br i1 %19, label %20, label %45

20:                                               ; preds = %6
  %21 = load i32, ptr %10, align 4, !tbaa !9
  %22 = load i32, ptr %12, align 4, !tbaa !9
  %23 = icmp sle i32 %21, %22
  br i1 %23, label %24, label %45

24:                                               ; preds = %20
  %25 = load ptr, ptr %8, align 8, !tbaa !5
  %26 = load i32, ptr %9, align 4, !tbaa !9
  %27 = load i32, ptr %10, align 4, !tbaa !9
  %28 = load ptr, ptr %13, align 8, !tbaa !5
  %29 = load i32, ptr %28, align 4, !tbaa !9
  %30 = call noundef i64 @_Z7seg_queP7Segmentiii(ptr noundef %25, i32 noundef %26, i32 noundef %27, i32 noundef %29)
  %31 = load i64, ptr %14, align 8, !tbaa !11
  %32 = add nsw i64 %31, %30
  store i64 %32, ptr %14, align 8, !tbaa !11
  %33 = load ptr, ptr %13, align 8, !tbaa !5
  %34 = load ptr, ptr %8, align 8, !tbaa !5
  %35 = load i32, ptr %9, align 4, !tbaa !9
  %36 = load i32, ptr %10, align 4, !tbaa !9
  %37 = call noundef i32 @_Z7seg_idxii(i32 noundef %35, i32 noundef %36)
  %38 = sext i32 %37 to i64
  %39 = getelementptr inbounds %struct.Segment, ptr %34, i64 %38
  %40 = getelementptr inbounds %struct.Segment, ptr %39, i32 0, i32 1
  %41 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %33, ptr noundef nonnull align 4 dereferenceable(4) %40)
  %42 = load i32, ptr %41, align 4, !tbaa !9
  %43 = load ptr, ptr %13, align 8, !tbaa !5
  store i32 %42, ptr %43, align 4, !tbaa !9
  %44 = load i64, ptr %14, align 8, !tbaa !11
  store i64 %44, ptr %7, align 8
  store i32 1, ptr %15, align 4
  br label %75

45:                                               ; preds = %20, %6
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #3
  %46 = load i32, ptr %9, align 4, !tbaa !9
  %47 = load i32, ptr %10, align 4, !tbaa !9
  %48 = add nsw i32 %46, %47
  %49 = ashr i32 %48, 1
  store i32 %49, ptr %16, align 4, !tbaa !9
  %50 = load i32, ptr %16, align 4, !tbaa !9
  %51 = load i32, ptr %12, align 4, !tbaa !9
  %52 = icmp slt i32 %50, %51
  br i1 %52, label %53, label %64

53:                                               ; preds = %45
  %54 = load ptr, ptr %8, align 8, !tbaa !5
  %55 = load i32, ptr %16, align 4, !tbaa !9
  %56 = add nsw i32 %55, 1
  %57 = load i32, ptr %10, align 4, !tbaa !9
  %58 = load i32, ptr %11, align 4, !tbaa !9
  %59 = load i32, ptr %12, align 4, !tbaa !9
  %60 = load ptr, ptr %13, align 8, !tbaa !5
  %61 = call noundef i64 @_Z7seg_queP7SegmentiiiiRi(ptr noundef %54, i32 noundef %56, i32 noundef %57, i32 noundef %58, i32 noundef %59, ptr noundef nonnull align 4 dereferenceable(4) %60)
  %62 = load i64, ptr %14, align 8, !tbaa !11
  %63 = add nsw i64 %62, %61
  store i64 %63, ptr %14, align 8, !tbaa !11
  br label %64

64:                                               ; preds = %53, %45
  %65 = load ptr, ptr %8, align 8, !tbaa !5
  %66 = load i32, ptr %9, align 4, !tbaa !9
  %67 = load i32, ptr %16, align 4, !tbaa !9
  %68 = load i32, ptr %11, align 4, !tbaa !9
  %69 = load i32, ptr %12, align 4, !tbaa !9
  %70 = load ptr, ptr %13, align 8, !tbaa !5
  %71 = call noundef i64 @_Z7seg_queP7SegmentiiiiRi(ptr noundef %65, i32 noundef %66, i32 noundef %67, i32 noundef %68, i32 noundef %69, ptr noundef nonnull align 4 dereferenceable(4) %70)
  %72 = load i64, ptr %14, align 8, !tbaa !11
  %73 = add nsw i64 %72, %71
  store i64 %73, ptr %14, align 8, !tbaa !11
  %74 = load i64, ptr %14, align 8, !tbaa !11
  store i64 %74, ptr %7, align 8
  store i32 1, ptr %15, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #3
  br label %75

75:                                               ; preds = %64, %24
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #3
  %76 = load i64, ptr %7, align 8
  ret i64 %76
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Segment = type { i32, i32, i64 }

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7seg_idxii(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_Z7seg_queP7Segmentiii(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z7seg_queP7SegmentiiiiRi(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, ptr noundef nonnull align 4 dereferenceable(4) %5) local_unnamed_addr #1 {
  %.not = icmp sgt i32 %3, %1
  %.not3945 = icmp sgt i32 %2, %4
  %or.cond46 = or i1 %.not, %.not3945
  br i1 %or.cond46, label %.lr.ph, label %tailrecurse._crit_edge

.lr.ph:                                           ; preds = %6
  br i1 %.not, label %.lr.ph.split.us, label %.lr.ph.split

.lr.ph.split.us:                                  ; preds = %.lr.ph, %.lr.ph.split.us.backedge
  %.tr4148.us = phi i32 [ %8, %.lr.ph.split.us.backedge ], [ %2, %.lr.ph ]
  %7 = add nsw i32 %.tr4148.us, %1
  %8 = ashr i32 %7, 1
  %9 = icmp slt i32 %8, %4
  br i1 %9, label %10, label %.lr.ph.split.us.backedge

10:                                               ; preds = %.lr.ph.split.us
  %11 = add nsw i32 %8, 1
  %12 = tail call noundef i64 @_Z7seg_queP7SegmentiiiiRi(ptr noundef %0, i32 noundef %11, i32 noundef %.tr4148.us, i32 noundef %3, i32 noundef %4, ptr noundef nonnull align 4 dereferenceable(4) %5)
  br label %.lr.ph.split.us.backedge

.lr.ph.split.us.backedge:                         ; preds = %10, %.lr.ph.split.us
  br label %.lr.ph.split.us

tailrecurse._crit_edge:                           ; preds = %tailrecurse, %6
  %accumulator.tr.lcssa = phi i64 [ 0, %6 ], [ %26, %tailrecurse ]
  %.tr41.lcssa = phi i32 [ %2, %6 ], [ %21, %tailrecurse ]
  %13 = load i32, ptr %5, align 4, !tbaa !5
  %14 = tail call noundef i64 @_Z7seg_queP7Segmentiii(ptr noundef %0, i32 noundef %1, i32 noundef %.tr41.lcssa, i32 noundef %13)
  %15 = tail call noundef i32 @_Z7seg_idxii(i32 noundef %1, i32 noundef %.tr41.lcssa)
  %16 = sext i32 %15 to i64
  %17 = getelementptr inbounds %struct.Segment, ptr %0, i64 %16, i32 1
  %18 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %5, ptr noundef nonnull align 4 dereferenceable(4) %17)
  %19 = load i32, ptr %18, align 4, !tbaa !5
  store i32 %19, ptr %5, align 4, !tbaa !5
  %accumulator.ret.tr = add nsw i64 %14, %accumulator.tr.lcssa
  ret i64 %accumulator.ret.tr

.lr.ph.split:                                     ; preds = %.lr.ph, %tailrecurse
  %.tr4148 = phi i32 [ %21, %tailrecurse ], [ %2, %.lr.ph ]
  %accumulator.tr47 = phi i64 [ %26, %tailrecurse ], [ 0, %.lr.ph ]
  %20 = add nsw i32 %.tr4148, %1
  %21 = ashr i32 %20, 1
  %22 = icmp slt i32 %21, %4
  br i1 %22, label %23, label %tailrecurse

23:                                               ; preds = %.lr.ph.split
  %24 = add nsw i32 %21, 1
  %25 = tail call noundef i64 @_Z7seg_queP7SegmentiiiiRi(ptr noundef %0, i32 noundef %24, i32 noundef %.tr4148, i32 noundef %3, i32 noundef %4, ptr noundef nonnull align 4 dereferenceable(4) %5)
  br label %tailrecurse

tailrecurse:                                      ; preds = %23, %.lr.ph.split
  %.034 = phi i64 [ %25, %23 ], [ 0, %.lr.ph.split ]
  %26 = add nsw i64 %.034, %accumulator.tr47
  %.not39 = icmp sgt i32 %21, %4
  br i1 %.not39, label %.lr.ph.split, label %tailrecurse._crit_edge
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #0

attributes #0 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass