; LLVM IR from ubaldot/defrecs :: stm32f4x/ADC_Readings/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example (main)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.arm_matrix_instance_f32 = type { i16, i16, ptr }

@B_f32 = external dso_local constant [4 x float], align 16
@A_f32 = external dso_local constant [16 x float], align 16
@xRef_f32 = external dso_local constant [4 x float], align 16
@AT_f32 = external dso_local global [16 x float], align 16
@ATMA_f32 = external dso_local global [16 x float], align 16
@ATMAI_f32 = external dso_local global [16 x float], align 16
@X_f32 = external dso_local global [4 x float], align 16
@snr = external dso_local global float, align 4

; Function Attrs: nounwind uwtable
define dso_local i32 @main() #0 {
  %1 = alloca i32, align 4
  %2 = alloca %struct.arm_matrix_instance_f32, align 8
  %3 = alloca %struct.arm_matrix_instance_f32, align 8
  %4 = alloca %struct.arm_matrix_instance_f32, align 8
  %5 = alloca %struct.arm_matrix_instance_f32, align 8
  %6 = alloca %struct.arm_matrix_instance_f32, align 8
  %7 = alloca %struct.arm_matrix_instance_f32, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  call void @llvm.lifetime.start.p0(i64 16, ptr %2) #3
  call void @llvm.lifetime.start.p0(i64 16, ptr %3) #3
  call void @llvm.lifetime.start.p0(i64 16, ptr %4) #3
  call void @llvm.lifetime.start.p0(i64 16, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 16, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 16, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  store i32 4, ptr %8, align 4, !tbaa !5
  store i32 4, ptr %9, align 4, !tbaa !5
  %11 = load i32, ptr %8, align 4, !tbaa !5
  %12 = trunc i32 %11 to i16
  %13 = load i32, ptr %9, align 4, !tbaa !5
  %14 = trunc i32 %13 to i16
  call void @arm_mat_init_f32(ptr noundef %2, i16 noundef zeroext %12, i16 noundef zeroext %14, ptr noundef @A_f32)
  store i32 4, ptr %8, align 4, !tbaa !5
  store i32 4, ptr %9, align 4, !tbaa !5
  %15 = load i32, ptr %8, align 4, !tbaa !5
  %16 = trunc i32 %15 to i16
  %17 = load i32, ptr %9, align 4, !tbaa !5
  %18 = trunc i32 %17 to i16
  call void @arm_mat_init_f32(ptr noundef %3, i16 noundef zeroext %16, i16 noundef zeroext %18, ptr noundef @AT_f32)
  %19 = call i32 @arm_mat_trans_f32(ptr noundef %2, ptr noundef %3)
  store i32 %19, ptr %10, align 4, !tbaa !5
  store i32 4, ptr %8, align 4, !tbaa !5
  store i32 4, ptr %9, align 4, !tbaa !5
  %20 = load i32, ptr %8, align 4, !tbaa !5
  %21 = trunc i32 %20 to i16
  %22 = load i32, ptr %9, align 4, !tbaa !5
  %23 = trunc i32 %22 to i16
  call void @arm_mat_init_f32(ptr noundef %4, i16 noundef zeroext %21, i16 noundef zeroext %23, ptr noundef @ATMA_f32)
  %24 = call i32 @arm_mat_mult_f32(ptr noundef %3, ptr noundef %2, ptr noundef %4)
  store i32 %24, ptr %10, align 4, !tbaa !5
  store i32 4, ptr %8, align 4, !tbaa !5
  store i32 4, ptr %9, align 4, !tbaa !5
  %25 = load i32, ptr %8, align 4, !tbaa !5
  %26 = trunc i32 %25 to i16
  %27 = load i32, ptr %9, align 4, !tbaa !5
  %28 = trunc i32 %27 to i16
  call void @arm_mat_init_f32(ptr noundef %5, i16 noundef zeroext %26, i16 noundef zeroext %28, ptr noundef @ATMAI_f32)
  %29 = call i32 @arm_mat_inverse_f32(ptr noundef %4, ptr noundef %5)
  store i32 %29, ptr %10, align 4, !tbaa !5
  %30 = call i32 @arm_mat_mult_f32(ptr noundef %5, ptr noundef %3, ptr noundef %4)
  store i32 %30, ptr %10, align 4, !tbaa !5
  store i32 4, ptr %8, align 4, !tbaa !5
  store i32 1, ptr %9, align 4, !tbaa !5
  %31 = load i32, ptr %8, align 4, !tbaa !5
  %32 = trunc i32 %31 to i16
  %33 = load i32, ptr %9, align 4, !tbaa !5
  %34 = trunc i32 %33 to i16
  call void @arm_mat_init_f32(ptr noundef %6, i16 noundef zeroext %32, i16 noundef zeroext %34, ptr noundef @B_f32)
  store i32 4, ptr %8, align 4, !tbaa !5
  store i32 1, ptr %9, align 4, !tbaa !5
  %35 = load i32, ptr %8, align 4, !tbaa !5
  %36 = trunc i32 %35 to i16
  %37 = load i32, ptr %9, align 4, !tbaa !5
  %38 = trunc i32 %37 to i16
  call void @arm_mat_init_f32(ptr noundef %7, i16 noundef zeroext %36, i16 noundef zeroext %38, ptr noundef @X_f32)
  %39 = call i32 @arm_mat_mult_f32(ptr noundef %4, ptr noundef %6, ptr noundef %7)
  store i32 %39, ptr %10, align 4, !tbaa !5
  %40 = call float @arm_snr_f32(ptr noundef @xRef_f32, ptr noundef @X_f32, i32 noundef 4)
  store float %40, ptr @snr, align 4, !tbaa !9
  %41 = load float, ptr @snr, align 4, !tbaa !9
  %42 = fcmp olt float %41, 9.000000e+01
  %43 = zext i1 %42 to i64
  %44 = select i1 %42, i32 -6, i32 0
  store i32 %44, ptr %10, align 4, !tbaa !5
  %45 = load i32, ptr %10, align 4, !tbaa !5
  %46 = icmp ne i32 %45, 0
  br i1 %46, label %47, label %50

47:                                               ; preds = %0
  br label %48

48:                                               ; preds = %49, %47
  br label %49

49:                                               ; preds = %48
  br label %48

50:                                               ; preds = %0
  br label %51

51:                                               ; preds = %52, %50
  br label %52

52:                                               ; preds = %51
  br label %51
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @arm_mat_init_f32(ptr noundef, i16 noundef zeroext, i16 noundef zeroext, ptr noundef) #2

declare i32 @arm_mat_trans_f32(ptr noundef, ptr noundef) #2

declare i32 @arm_mat_mult_f32(ptr noundef, ptr noundef, ptr noundef) #2

declare i32 @arm_mat_inverse_f32(ptr noundef, ptr noundef) #2

declare float @arm_snr_f32(ptr noundef, ptr noundef, i32 noundef) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"float", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.arm_matrix_instance_f32 = type { i16, i16, ptr }

@B_f32 = external dso_local constant [4 x float], align 16
@A_f32 = external dso_local constant [16 x float], align 16
@xRef_f32 = external dso_local constant [4 x float], align 16
@AT_f32 = external dso_local global [16 x float], align 16
@ATMA_f32 = external dso_local global [16 x float], align 16
@ATMAI_f32 = external dso_local global [16 x float], align 16
@X_f32 = external dso_local global [4 x float], align 16
@snr = external dso_local local_unnamed_addr global float, align 4

; Function Attrs: noreturn nounwind uwtable
define dso_local noundef i32 @main() local_unnamed_addr #0 {
  %1 = alloca %struct.arm_matrix_instance_f32, align 8
  %2 = alloca %struct.arm_matrix_instance_f32, align 8
  %3 = alloca %struct.arm_matrix_instance_f32, align 8
  %4 = alloca %struct.arm_matrix_instance_f32, align 8
  %5 = alloca %struct.arm_matrix_instance_f32, align 8
  %6 = alloca %struct.arm_matrix_instance_f32, align 8
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %1) #3
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2) #3
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3) #3
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #3
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %5) #3
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %6) #3
  call void @arm_mat_init_f32(ptr noundef nonnull %1, i16 noundef zeroext 4, i16 noundef zeroext 4, ptr noundef nonnull @A_f32) #3
  call void @arm_mat_init_f32(ptr noundef nonnull %2, i16 noundef zeroext 4, i16 noundef zeroext 4, ptr noundef nonnull @AT_f32) #3
  %7 = call i32 @arm_mat_trans_f32(ptr noundef nonnull %1, ptr noundef nonnull %2) #3
  call void @arm_mat_init_f32(ptr noundef nonnull %3, i16 noundef zeroext 4, i16 noundef zeroext 4, ptr noundef nonnull @ATMA_f32) #3
  %8 = call i32 @arm_mat_mult_f32(ptr noundef nonnull %2, ptr noundef nonnull %1, ptr noundef nonnull %3) #3
  call void @arm_mat_init_f32(ptr noundef nonnull %4, i16 noundef zeroext 4, i16 noundef zeroext 4, ptr noundef nonnull @ATMAI_f32) #3
  %9 = call i32 @arm_mat_inverse_f32(ptr noundef nonnull %3, ptr noundef nonnull %4) #3
  %10 = call i32 @arm_mat_mult_f32(ptr noundef nonnull %4, ptr noundef nonnull %2, ptr noundef nonnull %3) #3
  call void @arm_mat_init_f32(ptr noundef nonnull %5, i16 noundef zeroext 4, i16 noundef zeroext 1, ptr noundef nonnull @B_f32) #3
  call void @arm_mat_init_f32(ptr noundef nonnull %6, i16 noundef zeroext 4, i16 noundef zeroext 1, ptr noundef nonnull @X_f32) #3
  %11 = call i32 @arm_mat_mult_f32(ptr noundef nonnull %3, ptr noundef nonnull %5, ptr noundef nonnull %6) #3
  %12 = call float @arm_snr_f32(ptr noundef nonnull @xRef_f32, ptr noundef nonnull @X_f32, i32 noundef 4) #3
  store float %12, ptr @snr, align 4, !tbaa !5
  %13 = fcmp olt float %12, 9.000000e+01
  br i1 %13, label %.preheader, label %.preheader13

.preheader:                                       ; preds = %0, %.preheader
  br label %.preheader

.preheader13:                                     ; preds = %0, %.preheader13
  br label %.preheader13
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @arm_mat_init_f32(ptr noundef, i16 noundef zeroext, i16 noundef zeroext, ptr noundef) local_unnamed_addr #2

declare i32 @arm_mat_trans_f32(ptr noundef, ptr noundef) local_unnamed_addr #2

declare i32 @arm_mat_mult_f32(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2

declare i32 @arm_mat_inverse_f32(ptr noundef, ptr noundef) local_unnamed_addr #2

declare float @arm_snr_f32(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2

attributes #0 = { noreturn nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass