; LLVM IR from tangjz/acm-icpc :: lydsy (2502)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Edge = type { i32, i32, i32 }

@N = external dso_local global i32, align 4
@M = external dso_local global i32, align 4
@S = external dso_local global i32, align 4
@T = external dso_local global i32, align 4
@lnk = external dso_local global [105 x i32], align 16
@dt = external dso_local global [105 x i32], align 16
@e = external dso_local global [20603 x %struct.Edge], align 16
@.str = external hidden unnamed_addr constant [3 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [4 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [4 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #2 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #6
  br label %15

15:                                               ; preds = %177, %175, %0
  %16 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef %2)
  %17 = icmp eq i32 %16, 1
  br i1 %17, label %18, label %178

18:                                               ; preds = %15
  %19 = load i32, ptr %2, align 4, !tbaa !5
  %20 = add nsw i32 %19, 4
  store i32 %20, ptr @N, align 4, !tbaa !5
  store i32 0, ptr @M, align 4, !tbaa !5
  %21 = load i32, ptr @N, align 4, !tbaa !5
  %22 = sub nsw i32 %21, 4
  store i32 %22, ptr @S, align 4, !tbaa !5
  %23 = load i32, ptr @N, align 4, !tbaa !5
  %24 = sub nsw i32 %23, 3
  store i32 %24, ptr @T, align 4, !tbaa !5
  %25 = load i32, ptr @N, align 4, !tbaa !5
  %26 = sext i32 %25 to i64
  %27 = mul i64 %26, 4
  call void @llvm.memset.p0.i64(ptr align 16 @lnk, i8 -1, i64 %27, i1 false)
  %28 = load i32, ptr @N, align 4, !tbaa !5
  %29 = sext i32 %28 to i64
  %30 = mul i64 %29, 4
  call void @llvm.memset.p0.i64(ptr align 16 @dt, i8 0, i64 %30, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #6
  store i32 0, ptr %3, align 4, !tbaa !5
  br label %31

31:                                               ; preds = %64, %18
  %32 = load i32, ptr %3, align 4, !tbaa !5
  %33 = load i32, ptr %2, align 4, !tbaa !5
  %34 = icmp slt i32 %32, %33
  br i1 %34, label %36, label %35

35:                                               ; preds = %31
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #6
  br label %67

36:                                               ; preds = %31
  %37 = load i32, ptr @S, align 4, !tbaa !5
  %38 = load i32, ptr %3, align 4, !tbaa !5
  call void @_Z7addEdgeiii(i32 noundef %37, i32 noundef %38, i32 noundef 1061109567)
  %39 = load i32, ptr %3, align 4, !tbaa !5
  %40 = load i32, ptr @T, align 4, !tbaa !5
  call void @_Z7addEdgeiii(i32 noundef %39, i32 noundef %40, i32 noundef 1061109567)
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #6
  %41 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef %4)
  %42 = load i32, ptr %4, align 4, !tbaa !5
  %43 = load i32, ptr %3, align 4, !tbaa !5
  %44 = sext i32 %43 to i64
  %45 = getelementptr inbounds [105 x i32], ptr @dt, i64 0, i64 %44
  %46 = load i32, ptr %45, align 4, !tbaa !5
  %47 = sub nsw i32 %46, %42
  store i32 %47, ptr %45, align 4, !tbaa !5
  br label %48

48:                                               ; preds = %52, %36
  %49 = load i32, ptr %4, align 4, !tbaa !5
  %50 = add nsw i32 %49, -1
  store i32 %50, ptr %4, align 4, !tbaa !5
  %51 = icmp ne i32 %49, 0
  br i1 %51, label %52, label %63

52:                                               ; preds = %48
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #6
  %53 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef %5)
  %54 = load i32, ptr %5, align 4, !tbaa !5
  %55 = add nsw i32 %54, -1
  store i32 %55, ptr %5, align 4, !tbaa !5
  %56 = load i32, ptr %5, align 4, !tbaa !5
  %57 = sext i32 %56 to i64
  %58 = getelementptr inbounds [105 x i32], ptr @dt, i64 0, i64 %57
  %59 = load i32, ptr %58, align 4, !tbaa !5
  %60 = add nsw i32 %59, 1
  store i32 %60, ptr %58, align 4, !tbaa !5
  %61 = load i32, ptr %3, align 4, !tbaa !5
  %62 = load i32, ptr %5, align 4, !tbaa !5
  call void @_Z7addEdgeiii(i32 noundef %61, i32 noundef %62, i32 noundef 1061109567)
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #6
  br label %48, !llvm.loop !9

63:                                               ; preds = %48
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #6
  br label %64

64:                                               ; preds = %63
  %65 = load i32, ptr %3, align 4, !tbaa !5
  %66 = add nsw i32 %65, 1
  store i32 %66, ptr %3, align 4, !tbaa !5
  br label %31, !llvm.loop !11

67:                                               ; preds = %35
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #6
  store i32 0, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #6
  %68 = load i32, ptr @N, align 4, !tbaa !5
  %69 = sub nsw i32 %68, 2
  store i32 %69, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #6
  %70 = load i32, ptr @N, align 4, !tbaa !5
  %71 = sub nsw i32 %70, 1
  store i32 %71, ptr %8, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #6
  %72 = load i32, ptr @M, align 4, !tbaa !5
  store i32 %72, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #6
  store i32 0, ptr %10, align 4, !tbaa !5
  br label %73

73:                                               ; preds = %113, %67
  %74 = load i32, ptr %10, align 4, !tbaa !5
  %75 = load i32, ptr @N, align 4, !tbaa !5
  %76 = icmp slt i32 %74, %75
  br i1 %76, label %78, label %77

77:                                               ; preds = %73
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #6
  br label %116

78:                                               ; preds = %73
  %79 = load i32, ptr %10, align 4, !tbaa !5
  %80 = sext i32 %79 to i64
  %81 = getelementptr inbounds [105 x i32], ptr @dt, i64 0, i64 %80
  %82 = load i32, ptr %81, align 4, !tbaa !5
  %83 = icmp sgt i32 %82, 0
  br i1 %83, label %84, label %97

84:                                               ; preds = %78
  %85 = load i32, ptr %10, align 4, !tbaa !5
  %86 = sext i32 %85 to i64
  %87 = getelementptr inbounds [105 x i32], ptr @dt, i64 0, i64 %86
  %88 = load i32, ptr %87, align 4, !tbaa !5
  %89 = load i32, ptr %6, align 4, !tbaa !5
  %90 = add nsw i32 %89, %88
  store i32 %90, ptr %6, align 4, !tbaa !5
  %91 = load i32, ptr %7, align 4, !tbaa !5
  %92 = load i32, ptr %10, align 4, !tbaa !5
  %93 = load i32, ptr %10, align 4, !tbaa !5
  %94 = sext i32 %93 to i64
  %95 = getelementptr inbounds [105 x i32], ptr @dt, i64 0, i64 %94
  %96 = load i32, ptr %95, align 4, !tbaa !5
  call void @_Z7addEdgeiii(i32 noundef %91, i32 noundef %92, i32 noundef %96)
  br label %112

97:                                               ; preds = %78
  %98 = load i32, ptr %10, align 4, !tbaa !5
  %99 = sext i32 %98 to i64
  %100 = getelementptr inbounds [105 x i32], ptr @dt, i64 0, i64 %99
  %101 = load i32, ptr %100, align 4, !tbaa !5
  %102 = icmp slt i32 %101, 0
  br i1 %102, label %103, label %111

103:                                              ; preds = %97
  %104 = load i32, ptr %10, align 4, !tbaa !5
  %105 = load i32, ptr %8, align 4, !tbaa !5
  %106 = load i32, ptr %10, align 4, !tbaa !5
  %107 = sext i32 %106 to i64
  %108 = getelementptr inbounds [105 x i32], ptr @dt, i64 0, i64 %107
  %109 = load i32, ptr %108, align 4, !tbaa !5
  %110 = sub nsw i32 0, %109
  call void @_Z7addEdgeiii(i32 noundef %104, i32 noundef %105, i32 noundef %110)
  br label %111

111:                                              ; preds = %103, %97
  br label %112

112:                                              ; preds = %111, %84
  br label %113

113:                                              ; preds = %112
  %114 = load i32, ptr %10, align 4, !tbaa !5
  %115 = add nsw i32 %114, 1
  store i32 %115, ptr %10, align 4, !tbaa !5
  br label %73, !llvm.loop !12

116:                                              ; preds = %77
  %117 = load i32, ptr @T, align 4, !tbaa !5
  %118 = load i32, ptr @S, align 4, !tbaa !5
  call void @_Z7addEdgeiii(i32 noundef %117, i32 noundef %118, i32 noundef 1061109567)
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) @S, ptr noundef nonnull align 4 dereferenceable(4) %7) #6
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) @T, ptr noundef nonnull align 4 dereferenceable(4) %8) #6
  %119 = call noundef i32 @_Z5dinicv()
  %120 = load i32, ptr %6, align 4, !tbaa !5
  %121 = icmp ne i32 %119, %120
  br i1 %121, label %122, label %124

122:                                              ; preds = %116
  %123 = call i32 @puts(ptr noundef @.str.1)
  store i32 2, ptr %11, align 4
  br label %175, !llvm.loop !13

124:                                              ; preds = %116
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #6
  %125 = load i32, ptr @M, align 4, !tbaa !5
  %126 = sub nsw i32 %125, 1
  %127 = sext i32 %126 to i64
  %128 = getelementptr inbounds [20603 x %struct.Edge], ptr @e, i64 0, i64 %127
  %129 = getelementptr inbounds %struct.Edge, ptr %128, i32 0, i32 2
  %130 = load i32, ptr %129, align 4, !tbaa !14
  store i32 %130, ptr %12, align 4, !tbaa !5
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) @S, ptr noundef nonnull align 4 dereferenceable(4) %7) #6
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) @T, ptr noundef nonnull align 4 dereferenceable(4) %8) #6
  br label %131

131:                                              ; preds = %166, %124
  %132 = load i32, ptr %9, align 4, !tbaa !5
  %133 = load i32, ptr @M, align 4, !tbaa !5
  %134 = icmp slt i32 %132, %133
  br i1 %134, label %135, label %169

135:                                              ; preds = %131
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #6
  %136 = load i32, ptr @M, align 4, !tbaa !5
  %137 = sub nsw i32 %136, 1
  %138 = sext i32 %137 to i64
  %139 = getelementptr inbounds [20603 x %struct.Edge], ptr @e, i64 0, i64 %138
  %140 = getelementptr inbounds %struct.Edge, ptr %139, i32 0, i32 1
  %141 = load i32, ptr %140, align 4, !tbaa !16
  store i32 %141, ptr %13, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #6
  %142 = load i32, ptr @M, align 4, !tbaa !5
  %143 = sub nsw i32 %142, 2
  %144 = sext i32 %143 to i64
  %145 = getelementptr inbounds [20603 x %struct.Edge], ptr @e, i64 0, i64 %144
  %146 = getelementptr inbounds %struct.Edge, ptr %145, i32 0, i32 1
  %147 = load i32, ptr %146, align 4, !tbaa !16
  store i32 %147, ptr %14, align 4, !tbaa !5
  %148 = load i32, ptr @M, align 4, !tbaa !5
  %149 = sub nsw i32 %148, 2
  %150 = sext i32 %149 to i64
  %151 = getelementptr inbounds [20603 x %struct.Edge], ptr @e, i64 0, i64 %150
  %152 = getelementptr inbounds %struct.Edge, ptr %151, i32 0, i32 0
  %153 = load i32, ptr %152, align 4, !tbaa !17
  %154 = load i32, ptr %13, align 4, !tbaa !5
  %155 = sext i32 %154 to i64
  %156 = getelementptr inbounds [105 x i32], ptr @lnk, i64 0, i64 %155
  store i32 %153, ptr %156, align 4, !tbaa !5
  %157 = load i32, ptr @M, align 4, !tbaa !5
  %158 = sub nsw i32 %157, 1
  %159 = sext i32 %158 to i64
  %160 = getelementptr inbounds [20603 x %struct.Edge], ptr @e, i64 0, i64 %159
  %161 = getelementptr inbounds %struct.Edge, ptr %160, i32 0, i32 0
  %162 = load i32, ptr %161, align 4, !tbaa !17
  %163 = load i32, ptr %14, align 4, !tbaa !5
  %164 = sext i32 %163 to i64
  %165 = getelementptr inbounds [105 x i32], ptr @lnk, i64 0, i64 %164
  store i32 %162, ptr %165, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #6
  br label %166

166:                                              ; preds = %135
  %167 = load i32, ptr @M, align 4, !tbaa !5
  %168 = sub nsw i32 %167, 2
  store i32 %168, ptr @M, align 4, !tbaa !5
  br label %131, !llvm.loop !18

169:                                              ; preds = %131
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) @S, ptr noundef nonnull align 4 dereferenceable(4) @T) #6
  %170 = call noundef i32 @_Z5dinicv()
  %171 = load i32, ptr %12, align 4, !tbaa !5
  %172 = sub nsw i32 %171, %170
  store i32 %172, ptr %12, align 4, !tbaa !5
  %173 = load i32, ptr %12, align 4, !tbaa !5
  %174 = call i32 (ptr, ...) @printf(ptr noundef @.str.2, i32 noundef %173)
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #6
  store i32 0, ptr %11, align 4
  br label %175

175:                                              ; preds = %169, %122
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #6
  %176 = load i32, ptr %11, align 4
  switch i32 %176, label %180 [
    i32 0, label %177
    i32 2, label %15
  ]

177:                                              ; preds = %175
  br label %15, !llvm.loop !13

178:                                              ; preds = %15
  store i32 0, ptr %1, align 4
  store i32 1, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #6
  %179 = load i32, ptr %1, align 4
  ret i32 %179

180:                                              ; preds = %175
  unreachable
}

declare i32 @__isoc99_scanf(ptr noundef, ...) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_Z7addEdgeiii(i32 noundef, i32 noundef, i32 noundef) #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #4

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_Z5dinicv() #5

declare i32 @puts(ptr noundef) #3

declare i32 @printf(ptr noundef, ...) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}
!14 = !{!15, !6, i64 8}
!15 = !{!"_ZTS4Edge", !6, i64 0, !6, i64 4, !6, i64 8}
!16 = !{!15, !6, i64 4}
!17 = !{!15, !6, i64 0}
!18 = distinct !{!18, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Edge = type { i32, i32, i32 }

@N = external dso_local local_unnamed_addr global i32, align 4
@M = external dso_local local_unnamed_addr global i32, align 4
@S = external dso_local global i32, align 4
@T = external dso_local global i32, align 4
@lnk = external dso_local local_unnamed_addr global [105 x i32], align 16
@dt = external dso_local local_unnamed_addr global [105 x i32], align 16
@e = external dso_local local_unnamed_addr global [20603 x %struct.Edge], align 16
@.str = external hidden unnamed_addr constant [3 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [4 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [4 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() local_unnamed_addr #2 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #6
  %6 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull %1)
  %7 = icmp eq i32 %6, 1
  br i1 %7, label %.lr.ph43, label %._crit_edge44

.lr.ph43:                                         ; preds = %0, %90
  %8 = load i32, ptr %1, align 4, !tbaa !5
  %9 = add nsw i32 %8, 4
  store i32 %9, ptr @N, align 4, !tbaa !5
  store i32 0, ptr @M, align 4, !tbaa !5
  store i32 %8, ptr @S, align 4, !tbaa !5
  %10 = add nsw i32 %8, 1
  store i32 %10, ptr @T, align 4, !tbaa !5
  %11 = sext i32 %9 to i64
  %12 = shl nsw i64 %11, 2
  call void @llvm.memset.p0.i64(ptr nonnull align 16 @lnk, i8 -1, i64 %12, i1 false)
  call void @llvm.memset.p0.i64(ptr nonnull align 16 @dt, i8 0, i64 %12, i1 false)
  %13 = icmp sgt i32 %8, 0
  br i1 %13, label %.lr.ph32, label %._crit_edge33

._crit_edge33.loopexit:                           ; preds = %._crit_edge
  %.pre = load i32, ptr @N, align 4, !tbaa !5
  %.pre52 = load i32, ptr @M, align 4, !tbaa !5
  br label %._crit_edge33

._crit_edge33:                                    ; preds = %._crit_edge33.loopexit, %.lr.ph43
  %14 = phi i32 [ %.pre52, %._crit_edge33.loopexit ], [ 0, %.lr.ph43 ]
  %15 = phi i32 [ %.pre, %._crit_edge33.loopexit ], [ %9, %.lr.ph43 ]
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #6
  %16 = add nsw i32 %15, -2
  store i32 %16, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #6
  %17 = add nsw i32 %15, -1
  store i32 %17, ptr %5, align 4, !tbaa !5
  %18 = icmp sgt i32 %15, 0
  br i1 %18, label %.lr.ph37, label %._crit_edge38

.lr.ph32:                                         ; preds = %.lr.ph43, %._crit_edge
  %indvars.iv = phi i64 [ %indvars.iv.next, %._crit_edge ], [ 0, %.lr.ph43 ]
  %19 = load i32, ptr @S, align 4, !tbaa !5
  %20 = trunc nuw nsw i64 %indvars.iv to i32
  call void @_Z7addEdgeiii(i32 noundef %19, i32 noundef %20, i32 noundef 1061109567)
  %21 = load i32, ptr @T, align 4, !tbaa !5
  call void @_Z7addEdgeiii(i32 noundef %20, i32 noundef %21, i32 noundef 1061109567)
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #6
  %22 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull %2)
  %23 = load i32, ptr %2, align 4, !tbaa !5
  %24 = getelementptr inbounds [105 x i32], ptr @dt, i64 0, i64 %indvars.iv
  %25 = load i32, ptr %24, align 4, !tbaa !5
  %26 = sub nsw i32 %25, %23
  store i32 %26, ptr %24, align 4, !tbaa !5
  %27 = add nsw i32 %23, -1
  store i32 %27, ptr %2, align 4, !tbaa !5
  %.not2829 = icmp eq i32 %23, 0
  br i1 %.not2829, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph32, %.lr.ph
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #6
  %28 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull %3)
  %29 = load i32, ptr %3, align 4, !tbaa !5
  %30 = add nsw i32 %29, -1
  store i32 %30, ptr %3, align 4, !tbaa !5
  %31 = sext i32 %30 to i64
  %32 = getelementptr inbounds [105 x i32], ptr @dt, i64 0, i64 %31
  %33 = load i32, ptr %32, align 4, !tbaa !5
  %34 = add nsw i32 %33, 1
  store i32 %34, ptr %32, align 4, !tbaa !5
  call void @_Z7addEdgeiii(i32 noundef %20, i32 noundef %30, i32 noundef 1061109567)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #6
  %35 = load i32, ptr %2, align 4, !tbaa !5
  %36 = add nsw i32 %35, -1
  store i32 %36, ptr %2, align 4, !tbaa !5
  %.not28 = icmp eq i32 %35, 0
  br i1 %.not28, label %._crit_edge, label %.lr.ph, !llvm.loop !9

._crit_edge:                                      ; preds = %.lr.ph, %.lr.ph32
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #6
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %37 = load i32, ptr %1, align 4, !tbaa !5
  %38 = sext i32 %37 to i64
  %39 = icmp slt i64 %indvars.iv.next, %38
  br i1 %39, label %.lr.ph32, label %._crit_edge33.loopexit, !llvm.loop !11

._crit_edge38:                                    ; preds = %56, %._crit_edge33
  %.024.lcssa = phi i32 [ 0, %._crit_edge33 ], [ %.1, %56 ]
  %40 = load i32, ptr @T, align 4, !tbaa !5
  %41 = load i32, ptr @S, align 4, !tbaa !5
  call void @_Z7addEdgeiii(i32 noundef %40, i32 noundef %41, i32 noundef 1061109567)
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) @S, ptr noundef nonnull align 4 dereferenceable(4) %4) #6
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) @T, ptr noundef nonnull align 4 dereferenceable(4) %5) #6
  %42 = call noundef i32 @_Z5dinicv()
  %.not = icmp eq i32 %42, %.024.lcssa
  br i1 %.not, label %62, label %60

.lr.ph37:                                         ; preds = %._crit_edge33, %56
  %indvars.iv46 = phi i64 [ %indvars.iv.next47, %56 ], [ 0, %._crit_edge33 ]
  %.02434 = phi i32 [ %.1, %56 ], [ 0, %._crit_edge33 ]
  %43 = getelementptr inbounds [105 x i32], ptr @dt, i64 0, i64 %indvars.iv46
  %44 = load i32, ptr %43, align 4, !tbaa !5
  %45 = icmp sgt i32 %44, 0
  br i1 %45, label %46, label %50

46:                                               ; preds = %.lr.ph37
  %47 = add nuw nsw i32 %44, %.02434
  %48 = load i32, ptr %4, align 4, !tbaa !5
  %49 = trunc nuw nsw i64 %indvars.iv46 to i32
  call void @_Z7addEdgeiii(i32 noundef %48, i32 noundef %49, i32 noundef %44)
  br label %56

50:                                               ; preds = %.lr.ph37
  %51 = icmp slt i32 %44, 0
  br i1 %51, label %52, label %56

52:                                               ; preds = %50
  %53 = load i32, ptr %5, align 4, !tbaa !5
  %54 = sub nsw i32 0, %44
  %55 = trunc nuw nsw i64 %indvars.iv46 to i32
  call void @_Z7addEdgeiii(i32 noundef %55, i32 noundef %53, i32 noundef %54)
  br label %56

56:                                               ; preds = %46, %52, %50
  %.1 = phi i32 [ %47, %46 ], [ %.02434, %52 ], [ %.02434, %50 ]
  %indvars.iv.next47 = add nuw nsw i64 %indvars.iv46, 1
  %57 = load i32, ptr @N, align 4, !tbaa !5
  %58 = sext i32 %57 to i64
  %59 = icmp slt i64 %indvars.iv.next47, %58
  br i1 %59, label %.lr.ph37, label %._crit_edge38, !llvm.loop !12

60:                                               ; preds = %._crit_edge38
  %61 = call i32 @puts(ptr noundef nonnull dereferenceable(1) @.str.1)
  br label %90, !llvm.loop !13

62:                                               ; preds = %._crit_edge38
  %63 = load i32, ptr @M, align 4, !tbaa !5
  %64 = add nsw i32 %63, -1
  %65 = sext i32 %64 to i64
  %66 = getelementptr inbounds [20603 x %struct.Edge], ptr @e, i64 0, i64 %65, i32 2
  %67 = load i32, ptr %66, align 4, !tbaa !14
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) @S, ptr noundef nonnull align 4 dereferenceable(4) %4) #6
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) @T, ptr noundef nonnull align 4 dereferenceable(4) %5) #6
  %M.promoted = load i32, ptr @M, align 4, !tbaa !5
  %68 = icmp slt i32 %14, %M.promoted
  br i1 %68, label %.lr.ph40.preheader, label %86

.lr.ph40.preheader:                               ; preds = %62
  %69 = sext i32 %M.promoted to i64
  %70 = sext i32 %14 to i64
  br label %.lr.ph40

.lr.ph40:                                         ; preds = %.lr.ph40.preheader, %.lr.ph40
  %indvars.iv49 = phi i64 [ %69, %.lr.ph40.preheader ], [ %indvars.iv.next50, %.lr.ph40 ]
  %71 = add nsw i64 %indvars.iv49, -1
  %72 = getelementptr inbounds [20603 x %struct.Edge], ptr @e, i64 0, i64 %71, i32 1
  %73 = load i32, ptr %72, align 4, !tbaa !16
  %indvars.iv.next50 = add nsw i64 %indvars.iv49, -2
  %74 = getelementptr inbounds [20603 x %struct.Edge], ptr @e, i64 0, i64 %indvars.iv.next50
  %75 = getelementptr inbounds i8, ptr %74, i64 4
  %76 = load i32, ptr %75, align 4, !tbaa !16
  %77 = load i32, ptr %74, align 4, !tbaa !17
  %78 = sext i32 %73 to i64
  %79 = getelementptr inbounds [105 x i32], ptr @lnk, i64 0, i64 %78
  store i32 %77, ptr %79, align 4, !tbaa !5
  %80 = getelementptr inbounds [20603 x %struct.Edge], ptr @e, i64 0, i64 %71
  %81 = load i32, ptr %80, align 4, !tbaa !17
  %82 = sext i32 %76 to i64
  %83 = getelementptr inbounds [105 x i32], ptr @lnk, i64 0, i64 %82
  store i32 %81, ptr %83, align 4, !tbaa !5
  %84 = icmp sgt i64 %indvars.iv.next50, %70
  br i1 %84, label %.lr.ph40, label %._crit_edge41, !llvm.loop !18

._crit_edge41:                                    ; preds = %.lr.ph40
  %85 = trunc nsw i64 %indvars.iv.next50 to i32
  store i32 %85, ptr @M, align 4, !tbaa !5
  br label %86

86:                                               ; preds = %._crit_edge41, %62
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) @S, ptr noundef nonnull align 4 dereferenceable(4) @T) #6
  %87 = call noundef i32 @_Z5dinicv()
  %88 = sub nsw i32 %67, %87
  %89 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.2, i32 noundef %88)
  br label %90

90:                                               ; preds = %86, %60
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #6
  %91 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull %1)
  %92 = icmp eq i32 %91, 1
  br i1 %92, label %.lr.ph43, label %._crit_edge44

._crit_edge44:                                    ; preds = %90, %0
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #6
  ret i32 0
}

; Function Attrs: nofree nounwind
declare noundef i32 @__isoc99_scanf(ptr nocapture noundef readonly, ...) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_Z7addEdgeiii(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #4

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_Z5dinicv() local_unnamed_addr #5

; Function Attrs: nofree nounwind
declare noundef i32 @puts(ptr nocapture noundef readonly) local_unnamed_addr #3

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #3

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}
!14 = !{!15, !6, i64 8}
!15 = !{!"_ZTS4Edge", !6, i64 0, !6, i64 4, !6, i64 8}
!16 = !{!15, !6, i64 4}
!17 = !{!15, !6, i64 0}
!18 = distinct !{!18, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass