; LLVM IR from mitdbg/deneva :: system/sim_manager.ll (ZN10SimManager4initEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.SimManager = type { i8, i8, i64, i8, i8, i64, i64, i64, i64, i64, i64, i64, i64, i64 }

@g_total_node_cnt = external global i32, align 4

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN10SimManager4initEv(ptr noundef nonnull align 8 dereferenceable(96) %0) #0 align 2 {
  %2 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %3 = load ptr, ptr %2, align 8
  %4 = getelementptr inbounds %class.SimManager, ptr %3, i32 0, i32 4
  store volatile i8 0, ptr %4, align 1, !tbaa !9
  %5 = getelementptr inbounds %class.SimManager, ptr %3, i32 0, i32 1
  store volatile i8 0, ptr %5, align 1, !tbaa !13
  %6 = getelementptr inbounds %class.SimManager, ptr %3, i32 0, i32 2
  store volatile i64 0, ptr %6, align 8, !tbaa !14
  %7 = getelementptr inbounds %class.SimManager, ptr %3, i32 0, i32 3
  store i8 0, ptr %7, align 8, !tbaa !15
  %8 = getelementptr inbounds %class.SimManager, ptr %3, i32 0, i32 0
  store volatile i8 0, ptr %8, align 8, !tbaa !16
  %9 = getelementptr inbounds %class.SimManager, ptr %3, i32 0, i32 12
  store i64 0, ptr %9, align 8, !tbaa !17
  %10 = getelementptr inbounds %class.SimManager, ptr %3, i32 0, i32 13
  store i64 0, ptr %10, align 8, !tbaa !18
  %11 = getelementptr inbounds %class.SimManager, ptr %3, i32 0, i32 11
  store i64 0, ptr %11, align 8, !tbaa !19
  %12 = getelementptr inbounds %class.SimManager, ptr %3, i32 0, i32 8
  store i64 1, ptr %12, align 8, !tbaa !20
  %13 = getelementptr inbounds %class.SimManager, ptr %3, i32 0, i32 7
  store i64 0, ptr %13, align 8, !tbaa !21
  %14 = load i32, ptr @g_total_node_cnt, align 4, !tbaa !22
  %15 = sub i32 %14, 1
  %16 = zext i32 %15 to i64
  %17 = getelementptr inbounds %class.SimManager, ptr %3, i32 0, i32 6
  store i64 %16, ptr %17, align 8, !tbaa !24
  %18 = call noundef i64 @_Z13get_sys_clockv()
  %19 = getelementptr inbounds %class.SimManager, ptr %3, i32 0, i32 5
  store i64 %18, ptr %19, align 8, !tbaa !25
  %20 = getelementptr inbounds %class.SimManager, ptr %3, i32 0, i32 5
  %21 = load i64, ptr %20, align 8, !tbaa !25
  %22 = getelementptr inbounds %class.SimManager, ptr %3, i32 0, i32 9
  store i64 %21, ptr %22, align 8, !tbaa !26
  %23 = call noundef i64 @_Z14get_wall_clockv()
  %24 = getelementptr inbounds %class.SimManager, ptr %3, i32 0, i32 10
  store i64 %23, ptr %24, align 8, !tbaa !27
  ret void
}

declare noundef i64 @_Z13get_sys_clockv() #1

declare noundef i64 @_Z14get_wall_clockv() #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 17}
!10 = !{!"_ZTS10SimManager", !11, i64 0, !11, i64 1, !12, i64 8, !11, i64 16, !11, i64 17, !12, i64 24, !12, i64 32, !12, i64 40, !12, i64 48, !12, i64 56, !12, i64 64, !12, i64 72, !12, i64 80, !12, i64 88}
!11 = !{!"bool", !7, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!10, !11, i64 1}
!14 = !{!10, !12, i64 8}
!15 = !{!10, !11, i64 16}
!16 = !{!10, !11, i64 0}
!17 = !{!10, !12, i64 80}
!18 = !{!10, !12, i64 88}
!19 = !{!10, !12, i64 72}
!20 = !{!10, !12, i64 48}
!21 = !{!10, !12, i64 40}
!22 = !{!23, !23, i64 0}
!23 = !{!"int", !7, i64 0}
!24 = !{!10, !12, i64 32}
!25 = !{!10, !12, i64 24}
!26 = !{!10, !12, i64 56}
!27 = !{!10, !12, i64 64}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@g_total_node_cnt = external local_unnamed_addr global i32, align 4

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN10SimManager4initEv(ptr noundef nonnull align 8 dereferenceable(96) %0) local_unnamed_addr #0 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 17
  store volatile i8 0, ptr %2, align 1, !tbaa !5
  %3 = getelementptr inbounds i8, ptr %0, i64 1
  store volatile i8 0, ptr %3, align 1, !tbaa !11
  %4 = getelementptr inbounds i8, ptr %0, i64 8
  store volatile i64 0, ptr %4, align 8, !tbaa !12
  %5 = getelementptr inbounds i8, ptr %0, i64 16
  store i8 0, ptr %5, align 8, !tbaa !13
  store volatile i8 0, ptr %0, align 8, !tbaa !14
  %6 = getelementptr inbounds i8, ptr %0, i64 72
  %7 = getelementptr inbounds i8, ptr %0, i64 48
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %6, i8 0, i64 24, i1 false)
  store i64 1, ptr %7, align 8, !tbaa !15
  %8 = getelementptr inbounds i8, ptr %0, i64 40
  store i64 0, ptr %8, align 8, !tbaa !16
  %9 = load i32, ptr @g_total_node_cnt, align 4, !tbaa !17
  %10 = add i32 %9, -1
  %11 = zext i32 %10 to i64
  %12 = getelementptr inbounds i8, ptr %0, i64 32
  store i64 %11, ptr %12, align 8, !tbaa !19
  %13 = tail call noundef i64 @_Z13get_sys_clockv()
  %14 = getelementptr inbounds i8, ptr %0, i64 24
  store i64 %13, ptr %14, align 8, !tbaa !20
  %15 = getelementptr inbounds i8, ptr %0, i64 56
  store i64 %13, ptr %15, align 8, !tbaa !21
  %16 = tail call noundef i64 @_Z14get_wall_clockv()
  %17 = getelementptr inbounds i8, ptr %0, i64 64
  store i64 %16, ptr %17, align 8, !tbaa !22
  ret void
}

declare noundef i64 @_Z13get_sys_clockv() local_unnamed_addr #1

declare noundef i64 @_Z14get_wall_clockv() local_unnamed_addr #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 17}
!6 = !{!"_ZTS10SimManager", !7, i64 0, !7, i64 1, !10, i64 8, !7, i64 16, !7, i64 17, !10, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !10, i64 56, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88}
!7 = !{!"bool", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!6, !7, i64 1}
!12 = !{!6, !10, i64 8}
!13 = !{!6, !7, i64 16}
!14 = !{!6, !7, i64 0}
!15 = !{!6, !10, i64 48}
!16 = !{!6, !10, i64 40}
!17 = !{!18, !18, i64 0}
!18 = !{!"int", !8, i64 0}
!19 = !{!6, !10, i64 32}
!20 = !{!6, !10, i64 24}
!21 = !{!6, !10, i64 56}
!22 = !{!6, !10, i64 64}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InstCombinePass,MemCpyOptPass,SROAPass,TailCallElimPass