; LLVM IR from CRAFT-THU/BSim :: src/net/BuildNetwork.ll (Z18arrangeArrayNeuronRSt6vectorIiSaIiEES2_P13GArrayNeuronsi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.__gnu_cxx::__normal_iterator" = type { ptr }
%struct.GArrayNeurons = type { ptr, ptr, ptr }

@.str = external hidden unnamed_addr constant [29 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [73 x i8], align 1
@__PRETTY_FUNCTION__._Z18arrangeArrayNeuronRSt6vectorIiSaIiEES2_P13GArrayNeuronsi = external hidden unnamed_addr constant [76 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [31 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [42 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIiSaIiEE3endEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIiSaIiEE5beginEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z18arrangeArrayNeuronRSt6vectorIiSaIiEES2_P13GArrayNeuronsi(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef %2, i32 noundef %3) #2 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  %11 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  store i32 %3, ptr %8, align 4, !tbaa !9
  %12 = load i32, ptr %8, align 4, !tbaa !9
  %13 = load ptr, ptr %6, align 8, !tbaa !5
  %14 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %13) #6
  %15 = trunc i64 %14 to i32
  %16 = icmp eq i32 %12, %15
  br i1 %16, label %17, label %18

17:                                               ; preds = %4
  br label %20

18:                                               ; preds = %4
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 23, ptr noundef @__PRETTY_FUNCTION__._Z18arrangeArrayNeuronRSt6vectorIiSaIiEES2_P13GArrayNeuronsi) #7
  unreachable

19:                                               ; No predecessors!
  br label %20

20:                                               ; preds = %19, %17
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #6
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %21

21:                                               ; preds = %77, %20
  %22 = load i32, ptr %9, align 4, !tbaa !9
  %23 = load i32, ptr %8, align 4, !tbaa !9
  %24 = icmp slt i32 %22, %23
  br i1 %24, label %26, label %25

25:                                               ; preds = %21
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #6
  br label %80

26:                                               ; preds = %21
  %27 = load ptr, ptr %6, align 8, !tbaa !5
  %28 = load i32, ptr %9, align 4, !tbaa !9
  %29 = sext i32 %28 to i64
  %30 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %27, i64 noundef %29) #6
  %31 = load i32, ptr %30, align 4, !tbaa !9
  %32 = load ptr, ptr %7, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.GArrayNeurons, ptr %32, i32 0, i32 0
  %34 = load ptr, ptr %33, align 8, !tbaa !11
  %35 = load i32, ptr %9, align 4, !tbaa !9
  %36 = sext i32 %35 to i64
  %37 = getelementptr inbounds i32, ptr %34, i64 %36
  store i32 %31, ptr %37, align 4, !tbaa !9
  %38 = load ptr, ptr %7, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.GArrayNeurons, ptr %38, i32 0, i32 0
  %40 = load ptr, ptr %39, align 8, !tbaa !11
  %41 = load i32, ptr %9, align 4, !tbaa !9
  %42 = sext i32 %41 to i64
  %43 = getelementptr inbounds i32, ptr %40, i64 %42
  %44 = load i32, ptr %43, align 4, !tbaa !9
  %45 = load ptr, ptr %7, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.GArrayNeurons, ptr %45, i32 0, i32 1
  %47 = load ptr, ptr %46, align 8, !tbaa !13
  %48 = load i32, ptr %9, align 4, !tbaa !9
  %49 = sext i32 %48 to i64
  %50 = getelementptr inbounds i32, ptr %47, i64 %49
  %51 = load i32, ptr %50, align 4, !tbaa !9
  %52 = add nsw i32 %51, %44
  store i32 %52, ptr %50, align 4, !tbaa !9
  %53 = load i32, ptr %9, align 4, !tbaa !9
  %54 = icmp sgt i32 %53, 0
  br i1 %54, label %55, label %76

55:                                               ; preds = %26
  %56 = load ptr, ptr %7, align 8, !tbaa !5
  %57 = getelementptr inbounds %struct.GArrayNeurons, ptr %56, i32 0, i32 1
  %58 = load ptr, ptr %57, align 8, !tbaa !13
  %59 = load i32, ptr %9, align 4, !tbaa !9
  %60 = sub nsw i32 %59, 1
  %61 = sext i32 %60 to i64
  %62 = getelementptr inbounds i32, ptr %58, i64 %61
  %63 = load i32, ptr %62, align 4, !tbaa !9
  %64 = load ptr, ptr %7, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.GArrayNeurons, ptr %64, i32 0, i32 0
  %66 = load ptr, ptr %65, align 8, !tbaa !11
  %67 = load i32, ptr %9, align 4, !tbaa !9
  %68 = sext i32 %67 to i64
  %69 = getelementptr inbounds i32, ptr %66, i64 %68
  %70 = load i32, ptr %69, align 4, !tbaa !9
  %71 = icmp eq i32 %63, %70
  br i1 %71, label %72, label %73

72:                                               ; preds = %55
  br label %75

73:                                               ; preds = %55
  call void @__assert_fail(ptr noundef @.str.2, ptr noundef @.str.1, i32 noundef 28, ptr noundef @__PRETTY_FUNCTION__._Z18arrangeArrayNeuronRSt6vectorIiSaIiEES2_P13GArrayNeuronsi) #7
  unreachable

74:                                               ; No predecessors!
  br label %75

75:                                               ; preds = %74, %72
  br label %76

76:                                               ; preds = %75, %26
  br label %77

77:                                               ; preds = %76
  %78 = load i32, ptr %9, align 4, !tbaa !9
  %79 = add nsw i32 %78, 1
  store i32 %79, ptr %9, align 4, !tbaa !9
  br label %21, !llvm.loop !14

80:                                               ; preds = %25
  %81 = load ptr, ptr %7, align 8, !tbaa !5
  %82 = getelementptr inbounds %struct.GArrayNeurons, ptr %81, i32 0, i32 1
  %83 = load ptr, ptr %82, align 8, !tbaa !13
  %84 = load i32, ptr %8, align 4, !tbaa !9
  %85 = sub nsw i32 %84, 1
  %86 = sext i32 %85 to i64
  %87 = getelementptr inbounds i32, ptr %83, i64 %86
  %88 = load i32, ptr %87, align 4, !tbaa !9
  %89 = load ptr, ptr %5, align 8, !tbaa !5
  %90 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %89) #6
  %91 = trunc i64 %90 to i32
  %92 = icmp eq i32 %88, %91
  br i1 %92, label %93, label %94

93:                                               ; preds = %80
  br label %96

94:                                               ; preds = %80
  call void @__assert_fail(ptr noundef @.str.3, ptr noundef @.str.1, i32 noundef 31, ptr noundef @__PRETTY_FUNCTION__._Z18arrangeArrayNeuronRSt6vectorIiSaIiEES2_P13GArrayNeuronsi) #7
  unreachable

95:                                               ; No predecessors!
  br label %96

96:                                               ; preds = %95, %93
  %97 = load ptr, ptr %5, align 8, !tbaa !5
  %98 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %97) #6
  %99 = mul i64 4, %98
  %100 = call noalias ptr @malloc(i64 noundef %99) #8
  %101 = load ptr, ptr %7, align 8, !tbaa !5
  %102 = getelementptr inbounds %struct.GArrayNeurons, ptr %101, i32 0, i32 2
  store ptr %100, ptr %102, align 8, !tbaa !16
  %103 = load ptr, ptr %5, align 8, !tbaa !5
  %104 = call ptr @_ZNSt6vectorIiSaIiEE5beginEv(ptr noundef nonnull align 8 dereferenceable(24) %103) #6
  %105 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator", ptr %10, i32 0, i32 0
  store ptr %104, ptr %105, align 8
  %106 = load ptr, ptr %5, align 8, !tbaa !5
  %107 = call ptr @_ZNSt6vectorIiSaIiEE3endEv(ptr noundef nonnull align 8 dereferenceable(24) %106) #6
  %108 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator", ptr %11, i32 0, i32 0
  store ptr %107, ptr %108, align 8
  %109 = load ptr, ptr %7, align 8, !tbaa !5
  %110 = getelementptr inbounds %struct.GArrayNeurons, ptr %109, i32 0, i32 2
  %111 = load ptr, ptr %110, align 8, !tbaa !16
  %112 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator", ptr %10, i32 0, i32 0
  %113 = load ptr, ptr %112, align 8
  %114 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator", ptr %11, i32 0, i32 0
  %115 = load ptr, ptr %114, align 8
  %116 = call noundef ptr @_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEES2_ET0_T_S8_S7_(ptr %113, ptr %115, ptr noundef %111)
  ret void
}

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nounwind allocsize(0)
declare noalias ptr @malloc(i64 noundef) #4

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef ptr @_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEES2_ET0_T_S8_S7_(ptr, ptr, ptr noundef) #5

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }
attributes #7 = { noreturn nounwind }
attributes #8 = { nounwind allocsize(0) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"_ZTS13GArrayNeurons", !6, i64 0, !6, i64 8, !6, i64 16}
!13 = !{!12, !6, i64 8}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = !{!12, !6, i64 16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [29 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [73 x i8], align 1
@__PRETTY_FUNCTION__._Z18arrangeArrayNeuronRSt6vectorIiSaIiEES2_P13GArrayNeuronsi = external hidden unnamed_addr constant [76 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [31 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [42 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIiSaIiEE3endEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIiSaIiEE5beginEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z18arrangeArrayNeuronRSt6vectorIiSaIiEES2_P13GArrayNeuronsi(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr nocapture noundef %2, i32 noundef %3) local_unnamed_addr #1 {
  %5 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #5
  %6 = trunc i64 %5 to i32
  %7 = icmp eq i32 %6, %3
  br i1 %7, label %.preheader, label %17

.preheader:                                       ; preds = %4
  %8 = icmp sgt i32 %3, 0
  %9 = getelementptr inbounds i8, ptr %2, i64 8
  br i1 %8, label %10, label %.preheader.._crit_edge_crit_edge

.preheader.._crit_edge_crit_edge:                 ; preds = %.preheader
  %.pre = load ptr, ptr %9, align 8, !tbaa !5
  br label %._crit_edge

10:                                               ; preds = %.preheader
  %wide.trip.count = zext nneg i32 %3 to i64
  %11 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef 0) #5
  %12 = load i32, ptr %11, align 4, !tbaa !10
  %13 = load ptr, ptr %2, align 8, !tbaa !12
  store i32 %12, ptr %13, align 4, !tbaa !10
  %14 = load ptr, ptr %9, align 8, !tbaa !5
  %15 = load i32, ptr %14, align 4, !tbaa !10
  %16 = add nsw i32 %15, %12
  store i32 %16, ptr %14, align 4, !tbaa !10
  %exitcond.peel.not = icmp eq i32 %3, 1
  br i1 %exitcond.peel.not, label %._crit_edge, label %.peel.next

17:                                               ; preds = %4
  tail call void @__assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 23, ptr noundef nonnull @__PRETTY_FUNCTION__._Z18arrangeArrayNeuronRSt6vectorIiSaIiEES2_P13GArrayNeuronsi) #6
  unreachable

._crit_edge:                                      ; preds = %38, %10, %.preheader.._crit_edge_crit_edge
  %18 = phi ptr [ %.pre, %.preheader.._crit_edge_crit_edge ], [ %14, %10 ], [ %30, %38 ]
  %19 = sext i32 %3 to i64
  %20 = getelementptr i32, ptr %18, i64 %19
  %21 = getelementptr i8, ptr %20, i64 -4
  %22 = load i32, ptr %21, align 4, !tbaa !10
  %23 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #5
  %24 = trunc i64 %23 to i32
  %25 = icmp eq i32 %22, %24
  br i1 %25, label %40, label %39

.peel.next:                                       ; preds = %10, %38
  %indvars.iv = phi i64 [ %indvars.iv.next, %38 ], [ 1, %10 ]
  %26 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv) #5
  %27 = load i32, ptr %26, align 4, !tbaa !10
  %28 = load ptr, ptr %2, align 8, !tbaa !12
  %29 = getelementptr inbounds i32, ptr %28, i64 %indvars.iv
  store i32 %27, ptr %29, align 4, !tbaa !10
  %30 = load ptr, ptr %9, align 8, !tbaa !5
  %31 = getelementptr inbounds i32, ptr %30, i64 %indvars.iv
  %32 = load i32, ptr %31, align 4, !tbaa !10
  %33 = add nsw i32 %32, %27
  store i32 %33, ptr %31, align 4, !tbaa !10
  %34 = getelementptr i8, ptr %31, i64 -4
  %35 = load i32, ptr %34, align 4, !tbaa !10
  %36 = load i32, ptr %29, align 4, !tbaa !10
  %37 = icmp eq i32 %35, %36
  br i1 %37, label %38, label %.loopexit

.loopexit:                                        ; preds = %.peel.next
  tail call void @__assert_fail(ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.1, i32 noundef 28, ptr noundef nonnull @__PRETTY_FUNCTION__._Z18arrangeArrayNeuronRSt6vectorIiSaIiEES2_P13GArrayNeuronsi) #6
  unreachable

38:                                               ; preds = %.peel.next
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %.peel.next, !llvm.loop !13

39:                                               ; preds = %._crit_edge
  tail call void @__assert_fail(ptr noundef nonnull @.str.3, ptr noundef nonnull @.str.1, i32 noundef 31, ptr noundef nonnull @__PRETTY_FUNCTION__._Z18arrangeArrayNeuronRSt6vectorIiSaIiEES2_P13GArrayNeuronsi) #6
  unreachable

40:                                               ; preds = %._crit_edge
  %41 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #5
  %42 = shl i64 %41, 2
  %43 = tail call noalias ptr @malloc(i64 noundef %42) #7
  %44 = getelementptr inbounds i8, ptr %2, i64 16
  store ptr %43, ptr %44, align 8, !tbaa !16
  %45 = tail call ptr @_ZNSt6vectorIiSaIiEE5beginEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #5
  %46 = tail call ptr @_ZNSt6vectorIiSaIiEE3endEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #5
  %47 = load ptr, ptr %44, align 8, !tbaa !16
  %48 = tail call noundef ptr @_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEES2_ET0_T_S8_S7_(ptr %45, ptr %46, ptr noundef %47)
  ret void
}

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nofree nounwind willreturn allockind("alloc,uninitialized") allocsize(0) memory(inaccessiblemem: readwrite)
declare noalias noundef ptr @malloc(i64 noundef) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef ptr @_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEES2_ET0_T_S8_S7_(ptr, ptr, ptr noundef) local_unnamed_addr #4

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nofree nounwind willreturn allockind("alloc,uninitialized") allocsize(0) memory(inaccessiblemem: readwrite) "alloc-family"="malloc" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { noreturn nounwind }
attributes #7 = { nounwind allocsize(0) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"_ZTS13GArrayNeurons", !7, i64 0, !7, i64 8, !7, i64 16}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!6, !7, i64 0}
!13 = distinct !{!13, !14, !15}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{!"llvm.loop.peeled.count", i32 1}
!16 = !{!6, !7, i64 16}


; Effective O3 passes: BDCEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopFullUnrollPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass