; LLVM IR from tangjz/acm-icpc :: lydsy (3596)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [23 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [6 x i8], align 1

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca i32, align 4
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  store i32 0, ptr %1, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #5
  %13 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef %2, ptr noundef %3, ptr noundef %5, ptr noundef %6, ptr noundef %7, ptr noundef %8, ptr noundef %4)
  %14 = load i32, ptr %3, align 4, !tbaa !5
  %15 = load i64, ptr %5, align 8, !tbaa !9
  %16 = load i32, ptr %3, align 4, !tbaa !5
  %17 = sext i32 %16 to i64
  %18 = srem i64 %15, %17
  %19 = trunc i64 %18 to i32
  %20 = load i64, ptr %6, align 8, !tbaa !9
  %21 = load i64, ptr %7, align 8, !tbaa !9
  %22 = load i64, ptr %8, align 8, !tbaa !9
  %23 = call noundef i64 @_Z5solveiixxx(i32 noundef %14, i32 noundef %19, i64 noundef %20, i64 noundef %21, i64 noundef %22)
  store i64 %23, ptr %9, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #5
  store i32 1, ptr %10, align 4, !tbaa !5
  br label %24

24:                                               ; preds = %105, %0
  %25 = load i32, ptr %10, align 4, !tbaa !5
  %26 = load i32, ptr %2, align 4, !tbaa !5
  %27 = icmp slt i32 %25, %26
  br i1 %27, label %29, label %28

28:                                               ; preds = %24
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  br label %108

29:                                               ; preds = %24
  %30 = load i64, ptr %9, align 8, !tbaa !9
  %31 = load i32, ptr %10, align 4, !tbaa !5
  %32 = sext i32 %31 to i64
  %33 = add nsw i64 %30, %32
  %34 = sub nsw i64 %33, 1
  %35 = srem i64 %34, 5
  %36 = load i32, ptr %4, align 4, !tbaa !5
  %37 = sext i32 %36 to i64
  %38 = add nsw i64 %35, %37
  %39 = trunc i64 %38 to i32
  store i32 %39, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #5
  %40 = load i32, ptr %3, align 4, !tbaa !5
  %41 = zext i32 %40 to i64
  %42 = shl i64 1, %41
  %43 = sub nsw i64 %42, 1
  store i64 %43, ptr %11, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #5
  %44 = load i32, ptr %3, align 4, !tbaa !5
  %45 = ashr i32 %44, 1
  %46 = zext i32 %45 to i64
  %47 = shl i64 1, %46
  %48 = sub nsw i64 %47, 1
  store i64 %48, ptr %12, align 8, !tbaa !9
  %49 = load i64, ptr %9, align 8, !tbaa !9
  %50 = load i64, ptr %9, align 8, !tbaa !9
  %51 = add nsw i64 %49, %50
  %52 = load i64, ptr %6, align 8, !tbaa !9
  %53 = add nsw i64 %51, %52
  %54 = load i32, ptr %10, align 4, !tbaa !5
  %55 = sext i32 %54 to i64
  %56 = add nsw i64 %53, %55
  %57 = sub nsw i64 %56, 1
  %58 = load i64, ptr %11, align 8, !tbaa !9
  %59 = and i64 %57, %58
  %60 = add nsw i64 %59, 1
  store i64 %60, ptr %6, align 8, !tbaa !9
  %61 = load i64, ptr %9, align 8, !tbaa !9
  %62 = add nsw i64 %61, 1
  %63 = load i64, ptr %6, align 8, !tbaa !9
  %64 = load i64, ptr %12, align 8, !tbaa !9
  %65 = and i64 %63, %64
  %66 = load i32, ptr %3, align 4, !tbaa !5
  %67 = ashr i32 %66, 1
  %68 = zext i32 %67 to i64
  %69 = shl i64 %65, %68
  %70 = add nsw i64 %62, %69
  %71 = load i64, ptr %11, align 8, !tbaa !9
  %72 = and i64 %70, %71
  %73 = add nsw i64 %72, 1
  store i64 %73, ptr %7, align 8, !tbaa !9
  %74 = load i64, ptr %6, align 8, !tbaa !9
  %75 = load i64, ptr %7, align 8, !tbaa !9
  %76 = icmp sgt i64 %74, %75
  br i1 %76, label %77, label %78

77:                                               ; preds = %29
  call void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) %6, ptr noundef nonnull align 8 dereferenceable(8) %7) #5
  br label %78

78:                                               ; preds = %77, %29
  %79 = load i64, ptr %7, align 8, !tbaa !9
  %80 = load i64, ptr %6, align 8, !tbaa !9
  %81 = sub nsw i64 %79, %80
  %82 = load i64, ptr %8, align 8, !tbaa !9
  %83 = add nsw i64 %81, %82
  %84 = load i32, ptr %10, align 4, !tbaa !5
  %85 = sext i32 %84 to i64
  %86 = add nsw i64 %83, %85
  %87 = sub nsw i64 %86, 1
  %88 = load i64, ptr %11, align 8, !tbaa !9
  %89 = and i64 %87, %88
  store i64 %89, ptr %5, align 8, !tbaa !9
  %90 = load i64, ptr %6, align 8, !tbaa !9
  %91 = load i64, ptr %7, align 8, !tbaa !9
  %92 = add nsw i64 %90, %91
  %93 = load i64, ptr %11, align 8, !tbaa !9
  %94 = and i64 %92, %93
  store i64 %94, ptr %8, align 8, !tbaa !9
  %95 = load i32, ptr %3, align 4, !tbaa !5
  %96 = load i64, ptr %5, align 8, !tbaa !9
  %97 = load i32, ptr %3, align 4, !tbaa !5
  %98 = sext i32 %97 to i64
  %99 = srem i64 %96, %98
  %100 = trunc i64 %99 to i32
  %101 = load i64, ptr %6, align 8, !tbaa !9
  %102 = load i64, ptr %7, align 8, !tbaa !9
  %103 = load i64, ptr %8, align 8, !tbaa !9
  %104 = call noundef i64 @_Z5solveiixxx(i32 noundef %95, i32 noundef %100, i64 noundef %101, i64 noundef %102, i64 noundef %103)
  store i64 %104, ptr %9, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #5
  br label %105

105:                                              ; preds = %78
  %106 = load i32, ptr %10, align 4, !tbaa !5
  %107 = add nsw i32 %106, 1
  store i32 %107, ptr %10, align 4, !tbaa !5
  br label %24, !llvm.loop !11

108:                                              ; preds = %28
  %109 = load i64, ptr %9, align 8, !tbaa !9
  %110 = call i32 (ptr, ...) @printf(ptr noundef @.str.1, i64 noundef %109)
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #5
  ret i32 0
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @__isoc99_scanf(ptr noundef, ...) #2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i64 @_Z5solveiixxx(i32 noundef, i32 noundef, i64 noundef, i64 noundef, i64 noundef) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

declare i32 @printf(ptr noundef, ...) #2

attributes #0 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [23 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [6 x i8], align 1

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() local_unnamed_addr #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %7) #5
  %8 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull %1, ptr noundef nonnull %2, ptr noundef nonnull %4, ptr noundef nonnull %5, ptr noundef nonnull %6, ptr noundef nonnull %7, ptr noundef nonnull %3)
  %9 = load i32, ptr %2, align 4, !tbaa !5
  %10 = load i64, ptr %4, align 8, !tbaa !9
  %11 = sext i32 %9 to i64
  %12 = srem i64 %10, %11
  %13 = trunc nsw i64 %12 to i32
  %14 = load i64, ptr %5, align 8, !tbaa !9
  %15 = load i64, ptr %6, align 8, !tbaa !9
  %16 = load i64, ptr %7, align 8, !tbaa !9
  %17 = call noundef i64 @_Z5solveiixxx(i32 noundef %9, i32 noundef %13, i64 noundef %14, i64 noundef %15, i64 noundef %16)
  %18 = load i32, ptr %1, align 4, !tbaa !5
  %19 = icmp sgt i32 %18, 1
  br i1 %19, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %47, %0
  %.0.lcssa = phi i64 [ %17, %0 ], [ %61, %47 ]
  %20 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1, i64 noundef %.0.lcssa)
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #5
  ret i32 0

.lr.ph:                                           ; preds = %0, %47
  %indvars.iv = phi i64 [ %indvars.iv.next, %47 ], [ 1, %0 ]
  %.018 = phi i64 [ %61, %47 ], [ %17, %0 ]
  %21 = add nsw i64 %indvars.iv, -1
  %22 = add i64 %21, %.018
  %23 = srem i64 %22, 5
  %24 = load i32, ptr %3, align 4, !tbaa !5
  %25 = trunc nsw i64 %23 to i32
  %26 = add i32 %24, %25
  store i32 %26, ptr %2, align 4, !tbaa !5
  %27 = zext nneg i32 %26 to i64
  %notmask = shl nsw i64 -1, %27
  %28 = xor i64 %notmask, -1
  %29 = ashr i32 %26, 1
  %30 = zext nneg i32 %29 to i64
  %notmask16 = shl nsw i64 -1, %30
  %31 = xor i64 %notmask16, -1
  %32 = shl nsw i64 %.018, 1
  %33 = load i64, ptr %5, align 8, !tbaa !9
  %34 = add nuw i64 %indvars.iv, 9223372036854775807
  %35 = add i64 %34, %32
  %36 = add i64 %35, %33
  %37 = and i64 %36, %28
  %38 = add nuw nsw i64 %37, 1
  store i64 %38, ptr %5, align 8, !tbaa !9
  %39 = add nsw i64 %.018, 1
  %40 = and i64 %38, %31
  %41 = shl i64 %40, %30
  %42 = add nsw i64 %39, %41
  %43 = and i64 %42, %28
  %44 = add nuw nsw i64 %43, 1
  store i64 %44, ptr %6, align 8, !tbaa !9
  %45 = icmp ugt i64 %37, %43
  br i1 %45, label %46, label %47

46:                                               ; preds = %.lr.ph
  call void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) %5, ptr noundef nonnull align 8 dereferenceable(8) %6) #5
  %.pre = load i64, ptr %6, align 8, !tbaa !9
  %.pre20 = load i64, ptr %5, align 8, !tbaa !9
  %.pre21 = load i32, ptr %2, align 4, !tbaa !5
  br label %47

47:                                               ; preds = %46, %.lr.ph
  %48 = phi i32 [ %.pre21, %46 ], [ %26, %.lr.ph ]
  %49 = phi i64 [ %.pre20, %46 ], [ %38, %.lr.ph ]
  %50 = phi i64 [ %.pre, %46 ], [ %44, %.lr.ph ]
  %51 = load i64, ptr %7, align 8, !tbaa !9
  %52 = add i64 %34, %50
  %53 = sub i64 %52, %49
  %54 = add i64 %53, %51
  %55 = and i64 %54, %28
  store i64 %55, ptr %4, align 8, !tbaa !9
  %56 = add nsw i64 %49, %50
  %57 = and i64 %56, %28
  store i64 %57, ptr %7, align 8, !tbaa !9
  %58 = sext i32 %48 to i64
  %59 = srem i64 %55, %58
  %60 = trunc nsw i64 %59 to i32
  %61 = call noundef i64 @_Z5solveiixxx(i32 noundef %48, i32 noundef %60, i64 noundef %49, i64 noundef %50, i64 noundef %57)
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %62 = load i32, ptr %1, align 4, !tbaa !5
  %63 = sext i32 %62 to i64
  %64 = icmp slt i64 %indvars.iv.next, %63
  br i1 %64, label %.lr.ph, label %._crit_edge, !llvm.loop !11
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nofree nounwind
declare noundef i32 @__isoc99_scanf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i64 @_Z5solveiixxx(i32 noundef, i32 noundef, i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #4

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

attributes #0 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass