; LLVM IR from tangjz/acm-icpc :: codeforces/gym/100825A.ll (Z3CRTRiS_ii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z5exgcdiiRiS_(i32 noundef, i32 noundef, ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z3CRTRiS_ii(ptr noundef nonnull align 4 dereferenceable(4) %0, ptr noundef nonnull align 4 dereferenceable(4) %1, i32 noundef %2, i32 noundef %3) #0 {
  %5 = alloca i1, align 1
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !9
  store i32 %3, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #2
  %14 = load ptr, ptr %7, align 8, !tbaa !5
  %15 = load i32, ptr %14, align 4, !tbaa !9
  %16 = load i32, ptr %9, align 4, !tbaa !9
  %17 = call noundef i32 @_Z5exgcdiiRiS_(i32 noundef %15, i32 noundef %16, ptr noundef nonnull align 4 dereferenceable(4) %10, ptr noundef nonnull align 4 dereferenceable(4) %11)
  store i32 %17, ptr %12, align 4, !tbaa !9
  %18 = load i32, ptr %8, align 4, !tbaa !9
  %19 = load ptr, ptr %6, align 8, !tbaa !5
  %20 = load i32, ptr %19, align 4, !tbaa !9
  %21 = sub nsw i32 %18, %20
  %22 = load i32, ptr %12, align 4, !tbaa !9
  %23 = srem i32 %21, %22
  %24 = icmp ne i32 %23, 0
  br i1 %24, label %25, label %26

25:                                               ; preds = %4
  store i1 false, ptr %5, align 1
  store i32 1, ptr %13, align 4
  br label %62

26:                                               ; preds = %4
  %27 = load i32, ptr %8, align 4, !tbaa !9
  %28 = load ptr, ptr %6, align 8, !tbaa !5
  %29 = load i32, ptr %28, align 4, !tbaa !9
  %30 = sub nsw i32 %27, %29
  %31 = sext i32 %30 to i64
  %32 = load i32, ptr %10, align 4, !tbaa !9
  %33 = sext i32 %32 to i64
  %34 = mul nsw i64 %31, %33
  %35 = load i32, ptr %9, align 4, !tbaa !9
  %36 = sext i32 %35 to i64
  %37 = srem i64 %34, %36
  %38 = trunc i64 %37 to i32
  store i32 %38, ptr %10, align 4, !tbaa !9
  %39 = load i32, ptr %10, align 4, !tbaa !9
  %40 = icmp slt i32 %39, 0
  br i1 %40, label %41, label %45

41:                                               ; preds = %26
  %42 = load i32, ptr %9, align 4, !tbaa !9
  %43 = load i32, ptr %10, align 4, !tbaa !9
  %44 = add nsw i32 %43, %42
  store i32 %44, ptr %10, align 4, !tbaa !9
  br label %45

45:                                               ; preds = %41, %26
  %46 = load i32, ptr %12, align 4, !tbaa !9
  %47 = load i32, ptr %10, align 4, !tbaa !9
  %48 = sdiv i32 %47, %46
  store i32 %48, ptr %10, align 4, !tbaa !9
  %49 = load ptr, ptr %7, align 8, !tbaa !5
  %50 = load i32, ptr %49, align 4, !tbaa !9
  %51 = load i32, ptr %10, align 4, !tbaa !9
  %52 = mul nsw i32 %50, %51
  %53 = load ptr, ptr %6, align 8, !tbaa !5
  %54 = load i32, ptr %53, align 4, !tbaa !9
  %55 = add nsw i32 %54, %52
  store i32 %55, ptr %53, align 4, !tbaa !9
  %56 = load i32, ptr %9, align 4, !tbaa !9
  %57 = load i32, ptr %12, align 4, !tbaa !9
  %58 = sdiv i32 %56, %57
  %59 = load ptr, ptr %7, align 8, !tbaa !5
  %60 = load i32, ptr %59, align 4, !tbaa !9
  %61 = mul nsw i32 %60, %58
  store i32 %61, ptr %59, align 4, !tbaa !9
  store i1 true, ptr %5, align 1
  store i32 1, ptr %13, align 4
  br label %62

62:                                               ; preds = %45, %25
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  %63 = load i1, ptr %5, align 1
  ret i1 %63
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z5exgcdiiRiS_(i32 noundef, i32 noundef, ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z3CRTRiS_ii(ptr nocapture noundef nonnull align 4 dereferenceable(4) %0, ptr nocapture noundef nonnull align 4 dereferenceable(4) %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #2
  %7 = load i32, ptr %1, align 4, !tbaa !5
  %8 = call noundef i32 @_Z5exgcdiiRiS_(i32 noundef %7, i32 noundef %3, ptr noundef nonnull align 4 dereferenceable(4) %5, ptr noundef nonnull align 4 dereferenceable(4) %6)
  %9 = load i32, ptr %0, align 4, !tbaa !5
  %10 = sub nsw i32 %2, %9
  %11 = srem i32 %10, %8
  %.not = icmp eq i32 %11, 0
  br i1 %.not, label %12, label %29

12:                                               ; preds = %4
  %13 = sext i32 %10 to i64
  %14 = load i32, ptr %5, align 4, !tbaa !5
  %15 = sext i32 %14 to i64
  %16 = mul nsw i64 %15, %13
  %17 = sext i32 %3 to i64
  %18 = srem i64 %16, %17
  %19 = trunc nsw i64 %18 to i32
  %20 = icmp slt i64 %18, 0
  %21 = select i1 %20, i32 %3, i32 0
  %spec.select = add nsw i32 %21, %19
  %22 = sdiv i32 %spec.select, %8
  %23 = load i32, ptr %1, align 4, !tbaa !5
  %24 = mul nsw i32 %23, %22
  %25 = add nsw i32 %24, %9
  store i32 %25, ptr %0, align 4, !tbaa !5
  %26 = sdiv i32 %3, %8
  %27 = load i32, ptr %1, align 4, !tbaa !5
  %28 = mul nsw i32 %27, %26
  store i32 %28, ptr %1, align 4, !tbaa !5
  br label %29

29:                                               ; preds = %4, %12
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #2
  ret i1 %.not
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass