; LLVM IR from intel/intel-ipsec-mb :: lib/x86_64 (ooo_mgr_reset)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.MB_MGR_AES_XCBC_OOO = type { %struct.AES_XCBC_ARGS_x16, [16 x i16], i64, [24 x i8], [16 x %struct.XCBC_LANE_DATA], i64, i64, [48 x i8] }
%struct.AES_XCBC_ARGS_x16 = type { [16 x ptr], [16 x ptr], [16 x %struct.imb_uint128_t], [11 x [16 x %struct.imb_uint128_t]] }
%struct.imb_uint128_t = type { i64, i64 }
%struct.XCBC_LANE_DATA = type { [32 x i8], ptr, i64, [16 x i8] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define hidden void @ooo_mgr_aes_xcbc_reset(ptr noundef %0, i32 noundef %1) #2 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #3
  %7 = load ptr, ptr %3, align 8, !tbaa !5
  store ptr %7, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  %8 = load ptr, ptr %5, align 8, !tbaa !5
  call void @llvm.memset.p0.i64(ptr align 64 %8, i8 0, i64 4424, i1 false)
  %9 = load ptr, ptr %5, align 8, !tbaa !5
  %10 = getelementptr inbounds %struct.MB_MGR_AES_XCBC_OOO, ptr %9, i32 0, i32 1
  %11 = getelementptr inbounds [16 x i16], ptr %10, i64 0, i64 0
  call void @llvm.memset.p0.i64(ptr align 64 %11, i8 -1, i64 32, i1 false)
  store i32 0, ptr %6, align 4, !tbaa !9
  br label %12

12:                                               ; preds = %24, %2
  %13 = load i32, ptr %6, align 4, !tbaa !9
  %14 = load i32, ptr %4, align 4, !tbaa !9
  %15 = icmp ult i32 %13, %14
  br i1 %15, label %16, label %27

16:                                               ; preds = %12
  %17 = load ptr, ptr %5, align 8, !tbaa !5
  %18 = getelementptr inbounds %struct.MB_MGR_AES_XCBC_OOO, ptr %17, i32 0, i32 4
  %19 = load i32, ptr %6, align 4, !tbaa !9
  %20 = zext i32 %19 to i64
  %21 = getelementptr inbounds [16 x %struct.XCBC_LANE_DATA], ptr %18, i64 0, i64 %20
  %22 = getelementptr inbounds %struct.XCBC_LANE_DATA, ptr %21, i32 0, i32 0
  %23 = getelementptr inbounds [32 x i8], ptr %22, i64 0, i64 16
  store i8 -128, ptr %23, align 16, !tbaa !11
  br label %24

24:                                               ; preds = %16
  %25 = load i32, ptr %6, align 4, !tbaa !9
  %26 = add i32 %25, 1
  store i32 %26, ptr %6, align 4, !tbaa !9
  br label %12, !llvm.loop !12

27:                                               ; preds = %12
  %28 = load i32, ptr %4, align 4, !tbaa !9
  %29 = icmp eq i32 %28, 4
  br i1 %29, label %30, label %33

30:                                               ; preds = %27
  %31 = load ptr, ptr %5, align 8, !tbaa !5
  %32 = getelementptr inbounds %struct.MB_MGR_AES_XCBC_OOO, ptr %31, i32 0, i32 2
  store i64 1095267123456, ptr %32, align 32, !tbaa !14
  br label %47

33:                                               ; preds = %27
  %34 = load i32, ptr %4, align 4, !tbaa !9
  %35 = icmp eq i32 %34, 8
  br i1 %35, label %36, label %39

36:                                               ; preds = %33
  %37 = load ptr, ptr %5, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.MB_MGR_AES_XCBC_OOO, ptr %37, i32 0, i32 2
  store i64 66409738768, ptr %38, align 32, !tbaa !14
  br label %46

39:                                               ; preds = %33
  %40 = load i32, ptr %4, align 4, !tbaa !9
  %41 = icmp eq i32 %40, 16
  br i1 %41, label %42, label %45

42:                                               ; preds = %39
  %43 = load ptr, ptr %5, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.MB_MGR_AES_XCBC_OOO, ptr %43, i32 0, i32 2
  store i64 -81985529216486896, ptr %44, align 32, !tbaa !14
  br label %45

45:                                               ; preds = %42, %39
  br label %46

46:                                               ; preds = %45, %36
  br label %47

47:                                               ; preds = %46, %30
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #3
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = !{!15, !17, i64 3360}
!15 = !{!"", !16, i64 0, !7, i64 3328, !17, i64 3360, !7, i64 3392, !17, i64 4416, !17, i64 4424}
!16 = !{!"", !7, i64 0, !7, i64 128, !7, i64 256, !7, i64 512}
!17 = !{!"long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XCBC_LANE_DATA = type { [32 x i8], ptr, i64, [16 x i8] }

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #0

; Function Attrs: nofree norecurse nosync nounwind memory(argmem: write) uwtable
define hidden void @ooo_mgr_aes_xcbc_reset(ptr nocapture noundef writeonly %0, i32 noundef %1) local_unnamed_addr #1 {
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 64 dereferenceable(4424) %0, i8 0, i64 4424, i1 false)
  %3 = getelementptr inbounds i8, ptr %0, i64 3328
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 64 dereferenceable(32) %3, i8 -1, i64 32, i1 false)
  %.not = icmp eq i32 %1, 0
  br i1 %.not, label %._crit_edge.thread, label %.lr.ph

.lr.ph:                                           ; preds = %2
  %4 = getelementptr inbounds i8, ptr %0, i64 3392
  %wide.trip.count = zext i32 %1 to i64
  %xtraiter = and i64 %wide.trip.count, 3
  %5 = icmp ult i32 %1, 4
  br i1 %5, label %._crit_edge.unr-lcssa, label %.lr.ph.new

.lr.ph.new:                                       ; preds = %.lr.ph
  %unroll_iter = and i64 %wide.trip.count, 4294967292
  br label %6

6:                                                ; preds = %6, %.lr.ph.new
  %indvars.iv = phi i64 [ 0, %.lr.ph.new ], [ %indvars.iv.next.3, %6 ]
  %niter = phi i64 [ 0, %.lr.ph.new ], [ %niter.next.3, %6 ]
  %7 = getelementptr inbounds [16 x %struct.XCBC_LANE_DATA], ptr %4, i64 0, i64 %indvars.iv, i32 0, i64 16
  store i8 -128, ptr %7, align 16, !tbaa !5
  %indvars.iv.next = or disjoint i64 %indvars.iv, 1
  %8 = getelementptr inbounds [16 x %struct.XCBC_LANE_DATA], ptr %4, i64 0, i64 %indvars.iv.next, i32 0, i64 16
  store i8 -128, ptr %8, align 16, !tbaa !5
  %indvars.iv.next.1 = or disjoint i64 %indvars.iv, 2
  %9 = getelementptr inbounds [16 x %struct.XCBC_LANE_DATA], ptr %4, i64 0, i64 %indvars.iv.next.1, i32 0, i64 16
  store i8 -128, ptr %9, align 16, !tbaa !5
  %indvars.iv.next.2 = or disjoint i64 %indvars.iv, 3
  %10 = getelementptr inbounds [16 x %struct.XCBC_LANE_DATA], ptr %4, i64 0, i64 %indvars.iv.next.2, i32 0, i64 16
  store i8 -128, ptr %10, align 16, !tbaa !5
  %indvars.iv.next.3 = add nuw nsw i64 %indvars.iv, 4
  %niter.next.3 = add i64 %niter, 4
  %niter.ncmp.3 = icmp eq i64 %niter.next.3, %unroll_iter
  br i1 %niter.ncmp.3, label %._crit_edge.unr-lcssa, label %6, !llvm.loop !8

._crit_edge.unr-lcssa:                            ; preds = %6, %.lr.ph
  %indvars.iv.unr = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next.3, %6 ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge, label %.epil.preheader

.epil.preheader:                                  ; preds = %._crit_edge.unr-lcssa, %.epil.preheader
  %indvars.iv.epil = phi i64 [ %indvars.iv.next.epil, %.epil.preheader ], [ %indvars.iv.unr, %._crit_edge.unr-lcssa ]
  %epil.iter = phi i64 [ %epil.iter.next, %.epil.preheader ], [ 0, %._crit_edge.unr-lcssa ]
  %11 = getelementptr inbounds [16 x %struct.XCBC_LANE_DATA], ptr %4, i64 0, i64 %indvars.iv.epil, i32 0, i64 16
  store i8 -128, ptr %11, align 16, !tbaa !5
  %indvars.iv.next.epil = add nuw nsw i64 %indvars.iv.epil, 1
  %epil.iter.next = add i64 %epil.iter, 1
  %epil.iter.cmp.not = icmp eq i64 %epil.iter.next, %xtraiter
  br i1 %epil.iter.cmp.not, label %._crit_edge, label %.epil.preheader, !llvm.loop !10

._crit_edge:                                      ; preds = %.epil.preheader, %._crit_edge.unr-lcssa
  switch i32 %1, label %._crit_edge.thread [
    i32 4, label %._crit_edge.thread.sink.split
    i32 8, label %12
    i32 16, label %13
  ]

12:                                               ; preds = %._crit_edge
  br label %._crit_edge.thread.sink.split

13:                                               ; preds = %._crit_edge
  br label %._crit_edge.thread.sink.split

._crit_edge.thread.sink.split:                    ; preds = %._crit_edge, %13, %12
  %.sink = phi i64 [ 66409738768, %12 ], [ -81985529216486896, %13 ], [ 1095267123456, %._crit_edge ]
  %14 = getelementptr inbounds i8, ptr %0, i64 3360
  store i64 %.sink, ptr %14, align 32, !tbaa !12
  br label %._crit_edge.thread

._crit_edge.thread:                               ; preds = %._crit_edge.thread.sink.split, %2, %._crit_edge
  ret void
}

attributes #0 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #1 = { nofree norecurse nosync nounwind memory(argmem: write) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.unroll.disable"}
!12 = !{!13, !15, i64 3360}
!13 = !{!"", !14, i64 0, !6, i64 3328, !15, i64 3360, !6, i64 3392, !15, i64 4416, !15, i64 4424}
!14 = !{!"", !6, i64 0, !6, i64 128, !6, i64 256, !6, i64 512}
!15 = !{!"long", !6, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass