; LLVM IR from tangjz/acm-icpc :: lydsy (5225)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Gen = type { i32, i32, i32 }

@t = external dso_local global i32, align 4
@p = external dso_local global i32, align 4
@q = external dso_local global i32, align 4
@ans = external dso_local global i32, align 4
@A = external dso_local global %struct.Gen, align 4
@B = external dso_local global %struct.Gen, align 4
@.str = external hidden unnamed_addr constant [7 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [4 x i8], align 1

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z5solveii(i32 noundef, i32 noundef) #0

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #1 {
  %1 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  %2 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef @t, ptr noundef @p, ptr noundef @q)
  call void @_ZN3Gen4initEv(ptr noundef nonnull align 4 dereferenceable(12) @A)
  call void @_ZN3Gen4initEv(ptr noundef nonnull align 4 dereferenceable(12) @B)
  br label %3

3:                                                ; preds = %7, %0
  %4 = load i32, ptr @t, align 4, !tbaa !5
  %5 = add nsw i32 %4, -1
  store i32 %5, ptr @t, align 4, !tbaa !5
  %6 = icmp ne i32 %4, 0
  br i1 %6, label %7, label %17

7:                                                ; preds = %3
  %8 = load i32, ptr @ans, align 4, !tbaa !5
  %9 = sext i32 %8 to i64
  %10 = load i32, ptr @p, align 4, !tbaa !5
  %11 = load i32, ptr @q, align 4, !tbaa !5
  %12 = call noundef i32 @_Z5solveii(i32 noundef %10, i32 noundef %11)
  %13 = sext i32 %12 to i64
  %14 = mul nsw i64 %9, %13
  %15 = srem i64 %14, 1004535809
  %16 = trunc i64 %15 to i32
  store i32 %16, ptr @ans, align 4, !tbaa !5
  call void @_ZNK3Gen4nextERi(ptr noundef nonnull align 4 dereferenceable(12) @A, ptr noundef nonnull align 4 dereferenceable(4) @p)
  call void @_ZNK3Gen4nextERi(ptr noundef nonnull align 4 dereferenceable(12) @B, ptr noundef nonnull align 4 dereferenceable(4) @q)
  br label %3, !llvm.loop !9

17:                                               ; preds = %3
  %18 = load i32, ptr @ans, align 4, !tbaa !5
  %19 = call i32 (ptr, ...) @printf(ptr noundef @.str.3, i32 noundef %18)
  ret i32 0
}

declare i32 @__isoc99_scanf(ptr noundef, ...) #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN3Gen4initEv(ptr noundef nonnull align 4 dereferenceable(12)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNK3Gen4nextERi(ptr noundef nonnull align 4 dereferenceable(12), ptr noundef nonnull align 4 dereferenceable(4)) #3 align 2

declare i32 @printf(ptr noundef, ...) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Gen = type { i32, i32, i32 }

@t = external dso_local global i32, align 4
@p = external dso_local global i32, align 4
@q = external dso_local global i32, align 4
@ans = external dso_local local_unnamed_addr global i32, align 4
@A = external dso_local global %struct.Gen, align 4
@B = external dso_local global %struct.Gen, align 4
@.str = external hidden unnamed_addr constant [7 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [4 x i8], align 1

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z5solveii(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() local_unnamed_addr #1 {
  %1 = tail call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull @t, ptr noundef nonnull @p, ptr noundef nonnull @q)
  tail call void @_ZN3Gen4initEv(ptr noundef nonnull align 4 dereferenceable(12) @A)
  tail call void @_ZN3Gen4initEv(ptr noundef nonnull align 4 dereferenceable(12) @B)
  %2 = load i32, ptr @t, align 4, !tbaa !5
  %3 = add nsw i32 %2, -1
  store i32 %3, ptr @t, align 4, !tbaa !5
  %.not1 = icmp eq i32 %2, 0
  br i1 %.not1, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %0, %.lr.ph
  %4 = load i32, ptr @ans, align 4, !tbaa !5
  %5 = sext i32 %4 to i64
  %6 = load i32, ptr @p, align 4, !tbaa !5
  %7 = load i32, ptr @q, align 4, !tbaa !5
  %8 = tail call noundef i32 @_Z5solveii(i32 noundef %6, i32 noundef %7)
  %9 = sext i32 %8 to i64
  %10 = mul nsw i64 %9, %5
  %11 = srem i64 %10, 1004535809
  %12 = trunc nsw i64 %11 to i32
  store i32 %12, ptr @ans, align 4, !tbaa !5
  tail call void @_ZNK3Gen4nextERi(ptr noundef nonnull align 4 dereferenceable(12) @A, ptr noundef nonnull align 4 dereferenceable(4) @p)
  tail call void @_ZNK3Gen4nextERi(ptr noundef nonnull align 4 dereferenceable(12) @B, ptr noundef nonnull align 4 dereferenceable(4) @q)
  %13 = load i32, ptr @t, align 4, !tbaa !5
  %14 = add nsw i32 %13, -1
  store i32 %14, ptr @t, align 4, !tbaa !5
  %.not = icmp eq i32 %13, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph, !llvm.loop !9

._crit_edge:                                      ; preds = %.lr.ph, %0
  %15 = load i32, ptr @ans, align 4, !tbaa !5
  %16 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.3, i32 noundef %15)
  ret i32 0
}

; Function Attrs: nofree nounwind
declare noundef i32 @__isoc99_scanf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN3Gen4initEv(ptr noundef nonnull align 4 dereferenceable(12)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNK3Gen4nextERi(ptr noundef nonnull align 4 dereferenceable(12), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #3 align 2

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass