; LLVM IR from tangjz/acm-icpc :: hdu/5692.ll (Z6updateiiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Segment = type { i64, i64 }

@seg = external dso_local global [200020 x %struct.Segment], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z6updateiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #1 {
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  store i32 %0, ptr %6, align 4, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !5
  store i32 %4, ptr %10, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  %16 = load i32, ptr %6, align 4, !tbaa !5
  %17 = load i32, ptr %7, align 4, !tbaa !5
  %18 = call noundef i32 @_Z7seg_idxii(i32 noundef %16, i32 noundef %17)
  store i32 %18, ptr %11, align 4, !tbaa !5
  %19 = load i32, ptr %8, align 4, !tbaa !5
  %20 = load i32, ptr %6, align 4, !tbaa !5
  %21 = icmp sle i32 %19, %20
  br i1 %21, label %22, label %43

22:                                               ; preds = %5
  %23 = load i32, ptr %7, align 4, !tbaa !5
  %24 = load i32, ptr %9, align 4, !tbaa !5
  %25 = icmp sle i32 %23, %24
  br i1 %25, label %26, label %43

26:                                               ; preds = %22
  %27 = load i32, ptr %10, align 4, !tbaa !5
  %28 = sext i32 %27 to i64
  %29 = load i32, ptr %11, align 4, !tbaa !5
  %30 = sext i32 %29 to i64
  %31 = getelementptr inbounds [200020 x %struct.Segment], ptr @seg, i64 0, i64 %30
  %32 = getelementptr inbounds %struct.Segment, ptr %31, i32 0, i32 0
  %33 = load i64, ptr %32, align 16, !tbaa !9
  %34 = add nsw i64 %33, %28
  store i64 %34, ptr %32, align 16, !tbaa !9
  %35 = load i32, ptr %10, align 4, !tbaa !5
  %36 = sext i32 %35 to i64
  %37 = load i32, ptr %11, align 4, !tbaa !5
  %38 = sext i32 %37 to i64
  %39 = getelementptr inbounds [200020 x %struct.Segment], ptr @seg, i64 0, i64 %38
  %40 = getelementptr inbounds %struct.Segment, ptr %39, i32 0, i32 1
  %41 = load i64, ptr %40, align 8, !tbaa !12
  %42 = add nsw i64 %41, %36
  store i64 %42, ptr %40, align 8, !tbaa !12
  store i32 1, ptr %12, align 4
  br label %82

43:                                               ; preds = %22, %5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  %44 = load i32, ptr %6, align 4, !tbaa !5
  %45 = load i32, ptr %7, align 4, !tbaa !5
  %46 = add nsw i32 %44, %45
  %47 = ashr i32 %46, 1
  store i32 %47, ptr %13, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #4
  %48 = load i32, ptr %6, align 4, !tbaa !5
  %49 = load i32, ptr %13, align 4, !tbaa !5
  %50 = call noundef i32 @_Z7seg_idxii(i32 noundef %48, i32 noundef %49)
  store i32 %50, ptr %14, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #4
  %51 = load i32, ptr %13, align 4, !tbaa !5
  %52 = add nsw i32 %51, 1
  %53 = load i32, ptr %7, align 4, !tbaa !5
  %54 = call noundef i32 @_Z7seg_idxii(i32 noundef %52, i32 noundef %53)
  store i32 %54, ptr %15, align 4, !tbaa !5
  %55 = load i32, ptr %11, align 4, !tbaa !5
  %56 = load i32, ptr %14, align 4, !tbaa !5
  %57 = load i32, ptr %15, align 4, !tbaa !5
  call void @_Z5splitiii(i32 noundef %55, i32 noundef %56, i32 noundef %57)
  %58 = load i32, ptr %8, align 4, !tbaa !5
  %59 = load i32, ptr %13, align 4, !tbaa !5
  %60 = icmp sle i32 %58, %59
  br i1 %60, label %61, label %67

61:                                               ; preds = %43
  %62 = load i32, ptr %6, align 4, !tbaa !5
  %63 = load i32, ptr %13, align 4, !tbaa !5
  %64 = load i32, ptr %8, align 4, !tbaa !5
  %65 = load i32, ptr %9, align 4, !tbaa !5
  %66 = load i32, ptr %10, align 4, !tbaa !5
  call void @_Z6updateiiiii(i32 noundef %62, i32 noundef %63, i32 noundef %64, i32 noundef %65, i32 noundef %66)
  br label %67

67:                                               ; preds = %61, %43
  %68 = load i32, ptr %9, align 4, !tbaa !5
  %69 = load i32, ptr %13, align 4, !tbaa !5
  %70 = icmp sgt i32 %68, %69
  br i1 %70, label %71, label %78

71:                                               ; preds = %67
  %72 = load i32, ptr %13, align 4, !tbaa !5
  %73 = add nsw i32 %72, 1
  %74 = load i32, ptr %7, align 4, !tbaa !5
  %75 = load i32, ptr %8, align 4, !tbaa !5
  %76 = load i32, ptr %9, align 4, !tbaa !5
  %77 = load i32, ptr %10, align 4, !tbaa !5
  call void @_Z6updateiiiii(i32 noundef %73, i32 noundef %74, i32 noundef %75, i32 noundef %76, i32 noundef %77)
  br label %78

78:                                               ; preds = %71, %67
  %79 = load i32, ptr %11, align 4, !tbaa !5
  %80 = load i32, ptr %14, align 4, !tbaa !5
  %81 = load i32, ptr %15, align 4, !tbaa !5
  call void @_Z5mergeiii(i32 noundef %79, i32 noundef %80, i32 noundef %81)
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  store i32 0, ptr %12, align 4
  br label %82

82:                                               ; preds = %78, %26
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  %83 = load i32, ptr %12, align 4
  switch i32 %83, label %85 [
    i32 0, label %84
    i32 1, label %84
  ]

84:                                               ; preds = %82, %82
  ret void

85:                                               ; preds = %82
  unreachable
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7seg_idxii(i32 noundef, i32 noundef) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_Z5splitiii(i32 noundef, i32 noundef, i32 noundef) #2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_Z5mergeiii(i32 noundef, i32 noundef, i32 noundef) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"_ZTS7Segment", !11, i64 0, !11, i64 8}
!11 = !{!"long long", !7, i64 0}
!12 = !{!10, !11, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Segment = type { i64, i64 }

@seg = external dso_local local_unnamed_addr global [200020 x %struct.Segment], align 16

; Function Attrs: mustprogress uwtable
define dso_local void @_Z6updateiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #0 {
  %6 = tail call noundef i32 @_Z7seg_idxii(i32 noundef %0, i32 noundef %1)
  %.not = icmp sgt i32 %2, %0
  %.not38 = icmp sgt i32 %1, %3
  %or.cond = or i1 %.not, %.not38
  br i1 %or.cond, label %15, label %7

7:                                                ; preds = %5
  %8 = sext i32 %4 to i64
  %9 = sext i32 %6 to i64
  %10 = getelementptr inbounds [200020 x %struct.Segment], ptr @seg, i64 0, i64 %9
  %11 = load <2 x i64>, ptr %10, align 16, !tbaa !5
  %12 = insertelement <2 x i64> poison, i64 %8, i64 0
  %13 = shufflevector <2 x i64> %12, <2 x i64> poison, <2 x i32> zeroinitializer
  %14 = add nsw <2 x i64> %11, %13
  store <2 x i64> %14, ptr %10, align 16, !tbaa !5
  br label %26

15:                                               ; preds = %5
  %16 = add nsw i32 %1, %0
  %17 = ashr i32 %16, 1
  %18 = tail call noundef i32 @_Z7seg_idxii(i32 noundef %0, i32 noundef %17)
  %19 = add nsw i32 %17, 1
  %20 = tail call noundef i32 @_Z7seg_idxii(i32 noundef %19, i32 noundef %1)
  tail call void @_Z5splitiii(i32 noundef %6, i32 noundef %18, i32 noundef %20)
  %.not39 = icmp slt i32 %17, %2
  br i1 %.not39, label %22, label %21

21:                                               ; preds = %15
  tail call void @_Z6updateiiiii(i32 noundef %0, i32 noundef %17, i32 noundef %2, i32 noundef %3, i32 noundef %4)
  br label %22

22:                                               ; preds = %21, %15
  %23 = icmp slt i32 %17, %3
  br i1 %23, label %24, label %25

24:                                               ; preds = %22
  tail call void @_Z6updateiiiii(i32 noundef %19, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4)
  br label %25

25:                                               ; preds = %24, %22
  tail call void @_Z5mergeiii(i32 noundef %6, i32 noundef %18, i32 noundef %20)
  br label %26

26:                                               ; preds = %25, %7
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7seg_idxii(i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_Z5splitiii(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_Z5mergeiii(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass