; LLVM IR from mitdbg/deneva :: system/pool.ll (ZN10TxnManPool3putEmP10TxnManager)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.mem_alloc = type { i8 }
%class.TxnManPool = type { ptr, ptr }

@mem_allocator = external global %class.mem_alloc, align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN10TxnManPool3putEmP10TxnManager(ptr noundef nonnull align 8 dereferenceable(16) %0, i64 noundef %1, ptr noundef %2) #1 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca i64, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !9
  store ptr %2, ptr %6, align 8, !tbaa !5
  %8 = load ptr, ptr %4, align 8
  %9 = load ptr, ptr %6, align 8, !tbaa !5
  call void @_ZN10TxnManager7releaseEv(ptr noundef nonnull align 8 dereferenceable(544) %9)
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  store i32 0, ptr %7, align 4, !tbaa !11
  br label %10

10:                                               ; preds = %23, %3
  %11 = getelementptr inbounds %class.TxnManPool, ptr %8, i32 0, i32 0
  %12 = load ptr, ptr %11, align 8, !tbaa !13
  %13 = load i64, ptr %5, align 8, !tbaa !9
  %14 = getelementptr inbounds ptr, ptr %12, i64 %13
  %15 = load ptr, ptr %14, align 8, !tbaa !5
  %16 = call noundef zeroext i1 @_ZN5boost8lockfree5queueIP10TxnManagerJEE4pushERKS3_(ptr noundef nonnull align 8 dereferenceable(136) %15, ptr noundef nonnull align 8 dereferenceable(8) %6)
  br i1 %16, label %21, label %17

17:                                               ; preds = %10
  %18 = load i32, ptr %7, align 4, !tbaa !11
  %19 = add nsw i32 %18, 1
  store i32 %19, ptr %7, align 4, !tbaa !11
  %20 = icmp slt i32 %18, 10
  br label %21

21:                                               ; preds = %17, %10
  %22 = phi i1 [ false, %10 ], [ %20, %17 ]
  br i1 %22, label %23, label %24

23:                                               ; preds = %21
  br label %10, !llvm.loop !15

24:                                               ; preds = %21
  %25 = load i32, ptr %7, align 4, !tbaa !11
  %26 = icmp sge i32 %25, 10
  br i1 %26, label %27, label %29

27:                                               ; preds = %24
  %28 = load ptr, ptr %6, align 8, !tbaa !5
  call void @_ZN9mem_alloc4freeEPvm(ptr noundef nonnull align 1 dereferenceable(1) @mem_allocator, ptr noundef %28, i64 noundef 544)
  br label %29

29:                                               ; preds = %27, %24
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @_ZN10TxnManager7releaseEv(ptr noundef nonnull align 8 dereferenceable(544)) #2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZN5boost8lockfree5queueIP10TxnManagerJEE4pushERKS3_(ptr noundef nonnull align 8 dereferenceable(136), ptr noundef nonnull align 8 dereferenceable(8)) #1 align 2

declare void @_ZN9mem_alloc4freeEPvm(ptr noundef nonnull align 1 dereferenceable(1), ptr noundef, i64 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !6, i64 0}
!14 = !{!"_ZTS10TxnManPool", !6, i64 0, !6, i64 8}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.mem_alloc = type { i8 }

@mem_allocator = external global %class.mem_alloc, align 1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN10TxnManPool3putEmP10TxnManager(ptr nocapture noundef nonnull readonly align 8 dereferenceable(16) %0, i64 noundef %1, ptr noundef nonnull %2) local_unnamed_addr #0 align 2 {
  %4 = alloca ptr, align 8
  store ptr %2, ptr %4, align 8, !tbaa !5
  tail call void @_ZN10TxnManager7releaseEv(ptr noundef nonnull align 8 dereferenceable(544) %2)
  %5 = load ptr, ptr %0, align 8, !tbaa !9
  %6 = getelementptr inbounds ptr, ptr %5, i64 %1
  %7 = load ptr, ptr %6, align 8, !tbaa !5
  %8 = call noundef zeroext i1 @_ZN5boost8lockfree5queueIP10TxnManagerJEE4pushERKS3_(ptr noundef nonnull align 8 dereferenceable(136) %7, ptr noundef nonnull align 8 dereferenceable(8) %4)
  br i1 %8, label %.critedge.thread, label %9

9:                                                ; preds = %3
  %10 = load ptr, ptr %0, align 8, !tbaa !9
  %11 = getelementptr inbounds ptr, ptr %10, i64 %1
  %12 = load ptr, ptr %11, align 8, !tbaa !5
  %13 = call noundef zeroext i1 @_ZN5boost8lockfree5queueIP10TxnManagerJEE4pushERKS3_(ptr noundef nonnull align 8 dereferenceable(136) %12, ptr noundef nonnull align 8 dereferenceable(8) %4)
  br i1 %13, label %.critedge.thread, label %14

14:                                               ; preds = %9
  %15 = load ptr, ptr %0, align 8, !tbaa !9
  %16 = getelementptr inbounds ptr, ptr %15, i64 %1
  %17 = load ptr, ptr %16, align 8, !tbaa !5
  %18 = call noundef zeroext i1 @_ZN5boost8lockfree5queueIP10TxnManagerJEE4pushERKS3_(ptr noundef nonnull align 8 dereferenceable(136) %17, ptr noundef nonnull align 8 dereferenceable(8) %4)
  br i1 %18, label %.critedge.thread, label %19

19:                                               ; preds = %14
  %20 = load ptr, ptr %0, align 8, !tbaa !9
  %21 = getelementptr inbounds ptr, ptr %20, i64 %1
  %22 = load ptr, ptr %21, align 8, !tbaa !5
  %23 = call noundef zeroext i1 @_ZN5boost8lockfree5queueIP10TxnManagerJEE4pushERKS3_(ptr noundef nonnull align 8 dereferenceable(136) %22, ptr noundef nonnull align 8 dereferenceable(8) %4)
  br i1 %23, label %.critedge.thread, label %24

24:                                               ; preds = %19
  %25 = load ptr, ptr %0, align 8, !tbaa !9
  %26 = getelementptr inbounds ptr, ptr %25, i64 %1
  %27 = load ptr, ptr %26, align 8, !tbaa !5
  %28 = call noundef zeroext i1 @_ZN5boost8lockfree5queueIP10TxnManagerJEE4pushERKS3_(ptr noundef nonnull align 8 dereferenceable(136) %27, ptr noundef nonnull align 8 dereferenceable(8) %4)
  br i1 %28, label %.critedge.thread, label %29

29:                                               ; preds = %24
  %30 = load ptr, ptr %0, align 8, !tbaa !9
  %31 = getelementptr inbounds ptr, ptr %30, i64 %1
  %32 = load ptr, ptr %31, align 8, !tbaa !5
  %33 = call noundef zeroext i1 @_ZN5boost8lockfree5queueIP10TxnManagerJEE4pushERKS3_(ptr noundef nonnull align 8 dereferenceable(136) %32, ptr noundef nonnull align 8 dereferenceable(8) %4)
  br i1 %33, label %.critedge.thread, label %34

34:                                               ; preds = %29
  %35 = load ptr, ptr %0, align 8, !tbaa !9
  %36 = getelementptr inbounds ptr, ptr %35, i64 %1
  %37 = load ptr, ptr %36, align 8, !tbaa !5
  %38 = call noundef zeroext i1 @_ZN5boost8lockfree5queueIP10TxnManagerJEE4pushERKS3_(ptr noundef nonnull align 8 dereferenceable(136) %37, ptr noundef nonnull align 8 dereferenceable(8) %4)
  br i1 %38, label %.critedge.thread, label %39

39:                                               ; preds = %34
  %40 = load ptr, ptr %0, align 8, !tbaa !9
  %41 = getelementptr inbounds ptr, ptr %40, i64 %1
  %42 = load ptr, ptr %41, align 8, !tbaa !5
  %43 = call noundef zeroext i1 @_ZN5boost8lockfree5queueIP10TxnManagerJEE4pushERKS3_(ptr noundef nonnull align 8 dereferenceable(136) %42, ptr noundef nonnull align 8 dereferenceable(8) %4)
  br i1 %43, label %.critedge.thread, label %44

44:                                               ; preds = %39
  %45 = load ptr, ptr %0, align 8, !tbaa !9
  %46 = getelementptr inbounds ptr, ptr %45, i64 %1
  %47 = load ptr, ptr %46, align 8, !tbaa !5
  %48 = call noundef zeroext i1 @_ZN5boost8lockfree5queueIP10TxnManagerJEE4pushERKS3_(ptr noundef nonnull align 8 dereferenceable(136) %47, ptr noundef nonnull align 8 dereferenceable(8) %4)
  br i1 %48, label %.critedge.thread, label %49

49:                                               ; preds = %44
  %50 = load ptr, ptr %0, align 8, !tbaa !9
  %51 = getelementptr inbounds ptr, ptr %50, i64 %1
  %52 = load ptr, ptr %51, align 8, !tbaa !5
  %53 = call noundef zeroext i1 @_ZN5boost8lockfree5queueIP10TxnManagerJEE4pushERKS3_(ptr noundef nonnull align 8 dereferenceable(136) %52, ptr noundef nonnull align 8 dereferenceable(8) %4)
  br i1 %53, label %.critedge.thread, label %.critedge

.critedge:                                        ; preds = %49
  %54 = load ptr, ptr %0, align 8, !tbaa !9
  %55 = getelementptr inbounds ptr, ptr %54, i64 %1
  %56 = load ptr, ptr %55, align 8, !tbaa !5
  %57 = call noundef zeroext i1 @_ZN5boost8lockfree5queueIP10TxnManagerJEE4pushERKS3_(ptr noundef nonnull align 8 dereferenceable(136) %56, ptr noundef nonnull align 8 dereferenceable(8) %4)
  %58 = load ptr, ptr %4, align 8, !tbaa !5
  call void @_ZN9mem_alloc4freeEPvm(ptr noundef nonnull align 1 dereferenceable(1) @mem_allocator, ptr noundef %58, i64 noundef 544)
  br label %.critedge.thread

.critedge.thread:                                 ; preds = %49, %44, %39, %34, %29, %24, %19, %14, %9, %3, %.critedge
  ret void
}

declare void @_ZN10TxnManager7releaseEv(ptr noundef nonnull align 8 dereferenceable(544)) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZN5boost8lockfree5queueIP10TxnManagerJEE4pushERKS3_(ptr noundef nonnull align 8 dereferenceable(136), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #0 align 2

declare void @_ZN9mem_alloc4freeEPvm(ptr noundef nonnull align 1 dereferenceable(1), ptr noundef, i64 noundef) local_unnamed_addr #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"_ZTS10TxnManPool", !6, i64 0, !6, i64 8}


; Effective O3 passes: ADCEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass