; LLVM IR from thuhcsi/Crystal.TTVS :: TTVS/HeadMovement.ll (ZN7CSTHead12HeadMovement10GetHeadPosENS0_3PADERfS2_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.CSTHead::HeadMovement::PAD" = type { float, float, float }

@__const._ZN7CSTHead12HeadMovement10GetHeadPosENS0_3PADERfS2_.AMP_AVG = external hidden unnamed_addr constant [9 x float], align 16
@__const._ZN7CSTHead12HeadMovement10GetHeadPosENS0_3PADERfS2_.AMP_STD = external hidden unnamed_addr constant [9 x float], align 16
@__const._ZN7CSTHead12HeadMovement10GetHeadPosENS0_3PADERfS2_.POS_AVG = external hidden unnamed_addr constant [9 x float], align 16
@__const._ZN7CSTHead12HeadMovement10GetHeadPosENS0_3PADERfS2_.POS_STD = external hidden unnamed_addr constant [9 x float], align 16
@__const._ZN7CSTHead12HeadMovement10GetHeadPosENS0_3PADERfS2_.AMP_RANGE = external hidden unnamed_addr constant [5 x float], align 16
@__const._ZN7CSTHead12HeadMovement10GetHeadPosENS0_3PADERfS2_.POS_RANGE = external hidden unnamed_addr constant [4 x float], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7CSTHead12HeadMovement10GetHeadPosENS0_3PADERfS2_(<2 x float> %0, float %1, ptr noundef nonnull align 4 dereferenceable(4) %2, ptr noundef nonnull align 4 dereferenceable(4) %3) #2 align 2 {
  %5 = alloca %"struct.CSTHead::HeadMovement::PAD", align 4
  %6 = alloca { <2 x float>, float }, align 4
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca [9 x float], align 16
  %10 = alloca [9 x float], align 16
  %11 = alloca [9 x float], align 16
  %12 = alloca [9 x float], align 16
  %13 = alloca [5 x float], align 16
  %14 = alloca [4 x float], align 16
  %15 = alloca i32, align 4
  %16 = alloca %"struct.CSTHead::HeadMovement::PAD", align 4
  %17 = alloca { <2 x float>, float }, align 4
  %18 = getelementptr inbounds { <2 x float>, float }, ptr %6, i32 0, i32 0
  store <2 x float> %0, ptr %18, align 4
  %19 = getelementptr inbounds { <2 x float>, float }, ptr %6, i32 0, i32 1
  store float %1, ptr %19, align 4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %5, ptr align 4 %6, i64 12, i1 false)
  store ptr %2, ptr %7, align 8, !tbaa !5
  store ptr %3, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 36, ptr %9) #6
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %9, ptr align 16 @__const._ZN7CSTHead12HeadMovement10GetHeadPosENS0_3PADERfS2_.AMP_AVG, i64 36, i1 false)
  call void @llvm.lifetime.start.p0(i64 36, ptr %10) #6
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %10, ptr align 16 @__const._ZN7CSTHead12HeadMovement10GetHeadPosENS0_3PADERfS2_.AMP_STD, i64 36, i1 false)
  call void @llvm.lifetime.start.p0(i64 36, ptr %11) #6
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %11, ptr align 16 @__const._ZN7CSTHead12HeadMovement10GetHeadPosENS0_3PADERfS2_.POS_AVG, i64 36, i1 false)
  call void @llvm.lifetime.start.p0(i64 36, ptr %12) #6
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %12, ptr align 16 @__const._ZN7CSTHead12HeadMovement10GetHeadPosENS0_3PADERfS2_.POS_STD, i64 36, i1 false)
  call void @llvm.lifetime.start.p0(i64 20, ptr %13) #6
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %13, ptr align 16 @__const._ZN7CSTHead12HeadMovement10GetHeadPosENS0_3PADERfS2_.AMP_RANGE, i64 20, i1 false)
  call void @llvm.lifetime.start.p0(i64 16, ptr %14) #6
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %14, ptr align 16 @__const._ZN7CSTHead12HeadMovement10GetHeadPosENS0_3PADERfS2_.POS_RANGE, i64 16, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #6
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %16, ptr align 4 %5, i64 12, i1 false), !tbaa.struct !9
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %17, ptr align 4 %16, i64 12, i1 false)
  %20 = getelementptr inbounds { <2 x float>, float }, ptr %17, i32 0, i32 0
  %21 = load <2 x float>, ptr %20, align 4
  %22 = getelementptr inbounds { <2 x float>, float }, ptr %17, i32 0, i32 1
  %23 = load float, ptr %22, align 4
  %24 = call noundef i32 @_ZN7CSTHead12HeadMovement10GetPADTypeENS0_3PADE(<2 x float> %21, float %23)
  store i32 %24, ptr %15, align 4, !tbaa !12
  %25 = load i32, ptr %15, align 4, !tbaa !12
  %26 = icmp slt i32 %25, 5
  br i1 %26, label %27, label %60

27:                                               ; preds = %4
  %28 = load i32, ptr %15, align 4, !tbaa !12
  %29 = sub nsw i32 %28, 1
  %30 = sext i32 %29 to i64
  %31 = getelementptr inbounds [5 x float], ptr %13, i64 0, i64 %30
  %32 = load float, ptr %31, align 4, !tbaa !10
  %33 = call i32 @rand() #6
  %34 = sitofp i32 %33 to float
  %35 = fmul float %34, 1.000000e+00
  %36 = fdiv float %35, 0x41E0000000000000
  %37 = load i32, ptr %15, align 4, !tbaa !12
  %38 = sext i32 %37 to i64
  %39 = getelementptr inbounds [5 x float], ptr %13, i64 0, i64 %38
  %40 = load float, ptr %39, align 4, !tbaa !10
  %41 = load i32, ptr %15, align 4, !tbaa !12
  %42 = sub nsw i32 %41, 1
  %43 = sext i32 %42 to i64
  %44 = getelementptr inbounds [5 x float], ptr %13, i64 0, i64 %43
  %45 = load float, ptr %44, align 4, !tbaa !10
  %46 = fsub float %40, %45
  %47 = call float @llvm.fmuladd.f32(float %36, float %46, float %32)
  %48 = load ptr, ptr %8, align 8, !tbaa !5
  store float %47, ptr %48, align 4, !tbaa !10
  %49 = load i32, ptr %15, align 4, !tbaa !12
  %50 = sub nsw i32 %49, 1
  %51 = sext i32 %50 to i64
  %52 = getelementptr inbounds [4 x float], ptr %14, i64 0, i64 %51
  %53 = load float, ptr %52, align 4, !tbaa !10
  %54 = call i32 @rand() #6
  %55 = sitofp i32 %54 to float
  %56 = fmul float %55, 1.000000e+00
  %57 = fdiv float %56, 0x41E0000000000000
  %58 = call float @llvm.fmuladd.f32(float %57, float 0x3F50624DE0000000, float %53)
  %59 = load ptr, ptr %7, align 8, !tbaa !5
  store float %58, ptr %59, align 4, !tbaa !10
  br label %63

60:                                               ; preds = %4
  %61 = load ptr, ptr %8, align 8, !tbaa !5
  store float 0x3F916872C0000000, ptr %61, align 4, !tbaa !10
  %62 = load ptr, ptr %7, align 8, !tbaa !5
  store float 0.000000e+00, ptr %62, align 4, !tbaa !10
  br label %63

63:                                               ; preds = %60, %27
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #6
  call void @llvm.lifetime.end.p0(i64 16, ptr %14) #6
  call void @llvm.lifetime.end.p0(i64 20, ptr %13) #6
  call void @llvm.lifetime.end.p0(i64 36, ptr %12) #6
  call void @llvm.lifetime.end.p0(i64 36, ptr %11) #6
  call void @llvm.lifetime.end.p0(i64 36, ptr %10) #6
  call void @llvm.lifetime.end.p0(i64 36, ptr %9) #6
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #3

; Function Attrs: nounwind
declare i32 @rand() #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN7CSTHead12HeadMovement10GetPADTypeENS0_3PADE(<2 x float>, float) #5 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{i64 0, i64 4, !10, i64 4, i64 4, !10, i64 8, i64 4, !10}
!10 = !{!11, !11, i64 0}
!11 = !{!"float", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@__const._ZN7CSTHead12HeadMovement10GetHeadPosENS0_3PADERfS2_.AMP_RANGE = external hidden unnamed_addr constant [5 x float], align 16
@__const._ZN7CSTHead12HeadMovement10GetHeadPosENS0_3PADERfS2_.POS_RANGE = external hidden unnamed_addr constant [4 x float], align 16

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN7CSTHead12HeadMovement10GetHeadPosENS0_3PADERfS2_(<2 x float> %0, float %1, ptr nocapture noundef nonnull writeonly align 4 dereferenceable(4) %2, ptr nocapture noundef nonnull writeonly align 4 dereferenceable(4) %3) local_unnamed_addr #0 align 2 {
  %5 = tail call noundef i32 @_ZN7CSTHead12HeadMovement10GetPADTypeENS0_3PADE(<2 x float> %0, float %1)
  %6 = icmp slt i32 %5, 5
  br i1 %6, label %7, label %26

7:                                                ; preds = %4
  %8 = add nsw i32 %5, -1
  %9 = sext i32 %8 to i64
  %10 = getelementptr inbounds [5 x float], ptr @__const._ZN7CSTHead12HeadMovement10GetHeadPosENS0_3PADERfS2_.AMP_RANGE, i64 0, i64 %9
  %11 = load float, ptr %10, align 4, !tbaa !5
  %12 = tail call i32 @rand() #4
  %13 = sitofp i32 %12 to float
  %14 = fmul float %13, 0x3E00000000000000
  %15 = sext i32 %5 to i64
  %16 = getelementptr inbounds [5 x float], ptr @__const._ZN7CSTHead12HeadMovement10GetHeadPosENS0_3PADERfS2_.AMP_RANGE, i64 0, i64 %15
  %17 = load float, ptr %16, align 4, !tbaa !5
  %18 = fsub float %17, %11
  %19 = tail call float @llvm.fmuladd.f32(float %14, float %18, float %11)
  store float %19, ptr %3, align 4, !tbaa !5
  %20 = getelementptr inbounds [4 x float], ptr @__const._ZN7CSTHead12HeadMovement10GetHeadPosENS0_3PADERfS2_.POS_RANGE, i64 0, i64 %9
  %21 = load float, ptr %20, align 4, !tbaa !5
  %22 = tail call i32 @rand() #4
  %23 = sitofp i32 %22 to float
  %24 = fmul float %23, 0x3E00000000000000
  %25 = tail call float @llvm.fmuladd.f32(float %24, float 0x3F50624DE0000000, float %21)
  br label %27

26:                                               ; preds = %4
  store float 0x3F916872C0000000, ptr %3, align 4, !tbaa !5
  br label %27

27:                                               ; preds = %26, %7
  %storemerge = phi float [ 0.000000e+00, %26 ], [ %25, %7 ]
  store float %storemerge, ptr %2, align 4, !tbaa !5
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #1

; Function Attrs: nounwind
declare i32 @rand() local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN7CSTHead12HeadMovement10GetPADTypeENS0_3PADE(<2 x float>, float) local_unnamed_addr #3 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,TailCallElimPass