; LLVM IR from tangjz/acm-icpc :: lydsy/1438.ll (Z5checkiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z5exgcdiiRiS_(i32 noundef, i32 noundef, ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z5checkiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) #0 {
  %4 = alloca i1, align 1
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i64, align 8
  %13 = alloca i64, align 8
  store i32 %0, ptr %5, align 4, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  %14 = load i32, ptr %6, align 4, !tbaa !5
  %15 = load i32, ptr %7, align 4, !tbaa !5
  %16 = call noundef i32 @_Z5exgcdiiRiS_(i32 noundef %14, i32 noundef %15, ptr noundef nonnull align 4 dereferenceable(4) %8, ptr noundef nonnull align 4 dereferenceable(4) %9)
  store i32 %16, ptr %10, align 4, !tbaa !5
  %17 = load i32, ptr %5, align 4, !tbaa !5
  %18 = load i32, ptr %10, align 4, !tbaa !5
  %19 = srem i32 %17, %18
  %20 = icmp ne i32 %19, 0
  br i1 %20, label %21, label %22

21:                                               ; preds = %3
  store i1 false, ptr %4, align 1
  store i32 1, ptr %11, align 4
  br label %75

22:                                               ; preds = %3
  %23 = load i32, ptr %10, align 4, !tbaa !5
  %24 = load i32, ptr %6, align 4, !tbaa !5
  %25 = sdiv i32 %24, %23
  store i32 %25, ptr %6, align 4, !tbaa !5
  %26 = load i32, ptr %10, align 4, !tbaa !5
  %27 = load i32, ptr %7, align 4, !tbaa !5
  %28 = sdiv i32 %27, %26
  store i32 %28, ptr %7, align 4, !tbaa !5
  %29 = load i32, ptr %10, align 4, !tbaa !5
  %30 = load i32, ptr %5, align 4, !tbaa !5
  %31 = sdiv i32 %30, %29
  store i32 %31, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #2
  %32 = load i32, ptr %8, align 4, !tbaa !5
  %33 = sext i32 %32 to i64
  %34 = load i32, ptr %5, align 4, !tbaa !5
  %35 = sext i32 %34 to i64
  %36 = mul nsw i64 %33, %35
  store i64 %36, ptr %12, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #2
  %37 = load i32, ptr %9, align 4, !tbaa !5
  %38 = sext i32 %37 to i64
  %39 = load i32, ptr %5, align 4, !tbaa !5
  %40 = sext i32 %39 to i64
  %41 = mul nsw i64 %38, %40
  store i64 %41, ptr %13, align 8, !tbaa !9
  %42 = load i64, ptr %12, align 8, !tbaa !9
  %43 = icmp slt i64 %42, 0
  br i1 %43, label %44, label %57

44:                                               ; preds = %22
  %45 = load i64, ptr %13, align 8, !tbaa !9
  %46 = load i32, ptr %6, align 4, !tbaa !5
  %47 = sext i32 %46 to i64
  %48 = sdiv i64 %45, %47
  %49 = load i64, ptr %12, align 8, !tbaa !9
  %50 = sub nsw i64 0, %49
  %51 = sub nsw i64 %50, 1
  %52 = load i32, ptr %7, align 4, !tbaa !5
  %53 = sext i32 %52 to i64
  %54 = sdiv i64 %51, %53
  %55 = add nsw i64 %54, 1
  %56 = icmp sge i64 %48, %55
  store i1 %56, ptr %4, align 1
  store i32 1, ptr %11, align 4
  br label %74

57:                                               ; preds = %22
  %58 = load i64, ptr %13, align 8, !tbaa !9
  %59 = icmp slt i64 %58, 0
  br i1 %59, label %60, label %73

60:                                               ; preds = %57
  %61 = load i64, ptr %12, align 8, !tbaa !9
  %62 = load i32, ptr %7, align 4, !tbaa !5
  %63 = sext i32 %62 to i64
  %64 = sdiv i64 %61, %63
  %65 = load i64, ptr %13, align 8, !tbaa !9
  %66 = sub nsw i64 0, %65
  %67 = sub nsw i64 %66, 1
  %68 = load i32, ptr %6, align 4, !tbaa !5
  %69 = sext i32 %68 to i64
  %70 = sdiv i64 %67, %69
  %71 = add nsw i64 %70, 1
  %72 = icmp sge i64 %64, %71
  store i1 %72, ptr %4, align 1
  store i32 1, ptr %11, align 4
  br label %74

73:                                               ; preds = %57
  store i1 true, ptr %4, align 1
  store i32 1, ptr %11, align 4
  br label %74

74:                                               ; preds = %73, %60, %44
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #2
  br label %75

75:                                               ; preds = %74, %21
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  %76 = load i1, ptr %4, align 1
  ret i1 %76
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z5exgcdiiRiS_(i32 noundef, i32 noundef, ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z5checkiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #2
  %6 = call noundef i32 @_Z5exgcdiiRiS_(i32 noundef %1, i32 noundef %2, ptr noundef nonnull align 4 dereferenceable(4) %4, ptr noundef nonnull align 4 dereferenceable(4) %5)
  %7 = srem i32 %0, %6
  %8 = sdiv i32 %0, %6
  %.not = icmp eq i32 %7, 0
  br i1 %.not, label %9, label %28

9:                                                ; preds = %3
  %10 = sdiv i32 %1, %6
  %11 = sdiv i32 %2, %6
  %12 = load i32, ptr %4, align 4, !tbaa !5
  %13 = sext i32 %12 to i64
  %14 = sext i32 %8 to i64
  %15 = mul nsw i64 %13, %14
  %16 = load i32, ptr %5, align 4, !tbaa !5
  %17 = sext i32 %16 to i64
  %18 = mul nsw i64 %17, %14
  %19 = icmp slt i64 %15, 0
  br i1 %19, label %.sink.split, label %20

20:                                               ; preds = %9
  %21 = icmp slt i64 %18, 0
  br i1 %21, label %.sink.split, label %28

.sink.split:                                      ; preds = %20, %9
  %.sink = phi i32 [ %10, %9 ], [ %11, %20 ]
  %.sink30 = phi i64 [ %18, %9 ], [ %15, %20 ]
  %.sink29 = phi i64 [ %15, %9 ], [ %18, %20 ]
  %.sink28 = phi i32 [ %11, %9 ], [ %10, %20 ]
  %22 = sext i32 %.sink to i64
  %23 = sdiv i64 %.sink30, %22
  %24 = xor i64 %.sink29, -1
  %25 = sext i32 %.sink28 to i64
  %26 = sdiv i64 %24, %25
  %27 = icmp sgt i64 %23, %26
  br label %28

28:                                               ; preds = %.sink.split, %20, %3
  %.1 = phi i1 [ false, %3 ], [ true, %20 ], [ %27, %.sink.split ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #2
  ret i1 %.1
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: DivRemPairsPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass