; LLVM IR from tangjz/acm-icpc :: codeforces/complete/796F.ll (Z7seg_queiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@seg = external dso_local global [600003 x i32], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7seg_idxii(i32 noundef, i32 noundef) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z7seg_queiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #2 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  store i32 %0, ptr %6, align 4, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !5
  %13 = load i32, ptr %8, align 4, !tbaa !5
  %14 = load i32, ptr %6, align 4, !tbaa !5
  %15 = icmp sle i32 %13, %14
  br i1 %15, label %16, label %27

16:                                               ; preds = %4
  %17 = load i32, ptr %7, align 4, !tbaa !5
  %18 = load i32, ptr %9, align 4, !tbaa !5
  %19 = icmp sle i32 %17, %18
  br i1 %19, label %20, label %27

20:                                               ; preds = %16
  %21 = load i32, ptr %6, align 4, !tbaa !5
  %22 = load i32, ptr %7, align 4, !tbaa !5
  %23 = call noundef i32 @_Z7seg_idxii(i32 noundef %21, i32 noundef %22)
  %24 = sext i32 %23 to i64
  %25 = getelementptr inbounds [600003 x i32], ptr @seg, i64 0, i64 %24
  %26 = load i32, ptr %25, align 4, !tbaa !5
  store i32 %26, ptr %5, align 4
  br label %59

27:                                               ; preds = %16, %4
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  %28 = load i32, ptr %6, align 4, !tbaa !5
  %29 = load i32, ptr %7, align 4, !tbaa !5
  %30 = add nsw i32 %28, %29
  %31 = ashr i32 %30, 1
  store i32 %31, ptr %10, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  %32 = load i32, ptr %8, align 4, !tbaa !5
  %33 = load i32, ptr %10, align 4, !tbaa !5
  %34 = icmp sle i32 %32, %33
  br i1 %34, label %35, label %41

35:                                               ; preds = %27
  %36 = load i32, ptr %6, align 4, !tbaa !5
  %37 = load i32, ptr %10, align 4, !tbaa !5
  %38 = load i32, ptr %8, align 4, !tbaa !5
  %39 = load i32, ptr %9, align 4, !tbaa !5
  %40 = call noundef i32 @_Z7seg_queiiii(i32 noundef %36, i32 noundef %37, i32 noundef %38, i32 noundef %39)
  br label %42

41:                                               ; preds = %27
  br label %42

42:                                               ; preds = %41, %35
  %43 = phi i32 [ %40, %35 ], [ 0, %41 ]
  store i32 %43, ptr %11, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %44 = load i32, ptr %9, align 4, !tbaa !5
  %45 = load i32, ptr %10, align 4, !tbaa !5
  %46 = icmp sgt i32 %44, %45
  br i1 %46, label %47, label %54

47:                                               ; preds = %42
  %48 = load i32, ptr %10, align 4, !tbaa !5
  %49 = add nsw i32 %48, 1
  %50 = load i32, ptr %7, align 4, !tbaa !5
  %51 = load i32, ptr %8, align 4, !tbaa !5
  %52 = load i32, ptr %9, align 4, !tbaa !5
  %53 = call noundef i32 @_Z7seg_queiiii(i32 noundef %49, i32 noundef %50, i32 noundef %51, i32 noundef %52)
  br label %55

54:                                               ; preds = %42
  br label %55

55:                                               ; preds = %54, %47
  %56 = phi i32 [ %53, %47 ], [ 0, %54 ]
  store i32 %56, ptr %12, align 4, !tbaa !5
  %57 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %11, ptr noundef nonnull align 4 dereferenceable(4) %12)
  %58 = load i32, ptr %57, align 4, !tbaa !5
  store i32 %58, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  br label %59

59:                                               ; preds = %55, %20
  %60 = load i32, ptr %5, align 4
  ret i32 %60
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@seg = external dso_local local_unnamed_addr global [600003 x i32], align 16

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7seg_idxii(i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z7seg_queiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #2 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %.not = icmp sgt i32 %2, %0
  %.not26 = icmp sgt i32 %1, %3
  %or.cond = or i1 %.not, %.not26
  br i1 %or.cond, label %12, label %7

7:                                                ; preds = %4
  %8 = tail call noundef i32 @_Z7seg_idxii(i32 noundef %0, i32 noundef %1)
  %9 = sext i32 %8 to i64
  %10 = getelementptr inbounds [600003 x i32], ptr @seg, i64 0, i64 %9
  %11 = load i32, ptr %10, align 4, !tbaa !5
  br label %27

12:                                               ; preds = %4
  %13 = add nsw i32 %1, %0
  %14 = ashr i32 %13, 1
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
  %.not27 = icmp slt i32 %14, %2
  br i1 %.not27, label %17, label %15

15:                                               ; preds = %12
  %16 = tail call noundef i32 @_Z7seg_queiiii(i32 noundef %0, i32 noundef %14, i32 noundef %2, i32 noundef %3)
  br label %17

17:                                               ; preds = %12, %15
  %18 = phi i32 [ %16, %15 ], [ 0, %12 ]
  store i32 %18, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
  %19 = icmp slt i32 %14, %3
  br i1 %19, label %20, label %23

20:                                               ; preds = %17
  %21 = add nsw i32 %14, 1
  %22 = tail call noundef i32 @_Z7seg_queiiii(i32 noundef %21, i32 noundef %1, i32 noundef %2, i32 noundef %3)
  br label %23

23:                                               ; preds = %17, %20
  %24 = phi i32 [ %22, %20 ], [ 0, %17 ]
  store i32 %24, ptr %6, align 4, !tbaa !5
  %25 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %5, ptr noundef nonnull align 4 dereferenceable(4) %6)
  %26 = load i32, ptr %25, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
  br label %27

27:                                               ; preds = %23, %7
  %.0 = phi i32 [ %11, %7 ], [ %26, %23 ]
  ret i32 %.0
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass