; LLVM IR from tangjz/acm-icpc :: hdu/6275.ll (Z5solvexxx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z5solvexxx(i64 noundef %0, i64 noundef %1, i64 noundef %2) #0 {
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  %13 = alloca i64, align 8
  %14 = alloca i64, align 8
  %15 = alloca i64, align 8
  %16 = alloca i64, align 8
  store i64 %0, ptr %4, align 8, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !5
  store i64 %2, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  store i64 0, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  %17 = load i64, ptr %4, align 8, !tbaa !5
  %18 = load i64, ptr %6, align 8, !tbaa !5
  %19 = sub nsw i64 %18, 1
  %20 = load i64, ptr %5, align 8, !tbaa !5
  %21 = mul nsw i64 %19, %20
  %22 = add nsw i64 %17, %21
  store i64 %22, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  store i64 1, ptr %9, align 8, !tbaa !5
  br label %23

23:                                               ; preds = %93, %3
  %24 = load i64, ptr %9, align 8, !tbaa !5
  %25 = load i64, ptr %8, align 8, !tbaa !5
  %26 = icmp sle i64 %24, %25
  br i1 %26, label %28, label %27

27:                                               ; preds = %23
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  br label %96

28:                                               ; preds = %23
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  %29 = load i64, ptr %5, align 8, !tbaa !5
  store i64 %29, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  %30 = load i64, ptr %4, align 8, !tbaa !5
  store i64 %30, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #3
  %31 = load i64, ptr %9, align 8, !tbaa !5
  store i64 %31, ptr %12, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #3
  %32 = load i64, ptr %6, align 8, !tbaa !5
  store i64 %32, ptr %13, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #3
  store i64 0, ptr %14, align 8, !tbaa !5
  br label %33

33:                                               ; preds = %57, %28
  %34 = load i64, ptr %13, align 8, !tbaa !5
  %35 = icmp ne i64 %34, 0
  br i1 %35, label %36, label %85

36:                                               ; preds = %33
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #3
  %37 = load i64, ptr %10, align 8, !tbaa !5
  %38 = load i64, ptr %12, align 8, !tbaa !5
  %39 = sdiv i64 %37, %38
  store i64 %39, ptr %15, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #3
  %40 = load i64, ptr %11, align 8, !tbaa !5
  %41 = load i64, ptr %12, align 8, !tbaa !5
  %42 = sdiv i64 %40, %41
  store i64 %42, ptr %16, align 8, !tbaa !5
  %43 = load i64, ptr %13, align 8, !tbaa !5
  %44 = and i64 %43, 2
  %45 = icmp ne i64 %44, 0
  br i1 %45, label %46, label %48

46:                                               ; preds = %36
  %47 = load i64, ptr %15, align 8, !tbaa !5
  br label %49

48:                                               ; preds = %36
  br label %49

49:                                               ; preds = %48, %46
  %50 = phi i64 [ %47, %46 ], [ 0, %48 ]
  %51 = load i64, ptr %13, align 8, !tbaa !5
  %52 = and i64 %51, 1
  %53 = icmp ne i64 %52, 0
  br i1 %53, label %54, label %56

54:                                               ; preds = %49
  %55 = load i64, ptr %16, align 8, !tbaa !5
  br label %57

56:                                               ; preds = %49
  br label %57

57:                                               ; preds = %56, %54
  %58 = phi i64 [ %55, %54 ], [ 0, %56 ]
  %59 = add nsw i64 %50, %58
  %60 = and i64 %59, 1
  %61 = load i64, ptr %14, align 8, !tbaa !5
  %62 = xor i64 %61, %60
  store i64 %62, ptr %14, align 8, !tbaa !5
  %63 = load i64, ptr %15, align 8, !tbaa !5
  %64 = load i64, ptr %12, align 8, !tbaa !5
  %65 = mul nsw i64 %63, %64
  %66 = load i64, ptr %10, align 8, !tbaa !5
  %67 = sub nsw i64 %66, %65
  store i64 %67, ptr %10, align 8, !tbaa !5
  %68 = load i64, ptr %10, align 8, !tbaa !5
  %69 = load i64, ptr %13, align 8, !tbaa !5
  %70 = mul nsw i64 %68, %69
  %71 = load i64, ptr %11, align 8, !tbaa !5
  %72 = add nsw i64 %70, %71
  %73 = load i64, ptr %16, align 8, !tbaa !5
  %74 = load i64, ptr %12, align 8, !tbaa !5
  %75 = mul nsw i64 %73, %74
  %76 = sub nsw i64 %72, %75
  store i64 %76, ptr %11, align 8, !tbaa !5
  %77 = load i64, ptr %11, align 8, !tbaa !5
  %78 = load i64, ptr %12, align 8, !tbaa !5
  %79 = sdiv i64 %77, %78
  store i64 %79, ptr %13, align 8, !tbaa !5
  %80 = load i64, ptr %13, align 8, !tbaa !5
  %81 = load i64, ptr %12, align 8, !tbaa !5
  %82 = mul nsw i64 %80, %81
  %83 = load i64, ptr %11, align 8, !tbaa !5
  %84 = sub nsw i64 %83, %82
  store i64 %84, ptr %11, align 8, !tbaa !5
  call void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) %10, ptr noundef nonnull align 8 dereferenceable(8) %12) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #3
  br label %33, !llvm.loop !9

85:                                               ; preds = %33
  %86 = load i64, ptr %14, align 8, !tbaa !5
  %87 = icmp ne i64 %86, 0
  br i1 %87, label %88, label %92

88:                                               ; preds = %85
  %89 = load i64, ptr %9, align 8, !tbaa !5
  %90 = load i64, ptr %7, align 8, !tbaa !5
  %91 = or i64 %90, %89
  store i64 %91, ptr %7, align 8, !tbaa !5
  br label %92

92:                                               ; preds = %88, %85
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  br label %93

93:                                               ; preds = %92
  %94 = load i64, ptr %9, align 8, !tbaa !5
  %95 = shl i64 %94, 1
  store i64 %95, ptr %9, align 8, !tbaa !5
  br label %23, !llvm.loop !11

96:                                               ; preds = %27
  %97 = load i64, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  ret i64 %97
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z5solvexxx(i64 noundef %0, i64 noundef %1, i64 noundef %2) local_unnamed_addr #0 {
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = add nsw i64 %2, -1
  %7 = mul nsw i64 %6, %1
  %8 = add nsw i64 %7, %0
  %.not40 = icmp slt i64 %8, 1
  %.not3236 = icmp eq i64 %2, 0
  %or.cond = or i1 %.not40, %.not3236
  br i1 %or.cond, label %._crit_edge45, label %.lr.ph

._crit_edge45:                                    ; preds = %._crit_edge, %3
  %.0.lcssa = phi i64 [ 0, %3 ], [ %spec.select, %._crit_edge ]
  ret i64 %.0.lcssa

.lr.ph:                                           ; preds = %3, %._crit_edge
  %.042 = phi i64 [ %spec.select, %._crit_edge ], [ 0, %3 ]
  %.02841 = phi i64 [ %28, %._crit_edge ], [ 1, %3 ]
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
  store i64 %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
  store i64 %.02841, ptr %5, align 8, !tbaa !5
  br label %9

9:                                                ; preds = %.lr.ph, %9
  %.02939 = phi i64 [ 0, %.lr.ph ], [ %20, %9 ]
  %.03038 = phi i64 [ %2, %.lr.ph ], [ %25, %9 ]
  %.03137 = phi i64 [ %0, %.lr.ph ], [ %.recomposed51, %9 ]
  %10 = load i64, ptr %4, align 8, !tbaa !5
  %11 = load i64, ptr %5, align 8, !tbaa !5
  %12 = sdiv i64 %10, %11
  %13 = sdiv i64 %.03137, %11
  %14 = and i64 %.03038, 2
  %.not34 = icmp eq i64 %14, 0
  %15 = select i1 %.not34, i64 0, i64 %12
  %16 = and i64 %.03038, 1
  %.not35 = icmp eq i64 %16, 0
  %17 = select i1 %.not35, i64 0, i64 %13
  %18 = add nsw i64 %17, %15
  %19 = and i64 %18, 1
  %20 = xor i64 %19, %.02939
  %21 = mul nsw i64 %12, %11
  %.recomposed = srem i64 %10, %11
  store i64 %.recomposed, ptr %4, align 8, !tbaa !5
  %22 = mul nsw i64 %.recomposed, %.03038
  %23 = mul nsw i64 %13, %11
  %.recomposed50 = srem i64 %.03137, %11
  %24 = add i64 %.recomposed50, %22
  %25 = sdiv i64 %24, %11
  %26 = mul nsw i64 %25, %11
  %.recomposed51 = srem i64 %24, %11
  call void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) %4, ptr noundef nonnull align 8 dereferenceable(8) %5) #3
  %.not32 = icmp eq i64 %25, 0
  br i1 %.not32, label %._crit_edge, label %9, !llvm.loop !9

._crit_edge:                                      ; preds = %9
  %.not33 = icmp eq i64 %19, %.02939
  %27 = select i1 %.not33, i64 0, i64 %.02841
  %spec.select = or i64 %27, %.042
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
  %28 = shl i64 %.02841, 1
  %.not = icmp sgt i64 %28, %8
  br i1 %.not, label %._crit_edge45, label %.lr.ph, !llvm.loop !11
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: DSEPass,DivRemPairsPass,EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass