; LLVM IR from ubaldot/defrecs :: stm32f4x/ADC_Readings/Drivers/CMSIS/NN/Source/ConvolutionFunctions (opt)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.cmsis_nn_dims = type { i32, i32, i32, i32 }
%struct.cmsis_nn_context = type { ptr, i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @arm_depthwise_conv_s8_opt(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4, ptr noundef %5, ptr noundef %6, ptr noundef %7, ptr noundef %8, ptr noundef %9, ptr noundef %10) #0 {
  %12 = alloca i32, align 4
  %13 = alloca ptr, align 8
  %14 = alloca ptr, align 8
  %15 = alloca ptr, align 8
  %16 = alloca ptr, align 8
  %17 = alloca ptr, align 8
  %18 = alloca ptr, align 8
  %19 = alloca ptr, align 8
  %20 = alloca ptr, align 8
  %21 = alloca ptr, align 8
  %22 = alloca ptr, align 8
  %23 = alloca ptr, align 8
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  %26 = alloca i32, align 4
  store ptr %0, ptr %13, align 8, !tbaa !5
  store ptr %1, ptr %14, align 8, !tbaa !5
  store ptr %2, ptr %15, align 8, !tbaa !5
  store ptr %3, ptr %16, align 8, !tbaa !5
  store ptr %4, ptr %17, align 8, !tbaa !5
  store ptr %5, ptr %18, align 8, !tbaa !5
  store ptr %6, ptr %19, align 8, !tbaa !5
  store ptr %7, ptr %20, align 8, !tbaa !5
  store ptr %8, ptr %21, align 8, !tbaa !5
  store ptr %9, ptr %22, align 8, !tbaa !5
  store ptr %10, ptr %23, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #3
  %27 = load ptr, ptr %16, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.cmsis_nn_dims, ptr %27, i32 0, i32 3
  %29 = load i32, ptr %28, align 4, !tbaa !9
  store i32 %29, ptr %24, align 4, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #3
  %30 = load ptr, ptr %22, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.cmsis_nn_dims, ptr %30, i32 0, i32 3
  %32 = load i32, ptr %31, align 4, !tbaa !9
  store i32 %32, ptr %25, align 4, !tbaa !12
  %33 = load i32, ptr %24, align 4, !tbaa !12
  %34 = load i32, ptr %25, align 4, !tbaa !12
  %35 = icmp ne i32 %33, %34
  br i1 %35, label %36, label %37

36:                                               ; preds = %11
  store i32 -3, ptr %12, align 4
  store i32 1, ptr %26, align 4
  br label %61

37:                                               ; preds = %11
  %38 = load ptr, ptr %13, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.cmsis_nn_context, ptr %38, i32 0, i32 0
  %40 = load ptr, ptr %39, align 8, !tbaa !13
  %41 = icmp eq ptr %40, null
  br i1 %41, label %42, label %48

42:                                               ; preds = %37
  %43 = load ptr, ptr %16, align 8, !tbaa !5
  %44 = load ptr, ptr %18, align 8, !tbaa !5
  %45 = call i32 @arm_depthwise_conv_s8_opt_get_buffer_size(ptr noundef %43, ptr noundef %44)
  %46 = icmp sgt i32 %45, 0
  br i1 %46, label %47, label %48

47:                                               ; preds = %42
  store i32 -1, ptr %12, align 4
  store i32 1, ptr %26, align 4
  br label %61

48:                                               ; preds = %42, %37
  %49 = load ptr, ptr %13, align 8, !tbaa !5
  %50 = load ptr, ptr %14, align 8, !tbaa !5
  %51 = load ptr, ptr %15, align 8, !tbaa !5
  %52 = load ptr, ptr %16, align 8, !tbaa !5
  %53 = load ptr, ptr %17, align 8, !tbaa !5
  %54 = load ptr, ptr %18, align 8, !tbaa !5
  %55 = load ptr, ptr %19, align 8, !tbaa !5
  %56 = load ptr, ptr %20, align 8, !tbaa !5
  %57 = load ptr, ptr %21, align 8, !tbaa !5
  %58 = load ptr, ptr %22, align 8, !tbaa !5
  %59 = load ptr, ptr %23, align 8, !tbaa !5
  %60 = call i32 @arm_depthwise_conv_s8(ptr noundef %49, ptr noundef %50, ptr noundef %51, ptr noundef %52, ptr noundef %53, ptr noundef %54, ptr noundef %55, ptr noundef %56, ptr noundef %57, ptr noundef %58, ptr noundef %59)
  store i32 %60, ptr %12, align 4
  store i32 1, ptr %26, align 4
  br label %61

61:                                               ; preds = %48, %47, %36
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #3
  %62 = load i32, ptr %12, align 4
  ret i32 %62
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @arm_depthwise_conv_s8_opt_get_buffer_size(ptr noundef, ptr noundef) #0

declare i32 @arm_depthwise_conv_s8(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 12}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12}
!11 = !{!"int", !7, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!14, !6, i64 0}
!14 = !{!"", !6, i64 0, !11, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i32 @arm_depthwise_conv_s8_opt(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4, ptr noundef %5, ptr noundef %6, ptr noundef %7, ptr noundef %8, ptr noundef %9, ptr noundef %10) local_unnamed_addr #0 {
  %12 = getelementptr inbounds i8, ptr %3, i64 12
  %13 = load i32, ptr %12, align 4, !tbaa !5
  %14 = getelementptr inbounds i8, ptr %9, i64 12
  %15 = load i32, ptr %14, align 4, !tbaa !5
  %.not = icmp eq i32 %13, %15
  br i1 %.not, label %16, label %24

16:                                               ; preds = %11
  %17 = load ptr, ptr %0, align 8, !tbaa !10
  %18 = icmp eq ptr %17, null
  br i1 %18, label %19, label %22

19:                                               ; preds = %16
  %20 = tail call i32 @arm_depthwise_conv_s8_opt_get_buffer_size(ptr noundef nonnull %3, ptr noundef %5)
  %21 = icmp sgt i32 %20, 0
  br i1 %21, label %24, label %22

22:                                               ; preds = %19, %16
  %23 = tail call i32 @arm_depthwise_conv_s8(ptr noundef nonnull %0, ptr noundef %1, ptr noundef %2, ptr noundef nonnull %3, ptr noundef %4, ptr noundef %5, ptr noundef %6, ptr noundef %7, ptr noundef %8, ptr noundef nonnull %9, ptr noundef %10) #2
  br label %24

24:                                               ; preds = %19, %11, %22
  %.0 = phi i32 [ %23, %22 ], [ -3, %11 ], [ -1, %19 ]
  ret i32 %.0
}

; Function Attrs: nounwind uwtable
declare dso_local i32 @arm_depthwise_conv_s8_opt_get_buffer_size(ptr noundef, ptr noundef) local_unnamed_addr #0

declare i32 @arm_depthwise_conv_s8(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 12}
!6 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"", !12, i64 0, !7, i64 8}
!12 = !{!"any pointer", !8, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass