; LLVM IR from tangjz/acm-icpc :: codeforces/complete/1034D.ll (Z5solvei)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Event = type { i32, i32, i32 }

@n = external dso_local global i32, align 4
@m = external dso_local global i32, align 4
@etot = external dso_local global i32, align 4
@eve = external dso_local global [1200005 x %struct.Event], align 16
@bit = external dso_local global [2 x [300001 x i64]], align 16
@_ZZ5solveiE2dt = external hidden global [300001 x i32], align 16
@.str = external hidden unnamed_addr constant [7 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z7bit_addPxix(ptr noundef, i32 noundef, i64 noundef) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z7bit_sumPxi(ptr noundef, i32 noundef) #2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5solvei(i32 noundef %0) #3 {
  %2 = alloca i32, align 4
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store i32 %0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #5
  store i64 0, ptr %3, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #5
  store i64 0, ptr %4, align 8, !tbaa !9
  %9 = load i32, ptr @n, align 4, !tbaa !5
  %10 = sext i32 %9 to i64
  %11 = mul i64 %10, 4
  call void @llvm.memset.p0.i64(ptr align 4 getelementptr inbounds (i32, ptr @_ZZ5solveiE2dt, i64 1), i8 0, i64 %11, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #5
  store i32 1, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #5
  store i32 1, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  store i32 0, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #5
  store i32 0, ptr %8, align 4, !tbaa !5
  br label %12

12:                                               ; preds = %138, %1
  %13 = load i32, ptr %6, align 4, !tbaa !5
  %14 = load i32, ptr @n, align 4, !tbaa !5
  %15 = icmp sle i32 %13, %14
  br i1 %15, label %17, label %16

16:                                               ; preds = %12
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #5
  br label %141

17:                                               ; preds = %12
  br label %18

18:                                               ; preds = %92, %17
  %19 = load i32, ptr %7, align 4, !tbaa !5
  %20 = load i32, ptr @etot, align 4, !tbaa !5
  %21 = icmp slt i32 %19, %20
  br i1 %21, label %22, label %30

22:                                               ; preds = %18
  %23 = load i32, ptr %7, align 4, !tbaa !5
  %24 = sext i32 %23 to i64
  %25 = getelementptr inbounds [1200005 x %struct.Event], ptr @eve, i64 0, i64 %24
  %26 = getelementptr inbounds %struct.Event, ptr %25, i32 0, i32 1
  %27 = load i32, ptr %26, align 4, !tbaa !11
  %28 = load i32, ptr %6, align 4, !tbaa !5
  %29 = icmp eq i32 %27, %28
  br label %30

30:                                               ; preds = %22, %18
  %31 = phi i1 [ false, %18 ], [ %29, %22 ]
  br i1 %31, label %32, label %95

32:                                               ; preds = %30
  %33 = load i32, ptr %7, align 4, !tbaa !5
  %34 = sext i32 %33 to i64
  %35 = getelementptr inbounds [1200005 x %struct.Event], ptr @eve, i64 0, i64 %34
  %36 = getelementptr inbounds %struct.Event, ptr %35, i32 0, i32 0
  %37 = load i32, ptr %36, align 4, !tbaa !13
  %38 = load i32, ptr %7, align 4, !tbaa !5
  %39 = sext i32 %38 to i64
  %40 = getelementptr inbounds [1200005 x %struct.Event], ptr @eve, i64 0, i64 %39
  %41 = getelementptr inbounds %struct.Event, ptr %40, i32 0, i32 2
  %42 = load i32, ptr %41, align 4, !tbaa !14
  %43 = sext i32 %42 to i64
  call void @_Z7bit_addPxix(ptr noundef @bit, i32 noundef %37, i64 noundef %43)
  %44 = load i32, ptr %7, align 4, !tbaa !5
  %45 = sext i32 %44 to i64
  %46 = getelementptr inbounds [1200005 x %struct.Event], ptr @eve, i64 0, i64 %45
  %47 = getelementptr inbounds %struct.Event, ptr %46, i32 0, i32 0
  %48 = load i32, ptr %47, align 4, !tbaa !13
  %49 = load i32, ptr %7, align 4, !tbaa !5
  %50 = sext i32 %49 to i64
  %51 = getelementptr inbounds [1200005 x %struct.Event], ptr @eve, i64 0, i64 %50
  %52 = getelementptr inbounds %struct.Event, ptr %51, i32 0, i32 0
  %53 = load i32, ptr %52, align 4, !tbaa !13
  %54 = sext i32 %53 to i64
  %55 = load i32, ptr %7, align 4, !tbaa !5
  %56 = sext i32 %55 to i64
  %57 = getelementptr inbounds [1200005 x %struct.Event], ptr @eve, i64 0, i64 %56
  %58 = getelementptr inbounds %struct.Event, ptr %57, i32 0, i32 2
  %59 = load i32, ptr %58, align 4, !tbaa !14
  %60 = sext i32 %59 to i64
  %61 = mul nsw i64 %54, %60
  call void @_Z7bit_addPxix(ptr noundef getelementptr inbounds ([2 x [300001 x i64]], ptr @bit, i64 0, i64 1), i32 noundef %48, i64 noundef %61)
  %62 = load i32, ptr %7, align 4, !tbaa !5
  %63 = sext i32 %62 to i64
  %64 = getelementptr inbounds [1200005 x %struct.Event], ptr @eve, i64 0, i64 %63
  %65 = getelementptr inbounds %struct.Event, ptr %64, i32 0, i32 2
  %66 = load i32, ptr %65, align 4, !tbaa !14
  %67 = load i32, ptr %7, align 4, !tbaa !5
  %68 = sext i32 %67 to i64
  %69 = getelementptr inbounds [1200005 x %struct.Event], ptr @eve, i64 0, i64 %68
  %70 = getelementptr inbounds %struct.Event, ptr %69, i32 0, i32 0
  %71 = load i32, ptr %70, align 4, !tbaa !13
  %72 = sext i32 %71 to i64
  %73 = getelementptr inbounds [300001 x i32], ptr @_ZZ5solveiE2dt, i64 0, i64 %72
  %74 = load i32, ptr %73, align 4, !tbaa !5
  %75 = add nsw i32 %74, %66
  store i32 %75, ptr %73, align 4, !tbaa !5
  %76 = load i32, ptr %5, align 4, !tbaa !5
  %77 = load i32, ptr %7, align 4, !tbaa !5
  %78 = sext i32 %77 to i64
  %79 = getelementptr inbounds [1200005 x %struct.Event], ptr @eve, i64 0, i64 %78
  %80 = getelementptr inbounds %struct.Event, ptr %79, i32 0, i32 0
  %81 = load i32, ptr %80, align 4, !tbaa !13
  %82 = icmp sle i32 %76, %81
  br i1 %82, label %83, label %91

83:                                               ; preds = %32
  %84 = load i32, ptr %7, align 4, !tbaa !5
  %85 = sext i32 %84 to i64
  %86 = getelementptr inbounds [1200005 x %struct.Event], ptr @eve, i64 0, i64 %85
  %87 = getelementptr inbounds %struct.Event, ptr %86, i32 0, i32 2
  %88 = load i32, ptr %87, align 4, !tbaa !14
  %89 = load i32, ptr %8, align 4, !tbaa !5
  %90 = add nsw i32 %89, %88
  store i32 %90, ptr %8, align 4, !tbaa !5
  br label %91

91:                                               ; preds = %83, %32
  br label %92

92:                                               ; preds = %91
  %93 = load i32, ptr %7, align 4, !tbaa !5
  %94 = add nsw i32 %93, 1
  store i32 %94, ptr %7, align 4, !tbaa !5
  br label %18, !llvm.loop !15

95:                                               ; preds = %30
  br label %96

96:                                               ; preds = %113, %95
  %97 = load i32, ptr %5, align 4, !tbaa !5
  %98 = load i32, ptr %6, align 4, !tbaa !5
  %99 = icmp sle i32 %97, %98
  br i1 %99, label %100, label %104

100:                                              ; preds = %96
  %101 = load i32, ptr %8, align 4, !tbaa !5
  %102 = load i32, ptr %2, align 4, !tbaa !5
  %103 = icmp sgt i32 %101, %102
  br label %104

104:                                              ; preds = %100, %96
  %105 = phi i1 [ false, %96 ], [ %103, %100 ]
  br i1 %105, label %106, label %116

106:                                              ; preds = %104
  %107 = load i32, ptr %5, align 4, !tbaa !5
  %108 = sext i32 %107 to i64
  %109 = getelementptr inbounds [300001 x i32], ptr @_ZZ5solveiE2dt, i64 0, i64 %108
  %110 = load i32, ptr %109, align 4, !tbaa !5
  %111 = load i32, ptr %8, align 4, !tbaa !5
  %112 = sub nsw i32 %111, %110
  store i32 %112, ptr %8, align 4, !tbaa !5
  br label %113

113:                                              ; preds = %106
  %114 = load i32, ptr %5, align 4, !tbaa !5
  %115 = add nsw i32 %114, 1
  store i32 %115, ptr %5, align 4, !tbaa !5
  br label %96, !llvm.loop !17

116:                                              ; preds = %104
  %117 = load i32, ptr %5, align 4, !tbaa !5
  %118 = sub nsw i32 %117, 1
  %119 = sext i32 %118 to i64
  %120 = load i64, ptr %3, align 8, !tbaa !9
  %121 = add nsw i64 %120, %119
  store i64 %121, ptr %3, align 8, !tbaa !9
  %122 = load i32, ptr %5, align 4, !tbaa !5
  %123 = sub nsw i32 %122, 1
  %124 = call noundef i64 @_Z7bit_sumPxi(ptr noundef getelementptr inbounds ([2 x [300001 x i64]], ptr @bit, i64 0, i64 1), i32 noundef %123)
  %125 = load i32, ptr %5, align 4, !tbaa !5
  %126 = sub nsw i32 %125, 1
  %127 = sext i32 %126 to i64
  %128 = load i32, ptr %6, align 4, !tbaa !5
  %129 = call noundef i64 @_Z7bit_sumPxi(ptr noundef @bit, i32 noundef %128)
  %130 = load i32, ptr %5, align 4, !tbaa !5
  %131 = sub nsw i32 %130, 1
  %132 = call noundef i64 @_Z7bit_sumPxi(ptr noundef @bit, i32 noundef %131)
  %133 = sub nsw i64 %129, %132
  %134 = mul nsw i64 %127, %133
  %135 = add nsw i64 %124, %134
  %136 = load i64, ptr %4, align 8, !tbaa !9
  %137 = add nsw i64 %136, %135
  store i64 %137, ptr %4, align 8, !tbaa !9
  br label %138

138:                                              ; preds = %116
  %139 = load i32, ptr %6, align 4, !tbaa !5
  %140 = add nsw i32 %139, 1
  store i32 %140, ptr %6, align 4, !tbaa !5
  br label %12, !llvm.loop !18

141:                                              ; preds = %16
  %142 = load i32, ptr @m, align 4, !tbaa !5
  %143 = sext i32 %142 to i64
  %144 = load i64, ptr %3, align 8, !tbaa !9
  %145 = sub nsw i64 %143, %144
  %146 = load i32, ptr %2, align 4, !tbaa !5
  %147 = sext i32 %146 to i64
  %148 = mul nsw i64 %145, %147
  %149 = load i64, ptr %4, align 8, !tbaa !9
  %150 = add nsw i64 %149, %148
  store i64 %150, ptr %4, align 8, !tbaa !9
  %151 = load i64, ptr %4, align 8, !tbaa !9
  %152 = call i32 (ptr, ...) @printf(ptr noundef @.str, i64 noundef %151)
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #5
  ret void
}

declare i32 @printf(ptr noundef, ...) #4

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = !{!12, !6, i64 4}
!12 = !{!"_ZTS5Event", !6, i64 0, !6, i64 4, !6, i64 8}
!13 = !{!12, !6, i64 0}
!14 = !{!12, !6, i64 8}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = distinct !{!17, !16}
!18 = distinct !{!18, !16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Event = type { i32, i32, i32 }

@n = external dso_local local_unnamed_addr global i32, align 4
@m = external dso_local local_unnamed_addr global i32, align 4
@etot = external dso_local local_unnamed_addr global i32, align 4
@eve = external dso_local local_unnamed_addr global [1200005 x %struct.Event], align 16
@bit = external dso_local global [2 x [300001 x i64]], align 16
@_ZZ5solveiE2dt = external hidden local_unnamed_addr global [300001 x i32], align 16
@.str = external hidden unnamed_addr constant [7 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z7bit_addPxix(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z7bit_sumPxi(ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z5solvei(i32 noundef %0) local_unnamed_addr #1 {
  %2 = load i32, ptr @n, align 4, !tbaa !5
  %3 = sext i32 %2 to i64
  %4 = shl nsw i64 %3, 2
  tail call void @llvm.memset.p0.i64(ptr nonnull align 4 getelementptr inbounds (i8, ptr @_ZZ5solveiE2dt, i64 4), i8 0, i64 %4, i1 false)
  %.not54 = icmp slt i32 %2, 1
  br i1 %.not54, label %._crit_edge61, label %.preheader

.preheader:                                       ; preds = %1, %._crit_edge
  %indvars.iv72 = phi i64 [ %indvars.iv.next73, %._crit_edge ], [ 1, %1 ]
  %.060 = phi i32 [ %.3.lcssa, %._crit_edge ], [ 0, %1 ]
  %.03559 = phi i32 [ %.136.lcssa, %._crit_edge ], [ 0, %1 ]
  %.03857 = phi i32 [ %.139.lcssa, %._crit_edge ], [ 1, %1 ]
  %.04056 = phi i64 [ %61, %._crit_edge ], [ 0, %1 ]
  %.04155 = phi i64 [ %53, %._crit_edge ], [ 0, %1 ]
  %5 = load i32, ptr @etot, align 4, !tbaa !5
  %6 = icmp slt i32 %.03559, %5
  br i1 %6, label %.lr.ph.preheader, label %.critedge

.lr.ph.preheader:                                 ; preds = %.preheader
  %7 = sext i32 %.03559 to i64
  br label %.lr.ph

._crit_edge61:                                    ; preds = %._crit_edge, %1
  %.041.lcssa = phi i64 [ 0, %1 ], [ %53, %._crit_edge ]
  %.040.lcssa = phi i64 [ 0, %1 ], [ %61, %._crit_edge ]
  %8 = load i32, ptr @m, align 4, !tbaa !5
  %9 = sext i32 %8 to i64
  %10 = sub nsw i64 %9, %.041.lcssa
  %11 = sext i32 %0 to i64
  %12 = mul nsw i64 %10, %11
  %13 = add nsw i64 %12, %.040.lcssa
  %14 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, i64 noundef %13)
  ret void

.lr.ph:                                           ; preds = %.lr.ph.preheader, %20
  %indvars.iv = phi i64 [ %7, %.lr.ph.preheader ], [ %indvars.iv.next, %20 ]
  %.144 = phi i32 [ %.060, %.lr.ph.preheader ], [ %spec.select, %20 ]
  %15 = getelementptr inbounds [1200005 x %struct.Event], ptr @eve, i64 0, i64 %indvars.iv
  %16 = getelementptr inbounds i8, ptr %15, i64 4
  %17 = load i32, ptr %16, align 4, !tbaa !9
  %18 = zext i32 %17 to i64
  %19 = icmp eq i64 %indvars.iv72, %18
  br i1 %19, label %20, label %.critedge.loopexit

20:                                               ; preds = %.lr.ph
  %21 = load i32, ptr %15, align 4, !tbaa !11
  %22 = getelementptr inbounds i8, ptr %15, i64 8
  %23 = load i32, ptr %22, align 4, !tbaa !12
  %24 = sext i32 %23 to i64
  tail call void @_Z7bit_addPxix(ptr noundef nonnull @bit, i32 noundef %21, i64 noundef %24)
  %25 = load i32, ptr %15, align 4, !tbaa !11
  %26 = sext i32 %25 to i64
  %27 = load i32, ptr %22, align 4, !tbaa !12
  %28 = sext i32 %27 to i64
  %29 = mul nsw i64 %28, %26
  tail call void @_Z7bit_addPxix(ptr noundef nonnull getelementptr inbounds (i8, ptr @bit, i64 2400008), i32 noundef %25, i64 noundef %29)
  %30 = load i32, ptr %22, align 4, !tbaa !12
  %31 = load i32, ptr %15, align 4, !tbaa !11
  %32 = sext i32 %31 to i64
  %33 = getelementptr inbounds [300001 x i32], ptr @_ZZ5solveiE2dt, i64 0, i64 %32
  %34 = load i32, ptr %33, align 4, !tbaa !5
  %35 = add nsw i32 %34, %30
  store i32 %35, ptr %33, align 4, !tbaa !5
  %.not42 = icmp sgt i32 %.03857, %31
  %36 = select i1 %.not42, i32 0, i32 %30
  %spec.select = add nsw i32 %36, %.144
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %37 = load i32, ptr @etot, align 4, !tbaa !5
  %38 = sext i32 %37 to i64
  %39 = icmp slt i64 %indvars.iv.next, %38
  br i1 %39, label %.lr.ph, label %.critedge.loopexit, !llvm.loop !13

.critedge.loopexit:                               ; preds = %20, %.lr.ph
  %.136.lcssa.ph.in = phi i64 [ %indvars.iv, %.lr.ph ], [ %indvars.iv.next, %20 ]
  %.1.lcssa.ph = phi i32 [ %.144, %.lr.ph ], [ %spec.select, %20 ]
  %.136.lcssa.ph = trunc i64 %.136.lcssa.ph.in to i32
  br label %.critedge

.critedge:                                        ; preds = %.critedge.loopexit, %.preheader
  %.136.lcssa = phi i32 [ %.03559, %.preheader ], [ %.136.lcssa.ph, %.critedge.loopexit ]
  %.1.lcssa = phi i32 [ %.060, %.preheader ], [ %.1.lcssa.ph, %.critedge.loopexit ]
  %40 = sext i32 %.03857 to i64
  %41 = icmp sge i64 %indvars.iv72, %40
  %42 = icmp sgt i32 %.1.lcssa, %0
  %43 = select i1 %41, i1 %42, i1 false
  br i1 %43, label %.lr.ph51, label %._crit_edge

.lr.ph51:                                         ; preds = %.critedge, %.lr.ph51
  %indvars.iv68 = phi i64 [ %indvars.iv.next69, %.lr.ph51 ], [ %40, %.critedge ]
  %.350 = phi i32 [ %46, %.lr.ph51 ], [ %.1.lcssa, %.critedge ]
  %44 = getelementptr inbounds [300001 x i32], ptr @_ZZ5solveiE2dt, i64 0, i64 %indvars.iv68
  %45 = load i32, ptr %44, align 4, !tbaa !5
  %46 = sub nsw i32 %.350, %45
  %indvars.iv.next69 = add nsw i64 %indvars.iv68, 1
  %47 = icmp slt i64 %indvars.iv68, %indvars.iv72
  %48 = icmp sgt i32 %46, %0
  %49 = select i1 %47, i1 %48, i1 false
  br i1 %49, label %.lr.ph51, label %._crit_edge.loopexit, !llvm.loop !15

._crit_edge.loopexit:                             ; preds = %.lr.ph51
  %50 = trunc nsw i64 %indvars.iv.next69 to i32
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %.critedge
  %.139.lcssa = phi i32 [ %.03857, %.critedge ], [ %50, %._crit_edge.loopexit ]
  %.3.lcssa = phi i32 [ %.1.lcssa, %.critedge ], [ %46, %._crit_edge.loopexit ]
  %51 = add nsw i32 %.139.lcssa, -1
  %52 = sext i32 %51 to i64
  %53 = add nsw i64 %.04155, %52
  %54 = tail call noundef i64 @_Z7bit_sumPxi(ptr noundef nonnull getelementptr inbounds (i8, ptr @bit, i64 2400008), i32 noundef %51)
  %55 = trunc nuw nsw i64 %indvars.iv72 to i32
  %56 = tail call noundef i64 @_Z7bit_sumPxi(ptr noundef nonnull @bit, i32 noundef %55)
  %57 = tail call noundef i64 @_Z7bit_sumPxi(ptr noundef nonnull @bit, i32 noundef %51)
  %58 = sub nsw i64 %56, %57
  %59 = mul nsw i64 %58, %52
  %60 = add i64 %54, %.04056
  %61 = add i64 %60, %59
  %indvars.iv.next73 = add nuw nsw i64 %indvars.iv72, 1
  %62 = load i32, ptr @n, align 4, !tbaa !5
  %63 = sext i32 %62 to i64
  %.not.not = icmp slt i64 %indvars.iv72, %63
  br i1 %.not.not, label %.preheader, label %._crit_edge61, !llvm.loop !16
}

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

attributes #0 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 4}
!10 = !{!"_ZTS5Event", !6, i64 0, !6, i64 4, !6, i64 8}
!11 = !{!10, !6, i64 0}
!12 = !{!10, !6, i64 8}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass