; LLVM IR from ubaldot/defrecs :: stm32f4x/ADC_Readings/Drivers/CMSIS/DSP/Source/TransformFunctions (f32)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.arm_matrix_instance_f32 = type { i16, i16, ptr }
%struct.arm_mfcc_instance_f32 = type { ptr, ptr, ptr, ptr, ptr, i32, i32, i32, %struct.arm_rfft_fast_instance_f32 }
%struct.arm_rfft_fast_instance_f32 = type { %struct.arm_cfft_instance_f32, i16, ptr }
%struct.arm_cfft_instance_f32 = type { i16, ptr, ptr, i16 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local void @arm_rfft_fast_f32(ptr noundef, ptr noundef, ptr noundef, i8 noundef zeroext) #1

; Function Attrs: nounwind uwtable
define dso_local void @arm_mfcc_f32(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) #1 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca float, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca float, align 4
  %13 = alloca ptr, align 8
  %14 = alloca %struct.arm_matrix_instance_f32, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  store ptr %3, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #3
  %15 = load ptr, ptr %5, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.arm_mfcc_instance_f32, ptr %15, i32 0, i32 1
  %17 = load ptr, ptr %16, align 8, !tbaa !9
  store ptr %17, ptr %13, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 16, ptr %14) #3
  %18 = load ptr, ptr %6, align 8, !tbaa !5
  %19 = load ptr, ptr %5, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.arm_mfcc_instance_f32, ptr %19, i32 0, i32 5
  %21 = load i32, ptr %20, align 8, !tbaa !15
  call void @arm_absmax_f32(ptr noundef %18, i32 noundef %21, ptr noundef %9, ptr noundef %10)
  %22 = load ptr, ptr %6, align 8, !tbaa !5
  %23 = load float, ptr %9, align 4, !tbaa !16
  %24 = fdiv float 1.000000e+00, %23
  %25 = load ptr, ptr %6, align 8, !tbaa !5
  %26 = load ptr, ptr %5, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.arm_mfcc_instance_f32, ptr %26, i32 0, i32 5
  %28 = load i32, ptr %27, align 8, !tbaa !15
  call void @arm_scale_f32(ptr noundef %22, float noundef %24, ptr noundef %25, i32 noundef %28)
  %29 = load ptr, ptr %6, align 8, !tbaa !5
  %30 = load ptr, ptr %5, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.arm_mfcc_instance_f32, ptr %30, i32 0, i32 2
  %32 = load ptr, ptr %31, align 8, !tbaa !18
  %33 = load ptr, ptr %6, align 8, !tbaa !5
  %34 = load ptr, ptr %5, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.arm_mfcc_instance_f32, ptr %34, i32 0, i32 5
  %36 = load i32, ptr %35, align 8, !tbaa !15
  call void @arm_mult_f32(ptr noundef %29, ptr noundef %32, ptr noundef %33, i32 noundef %36)
  %37 = load ptr, ptr %5, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.arm_mfcc_instance_f32, ptr %37, i32 0, i32 8
  %39 = load ptr, ptr %6, align 8, !tbaa !5
  %40 = load ptr, ptr %8, align 8, !tbaa !5
  call void @arm_rfft_fast_f32(ptr noundef %38, ptr noundef %39, ptr noundef %40, i8 noundef zeroext 0)
  %41 = load ptr, ptr %8, align 8, !tbaa !5
  %42 = getelementptr inbounds float, ptr %41, i64 1
  %43 = load float, ptr %42, align 4, !tbaa !16
  %44 = load ptr, ptr %8, align 8, !tbaa !5
  %45 = load ptr, ptr %5, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.arm_mfcc_instance_f32, ptr %45, i32 0, i32 5
  %47 = load i32, ptr %46, align 8, !tbaa !15
  %48 = zext i32 %47 to i64
  %49 = getelementptr inbounds float, ptr %44, i64 %48
  store float %43, ptr %49, align 4, !tbaa !16
  %50 = load ptr, ptr %8, align 8, !tbaa !5
  %51 = load ptr, ptr %5, align 8, !tbaa !5
  %52 = getelementptr inbounds %struct.arm_mfcc_instance_f32, ptr %51, i32 0, i32 5
  %53 = load i32, ptr %52, align 8, !tbaa !15
  %54 = add i32 %53, 1
  %55 = zext i32 %54 to i64
  %56 = getelementptr inbounds float, ptr %50, i64 %55
  store float 0.000000e+00, ptr %56, align 4, !tbaa !16
  %57 = load ptr, ptr %8, align 8, !tbaa !5
  %58 = getelementptr inbounds float, ptr %57, i64 1
  store float 0.000000e+00, ptr %58, align 4, !tbaa !16
  %59 = load ptr, ptr %8, align 8, !tbaa !5
  %60 = load ptr, ptr %6, align 8, !tbaa !5
  %61 = load ptr, ptr %5, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.arm_mfcc_instance_f32, ptr %61, i32 0, i32 5
  %63 = load i32, ptr %62, align 8, !tbaa !15
  call void @arm_cmplx_mag_f32(ptr noundef %59, ptr noundef %60, i32 noundef %63)
  store i32 0, ptr %11, align 4, !tbaa !19
  br label %64

64:                                               ; preds = %104, %4
  %65 = load i32, ptr %11, align 4, !tbaa !19
  %66 = load ptr, ptr %5, align 8, !tbaa !5
  %67 = getelementptr inbounds %struct.arm_mfcc_instance_f32, ptr %66, i32 0, i32 6
  %68 = load i32, ptr %67, align 4, !tbaa !20
  %69 = icmp ult i32 %65, %68
  br i1 %69, label %70, label %107

70:                                               ; preds = %64
  %71 = load ptr, ptr %6, align 8, !tbaa !5
  %72 = load ptr, ptr %5, align 8, !tbaa !5
  %73 = getelementptr inbounds %struct.arm_mfcc_instance_f32, ptr %72, i32 0, i32 3
  %74 = load ptr, ptr %73, align 8, !tbaa !21
  %75 = load i32, ptr %11, align 4, !tbaa !19
  %76 = zext i32 %75 to i64
  %77 = getelementptr inbounds i32, ptr %74, i64 %76
  %78 = load i32, ptr %77, align 4, !tbaa !19
  %79 = zext i32 %78 to i64
  %80 = getelementptr inbounds float, ptr %71, i64 %79
  %81 = load ptr, ptr %13, align 8, !tbaa !5
  %82 = load ptr, ptr %5, align 8, !tbaa !5
  %83 = getelementptr inbounds %struct.arm_mfcc_instance_f32, ptr %82, i32 0, i32 4
  %84 = load ptr, ptr %83, align 8, !tbaa !22
  %85 = load i32, ptr %11, align 4, !tbaa !19
  %86 = zext i32 %85 to i64
  %87 = getelementptr inbounds i32, ptr %84, i64 %86
  %88 = load i32, ptr %87, align 4, !tbaa !19
  call void @arm_dot_prod_f32(ptr noundef %80, ptr noundef %81, i32 noundef %88, ptr noundef %12)
  %89 = load ptr, ptr %5, align 8, !tbaa !5
  %90 = getelementptr inbounds %struct.arm_mfcc_instance_f32, ptr %89, i32 0, i32 4
  %91 = load ptr, ptr %90, align 8, !tbaa !22
  %92 = load i32, ptr %11, align 4, !tbaa !19
  %93 = zext i32 %92 to i64
  %94 = getelementptr inbounds i32, ptr %91, i64 %93
  %95 = load i32, ptr %94, align 4, !tbaa !19
  %96 = load ptr, ptr %13, align 8, !tbaa !5
  %97 = zext i32 %95 to i64
  %98 = getelementptr inbounds float, ptr %96, i64 %97
  store ptr %98, ptr %13, align 8, !tbaa !5
  %99 = load float, ptr %12, align 4, !tbaa !16
  %100 = load ptr, ptr %8, align 8, !tbaa !5
  %101 = load i32, ptr %11, align 4, !tbaa !19
  %102 = zext i32 %101 to i64
  %103 = getelementptr inbounds float, ptr %100, i64 %102
  store float %99, ptr %103, align 4, !tbaa !16
  br label %104

104:                                              ; preds = %70
  %105 = load i32, ptr %11, align 4, !tbaa !19
  %106 = add i32 %105, 1
  store i32 %106, ptr %11, align 4, !tbaa !19
  br label %64, !llvm.loop !23

107:                                              ; preds = %64
  %108 = load ptr, ptr %8, align 8, !tbaa !5
  %109 = load ptr, ptr %8, align 8, !tbaa !5
  %110 = load ptr, ptr %5, align 8, !tbaa !5
  %111 = getelementptr inbounds %struct.arm_mfcc_instance_f32, ptr %110, i32 0, i32 6
  %112 = load i32, ptr %111, align 4, !tbaa !20
  call void @arm_offset_f32(ptr noundef %108, float noundef 0x3EB0C6F7A0000000, ptr noundef %109, i32 noundef %112)
  %113 = load ptr, ptr %8, align 8, !tbaa !5
  %114 = load ptr, ptr %8, align 8, !tbaa !5
  %115 = load ptr, ptr %5, align 8, !tbaa !5
  %116 = getelementptr inbounds %struct.arm_mfcc_instance_f32, ptr %115, i32 0, i32 6
  %117 = load i32, ptr %116, align 4, !tbaa !20
  call void @arm_vlog_f32(ptr noundef %113, ptr noundef %114, i32 noundef %117)
  %118 = load ptr, ptr %5, align 8, !tbaa !5
  %119 = getelementptr inbounds %struct.arm_mfcc_instance_f32, ptr %118, i32 0, i32 7
  %120 = load i32, ptr %119, align 8, !tbaa !25
  %121 = trunc i32 %120 to i16
  %122 = getelementptr inbounds %struct.arm_matrix_instance_f32, ptr %14, i32 0, i32 0
  store i16 %121, ptr %122, align 8, !tbaa !26
  %123 = load ptr, ptr %5, align 8, !tbaa !5
  %124 = getelementptr inbounds %struct.arm_mfcc_instance_f32, ptr %123, i32 0, i32 6
  %125 = load i32, ptr %124, align 4, !tbaa !20
  %126 = trunc i32 %125 to i16
  %127 = getelementptr inbounds %struct.arm_matrix_instance_f32, ptr %14, i32 0, i32 1
  store i16 %126, ptr %127, align 2, !tbaa !28
  %128 = load ptr, ptr %5, align 8, !tbaa !5
  %129 = getelementptr inbounds %struct.arm_mfcc_instance_f32, ptr %128, i32 0, i32 0
  %130 = load ptr, ptr %129, align 8, !tbaa !29
  %131 = getelementptr inbounds %struct.arm_matrix_instance_f32, ptr %14, i32 0, i32 2
  store ptr %130, ptr %131, align 8, !tbaa !30
  %132 = load ptr, ptr %8, align 8, !tbaa !5
  %133 = load ptr, ptr %7, align 8, !tbaa !5
  call void @arm_mat_vec_mult_f32(ptr noundef %14, ptr noundef %132, ptr noundef %133)
  call void @llvm.lifetime.end.p0(i64 16, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  ret void
}

declare void @arm_absmax_f32(ptr noundef, i32 noundef, ptr noundef, ptr noundef) #2

declare void @arm_scale_f32(ptr noundef, float noundef, ptr noundef, i32 noundef) #2

declare void @arm_mult_f32(ptr noundef, ptr noundef, ptr noundef, i32 noundef) #2

declare void @arm_cmplx_mag_f32(ptr noundef, ptr noundef, i32 noundef) #2

declare void @arm_dot_prod_f32(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #2

declare void @arm_offset_f32(ptr noundef, float noundef, ptr noundef, i32 noundef) #2

declare void @arm_vlog_f32(ptr noundef, ptr noundef, i32 noundef) #2

declare void @arm_mat_vec_mult_f32(ptr noundef, ptr noundef, ptr noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 8}
!10 = !{!"", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !11, i64 40, !11, i64 44, !11, i64 48, !12, i64 56}
!11 = !{!"int", !7, i64 0}
!12 = !{!"", !13, i64 0, !14, i64 32, !6, i64 40}
!13 = !{!"", !14, i64 0, !6, i64 8, !6, i64 16, !14, i64 24}
!14 = !{!"short", !7, i64 0}
!15 = !{!10, !11, i64 40}
!16 = !{!17, !17, i64 0}
!17 = !{!"float", !7, i64 0}
!18 = !{!10, !6, i64 16}
!19 = !{!11, !11, i64 0}
!20 = !{!10, !11, i64 44}
!21 = !{!10, !6, i64 24}
!22 = !{!10, !6, i64 32}
!23 = distinct !{!23, !24}
!24 = !{!"llvm.loop.mustprogress"}
!25 = !{!10, !11, i64 48}
!26 = !{!27, !14, i64 0}
!27 = !{!"", !14, i64 0, !14, i64 2, !6, i64 8}
!28 = !{!27, !14, i64 2}
!29 = !{!10, !6, i64 0}
!30 = !{!27, !6, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.arm_matrix_instance_f32 = type { i16, i16, ptr }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local void @arm_rfft_fast_f32(ptr noundef, ptr noundef, ptr noundef, i8 noundef zeroext) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local void @arm_mfcc_f32(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) local_unnamed_addr #1 {
  %5 = alloca float, align 4
  %6 = alloca i32, align 4
  %7 = alloca float, align 4
  %8 = alloca %struct.arm_matrix_instance_f32, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #3
  %9 = getelementptr inbounds i8, ptr %0, i64 8
  %10 = load ptr, ptr %9, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %8) #3
  %11 = getelementptr inbounds i8, ptr %0, i64 40
  %12 = load i32, ptr %11, align 8, !tbaa !14
  call void @arm_absmax_f32(ptr noundef %1, i32 noundef %12, ptr noundef nonnull %5, ptr noundef nonnull %6) #3
  %13 = load float, ptr %5, align 4, !tbaa !15
  %14 = fdiv float 1.000000e+00, %13
  %15 = load i32, ptr %11, align 8, !tbaa !14
  call void @arm_scale_f32(ptr noundef %1, float noundef %14, ptr noundef %1, i32 noundef %15) #3
  %16 = getelementptr inbounds i8, ptr %0, i64 16
  %17 = load ptr, ptr %16, align 8, !tbaa !17
  %18 = load i32, ptr %11, align 8, !tbaa !14
  call void @arm_mult_f32(ptr noundef %1, ptr noundef %17, ptr noundef %1, i32 noundef %18) #3
  %19 = getelementptr inbounds i8, ptr %0, i64 56
  call void @arm_rfft_fast_f32(ptr noundef nonnull %19, ptr noundef %1, ptr noundef %3, i8 noundef zeroext 0)
  %20 = getelementptr inbounds i8, ptr %3, i64 4
  %21 = load float, ptr %20, align 4, !tbaa !15
  %22 = load i32, ptr %11, align 8, !tbaa !14
  %23 = zext i32 %22 to i64
  %24 = getelementptr inbounds float, ptr %3, i64 %23
  store float %21, ptr %24, align 4, !tbaa !15
  %25 = add i32 %22, 1
  %26 = zext i32 %25 to i64
  %27 = getelementptr inbounds float, ptr %3, i64 %26
  store float 0.000000e+00, ptr %27, align 4, !tbaa !15
  store float 0.000000e+00, ptr %20, align 4, !tbaa !15
  call void @arm_cmplx_mag_f32(ptr noundef %3, ptr noundef %1, i32 noundef %22) #3
  %28 = getelementptr inbounds i8, ptr %0, i64 44
  %29 = load i32, ptr %28, align 4, !tbaa !18
  %.not = icmp eq i32 %29, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %4
  %30 = getelementptr inbounds i8, ptr %0, i64 24
  %31 = getelementptr inbounds i8, ptr %0, i64 32
  %.pre = load ptr, ptr %31, align 8, !tbaa !19
  br label %32

32:                                               ; preds = %.lr.ph, %32
  %33 = phi ptr [ %.pre, %.lr.ph ], [ %41, %32 ]
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %32 ]
  %.050 = phi ptr [ %10, %.lr.ph ], [ %45, %32 ]
  %34 = load ptr, ptr %30, align 8, !tbaa !20
  %35 = getelementptr inbounds i32, ptr %34, i64 %indvars.iv
  %36 = load i32, ptr %35, align 4, !tbaa !21
  %37 = zext i32 %36 to i64
  %38 = getelementptr inbounds float, ptr %1, i64 %37
  %39 = getelementptr inbounds i32, ptr %33, i64 %indvars.iv
  %40 = load i32, ptr %39, align 4, !tbaa !21
  call void @arm_dot_prod_f32(ptr noundef %38, ptr noundef %.050, i32 noundef %40, ptr noundef nonnull %7) #3
  %41 = load ptr, ptr %31, align 8, !tbaa !19
  %42 = getelementptr inbounds i32, ptr %41, i64 %indvars.iv
  %43 = load i32, ptr %42, align 4, !tbaa !21
  %44 = zext i32 %43 to i64
  %45 = getelementptr inbounds float, ptr %.050, i64 %44
  %46 = load float, ptr %7, align 4, !tbaa !15
  %47 = getelementptr inbounds float, ptr %3, i64 %indvars.iv
  store float %46, ptr %47, align 4, !tbaa !15
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %48 = load i32, ptr %28, align 4, !tbaa !18
  %49 = zext i32 %48 to i64
  %50 = icmp ult i64 %indvars.iv.next, %49
  br i1 %50, label %32, label %._crit_edge, !llvm.loop !22

._crit_edge:                                      ; preds = %32, %4
  %.lcssa = phi i32 [ 0, %4 ], [ %48, %32 ]
  call void @arm_offset_f32(ptr noundef nonnull %3, float noundef 0x3EB0C6F7A0000000, ptr noundef nonnull %3, i32 noundef %.lcssa) #3
  %51 = load i32, ptr %28, align 4, !tbaa !18
  call void @arm_vlog_f32(ptr noundef nonnull %3, ptr noundef nonnull %3, i32 noundef %51) #3
  %52 = getelementptr inbounds i8, ptr %0, i64 48
  %53 = load i32, ptr %52, align 8, !tbaa !24
  %54 = trunc i32 %53 to i16
  store i16 %54, ptr %8, align 8, !tbaa !25
  %55 = load i32, ptr %28, align 4, !tbaa !18
  %56 = trunc i32 %55 to i16
  %57 = getelementptr inbounds i8, ptr %8, i64 2
  store i16 %56, ptr %57, align 2, !tbaa !27
  %58 = load ptr, ptr %0, align 8, !tbaa !28
  %59 = getelementptr inbounds i8, ptr %8, i64 8
  store ptr %58, ptr %59, align 8, !tbaa !29
  call void @arm_mat_vec_mult_f32(ptr noundef nonnull %8, ptr noundef nonnull %3, ptr noundef %2) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
  ret void
}

declare void @arm_absmax_f32(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2

declare void @arm_scale_f32(ptr noundef, float noundef, ptr noundef, i32 noundef) local_unnamed_addr #2

declare void @arm_mult_f32(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2

declare void @arm_cmplx_mag_f32(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2

declare void @arm_dot_prod_f32(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2

declare void @arm_offset_f32(ptr noundef, float noundef, ptr noundef, i32 noundef) local_unnamed_addr #2

declare void @arm_vlog_f32(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2

declare void @arm_mat_vec_mult_f32(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 32, !10, i64 40, !10, i64 44, !10, i64 48, !11, i64 56}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"", !12, i64 0, !13, i64 32, !7, i64 40}
!12 = !{!"", !13, i64 0, !7, i64 8, !7, i64 16, !13, i64 24}
!13 = !{!"short", !8, i64 0}
!14 = !{!6, !10, i64 40}
!15 = !{!16, !16, i64 0}
!16 = !{!"float", !8, i64 0}
!17 = !{!6, !7, i64 16}
!18 = !{!6, !10, i64 44}
!19 = !{!6, !7, i64 32}
!20 = !{!6, !7, i64 24}
!21 = !{!10, !10, i64 0}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}
!24 = !{!6, !10, i64 48}
!25 = !{!26, !13, i64 0}
!26 = !{!"", !13, i64 0, !13, i64 2, !7, i64 8}
!27 = !{!26, !13, i64 2}
!28 = !{!6, !7, i64 0}
!29 = !{!26, !7, i64 8}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass