; LLVM IR from tangjz/acm-icpc :: hdu (6158)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZL2pi = external hidden global x86_fp80, align 16
@t = external dso_local global i32, align 4
@r1 = external dso_local global i32, align 4
@r2 = external dso_local global i32, align 4
@n = external dso_local global i32, align 4
@ans = external dso_local global x86_fp80, align 16
@.str = external hidden unnamed_addr constant [3 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [7 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [6 x i8], align 1

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca x86_fp80, align 16
  %7 = alloca x86_fp80, align 16
  store i32 0, ptr %1, align 4
  %8 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef @t)
  br label %9

9:                                                ; preds = %76, %0
  %10 = load i32, ptr @t, align 4, !tbaa !5
  %11 = add nsw i32 %10, -1
  store i32 %11, ptr @t, align 4, !tbaa !5
  %12 = icmp ne i32 %10, 0
  br i1 %12, label %13, label %83

13:                                               ; preds = %9
  %14 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str.1, ptr noundef @r1, ptr noundef @r2, ptr noundef @n)
  %15 = load i32, ptr @r1, align 4, !tbaa !5
  %16 = load i32, ptr @r2, align 4, !tbaa !5
  %17 = icmp sgt i32 %15, %16
  br i1 %17, label %18, label %19

18:                                               ; preds = %13
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) @r1, ptr noundef nonnull align 4 dereferenceable(4) @r2) #4
  br label %19

19:                                               ; preds = %18, %13
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #4
  %20 = load i32, ptr @r2, align 4, !tbaa !5
  %21 = load i32, ptr @r1, align 4, !tbaa !5
  %22 = sub nsw i32 %20, %21
  %23 = load i32, ptr @r1, align 4, !tbaa !5
  %24 = mul nsw i32 %22, %23
  %25 = load i32, ptr @r2, align 4, !tbaa !5
  %26 = mul nsw i32 %24, %25
  store i32 %26, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  %27 = load i32, ptr @r1, align 4, !tbaa !5
  %28 = load i32, ptr @r2, align 4, !tbaa !5
  %29 = mul nsw i32 %27, %28
  store i32 %29, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  %30 = load i32, ptr @r2, align 4, !tbaa !5
  %31 = load i32, ptr @r1, align 4, !tbaa !5
  %32 = sub nsw i32 %30, %31
  %33 = load i32, ptr @r2, align 4, !tbaa !5
  %34 = load i32, ptr @r1, align 4, !tbaa !5
  %35 = sub nsw i32 %33, %34
  %36 = mul nsw i32 %32, %35
  store i32 %36, ptr %4, align 4, !tbaa !5
  store x86_fp80 0xK00000000000000000000, ptr @ans, align 16, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  store i32 1, ptr %5, align 4, !tbaa !5
  br label %37

37:                                               ; preds = %73, %19
  %38 = load i32, ptr %5, align 4, !tbaa !5
  %39 = load i32, ptr @n, align 4, !tbaa !5
  %40 = icmp sle i32 %38, %39
  br i1 %40, label %41, label %44

41:                                               ; preds = %37
  %42 = load i32, ptr %5, align 4, !tbaa !5
  %43 = icmp slt i32 %42, 200001
  br label %44

44:                                               ; preds = %41, %37
  %45 = phi i1 [ false, %37 ], [ %43, %41 ]
  br i1 %45, label %47, label %46

46:                                               ; preds = %44
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  br label %76

47:                                               ; preds = %44
  call void @llvm.lifetime.start.p0(i64 16, ptr %6) #4
  %48 = load i32, ptr %2, align 4, !tbaa !5
  %49 = sitofp i32 %48 to x86_fp80
  store x86_fp80 %49, ptr %6, align 16, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 16, ptr %7) #4
  %50 = load i32, ptr %3, align 4, !tbaa !5
  %51 = sext i32 %50 to i64
  %52 = load i32, ptr %5, align 4, !tbaa !5
  %53 = ashr i32 %52, 1
  %54 = sext i32 %53 to i64
  %55 = load i32, ptr %5, align 4, !tbaa !5
  %56 = ashr i32 %55, 1
  %57 = sext i32 %56 to i64
  %58 = mul nsw i64 %54, %57
  %59 = load i32, ptr %4, align 4, !tbaa !5
  %60 = sext i32 %59 to i64
  %61 = mul nsw i64 %58, %60
  %62 = add nsw i64 %51, %61
  %63 = sitofp i64 %62 to x86_fp80
  store x86_fp80 %63, ptr %7, align 16, !tbaa !9
  %64 = load x86_fp80, ptr %6, align 16, !tbaa !9
  %65 = load x86_fp80, ptr %6, align 16, !tbaa !9
  %66 = fmul x86_fp80 %64, %65
  %67 = load x86_fp80, ptr %7, align 16, !tbaa !9
  %68 = load x86_fp80, ptr %7, align 16, !tbaa !9
  %69 = fmul x86_fp80 %67, %68
  %70 = fdiv x86_fp80 %66, %69
  %71 = load x86_fp80, ptr @ans, align 16, !tbaa !9
  %72 = fadd x86_fp80 %71, %70
  store x86_fp80 %72, ptr @ans, align 16, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 16, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr %6) #4
  br label %73

73:                                               ; preds = %47
  %74 = load i32, ptr %5, align 4, !tbaa !5
  %75 = add nsw i32 %74, 1
  store i32 %75, ptr %5, align 4, !tbaa !5
  br label %37, !llvm.loop !11

76:                                               ; preds = %46
  %77 = load x86_fp80, ptr @_ZL2pi, align 16, !tbaa !9
  %78 = load x86_fp80, ptr @ans, align 16, !tbaa !9
  %79 = fmul x86_fp80 %78, %77
  store x86_fp80 %79, ptr @ans, align 16, !tbaa !9
  %80 = load x86_fp80, ptr @ans, align 16, !tbaa !9
  %81 = fptrunc x86_fp80 %80 to double
  %82 = call i32 (ptr, ...) @printf(ptr noundef @.str.2, double noundef %81)
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #4
  br label %9, !llvm.loop !13

83:                                               ; preds = %9
  ret i32 0
}

declare i32 @__isoc99_scanf(ptr noundef, ...) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #3

declare i32 @printf(ptr noundef, ...) #1

attributes #0 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long double", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZL2pi = external hidden local_unnamed_addr global x86_fp80, align 16
@t = external dso_local global i32, align 4
@r1 = external dso_local global i32, align 4
@r2 = external dso_local global i32, align 4
@n = external dso_local global i32, align 4
@ans = external dso_local local_unnamed_addr global x86_fp80, align 16
@.str = external hidden unnamed_addr constant [3 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [7 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [6 x i8], align 1

; Function Attrs: mustprogress norecurse nounwind uwtable
define dso_local noundef i32 @main() local_unnamed_addr #0 {
  %1 = tail call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull @t)
  %2 = load i32, ptr @t, align 4, !tbaa !5
  %3 = add nsw i32 %2, -1
  store i32 %3, ptr @t, align 4, !tbaa !5
  %.not13 = icmp eq i32 %2, 0
  br i1 %.not13, label %._crit_edge16, label %.lr.ph15

.lr.ph15:                                         ; preds = %0, %._crit_edge
  %4 = tail call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str.1, ptr noundef nonnull @r1, ptr noundef nonnull @r2, ptr noundef nonnull @n)
  %5 = load i32, ptr @r1, align 4, !tbaa !5
  %6 = load i32, ptr @r2, align 4, !tbaa !5
  %7 = icmp sgt i32 %5, %6
  br i1 %7, label %8, label %9

8:                                                ; preds = %.lr.ph15
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) @r1, ptr noundef nonnull align 4 dereferenceable(4) @r2) #4
  %.pre = load i32, ptr @r2, align 4, !tbaa !5
  %.pre17 = load i32, ptr @r1, align 4, !tbaa !5
  br label %9

9:                                                ; preds = %8, %.lr.ph15
  %10 = phi i32 [ %.pre17, %8 ], [ %5, %.lr.ph15 ]
  %11 = phi i32 [ %.pre, %8 ], [ %6, %.lr.ph15 ]
  %12 = load i32, ptr @n, align 4, !tbaa !5
  %13 = icmp sgt i32 %12, 0
  br i1 %13, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %9
  %14 = sub nsw i32 %11, %10
  %15 = mul nsw i32 %14, %14
  %16 = mul i32 %10, %11
  %17 = mul i32 %16, %14
  %18 = sitofp i32 %17 to x86_fp80
  %19 = sext i32 %16 to i64
  %20 = zext nneg i32 %15 to i64
  %21 = fmul x86_fp80 %18, %18
  %22 = add nsw i32 %12, -1
  %umin = tail call i32 @llvm.umin.i32(i32 %22, i32 199999)
  %23 = icmp eq i32 %22, 0
  br i1 %23, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph.new

.lr.ph.new:                                       ; preds = %.lr.ph
  %24 = add nuw nsw i32 %umin, 1
  %unroll_iter = and i32 %24, 524286
  br label %42

._crit_edge.loopexit.unr-lcssa:                   ; preds = %42, %.lr.ph
  %.lcssa.ph = phi x86_fp80 [ poison, %.lr.ph ], [ %62, %42 ]
  %.012.unr = phi i32 [ 1, %.lr.ph ], [ %63, %42 ]
  %.unr = phi x86_fp80 [ 0xK00000000000000000000, %.lr.ph ], [ %62, %42 ]
  %25 = and i32 %umin, 1
  %lcmp.mod.not.not = icmp eq i32 %25, 0
  br i1 %lcmp.mod.not.not, label %._crit_edge.loopexit.epilog-lcssa, label %._crit_edge

._crit_edge.loopexit.epilog-lcssa:                ; preds = %._crit_edge.loopexit.unr-lcssa
  %26 = lshr i32 %.012.unr, 1
  %27 = zext nneg i32 %26 to i64
  %28 = mul nuw nsw i64 %27, %20
  %29 = mul i64 %28, %27
  %30 = add nsw i64 %29, %19
  %31 = sitofp i64 %30 to x86_fp80
  %32 = fmul x86_fp80 %31, %31
  %33 = fdiv x86_fp80 %21, %32
  %34 = fadd x86_fp80 %33, %.unr
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit.epilog-lcssa, %._crit_edge.loopexit.unr-lcssa, %9
  %35 = phi x86_fp80 [ 0xK00000000000000000000, %9 ], [ %.lcssa.ph, %._crit_edge.loopexit.unr-lcssa ], [ %34, %._crit_edge.loopexit.epilog-lcssa ]
  %36 = load x86_fp80, ptr @_ZL2pi, align 16, !tbaa !9
  %37 = fmul x86_fp80 %36, %35
  store x86_fp80 %37, ptr @ans, align 16, !tbaa !9
  %38 = fptrunc x86_fp80 %37 to double
  %39 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.2, double noundef %38)
  %40 = load i32, ptr @t, align 4, !tbaa !5
  %41 = add nsw i32 %40, -1
  store i32 %41, ptr @t, align 4, !tbaa !5
  %.not = icmp eq i32 %40, 0
  br i1 %.not, label %._crit_edge16, label %.lr.ph15, !llvm.loop !11

42:                                               ; preds = %42, %.lr.ph.new
  %.012 = phi i32 [ 1, %.lr.ph.new ], [ %63, %42 ]
  %43 = phi x86_fp80 [ 0xK00000000000000000000, %.lr.ph.new ], [ %62, %42 ]
  %niter = phi i32 [ 0, %.lr.ph.new ], [ %niter.next.1, %42 ]
  %44 = lshr i32 %.012, 1
  %45 = zext nneg i32 %44 to i64
  %46 = mul nuw nsw i64 %45, %20
  %47 = mul i64 %46, %45
  %48 = add nsw i64 %47, %19
  %49 = sitofp i64 %48 to x86_fp80
  %50 = fmul x86_fp80 %49, %49
  %51 = fdiv x86_fp80 %21, %50
  %52 = fadd x86_fp80 %51, %43
  %53 = add nuw nsw i32 %.012, 1
  %54 = lshr i32 %53, 1
  %55 = zext nneg i32 %54 to i64
  %56 = mul nuw nsw i64 %55, %20
  %57 = mul i64 %56, %55
  %58 = add nsw i64 %57, %19
  %59 = sitofp i64 %58 to x86_fp80
  %60 = fmul x86_fp80 %59, %59
  %61 = fdiv x86_fp80 %21, %60
  %62 = fadd x86_fp80 %61, %52
  %63 = add nuw nsw i32 %.012, 2
  %niter.next.1 = add i32 %niter, 2
  %niter.ncmp.1 = icmp eq i32 %niter.next.1, %unroll_iter
  br i1 %niter.ncmp.1, label %._crit_edge.loopexit.unr-lcssa, label %42, !llvm.loop !13

._crit_edge16:                                    ; preds = %._crit_edge, %0
  ret i32 0
}

; Function Attrs: nofree nounwind
declare noundef i32 @__isoc99_scanf(ptr nocapture noundef readonly, ...) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #3

attributes #0 = { mustprogress norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long double", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Effective O3 passes: DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass