; LLVM IR from tangjz/acm-icpc :: hdu/5261.ll (Z6updatexii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@ans_L = external dso_local global i32, align 4
@ans_R = external dso_local global i32, align 4
@ans = external dso_local global i64, align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z6updatexii(i64 noundef %0, i32 noundef %1, i32 noundef %2) #0 {
  %4 = alloca i64, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store i64 %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  store i32 %2, ptr %6, align 4, !tbaa !9
  %7 = load i32, ptr %5, align 4, !tbaa !9
  %8 = load i32, ptr %6, align 4, !tbaa !9
  %9 = icmp sgt i32 %7, %8
  br i1 %9, label %10, label %11

10:                                               ; preds = %3
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %5, ptr noundef nonnull align 4 dereferenceable(4) %6) #2
  br label %11

11:                                               ; preds = %10, %3
  %12 = load i64, ptr %4, align 8, !tbaa !5
  %13 = load i64, ptr @ans, align 8, !tbaa !5
  %14 = icmp sgt i64 %12, %13
  br i1 %14, label %31, label %15

15:                                               ; preds = %11
  %16 = load i64, ptr %4, align 8, !tbaa !5
  %17 = load i64, ptr @ans, align 8, !tbaa !5
  %18 = icmp eq i64 %16, %17
  br i1 %18, label %19, label %35

19:                                               ; preds = %15
  %20 = load i32, ptr %5, align 4, !tbaa !9
  %21 = load i32, ptr @ans_L, align 4, !tbaa !9
  %22 = icmp slt i32 %20, %21
  br i1 %22, label %31, label %23

23:                                               ; preds = %19
  %24 = load i32, ptr %5, align 4, !tbaa !9
  %25 = load i32, ptr @ans_L, align 4, !tbaa !9
  %26 = icmp eq i32 %24, %25
  br i1 %26, label %27, label %35

27:                                               ; preds = %23
  %28 = load i32, ptr %6, align 4, !tbaa !9
  %29 = load i32, ptr @ans_R, align 4, !tbaa !9
  %30 = icmp slt i32 %28, %29
  br i1 %30, label %31, label %35

31:                                               ; preds = %27, %19, %11
  %32 = load i64, ptr %4, align 8, !tbaa !5
  store i64 %32, ptr @ans, align 8, !tbaa !5
  %33 = load i32, ptr %5, align 4, !tbaa !9
  store i32 %33, ptr @ans_L, align 4, !tbaa !9
  %34 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %34, ptr @ans_R, align 4, !tbaa !9
  br label %35

35:                                               ; preds = %31, %27, %23, %15
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@ans_L = external dso_local local_unnamed_addr global i32, align 4
@ans_R = external dso_local local_unnamed_addr global i32, align 4
@ans = external dso_local local_unnamed_addr global i64, align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z6updatexii(i64 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store i32 %1, ptr %4, align 4, !tbaa !5
  store i32 %2, ptr %5, align 4, !tbaa !5
  %6 = icmp sgt i32 %1, %2
  br i1 %6, label %7, label %8

7:                                                ; preds = %3
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %4, ptr noundef nonnull align 4 dereferenceable(4) %5) #2
  br label %8

8:                                                ; preds = %7, %3
  %9 = load i64, ptr @ans, align 8, !tbaa !9
  %10 = icmp slt i64 %9, %0
  br i1 %10, label %._crit_edge, label %11

._crit_edge:                                      ; preds = %8
  %.pre = load i32, ptr %4, align 4, !tbaa !5
  br label %23

11:                                               ; preds = %8
  %12 = icmp eq i64 %9, %0
  br i1 %12, label %13, label %26

13:                                               ; preds = %11
  %14 = load i32, ptr %4, align 4, !tbaa !5
  %15 = load i32, ptr @ans_L, align 4, !tbaa !5
  %16 = icmp slt i32 %14, %15
  br i1 %16, label %23, label %17

17:                                               ; preds = %13
  %18 = icmp eq i32 %14, %15
  br i1 %18, label %19, label %26

19:                                               ; preds = %17
  %20 = load i32, ptr %5, align 4, !tbaa !5
  %21 = load i32, ptr @ans_R, align 4, !tbaa !5
  %22 = icmp slt i32 %20, %21
  br i1 %22, label %23, label %26

23:                                               ; preds = %._crit_edge, %19, %13
  %24 = phi i32 [ %.pre, %._crit_edge ], [ %14, %19 ], [ %14, %13 ]
  store i64 %0, ptr @ans, align 8, !tbaa !9
  store i32 %24, ptr @ans_L, align 4, !tbaa !5
  %25 = load i32, ptr %5, align 4, !tbaa !5
  store i32 %25, ptr @ans_R, align 4, !tbaa !5
  br label %26

26:                                               ; preds = %23, %19, %17, %11
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InstCombinePass,SROAPass