; LLVM IR from tangjz/acm-icpc :: loj/6564.ll (Z8lcs_fastiPiiS_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZZ8lcs_fastiPiiS_E3pos = external hidden global [70001 x [1095 x i64]], align 16
@_ZZ8lcs_fastiPiiS_E1f = external hidden global [1095 x i64], align 16
@_ZZ8lcs_fastiPiiS_E1g = external hidden global [1095 x i64], align 16

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z8lcs_fastiPiiS_(i32 noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3) #0 {
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  store i32 %0, ptr %5, align 4, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !5
  store ptr %3, ptr %8, align 8, !tbaa !9
  %25 = load i32, ptr %5, align 4, !tbaa !5
  %26 = load i32, ptr %7, align 4, !tbaa !5
  %27 = icmp slt i32 %25, %26
  br i1 %27, label %28, label %29

28:                                               ; preds = %4
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %5, ptr noundef nonnull align 4 dereferenceable(4) %7) #4
  call void @_ZSt4swapIPiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS4_ESt18is_move_assignableIS4_EEE5valueEvE4typeERS4_SD_(ptr noundef nonnull align 8 dereferenceable(8) %6, ptr noundef nonnull align 8 dereferenceable(8) %8) #4
  br label %29

29:                                               ; preds = %28, %4
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  %30 = load i32, ptr %5, align 4, !tbaa !5
  %31 = sub nsw i32 %30, 1
  %32 = ashr i32 %31, 6
  %33 = add nsw i32 %32, 1
  store i32 %33, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  store i32 0, ptr %10, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  store i32 0, ptr %11, align 4, !tbaa !5
  br label %34

34:                                               ; preds = %59, %29
  %35 = load i32, ptr %11, align 4, !tbaa !5
  %36 = load i32, ptr %5, align 4, !tbaa !5
  %37 = icmp slt i32 %35, %36
  br i1 %37, label %39, label %38

38:                                               ; preds = %34
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  br label %62

39:                                               ; preds = %34
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  %40 = load ptr, ptr %6, align 8, !tbaa !9
  %41 = load i32, ptr %11, align 4, !tbaa !5
  %42 = sext i32 %41 to i64
  %43 = getelementptr inbounds i32, ptr %40, i64 %42
  %44 = load i32, ptr %43, align 4, !tbaa !5
  %45 = sub nsw i32 %44, 1
  store i32 %45, ptr %12, align 4, !tbaa !5
  %46 = load i32, ptr %11, align 4, !tbaa !5
  %47 = and i32 %46, 63
  %48 = zext i32 %47 to i64
  %49 = shl i64 1, %48
  %50 = load i32, ptr %12, align 4, !tbaa !5
  %51 = sext i32 %50 to i64
  %52 = getelementptr inbounds [70001 x [1095 x i64]], ptr @_ZZ8lcs_fastiPiiS_E3pos, i64 0, i64 %51
  %53 = load i32, ptr %11, align 4, !tbaa !5
  %54 = ashr i32 %53, 6
  %55 = sext i32 %54 to i64
  %56 = getelementptr inbounds [1095 x i64], ptr %52, i64 0, i64 %55
  %57 = load i64, ptr %56, align 8, !tbaa !11
  %58 = xor i64 %57, %49
  store i64 %58, ptr %56, align 8, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  br label %59

59:                                               ; preds = %39
  %60 = load i32, ptr %11, align 4, !tbaa !5
  %61 = add nsw i32 %60, 1
  store i32 %61, ptr %11, align 4, !tbaa !5
  br label %34, !llvm.loop !13

62:                                               ; preds = %38
  %63 = load i32, ptr %9, align 4, !tbaa !5
  %64 = sext i32 %63 to i64
  %65 = mul i64 %64, 8
  call void @llvm.memset.p0.i64(ptr align 16 @_ZZ8lcs_fastiPiiS_E1f, i8 0, i64 %65, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  store i32 0, ptr %13, align 4, !tbaa !5
  br label %66

66:                                               ; preds = %184, %62
  %67 = load i32, ptr %13, align 4, !tbaa !5
  %68 = load i32, ptr %7, align 4, !tbaa !5
  %69 = icmp slt i32 %67, %68
  br i1 %69, label %71, label %70

70:                                               ; preds = %66
  store i32 5, ptr %14, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  br label %187

71:                                               ; preds = %66
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #4
  %72 = load ptr, ptr %8, align 8, !tbaa !9
  %73 = load i32, ptr %13, align 4, !tbaa !5
  %74 = sext i32 %73 to i64
  %75 = getelementptr inbounds i32, ptr %72, i64 %74
  %76 = load i32, ptr %75, align 4, !tbaa !5
  %77 = sub nsw i32 %76, 1
  store i32 %77, ptr %15, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #4
  store i32 0, ptr %16, align 4, !tbaa !5
  br label %78

78:                                               ; preds = %99, %71
  %79 = load i32, ptr %16, align 4, !tbaa !5
  %80 = load i32, ptr %9, align 4, !tbaa !5
  %81 = icmp slt i32 %79, %80
  br i1 %81, label %83, label %82

82:                                               ; preds = %78
  store i32 8, ptr %14, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #4
  br label %102

83:                                               ; preds = %78
  %84 = load i32, ptr %16, align 4, !tbaa !5
  %85 = sext i32 %84 to i64
  %86 = getelementptr inbounds [1095 x i64], ptr @_ZZ8lcs_fastiPiiS_E1f, i64 0, i64 %85
  %87 = load i64, ptr %86, align 8, !tbaa !11
  %88 = load i32, ptr %15, align 4, !tbaa !5
  %89 = sext i32 %88 to i64
  %90 = getelementptr inbounds [70001 x [1095 x i64]], ptr @_ZZ8lcs_fastiPiiS_E3pos, i64 0, i64 %89
  %91 = load i32, ptr %16, align 4, !tbaa !5
  %92 = sext i32 %91 to i64
  %93 = getelementptr inbounds [1095 x i64], ptr %90, i64 0, i64 %92
  %94 = load i64, ptr %93, align 8, !tbaa !11
  %95 = or i64 %87, %94
  %96 = load i32, ptr %16, align 4, !tbaa !5
  %97 = sext i32 %96 to i64
  %98 = getelementptr inbounds [1095 x i64], ptr @_ZZ8lcs_fastiPiiS_E1g, i64 0, i64 %97
  store i64 %95, ptr %98, align 8, !tbaa !11
  br label %99

99:                                               ; preds = %83
  %100 = load i32, ptr %16, align 4, !tbaa !5
  %101 = add nsw i32 %100, 1
  store i32 %101, ptr %16, align 4, !tbaa !5
  br label %78, !llvm.loop !15

102:                                              ; preds = %82
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #4
  store i32 0, ptr %17, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #4
  store i32 1, ptr %18, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #4
  br label %103

103:                                              ; preds = %127, %102
  %104 = load i32, ptr %17, align 4, !tbaa !5
  %105 = load i32, ptr %9, align 4, !tbaa !5
  %106 = icmp slt i32 %104, %105
  br i1 %106, label %108, label %107

107:                                              ; preds = %103
  store i32 11, ptr %14, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #4
  br label %131

108:                                              ; preds = %103
  %109 = load i32, ptr %17, align 4, !tbaa !5
  %110 = sext i32 %109 to i64
  %111 = getelementptr inbounds [1095 x i64], ptr @_ZZ8lcs_fastiPiiS_E1f, i64 0, i64 %110
  %112 = load i64, ptr %111, align 8, !tbaa !11
  %113 = lshr i64 %112, 63
  %114 = and i64 %113, 1
  %115 = trunc i64 %114 to i32
  store i32 %115, ptr %19, align 4, !tbaa !5
  %116 = load i32, ptr %17, align 4, !tbaa !5
  %117 = sext i32 %116 to i64
  %118 = getelementptr inbounds [1095 x i64], ptr @_ZZ8lcs_fastiPiiS_E1f, i64 0, i64 %117
  %119 = load i64, ptr %118, align 8, !tbaa !11
  %120 = shl i64 %119, 1
  %121 = load i32, ptr %18, align 4, !tbaa !5
  %122 = sext i32 %121 to i64
  %123 = or i64 %120, %122
  %124 = load i32, ptr %17, align 4, !tbaa !5
  %125 = sext i32 %124 to i64
  %126 = getelementptr inbounds [1095 x i64], ptr @_ZZ8lcs_fastiPiiS_E1f, i64 0, i64 %125
  store i64 %123, ptr %126, align 8, !tbaa !11
  br label %127

127:                                              ; preds = %108
  %128 = load i32, ptr %17, align 4, !tbaa !5
  %129 = add nsw i32 %128, 1
  store i32 %129, ptr %17, align 4, !tbaa !5
  %130 = load i32, ptr %19, align 4, !tbaa !5
  store i32 %130, ptr %18, align 4, !tbaa !5
  br label %103, !llvm.loop !16

131:                                              ; preds = %107
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #4
  store i32 0, ptr %20, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #4
  store i32 0, ptr %21, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #4
  br label %132

132:                                              ; preds = %179, %131
  %133 = load i32, ptr %20, align 4, !tbaa !5
  %134 = load i32, ptr %9, align 4, !tbaa !5
  %135 = icmp slt i32 %133, %134
  br i1 %135, label %137, label %136

136:                                              ; preds = %132
  store i32 14, ptr %14, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #4
  br label %183

137:                                              ; preds = %132
  %138 = load i32, ptr %20, align 4, !tbaa !5
  %139 = sext i32 %138 to i64
  %140 = getelementptr inbounds [1095 x i64], ptr @_ZZ8lcs_fastiPiiS_E1g, i64 0, i64 %139
  %141 = load i64, ptr %140, align 8, !tbaa !11
  %142 = load i32, ptr %20, align 4, !tbaa !5
  %143 = sext i32 %142 to i64
  %144 = getelementptr inbounds [1095 x i64], ptr @_ZZ8lcs_fastiPiiS_E1f, i64 0, i64 %143
  %145 = load i64, ptr %144, align 8, !tbaa !11
  %146 = load i32, ptr %21, align 4, !tbaa !5
  %147 = sext i32 %146 to i64
  %148 = add i64 %145, %147
  %149 = icmp ult i64 %141, %148
  %150 = zext i1 %149 to i32
  store i32 %150, ptr %22, align 4, !tbaa !5
  %151 = load i32, ptr %20, align 4, !tbaa !5
  %152 = sext i32 %151 to i64
  %153 = getelementptr inbounds [1095 x i64], ptr @_ZZ8lcs_fastiPiiS_E1g, i64 0, i64 %152
  %154 = load i64, ptr %153, align 8, !tbaa !11
  %155 = load i32, ptr %20, align 4, !tbaa !5
  %156 = sext i32 %155 to i64
  %157 = getelementptr inbounds [1095 x i64], ptr @_ZZ8lcs_fastiPiiS_E1f, i64 0, i64 %156
  %158 = load i64, ptr %157, align 8, !tbaa !11
  %159 = load i32, ptr %21, align 4, !tbaa !5
  %160 = sext i32 %159 to i64
  %161 = add i64 %158, %160
  %162 = sub i64 %154, %161
  %163 = load i32, ptr %20, align 4, !tbaa !5
  %164 = sext i32 %163 to i64
  %165 = getelementptr inbounds [1095 x i64], ptr @_ZZ8lcs_fastiPiiS_E1f, i64 0, i64 %164
  store i64 %162, ptr %165, align 8, !tbaa !11
  %166 = load i32, ptr %20, align 4, !tbaa !5
  %167 = sext i32 %166 to i64
  %168 = getelementptr inbounds [1095 x i64], ptr @_ZZ8lcs_fastiPiiS_E1f, i64 0, i64 %167
  %169 = load i64, ptr %168, align 8, !tbaa !11
  %170 = xor i64 %169, -1
  %171 = load i32, ptr %20, align 4, !tbaa !5
  %172 = sext i32 %171 to i64
  %173 = getelementptr inbounds [1095 x i64], ptr @_ZZ8lcs_fastiPiiS_E1g, i64 0, i64 %172
  %174 = load i64, ptr %173, align 8, !tbaa !11
  %175 = and i64 %170, %174
  %176 = load i32, ptr %20, align 4, !tbaa !5
  %177 = sext i32 %176 to i64
  %178 = getelementptr inbounds [1095 x i64], ptr @_ZZ8lcs_fastiPiiS_E1f, i64 0, i64 %177
  store i64 %175, ptr %178, align 8, !tbaa !11
  br label %179

179:                                              ; preds = %137
  %180 = load i32, ptr %20, align 4, !tbaa !5
  %181 = add nsw i32 %180, 1
  store i32 %181, ptr %20, align 4, !tbaa !5
  %182 = load i32, ptr %22, align 4, !tbaa !5
  store i32 %182, ptr %21, align 4, !tbaa !5
  br label %132, !llvm.loop !17

183:                                              ; preds = %136
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #4
  br label %184

184:                                              ; preds = %183
  %185 = load i32, ptr %13, align 4, !tbaa !5
  %186 = add nsw i32 %185, 1
  store i32 %186, ptr %13, align 4, !tbaa !5
  br label %66, !llvm.loop !18

187:                                              ; preds = %70
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #4
  store i32 0, ptr %23, align 4, !tbaa !5
  br label %188

188:                                              ; preds = %227, %187
  %189 = load i32, ptr %23, align 4, !tbaa !5
  %190 = load i32, ptr %5, align 4, !tbaa !5
  %191 = icmp slt i32 %189, %190
  br i1 %191, label %193, label %192

192:                                              ; preds = %188
  store i32 17, ptr %14, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #4
  br label %230

193:                                              ; preds = %188
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #4
  %194 = load ptr, ptr %6, align 8, !tbaa !9
  %195 = load i32, ptr %23, align 4, !tbaa !5
  %196 = sext i32 %195 to i64
  %197 = getelementptr inbounds i32, ptr %194, i64 %196
  %198 = load i32, ptr %197, align 4, !tbaa !5
  %199 = sub nsw i32 %198, 1
  store i32 %199, ptr %24, align 4, !tbaa !5
  %200 = load i32, ptr %23, align 4, !tbaa !5
  %201 = and i32 %200, 63
  %202 = zext i32 %201 to i64
  %203 = shl i64 1, %202
  %204 = load i32, ptr %24, align 4, !tbaa !5
  %205 = sext i32 %204 to i64
  %206 = getelementptr inbounds [70001 x [1095 x i64]], ptr @_ZZ8lcs_fastiPiiS_E3pos, i64 0, i64 %205
  %207 = load i32, ptr %23, align 4, !tbaa !5
  %208 = ashr i32 %207, 6
  %209 = sext i32 %208 to i64
  %210 = getelementptr inbounds [1095 x i64], ptr %206, i64 0, i64 %209
  %211 = load i64, ptr %210, align 8, !tbaa !11
  %212 = xor i64 %211, %203
  store i64 %212, ptr %210, align 8, !tbaa !11
  %213 = load i32, ptr %23, align 4, !tbaa !5
  %214 = ashr i32 %213, 6
  %215 = sext i32 %214 to i64
  %216 = getelementptr inbounds [1095 x i64], ptr @_ZZ8lcs_fastiPiiS_E1f, i64 0, i64 %215
  %217 = load i64, ptr %216, align 8, !tbaa !11
  %218 = load i32, ptr %23, align 4, !tbaa !5
  %219 = and i32 %218, 63
  %220 = zext i32 %219 to i64
  %221 = lshr i64 %217, %220
  %222 = and i64 %221, 1
  %223 = load i32, ptr %10, align 4, !tbaa !5
  %224 = sext i32 %223 to i64
  %225 = add i64 %224, %222
  %226 = trunc i64 %225 to i32
  store i32 %226, ptr %10, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #4
  br label %227

227:                                              ; preds = %193
  %228 = load i32, ptr %23, align 4, !tbaa !5
  %229 = add nsw i32 %228, 1
  store i32 %229, ptr %23, align 4, !tbaa !5
  br label %188, !llvm.loop !19

230:                                              ; preds = %192
  %231 = load i32, ptr %10, align 4, !tbaa !5
  store i32 1, ptr %14, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  ret i32 %231
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIPiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS4_ESt18is_move_assignableIS4_EEE5valueEvE4typeERS4_SD_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long long", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}
!17 = distinct !{!17, !14}
!18 = distinct !{!18, !14}
!19 = distinct !{!19, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZZ8lcs_fastiPiiS_E3pos = external hidden local_unnamed_addr global [70001 x [1095 x i64]], align 16
@_ZZ8lcs_fastiPiiS_E1f = external hidden local_unnamed_addr global [1095 x i64], align 16
@_ZZ8lcs_fastiPiiS_E1g = external hidden local_unnamed_addr global [1095 x i64], align 16

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z8lcs_fastiPiiS_(i32 noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3) local_unnamed_addr #0 {
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  store i32 %0, ptr %5, align 4, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !5
  store ptr %3, ptr %8, align 8, !tbaa !9
  %9 = icmp slt i32 %0, %2
  br i1 %9, label %10, label %11

10:                                               ; preds = %4
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %5, ptr noundef nonnull align 4 dereferenceable(4) %7) #3
  call void @_ZSt4swapIPiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS4_ESt18is_move_assignableIS4_EEE5valueEvE4typeERS4_SD_(ptr noundef nonnull align 8 dereferenceable(8) %6, ptr noundef nonnull align 8 dereferenceable(8) %8) #3
  %.pre = load i32, ptr %5, align 4, !tbaa !5
  br label %11

11:                                               ; preds = %10, %4
  %12 = phi i32 [ %.pre, %10 ], [ %0, %4 ]
  %13 = add nsw i32 %12, -1
  %14 = ashr i32 %13, 6
  %15 = add nsw i32 %14, 1
  %16 = icmp sgt i32 %12, 0
  br i1 %16, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %11
  %17 = load ptr, ptr %6, align 8, !tbaa !9
  %wide.trip.count = zext nneg i32 %12 to i64
  %xtraiter = and i64 %wide.trip.count, 1
  %18 = icmp eq i32 %12, 1
  br i1 %18, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph.new

.lr.ph.new:                                       ; preds = %.lr.ph
  %unroll_iter = and i64 %wide.trip.count, 2147483646
  br label %36

._crit_edge.loopexit.unr-lcssa:                   ; preds = %36, %.lr.ph
  %indvars.iv.unr = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next.1, %36 ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge, label %._crit_edge.loopexit.epilog-lcssa

._crit_edge.loopexit.epilog-lcssa:                ; preds = %._crit_edge.loopexit.unr-lcssa
  %19 = getelementptr inbounds i32, ptr %17, i64 %indvars.iv.unr
  %20 = load i32, ptr %19, align 4, !tbaa !5
  %21 = add nsw i32 %20, -1
  %22 = and i64 %indvars.iv.unr, 63
  %23 = shl nuw i64 1, %22
  %24 = sext i32 %21 to i64
  %25 = lshr i64 %indvars.iv.unr, 6
  %26 = and i64 %25, 67108863
  %27 = getelementptr inbounds [70001 x [1095 x i64]], ptr @_ZZ8lcs_fastiPiiS_E3pos, i64 0, i64 %24, i64 %26
  %28 = load i64, ptr %27, align 8, !tbaa !11
  %29 = xor i64 %28, %23
  store i64 %29, ptr %27, align 8, !tbaa !11
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit.epilog-lcssa, %._crit_edge.loopexit.unr-lcssa, %11
  %30 = sext i32 %15 to i64
  %31 = shl nsw i64 %30, 3
  call void @llvm.memset.p0.i64(ptr nonnull align 16 @_ZZ8lcs_fastiPiiS_E1f, i8 0, i64 %31, i1 false)
  %32 = load i32, ptr %7, align 4, !tbaa !5
  %33 = icmp sgt i32 %32, 0
  br i1 %33, label %.lr.ph78, label %.preheader

.lr.ph78:                                         ; preds = %._crit_edge
  %34 = load ptr, ptr %8, align 8, !tbaa !9
  %.not63 = icmp slt i32 %14, 0
  br i1 %.not63, label %.preheader, label %.lr.ph78.split.preheader

.lr.ph78.split.preheader:                         ; preds = %.lr.ph78
  %wide.trip.count105 = zext nneg i32 %32 to i64
  %wide.trip.count90 = zext nneg i32 %15 to i64
  %wide.trip.count95 = zext nneg i32 %15 to i64
  %min.iters.check116 = icmp ult i32 %15, 4
  %n.vec119 = and i64 %wide.trip.count90, 2147483644
  %cmp.n128 = icmp eq i64 %n.vec119, %wide.trip.count90
  %min.iters.check = icmp ult i32 %15, 4
  %n.vec = and i64 %wide.trip.count90, 2147483644
  %cmp.n = icmp eq i64 %n.vec, %wide.trip.count90
  %xtraiter131 = and i64 %wide.trip.count95, 1
  %35 = icmp ult i32 %13, 64
  %unroll_iter133 = and i64 %wide.trip.count95, 2147483646
  %lcmp.mod132.not = icmp eq i64 %xtraiter131, 0
  br label %.lr.ph66

36:                                               ; preds = %36, %.lr.ph.new
  %indvars.iv = phi i64 [ 0, %.lr.ph.new ], [ %indvars.iv.next.1, %36 ]
  %niter = phi i64 [ 0, %.lr.ph.new ], [ %niter.next.1, %36 ]
  %37 = getelementptr inbounds i32, ptr %17, i64 %indvars.iv
  %38 = load i32, ptr %37, align 4, !tbaa !5
  %39 = add nsw i32 %38, -1
  %40 = and i64 %indvars.iv, 62
  %41 = shl nuw nsw i64 1, %40
  %42 = sext i32 %39 to i64
  %43 = lshr i64 %indvars.iv, 6
  %44 = and i64 %43, 67108863
  %45 = getelementptr inbounds [70001 x [1095 x i64]], ptr @_ZZ8lcs_fastiPiiS_E3pos, i64 0, i64 %42, i64 %44
  %46 = load i64, ptr %45, align 8, !tbaa !11
  %47 = xor i64 %46, %41
  store i64 %47, ptr %45, align 8, !tbaa !11
  %indvars.iv.next = or disjoint i64 %indvars.iv, 1
  %48 = getelementptr inbounds i32, ptr %17, i64 %indvars.iv.next
  %49 = load i32, ptr %48, align 4, !tbaa !5
  %50 = add nsw i32 %49, -1
  %51 = and i64 %indvars.iv.next, 63
  %52 = shl nuw i64 1, %51
  %53 = sext i32 %50 to i64
  %54 = lshr i64 %indvars.iv, 6
  %55 = and i64 %54, 67108863
  %56 = getelementptr inbounds [70001 x [1095 x i64]], ptr @_ZZ8lcs_fastiPiiS_E3pos, i64 0, i64 %53, i64 %55
  %57 = load i64, ptr %56, align 8, !tbaa !11
  %58 = xor i64 %57, %52
  store i64 %58, ptr %56, align 8, !tbaa !11
  %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2
  %niter.next.1 = add i64 %niter, 2
  %niter.ncmp.1 = icmp eq i64 %niter.next.1, %unroll_iter
  br i1 %niter.ncmp.1, label %._crit_edge.loopexit.unr-lcssa, label %36, !llvm.loop !13

.preheader:                                       ; preds = %._crit_edge75, %.lr.ph78, %._crit_edge
  br i1 %16, label %.lr.ph83, label %._crit_edge84

.lr.ph83:                                         ; preds = %.preheader
  %59 = load ptr, ptr %6, align 8, !tbaa !9
  %wide.trip.count110 = zext nneg i32 %12 to i64
  br label %123

.lr.ph66:                                         ; preds = %._crit_edge75, %.lr.ph78.split.preheader
  %indvars.iv102 = phi i64 [ 0, %.lr.ph78.split.preheader ], [ %indvars.iv.next103, %._crit_edge75 ]
  %60 = getelementptr inbounds i32, ptr %34, i64 %indvars.iv102
  %61 = load i32, ptr %60, align 4, !tbaa !5
  %62 = add nsw i32 %61, -1
  %63 = sext i32 %62 to i64
  br i1 %min.iters.check116, label %scalar.ph115.preheader, label %vector.body121

vector.body121:                                   ; preds = %.lr.ph66, %vector.body121
  %index122 = phi i64 [ %index.next127, %vector.body121 ], [ 0, %.lr.ph66 ]
  %64 = getelementptr inbounds [1095 x i64], ptr @_ZZ8lcs_fastiPiiS_E1f, i64 0, i64 %index122
  %65 = getelementptr inbounds i8, ptr %64, i64 16
  %wide.load123 = load <2 x i64>, ptr %64, align 16, !tbaa !11
  %wide.load124 = load <2 x i64>, ptr %65, align 16, !tbaa !11
  %66 = getelementptr inbounds [70001 x [1095 x i64]], ptr @_ZZ8lcs_fastiPiiS_E3pos, i64 0, i64 %63, i64 %index122
  %67 = getelementptr inbounds i8, ptr %66, i64 16
  %wide.load125 = load <2 x i64>, ptr %66, align 8, !tbaa !11
  %wide.load126 = load <2 x i64>, ptr %67, align 8, !tbaa !11
  %68 = or <2 x i64> %wide.load125, %wide.load123
  %69 = or <2 x i64> %wide.load126, %wide.load124
  %70 = getelementptr inbounds [1095 x i64], ptr @_ZZ8lcs_fastiPiiS_E1g, i64 0, i64 %index122
  %71 = getelementptr inbounds i8, ptr %70, i64 16
  store <2 x i64> %68, ptr %70, align 16, !tbaa !11
  store <2 x i64> %69, ptr %71, align 16, !tbaa !11
  %index.next127 = add nuw i64 %index122, 4
  %72 = icmp eq i64 %index.next127, %n.vec119
  br i1 %72, label %middle.block114, label %vector.body121, !llvm.loop !15

middle.block114:                                  ; preds = %vector.body121
  br i1 %cmp.n128, label %.lr.ph70.preheader, label %scalar.ph115.preheader

scalar.ph115.preheader:                           ; preds = %middle.block114, %.lr.ph66
  %indvars.iv87.ph = phi i64 [ 0, %.lr.ph66 ], [ %n.vec119, %middle.block114 ]
  br label %scalar.ph115

scalar.ph115:                                     ; preds = %scalar.ph115.preheader, %scalar.ph115
  %indvars.iv87 = phi i64 [ %indvars.iv.next88, %scalar.ph115 ], [ %indvars.iv87.ph, %scalar.ph115.preheader ]
  %73 = getelementptr inbounds [1095 x i64], ptr @_ZZ8lcs_fastiPiiS_E1f, i64 0, i64 %indvars.iv87
  %74 = load i64, ptr %73, align 8, !tbaa !11
  %75 = getelementptr inbounds [70001 x [1095 x i64]], ptr @_ZZ8lcs_fastiPiiS_E3pos, i64 0, i64 %63, i64 %indvars.iv87
  %76 = load i64, ptr %75, align 8, !tbaa !11
  %77 = or i64 %76, %74
  %78 = getelementptr inbounds [1095 x i64], ptr @_ZZ8lcs_fastiPiiS_E1g, i64 0, i64 %indvars.iv87
  store i64 %77, ptr %78, align 8, !tbaa !11
  %indvars.iv.next88 = add nuw nsw i64 %indvars.iv87, 1
  %exitcond91.not = icmp eq i64 %indvars.iv.next88, %wide.trip.count90
  br i1 %exitcond91.not, label %.lr.ph70.preheader, label %scalar.ph115, !llvm.loop !18

.lr.ph70.preheader:                               ; preds = %scalar.ph115, %middle.block114
  br i1 %min.iters.check, label %.lr.ph70.preheader129, label %vector.body

.lr.ph70.preheader129:                            ; preds = %middle.block, %.lr.ph70.preheader
  %indvars.iv92.ph = phi i64 [ 0, %.lr.ph70.preheader ], [ %n.vec, %middle.block ]
  %.05469.ph = phi i64 [ 1, %.lr.ph70.preheader ], [ %vector.recur.extract, %middle.block ]
  br label %.lr.ph70

vector.body:                                      ; preds = %.lr.ph70.preheader, %vector.body
  %index = phi i64 [ %index.next, %vector.body ], [ 0, %.lr.ph70.preheader ]
  %vector.recur = phi <2 x i64> [ %82, %vector.body ], [ <i64 poison, i64 1>, %.lr.ph70.preheader ]
  %79 = getelementptr inbounds [1095 x i64], ptr @_ZZ8lcs_fastiPiiS_E1f, i64 0, i64 %index
  %80 = getelementptr inbounds i8, ptr %79, i64 16
  %wide.load = load <2 x i64>, ptr %79, align 16, !tbaa !11
  %wide.load113 = load <2 x i64>, ptr %80, align 16, !tbaa !11
  %81 = lshr <2 x i64> %wide.load, <i64 63, i64 63>
  %82 = lshr <2 x i64> %wide.load113, <i64 63, i64 63>
  %83 = shufflevector <2 x i64> %vector.recur, <2 x i64> %81, <2 x i32> <i32 1, i32 2>
  %84 = shufflevector <2 x i64> %81, <2 x i64> %82, <2 x i32> <i32 1, i32 2>
  %85 = shl <2 x i64> %wide.load, <i64 1, i64 1>
  %86 = shl <2 x i64> %wide.load113, <i64 1, i64 1>
  %87 = or disjoint <2 x i64> %85, %83
  %88 = or disjoint <2 x i64> %86, %84
  store <2 x i64> %87, ptr %79, align 16, !tbaa !11
  store <2 x i64> %88, ptr %80, align 16, !tbaa !11
  %index.next = add nuw i64 %index, 4
  %89 = icmp eq i64 %index.next, %n.vec
  br i1 %89, label %middle.block, label %vector.body, !llvm.loop !19

middle.block:                                     ; preds = %vector.body
  %vector.recur.extract = extractelement <2 x i64> %82, i64 1
  br i1 %cmp.n, label %.preheader60.preheader, label %.lr.ph70.preheader129

.preheader60.preheader:                           ; preds = %.lr.ph70, %middle.block
  br i1 %35, label %._crit_edge75.unr-lcssa, label %.preheader60

.lr.ph70:                                         ; preds = %.lr.ph70.preheader129, %.lr.ph70
  %indvars.iv92 = phi i64 [ %indvars.iv.next93, %.lr.ph70 ], [ %indvars.iv92.ph, %.lr.ph70.preheader129 ]
  %.05469 = phi i64 [ %92, %.lr.ph70 ], [ %.05469.ph, %.lr.ph70.preheader129 ]
  %90 = getelementptr inbounds [1095 x i64], ptr @_ZZ8lcs_fastiPiiS_E1f, i64 0, i64 %indvars.iv92
  %91 = load i64, ptr %90, align 8, !tbaa !11
  %92 = lshr i64 %91, 63
  %93 = shl i64 %91, 1
  %94 = or disjoint i64 %93, %.05469
  store i64 %94, ptr %90, align 8, !tbaa !11
  %indvars.iv.next93 = add nuw nsw i64 %indvars.iv92, 1
  %exitcond96.not = icmp eq i64 %indvars.iv.next93, %wide.trip.count95
  br i1 %exitcond96.not, label %.preheader60.preheader, label %.lr.ph70, !llvm.loop !20

._crit_edge75.unr-lcssa:                          ; preds = %.preheader60, %.preheader60.preheader
  %indvars.iv97.unr = phi i64 [ 0, %.preheader60.preheader ], [ %indvars.iv.next98.1, %.preheader60 ]
  %.05173.unr = phi i64 [ 0, %.preheader60.preheader ], [ %119, %.preheader60 ]
  br i1 %lcmp.mod132.not, label %._crit_edge75, label %.preheader60.epil

.preheader60.epil:                                ; preds = %._crit_edge75.unr-lcssa
  %95 = getelementptr inbounds [1095 x i64], ptr @_ZZ8lcs_fastiPiiS_E1g, i64 0, i64 %indvars.iv97.unr
  %96 = load i64, ptr %95, align 8, !tbaa !11
  %97 = getelementptr inbounds [1095 x i64], ptr @_ZZ8lcs_fastiPiiS_E1f, i64 0, i64 %indvars.iv97.unr
  %98 = load i64, ptr %97, align 8, !tbaa !11
  %99 = add i64 %98, %.05173.unr
  %100 = xor i64 %96, -1
  %101 = add i64 %99, %100
  %102 = and i64 %101, %96
  store i64 %102, ptr %97, align 8, !tbaa !11
  br label %._crit_edge75

._crit_edge75:                                    ; preds = %._crit_edge75.unr-lcssa, %.preheader60.epil
  %indvars.iv.next103 = add nuw nsw i64 %indvars.iv102, 1
  %exitcond106.not = icmp eq i64 %indvars.iv.next103, %wide.trip.count105
  br i1 %exitcond106.not, label %.preheader, label %.lr.ph66, !llvm.loop !21

.preheader60:                                     ; preds = %.preheader60.preheader, %.preheader60
  %indvars.iv97 = phi i64 [ %indvars.iv.next98.1, %.preheader60 ], [ 0, %.preheader60.preheader ]
  %.05173 = phi i64 [ %119, %.preheader60 ], [ 0, %.preheader60.preheader ]
  %niter134 = phi i64 [ %niter134.next.1, %.preheader60 ], [ 0, %.preheader60.preheader ]
  %103 = getelementptr inbounds [1095 x i64], ptr @_ZZ8lcs_fastiPiiS_E1g, i64 0, i64 %indvars.iv97
  %104 = load i64, ptr %103, align 16, !tbaa !11
  %105 = getelementptr inbounds [1095 x i64], ptr @_ZZ8lcs_fastiPiiS_E1f, i64 0, i64 %indvars.iv97
  %106 = load i64, ptr %105, align 16, !tbaa !11
  %107 = add i64 %106, %.05173
  %108 = icmp ult i64 %104, %107
  %109 = zext i1 %108 to i64
  %110 = xor i64 %104, -1
  %111 = add i64 %107, %110
  %112 = and i64 %111, %104
  store i64 %112, ptr %105, align 16, !tbaa !11
  %indvars.iv.next98 = or disjoint i64 %indvars.iv97, 1
  %113 = getelementptr inbounds [1095 x i64], ptr @_ZZ8lcs_fastiPiiS_E1g, i64 0, i64 %indvars.iv.next98
  %114 = load i64, ptr %113, align 8, !tbaa !11
  %115 = getelementptr inbounds [1095 x i64], ptr @_ZZ8lcs_fastiPiiS_E1f, i64 0, i64 %indvars.iv.next98
  %116 = load i64, ptr %115, align 8, !tbaa !11
  %117 = add i64 %116, %109
  %118 = icmp ult i64 %114, %117
  %119 = zext i1 %118 to i64
  %120 = xor i64 %114, -1
  %121 = add i64 %117, %120
  %122 = and i64 %121, %114
  store i64 %122, ptr %115, align 8, !tbaa !11
  %indvars.iv.next98.1 = add nuw nsw i64 %indvars.iv97, 2
  %niter134.next.1 = add i64 %niter134, 2
  %niter134.ncmp.1 = icmp eq i64 %niter134.next.1, %unroll_iter133
  br i1 %niter134.ncmp.1, label %._crit_edge75.unr-lcssa, label %.preheader60, !llvm.loop !22

._crit_edge84:                                    ; preds = %123, %.preheader
  %.0.lcssa = phi i32 [ 0, %.preheader ], [ %140, %123 ]
  ret i32 %.0.lcssa

123:                                              ; preds = %.lr.ph83, %123
  %indvars.iv107 = phi i64 [ 0, %.lr.ph83 ], [ %indvars.iv.next108, %123 ]
  %.082 = phi i32 [ 0, %.lr.ph83 ], [ %140, %123 ]
  %124 = getelementptr inbounds i32, ptr %59, i64 %indvars.iv107
  %125 = load i32, ptr %124, align 4, !tbaa !5
  %126 = add nsw i32 %125, -1
  %127 = and i64 %indvars.iv107, 63
  %128 = shl nuw i64 1, %127
  %129 = sext i32 %126 to i64
  %130 = lshr i64 %indvars.iv107, 6
  %131 = and i64 %130, 67108863
  %132 = getelementptr inbounds [70001 x [1095 x i64]], ptr @_ZZ8lcs_fastiPiiS_E3pos, i64 0, i64 %129, i64 %131
  %133 = load i64, ptr %132, align 8, !tbaa !11
  %134 = xor i64 %133, %128
  store i64 %134, ptr %132, align 8, !tbaa !11
  %135 = getelementptr inbounds [1095 x i64], ptr @_ZZ8lcs_fastiPiiS_E1f, i64 0, i64 %131
  %136 = load i64, ptr %135, align 8, !tbaa !11
  %137 = lshr i64 %136, %127
  %138 = trunc i64 %137 to i32
  %139 = and i32 %138, 1
  %140 = add i32 %139, %.082
  %indvars.iv.next108 = add nuw nsw i64 %indvars.iv107, 1
  %exitcond111.not = icmp eq i64 %indvars.iv.next108, %wide.trip.count110
  br i1 %exitcond111.not, label %._crit_edge84, label %123, !llvm.loop !23
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIPiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS4_ESt18is_move_assignableIS4_EEE5valueEvE4typeERS4_SD_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long long", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14, !16, !17}
!16 = !{!"llvm.loop.isvectorized", i32 1}
!17 = !{!"llvm.loop.unroll.runtime.disable"}
!18 = distinct !{!18, !14, !17, !16}
!19 = distinct !{!19, !14, !16, !17}
!20 = distinct !{!20, !14, !17, !16}
!21 = distinct !{!21, !14}
!22 = distinct !{!22, !14}
!23 = distinct !{!23, !14}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass