; LLVM IR from tangjz/acm-icpc :: lydsy/4587.ll (Z6calc_2ii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@mod = external dso_local global i32, align 4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z4initv() #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z6updateii(i32 noundef, i32 noundef) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z5queryv() #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_Z7mod_decRiii(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef, i32 noundef) #3

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z6calc_2ii(i32 noundef %0, i32 noundef %1) #2 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !5
  %10 = load i32, ptr %4, align 4, !tbaa !5
  %11 = load i32, ptr %5, align 4, !tbaa !5
  %12 = icmp sgt i32 %10, %11
  br i1 %12, label %13, label %14

13:                                               ; preds = %2
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %4, ptr noundef nonnull align 4 dereferenceable(4) %5) #4
  br label %14

14:                                               ; preds = %13, %2
  %15 = load i32, ptr %4, align 4, !tbaa !5
  %16 = icmp slt i32 %15, 0
  br i1 %16, label %17, label %18

17:                                               ; preds = %14
  store i32 0, ptr %3, align 4
  br label %92

18:                                               ; preds = %14
  %19 = load i32, ptr %4, align 4, !tbaa !5
  %20 = icmp ne i32 %19, 0
  br i1 %20, label %22, label %21

21:                                               ; preds = %18
  store i32 1, ptr %3, align 4
  br label %92

22:                                               ; preds = %18
  br label %23

23:                                               ; preds = %22
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  store i32 0, ptr %6, align 4, !tbaa !5
  %24 = load i32, ptr %4, align 4, !tbaa !5
  %25 = add nsw i32 %24, -1
  store i32 %25, ptr %4, align 4, !tbaa !5
  %26 = load i32, ptr %5, align 4, !tbaa !5
  %27 = add nsw i32 %26, -1
  store i32 %27, ptr %5, align 4, !tbaa !5
  call void @_Z4initv()
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  store i32 1, ptr %7, align 4, !tbaa !5
  br label %28

28:                                               ; preds = %38, %23
  %29 = load i32, ptr %7, align 4, !tbaa !5
  %30 = load i32, ptr %4, align 4, !tbaa !5
  %31 = icmp sle i32 %29, %30
  br i1 %31, label %33, label %32

32:                                               ; preds = %28
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  br label %41

33:                                               ; preds = %28
  %34 = load i32, ptr %5, align 4, !tbaa !5
  %35 = load i32, ptr %7, align 4, !tbaa !5
  %36 = add nsw i32 %34, %35
  call void @_Z6updateii(i32 noundef %36, i32 noundef 1)
  %37 = load i32, ptr %7, align 4, !tbaa !5
  call void @_Z6updateii(i32 noundef %37, i32 noundef -1)
  br label %38

38:                                               ; preds = %33
  %39 = load i32, ptr %7, align 4, !tbaa !5
  %40 = add nsw i32 %39, 1
  store i32 %40, ptr %7, align 4, !tbaa !5
  br label %28, !llvm.loop !9

41:                                               ; preds = %32
  %42 = load i32, ptr %4, align 4, !tbaa !5
  %43 = load i32, ptr %5, align 4, !tbaa !5
  %44 = add nsw i32 %42, %43
  %45 = add nsw i32 %44, 1
  call void @_Z6updateii(i32 noundef %45, i32 noundef 1)
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  store i32 0, ptr %8, align 4, !tbaa !5
  br label %46

46:                                               ; preds = %86, %41
  %47 = load i32, ptr %8, align 4, !tbaa !5
  %48 = load i32, ptr %4, align 4, !tbaa !5
  %49 = icmp sle i32 %47, %48
  br i1 %49, label %51, label %50

50:                                               ; preds = %46
  store i32 5, ptr %9, align 4
  br label %89

51:                                               ; preds = %46
  %52 = load i32, ptr %4, align 4, !tbaa !5
  %53 = add nsw i32 %52, 1
  call void @_Z6updateii(i32 noundef %53, i32 noundef -1)
  %54 = load i32, ptr @mod, align 4, !tbaa !5
  %55 = call noundef i32 @_Z5queryv()
  %56 = sub nsw i32 %54, %55
  call void @_Z7mod_decRiii(ptr noundef nonnull align 4 dereferenceable(4) %6, i32 noundef %56, i32 noundef 2)
  %57 = load i32, ptr %4, align 4, !tbaa !5
  %58 = add nsw i32 %57, 1
  call void @_Z6updateii(i32 noundef %58, i32 noundef 1)
  %59 = load i32, ptr %5, align 4, !tbaa !5
  %60 = add nsw i32 %59, 1
  call void @_Z6updateii(i32 noundef %60, i32 noundef -1)
  %61 = load i32, ptr @mod, align 4, !tbaa !5
  %62 = call noundef i32 @_Z5queryv()
  %63 = sub nsw i32 %61, %62
  call void @_Z7mod_decRiii(ptr noundef nonnull align 4 dereferenceable(4) %6, i32 noundef %63, i32 noundef 2)
  %64 = load i32, ptr %5, align 4, !tbaa !5
  %65 = add nsw i32 %64, 1
  call void @_Z6updateii(i32 noundef %65, i32 noundef 1)
  %66 = load i32, ptr %4, align 4, !tbaa !5
  %67 = load i32, ptr %5, align 4, !tbaa !5
  %68 = add nsw i32 %66, %67
  %69 = add nsw i32 %68, 1
  %70 = load i32, ptr %8, align 4, !tbaa !5
  %71 = sub nsw i32 %69, %70
  call void @_Z6updateii(i32 noundef %71, i32 noundef -1)
  %72 = call noundef i32 @_Z5queryv()
  call void @_Z7mod_decRiii(ptr noundef nonnull align 4 dereferenceable(4) %6, i32 noundef %72, i32 noundef 1)
  %73 = load i32, ptr %8, align 4, !tbaa !5
  %74 = load i32, ptr %4, align 4, !tbaa !5
  %75 = icmp eq i32 %73, %74
  br i1 %75, label %76, label %77

76:                                               ; preds = %51
  store i32 5, ptr %9, align 4
  br label %89

77:                                               ; preds = %51
  %78 = load i32, ptr %4, align 4, !tbaa !5
  %79 = load i32, ptr %8, align 4, !tbaa !5
  %80 = sub nsw i32 %78, %79
  call void @_Z6updateii(i32 noundef %80, i32 noundef 1)
  %81 = load i32, ptr %5, align 4, !tbaa !5
  %82 = load i32, ptr %8, align 4, !tbaa !5
  %83 = sub nsw i32 %81, %82
  call void @_Z6updateii(i32 noundef %83, i32 noundef 1)
  %84 = load i32, ptr %8, align 4, !tbaa !5
  %85 = add nsw i32 %84, 1
  call void @_Z6updateii(i32 noundef %85, i32 noundef -1)
  br label %86

86:                                               ; preds = %77
  %87 = load i32, ptr %8, align 4, !tbaa !5
  %88 = add nsw i32 %87, 1
  store i32 %88, ptr %8, align 4, !tbaa !5
  br label %46, !llvm.loop !11

89:                                               ; preds = %76, %50
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  br label %90

90:                                               ; preds = %89
  %91 = load i32, ptr %6, align 4, !tbaa !5
  store i32 %91, ptr %3, align 4
  store i32 1, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  br label %92

92:                                               ; preds = %90, %21, %17
  %93 = load i32, ptr %3, align 4
  ret i32 %93
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@mod = external dso_local local_unnamed_addr global i32, align 4

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z4initv() local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z6updateii(i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z5queryv() local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_Z7mod_decRiii(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef, i32 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z6calc_2ii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #2 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  %6 = icmp sgt i32 %0, %1
  br i1 %6, label %7, label %8

7:                                                ; preds = %2
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %3, ptr noundef nonnull align 4 dereferenceable(4) %4) #4
  %.pr = load i32, ptr %3, align 4, !tbaa !5
  br label %8

8:                                                ; preds = %7, %2
  %9 = phi i32 [ %.pr, %7 ], [ %0, %2 ]
  %10 = icmp slt i32 %9, 0
  br i1 %10, label %53, label %11

11:                                               ; preds = %8
  %.not = icmp eq i32 %9, 0
  br i1 %.not, label %53, label %12

12:                                               ; preds = %11
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #4
  store i32 0, ptr %5, align 4, !tbaa !5
  %13 = add nsw i32 %9, -1
  store i32 %13, ptr %3, align 4, !tbaa !5
  %14 = load i32, ptr %4, align 4, !tbaa !5
  %15 = add nsw i32 %14, -1
  store i32 %15, ptr %4, align 4, !tbaa !5
  call void @_Z4initv()
  %16 = load i32, ptr %3, align 4, !tbaa !5
  %.not1820 = icmp slt i32 %16, 1
  br i1 %.not1820, label %._crit_edge, label %.lr.ph

._crit_edge:                                      ; preds = %.lr.ph, %12
  %.lcssa = phi i32 [ %16, %12 ], [ %24, %.lr.ph ]
  %17 = load i32, ptr %4, align 4, !tbaa !5
  %18 = add i32 %.lcssa, 1
  %19 = add i32 %18, %17
  call void @_Z6updateii(i32 noundef %19, i32 noundef 1)
  %20 = load i32, ptr %3, align 4, !tbaa !5
  %.not1922 = icmp slt i32 %20, 0
  br i1 %.not1922, label %._crit_edge26, label %.lr.ph25

.lr.ph:                                           ; preds = %12, %.lr.ph
  %.01221 = phi i32 [ %23, %.lr.ph ], [ 1, %12 ]
  %21 = load i32, ptr %4, align 4, !tbaa !5
  %22 = add nsw i32 %21, %.01221
  call void @_Z6updateii(i32 noundef %22, i32 noundef 1)
  call void @_Z6updateii(i32 noundef %.01221, i32 noundef -1)
  %23 = add nuw nsw i32 %.01221, 1
  %24 = load i32, ptr %3, align 4, !tbaa !5
  %.not18.not = icmp slt i32 %.01221, %24
  br i1 %.not18.not, label %.lr.ph, label %._crit_edge, !llvm.loop !9

.lr.ph25:                                         ; preds = %._crit_edge, %46
  %25 = phi i32 [ %51, %46 ], [ %20, %._crit_edge ]
  %.023 = phi i32 [ %50, %46 ], [ 0, %._crit_edge ]
  %26 = add nsw i32 %25, 1
  call void @_Z6updateii(i32 noundef %26, i32 noundef -1)
  %27 = load i32, ptr @mod, align 4, !tbaa !5
  %28 = call noundef i32 @_Z5queryv()
  %29 = sub nsw i32 %27, %28
  call void @_Z7mod_decRiii(ptr noundef nonnull align 4 dereferenceable(4) %5, i32 noundef %29, i32 noundef 2)
  %30 = load i32, ptr %3, align 4, !tbaa !5
  %31 = add nsw i32 %30, 1
  call void @_Z6updateii(i32 noundef %31, i32 noundef 1)
  %32 = load i32, ptr %4, align 4, !tbaa !5
  %33 = add nsw i32 %32, 1
  call void @_Z6updateii(i32 noundef %33, i32 noundef -1)
  %34 = load i32, ptr @mod, align 4, !tbaa !5
  %35 = call noundef i32 @_Z5queryv()
  %36 = sub nsw i32 %34, %35
  call void @_Z7mod_decRiii(ptr noundef nonnull align 4 dereferenceable(4) %5, i32 noundef %36, i32 noundef 2)
  %37 = load i32, ptr %4, align 4, !tbaa !5
  %38 = add nsw i32 %37, 1
  call void @_Z6updateii(i32 noundef %38, i32 noundef 1)
  %39 = load i32, ptr %3, align 4, !tbaa !5
  %40 = load i32, ptr %4, align 4, !tbaa !5
  %reass.sub = sub i32 %39, %.023
  %41 = add i32 %reass.sub, 1
  %42 = add i32 %41, %40
  call void @_Z6updateii(i32 noundef %42, i32 noundef -1)
  %43 = call noundef i32 @_Z5queryv()
  call void @_Z7mod_decRiii(ptr noundef nonnull align 4 dereferenceable(4) %5, i32 noundef %43, i32 noundef 1)
  %44 = load i32, ptr %3, align 4, !tbaa !5
  %45 = icmp eq i32 %.023, %44
  br i1 %45, label %._crit_edge26.loopexit, label %46

46:                                               ; preds = %.lr.ph25
  %47 = sub nsw i32 %44, %.023
  call void @_Z6updateii(i32 noundef %47, i32 noundef 1)
  %48 = load i32, ptr %4, align 4, !tbaa !5
  %49 = sub nsw i32 %48, %.023
  call void @_Z6updateii(i32 noundef %49, i32 noundef 1)
  %50 = add nuw nsw i32 %.023, 1
  call void @_Z6updateii(i32 noundef %50, i32 noundef -1)
  %51 = load i32, ptr %3, align 4, !tbaa !5
  %.not19.not = icmp slt i32 %.023, %51
  br i1 %.not19.not, label %.lr.ph25, label %._crit_edge26.loopexit, !llvm.loop !11

._crit_edge26.loopexit:                           ; preds = %.lr.ph25, %46
  %.pre = load i32, ptr %5, align 4, !tbaa !5
  br label %._crit_edge26

._crit_edge26:                                    ; preds = %._crit_edge26.loopexit, %._crit_edge
  %52 = phi i32 [ %.pre, %._crit_edge26.loopexit ], [ 0, %._crit_edge ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #4
  br label %53

53:                                               ; preds = %11, %8, %._crit_edge26
  %.013 = phi i32 [ %52, %._crit_edge26 ], [ 0, %8 ], [ 1, %11 ]
  ret i32 %.013
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass