; LLVM IR from CRAFT-THU/BSim :: src/neuron/tj/TJNeuron.ll (ZN8TJNeuron8hardCopyEPvii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.TJNeuron = type { %class.NeuronBase.base, float, float, float, float, float, float, float, float, float, float, i32, i32, ptr }
%class.NeuronBase.base = type <{ %class.Base, %"class.std::vector", i8, i8, [2 x i8], i32, float }>
%class.Base = type { ptr, i32, i32 }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<SynapseBase *, std::allocator<SynapseBase *>>::_Vector_impl" }
%"struct.std::_Vector_base<SynapseBase *, std::allocator<SynapseBase *>>::_Vector_impl" = type { %"struct.std::_Vector_base<SynapseBase *, std::allocator<SynapseBase *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<SynapseBase *, std::allocator<SynapseBase *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.GTJNeurons = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN8TJNeuron8hardCopyEPvii(ptr noundef nonnull align 8 dereferenceable(112) %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) unnamed_addr #1 align 2 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !9
  store i32 %3, ptr %8, align 4, !tbaa !9
  %10 = load ptr, ptr %5, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  %11 = load ptr, ptr %6, align 8, !tbaa !5
  store ptr %11, ptr %9, align 8, !tbaa !5
  %12 = load i32, ptr %7, align 4, !tbaa !9
  %13 = load i32, ptr %8, align 4, !tbaa !9
  %14 = add nsw i32 %12, %13
  call void @_ZN4Base5setIDEi(ptr noundef nonnull align 8 dereferenceable(16) %10, i32 noundef %14)
  %15 = getelementptr inbounds %class.TJNeuron, ptr %10, i32 0, i32 3
  %16 = load float, ptr %15, align 4, !tbaa !11
  %17 = load ptr, ptr %9, align 8, !tbaa !5
  %18 = getelementptr inbounds %struct.GTJNeurons, ptr %17, i32 0, i32 2
  %19 = load ptr, ptr %18, align 8, !tbaa !21
  %20 = load i32, ptr %7, align 4, !tbaa !9
  %21 = sext i32 %20 to i64
  %22 = getelementptr inbounds float, ptr %19, i64 %21
  store float %16, ptr %22, align 4, !tbaa !23
  %23 = getelementptr inbounds %class.TJNeuron, ptr %10, i32 0, i32 6
  %24 = load float, ptr %23, align 8, !tbaa !24
  %25 = load ptr, ptr %9, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.GTJNeurons, ptr %25, i32 0, i32 1
  %27 = load ptr, ptr %26, align 8, !tbaa !25
  %28 = load i32, ptr %7, align 4, !tbaa !9
  %29 = sext i32 %28 to i64
  %30 = getelementptr inbounds float, ptr %27, i64 %29
  store float %24, ptr %30, align 4, !tbaa !23
  %31 = getelementptr inbounds %class.TJNeuron, ptr %10, i32 0, i32 9
  %32 = load float, ptr %31, align 4, !tbaa !26
  %33 = load ptr, ptr %9, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.GTJNeurons, ptr %33, i32 0, i32 0
  %35 = load ptr, ptr %34, align 8, !tbaa !27
  %36 = load i32, ptr %7, align 4, !tbaa !9
  %37 = sext i32 %36 to i64
  %38 = getelementptr inbounds float, ptr %35, i64 %37
  store float %32, ptr %38, align 4, !tbaa !23
  %39 = getelementptr inbounds %class.TJNeuron, ptr %10, i32 0, i32 10
  %40 = load float, ptr %39, align 8, !tbaa !28
  %41 = load ptr, ptr %9, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.GTJNeurons, ptr %41, i32 0, i32 3
  %43 = load ptr, ptr %42, align 8, !tbaa !29
  %44 = load i32, ptr %7, align 4, !tbaa !9
  %45 = sext i32 %44 to i64
  %46 = getelementptr inbounds float, ptr %43, i64 %45
  store float %40, ptr %46, align 4, !tbaa !23
  %47 = getelementptr inbounds %class.TJNeuron, ptr %10, i32 0, i32 4
  %48 = load float, ptr %47, align 8, !tbaa !30
  %49 = load ptr, ptr %9, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.GTJNeurons, ptr %49, i32 0, i32 4
  %51 = load ptr, ptr %50, align 8, !tbaa !31
  %52 = load i32, ptr %7, align 4, !tbaa !9
  %53 = sext i32 %52 to i64
  %54 = getelementptr inbounds float, ptr %51, i64 %53
  store float %48, ptr %54, align 4, !tbaa !23
  %55 = getelementptr inbounds %class.TJNeuron, ptr %10, i32 0, i32 12
  %56 = load i32, ptr %55, align 8, !tbaa !32
  %57 = load ptr, ptr %9, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.GTJNeurons, ptr %57, i32 0, i32 5
  %59 = load ptr, ptr %58, align 8, !tbaa !33
  %60 = load i32, ptr %7, align 4, !tbaa !9
  %61 = sext i32 %60 to i64
  %62 = getelementptr inbounds i32, ptr %59, i64 %61
  store i32 %56, ptr %62, align 4, !tbaa !9
  %63 = getelementptr inbounds %class.TJNeuron, ptr %10, i32 0, i32 11
  %64 = load i32, ptr %63, align 4, !tbaa !34
  %65 = load ptr, ptr %9, align 8, !tbaa !5
  %66 = getelementptr inbounds %struct.GTJNeurons, ptr %65, i32 0, i32 6
  %67 = load ptr, ptr %66, align 8, !tbaa !35
  %68 = load i32, ptr %7, align 4, !tbaa !9
  %69 = sext i32 %68 to i64
  %70 = getelementptr inbounds i32, ptr %67, i64 %69
  store i32 %64, ptr %70, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  ret i32 1
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4Base5setIDEi(ptr noundef nonnull align 8 dereferenceable(16), i32 noundef) #2 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !20, i64 60}
!12 = !{!"_ZTS8TJNeuron", !13, i64 0, !20, i64 52, !20, i64 56, !20, i64 60, !20, i64 64, !20, i64 68, !20, i64 72, !20, i64 76, !20, i64 80, !20, i64 84, !20, i64 88, !10, i64 92, !10, i64 96, !6, i64 104}
!13 = !{!"_ZTS10NeuronBase", !14, i64 0, !15, i64 16, !19, i64 40, !19, i64 41, !10, i64 44, !20, i64 48}
!14 = !{!"_ZTS4Base", !10, i64 8, !10, i64 12}
!15 = !{!"_ZTSSt6vectorIP11SynapseBaseSaIS1_EE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseIP11SynapseBaseSaIS1_EE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIP11SynapseBaseSaIS1_EE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIP11SynapseBaseSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!19 = !{!"bool", !7, i64 0}
!20 = !{!"float", !7, i64 0}
!21 = !{!22, !6, i64 16}
!22 = !{!"_ZTS10GTJNeurons", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48}
!23 = !{!20, !20, i64 0}
!24 = !{!12, !20, i64 72}
!25 = !{!22, !6, i64 8}
!26 = !{!12, !20, i64 84}
!27 = !{!22, !6, i64 0}
!28 = !{!12, !20, i64 88}
!29 = !{!22, !6, i64 24}
!30 = !{!12, !20, i64 64}
!31 = !{!22, !6, i64 32}
!32 = !{!12, !10, i64 96}
!33 = !{!22, !6, i64 40}
!34 = !{!12, !10, i64 92}
!35 = !{!22, !6, i64 48}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_ZN8TJNeuron8hardCopyEPvii(ptr noundef nonnull align 8 dereferenceable(112) %0, ptr nocapture noundef readonly %1, i32 noundef %2, i32 noundef %3) unnamed_addr #0 align 2 {
  %5 = add nsw i32 %3, %2
  tail call void @_ZN4Base5setIDEi(ptr noundef nonnull align 8 dereferenceable(16) %0, i32 noundef %5)
  %6 = getelementptr inbounds i8, ptr %0, i64 60
  %7 = load float, ptr %6, align 4, !tbaa !5
  %8 = getelementptr inbounds i8, ptr %1, i64 16
  %9 = load ptr, ptr %8, align 8, !tbaa !19
  %10 = sext i32 %2 to i64
  %11 = getelementptr inbounds float, ptr %9, i64 %10
  store float %7, ptr %11, align 4, !tbaa !21
  %12 = getelementptr inbounds i8, ptr %0, i64 72
  %13 = load float, ptr %12, align 8, !tbaa !22
  %14 = getelementptr inbounds i8, ptr %1, i64 8
  %15 = load ptr, ptr %14, align 8, !tbaa !23
  %16 = getelementptr inbounds float, ptr %15, i64 %10
  store float %13, ptr %16, align 4, !tbaa !21
  %17 = getelementptr inbounds i8, ptr %0, i64 84
  %18 = load float, ptr %17, align 4, !tbaa !24
  %19 = load ptr, ptr %1, align 8, !tbaa !25
  %20 = getelementptr inbounds float, ptr %19, i64 %10
  store float %18, ptr %20, align 4, !tbaa !21
  %21 = getelementptr inbounds i8, ptr %0, i64 88
  %22 = load float, ptr %21, align 8, !tbaa !26
  %23 = getelementptr inbounds i8, ptr %1, i64 24
  %24 = load ptr, ptr %23, align 8, !tbaa !27
  %25 = getelementptr inbounds float, ptr %24, i64 %10
  store float %22, ptr %25, align 4, !tbaa !21
  %26 = getelementptr inbounds i8, ptr %0, i64 64
  %27 = load float, ptr %26, align 8, !tbaa !28
  %28 = getelementptr inbounds i8, ptr %1, i64 32
  %29 = load ptr, ptr %28, align 8, !tbaa !29
  %30 = getelementptr inbounds float, ptr %29, i64 %10
  store float %27, ptr %30, align 4, !tbaa !21
  %31 = getelementptr inbounds i8, ptr %0, i64 96
  %32 = load i32, ptr %31, align 8, !tbaa !30
  %33 = getelementptr inbounds i8, ptr %1, i64 40
  %34 = load ptr, ptr %33, align 8, !tbaa !31
  %35 = getelementptr inbounds i32, ptr %34, i64 %10
  store i32 %32, ptr %35, align 4, !tbaa !32
  %36 = getelementptr inbounds i8, ptr %0, i64 92
  %37 = load i32, ptr %36, align 4, !tbaa !33
  %38 = getelementptr inbounds i8, ptr %1, i64 48
  %39 = load ptr, ptr %38, align 8, !tbaa !34
  %40 = getelementptr inbounds i32, ptr %39, i64 %10
  store i32 %37, ptr %40, align 4, !tbaa !32
  ret i32 1
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4Base5setIDEi(ptr noundef nonnull align 8 dereferenceable(16), i32 noundef) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !18, i64 60}
!6 = !{!"_ZTS8TJNeuron", !7, i64 0, !18, i64 52, !18, i64 56, !18, i64 60, !18, i64 64, !18, i64 68, !18, i64 72, !18, i64 76, !18, i64 80, !18, i64 84, !18, i64 88, !9, i64 92, !9, i64 96, !16, i64 104}
!7 = !{!"_ZTS10NeuronBase", !8, i64 0, !12, i64 16, !17, i64 40, !17, i64 41, !9, i64 44, !18, i64 48}
!8 = !{!"_ZTS4Base", !9, i64 8, !9, i64 12}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C++ TBAA"}
!12 = !{!"_ZTSSt6vectorIP11SynapseBaseSaIS1_EE", !13, i64 0}
!13 = !{!"_ZTSSt12_Vector_baseIP11SynapseBaseSaIS1_EE", !14, i64 0}
!14 = !{!"_ZTSNSt12_Vector_baseIP11SynapseBaseSaIS1_EE12_Vector_implE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIP11SynapseBaseSaIS1_EE17_Vector_impl_dataE", !16, i64 0, !16, i64 8, !16, i64 16}
!16 = !{!"any pointer", !10, i64 0}
!17 = !{!"bool", !10, i64 0}
!18 = !{!"float", !10, i64 0}
!19 = !{!20, !16, i64 16}
!20 = !{!"_ZTS10GTJNeurons", !16, i64 0, !16, i64 8, !16, i64 16, !16, i64 24, !16, i64 32, !16, i64 40, !16, i64 48}
!21 = !{!18, !18, i64 0}
!22 = !{!6, !18, i64 72}
!23 = !{!20, !16, i64 8}
!24 = !{!6, !18, i64 84}
!25 = !{!20, !16, i64 0}
!26 = !{!6, !18, i64 88}
!27 = !{!20, !16, i64 24}
!28 = !{!6, !18, i64 64}
!29 = !{!20, !16, i64 32}
!30 = !{!6, !9, i64 96}
!31 = !{!20, !16, i64 40}
!32 = !{!9, !9, i64 0}
!33 = !{!6, !9, i64 92}
!34 = !{!20, !16, i64 48}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,TailCallElimPass