; LLVM IR from tangjz/acm-icpc :: codeforces/complete/1030F.ll (Z7seg_queiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Segment = type { i64, i32 }

@seg = external dso_local global [400003 x %struct.Segment], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7seg_idxii(i32 noundef, i32 noundef) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_Z9seg_mergeR7SegmentS0_S0_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16)) #1

; Function Attrs: mustprogress uwtable
define dso_local { i64, i32 } @_Z7seg_queiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) #3 {
  %4 = alloca %struct.Segment, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store i32 %0, ptr %5, align 4, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !5
  %10 = load i32, ptr %6, align 4, !tbaa !5
  %11 = load i32, ptr %7, align 4, !tbaa !5
  %12 = icmp sle i32 %10, %11
  br i1 %12, label %13, label %19

13:                                               ; preds = %3
  %14 = load i32, ptr %5, align 4, !tbaa !5
  %15 = load i32, ptr %6, align 4, !tbaa !5
  %16 = call noundef i32 @_Z7seg_idxii(i32 noundef %14, i32 noundef %15)
  %17 = sext i32 %16 to i64
  %18 = getelementptr inbounds [400003 x %struct.Segment], ptr @seg, i64 0, i64 %17
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %4, ptr align 16 %18, i64 16, i1 false), !tbaa.struct !9
  br label %52

19:                                               ; preds = %3
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  %20 = load i32, ptr %5, align 4, !tbaa !5
  %21 = load i32, ptr %6, align 4, !tbaa !5
  %22 = add nsw i32 %20, %21
  %23 = ashr i32 %22, 1
  store i32 %23, ptr %8, align 4, !tbaa !5
  %24 = load i32, ptr %7, align 4, !tbaa !5
  %25 = load i32, ptr %8, align 4, !tbaa !5
  %26 = icmp sle i32 %24, %25
  br i1 %26, label %27, label %36

27:                                               ; preds = %19
  %28 = load i32, ptr %5, align 4, !tbaa !5
  %29 = load i32, ptr %8, align 4, !tbaa !5
  %30 = load i32, ptr %7, align 4, !tbaa !5
  %31 = call { i64, i32 } @_Z7seg_queiii(i32 noundef %28, i32 noundef %29, i32 noundef %30)
  %32 = getelementptr inbounds { i64, i32 }, ptr %4, i32 0, i32 0
  %33 = extractvalue { i64, i32 } %31, 0
  store i64 %33, ptr %32, align 8
  %34 = getelementptr inbounds { i64, i32 }, ptr %4, i32 0, i32 1
  %35 = extractvalue { i64, i32 } %31, 1
  store i32 %35, ptr %34, align 8
  store i32 1, ptr %9, align 4
  br label %51

36:                                               ; preds = %19
  %37 = load i32, ptr %8, align 4, !tbaa !5
  %38 = add nsw i32 %37, 1
  %39 = load i32, ptr %6, align 4, !tbaa !5
  %40 = load i32, ptr %7, align 4, !tbaa !5
  %41 = call { i64, i32 } @_Z7seg_queiii(i32 noundef %38, i32 noundef %39, i32 noundef %40)
  %42 = getelementptr inbounds { i64, i32 }, ptr %4, i32 0, i32 0
  %43 = extractvalue { i64, i32 } %41, 0
  store i64 %43, ptr %42, align 8
  %44 = getelementptr inbounds { i64, i32 }, ptr %4, i32 0, i32 1
  %45 = extractvalue { i64, i32 } %41, 1
  store i32 %45, ptr %44, align 8
  %46 = load i32, ptr %5, align 4, !tbaa !5
  %47 = load i32, ptr %8, align 4, !tbaa !5
  %48 = call noundef i32 @_Z7seg_idxii(i32 noundef %46, i32 noundef %47)
  %49 = sext i32 %48 to i64
  %50 = getelementptr inbounds [400003 x %struct.Segment], ptr @seg, i64 0, i64 %49
  call void @_Z9seg_mergeR7SegmentS0_S0_(ptr noundef nonnull align 8 dereferenceable(16) %4, ptr noundef nonnull align 8 dereferenceable(16) %50, ptr noundef nonnull align 8 dereferenceable(16) %4)
  store i32 1, ptr %9, align 4
  br label %51

51:                                               ; preds = %36, %27
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  br label %52

52:                                               ; preds = %51, %13
  %53 = load { i64, i32 }, ptr %4, align 8
  ret { i64, i32 } %53
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{i64 0, i64 8, !10, i64 8, i64 4, !5}
!10 = !{!11, !11, i64 0}
!11 = !{!"long long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Segment = type { i64, i32 }

@seg = external dso_local global [400003 x %struct.Segment], align 16

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7seg_idxii(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_Z9seg_mergeR7SegmentS0_S0_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local { i64, i32 } @_Z7seg_queiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #2 {
  %4 = alloca %struct.Segment, align 8
  %.not = icmp sgt i32 %1, %2
  br i1 %.not, label %9, label %5

5:                                                ; preds = %3
  %6 = tail call noundef i32 @_Z7seg_idxii(i32 noundef %0, i32 noundef %1)
  %7 = sext i32 %6 to i64
  %8 = getelementptr inbounds [400003 x %struct.Segment], ptr @seg, i64 0, i64 %7
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %4, ptr noundef nonnull align 16 dereferenceable(16) %8, i64 16, i1 false), !tbaa.struct !5
  br label %26

9:                                                ; preds = %3
  %10 = add nsw i32 %1, %0
  %11 = ashr i32 %10, 1
  %.not19 = icmp slt i32 %11, %2
  br i1 %.not19, label %17, label %12

12:                                               ; preds = %9
  %13 = tail call { i64, i32 } @_Z7seg_queiii(i32 noundef %0, i32 noundef %11, i32 noundef %2)
  %14 = extractvalue { i64, i32 } %13, 0
  store i64 %14, ptr %4, align 8
  %15 = getelementptr inbounds i8, ptr %4, i64 8
  %16 = extractvalue { i64, i32 } %13, 1
  store i32 %16, ptr %15, align 8
  br label %26

17:                                               ; preds = %9
  %18 = add nsw i32 %11, 1
  %19 = tail call { i64, i32 } @_Z7seg_queiii(i32 noundef %18, i32 noundef %1, i32 noundef %2)
  %20 = extractvalue { i64, i32 } %19, 0
  store i64 %20, ptr %4, align 8
  %21 = getelementptr inbounds i8, ptr %4, i64 8
  %22 = extractvalue { i64, i32 } %19, 1
  store i32 %22, ptr %21, align 8
  %23 = tail call noundef i32 @_Z7seg_idxii(i32 noundef %0, i32 noundef %11)
  %24 = sext i32 %23 to i64
  %25 = getelementptr inbounds [400003 x %struct.Segment], ptr @seg, i64 0, i64 %24
  call void @_Z9seg_mergeR7SegmentS0_S0_(ptr noundef nonnull align 8 dereferenceable(16) %4, ptr noundef nonnull align 8 dereferenceable(16) %25, ptr noundef nonnull align 8 dereferenceable(16) %4)
  br label %26

26:                                               ; preds = %12, %17, %5
  %.fca.0.load = load i64, ptr %4, align 8
  %.fca.0.insert = insertvalue { i64, i32 } poison, i64 %.fca.0.load, 0
  %.fca.1.gep = getelementptr inbounds i8, ptr %4, i64 8
  %.fca.1.load = load i32, ptr %.fca.1.gep, align 8
  %.fca.1.insert = insertvalue { i64, i32 } %.fca.0.insert, i32 %.fca.1.load, 1
  ret { i64, i32 } %.fca.1.insert
}

attributes #0 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{i64 0, i64 8, !6, i64 8, i64 4, !10}
!6 = !{!7, !7, i64 0}
!7 = !{!"long long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass