; LLVM IR from tangjz/acm-icpc :: poj/3495.ll (Z5solvexxx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z5solvexxx(i64 noundef %0, i64 noundef %1, i64 noundef %2) #0 {
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  %13 = alloca i64, align 8
  %14 = alloca i64, align 8
  %15 = alloca i64, align 8
  %16 = alloca i64, align 8
  store i64 %0, ptr %4, align 8, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !5
  store i64 %2, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  store i64 0, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  %17 = load i64, ptr %5, align 8, !tbaa !5
  %18 = load i64, ptr %4, align 8, !tbaa !5
  %19 = sub nsw i64 %17, %18
  %20 = load i64, ptr %6, align 8, !tbaa !5
  %21 = sdiv i64 %19, %20
  %22 = add nsw i64 %21, 1
  store i64 %22, ptr %8, align 8, !tbaa !5
  %23 = load i64, ptr %5, align 8, !tbaa !5
  %24 = load i64, ptr %4, align 8, !tbaa !5
  %25 = sub nsw i64 %23, %24
  %26 = load i64, ptr %6, align 8, !tbaa !5
  %27 = srem i64 %25, %26
  %28 = load i64, ptr %5, align 8, !tbaa !5
  %29 = sub nsw i64 %28, %27
  store i64 %29, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  store i64 1, ptr %9, align 8, !tbaa !5
  br label %30

30:                                               ; preds = %98, %3
  %31 = load i64, ptr %9, align 8, !tbaa !5
  %32 = load i64, ptr %5, align 8, !tbaa !5
  %33 = icmp sle i64 %31, %32
  br i1 %33, label %35, label %34

34:                                               ; preds = %30
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  br label %101

35:                                               ; preds = %30
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  %36 = load i64, ptr %6, align 8, !tbaa !5
  store i64 %36, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  %37 = load i64, ptr %4, align 8, !tbaa !5
  store i64 %37, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #3
  %38 = load i64, ptr %9, align 8, !tbaa !5
  store i64 %38, ptr %12, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #3
  %39 = load i64, ptr %8, align 8, !tbaa !5
  store i64 %39, ptr %13, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #3
  store i64 0, ptr %14, align 8, !tbaa !5
  br label %40

40:                                               ; preds = %64, %35
  %41 = load i64, ptr %13, align 8, !tbaa !5
  %42 = icmp ne i64 %41, 0
  br i1 %42, label %43, label %90

43:                                               ; preds = %40
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #3
  %44 = load i64, ptr %10, align 8, !tbaa !5
  %45 = load i64, ptr %12, align 8, !tbaa !5
  %46 = sdiv i64 %44, %45
  store i64 %46, ptr %15, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #3
  %47 = load i64, ptr %11, align 8, !tbaa !5
  %48 = load i64, ptr %12, align 8, !tbaa !5
  %49 = sdiv i64 %47, %48
  store i64 %49, ptr %16, align 8, !tbaa !5
  %50 = load i64, ptr %13, align 8, !tbaa !5
  %51 = and i64 %50, 3
  %52 = icmp sge i64 %51, 2
  br i1 %52, label %53, label %55

53:                                               ; preds = %43
  %54 = load i64, ptr %15, align 8, !tbaa !5
  br label %56

55:                                               ; preds = %43
  br label %56

56:                                               ; preds = %55, %53
  %57 = phi i64 [ %54, %53 ], [ 0, %55 ]
  %58 = load i64, ptr %13, align 8, !tbaa !5
  %59 = and i64 %58, 1
  %60 = icmp ne i64 %59, 0
  br i1 %60, label %61, label %63

61:                                               ; preds = %56
  %62 = load i64, ptr %16, align 8, !tbaa !5
  br label %64

63:                                               ; preds = %56
  br label %64

64:                                               ; preds = %63, %61
  %65 = phi i64 [ %62, %61 ], [ 0, %63 ]
  %66 = add nsw i64 %57, %65
  %67 = and i64 %66, 1
  %68 = load i64, ptr %14, align 8, !tbaa !5
  %69 = xor i64 %68, %67
  store i64 %69, ptr %14, align 8, !tbaa !5
  %70 = load i64, ptr %15, align 8, !tbaa !5
  %71 = load i64, ptr %12, align 8, !tbaa !5
  %72 = mul nsw i64 %70, %71
  %73 = load i64, ptr %10, align 8, !tbaa !5
  %74 = sub nsw i64 %73, %72
  store i64 %74, ptr %10, align 8, !tbaa !5
  %75 = load i64, ptr %10, align 8, !tbaa !5
  %76 = load i64, ptr %13, align 8, !tbaa !5
  %77 = mul nsw i64 %75, %76
  %78 = load i64, ptr %11, align 8, !tbaa !5
  %79 = add nsw i64 %77, %78
  %80 = load i64, ptr %16, align 8, !tbaa !5
  %81 = load i64, ptr %12, align 8, !tbaa !5
  %82 = mul nsw i64 %80, %81
  %83 = sub nsw i64 %79, %82
  store i64 %83, ptr %13, align 8, !tbaa !5
  %84 = load i64, ptr %13, align 8, !tbaa !5
  %85 = load i64, ptr %12, align 8, !tbaa !5
  %86 = srem i64 %84, %85
  store i64 %86, ptr %11, align 8, !tbaa !5
  %87 = load i64, ptr %12, align 8, !tbaa !5
  %88 = load i64, ptr %13, align 8, !tbaa !5
  %89 = sdiv i64 %88, %87
  store i64 %89, ptr %13, align 8, !tbaa !5
  call void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) %10, ptr noundef nonnull align 8 dereferenceable(8) %12) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #3
  br label %40, !llvm.loop !9

90:                                               ; preds = %40
  %91 = load i64, ptr %14, align 8, !tbaa !5
  %92 = icmp ne i64 %91, 0
  br i1 %92, label %93, label %97

93:                                               ; preds = %90
  %94 = load i64, ptr %9, align 8, !tbaa !5
  %95 = load i64, ptr %7, align 8, !tbaa !5
  %96 = or i64 %95, %94
  store i64 %96, ptr %7, align 8, !tbaa !5
  br label %97

97:                                               ; preds = %93, %90
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  br label %98

98:                                               ; preds = %97
  %99 = load i64, ptr %9, align 8, !tbaa !5
  %100 = shl i64 %99, 1
  store i64 %100, ptr %9, align 8, !tbaa !5
  br label %30, !llvm.loop !11

101:                                              ; preds = %34
  %102 = load i64, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  ret i64 %102
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z5solvexxx(i64 noundef %0, i64 noundef %1, i64 noundef %2) local_unnamed_addr #0 {
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = sub nsw i64 %1, %0
  %7 = sdiv i64 %6, %2
  %8 = add nsw i64 %7, 1
  %9 = srem i64 %6, %2
  %10 = sub nsw i64 %1, %9
  %.not43 = icmp slt i64 %10, 1
  %.not3539 = icmp eq i64 %8, 0
  %or.cond = select i1 %.not43, i1 true, i1 %.not3539
  br i1 %or.cond, label %._crit_edge48, label %.lr.ph

._crit_edge48:                                    ; preds = %._crit_edge, %3
  %.0.lcssa = phi i64 [ 0, %3 ], [ %spec.select, %._crit_edge ]
  ret i64 %.0.lcssa

.lr.ph:                                           ; preds = %3, %._crit_edge
  %.045 = phi i64 [ %spec.select, %._crit_edge ], [ 0, %3 ]
  %.03444 = phi i64 [ %30, %._crit_edge ], [ 1, %3 ]
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
  store i64 %2, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
  store i64 %.03444, ptr %5, align 8, !tbaa !5
  br label %11

11:                                               ; preds = %.lr.ph, %11
  %.03142 = phi i64 [ 0, %.lr.ph ], [ %22, %11 ]
  %.03241 = phi i64 [ %8, %.lr.ph ], [ %28, %11 ]
  %.03340 = phi i64 [ %0, %.lr.ph ], [ %27, %11 ]
  %12 = load i64, ptr %4, align 8, !tbaa !5
  %13 = load i64, ptr %5, align 8, !tbaa !5
  %14 = sdiv i64 %12, %13
  %15 = sdiv i64 %.03340, %13
  %16 = and i64 %.03241, 2
  %.not37 = icmp eq i64 %16, 0
  %17 = select i1 %.not37, i64 0, i64 %14
  %18 = and i64 %.03241, 1
  %.not38 = icmp eq i64 %18, 0
  %19 = select i1 %.not38, i64 0, i64 %15
  %20 = add nsw i64 %19, %17
  %21 = and i64 %20, 1
  %22 = xor i64 %21, %.03142
  %23 = mul nsw i64 %14, %13
  %.recomposed = srem i64 %12, %13
  store i64 %.recomposed, ptr %4, align 8, !tbaa !5
  %24 = mul nsw i64 %.recomposed, %.03241
  %25 = mul nsw i64 %15, %13
  %.recomposed53 = srem i64 %.03340, %13
  %26 = add i64 %.recomposed53, %24
  %27 = srem i64 %26, %13
  %28 = sdiv i64 %26, %13
  call void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) %4, ptr noundef nonnull align 8 dereferenceable(8) %5) #3
  %.not35 = icmp eq i64 %28, 0
  br i1 %.not35, label %._crit_edge, label %11, !llvm.loop !9

._crit_edge:                                      ; preds = %11
  %.not36 = icmp eq i64 %21, %.03142
  %29 = select i1 %.not36, i64 0, i64 %.03444
  %spec.select = or i64 %29, %.045
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
  %30 = shl i64 %.03444, 1
  %.not = icmp sgt i64 %30, %10
  br i1 %.not, label %._crit_edge48, label %.lr.ph, !llvm.loop !11
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: DSEPass,DivRemPairsPass,EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass