; LLVM IR from jpvt/Computer_Graphics :: Assignment #3/third_party/glm/test/gtc/gtc_type_ptr.ll (Z14test_make_vec3v)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.glm::vec.42" = type { %union.anon.43, %union.anon.44, %union.anon.45 }
%union.anon.43 = type { i32 }
%union.anon.44 = type { i32 }
%union.anon.45 = type { i32 }
%"struct.glm::vec.63" = type { %union.anon.64 }
%union.anon.64 = type { i32 }
%"struct.glm::vec.39" = type { %union.anon.40, %union.anon.41 }
%union.anon.40 = type { i32 }
%union.anon.41 = type { i32 }
%"struct.glm::vec.46" = type { %union.anon.47, %union.anon.48, %union.anon.49, %union.anon.50 }
%union.anon.47 = type { i32 }
%union.anon.48 = type { i32 }
%union.anon.49 = type { i32 }
%union.anon.50 = type { i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN3glm3vecILi1EiLNS_9qualifierE0EEC2Ei(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef) unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN3glm3vecILi2EiLNS_9qualifierE0EEC2Ei(ptr noundef nonnull align 4 dereferenceable(8), i32 noundef) unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN3glm3vecILi3EiLNS_9qualifierE0EEC2Ei(ptr noundef nonnull align 4 dereferenceable(12), i32 noundef) unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN3glm3vecILi4EiLNS_9qualifierE0EEC2Ei(ptr noundef nonnull align 4 dereferenceable(16), i32 noundef) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z14test_make_vec3v() #3 {
  %1 = alloca i32, align 4
  %2 = alloca %"struct.glm::vec.42", align 4
  %3 = alloca %"struct.glm::vec.63", align 4
  %4 = alloca { i64, i32 }, align 8
  %5 = alloca %"struct.glm::vec.42", align 4
  %6 = alloca %"struct.glm::vec.42", align 4
  %7 = alloca %"struct.glm::vec.39", align 4
  %8 = alloca { i64, i32 }, align 8
  %9 = alloca %"struct.glm::vec.42", align 4
  %10 = alloca %"struct.glm::vec.42", align 4
  %11 = alloca %"struct.glm::vec.42", align 4
  %12 = alloca { i64, i32 }, align 8
  %13 = alloca %"struct.glm::vec.42", align 4
  %14 = alloca %"struct.glm::vec.42", align 4
  %15 = alloca %"struct.glm::vec.46", align 4
  %16 = alloca { i64, i32 }, align 8
  %17 = alloca %"struct.glm::vec.42", align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #5
  store i32 0, ptr %1, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 12, ptr %2) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #5
  call void @_ZN3glm3vecILi1EiLNS_9qualifierE0EEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) %3, i32 noundef 2)
  %18 = call { i64, i32 } @_ZN3glm9make_vec3IiLNS_9qualifierE0EEENS_3vecILi3ET_XT0_EEERKNS2_ILi1ES3_XT0_EEE(ptr noundef nonnull align 4 dereferenceable(4) %3)
  store { i64, i32 } %18, ptr %4, align 8
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %2, ptr align 8 %4, i64 12, i1 false)
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #5
  call void @llvm.lifetime.start.p0(i64 12, ptr %5) #5
  call void @_ZN3glm3vecILi3EiLNS_9qualifierE0EEC2Eiii(ptr noundef nonnull align 4 dereferenceable(12) %5, i32 noundef 2, i32 noundef 0, i32 noundef 0)
  %19 = call noundef zeroext i1 @_ZN3glmeqIiLNS_9qualifierE0EEEbRKNS_3vecILi3ET_XT0_EEES6_(ptr noundef nonnull align 4 dereferenceable(12) %2, ptr noundef nonnull align 4 dereferenceable(12) %5)
  %20 = zext i1 %19 to i64
  %21 = select i1 %19, i32 0, i32 1
  %22 = load i32, ptr %1, align 4, !tbaa !5
  %23 = add nsw i32 %22, %21
  store i32 %23, ptr %1, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 12, ptr %5) #5
  call void @llvm.lifetime.start.p0(i64 12, ptr %6) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #5
  call void @_ZN3glm3vecILi2EiLNS_9qualifierE0EEC2Ei(ptr noundef nonnull align 4 dereferenceable(8) %7, i32 noundef 2)
  %24 = call { i64, i32 } @_ZN3glm9make_vec3IiLNS_9qualifierE0EEENS_3vecILi3ET_XT0_EEERKNS2_ILi2ES3_XT0_EEE(ptr noundef nonnull align 4 dereferenceable(8) %7)
  store { i64, i32 } %24, ptr %8, align 8
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %6, ptr align 8 %8, i64 12, i1 false)
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #5
  call void @llvm.lifetime.start.p0(i64 12, ptr %9) #5
  call void @_ZN3glm3vecILi3EiLNS_9qualifierE0EEC2Eiii(ptr noundef nonnull align 4 dereferenceable(12) %9, i32 noundef 2, i32 noundef 2, i32 noundef 0)
  %25 = call noundef zeroext i1 @_ZN3glmeqIiLNS_9qualifierE0EEEbRKNS_3vecILi3ET_XT0_EEES6_(ptr noundef nonnull align 4 dereferenceable(12) %6, ptr noundef nonnull align 4 dereferenceable(12) %9)
  %26 = zext i1 %25 to i64
  %27 = select i1 %25, i32 0, i32 1
  %28 = load i32, ptr %1, align 4, !tbaa !5
  %29 = add nsw i32 %28, %27
  store i32 %29, ptr %1, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 12, ptr %9) #5
  call void @llvm.lifetime.start.p0(i64 12, ptr %10) #5
  call void @llvm.lifetime.start.p0(i64 12, ptr %11) #5
  call void @_ZN3glm3vecILi3EiLNS_9qualifierE0EEC2Ei(ptr noundef nonnull align 4 dereferenceable(12) %11, i32 noundef 2)
  %30 = call { i64, i32 } @_ZN3glm9make_vec3IiLNS_9qualifierE0EEENS_3vecILi3ET_XT0_EEERKS4_(ptr noundef nonnull align 4 dereferenceable(12) %11)
  store { i64, i32 } %30, ptr %12, align 8
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %10, ptr align 8 %12, i64 12, i1 false)
  call void @llvm.lifetime.end.p0(i64 12, ptr %11) #5
  call void @llvm.lifetime.start.p0(i64 12, ptr %13) #5
  call void @_ZN3glm3vecILi3EiLNS_9qualifierE0EEC2Eiii(ptr noundef nonnull align 4 dereferenceable(12) %13, i32 noundef 2, i32 noundef 2, i32 noundef 2)
  %31 = call noundef zeroext i1 @_ZN3glmeqIiLNS_9qualifierE0EEEbRKNS_3vecILi3ET_XT0_EEES6_(ptr noundef nonnull align 4 dereferenceable(12) %10, ptr noundef nonnull align 4 dereferenceable(12) %13)
  %32 = zext i1 %31 to i64
  %33 = select i1 %31, i32 0, i32 1
  %34 = load i32, ptr %1, align 4, !tbaa !5
  %35 = add nsw i32 %34, %33
  store i32 %35, ptr %1, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 12, ptr %13) #5
  call void @llvm.lifetime.start.p0(i64 12, ptr %14) #5
  call void @llvm.lifetime.start.p0(i64 16, ptr %15) #5
  call void @_ZN3glm3vecILi4EiLNS_9qualifierE0EEC2Ei(ptr noundef nonnull align 4 dereferenceable(16) %15, i32 noundef 2)
  %36 = call { i64, i32 } @_ZN3glm9make_vec3IiLNS_9qualifierE0EEENS_3vecILi3ET_XT0_EEERKNS2_ILi4ES3_XT0_EEE(ptr noundef nonnull align 4 dereferenceable(16) %15)
  store { i64, i32 } %36, ptr %16, align 8
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %14, ptr align 8 %16, i64 12, i1 false)
  call void @llvm.lifetime.end.p0(i64 16, ptr %15) #5
  call void @llvm.lifetime.start.p0(i64 12, ptr %17) #5
  call void @_ZN3glm3vecILi3EiLNS_9qualifierE0EEC2Eiii(ptr noundef nonnull align 4 dereferenceable(12) %17, i32 noundef 2, i32 noundef 2, i32 noundef 2)
  %37 = call noundef zeroext i1 @_ZN3glmeqIiLNS_9qualifierE0EEEbRKNS_3vecILi3ET_XT0_EEES6_(ptr noundef nonnull align 4 dereferenceable(12) %10, ptr noundef nonnull align 4 dereferenceable(12) %17)
  %38 = zext i1 %37 to i64
  %39 = select i1 %37, i32 0, i32 1
  %40 = load i32, ptr %1, align 4, !tbaa !5
  %41 = add nsw i32 %40, %39
  store i32 %41, ptr %1, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 12, ptr %17) #5
  %42 = load i32, ptr %1, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 12, ptr %14) #5
  call void @llvm.lifetime.end.p0(i64 12, ptr %10) #5
  call void @llvm.lifetime.end.p0(i64 12, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 12, ptr %2) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #5
  ret i32 %42
}

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local { i64, i32 } @_ZN3glm9make_vec3IiLNS_9qualifierE0EEENS_3vecILi3ET_XT0_EEERKNS2_ILi1ES3_XT0_EEE(ptr noundef nonnull align 4 dereferenceable(4)) #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN3glmeqIiLNS_9qualifierE0EEEbRKNS_3vecILi3ET_XT0_EEES6_(ptr noundef nonnull align 4 dereferenceable(12), ptr noundef nonnull align 4 dereferenceable(12)) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN3glm3vecILi3EiLNS_9qualifierE0EEC2Eiii(ptr noundef nonnull align 4 dereferenceable(12), i32 noundef, i32 noundef, i32 noundef) unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local { i64, i32 } @_ZN3glm9make_vec3IiLNS_9qualifierE0EEENS_3vecILi3ET_XT0_EEERKNS2_ILi2ES3_XT0_EEE(ptr noundef nonnull align 4 dereferenceable(8)) #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local { i64, i32 } @_ZN3glm9make_vec3IiLNS_9qualifierE0EEENS_3vecILi3ET_XT0_EEERKS4_(ptr noundef nonnull align 4 dereferenceable(12)) #2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local { i64, i32 } @_ZN3glm9make_vec3IiLNS_9qualifierE0EEENS_3vecILi3ET_XT0_EEERKNS2_ILi4ES3_XT0_EEE(ptr noundef nonnull align 4 dereferenceable(16)) #4

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.glm::vec.42" = type { %union.anon.43, %union.anon.44, %union.anon.45 }
%union.anon.43 = type { i32 }
%union.anon.44 = type { i32 }
%union.anon.45 = type { i32 }
%"struct.glm::vec.63" = type { %union.anon.64 }
%union.anon.64 = type { i32 }
%"struct.glm::vec.39" = type { %union.anon.40, %union.anon.41 }
%union.anon.40 = type { i32 }
%union.anon.41 = type { i32 }
%"struct.glm::vec.46" = type { %union.anon.47, %union.anon.48, %union.anon.49, %union.anon.50 }
%union.anon.47 = type { i32 }
%union.anon.48 = type { i32 }
%union.anon.49 = type { i32 }
%union.anon.50 = type { i32 }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN3glm3vecILi1EiLNS_9qualifierE0EEC2Ei(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef) unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN3glm3vecILi2EiLNS_9qualifierE0EEC2Ei(ptr noundef nonnull align 4 dereferenceable(8), i32 noundef) unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN3glm3vecILi3EiLNS_9qualifierE0EEC2Ei(ptr noundef nonnull align 4 dereferenceable(12), i32 noundef) unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN3glm3vecILi4EiLNS_9qualifierE0EEC2Ei(ptr noundef nonnull align 4 dereferenceable(16), i32 noundef) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef range(i32 0, 5) i32 @_Z14test_make_vec3v() local_unnamed_addr #2 {
  %1 = alloca %"struct.glm::vec.42", align 8
  %2 = alloca %"struct.glm::vec.63", align 4
  %3 = alloca %"struct.glm::vec.42", align 4
  %4 = alloca %"struct.glm::vec.42", align 8
  %5 = alloca %"struct.glm::vec.39", align 4
  %6 = alloca %"struct.glm::vec.42", align 4
  %7 = alloca %"struct.glm::vec.42", align 8
  %8 = alloca %"struct.glm::vec.42", align 4
  %9 = alloca %"struct.glm::vec.42", align 4
  %10 = alloca %"struct.glm::vec.46", align 4
  %11 = alloca %"struct.glm::vec.42", align 4
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %1) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #4
  call void @_ZN3glm3vecILi1EiLNS_9qualifierE0EEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) %2, i32 noundef 2)
  %12 = call { i64, i32 } @_ZN3glm9make_vec3IiLNS_9qualifierE0EEENS_3vecILi3ET_XT0_EEERKNS2_ILi1ES3_XT0_EEE(ptr noundef nonnull align 4 dereferenceable(4) %2)
  %.fca.0.extract10 = extractvalue { i64, i32 } %12, 0
  %.fca.1.extract11 = extractvalue { i64, i32 } %12, 1
  store i64 %.fca.0.extract10, ptr %1, align 8
  %.sroa.213.0..sroa_idx = getelementptr inbounds i8, ptr %1, i64 8
  store i32 %.fca.1.extract11, ptr %.sroa.213.0..sroa_idx, align 8
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #4
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %3) #4
  call void @_ZN3glm3vecILi3EiLNS_9qualifierE0EEC2Eiii(ptr noundef nonnull align 4 dereferenceable(12) %3, i32 noundef 2, i32 noundef 0, i32 noundef 0)
  %13 = call noundef zeroext i1 @_ZN3glmeqIiLNS_9qualifierE0EEEbRKNS_3vecILi3ET_XT0_EEES6_(ptr noundef nonnull align 4 dereferenceable(12) %1, ptr noundef nonnull align 4 dereferenceable(12) %3)
  %not. = xor i1 %13, true
  %14 = zext i1 %not. to i32
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %3) #4
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %4) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #4
  call void @_ZN3glm3vecILi2EiLNS_9qualifierE0EEC2Ei(ptr noundef nonnull align 4 dereferenceable(8) %5, i32 noundef 2)
  %15 = call { i64, i32 } @_ZN3glm9make_vec3IiLNS_9qualifierE0EEENS_3vecILi3ET_XT0_EEERKNS2_ILi2ES3_XT0_EEE(ptr noundef nonnull align 4 dereferenceable(8) %5)
  %.fca.0.extract6 = extractvalue { i64, i32 } %15, 0
  %.fca.1.extract7 = extractvalue { i64, i32 } %15, 1
  store i64 %.fca.0.extract6, ptr %4, align 8
  %.sroa.29.0..sroa_idx = getelementptr inbounds i8, ptr %4, i64 8
  store i32 %.fca.1.extract7, ptr %.sroa.29.0..sroa_idx, align 8
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #4
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %6) #4
  call void @_ZN3glm3vecILi3EiLNS_9qualifierE0EEC2Eiii(ptr noundef nonnull align 4 dereferenceable(12) %6, i32 noundef 2, i32 noundef 2, i32 noundef 0)
  %16 = call noundef zeroext i1 @_ZN3glmeqIiLNS_9qualifierE0EEEbRKNS_3vecILi3ET_XT0_EEES6_(ptr noundef nonnull align 4 dereferenceable(12) %4, ptr noundef nonnull align 4 dereferenceable(12) %6)
  %not.18 = xor i1 %16, true
  %17 = zext i1 %not.18 to i32
  %18 = add nuw nsw i32 %17, %14
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %6) #4
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %7) #4
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %8) #4
  call void @_ZN3glm3vecILi3EiLNS_9qualifierE0EEC2Ei(ptr noundef nonnull align 4 dereferenceable(12) %8, i32 noundef 2)
  %19 = call { i64, i32 } @_ZN3glm9make_vec3IiLNS_9qualifierE0EEENS_3vecILi3ET_XT0_EEERKS4_(ptr noundef nonnull align 4 dereferenceable(12) %8)
  %.fca.0.extract2 = extractvalue { i64, i32 } %19, 0
  %.fca.1.extract3 = extractvalue { i64, i32 } %19, 1
  store i64 %.fca.0.extract2, ptr %7, align 8
  %.sroa.25.0..sroa_idx = getelementptr inbounds i8, ptr %7, i64 8
  store i32 %.fca.1.extract3, ptr %.sroa.25.0..sroa_idx, align 8
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %8) #4
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %9) #4
  call void @_ZN3glm3vecILi3EiLNS_9qualifierE0EEC2Eiii(ptr noundef nonnull align 4 dereferenceable(12) %9, i32 noundef 2, i32 noundef 2, i32 noundef 2)
  %20 = call noundef zeroext i1 @_ZN3glmeqIiLNS_9qualifierE0EEEbRKNS_3vecILi3ET_XT0_EEES6_(ptr noundef nonnull align 4 dereferenceable(12) %7, ptr noundef nonnull align 4 dereferenceable(12) %9)
  %not.19 = xor i1 %20, true
  %21 = zext i1 %not.19 to i32
  %22 = add nuw nsw i32 %18, %21
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %9) #4
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %10) #4
  call void @_ZN3glm3vecILi4EiLNS_9qualifierE0EEC2Ei(ptr noundef nonnull align 4 dereferenceable(16) %10, i32 noundef 2)
  %23 = call { i64, i32 } @_ZN3glm9make_vec3IiLNS_9qualifierE0EEENS_3vecILi3ET_XT0_EEERKNS2_ILi4ES3_XT0_EEE(ptr noundef nonnull align 4 dereferenceable(16) %10)
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %10) #4
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %11) #4
  call void @_ZN3glm3vecILi3EiLNS_9qualifierE0EEC2Eiii(ptr noundef nonnull align 4 dereferenceable(12) %11, i32 noundef 2, i32 noundef 2, i32 noundef 2)
  %24 = call noundef zeroext i1 @_ZN3glmeqIiLNS_9qualifierE0EEEbRKNS_3vecILi3ET_XT0_EEES6_(ptr noundef nonnull align 4 dereferenceable(12) %7, ptr noundef nonnull align 4 dereferenceable(12) %11)
  %not.20 = xor i1 %24, true
  %25 = zext i1 %not.20 to i32
  %26 = add nuw nsw i32 %22, %25
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %11) #4
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %7) #4
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %4) #4
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %1) #4
  ret i32 %26
}

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local { i64, i32 } @_ZN3glm9make_vec3IiLNS_9qualifierE0EEENS_3vecILi3ET_XT0_EEERKNS2_ILi1ES3_XT0_EEE(ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN3glmeqIiLNS_9qualifierE0EEEbRKNS_3vecILi3ET_XT0_EEES6_(ptr noundef nonnull align 4 dereferenceable(12), ptr noundef nonnull align 4 dereferenceable(12)) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN3glm3vecILi3EiLNS_9qualifierE0EEC2Eiii(ptr noundef nonnull align 4 dereferenceable(12), i32 noundef, i32 noundef, i32 noundef) unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local { i64, i32 } @_ZN3glm9make_vec3IiLNS_9qualifierE0EEENS_3vecILi3ET_XT0_EEERKNS2_ILi2ES3_XT0_EEE(ptr noundef nonnull align 4 dereferenceable(8)) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local { i64, i32 } @_ZN3glm9make_vec3IiLNS_9qualifierE0EEENS_3vecILi3ET_XT0_EEERKS4_(ptr noundef nonnull align 4 dereferenceable(12)) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local { i64, i32 } @_ZN3glm9make_vec3IiLNS_9qualifierE0EEENS_3vecILi3ET_XT0_EEERKNS2_ILi4ES3_XT0_EEE(ptr noundef nonnull align 4 dereferenceable(16)) local_unnamed_addr #3

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass