; LLVM IR from tangjz/acm-icpc :: codeforces/complete (1034B)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@n = external dso_local global i32, align 4
@r = external dso_local global i32, align 4
@c = external dso_local global i32, align 4
@match = external dso_local global [401 x i32], align 16
@e = external dso_local global [401 x [401 x i8]], align 16
@vis = external dso_local global [401 x i8], align 16
@.str = external hidden unnamed_addr constant [5 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [7 x i8], align 1

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z4pathi(i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #2 {
  %1 = alloca i32, align 4
  %2 = alloca i64, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #6
  store i64 0, ptr %2, align 8, !tbaa !5
  %15 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef @r, ptr noundef @c)
  %16 = load i32, ptr @r, align 4, !tbaa !9
  %17 = icmp sge i32 %16, 20
  br i1 %17, label %18, label %35

18:                                               ; preds = %0
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #6
  %19 = load i32, ptr @r, align 4, !tbaa !9
  %20 = sub nsw i32 %19, 20
  %21 = add nsw i32 %20, 5
  %22 = sdiv i32 %21, 6
  store i32 %22, ptr %3, align 4, !tbaa !9
  %23 = load i32, ptr %3, align 4, !tbaa !9
  %24 = sext i32 %23 to i64
  %25 = mul nsw i64 6, %24
  %26 = load i32, ptr @c, align 4, !tbaa !9
  %27 = sext i32 %26 to i64
  %28 = mul nsw i64 %25, %27
  %29 = load i64, ptr %2, align 8, !tbaa !5
  %30 = add nsw i64 %29, %28
  store i64 %30, ptr %2, align 8, !tbaa !5
  %31 = load i32, ptr %3, align 4, !tbaa !9
  %32 = mul nsw i32 %31, 6
  %33 = load i32, ptr @r, align 4, !tbaa !9
  %34 = sub nsw i32 %33, %32
  store i32 %34, ptr @r, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #6
  br label %35

35:                                               ; preds = %18, %0
  %36 = load i32, ptr @c, align 4, !tbaa !9
  %37 = icmp sge i32 %36, 20
  br i1 %37, label %38, label %55

38:                                               ; preds = %35
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #6
  %39 = load i32, ptr @c, align 4, !tbaa !9
  %40 = sub nsw i32 %39, 20
  %41 = add nsw i32 %40, 5
  %42 = sdiv i32 %41, 6
  store i32 %42, ptr %4, align 4, !tbaa !9
  %43 = load i32, ptr %4, align 4, !tbaa !9
  %44 = sext i32 %43 to i64
  %45 = mul nsw i64 6, %44
  %46 = load i32, ptr @r, align 4, !tbaa !9
  %47 = sext i32 %46 to i64
  %48 = mul nsw i64 %45, %47
  %49 = load i64, ptr %2, align 8, !tbaa !5
  %50 = add nsw i64 %49, %48
  store i64 %50, ptr %2, align 8, !tbaa !5
  %51 = load i32, ptr %4, align 4, !tbaa !9
  %52 = mul nsw i32 %51, 6
  %53 = load i32, ptr @c, align 4, !tbaa !9
  %54 = sub nsw i32 %53, %52
  store i32 %54, ptr @c, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #6
  br label %55

55:                                               ; preds = %38, %35
  %56 = load i32, ptr @r, align 4, !tbaa !9
  %57 = load i32, ptr @c, align 4, !tbaa !9
  %58 = mul nsw i32 %56, %57
  store i32 %58, ptr @n, align 4, !tbaa !9
  call void @llvm.memset.p0.i64(ptr align 16 @e, i8 0, i64 160801, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #6
  store i32 0, ptr %5, align 4, !tbaa !9
  br label %59

59:                                               ; preds = %124, %55
  %60 = load i32, ptr %5, align 4, !tbaa !9
  %61 = load i32, ptr @n, align 4, !tbaa !9
  %62 = icmp slt i32 %60, %61
  br i1 %62, label %64, label %63

63:                                               ; preds = %59
  store i32 2, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #6
  br label %127

64:                                               ; preds = %59
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #6
  %65 = load i32, ptr %5, align 4, !tbaa !9
  %66 = load i32, ptr @c, align 4, !tbaa !9
  %67 = sdiv i32 %65, %66
  store i32 %67, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #6
  %68 = load i32, ptr %5, align 4, !tbaa !9
  %69 = load i32, ptr @c, align 4, !tbaa !9
  %70 = srem i32 %68, %69
  store i32 %70, ptr %8, align 4, !tbaa !9
  %71 = load i32, ptr %7, align 4, !tbaa !9
  %72 = and i32 %71, 1
  %73 = load i32, ptr %8, align 4, !tbaa !9
  %74 = and i32 %73, 1
  %75 = icmp ne i32 %72, %74
  br i1 %75, label %76, label %77

76:                                               ; preds = %64
  store i32 4, ptr %6, align 4
  br label %121

77:                                               ; preds = %64
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #6
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %78

78:                                               ; preds = %117, %77
  %79 = load i32, ptr %9, align 4, !tbaa !9
  %80 = load i32, ptr @n, align 4, !tbaa !9
  %81 = icmp slt i32 %79, %80
  br i1 %81, label %83, label %82

82:                                               ; preds = %78
  store i32 5, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #6
  br label %120

83:                                               ; preds = %78
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #6
  %84 = load i32, ptr %9, align 4, !tbaa !9
  %85 = load i32, ptr @c, align 4, !tbaa !9
  %86 = sdiv i32 %84, %85
  store i32 %86, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #6
  %87 = load i32, ptr %9, align 4, !tbaa !9
  %88 = load i32, ptr @c, align 4, !tbaa !9
  %89 = srem i32 %87, %88
  store i32 %89, ptr %11, align 4, !tbaa !9
  %90 = load i32, ptr %10, align 4, !tbaa !9
  %91 = and i32 %90, 1
  %92 = load i32, ptr %11, align 4, !tbaa !9
  %93 = and i32 %92, 1
  %94 = icmp eq i32 %91, %93
  br i1 %94, label %95, label %96

95:                                               ; preds = %83
  store i32 7, ptr %6, align 4
  br label %114

96:                                               ; preds = %83
  %97 = load i32, ptr %7, align 4, !tbaa !9
  %98 = load i32, ptr %10, align 4, !tbaa !9
  %99 = sub nsw i32 %97, %98
  %100 = call i32 @llvm.abs.i32(i32 %99, i1 true)
  %101 = load i32, ptr %8, align 4, !tbaa !9
  %102 = load i32, ptr %11, align 4, !tbaa !9
  %103 = sub nsw i32 %101, %102
  %104 = call i32 @llvm.abs.i32(i32 %103, i1 true)
  %105 = add nsw i32 %100, %104
  %106 = icmp eq i32 %105, 3
  %107 = load i32, ptr %5, align 4, !tbaa !9
  %108 = sext i32 %107 to i64
  %109 = getelementptr inbounds [401 x [401 x i8]], ptr @e, i64 0, i64 %108
  %110 = load i32, ptr %9, align 4, !tbaa !9
  %111 = sext i32 %110 to i64
  %112 = getelementptr inbounds [401 x i8], ptr %109, i64 0, i64 %111
  %113 = zext i1 %106 to i8
  store i8 %113, ptr %112, align 1, !tbaa !11
  store i32 0, ptr %6, align 4
  br label %114

114:                                              ; preds = %96, %95
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #6
  %115 = load i32, ptr %6, align 4
  switch i32 %115, label %169 [
    i32 0, label %116
    i32 7, label %117
  ]

116:                                              ; preds = %114
  br label %117

117:                                              ; preds = %116, %114
  %118 = load i32, ptr %9, align 4, !tbaa !9
  %119 = add nsw i32 %118, 1
  store i32 %119, ptr %9, align 4, !tbaa !9
  br label %78, !llvm.loop !13

120:                                              ; preds = %82
  store i32 0, ptr %6, align 4
  br label %121

121:                                              ; preds = %120, %76
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #6
  %122 = load i32, ptr %6, align 4
  switch i32 %122, label %169 [
    i32 0, label %123
    i32 4, label %124
  ]

123:                                              ; preds = %121
  br label %124

124:                                              ; preds = %123, %121
  %125 = load i32, ptr %5, align 4, !tbaa !9
  %126 = add nsw i32 %125, 1
  store i32 %126, ptr %5, align 4, !tbaa !9
  br label %59, !llvm.loop !15

127:                                              ; preds = %63
  %128 = load i32, ptr @n, align 4, !tbaa !9
  %129 = sext i32 %128 to i64
  %130 = mul i64 %129, 4
  call void @llvm.memset.p0.i64(ptr align 16 @match, i8 -1, i64 %130, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #6
  store i32 0, ptr %12, align 4, !tbaa !9
  br label %131

131:                                              ; preds = %162, %127
  %132 = load i32, ptr %12, align 4, !tbaa !9
  %133 = load i32, ptr @n, align 4, !tbaa !9
  %134 = icmp slt i32 %132, %133
  br i1 %134, label %136, label %135

135:                                              ; preds = %131
  store i32 8, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #6
  br label %165

136:                                              ; preds = %131
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #6
  %137 = load i32, ptr %12, align 4, !tbaa !9
  %138 = load i32, ptr @c, align 4, !tbaa !9
  %139 = sdiv i32 %137, %138
  store i32 %139, ptr %13, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #6
  %140 = load i32, ptr %12, align 4, !tbaa !9
  %141 = load i32, ptr @c, align 4, !tbaa !9
  %142 = srem i32 %140, %141
  store i32 %142, ptr %14, align 4, !tbaa !9
  %143 = load i32, ptr %13, align 4, !tbaa !9
  %144 = and i32 %143, 1
  %145 = load i32, ptr %14, align 4, !tbaa !9
  %146 = and i32 %145, 1
  %147 = icmp ne i32 %144, %146
  br i1 %147, label %148, label %149

148:                                              ; preds = %136
  store i32 10, ptr %6, align 4
  br label %159

149:                                              ; preds = %136
  %150 = load i32, ptr @n, align 4, !tbaa !9
  %151 = sext i32 %150 to i64
  %152 = mul i64 %151, 1
  call void @llvm.memset.p0.i64(ptr align 16 @vis, i8 0, i64 %152, i1 false)
  %153 = load i32, ptr %12, align 4, !tbaa !9
  %154 = call noundef zeroext i1 @_Z4pathi(i32 noundef %153)
  br i1 %154, label %155, label %158

155:                                              ; preds = %149
  %156 = load i64, ptr %2, align 8, !tbaa !5
  %157 = add nsw i64 %156, 2
  store i64 %157, ptr %2, align 8, !tbaa !5
  br label %158

158:                                              ; preds = %155, %149
  store i32 0, ptr %6, align 4
  br label %159

159:                                              ; preds = %158, %148
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #6
  %160 = load i32, ptr %6, align 4
  switch i32 %160, label %169 [
    i32 0, label %161
    i32 10, label %162
  ]

161:                                              ; preds = %159
  br label %162

162:                                              ; preds = %161, %159
  %163 = load i32, ptr %12, align 4, !tbaa !9
  %164 = add nsw i32 %163, 1
  store i32 %164, ptr %12, align 4, !tbaa !9
  br label %131, !llvm.loop !16

165:                                              ; preds = %135
  %166 = load i64, ptr %2, align 8, !tbaa !5
  %167 = call i32 (ptr, ...) @printf(ptr noundef @.str.1, i64 noundef %166)
  store i32 0, ptr %1, align 4
  store i32 1, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #6
  %168 = load i32, ptr %1, align 4
  ret i32 %168

169:                                              ; preds = %159, %121, %114
  unreachable
}

declare i32 @__isoc99_scanf(ptr noundef, ...) #3

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #4

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.abs.i32(i32, i1 immarg) #5

declare i32 @printf(ptr noundef, ...) #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #5 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@n = external dso_local local_unnamed_addr global i32, align 4
@r = external dso_local global i32, align 4
@c = external dso_local global i32, align 4
@match = external dso_local local_unnamed_addr global [401 x i32], align 16
@e = external dso_local local_unnamed_addr global [401 x [401 x i8]], align 16
@vis = external dso_local local_unnamed_addr global [401 x i8], align 16
@.str = external hidden unnamed_addr constant [5 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [7 x i8], align 1

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z4pathi(i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() local_unnamed_addr #1 {
  %1 = tail call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull @r, ptr noundef nonnull @c)
  %2 = load i32, ptr @r, align 4, !tbaa !5
  %3 = icmp sgt i32 %2, 19
  %.pre = load i32, ptr @c, align 4, !tbaa !5
  br i1 %3, label %4, label %12

4:                                                ; preds = %0
  %5 = add nsw i32 %2, -15
  %6 = udiv i32 %5, 6
  %7 = zext nneg i32 %6 to i64
  %8 = mul nuw nsw i64 %7, 6
  %9 = sext i32 %.pre to i64
  %10 = mul nsw i64 %8, %9
  %.neg = mul nsw i32 %6, -6
  %11 = add nsw i32 %.neg, %2
  store i32 %11, ptr @r, align 4, !tbaa !5
  br label %12

12:                                               ; preds = %4, %0
  %13 = phi i32 [ %11, %4 ], [ %2, %0 ]
  %.0 = phi i64 [ %10, %4 ], [ 0, %0 ]
  %14 = icmp sgt i32 %.pre, 19
  br i1 %14, label %15, label %24

15:                                               ; preds = %12
  %16 = add nsw i32 %.pre, -15
  %17 = udiv i32 %16, 6
  %18 = zext nneg i32 %17 to i64
  %19 = mul nuw nsw i64 %18, 6
  %20 = sext i32 %13 to i64
  %21 = mul nsw i64 %19, %20
  %22 = add nsw i64 %21, %.0
  %.neg41 = mul nsw i32 %17, -6
  %23 = add nsw i32 %.neg41, %.pre
  store i32 %23, ptr @c, align 4, !tbaa !5
  br label %24

24:                                               ; preds = %15, %12
  %.pre59 = phi i32 [ %23, %15 ], [ %.pre, %12 ]
  %.1 = phi i64 [ %22, %15 ], [ %.0, %12 ]
  %25 = mul nsw i32 %.pre59, %13
  store i32 %25, ptr @n, align 4, !tbaa !5
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(160801) @e, i8 0, i64 160801, i1 false)
  %26 = icmp sgt i32 %25, 0
  br i1 %26, label %.lr.ph46.split.us.preheader, label %._crit_edge.thread

._crit_edge.thread:                               ; preds = %24
  %27 = sext i32 %25 to i64
  %28 = shl nsw i64 %27, 2
  tail call void @llvm.memset.p0.i64(ptr nonnull align 16 @match, i8 -1, i64 %28, i1 false)
  br label %._crit_edge50

.lr.ph46.split.us.preheader:                      ; preds = %24
  %wide.trip.count56 = zext nneg i32 %25 to i64
  br label %.lr.ph46.split.us

.lr.ph46.split.us:                                ; preds = %.lr.ph46.split.us.preheader, %..loopexit_crit_edge.us
  %indvars.iv53 = phi i64 [ 0, %.lr.ph46.split.us.preheader ], [ %indvars.iv.next54, %..loopexit_crit_edge.us ]
  %29 = trunc nuw nsw i64 %indvars.iv53 to i32
  %30 = sdiv i32 %29, %.pre59
  %31 = srem i32 %29, %.pre59
  %32 = xor i32 %31, %30
  %33 = and i32 %32, 1
  %.not42.us = icmp eq i32 %33, 0
  br i1 %.not42.us, label %.preheader.us, label %..loopexit_crit_edge.us

..loopexit_crit_edge.us:                          ; preds = %49, %.lr.ph46.split.us
  %indvars.iv.next54 = add nuw nsw i64 %indvars.iv53, 1
  %exitcond57.not = icmp eq i64 %indvars.iv.next54, %wide.trip.count56
  br i1 %exitcond57.not, label %._crit_edge, label %.lr.ph46.split.us, !llvm.loop !9

.preheader.us:                                    ; preds = %.lr.ph46.split.us, %49
  %indvars.iv = phi i64 [ %indvars.iv.next, %49 ], [ 0, %.lr.ph46.split.us ]
  %34 = trunc nuw nsw i64 %indvars.iv to i32
  %35 = sdiv i32 %34, %.pre59
  %36 = srem i32 %34, %.pre59
  %37 = xor i32 %36, %35
  %38 = and i32 %37, 1
  %39 = icmp eq i32 %38, 0
  br i1 %39, label %49, label %40

40:                                               ; preds = %.preheader.us
  %41 = sub nsw i32 %30, %35
  %42 = tail call i32 @llvm.abs.i32(i32 %41, i1 true)
  %43 = sub nsw i32 %31, %36
  %44 = tail call i32 @llvm.abs.i32(i32 %43, i1 true)
  %45 = add nuw nsw i32 %44, %42
  %46 = icmp eq i32 %45, 3
  %47 = getelementptr inbounds [401 x [401 x i8]], ptr @e, i64 0, i64 %indvars.iv53, i64 %indvars.iv
  %48 = zext i1 %46 to i8
  store i8 %48, ptr %47, align 1, !tbaa !11
  br label %49

49:                                               ; preds = %40, %.preheader.us
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count56
  br i1 %exitcond.not, label %..loopexit_crit_edge.us, label %.preheader.us, !llvm.loop !13

._crit_edge:                                      ; preds = %..loopexit_crit_edge.us
  %50 = zext nneg i32 %25 to i64
  %51 = shl nuw nsw i64 %50, 2
  tail call void @llvm.memset.p0.i64(ptr nonnull align 16 @match, i8 -1, i64 %51, i1 false)
  br i1 %26, label %.lr.ph, label %._crit_edge50

._crit_edge50:                                    ; preds = %63, %._crit_edge.thread, %._crit_edge
  %.2.lcssa = phi i64 [ %.1, %._crit_edge ], [ %.1, %._crit_edge.thread ], [ %.4, %63 ]
  %52 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1, i64 noundef %.2.lcssa)
  ret i32 0

.lr.ph:                                           ; preds = %._crit_edge, %63
  %53 = phi i32 [ %64, %63 ], [ %25, %._crit_edge ]
  %54 = phi i32 [ %65, %63 ], [ %.pre59, %._crit_edge ]
  %.248 = phi i64 [ %.4, %63 ], [ %.1, %._crit_edge ]
  %.03447 = phi i32 [ %66, %63 ], [ 0, %._crit_edge ]
  %55 = sdiv i32 %.03447, %54
  %56 = srem i32 %.03447, %54
  %57 = xor i32 %56, %55
  %58 = and i32 %57, 1
  %.not = icmp eq i32 %58, 0
  br i1 %.not, label %59, label %63

59:                                               ; preds = %.lr.ph
  %60 = sext i32 %53 to i64
  tail call void @llvm.memset.p0.i64(ptr nonnull align 16 @vis, i8 0, i64 %60, i1 false)
  %61 = tail call noundef zeroext i1 @_Z4pathi(i32 noundef %.03447)
  %62 = add nsw i64 %.248, 2
  %spec.select = select i1 %61, i64 %62, i64 %.248
  %.pre58 = load i32, ptr @c, align 4, !tbaa !5
  %.pre60 = load i32, ptr @n, align 4, !tbaa !5
  br label %63

63:                                               ; preds = %.lr.ph, %59
  %64 = phi i32 [ %.pre60, %59 ], [ %53, %.lr.ph ]
  %65 = phi i32 [ %.pre58, %59 ], [ %54, %.lr.ph ]
  %.4 = phi i64 [ %spec.select, %59 ], [ %.248, %.lr.ph ]
  %66 = add nuw nsw i32 %.03447, 1
  %67 = icmp slt i32 %66, %64
  br i1 %67, label %.lr.ph, label %._crit_edge50, !llvm.loop !14
}

; Function Attrs: nofree nounwind
declare noundef i32 @__isoc99_scanf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.abs.i32(i32, i1 immarg) #4

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass