; LLVM IR from intel/intel-ipsec-mb :: lib/sse_t1 (mb_mgr_sse)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.IMB_MGR = type { i64, i64, [4 x i64], [7 x i8], i8, i32, i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, [256 x %struct.IMB_JOB], ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr }
%struct.IMB_JOB = type { ptr, ptr, i64, %union.anon, %union.anon.0, %union.anon.1, %union.anon.2, i64, %union.anon.3, ptr, i64, ptr, i64, %union.anon.4, i32, i32, i32, i32, i32, ptr, ptr, ptr, ptr, i32, %union.anon.5, [2 x i32], i32 }
%union.anon = type { ptr }
%union.anon.0 = type { ptr }
%union.anon.1 = type { i64 }
%union.anon.2 = type { i64 }
%union.anon.3 = type { i64 }
%union.anon.4 = type { %struct._AES_XCBC_specific_fields }
%struct._AES_XCBC_specific_fields = type { ptr, ptr, ptr }
%union.anon.5 = type { %struct._CBCS_specific_fields }
%struct._CBCS_specific_fields = type { ptr }

; Function Attrs: nounwind uwtable
define hidden void @init_mb_mgr_sse_internal(ptr noundef %0, i32 noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  %5 = load ptr, ptr %3, align 8, !tbaa !5
  %6 = getelementptr inbounds %struct.IMB_MGR, ptr %5, i32 0, i32 1
  %7 = load i64, ptr %6, align 8, !tbaa !11
  %8 = and i64 %7, 30
  %9 = icmp ne i64 %8, 30
  br i1 %9, label %10, label %12

10:                                               ; preds = %2
  %11 = load ptr, ptr %3, align 8, !tbaa !5
  call void @imb_set_errno(ptr noundef %11, i32 noundef 2045)
  br label %42

12:                                               ; preds = %2
  %13 = load ptr, ptr %3, align 8, !tbaa !5
  %14 = getelementptr inbounds %struct.IMB_MGR, ptr %13, i32 0, i32 0
  %15 = load i64, ptr %14, align 8, !tbaa !14
  %16 = call i64 @cpu_feature_detect()
  %17 = call i64 @cpu_feature_adjust(i64 noundef %15, i64 noundef %16)
  %18 = load ptr, ptr %3, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.IMB_MGR, ptr %18, i32 0, i32 1
  store i64 %17, ptr %19, align 8, !tbaa !11
  %20 = load ptr, ptr %3, align 8, !tbaa !5
  call void @imb_set_errno(ptr noundef %20, i32 noundef 0)
  %21 = load ptr, ptr %3, align 8, !tbaa !5
  %22 = getelementptr inbounds %struct.IMB_MGR, ptr %21, i32 0, i32 1
  %23 = load i64, ptr %22, align 8, !tbaa !11
  %24 = and i64 %23, 65567
  %25 = icmp eq i64 %24, 65567
  br i1 %25, label %26, label %29

26:                                               ; preds = %12
  %27 = load ptr, ptr %3, align 8, !tbaa !5
  %28 = load i32, ptr %4, align 4, !tbaa !9
  call void @init_mb_mgr_sse_t3_internal(ptr noundef %27, i32 noundef %28)
  br label %42

29:                                               ; preds = %12
  %30 = load ptr, ptr %3, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.IMB_MGR, ptr %30, i32 0, i32 1
  %32 = load i64, ptr %31, align 8, !tbaa !11
  %33 = and i64 %32, 31
  %34 = icmp eq i64 %33, 31
  br i1 %34, label %35, label %38

35:                                               ; preds = %29
  %36 = load ptr, ptr %3, align 8, !tbaa !5
  %37 = load i32, ptr %4, align 4, !tbaa !9
  call void @init_mb_mgr_sse_t2_internal(ptr noundef %36, i32 noundef %37)
  br label %41

38:                                               ; preds = %29
  %39 = load ptr, ptr %3, align 8, !tbaa !5
  %40 = load i32, ptr %4, align 4, !tbaa !9
  call void @init_mb_mgr_sse_t1_internal(ptr noundef %39, i32 noundef %40)
  br label %41

41:                                               ; preds = %38, %35
  br label %42

42:                                               ; preds = %41, %26, %10
  ret void
}

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @imb_set_errno(ptr noundef, i32 noundef) #1

declare hidden i64 @cpu_feature_adjust(i64 noundef, i64 noundef) #2

declare hidden i64 @cpu_feature_detect() #2

declare hidden void @init_mb_mgr_sse_t3_internal(ptr noundef, i32 noundef) #2

declare hidden void @init_mb_mgr_sse_t2_internal(ptr noundef, i32 noundef) #2

declare hidden void @init_mb_mgr_sse_t1_internal(ptr noundef, i32 noundef) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !13, i64 8}
!12 = !{!"IMB_MGR", !13, i64 0, !13, i64 8, !7, i64 16, !7, i64 48, !7, i64 55, !10, i64 56, !10, i64 60, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !6, i64 120, !6, i64 128, !6, i64 136, !6, i64 144, !6, i64 152, !6, i64 160, !6, i64 168, !6, i64 176, !6, i64 184, !6, i64 192, !6, i64 200, !6, i64 208, !6, i64 216, !6, i64 224, !6, i64 232, !6, i64 240, !6, i64 248, !6, i64 256, !6, i64 264, !6, i64 272, !6, i64 280, !6, i64 288, !6, i64 296, !6, i64 304, !6, i64 312, !6, i64 320, !6, i64 328, !6, i64 336, !6, i64 344, !6, i64 352, !6, i64 360, !6, i64 368, !6, i64 376, !6, i64 384, !6, i64 392, !6, i64 400, !6, i64 408, !6, i64 416, !6, i64 424, !6, i64 432, !6, i64 440, !6, i64 448, !6, i64 456, !6, i64 464, !6, i64 472, !6, i64 480, !6, i64 488, !6, i64 496, !6, i64 504, !6, i64 512, !6, i64 520, !6, i64 528, !6, i64 536, !6, i64 544, !6, i64 552, !6, i64 560, !6, i64 568, !6, i64 576, !6, i64 584, !6, i64 592, !6, i64 600, !6, i64 608, !6, i64 616, !6, i64 624, !6, i64 632, !6, i64 640, !6, i64 648, !6, i64 656, !6, i64 664, !6, i64 672, !6, i64 680, !6, i64 688, !6, i64 696, !6, i64 704, !6, i64 712, !6, i64 720, !6, i64 728, !6, i64 736, !6, i64 744, !6, i64 752, !6, i64 760, !6, i64 768, !6, i64 776, !6, i64 784, !6, i64 792, !6, i64 800, !6, i64 808, !6, i64 816, !6, i64 824, !6, i64 832, !6, i64 840, !6, i64 848, !6, i64 856, !6, i64 864, !6, i64 872, !6, i64 880, !6, i64 888, !6, i64 896, !6, i64 904, !6, i64 912, !6, i64 920, !6, i64 928, !6, i64 936, !6, i64 944, !6, i64 952, !6, i64 960, !6, i64 968, !6, i64 976, !6, i64 984, !6, i64 992, !6, i64 1000, !6, i64 1008, !6, i64 1016, !6, i64 1024, !6, i64 1032, !6, i64 1040, !6, i64 1048, !6, i64 1056, !6, i64 1064, !6, i64 1072, !6, i64 1080, !6, i64 1088, !6, i64 1096, !10, i64 1104, !10, i64 1108, !7, i64 1112, !6, i64 56408, !6, i64 56416, !6, i64 56424, !6, i64 56432, !6, i64 56440, !6, i64 56448, !6, i64 56456, !6, i64 56464, !6, i64 56472, !6, i64 56480, !6, i64 56488, !6, i64 56496, !6, i64 56504, !6, i64 56512, !6, i64 56520, !6, i64 56528, !6, i64 56536, !6, i64 56544, !6, i64 56552, !6, i64 56560, !6, i64 56568, !6, i64 56576, !6, i64 56584, !6, i64 56592, !6, i64 56600, !6, i64 56608, !6, i64 56616, !6, i64 56624, !6, i64 56632, !6, i64 56640, !6, i64 56648, !6, i64 56656, !6, i64 56664, !6, i64 56672, !6, i64 56680, !6, i64 56688, !6, i64 56696, !6, i64 56704, !6, i64 56712, !6, i64 56720, !6, i64 56728, !6, i64 56736}
!13 = !{!"long", !7, i64 0}
!14 = !{!12, !13, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define hidden void @init_mb_mgr_sse_internal(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = getelementptr inbounds i8, ptr %0, i64 8
  %4 = load i64, ptr %3, align 8, !tbaa !5
  %5 = and i64 %4, 30
  %.not = icmp eq i64 %5, 30
  br i1 %.not, label %7, label %6

6:                                                ; preds = %2
  tail call void @imb_set_errno(ptr noundef nonnull %0, i32 noundef 2045)
  br label %20

7:                                                ; preds = %2
  %8 = load i64, ptr %0, align 8, !tbaa !12
  %9 = tail call i64 @cpu_feature_detect() #3
  %10 = tail call i64 @cpu_feature_adjust(i64 noundef %8, i64 noundef %9) #3
  store i64 %10, ptr %3, align 8, !tbaa !5
  tail call void @imb_set_errno(ptr noundef nonnull %0, i32 noundef 0)
  %11 = load i64, ptr %3, align 8, !tbaa !5
  %12 = and i64 %11, 65567
  %13 = icmp eq i64 %12, 65567
  br i1 %13, label %14, label %15

14:                                               ; preds = %7
  tail call void @init_mb_mgr_sse_t3_internal(ptr noundef nonnull %0, i32 noundef %1) #3
  br label %20

15:                                               ; preds = %7
  %16 = and i64 %11, 31
  %17 = icmp eq i64 %16, 31
  br i1 %17, label %18, label %19

18:                                               ; preds = %15
  tail call void @init_mb_mgr_sse_t2_internal(ptr noundef nonnull %0, i32 noundef %1) #3
  br label %20

19:                                               ; preds = %15
  tail call void @init_mb_mgr_sse_t1_internal(ptr noundef nonnull %0, i32 noundef %1) #3
  br label %20

20:                                               ; preds = %18, %19, %14, %6
  ret void
}

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @imb_set_errno(ptr noundef, i32 noundef) local_unnamed_addr #1

declare hidden i64 @cpu_feature_adjust(i64 noundef, i64 noundef) local_unnamed_addr #2

declare hidden i64 @cpu_feature_detect() local_unnamed_addr #2

declare hidden void @init_mb_mgr_sse_t3_internal(ptr noundef, i32 noundef) local_unnamed_addr #2

declare hidden void @init_mb_mgr_sse_t2_internal(ptr noundef, i32 noundef) local_unnamed_addr #2

declare hidden void @init_mb_mgr_sse_t1_internal(ptr noundef, i32 noundef) local_unnamed_addr #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"IMB_MGR", !7, i64 0, !7, i64 8, !8, i64 16, !8, i64 48, !8, i64 55, !10, i64 56, !10, i64 60, !11, i64 64, !11, i64 72, !11, i64 80, !11, i64 88, !11, i64 96, !11, i64 104, !11, i64 112, !11, i64 120, !11, i64 128, !11, i64 136, !11, i64 144, !11, i64 152, !11, i64 160, !11, i64 168, !11, i64 176, !11, i64 184, !11, i64 192, !11, i64 200, !11, i64 208, !11, i64 216, !11, i64 224, !11, i64 232, !11, i64 240, !11, i64 248, !11, i64 256, !11, i64 264, !11, i64 272, !11, i64 280, !11, i64 288, !11, i64 296, !11, i64 304, !11, i64 312, !11, i64 320, !11, i64 328, !11, i64 336, !11, i64 344, !11, i64 352, !11, i64 360, !11, i64 368, !11, i64 376, !11, i64 384, !11, i64 392, !11, i64 400, !11, i64 408, !11, i64 416, !11, i64 424, !11, i64 432, !11, i64 440, !11, i64 448, !11, i64 456, !11, i64 464, !11, i64 472, !11, i64 480, !11, i64 488, !11, i64 496, !11, i64 504, !11, i64 512, !11, i64 520, !11, i64 528, !11, i64 536, !11, i64 544, !11, i64 552, !11, i64 560, !11, i64 568, !11, i64 576, !11, i64 584, !11, i64 592, !11, i64 600, !11, i64 608, !11, i64 616, !11, i64 624, !11, i64 632, !11, i64 640, !11, i64 648, !11, i64 656, !11, i64 664, !11, i64 672, !11, i64 680, !11, i64 688, !11, i64 696, !11, i64 704, !11, i64 712, !11, i64 720, !11, i64 728, !11, i64 736, !11, i64 744, !11, i64 752, !11, i64 760, !11, i64 768, !11, i64 776, !11, i64 784, !11, i64 792, !11, i64 800, !11, i64 808, !11, i64 816, !11, i64 824, !11, i64 832, !11, i64 840, !11, i64 848, !11, i64 856, !11, i64 864, !11, i64 872, !11, i64 880, !11, i64 888, !11, i64 896, !11, i64 904, !11, i64 912, !11, i64 920, !11, i64 928, !11, i64 936, !11, i64 944, !11, i64 952, !11, i64 960, !11, i64 968, !11, i64 976, !11, i64 984, !11, i64 992, !11, i64 1000, !11, i64 1008, !11, i64 1016, !11, i64 1024, !11, i64 1032, !11, i64 1040, !11, i64 1048, !11, i64 1056, !11, i64 1064, !11, i64 1072, !11, i64 1080, !11, i64 1088, !11, i64 1096, !10, i64 1104, !10, i64 1108, !8, i64 1112, !11, i64 56408, !11, i64 56416, !11, i64 56424, !11, i64 56432, !11, i64 56440, !11, i64 56448, !11, i64 56456, !11, i64 56464, !11, i64 56472, !11, i64 56480, !11, i64 56488, !11, i64 56496, !11, i64 56504, !11, i64 56512, !11, i64 56520, !11, i64 56528, !11, i64 56536, !11, i64 56544, !11, i64 56552, !11, i64 56560, !11, i64 56568, !11, i64 56576, !11, i64 56584, !11, i64 56592, !11, i64 56600, !11, i64 56608, !11, i64 56616, !11, i64 56624, !11, i64 56632, !11, i64 56640, !11, i64 56648, !11, i64 56656, !11, i64 56664, !11, i64 56672, !11, i64 56680, !11, i64 56688, !11, i64 56696, !11, i64 56704, !11, i64 56712, !11, i64 56720, !11, i64 56728, !11, i64 56736}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!6, !7, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass