; LLVM IR from shupx/swarm_sync_sim :: src/fw_plane_sim/src/px4_lib/parameters (px4_parameters)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<param_info_s, std::allocator<param_info_s>>::_Vector_impl" }
%"struct.std::_Vector_base<param_info_s, std::allocator<param_info_s>>::_Vector_impl" = type { %"struct.std::_Vector_base<param_info_s, std::allocator<param_info_s>>::_Vector_impl_data" }
%"struct.std::_Vector_base<param_info_s, std::allocator<param_info_s>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<std::vector<param_info_s>, std::allocator<std::vector<param_info_s>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<param_info_s>, std::allocator<std::vector<param_info_s>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<param_info_s>, std::allocator<std::vector<param_info_s>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<param_info_s>, std::allocator<std::vector<param_info_s>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@_ZN3px418parameters_defaultE = external dso_local global %"class.std::vector", align 8
@_ZN3px418parameters_vectorsE = external dso_local global %"class.std::vector.0", align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN3px427allocate_px4_params_storageEi(i32 noundef %0) #0 {
  %2 = alloca i32, align 4
  store i32 %0, ptr %2, align 4, !tbaa !5
  br label %3

3:                                                ; preds = %8, %1
  %4 = call noundef i64 @_ZNKSt6vectorIS_I12param_info_sSaIS0_EESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @_ZN3px418parameters_vectorsE) #2
  %5 = load i32, ptr %2, align 4, !tbaa !5
  %6 = sext i32 %5 to i64
  %7 = icmp ult i64 %4, %6
  br i1 %7, label %8, label %10

8:                                                ; preds = %3
  %9 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_I12param_info_sSaIS0_EESaIS2_EE12emplace_backIJRS2_EEES6_DpOT_(ptr noundef nonnull align 8 dereferenceable(24) @_ZN3px418parameters_vectorsE, ptr noundef nonnull align 8 dereferenceable(24) @_ZN3px418parameters_defaultE)
  br label %3, !llvm.loop !9

10:                                               ; preds = %3
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_I12param_info_sSaIS0_EESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_I12param_info_sSaIS0_EESaIS2_EE12emplace_backIJRS2_EEES6_DpOT_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<param_info_s, std::allocator<param_info_s>>::_Vector_impl" }
%"struct.std::_Vector_base<param_info_s, std::allocator<param_info_s>>::_Vector_impl" = type { %"struct.std::_Vector_base<param_info_s, std::allocator<param_info_s>>::_Vector_impl_data" }
%"struct.std::_Vector_base<param_info_s, std::allocator<param_info_s>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<std::vector<param_info_s>, std::allocator<std::vector<param_info_s>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<param_info_s>, std::allocator<std::vector<param_info_s>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<param_info_s>, std::allocator<std::vector<param_info_s>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<param_info_s>, std::allocator<std::vector<param_info_s>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@_ZN3px418parameters_defaultE = external dso_local global %"class.std::vector", align 8
@_ZN3px418parameters_vectorsE = external dso_local global %"class.std::vector.0", align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN3px427allocate_px4_params_storageEi(i32 noundef %0) local_unnamed_addr #0 {
  %2 = tail call noundef i64 @_ZNKSt6vectorIS_I12param_info_sSaIS0_EESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @_ZN3px418parameters_vectorsE) #2
  %3 = sext i32 %0 to i64
  %4 = icmp ult i64 %2, %3
  br i1 %4, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %1, %.lr.ph
  %5 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_I12param_info_sSaIS0_EESaIS2_EE12emplace_backIJRS2_EEES6_DpOT_(ptr noundef nonnull align 8 dereferenceable(24) @_ZN3px418parameters_vectorsE, ptr noundef nonnull align 8 dereferenceable(24) @_ZN3px418parameters_defaultE)
  %6 = tail call noundef i64 @_ZNKSt6vectorIS_I12param_info_sSaIS0_EESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @_ZN3px418parameters_vectorsE) #2
  %7 = icmp ult i64 %6, %3
  br i1 %7, label %.lr.ph, label %._crit_edge, !llvm.loop !5

._crit_edge:                                      ; preds = %.lr.ph, %1
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_I12param_info_sSaIS0_EESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_I12param_info_sSaIS0_EESaIS2_EE12emplace_backIJRS2_EEES6_DpOT_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: GlobalOptPass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass