; LLVM IR from tangjz/acm-icpc :: lydsy/1607.ll (Z5printi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5printi(i32 noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca [5 x i32], align 16
  store i32 %0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  store i32 0, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 20, ptr %4) #3
  br label %5

5:                                                ; preds = %15, %1
  %6 = load i32, ptr %2, align 4, !tbaa !5
  %7 = icmp ne i32 %6, 0
  br i1 %7, label %8, label %18

8:                                                ; preds = %5
  %9 = load i32, ptr %2, align 4, !tbaa !5
  %10 = srem i32 %9, 10
  %11 = load i32, ptr %3, align 4, !tbaa !5
  %12 = add nsw i32 %11, 1
  store i32 %12, ptr %3, align 4, !tbaa !5
  %13 = sext i32 %11 to i64
  %14 = getelementptr inbounds [5 x i32], ptr %4, i64 0, i64 %13
  store i32 %10, ptr %14, align 4, !tbaa !5
  br label %15

15:                                               ; preds = %8
  %16 = load i32, ptr %2, align 4, !tbaa !5
  %17 = sdiv i32 %16, 10
  store i32 %17, ptr %2, align 4, !tbaa !5
  br label %5, !llvm.loop !9

18:                                               ; preds = %5
  %19 = load i32, ptr %3, align 4, !tbaa !5
  %20 = icmp ne i32 %19, 0
  br i1 %20, label %26, label %21

21:                                               ; preds = %18
  %22 = load i32, ptr %3, align 4, !tbaa !5
  %23 = add nsw i32 %22, 1
  store i32 %23, ptr %3, align 4, !tbaa !5
  %24 = sext i32 %22 to i64
  %25 = getelementptr inbounds [5 x i32], ptr %4, i64 0, i64 %24
  store i32 0, ptr %25, align 4, !tbaa !5
  br label %26

26:                                               ; preds = %21, %18
  br label %27

27:                                               ; preds = %30, %26
  %28 = load i32, ptr %3, align 4, !tbaa !5
  %29 = icmp ne i32 %28, 0
  br i1 %29, label %30, label %38

30:                                               ; preds = %27
  %31 = load i32, ptr %3, align 4, !tbaa !5
  %32 = add nsw i32 %31, -1
  store i32 %32, ptr %3, align 4, !tbaa !5
  %33 = sext i32 %32 to i64
  %34 = getelementptr inbounds [5 x i32], ptr %4, i64 0, i64 %33
  %35 = load i32, ptr %34, align 4, !tbaa !5
  %36 = add nsw i32 48, %35
  %37 = call i32 @putchar(i32 noundef %36)
  br label %27, !llvm.loop !11

38:                                               ; preds = %27
  %39 = call i32 @putchar(i32 noundef 10)
  call void @llvm.lifetime.end.p0(i64 20, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress uwtable
declare i32 @putchar(i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree nounwind uwtable
define dso_local void @_Z5printi(i32 noundef %0) local_unnamed_addr #0 {
  %2 = alloca [5 x i32], align 16
  call void @llvm.lifetime.start.p0(i64 20, ptr nonnull %2) #3
  %.not11 = icmp eq i32 %0, 0
  br i1 %.not11, label %._crit_edge.thread, label %.lr.ph

.lr.ph:                                           ; preds = %1, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %1 ]
  %.0812 = phi i32 [ %5, %.lr.ph ], [ %0, %1 ]
  %3 = srem i32 %.0812, 10
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %4 = getelementptr inbounds [5 x i32], ptr %2, i64 0, i64 %indvars.iv
  store i32 %3, ptr %4, align 4, !tbaa !5
  %5 = sdiv i32 %.0812, 10
  %.0812.off = add i32 %.0812, 9
  %.not = icmp ult i32 %.0812.off, 19
  br i1 %.not, label %._crit_edge, label %.lr.ph, !llvm.loop !9

._crit_edge:                                      ; preds = %.lr.ph
  %6 = shl i64 %indvars.iv.next, 32
  %7 = ashr exact i64 %6, 32
  br label %.preheader

._crit_edge.thread:                               ; preds = %1
  store i32 0, ptr %2, align 16, !tbaa !5
  br label %.preheader

.preheader:                                       ; preds = %._crit_edge, %._crit_edge.thread
  %indvars.iv16.ph = phi i64 [ 1, %._crit_edge.thread ], [ %7, %._crit_edge ]
  br label %8

8:                                                ; preds = %.preheader, %8
  %indvars.iv16 = phi i64 [ %indvars.iv.next17, %8 ], [ %indvars.iv16.ph, %.preheader ]
  %indvars.iv.next17 = add nsw i64 %indvars.iv16, -1
  %9 = getelementptr inbounds [5 x i32], ptr %2, i64 0, i64 %indvars.iv.next17
  %10 = load i32, ptr %9, align 4, !tbaa !5
  %11 = add nsw i32 %10, 48
  %12 = tail call i32 @putchar(i32 noundef %11)
  %.not10 = icmp eq i64 %indvars.iv.next17, 0
  br i1 %.not10, label %13, label %8, !llvm.loop !11

13:                                               ; preds = %8
  %14 = tail call i32 @putchar(i32 noundef 10)
  call void @llvm.lifetime.end.p0(i64 20, ptr nonnull %2) #3
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nofree nounwind uwtable
declare noundef i32 @putchar(i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nofree nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nofree nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass