; LLVM IR from CRAFT-THU/BSim :: src/synapse/static/StaticSynapse.ll (ZN13StaticSynapse5resetER7SimInfo)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.SimInfo = type { i32, float, %"class.std::vector", %"class.std::vector.3" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl" }
%"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl" = type { %"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl_data" }
%"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.StaticSynapse = type { %class.SynapseBase.base, float, float, %"class.std::__cxx11::list" }
%class.SynapseBase.base = type <{ %class.Base, ptr, float, i32, i8 }>
%class.Base = type { ptr, i32, i32 }
%"class.std::__cxx11::list" = type { %"class.std::__cxx11::_List_base" }
%"class.std::__cxx11::_List_base" = type { %"struct.std::__cxx11::_List_base<int, std::allocator<int>>::_List_impl" }
%"struct.std::__cxx11::_List_base<int, std::allocator<int>>::_List_impl" = type { %"struct.std::__detail::_List_node_header" }
%"struct.std::__detail::_List_node_header" = type { %"struct.std::__detail::_List_node_base", i64 }
%"struct.std::__detail::_List_node_base" = type { ptr, ptr }
%class.SynapseBase = type <{ %class.Base, ptr, float, i32, i8, [7 x i8] }>

@.str = external hidden unnamed_addr constant [61 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [85 x i8], align 1
@__PRETTY_FUNCTION__._ZN13StaticSynapse5resetER7SimInfo = external hidden unnamed_addr constant [44 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN13StaticSynapse5resetER7SimInfo(ptr noundef nonnull align 8 dereferenceable(72) %0, ptr noundef nonnull align 8 dereferenceable(56) %1) unnamed_addr #0 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca float, align 4
  %6 = alloca float, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %7 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #7
  %8 = load ptr, ptr %4, align 8, !tbaa !5
  %9 = getelementptr inbounds %struct.SimInfo, ptr %8, i32 0, i32 1
  %10 = load float, ptr %9, align 4, !tbaa !9
  store float %10, ptr %5, align 4, !tbaa !21
  %11 = getelementptr inbounds %class.StaticSynapse, ptr %7, i32 0, i32 1
  %12 = load float, ptr %11, align 4, !tbaa !22
  %13 = load float, ptr %5, align 4, !tbaa !21
  %14 = fdiv float %12, %13
  %15 = call noundef float @_ZSt5roundf(float noundef %14)
  %16 = fptosi float %15 to i32
  %17 = getelementptr inbounds %class.SynapseBase, ptr %7, i32 0, i32 3
  store i32 %16, ptr %17, align 4, !tbaa !33
  %18 = getelementptr inbounds %class.StaticSynapse, ptr %7, i32 0, i32 2
  %19 = load float, ptr %18, align 8, !tbaa !34
  %20 = call noundef float @_ZSt4fabsf(float noundef %19)
  %21 = fcmp ogt float %20, 0x3DDB7CDFE0000000
  br i1 %21, label %33, label %22

22:                                               ; preds = %2
  %23 = getelementptr inbounds %class.StaticSynapse, ptr %7, i32 0, i32 1
  %24 = load float, ptr %23, align 4, !tbaa !22
  %25 = load float, ptr %5, align 4, !tbaa !21
  %26 = getelementptr inbounds %class.SynapseBase, ptr %7, i32 0, i32 3
  %27 = load i32, ptr %26, align 4, !tbaa !33
  %28 = sitofp i32 %27 to float
  %29 = fneg float %25
  %30 = call float @llvm.fmuladd.f32(float %29, float %28, float %24)
  %31 = call noundef float @_ZSt4fabsf(float noundef %30)
  %32 = fcmp olt float %31, 0x3DDB7CDFE0000000
  br label %33

33:                                               ; preds = %22, %2
  %34 = phi i1 [ true, %2 ], [ %32, %22 ]
  br i1 %34, label %35, label %36

35:                                               ; preds = %33
  br label %38

36:                                               ; preds = %33
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 47, ptr noundef @__PRETTY_FUNCTION__._ZN13StaticSynapse5resetER7SimInfo) #8
  unreachable

37:                                               ; No predecessors!
  br label %38

38:                                               ; preds = %37, %35
  %39 = getelementptr inbounds %class.StaticSynapse, ptr %7, i32 0, i32 2
  %40 = load float, ptr %39, align 8, !tbaa !34
  %41 = call noundef float @_ZSt4fabsf(float noundef %40)
  %42 = fcmp ogt float %41, 0x3DDB7CDFE0000000
  br i1 %42, label %43, label %73

43:                                               ; preds = %38
  %44 = getelementptr inbounds %class.StaticSynapse, ptr %7, i32 0, i32 1
  %45 = load float, ptr %44, align 4, !tbaa !22
  %46 = load float, ptr %5, align 4, !tbaa !21
  %47 = getelementptr inbounds %class.SynapseBase, ptr %7, i32 0, i32 3
  %48 = load i32, ptr %47, align 4, !tbaa !33
  %49 = sitofp i32 %48 to float
  %50 = fneg float %46
  %51 = call float @llvm.fmuladd.f32(float %50, float %49, float %45)
  %52 = call noundef float @_ZSt4fabsf(float noundef %51)
  %53 = fcmp ogt float %52, 0x3DDB7CDFE0000000
  br i1 %53, label %54, label %73

54:                                               ; preds = %43
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #7
  %55 = getelementptr inbounds %class.StaticSynapse, ptr %7, i32 0, i32 1
  %56 = load float, ptr %55, align 4, !tbaa !22
  %57 = load float, ptr %5, align 4, !tbaa !21
  %58 = getelementptr inbounds %class.SynapseBase, ptr %7, i32 0, i32 3
  %59 = load i32, ptr %58, align 4, !tbaa !33
  %60 = sitofp i32 %59 to float
  %61 = fneg float %57
  %62 = call float @llvm.fmuladd.f32(float %61, float %60, float %56)
  %63 = fneg float %62
  %64 = getelementptr inbounds %class.StaticSynapse, ptr %7, i32 0, i32 2
  %65 = load float, ptr %64, align 8, !tbaa !34
  %66 = fdiv float %63, %65
  %67 = call float @expf(float noundef %66) #7, !tbaa !35
  store float %67, ptr %6, align 4, !tbaa !21
  %68 = getelementptr inbounds %class.SynapseBase, ptr %7, i32 0, i32 2
  %69 = load float, ptr %68, align 8, !tbaa !36
  %70 = load float, ptr %6, align 4, !tbaa !21
  %71 = fmul float %69, %70
  %72 = getelementptr inbounds %class.SynapseBase, ptr %7, i32 0, i32 2
  store float %71, ptr %72, align 8, !tbaa !36
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #7
  br label %73

73:                                               ; preds = %54, %43, %38
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #7
  ret i32 0
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef float @_ZSt5roundf(float noundef) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef float @_ZSt4fabsf(float noundef) #3

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #4

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #5

; Function Attrs: nounwind
declare float @expf(float noundef) #6

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }
attributes #8 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !12, i64 4}
!10 = !{!"_ZTS7SimInfo", !11, i64 0, !12, i64 4, !13, i64 8, !17, i64 32}
!11 = !{!"int", !7, i64 0}
!12 = !{!"float", !7, i64 0}
!13 = !{!"_ZTSSt6vectorIiSaIiEE", !14, i64 0}
!14 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!17 = !{!"_ZTSSt6vectorIfSaIfEE", !18, i64 0}
!18 = !{!"_ZTSSt12_Vector_baseIfSaIfEE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE12_Vector_implE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!21 = !{!12, !12, i64 0}
!22 = !{!23, !12, i64 36}
!23 = !{!"_ZTS13StaticSynapse", !24, i64 0, !12, i64 36, !12, i64 40, !27, i64 48}
!24 = !{!"_ZTS11SynapseBase", !25, i64 0, !6, i64 16, !12, i64 24, !11, i64 28, !26, i64 32}
!25 = !{!"_ZTS4Base", !11, i64 8, !11, i64 12}
!26 = !{!"bool", !7, i64 0}
!27 = !{!"_ZTSNSt7__cxx114listIiSaIiEEE", !28, i64 0}
!28 = !{!"_ZTSNSt7__cxx1110_List_baseIiSaIiEEE", !29, i64 0}
!29 = !{!"_ZTSNSt7__cxx1110_List_baseIiSaIiEE10_List_implE", !30, i64 0}
!30 = !{!"_ZTSNSt8__detail17_List_node_headerE", !31, i64 0, !32, i64 16}
!31 = !{!"_ZTSNSt8__detail15_List_node_baseE", !6, i64 0, !6, i64 8}
!32 = !{!"long", !7, i64 0}
!33 = !{!24, !11, i64 28}
!34 = !{!23, !12, i64 40}
!35 = !{!11, !11, i64 0}
!36 = !{!24, !12, i64 24}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [61 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [85 x i8], align 1
@__PRETTY_FUNCTION__._ZN13StaticSynapse5resetER7SimInfo = external hidden unnamed_addr constant [44 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_ZN13StaticSynapse5resetER7SimInfo(ptr nocapture noundef nonnull align 8 dereferenceable(72) %0, ptr nocapture noundef nonnull readonly align 8 dereferenceable(56) %1) unnamed_addr #0 align 2 {
  %3 = getelementptr inbounds i8, ptr %1, i64 4
  %4 = load float, ptr %3, align 4, !tbaa !5
  %5 = getelementptr inbounds i8, ptr %0, i64 36
  %6 = load float, ptr %5, align 4, !tbaa !20
  %7 = fdiv float %6, %4
  %8 = tail call noundef float @_ZSt5roundf(float noundef %7)
  %9 = fptosi float %8 to i32
  %10 = getelementptr inbounds i8, ptr %0, i64 28
  store i32 %9, ptr %10, align 4, !tbaa !31
  %11 = getelementptr inbounds i8, ptr %0, i64 40
  %12 = load float, ptr %11, align 8, !tbaa !32
  %13 = tail call noundef float @_ZSt4fabsf(float noundef %12)
  %14 = fcmp ogt float %13, 0x3DDB7CDFE0000000
  br i1 %14, label %.critedge, label %15

15:                                               ; preds = %2
  %16 = load float, ptr %5, align 4, !tbaa !20
  %17 = load i32, ptr %10, align 4, !tbaa !31
  %18 = sitofp i32 %17 to float
  %19 = fneg float %4
  %20 = tail call float @llvm.fmuladd.f32(float %19, float %18, float %16)
  %21 = tail call noundef float @_ZSt4fabsf(float noundef %20)
  %22 = fcmp olt float %21, 0x3DDB7CDFE0000000
  br i1 %22, label %.critedge, label %23

23:                                               ; preds = %15
  tail call void @__assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 47, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN13StaticSynapse5resetER7SimInfo) #5
  unreachable

.critedge:                                        ; preds = %2, %15
  %24 = load float, ptr %11, align 8, !tbaa !32
  %25 = tail call noundef float @_ZSt4fabsf(float noundef %24)
  %26 = fcmp ogt float %25, 0x3DDB7CDFE0000000
  br i1 %26, label %27, label %47

27:                                               ; preds = %.critedge
  %28 = load float, ptr %5, align 4, !tbaa !20
  %29 = load i32, ptr %10, align 4, !tbaa !31
  %30 = sitofp i32 %29 to float
  %31 = fneg float %4
  %32 = tail call float @llvm.fmuladd.f32(float %31, float %30, float %28)
  %33 = tail call noundef float @_ZSt4fabsf(float noundef %32)
  %34 = fcmp ogt float %33, 0x3DDB7CDFE0000000
  br i1 %34, label %35, label %47

35:                                               ; preds = %27
  %36 = load float, ptr %5, align 4, !tbaa !20
  %37 = load i32, ptr %10, align 4, !tbaa !31
  %38 = sitofp i32 %37 to float
  %39 = tail call float @llvm.fmuladd.f32(float %31, float %38, float %36)
  %40 = fneg float %39
  %41 = load float, ptr %11, align 8, !tbaa !32
  %42 = fdiv float %40, %41
  %43 = tail call float @expf(float noundef %42) #6, !tbaa !33
  %44 = getelementptr inbounds i8, ptr %0, i64 24
  %45 = load float, ptr %44, align 8, !tbaa !34
  %46 = fmul float %43, %45
  store float %46, ptr %44, align 8, !tbaa !34
  br label %47

47:                                               ; preds = %35, %27, %.critedge
  ret i32 0
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef float @_ZSt5roundf(float noundef) local_unnamed_addr #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef float @_ZSt4fabsf(float noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #3

; Function Attrs: mustprogress nofree nounwind willreturn memory(write)
declare float @expf(float noundef) local_unnamed_addr #4

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nofree nounwind willreturn memory(write) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { noreturn nounwind }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 4}
!6 = !{!"_ZTS7SimInfo", !7, i64 0, !10, i64 4, !11, i64 8, !16, i64 32}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"float", !8, i64 0}
!11 = !{!"_ZTSSt6vectorIiSaIiEE", !12, i64 0}
!12 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !13, i64 0}
!13 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !14, i64 0}
!14 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !15, i64 0, !15, i64 8, !15, i64 16}
!15 = !{!"any pointer", !8, i64 0}
!16 = !{!"_ZTSSt6vectorIfSaIfEE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIfSaIfEE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE17_Vector_impl_dataE", !15, i64 0, !15, i64 8, !15, i64 16}
!20 = !{!21, !10, i64 36}
!21 = !{!"_ZTS13StaticSynapse", !22, i64 0, !10, i64 36, !10, i64 40, !25, i64 48}
!22 = !{!"_ZTS11SynapseBase", !23, i64 0, !15, i64 16, !10, i64 24, !7, i64 28, !24, i64 32}
!23 = !{!"_ZTS4Base", !7, i64 8, !7, i64 12}
!24 = !{!"bool", !8, i64 0}
!25 = !{!"_ZTSNSt7__cxx114listIiSaIiEEE", !26, i64 0}
!26 = !{!"_ZTSNSt7__cxx1110_List_baseIiSaIiEEE", !27, i64 0}
!27 = !{!"_ZTSNSt7__cxx1110_List_baseIiSaIiEE10_List_implE", !28, i64 0}
!28 = !{!"_ZTSNSt8__detail17_List_node_headerE", !29, i64 0, !30, i64 16}
!29 = !{!"_ZTSNSt8__detail15_List_node_baseE", !15, i64 0, !15, i64 8}
!30 = !{!"long", !8, i64 0}
!31 = !{!22, !7, i64 28}
!32 = !{!21, !10, i64 40}
!33 = !{!7, !7, i64 0}
!34 = !{!22, !10, i64 24}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass