; LLVM IR from tangjz/acm-icpc :: hdu (5252)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Event = type { i64, i64, i64 }

@a = external dso_local global [50010 x %struct.Event], align 16
@t = external dso_local global i32, align 4
@n = external dso_local global i32, align 4
@L = external dso_local global i64, align 8
@R = external dso_local global i64, align 8
@M = external dso_local global i64, align 8
@.str = external hidden unnamed_addr constant [3 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [11 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [16 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [9 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [9 x i8], align 1

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z5checkx(i64 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #2 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  %5 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef @t)
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #5
  store i32 1, ptr %2, align 4, !tbaa !5
  br label %6

6:                                                ; preds = %88, %0
  %7 = load i32, ptr %2, align 4, !tbaa !5
  %8 = load i32, ptr @t, align 4, !tbaa !5
  %9 = icmp sle i32 %7, %8
  br i1 %9, label %11, label %10

10:                                               ; preds = %6
  store i32 2, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #5
  br label %91

11:                                               ; preds = %6
  %12 = load i32, ptr %2, align 4, !tbaa !5
  %13 = call i32 (ptr, ...) @printf(ptr noundef @.str.1, i32 noundef %12)
  %14 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef @n)
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #5
  store i32 0, ptr %4, align 4, !tbaa !5
  br label %15

15:                                               ; preds = %52, %11
  %16 = load i32, ptr %4, align 4, !tbaa !5
  %17 = load i32, ptr @n, align 4, !tbaa !5
  %18 = icmp slt i32 %16, %17
  br i1 %18, label %20, label %19

19:                                               ; preds = %15
  store i32 5, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #5
  br label %55

20:                                               ; preds = %15
  %21 = load i32, ptr %4, align 4, !tbaa !5
  %22 = sext i32 %21 to i64
  %23 = getelementptr inbounds [50010 x %struct.Event], ptr @a, i64 0, i64 %22
  %24 = getelementptr inbounds %struct.Event, ptr %23, i32 0, i32 0
  %25 = load i32, ptr %4, align 4, !tbaa !5
  %26 = sext i32 %25 to i64
  %27 = getelementptr inbounds [50010 x %struct.Event], ptr @a, i64 0, i64 %26
  %28 = getelementptr inbounds %struct.Event, ptr %27, i32 0, i32 1
  %29 = load i32, ptr %4, align 4, !tbaa !5
  %30 = sext i32 %29 to i64
  %31 = getelementptr inbounds [50010 x %struct.Event], ptr @a, i64 0, i64 %30
  %32 = getelementptr inbounds %struct.Event, ptr %31, i32 0, i32 2
  %33 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str.2, ptr noundef %24, ptr noundef %28, ptr noundef %32)
  %34 = load i32, ptr %4, align 4, !tbaa !5
  %35 = sext i32 %34 to i64
  %36 = getelementptr inbounds [50010 x %struct.Event], ptr @a, i64 0, i64 %35
  %37 = getelementptr inbounds %struct.Event, ptr %36, i32 0, i32 0
  %38 = load i64, ptr %37, align 8, !tbaa !9
  %39 = shl i64 %38, 1
  store i64 %39, ptr %37, align 8, !tbaa !9
  %40 = load i32, ptr %4, align 4, !tbaa !5
  %41 = sext i32 %40 to i64
  %42 = getelementptr inbounds [50010 x %struct.Event], ptr @a, i64 0, i64 %41
  %43 = getelementptr inbounds %struct.Event, ptr %42, i32 0, i32 1
  %44 = load i64, ptr %43, align 8, !tbaa !12
  %45 = shl i64 %44, 1
  store i64 %45, ptr %43, align 8, !tbaa !12
  %46 = load i32, ptr %4, align 4, !tbaa !5
  %47 = sext i32 %46 to i64
  %48 = getelementptr inbounds [50010 x %struct.Event], ptr @a, i64 0, i64 %47
  %49 = getelementptr inbounds %struct.Event, ptr %48, i32 0, i32 2
  %50 = load i64, ptr %49, align 8, !tbaa !13
  %51 = shl i64 %50, 1
  store i64 %51, ptr %49, align 8, !tbaa !13
  br label %52

52:                                               ; preds = %20
  %53 = load i32, ptr %4, align 4, !tbaa !5
  %54 = add nsw i32 %53, 1
  store i32 %54, ptr %4, align 4, !tbaa !5
  br label %15, !llvm.loop !14

55:                                               ; preds = %19
  %56 = load i32, ptr @n, align 4, !tbaa !5
  %57 = sext i32 %56 to i64
  %58 = getelementptr inbounds %struct.Event, ptr @a, i64 %57
  call void @_ZSt4sortIP5EventEvT_S2_(ptr noundef @a, ptr noundef %58)
  store i64 0, ptr @L, align 8, !tbaa !16
  store i64 4611686018427387903, ptr @R, align 8, !tbaa !16
  br label %59

59:                                               ; preds = %75, %55
  %60 = load i64, ptr @L, align 8, !tbaa !16
  %61 = load i64, ptr @R, align 8, !tbaa !16
  %62 = icmp slt i64 %60, %61
  br i1 %62, label %63, label %76

63:                                               ; preds = %59
  %64 = load i64, ptr @L, align 8, !tbaa !16
  %65 = load i64, ptr @R, align 8, !tbaa !16
  %66 = add nsw i64 %64, %65
  %67 = ashr i64 %66, 1
  store i64 %67, ptr @M, align 8, !tbaa !16
  %68 = load i64, ptr @M, align 8, !tbaa !16
  %69 = call noundef zeroext i1 @_Z5checkx(i64 noundef %68)
  br i1 %69, label %70, label %72

70:                                               ; preds = %63
  %71 = load i64, ptr @M, align 8, !tbaa !16
  store i64 %71, ptr @R, align 8, !tbaa !16
  br label %75

72:                                               ; preds = %63
  %73 = load i64, ptr @M, align 8, !tbaa !16
  %74 = add nsw i64 %73, 1
  store i64 %74, ptr @L, align 8, !tbaa !16
  br label %75

75:                                               ; preds = %72, %70
  br label %59, !llvm.loop !17

76:                                               ; preds = %59
  %77 = load i64, ptr @L, align 8, !tbaa !16
  %78 = and i64 %77, 1
  %79 = icmp ne i64 %78, 0
  br i1 %79, label %80, label %83

80:                                               ; preds = %76
  %81 = load i64, ptr @L, align 8, !tbaa !16
  %82 = call i32 (ptr, ...) @printf(ptr noundef @.str.3, i64 noundef %81)
  br label %87

83:                                               ; preds = %76
  %84 = load i64, ptr @L, align 8, !tbaa !16
  %85 = sdiv i64 %84, 2
  %86 = call i32 (ptr, ...) @printf(ptr noundef @.str.4, i64 noundef %85)
  br label %87

87:                                               ; preds = %83, %80
  br label %88

88:                                               ; preds = %87
  %89 = load i32, ptr %2, align 4, !tbaa !5
  %90 = add nsw i32 %89, 1
  store i32 %90, ptr %2, align 4, !tbaa !5
  br label %6, !llvm.loop !18

91:                                               ; preds = %10
  ret i32 0
}

declare i32 @__isoc99_scanf(ptr noundef, ...) #3

declare i32 @printf(ptr noundef, ...) #3

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZSt4sortIP5EventEvT_S2_(ptr noundef, ptr noundef) #4

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"_ZTS5Event", !11, i64 0, !11, i64 8, !11, i64 16}
!11 = !{!"long long", !7, i64 0}
!12 = !{!10, !11, i64 8}
!13 = !{!10, !11, i64 16}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = !{!11, !11, i64 0}
!17 = distinct !{!17, !15}
!18 = distinct !{!18, !15}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Event = type { i64, i64, i64 }

@a = external dso_local global [50010 x %struct.Event], align 16
@t = external dso_local global i32, align 4
@n = external dso_local global i32, align 4
@L = external dso_local local_unnamed_addr global i64, align 8
@R = external dso_local local_unnamed_addr global i64, align 8
@M = external dso_local local_unnamed_addr global i64, align 8
@.str = external hidden unnamed_addr constant [3 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [11 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [16 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [9 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [9 x i8], align 1

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z5checkx(i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() local_unnamed_addr #1 {
  %1 = tail call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull @t)
  %2 = load i32, ptr @t, align 4, !tbaa !5
  %.not22 = icmp slt i32 %2, 1
  br i1 %.not22, label %._crit_edge26, label %.lr.ph25

._crit_edge26:                                    ; preds = %38, %0
  ret i32 0

.lr.ph25:                                         ; preds = %0, %38
  %.01123 = phi i32 [ %39, %38 ], [ 1, %0 ]
  %3 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1, i32 noundef %.01123)
  %4 = tail call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull @n)
  %5 = load i32, ptr @n, align 4, !tbaa !5
  %6 = icmp sgt i32 %5, 0
  br i1 %6, label %.lr.ph, label %.lr.ph25.._crit_edge_crit_edge

.lr.ph25.._crit_edge_crit_edge:                   ; preds = %.lr.ph25
  %.pre31 = sext i32 %5 to i64
  br label %.lr.ph19.preheader

.lr.ph19.preheader:                               ; preds = %.lr.ph, %.lr.ph25.._crit_edge_crit_edge
  %.pre-phi = phi i64 [ %.pre31, %.lr.ph25.._crit_edge_crit_edge ], [ %17, %.lr.ph ]
  %7 = getelementptr inbounds %struct.Event, ptr @a, i64 %.pre-phi
  tail call void @_ZSt4sortIP5EventEvT_S2_(ptr noundef nonnull @a, ptr noundef nonnull %7)
  store i64 0, ptr @L, align 8, !tbaa !9
  store i64 4611686018427387903, ptr @R, align 8, !tbaa !9
  br label %.lr.ph19

.lr.ph:                                           ; preds = %.lr.ph25, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %.lr.ph25 ]
  %8 = getelementptr inbounds [50010 x %struct.Event], ptr @a, i64 0, i64 %indvars.iv
  %9 = getelementptr inbounds i8, ptr %8, i64 8
  %10 = getelementptr inbounds i8, ptr %8, i64 16
  %11 = tail call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str.2, ptr noundef nonnull %8, ptr noundef nonnull %9, ptr noundef nonnull %10)
  %12 = load <2 x i64>, ptr %8, align 8, !tbaa !9
  %13 = shl <2 x i64> %12, <i64 1, i64 1>
  store <2 x i64> %13, ptr %8, align 8, !tbaa !9
  %14 = load i64, ptr %10, align 8, !tbaa !11
  %15 = shl i64 %14, 1
  store i64 %15, ptr %10, align 8, !tbaa !11
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %16 = load i32, ptr @n, align 4, !tbaa !5
  %17 = sext i32 %16 to i64
  %18 = icmp slt i64 %indvars.iv.next, %17
  br i1 %18, label %.lr.ph, label %.lr.ph19.preheader, !llvm.loop !13

.lr.ph19:                                         ; preds = %.lr.ph19.preheader, %28
  %19 = phi i64 [ %29, %28 ], [ 4611686018427387903, %.lr.ph19.preheader ]
  %20 = phi i64 [ %30, %28 ], [ 0, %.lr.ph19.preheader ]
  %21 = add nsw i64 %19, %20
  %22 = ashr i64 %21, 1
  store i64 %22, ptr @M, align 8, !tbaa !9
  %23 = tail call noundef zeroext i1 @_Z5checkx(i64 noundef %22)
  %24 = load i64, ptr @M, align 8, !tbaa !9
  br i1 %23, label %25, label %26

25:                                               ; preds = %.lr.ph19
  store i64 %24, ptr @R, align 8, !tbaa !9
  %.pre = load i64, ptr @L, align 8, !tbaa !9
  br label %28

26:                                               ; preds = %.lr.ph19
  %27 = add nsw i64 %24, 1
  store i64 %27, ptr @L, align 8, !tbaa !9
  %.pre30 = load i64, ptr @R, align 8, !tbaa !9
  br label %28

28:                                               ; preds = %26, %25
  %29 = phi i64 [ %.pre30, %26 ], [ %24, %25 ]
  %30 = phi i64 [ %27, %26 ], [ %.pre, %25 ]
  %31 = icmp slt i64 %30, %29
  br i1 %31, label %.lr.ph19, label %._crit_edge20, !llvm.loop !15

._crit_edge20:                                    ; preds = %28
  %32 = and i64 %30, 1
  %.not15 = icmp eq i64 %32, 0
  br i1 %.not15, label %35, label %33

33:                                               ; preds = %._crit_edge20
  %34 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.3, i64 noundef %30)
  br label %38

35:                                               ; preds = %._crit_edge20
  %36 = ashr exact i64 %30, 1
  %37 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.4, i64 noundef %36)
  br label %38

38:                                               ; preds = %33, %35
  %39 = add nuw nsw i32 %.01123, 1
  %40 = load i32, ptr @t, align 4, !tbaa !5
  %.not.not = icmp slt i32 %.01123, %40
  br i1 %.not.not, label %.lr.ph25, label %._crit_edge26, !llvm.loop !16
}

; Function Attrs: nofree nounwind
declare noundef i32 @__isoc99_scanf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZSt4sortIP5EventEvT_S2_(ptr noundef, ptr noundef) local_unnamed_addr #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = !{!12, !10, i64 16}
!12 = !{!"_ZTS5Event", !10, i64 0, !10, i64 8, !10, i64 16}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}


; Effective O3 passes: BDCEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SCCPPass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass