; LLVM IR from ClementineAccount/Albuquerque :: lib/bullet/include/Bullet3Collision/NarrowPhaseCollision (b3CpuNarrowPhase)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.b3CpuNarrowPhase = type <{ ptr, ptr, i32, i32, i32, [4 x i8] }>
%struct.b3CpuNarrowPhaseInternalData = type { %class.b3AlignedObjectArray, %class.b3AlignedObjectArray.0, %class.b3AlignedObjectArray.2, %struct.b3Config, %class.b3AlignedObjectArray.4, %class.b3AlignedObjectArray.6, %class.b3AlignedObjectArray.6, %class.b3AlignedObjectArray.8, %class.b3AlignedObjectArray.10, %class.b3AlignedObjectArray.12, i32, [4 x i8] }
%class.b3AlignedObjectArray = type <{ [4 x i8], i32, i32, [4 x i8], ptr, i8, [7 x i8] }>
%class.b3AlignedObjectArray.0 = type <{ [4 x i8], i32, i32, [4 x i8], ptr, i8, [7 x i8] }>
%class.b3AlignedObjectArray.2 = type <{ [4 x i8], i32, i32, [4 x i8], ptr, i8, [7 x i8] }>
%struct.b3Config = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%class.b3AlignedObjectArray.4 = type <{ [4 x i8], i32, i32, [4 x i8], ptr, i8, [7 x i8] }>
%class.b3AlignedObjectArray.6 = type <{ [4 x i8], i32, i32, [4 x i8], ptr, i8, [7 x i8] }>
%class.b3AlignedObjectArray.8 = type <{ [4 x i8], i32, i32, [4 x i8], ptr, i8, [7 x i8] }>
%class.b3AlignedObjectArray.10 = type <{ [4 x i8], i32, i32, [4 x i8], ptr, i8, [7 x i8] }>
%class.b3AlignedObjectArray.12 = type <{ [4 x i8], i32, i32, [4 x i8], ptr, i8, [7 x i8] }>

@_ZTV16b3CpuNarrowPhase = external dso_local unnamed_addr constant { [5 x ptr] }, align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN16b3CpuNarrowPhaseC2ERK8b3Config(ptr noundef nonnull align 8 dereferenceable(28) %0, ptr noundef nonnull align 4 dereferenceable(48) %1) unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %7 = load ptr, ptr %3, align 8
  store ptr getelementptr inbounds inrange(-16, 24) ({ [5 x ptr] }, ptr @_ZTV16b3CpuNarrowPhase, i32 0, i32 0, i32 2), ptr %7, align 8, !tbaa !9
  %8 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 344) #5
  invoke void @_ZN28b3CpuNarrowPhaseInternalDataC2Ev(ptr noundef nonnull align 8 dereferenceable(340) %8)
          to label %9 unwind label %18

9:                                                ; preds = %2
  %10 = getelementptr inbounds %class.b3CpuNarrowPhase, ptr %7, i32 0, i32 1
  store ptr %8, ptr %10, align 8, !tbaa !11
  %11 = load ptr, ptr %4, align 8, !tbaa !5
  %12 = getelementptr inbounds %class.b3CpuNarrowPhase, ptr %7, i32 0, i32 1
  %13 = load ptr, ptr %12, align 8, !tbaa !11
  %14 = getelementptr inbounds %struct.b3CpuNarrowPhaseInternalData, ptr %13, i32 0, i32 3
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %14, ptr align 4 %11, i64 48, i1 false), !tbaa.struct !14
  %15 = getelementptr inbounds %class.b3CpuNarrowPhase, ptr %7, i32 0, i32 1
  %16 = load ptr, ptr %15, align 8, !tbaa !11
  %17 = getelementptr inbounds %struct.b3CpuNarrowPhaseInternalData, ptr %16, i32 0, i32 10
  store i32 0, ptr %17, align 8, !tbaa !16
  ret void

18:                                               ; preds = %2
  %19 = landingpad { ptr, i32 }
          cleanup
  %20 = extractvalue { ptr, i32 } %19, 0
  store ptr %20, ptr %5, align 8
  %21 = extractvalue { ptr, i32 } %19, 1
  store i32 %21, ptr %6, align 4
  call void @_ZdlPvm(ptr noundef %8, i64 noundef 344) #6
  br label %22

22:                                               ; preds = %18
  %23 = load ptr, ptr %5, align 8
  %24 = load i32, ptr %6, align 4
  %25 = insertvalue { ptr, i32 } poison, ptr %23, 0
  %26 = insertvalue { ptr, i32 } %25, i32 %24, 1
  resume { ptr, i32 } %26
}

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN28b3CpuNarrowPhaseInternalDataC2Ev(ptr noundef nonnull align 8 dereferenceable(340)) unnamed_addr #2 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) #3

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #4

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #5 = { builtin allocsize(0) }
attributes #6 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"vtable pointer", !8, i64 0}
!11 = !{!12, !6, i64 8}
!12 = !{!"_ZTS16b3CpuNarrowPhase", !6, i64 8, !13, i64 16, !13, i64 20, !13, i64 24}
!13 = !{!"int", !7, i64 0}
!14 = !{i64 0, i64 4, !15, i64 4, i64 4, !15, i64 8, i64 4, !15, i64 12, i64 4, !15, i64 16, i64 4, !15, i64 20, i64 4, !15, i64 24, i64 4, !15, i64 28, i64 4, !15, i64 32, i64 4, !15, i64 36, i64 4, !15, i64 40, i64 4, !15, i64 44, i64 4, !15}
!15 = !{!13, !13, i64 0}
!16 = !{!17, !13, i64 336}
!17 = !{!"_ZTS28b3CpuNarrowPhaseInternalData", !18, i64 0, !21, i64 32, !23, i64 64, !25, i64 96, !26, i64 144, !28, i64 176, !28, i64 208, !30, i64 240, !32, i64 272, !34, i64 304, !13, i64 336}
!18 = !{!"_ZTS20b3AlignedObjectArrayI6b3AabbE", !19, i64 0, !13, i64 4, !13, i64 8, !6, i64 16, !20, i64 24}
!19 = !{!"_ZTS18b3AlignedAllocatorI6b3AabbLj16EE"}
!20 = !{!"bool", !7, i64 0}
!21 = !{!"_ZTS20b3AlignedObjectArrayI12b3CollidableE", !22, i64 0, !13, i64 4, !13, i64 8, !6, i64 16, !20, i64 24}
!22 = !{!"_ZTS18b3AlignedAllocatorI12b3CollidableLj16EE"}
!23 = !{!"_ZTS20b3AlignedObjectArrayIP15b3ConvexUtilityE", !24, i64 0, !13, i64 4, !13, i64 8, !6, i64 16, !20, i64 24}
!24 = !{!"_ZTS18b3AlignedAllocatorIP15b3ConvexUtilityLj16EE"}
!25 = !{!"_ZTS8b3Config", !13, i64 0, !13, i64 4, !13, i64 8, !13, i64 12, !13, i64 16, !13, i64 20, !13, i64 24, !13, i64 28, !13, i64 32, !13, i64 36, !13, i64 40, !13, i64 44}
!26 = !{!"_ZTS20b3AlignedObjectArrayI22b3ConvexPolyhedronDataE", !27, i64 0, !13, i64 4, !13, i64 8, !6, i64 16, !20, i64 24}
!27 = !{!"_ZTS18b3AlignedAllocatorI22b3ConvexPolyhedronDataLj16EE"}
!28 = !{!"_ZTS20b3AlignedObjectArrayI9b3Vector3E", !29, i64 0, !13, i64 4, !13, i64 8, !6, i64 16, !20, i64 24}
!29 = !{!"_ZTS18b3AlignedAllocatorI9b3Vector3Lj16EE"}
!30 = !{!"_ZTS20b3AlignedObjectArrayIiE", !31, i64 0, !13, i64 4, !13, i64 8, !6, i64 16, !20, i64 24}
!31 = !{!"_ZTS18b3AlignedAllocatorIiLj16EE"}
!32 = !{!"_ZTS20b3AlignedObjectArrayI9b3GpuFaceE", !33, i64 0, !13, i64 4, !13, i64 8, !6, i64 16, !20, i64 24}
!33 = !{!"_ZTS18b3AlignedAllocatorI9b3GpuFaceLj16EE"}
!34 = !{!"_ZTS20b3AlignedObjectArrayI14b3Contact4DataE", !35, i64 0, !13, i64 4, !13, i64 8, !6, i64 16, !20, i64 24}
!35 = !{!"_ZTS18b3AlignedAllocatorI14b3Contact4DataLj16EE"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZTV16b3CpuNarrowPhase = external dso_local unnamed_addr constant { [5 x ptr] }, align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN16b3CpuNarrowPhaseC2ERK8b3Config(ptr nocapture noundef nonnull writeonly align 8 dereferenceable(28) %0, ptr nocapture noundef nonnull readonly align 4 dereferenceable(48) %1) unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  store ptr getelementptr inbounds inrange(-16, 24) (i8, ptr @_ZTV16b3CpuNarrowPhase, i64 16), ptr %0, align 8, !tbaa !5
  %3 = tail call noalias noundef nonnull dereferenceable(344) ptr @_Znwm(i64 noundef 344) #5
  invoke void @_ZN28b3CpuNarrowPhaseInternalDataC2Ev(ptr noundef nonnull align 8 dereferenceable(340) %3)
          to label %4 unwind label %8

4:                                                ; preds = %2
  %5 = getelementptr inbounds i8, ptr %0, i64 8
  store ptr %3, ptr %5, align 8, !tbaa !8
  %6 = getelementptr inbounds i8, ptr %3, i64 96
  tail call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(48) %6, ptr noundef nonnull align 4 dereferenceable(48) %1, i64 48, i1 false), !tbaa.struct !13
  %7 = getelementptr inbounds i8, ptr %3, i64 336
  store i32 0, ptr %7, align 8, !tbaa !15
  ret void

8:                                                ; preds = %2
  %9 = landingpad { ptr, i32 }
          cleanup
  tail call void @_ZdlPvm(ptr noundef nonnull %3, i64 noundef 344) #6
  resume { ptr, i32 } %9
}

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN28b3CpuNarrowPhaseInternalDataC2Ev(ptr noundef nonnull align 8 dereferenceable(340)) unnamed_addr #2 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #4

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #5 = { builtin allocsize(0) }
attributes #6 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"vtable pointer", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !10, i64 8}
!9 = !{!"_ZTS16b3CpuNarrowPhase", !10, i64 8, !12, i64 16, !12, i64 20, !12, i64 24}
!10 = !{!"any pointer", !11, i64 0}
!11 = !{!"omnipotent char", !7, i64 0}
!12 = !{!"int", !11, i64 0}
!13 = !{i64 0, i64 4, !14, i64 4, i64 4, !14, i64 8, i64 4, !14, i64 12, i64 4, !14, i64 16, i64 4, !14, i64 20, i64 4, !14, i64 24, i64 4, !14, i64 28, i64 4, !14, i64 32, i64 4, !14, i64 36, i64 4, !14, i64 40, i64 4, !14, i64 44, i64 4, !14}
!14 = !{!12, !12, i64 0}
!15 = !{!16, !12, i64 336}
!16 = !{!"_ZTS28b3CpuNarrowPhaseInternalData", !17, i64 0, !20, i64 32, !22, i64 64, !24, i64 96, !25, i64 144, !27, i64 176, !27, i64 208, !29, i64 240, !31, i64 272, !33, i64 304, !12, i64 336}
!17 = !{!"_ZTS20b3AlignedObjectArrayI6b3AabbE", !18, i64 0, !12, i64 4, !12, i64 8, !10, i64 16, !19, i64 24}
!18 = !{!"_ZTS18b3AlignedAllocatorI6b3AabbLj16EE"}
!19 = !{!"bool", !11, i64 0}
!20 = !{!"_ZTS20b3AlignedObjectArrayI12b3CollidableE", !21, i64 0, !12, i64 4, !12, i64 8, !10, i64 16, !19, i64 24}
!21 = !{!"_ZTS18b3AlignedAllocatorI12b3CollidableLj16EE"}
!22 = !{!"_ZTS20b3AlignedObjectArrayIP15b3ConvexUtilityE", !23, i64 0, !12, i64 4, !12, i64 8, !10, i64 16, !19, i64 24}
!23 = !{!"_ZTS18b3AlignedAllocatorIP15b3ConvexUtilityLj16EE"}
!24 = !{!"_ZTS8b3Config", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44}
!25 = !{!"_ZTS20b3AlignedObjectArrayI22b3ConvexPolyhedronDataE", !26, i64 0, !12, i64 4, !12, i64 8, !10, i64 16, !19, i64 24}
!26 = !{!"_ZTS18b3AlignedAllocatorI22b3ConvexPolyhedronDataLj16EE"}
!27 = !{!"_ZTS20b3AlignedObjectArrayI9b3Vector3E", !28, i64 0, !12, i64 4, !12, i64 8, !10, i64 16, !19, i64 24}
!28 = !{!"_ZTS18b3AlignedAllocatorI9b3Vector3Lj16EE"}
!29 = !{!"_ZTS20b3AlignedObjectArrayIiE", !30, i64 0, !12, i64 4, !12, i64 8, !10, i64 16, !19, i64 24}
!30 = !{!"_ZTS18b3AlignedAllocatorIiLj16EE"}
!31 = !{!"_ZTS20b3AlignedObjectArrayI9b3GpuFaceE", !32, i64 0, !12, i64 4, !12, i64 8, !10, i64 16, !19, i64 24}
!32 = !{!"_ZTS18b3AlignedAllocatorI9b3GpuFaceLj16EE"}
!33 = !{!"_ZTS20b3AlignedObjectArrayI14b3Contact4DataE", !34, i64 0, !12, i64 4, !12, i64 8, !10, i64 16, !19, i64 24}
!34 = !{!"_ZTS18b3AlignedAllocatorI14b3Contact4DataLj16EE"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass