; LLVM IR from narke/Aragveli :: src/kernel/arch/x86 (isr)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.registers = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

@exception_messages = external dso_local global [32 x ptr], align 16
@isr_routines = external hidden global [256 x ptr], align 16
@.str.20 = external hidden unnamed_addr constant [33 x i8], align 1
@.str.21 = external hidden unnamed_addr constant [18 x i8], align 1
@.str.22 = external hidden unnamed_addr constant [57 x i8], align 1
@.str.23 = external hidden unnamed_addr constant [57 x i8], align 1
@.str.24 = external hidden unnamed_addr constant [55 x i8], align 1
@.str.25 = external hidden unnamed_addr constant [55 x i8], align 1
@.str.26 = external hidden unnamed_addr constant [55 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local void @x86_isr_handler(ptr noundef %0) #0 {
  %2 = alloca ptr, align 8
  %3 = alloca ptr, align 8
  %4 = alloca i64, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #3
  %5 = load ptr, ptr %2, align 8, !tbaa !5
  %6 = getelementptr inbounds %struct.registers, ptr %5, i32 0, i32 12
  %7 = load i32, ptr %6, align 4, !tbaa !9
  %8 = zext i32 %7 to i64
  %9 = getelementptr inbounds [256 x ptr], ptr @isr_routines, i64 0, i64 %8
  %10 = load ptr, ptr %9, align 8, !tbaa !5
  store ptr %10, ptr %3, align 8, !tbaa !5
  %11 = load ptr, ptr %3, align 8, !tbaa !5
  %12 = icmp ne ptr %11, null
  br i1 %12, label %13, label %16

13:                                               ; preds = %1
  %14 = load ptr, ptr %3, align 8, !tbaa !5
  %15 = load ptr, ptr %2, align 8, !tbaa !5
  call void %14(ptr noundef %15)
  br label %51

16:                                               ; preds = %1
  %17 = load ptr, ptr %2, align 8, !tbaa !5
  %18 = getelementptr inbounds %struct.registers, ptr %17, i32 0, i32 12
  %19 = load i32, ptr %18, align 4, !tbaa !9
  %20 = load ptr, ptr %2, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.registers, ptr %20, i32 0, i32 12
  %22 = load i32, ptr %21, align 4, !tbaa !9
  %23 = zext i32 %22 to i64
  %24 = getelementptr inbounds [32 x ptr], ptr @exception_messages, i64 0, i64 %23
  %25 = load ptr, ptr %24, align 8, !tbaa !5
  call void (ptr, ...) @printf(ptr noundef @.str.20, i32 noundef %19, ptr noundef %25)
  %26 = load ptr, ptr %2, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.registers, ptr %26, i32 0, i32 13
  %28 = load i32, ptr %27, align 4, !tbaa !12
  call void (ptr, ...) @printf(ptr noundef @.str.21, i32 noundef %28)
  %29 = load ptr, ptr %2, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.registers, ptr %29, i32 0, i32 13
  %31 = load i32, ptr %30, align 4, !tbaa !12
  %32 = and i32 %31, 1
  %33 = icmp ne i32 %32, 0
  br i1 %33, label %34, label %35

34:                                               ; preds = %16
  call void (ptr, ...) @printf(ptr noundef @.str.22)
  br label %36

35:                                               ; preds = %16
  call void (ptr, ...) @printf(ptr noundef @.str.23)
  br label %36

36:                                               ; preds = %35, %34
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #3
  %37 = load ptr, ptr %2, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.registers, ptr %37, i32 0, i32 13
  %39 = load i32, ptr %38, align 4, !tbaa !12
  %40 = and i32 %39, 6
  %41 = lshr i32 %40, 1
  %42 = zext i32 %41 to i64
  store i64 %42, ptr %4, align 8, !tbaa !13
  %43 = load i64, ptr %4, align 8, !tbaa !13
  switch i64 %43, label %48 [
    i64 0, label %44
    i64 1, label %45
    i64 2, label %46
    i64 3, label %47
  ]

44:                                               ; preds = %36
  call void (ptr, ...) @printf(ptr noundef @.str.24)
  br label %48

45:                                               ; preds = %36
  call void (ptr, ...) @printf(ptr noundef @.str.25)
  br label %48

46:                                               ; preds = %36
  call void (ptr, ...) @printf(ptr noundef @.str.26)
  br label %48

47:                                               ; preds = %36
  call void (ptr, ...) @printf(ptr noundef @.str.25)
  br label %48

48:                                               ; preds = %47, %46, %45, %44, %36
  br label %49

49:                                               ; preds = %50, %48
  br label %50

50:                                               ; preds = %49
  call void asm sideeffect "hlt", "~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !15
  br label %49

51:                                               ; preds = %13
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #3
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @printf(ptr noundef, ...) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 48}
!10 = !{!"registers", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72}
!11 = !{!"int", !7, i64 0}
!12 = !{!10, !11, i64 52}
!13 = !{!14, !14, i64 0}
!14 = !{!"long", !7, i64 0}
!15 = !{i64 4797}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@exception_messages = external dso_local local_unnamed_addr global [32 x ptr], align 16
@isr_routines = external hidden local_unnamed_addr global [256 x ptr], align 16
@.str.20 = external hidden unnamed_addr constant [33 x i8], align 1
@.str.21 = external hidden unnamed_addr constant [18 x i8], align 1
@.str.22 = external hidden unnamed_addr constant [57 x i8], align 1
@.str.23 = external hidden unnamed_addr constant [57 x i8], align 1
@.str.24 = external hidden unnamed_addr constant [55 x i8], align 1
@.str.25 = external hidden unnamed_addr constant [55 x i8], align 1
@.str.26 = external hidden unnamed_addr constant [55 x i8], align 1
@switch.table.x86_isr_handler = private unnamed_addr constant [4 x ptr] [ptr @.str.24, ptr @.str.25, ptr @.str.26, ptr @.str.25], align 8

; Function Attrs: nounwind uwtable
define dso_local void @x86_isr_handler(ptr noundef %0) local_unnamed_addr #0 {
  %2 = getelementptr inbounds i8, ptr %0, i64 48
  %3 = load i32, ptr %2, align 4, !tbaa !5
  %4 = zext i32 %3 to i64
  %5 = getelementptr inbounds [256 x ptr], ptr @isr_routines, i64 0, i64 %4
  %6 = load ptr, ptr %5, align 8, !tbaa !10
  %.not = icmp eq ptr %6, null
  br i1 %.not, label %switch.lookup, label %7

7:                                                ; preds = %1
  tail call void %6(ptr noundef nonnull %0) #2
  ret void

switch.lookup:                                    ; preds = %1
  %8 = getelementptr inbounds [32 x ptr], ptr @exception_messages, i64 0, i64 %4
  %9 = load ptr, ptr %8, align 8, !tbaa !10
  tail call void (ptr, ...) @printf(ptr noundef nonnull @.str.20, i32 noundef %3, ptr noundef %9) #2
  %10 = getelementptr inbounds i8, ptr %0, i64 52
  %11 = load i32, ptr %10, align 4, !tbaa !12
  tail call void (ptr, ...) @printf(ptr noundef nonnull @.str.21, i32 noundef %11) #2
  %12 = load i32, ptr %10, align 4, !tbaa !12
  %13 = and i32 %12, 1
  %.not9 = icmp eq i32 %13, 0
  %.str.23..str.22 = select i1 %.not9, ptr @.str.23, ptr @.str.22
  tail call void (ptr, ...) @printf(ptr noundef nonnull %.str.23..str.22) #2
  %14 = load i32, ptr %10, align 4, !tbaa !12
  %15 = lshr i32 %14, 1
  %16 = and i32 %15, 3
  %17 = zext nneg i32 %16 to i64
  %switch.gep = getelementptr inbounds [4 x ptr], ptr @switch.table.x86_isr_handler, i64 0, i64 %17
  %switch.load = load ptr, ptr %switch.gep, align 8
  tail call void (ptr, ...) @printf(ptr noundef nonnull %switch.load) #2
  br label %18

18:                                               ; preds = %18, %switch.lookup
  tail call void asm sideeffect "hlt", "~{dirflag},~{fpsr},~{flags}"() #2, !srcloc !13
  br label %18
}

declare void @printf(ptr noundef, ...) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 48}
!6 = !{!"registers", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!6, !7, i64 52}
!13 = !{i64 4797}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass