; LLVM IR from mitdbg/deneva :: concurrency_control/occ.ll (ZN5OptCC16central_validateEP10TxnManager)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Stats = type { ptr, ptr, i64, i64, i64, i64 }
%class.Manager = type { %union.pthread_mutex_t, i64, [31 x %union.pthread_mutex_t], ptr, ptr, i64, i64 }
%union.pthread_mutex_t = type { %struct.__pthread_mutex_s }
%struct.__pthread_mutex_s = type { i32, i32, i32, i32, i32, i16, i16, %struct.__pthread_internal_list }
%struct.__pthread_internal_list = type { ptr, ptr }
%class.mem_alloc = type { i8 }
%class.set_ent = type { i64, ptr, i32, ptr, ptr }
%class.OptCC = type { i8, i64, ptr, ptr, i64, i64, i64, %union.pthread_mutex_t, %union.sem_t }
%union.sem_t = type { i64, [24 x i8] }
%class.Stats_thd = type { [64 x i8], ptr, ptr, double, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, double, i64, double, i64, double, i64, i64, double, double, double, double, double, double, double, double, i64, double, double, double, double, double, double, double, double, i64, i64, double, i64, double, i64, double, double, double, i64, i64, i64, double, double, double, double, double, double, double, double, double, i64, ptr, ptr, double, i64, i64, double, double, double, i64, i64, i64, i64, i64, i64, i64, double, double, double, i64, i64, i64, i64, i64, i64, i64, i64, i64, double, double, double, double, double, i64, i64, double, double, i64, i64, i64, double, double, i64, i64, double, double, double, double, i64, i64, double, double, double, i64, i64, double, double, double, double, double, i64, double, double, double, double, double, double, double, double, i64, i64, i64, double, i64, double, double, i64, i64, i64, i64, i64, double, i64, i64, double, i64, double, double, i64, i64, i64, i64, i64, double, double, double, %class.StatsArr, %class.StatsArr, %class.StatsArr, %class.StatsArr, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, ptr, [64 x i8] }
%class.StatsArr = type { ptr, i64, i64, i32, %union.pthread_mutex_t }

@simulation = external global ptr, align 8
@stats = external global %class.Stats, align 8
@g_ts_batch_alloc = external global i8, align 1
@.str = external hidden unnamed_addr constant [18 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [75 x i8], align 1
@__PRETTY_FUNCTION__._ZN5OptCC16central_validateEP10TxnManager = external hidden unnamed_addr constant [41 x i8], align 1
@glob_manager = external global %class.Manager, align 8
@mem_allocator = external global %class.mem_alloc, align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare noundef i64 @_Z13get_sys_clockv() #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN5OptCC16central_validateEP10TxnManager(ptr noundef nonnull align 8 dereferenceable(128) %0, ptr noundef %1) #2 align 2 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca i8, align 1
  %13 = alloca ptr, align 8
  %14 = alloca ptr, align 8
  %15 = alloca i8, align 1
  %16 = alloca ptr, align 8
  %17 = alloca ptr, align 8
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca ptr, align 8
  %21 = alloca i64, align 8
  %22 = alloca i64, align 8
  %23 = alloca i64, align 8
  %24 = alloca i64, align 8
  %25 = alloca i32, align 4
  %26 = alloca i32, align 4
  %27 = alloca ptr, align 8
  %28 = alloca ptr, align 8
  %29 = alloca ptr, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  %30 = load ptr, ptr %4, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #7
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #7
  %31 = call noundef i64 @_Z13get_sys_clockv()
  store i64 %31, ptr %7, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #7
  %32 = load i64, ptr %7, align 8, !tbaa !9
  store i64 %32, ptr %8, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #7
  %33 = load ptr, ptr %5, align 8, !tbaa !5
  %34 = call noundef i64 @_ZN10TxnManager19get_start_timestampEv(ptr noundef nonnull align 8 dereferenceable(544) %33)
  store i64 %34, ptr %9, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #7
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #7
  call void @llvm.lifetime.start.p0(i64 1, ptr %12) #7
  store i8 1, ptr %12, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #7
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #7
  %35 = load ptr, ptr %5, align 8, !tbaa !5
  %36 = call noundef i32 @_ZN5OptCC10get_rw_setEP10TxnManagerRP7set_entS4_(ptr noundef nonnull align 8 dereferenceable(128) %30, ptr noundef %35, ptr noundef nonnull align 8 dereferenceable(8) %14, ptr noundef nonnull align 8 dereferenceable(8) %13)
  call void @llvm.lifetime.start.p0(i64 1, ptr %15) #7
  %37 = load ptr, ptr %13, align 8, !tbaa !5
  %38 = getelementptr inbounds %class.set_ent, ptr %37, i32 0, i32 2
  %39 = load i32, ptr %38, align 8, !tbaa !13
  %40 = icmp eq i32 %39, 0
  %41 = zext i1 %40 to i8
  store i8 %41, ptr %15, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #7
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #7
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #7
  store i32 0, ptr %18, align 4, !tbaa !16
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #7
  %42 = getelementptr inbounds %class.OptCC, ptr %30, i32 0, i32 8
  %43 = call i32 @sem_wait(ptr noundef %42)
  %44 = load ptr, ptr @simulation, align 8, !tbaa !5
  %45 = call noundef zeroext i1 @_ZN10SimManager14is_warmup_doneEv(ptr noundef nonnull align 8 dereferenceable(96) %44)
  br i1 %45, label %46, label %59

46:                                               ; preds = %2
  %47 = call noundef i64 @_Z13get_sys_clockv()
  %48 = load i64, ptr %7, align 8, !tbaa !9
  %49 = sub i64 %47, %48
  %50 = uitofp i64 %49 to double
  %51 = load ptr, ptr @stats, align 8, !tbaa !17
  %52 = load ptr, ptr %5, align 8, !tbaa !5
  %53 = call noundef i64 @_ZN10TxnManager10get_thd_idEv(ptr noundef nonnull align 8 dereferenceable(544) %52)
  %54 = getelementptr inbounds ptr, ptr %51, i64 %53
  %55 = load ptr, ptr %54, align 8, !tbaa !5
  %56 = getelementptr inbounds %class.Stats_thd, ptr %55, i32 0, i32 124
  %57 = load double, ptr %56, align 8, !tbaa !19
  %58 = fadd double %57, %50
  store double %58, ptr %56, align 8, !tbaa !19
  br label %59

59:                                               ; preds = %46, %2
  %60 = call noundef i64 @_Z13get_sys_clockv()
  store i64 %60, ptr %7, align 8, !tbaa !9
  %61 = load i8, ptr @g_ts_batch_alloc, align 1, !tbaa !11, !range !24, !noundef !25
  %62 = trunc i8 %61 to i1
  %63 = xor i1 %62, true
  br i1 %63, label %64, label %65

64:                                               ; preds = %59
  br label %67

65:                                               ; preds = %59
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 141, ptr noundef @__PRETTY_FUNCTION__._ZN5OptCC16central_validateEP10TxnManager) #8
  unreachable

66:                                               ; No predecessors!
  br label %67

67:                                               ; preds = %66, %64
  %68 = load ptr, ptr %5, align 8, !tbaa !5
  %69 = call noundef i64 @_ZN10TxnManager10get_thd_idEv(ptr noundef nonnull align 8 dereferenceable(544) %68)
  %70 = call noundef i64 @_ZN7Manager6get_tsEm(ptr noundef nonnull align 8 dereferenceable(1320) @glob_manager, i64 noundef %69)
  store i64 %70, ptr %10, align 8, !tbaa !9
  %71 = getelementptr inbounds %class.OptCC, ptr %30, i32 0, i32 3
  %72 = load ptr, ptr %71, align 8, !tbaa !26
  store ptr %72, ptr %17, align 8, !tbaa !5
  %73 = getelementptr inbounds %class.OptCC, ptr %30, i32 0, i32 5
  %74 = load i64, ptr %73, align 8, !tbaa !28
  store i64 %74, ptr %11, align 8, !tbaa !9
  %75 = load i64, ptr %11, align 8, !tbaa !9
  %76 = call ptr @llvm.stacksave.p0()
  store ptr %76, ptr %20, align 8
  %77 = alloca ptr, i64 %75, align 16
  store i64 %75, ptr %21, align 8
  br label %78

78:                                               ; preds = %81, %67
  %79 = load ptr, ptr %17, align 8, !tbaa !5
  %80 = icmp ne ptr %79, null
  br i1 %80, label %81, label %90

81:                                               ; preds = %78
  %82 = load ptr, ptr %17, align 8, !tbaa !5
  %83 = load i32, ptr %18, align 4, !tbaa !16
  %84 = add nsw i32 %83, 1
  store i32 %84, ptr %18, align 4, !tbaa !16
  %85 = sext i32 %83 to i64
  %86 = getelementptr inbounds ptr, ptr %77, i64 %85
  store ptr %82, ptr %86, align 8, !tbaa !5
  %87 = load ptr, ptr %17, align 8, !tbaa !5
  %88 = getelementptr inbounds %class.set_ent, ptr %87, i32 0, i32 4
  %89 = load ptr, ptr %88, align 8, !tbaa !29
  store ptr %89, ptr %17, align 8, !tbaa !5
  br label %78, !llvm.loop !30

90:                                               ; preds = %78
  %91 = load i8, ptr %15, align 1, !tbaa !11, !range !24, !noundef !25
  %92 = trunc i8 %91 to i1
  br i1 %92, label %103, label %93

93:                                               ; preds = %90
  %94 = getelementptr inbounds %class.OptCC, ptr %30, i32 0, i32 5
  %95 = load i64, ptr %94, align 8, !tbaa !28
  %96 = add i64 %95, 1
  store i64 %96, ptr %94, align 8, !tbaa !28
  %97 = getelementptr inbounds %class.OptCC, ptr %30, i32 0, i32 3
  %98 = load ptr, ptr %97, align 8, !tbaa !26
  %99 = load ptr, ptr %13, align 8, !tbaa !5
  %100 = getelementptr inbounds %class.set_ent, ptr %99, i32 0, i32 4
  store ptr %98, ptr %100, align 8, !tbaa !29
  %101 = load ptr, ptr %13, align 8, !tbaa !5
  %102 = getelementptr inbounds %class.OptCC, ptr %30, i32 0, i32 3
  store ptr %101, ptr %102, align 8, !tbaa !26
  br label %103

103:                                              ; preds = %93, %90
  %104 = getelementptr inbounds %class.OptCC, ptr %30, i32 0, i32 2
  %105 = load ptr, ptr %104, align 8, !tbaa !32
  store ptr %105, ptr %16, align 8, !tbaa !5
  %106 = getelementptr inbounds %class.OptCC, ptr %30, i32 0, i32 8
  %107 = call i32 @sem_post(ptr noundef %106) #7
  %108 = load ptr, ptr @simulation, align 8, !tbaa !5
  %109 = call noundef zeroext i1 @_ZN10SimManager14is_warmup_doneEv(ptr noundef nonnull align 8 dereferenceable(96) %108)
  br i1 %109, label %110, label %123

110:                                              ; preds = %103
  %111 = call noundef i64 @_Z13get_sys_clockv()
  %112 = load i64, ptr %7, align 8, !tbaa !9
  %113 = sub i64 %111, %112
  %114 = uitofp i64 %113 to double
  %115 = load ptr, ptr @stats, align 8, !tbaa !17
  %116 = load ptr, ptr %5, align 8, !tbaa !5
  %117 = call noundef i64 @_ZN10TxnManager10get_thd_idEv(ptr noundef nonnull align 8 dereferenceable(544) %116)
  %118 = getelementptr inbounds ptr, ptr %115, i64 %117
  %119 = load ptr, ptr %118, align 8, !tbaa !5
  %120 = getelementptr inbounds %class.Stats_thd, ptr %119, i32 0, i32 125
  %121 = load double, ptr %120, align 8, !tbaa !33
  %122 = fadd double %121, %114
  store double %122, ptr %120, align 8, !tbaa !33
  br label %123

123:                                              ; preds = %110, %103
  %124 = call noundef i64 @_Z13get_sys_clockv()
  store i64 %124, ptr %7, align 8, !tbaa !9
  %125 = call noundef i64 @_Z13get_sys_clockv()
  store i64 %125, ptr %7, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %22) #7
  store i64 0, ptr %22, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %23) #7
  store i64 0, ptr %23, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %24) #7
  store i64 0, ptr %24, align 8, !tbaa !9
  store i32 0, ptr %19, align 4, !tbaa !16
  %126 = load i64, ptr %10, align 8, !tbaa !9
  %127 = load i64, ptr %9, align 8, !tbaa !9
  %128 = icmp ugt i64 %126, %127
  br i1 %128, label %129, label %190

129:                                              ; preds = %123
  br label %130

130:                                              ; preds = %141, %129
  %131 = load ptr, ptr %16, align 8, !tbaa !5
  %132 = icmp ne ptr %131, null
  br i1 %132, label %133, label %139

133:                                              ; preds = %130
  %134 = load ptr, ptr %16, align 8, !tbaa !5
  %135 = getelementptr inbounds %class.set_ent, ptr %134, i32 0, i32 0
  %136 = load i64, ptr %135, align 8, !tbaa !34
  %137 = load i64, ptr %10, align 8, !tbaa !9
  %138 = icmp ugt i64 %136, %137
  br label %139

139:                                              ; preds = %133, %130
  %140 = phi i1 [ false, %130 ], [ %138, %133 ]
  br i1 %140, label %141, label %145

141:                                              ; preds = %139
  %142 = load ptr, ptr %16, align 8, !tbaa !5
  %143 = getelementptr inbounds %class.set_ent, ptr %142, i32 0, i32 4
  %144 = load ptr, ptr %143, align 8, !tbaa !29
  store ptr %144, ptr %16, align 8, !tbaa !5
  br label %130, !llvm.loop !35

145:                                              ; preds = %139
  br label %146

146:                                              ; preds = %185, %145
  %147 = load ptr, ptr %16, align 8, !tbaa !5
  %148 = icmp ne ptr %147, null
  br i1 %148, label %149, label %155

149:                                              ; preds = %146
  %150 = load ptr, ptr %16, align 8, !tbaa !5
  %151 = getelementptr inbounds %class.set_ent, ptr %150, i32 0, i32 0
  %152 = load i64, ptr %151, align 8, !tbaa !34
  %153 = load i64, ptr %9, align 8, !tbaa !9
  %154 = icmp ugt i64 %152, %153
  br label %155

155:                                              ; preds = %149, %146
  %156 = phi i1 [ false, %146 ], [ %154, %149 ]
  br i1 %156, label %157, label %189

157:                                              ; preds = %155
  %158 = load i64, ptr %24, align 8, !tbaa !9
  %159 = add i64 %158, 1
  store i64 %159, ptr %24, align 8, !tbaa !9
  %160 = load i64, ptr %22, align 8, !tbaa !9
  %161 = add i64 %160, 1
  store i64 %161, ptr %22, align 8, !tbaa !9
  %162 = load ptr, ptr %16, align 8, !tbaa !5
  %163 = load ptr, ptr %14, align 8, !tbaa !5
  %164 = call noundef zeroext i1 @_ZN5OptCC10test_validEP7set_entS1_(ptr noundef nonnull align 8 dereferenceable(128) %30, ptr noundef %162, ptr noundef %163)
  %165 = zext i1 %164 to i8
  store i8 %165, ptr %12, align 1, !tbaa !11
  %166 = load i8, ptr %12, align 1, !tbaa !11, !range !24, !noundef !25
  %167 = trunc i8 %166 to i1
  br i1 %167, label %185, label %168

168:                                              ; preds = %157
  %169 = load ptr, ptr @simulation, align 8, !tbaa !5
  %170 = call noundef zeroext i1 @_ZN10SimManager14is_warmup_doneEv(ptr noundef nonnull align 8 dereferenceable(96) %169)
  br i1 %170, label %171, label %184

171:                                              ; preds = %168
  %172 = call noundef i64 @_Z13get_sys_clockv()
  %173 = load i64, ptr %7, align 8, !tbaa !9
  %174 = sub i64 %172, %173
  %175 = uitofp i64 %174 to double
  %176 = load ptr, ptr @stats, align 8, !tbaa !17
  %177 = load ptr, ptr %5, align 8, !tbaa !5
  %178 = call noundef i64 @_ZN10TxnManager10get_thd_idEv(ptr noundef nonnull align 8 dereferenceable(544) %177)
  %179 = getelementptr inbounds ptr, ptr %176, i64 %178
  %180 = load ptr, ptr %179, align 8, !tbaa !5
  %181 = getelementptr inbounds %class.Stats_thd, ptr %180, i32 0, i32 128
  %182 = load double, ptr %181, align 8, !tbaa !36
  %183 = fadd double %182, %175
  store double %183, ptr %181, align 8, !tbaa !36
  br label %184

184:                                              ; preds = %171, %168
  br label %285

185:                                              ; preds = %157
  %186 = load ptr, ptr %16, align 8, !tbaa !5
  %187 = getelementptr inbounds %class.set_ent, ptr %186, i32 0, i32 4
  %188 = load ptr, ptr %187, align 8, !tbaa !29
  store ptr %188, ptr %16, align 8, !tbaa !5
  br label %146, !llvm.loop !37

189:                                              ; preds = %155
  br label %190

190:                                              ; preds = %189, %123
  %191 = load ptr, ptr @simulation, align 8, !tbaa !5
  %192 = call noundef zeroext i1 @_ZN10SimManager14is_warmup_doneEv(ptr noundef nonnull align 8 dereferenceable(96) %191)
  br i1 %192, label %193, label %206

193:                                              ; preds = %190
  %194 = call noundef i64 @_Z13get_sys_clockv()
  %195 = load i64, ptr %7, align 8, !tbaa !9
  %196 = sub i64 %194, %195
  %197 = uitofp i64 %196 to double
  %198 = load ptr, ptr @stats, align 8, !tbaa !17
  %199 = load ptr, ptr %5, align 8, !tbaa !5
  %200 = call noundef i64 @_ZN10TxnManager10get_thd_idEv(ptr noundef nonnull align 8 dereferenceable(544) %199)
  %201 = getelementptr inbounds ptr, ptr %198, i64 %200
  %202 = load ptr, ptr %201, align 8, !tbaa !5
  %203 = getelementptr inbounds %class.Stats_thd, ptr %202, i32 0, i32 126
  %204 = load double, ptr %203, align 8, !tbaa !38
  %205 = fadd double %204, %197
  store double %205, ptr %203, align 8, !tbaa !38
  br label %206

206:                                              ; preds = %193, %190
  %207 = call noundef i64 @_Z13get_sys_clockv()
  store i64 %207, ptr %7, align 8, !tbaa !9
  store i32 1, ptr %19, align 4, !tbaa !16
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #7
  store i32 0, ptr %25, align 4, !tbaa !16
  br label %208

208:                                              ; preds = %262, %206
  %209 = load i32, ptr %25, align 4, !tbaa !16
  %210 = zext i32 %209 to i64
  %211 = load i64, ptr %11, align 8, !tbaa !9
  %212 = icmp ult i64 %210, %211
  br i1 %212, label %214, label %213

213:                                              ; preds = %208
  store i32 9, ptr %26, align 4
  br label %265

214:                                              ; preds = %208
  call void @llvm.lifetime.start.p0(i64 8, ptr %27) #7
  %215 = load i32, ptr %25, align 4, !tbaa !16
  %216 = zext i32 %215 to i64
  %217 = getelementptr inbounds ptr, ptr %77, i64 %216
  %218 = load ptr, ptr %217, align 8, !tbaa !5
  store ptr %218, ptr %27, align 8, !tbaa !5
  %219 = load i64, ptr %22, align 8, !tbaa !9
  %220 = add i64 %219, 1
  store i64 %220, ptr %22, align 8, !tbaa !9
  %221 = load i64, ptr %23, align 8, !tbaa !9
  %222 = add i64 %221, 1
  store i64 %222, ptr %23, align 8, !tbaa !9
  %223 = load ptr, ptr %27, align 8, !tbaa !5
  %224 = load ptr, ptr %14, align 8, !tbaa !5
  %225 = call noundef zeroext i1 @_ZN5OptCC10test_validEP7set_entS1_(ptr noundef nonnull align 8 dereferenceable(128) %30, ptr noundef %223, ptr noundef %224)
  %226 = zext i1 %225 to i8
  store i8 %226, ptr %12, align 1, !tbaa !11
  %227 = load i8, ptr %12, align 1, !tbaa !11, !range !24, !noundef !25
  %228 = trunc i8 %227 to i1
  br i1 %228, label %229, label %238

229:                                              ; preds = %214
  %230 = load i64, ptr %22, align 8, !tbaa !9
  %231 = add i64 %230, 1
  store i64 %231, ptr %22, align 8, !tbaa !9
  %232 = load i64, ptr %23, align 8, !tbaa !9
  %233 = add i64 %232, 1
  store i64 %233, ptr %23, align 8, !tbaa !9
  %234 = load ptr, ptr %27, align 8, !tbaa !5
  %235 = load ptr, ptr %13, align 8, !tbaa !5
  %236 = call noundef zeroext i1 @_ZN5OptCC10test_validEP7set_entS1_(ptr noundef nonnull align 8 dereferenceable(128) %30, ptr noundef %234, ptr noundef %235)
  %237 = zext i1 %236 to i8
  store i8 %237, ptr %12, align 1, !tbaa !11
  br label %238

238:                                              ; preds = %229, %214
  %239 = load i8, ptr %12, align 1, !tbaa !11, !range !24, !noundef !25
  %240 = trunc i8 %239 to i1
  br i1 %240, label %258, label %241

241:                                              ; preds = %238
  %242 = load ptr, ptr @simulation, align 8, !tbaa !5
  %243 = call noundef zeroext i1 @_ZN10SimManager14is_warmup_doneEv(ptr noundef nonnull align 8 dereferenceable(96) %242)
  br i1 %243, label %244, label %257

244:                                              ; preds = %241
  %245 = call noundef i64 @_Z13get_sys_clockv()
  %246 = load i64, ptr %7, align 8, !tbaa !9
  %247 = sub i64 %245, %246
  %248 = uitofp i64 %247 to double
  %249 = load ptr, ptr @stats, align 8, !tbaa !17
  %250 = load ptr, ptr %5, align 8, !tbaa !5
  %251 = call noundef i64 @_ZN10TxnManager10get_thd_idEv(ptr noundef nonnull align 8 dereferenceable(544) %250)
  %252 = getelementptr inbounds ptr, ptr %249, i64 %251
  %253 = load ptr, ptr %252, align 8, !tbaa !5
  %254 = getelementptr inbounds %class.Stats_thd, ptr %253, i32 0, i32 129
  %255 = load double, ptr %254, align 8, !tbaa !39
  %256 = fadd double %255, %248
  store double %256, ptr %254, align 8, !tbaa !39
  br label %257

257:                                              ; preds = %244, %241
  store i32 8, ptr %26, align 4
  br label %259

258:                                              ; preds = %238
  store i32 0, ptr %26, align 4
  br label %259

259:                                              ; preds = %258, %257
  call void @llvm.lifetime.end.p0(i64 8, ptr %27) #7
  %260 = load i32, ptr %26, align 4
  switch i32 %260, label %265 [
    i32 0, label %261
  ]

261:                                              ; preds = %259
  br label %262

262:                                              ; preds = %261
  %263 = load i32, ptr %25, align 4, !tbaa !16
  %264 = add i32 %263, 1
  store i32 %264, ptr %25, align 4, !tbaa !16
  br label %208, !llvm.loop !40

265:                                              ; preds = %259, %213
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #7
  %266 = load i32, ptr %26, align 4
  switch i32 %266, label %393 [
    i32 9, label %267
    i32 8, label %285
  ]

267:                                              ; preds = %265
  %268 = load ptr, ptr @simulation, align 8, !tbaa !5
  %269 = call noundef zeroext i1 @_ZN10SimManager14is_warmup_doneEv(ptr noundef nonnull align 8 dereferenceable(96) %268)
  br i1 %269, label %270, label %283

270:                                              ; preds = %267
  %271 = call noundef i64 @_Z13get_sys_clockv()
  %272 = load i64, ptr %7, align 8, !tbaa !9
  %273 = sub i64 %271, %272
  %274 = uitofp i64 %273 to double
  %275 = load ptr, ptr @stats, align 8, !tbaa !17
  %276 = load ptr, ptr %5, align 8, !tbaa !5
  %277 = call noundef i64 @_ZN10TxnManager10get_thd_idEv(ptr noundef nonnull align 8 dereferenceable(544) %276)
  %278 = getelementptr inbounds ptr, ptr %275, i64 %277
  %279 = load ptr, ptr %278, align 8, !tbaa !5
  %280 = getelementptr inbounds %class.Stats_thd, ptr %279, i32 0, i32 127
  %281 = load double, ptr %280, align 8, !tbaa !41
  %282 = fadd double %281, %274
  store double %282, ptr %280, align 8, !tbaa !41
  br label %283

283:                                              ; preds = %270, %267
  %284 = call noundef i64 @_Z13get_sys_clockv()
  store i64 %284, ptr %7, align 8, !tbaa !9
  br label %285

285:                                              ; preds = %283, %265, %184
  %286 = load ptr, ptr %14, align 8, !tbaa !5
  %287 = getelementptr inbounds %class.set_ent, ptr %286, i32 0, i32 3
  %288 = load ptr, ptr %287, align 8, !tbaa !42
  %289 = load ptr, ptr %14, align 8, !tbaa !5
  %290 = getelementptr inbounds %class.set_ent, ptr %289, i32 0, i32 2
  %291 = load i32, ptr %290, align 8, !tbaa !13
  %292 = zext i32 %291 to i64
  %293 = mul i64 8, %292
  call void @_ZN9mem_alloc4freeEPvm(ptr noundef nonnull align 1 dereferenceable(1) @mem_allocator, ptr noundef %288, i64 noundef %293)
  %294 = load ptr, ptr %14, align 8, !tbaa !5
  call void @_ZN9mem_alloc4freeEPvm(ptr noundef nonnull align 1 dereferenceable(1) @mem_allocator, ptr noundef %294, i64 noundef 40)
  %295 = load i8, ptr %12, align 1, !tbaa !11, !range !24, !noundef !25
  %296 = trunc i8 %295 to i1
  br i1 %296, label %297, label %311

297:                                              ; preds = %285
  store i32 0, ptr %6, align 4, !tbaa !43
  %298 = load ptr, ptr @simulation, align 8, !tbaa !5
  %299 = call noundef zeroext i1 @_ZN10SimManager14is_warmup_doneEv(ptr noundef nonnull align 8 dereferenceable(96) %298)
  br i1 %299, label %300, label %310

300:                                              ; preds = %297
  %301 = load i64, ptr %22, align 8, !tbaa !9
  %302 = load ptr, ptr @stats, align 8, !tbaa !17
  %303 = load ptr, ptr %5, align 8, !tbaa !5
  %304 = call noundef i64 @_ZN10TxnManager10get_thd_idEv(ptr noundef nonnull align 8 dereferenceable(544) %303)
  %305 = getelementptr inbounds ptr, ptr %302, i64 %304
  %306 = load ptr, ptr %305, align 8, !tbaa !5
  %307 = getelementptr inbounds %class.Stats_thd, ptr %306, i32 0, i32 130
  %308 = load i64, ptr %307, align 8, !tbaa !45
  %309 = add i64 %308, %301
  store i64 %309, ptr %307, align 8, !tbaa !45
  br label %310

310:                                              ; preds = %300, %297
  br label %375

311:                                              ; preds = %285
  %312 = load ptr, ptr @simulation, align 8, !tbaa !5
  %313 = call noundef zeroext i1 @_ZN10SimManager14is_warmup_doneEv(ptr noundef nonnull align 8 dereferenceable(96) %312)
  br i1 %313, label %314, label %324

314:                                              ; preds = %311
  %315 = load i64, ptr %22, align 8, !tbaa !9
  %316 = load ptr, ptr @stats, align 8, !tbaa !17
  %317 = load ptr, ptr %5, align 8, !tbaa !5
  %318 = call noundef i64 @_ZN10TxnManager10get_thd_idEv(ptr noundef nonnull align 8 dereferenceable(544) %317)
  %319 = getelementptr inbounds ptr, ptr %316, i64 %318
  %320 = load ptr, ptr %319, align 8, !tbaa !5
  %321 = getelementptr inbounds %class.Stats_thd, ptr %320, i32 0, i32 131
  %322 = load i64, ptr %321, align 8, !tbaa !46
  %323 = add i64 %322, %315
  store i64 %323, ptr %321, align 8, !tbaa !46
  br label %324

324:                                              ; preds = %314, %311
  store i32 2, ptr %6, align 4, !tbaa !43
  %325 = getelementptr inbounds %class.OptCC, ptr %30, i32 0, i32 8
  %326 = call i32 @sem_wait(ptr noundef %325)
  call void @llvm.lifetime.start.p0(i64 8, ptr %28) #7
  %327 = getelementptr inbounds %class.OptCC, ptr %30, i32 0, i32 3
  %328 = load ptr, ptr %327, align 8, !tbaa !26
  store ptr %328, ptr %28, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %29) #7
  store ptr null, ptr %29, align 8, !tbaa !5
  br label %329

329:                                              ; preds = %340, %324
  %330 = load ptr, ptr %28, align 8, !tbaa !5
  %331 = icmp ne ptr %330, null
  br i1 %331, label %332, label %338

332:                                              ; preds = %329
  %333 = load ptr, ptr %28, align 8, !tbaa !5
  %334 = getelementptr inbounds %class.set_ent, ptr %333, i32 0, i32 1
  %335 = load ptr, ptr %334, align 8, !tbaa !47
  %336 = load ptr, ptr %5, align 8, !tbaa !5
  %337 = icmp ne ptr %335, %336
  br label %338

338:                                              ; preds = %332, %329
  %339 = phi i1 [ false, %329 ], [ %337, %332 ]
  br i1 %339, label %340, label %345

340:                                              ; preds = %338
  %341 = load ptr, ptr %28, align 8, !tbaa !5
  store ptr %341, ptr %29, align 8, !tbaa !5
  %342 = load ptr, ptr %28, align 8, !tbaa !5
  %343 = getelementptr inbounds %class.set_ent, ptr %342, i32 0, i32 4
  %344 = load ptr, ptr %343, align 8, !tbaa !29
  store ptr %344, ptr %28, align 8, !tbaa !5
  br label %329, !llvm.loop !48

345:                                              ; preds = %338
  %346 = load ptr, ptr %28, align 8, !tbaa !5
  %347 = icmp ne ptr %346, null
  br i1 %347, label %348, label %372

348:                                              ; preds = %345
  %349 = load ptr, ptr %28, align 8, !tbaa !5
  %350 = getelementptr inbounds %class.set_ent, ptr %349, i32 0, i32 1
  %351 = load ptr, ptr %350, align 8, !tbaa !47
  %352 = load ptr, ptr %5, align 8, !tbaa !5
  %353 = icmp eq ptr %351, %352
  br i1 %353, label %354, label %372

354:                                              ; preds = %348
  %355 = load ptr, ptr %29, align 8, !tbaa !5
  %356 = icmp ne ptr %355, null
  br i1 %356, label %357, label %363

357:                                              ; preds = %354
  %358 = load ptr, ptr %28, align 8, !tbaa !5
  %359 = getelementptr inbounds %class.set_ent, ptr %358, i32 0, i32 4
  %360 = load ptr, ptr %359, align 8, !tbaa !29
  %361 = load ptr, ptr %29, align 8, !tbaa !5
  %362 = getelementptr inbounds %class.set_ent, ptr %361, i32 0, i32 4
  store ptr %360, ptr %362, align 8, !tbaa !29
  br label %368

363:                                              ; preds = %354
  %364 = load ptr, ptr %28, align 8, !tbaa !5
  %365 = getelementptr inbounds %class.set_ent, ptr %364, i32 0, i32 4
  %366 = load ptr, ptr %365, align 8, !tbaa !29
  %367 = getelementptr inbounds %class.OptCC, ptr %30, i32 0, i32 3
  store ptr %366, ptr %367, align 8, !tbaa !26
  br label %368

368:                                              ; preds = %363, %357
  %369 = getelementptr inbounds %class.OptCC, ptr %30, i32 0, i32 5
  %370 = load i64, ptr %369, align 8, !tbaa !28
  %371 = add i64 %370, -1
  store i64 %371, ptr %369, align 8, !tbaa !28
  br label %372

372:                                              ; preds = %368, %348, %345
  %373 = getelementptr inbounds %class.OptCC, ptr %30, i32 0, i32 8
  %374 = call i32 @sem_post(ptr noundef %373) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %29) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %28) #7
  br label %375

375:                                              ; preds = %372, %310
  %376 = load ptr, ptr @simulation, align 8, !tbaa !5
  %377 = call noundef zeroext i1 @_ZN10SimManager14is_warmup_doneEv(ptr noundef nonnull align 8 dereferenceable(96) %376)
  br i1 %377, label %378, label %391

378:                                              ; preds = %375
  %379 = call noundef i64 @_Z13get_sys_clockv()
  %380 = load i64, ptr %8, align 8, !tbaa !9
  %381 = sub i64 %379, %380
  %382 = uitofp i64 %381 to double
  %383 = load ptr, ptr @stats, align 8, !tbaa !17
  %384 = load ptr, ptr %5, align 8, !tbaa !5
  %385 = call noundef i64 @_ZN10TxnManager10get_thd_idEv(ptr noundef nonnull align 8 dereferenceable(544) %384)
  %386 = getelementptr inbounds ptr, ptr %383, i64 %385
  %387 = load ptr, ptr %386, align 8, !tbaa !5
  %388 = getelementptr inbounds %class.Stats_thd, ptr %387, i32 0, i32 123
  %389 = load double, ptr %388, align 8, !tbaa !49
  %390 = fadd double %389, %382
  store double %390, ptr %388, align 8, !tbaa !49
  br label %391

391:                                              ; preds = %378, %375
  %392 = load i32, ptr %6, align 4, !tbaa !43
  store i32 %392, ptr %3, align 4
  store i32 1, ptr %26, align 4
  br label %393

393:                                              ; preds = %391, %265
  call void @llvm.lifetime.end.p0(i64 8, ptr %24) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %23) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %22) #7
  %394 = load ptr, ptr %20, align 8
  call void @llvm.stackrestore.p0(ptr %394)
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #7
  call void @llvm.lifetime.end.p0(i64 1, ptr %15) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #7
  call void @llvm.lifetime.end.p0(i64 1, ptr %12) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #7
  %395 = load i32, ptr %3, align 4
  ret i32 %395
}

declare noundef zeroext i1 @_ZN10SimManager14is_warmup_doneEv(ptr noundef nonnull align 8 dereferenceable(96)) #1

declare noundef i64 @_ZN10TxnManager10get_thd_idEv(ptr noundef nonnull align 8 dereferenceable(544)) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare noundef i64 @_ZN10TxnManager19get_start_timestampEv(ptr noundef nonnull align 8 dereferenceable(544)) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZN5OptCC10get_rw_setEP10TxnManagerRP7set_entS4_(ptr noundef nonnull align 8 dereferenceable(128), ptr noundef, ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #2 align 2

declare i32 @sem_wait(ptr noundef) #1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #3

declare noundef i64 @_ZN7Manager6get_tsEm(ptr noundef nonnull align 8 dereferenceable(1320), i64 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn
declare ptr @llvm.stacksave.p0() #4

; Function Attrs: nounwind
declare i32 @sem_post(ptr noundef) #5

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN5OptCC10test_validEP7set_entS1_(ptr noundef nonnull align 8 dereferenceable(128), ptr noundef, ptr noundef) #6 align 2

declare void @_ZN9mem_alloc4freeEPvm(ptr noundef nonnull align 1 dereferenceable(1), ptr noundef, i64 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn
declare void @llvm.stackrestore.p0(ptr) #4

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind willreturn }
attributes #5 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }
attributes #8 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{!14, !15, i64 16}
!14 = !{!"_ZTS7set_ent", !10, i64 0, !6, i64 8, !15, i64 16, !6, i64 24, !6, i64 32}
!15 = !{!"int", !7, i64 0}
!16 = !{!15, !15, i64 0}
!17 = !{!18, !6, i64 0}
!18 = !{!"_ZTS5Stats", !6, i64 0, !6, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40}
!19 = !{!20, !21, i64 1048}
!20 = !{!"_ZTS9Stats_thd", !7, i64 0, !6, i64 64, !6, i64 72, !21, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !10, i64 144, !10, i64 152, !10, i64 160, !10, i64 168, !10, i64 176, !21, i64 184, !10, i64 192, !21, i64 200, !10, i64 208, !21, i64 216, !10, i64 224, !10, i64 232, !21, i64 240, !21, i64 248, !21, i64 256, !21, i64 264, !21, i64 272, !21, i64 280, !21, i64 288, !21, i64 296, !10, i64 304, !21, i64 312, !21, i64 320, !21, i64 328, !21, i64 336, !21, i64 344, !21, i64 352, !21, i64 360, !21, i64 368, !10, i64 376, !10, i64 384, !21, i64 392, !10, i64 400, !21, i64 408, !10, i64 416, !21, i64 424, !21, i64 432, !21, i64 440, !10, i64 448, !10, i64 456, !10, i64 464, !21, i64 472, !21, i64 480, !21, i64 488, !21, i64 496, !21, i64 504, !21, i64 512, !21, i64 520, !21, i64 528, !21, i64 536, !10, i64 544, !6, i64 552, !6, i64 560, !21, i64 568, !10, i64 576, !10, i64 584, !21, i64 592, !21, i64 600, !21, i64 608, !10, i64 616, !10, i64 624, !10, i64 632, !10, i64 640, !10, i64 648, !10, i64 656, !10, i64 664, !21, i64 672, !21, i64 680, !21, i64 688, !10, i64 696, !10, i64 704, !10, i64 712, !10, i64 720, !10, i64 728, !10, i64 736, !10, i64 744, !10, i64 752, !10, i64 760, !21, i64 768, !21, i64 776, !21, i64 784, !21, i64 792, !21, i64 800, !10, i64 808, !10, i64 816, !21, i64 824, !21, i64 832, !10, i64 840, !10, i64 848, !10, i64 856, !21, i64 864, !21, i64 872, !10, i64 880, !10, i64 888, !21, i64 896, !21, i64 904, !21, i64 912, !21, i64 920, !10, i64 928, !10, i64 936, !21, i64 944, !21, i64 952, !21, i64 960, !10, i64 968, !10, i64 976, !21, i64 984, !21, i64 992, !21, i64 1000, !21, i64 1008, !21, i64 1016, !10, i64 1024, !21, i64 1032, !21, i64 1040, !21, i64 1048, !21, i64 1056, !21, i64 1064, !21, i64 1072, !21, i64 1080, !21, i64 1088, !10, i64 1096, !10, i64 1104, !10, i64 1112, !21, i64 1120, !10, i64 1128, !21, i64 1136, !21, i64 1144, !10, i64 1152, !10, i64 1160, !10, i64 1168, !10, i64 1176, !10, i64 1184, !21, i64 1192, !10, i64 1200, !10, i64 1208, !21, i64 1216, !10, i64 1224, !21, i64 1232, !21, i64 1240, !10, i64 1248, !10, i64 1256, !10, i64 1264, !10, i64 1272, !10, i64 1280, !21, i64 1288, !21, i64 1296, !21, i64 1304, !22, i64 1312, !22, i64 1384, !22, i64 1456, !22, i64 1528, !21, i64 1600, !21, i64 1608, !21, i64 1616, !21, i64 1624, !21, i64 1632, !21, i64 1640, !21, i64 1648, !21, i64 1656, !21, i64 1664, !21, i64 1672, !21, i64 1680, !21, i64 1688, !21, i64 1696, !21, i64 1704, !21, i64 1712, !21, i64 1720, !21, i64 1728, !21, i64 1736, !21, i64 1744, !21, i64 1752, !21, i64 1760, !21, i64 1768, !21, i64 1776, !21, i64 1784, !21, i64 1792, !21, i64 1800, !21, i64 1808, !21, i64 1816, !21, i64 1824, !21, i64 1832, !21, i64 1840, !21, i64 1848, !21, i64 1856, !21, i64 1864, !21, i64 1872, !21, i64 1880, !6, i64 1888, !7, i64 1896}
!21 = !{!"double", !7, i64 0}
!22 = !{!"_ZTS8StatsArr", !6, i64 0, !10, i64 8, !10, i64 16, !23, i64 24, !7, i64 32}
!23 = !{!"_ZTS12StatsArrType", !7, i64 0}
!24 = !{i8 0, i8 2}
!25 = !{}
!26 = !{!27, !6, i64 24}
!27 = !{!"_ZTS5OptCC", !12, i64 0, !10, i64 8, !6, i64 16, !6, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !7, i64 56, !7, i64 96}
!28 = !{!27, !10, i64 40}
!29 = !{!14, !6, i64 32}
!30 = distinct !{!30, !31}
!31 = !{!"llvm.loop.mustprogress"}
!32 = !{!27, !6, i64 16}
!33 = !{!20, !21, i64 1056}
!34 = !{!14, !10, i64 0}
!35 = distinct !{!35, !31}
!36 = !{!20, !21, i64 1080}
!37 = distinct !{!37, !31}
!38 = !{!20, !21, i64 1064}
!39 = !{!20, !21, i64 1088}
!40 = distinct !{!40, !31}
!41 = !{!20, !21, i64 1072}
!42 = !{!14, !6, i64 24}
!43 = !{!44, !44, i64 0}
!44 = !{!"_ZTS2RC", !7, i64 0}
!45 = !{!20, !10, i64 1096}
!46 = !{!20, !10, i64 1104}
!47 = !{!14, !6, i64 8}
!48 = distinct !{!48, !31}
!49 = !{!20, !21, i64 1040}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Stats = type { ptr, ptr, i64, i64, i64, i64 }
%class.Manager = type { %union.pthread_mutex_t, i64, [31 x %union.pthread_mutex_t], ptr, ptr, i64, i64 }
%union.pthread_mutex_t = type { %struct.__pthread_mutex_s }
%struct.__pthread_mutex_s = type { i32, i32, i32, i32, i32, i16, i16, %struct.__pthread_internal_list }
%struct.__pthread_internal_list = type { ptr, ptr }
%class.mem_alloc = type { i8 }

@simulation = external local_unnamed_addr global ptr, align 8
@stats = external local_unnamed_addr global %class.Stats, align 8
@g_ts_batch_alloc = external local_unnamed_addr global i8, align 1
@.str = external hidden unnamed_addr constant [18 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [75 x i8], align 1
@__PRETTY_FUNCTION__._ZN5OptCC16central_validateEP10TxnManager = external hidden unnamed_addr constant [41 x i8], align 1
@glob_manager = external global %class.Manager, align 8
@mem_allocator = external global %class.mem_alloc, align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare noundef i64 @_Z13get_sys_clockv() local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN5OptCC16central_validateEP10TxnManager(ptr noundef nonnull align 8 dereferenceable(128) %0, ptr noundef %1) local_unnamed_addr #2 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = tail call noundef i64 @_Z13get_sys_clockv()
  %6 = tail call noundef i64 @_ZN10TxnManager19get_start_timestampEv(ptr noundef nonnull align 8 dereferenceable(544) %1)
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #7
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #7
  %7 = call noundef i32 @_ZN5OptCC10get_rw_setEP10TxnManagerRP7set_entS4_(ptr noundef nonnull align 8 dereferenceable(128) %0, ptr noundef nonnull %1, ptr noundef nonnull align 8 dereferenceable(8) %4, ptr noundef nonnull align 8 dereferenceable(8) %3)
  %8 = load ptr, ptr %3, align 8, !tbaa !5
  %9 = getelementptr inbounds i8, ptr %8, i64 16
  %10 = load i32, ptr %9, align 8, !tbaa !9
  %11 = icmp eq i32 %10, 0
  %12 = getelementptr inbounds i8, ptr %0, i64 96
  %13 = call i32 @sem_wait(ptr noundef nonnull %12)
  %14 = load ptr, ptr @simulation, align 8, !tbaa !5
  %15 = call noundef zeroext i1 @_ZN10SimManager14is_warmup_doneEv(ptr noundef nonnull align 8 dereferenceable(96) %14)
  br i1 %15, label %16, label %27

16:                                               ; preds = %2
  %17 = call noundef i64 @_Z13get_sys_clockv()
  %18 = sub i64 %17, %5
  %19 = uitofp i64 %18 to double
  %20 = load ptr, ptr @stats, align 8, !tbaa !13
  %21 = call noundef i64 @_ZN10TxnManager10get_thd_idEv(ptr noundef nonnull align 8 dereferenceable(544) %1)
  %22 = getelementptr inbounds ptr, ptr %20, i64 %21
  %23 = load ptr, ptr %22, align 8, !tbaa !5
  %24 = getelementptr inbounds i8, ptr %23, i64 1048
  %25 = load double, ptr %24, align 8, !tbaa !15
  %26 = fadd double %25, %19
  store double %26, ptr %24, align 8, !tbaa !15
  br label %27

27:                                               ; preds = %16, %2
  %28 = call noundef i64 @_Z13get_sys_clockv()
  %29 = load i8, ptr @g_ts_batch_alloc, align 1, !tbaa !20, !range !22, !noundef !23
  %30 = trunc nuw i8 %29 to i1
  br i1 %30, label %31, label %32

31:                                               ; preds = %27
  call void @__assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 141, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN5OptCC16central_validateEP10TxnManager) #8
  unreachable

32:                                               ; preds = %27
  %33 = call noundef i64 @_ZN10TxnManager10get_thd_idEv(ptr noundef nonnull align 8 dereferenceable(544) %1)
  %34 = call noundef i64 @_ZN7Manager6get_tsEm(ptr noundef nonnull align 8 dereferenceable(1320) @glob_manager, i64 noundef %33)
  %35 = getelementptr inbounds i8, ptr %0, i64 24
  %36 = load ptr, ptr %35, align 8, !tbaa !24
  %37 = getelementptr inbounds i8, ptr %0, i64 40
  %38 = load i64, ptr %37, align 8, !tbaa !26
  %39 = call ptr @llvm.stacksave.p0()
  %40 = alloca ptr, i64 %38, align 16
  %.not135 = icmp eq ptr %36, null
  br i1 %.not135, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %32, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %32 ]
  %.087136 = phi ptr [ %43, %.lr.ph ], [ %36, %32 ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %41 = getelementptr inbounds ptr, ptr %40, i64 %indvars.iv
  store ptr %.087136, ptr %41, align 8, !tbaa !5
  %42 = getelementptr inbounds i8, ptr %.087136, i64 32
  %43 = load ptr, ptr %42, align 8, !tbaa !27
  %.not = icmp eq ptr %43, null
  br i1 %.not, label %._crit_edge, label %.lr.ph, !llvm.loop !28

._crit_edge:                                      ; preds = %.lr.ph, %32
  br i1 %11, label %50, label %44

44:                                               ; preds = %._crit_edge
  %45 = load i64, ptr %37, align 8, !tbaa !26
  %46 = add i64 %45, 1
  store i64 %46, ptr %37, align 8, !tbaa !26
  %47 = load ptr, ptr %35, align 8, !tbaa !24
  %48 = load ptr, ptr %3, align 8, !tbaa !5
  %49 = getelementptr inbounds i8, ptr %48, i64 32
  store ptr %47, ptr %49, align 8, !tbaa !27
  store ptr %48, ptr %35, align 8, !tbaa !24
  br label %50

50:                                               ; preds = %44, %._crit_edge
  %51 = getelementptr inbounds i8, ptr %0, i64 16
  %52 = load ptr, ptr %51, align 8, !tbaa !30
  %53 = call i32 @sem_post(ptr noundef nonnull %12) #7
  %54 = load ptr, ptr @simulation, align 8, !tbaa !5
  %55 = call noundef zeroext i1 @_ZN10SimManager14is_warmup_doneEv(ptr noundef nonnull align 8 dereferenceable(96) %54)
  br i1 %55, label %56, label %67

56:                                               ; preds = %50
  %57 = call noundef i64 @_Z13get_sys_clockv()
  %58 = sub i64 %57, %28
  %59 = uitofp i64 %58 to double
  %60 = load ptr, ptr @stats, align 8, !tbaa !13
  %61 = call noundef i64 @_ZN10TxnManager10get_thd_idEv(ptr noundef nonnull align 8 dereferenceable(544) %1)
  %62 = getelementptr inbounds ptr, ptr %60, i64 %61
  %63 = load ptr, ptr %62, align 8, !tbaa !5
  %64 = getelementptr inbounds i8, ptr %63, i64 1056
  %65 = load double, ptr %64, align 8, !tbaa !31
  %66 = fadd double %65, %59
  store double %66, ptr %64, align 8, !tbaa !31
  br label %67

67:                                               ; preds = %56, %50
  %68 = call noundef i64 @_Z13get_sys_clockv()
  %69 = call noundef i64 @_Z13get_sys_clockv()
  %70 = icmp ule i64 %34, %6
  %.not97138 = icmp eq ptr %52, null
  %or.cond = select i1 %70, i1 true, i1 %.not97138
  br i1 %or.cond, label %.critedge2, label %.lr.ph140

.lr.ph140:                                        ; preds = %67, %73
  %.088139 = phi ptr [ %75, %73 ], [ %52, %67 ]
  %71 = load i64, ptr %.088139, align 8, !tbaa !32
  %72 = icmp ugt i64 %71, %34
  br i1 %72, label %73, label %.lr.ph146

73:                                               ; preds = %.lr.ph140
  %74 = getelementptr inbounds i8, ptr %.088139, i64 32
  %75 = load ptr, ptr %74, align 8, !tbaa !27
  %.not97 = icmp eq ptr %75, null
  br i1 %.not97, label %.critedge2, label %.lr.ph140, !llvm.loop !33

.lr.ph146:                                        ; preds = %.lr.ph140, %96
  %.083145 = phi i64 [ %79, %96 ], [ 0, %.lr.ph140 ]
  %.189144 = phi ptr [ %98, %96 ], [ %.088139, %.lr.ph140 ]
  %76 = load i64, ptr %.189144, align 8, !tbaa !32
  %77 = icmp ugt i64 %76, %6
  br i1 %77, label %78, label %.critedge2

78:                                               ; preds = %.lr.ph146
  %79 = add i64 %.083145, 1
  %80 = load ptr, ptr %4, align 8, !tbaa !5
  %81 = call noundef zeroext i1 @_ZN5OptCC10test_validEP7set_entS1_(ptr noundef nonnull align 8 dereferenceable(128) %0, ptr noundef nonnull %.189144, ptr noundef %80)
  br i1 %81, label %96, label %82

82:                                               ; preds = %78
  %83 = load ptr, ptr @simulation, align 8, !tbaa !5
  %84 = call noundef zeroext i1 @_ZN10SimManager14is_warmup_doneEv(ptr noundef nonnull align 8 dereferenceable(96) %83)
  br i1 %84, label %85, label %156

85:                                               ; preds = %82
  %86 = call noundef i64 @_Z13get_sys_clockv()
  %87 = sub i64 %86, %69
  %88 = uitofp i64 %87 to double
  %89 = load ptr, ptr @stats, align 8, !tbaa !13
  %90 = call noundef i64 @_ZN10TxnManager10get_thd_idEv(ptr noundef nonnull align 8 dereferenceable(544) %1)
  %91 = getelementptr inbounds ptr, ptr %89, i64 %90
  %92 = load ptr, ptr %91, align 8, !tbaa !5
  %93 = getelementptr inbounds i8, ptr %92, i64 1080
  %94 = load double, ptr %93, align 8, !tbaa !34
  %95 = fadd double %94, %88
  store double %95, ptr %93, align 8, !tbaa !34
  br label %156

96:                                               ; preds = %78
  %97 = getelementptr inbounds i8, ptr %.189144, i64 32
  %98 = load ptr, ptr %97, align 8, !tbaa !27
  %.not98 = icmp eq ptr %98, null
  br i1 %.not98, label %.critedge2, label %.lr.ph146, !llvm.loop !35

.critedge2:                                       ; preds = %73, %96, %.lr.ph146, %67
  %.184 = phi i64 [ 0, %67 ], [ %79, %96 ], [ %.083145, %.lr.ph146 ], [ 0, %73 ]
  %99 = load ptr, ptr @simulation, align 8, !tbaa !5
  %100 = call noundef zeroext i1 @_ZN10SimManager14is_warmup_doneEv(ptr noundef nonnull align 8 dereferenceable(96) %99)
  br i1 %100, label %101, label %112

101:                                              ; preds = %.critedge2
  %102 = call noundef i64 @_Z13get_sys_clockv()
  %103 = sub i64 %102, %69
  %104 = uitofp i64 %103 to double
  %105 = load ptr, ptr @stats, align 8, !tbaa !13
  %106 = call noundef i64 @_ZN10TxnManager10get_thd_idEv(ptr noundef nonnull align 8 dereferenceable(544) %1)
  %107 = getelementptr inbounds ptr, ptr %105, i64 %106
  %108 = load ptr, ptr %107, align 8, !tbaa !5
  %109 = getelementptr inbounds i8, ptr %108, i64 1064
  %110 = load double, ptr %109, align 8, !tbaa !36
  %111 = fadd double %110, %104
  store double %111, ptr %109, align 8, !tbaa !36
  br label %112

112:                                              ; preds = %101, %.critedge2
  %113 = call noundef i64 @_Z13get_sys_clockv()
  %.not162 = icmp eq i64 %38, 0
  br i1 %.not162, label %._crit_edge154, label %.lr.ph153

114:                                              ; preds = %124
  %115 = add i32 %.079151, 1
  %116 = zext i32 %115 to i64
  %117 = icmp ugt i64 %38, %116
  br i1 %117, label %.lr.ph153, label %._crit_edge154, !llvm.loop !37

.lr.ph153:                                        ; preds = %112, %114
  %118 = phi i64 [ %116, %114 ], [ 0, %112 ]
  %.079151 = phi i32 [ %115, %114 ], [ 0, %112 ]
  %.2150 = phi i64 [ %125, %114 ], [ %.184, %112 ]
  %119 = getelementptr inbounds ptr, ptr %40, i64 %118
  %120 = load ptr, ptr %119, align 8, !tbaa !5
  %121 = load ptr, ptr %4, align 8, !tbaa !5
  %122 = call noundef zeroext i1 @_ZN5OptCC10test_validEP7set_entS1_(ptr noundef nonnull align 8 dereferenceable(128) %0, ptr noundef %120, ptr noundef %121)
  br i1 %122, label %124, label %.thread

.thread:                                          ; preds = %.lr.ph153
  %123 = add i64 %.2150, 1
  br label %.loopexit

124:                                              ; preds = %.lr.ph153
  %125 = add i64 %.2150, 2
  %126 = load ptr, ptr %3, align 8, !tbaa !5
  %127 = call noundef zeroext i1 @_ZN5OptCC10test_validEP7set_entS1_(ptr noundef nonnull align 8 dereferenceable(128) %0, ptr noundef %120, ptr noundef %126)
  br i1 %127, label %114, label %.loopexit

.loopexit:                                        ; preds = %124, %.thread
  %.3109 = phi i64 [ %123, %.thread ], [ %125, %124 ]
  %128 = load ptr, ptr @simulation, align 8, !tbaa !5
  %129 = call noundef zeroext i1 @_ZN10SimManager14is_warmup_doneEv(ptr noundef nonnull align 8 dereferenceable(96) %128)
  br i1 %129, label %130, label %156

130:                                              ; preds = %.loopexit
  %131 = call noundef i64 @_Z13get_sys_clockv()
  %132 = sub i64 %131, %113
  %133 = uitofp i64 %132 to double
  %134 = load ptr, ptr @stats, align 8, !tbaa !13
  %135 = call noundef i64 @_ZN10TxnManager10get_thd_idEv(ptr noundef nonnull align 8 dereferenceable(544) %1)
  %136 = getelementptr inbounds ptr, ptr %134, i64 %135
  %137 = load ptr, ptr %136, align 8, !tbaa !5
  %138 = getelementptr inbounds i8, ptr %137, i64 1088
  %139 = load double, ptr %138, align 8, !tbaa !38
  %140 = fadd double %139, %133
  store double %140, ptr %138, align 8, !tbaa !38
  br label %156

._crit_edge154:                                   ; preds = %114, %112
  %.2.lcssa = phi i64 [ %.184, %112 ], [ %125, %114 ]
  %141 = load ptr, ptr @simulation, align 8, !tbaa !5
  %142 = call noundef zeroext i1 @_ZN10SimManager14is_warmup_doneEv(ptr noundef nonnull align 8 dereferenceable(96) %141)
  br i1 %142, label %143, label %154

143:                                              ; preds = %._crit_edge154
  %144 = call noundef i64 @_Z13get_sys_clockv()
  %145 = sub i64 %144, %113
  %146 = uitofp i64 %145 to double
  %147 = load ptr, ptr @stats, align 8, !tbaa !13
  %148 = call noundef i64 @_ZN10TxnManager10get_thd_idEv(ptr noundef nonnull align 8 dereferenceable(544) %1)
  %149 = getelementptr inbounds ptr, ptr %147, i64 %148
  %150 = load ptr, ptr %149, align 8, !tbaa !5
  %151 = getelementptr inbounds i8, ptr %150, i64 1072
  %152 = load double, ptr %151, align 8, !tbaa !39
  %153 = fadd double %152, %146
  store double %153, ptr %151, align 8, !tbaa !39
  br label %154

154:                                              ; preds = %143, %._crit_edge154
  %155 = call noundef i64 @_Z13get_sys_clockv()
  br label %156

156:                                              ; preds = %.loopexit, %130, %82, %85, %154
  %.595 = phi i1 [ false, %85 ], [ false, %82 ], [ true, %154 ], [ false, %130 ], [ false, %.loopexit ]
  %.5 = phi i64 [ %79, %85 ], [ %79, %82 ], [ %.2.lcssa, %154 ], [ %.3109, %130 ], [ %.3109, %.loopexit ]
  %157 = load ptr, ptr %4, align 8, !tbaa !5
  %158 = getelementptr inbounds i8, ptr %157, i64 24
  %159 = load ptr, ptr %158, align 8, !tbaa !40
  %160 = getelementptr inbounds i8, ptr %157, i64 16
  %161 = load i32, ptr %160, align 8, !tbaa !9
  %162 = zext i32 %161 to i64
  %163 = shl nuw nsw i64 %162, 3
  call void @_ZN9mem_alloc4freeEPvm(ptr noundef nonnull align 1 dereferenceable(1) @mem_allocator, ptr noundef %159, i64 noundef %163)
  %164 = load ptr, ptr %4, align 8, !tbaa !5
  call void @_ZN9mem_alloc4freeEPvm(ptr noundef nonnull align 1 dereferenceable(1) @mem_allocator, ptr noundef %164, i64 noundef 40)
  %165 = load ptr, ptr @simulation, align 8, !tbaa !5
  %166 = call noundef zeroext i1 @_ZN10SimManager14is_warmup_doneEv(ptr noundef nonnull align 8 dereferenceable(96) %165)
  br i1 %.595, label %167, label %176

167:                                              ; preds = %156
  br i1 %166, label %168, label %198

168:                                              ; preds = %167
  %169 = load ptr, ptr @stats, align 8, !tbaa !13
  %170 = call noundef i64 @_ZN10TxnManager10get_thd_idEv(ptr noundef nonnull align 8 dereferenceable(544) %1)
  %171 = getelementptr inbounds ptr, ptr %169, i64 %170
  %172 = load ptr, ptr %171, align 8, !tbaa !5
  %173 = getelementptr inbounds i8, ptr %172, i64 1096
  %174 = load i64, ptr %173, align 8, !tbaa !41
  %175 = add i64 %174, %.5
  store i64 %175, ptr %173, align 8, !tbaa !41
  br label %198

176:                                              ; preds = %156
  br i1 %166, label %177, label %185

177:                                              ; preds = %176
  %178 = load ptr, ptr @stats, align 8, !tbaa !13
  %179 = call noundef i64 @_ZN10TxnManager10get_thd_idEv(ptr noundef nonnull align 8 dereferenceable(544) %1)
  %180 = getelementptr inbounds ptr, ptr %178, i64 %179
  %181 = load ptr, ptr %180, align 8, !tbaa !5
  %182 = getelementptr inbounds i8, ptr %181, i64 1104
  %183 = load i64, ptr %182, align 8, !tbaa !42
  %184 = add i64 %183, %.5
  store i64 %184, ptr %182, align 8, !tbaa !42
  br label %185

185:                                              ; preds = %177, %176
  %186 = call i32 @sem_wait(ptr noundef nonnull %12)
  %.076156 = load ptr, ptr %35, align 8, !tbaa !5
  %.not99157 = icmp eq ptr %.076156, null
  br i1 %.not99157, label %.critedge102, label %.lr.ph161.preheader

.lr.ph161.preheader:                              ; preds = %185
  %187 = getelementptr inbounds i8, ptr %.076156, i64 8
  %188 = load ptr, ptr %187, align 8, !tbaa !43
  %.not100188 = icmp eq ptr %188, %1
  br i1 %.not100188, label %.critedge4, label %.lr.ph190

.lr.ph161:                                        ; preds = %.lr.ph190
  %189 = getelementptr inbounds i8, ptr %.076, i64 8
  %190 = load ptr, ptr %189, align 8, !tbaa !43
  %.not100 = icmp eq ptr %190, %1
  br i1 %.not100, label %.critedge4, label %.lr.ph190, !llvm.loop !44

.lr.ph190:                                        ; preds = %.lr.ph161.preheader, %.lr.ph161
  %.076159189 = phi ptr [ %.076, %.lr.ph161 ], [ %.076156, %.lr.ph161.preheader ]
  %191 = getelementptr inbounds i8, ptr %.076159189, i64 32
  %.076 = load ptr, ptr %191, align 8, !tbaa !5
  %.not99 = icmp eq ptr %.076, null
  br i1 %.not99, label %.critedge102, label %.lr.ph161, !llvm.loop !44

.critedge4:                                       ; preds = %.lr.ph161, %.lr.ph161.preheader
  %.076159.lcssa = phi ptr [ %.076156, %.lr.ph161.preheader ], [ %.076, %.lr.ph161 ]
  %.0158.lcssa = phi ptr [ null, %.lr.ph161.preheader ], [ %.076159189, %.lr.ph161 ]
  %.not101 = icmp eq ptr %.0158.lcssa, null
  %192 = getelementptr inbounds i8, ptr %.076159.lcssa, i64 32
  %193 = load ptr, ptr %192, align 8, !tbaa !27
  %194 = getelementptr inbounds i8, ptr %.0158.lcssa, i64 32
  %.sink = select i1 %.not101, ptr %35, ptr %194
  store ptr %193, ptr %.sink, align 8, !tbaa !5
  %195 = load i64, ptr %37, align 8, !tbaa !26
  %196 = add i64 %195, -1
  store i64 %196, ptr %37, align 8, !tbaa !26
  br label %.critedge102

.critedge102:                                     ; preds = %.lr.ph190, %185, %.critedge4
  %197 = call i32 @sem_post(ptr noundef nonnull %12) #7
  br label %198

198:                                              ; preds = %167, %168, %.critedge102
  %.085 = phi i32 [ 0, %168 ], [ 0, %167 ], [ 2, %.critedge102 ]
  %199 = load ptr, ptr @simulation, align 8, !tbaa !5
  %200 = call noundef zeroext i1 @_ZN10SimManager14is_warmup_doneEv(ptr noundef nonnull align 8 dereferenceable(96) %199)
  br i1 %200, label %201, label %212

201:                                              ; preds = %198
  %202 = call noundef i64 @_Z13get_sys_clockv()
  %203 = sub i64 %202, %5
  %204 = uitofp i64 %203 to double
  %205 = load ptr, ptr @stats, align 8, !tbaa !13
  %206 = call noundef i64 @_ZN10TxnManager10get_thd_idEv(ptr noundef nonnull align 8 dereferenceable(544) %1)
  %207 = getelementptr inbounds ptr, ptr %205, i64 %206
  %208 = load ptr, ptr %207, align 8, !tbaa !5
  %209 = getelementptr inbounds i8, ptr %208, i64 1040
  %210 = load double, ptr %209, align 8, !tbaa !45
  %211 = fadd double %210, %204
  store double %211, ptr %209, align 8, !tbaa !45
  br label %212

212:                                              ; preds = %198, %201
  call void @llvm.stackrestore.p0(ptr %39)
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #7
  ret i32 %.085
}

declare noundef zeroext i1 @_ZN10SimManager14is_warmup_doneEv(ptr noundef nonnull align 8 dereferenceable(96)) local_unnamed_addr #1

declare noundef i64 @_ZN10TxnManager10get_thd_idEv(ptr noundef nonnull align 8 dereferenceable(544)) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare noundef i64 @_ZN10TxnManager19get_start_timestampEv(ptr noundef nonnull align 8 dereferenceable(544)) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZN5OptCC10get_rw_setEP10TxnManagerRP7set_entS4_(ptr noundef nonnull align 8 dereferenceable(128), ptr noundef, ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2 align 2

declare i32 @sem_wait(ptr noundef) local_unnamed_addr #1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #3

declare noundef i64 @_ZN7Manager6get_tsEm(ptr noundef nonnull align 8 dereferenceable(1320), i64 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn
declare ptr @llvm.stacksave.p0() #4

; Function Attrs: nounwind
declare i32 @sem_post(ptr noundef) local_unnamed_addr #5

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN5OptCC10test_validEP7set_entS1_(ptr noundef nonnull align 8 dereferenceable(128), ptr noundef, ptr noundef) local_unnamed_addr #6 align 2

declare void @_ZN9mem_alloc4freeEPvm(ptr noundef nonnull align 1 dereferenceable(1), ptr noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn
declare void @llvm.stackrestore.p0(ptr) #4

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nocallback nofree nosync nounwind willreturn }
attributes #5 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }
attributes #8 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !12, i64 16}
!10 = !{!"_ZTS7set_ent", !11, i64 0, !6, i64 8, !12, i64 16, !6, i64 24, !6, i64 32}
!11 = !{!"long", !7, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !6, i64 0}
!14 = !{!"_ZTS5Stats", !6, i64 0, !6, i64 8, !11, i64 16, !11, i64 24, !11, i64 32, !11, i64 40}
!15 = !{!16, !17, i64 1048}
!16 = !{!"_ZTS9Stats_thd", !7, i64 0, !6, i64 64, !6, i64 72, !17, i64 80, !11, i64 88, !11, i64 96, !11, i64 104, !11, i64 112, !11, i64 120, !11, i64 128, !11, i64 136, !11, i64 144, !11, i64 152, !11, i64 160, !11, i64 168, !11, i64 176, !17, i64 184, !11, i64 192, !17, i64 200, !11, i64 208, !17, i64 216, !11, i64 224, !11, i64 232, !17, i64 240, !17, i64 248, !17, i64 256, !17, i64 264, !17, i64 272, !17, i64 280, !17, i64 288, !17, i64 296, !11, i64 304, !17, i64 312, !17, i64 320, !17, i64 328, !17, i64 336, !17, i64 344, !17, i64 352, !17, i64 360, !17, i64 368, !11, i64 376, !11, i64 384, !17, i64 392, !11, i64 400, !17, i64 408, !11, i64 416, !17, i64 424, !17, i64 432, !17, i64 440, !11, i64 448, !11, i64 456, !11, i64 464, !17, i64 472, !17, i64 480, !17, i64 488, !17, i64 496, !17, i64 504, !17, i64 512, !17, i64 520, !17, i64 528, !17, i64 536, !11, i64 544, !6, i64 552, !6, i64 560, !17, i64 568, !11, i64 576, !11, i64 584, !17, i64 592, !17, i64 600, !17, i64 608, !11, i64 616, !11, i64 624, !11, i64 632, !11, i64 640, !11, i64 648, !11, i64 656, !11, i64 664, !17, i64 672, !17, i64 680, !17, i64 688, !11, i64 696, !11, i64 704, !11, i64 712, !11, i64 720, !11, i64 728, !11, i64 736, !11, i64 744, !11, i64 752, !11, i64 760, !17, i64 768, !17, i64 776, !17, i64 784, !17, i64 792, !17, i64 800, !11, i64 808, !11, i64 816, !17, i64 824, !17, i64 832, !11, i64 840, !11, i64 848, !11, i64 856, !17, i64 864, !17, i64 872, !11, i64 880, !11, i64 888, !17, i64 896, !17, i64 904, !17, i64 912, !17, i64 920, !11, i64 928, !11, i64 936, !17, i64 944, !17, i64 952, !17, i64 960, !11, i64 968, !11, i64 976, !17, i64 984, !17, i64 992, !17, i64 1000, !17, i64 1008, !17, i64 1016, !11, i64 1024, !17, i64 1032, !17, i64 1040, !17, i64 1048, !17, i64 1056, !17, i64 1064, !17, i64 1072, !17, i64 1080, !17, i64 1088, !11, i64 1096, !11, i64 1104, !11, i64 1112, !17, i64 1120, !11, i64 1128, !17, i64 1136, !17, i64 1144, !11, i64 1152, !11, i64 1160, !11, i64 1168, !11, i64 1176, !11, i64 1184, !17, i64 1192, !11, i64 1200, !11, i64 1208, !17, i64 1216, !11, i64 1224, !17, i64 1232, !17, i64 1240, !11, i64 1248, !11, i64 1256, !11, i64 1264, !11, i64 1272, !11, i64 1280, !17, i64 1288, !17, i64 1296, !17, i64 1304, !18, i64 1312, !18, i64 1384, !18, i64 1456, !18, i64 1528, !17, i64 1600, !17, i64 1608, !17, i64 1616, !17, i64 1624, !17, i64 1632, !17, i64 1640, !17, i64 1648, !17, i64 1656, !17, i64 1664, !17, i64 1672, !17, i64 1680, !17, i64 1688, !17, i64 1696, !17, i64 1704, !17, i64 1712, !17, i64 1720, !17, i64 1728, !17, i64 1736, !17, i64 1744, !17, i64 1752, !17, i64 1760, !17, i64 1768, !17, i64 1776, !17, i64 1784, !17, i64 1792, !17, i64 1800, !17, i64 1808, !17, i64 1816, !17, i64 1824, !17, i64 1832, !17, i64 1840, !17, i64 1848, !17, i64 1856, !17, i64 1864, !17, i64 1872, !17, i64 1880, !6, i64 1888, !7, i64 1896}
!17 = !{!"double", !7, i64 0}
!18 = !{!"_ZTS8StatsArr", !6, i64 0, !11, i64 8, !11, i64 16, !19, i64 24, !7, i64 32}
!19 = !{!"_ZTS12StatsArrType", !7, i64 0}
!20 = !{!21, !21, i64 0}
!21 = !{!"bool", !7, i64 0}
!22 = !{i8 0, i8 2}
!23 = !{}
!24 = !{!25, !6, i64 24}
!25 = !{!"_ZTS5OptCC", !21, i64 0, !11, i64 8, !6, i64 16, !6, i64 24, !11, i64 32, !11, i64 40, !11, i64 48, !7, i64 56, !7, i64 96}
!26 = !{!25, !11, i64 40}
!27 = !{!10, !6, i64 32}
!28 = distinct !{!28, !29}
!29 = !{!"llvm.loop.mustprogress"}
!30 = !{!25, !6, i64 16}
!31 = !{!16, !17, i64 1056}
!32 = !{!10, !11, i64 0}
!33 = distinct !{!33, !29}
!34 = !{!16, !17, i64 1080}
!35 = distinct !{!35, !29}
!36 = !{!16, !17, i64 1064}
!37 = distinct !{!37, !29}
!38 = !{!16, !17, i64 1088}
!39 = !{!16, !17, i64 1072}
!40 = !{!10, !6, i64 24}
!41 = !{!16, !11, i64 1096}
!42 = !{!16, !11, i64 1104}
!43 = !{!10, !6, i64 8}
!44 = distinct !{!44, !29}
!45 = !{!16, !17, i64 1040}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass