; LLVM IR from tangjz/acm-icpc :: lydsy/4587.ll (Z4initv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@cnt = external dso_local global i32, align 4
@Exp = external dso_local global [11 x i32], align 16
@Coeff = external dso_local global i32, align 4
@Lim = external dso_local global [11 x i32], align 16
@Pw = external dso_local global [11 x [51 x i32]], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z4initv() #1 {
  %1 = alloca i32, align 4
  store i32 1, ptr @Coeff, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #2
  store i32 0, ptr %1, align 4, !tbaa !5
  br label %2

2:                                                ; preds = %18, %0
  %3 = load i32, ptr %1, align 4, !tbaa !5
  %4 = load i32, ptr @cnt, align 4, !tbaa !5
  %5 = icmp slt i32 %3, %4
  br i1 %5, label %7, label %6

6:                                                ; preds = %2
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #2
  br label %21

7:                                                ; preds = %2
  %8 = load i32, ptr %1, align 4, !tbaa !5
  %9 = sext i32 %8 to i64
  %10 = getelementptr inbounds [11 x i32], ptr @Lim, i64 0, i64 %9
  store i32 0, ptr %10, align 4, !tbaa !5
  %11 = load i32, ptr %1, align 4, !tbaa !5
  %12 = sext i32 %11 to i64
  %13 = getelementptr inbounds [11 x i32], ptr @Exp, i64 0, i64 %12
  store i32 0, ptr %13, align 4, !tbaa !5
  %14 = load i32, ptr %1, align 4, !tbaa !5
  %15 = sext i32 %14 to i64
  %16 = getelementptr inbounds [11 x [51 x i32]], ptr @Pw, i64 0, i64 %15
  %17 = getelementptr inbounds [51 x i32], ptr %16, i64 0, i64 0
  store i32 1, ptr %17, align 4, !tbaa !5
  br label %18

18:                                               ; preds = %7
  %19 = load i32, ptr %1, align 4, !tbaa !5
  %20 = add nsw i32 %19, 1
  store i32 %20, ptr %1, align 4, !tbaa !5
  br label %2, !llvm.loop !9

21:                                               ; preds = %6
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@cnt = external dso_local local_unnamed_addr global i32, align 4
@Exp = external dso_local local_unnamed_addr global [11 x i32], align 16
@Coeff = external dso_local local_unnamed_addr global i32, align 4
@Lim = external dso_local local_unnamed_addr global [11 x i32], align 16
@Pw = external dso_local local_unnamed_addr global [11 x [51 x i32]], align 16

; Function Attrs: mustprogress nofree norecurse nosync nounwind memory(readwrite, argmem: none, inaccessiblemem: none) uwtable
define dso_local void @_Z4initv() local_unnamed_addr #0 {
  store i32 1, ptr @Coeff, align 4, !tbaa !5
  %1 = load i32, ptr @cnt, align 4, !tbaa !5
  %2 = icmp sgt i32 %1, 0
  br i1 %2, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %0
  %3 = zext nneg i32 %1 to i64
  %4 = shl nuw nsw i64 %3, 2
  tail call void @llvm.memset.p0.i64(ptr nonnull align 16 @Lim, i8 0, i64 %4, i1 false), !tbaa !5
  tail call void @llvm.memset.p0.i64(ptr nonnull align 16 @Exp, i8 0, i64 %4, i1 false), !tbaa !5
  %xtraiter = and i64 %3, 3
  %5 = icmp ult i32 %1, 4
  br i1 %5, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph.preheader.new

.lr.ph.preheader.new:                             ; preds = %.lr.ph.preheader
  %unroll_iter = and i64 %3, 2147483644
  br label %.lr.ph

._crit_edge.loopexit.unr-lcssa:                   ; preds = %.lr.ph, %.lr.ph.preheader
  %indvars.iv.unr = phi i64 [ 0, %.lr.ph.preheader ], [ %indvars.iv.next.3, %.lr.ph ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge, label %.lr.ph.epil

.lr.ph.epil:                                      ; preds = %._crit_edge.loopexit.unr-lcssa, %.lr.ph.epil
  %indvars.iv.epil = phi i64 [ %indvars.iv.next.epil, %.lr.ph.epil ], [ %indvars.iv.unr, %._crit_edge.loopexit.unr-lcssa ]
  %epil.iter = phi i64 [ %epil.iter.next, %.lr.ph.epil ], [ 0, %._crit_edge.loopexit.unr-lcssa ]
  %6 = getelementptr inbounds [11 x [51 x i32]], ptr @Pw, i64 0, i64 %indvars.iv.epil
  store i32 1, ptr %6, align 4, !tbaa !5
  %indvars.iv.next.epil = add nuw nsw i64 %indvars.iv.epil, 1
  %epil.iter.next = add i64 %epil.iter, 1
  %epil.iter.cmp.not = icmp eq i64 %epil.iter.next, %xtraiter
  br i1 %epil.iter.cmp.not, label %._crit_edge, label %.lr.ph.epil, !llvm.loop !9

._crit_edge:                                      ; preds = %._crit_edge.loopexit.unr-lcssa, %.lr.ph.epil, %0
  ret void

.lr.ph:                                           ; preds = %.lr.ph, %.lr.ph.preheader.new
  %indvars.iv = phi i64 [ 0, %.lr.ph.preheader.new ], [ %indvars.iv.next.3, %.lr.ph ]
  %niter = phi i64 [ 0, %.lr.ph.preheader.new ], [ %niter.next.3, %.lr.ph ]
  %7 = getelementptr inbounds [11 x [51 x i32]], ptr @Pw, i64 0, i64 %indvars.iv
  store i32 1, ptr %7, align 16, !tbaa !5
  %indvars.iv.next = or disjoint i64 %indvars.iv, 1
  %8 = getelementptr inbounds [11 x [51 x i32]], ptr @Pw, i64 0, i64 %indvars.iv.next
  store i32 1, ptr %8, align 4, !tbaa !5
  %indvars.iv.next.1 = or disjoint i64 %indvars.iv, 2
  %9 = getelementptr inbounds [11 x [51 x i32]], ptr @Pw, i64 0, i64 %indvars.iv.next.1
  store i32 1, ptr %9, align 8, !tbaa !5
  %indvars.iv.next.2 = or disjoint i64 %indvars.iv, 3
  %10 = getelementptr inbounds [11 x [51 x i32]], ptr @Pw, i64 0, i64 %indvars.iv.next.2
  store i32 1, ptr %10, align 4, !tbaa !5
  %indvars.iv.next.3 = add nuw nsw i64 %indvars.iv, 4
  %niter.next.3 = add i64 %niter, 4
  %niter.ncmp.3 = icmp eq i64 %niter.next.3, %unroll_iter
  br i1 %niter.ncmp.3, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph, !llvm.loop !11
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

attributes #0 = { mustprogress nofree norecurse nosync nounwind memory(readwrite, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.unroll.disable"}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopIdiomRecognizePass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass