; LLVM IR from tangjz/acm-icpc :: codeforces/complete/193E.ll (Z7mod_mulxx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@p = external dso_local global i64, align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z7mod_addxx(i64 noundef, i64 noundef) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z7mod_mulxx(i64 noundef %0, i64 noundef %1) #0 {
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  store i64 %0, ptr %3, align 8, !tbaa !5
  store i64 %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #3
  store i64 0, ptr %5, align 8, !tbaa !5
  %6 = load i64, ptr %3, align 8, !tbaa !5
  %7 = load i64, ptr %4, align 8, !tbaa !5
  %8 = icmp slt i64 %6, %7
  br i1 %8, label %9, label %10

9:                                                ; preds = %2
  call void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) %3, ptr noundef nonnull align 8 dereferenceable(8) %4) #3
  br label %10

10:                                               ; preds = %9, %2
  br label %11

11:                                               ; preds = %27, %10
  %12 = load i64, ptr %4, align 8, !tbaa !5
  %13 = icmp ne i64 %12, 0
  br i1 %13, label %14, label %34

14:                                               ; preds = %11
  %15 = load i64, ptr %4, align 8, !tbaa !5
  %16 = and i64 %15, 524287
  %17 = icmp ne i64 %16, 0
  br i1 %17, label %18, label %27

18:                                               ; preds = %14
  %19 = load i64, ptr %5, align 8, !tbaa !5
  %20 = load i64, ptr %3, align 8, !tbaa !5
  %21 = load i64, ptr %4, align 8, !tbaa !5
  %22 = and i64 %21, 524287
  %23 = mul nsw i64 %20, %22
  %24 = load i64, ptr @p, align 8, !tbaa !5
  %25 = srem i64 %23, %24
  %26 = call noundef i64 @_Z7mod_addxx(i64 noundef %19, i64 noundef %25)
  store i64 %26, ptr %5, align 8, !tbaa !5
  br label %27

27:                                               ; preds = %18, %14
  %28 = load i64, ptr %3, align 8, !tbaa !5
  %29 = mul nsw i64 %28, 524288
  %30 = load i64, ptr @p, align 8, !tbaa !5
  %31 = srem i64 %29, %30
  store i64 %31, ptr %3, align 8, !tbaa !5
  %32 = load i64, ptr %4, align 8, !tbaa !5
  %33 = ashr i64 %32, 19
  store i64 %33, ptr %4, align 8, !tbaa !5
  br label %11, !llvm.loop !9

34:                                               ; preds = %11
  %35 = load i64, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #3
  ret i64 %35
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@p = external dso_local local_unnamed_addr global i64, align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z7mod_addxx(i64 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z7mod_mulxx(i64 noundef %0, i64 noundef %1) local_unnamed_addr #0 {
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  store i64 %0, ptr %3, align 8, !tbaa !5
  store i64 %1, ptr %4, align 8, !tbaa !5
  %5 = icmp slt i64 %0, %1
  br i1 %5, label %6, label %7

6:                                                ; preds = %2
  call void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) %3, ptr noundef nonnull align 8 dereferenceable(8) %4) #2
  %.pr.pre = load i64, ptr %4, align 8, !tbaa !5
  br label %7

7:                                                ; preds = %6, %2
  %.pr = phi i64 [ %.pr.pre, %6 ], [ %1, %2 ]
  %.not5 = icmp eq i64 %.pr, 0
  br i1 %.not5, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %7
  %.pre8.pre = load i64, ptr %3, align 8, !tbaa !5
  %.pre10.pre = load i64, ptr @p, align 8, !tbaa !5
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %14
  %.pre10 = phi i64 [ %.pre1013, %14 ], [ %.pre10.pre, %.lr.ph.preheader ]
  %.pre8 = phi i64 [ %18, %14 ], [ %.pre8.pre, %.lr.ph.preheader ]
  %.06 = phi i64 [ %.1, %14 ], [ 0, %.lr.ph.preheader ]
  %8 = phi i64 [ %19, %14 ], [ %.pr, %.lr.ph.preheader ]
  %9 = and i64 %8, 524287
  %.not4 = icmp eq i64 %9, 0
  br i1 %.not4, label %14, label %10

10:                                               ; preds = %.lr.ph
  %11 = mul nsw i64 %.pre8, %9
  %12 = srem i64 %11, %.pre10
  %13 = call noundef i64 @_Z7mod_addxx(i64 noundef %.06, i64 noundef %12)
  %.pre = load i64, ptr %3, align 8, !tbaa !5
  %.pre9 = load i64, ptr @p, align 8, !tbaa !5
  %.pre11 = load i64, ptr %4, align 8, !tbaa !5
  br label %14

14:                                               ; preds = %10, %.lr.ph
  %.pre1013 = phi i64 [ %.pre9, %10 ], [ %.pre10, %.lr.ph ]
  %15 = phi i64 [ %.pre11, %10 ], [ %8, %.lr.ph ]
  %16 = phi i64 [ %.pre, %10 ], [ %.pre8, %.lr.ph ]
  %.1 = phi i64 [ %13, %10 ], [ %.06, %.lr.ph ]
  %17 = shl nsw i64 %16, 19
  %18 = srem i64 %17, %.pre1013
  store i64 %18, ptr %3, align 8, !tbaa !5
  %19 = ashr i64 %15, 19
  store i64 %19, ptr %4, align 8, !tbaa !5
  %.not = icmp ult i64 %15, 524288
  br i1 %.not, label %._crit_edge, label %.lr.ph, !llvm.loop !9

._crit_edge:                                      ; preds = %14, %7
  %.0.lcssa = phi i64 [ 0, %7 ], [ %.1, %14 ]
  ret i64 %.0.lcssa
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass