; LLVM IR from ubaldot/defrecs :: stm32f4x/ADC_Readings/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/arm (main)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@testInput_f32 = external dso_local global [32 x float], align 16
@blockSize = external dso_local global i32, align 4
@refVarianceOut = external dso_local global float, align 4
@wire1 = external dso_local global [32 x float], align 16
@wire2 = external dso_local global [32 x float], align 16
@wire3 = external dso_local global [32 x float], align 16

; Function Attrs: nounwind uwtable
define dso_local i32 @main() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca float, align 4
  %4 = alloca float, align 4
  %5 = alloca float, align 4
  %6 = alloca float, align 4
  store i32 0, ptr %1, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  store i32 0, ptr %2, align 4, !tbaa !5
  %7 = load i32, ptr @blockSize, align 4, !tbaa !5
  call void @arm_fill_f32(float noundef 1.000000e+00, ptr noundef @wire1, i32 noundef %7)
  %8 = load i32, ptr @blockSize, align 4, !tbaa !5
  call void @arm_dot_prod_f32(ptr noundef @testInput_f32, ptr noundef @wire1, i32 noundef %8, ptr noundef %3)
  %9 = load i32, ptr @blockSize, align 4, !tbaa !5
  %10 = uitofp i32 %9 to double
  %11 = fdiv double 1.000000e+00, %10
  %12 = fptrunc double %11 to float
  store float %12, ptr %4, align 4, !tbaa !9
  call void @arm_mult_f32(ptr noundef %3, ptr noundef %4, ptr noundef %3, i32 noundef 1)
  %13 = load float, ptr %3, align 4, !tbaa !9
  %14 = load i32, ptr @blockSize, align 4, !tbaa !5
  call void @arm_fill_f32(float noundef %13, ptr noundef @wire2, i32 noundef %14)
  %15 = load i32, ptr @blockSize, align 4, !tbaa !5
  call void @arm_sub_f32(ptr noundef @testInput_f32, ptr noundef @wire2, ptr noundef @wire3, i32 noundef %15)
  %16 = load i32, ptr @blockSize, align 4, !tbaa !5
  call void @arm_copy_f32(ptr noundef @wire3, ptr noundef @wire2, i32 noundef %16)
  %17 = load i32, ptr @blockSize, align 4, !tbaa !5
  call void @arm_dot_prod_f32(ptr noundef @wire2, ptr noundef @wire3, i32 noundef %17, ptr noundef %5)
  %18 = load i32, ptr @blockSize, align 4, !tbaa !5
  %19 = sub i32 %18, 1
  %20 = uitofp i32 %19 to double
  %21 = fdiv double 1.000000e+00, %20
  %22 = fptrunc double %21 to float
  store float %22, ptr %4, align 4, !tbaa !9
  call void @arm_mult_f32(ptr noundef %5, ptr noundef %4, ptr noundef %5, i32 noundef 1)
  %23 = load float, ptr @refVarianceOut, align 4, !tbaa !9
  %24 = load float, ptr %5, align 4, !tbaa !9
  %25 = fsub float %23, %24
  %26 = call float @llvm.fabs.f32(float %25)
  store float %26, ptr %6, align 4, !tbaa !9
  %27 = load float, ptr %6, align 4, !tbaa !9
  %28 = fcmp ogt float %27, 0x3EB0C6F7A0000000
  %29 = zext i1 %28 to i64
  %30 = select i1 %28, i32 -6, i32 0
  store i32 %30, ptr %2, align 4, !tbaa !5
  %31 = load i32, ptr %2, align 4, !tbaa !5
  %32 = icmp ne i32 %31, 0
  br i1 %32, label %33, label %36

33:                                               ; preds = %0
  br label %34

34:                                               ; preds = %35, %33
  br label %35

35:                                               ; preds = %34
  br label %34

36:                                               ; preds = %0
  br label %37

37:                                               ; preds = %38, %36
  br label %38

38:                                               ; preds = %37
  br label %37
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @arm_fill_f32(float noundef, ptr noundef, i32 noundef) #2

declare void @arm_dot_prod_f32(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #2

declare void @arm_mult_f32(ptr noundef, ptr noundef, ptr noundef, i32 noundef) #2

declare void @arm_sub_f32(ptr noundef, ptr noundef, ptr noundef, i32 noundef) #2

declare void @arm_copy_f32(ptr noundef, ptr noundef, i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fabs.f32(float) #3

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"float", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@testInput_f32 = external dso_local global [32 x float], align 16
@blockSize = external dso_local local_unnamed_addr global i32, align 4
@refVarianceOut = external dso_local local_unnamed_addr global float, align 4
@wire1 = external dso_local global [32 x float], align 16
@wire2 = external dso_local global [32 x float], align 16
@wire3 = external dso_local global [32 x float], align 16

; Function Attrs: noreturn nounwind uwtable
define dso_local noundef i32 @main() local_unnamed_addr #0 {
  %1 = alloca float, align 4
  %2 = alloca float, align 4
  %3 = alloca float, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #4
  %4 = load i32, ptr @blockSize, align 4, !tbaa !5
  tail call void @arm_fill_f32(float noundef 1.000000e+00, ptr noundef nonnull @wire1, i32 noundef %4) #4
  %5 = load i32, ptr @blockSize, align 4, !tbaa !5
  call void @arm_dot_prod_f32(ptr noundef nonnull @testInput_f32, ptr noundef nonnull @wire1, i32 noundef %5, ptr noundef nonnull %1) #4
  %6 = load i32, ptr @blockSize, align 4, !tbaa !5
  %7 = uitofp i32 %6 to double
  %8 = fdiv double 1.000000e+00, %7
  %9 = fptrunc double %8 to float
  store float %9, ptr %2, align 4, !tbaa !9
  call void @arm_mult_f32(ptr noundef nonnull %1, ptr noundef nonnull %2, ptr noundef nonnull %1, i32 noundef 1) #4
  %10 = load float, ptr %1, align 4, !tbaa !9
  %11 = load i32, ptr @blockSize, align 4, !tbaa !5
  call void @arm_fill_f32(float noundef %10, ptr noundef nonnull @wire2, i32 noundef %11) #4
  %12 = load i32, ptr @blockSize, align 4, !tbaa !5
  call void @arm_sub_f32(ptr noundef nonnull @testInput_f32, ptr noundef nonnull @wire2, ptr noundef nonnull @wire3, i32 noundef %12) #4
  %13 = load i32, ptr @blockSize, align 4, !tbaa !5
  call void @arm_copy_f32(ptr noundef nonnull @wire3, ptr noundef nonnull @wire2, i32 noundef %13) #4
  %14 = load i32, ptr @blockSize, align 4, !tbaa !5
  call void @arm_dot_prod_f32(ptr noundef nonnull @wire2, ptr noundef nonnull @wire3, i32 noundef %14, ptr noundef nonnull %3) #4
  %15 = load i32, ptr @blockSize, align 4, !tbaa !5
  %16 = add i32 %15, -1
  %17 = uitofp i32 %16 to double
  %18 = fdiv double 1.000000e+00, %17
  %19 = fptrunc double %18 to float
  store float %19, ptr %2, align 4, !tbaa !9
  call void @arm_mult_f32(ptr noundef nonnull %3, ptr noundef nonnull %2, ptr noundef nonnull %3, i32 noundef 1) #4
  %20 = load float, ptr @refVarianceOut, align 4, !tbaa !9
  %21 = load float, ptr %3, align 4, !tbaa !9
  %22 = fsub float %20, %21
  %23 = call float @llvm.fabs.f32(float %22)
  %24 = fcmp ogt float %23, 0x3EB0C6F7A0000000
  br i1 %24, label %.preheader, label %.preheader1

.preheader:                                       ; preds = %0, %.preheader
  br label %.preheader

.preheader1:                                      ; preds = %0, %.preheader1
  br label %.preheader1
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @arm_fill_f32(float noundef, ptr noundef, i32 noundef) local_unnamed_addr #2

declare void @arm_dot_prod_f32(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2

declare void @arm_mult_f32(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2

declare void @arm_sub_f32(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2

declare void @arm_copy_f32(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fabs.f32(float) #3

attributes #0 = { noreturn nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"float", !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass