; LLVM IR from ubaldot/defrecs :: stm32f4x/ADC_Readings/Drivers/CMSIS/DSP/Source/TransformFunctions (q31)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.arm_matrix_instance_q31 = type { i16, i16, ptr }
%struct.arm_mfcc_instance_q31 = type { ptr, ptr, ptr, ptr, ptr, i32, i32, i32, %struct.arm_rfft_instance_q31 }
%struct.arm_rfft_instance_q31 = type { i32, i8, i8, i32, ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @__SSAT(i32 noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @arm_mfcc_q31(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) #2 {
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i64, align 8
  %15 = alloca %struct.arm_matrix_instance_q31, align 8
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca ptr, align 8
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca i16, align 2
  %23 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store ptr %2, ptr %8, align 8, !tbaa !5
  store ptr %3, ptr %9, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  store i32 0, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #4
  call void @llvm.lifetime.start.p0(i64 16, ptr %15) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %19) #4
  %24 = load ptr, ptr %9, align 8, !tbaa !5
  store ptr %24, ptr %19, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #4
  store i32 0, ptr %20, align 4, !tbaa !9
  %25 = load ptr, ptr %7, align 8, !tbaa !5
  %26 = load ptr, ptr %6, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.arm_mfcc_instance_q31, ptr %26, i32 0, i32 5
  %28 = load i32, ptr %27, align 8, !tbaa !11
  call void @arm_absmax_q31(ptr noundef %25, i32 noundef %28, ptr noundef %10, ptr noundef %11)
  %29 = load i32, ptr %10, align 4, !tbaa !9
  %30 = icmp ne i32 %29, 0
  br i1 %30, label %31, label %50

31:                                               ; preds = %4
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #4
  call void @llvm.lifetime.start.p0(i64 2, ptr %22) #4
  %32 = load i32, ptr %10, align 4, !tbaa !9
  %33 = call i32 @arm_divide_q31(i32 noundef 2147483647, i32 noundef %32, ptr noundef %21, ptr noundef %22)
  store i32 %33, ptr %20, align 4, !tbaa !9
  %34 = load i32, ptr %20, align 4, !tbaa !9
  %35 = icmp ne i32 %34, 0
  br i1 %35, label %36, label %38

36:                                               ; preds = %31
  %37 = load i32, ptr %20, align 4, !tbaa !9
  store i32 %37, ptr %5, align 4
  store i32 1, ptr %23, align 4
  br label %47

38:                                               ; preds = %31
  %39 = load ptr, ptr %7, align 8, !tbaa !5
  %40 = load i32, ptr %21, align 4, !tbaa !9
  %41 = load i16, ptr %22, align 2, !tbaa !14
  %42 = trunc i16 %41 to i8
  %43 = load ptr, ptr %7, align 8, !tbaa !5
  %44 = load ptr, ptr %6, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.arm_mfcc_instance_q31, ptr %44, i32 0, i32 5
  %46 = load i32, ptr %45, align 8, !tbaa !11
  call void @arm_scale_q31(ptr noundef %39, i32 noundef %40, i8 noundef signext %42, ptr noundef %43, i32 noundef %46)
  store i32 0, ptr %23, align 4
  br label %47

47:                                               ; preds = %38, %36
  call void @llvm.lifetime.end.p0(i64 2, ptr %22) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #4
  %48 = load i32, ptr %23, align 4
  switch i32 %48, label %169 [
    i32 0, label %49
  ]

49:                                               ; preds = %47
  br label %50

50:                                               ; preds = %49, %4
  %51 = load ptr, ptr %7, align 8, !tbaa !5
  %52 = load ptr, ptr %6, align 8, !tbaa !5
  %53 = getelementptr inbounds %struct.arm_mfcc_instance_q31, ptr %52, i32 0, i32 2
  %54 = load ptr, ptr %53, align 8, !tbaa !16
  %55 = load ptr, ptr %7, align 8, !tbaa !5
  %56 = load ptr, ptr %6, align 8, !tbaa !5
  %57 = getelementptr inbounds %struct.arm_mfcc_instance_q31, ptr %56, i32 0, i32 5
  %58 = load i32, ptr %57, align 8, !tbaa !11
  call void @arm_mult_q31(ptr noundef %51, ptr noundef %54, ptr noundef %55, i32 noundef %58)
  %59 = load ptr, ptr %6, align 8, !tbaa !5
  %60 = getelementptr inbounds %struct.arm_mfcc_instance_q31, ptr %59, i32 0, i32 5
  %61 = load i32, ptr %60, align 8, !tbaa !11
  %62 = call zeroext i8 @__CLZ(i32 noundef %61)
  %63 = zext i8 %62 to i32
  %64 = sub nsw i32 31, %63
  store i32 %64, ptr %12, align 4, !tbaa !9
  %65 = load ptr, ptr %6, align 8, !tbaa !5
  %66 = getelementptr inbounds %struct.arm_mfcc_instance_q31, ptr %65, i32 0, i32 8
  %67 = load ptr, ptr %7, align 8, !tbaa !5
  %68 = load ptr, ptr %19, align 8, !tbaa !5
  call void @arm_rfft_q31(ptr noundef %66, ptr noundef %67, ptr noundef %68)
  %69 = load ptr, ptr %6, align 8, !tbaa !5
  %70 = getelementptr inbounds %struct.arm_mfcc_instance_q31, ptr %69, i32 0, i32 5
  %71 = load i32, ptr %70, align 8, !tbaa !11
  %72 = lshr i32 %71, 1
  %73 = add i32 1, %72
  store i32 %73, ptr %18, align 4, !tbaa !9
  %74 = load ptr, ptr %19, align 8, !tbaa !5
  %75 = load ptr, ptr %7, align 8, !tbaa !5
  %76 = load i32, ptr %18, align 4, !tbaa !9
  call void @arm_cmplx_mag_q31(ptr noundef %74, ptr noundef %75, i32 noundef %76)
  store i32 0, ptr %17, align 4, !tbaa !9
  store i32 0, ptr %16, align 4, !tbaa !9
  br label %77

77:                                               ; preds = %127, %50
  %78 = load i32, ptr %16, align 4, !tbaa !9
  %79 = load ptr, ptr %6, align 8, !tbaa !5
  %80 = getelementptr inbounds %struct.arm_mfcc_instance_q31, ptr %79, i32 0, i32 6
  %81 = load i32, ptr %80, align 4, !tbaa !17
  %82 = icmp ult i32 %78, %81
  br i1 %82, label %83, label %130

83:                                               ; preds = %77
  %84 = load ptr, ptr %7, align 8, !tbaa !5
  %85 = load ptr, ptr %6, align 8, !tbaa !5
  %86 = getelementptr inbounds %struct.arm_mfcc_instance_q31, ptr %85, i32 0, i32 3
  %87 = load ptr, ptr %86, align 8, !tbaa !18
  %88 = load i32, ptr %16, align 4, !tbaa !9
  %89 = zext i32 %88 to i64
  %90 = getelementptr inbounds i32, ptr %87, i64 %89
  %91 = load i32, ptr %90, align 4, !tbaa !9
  %92 = zext i32 %91 to i64
  %93 = getelementptr inbounds i32, ptr %84, i64 %92
  %94 = load ptr, ptr %6, align 8, !tbaa !5
  %95 = getelementptr inbounds %struct.arm_mfcc_instance_q31, ptr %94, i32 0, i32 1
  %96 = load ptr, ptr %95, align 8, !tbaa !19
  %97 = load i32, ptr %17, align 4, !tbaa !9
  %98 = zext i32 %97 to i64
  %99 = getelementptr inbounds i32, ptr %96, i64 %98
  %100 = load ptr, ptr %6, align 8, !tbaa !5
  %101 = getelementptr inbounds %struct.arm_mfcc_instance_q31, ptr %100, i32 0, i32 4
  %102 = load ptr, ptr %101, align 8, !tbaa !20
  %103 = load i32, ptr %16, align 4, !tbaa !9
  %104 = zext i32 %103 to i64
  %105 = getelementptr inbounds i32, ptr %102, i64 %104
  %106 = load i32, ptr %105, align 4, !tbaa !9
  call void @arm_dot_prod_q31(ptr noundef %93, ptr noundef %99, i32 noundef %106, ptr noundef %14)
  %107 = load ptr, ptr %6, align 8, !tbaa !5
  %108 = getelementptr inbounds %struct.arm_mfcc_instance_q31, ptr %107, i32 0, i32 4
  %109 = load ptr, ptr %108, align 8, !tbaa !20
  %110 = load i32, ptr %16, align 4, !tbaa !9
  %111 = zext i32 %110 to i64
  %112 = getelementptr inbounds i32, ptr %109, i64 %111
  %113 = load i32, ptr %112, align 4, !tbaa !9
  %114 = load i32, ptr %17, align 4, !tbaa !9
  %115 = add i32 %114, %113
  store i32 %115, ptr %17, align 4, !tbaa !9
  %116 = load i64, ptr %14, align 8, !tbaa !21
  %117 = add nsw i64 %116, 140737488
  store i64 %117, ptr %14, align 8, !tbaa !21
  %118 = load i64, ptr %14, align 8, !tbaa !21
  %119 = ashr i64 %118, 28
  store i64 %119, ptr %14, align 8, !tbaa !21
  %120 = load i64, ptr %14, align 8, !tbaa !21
  %121 = trunc i64 %120 to i32
  %122 = call i32 @__SSAT(i32 noundef %121, i32 noundef 31)
  %123 = load ptr, ptr %9, align 8, !tbaa !5
  %124 = load i32, ptr %16, align 4, !tbaa !9
  %125 = zext i32 %124 to i64
  %126 = getelementptr inbounds i32, ptr %123, i64 %125
  store i32 %122, ptr %126, align 4, !tbaa !9
  br label %127

127:                                              ; preds = %83
  %128 = load i32, ptr %16, align 4, !tbaa !9
  %129 = add i32 %128, 1
  store i32 %129, ptr %16, align 4, !tbaa !9
  br label %77, !llvm.loop !23

130:                                              ; preds = %77
  %131 = load ptr, ptr %9, align 8, !tbaa !5
  %132 = load ptr, ptr %9, align 8, !tbaa !5
  %133 = load ptr, ptr %6, align 8, !tbaa !5
  %134 = getelementptr inbounds %struct.arm_mfcc_instance_q31, ptr %133, i32 0, i32 6
  %135 = load i32, ptr %134, align 4, !tbaa !17
  call void @arm_vlog_q31(ptr noundef %131, ptr noundef %132, i32 noundef %135)
  %136 = load i32, ptr %12, align 4, !tbaa !9
  %137 = add i32 %136, 2
  %138 = add i32 %137, 10
  store i32 %138, ptr %13, align 4, !tbaa !9
  %139 = load i32, ptr %13, align 4, !tbaa !9
  %140 = mul nsw i32 %139, 46516320
  store i32 %140, ptr %13, align 4, !tbaa !9
  %141 = load ptr, ptr %9, align 8, !tbaa !5
  %142 = load i32, ptr %13, align 4, !tbaa !9
  %143 = load ptr, ptr %9, align 8, !tbaa !5
  %144 = load ptr, ptr %6, align 8, !tbaa !5
  %145 = getelementptr inbounds %struct.arm_mfcc_instance_q31, ptr %144, i32 0, i32 6
  %146 = load i32, ptr %145, align 4, !tbaa !17
  call void @arm_offset_q31(ptr noundef %141, i32 noundef %142, ptr noundef %143, i32 noundef %146)
  %147 = load ptr, ptr %9, align 8, !tbaa !5
  %148 = load ptr, ptr %9, align 8, !tbaa !5
  %149 = load ptr, ptr %6, align 8, !tbaa !5
  %150 = getelementptr inbounds %struct.arm_mfcc_instance_q31, ptr %149, i32 0, i32 6
  %151 = load i32, ptr %150, align 4, !tbaa !17
  call void @arm_shift_q31(ptr noundef %147, i8 noundef signext -3, ptr noundef %148, i32 noundef %151)
  %152 = load ptr, ptr %6, align 8, !tbaa !5
  %153 = getelementptr inbounds %struct.arm_mfcc_instance_q31, ptr %152, i32 0, i32 7
  %154 = load i32, ptr %153, align 8, !tbaa !25
  %155 = trunc i32 %154 to i16
  %156 = getelementptr inbounds %struct.arm_matrix_instance_q31, ptr %15, i32 0, i32 0
  store i16 %155, ptr %156, align 8, !tbaa !26
  %157 = load ptr, ptr %6, align 8, !tbaa !5
  %158 = getelementptr inbounds %struct.arm_mfcc_instance_q31, ptr %157, i32 0, i32 6
  %159 = load i32, ptr %158, align 4, !tbaa !17
  %160 = trunc i32 %159 to i16
  %161 = getelementptr inbounds %struct.arm_matrix_instance_q31, ptr %15, i32 0, i32 1
  store i16 %160, ptr %161, align 2, !tbaa !28
  %162 = load ptr, ptr %6, align 8, !tbaa !5
  %163 = getelementptr inbounds %struct.arm_mfcc_instance_q31, ptr %162, i32 0, i32 0
  %164 = load ptr, ptr %163, align 8, !tbaa !29
  %165 = getelementptr inbounds %struct.arm_matrix_instance_q31, ptr %15, i32 0, i32 2
  store ptr %164, ptr %165, align 8, !tbaa !30
  %166 = load ptr, ptr %9, align 8, !tbaa !5
  %167 = load ptr, ptr %8, align 8, !tbaa !5
  call void @arm_mat_vec_mult_q31(ptr noundef %15, ptr noundef %166, ptr noundef %167)
  %168 = load i32, ptr %20, align 4, !tbaa !9
  store i32 %168, ptr %5, align 4
  store i32 1, ptr %23, align 4
  br label %169

169:                                              ; preds = %130, %47
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %19) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  %170 = load i32, ptr %5, align 4
  ret i32 %170
}

declare void @arm_absmax_q31(ptr noundef, i32 noundef, ptr noundef, ptr noundef) #3

declare i32 @arm_divide_q31(i32 noundef, i32 noundef, ptr noundef, ptr noundef) #3

declare void @arm_scale_q31(ptr noundef, i32 noundef, i8 noundef signext, ptr noundef, i32 noundef) #3

declare void @arm_mult_q31(ptr noundef, ptr noundef, ptr noundef, i32 noundef) #3

; Function Attrs: alwaysinline nounwind uwtable
declare hidden zeroext i8 @__CLZ(i32 noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local void @arm_rfft_q31(ptr noundef, ptr noundef, ptr noundef) #2

declare void @arm_cmplx_mag_q31(ptr noundef, ptr noundef, i32 noundef) #3

declare void @arm_dot_prod_q31(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #3

declare void @arm_vlog_q31(ptr noundef, ptr noundef, i32 noundef) #3

declare void @arm_offset_q31(ptr noundef, i32 noundef, ptr noundef, i32 noundef) #3

declare void @arm_shift_q31(ptr noundef, i8 noundef signext, ptr noundef, i32 noundef) #3

declare void @arm_mat_vec_mult_q31(ptr noundef, ptr noundef, ptr noundef) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 40}
!12 = !{!"", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !10, i64 40, !10, i64 44, !10, i64 48, !13, i64 56}
!13 = !{!"", !10, i64 0, !7, i64 4, !7, i64 5, !10, i64 8, !6, i64 16, !6, i64 24, !6, i64 32}
!14 = !{!15, !15, i64 0}
!15 = !{!"short", !7, i64 0}
!16 = !{!12, !6, i64 16}
!17 = !{!12, !10, i64 44}
!18 = !{!12, !6, i64 24}
!19 = !{!12, !6, i64 8}
!20 = !{!12, !6, i64 32}
!21 = !{!22, !22, i64 0}
!22 = !{!"long", !7, i64 0}
!23 = distinct !{!23, !24}
!24 = !{!"llvm.loop.mustprogress"}
!25 = !{!12, !10, i64 48}
!26 = !{!27, !15, i64 0}
!27 = !{!"", !15, i64 0, !15, i64 2, !6, i64 8}
!28 = !{!27, !15, i64 2}
!29 = !{!12, !6, i64 0}
!30 = !{!27, !6, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.arm_matrix_instance_q31 = type { i16, i16, ptr }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @__SSAT(i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local i32 @arm_mfcc_q31(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) local_unnamed_addr #2 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i64, align 8
  %8 = alloca %struct.arm_matrix_instance_q31, align 8
  %9 = alloca i32, align 4
  %10 = alloca i16, align 2
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %7) #4
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %8) #4
  %11 = getelementptr inbounds i8, ptr %0, i64 40
  %12 = load i32, ptr %11, align 8, !tbaa !5
  call void @arm_absmax_q31(ptr noundef %1, i32 noundef %12, ptr noundef nonnull %5, ptr noundef nonnull %6) #4
  %13 = load i32, ptr %5, align 4, !tbaa !12
  %.not = icmp eq i32 %13, 0
  br i1 %.not, label %21, label %14

14:                                               ; preds = %4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %9) #4
  call void @llvm.lifetime.start.p0(i64 2, ptr nonnull %10) #4
  %15 = call i32 @arm_divide_q31(i32 noundef 2147483647, i32 noundef %13, ptr noundef nonnull %9, ptr noundef nonnull %10) #4
  %.not59 = icmp eq i32 %15, 0
  br i1 %.not59, label %16, label %.critedge

16:                                               ; preds = %14
  %17 = load i32, ptr %9, align 4, !tbaa !12
  %18 = load i16, ptr %10, align 2, !tbaa !13
  %19 = trunc i16 %18 to i8
  %20 = load i32, ptr %11, align 8, !tbaa !5
  call void @arm_scale_q31(ptr noundef %1, i32 noundef %17, i8 noundef signext %19, ptr noundef %1, i32 noundef %20) #4
  call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %10) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %9) #4
  br label %21

21:                                               ; preds = %16, %4
  %22 = getelementptr inbounds i8, ptr %0, i64 16
  %23 = load ptr, ptr %22, align 8, !tbaa !15
  %24 = load i32, ptr %11, align 8, !tbaa !5
  call void @arm_mult_q31(ptr noundef %1, ptr noundef %23, ptr noundef %1, i32 noundef %24) #4
  %25 = load i32, ptr %11, align 8, !tbaa !5
  %26 = call zeroext i8 @__CLZ(i32 noundef %25)
  %27 = zext i8 %26 to i32
  %28 = getelementptr inbounds i8, ptr %0, i64 56
  call void @arm_rfft_q31(ptr noundef nonnull %28, ptr noundef %1, ptr noundef %3)
  %29 = load i32, ptr %11, align 8, !tbaa !5
  %30 = lshr i32 %29, 1
  %31 = add nuw i32 %30, 1
  call void @arm_cmplx_mag_q31(ptr noundef %3, ptr noundef %1, i32 noundef %31) #4
  %32 = getelementptr inbounds i8, ptr %0, i64 44
  %33 = load i32, ptr %32, align 4, !tbaa !16
  %.not63 = icmp eq i32 %33, 0
  br i1 %.not63, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %21
  %34 = getelementptr inbounds i8, ptr %0, i64 24
  %35 = getelementptr inbounds i8, ptr %0, i64 8
  %36 = getelementptr inbounds i8, ptr %0, i64 32
  br label %37

37:                                               ; preds = %.lr.ph, %37
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %37 ]
  %.05662 = phi i32 [ 0, %.lr.ph ], [ %52, %37 ]
  %38 = load ptr, ptr %34, align 8, !tbaa !17
  %39 = getelementptr inbounds i32, ptr %38, i64 %indvars.iv
  %40 = load i32, ptr %39, align 4, !tbaa !12
  %41 = zext i32 %40 to i64
  %42 = getelementptr inbounds i32, ptr %1, i64 %41
  %43 = load ptr, ptr %35, align 8, !tbaa !18
  %44 = zext i32 %.05662 to i64
  %45 = getelementptr inbounds i32, ptr %43, i64 %44
  %46 = load ptr, ptr %36, align 8, !tbaa !19
  %47 = getelementptr inbounds i32, ptr %46, i64 %indvars.iv
  %48 = load i32, ptr %47, align 4, !tbaa !12
  call void @arm_dot_prod_q31(ptr noundef %42, ptr noundef %45, i32 noundef %48, ptr noundef nonnull %7) #4
  %49 = load ptr, ptr %36, align 8, !tbaa !19
  %50 = getelementptr inbounds i32, ptr %49, i64 %indvars.iv
  %51 = load i32, ptr %50, align 4, !tbaa !12
  %52 = add i32 %51, %.05662
  %53 = load i64, ptr %7, align 8, !tbaa !20
  %54 = add nsw i64 %53, 140737488
  %55 = ashr i64 %54, 28
  store i64 %55, ptr %7, align 8, !tbaa !20
  %56 = trunc i64 %55 to i32
  %57 = call i32 @__SSAT(i32 noundef %56, i32 noundef 31)
  %58 = getelementptr inbounds i32, ptr %3, i64 %indvars.iv
  store i32 %57, ptr %58, align 4, !tbaa !12
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %59 = load i32, ptr %32, align 4, !tbaa !16
  %60 = zext i32 %59 to i64
  %61 = icmp ult i64 %indvars.iv.next, %60
  br i1 %61, label %37, label %._crit_edge, !llvm.loop !22

._crit_edge:                                      ; preds = %37, %21
  %.lcssa = phi i32 [ 0, %21 ], [ %59, %37 ]
  call void @arm_vlog_q31(ptr noundef %3, ptr noundef %3, i32 noundef %.lcssa) #4
  %62 = sub nsw i32 43, %27
  %63 = mul nsw i32 %62, 46516320
  %64 = load i32, ptr %32, align 4, !tbaa !16
  call void @arm_offset_q31(ptr noundef %3, i32 noundef %63, ptr noundef %3, i32 noundef %64) #4
  %65 = load i32, ptr %32, align 4, !tbaa !16
  call void @arm_shift_q31(ptr noundef %3, i8 noundef signext -3, ptr noundef %3, i32 noundef %65) #4
  %66 = getelementptr inbounds i8, ptr %0, i64 48
  %67 = load i32, ptr %66, align 8, !tbaa !24
  %68 = trunc i32 %67 to i16
  store i16 %68, ptr %8, align 8, !tbaa !25
  %69 = load i32, ptr %32, align 4, !tbaa !16
  %70 = trunc i32 %69 to i16
  %71 = getelementptr inbounds i8, ptr %8, i64 2
  store i16 %70, ptr %71, align 2, !tbaa !27
  %72 = load ptr, ptr %0, align 8, !tbaa !28
  %73 = getelementptr inbounds i8, ptr %8, i64 8
  store ptr %72, ptr %73, align 8, !tbaa !29
  call void @arm_mat_vec_mult_q31(ptr noundef nonnull %8, ptr noundef %3, ptr noundef %2) #4
  br label %74

.critedge:                                        ; preds = %14
  call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %10) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %9) #4
  br label %74

74:                                               ; preds = %.critedge, %._crit_edge
  %.1 = phi i32 [ 0, %._crit_edge ], [ %15, %.critedge ]
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %8) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #4
  ret i32 %.1
}

declare void @arm_absmax_q31(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #3

declare i32 @arm_divide_q31(i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #3

declare void @arm_scale_q31(ptr noundef, i32 noundef, i8 noundef signext, ptr noundef, i32 noundef) local_unnamed_addr #3

declare void @arm_mult_q31(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #3

; Function Attrs: alwaysinline nounwind uwtable
declare hidden zeroext i8 @__CLZ(i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local void @arm_rfft_q31(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2

declare void @arm_cmplx_mag_q31(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #3

declare void @arm_dot_prod_q31(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #3

declare void @arm_vlog_q31(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #3

declare void @arm_offset_q31(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #3

declare void @arm_shift_q31(ptr noundef, i8 noundef signext, ptr noundef, i32 noundef) local_unnamed_addr #3

declare void @arm_mat_vec_mult_q31(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #3

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 40}
!6 = !{!"", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 32, !10, i64 40, !10, i64 44, !10, i64 48, !11, i64 56}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"", !10, i64 0, !8, i64 4, !8, i64 5, !10, i64 8, !7, i64 16, !7, i64 24, !7, i64 32}
!12 = !{!10, !10, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"short", !8, i64 0}
!15 = !{!6, !7, i64 16}
!16 = !{!6, !10, i64 44}
!17 = !{!6, !7, i64 24}
!18 = !{!6, !7, i64 8}
!19 = !{!6, !7, i64 32}
!20 = !{!21, !21, i64 0}
!21 = !{!"long", !8, i64 0}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}
!24 = !{!6, !10, i64 48}
!25 = !{!26, !14, i64 0}
!26 = !{!"", !14, i64 0, !14, i64 2, !7, i64 8}
!27 = !{!26, !14, i64 2}
!28 = !{!6, !7, i64 0}
!29 = !{!26, !7, i64 8}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass