; LLVM IR from ubaldot/defrecs :: stm32f4x/ADC_Readings/Drivers/CMSIS/NN/Source/ConvolutionFunctions (s8)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.cmsis_nn_dw_conv_params = type { i32, i32, i32, %struct.cmsis_nn_tile, %struct.cmsis_nn_tile, %struct.cmsis_nn_tile, %struct.cmsis_nn_activation }
%struct.cmsis_nn_tile = type { i32, i32 }
%struct.cmsis_nn_activation = type { i32, i32 }
%struct.cmsis_nn_dims = type { i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @arm_depthwise_conv_wrapper_s8(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4, ptr noundef %5, ptr noundef %6, ptr noundef %7, ptr noundef %8, ptr noundef %9, ptr noundef %10) #0 {
  %12 = alloca ptr, align 8
  %13 = alloca ptr, align 8
  %14 = alloca ptr, align 8
  %15 = alloca ptr, align 8
  %16 = alloca ptr, align 8
  %17 = alloca ptr, align 8
  %18 = alloca ptr, align 8
  %19 = alloca ptr, align 8
  %20 = alloca ptr, align 8
  %21 = alloca ptr, align 8
  %22 = alloca ptr, align 8
  %23 = alloca i32, align 4
  store ptr %0, ptr %12, align 8, !tbaa !5
  store ptr %1, ptr %13, align 8, !tbaa !5
  store ptr %2, ptr %14, align 8, !tbaa !5
  store ptr %3, ptr %15, align 8, !tbaa !5
  store ptr %4, ptr %16, align 8, !tbaa !5
  store ptr %5, ptr %17, align 8, !tbaa !5
  store ptr %6, ptr %18, align 8, !tbaa !5
  store ptr %7, ptr %19, align 8, !tbaa !5
  store ptr %8, ptr %20, align 8, !tbaa !5
  store ptr %9, ptr %21, align 8, !tbaa !5
  store ptr %10, ptr %22, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #3
  store i32 0, ptr %23, align 4, !tbaa !9
  %24 = load ptr, ptr %13, align 8, !tbaa !5
  %25 = getelementptr inbounds %struct.cmsis_nn_dw_conv_params, ptr %24, i32 0, i32 2
  %26 = load i32, ptr %25, align 4, !tbaa !11
  %27 = icmp eq i32 1, %26
  br i1 %27, label %28, label %94

28:                                               ; preds = %11
  %29 = load ptr, ptr %15, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.cmsis_nn_dims, ptr %29, i32 0, i32 0
  %31 = load i32, ptr %30, align 4, !tbaa !14
  %32 = icmp eq i32 %31, 1
  br i1 %32, label %33, label %94

33:                                               ; preds = %28
  %34 = load ptr, ptr %13, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.cmsis_nn_dw_conv_params, ptr %34, i32 0, i32 5
  %36 = getelementptr inbounds %struct.cmsis_nn_tile, ptr %35, i32 0, i32 0
  %37 = load i32, ptr %36, align 4, !tbaa !16
  %38 = icmp eq i32 %37, 1
  br i1 %38, label %39, label %94

39:                                               ; preds = %33
  %40 = load ptr, ptr %13, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.cmsis_nn_dw_conv_params, ptr %40, i32 0, i32 5
  %42 = getelementptr inbounds %struct.cmsis_nn_tile, ptr %41, i32 0, i32 1
  %43 = load i32, ptr %42, align 4, !tbaa !17
  %44 = icmp eq i32 %43, 1
  br i1 %44, label %45, label %94

45:                                               ; preds = %39
  %46 = load ptr, ptr %17, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.cmsis_nn_dims, ptr %46, i32 0, i32 2
  %48 = load i32, ptr %47, align 4, !tbaa !18
  %49 = icmp eq i32 %48, 3
  br i1 %49, label %50, label %80

50:                                               ; preds = %45
  %51 = load ptr, ptr %17, align 8, !tbaa !5
  %52 = getelementptr inbounds %struct.cmsis_nn_dims, ptr %51, i32 0, i32 1
  %53 = load i32, ptr %52, align 4, !tbaa !19
  %54 = icmp eq i32 %53, 3
  br i1 %54, label %55, label %80

55:                                               ; preds = %50
  %56 = load ptr, ptr %13, align 8, !tbaa !5
  %57 = getelementptr inbounds %struct.cmsis_nn_dw_conv_params, ptr %56, i32 0, i32 4
  %58 = getelementptr inbounds %struct.cmsis_nn_tile, ptr %57, i32 0, i32 1
  %59 = load i32, ptr %58, align 4, !tbaa !20
  %60 = icmp sle i32 %59, 1
  br i1 %60, label %61, label %80

61:                                               ; preds = %55
  %62 = load ptr, ptr %13, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.cmsis_nn_dw_conv_params, ptr %62, i32 0, i32 4
  %64 = getelementptr inbounds %struct.cmsis_nn_tile, ptr %63, i32 0, i32 0
  %65 = load i32, ptr %64, align 4, !tbaa !21
  %66 = icmp sle i32 %65, 1
  br i1 %66, label %67, label %80

67:                                               ; preds = %61
  %68 = load ptr, ptr %12, align 8, !tbaa !5
  %69 = load ptr, ptr %13, align 8, !tbaa !5
  %70 = load ptr, ptr %14, align 8, !tbaa !5
  %71 = load ptr, ptr %15, align 8, !tbaa !5
  %72 = load ptr, ptr %16, align 8, !tbaa !5
  %73 = load ptr, ptr %17, align 8, !tbaa !5
  %74 = load ptr, ptr %18, align 8, !tbaa !5
  %75 = load ptr, ptr %19, align 8, !tbaa !5
  %76 = load ptr, ptr %20, align 8, !tbaa !5
  %77 = load ptr, ptr %21, align 8, !tbaa !5
  %78 = load ptr, ptr %22, align 8, !tbaa !5
  %79 = call i32 @arm_depthwise_conv_3x3_s8(ptr noundef %68, ptr noundef %69, ptr noundef %70, ptr noundef %71, ptr noundef %72, ptr noundef %73, ptr noundef %74, ptr noundef %75, ptr noundef %76, ptr noundef %77, ptr noundef %78)
  store i32 %79, ptr %23, align 4, !tbaa !9
  br label %93

80:                                               ; preds = %61, %55, %50, %45
  %81 = load ptr, ptr %12, align 8, !tbaa !5
  %82 = load ptr, ptr %13, align 8, !tbaa !5
  %83 = load ptr, ptr %14, align 8, !tbaa !5
  %84 = load ptr, ptr %15, align 8, !tbaa !5
  %85 = load ptr, ptr %16, align 8, !tbaa !5
  %86 = load ptr, ptr %17, align 8, !tbaa !5
  %87 = load ptr, ptr %18, align 8, !tbaa !5
  %88 = load ptr, ptr %19, align 8, !tbaa !5
  %89 = load ptr, ptr %20, align 8, !tbaa !5
  %90 = load ptr, ptr %21, align 8, !tbaa !5
  %91 = load ptr, ptr %22, align 8, !tbaa !5
  %92 = call i32 @arm_depthwise_conv_s8_opt(ptr noundef %81, ptr noundef %82, ptr noundef %83, ptr noundef %84, ptr noundef %85, ptr noundef %86, ptr noundef %87, ptr noundef %88, ptr noundef %89, ptr noundef %90, ptr noundef %91)
  store i32 %92, ptr %23, align 4, !tbaa !9
  br label %93

93:                                               ; preds = %80, %67
  br label %107

94:                                               ; preds = %39, %33, %28, %11
  %95 = load ptr, ptr %12, align 8, !tbaa !5
  %96 = load ptr, ptr %13, align 8, !tbaa !5
  %97 = load ptr, ptr %14, align 8, !tbaa !5
  %98 = load ptr, ptr %15, align 8, !tbaa !5
  %99 = load ptr, ptr %16, align 8, !tbaa !5
  %100 = load ptr, ptr %17, align 8, !tbaa !5
  %101 = load ptr, ptr %18, align 8, !tbaa !5
  %102 = load ptr, ptr %19, align 8, !tbaa !5
  %103 = load ptr, ptr %20, align 8, !tbaa !5
  %104 = load ptr, ptr %21, align 8, !tbaa !5
  %105 = load ptr, ptr %22, align 8, !tbaa !5
  %106 = call i32 @arm_depthwise_conv_s8(ptr noundef %95, ptr noundef %96, ptr noundef %97, ptr noundef %98, ptr noundef %99, ptr noundef %100, ptr noundef %101, ptr noundef %102, ptr noundef %103, ptr noundef %104, ptr noundef %105)
  store i32 %106, ptr %23, align 4, !tbaa !9
  br label %107

107:                                              ; preds = %94, %93
  %108 = load i32, ptr %23, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #3
  ret i32 %108
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @arm_depthwise_conv_3x3_s8(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) #2

declare i32 @arm_depthwise_conv_s8_opt(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) #2

declare i32 @arm_depthwise_conv_s8(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 8}
!12 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !13, i64 12, !13, i64 20, !13, i64 28, !13, i64 36}
!13 = !{!"", !10, i64 0, !10, i64 4}
!14 = !{!15, !10, i64 0}
!15 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12}
!16 = !{!12, !10, i64 28}
!17 = !{!12, !10, i64 32}
!18 = !{!15, !10, i64 8}
!19 = !{!15, !10, i64 4}
!20 = !{!12, !10, i64 24}
!21 = !{!12, !10, i64 20}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i32 @arm_depthwise_conv_wrapper_s8(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4, ptr noundef %5, ptr noundef %6, ptr noundef %7, ptr noundef %8, ptr noundef %9, ptr noundef %10) local_unnamed_addr #0 {
  %12 = getelementptr inbounds i8, ptr %1, i64 8
  %13 = load i32, ptr %12, align 4, !tbaa !5
  %14 = icmp eq i32 %13, 1
  br i1 %14, label %15, label %46

15:                                               ; preds = %11
  %16 = load i32, ptr %3, align 4, !tbaa !11
  %17 = icmp eq i32 %16, 1
  br i1 %17, label %18, label %46

18:                                               ; preds = %15
  %19 = getelementptr inbounds i8, ptr %1, i64 28
  %20 = load i32, ptr %19, align 4, !tbaa !13
  %21 = icmp eq i32 %20, 1
  br i1 %21, label %22, label %46

22:                                               ; preds = %18
  %23 = getelementptr inbounds i8, ptr %1, i64 32
  %24 = load i32, ptr %23, align 4, !tbaa !14
  %25 = icmp eq i32 %24, 1
  br i1 %25, label %26, label %46

26:                                               ; preds = %22
  %27 = getelementptr inbounds i8, ptr %5, i64 8
  %28 = load i32, ptr %27, align 4, !tbaa !15
  %29 = icmp eq i32 %28, 3
  br i1 %29, label %30, label %44

30:                                               ; preds = %26
  %31 = getelementptr inbounds i8, ptr %5, i64 4
  %32 = load i32, ptr %31, align 4, !tbaa !16
  %33 = icmp eq i32 %32, 3
  br i1 %33, label %34, label %44

34:                                               ; preds = %30
  %35 = getelementptr inbounds i8, ptr %1, i64 24
  %36 = load i32, ptr %35, align 4, !tbaa !17
  %37 = icmp slt i32 %36, 2
  br i1 %37, label %38, label %44

38:                                               ; preds = %34
  %39 = getelementptr inbounds i8, ptr %1, i64 20
  %40 = load i32, ptr %39, align 4, !tbaa !18
  %41 = icmp slt i32 %40, 2
  br i1 %41, label %42, label %44

42:                                               ; preds = %38
  %43 = tail call i32 @arm_depthwise_conv_3x3_s8(ptr noundef %0, ptr noundef nonnull %1, ptr noundef %2, ptr noundef nonnull %3, ptr noundef %4, ptr noundef nonnull %5, ptr noundef %6, ptr noundef %7, ptr noundef %8, ptr noundef %9, ptr noundef %10) #2
  br label %48

44:                                               ; preds = %38, %34, %30, %26
  %45 = tail call i32 @arm_depthwise_conv_s8_opt(ptr noundef %0, ptr noundef nonnull %1, ptr noundef %2, ptr noundef nonnull %3, ptr noundef %4, ptr noundef nonnull %5, ptr noundef %6, ptr noundef %7, ptr noundef %8, ptr noundef %9, ptr noundef %10) #2
  br label %48

46:                                               ; preds = %22, %18, %15, %11
  %47 = tail call i32 @arm_depthwise_conv_s8(ptr noundef %0, ptr noundef nonnull %1, ptr noundef %2, ptr noundef %3, ptr noundef %4, ptr noundef %5, ptr noundef %6, ptr noundef %7, ptr noundef %8, ptr noundef %9, ptr noundef %10) #2
  br label %48

48:                                               ; preds = %42, %44, %46
  %.0 = phi i32 [ %43, %42 ], [ %45, %44 ], [ %47, %46 ]
  ret i32 %.0
}

declare i32 @arm_depthwise_conv_3x3_s8(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1

declare i32 @arm_depthwise_conv_s8_opt(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1

declare i32 @arm_depthwise_conv_s8(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !10, i64 12, !10, i64 20, !10, i64 28, !10, i64 36}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !7, i64 0, !7, i64 4}
!11 = !{!12, !7, i64 0}
!12 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12}
!13 = !{!6, !7, i64 28}
!14 = !{!6, !7, i64 32}
!15 = !{!12, !7, i64 8}
!16 = !{!12, !7, i64 4}
!17 = !{!6, !7, i64 24}
!18 = !{!6, !7, i64 20}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass