; LLVM IR from tangjz/acm-icpc :: codeforces/gym/100827I.ll (Z5buildii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Segment = type { i32, i32, i32 }

@seg = external dso_local global [2000002 x %struct.Segment], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5buildii(i32 noundef %0, i32 noundef %1) #1 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca %struct.Segment, align 4
  %11 = alloca %struct.Segment, align 4
  %12 = alloca { i64, i32 }, align 4
  %13 = alloca { i64, i32 }, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #5
  %14 = load i32, ptr %3, align 4, !tbaa !5
  %15 = load i32, ptr %4, align 4, !tbaa !5
  %16 = call noundef i32 @_Z7seg_idxii(i32 noundef %14, i32 noundef %15)
  store i32 %16, ptr %5, align 4, !tbaa !5
  %17 = load i32, ptr %5, align 4, !tbaa !5
  %18 = sext i32 %17 to i64
  %19 = getelementptr inbounds [2000002 x %struct.Segment], ptr @seg, i64 0, i64 %18
  %20 = getelementptr inbounds %struct.Segment, ptr %19, i32 0, i32 2
  store i32 0, ptr %20, align 4, !tbaa !9
  %21 = load i32, ptr %3, align 4, !tbaa !5
  %22 = load i32, ptr %4, align 4, !tbaa !5
  %23 = icmp eq i32 %21, %22
  br i1 %23, label %24, label %25

24:                                               ; preds = %2
  store i32 1, ptr %6, align 4
  br label %59

25:                                               ; preds = %2
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  %26 = load i32, ptr %3, align 4, !tbaa !5
  %27 = load i32, ptr %4, align 4, !tbaa !5
  %28 = add nsw i32 %26, %27
  %29 = ashr i32 %28, 1
  store i32 %29, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #5
  %30 = load i32, ptr %3, align 4, !tbaa !5
  %31 = load i32, ptr %7, align 4, !tbaa !5
  %32 = call noundef i32 @_Z7seg_idxii(i32 noundef %30, i32 noundef %31)
  store i32 %32, ptr %8, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #5
  %33 = load i32, ptr %7, align 4, !tbaa !5
  %34 = add nsw i32 %33, 1
  %35 = load i32, ptr %4, align 4, !tbaa !5
  %36 = call noundef i32 @_Z7seg_idxii(i32 noundef %34, i32 noundef %35)
  store i32 %36, ptr %9, align 4, !tbaa !5
  %37 = load i32, ptr %3, align 4, !tbaa !5
  %38 = load i32, ptr %7, align 4, !tbaa !5
  call void @_Z5buildii(i32 noundef %37, i32 noundef %38)
  %39 = load i32, ptr %7, align 4, !tbaa !5
  %40 = add nsw i32 %39, 1
  %41 = load i32, ptr %4, align 4, !tbaa !5
  call void @_Z5buildii(i32 noundef %40, i32 noundef %41)
  %42 = load i32, ptr %5, align 4, !tbaa !5
  %43 = sext i32 %42 to i64
  %44 = getelementptr inbounds [2000002 x %struct.Segment], ptr @seg, i64 0, i64 %43
  %45 = load i32, ptr %8, align 4, !tbaa !5
  %46 = sext i32 %45 to i64
  %47 = getelementptr inbounds [2000002 x %struct.Segment], ptr @seg, i64 0, i64 %46
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %10, ptr align 4 %47, i64 12, i1 false), !tbaa.struct !11
  %48 = load i32, ptr %9, align 4, !tbaa !5
  %49 = sext i32 %48 to i64
  %50 = getelementptr inbounds [2000002 x %struct.Segment], ptr @seg, i64 0, i64 %49
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %11, ptr align 4 %50, i64 12, i1 false), !tbaa.struct !11
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %12, ptr align 4 %10, i64 12, i1 false)
  %51 = getelementptr inbounds { i64, i32 }, ptr %12, i32 0, i32 0
  %52 = load i64, ptr %51, align 4
  %53 = getelementptr inbounds { i64, i32 }, ptr %12, i32 0, i32 1
  %54 = load i32, ptr %53, align 4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %13, ptr align 4 %11, i64 12, i1 false)
  %55 = getelementptr inbounds { i64, i32 }, ptr %13, i32 0, i32 0
  %56 = load i64, ptr %55, align 4
  %57 = getelementptr inbounds { i64, i32 }, ptr %13, i32 0, i32 1
  %58 = load i32, ptr %57, align 4
  call void @_Z7push_upR7SegmentS_S_(ptr noundef nonnull align 4 dereferenceable(12) %44, i64 %52, i32 %54, i64 %56, i32 %58)
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  store i32 0, ptr %6, align 4
  br label %59

59:                                               ; preds = %25, %24
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #5
  %60 = load i32, ptr %6, align 4
  switch i32 %60, label %62 [
    i32 0, label %61
    i32 1, label %61
  ]

61:                                               ; preds = %59, %59
  ret void

62:                                               ; preds = %59
  unreachable
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7seg_idxii(i32 noundef, i32 noundef) #2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_Z7push_upR7SegmentS_S_(ptr noundef nonnull align 4 dereferenceable(12), i64, i32, i64, i32) #3

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #4

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 8}
!10 = !{!"_ZTS7Segment", !6, i64 0, !6, i64 4, !6, i64 8}
!11 = !{i64 0, i64 4, !5, i64 4, i64 4, !5, i64 8, i64 4, !5}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Segment = type { i32, i32, i32 }

@seg = external dso_local global [2000002 x %struct.Segment], align 16

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5buildii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = tail call noundef i32 @_Z7seg_idxii(i32 noundef %0, i32 noundef %1)
  %4 = sext i32 %3 to i64
  %5 = getelementptr inbounds [2000002 x %struct.Segment], ptr @seg, i64 0, i64 %4
  %6 = getelementptr inbounds i8, ptr %5, i64 8
  store i32 0, ptr %6, align 4, !tbaa !5
  %7 = icmp eq i32 %0, %1
  br i1 %7, label %common.ret25, label %8

common.ret25:                                     ; preds = %2, %8
  ret void

8:                                                ; preds = %2
  %9 = add nsw i32 %1, %0
  %10 = ashr i32 %9, 1
  %11 = tail call noundef i32 @_Z7seg_idxii(i32 noundef %0, i32 noundef %10)
  %12 = add nsw i32 %10, 1
  %13 = tail call noundef i32 @_Z7seg_idxii(i32 noundef %12, i32 noundef %1)
  tail call void @_Z5buildii(i32 noundef %0, i32 noundef %10)
  tail call void @_Z5buildii(i32 noundef %12, i32 noundef %1)
  %14 = sext i32 %11 to i64
  %15 = getelementptr inbounds [2000002 x %struct.Segment], ptr @seg, i64 0, i64 %14
  %.sroa.05.0.copyload = load i64, ptr %15, align 4
  %.sroa.26.0..sroa_idx = getelementptr inbounds i8, ptr %15, i64 8
  %.sroa.26.0.copyload = load i32, ptr %.sroa.26.0..sroa_idx, align 4, !tbaa !10
  %16 = sext i32 %13 to i64
  %17 = getelementptr inbounds [2000002 x %struct.Segment], ptr @seg, i64 0, i64 %16
  %.sroa.03.0.copyload = load i64, ptr %17, align 4
  %.sroa.24.0..sroa_idx = getelementptr inbounds i8, ptr %17, i64 8
  %.sroa.24.0.copyload = load i32, ptr %.sroa.24.0..sroa_idx, align 4, !tbaa !10
  tail call void @_Z7push_upR7SegmentS_S_(ptr noundef nonnull align 4 dereferenceable(12) %5, i64 %.sroa.05.0.copyload, i32 %.sroa.26.0.copyload, i64 %.sroa.03.0.copyload, i32 %.sroa.24.0.copyload)
  br label %common.ret25
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7seg_idxii(i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_Z7push_upR7SegmentS_S_(ptr noundef nonnull align 4 dereferenceable(12), i64, i32, i64, i32) local_unnamed_addr #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"_ZTS7Segment", !7, i64 0, !7, i64 4, !7, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!7, !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass