; LLVM IR from ubaldot/defrecs :: stm32f4x/ADC_Readings/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example (main)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.arm_cfft_radix4_instance_f32 = type { i16, i8, i8, ptr, ptr, i16, i16, float }

@testInputA_f32 = external dso_local global [64 x float], align 16
@testInputB_f32 = external dso_local global [64 x float], align 16
@testRefOutput_f32 = external dso_local constant [127 x float], align 16
@srcALen = external dso_local global i32, align 4
@srcBLen = external dso_local global i32, align 4
@outLen = external dso_local global i32, align 4
@Ak = external dso_local global [128 x float], align 16
@Bk = external dso_local global [128 x float], align 16
@AxB = external dso_local global [256 x float], align 16
@snr = external dso_local global float, align 4

; Function Attrs: nounwind uwtable
define dso_local i32 @main() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca %struct.arm_cfft_radix4_instance_f32, align 8
  %4 = alloca ptr, align 8
  store i32 0, ptr %1, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #3
  call void @llvm.lifetime.start.p0(i64 32, ptr %3) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #3
  store ptr %3, ptr %4, align 8, !tbaa !5
  %5 = load i32, ptr @srcALen, align 4, !tbaa !9
  %6 = load i32, ptr @srcBLen, align 4, !tbaa !9
  %7 = add i32 %5, %6
  %8 = sub i32 %7, 1
  store i32 %8, ptr @outLen, align 4, !tbaa !9
  call void @arm_fill_f32(float noundef 0.000000e+00, ptr noundef @Ak, i32 noundef 128)
  call void @arm_fill_f32(float noundef 0.000000e+00, ptr noundef @Bk, i32 noundef 128)
  call void @arm_copy_f32(ptr noundef @testInputA_f32, ptr noundef @Ak, i32 noundef 64)
  call void @arm_copy_f32(ptr noundef @testInputB_f32, ptr noundef @Bk, i32 noundef 64)
  %9 = load ptr, ptr %4, align 8, !tbaa !5
  %10 = call i32 @arm_cfft_radix4_init_f32(ptr noundef %9, i16 noundef zeroext 64, i8 noundef zeroext 0, i8 noundef zeroext 1)
  store i32 %10, ptr %2, align 4, !tbaa !9
  %11 = load ptr, ptr %4, align 8, !tbaa !5
  call void @arm_cfft_radix4_f32(ptr noundef %11, ptr noundef @Ak)
  %12 = load ptr, ptr %4, align 8, !tbaa !5
  call void @arm_cfft_radix4_f32(ptr noundef %12, ptr noundef @Bk)
  call void @arm_cmplx_mult_cmplx_f32(ptr noundef @Ak, ptr noundef @Bk, ptr noundef @AxB, i32 noundef 64)
  %13 = load ptr, ptr %4, align 8, !tbaa !5
  %14 = call i32 @arm_cfft_radix4_init_f32(ptr noundef %13, i16 noundef zeroext 64, i8 noundef zeroext 1, i8 noundef zeroext 1)
  store i32 %14, ptr %2, align 4, !tbaa !9
  %15 = load ptr, ptr %4, align 8, !tbaa !5
  call void @arm_cfft_radix4_f32(ptr noundef %15, ptr noundef @AxB)
  %16 = load i32, ptr @srcALen, align 4, !tbaa !9
  %17 = load i32, ptr @srcBLen, align 4, !tbaa !9
  %18 = add i32 %16, %17
  %19 = sub i32 %18, 1
  %20 = call float @arm_snr_f32(ptr noundef @testRefOutput_f32, ptr noundef @AxB, i32 noundef %19)
  store float %20, ptr @snr, align 4, !tbaa !11
  %21 = load float, ptr @snr, align 4, !tbaa !11
  %22 = fcmp ole float %21, 9.000000e+01
  %23 = zext i1 %22 to i64
  %24 = select i1 %22, i32 -6, i32 0
  store i32 %24, ptr %2, align 4, !tbaa !9
  %25 = load i32, ptr %2, align 4, !tbaa !9
  %26 = icmp ne i32 %25, 0
  br i1 %26, label %27, label %30

27:                                               ; preds = %0
  br label %28

28:                                               ; preds = %29, %27
  br label %29

29:                                               ; preds = %28
  br label %28

30:                                               ; preds = %0
  br label %31

31:                                               ; preds = %32, %30
  br label %32

32:                                               ; preds = %31
  br label %31
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @arm_fill_f32(float noundef, ptr noundef, i32 noundef) #2

declare void @arm_copy_f32(ptr noundef, ptr noundef, i32 noundef) #2

declare i32 @arm_cfft_radix4_init_f32(ptr noundef, i16 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext) #2

declare void @arm_cfft_radix4_f32(ptr noundef, ptr noundef) #2

declare void @arm_cmplx_mult_cmplx_f32(ptr noundef, ptr noundef, ptr noundef, i32 noundef) #2

declare float @arm_snr_f32(ptr noundef, ptr noundef, i32 noundef) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"float", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.arm_cfft_radix4_instance_f32 = type { i16, i8, i8, ptr, ptr, i16, i16, float }

@testInputA_f32 = external dso_local global [64 x float], align 16
@testInputB_f32 = external dso_local global [64 x float], align 16
@testRefOutput_f32 = external dso_local constant [127 x float], align 16
@srcALen = external dso_local local_unnamed_addr global i32, align 4
@srcBLen = external dso_local local_unnamed_addr global i32, align 4
@outLen = external dso_local local_unnamed_addr global i32, align 4
@Ak = external dso_local global [128 x float], align 16
@Bk = external dso_local global [128 x float], align 16
@AxB = external dso_local global [256 x float], align 16
@snr = external dso_local local_unnamed_addr global float, align 4

; Function Attrs: noreturn nounwind uwtable
define dso_local noundef i32 @main() local_unnamed_addr #0 {
  %1 = alloca %struct.arm_cfft_radix4_instance_f32, align 8
  call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %1) #3
  %2 = load i32, ptr @srcALen, align 4, !tbaa !5
  %3 = load i32, ptr @srcBLen, align 4, !tbaa !5
  %4 = add i32 %2, -1
  %5 = add i32 %4, %3
  store i32 %5, ptr @outLen, align 4, !tbaa !5
  tail call void @arm_fill_f32(float noundef 0.000000e+00, ptr noundef nonnull @Ak, i32 noundef 128) #3
  tail call void @arm_fill_f32(float noundef 0.000000e+00, ptr noundef nonnull @Bk, i32 noundef 128) #3
  tail call void @arm_copy_f32(ptr noundef nonnull @testInputA_f32, ptr noundef nonnull @Ak, i32 noundef 64) #3
  tail call void @arm_copy_f32(ptr noundef nonnull @testInputB_f32, ptr noundef nonnull @Bk, i32 noundef 64) #3
  %6 = call i32 @arm_cfft_radix4_init_f32(ptr noundef nonnull %1, i16 noundef zeroext 64, i8 noundef zeroext 0, i8 noundef zeroext 1) #3
  call void @arm_cfft_radix4_f32(ptr noundef nonnull %1, ptr noundef nonnull @Ak) #3
  call void @arm_cfft_radix4_f32(ptr noundef nonnull %1, ptr noundef nonnull @Bk) #3
  call void @arm_cmplx_mult_cmplx_f32(ptr noundef nonnull @Ak, ptr noundef nonnull @Bk, ptr noundef nonnull @AxB, i32 noundef 64) #3
  %7 = call i32 @arm_cfft_radix4_init_f32(ptr noundef nonnull %1, i16 noundef zeroext 64, i8 noundef zeroext 1, i8 noundef zeroext 1) #3
  call void @arm_cfft_radix4_f32(ptr noundef nonnull %1, ptr noundef nonnull @AxB) #3
  %8 = load i32, ptr @srcALen, align 4, !tbaa !5
  %9 = load i32, ptr @srcBLen, align 4, !tbaa !5
  %10 = add i32 %8, -1
  %11 = add i32 %10, %9
  %12 = call float @arm_snr_f32(ptr noundef nonnull @testRefOutput_f32, ptr noundef nonnull @AxB, i32 noundef %11) #3
  store float %12, ptr @snr, align 4, !tbaa !9
  %13 = fcmp ugt float %12, 9.000000e+01
  br i1 %13, label %.preheader, label %.preheader5

.preheader5:                                      ; preds = %0, %.preheader5
  br label %.preheader5

.preheader:                                       ; preds = %0, %.preheader
  br label %.preheader
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @arm_fill_f32(float noundef, ptr noundef, i32 noundef) local_unnamed_addr #2

declare void @arm_copy_f32(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2

declare i32 @arm_cfft_radix4_init_f32(ptr noundef, i16 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #2

declare void @arm_cfft_radix4_f32(ptr noundef, ptr noundef) local_unnamed_addr #2

declare void @arm_cmplx_mult_cmplx_f32(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2

declare float @arm_snr_f32(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2

attributes #0 = { noreturn nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"float", !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass