; LLVM IR from steps3d/graphics-book :: Code/Libs/SOIL (SOIL)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@has_tex_rectangle_capability = external hidden global i32, align 4
@.str.41 = external hidden unnamed_addr constant [25 x i8], align 1
@.str.42 = external hidden unnamed_addr constant [25 x i8], align 1
@.str.43 = external hidden unnamed_addr constant [24 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local i32 @query_tex_rectangle_capability() #0 {
  %1 = load i32, ptr @has_tex_rectangle_capability, align 4, !tbaa !5
  %2 = icmp eq i32 %1, -1
  br i1 %2, label %3, label %15

3:                                                ; preds = %0
  %4 = call zeroext i8 @glewIsSupported(ptr noundef @.str.41)
  %5 = icmp ne i8 %4, 0
  br i1 %5, label %13, label %6

6:                                                ; preds = %3
  %7 = call zeroext i8 @glewIsSupported(ptr noundef @.str.42)
  %8 = icmp ne i8 %7, 0
  br i1 %8, label %13, label %9

9:                                                ; preds = %6
  %10 = call zeroext i8 @glewIsSupported(ptr noundef @.str.43)
  %11 = icmp ne i8 %10, 0
  br i1 %11, label %13, label %12

12:                                               ; preds = %9
  store i32 0, ptr @has_tex_rectangle_capability, align 4, !tbaa !5
  br label %14

13:                                               ; preds = %9, %6, %3
  store i32 1, ptr @has_tex_rectangle_capability, align 4, !tbaa !5
  br label %14

14:                                               ; preds = %13, %12
  br label %15

15:                                               ; preds = %14, %0
  %16 = load i32, ptr @has_tex_rectangle_capability, align 4, !tbaa !5
  ret i32 %16
}

declare zeroext i8 @glewIsSupported(ptr noundef) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@has_tex_rectangle_capability = external hidden local_unnamed_addr global i32, align 4
@.str.41 = external hidden unnamed_addr constant [25 x i8], align 1
@.str.42 = external hidden unnamed_addr constant [25 x i8], align 1
@.str.43 = external hidden unnamed_addr constant [24 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local i32 @query_tex_rectangle_capability() local_unnamed_addr #0 {
  %1 = load i32, ptr @has_tex_rectangle_capability, align 4, !tbaa !5
  %2 = icmp eq i32 %1, -1
  br i1 %2, label %3, label %10

3:                                                ; preds = %0
  %4 = tail call zeroext i8 @glewIsSupported(ptr noundef nonnull @.str.41) #2
  %.not = icmp eq i8 %4, 0
  br i1 %.not, label %5, label %9

5:                                                ; preds = %3
  %6 = tail call zeroext i8 @glewIsSupported(ptr noundef nonnull @.str.42) #2
  %.not1 = icmp eq i8 %6, 0
  br i1 %.not1, label %7, label %9

7:                                                ; preds = %5
  %8 = tail call zeroext i8 @glewIsSupported(ptr noundef nonnull @.str.43) #2
  %.not2 = icmp eq i8 %8, 0
  br i1 %.not2, label %.sink.split, label %9

9:                                                ; preds = %7, %5, %3
  br label %.sink.split

.sink.split:                                      ; preds = %7, %9
  %.sink = phi i32 [ 1, %9 ], [ 0, %7 ]
  store i32 %.sink, ptr @has_tex_rectangle_capability, align 4, !tbaa !5
  br label %10

10:                                               ; preds = %.sink.split, %0
  %11 = phi i32 [ %1, %0 ], [ %.sink, %.sink.split ]
  ret i32 %11
}

declare zeroext i8 @glewIsSupported(ptr noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: GVNPass,GlobalOptPass,InstCombinePass,SimplifyCFGPass,TailCallElimPass