; LLVM IR from pms67/HadesFCS :: Firmware/F4Quad/Middlewares/Third_Party/FreeRTOS/Source (stream_buffer)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.xSTREAM_BUFFER = type { i64, i64, i64, i64, ptr, ptr, ptr, i8 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @vPortRaiseBASEPRI() #1

; Function Attrs: nounwind uwtable
declare hidden void @prvInitialiseNewStreamBuffer(ptr noundef, ptr noundef, i64 noundef, i64 noundef, i64 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local ptr @xStreamBufferGenericCreateStatic(i64 noundef %0, i64 noundef %1, i64 noundef %2, ptr noundef %3, ptr noundef %4) #2 {
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca i64, align 8
  store i64 %0, ptr %6, align 8, !tbaa !5
  store i64 %1, ptr %7, align 8, !tbaa !5
  store i64 %2, ptr %8, align 8, !tbaa !5
  store ptr %3, ptr %9, align 8, !tbaa !9
  store ptr %4, ptr %10, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  %14 = load ptr, ptr %10, align 8, !tbaa !9
  store ptr %14, ptr %11, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #3
  %15 = load ptr, ptr %9, align 8, !tbaa !9
  %16 = icmp eq ptr %15, null
  br i1 %16, label %17, label %19

17:                                               ; preds = %5
  call void @vPortRaiseBASEPRI()
  br label %18

18:                                               ; preds = %18, %17
  br label %18

19:                                               ; preds = %5
  %20 = load ptr, ptr %10, align 8, !tbaa !9
  %21 = icmp eq ptr %20, null
  br i1 %21, label %22, label %24

22:                                               ; preds = %19
  call void @vPortRaiseBASEPRI()
  br label %23

23:                                               ; preds = %23, %22
  br label %23

24:                                               ; preds = %19
  %25 = load i64, ptr %7, align 8, !tbaa !5
  %26 = load i64, ptr %6, align 8, !tbaa !5
  %27 = icmp ule i64 %25, %26
  %28 = zext i1 %27 to i32
  %29 = icmp eq i32 %28, 0
  br i1 %29, label %30, label %32

30:                                               ; preds = %24
  call void @vPortRaiseBASEPRI()
  br label %31

31:                                               ; preds = %31, %30
  br label %31

32:                                               ; preds = %24
  %33 = load i64, ptr %7, align 8, !tbaa !5
  %34 = icmp eq i64 %33, 0
  br i1 %34, label %35, label %36

35:                                               ; preds = %32
  store i64 1, ptr %7, align 8, !tbaa !5
  br label %36

36:                                               ; preds = %35, %32
  %37 = load i64, ptr %6, align 8, !tbaa !5
  %38 = icmp ugt i64 %37, 8
  %39 = zext i1 %38 to i32
  %40 = icmp eq i32 %39, 0
  br i1 %40, label %41, label %43

41:                                               ; preds = %36
  call void @vPortRaiseBASEPRI()
  br label %42

42:                                               ; preds = %42, %41
  br label %42

43:                                               ; preds = %36
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #3
  store volatile i64 64, ptr %13, align 8, !tbaa !5
  %44 = load volatile i64, ptr %13, align 8, !tbaa !5
  %45 = icmp eq i64 %44, 64
  %46 = zext i1 %45 to i32
  %47 = icmp eq i32 %46, 0
  br i1 %47, label %48, label %50

48:                                               ; preds = %43
  call void @vPortRaiseBASEPRI()
  br label %49

49:                                               ; preds = %49, %48
  br label %49

50:                                               ; preds = %43
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #3
  %51 = load ptr, ptr %9, align 8, !tbaa !9
  %52 = icmp ne ptr %51, null
  br i1 %52, label %53, label %69

53:                                               ; preds = %50
  %54 = load ptr, ptr %10, align 8, !tbaa !9
  %55 = icmp ne ptr %54, null
  br i1 %55, label %56, label %69

56:                                               ; preds = %53
  %57 = load ptr, ptr %11, align 8, !tbaa !9
  %58 = load ptr, ptr %9, align 8, !tbaa !9
  %59 = load i64, ptr %6, align 8, !tbaa !5
  %60 = load i64, ptr %7, align 8, !tbaa !5
  %61 = load i64, ptr %8, align 8, !tbaa !5
  call void @prvInitialiseNewStreamBuffer(ptr noundef %57, ptr noundef %58, i64 noundef %59, i64 noundef %60, i64 noundef %61)
  %62 = load ptr, ptr %11, align 8, !tbaa !9
  %63 = getelementptr inbounds %struct.xSTREAM_BUFFER, ptr %62, i32 0, i32 7
  %64 = load i8, ptr %63, align 8, !tbaa !11
  %65 = zext i8 %64 to i32
  %66 = or i32 %65, 2
  %67 = trunc i32 %66 to i8
  store i8 %67, ptr %63, align 8, !tbaa !11
  %68 = load ptr, ptr %10, align 8, !tbaa !9
  store ptr %68, ptr %12, align 8, !tbaa !9
  br label %70

69:                                               ; preds = %53, %50
  store ptr null, ptr %12, align 8, !tbaa !9
  br label %70

70:                                               ; preds = %69, %56
  %71 = load ptr, ptr %12, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  ret ptr %71
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !7, i64 56}
!12 = !{!"xSTREAM_BUFFER", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !7, i64 56}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @vPortRaiseBASEPRI() local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare hidden void @prvInitialiseNewStreamBuffer(ptr noundef, ptr noundef, i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local noundef ptr @xStreamBufferGenericCreateStatic(i64 noundef %0, i64 noundef %1, i64 noundef %2, ptr noundef %3, ptr noundef returned %4) local_unnamed_addr #2 {
  %6 = alloca i64, align 8
  %7 = icmp eq ptr %3, null
  br i1 %7, label %8, label %10

8:                                                ; preds = %5
  tail call void @vPortRaiseBASEPRI()
  br label %9

9:                                                ; preds = %9, %8
  br label %9

10:                                               ; preds = %5
  %11 = icmp eq ptr %4, null
  br i1 %11, label %12, label %14

12:                                               ; preds = %10
  tail call void @vPortRaiseBASEPRI()
  br label %13

13:                                               ; preds = %13, %12
  br label %13

14:                                               ; preds = %10
  %.not = icmp ugt i64 %1, %0
  br i1 %.not, label %15, label %17

15:                                               ; preds = %14
  tail call void @vPortRaiseBASEPRI()
  br label %16

16:                                               ; preds = %16, %15
  br label %16

17:                                               ; preds = %14
  %18 = icmp ult i64 %0, 9
  br i1 %18, label %19, label %21

19:                                               ; preds = %17
  tail call void @vPortRaiseBASEPRI()
  br label %20

20:                                               ; preds = %20, %19
  br label %20

21:                                               ; preds = %17
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6)
  store volatile i64 64, ptr %6, align 8, !tbaa !5
  %.0..0..0..0. = load volatile i64, ptr %6, align 8, !tbaa !5
  %.not20 = icmp eq i64 %.0..0..0..0., 64
  br i1 %.not20, label %24, label %22

22:                                               ; preds = %21
  tail call void @vPortRaiseBASEPRI()
  br label %23

23:                                               ; preds = %23, %22
  br label %23

24:                                               ; preds = %21
  %spec.store.select = tail call i64 @llvm.umax.i64(i64 %1, i64 1)
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6)
  tail call void @prvInitialiseNewStreamBuffer(ptr noundef nonnull %4, ptr noundef nonnull %3, i64 noundef %0, i64 noundef %spec.store.select, i64 noundef %2)
  %25 = getelementptr inbounds i8, ptr %4, i64 56
  %26 = load i8, ptr %25, align 8, !tbaa !9
  %27 = or i8 %26, 2
  store i8 %27, ptr %25, align 8, !tbaa !9
  ret ptr %4
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umax.i64(i64, i64) #3

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !7, i64 56}
!10 = !{!"xSTREAM_BUFFER", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !11, i64 32, !11, i64 40, !11, i64 48, !7, i64 56}
!11 = !{!"any pointer", !7, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass