; LLVM IR from tangjz/acm-icpc :: hdu/6248.ll (Z5pivotii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@a = external dso_local global [13 x [1025 x x86_fp80]], align 16
@n = external dso_local global i32, align 4
@m = external dso_local global i32, align 4
@id = external dso_local global [2051 x i32], align 16

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z5pivotii(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca x86_fp80, align 16
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  %10 = load i32, ptr %4, align 4, !tbaa !5
  %11 = sext i32 %10 to i64
  %12 = getelementptr inbounds [2051 x i32], ptr @id, i64 0, i64 %11
  %13 = load i32, ptr @n, align 4, !tbaa !5
  %14 = load i32, ptr %3, align 4, !tbaa !5
  %15 = add nsw i32 %13, %14
  %16 = sext i32 %15 to i64
  %17 = getelementptr inbounds [2051 x i32], ptr @id, i64 0, i64 %16
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %12, ptr noundef nonnull align 4 dereferenceable(4) %17) #4
  call void @llvm.lifetime.start.p0(i64 16, ptr %5) #4
  %18 = load i32, ptr %3, align 4, !tbaa !5
  %19 = sext i32 %18 to i64
  %20 = getelementptr inbounds [13 x [1025 x x86_fp80]], ptr @a, i64 0, i64 %19
  %21 = load i32, ptr %4, align 4, !tbaa !5
  %22 = sext i32 %21 to i64
  %23 = getelementptr inbounds [1025 x x86_fp80], ptr %20, i64 0, i64 %22
  %24 = load x86_fp80, ptr %23, align 16, !tbaa !9
  store x86_fp80 %24, ptr %5, align 16, !tbaa !9
  %25 = load i32, ptr %3, align 4, !tbaa !5
  %26 = sext i32 %25 to i64
  %27 = getelementptr inbounds [13 x [1025 x x86_fp80]], ptr @a, i64 0, i64 %26
  %28 = load i32, ptr %4, align 4, !tbaa !5
  %29 = sext i32 %28 to i64
  %30 = getelementptr inbounds [1025 x x86_fp80], ptr %27, i64 0, i64 %29
  store x86_fp80 0xK3FFF8000000000000000, ptr %30, align 16, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  store i32 0, ptr %6, align 4, !tbaa !5
  br label %31

31:                                               ; preds = %46, %2
  %32 = load i32, ptr %6, align 4, !tbaa !5
  %33 = load i32, ptr @n, align 4, !tbaa !5
  %34 = icmp sle i32 %32, %33
  br i1 %34, label %36, label %35

35:                                               ; preds = %31
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  br label %49

36:                                               ; preds = %31
  %37 = load x86_fp80, ptr %5, align 16, !tbaa !9
  %38 = load i32, ptr %3, align 4, !tbaa !5
  %39 = sext i32 %38 to i64
  %40 = getelementptr inbounds [13 x [1025 x x86_fp80]], ptr @a, i64 0, i64 %39
  %41 = load i32, ptr %6, align 4, !tbaa !5
  %42 = sext i32 %41 to i64
  %43 = getelementptr inbounds [1025 x x86_fp80], ptr %40, i64 0, i64 %42
  %44 = load x86_fp80, ptr %43, align 16, !tbaa !9
  %45 = fdiv x86_fp80 %44, %37
  store x86_fp80 %45, ptr %43, align 16, !tbaa !9
  br label %46

46:                                               ; preds = %36
  %47 = load i32, ptr %6, align 4, !tbaa !5
  %48 = add nsw i32 %47, 1
  store i32 %48, ptr %6, align 4, !tbaa !5
  br label %31, !llvm.loop !11

49:                                               ; preds = %35
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  store i32 0, ptr %7, align 4, !tbaa !5
  br label %50

50:                                               ; preds = %101, %49
  %51 = load i32, ptr %7, align 4, !tbaa !5
  %52 = load i32, ptr @m, align 4, !tbaa !5
  %53 = icmp sle i32 %51, %52
  br i1 %53, label %55, label %54

54:                                               ; preds = %50
  store i32 5, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  br label %104

55:                                               ; preds = %50
  %56 = load i32, ptr %7, align 4, !tbaa !5
  %57 = load i32, ptr %3, align 4, !tbaa !5
  %58 = icmp eq i32 %56, %57
  br i1 %58, label %59, label %60

59:                                               ; preds = %55
  br label %101

60:                                               ; preds = %55
  %61 = load i32, ptr %7, align 4, !tbaa !5
  %62 = sext i32 %61 to i64
  %63 = getelementptr inbounds [13 x [1025 x x86_fp80]], ptr @a, i64 0, i64 %62
  %64 = load i32, ptr %4, align 4, !tbaa !5
  %65 = sext i32 %64 to i64
  %66 = getelementptr inbounds [1025 x x86_fp80], ptr %63, i64 0, i64 %65
  %67 = load x86_fp80, ptr %66, align 16, !tbaa !9
  store x86_fp80 %67, ptr %5, align 16, !tbaa !9
  %68 = load i32, ptr %7, align 4, !tbaa !5
  %69 = sext i32 %68 to i64
  %70 = getelementptr inbounds [13 x [1025 x x86_fp80]], ptr @a, i64 0, i64 %69
  %71 = load i32, ptr %4, align 4, !tbaa !5
  %72 = sext i32 %71 to i64
  %73 = getelementptr inbounds [1025 x x86_fp80], ptr %70, i64 0, i64 %72
  store x86_fp80 0xK00000000000000000000, ptr %73, align 16, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  store i32 0, ptr %9, align 4, !tbaa !5
  br label %74

74:                                               ; preds = %97, %60
  %75 = load i32, ptr %9, align 4, !tbaa !5
  %76 = load i32, ptr @n, align 4, !tbaa !5
  %77 = icmp sle i32 %75, %76
  br i1 %77, label %79, label %78

78:                                               ; preds = %74
  store i32 8, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  br label %100

79:                                               ; preds = %74
  %80 = load x86_fp80, ptr %5, align 16, !tbaa !9
  %81 = load i32, ptr %3, align 4, !tbaa !5
  %82 = sext i32 %81 to i64
  %83 = getelementptr inbounds [13 x [1025 x x86_fp80]], ptr @a, i64 0, i64 %82
  %84 = load i32, ptr %9, align 4, !tbaa !5
  %85 = sext i32 %84 to i64
  %86 = getelementptr inbounds [1025 x x86_fp80], ptr %83, i64 0, i64 %85
  %87 = load x86_fp80, ptr %86, align 16, !tbaa !9
  %88 = load i32, ptr %7, align 4, !tbaa !5
  %89 = sext i32 %88 to i64
  %90 = getelementptr inbounds [13 x [1025 x x86_fp80]], ptr @a, i64 0, i64 %89
  %91 = load i32, ptr %9, align 4, !tbaa !5
  %92 = sext i32 %91 to i64
  %93 = getelementptr inbounds [1025 x x86_fp80], ptr %90, i64 0, i64 %92
  %94 = load x86_fp80, ptr %93, align 16, !tbaa !9
  %95 = fneg x86_fp80 %80
  %96 = call x86_fp80 @llvm.fmuladd.f80(x86_fp80 %95, x86_fp80 %87, x86_fp80 %94)
  store x86_fp80 %96, ptr %93, align 16, !tbaa !9
  br label %97

97:                                               ; preds = %79
  %98 = load i32, ptr %9, align 4, !tbaa !5
  %99 = add nsw i32 %98, 1
  store i32 %99, ptr %9, align 4, !tbaa !5
  br label %74, !llvm.loop !13

100:                                              ; preds = %78
  br label %101

101:                                              ; preds = %100, %59
  %102 = load i32, ptr %7, align 4, !tbaa !5
  %103 = add nsw i32 %102, 1
  store i32 %103, ptr %7, align 4, !tbaa !5
  br label %50, !llvm.loop !14

104:                                              ; preds = %54
  call void @llvm.lifetime.end.p0(i64 16, ptr %5) #4
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare x86_fp80 @llvm.fmuladd.f80(x86_fp80, x86_fp80, x86_fp80) #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long double", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@a = external dso_local local_unnamed_addr global [13 x [1025 x x86_fp80]], align 16
@n = external dso_local local_unnamed_addr global i32, align 4
@m = external dso_local local_unnamed_addr global i32, align 4
@id = external dso_local global [2051 x i32], align 16

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z5pivotii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = sext i32 %1 to i64
  %4 = getelementptr inbounds [2051 x i32], ptr @id, i64 0, i64 %3
  %5 = load i32, ptr @n, align 4, !tbaa !5
  %6 = add nsw i32 %5, %0
  %7 = sext i32 %6 to i64
  %8 = getelementptr inbounds [2051 x i32], ptr @id, i64 0, i64 %7
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %4, ptr noundef nonnull align 4 dereferenceable(4) %8) #3
  %9 = sext i32 %0 to i64
  %10 = getelementptr inbounds [13 x [1025 x x86_fp80]], ptr @a, i64 0, i64 %9, i64 %3
  %11 = load x86_fp80, ptr %10, align 16, !tbaa !9
  store x86_fp80 0xK3FFF8000000000000000, ptr %10, align 16, !tbaa !9
  %12 = load i32, ptr @n, align 4, !tbaa !5
  %.fr = freeze i32 %12
  %.not29 = icmp slt i32 %.fr, 0
  br i1 %.not29, label %.preheader.thread, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %2
  %13 = add nuw i32 %.fr, 1
  %wide.trip.count = zext i32 %13 to i64
  %xtraiter = and i64 %wide.trip.count, 3
  %14 = icmp ult i32 %.fr, 3
  br i1 %14, label %.preheader.unr-lcssa, label %.lr.ph.preheader.new

.lr.ph.preheader.new:                             ; preds = %.lr.ph.preheader
  %unroll_iter = and i64 %wide.trip.count, 4294967292
  br label %.lr.ph

.preheader.unr-lcssa:                             ; preds = %.lr.ph, %.lr.ph.preheader
  %indvars.iv.unr = phi i64 [ 0, %.lr.ph.preheader ], [ %indvars.iv.next.3, %.lr.ph ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %.preheader, label %.lr.ph.epil

.lr.ph.epil:                                      ; preds = %.preheader.unr-lcssa, %.lr.ph.epil
  %indvars.iv.epil = phi i64 [ %indvars.iv.next.epil, %.lr.ph.epil ], [ %indvars.iv.unr, %.preheader.unr-lcssa ]
  %epil.iter = phi i64 [ %epil.iter.next, %.lr.ph.epil ], [ 0, %.preheader.unr-lcssa ]
  %15 = getelementptr inbounds [13 x [1025 x x86_fp80]], ptr @a, i64 0, i64 %9, i64 %indvars.iv.epil
  %16 = load x86_fp80, ptr %15, align 16, !tbaa !9
  %17 = fdiv x86_fp80 %16, %11
  store x86_fp80 %17, ptr %15, align 16, !tbaa !9
  %indvars.iv.next.epil = add nuw nsw i64 %indvars.iv.epil, 1
  %epil.iter.next = add i64 %epil.iter, 1
  %epil.iter.cmp.not = icmp eq i64 %epil.iter.next, %xtraiter
  br i1 %epil.iter.cmp.not, label %.preheader, label %.lr.ph.epil, !llvm.loop !11

.preheader:                                       ; preds = %.lr.ph.epil, %.preheader.unr-lcssa
  %18 = load i32, ptr @m, align 4, !tbaa !5
  %.not2734 = icmp slt i32 %18, 0
  br i1 %.not2734, label %._crit_edge, label %.lr.ph36

.preheader.thread:                                ; preds = %2
  %19 = load i32, ptr @m, align 4, !tbaa !5
  %.not273454 = icmp slt i32 %19, 0
  br i1 %.not273454, label %._crit_edge, label %.lr.ph36.split.us.preheader

.lr.ph36:                                         ; preds = %.preheader
  br i1 %.not29, label %.lr.ph36.split.us.preheader, label %.lr.ph36.split.preheader

.lr.ph36.split.preheader:                         ; preds = %.lr.ph36
  %20 = zext i32 %0 to i64
  %21 = add nuw i32 %18, 1
  %wide.trip.count47 = zext i32 %21 to i64
  %xtraiter58 = and i64 %wide.trip.count, 1
  %22 = icmp eq i32 %.fr, 0
  %unroll_iter61 = and i64 %wide.trip.count, 4294967294
  %lcmp.mod60.not = icmp eq i64 %xtraiter58, 0
  br label %.lr.ph36.split

.lr.ph36.split.us.preheader:                      ; preds = %.preheader.thread, %.lr.ph36
  %23 = phi i32 [ %18, %.lr.ph36 ], [ %19, %.preheader.thread ]
  %24 = zext i32 %0 to i64
  %25 = add nuw i32 %23, 1
  %wide.trip.count52 = zext i32 %25 to i64
  %xtraiter63 = and i64 %wide.trip.count52, 1
  %26 = icmp eq i32 %23, 0
  br i1 %26, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph36.split.us.preheader.new

.lr.ph36.split.us.preheader.new:                  ; preds = %.lr.ph36.split.us.preheader
  %unroll_iter66 = and i64 %wide.trip.count52, 4294967294
  br label %.lr.ph36.split.us

.lr.ph36.split.us:                                ; preds = %31, %.lr.ph36.split.us.preheader.new
  %indvars.iv49 = phi i64 [ 0, %.lr.ph36.split.us.preheader.new ], [ %indvars.iv.next50.1, %31 ]
  %niter67 = phi i64 [ 0, %.lr.ph36.split.us.preheader.new ], [ %niter67.next.1, %31 ]
  %27 = icmp eq i64 %indvars.iv49, %24
  br i1 %27, label %.lr.ph36.split.us.1, label %.loopexit.us

.loopexit.us:                                     ; preds = %.lr.ph36.split.us
  %28 = getelementptr inbounds [13 x [1025 x x86_fp80]], ptr @a, i64 0, i64 %indvars.iv49, i64 %3
  store x86_fp80 0xK00000000000000000000, ptr %28, align 16, !tbaa !9
  br label %.lr.ph36.split.us.1

.lr.ph36.split.us.1:                              ; preds = %.loopexit.us, %.lr.ph36.split.us
  %indvars.iv.next50 = or disjoint i64 %indvars.iv49, 1
  %29 = icmp eq i64 %indvars.iv.next50, %24
  br i1 %29, label %31, label %.loopexit.us.1

.loopexit.us.1:                                   ; preds = %.lr.ph36.split.us.1
  %30 = getelementptr inbounds [13 x [1025 x x86_fp80]], ptr @a, i64 0, i64 %indvars.iv.next50, i64 %3
  store x86_fp80 0xK00000000000000000000, ptr %30, align 16, !tbaa !9
  br label %31

31:                                               ; preds = %.loopexit.us.1, %.lr.ph36.split.us.1
  %indvars.iv.next50.1 = add nuw nsw i64 %indvars.iv49, 2
  %niter67.next.1 = add i64 %niter67, 2
  %niter67.ncmp.1 = icmp eq i64 %niter67.next.1, %unroll_iter66
  br i1 %niter67.ncmp.1, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph36.split.us, !llvm.loop !13

.lr.ph:                                           ; preds = %.lr.ph, %.lr.ph.preheader.new
  %indvars.iv = phi i64 [ 0, %.lr.ph.preheader.new ], [ %indvars.iv.next.3, %.lr.ph ]
  %niter = phi i64 [ 0, %.lr.ph.preheader.new ], [ %niter.next.3, %.lr.ph ]
  %32 = getelementptr inbounds [13 x [1025 x x86_fp80]], ptr @a, i64 0, i64 %9, i64 %indvars.iv
  %33 = load x86_fp80, ptr %32, align 16, !tbaa !9
  %34 = fdiv x86_fp80 %33, %11
  store x86_fp80 %34, ptr %32, align 16, !tbaa !9
  %indvars.iv.next = or disjoint i64 %indvars.iv, 1
  %35 = getelementptr inbounds [13 x [1025 x x86_fp80]], ptr @a, i64 0, i64 %9, i64 %indvars.iv.next
  %36 = load x86_fp80, ptr %35, align 16, !tbaa !9
  %37 = fdiv x86_fp80 %36, %11
  store x86_fp80 %37, ptr %35, align 16, !tbaa !9
  %indvars.iv.next.1 = or disjoint i64 %indvars.iv, 2
  %38 = getelementptr inbounds [13 x [1025 x x86_fp80]], ptr @a, i64 0, i64 %9, i64 %indvars.iv.next.1
  %39 = load x86_fp80, ptr %38, align 16, !tbaa !9
  %40 = fdiv x86_fp80 %39, %11
  store x86_fp80 %40, ptr %38, align 16, !tbaa !9
  %indvars.iv.next.2 = or disjoint i64 %indvars.iv, 3
  %41 = getelementptr inbounds [13 x [1025 x x86_fp80]], ptr @a, i64 0, i64 %9, i64 %indvars.iv.next.2
  %42 = load x86_fp80, ptr %41, align 16, !tbaa !9
  %43 = fdiv x86_fp80 %42, %11
  store x86_fp80 %43, ptr %41, align 16, !tbaa !9
  %indvars.iv.next.3 = add nuw nsw i64 %indvars.iv, 4
  %niter.next.3 = add i64 %niter, 4
  %niter.ncmp.3 = icmp eq i64 %niter.next.3, %unroll_iter
  br i1 %niter.ncmp.3, label %.preheader.unr-lcssa, label %.lr.ph, !llvm.loop !15

._crit_edge.loopexit.unr-lcssa:                   ; preds = %31, %.lr.ph36.split.us.preheader
  %indvars.iv49.unr = phi i64 [ 0, %.lr.ph36.split.us.preheader ], [ %indvars.iv.next50.1, %31 ]
  %lcmp.mod65.not = icmp eq i64 %xtraiter63, 0
  %44 = icmp eq i64 %indvars.iv49.unr, %24
  %or.cond = select i1 %lcmp.mod65.not, i1 true, i1 %44
  br i1 %or.cond, label %._crit_edge, label %.loopexit.us.epil

.loopexit.us.epil:                                ; preds = %._crit_edge.loopexit.unr-lcssa
  %45 = getelementptr inbounds [13 x [1025 x x86_fp80]], ptr @a, i64 0, i64 %indvars.iv49.unr, i64 %3
  store x86_fp80 0xK00000000000000000000, ptr %45, align 16, !tbaa !9
  br label %._crit_edge

._crit_edge:                                      ; preds = %..loopexit_crit_edge, %._crit_edge.loopexit.unr-lcssa, %.loopexit.us.epil, %.preheader.thread, %.preheader
  ret void

.lr.ph36.split:                                   ; preds = %.lr.ph36.split.preheader, %..loopexit_crit_edge
  %indvars.iv44 = phi i64 [ 0, %.lr.ph36.split.preheader ], [ %indvars.iv.next45, %..loopexit_crit_edge ]
  %46 = icmp eq i64 %indvars.iv44, %20
  br i1 %46, label %..loopexit_crit_edge, label %.lr.ph33

.lr.ph33:                                         ; preds = %.lr.ph36.split
  %47 = getelementptr inbounds [13 x [1025 x x86_fp80]], ptr @a, i64 0, i64 %indvars.iv44, i64 %3
  %48 = load x86_fp80, ptr %47, align 16, !tbaa !9
  store x86_fp80 0xK00000000000000000000, ptr %47, align 16, !tbaa !9
  %49 = fneg x86_fp80 %48
  br i1 %22, label %..loopexit_crit_edge.loopexit.unr-lcssa, label %.lr.ph33.new

.lr.ph33.new:                                     ; preds = %.lr.ph33, %.lr.ph33.new
  %indvars.iv39 = phi i64 [ %indvars.iv.next40.1, %.lr.ph33.new ], [ 0, %.lr.ph33 ]
  %niter62 = phi i64 [ %niter62.next.1, %.lr.ph33.new ], [ 0, %.lr.ph33 ]
  %50 = getelementptr inbounds [13 x [1025 x x86_fp80]], ptr @a, i64 0, i64 %9, i64 %indvars.iv39
  %51 = load x86_fp80, ptr %50, align 16, !tbaa !9
  %52 = getelementptr inbounds [13 x [1025 x x86_fp80]], ptr @a, i64 0, i64 %indvars.iv44, i64 %indvars.iv39
  %53 = load x86_fp80, ptr %52, align 16, !tbaa !9
  %54 = tail call x86_fp80 @llvm.fmuladd.f80(x86_fp80 %49, x86_fp80 %51, x86_fp80 %53)
  store x86_fp80 %54, ptr %52, align 16, !tbaa !9
  %indvars.iv.next40 = or disjoint i64 %indvars.iv39, 1
  %55 = getelementptr inbounds [13 x [1025 x x86_fp80]], ptr @a, i64 0, i64 %9, i64 %indvars.iv.next40
  %56 = load x86_fp80, ptr %55, align 16, !tbaa !9
  %57 = getelementptr inbounds [13 x [1025 x x86_fp80]], ptr @a, i64 0, i64 %indvars.iv44, i64 %indvars.iv.next40
  %58 = load x86_fp80, ptr %57, align 16, !tbaa !9
  %59 = tail call x86_fp80 @llvm.fmuladd.f80(x86_fp80 %49, x86_fp80 %56, x86_fp80 %58)
  store x86_fp80 %59, ptr %57, align 16, !tbaa !9
  %indvars.iv.next40.1 = add nuw nsw i64 %indvars.iv39, 2
  %niter62.next.1 = add i64 %niter62, 2
  %niter62.ncmp.1 = icmp eq i64 %niter62.next.1, %unroll_iter61
  br i1 %niter62.ncmp.1, label %..loopexit_crit_edge.loopexit.unr-lcssa, label %.lr.ph33.new, !llvm.loop !16

..loopexit_crit_edge.loopexit.unr-lcssa:          ; preds = %.lr.ph33.new, %.lr.ph33
  %indvars.iv39.unr = phi i64 [ 0, %.lr.ph33 ], [ %indvars.iv.next40.1, %.lr.ph33.new ]
  br i1 %lcmp.mod60.not, label %..loopexit_crit_edge, label %..loopexit_crit_edge.loopexit.epilog-lcssa

..loopexit_crit_edge.loopexit.epilog-lcssa:       ; preds = %..loopexit_crit_edge.loopexit.unr-lcssa
  %60 = getelementptr inbounds [13 x [1025 x x86_fp80]], ptr @a, i64 0, i64 %9, i64 %indvars.iv39.unr
  %61 = load x86_fp80, ptr %60, align 16, !tbaa !9
  %62 = getelementptr inbounds [13 x [1025 x x86_fp80]], ptr @a, i64 0, i64 %indvars.iv44, i64 %indvars.iv39.unr
  %63 = load x86_fp80, ptr %62, align 16, !tbaa !9
  %64 = tail call x86_fp80 @llvm.fmuladd.f80(x86_fp80 %49, x86_fp80 %61, x86_fp80 %63)
  store x86_fp80 %64, ptr %62, align 16, !tbaa !9
  br label %..loopexit_crit_edge

..loopexit_crit_edge:                             ; preds = %..loopexit_crit_edge.loopexit.epilog-lcssa, %..loopexit_crit_edge.loopexit.unr-lcssa, %.lr.ph36.split
  %indvars.iv.next45 = add nuw nsw i64 %indvars.iv44, 1
  %exitcond48.not = icmp eq i64 %indvars.iv.next45, %wide.trip.count47
  br i1 %exitcond48.not, label %._crit_edge, label %.lr.ph36.split, !llvm.loop !13
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare x86_fp80 @llvm.fmuladd.f80(x86_fp80, x86_fp80, x86_fp80) #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long double", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.unroll.disable"}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass