; LLVM IR from tangjz/acm-icpc :: hdu/3731.ll (Z5solveiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z4bsgsiii(i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z9prim_rooti(i32 noundef) #2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z5solveiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #1 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  store i32 %0, ptr %6, align 4, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  store i32 1, ptr %10, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  store i32 0, ptr %11, align 4, !tbaa !5
  br label %20

20:                                               ; preds = %29, %4
  %21 = load i32, ptr %11, align 4, !tbaa !5
  %22 = load i32, ptr %7, align 4, !tbaa !5
  %23 = icmp slt i32 %21, %22
  br i1 %23, label %25, label %24

24:                                               ; preds = %20
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  br label %32

25:                                               ; preds = %20
  %26 = load i32, ptr %6, align 4, !tbaa !5
  %27 = load i32, ptr %10, align 4, !tbaa !5
  %28 = mul nsw i32 %27, %26
  store i32 %28, ptr %10, align 4, !tbaa !5
  br label %29

29:                                               ; preds = %25
  %30 = load i32, ptr %11, align 4, !tbaa !5
  %31 = add nsw i32 %30, 1
  store i32 %31, ptr %11, align 4, !tbaa !5
  br label %20, !llvm.loop !9

32:                                               ; preds = %24
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %33 = load i32, ptr %10, align 4, !tbaa !5
  %34 = load i32, ptr %10, align 4, !tbaa !5
  %35 = load i32, ptr %9, align 4, !tbaa !5
  %36 = srem i32 %35, %34
  store i32 %36, ptr %9, align 4, !tbaa !5
  %37 = call noundef i32 @_ZSt5__gcdIiET_S0_S0_(i32 noundef %33, i32 noundef %36)
  store i32 %37, ptr %12, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  store i32 1, ptr %13, align 4, !tbaa !5
  %38 = load i32, ptr %9, align 4, !tbaa !5
  %39 = icmp ne i32 %38, 0
  br i1 %39, label %60, label %40

40:                                               ; preds = %32
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  %41 = load i32, ptr %7, align 4, !tbaa !5
  %42 = sub nsw i32 %41, 1
  %43 = load i32, ptr %8, align 4, !tbaa !5
  %44 = sdiv i32 %42, %43
  %45 = add nsw i32 %44, 1
  store i32 %45, ptr %14, align 4, !tbaa !5
  br label %46

46:                                               ; preds = %55, %40
  %47 = load i32, ptr %14, align 4, !tbaa !5
  %48 = load i32, ptr %7, align 4, !tbaa !5
  %49 = icmp slt i32 %47, %48
  br i1 %49, label %51, label %50

50:                                               ; preds = %46
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  br label %58

51:                                               ; preds = %46
  %52 = load i32, ptr %6, align 4, !tbaa !5
  %53 = load i32, ptr %13, align 4, !tbaa !5
  %54 = mul nsw i32 %53, %52
  store i32 %54, ptr %13, align 4, !tbaa !5
  br label %55

55:                                               ; preds = %51
  %56 = load i32, ptr %14, align 4, !tbaa !5
  %57 = add nsw i32 %56, 1
  store i32 %57, ptr %14, align 4, !tbaa !5
  br label %46, !llvm.loop !11

58:                                               ; preds = %50
  %59 = load i32, ptr %13, align 4, !tbaa !5
  store i32 %59, ptr %5, align 4
  store i32 1, ptr %15, align 4
  br label %134

60:                                               ; preds = %32
  %61 = load i32, ptr %12, align 4, !tbaa !5
  %62 = icmp sgt i32 %61, 1
  br i1 %62, label %63, label %105

63:                                               ; preds = %60
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #3
  store i32 0, ptr %16, align 4, !tbaa !5
  br label %64

64:                                               ; preds = %70, %63
  %65 = load i32, ptr %9, align 4, !tbaa !5
  %66 = load i32, ptr %6, align 4, !tbaa !5
  %67 = srem i32 %65, %66
  %68 = icmp eq i32 %67, 0
  br i1 %68, label %69, label %79

69:                                               ; preds = %64
  br label %70

70:                                               ; preds = %69
  %71 = load i32, ptr %16, align 4, !tbaa !5
  %72 = add nsw i32 %71, 1
  store i32 %72, ptr %16, align 4, !tbaa !5
  %73 = load i32, ptr %6, align 4, !tbaa !5
  %74 = load i32, ptr %9, align 4, !tbaa !5
  %75 = sdiv i32 %74, %73
  store i32 %75, ptr %9, align 4, !tbaa !5
  %76 = load i32, ptr %6, align 4, !tbaa !5
  %77 = load i32, ptr %10, align 4, !tbaa !5
  %78 = sdiv i32 %77, %76
  store i32 %78, ptr %10, align 4, !tbaa !5
  br label %64, !llvm.loop !12

79:                                               ; preds = %64
  %80 = load i32, ptr %16, align 4, !tbaa !5
  %81 = load i32, ptr %8, align 4, !tbaa !5
  %82 = srem i32 %80, %81
  %83 = icmp ne i32 %82, 0
  br i1 %83, label %84, label %85

84:                                               ; preds = %79
  store i32 0, ptr %5, align 4
  store i32 1, ptr %15, align 4
  br label %102

85:                                               ; preds = %79
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #3
  %86 = load i32, ptr %16, align 4, !tbaa !5
  %87 = load i32, ptr %8, align 4, !tbaa !5
  %88 = sdiv i32 %86, %87
  store i32 %88, ptr %17, align 4, !tbaa !5
  br label %89

89:                                               ; preds = %98, %85
  %90 = load i32, ptr %17, align 4, !tbaa !5
  %91 = load i32, ptr %16, align 4, !tbaa !5
  %92 = icmp slt i32 %90, %91
  br i1 %92, label %94, label %93

93:                                               ; preds = %89
  store i32 11, ptr %15, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #3
  br label %101

94:                                               ; preds = %89
  %95 = load i32, ptr %6, align 4, !tbaa !5
  %96 = load i32, ptr %13, align 4, !tbaa !5
  %97 = mul nsw i32 %96, %95
  store i32 %97, ptr %13, align 4, !tbaa !5
  br label %98

98:                                               ; preds = %94
  %99 = load i32, ptr %17, align 4, !tbaa !5
  %100 = add nsw i32 %99, 1
  store i32 %100, ptr %17, align 4, !tbaa !5
  br label %89, !llvm.loop !13

101:                                              ; preds = %93
  store i32 0, ptr %15, align 4
  br label %102

102:                                              ; preds = %101, %84
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #3
  %103 = load i32, ptr %15, align 4
  switch i32 %103, label %134 [
    i32 0, label %104
  ]

104:                                              ; preds = %102
  br label %105

105:                                              ; preds = %104, %60
  br label %106

106:                                              ; preds = %105
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #3
  %107 = load i32, ptr %6, align 4, !tbaa !5
  %108 = call noundef i32 @_Z9prim_rooti(i32 noundef %107)
  store i32 %108, ptr %18, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #3
  %109 = load i32, ptr %10, align 4, !tbaa !5
  %110 = load i32, ptr %18, align 4, !tbaa !5
  %111 = load i32, ptr %9, align 4, !tbaa !5
  %112 = call noundef i32 @_Z4bsgsiii(i32 noundef %109, i32 noundef %110, i32 noundef %111)
  store i32 %112, ptr %19, align 4, !tbaa !5
  %113 = load i32, ptr %10, align 4, !tbaa !5
  %114 = load i32, ptr %6, align 4, !tbaa !5
  %115 = sdiv i32 %113, %114
  %116 = load i32, ptr %10, align 4, !tbaa !5
  %117 = sub nsw i32 %116, %115
  store i32 %117, ptr %10, align 4, !tbaa !5
  %118 = load i32, ptr %8, align 4, !tbaa !5
  %119 = load i32, ptr %10, align 4, !tbaa !5
  %120 = call noundef i32 @_ZSt5__gcdIiET_S0_S0_(i32 noundef %118, i32 noundef %119)
  store i32 %120, ptr %12, align 4, !tbaa !5
  %121 = load i32, ptr %19, align 4, !tbaa !5
  %122 = icmp eq i32 %121, -1
  br i1 %122, label %128, label %123

123:                                              ; preds = %106
  %124 = load i32, ptr %19, align 4, !tbaa !5
  %125 = load i32, ptr %12, align 4, !tbaa !5
  %126 = srem i32 %124, %125
  %127 = icmp ne i32 %126, 0
  br i1 %127, label %128, label %129

128:                                              ; preds = %123, %106
  store i32 0, ptr %5, align 4
  store i32 1, ptr %15, align 4
  br label %133

129:                                              ; preds = %123
  %130 = load i32, ptr %13, align 4, !tbaa !5
  %131 = load i32, ptr %12, align 4, !tbaa !5
  %132 = mul nsw i32 %130, %131
  store i32 %132, ptr %5, align 4
  store i32 1, ptr %15, align 4
  br label %133

133:                                              ; preds = %129, %128
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #3
  br label %134

134:                                              ; preds = %133, %102, %58
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  %135 = load i32, ptr %5, align 4
  ret i32 %135
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZSt5__gcdIiET_S0_S0_(i32 noundef, i32 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z4bsgsiii(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z9prim_rooti(i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z5solveiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  %5 = icmp sgt i32 %1, 0
  br i1 %5, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %4
  %min.iters.check = icmp ult i32 %1, 8
  br i1 %min.iters.check, label %.lr.ph.preheader153, label %vector.ph

.lr.ph.preheader153:                              ; preds = %middle.block, %.lr.ph.preheader
  %.05969.ph = phi i32 [ 0, %.lr.ph.preheader ], [ %n.vec, %middle.block ]
  %.06068.ph = phi i32 [ 1, %.lr.ph.preheader ], [ %9, %middle.block ]
  br label %.lr.ph

vector.ph:                                        ; preds = %.lr.ph.preheader
  %n.vec = and i32 %1, 2147483640
  %broadcast.splatinsert = insertelement <4 x i32> poison, i32 %0, i64 0
  %broadcast.splat = shufflevector <4 x i32> %broadcast.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %vec.phi = phi <4 x i32> [ <i32 1, i32 1, i32 1, i32 1>, %vector.ph ], [ %6, %vector.body ]
  %vec.phi107 = phi <4 x i32> [ <i32 1, i32 1, i32 1, i32 1>, %vector.ph ], [ %7, %vector.body ]
  %6 = mul <4 x i32> %vec.phi, %broadcast.splat
  %7 = mul <4 x i32> %vec.phi107, %broadcast.splat
  %index.next = add nuw i32 %index, 8
  %8 = icmp eq i32 %index.next, %n.vec
  br i1 %8, label %middle.block, label %vector.body, !llvm.loop !5

middle.block:                                     ; preds = %vector.body
  %bin.rdx = mul <4 x i32> %7, %6
  %9 = tail call i32 @llvm.vector.reduce.mul.v4i32(<4 x i32> %bin.rdx)
  %cmp.n = icmp eq i32 %n.vec, %1
  br i1 %cmp.n, label %._crit_edge, label %.lr.ph.preheader153

._crit_edge:                                      ; preds = %.lr.ph, %middle.block, %4
  %.060.lcssa = phi i32 [ 1, %4 ], [ %9, %middle.block ], [ %12, %.lr.ph ]
  %10 = srem i32 %3, %.060.lcssa
  %11 = tail call noundef i32 @_ZSt5__gcdIiET_S0_S0_(i32 noundef %.060.lcssa, i32 noundef %10)
  %.not = icmp eq i32 %10, 0
  br i1 %.not, label %14, label %25

.lr.ph:                                           ; preds = %.lr.ph.preheader153, %.lr.ph
  %.05969 = phi i32 [ %13, %.lr.ph ], [ %.05969.ph, %.lr.ph.preheader153 ]
  %.06068 = phi i32 [ %12, %.lr.ph ], [ %.06068.ph, %.lr.ph.preheader153 ]
  %12 = mul nsw i32 %.06068, %0
  %13 = add nuw nsw i32 %.05969, 1
  %exitcond.not = icmp eq i32 %13, %1
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !9

14:                                               ; preds = %._crit_edge
  %15 = add nsw i32 %1, -1
  %16 = sdiv i32 %15, %2
  %.05584 = add nsw i32 %16, 1
  %17 = icmp slt i32 %.05584, %1
  br i1 %17, label %.lr.ph88.preheader, label %.thread

.lr.ph88.preheader:                               ; preds = %14
  %18 = xor i32 %16, -1
  %19 = add i32 %18, %1
  %min.iters.check127 = icmp ult i32 %19, 8
  br i1 %min.iters.check127, label %.lr.ph88.preheader143, label %vector.ph128

vector.ph128:                                     ; preds = %.lr.ph88.preheader
  %n.vec130 = and i32 %19, -8
  %ind.end131 = add i32 %.05584, %n.vec130
  %broadcast.splatinsert137 = insertelement <4 x i32> poison, i32 %0, i64 0
  %broadcast.splat138 = shufflevector <4 x i32> %broadcast.splatinsert137, <4 x i32> poison, <4 x i32> zeroinitializer
  br label %vector.body133

vector.body133:                                   ; preds = %vector.body133, %vector.ph128
  %index134 = phi i32 [ 0, %vector.ph128 ], [ %index.next139, %vector.body133 ]
  %vec.phi135 = phi <4 x i32> [ <i32 1, i32 1, i32 1, i32 1>, %vector.ph128 ], [ %20, %vector.body133 ]
  %vec.phi136 = phi <4 x i32> [ <i32 1, i32 1, i32 1, i32 1>, %vector.ph128 ], [ %21, %vector.body133 ]
  %20 = mul <4 x i32> %vec.phi135, %broadcast.splat138
  %21 = mul <4 x i32> %vec.phi136, %broadcast.splat138
  %index.next139 = add nuw i32 %index134, 8
  %22 = icmp eq i32 %index.next139, %n.vec130
  br i1 %22, label %middle.block125, label %vector.body133, !llvm.loop !10

middle.block125:                                  ; preds = %vector.body133
  %bin.rdx140 = mul <4 x i32> %21, %20
  %23 = tail call i32 @llvm.vector.reduce.mul.v4i32(<4 x i32> %bin.rdx140)
  %cmp.n141 = icmp eq i32 %19, %n.vec130
  br i1 %cmp.n141, label %.thread, label %.lr.ph88.preheader143

.lr.ph88.preheader143:                            ; preds = %middle.block125, %.lr.ph88.preheader
  %.05586.ph = phi i32 [ %.05584, %.lr.ph88.preheader ], [ %ind.end131, %middle.block125 ]
  %.05685.ph = phi i32 [ 1, %.lr.ph88.preheader ], [ %23, %middle.block125 ]
  br label %.lr.ph88

.lr.ph88:                                         ; preds = %.lr.ph88.preheader143, %.lr.ph88
  %.05586 = phi i32 [ %.055, %.lr.ph88 ], [ %.05586.ph, %.lr.ph88.preheader143 ]
  %.05685 = phi i32 [ %24, %.lr.ph88 ], [ %.05685.ph, %.lr.ph88.preheader143 ]
  %24 = mul nsw i32 %.05685, %0
  %.055 = add nsw i32 %.05586, 1
  %exitcond96.not = icmp eq i32 %.055, %1
  br i1 %exitcond96.not, label %.thread, label %.lr.ph88, !llvm.loop !11

25:                                               ; preds = %._crit_edge
  %26 = icmp sgt i32 %11, 1
  br i1 %26, label %.preheader, label %._crit_edge82

.preheader:                                       ; preds = %25
  %27 = srem i32 %10, %0
  %28 = icmp eq i32 %27, 0
  br i1 %28, label %.lr.ph73, label %._crit_edge74

.lr.ph73:                                         ; preds = %.preheader, %.lr.ph73
  %.05072 = phi i32 [ %30, %.lr.ph73 ], [ %10, %.preheader ]
  %.05371 = phi i32 [ %29, %.lr.ph73 ], [ 0, %.preheader ]
  %.16170 = phi i32 [ %31, %.lr.ph73 ], [ %.060.lcssa, %.preheader ]
  %29 = add nuw nsw i32 %.05371, 1
  %30 = sdiv i32 %.05072, %0
  %31 = sdiv i32 %.16170, %0
  %32 = srem i32 %30, %0
  %33 = icmp eq i32 %32, 0
  br i1 %33, label %.lr.ph73, label %._crit_edge74, !llvm.loop !12

._crit_edge74:                                    ; preds = %.lr.ph73, %.preheader
  %.161.lcssa = phi i32 [ %.060.lcssa, %.preheader ], [ %31, %.lr.ph73 ]
  %.053.lcssa = phi i32 [ 0, %.preheader ], [ %29, %.lr.ph73 ]
  %.050.lcssa = phi i32 [ %10, %.preheader ], [ %30, %.lr.ph73 ]
  %34 = srem i32 %.053.lcssa, %2
  %35 = sdiv i32 %.053.lcssa, %2
  %.not65 = icmp eq i32 %34, 0
  br i1 %.not65, label %36, label %.thread

36:                                               ; preds = %._crit_edge74
  %37 = icmp slt i32 %35, %.053.lcssa
  br i1 %37, label %.lr.ph81.preheader, label %._crit_edge82

.lr.ph81.preheader:                               ; preds = %36
  %38 = sub i32 %.053.lcssa, %35
  %min.iters.check110 = icmp ult i32 %38, 8
  br i1 %min.iters.check110, label %.lr.ph81.preheader146, label %vector.ph111

vector.ph111:                                     ; preds = %.lr.ph81.preheader
  %n.vec113 = and i32 %38, -8
  %ind.end = add i32 %35, %n.vec113
  %broadcast.splatinsert119 = insertelement <4 x i32> poison, i32 %0, i64 0
  %broadcast.splat120 = shufflevector <4 x i32> %broadcast.splatinsert119, <4 x i32> poison, <4 x i32> zeroinitializer
  br label %vector.body115

vector.body115:                                   ; preds = %vector.body115, %vector.ph111
  %index116 = phi i32 [ 0, %vector.ph111 ], [ %index.next121, %vector.body115 ]
  %vec.phi117 = phi <4 x i32> [ <i32 1, i32 1, i32 1, i32 1>, %vector.ph111 ], [ %39, %vector.body115 ]
  %vec.phi118 = phi <4 x i32> [ <i32 1, i32 1, i32 1, i32 1>, %vector.ph111 ], [ %40, %vector.body115 ]
  %39 = mul <4 x i32> %vec.phi117, %broadcast.splat120
  %40 = mul <4 x i32> %vec.phi118, %broadcast.splat120
  %index.next121 = add nuw i32 %index116, 8
  %41 = icmp eq i32 %index.next121, %n.vec113
  br i1 %41, label %middle.block108, label %vector.body115, !llvm.loop !13

middle.block108:                                  ; preds = %vector.body115
  %bin.rdx122 = mul <4 x i32> %40, %39
  %42 = tail call i32 @llvm.vector.reduce.mul.v4i32(<4 x i32> %bin.rdx122)
  %cmp.n123 = icmp eq i32 %38, %n.vec113
  br i1 %cmp.n123, label %._crit_edge82, label %.lr.ph81.preheader146

.lr.ph81.preheader146:                            ; preds = %middle.block108, %.lr.ph81.preheader
  %.05279.ph = phi i32 [ %35, %.lr.ph81.preheader ], [ %ind.end, %middle.block108 ]
  %.15778.ph = phi i32 [ 1, %.lr.ph81.preheader ], [ %42, %middle.block108 ]
  br label %.lr.ph81

.lr.ph81:                                         ; preds = %.lr.ph81.preheader146, %.lr.ph81
  %.05279 = phi i32 [ %44, %.lr.ph81 ], [ %.05279.ph, %.lr.ph81.preheader146 ]
  %.15778 = phi i32 [ %43, %.lr.ph81 ], [ %.15778.ph, %.lr.ph81.preheader146 ]
  %43 = mul nsw i32 %.15778, %0
  %44 = add nsw i32 %.05279, 1
  %exitcond95.not = icmp eq i32 %44, %.053.lcssa
  br i1 %exitcond95.not, label %._crit_edge82, label %.lr.ph81, !llvm.loop !14

._crit_edge82:                                    ; preds = %.lr.ph81, %middle.block108, %36, %25
  %.262 = phi i32 [ %.060.lcssa, %25 ], [ %.161.lcssa, %36 ], [ %.161.lcssa, %middle.block108 ], [ %.161.lcssa, %.lr.ph81 ]
  %.3 = phi i32 [ 1, %25 ], [ 1, %36 ], [ %42, %middle.block108 ], [ %43, %.lr.ph81 ]
  %.151 = phi i32 [ %10, %25 ], [ %.050.lcssa, %36 ], [ %.050.lcssa, %middle.block108 ], [ %.050.lcssa, %.lr.ph81 ]
  %45 = tail call noundef i32 @_Z9prim_rooti(i32 noundef %0)
  %46 = tail call noundef i32 @_Z4bsgsiii(i32 noundef %.262, i32 noundef %45, i32 noundef %.151)
  %47 = sdiv i32 %.262, %0
  %48 = sub nsw i32 %.262, %47
  %49 = tail call noundef i32 @_ZSt5__gcdIiET_S0_S0_(i32 noundef %2, i32 noundef %48)
  %50 = icmp eq i32 %46, -1
  br i1 %50, label %.thread, label %51

51:                                               ; preds = %._crit_edge82
  %52 = srem i32 %46, %49
  %.not66 = icmp eq i32 %52, 0
  %53 = mul nsw i32 %49, %.3
  %spec.select = select i1 %.not66, i32 %53, i32 0
  br label %.thread

.thread:                                          ; preds = %.lr.ph88, %middle.block125, %14, %._crit_edge74, %51, %._crit_edge82
  %.2 = phi i32 [ 0, %._crit_edge82 ], [ %spec.select, %51 ], [ 0, %._crit_edge74 ], [ 1, %14 ], [ %23, %middle.block125 ], [ %24, %.lr.ph88 ]
  ret i32 %.2
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZSt5__gcdIiET_S0_S0_(i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.mul.v4i32(<4 x i32>) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6, !7, !8}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!"llvm.loop.isvectorized", i32 1}
!8 = !{!"llvm.loop.unroll.runtime.disable"}
!9 = distinct !{!9, !6, !8, !7}
!10 = distinct !{!10, !6, !7, !8}
!11 = distinct !{!11, !6, !8, !7}
!12 = distinct !{!12, !6}
!13 = distinct !{!13, !6, !7, !8}
!14 = distinct !{!14, !6, !8, !7}


; Effective O3 passes: ConstraintEliminationPass,CorrelatedValuePropagationPass,DivRemPairsPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass