; LLVM IR from tangjz/acm-icpc :: usaco/Training/Chapter 2 Bigger challenges/lamps.ll (Z3dfsiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@c = external dso_local global i32, align 4
@i = external dso_local global i32, align 4
@on = external dso_local global [7 x i8], align 1
@off = external dso_local global [7 x i8], align 1
@light = external dso_local global [64 x i8], align 16
@succeed = external dso_local global i8, align 1
@_ZL11transformed = external hidden constant [4 x i32], align 16

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3dfsiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !5
  %7 = load i32, ptr %4, align 4, !tbaa !5
  %8 = icmp sge i32 %7, 5
  br i1 %8, label %9, label %10

9:                                                ; preds = %3
  br label %72

10:                                               ; preds = %3
  %11 = load i32, ptr %6, align 4, !tbaa !5
  %12 = load i32, ptr @c, align 4, !tbaa !5
  %13 = icmp sle i32 %11, %12
  br i1 %13, label %14, label %57

14:                                               ; preds = %10
  store i32 1, ptr @i, align 4, !tbaa !5
  br label %15

15:                                               ; preds = %46, %14
  %16 = load i32, ptr @i, align 4, !tbaa !5
  %17 = icmp sle i32 %16, 6
  br i1 %17, label %18, label %49

18:                                               ; preds = %15
  %19 = load i32, ptr @i, align 4, !tbaa !5
  %20 = sext i32 %19 to i64
  %21 = getelementptr inbounds [7 x i8], ptr @on, i64 0, i64 %20
  %22 = load i8, ptr %21, align 1, !tbaa !9, !range !11, !noundef !12
  %23 = trunc i8 %22 to i1
  br i1 %23, label %24, label %31

24:                                               ; preds = %18
  %25 = load i32, ptr %5, align 4, !tbaa !5
  %26 = load i32, ptr @i, align 4, !tbaa !5
  %27 = sub nsw i32 6, %26
  %28 = ashr i32 %25, %27
  %29 = and i32 %28, 1
  %30 = icmp ne i32 %29, 0
  br i1 %30, label %31, label %44

31:                                               ; preds = %24, %18
  %32 = load i32, ptr @i, align 4, !tbaa !5
  %33 = sext i32 %32 to i64
  %34 = getelementptr inbounds [7 x i8], ptr @off, i64 0, i64 %33
  %35 = load i8, ptr %34, align 1, !tbaa !9, !range !11, !noundef !12
  %36 = trunc i8 %35 to i1
  br i1 %36, label %37, label %45

37:                                               ; preds = %31
  %38 = load i32, ptr %5, align 4, !tbaa !5
  %39 = load i32, ptr @i, align 4, !tbaa !5
  %40 = sub nsw i32 6, %39
  %41 = ashr i32 %38, %40
  %42 = and i32 %41, 1
  %43 = icmp ne i32 %42, 0
  br i1 %43, label %44, label %45

44:                                               ; preds = %37, %24
  br label %49

45:                                               ; preds = %37, %31
  br label %46

46:                                               ; preds = %45
  %47 = load i32, ptr @i, align 4, !tbaa !5
  %48 = add nsw i32 %47, 1
  store i32 %48, ptr @i, align 4, !tbaa !5
  br label %15, !llvm.loop !13

49:                                               ; preds = %44, %15
  %50 = load i32, ptr @i, align 4, !tbaa !5
  %51 = icmp sgt i32 %50, 6
  br i1 %51, label %52, label %56

52:                                               ; preds = %49
  store i8 1, ptr @succeed, align 1, !tbaa !9
  %53 = load i32, ptr %5, align 4, !tbaa !5
  %54 = sext i32 %53 to i64
  %55 = getelementptr inbounds [64 x i8], ptr @light, i64 0, i64 %54
  store i8 1, ptr %55, align 1, !tbaa !9
  br label %56

56:                                               ; preds = %52, %49
  br label %57

57:                                               ; preds = %56, %10
  %58 = load i32, ptr %4, align 4, !tbaa !5
  %59 = add nsw i32 %58, 1
  %60 = load i32, ptr %5, align 4, !tbaa !5
  %61 = load i32, ptr %4, align 4, !tbaa !5
  %62 = sext i32 %61 to i64
  %63 = getelementptr inbounds [4 x i32], ptr @_ZL11transformed, i64 0, i64 %62
  %64 = load i32, ptr %63, align 4, !tbaa !5
  %65 = xor i32 %60, %64
  %66 = load i32, ptr %6, align 4, !tbaa !5
  %67 = add nsw i32 %66, 1
  call void @_Z3dfsiii(i32 noundef %59, i32 noundef %65, i32 noundef %67)
  %68 = load i32, ptr %4, align 4, !tbaa !5
  %69 = add nsw i32 %68, 1
  %70 = load i32, ptr %5, align 4, !tbaa !5
  %71 = load i32, ptr %6, align 4, !tbaa !5
  call void @_Z3dfsiii(i32 noundef %69, i32 noundef %70, i32 noundef %71)
  br label %72

72:                                               ; preds = %57, %9
  ret void
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{i8 0, i8 2}
!12 = !{}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@c = external dso_local local_unnamed_addr global i32, align 4
@i = external dso_local local_unnamed_addr global i32, align 4
@on = external dso_local local_unnamed_addr global [7 x i8], align 1
@off = external dso_local local_unnamed_addr global [7 x i8], align 1
@light = external dso_local local_unnamed_addr global [64 x i8], align 16
@succeed = external dso_local local_unnamed_addr global i8, align 1
@_ZL11transformed = external hidden local_unnamed_addr constant [4 x i32], align 16

; Function Attrs: mustprogress nofree nosync nounwind memory(readwrite, argmem: none, inaccessiblemem: none) uwtable
define dso_local void @_Z3dfsiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = icmp sgt i32 %0, 4
  br i1 %4, label %tailrecurse._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %3
  %5 = sext i32 %1 to i64
  %6 = getelementptr inbounds [64 x i8], ptr @light, i64 0, i64 %5
  %7 = add nsw i32 %2, 1
  %8 = sext i32 %0 to i64
  %9 = and i32 %1, 32
  %.not13 = icmp eq i32 %9, 0
  %10 = and i32 %1, 32
  %.not14 = icmp ne i32 %10, 0
  %11 = and i32 %1, 16
  %.not13.1 = icmp eq i32 %11, 0
  %12 = and i32 %1, 16
  %.not14.1 = icmp ne i32 %12, 0
  %13 = and i32 %1, 8
  %.not13.2 = icmp eq i32 %13, 0
  %14 = and i32 %1, 8
  %.not14.2 = icmp ne i32 %14, 0
  %15 = and i32 %1, 4
  %.not13.3 = icmp eq i32 %15, 0
  %16 = and i32 %1, 4
  %.not14.3 = icmp ne i32 %16, 0
  %17 = and i32 %1, 2
  %.not13.4 = icmp eq i32 %17, 0
  %18 = and i32 %1, 2
  %.not14.4 = icmp ne i32 %18, 0
  %19 = and i32 %1, 1
  %.not13.5 = icmp eq i32 %19, 0
  %20 = and i32 %1, 1
  %.not14.5 = icmp ne i32 %20, 0
  br label %21

21:                                               ; preds = %.lr.ph, %.thread
  %indvars.iv = phi i64 [ %8, %.lr.ph ], [ %indvars.iv.next, %.thread ]
  %22 = load i32, ptr @c, align 4, !tbaa !5
  %.not = icmp slt i32 %22, %2
  br i1 %.not, label %.thread, label %.preheader.preheader

.preheader.preheader:                             ; preds = %21
  %23 = load i8, ptr getelementptr inbounds (i8, ptr @on, i64 1), align 1, !tbaa !9, !range !11, !noundef !12
  %24 = trunc nuw i8 %23 to i1
  %brmerge.not = and i1 %.not13, %24
  %25 = load i8, ptr getelementptr inbounds (i8, ptr @off, i64 1), align 1, !range !11
  %26 = trunc nuw i8 %25 to i1
  %brmerge25.not = and i1 %.not14, %26
  %or.cond = select i1 %brmerge.not, i1 true, i1 %brmerge25.not
  br i1 %or.cond, label %.thread.loopexit, label %.preheader.1

.preheader.1:                                     ; preds = %.preheader.preheader
  %27 = load i8, ptr getelementptr inbounds (i8, ptr @on, i64 2), align 1, !tbaa !9, !range !11, !noundef !12
  %28 = trunc nuw i8 %27 to i1
  %brmerge27.not = and i1 %.not13.1, %28
  %29 = load i8, ptr getelementptr inbounds (i8, ptr @off, i64 2), align 1, !range !11
  %30 = trunc nuw i8 %29 to i1
  %brmerge29.not = and i1 %.not14.1, %30
  %or.cond48 = select i1 %brmerge27.not, i1 true, i1 %brmerge29.not
  br i1 %or.cond48, label %.thread.loopexit, label %.preheader.2

.preheader.2:                                     ; preds = %.preheader.1
  %31 = load i8, ptr getelementptr inbounds (i8, ptr @on, i64 3), align 1, !tbaa !9, !range !11, !noundef !12
  %32 = trunc nuw i8 %31 to i1
  %brmerge31.not = and i1 %.not13.2, %32
  %33 = load i8, ptr getelementptr inbounds (i8, ptr @off, i64 3), align 1, !range !11
  %34 = trunc nuw i8 %33 to i1
  %brmerge33.not = and i1 %.not14.2, %34
  %or.cond50 = select i1 %brmerge31.not, i1 true, i1 %brmerge33.not
  br i1 %or.cond50, label %.thread.loopexit, label %.preheader.3

.preheader.3:                                     ; preds = %.preheader.2
  %35 = load i8, ptr getelementptr inbounds (i8, ptr @on, i64 4), align 1, !tbaa !9, !range !11, !noundef !12
  %36 = trunc nuw i8 %35 to i1
  %brmerge35.not = and i1 %.not13.3, %36
  %37 = load i8, ptr getelementptr inbounds (i8, ptr @off, i64 4), align 1, !range !11
  %38 = trunc nuw i8 %37 to i1
  %brmerge37.not = and i1 %.not14.3, %38
  %or.cond52 = select i1 %brmerge35.not, i1 true, i1 %brmerge37.not
  br i1 %or.cond52, label %.thread.loopexit, label %.preheader.4

.preheader.4:                                     ; preds = %.preheader.3
  %39 = load i8, ptr getelementptr inbounds (i8, ptr @on, i64 5), align 1, !tbaa !9, !range !11, !noundef !12
  %40 = trunc nuw i8 %39 to i1
  %brmerge39.not = and i1 %.not13.4, %40
  %41 = load i8, ptr getelementptr inbounds (i8, ptr @off, i64 5), align 1, !range !11
  %42 = trunc nuw i8 %41 to i1
  %brmerge41.not = and i1 %.not14.4, %42
  %or.cond54 = select i1 %brmerge39.not, i1 true, i1 %brmerge41.not
  br i1 %or.cond54, label %.thread.loopexit, label %.preheader.5

.preheader.5:                                     ; preds = %.preheader.4
  %43 = load i8, ptr getelementptr inbounds (i8, ptr @on, i64 6), align 1, !tbaa !9, !range !11, !noundef !12
  %44 = trunc nuw i8 %43 to i1
  %brmerge43.not = and i1 %.not13.5, %44
  %45 = load i8, ptr getelementptr inbounds (i8, ptr @off, i64 6), align 1, !range !11
  %46 = trunc nuw i8 %45 to i1
  %brmerge45.not = and i1 %.not14.5, %46
  %or.cond56 = select i1 %brmerge43.not, i1 true, i1 %brmerge45.not
  br i1 %or.cond56, label %.thread.loopexit, label %47

47:                                               ; preds = %.preheader.5
  store i32 7, ptr @i, align 4, !tbaa !5
  store i8 1, ptr @succeed, align 1, !tbaa !9
  store i8 1, ptr %6, align 1, !tbaa !9
  br label %.thread

.thread.loopexit:                                 ; preds = %.preheader.5, %.preheader.4, %.preheader.3, %.preheader.2, %.preheader.1, %.preheader.preheader
  %storemerge18.lcssa = phi i32 [ 1, %.preheader.preheader ], [ 2, %.preheader.1 ], [ 3, %.preheader.2 ], [ 4, %.preheader.3 ], [ 5, %.preheader.4 ], [ 6, %.preheader.5 ]
  store i32 %storemerge18.lcssa, ptr @i, align 4, !tbaa !5
  br label %.thread

.thread:                                          ; preds = %.thread.loopexit, %47, %21
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %48 = getelementptr inbounds [4 x i32], ptr @_ZL11transformed, i64 0, i64 %indvars.iv
  %49 = load i32, ptr %48, align 4, !tbaa !5
  %50 = xor i32 %49, %1
  %51 = trunc i64 %indvars.iv.next to i32
  tail call void @_Z3dfsiii(i32 noundef %51, i32 noundef %50, i32 noundef %7)
  %exitcond = icmp eq i32 %51, 5
  br i1 %exitcond, label %tailrecurse._crit_edge, label %21

tailrecurse._crit_edge:                           ; preds = %.thread, %3
  ret void
}

attributes #0 = { mustprogress nofree nosync nounwind memory(readwrite, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{i8 0, i8 2}
!12 = !{}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass