; LLVM IR from tangjz/acm-icpc :: hdu/6750.ll (Z1sx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z1sx(i64 noundef %0) #0 {
  %2 = alloca i64, align 8
  %3 = alloca i32, align 4
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  store i64 %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  store i32 0, ptr %3, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #2
  store i64 1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #2
  br label %6

6:                                                ; preds = %38, %1
  %7 = load i64, ptr %4, align 8, !tbaa !5
  %8 = load i64, ptr %2, align 8, !tbaa !5
  %9 = icmp sle i64 %7, %8
  br i1 %9, label %11, label %10

10:                                               ; preds = %6
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #2
  br label %41

11:                                               ; preds = %6
  %12 = load i64, ptr %2, align 8, !tbaa !5
  %13 = load i64, ptr %2, align 8, !tbaa !5
  %14 = load i64, ptr %4, align 8, !tbaa !5
  %15 = sdiv i64 %13, %14
  %16 = sdiv i64 %12, %15
  store i64 %16, ptr %5, align 8, !tbaa !5
  %17 = load i32, ptr %3, align 4, !tbaa !9
  %18 = sext i32 %17 to i64
  %19 = load i64, ptr %2, align 8, !tbaa !5
  %20 = load i64, ptr %4, align 8, !tbaa !5
  %21 = sdiv i64 %19, %20
  %22 = srem i64 %21, 1000000007
  %23 = load i64, ptr %5, align 8, !tbaa !5
  %24 = load i64, ptr %4, align 8, !tbaa !5
  %25 = sub nsw i64 %23, %24
  %26 = add nsw i64 %25, 1
  %27 = srem i64 %26, 1000000007
  %28 = mul nsw i64 %22, %27
  %29 = srem i64 %28, 1000000007
  %30 = load i64, ptr %4, align 8, !tbaa !5
  %31 = load i64, ptr %5, align 8, !tbaa !5
  %32 = add nsw i64 %30, %31
  %33 = srem i64 %32, 1000000007
  %34 = mul nsw i64 %29, %33
  %35 = add nsw i64 %18, %34
  %36 = srem i64 %35, 1000000007
  %37 = trunc i64 %36 to i32
  store i32 %37, ptr %3, align 4, !tbaa !9
  br label %38

38:                                               ; preds = %11
  %39 = load i64, ptr %5, align 8, !tbaa !5
  %40 = add nsw i64 %39, 1
  store i64 %40, ptr %4, align 8, !tbaa !5
  br label %6, !llvm.loop !11

41:                                               ; preds = %10
  %42 = load i32, ptr %3, align 4, !tbaa !9
  %43 = sext i32 %42 to i64
  %44 = mul nsw i64 %43, 500000004
  %45 = srem i64 %44, 1000000007
  %46 = trunc i64 %45 to i32
  store i32 %46, ptr %3, align 4, !tbaa !9
  %47 = load i32, ptr %3, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  ret i32 %47
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef range(i32 -1000000006, 1000000007) i32 @_Z1sx(i64 noundef %0) local_unnamed_addr #0 {
  %.not17 = icmp slt i64 %0, 1
  br i1 %.not17, label %._crit_edge, label %.lr.ph

._crit_edge.loopexit:                             ; preds = %.lr.ph
  %2 = mul nsw i64 %16, 500000004
  %3 = srem i64 %2, 1000000007
  %4 = trunc nsw i64 %3 to i32
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %1
  %.0.lcssa = phi i32 [ 0, %1 ], [ %4, %._crit_edge.loopexit ]
  ret i32 %.0.lcssa

.lr.ph:                                           ; preds = %1, %.lr.ph
  %.019 = phi i64 [ %16, %.lr.ph ], [ 0, %1 ]
  %.01518 = phi i64 [ %17, %.lr.ph ], [ 1, %1 ]
  %5 = udiv i64 %0, %.01518
  %6 = udiv i64 %0, %5
  %7 = urem i64 %5, 1000000007
  %reass.sub = sub i64 %6, %.01518
  %8 = add i64 %reass.sub, 1
  %9 = srem i64 %8, 1000000007
  %10 = mul nsw i64 %9, %7
  %11 = srem i64 %10, 1000000007
  %12 = add nuw nsw i64 %6, %.01518
  %13 = urem i64 %12, 1000000007
  %14 = mul nsw i64 %11, %13
  %15 = add nsw i64 %14, %.019
  %16 = srem i64 %15, 1000000007
  %17 = add nuw nsw i64 %6, 1
  %.not.not = icmp slt i64 %6, %0
  br i1 %.not.not, label %.lr.ph, label %._crit_edge.loopexit, !llvm.loop !5
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass