; LLVM IR from tangjz/acm-icpc :: codeforces/complete/1175G.ll (Z7seg_updiiiSt4pairIiiE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::pair<int, int>, std::allocator<std::pair<int, int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::pair<int, int>, std::allocator<std::pair<int, int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::pair<int, int>, std::allocator<std::pair<int, int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::pair<int, int>, std::allocator<std::pair<int, int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.std::pair" = type { i32, i32 }

@sL = external dso_local global [40003 x %"class.std::vector"], align 16

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z7seg_updRSt6vectorISt4pairIiiESaIS1_EES1_(ptr noundef nonnull align 8 dereferenceable(24), i64) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z7seg_updiiiSt4pairIiiE(i32 noundef %0, i32 noundef %1, i32 noundef %2, i64 %3) #0 {
  %5 = alloca %"struct.std::pair", align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca %"struct.std::pair", align 4
  %10 = alloca i32, align 4
  %11 = alloca %"struct.std::pair", align 4
  %12 = alloca %"struct.std::pair", align 4
  store i64 %3, ptr %5, align 4
  store i32 %0, ptr %6, align 4, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !5
  %13 = load i32, ptr %6, align 4, !tbaa !5
  %14 = load i32, ptr %7, align 4, !tbaa !5
  %15 = call noundef i32 @_Z7seg_idxii(i32 noundef %13, i32 noundef %14)
  %16 = sext i32 %15 to i64
  %17 = getelementptr inbounds [40003 x %"class.std::vector"], ptr @sL, i64 0, i64 %16
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %9, ptr align 4 %5, i64 8, i1 false)
  %18 = load i64, ptr %9, align 4
  call void @_Z7seg_updRSt6vectorISt4pairIiiESaIS1_EES1_(ptr noundef nonnull align 8 dereferenceable(24) %17, i64 %18)
  %19 = load i32, ptr %6, align 4, !tbaa !5
  %20 = load i32, ptr %7, align 4, !tbaa !5
  %21 = icmp slt i32 %19, %20
  br i1 %21, label %22, label %42

22:                                               ; preds = %4
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  %23 = load i32, ptr %6, align 4, !tbaa !5
  %24 = load i32, ptr %7, align 4, !tbaa !5
  %25 = add nsw i32 %23, %24
  %26 = ashr i32 %25, 1
  store i32 %26, ptr %10, align 4, !tbaa !5
  %27 = load i32, ptr %8, align 4, !tbaa !5
  %28 = load i32, ptr %10, align 4, !tbaa !5
  %29 = icmp sle i32 %27, %28
  br i1 %29, label %30, label %35

30:                                               ; preds = %22
  %31 = load i32, ptr %6, align 4, !tbaa !5
  %32 = load i32, ptr %10, align 4, !tbaa !5
  %33 = load i32, ptr %8, align 4, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %11, ptr align 4 %5, i64 8, i1 false)
  %34 = load i64, ptr %11, align 4
  call void @_Z7seg_updiiiSt4pairIiiE(i32 noundef %31, i32 noundef %32, i32 noundef %33, i64 %34)
  br label %41

35:                                               ; preds = %22
  %36 = load i32, ptr %10, align 4, !tbaa !5
  %37 = add nsw i32 %36, 1
  %38 = load i32, ptr %7, align 4, !tbaa !5
  %39 = load i32, ptr %8, align 4, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %12, ptr align 4 %5, i64 8, i1 false)
  %40 = load i64, ptr %12, align 4
  call void @_Z7seg_updiiiSt4pairIiiE(i32 noundef %37, i32 noundef %38, i32 noundef %39, i64 %40)
  br label %41

41:                                               ; preds = %35, %30
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  br label %42

42:                                               ; preds = %41, %4
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7seg_idxii(i32 noundef, i32 noundef) #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::pair<int, int>, std::allocator<std::pair<int, int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::pair<int, int>, std::allocator<std::pair<int, int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::pair<int, int>, std::allocator<std::pair<int, int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::pair<int, int>, std::allocator<std::pair<int, int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@sL = external dso_local global [40003 x %"class.std::vector"], align 16

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z7seg_updRSt6vectorISt4pairIiiESaIS1_EES1_(ptr noundef nonnull align 8 dereferenceable(24), i64) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z7seg_updiiiSt4pairIiiE(i32 noundef %0, i32 noundef %1, i32 noundef %2, i64 %3) local_unnamed_addr #0 {
  %5 = tail call noundef i32 @_Z7seg_idxii(i32 noundef %0, i32 noundef %1)
  %6 = sext i32 %5 to i64
  %7 = getelementptr inbounds [40003 x %"class.std::vector"], ptr @sL, i64 0, i64 %6
  tail call void @_Z7seg_updRSt6vectorISt4pairIiiESaIS1_EES1_(ptr noundef nonnull align 8 dereferenceable(24) %7, i64 %3)
  %8 = icmp slt i32 %0, %1
  br i1 %8, label %tailrecurse, label %tailrecurse._crit_edge

tailrecurse:                                      ; preds = %4, %tailrecurse
  %.tr2328 = phi i32 [ %spec.select26, %tailrecurse ], [ %1, %4 ]
  %.tr27 = phi i32 [ %spec.select, %tailrecurse ], [ %0, %4 ]
  %9 = add nsw i32 %.tr2328, %.tr27
  %10 = ashr i32 %9, 1
  %.not = icmp slt i32 %10, %2
  %11 = add nsw i32 %10, 1
  %spec.select = select i1 %.not, i32 %11, i32 %.tr27
  %spec.select26 = select i1 %.not, i32 %.tr2328, i32 %10
  %12 = tail call noundef i32 @_Z7seg_idxii(i32 noundef %spec.select, i32 noundef %spec.select26)
  %13 = sext i32 %12 to i64
  %14 = getelementptr inbounds [40003 x %"class.std::vector"], ptr @sL, i64 0, i64 %13
  tail call void @_Z7seg_updRSt6vectorISt4pairIiiESaIS1_EES1_(ptr noundef nonnull align 8 dereferenceable(24) %14, i64 %3)
  %15 = icmp slt i32 %spec.select, %spec.select26
  br i1 %15, label %tailrecurse, label %tailrecurse._crit_edge

tailrecurse._crit_edge:                           ; preds = %tailrecurse, %4
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7seg_idxii(i32 noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass