; LLVM IR from tangjz/acm-icpc :: codeforces/complete (755F)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@n = external dso_local global i32, align 4
@m = external dso_local global i32, align 4
@sz = external dso_local global i32, align 4
@perm = external dso_local global [1000001 x i32], align 16
@cnt = external dso_local global [1000001 x i32], align 16
@ans1 = external dso_local global i32, align 4
@ans2 = external dso_local global i32, align 4
@f = external dso_local global [15627 x i64], align 16
@g = external dso_local global [15627 x i64], align 16
@.str = external hidden unnamed_addr constant [5 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [3 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [7 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z8bit_testPyi(ptr noundef, i32 noundef) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z9bit_shiftPyiS_(ptr noundef, i32 noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z7bit_andPyS_(ptr noundef, ptr noundef) #0

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #2 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  %11 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef @n, ptr noundef @m)
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #4
  store i32 1, ptr %2, align 4, !tbaa !5
  br label %12

12:                                               ; preds = %22, %0
  %13 = load i32, ptr %2, align 4, !tbaa !5
  %14 = load i32, ptr @n, align 4, !tbaa !5
  %15 = icmp sle i32 %13, %14
  br i1 %15, label %17, label %16

16:                                               ; preds = %12
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #4
  br label %25

17:                                               ; preds = %12
  %18 = load i32, ptr %2, align 4, !tbaa !5
  %19 = sext i32 %18 to i64
  %20 = getelementptr inbounds i32, ptr @perm, i64 %19
  %21 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str.1, ptr noundef %20)
  br label %22

22:                                               ; preds = %17
  %23 = load i32, ptr %2, align 4, !tbaa !5
  %24 = add nsw i32 %23, 1
  store i32 %24, ptr %2, align 4, !tbaa !5
  br label %12, !llvm.loop !9

25:                                               ; preds = %16
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  store i32 1, ptr %3, align 4, !tbaa !5
  br label %26

26:                                               ; preds = %74, %25
  %27 = load i32, ptr %3, align 4, !tbaa !5
  %28 = load i32, ptr @n, align 4, !tbaa !5
  %29 = icmp sle i32 %27, %28
  br i1 %29, label %31, label %30

30:                                               ; preds = %26
  store i32 5, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  br label %77

31:                                               ; preds = %26
  %32 = load i32, ptr %3, align 4, !tbaa !5
  %33 = sext i32 %32 to i64
  %34 = getelementptr inbounds [1000001 x i32], ptr @perm, i64 0, i64 %33
  %35 = load i32, ptr %34, align 4, !tbaa !5
  %36 = icmp eq i32 %35, -1
  br i1 %36, label %37, label %38

37:                                               ; preds = %31
  br label %74

38:                                               ; preds = %31
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  store i32 0, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  %39 = load i32, ptr %3, align 4, !tbaa !5
  store i32 %39, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  %40 = load i32, ptr %6, align 4, !tbaa !5
  %41 = sext i32 %40 to i64
  %42 = getelementptr inbounds [1000001 x i32], ptr @perm, i64 0, i64 %41
  %43 = load i32, ptr %42, align 4, !tbaa !5
  store i32 %43, ptr %7, align 4, !tbaa !5
  br label %44

44:                                               ; preds = %55, %38
  %45 = load i32, ptr %6, align 4, !tbaa !5
  %46 = sext i32 %45 to i64
  %47 = getelementptr inbounds [1000001 x i32], ptr @perm, i64 0, i64 %46
  store i32 -1, ptr %47, align 4, !tbaa !5
  %48 = load i32, ptr %5, align 4, !tbaa !5
  %49 = add nsw i32 %48, 1
  store i32 %49, ptr %5, align 4, !tbaa !5
  %50 = load i32, ptr %7, align 4, !tbaa !5
  %51 = load i32, ptr %3, align 4, !tbaa !5
  %52 = icmp eq i32 %50, %51
  br i1 %52, label %53, label %54

53:                                               ; preds = %44
  store i32 8, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  br label %61

54:                                               ; preds = %44
  br label %55

55:                                               ; preds = %54
  %56 = load i32, ptr %7, align 4, !tbaa !5
  store i32 %56, ptr %6, align 4, !tbaa !5
  %57 = load i32, ptr %6, align 4, !tbaa !5
  %58 = sext i32 %57 to i64
  %59 = getelementptr inbounds [1000001 x i32], ptr @perm, i64 0, i64 %58
  %60 = load i32, ptr %59, align 4, !tbaa !5
  store i32 %60, ptr %7, align 4, !tbaa !5
  br label %44, !llvm.loop !11

61:                                               ; preds = %53
  %62 = load i32, ptr %5, align 4, !tbaa !5
  %63 = sext i32 %62 to i64
  %64 = getelementptr inbounds [1000001 x i32], ptr @cnt, i64 0, i64 %63
  %65 = load i32, ptr %64, align 4, !tbaa !5
  %66 = add nsw i32 %65, 1
  store i32 %66, ptr %64, align 4, !tbaa !5
  %67 = load i32, ptr %5, align 4, !tbaa !5
  %68 = and i32 %67, 1
  %69 = icmp ne i32 %68, 0
  br i1 %69, label %70, label %73

70:                                               ; preds = %61
  %71 = load i32, ptr @ans2, align 4, !tbaa !5
  %72 = add nsw i32 %71, 1
  store i32 %72, ptr @ans2, align 4, !tbaa !5
  br label %73

73:                                               ; preds = %70, %61
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  br label %74

74:                                               ; preds = %73, %37
  %75 = load i32, ptr %3, align 4, !tbaa !5
  %76 = add nsw i32 %75, 1
  store i32 %76, ptr %3, align 4, !tbaa !5
  br label %26, !llvm.loop !12

77:                                               ; preds = %30
  %78 = load i32, ptr @m, align 4, !tbaa !5
  %79 = ashr i32 %78, 6
  %80 = add nsw i32 %79, 1
  store i32 %80, ptr @sz, align 4, !tbaa !5
  store i64 1, ptr @f, align 16, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  store i32 1, ptr %8, align 4, !tbaa !5
  br label %81

81:                                               ; preds = %146, %77
  %82 = load i32, ptr %8, align 4, !tbaa !5
  %83 = load i32, ptr @n, align 4, !tbaa !5
  %84 = icmp sle i32 %82, %83
  br i1 %84, label %85, label %89

85:                                               ; preds = %81
  %86 = load i32, ptr @m, align 4, !tbaa !5
  %87 = call noundef zeroext i1 @_Z8bit_testPyi(ptr noundef @f, i32 noundef %86)
  %88 = xor i1 %87, true
  br label %89

89:                                               ; preds = %85, %81
  %90 = phi i1 [ false, %81 ], [ %88, %85 ]
  br i1 %90, label %92, label %91

91:                                               ; preds = %89
  store i32 11, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  br label %149

92:                                               ; preds = %89
  %93 = load i32, ptr %8, align 4, !tbaa !5
  %94 = sext i32 %93 to i64
  %95 = getelementptr inbounds [1000001 x i32], ptr @cnt, i64 0, i64 %94
  %96 = load i32, ptr %95, align 4, !tbaa !5
  %97 = icmp ne i32 %96, 0
  br i1 %97, label %99, label %98

98:                                               ; preds = %92
  br label %146

99:                                               ; preds = %92
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  store i32 0, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  store i32 1, ptr %10, align 4, !tbaa !5
  br label %100

100:                                              ; preds = %124, %99
  %101 = load i32, ptr %10, align 4, !tbaa !5
  %102 = load i32, ptr %8, align 4, !tbaa !5
  %103 = sext i32 %102 to i64
  %104 = getelementptr inbounds [1000001 x i32], ptr @cnt, i64 0, i64 %103
  %105 = load i32, ptr %104, align 4, !tbaa !5
  %106 = icmp sle i32 %101, %105
  br i1 %106, label %107, label %111

107:                                              ; preds = %100
  %108 = load i32, ptr @m, align 4, !tbaa !5
  %109 = call noundef zeroext i1 @_Z8bit_testPyi(ptr noundef @f, i32 noundef %108)
  %110 = xor i1 %109, true
  br label %111

111:                                              ; preds = %107, %100
  %112 = phi i1 [ false, %100 ], [ %110, %107 ]
  br i1 %112, label %114, label %113

113:                                              ; preds = %111
  store i32 14, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  br label %129

114:                                              ; preds = %111
  %115 = load i32, ptr %10, align 4, !tbaa !5
  %116 = load i32, ptr %8, align 4, !tbaa !5
  %117 = sext i32 %116 to i64
  %118 = getelementptr inbounds [1000001 x i32], ptr @cnt, i64 0, i64 %117
  %119 = load i32, ptr %118, align 4, !tbaa !5
  %120 = sub nsw i32 %119, %115
  store i32 %120, ptr %118, align 4, !tbaa !5
  %121 = load i32, ptr %8, align 4, !tbaa !5
  %122 = load i32, ptr %9, align 4, !tbaa !5
  %123 = shl i32 %121, %122
  call void @_Z9bit_shiftPyiS_(ptr noundef @f, i32 noundef %123, ptr noundef @g)
  call void @_Z7bit_andPyS_(ptr noundef @f, ptr noundef @g)
  br label %124

124:                                              ; preds = %114
  %125 = load i32, ptr %9, align 4, !tbaa !5
  %126 = add nsw i32 %125, 1
  store i32 %126, ptr %9, align 4, !tbaa !5
  %127 = load i32, ptr %10, align 4, !tbaa !5
  %128 = shl i32 %127, 1
  store i32 %128, ptr %10, align 4, !tbaa !5
  br label %100, !llvm.loop !15

129:                                              ; preds = %113
  %130 = load i32, ptr %8, align 4, !tbaa !5
  %131 = sext i32 %130 to i64
  %132 = getelementptr inbounds [1000001 x i32], ptr @cnt, i64 0, i64 %131
  %133 = load i32, ptr %132, align 4, !tbaa !5
  %134 = icmp ne i32 %133, 0
  br i1 %134, label %135, label %145

135:                                              ; preds = %129
  %136 = load i32, ptr @m, align 4, !tbaa !5
  %137 = call noundef zeroext i1 @_Z8bit_testPyi(ptr noundef @f, i32 noundef %136)
  br i1 %137, label %145, label %138

138:                                              ; preds = %135
  %139 = load i32, ptr %8, align 4, !tbaa !5
  %140 = load i32, ptr %8, align 4, !tbaa !5
  %141 = sext i32 %140 to i64
  %142 = getelementptr inbounds [1000001 x i32], ptr @cnt, i64 0, i64 %141
  %143 = load i32, ptr %142, align 4, !tbaa !5
  %144 = mul nsw i32 %139, %143
  call void @_Z9bit_shiftPyiS_(ptr noundef @f, i32 noundef %144, ptr noundef @g)
  call void @_Z7bit_andPyS_(ptr noundef @f, ptr noundef @g)
  br label %145

145:                                              ; preds = %138, %135, %129
  br label %146

146:                                              ; preds = %145, %98
  %147 = load i32, ptr %8, align 4, !tbaa !5
  %148 = add nsw i32 %147, 1
  store i32 %148, ptr %8, align 4, !tbaa !5
  br label %81, !llvm.loop !16

149:                                              ; preds = %91
  %150 = load i32, ptr @m, align 4, !tbaa !5
  %151 = load i32, ptr @m, align 4, !tbaa !5
  %152 = call noundef zeroext i1 @_Z8bit_testPyi(ptr noundef @f, i32 noundef %151)
  %153 = xor i1 %152, true
  %154 = zext i1 %153 to i32
  %155 = add nsw i32 %150, %154
  store i32 %155, ptr @ans1, align 4, !tbaa !5
  %156 = load i32, ptr @m, align 4, !tbaa !5
  %157 = load i32, ptr @n, align 4, !tbaa !5
  %158 = load i32, ptr @ans2, align 4, !tbaa !5
  %159 = sub nsw i32 %157, %158
  %160 = ashr i32 %159, 1
  %161 = icmp sle i32 %156, %160
  br i1 %161, label %162, label %165

162:                                              ; preds = %149
  %163 = load i32, ptr @m, align 4, !tbaa !5
  %164 = shl i32 %163, 1
  store i32 %164, ptr @ans2, align 4, !tbaa !5
  br label %182

165:                                              ; preds = %149
  %166 = load i32, ptr @m, align 4, !tbaa !5
  %167 = load i32, ptr @n, align 4, !tbaa !5
  %168 = load i32, ptr @ans2, align 4, !tbaa !5
  %169 = add nsw i32 %167, %168
  %170 = ashr i32 %169, 1
  %171 = icmp sle i32 %166, %170
  br i1 %171, label %172, label %179

172:                                              ; preds = %165
  %173 = load i32, ptr @m, align 4, !tbaa !5
  %174 = load i32, ptr @n, align 4, !tbaa !5
  %175 = load i32, ptr @ans2, align 4, !tbaa !5
  %176 = sub nsw i32 %174, %175
  %177 = ashr i32 %176, 1
  %178 = add nsw i32 %173, %177
  store i32 %178, ptr @ans2, align 4, !tbaa !5
  br label %181

179:                                              ; preds = %165
  %180 = load i32, ptr @n, align 4, !tbaa !5
  store i32 %180, ptr @ans2, align 4, !tbaa !5
  br label %181

181:                                              ; preds = %179, %172
  br label %182

182:                                              ; preds = %181, %162
  %183 = load i32, ptr @ans1, align 4, !tbaa !5
  %184 = load i32, ptr @ans2, align 4, !tbaa !5
  %185 = call i32 (ptr, ...) @printf(ptr noundef @.str.2, i32 noundef %183, i32 noundef %184)
  ret i32 0
}

declare i32 @__isoc99_scanf(ptr noundef, ...) #3

declare i32 @printf(ptr noundef, ...) #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = !{!14, !14, i64 0}
!14 = !{!"long long", !7, i64 0}
!15 = distinct !{!15, !10}
!16 = distinct !{!16, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@n = external dso_local global i32, align 4
@m = external dso_local global i32, align 4
@sz = external dso_local local_unnamed_addr global i32, align 4
@perm = external dso_local global [1000001 x i32], align 16
@cnt = external dso_local local_unnamed_addr global [1000001 x i32], align 16
@ans1 = external dso_local local_unnamed_addr global i32, align 4
@ans2 = external dso_local local_unnamed_addr global i32, align 4
@f = external dso_local global [15627 x i64], align 16
@g = external dso_local global [15627 x i64], align 16
@.str = external hidden unnamed_addr constant [5 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [3 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [7 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z8bit_testPyi(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z9bit_shiftPyiS_(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z7bit_andPyS_(ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress norecurse nounwind uwtable
define dso_local noundef i32 @main() local_unnamed_addr #1 {
  %1 = tail call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull @n, ptr noundef nonnull @m)
  %2 = load i32, ptr @n, align 4, !tbaa !5
  %.not55 = icmp slt i32 %2, 1
  br i1 %.not55, label %._crit_edge64.thread, label %.lr.ph

.preheader51:                                     ; preds = %.lr.ph
  %.not4261 = icmp slt i32 %6, 1
  br i1 %.not4261, label %._crit_edge64.thread, label %.lr.ph63.preheader

.lr.ph63.preheader:                               ; preds = %.preheader51
  %ans2.promoted = load i32, ptr @ans2, align 4, !tbaa !5
  %3 = add nuw i32 %6, 1
  %wide.trip.count = zext i32 %3 to i64
  br label %.lr.ph63

.lr.ph:                                           ; preds = %0, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 1, %0 ]
  %4 = getelementptr inbounds i32, ptr @perm, i64 %indvars.iv
  %5 = tail call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str.1, ptr noundef nonnull %4)
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %6 = load i32, ptr @n, align 4, !tbaa !5
  %7 = sext i32 %6 to i64
  %.not.not = icmp slt i64 %indvars.iv, %7
  br i1 %.not.not, label %.lr.ph, label %.preheader51, !llvm.loop !9

._crit_edge64.thread:                             ; preds = %.preheader51, %0
  %8 = load i32, ptr @m, align 4, !tbaa !5
  %9 = ashr i32 %8, 6
  %10 = add nsw i32 %9, 1
  store i32 %10, ptr @sz, align 4, !tbaa !5
  store i64 1, ptr @f, align 16, !tbaa !11
  br label %.critedge

._crit_edge64:                                    ; preds = %36
  %11 = load i32, ptr @m, align 4, !tbaa !5
  %12 = ashr i32 %11, 6
  %13 = add nsw i32 %12, 1
  store i32 %13, ptr @sz, align 4, !tbaa !5
  store i64 1, ptr @f, align 16, !tbaa !11
  br i1 %.not4261, label %.critedge, label %.lr.ph75

.lr.ph63:                                         ; preds = %.lr.ph63.preheader, %36
  %indvars.iv81 = phi i64 [ 1, %.lr.ph63.preheader ], [ %indvars.iv.next82, %36 ]
  %14 = phi i32 [ %ans2.promoted, %.lr.ph63.preheader ], [ %37, %36 ]
  %15 = getelementptr inbounds [1000001 x i32], ptr @perm, i64 0, i64 %indvars.iv81
  %16 = load i32, ptr %15, align 4, !tbaa !5
  %17 = icmp eq i32 %16, -1
  br i1 %17, label %36, label %.preheader50

.preheader50:                                     ; preds = %.lr.ph63
  store i32 -1, ptr %15, align 4, !tbaa !5
  %18 = zext i32 %16 to i64
  %19 = icmp eq i64 %indvars.iv81, %18
  br i1 %19, label %._crit_edge.thread, label %.lr.ph58

._crit_edge.thread:                               ; preds = %.preheader50
  %20 = load i32, ptr getelementptr inbounds (i8, ptr @cnt, i64 4), align 4, !tbaa !5
  %21 = add nsw i32 %20, 1
  store i32 %21, ptr getelementptr inbounds (i8, ptr @cnt, i64 4), align 4, !tbaa !5
  br label %34

._crit_edge:                                      ; preds = %.lr.ph58
  %22 = zext nneg i32 %31 to i64
  %23 = getelementptr inbounds [1000001 x i32], ptr @cnt, i64 0, i64 %22
  %24 = load i32, ptr %23, align 4, !tbaa !5
  %25 = add nsw i32 %24, 1
  store i32 %25, ptr %23, align 4, !tbaa !5
  %26 = and i32 %27, 1
  %.not49.not = icmp eq i32 %26, 0
  br i1 %.not49.not, label %34, label %36

.lr.ph58:                                         ; preds = %.preheader50, %.lr.ph58
  %27 = phi i32 [ %31, %.lr.ph58 ], [ 1, %.preheader50 ]
  %.03457 = phi i32 [ %30, %.lr.ph58 ], [ %16, %.preheader50 ]
  %28 = sext i32 %.03457 to i64
  %29 = getelementptr inbounds [1000001 x i32], ptr @perm, i64 0, i64 %28
  %30 = load i32, ptr %29, align 4, !tbaa !5
  store i32 -1, ptr %29, align 4, !tbaa !5
  %31 = add nuw nsw i32 %27, 1
  %32 = zext i32 %30 to i64
  %33 = icmp eq i64 %indvars.iv81, %32
  br i1 %33, label %._crit_edge, label %.lr.ph58, !llvm.loop !13

34:                                               ; preds = %._crit_edge.thread, %._crit_edge
  %35 = add nsw i32 %14, 1
  store i32 %35, ptr @ans2, align 4, !tbaa !5
  br label %36

36:                                               ; preds = %._crit_edge, %34, %.lr.ph63
  %37 = phi i32 [ %14, %._crit_edge ], [ %35, %34 ], [ %14, %.lr.ph63 ]
  %indvars.iv.next82 = add nuw nsw i64 %indvars.iv81, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next82, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge64, label %.lr.ph63, !llvm.loop !14

.lr.ph75:                                         ; preds = %._crit_edge64, %69
  %indvars.iv84 = phi i64 [ %indvars.iv.next85, %69 ], [ 1, %._crit_edge64 ]
  %38 = load i32, ptr @m, align 4, !tbaa !5
  %39 = tail call noundef zeroext i1 @_Z8bit_testPyi(ptr noundef nonnull @f, i32 noundef %38)
  br i1 %39, label %.critedge.loopexit, label %50

.critedge.loopexit:                               ; preds = %69, %.lr.ph75
  %.pre = load i32, ptr @m, align 4, !tbaa !5
  br label %.critedge

.critedge:                                        ; preds = %._crit_edge64.thread, %.critedge.loopexit, %._crit_edge64
  %40 = phi i32 [ %.pre, %.critedge.loopexit ], [ %11, %._crit_edge64 ], [ %8, %._crit_edge64.thread ]
  %41 = tail call noundef zeroext i1 @_Z8bit_testPyi(ptr noundef nonnull @f, i32 noundef %40)
  %42 = xor i1 %41, true
  %43 = zext i1 %42 to i32
  %44 = add nsw i32 %40, %43
  store i32 %44, ptr @ans1, align 4, !tbaa !5
  %45 = load i32, ptr @m, align 4, !tbaa !5
  %46 = load i32, ptr @n, align 4, !tbaa !5
  %47 = load i32, ptr @ans2, align 4, !tbaa !5
  %48 = sub nsw i32 %46, %47
  %49 = ashr i32 %48, 1
  %.not44 = icmp sgt i32 %45, %49
  br i1 %.not44, label %74, label %72

50:                                               ; preds = %.lr.ph75
  %51 = getelementptr inbounds [1000001 x i32], ptr @cnt, i64 0, i64 %indvars.iv84
  %52 = load i32, ptr %51, align 4, !tbaa !5
  %.not46 = icmp eq i32 %52, 0
  br i1 %.not46, label %69, label %.preheader

.preheader:                                       ; preds = %50
  %.not4765 = icmp slt i32 %52, 1
  br i1 %.not4765, label %.critedge2.thread, label %.lr.ph68.preheader

.lr.ph68.preheader:                               ; preds = %.preheader
  %53 = trunc nuw nsw i64 %indvars.iv84 to i32
  br label %.lr.ph68

.lr.ph68:                                         ; preds = %.lr.ph68.preheader, %57
  %.067 = phi i32 [ %61, %57 ], [ 1, %.lr.ph68.preheader ]
  %.03266 = phi i32 [ %60, %57 ], [ 0, %.lr.ph68.preheader ]
  %54 = load i32, ptr @m, align 4, !tbaa !5
  %55 = tail call noundef zeroext i1 @_Z8bit_testPyi(ptr noundef nonnull @f, i32 noundef %54)
  %.pr = load i32, ptr %51, align 4, !tbaa !5
  br i1 %55, label %.critedge2, label %57

.critedge2:                                       ; preds = %57, %.lr.ph68
  %56 = phi i32 [ %.pr, %.lr.ph68 ], [ %62, %57 ]
  %.not48 = icmp eq i32 %56, 0
  br i1 %.not48, label %69, label %.critedge2.thread

57:                                               ; preds = %.lr.ph68
  %58 = sub nsw i32 %.pr, %.067
  store i32 %58, ptr %51, align 4, !tbaa !5
  %59 = shl i32 %53, %.03266
  tail call void @_Z9bit_shiftPyiS_(ptr noundef nonnull @f, i32 noundef %59, ptr noundef nonnull @g)
  tail call void @_Z7bit_andPyS_(ptr noundef nonnull @f, ptr noundef nonnull @g)
  %60 = add nuw nsw i32 %.03266, 1
  %61 = shl i32 %.067, 1
  %62 = load i32, ptr %51, align 4, !tbaa !5
  %.not47 = icmp sgt i32 %61, %62
  br i1 %.not47, label %.critedge2, label %.lr.ph68, !llvm.loop !15

.critedge2.thread:                                ; preds = %.preheader, %.critedge2
  %63 = load i32, ptr @m, align 4, !tbaa !5
  %64 = tail call noundef zeroext i1 @_Z8bit_testPyi(ptr noundef nonnull @f, i32 noundef %63)
  br i1 %64, label %69, label %65

65:                                               ; preds = %.critedge2.thread
  %66 = load i32, ptr %51, align 4, !tbaa !5
  %67 = trunc nuw nsw i64 %indvars.iv84 to i32
  %68 = mul nsw i32 %66, %67
  tail call void @_Z9bit_shiftPyiS_(ptr noundef nonnull @f, i32 noundef %68, ptr noundef nonnull @g)
  tail call void @_Z7bit_andPyS_(ptr noundef nonnull @f, ptr noundef nonnull @g)
  br label %69

69:                                               ; preds = %.critedge2, %.critedge2.thread, %65, %50
  %indvars.iv.next85 = add nuw nsw i64 %indvars.iv84, 1
  %70 = load i32, ptr @n, align 4, !tbaa !5
  %71 = sext i32 %70 to i64
  %.not43.not = icmp slt i64 %indvars.iv84, %71
  br i1 %.not43.not, label %.lr.ph75, label %.critedge.loopexit, !llvm.loop !16

72:                                               ; preds = %.critedge
  %73 = shl i32 %45, 1
  br label %78

74:                                               ; preds = %.critedge
  %75 = add nsw i32 %47, %46
  %76 = ashr i32 %75, 1
  %.not45 = icmp sgt i32 %45, %76
  %77 = add nsw i32 %49, %45
  %spec.select = select i1 %.not45, i32 %46, i32 %77
  br label %78

78:                                               ; preds = %74, %72
  %.sink = phi i32 [ %73, %72 ], [ %spec.select, %74 ]
  store i32 %.sink, ptr @ans2, align 4, !tbaa !5
  %79 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.2, i32 noundef %44, i32 noundef %.sink)
  ret i32 0
}

; Function Attrs: nofree nounwind
declare noundef i32 @__isoc99_scanf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !12, i64 0}
!12 = !{!"long long", !7, i64 0}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10}
!16 = distinct !{!16, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass