; LLVM IR from tangjz/acm-icpc :: self_training/2015-01-26 (L)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.DucciSeq = type { [16 x i32] }
%"class.std::map" = type { %"class.std::_Rb_tree" }
%"class.std::_Rb_tree" = type { %"struct.std::_Rb_tree<DucciSeq, std::pair<const DucciSeq, int>, std::_Select1st<std::pair<const DucciSeq, int>>, std::less<DucciSeq>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<DucciSeq, std::pair<const DucciSeq, int>, std::_Select1st<std::pair<const DucciSeq, int>>, std::less<DucciSeq>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"struct.std::_Rb_tree_header" = type { %"struct.std::_Rb_tree_node_base", i64 }
%"struct.std::_Rb_tree_node_base" = type { i32, ptr, ptr, ptr }

@n = external dso_local global i32, align 4
@x = external dso_local global %struct.DucciSeq, align 4
@Hash = external dso_local global %"class.std::map", align 8
@.str = external hidden unnamed_addr constant [3 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [5 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [5 x i8], align 1

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #7
  %8 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef %2)
  br label %9

9:                                                ; preds = %96, %30, %0
  %10 = load i32, ptr %2, align 4, !tbaa !5
  %11 = add nsw i32 %10, -1
  store i32 %11, ptr %2, align 4, !tbaa !5
  %12 = icmp ne i32 %10, 0
  br i1 %12, label %13, label %97

13:                                               ; preds = %9
  call void @llvm.memset.p0.i64(ptr align 4 @x, i8 0, i64 64, i1 false)
  call void @_ZNSt3mapI8DucciSeqiSt4lessIS0_ESaISt4pairIKS0_iEEE5clearEv(ptr noundef nonnull align 8 dereferenceable(48) @Hash) #7
  %14 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef @n)
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #7
  store i32 0, ptr %3, align 4, !tbaa !5
  br label %15

15:                                               ; preds = %25, %13
  %16 = load i32, ptr %3, align 4, !tbaa !5
  %17 = load i32, ptr @n, align 4, !tbaa !5
  %18 = icmp slt i32 %16, %17
  br i1 %18, label %20, label %19

19:                                               ; preds = %15
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #7
  br label %28

20:                                               ; preds = %15
  %21 = load i32, ptr %3, align 4, !tbaa !5
  %22 = sext i32 %21 to i64
  %23 = getelementptr inbounds [16 x i32], ptr @x, i64 0, i64 %22
  %24 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef %23)
  br label %25

25:                                               ; preds = %20
  %26 = load i32, ptr %3, align 4, !tbaa !5
  %27 = add nsw i32 %26, 1
  store i32 %27, ptr %3, align 4, !tbaa !5
  br label %15, !llvm.loop !9

28:                                               ; preds = %19
  %29 = call noundef zeroext i1 @_ZNK8DucciSeq5emptyEv(ptr noundef nonnull align 4 dereferenceable(64) @x)
  br i1 %29, label %30, label %32

30:                                               ; preds = %28
  %31 = call i32 @puts(ptr noundef @.str.1)
  br label %9, !llvm.loop !11

32:                                               ; preds = %28
  %33 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapI8DucciSeqiSt4lessIS0_ESaISt4pairIKS0_iEEEixERS4_(ptr noundef nonnull align 8 dereferenceable(48) @Hash, ptr noundef nonnull align 4 dereferenceable(64) @x)
  store i32 1, ptr %33, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #7
  store i32 1, ptr %4, align 4, !tbaa !5
  br label %34

34:                                               ; preds = %92, %32
  %35 = load i32, ptr %4, align 4, !tbaa !5
  %36 = icmp sle i32 %35, 1000
  br i1 %36, label %38, label %37

37:                                               ; preds = %34
  store i32 7, ptr %5, align 4
  br label %95

38:                                               ; preds = %34
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #7
  %39 = load i32, ptr @x, align 4, !tbaa !5
  store i32 %39, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #7
  store i32 0, ptr %7, align 4, !tbaa !5
  br label %40

40:                                               ; preds = %61, %38
  %41 = load i32, ptr %7, align 4, !tbaa !5
  %42 = load i32, ptr @n, align 4, !tbaa !5
  %43 = sub nsw i32 %42, 1
  %44 = icmp slt i32 %41, %43
  br i1 %44, label %46, label %45

45:                                               ; preds = %40
  store i32 10, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #7
  br label %64

46:                                               ; preds = %40
  %47 = load i32, ptr %7, align 4, !tbaa !5
  %48 = sext i32 %47 to i64
  %49 = getelementptr inbounds [16 x i32], ptr @x, i64 0, i64 %48
  %50 = load i32, ptr %49, align 4, !tbaa !5
  %51 = load i32, ptr %7, align 4, !tbaa !5
  %52 = add nsw i32 %51, 1
  %53 = sext i32 %52 to i64
  %54 = getelementptr inbounds [16 x i32], ptr @x, i64 0, i64 %53
  %55 = load i32, ptr %54, align 4, !tbaa !5
  %56 = sub nsw i32 %50, %55
  %57 = call i32 @llvm.abs.i32(i32 %56, i1 true)
  %58 = load i32, ptr %7, align 4, !tbaa !5
  %59 = sext i32 %58 to i64
  %60 = getelementptr inbounds [16 x i32], ptr @x, i64 0, i64 %59
  store i32 %57, ptr %60, align 4, !tbaa !5
  br label %61

61:                                               ; preds = %46
  %62 = load i32, ptr %7, align 4, !tbaa !5
  %63 = add nsw i32 %62, 1
  store i32 %63, ptr %7, align 4, !tbaa !5
  br label %40, !llvm.loop !12

64:                                               ; preds = %45
  %65 = load i32, ptr @n, align 4, !tbaa !5
  %66 = sub nsw i32 %65, 1
  %67 = sext i32 %66 to i64
  %68 = getelementptr inbounds [16 x i32], ptr @x, i64 0, i64 %67
  %69 = load i32, ptr %68, align 4, !tbaa !5
  %70 = load i32, ptr %6, align 4, !tbaa !5
  %71 = sub nsw i32 %69, %70
  %72 = call i32 @llvm.abs.i32(i32 %71, i1 true)
  %73 = load i32, ptr @n, align 4, !tbaa !5
  %74 = sub nsw i32 %73, 1
  %75 = sext i32 %74 to i64
  %76 = getelementptr inbounds [16 x i32], ptr @x, i64 0, i64 %75
  store i32 %72, ptr %76, align 4, !tbaa !5
  %77 = call noundef zeroext i1 @_ZNK8DucciSeq5emptyEv(ptr noundef nonnull align 4 dereferenceable(64) @x)
  br i1 %77, label %78, label %80

78:                                               ; preds = %64
  %79 = call i32 @puts(ptr noundef @.str.1)
  store i32 7, ptr %5, align 4
  br label %89

80:                                               ; preds = %64
  %81 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapI8DucciSeqiSt4lessIS0_ESaISt4pairIKS0_iEEEixERS4_(ptr noundef nonnull align 8 dereferenceable(48) @Hash, ptr noundef nonnull align 4 dereferenceable(64) @x)
  %82 = load i32, ptr %81, align 4, !tbaa !5
  %83 = icmp ne i32 %82, 0
  br i1 %83, label %84, label %86

84:                                               ; preds = %80
  %85 = call i32 @puts(ptr noundef @.str.2)
  store i32 7, ptr %5, align 4
  br label %89

86:                                               ; preds = %80
  br label %87

87:                                               ; preds = %86
  %88 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapI8DucciSeqiSt4lessIS0_ESaISt4pairIKS0_iEEEixERS4_(ptr noundef nonnull align 8 dereferenceable(48) @Hash, ptr noundef nonnull align 4 dereferenceable(64) @x)
  store i32 1, ptr %88, align 4, !tbaa !5
  store i32 0, ptr %5, align 4
  br label %89

89:                                               ; preds = %87, %84, %78
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #7
  %90 = load i32, ptr %5, align 4
  switch i32 %90, label %95 [
    i32 0, label %91
  ]

91:                                               ; preds = %89
  br label %92

92:                                               ; preds = %91
  %93 = load i32, ptr %4, align 4, !tbaa !5
  %94 = add nsw i32 %93, 1
  store i32 %94, ptr %4, align 4, !tbaa !5
  br label %34, !llvm.loop !13

95:                                               ; preds = %89, %37
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #7
  br label %96

96:                                               ; preds = %95
  br label %9, !llvm.loop !11

97:                                               ; preds = %9
  store i32 0, ptr %1, align 4
  store i32 1, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #7
  %98 = load i32, ptr %1, align 4
  ret i32 %98
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @__isoc99_scanf(ptr noundef, ...) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt3mapI8DucciSeqiSt4lessIS0_ESaISt4pairIKS0_iEEE5clearEv(ptr noundef nonnull align 8 dereferenceable(48)) #4 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK8DucciSeq5emptyEv(ptr noundef nonnull align 4 dereferenceable(64)) #4 align 2

declare i32 @puts(ptr noundef) #2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapI8DucciSeqiSt4lessIS0_ESaISt4pairIKS0_iEEEixERS4_(ptr noundef nonnull align 8 dereferenceable(48), ptr noundef nonnull align 4 dereferenceable(64)) #5 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.abs.i32(i32, i1 immarg) #6

attributes #0 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #7 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.DucciSeq = type { [16 x i32] }
%"class.std::map" = type { %"class.std::_Rb_tree" }
%"class.std::_Rb_tree" = type { %"struct.std::_Rb_tree<DucciSeq, std::pair<const DucciSeq, int>, std::_Select1st<std::pair<const DucciSeq, int>>, std::less<DucciSeq>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<DucciSeq, std::pair<const DucciSeq, int>, std::_Select1st<std::pair<const DucciSeq, int>>, std::less<DucciSeq>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"struct.std::_Rb_tree_header" = type { %"struct.std::_Rb_tree_node_base", i64 }
%"struct.std::_Rb_tree_node_base" = type { i32, ptr, ptr, ptr }

@n = external dso_local global i32, align 4
@x = external dso_local global %struct.DucciSeq, align 4
@Hash = external dso_local global %"class.std::map", align 8
@.str = external hidden unnamed_addr constant [3 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [5 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [5 x i8], align 1

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() local_unnamed_addr #0 {
  %1 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #8
  %2 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull %1)
  %3 = load i32, ptr %1, align 4, !tbaa !5
  %4 = add nsw i32 %3, -1
  store i32 %4, ptr %1, align 4, !tbaa !5
  %.not24 = icmp eq i32 %3, 0
  br i1 %.not24, label %._crit_edge27, label %.lr.ph26

.lr.ph26:                                         ; preds = %0, %.backedge
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(64) @x, i8 0, i64 64, i1 false)
  call void @_ZNSt3mapI8DucciSeqiSt4lessIS0_ESaISt4pairIKS0_iEEE5clearEv(ptr noundef nonnull align 8 dereferenceable(48) @Hash) #8
  %5 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull @n)
  %6 = load i32, ptr @n, align 4, !tbaa !5
  %7 = icmp sgt i32 %6, 0
  br i1 %7, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %.lr.ph26
  %8 = call noundef zeroext i1 @_ZNK8DucciSeq5emptyEv(ptr noundef nonnull align 4 dereferenceable(64) @x)
  br i1 %8, label %.backedge.sink.split, label %17

.lr.ph:                                           ; preds = %.lr.ph26, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %.lr.ph26 ]
  %9 = getelementptr inbounds [16 x i32], ptr @x, i64 0, i64 %indvars.iv
  %10 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull %9)
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %11 = load i32, ptr @n, align 4, !tbaa !5
  %12 = sext i32 %11 to i64
  %13 = icmp slt i64 %indvars.iv.next, %12
  br i1 %13, label %.lr.ph, label %._crit_edge, !llvm.loop !9

.backedge.sink.split:                             ; preds = %48, %._crit_edge22, %._crit_edge
  %.str.2.sink = phi ptr [ @.str.1, %._crit_edge ], [ @.str.1, %._crit_edge22 ], [ @.str.2, %48 ]
  %14 = call i32 @puts(ptr noundef nonnull dereferenceable(1) %.str.2.sink)
  br label %.backedge

.backedge:                                        ; preds = %51, %.backedge.sink.split
  %15 = load i32, ptr %1, align 4, !tbaa !5
  %16 = add nsw i32 %15, -1
  store i32 %16, ptr %1, align 4, !tbaa !5
  %.not = icmp eq i32 %15, 0
  br i1 %.not, label %._crit_edge27, label %.lr.ph26, !llvm.loop !11

17:                                               ; preds = %._crit_edge
  %18 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapI8DucciSeqiSt4lessIS0_ESaISt4pairIKS0_iEEEixERS4_(ptr noundef nonnull align 8 dereferenceable(48) @Hash, ptr noundef nonnull align 4 dereferenceable(64) @x)
  store i32 1, ptr %18, align 4, !tbaa !5
  br label %19

19:                                               ; preds = %17, %51
  %.01423 = phi i32 [ 1, %17 ], [ %53, %51 ]
  %20 = load i32, ptr @x, align 4, !tbaa !5
  %21 = load i32, ptr @n, align 4, !tbaa !5
  %22 = add i32 %21, -1
  %23 = icmp sgt i32 %21, 1
  br i1 %23, label %.lr.ph21.preheader, label %._crit_edge22

.lr.ph21.preheader:                               ; preds = %19
  %wide.trip.count = zext nneg i32 %22 to i64
  %min.iters.check = icmp ult i32 %21, 9
  br i1 %min.iters.check, label %.lr.ph21.preheader34, label %vector.ph

.lr.ph21.preheader34:                             ; preds = %middle.block, %.lr.ph21.preheader
  %.ph = phi i32 [ %20, %.lr.ph21.preheader ], [ %vector.recur.extract, %middle.block ]
  %indvars.iv29.ph = phi i64 [ 0, %.lr.ph21.preheader ], [ %n.vec, %middle.block ]
  br label %.lr.ph21

vector.ph:                                        ; preds = %.lr.ph21.preheader
  %n.vec = and i64 %wide.trip.count, 2147483640
  %vector.recur.init = insertelement <4 x i32> poison, i32 %20, i64 3
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %vector.recur = phi <4 x i32> [ %vector.recur.init, %vector.ph ], [ %wide.load33, %vector.body ]
  %24 = getelementptr inbounds [16 x i32], ptr @x, i64 0, i64 %index
  %25 = or disjoint i64 %index, 1
  %26 = getelementptr inbounds [16 x i32], ptr @x, i64 0, i64 %25
  %27 = getelementptr inbounds i8, ptr %26, i64 16
  %wide.load = load <4 x i32>, ptr %26, align 4, !tbaa !5
  %wide.load33 = load <4 x i32>, ptr %27, align 4, !tbaa !5
  %28 = shufflevector <4 x i32> %vector.recur, <4 x i32> %wide.load, <4 x i32> <i32 3, i32 4, i32 5, i32 6>
  %29 = shufflevector <4 x i32> %wide.load, <4 x i32> %wide.load33, <4 x i32> <i32 3, i32 4, i32 5, i32 6>
  %30 = sub nsw <4 x i32> %28, %wide.load
  %31 = sub nsw <4 x i32> %29, %wide.load33
  %32 = call <4 x i32> @llvm.abs.v4i32(<4 x i32> %30, i1 true)
  %33 = call <4 x i32> @llvm.abs.v4i32(<4 x i32> %31, i1 true)
  %34 = getelementptr inbounds i8, ptr %24, i64 16
  store <4 x i32> %32, ptr %24, align 4, !tbaa !5
  store <4 x i32> %33, ptr %34, align 4, !tbaa !5
  %index.next = add nuw i64 %index, 8
  %35 = icmp eq i64 %index.next, %n.vec
  br i1 %35, label %middle.block, label %vector.body, !llvm.loop !12

middle.block:                                     ; preds = %vector.body
  %vector.recur.extract = extractelement <4 x i32> %wide.load33, i64 3
  %cmp.n = icmp eq i64 %n.vec, %wide.trip.count
  br i1 %cmp.n, label %._crit_edge22, label %.lr.ph21.preheader34

._crit_edge22:                                    ; preds = %.lr.ph21, %middle.block, %19
  %36 = sext i32 %22 to i64
  %37 = getelementptr inbounds [16 x i32], ptr @x, i64 0, i64 %36
  %38 = load i32, ptr %37, align 4, !tbaa !5
  %39 = sub nsw i32 %38, %20
  %40 = call i32 @llvm.abs.i32(i32 %39, i1 true)
  store i32 %40, ptr %37, align 4, !tbaa !5
  %41 = call noundef zeroext i1 @_ZNK8DucciSeq5emptyEv(ptr noundef nonnull align 4 dereferenceable(64) @x)
  br i1 %41, label %.backedge.sink.split, label %48

.lr.ph21:                                         ; preds = %.lr.ph21.preheader34, %.lr.ph21
  %42 = phi i32 [ %45, %.lr.ph21 ], [ %.ph, %.lr.ph21.preheader34 ]
  %indvars.iv29 = phi i64 [ %indvars.iv.next30, %.lr.ph21 ], [ %indvars.iv29.ph, %.lr.ph21.preheader34 ]
  %43 = getelementptr inbounds [16 x i32], ptr @x, i64 0, i64 %indvars.iv29
  %indvars.iv.next30 = add nuw nsw i64 %indvars.iv29, 1
  %44 = getelementptr inbounds [16 x i32], ptr @x, i64 0, i64 %indvars.iv.next30
  %45 = load i32, ptr %44, align 4, !tbaa !5
  %46 = sub nsw i32 %42, %45
  %47 = call i32 @llvm.abs.i32(i32 %46, i1 true)
  store i32 %47, ptr %43, align 4, !tbaa !5
  %exitcond.not = icmp eq i64 %indvars.iv.next30, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge22, label %.lr.ph21, !llvm.loop !15

48:                                               ; preds = %._crit_edge22
  %49 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapI8DucciSeqiSt4lessIS0_ESaISt4pairIKS0_iEEEixERS4_(ptr noundef nonnull align 8 dereferenceable(48) @Hash, ptr noundef nonnull align 4 dereferenceable(64) @x)
  %50 = load i32, ptr %49, align 4, !tbaa !5
  %.not17 = icmp eq i32 %50, 0
  br i1 %.not17, label %51, label %.backedge.sink.split

51:                                               ; preds = %48
  %52 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapI8DucciSeqiSt4lessIS0_ESaISt4pairIKS0_iEEEixERS4_(ptr noundef nonnull align 8 dereferenceable(48) @Hash, ptr noundef nonnull align 4 dereferenceable(64) @x)
  store i32 1, ptr %52, align 4, !tbaa !5
  %53 = add nuw nsw i32 %.01423, 1
  %exitcond32.not = icmp eq i32 %53, 1001
  br i1 %exitcond32.not, label %.backedge, label %19, !llvm.loop !16

._crit_edge27:                                    ; preds = %.backedge, %0
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #8
  ret i32 0
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nofree nounwind
declare noundef i32 @__isoc99_scanf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt3mapI8DucciSeqiSt4lessIS0_ESaISt4pairIKS0_iEEE5clearEv(ptr noundef nonnull align 8 dereferenceable(48)) local_unnamed_addr #4 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK8DucciSeq5emptyEv(ptr noundef nonnull align 4 dereferenceable(64)) local_unnamed_addr #4 align 2

; Function Attrs: nofree nounwind
declare noundef i32 @puts(ptr nocapture noundef readonly) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapI8DucciSeqiSt4lessIS0_ESaISt4pairIKS0_iEEEixERS4_(ptr noundef nonnull align 8 dereferenceable(48), ptr noundef nonnull align 4 dereferenceable(64)) local_unnamed_addr #5 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.abs.i32(i32, i1 immarg) #6

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare <4 x i32> @llvm.abs.v4i32(<4 x i32>, i1 immarg) #7

attributes #0 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #7 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #8 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10, !13, !14}
!13 = !{!"llvm.loop.isvectorized", i32 1}
!14 = !{!"llvm.loop.unroll.runtime.disable"}
!15 = distinct !{!15, !10, !14, !13}
!16 = distinct !{!16, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,SROAPass,SimplifyCFGPass