; LLVM IR from tangjz/acm-icpc :: lydsy (2911)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@n = external dso_local global i32, align 4
@m = external dso_local global i32, align 4
@pre = external dso_local global [501 x i32], align 16
@suf = external dso_local global [501 x i32], align 16
@f = external dso_local global [501 x [501 x i32]], align 16
@buf = external dso_local global [501 x i8], align 16
@.str = external hidden unnamed_addr constant [3 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [3 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [4 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z7addEdgeiic(i32 noundef, i32 noundef, i8 noundef signext) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z1Fii(i32 noundef, i32 noundef) #2

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #3 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  %12 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef @m)
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #7
  store i32 0, ptr %2, align 4, !tbaa !5
  br label %13

13:                                               ; preds = %25, %0
  %14 = load i32, ptr %2, align 4, !tbaa !5
  %15 = load i32, ptr @m, align 4, !tbaa !5
  %16 = icmp sle i32 %14, %15
  br i1 %16, label %18, label %17

17:                                               ; preds = %13
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #7
  br label %30

18:                                               ; preds = %13
  %19 = load i32, ptr @n, align 4, !tbaa !5
  %20 = sext i32 %19 to i64
  %21 = getelementptr inbounds [501 x i32], ptr @suf, i64 0, i64 %20
  store i32 -1, ptr %21, align 4, !tbaa !5
  %22 = load i32, ptr @n, align 4, !tbaa !5
  %23 = sext i32 %22 to i64
  %24 = getelementptr inbounds [501 x i32], ptr @pre, i64 0, i64 %23
  store i32 -1, ptr %24, align 4, !tbaa !5
  br label %25

25:                                               ; preds = %18
  %26 = load i32, ptr %2, align 4, !tbaa !5
  %27 = add nsw i32 %26, 1
  store i32 %27, ptr %2, align 4, !tbaa !5
  %28 = load i32, ptr @n, align 4, !tbaa !5
  %29 = add nsw i32 %28, 1
  store i32 %29, ptr @n, align 4, !tbaa !5
  br label %13, !llvm.loop !9

30:                                               ; preds = %17
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #7
  store i32 0, ptr %3, align 4, !tbaa !5
  br label %31

31:                                               ; preds = %74, %30
  %32 = load i32, ptr %3, align 4, !tbaa !5
  %33 = load i32, ptr @m, align 4, !tbaa !5
  %34 = icmp slt i32 %32, %33
  br i1 %34, label %36, label %35

35:                                               ; preds = %31
  store i32 5, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #7
  br label %77

36:                                               ; preds = %31
  %37 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str.1, ptr noundef @buf)
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #7
  %38 = call i64 @strlen(ptr noundef @buf) #8
  %39 = trunc i64 %38 to i32
  store i32 %39, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #7
  %40 = load i32, ptr %3, align 4, !tbaa !5
  store i32 %40, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #7
  store i32 0, ptr %7, align 4, !tbaa !5
  br label %41

41:                                               ; preds = %60, %36
  %42 = load i32, ptr %7, align 4, !tbaa !5
  %43 = load i32, ptr %5, align 4, !tbaa !5
  %44 = sub nsw i32 %43, 1
  %45 = icmp slt i32 %42, %44
  br i1 %45, label %47, label %46

46:                                               ; preds = %41
  store i32 8, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #7
  br label %65

47:                                               ; preds = %41
  %48 = load i32, ptr @n, align 4, !tbaa !5
  %49 = sext i32 %48 to i64
  %50 = getelementptr inbounds [501 x i32], ptr @suf, i64 0, i64 %49
  store i32 -1, ptr %50, align 4, !tbaa !5
  %51 = load i32, ptr @n, align 4, !tbaa !5
  %52 = sext i32 %51 to i64
  %53 = getelementptr inbounds [501 x i32], ptr @pre, i64 0, i64 %52
  store i32 -1, ptr %53, align 4, !tbaa !5
  %54 = load i32, ptr %6, align 4, !tbaa !5
  %55 = load i32, ptr @n, align 4, !tbaa !5
  %56 = load i32, ptr %7, align 4, !tbaa !5
  %57 = sext i32 %56 to i64
  %58 = getelementptr inbounds [501 x i8], ptr @buf, i64 0, i64 %57
  %59 = load i8, ptr %58, align 1, !tbaa !11
  call void @_Z7addEdgeiic(i32 noundef %54, i32 noundef %55, i8 noundef signext %59)
  br label %60

60:                                               ; preds = %47
  %61 = load i32, ptr %7, align 4, !tbaa !5
  %62 = add nsw i32 %61, 1
  store i32 %62, ptr %7, align 4, !tbaa !5
  %63 = load i32, ptr @n, align 4, !tbaa !5
  %64 = add nsw i32 %63, 1
  store i32 %64, ptr @n, align 4, !tbaa !5
  store i32 %63, ptr %6, align 4, !tbaa !5
  br label %41, !llvm.loop !12

65:                                               ; preds = %46
  %66 = load i32, ptr %6, align 4, !tbaa !5
  %67 = load i32, ptr %3, align 4, !tbaa !5
  %68 = add nsw i32 %67, 1
  %69 = load i32, ptr %5, align 4, !tbaa !5
  %70 = sub nsw i32 %69, 1
  %71 = sext i32 %70 to i64
  %72 = getelementptr inbounds [501 x i8], ptr @buf, i64 0, i64 %71
  %73 = load i8, ptr %72, align 1, !tbaa !11
  call void @_Z7addEdgeiic(i32 noundef %66, i32 noundef %68, i8 noundef signext %73)
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #7
  br label %74

74:                                               ; preds = %65
  %75 = load i32, ptr %3, align 4, !tbaa !5
  %76 = add nsw i32 %75, 1
  store i32 %76, ptr %3, align 4, !tbaa !5
  br label %31, !llvm.loop !13

77:                                               ; preds = %35
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #7
  store i32 0, ptr %8, align 4, !tbaa !5
  br label %78

78:                                               ; preds = %121, %77
  %79 = load i32, ptr %8, align 4, !tbaa !5
  %80 = load i32, ptr @m, align 4, !tbaa !5
  %81 = icmp slt i32 %79, %80
  br i1 %81, label %83, label %82

82:                                               ; preds = %78
  store i32 11, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #7
  br label %124

83:                                               ; preds = %78
  %84 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str.1, ptr noundef @buf)
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #7
  %85 = call i64 @strlen(ptr noundef @buf) #8
  %86 = trunc i64 %85 to i32
  store i32 %86, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #7
  %87 = load i32, ptr %8, align 4, !tbaa !5
  store i32 %87, ptr %10, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #7
  store i32 0, ptr %11, align 4, !tbaa !5
  br label %88

88:                                               ; preds = %107, %83
  %89 = load i32, ptr %11, align 4, !tbaa !5
  %90 = load i32, ptr %9, align 4, !tbaa !5
  %91 = sub nsw i32 %90, 1
  %92 = icmp slt i32 %89, %91
  br i1 %92, label %94, label %93

93:                                               ; preds = %88
  store i32 14, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #7
  br label %112

94:                                               ; preds = %88
  %95 = load i32, ptr @n, align 4, !tbaa !5
  %96 = sext i32 %95 to i64
  %97 = getelementptr inbounds [501 x i32], ptr @suf, i64 0, i64 %96
  store i32 -1, ptr %97, align 4, !tbaa !5
  %98 = load i32, ptr @n, align 4, !tbaa !5
  %99 = sext i32 %98 to i64
  %100 = getelementptr inbounds [501 x i32], ptr @pre, i64 0, i64 %99
  store i32 -1, ptr %100, align 4, !tbaa !5
  %101 = load i32, ptr %10, align 4, !tbaa !5
  %102 = load i32, ptr @n, align 4, !tbaa !5
  %103 = load i32, ptr %11, align 4, !tbaa !5
  %104 = sext i32 %103 to i64
  %105 = getelementptr inbounds [501 x i8], ptr @buf, i64 0, i64 %104
  %106 = load i8, ptr %105, align 1, !tbaa !11
  call void @_Z7addEdgeiic(i32 noundef %101, i32 noundef %102, i8 noundef signext %106)
  br label %107

107:                                              ; preds = %94
  %108 = load i32, ptr %11, align 4, !tbaa !5
  %109 = add nsw i32 %108, 1
  store i32 %109, ptr %11, align 4, !tbaa !5
  %110 = load i32, ptr @n, align 4, !tbaa !5
  %111 = add nsw i32 %110, 1
  store i32 %111, ptr @n, align 4, !tbaa !5
  store i32 %110, ptr %10, align 4, !tbaa !5
  br label %88, !llvm.loop !14

112:                                              ; preds = %93
  %113 = load i32, ptr %10, align 4, !tbaa !5
  %114 = load i32, ptr %8, align 4, !tbaa !5
  %115 = add nsw i32 %114, 1
  %116 = load i32, ptr %9, align 4, !tbaa !5
  %117 = sub nsw i32 %116, 1
  %118 = sext i32 %117 to i64
  %119 = getelementptr inbounds [501 x i8], ptr @buf, i64 0, i64 %118
  %120 = load i8, ptr %119, align 1, !tbaa !11
  call void @_Z7addEdgeiic(i32 noundef %113, i32 noundef %115, i8 noundef signext %120)
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #7
  br label %121

121:                                              ; preds = %112
  %122 = load i32, ptr %8, align 4, !tbaa !5
  %123 = add nsw i32 %122, 1
  store i32 %123, ptr %8, align 4, !tbaa !5
  br label %78, !llvm.loop !15

124:                                              ; preds = %82
  call void @llvm.memset.p0.i64(ptr align 16 @f, i8 -1, i64 1004004, i1 false)
  %125 = load i32, ptr @m, align 4, !tbaa !5
  %126 = call noundef i32 @_Z1Fii(i32 noundef 0, i32 noundef %125)
  %127 = call i32 (ptr, ...) @printf(ptr noundef @.str.2, i32 noundef %126)
  ret i32 0
}

declare i32 @__isoc99_scanf(ptr noundef, ...) #4

; Function Attrs: nounwind willreturn memory(read)
declare i64 @strlen(ptr noundef) #5

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #6

declare i32 @printf(ptr noundef, ...) #4

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind willreturn memory(read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #7 = { nounwind }
attributes #8 = { nounwind willreturn memory(read) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@n = external dso_local local_unnamed_addr global i32, align 4
@m = external dso_local global i32, align 4
@pre = external dso_local local_unnamed_addr global [501 x i32], align 16
@suf = external dso_local local_unnamed_addr global [501 x i32], align 16
@f = external dso_local local_unnamed_addr global [501 x [501 x i32]], align 16
@buf = external dso_local global [501 x i8], align 16
@.str = external hidden unnamed_addr constant [3 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [3 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [4 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z7addEdgeiic(i32 noundef, i32 noundef, i8 noundef signext) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z1Fii(i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() local_unnamed_addr #2 {
  %1 = tail call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull @m)
  %2 = load i32, ptr @m, align 4, !tbaa !5
  %.not35 = icmp slt i32 %2, 0
  br i1 %.not35, label %._crit_edge53, label %.preheader32

.preheader32:                                     ; preds = %0
  %n.promoted = load i32, ptr @n, align 4, !tbaa !5
  %3 = sext i32 %n.promoted to i64
  %4 = shl nsw i64 %3, 2
  %scevgep = getelementptr i8, ptr @suf, i64 %4
  %5 = add nuw i32 %2, 1
  %6 = zext i32 %5 to i64
  %7 = shl nuw nsw i64 %6, 2
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(1) %scevgep, i8 -1, i64 %7, i1 false), !tbaa !5
  %scevgep58 = getelementptr i8, ptr @pre, i64 %4
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(1) %scevgep58, i8 -1, i64 %7, i1 false), !tbaa !5
  %8 = add i32 %n.promoted, %2
  %9 = add i32 %8, 1
  store i32 %9, ptr @n, align 4, !tbaa !5
  %.not = icmp eq i32 %2, 0
  br i1 %.not, label %._crit_edge53, label %.lr.ph43

.preheader:                                       ; preds = %._crit_edge
  %10 = icmp sgt i32 %20, 0
  br i1 %10, label %.lr.ph52, label %._crit_edge53

.lr.ph43:                                         ; preds = %.preheader32, %._crit_edge
  %.02942 = phi i32 [ %16, %._crit_edge ], [ 0, %.preheader32 ]
  %11 = tail call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str.1, ptr noundef nonnull @buf)
  %12 = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) @buf) #6
  %13 = trunc i64 %12 to i32
  %14 = add i32 %13, -1
  %15 = icmp sgt i32 %13, 1
  br i1 %15, label %.lr.ph40.preheader, label %._crit_edge

.lr.ph40.preheader:                               ; preds = %.lr.ph43
  %wide.trip.count = zext nneg i32 %14 to i64
  %.pre = load i32, ptr @n, align 4, !tbaa !5
  br label %.lr.ph40

._crit_edge:                                      ; preds = %.lr.ph40, %.lr.ph43
  %.028.lcssa = phi i32 [ %.02942, %.lr.ph43 ], [ %28, %.lr.ph40 ]
  %16 = add nuw nsw i32 %.02942, 1
  %17 = sext i32 %14 to i64
  %18 = getelementptr inbounds [501 x i8], ptr @buf, i64 0, i64 %17
  %19 = load i8, ptr %18, align 1, !tbaa !9
  tail call void @_Z7addEdgeiic(i32 noundef %.028.lcssa, i32 noundef %16, i8 noundef signext %19)
  %20 = load i32, ptr @m, align 4, !tbaa !5
  %21 = icmp slt i32 %16, %20
  br i1 %21, label %.lr.ph43, label %.preheader, !llvm.loop !10

.lr.ph40:                                         ; preds = %.lr.ph40.preheader, %.lr.ph40
  %22 = phi i32 [ %.pre, %.lr.ph40.preheader ], [ %29, %.lr.ph40 ]
  %indvars.iv = phi i64 [ 0, %.lr.ph40.preheader ], [ %indvars.iv.next, %.lr.ph40 ]
  %.02838 = phi i32 [ %.02942, %.lr.ph40.preheader ], [ %28, %.lr.ph40 ]
  %23 = sext i32 %22 to i64
  %24 = getelementptr inbounds [501 x i32], ptr @suf, i64 0, i64 %23
  store i32 -1, ptr %24, align 4, !tbaa !5
  %25 = getelementptr inbounds [501 x i32], ptr @pre, i64 0, i64 %23
  store i32 -1, ptr %25, align 4, !tbaa !5
  %26 = getelementptr inbounds [501 x i8], ptr @buf, i64 0, i64 %indvars.iv
  %27 = load i8, ptr %26, align 1, !tbaa !9
  tail call void @_Z7addEdgeiic(i32 noundef %.02838, i32 noundef %22, i8 noundef signext %27)
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %28 = load i32, ptr @n, align 4, !tbaa !5
  %29 = add nsw i32 %28, 1
  store i32 %29, ptr @n, align 4, !tbaa !5
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph40, !llvm.loop !12

._crit_edge53:                                    ; preds = %._crit_edge48, %0, %.preheader32, %.preheader
  %.lcssa33 = phi i32 [ %20, %.preheader ], [ 0, %.preheader32 ], [ %2, %0 ], [ %41, %._crit_edge48 ]
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(1004004) @f, i8 -1, i64 1004004, i1 false)
  %30 = tail call noundef i32 @_Z1Fii(i32 noundef 0, i32 noundef %.lcssa33)
  %31 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.2, i32 noundef %30)
  ret i32 0

.lr.ph52:                                         ; preds = %.preheader, %._crit_edge48
  %.02651 = phi i32 [ %37, %._crit_edge48 ], [ 0, %.preheader ]
  %32 = tail call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str.1, ptr noundef nonnull @buf)
  %33 = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) @buf) #6
  %34 = trunc i64 %33 to i32
  %35 = add i32 %34, -1
  %36 = icmp sgt i32 %34, 1
  br i1 %36, label %.lr.ph47.preheader, label %._crit_edge48

.lr.ph47.preheader:                               ; preds = %.lr.ph52
  %wide.trip.count64 = zext nneg i32 %35 to i64
  %.pre66 = load i32, ptr @n, align 4, !tbaa !5
  br label %.lr.ph47

._crit_edge48:                                    ; preds = %.lr.ph47, %.lr.ph52
  %.024.lcssa = phi i32 [ %.02651, %.lr.ph52 ], [ %49, %.lr.ph47 ]
  %37 = add nuw nsw i32 %.02651, 1
  %38 = sext i32 %35 to i64
  %39 = getelementptr inbounds [501 x i8], ptr @buf, i64 0, i64 %38
  %40 = load i8, ptr %39, align 1, !tbaa !9
  tail call void @_Z7addEdgeiic(i32 noundef %.024.lcssa, i32 noundef %37, i8 noundef signext %40)
  %41 = load i32, ptr @m, align 4, !tbaa !5
  %42 = icmp slt i32 %37, %41
  br i1 %42, label %.lr.ph52, label %._crit_edge53, !llvm.loop !13

.lr.ph47:                                         ; preds = %.lr.ph47.preheader, %.lr.ph47
  %43 = phi i32 [ %.pre66, %.lr.ph47.preheader ], [ %50, %.lr.ph47 ]
  %indvars.iv61 = phi i64 [ 0, %.lr.ph47.preheader ], [ %indvars.iv.next62, %.lr.ph47 ]
  %.02444 = phi i32 [ %.02651, %.lr.ph47.preheader ], [ %49, %.lr.ph47 ]
  %44 = sext i32 %43 to i64
  %45 = getelementptr inbounds [501 x i32], ptr @suf, i64 0, i64 %44
  store i32 -1, ptr %45, align 4, !tbaa !5
  %46 = getelementptr inbounds [501 x i32], ptr @pre, i64 0, i64 %44
  store i32 -1, ptr %46, align 4, !tbaa !5
  %47 = getelementptr inbounds [501 x i8], ptr @buf, i64 0, i64 %indvars.iv61
  %48 = load i8, ptr %47, align 1, !tbaa !9
  tail call void @_Z7addEdgeiic(i32 noundef %.02444, i32 noundef %43, i8 noundef signext %48)
  %indvars.iv.next62 = add nuw nsw i64 %indvars.iv61, 1
  %49 = load i32, ptr @n, align 4, !tbaa !5
  %50 = add nsw i32 %49, 1
  store i32 %50, ptr @n, align 4, !tbaa !5
  %exitcond65.not = icmp eq i64 %indvars.iv.next62, %wide.trip.count64
  br i1 %exitcond65.not, label %._crit_edge48, label %.lr.ph47, !llvm.loop !14
}

; Function Attrs: nofree nounwind
declare noundef i32 @__isoc99_scanf(ptr nocapture noundef readonly, ...) local_unnamed_addr #3

; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare i64 @strlen(ptr nocapture noundef) local_unnamed_addr #4

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #5

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nofree nounwind willreturn memory(argmem: read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #6 = { nounwind willreturn memory(read) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11}
!13 = distinct !{!13, !11}
!14 = distinct !{!14, !11}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopIdiomRecognizePass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass