; LLVM IR from tangjz/acm-icpc :: codeforces/complete (560B)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@a = external dso_local global [3 x i32], align 4
@b = external dso_local global [3 x i32], align 4
@.str = external hidden unnamed_addr constant [5 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [4 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [3 x i8], align 1

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z5checkv() #0

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #1 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i8, align 1
  store i32 0, ptr %1, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #5
  store i32 0, ptr %2, align 4, !tbaa !5
  br label %4

4:                                                ; preds = %16, %0
  %5 = load i32, ptr %2, align 4, !tbaa !5
  %6 = icmp slt i32 %5, 3
  br i1 %6, label %8, label %7

7:                                                ; preds = %4
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #5
  br label %19

8:                                                ; preds = %4
  %9 = load i32, ptr %2, align 4, !tbaa !5
  %10 = sext i32 %9 to i64
  %11 = getelementptr inbounds i32, ptr @a, i64 %10
  %12 = load i32, ptr %2, align 4, !tbaa !5
  %13 = sext i32 %12 to i64
  %14 = getelementptr inbounds i32, ptr @b, i64 %13
  %15 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef %11, ptr noundef %14)
  br label %16

16:                                               ; preds = %8
  %17 = load i32, ptr %2, align 4, !tbaa !5
  %18 = add nsw i32 %17, 1
  store i32 %18, ptr %2, align 4, !tbaa !5
  br label %4, !llvm.loop !9

19:                                               ; preds = %7
  call void @llvm.lifetime.start.p0(i64 1, ptr %3) #5
  %20 = call noundef zeroext i1 @_Z5checkv()
  %21 = zext i1 %20 to i8
  store i8 %21, ptr %3, align 1, !tbaa !11
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) getelementptr inbounds ([3 x i32], ptr @a, i64 0, i64 1), ptr noundef nonnull align 4 dereferenceable(4) getelementptr inbounds ([3 x i32], ptr @b, i64 0, i64 1)) #5
  %22 = call noundef zeroext i1 @_Z5checkv()
  %23 = zext i1 %22 to i32
  %24 = load i8, ptr %3, align 1, !tbaa !11, !range !13, !noundef !14
  %25 = trunc i8 %24 to i1
  %26 = zext i1 %25 to i32
  %27 = or i32 %26, %23
  %28 = icmp ne i32 %27, 0
  %29 = zext i1 %28 to i8
  store i8 %29, ptr %3, align 1, !tbaa !11
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) getelementptr inbounds ([3 x i32], ptr @a, i64 0, i64 2), ptr noundef nonnull align 4 dereferenceable(4) getelementptr inbounds ([3 x i32], ptr @b, i64 0, i64 2)) #5
  %30 = call noundef zeroext i1 @_Z5checkv()
  %31 = zext i1 %30 to i32
  %32 = load i8, ptr %3, align 1, !tbaa !11, !range !13, !noundef !14
  %33 = trunc i8 %32 to i1
  %34 = zext i1 %33 to i32
  %35 = or i32 %34, %31
  %36 = icmp ne i32 %35, 0
  %37 = zext i1 %36 to i8
  store i8 %37, ptr %3, align 1, !tbaa !11
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) getelementptr inbounds ([3 x i32], ptr @a, i64 0, i64 1), ptr noundef nonnull align 4 dereferenceable(4) getelementptr inbounds ([3 x i32], ptr @b, i64 0, i64 1)) #5
  %38 = call noundef zeroext i1 @_Z5checkv()
  %39 = zext i1 %38 to i32
  %40 = load i8, ptr %3, align 1, !tbaa !11, !range !13, !noundef !14
  %41 = trunc i8 %40 to i1
  %42 = zext i1 %41 to i32
  %43 = or i32 %42, %39
  %44 = icmp ne i32 %43, 0
  %45 = zext i1 %44 to i8
  store i8 %45, ptr %3, align 1, !tbaa !11
  %46 = load i8, ptr %3, align 1, !tbaa !11, !range !13, !noundef !14
  %47 = trunc i8 %46 to i1
  %48 = zext i1 %47 to i64
  %49 = select i1 %47, ptr @.str.1, ptr @.str.2
  %50 = call i32 @puts(ptr noundef %49)
  call void @llvm.lifetime.end.p0(i64 1, ptr %3) #5
  ret i32 0
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

declare i32 @__isoc99_scanf(ptr noundef, ...) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #4

declare i32 @puts(ptr noundef) #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{i8 0, i8 2}
!14 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@a = external dso_local global [3 x i32], align 4
@b = external dso_local global [3 x i32], align 4
@.str = external hidden unnamed_addr constant [5 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [4 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [3 x i8], align 1

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z5checkv() local_unnamed_addr #0

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() local_unnamed_addr #1 {
  %1 = tail call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull @a, ptr noundef nonnull @b)
  %2 = tail call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull getelementptr inbounds (i8, ptr @a, i64 4), ptr noundef nonnull getelementptr inbounds (i8, ptr @b, i64 4))
  %3 = tail call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull getelementptr inbounds (i8, ptr @a, i64 8), ptr noundef nonnull getelementptr inbounds (i8, ptr @b, i64 8))
  %4 = tail call noundef zeroext i1 @_Z5checkv()
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) getelementptr inbounds (i8, ptr @a, i64 4), ptr noundef nonnull align 4 dereferenceable(4) getelementptr inbounds (i8, ptr @b, i64 4)) #4
  %5 = tail call noundef zeroext i1 @_Z5checkv()
  %6 = or i1 %4, %5
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) getelementptr inbounds (i8, ptr @a, i64 8), ptr noundef nonnull align 4 dereferenceable(4) getelementptr inbounds (i8, ptr @b, i64 8)) #4
  %7 = tail call noundef zeroext i1 @_Z5checkv()
  %8 = or i1 %6, %7
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) getelementptr inbounds (i8, ptr @a, i64 4), ptr noundef nonnull align 4 dereferenceable(4) getelementptr inbounds (i8, ptr @b, i64 4)) #4
  %9 = tail call noundef zeroext i1 @_Z5checkv()
  %10 = or i1 %8, %9
  %11 = select i1 %10, ptr @.str.1, ptr @.str.2
  %12 = tail call i32 @puts(ptr noundef nonnull dereferenceable(1) %11)
  ret i32 0
}

; Function Attrs: nofree nounwind
declare noundef i32 @__isoc99_scanf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #3

; Function Attrs: nofree nounwind
declare noundef i32 @puts(ptr nocapture noundef readonly) local_unnamed_addr #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LoopRotatePass,SROAPass,SimplifyCFGPass,TailCallElimPass