; LLVM IR from tangjz/acm-icpc :: codeforces/gym/102012E.ll (Z7seg_chkiiiiRx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Segment = type { i32, i32, i64, i64 }

@seg = external dso_local global ptr, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7seg_idxii(i32 noundef, i32 noundef) #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_Z8seg_downii(i32 noundef, i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z7seg_chkiiiiRx(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, ptr noundef nonnull align 8 dereferenceable(8) %4) #3 {
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  store i32 %0, ptr %6, align 4, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !5
  store ptr %4, ptr %10, align 8, !tbaa !9
  %12 = load i32, ptr %8, align 4, !tbaa !5
  %13 = load i32, ptr %6, align 4, !tbaa !5
  %14 = icmp sle i32 %12, %13
  br i1 %14, label %15, label %31

15:                                               ; preds = %5
  %16 = load i32, ptr %7, align 4, !tbaa !5
  %17 = load i32, ptr %9, align 4, !tbaa !5
  %18 = icmp sle i32 %16, %17
  br i1 %18, label %19, label %31

19:                                               ; preds = %15
  %20 = load ptr, ptr %10, align 8, !tbaa !9
  %21 = load ptr, ptr @seg, align 8, !tbaa !9
  %22 = load i32, ptr %6, align 4, !tbaa !5
  %23 = load i32, ptr %7, align 4, !tbaa !5
  %24 = call noundef i32 @_Z7seg_idxii(i32 noundef %22, i32 noundef %23)
  %25 = sext i32 %24 to i64
  %26 = getelementptr inbounds %struct.Segment, ptr %21, i64 %25
  %27 = getelementptr inbounds %struct.Segment, ptr %26, i32 0, i32 2
  %28 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %20, ptr noundef nonnull align 8 dereferenceable(8) %27)
  %29 = load i64, ptr %28, align 8, !tbaa !11
  %30 = load ptr, ptr %10, align 8, !tbaa !9
  store i64 %29, ptr %30, align 8, !tbaa !11
  br label %59

31:                                               ; preds = %15, %5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  %32 = load i32, ptr %6, align 4, !tbaa !5
  %33 = load i32, ptr %7, align 4, !tbaa !5
  %34 = add nsw i32 %32, %33
  %35 = ashr i32 %34, 1
  store i32 %35, ptr %11, align 4, !tbaa !5
  %36 = load i32, ptr %6, align 4, !tbaa !5
  %37 = load i32, ptr %7, align 4, !tbaa !5
  call void @_Z8seg_downii(i32 noundef %36, i32 noundef %37)
  %38 = load i32, ptr %8, align 4, !tbaa !5
  %39 = load i32, ptr %11, align 4, !tbaa !5
  %40 = icmp sle i32 %38, %39
  br i1 %40, label %41, label %47

41:                                               ; preds = %31
  %42 = load i32, ptr %6, align 4, !tbaa !5
  %43 = load i32, ptr %11, align 4, !tbaa !5
  %44 = load i32, ptr %8, align 4, !tbaa !5
  %45 = load i32, ptr %9, align 4, !tbaa !5
  %46 = load ptr, ptr %10, align 8, !tbaa !9
  call void @_Z7seg_chkiiiiRx(i32 noundef %42, i32 noundef %43, i32 noundef %44, i32 noundef %45, ptr noundef nonnull align 8 dereferenceable(8) %46)
  br label %47

47:                                               ; preds = %41, %31
  %48 = load i32, ptr %11, align 4, !tbaa !5
  %49 = load i32, ptr %9, align 4, !tbaa !5
  %50 = icmp slt i32 %48, %49
  br i1 %50, label %51, label %58

51:                                               ; preds = %47
  %52 = load i32, ptr %11, align 4, !tbaa !5
  %53 = add nsw i32 %52, 1
  %54 = load i32, ptr %7, align 4, !tbaa !5
  %55 = load i32, ptr %8, align 4, !tbaa !5
  %56 = load i32, ptr %9, align 4, !tbaa !5
  %57 = load ptr, ptr %10, align 8, !tbaa !9
  call void @_Z7seg_chkiiiiRx(i32 noundef %53, i32 noundef %54, i32 noundef %55, i32 noundef %56, ptr noundef nonnull align 8 dereferenceable(8) %57)
  br label %58

58:                                               ; preds = %51, %47
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  br label %59

59:                                               ; preds = %58, %19
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Segment = type { i32, i32, i64, i64 }

@seg = external dso_local local_unnamed_addr global ptr, align 8

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7seg_idxii(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_Z8seg_downii(i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z7seg_chkiiiiRx(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, ptr noundef nonnull align 8 dereferenceable(8) %4) local_unnamed_addr #2 {
  %.not29 = icmp sgt i32 %1, %3
  %.not36 = icmp sgt i32 %2, %0
  %or.cond37 = or i1 %.not29, %.not36
  br i1 %or.cond37, label %.lr.ph, label %tailrecurse._crit_edge

.lr.ph:                                           ; preds = %5
  br i1 %.not29, label %.lr.ph.split.us, label %.lr.ph.split

.lr.ph.split.us:                                  ; preds = %.lr.ph, %tailrecurse.us
  %.tr38.us = phi i32 [ %10, %tailrecurse.us ], [ %0, %.lr.ph ]
  %6 = add nsw i32 %.tr38.us, %1
  %7 = ashr i32 %6, 1
  tail call void @_Z8seg_downii(i32 noundef %.tr38.us, i32 noundef %1)
  %.not30.us = icmp slt i32 %7, %2
  br i1 %.not30.us, label %tailrecurse.us, label %8

8:                                                ; preds = %.lr.ph.split.us
  tail call void @_Z7seg_chkiiiiRx(i32 noundef %.tr38.us, i32 noundef %7, i32 noundef %2, i32 noundef %3, ptr noundef nonnull align 8 dereferenceable(8) %4)
  br label %tailrecurse.us

tailrecurse.us:                                   ; preds = %8, %.lr.ph.split.us
  %9 = icmp slt i32 %7, %3
  %10 = add nsw i32 %7, 1
  br i1 %9, label %.lr.ph.split.us, label %.loopexit

tailrecurse:                                      ; preds = %21
  %11 = add nsw i32 %19, 1
  %.not = icmp slt i32 %11, %2
  br i1 %.not, label %.lr.ph.split, label %tailrecurse._crit_edge

tailrecurse._crit_edge:                           ; preds = %tailrecurse, %5
  %.tr.lcssa = phi i32 [ %0, %5 ], [ %11, %tailrecurse ]
  %12 = load ptr, ptr @seg, align 8, !tbaa !5
  %13 = tail call noundef i32 @_Z7seg_idxii(i32 noundef %.tr.lcssa, i32 noundef %1)
  %14 = sext i32 %13 to i64
  %15 = getelementptr inbounds %struct.Segment, ptr %12, i64 %14, i32 2
  %16 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %4, ptr noundef nonnull align 8 dereferenceable(8) %15)
  %17 = load i64, ptr %16, align 8, !tbaa !9
  store i64 %17, ptr %4, align 8, !tbaa !9
  br label %.loopexit

.lr.ph.split:                                     ; preds = %.lr.ph, %tailrecurse
  %.tr38 = phi i32 [ %11, %tailrecurse ], [ %0, %.lr.ph ]
  %18 = add nsw i32 %.tr38, %1
  %19 = ashr i32 %18, 1
  tail call void @_Z8seg_downii(i32 noundef %.tr38, i32 noundef %1)
  %.not30 = icmp slt i32 %19, %2
  br i1 %.not30, label %21, label %20

20:                                               ; preds = %.lr.ph.split
  tail call void @_Z7seg_chkiiiiRx(i32 noundef %.tr38, i32 noundef %19, i32 noundef %2, i32 noundef %3, ptr noundef nonnull align 8 dereferenceable(8) %4)
  br label %21

21:                                               ; preds = %20, %.lr.ph.split
  %22 = icmp slt i32 %19, %3
  br i1 %22, label %tailrecurse, label %.loopexit

.loopexit:                                        ; preds = %21, %tailrecurse.us, %tailrecurse._crit_edge
  ret void
}

attributes #0 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}


; Effective O3 passes: GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass