; LLVM IR from ubaldot/defrecs :: stm32f4x/ADC_Readings/Drivers/CMSIS/DSP/Source/FilteringFunctions (q15)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.arm_biquad_casd_df1_inst_q15 = type { i8, ptr, ptr, i8 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @arm_biquad_cascade_df1_fast_q15(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) #1 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  store i32 %3, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  %24 = load ptr, ptr %6, align 8, !tbaa !5
  store ptr %24, ptr %9, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  %25 = load ptr, ptr %7, align 8, !tbaa !5
  store ptr %25, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  %26 = load ptr, ptr %5, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.arm_biquad_casd_df1_inst_q15, ptr %26, i32 0, i32 1
  %28 = load ptr, ptr %27, align 8, !tbaa !11
  store ptr %28, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #3
  %29 = load ptr, ptr %5, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.arm_biquad_casd_df1_inst_q15, ptr %29, i32 0, i32 2
  %31 = load ptr, ptr %30, align 8, !tbaa !13
  store ptr %31, ptr %12, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #3
  %32 = load ptr, ptr %5, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.arm_biquad_casd_df1_inst_q15, ptr %32, i32 0, i32 3
  %34 = load i8, ptr %33, align 8, !tbaa !14
  %35 = sext i8 %34 to i32
  %36 = sub nsw i32 15, %35
  store i32 %36, ptr %21, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #3
  %37 = load ptr, ptr %5, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.arm_biquad_casd_df1_inst_q15, ptr %37, i32 0, i32 0
  %39 = load i8, ptr %38, align 8, !tbaa !15
  %40 = sext i8 %39 to i32
  store i32 %40, ptr %23, align 4, !tbaa !9
  br label %41

41:                                               ; preds = %113, %4
  %42 = load ptr, ptr %12, align 8, !tbaa !5
  %43 = getelementptr inbounds i16, ptr %42, i64 2
  store ptr %43, ptr %12, align 8, !tbaa !5
  %44 = getelementptr inbounds i16, ptr %43, i64 -2
  %45 = call i32 @read_q15x2(ptr noundef %44)
  store i32 %45, ptr %16, align 4, !tbaa !9
  %46 = load ptr, ptr %12, align 8, !tbaa !5
  %47 = getelementptr inbounds i16, ptr %46, i64 2
  store ptr %47, ptr %12, align 8, !tbaa !5
  %48 = getelementptr inbounds i16, ptr %47, i64 -2
  %49 = call i32 @read_q15x2(ptr noundef %48)
  store i32 %49, ptr %17, align 4, !tbaa !9
  %50 = load ptr, ptr %12, align 8, !tbaa !5
  %51 = getelementptr inbounds i16, ptr %50, i64 2
  store ptr %51, ptr %12, align 8, !tbaa !5
  %52 = getelementptr inbounds i16, ptr %51, i64 -2
  %53 = call i32 @read_q15x2(ptr noundef %52)
  store i32 %53, ptr %18, align 4, !tbaa !9
  %54 = load ptr, ptr %11, align 8, !tbaa !5
  %55 = getelementptr inbounds i16, ptr %54, i64 2
  store ptr %55, ptr %11, align 8, !tbaa !5
  %56 = getelementptr inbounds i16, ptr %55, i64 -2
  %57 = call i32 @read_q15x2(ptr noundef %56)
  store i32 %57, ptr %19, align 4, !tbaa !9
  %58 = load ptr, ptr %11, align 8, !tbaa !5
  %59 = getelementptr inbounds i16, ptr %58, i64 -2
  store ptr %59, ptr %11, align 8, !tbaa !5
  %60 = getelementptr inbounds i16, ptr %59, i64 2
  %61 = call i32 @read_q15x2(ptr noundef %60)
  store i32 %61, ptr %20, align 4, !tbaa !9
  %62 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %62, ptr %22, align 4, !tbaa !9
  br label %63

63:                                               ; preds = %66, %41
  %64 = load i32, ptr %22, align 4, !tbaa !9
  %65 = icmp ugt i32 %64, 0
  br i1 %65, label %66, label %106

66:                                               ; preds = %63
  %67 = load ptr, ptr %9, align 8, !tbaa !5
  %68 = getelementptr inbounds i16, ptr %67, i32 1
  store ptr %68, ptr %9, align 8, !tbaa !5
  %69 = load i16, ptr %67, align 2, !tbaa !16
  %70 = sext i16 %69 to i32
  store i32 %70, ptr %14, align 4, !tbaa !9
  %71 = load i32, ptr %16, align 4, !tbaa !9
  %72 = load i32, ptr %14, align 4, !tbaa !9
  %73 = call i32 @__SMUAD(i32 noundef %71, i32 noundef %72)
  store i32 %73, ptr %15, align 4, !tbaa !9
  %74 = load i32, ptr %17, align 4, !tbaa !9
  %75 = load i32, ptr %19, align 4, !tbaa !9
  %76 = load i32, ptr %15, align 4, !tbaa !9
  %77 = call i32 @__SMLAD(i32 noundef %74, i32 noundef %75, i32 noundef %76)
  store i32 %77, ptr %13, align 4, !tbaa !9
  %78 = load i32, ptr %18, align 4, !tbaa !9
  %79 = load i32, ptr %20, align 4, !tbaa !9
  %80 = load i32, ptr %13, align 4, !tbaa !9
  %81 = call i32 @__SMLAD(i32 noundef %78, i32 noundef %79, i32 noundef %80)
  store i32 %81, ptr %13, align 4, !tbaa !9
  %82 = load i32, ptr %13, align 4, !tbaa !9
  %83 = load i32, ptr %21, align 4, !tbaa !9
  %84 = ashr i32 %82, %83
  %85 = call i32 @__SSAT(i32 noundef %84, i32 noundef 16)
  store i32 %85, ptr %15, align 4, !tbaa !9
  %86 = load i32, ptr %15, align 4, !tbaa !9
  %87 = trunc i32 %86 to i16
  %88 = load ptr, ptr %10, align 8, !tbaa !5
  %89 = getelementptr inbounds i16, ptr %88, i32 1
  store ptr %89, ptr %10, align 8, !tbaa !5
  store i16 %87, ptr %88, align 2, !tbaa !16
  %90 = load i32, ptr %14, align 4, !tbaa !9
  %91 = shl i32 %90, 0
  %92 = and i32 %91, 65535
  %93 = load i32, ptr %19, align 4, !tbaa !9
  %94 = shl i32 %93, 16
  %95 = and i32 %94, -65536
  %96 = or i32 %92, %95
  store i32 %96, ptr %19, align 4, !tbaa !9
  %97 = load i32, ptr %15, align 4, !tbaa !9
  %98 = shl i32 %97, 0
  %99 = and i32 %98, 65535
  %100 = load i32, ptr %20, align 4, !tbaa !9
  %101 = shl i32 %100, 16
  %102 = and i32 %101, -65536
  %103 = or i32 %99, %102
  store i32 %103, ptr %20, align 4, !tbaa !9
  %104 = load i32, ptr %22, align 4, !tbaa !9
  %105 = add i32 %104, -1
  store i32 %105, ptr %22, align 4, !tbaa !9
  br label %63, !llvm.loop !18

106:                                              ; preds = %63
  %107 = load ptr, ptr %7, align 8, !tbaa !5
  store ptr %107, ptr %9, align 8, !tbaa !5
  %108 = load ptr, ptr %7, align 8, !tbaa !5
  store ptr %108, ptr %10, align 8, !tbaa !5
  %109 = load i32, ptr %19, align 4, !tbaa !9
  call void @write_q15x2_ia(ptr noundef %11, i32 noundef %109)
  %110 = load i32, ptr %20, align 4, !tbaa !9
  call void @write_q15x2_ia(ptr noundef %11, i32 noundef %110)
  %111 = load i32, ptr %23, align 4, !tbaa !9
  %112 = add i32 %111, -1
  store i32 %112, ptr %23, align 4, !tbaa !9
  br label %113

113:                                              ; preds = %106
  %114 = load i32, ptr %23, align 4, !tbaa !9
  %115 = icmp ugt i32 %114, 0
  br i1 %115, label %41, label %116, !llvm.loop !20

116:                                              ; preds = %113
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  ret void
}

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @read_q15x2(ptr noundef) #2

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @__SMUAD(i32 noundef, i32 noundef) #2

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @__SMLAD(i32 noundef, i32 noundef, i32 noundef) #2

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @__SSAT(i32 noundef, i32 noundef) #2

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @write_q15x2_ia(ptr noundef, i32 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 8}
!12 = !{!"", !7, i64 0, !6, i64 8, !6, i64 16, !7, i64 24}
!13 = !{!12, !6, i64 16}
!14 = !{!12, !7, i64 24}
!15 = !{!12, !7, i64 0}
!16 = !{!17, !17, i64 0}
!17 = !{!"short", !7, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
!20 = distinct !{!20, !19}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @arm_biquad_cascade_df1_fast_q15(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, ptr nocapture noundef %2, i32 noundef %3) local_unnamed_addr #1 {
  %5 = alloca ptr, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
  %6 = getelementptr inbounds i8, ptr %0, i64 8
  %7 = load ptr, ptr %6, align 8, !tbaa !5
  store ptr %7, ptr %5, align 8, !tbaa !10
  %8 = getelementptr inbounds i8, ptr %0, i64 16
  %9 = load ptr, ptr %8, align 8, !tbaa !11
  %10 = getelementptr inbounds i8, ptr %0, i64 24
  %11 = load i8, ptr %10, align 8, !tbaa !12
  %12 = sext i8 %11 to i32
  %13 = sub nsw i32 15, %12
  %14 = load i8, ptr %0, align 8, !tbaa !13
  %15 = sext i8 %14 to i32
  %.not43 = icmp eq i32 %3, 0
  br i1 %.not43, label %.split.us, label %.lr.ph

.split.us:                                        ; preds = %4, %.split.us
  %.040.us = phi ptr [ %19, %.split.us ], [ %9, %4 ]
  %.0.us = phi i32 [ %28, %.split.us ], [ %15, %4 ]
  %16 = call i32 @read_q15x2(ptr noundef %.040.us)
  %17 = getelementptr inbounds i8, ptr %.040.us, i64 4
  %18 = call i32 @read_q15x2(ptr noundef nonnull %17)
  %19 = getelementptr inbounds i8, ptr %.040.us, i64 12
  %20 = getelementptr inbounds i8, ptr %.040.us, i64 8
  %21 = call i32 @read_q15x2(ptr noundef nonnull %20)
  %22 = load ptr, ptr %5, align 8, !tbaa !10
  %23 = getelementptr inbounds i8, ptr %22, i64 4
  store ptr %23, ptr %5, align 8, !tbaa !10
  %24 = call i32 @read_q15x2(ptr noundef %22)
  %25 = load ptr, ptr %5, align 8, !tbaa !10
  %26 = getelementptr inbounds i8, ptr %25, i64 -4
  store ptr %26, ptr %5, align 8, !tbaa !10
  %27 = call i32 @read_q15x2(ptr noundef %25)
  call void @write_q15x2_ia(ptr noundef nonnull %5, i32 noundef %24)
  call void @write_q15x2_ia(ptr noundef nonnull %5, i32 noundef %27)
  %28 = add i32 %.0.us, -1
  %.not42.us = icmp eq i32 %28, 0
  br i1 %.not42.us, label %.split51.us, label %.split.us, !llvm.loop !14

.lr.ph:                                           ; preds = %4, %._crit_edge
  %.040 = phi ptr [ %58, %._crit_edge ], [ %9, %4 ]
  %.035 = phi ptr [ %2, %._crit_edge ], [ %1, %4 ]
  %.0 = phi i32 [ %59, %._crit_edge ], [ %15, %4 ]
  %29 = call i32 @read_q15x2(ptr noundef %.040)
  %30 = getelementptr inbounds i8, ptr %.040, i64 4
  %31 = call i32 @read_q15x2(ptr noundef nonnull %30)
  %32 = getelementptr inbounds i8, ptr %.040, i64 8
  %33 = call i32 @read_q15x2(ptr noundef nonnull %32)
  %34 = load ptr, ptr %5, align 8, !tbaa !10
  %35 = getelementptr inbounds i8, ptr %34, i64 4
  store ptr %35, ptr %5, align 8, !tbaa !10
  %36 = call i32 @read_q15x2(ptr noundef %34)
  %37 = load ptr, ptr %5, align 8, !tbaa !10
  %38 = getelementptr inbounds i8, ptr %37, i64 -4
  store ptr %38, ptr %5, align 8, !tbaa !10
  %39 = call i32 @read_q15x2(ptr noundef %37)
  br label %40

40:                                               ; preds = %.lr.ph, %40
  %.03448 = phi i32 [ %3, %.lr.ph ], [ %57, %40 ]
  %.147 = phi ptr [ %.035, %.lr.ph ], [ %41, %40 ]
  %.03646 = phi i32 [ %39, %.lr.ph ], [ %56, %40 ]
  %.03745 = phi i32 [ %36, %.lr.ph ], [ %53, %40 ]
  %.13944 = phi ptr [ %2, %.lr.ph ], [ %50, %40 ]
  %41 = getelementptr inbounds i8, ptr %.147, i64 2
  %42 = load i16, ptr %.147, align 2, !tbaa !16
  %43 = sext i16 %42 to i32
  %44 = call i32 @__SMUAD(i32 noundef %29, i32 noundef %43)
  %45 = call i32 @__SMLAD(i32 noundef %31, i32 noundef %.03745, i32 noundef %44)
  %46 = call i32 @__SMLAD(i32 noundef %33, i32 noundef %.03646, i32 noundef %45)
  %47 = ashr i32 %46, %13
  %48 = call i32 @__SSAT(i32 noundef %47, i32 noundef 16)
  %49 = trunc i32 %48 to i16
  %50 = getelementptr inbounds i8, ptr %.13944, i64 2
  store i16 %49, ptr %.13944, align 2, !tbaa !16
  %51 = and i32 %43, 65535
  %52 = shl i32 %.03745, 16
  %53 = or disjoint i32 %51, %52
  %54 = and i32 %48, 65535
  %55 = shl i32 %.03646, 16
  %56 = or disjoint i32 %54, %55
  %57 = add i32 %.03448, -1
  %.not = icmp eq i32 %57, 0
  br i1 %.not, label %._crit_edge, label %40, !llvm.loop !18

._crit_edge:                                      ; preds = %40
  %58 = getelementptr inbounds i8, ptr %.040, i64 12
  call void @write_q15x2_ia(ptr noundef nonnull %5, i32 noundef %53)
  call void @write_q15x2_ia(ptr noundef nonnull %5, i32 noundef %56)
  %59 = add i32 %.0, -1
  %.not42 = icmp eq i32 %59, 0
  br i1 %.not42, label %.split51.us, label %.lr.ph, !llvm.loop !14

.split51.us:                                      ; preds = %._crit_edge, %.split.us
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
  ret void
}

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @read_q15x2(ptr noundef) local_unnamed_addr #2

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @__SMUAD(i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @__SMLAD(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @__SSAT(i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @write_q15x2_ia(ptr noundef, i32 noundef) local_unnamed_addr #2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !9, i64 8}
!6 = !{!"", !7, i64 0, !9, i64 8, !9, i64 16, !7, i64 24}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!"any pointer", !7, i64 0}
!10 = !{!9, !9, i64 0}
!11 = !{!6, !9, i64 16}
!12 = !{!6, !7, i64 24}
!13 = !{!6, !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = !{!17, !17, i64 0}
!17 = !{!"short", !7, i64 0}
!18 = distinct !{!18, !15}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass