; LLVM IR from ubaldot/defrecs :: stm32f4x/ADC_Readings/Drivers/CMSIS/DSP/Source/QuaternionMathFunctions (f32)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @arm_quaternion_norm_f32(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca float, align 4
  %8 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  store i32 0, ptr %8, align 4, !tbaa !9
  br label %9

9:                                                ; preds = %80, %3
  %10 = load i32, ptr %8, align 4, !tbaa !9
  %11 = load i32, ptr %6, align 4, !tbaa !9
  %12 = icmp ult i32 %10, %11
  br i1 %12, label %13, label %83

13:                                               ; preds = %9
  %14 = load ptr, ptr %4, align 8, !tbaa !5
  %15 = load i32, ptr %8, align 4, !tbaa !9
  %16 = mul i32 4, %15
  %17 = add i32 %16, 0
  %18 = zext i32 %17 to i64
  %19 = getelementptr inbounds float, ptr %14, i64 %18
  %20 = load float, ptr %19, align 4, !tbaa !11
  %21 = load ptr, ptr %4, align 8, !tbaa !5
  %22 = load i32, ptr %8, align 4, !tbaa !9
  %23 = mul i32 4, %22
  %24 = add i32 %23, 0
  %25 = zext i32 %24 to i64
  %26 = getelementptr inbounds float, ptr %21, i64 %25
  %27 = load float, ptr %26, align 4, !tbaa !11
  %28 = load ptr, ptr %4, align 8, !tbaa !5
  %29 = load i32, ptr %8, align 4, !tbaa !9
  %30 = mul i32 4, %29
  %31 = add i32 %30, 1
  %32 = zext i32 %31 to i64
  %33 = getelementptr inbounds float, ptr %28, i64 %32
  %34 = load float, ptr %33, align 4, !tbaa !11
  %35 = load ptr, ptr %4, align 8, !tbaa !5
  %36 = load i32, ptr %8, align 4, !tbaa !9
  %37 = mul i32 4, %36
  %38 = add i32 %37, 1
  %39 = zext i32 %38 to i64
  %40 = getelementptr inbounds float, ptr %35, i64 %39
  %41 = load float, ptr %40, align 4, !tbaa !11
  %42 = fmul float %34, %41
  %43 = call float @llvm.fmuladd.f32(float %20, float %27, float %42)
  %44 = load ptr, ptr %4, align 8, !tbaa !5
  %45 = load i32, ptr %8, align 4, !tbaa !9
  %46 = mul i32 4, %45
  %47 = add i32 %46, 2
  %48 = zext i32 %47 to i64
  %49 = getelementptr inbounds float, ptr %44, i64 %48
  %50 = load float, ptr %49, align 4, !tbaa !11
  %51 = load ptr, ptr %4, align 8, !tbaa !5
  %52 = load i32, ptr %8, align 4, !tbaa !9
  %53 = mul i32 4, %52
  %54 = add i32 %53, 2
  %55 = zext i32 %54 to i64
  %56 = getelementptr inbounds float, ptr %51, i64 %55
  %57 = load float, ptr %56, align 4, !tbaa !11
  %58 = call float @llvm.fmuladd.f32(float %50, float %57, float %43)
  %59 = load ptr, ptr %4, align 8, !tbaa !5
  %60 = load i32, ptr %8, align 4, !tbaa !9
  %61 = mul i32 4, %60
  %62 = add i32 %61, 3
  %63 = zext i32 %62 to i64
  %64 = getelementptr inbounds float, ptr %59, i64 %63
  %65 = load float, ptr %64, align 4, !tbaa !11
  %66 = load ptr, ptr %4, align 8, !tbaa !5
  %67 = load i32, ptr %8, align 4, !tbaa !9
  %68 = mul i32 4, %67
  %69 = add i32 %68, 3
  %70 = zext i32 %69 to i64
  %71 = getelementptr inbounds float, ptr %66, i64 %70
  %72 = load float, ptr %71, align 4, !tbaa !11
  %73 = call float @llvm.fmuladd.f32(float %65, float %72, float %58)
  store float %73, ptr %7, align 4, !tbaa !11
  %74 = load float, ptr %7, align 4, !tbaa !11
  %75 = call float @sqrtf(float noundef %74) #4
  %76 = load ptr, ptr %5, align 8, !tbaa !5
  %77 = load i32, ptr %8, align 4, !tbaa !9
  %78 = zext i32 %77 to i64
  %79 = getelementptr inbounds float, ptr %76, i64 %78
  store float %75, ptr %79, align 4, !tbaa !11
  br label %80

80:                                               ; preds = %13
  %81 = load i32, ptr %8, align 4, !tbaa !9
  %82 = add i32 %81, 1
  store i32 %82, ptr %8, align 4, !tbaa !9
  br label %9, !llvm.loop !13

83:                                               ; preds = %9
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #2

; Function Attrs: nounwind
declare float @sqrtf(float noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"float", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable
define dso_local void @arm_quaternion_norm_f32(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1, i32 noundef %2) local_unnamed_addr #0 {
  %.not = icmp eq i32 %2, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %3
  %wide.trip.count = zext i32 %2 to i64
  %min.iters.check = icmp ult i32 %2, 4
  br i1 %min.iters.check, label %.lr.ph.preheader27, label %vector.memcheck

vector.memcheck:                                  ; preds = %.lr.ph.preheader
  %4 = shl nuw nsw i64 %wide.trip.count, 2
  %scevgep = getelementptr i8, ptr %1, i64 %4
  %5 = shl nuw nsw i64 %wide.trip.count, 4
  %scevgep23 = getelementptr i8, ptr %0, i64 %5
  %bound0 = icmp ugt ptr %scevgep23, %1
  %bound1 = icmp ugt ptr %scevgep, %0
  %found.conflict = and i1 %bound0, %bound1
  br i1 %found.conflict, label %.lr.ph.preheader27, label %vector.ph

vector.ph:                                        ; preds = %vector.memcheck
  %n.vec = and i64 %wide.trip.count, 4294967292
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %6 = shl i64 %index, 2
  %7 = and i64 %6, 4294967280
  %8 = getelementptr inbounds float, ptr %0, i64 %7
  %wide.vec = load <16 x float>, ptr %8, align 4, !tbaa !5
  %strided.vec = shufflevector <16 x float> %wide.vec, <16 x float> poison, <4 x i32> <i32 0, i32 4, i32 8, i32 12>
  %strided.vec25 = shufflevector <16 x float> %wide.vec, <16 x float> poison, <4 x i32> <i32 2, i32 6, i32 10, i32 14>
  %strided.vec26 = shufflevector <16 x float> %wide.vec, <16 x float> poison, <4 x i32> <i32 3, i32 7, i32 11, i32 15>
  %9 = fmul <16 x float> %wide.vec, %wide.vec
  %10 = shufflevector <16 x float> %9, <16 x float> poison, <4 x i32> <i32 1, i32 5, i32 9, i32 13>
  %11 = tail call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %strided.vec, <4 x float> %strided.vec, <4 x float> %10)
  %12 = tail call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %strided.vec25, <4 x float> %strided.vec25, <4 x float> %11)
  %13 = tail call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %strided.vec26, <4 x float> %strided.vec26, <4 x float> %12)
  %14 = tail call <4 x float> @llvm.sqrt.v4f32(<4 x float> %13)
  %15 = getelementptr inbounds float, ptr %1, i64 %index
  store <4 x float> %14, ptr %15, align 4, !tbaa !5, !alias.scope !9, !noalias !12
  %index.next = add nuw i64 %index, 4
  %16 = icmp eq i64 %index.next, %n.vec
  br i1 %16, label %middle.block, label %vector.body, !llvm.loop !14

middle.block:                                     ; preds = %vector.body
  %cmp.n = icmp eq i64 %n.vec, %wide.trip.count
  br i1 %cmp.n, label %._crit_edge, label %.lr.ph.preheader27

.lr.ph.preheader27:                               ; preds = %middle.block, %vector.memcheck, %.lr.ph.preheader
  %indvars.iv.ph = phi i64 [ 0, %vector.memcheck ], [ 0, %.lr.ph.preheader ], [ %n.vec, %middle.block ]
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader27, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ %indvars.iv.ph, %.lr.ph.preheader27 ]
  %17 = trunc nuw i64 %indvars.iv to i32
  %18 = shl i32 %17, 2
  %19 = zext i32 %18 to i64
  %20 = getelementptr inbounds float, ptr %0, i64 %19
  %21 = load float, ptr %20, align 4, !tbaa !5
  %22 = or disjoint i32 %18, 1
  %23 = zext i32 %22 to i64
  %24 = getelementptr inbounds float, ptr %0, i64 %23
  %25 = load float, ptr %24, align 4, !tbaa !5
  %26 = fmul float %25, %25
  %27 = tail call float @llvm.fmuladd.f32(float %21, float %21, float %26)
  %28 = or disjoint i32 %18, 2
  %29 = zext i32 %28 to i64
  %30 = getelementptr inbounds float, ptr %0, i64 %29
  %31 = load float, ptr %30, align 4, !tbaa !5
  %32 = tail call float @llvm.fmuladd.f32(float %31, float %31, float %27)
  %33 = or disjoint i32 %18, 3
  %34 = zext i32 %33 to i64
  %35 = getelementptr inbounds float, ptr %0, i64 %34
  %36 = load float, ptr %35, align 4, !tbaa !5
  %37 = tail call float @llvm.fmuladd.f32(float %36, float %36, float %32)
  %sqrt = tail call float @llvm.sqrt.f32(float %37)
  %38 = getelementptr inbounds float, ptr %1, i64 %indvars.iv
  store float %sqrt, ptr %38, align 4, !tbaa !5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !18

._crit_edge:                                      ; preds = %.lr.ph, %middle.block, %3
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.sqrt.f32(float) #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare <4 x float> @llvm.fmuladd.v4f32(<4 x float>, <4 x float>, <4 x float>) #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare <4 x float> @llvm.sqrt.v4f32(<4 x float>) #2

attributes #0 = { nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10}
!10 = distinct !{!10, !11}
!11 = distinct !{!11, !"LVerDomain"}
!12 = !{!13}
!13 = distinct !{!13, !11}
!14 = distinct !{!14, !15, !16, !17}
!15 = !{!"llvm.loop.mustprogress"}
!16 = !{!"llvm.loop.isvectorized", i32 1}
!17 = !{!"llvm.loop.unroll.runtime.disable"}
!18 = distinct !{!18, !15, !16}


; Effective O3 passes: AggressiveInstCombinePass,CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass