; LLVM IR from CRAFT-THU/BSim :: src/neuron/tj/TJNeuron.ll (ZN8TJNeuron6updateER7SimInfo)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.NeuronBase = type <{ %class.Base, %"class.std::vector", i8, i8, [2 x i8], i32, float, [4 x i8] }>
%class.Base = type { ptr, i32, i32 }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<SynapseBase *, std::allocator<SynapseBase *>>::_Vector_impl" }
%"struct.std::_Vector_base<SynapseBase *, std::allocator<SynapseBase *>>::_Vector_impl" = type { %"struct.std::_Vector_base<SynapseBase *, std::allocator<SynapseBase *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<SynapseBase *, std::allocator<SynapseBase *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.TJNeuron = type { %class.NeuronBase.base, float, float, float, float, float, float, float, float, float, float, i32, i32, ptr }
%class.NeuronBase.base = type <{ %class.Base, %"class.std::vector", i8, i8, [2 x i8], i32, float }>
%struct.SimInfo = type { i32, float, %"class.std::vector.0", %"class.std::vector.5" }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.5" = type { %"struct.std::_Vector_base.6" }
%"struct.std::_Vector_base.6" = type { %"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl" }
%"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl" = type { %"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl_data" }
%"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN8TJNeuron6updateER7SimInfo(ptr noundef nonnull align 8 dereferenceable(112) %0, ptr noundef nonnull align 8 dereferenceable(56) %1) unnamed_addr #0 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca float, align 4
  %6 = alloca float, align 4
  %7 = alloca float, align 4
  %8 = alloca float, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %10 = load ptr, ptr %3, align 8
  %11 = getelementptr inbounds %class.NeuronBase, ptr %10, i32 0, i32 2
  store i8 0, ptr %11, align 8, !tbaa !9
  %12 = getelementptr inbounds %class.TJNeuron, ptr %10, i32 0, i32 12
  %13 = load i32, ptr %12, align 8, !tbaa !19
  %14 = icmp sgt i32 %13, 0
  br i1 %14, label %15, label %19

15:                                               ; preds = %2
  %16 = getelementptr inbounds %class.TJNeuron, ptr %10, i32 0, i32 12
  %17 = load i32, ptr %16, align 8, !tbaa !19
  %18 = add nsw i32 %17, -1
  store i32 %18, ptr %16, align 8, !tbaa !19
  br label %66

19:                                               ; preds = %2
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  %20 = getelementptr inbounds %class.TJNeuron, ptr %10, i32 0, i32 8
  %21 = load float, ptr %20, align 8, !tbaa !21
  %22 = getelementptr inbounds %class.TJNeuron, ptr %10, i32 0, i32 10
  %23 = load float, ptr %22, align 8, !tbaa !22
  %24 = fadd float %21, %23
  store float %24, ptr %5, align 4, !tbaa !23
  %25 = getelementptr inbounds %class.TJNeuron, ptr %10, i32 0, i32 9
  %26 = load float, ptr %25, align 4, !tbaa !24
  %27 = load float, ptr %5, align 4, !tbaa !23
  %28 = load ptr, ptr %4, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.SimInfo, ptr %28, i32 0, i32 1
  %30 = load float, ptr %29, align 4, !tbaa !25
  %31 = fmul float %27, %30
  %32 = getelementptr inbounds %class.TJNeuron, ptr %10, i32 0, i32 4
  %33 = load float, ptr %32, align 8, !tbaa !35
  %34 = fdiv float %31, %33
  %35 = fadd float %26, %34
  %36 = getelementptr inbounds %class.TJNeuron, ptr %10, i32 0, i32 9
  store float %35, ptr %36, align 4, !tbaa !24
  %37 = getelementptr inbounds %class.TJNeuron, ptr %10, i32 0, i32 9
  %38 = load float, ptr %37, align 4, !tbaa !24
  %39 = getelementptr inbounds %class.TJNeuron, ptr %10, i32 0, i32 6
  %40 = load float, ptr %39, align 8, !tbaa !36
  %41 = fcmp oge float %38, %40
  br i1 %41, label %42, label %51

42:                                               ; preds = %19
  %43 = getelementptr inbounds %class.NeuronBase, ptr %10, i32 0, i32 2
  store i8 1, ptr %43, align 8, !tbaa !9
  %44 = getelementptr inbounds %class.TJNeuron, ptr %10, i32 0, i32 11
  %45 = load i32, ptr %44, align 4, !tbaa !37
  %46 = sub nsw i32 %45, 1
  %47 = getelementptr inbounds %class.TJNeuron, ptr %10, i32 0, i32 12
  store i32 %46, ptr %47, align 8, !tbaa !19
  %48 = getelementptr inbounds %class.TJNeuron, ptr %10, i32 0, i32 3
  %49 = load float, ptr %48, align 4, !tbaa !38
  %50 = getelementptr inbounds %class.TJNeuron, ptr %10, i32 0, i32 9
  store float %49, ptr %50, align 4, !tbaa !24
  br label %51

51:                                               ; preds = %42, %19
  %52 = getelementptr inbounds %class.NeuronBase, ptr %10, i32 0, i32 2
  %53 = load i8, ptr %52, align 8, !tbaa !9, !range !39, !noundef !40
  %54 = trunc i8 %53 to i1
  br i1 %54, label %55, label %60

55:                                               ; preds = %51
  %56 = call noundef i32 @_ZN10NeuronBase4fireEv(ptr noundef nonnull align 8 dereferenceable(52) %10)
  %57 = getelementptr inbounds %class.NeuronBase, ptr %10, i32 0, i32 5
  %58 = load i32, ptr %57, align 4, !tbaa !41
  %59 = add nsw i32 %58, 1
  store i32 %59, ptr %57, align 4, !tbaa !41
  br label %60

60:                                               ; preds = %55, %51
  %61 = getelementptr inbounds %class.TJNeuron, ptr %10, i32 0, i32 8
  %62 = load float, ptr %61, align 8, !tbaa !21
  %63 = getelementptr inbounds %class.NeuronBase, ptr %10, i32 0, i32 6
  %64 = load float, ptr %63, align 8, !tbaa !42
  %65 = fadd float %64, %62
  store float %65, ptr %63, align 8, !tbaa !42
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  br label %66

66:                                               ; preds = %60, %15
  %67 = load ptr, ptr %4, align 8, !tbaa !5
  %68 = getelementptr inbounds %struct.SimInfo, ptr %67, i32 0, i32 3
  %69 = getelementptr inbounds %class.TJNeuron, ptr %10, i32 0, i32 9
  call void @_ZNSt6vectorIfSaIfEE9push_backERKf(ptr noundef nonnull align 8 dereferenceable(24) %68, ptr noundef nonnull align 4 dereferenceable(4) %69)
  %70 = load ptr, ptr %4, align 8, !tbaa !5
  %71 = getelementptr inbounds %struct.SimInfo, ptr %70, i32 0, i32 3
  %72 = getelementptr inbounds %class.TJNeuron, ptr %10, i32 0, i32 8
  call void @_ZNSt6vectorIfSaIfEE9push_backERKf(ptr noundef nonnull align 8 dereferenceable(24) %71, ptr noundef nonnull align 4 dereferenceable(4) %72)
  %73 = load ptr, ptr %4, align 8, !tbaa !5
  %74 = getelementptr inbounds %struct.SimInfo, ptr %73, i32 0, i32 3
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  store float 0.000000e+00, ptr %6, align 4, !tbaa !23
  call void @_ZNSt6vectorIfSaIfEE9push_backEOf(ptr noundef nonnull align 8 dereferenceable(24) %74, ptr noundef nonnull align 4 dereferenceable(4) %6)
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  %75 = load ptr, ptr %4, align 8, !tbaa !5
  %76 = getelementptr inbounds %struct.SimInfo, ptr %75, i32 0, i32 3
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  store float 0.000000e+00, ptr %7, align 4, !tbaa !23
  call void @_ZNSt6vectorIfSaIfEE9push_backEOf(ptr noundef nonnull align 8 dereferenceable(24) %76, ptr noundef nonnull align 4 dereferenceable(4) %7)
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  %77 = load ptr, ptr %4, align 8, !tbaa !5
  %78 = getelementptr inbounds %struct.SimInfo, ptr %77, i32 0, i32 3
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  store float 0.000000e+00, ptr %8, align 4, !tbaa !23
  call void @_ZNSt6vectorIfSaIfEE9push_backEOf(ptr noundef nonnull align 8 dereferenceable(24) %78, ptr noundef nonnull align 4 dereferenceable(4) %8)
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  %79 = getelementptr inbounds %class.TJNeuron, ptr %10, i32 0, i32 8
  store float 0.000000e+00, ptr %79, align 8, !tbaa !21
  %80 = load ptr, ptr %4, align 8, !tbaa !5
  %81 = getelementptr inbounds %struct.SimInfo, ptr %80, i32 0, i32 2
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %82 = getelementptr inbounds %class.NeuronBase, ptr %10, i32 0, i32 2
  %83 = load i8, ptr %82, align 8, !tbaa !9, !range !39, !noundef !40
  %84 = trunc i8 %83 to i1
  %85 = zext i1 %84 to i32
  store i32 %85, ptr %9, align 4, !tbaa !43
  call void @_ZNSt6vectorIiSaIiEE9push_backEOi(ptr noundef nonnull align 8 dereferenceable(24) %81, ptr noundef nonnull align 4 dereferenceable(4) %9)
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  %86 = getelementptr inbounds %class.NeuronBase, ptr %10, i32 0, i32 2
  %87 = load i8, ptr %86, align 8, !tbaa !9, !range !39, !noundef !40
  %88 = trunc i8 %87 to i1
  %89 = zext i1 %88 to i32
  ret i32 %89
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare noundef i32 @_ZN10NeuronBase4fireEv(ptr noundef nonnull align 8 dereferenceable(52)) unnamed_addr #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIfSaIfEE9push_backERKf(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(4)) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIfSaIfEE9push_backEOf(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(4)) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE9push_backEOi(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(4)) #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !17, i64 40}
!10 = !{!"_ZTS10NeuronBase", !11, i64 0, !13, i64 16, !17, i64 40, !17, i64 41, !12, i64 44, !18, i64 48}
!11 = !{!"_ZTS4Base", !12, i64 8, !12, i64 12}
!12 = !{!"int", !7, i64 0}
!13 = !{!"_ZTSSt6vectorIP11SynapseBaseSaIS1_EE", !14, i64 0}
!14 = !{!"_ZTSSt12_Vector_baseIP11SynapseBaseSaIS1_EE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIP11SynapseBaseSaIS1_EE12_Vector_implE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIP11SynapseBaseSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!17 = !{!"bool", !7, i64 0}
!18 = !{!"float", !7, i64 0}
!19 = !{!20, !12, i64 96}
!20 = !{!"_ZTS8TJNeuron", !10, i64 0, !18, i64 52, !18, i64 56, !18, i64 60, !18, i64 64, !18, i64 68, !18, i64 72, !18, i64 76, !18, i64 80, !18, i64 84, !18, i64 88, !12, i64 92, !12, i64 96, !6, i64 104}
!21 = !{!20, !18, i64 80}
!22 = !{!20, !18, i64 88}
!23 = !{!18, !18, i64 0}
!24 = !{!20, !18, i64 84}
!25 = !{!26, !18, i64 4}
!26 = !{!"_ZTS7SimInfo", !12, i64 0, !18, i64 4, !27, i64 8, !31, i64 32}
!27 = !{!"_ZTSSt6vectorIiSaIiEE", !28, i64 0}
!28 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !29, i64 0}
!29 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !30, i64 0}
!30 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!31 = !{!"_ZTSSt6vectorIfSaIfEE", !32, i64 0}
!32 = !{!"_ZTSSt12_Vector_baseIfSaIfEE", !33, i64 0}
!33 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE12_Vector_implE", !34, i64 0}
!34 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!35 = !{!20, !18, i64 64}
!36 = !{!20, !18, i64 72}
!37 = !{!20, !12, i64 92}
!38 = !{!20, !18, i64 60}
!39 = !{i8 0, i8 2}
!40 = !{}
!41 = !{!10, !12, i64 44}
!42 = !{!10, !18, i64 48}
!43 = !{!12, !12, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef range(i32 0, 2) i32 @_ZN8TJNeuron6updateER7SimInfo(ptr noundef nonnull align 8 dereferenceable(112) %0, ptr noundef nonnull align 8 dereferenceable(56) %1) unnamed_addr #0 align 2 {
  %3 = alloca float, align 4
  %4 = alloca float, align 4
  %5 = alloca float, align 4
  %6 = alloca i32, align 4
  %7 = getelementptr inbounds i8, ptr %0, i64 40
  store i8 0, ptr %7, align 8, !tbaa !5
  %8 = getelementptr inbounds i8, ptr %0, i64 96
  %9 = load i32, ptr %8, align 8, !tbaa !18
  %10 = icmp sgt i32 %9, 0
  br i1 %10, label %11, label %13

11:                                               ; preds = %2
  %12 = add nsw i32 %9, -1
  store i32 %12, ptr %8, align 8, !tbaa !18
  br label %46

13:                                               ; preds = %2
  %14 = getelementptr inbounds i8, ptr %0, i64 80
  %15 = load float, ptr %14, align 8, !tbaa !20
  %16 = getelementptr inbounds i8, ptr %0, i64 88
  %17 = load float, ptr %16, align 8, !tbaa !21
  %18 = fadd float %15, %17
  %19 = getelementptr inbounds i8, ptr %0, i64 84
  %20 = load float, ptr %19, align 4, !tbaa !22
  %21 = getelementptr inbounds i8, ptr %1, i64 4
  %22 = load float, ptr %21, align 4, !tbaa !23
  %23 = fmul float %18, %22
  %24 = getelementptr inbounds i8, ptr %0, i64 64
  %25 = load float, ptr %24, align 8, !tbaa !33
  %26 = fdiv float %23, %25
  %27 = fadd float %20, %26
  store float %27, ptr %19, align 4, !tbaa !22
  %28 = getelementptr inbounds i8, ptr %0, i64 72
  %29 = load float, ptr %28, align 8, !tbaa !34
  %30 = fcmp ult float %27, %29
  br i1 %30, label %41, label %31

31:                                               ; preds = %13
  store i8 1, ptr %7, align 8, !tbaa !5
  %32 = getelementptr inbounds i8, ptr %0, i64 92
  %33 = load i32, ptr %32, align 4, !tbaa !35
  %34 = add nsw i32 %33, -1
  store i32 %34, ptr %8, align 8, !tbaa !18
  %35 = getelementptr inbounds i8, ptr %0, i64 60
  %36 = load float, ptr %35, align 4, !tbaa !36
  store float %36, ptr %19, align 4, !tbaa !22
  %37 = tail call noundef i32 @_ZN10NeuronBase4fireEv(ptr noundef nonnull align 8 dereferenceable(52) %0)
  %38 = getelementptr inbounds i8, ptr %0, i64 44
  %39 = load i32, ptr %38, align 4, !tbaa !37
  %40 = add nsw i32 %39, 1
  store i32 %40, ptr %38, align 4, !tbaa !37
  %.pre = load float, ptr %14, align 8, !tbaa !20
  br label %41

41:                                               ; preds = %13, %31
  %42 = phi float [ %.pre, %31 ], [ %15, %13 ]
  %43 = getelementptr inbounds i8, ptr %0, i64 48
  %44 = load float, ptr %43, align 8, !tbaa !38
  %45 = fadd float %42, %44
  store float %45, ptr %43, align 8, !tbaa !38
  br label %46

46:                                               ; preds = %41, %11
  %47 = getelementptr inbounds i8, ptr %1, i64 32
  %48 = getelementptr inbounds i8, ptr %0, i64 84
  tail call void @_ZNSt6vectorIfSaIfEE9push_backERKf(ptr noundef nonnull align 8 dereferenceable(24) %47, ptr noundef nonnull align 4 dereferenceable(4) %48)
  %49 = getelementptr inbounds i8, ptr %0, i64 80
  tail call void @_ZNSt6vectorIfSaIfEE9push_backERKf(ptr noundef nonnull align 8 dereferenceable(24) %47, ptr noundef nonnull align 4 dereferenceable(4) %49)
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
  store float 0.000000e+00, ptr %3, align 4, !tbaa !39
  call void @_ZNSt6vectorIfSaIfEE9push_backEOf(ptr noundef nonnull align 8 dereferenceable(24) %47, ptr noundef nonnull align 4 dereferenceable(4) %3)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
  store float 0.000000e+00, ptr %4, align 4, !tbaa !39
  call void @_ZNSt6vectorIfSaIfEE9push_backEOf(ptr noundef nonnull align 8 dereferenceable(24) %47, ptr noundef nonnull align 4 dereferenceable(4) %4)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
  store float 0.000000e+00, ptr %5, align 4, !tbaa !39
  call void @_ZNSt6vectorIfSaIfEE9push_backEOf(ptr noundef nonnull align 8 dereferenceable(24) %47, ptr noundef nonnull align 4 dereferenceable(4) %5)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
  store float 0.000000e+00, ptr %49, align 8, !tbaa !20
  %50 = getelementptr inbounds i8, ptr %1, i64 8
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
  %51 = load i8, ptr %7, align 8, !tbaa !5, !range !40, !noundef !41
  %52 = zext nneg i8 %51 to i32
  store i32 %52, ptr %6, align 4, !tbaa !42
  call void @_ZNSt6vectorIiSaIiEE9push_backEOi(ptr noundef nonnull align 8 dereferenceable(24) %50, ptr noundef nonnull align 4 dereferenceable(4) %6)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
  %53 = load i8, ptr %7, align 8, !tbaa !5, !range !40, !noundef !41
  %54 = zext nneg i8 %53 to i32
  ret i32 %54
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare noundef i32 @_ZN10NeuronBase4fireEv(ptr noundef nonnull align 8 dereferenceable(52)) unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIfSaIfEE9push_backERKf(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIfSaIfEE9push_backEOf(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE9push_backEOi(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !16, i64 40}
!6 = !{!"_ZTS10NeuronBase", !7, i64 0, !11, i64 16, !16, i64 40, !16, i64 41, !8, i64 44, !17, i64 48}
!7 = !{!"_ZTS4Base", !8, i64 8, !8, i64 12}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"_ZTSSt6vectorIP11SynapseBaseSaIS1_EE", !12, i64 0}
!12 = !{!"_ZTSSt12_Vector_baseIP11SynapseBaseSaIS1_EE", !13, i64 0}
!13 = !{!"_ZTSNSt12_Vector_baseIP11SynapseBaseSaIS1_EE12_Vector_implE", !14, i64 0}
!14 = !{!"_ZTSNSt12_Vector_baseIP11SynapseBaseSaIS1_EE17_Vector_impl_dataE", !15, i64 0, !15, i64 8, !15, i64 16}
!15 = !{!"any pointer", !9, i64 0}
!16 = !{!"bool", !9, i64 0}
!17 = !{!"float", !9, i64 0}
!18 = !{!19, !8, i64 96}
!19 = !{!"_ZTS8TJNeuron", !6, i64 0, !17, i64 52, !17, i64 56, !17, i64 60, !17, i64 64, !17, i64 68, !17, i64 72, !17, i64 76, !17, i64 80, !17, i64 84, !17, i64 88, !8, i64 92, !8, i64 96, !15, i64 104}
!20 = !{!19, !17, i64 80}
!21 = !{!19, !17, i64 88}
!22 = !{!19, !17, i64 84}
!23 = !{!24, !17, i64 4}
!24 = !{!"_ZTS7SimInfo", !8, i64 0, !17, i64 4, !25, i64 8, !29, i64 32}
!25 = !{!"_ZTSSt6vectorIiSaIiEE", !26, i64 0}
!26 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !28, i64 0}
!28 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !15, i64 0, !15, i64 8, !15, i64 16}
!29 = !{!"_ZTSSt6vectorIfSaIfEE", !30, i64 0}
!30 = !{!"_ZTSSt12_Vector_baseIfSaIfEE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE12_Vector_implE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE17_Vector_impl_dataE", !15, i64 0, !15, i64 8, !15, i64 16}
!33 = !{!19, !17, i64 64}
!34 = !{!19, !17, i64 72}
!35 = !{!19, !8, i64 92}
!36 = !{!19, !17, i64 60}
!37 = !{!6, !8, i64 44}
!38 = !{!6, !17, i64 48}
!39 = !{!17, !17, i64 0}
!40 = !{i8 0, i8 2}
!41 = !{}
!42 = !{!8, !8, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,ReassociatePass,SROAPass,TailCallElimPass