; LLVM IR from tangjz/acm-icpc :: codeforces/gym/101234A.ll (Z6segQueiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Node = type { i32, i32, i32 }

@seg = external dso_local global [200003 x %struct.Node], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z6segIdxii(i32 noundef, i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_Z7segDowniii(i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z6segQueiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #2 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  store i32 %0, ptr %6, align 4, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  %16 = load i32, ptr %6, align 4, !tbaa !5
  %17 = load i32, ptr %7, align 4, !tbaa !5
  %18 = call noundef i32 @_Z6segIdxii(i32 noundef %16, i32 noundef %17)
  store i32 %18, ptr %10, align 4, !tbaa !5
  %19 = load i32, ptr %8, align 4, !tbaa !5
  %20 = load i32, ptr %6, align 4, !tbaa !5
  %21 = icmp sle i32 %19, %20
  br i1 %21, label %22, label %32

22:                                               ; preds = %4
  %23 = load i32, ptr %7, align 4, !tbaa !5
  %24 = load i32, ptr %9, align 4, !tbaa !5
  %25 = icmp sle i32 %23, %24
  br i1 %25, label %26, label %32

26:                                               ; preds = %22
  %27 = load i32, ptr %10, align 4, !tbaa !5
  %28 = sext i32 %27 to i64
  %29 = getelementptr inbounds [200003 x %struct.Node], ptr @seg, i64 0, i64 %28
  %30 = getelementptr inbounds %struct.Node, ptr %29, i32 0, i32 1
  %31 = load i32, ptr %30, align 4, !tbaa !9
  store i32 %31, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %73

32:                                               ; preds = %22, %4
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %33 = load i32, ptr %6, align 4, !tbaa !5
  %34 = load i32, ptr %7, align 4, !tbaa !5
  %35 = add nsw i32 %33, %34
  %36 = ashr i32 %35, 1
  store i32 %36, ptr %12, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  %37 = load i32, ptr %6, align 4, !tbaa !5
  %38 = load i32, ptr %12, align 4, !tbaa !5
  %39 = call noundef i32 @_Z6segIdxii(i32 noundef %37, i32 noundef %38)
  store i32 %39, ptr %13, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  %40 = load i32, ptr %12, align 4, !tbaa !5
  %41 = add nsw i32 %40, 1
  %42 = load i32, ptr %7, align 4, !tbaa !5
  %43 = call noundef i32 @_Z6segIdxii(i32 noundef %41, i32 noundef %42)
  store i32 %43, ptr %14, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  store i32 0, ptr %15, align 4, !tbaa !5
  %44 = load i32, ptr %10, align 4, !tbaa !5
  %45 = load i32, ptr %13, align 4, !tbaa !5
  %46 = load i32, ptr %14, align 4, !tbaa !5
  call void @_Z7segDowniii(i32 noundef %44, i32 noundef %45, i32 noundef %46)
  %47 = load i32, ptr %8, align 4, !tbaa !5
  %48 = load i32, ptr %12, align 4, !tbaa !5
  %49 = icmp sle i32 %47, %48
  br i1 %49, label %50, label %58

50:                                               ; preds = %32
  %51 = load i32, ptr %6, align 4, !tbaa !5
  %52 = load i32, ptr %12, align 4, !tbaa !5
  %53 = load i32, ptr %8, align 4, !tbaa !5
  %54 = load i32, ptr %9, align 4, !tbaa !5
  %55 = call noundef i32 @_Z6segQueiiii(i32 noundef %51, i32 noundef %52, i32 noundef %53, i32 noundef %54)
  %56 = load i32, ptr %15, align 4, !tbaa !5
  %57 = add nsw i32 %56, %55
  store i32 %57, ptr %15, align 4, !tbaa !5
  br label %58

58:                                               ; preds = %50, %32
  %59 = load i32, ptr %9, align 4, !tbaa !5
  %60 = load i32, ptr %12, align 4, !tbaa !5
  %61 = icmp sgt i32 %59, %60
  br i1 %61, label %62, label %71

62:                                               ; preds = %58
  %63 = load i32, ptr %12, align 4, !tbaa !5
  %64 = add nsw i32 %63, 1
  %65 = load i32, ptr %7, align 4, !tbaa !5
  %66 = load i32, ptr %8, align 4, !tbaa !5
  %67 = load i32, ptr %9, align 4, !tbaa !5
  %68 = call noundef i32 @_Z6segQueiiii(i32 noundef %64, i32 noundef %65, i32 noundef %66, i32 noundef %67)
  %69 = load i32, ptr %15, align 4, !tbaa !5
  %70 = add nsw i32 %69, %68
  store i32 %70, ptr %15, align 4, !tbaa !5
  br label %71

71:                                               ; preds = %62, %58
  %72 = load i32, ptr %15, align 4, !tbaa !5
  store i32 %72, ptr %5, align 4
  store i32 1, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  br label %73

73:                                               ; preds = %71, %26
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  %74 = load i32, ptr %5, align 4
  ret i32 %74
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 4}
!10 = !{!"_ZTS4Node", !6, i64 0, !6, i64 4, !6, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Node = type { i32, i32, i32 }

@seg = external dso_local local_unnamed_addr global [200003 x %struct.Node], align 16

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z6segIdxii(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_Z7segDowniii(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z6segQueiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #1 {
  %5 = tail call noundef i32 @_Z6segIdxii(i32 noundef %0, i32 noundef %1)
  %.not44 = icmp sgt i32 %2, %0
  %.not36 = icmp sgt i32 %1, %3
  %or.cond45 = or i1 %.not36, %.not44
  br i1 %or.cond45, label %.lr.ph, label %tailrecurse._crit_edge

.lr.ph:                                           ; preds = %4
  br i1 %.not36, label %.lr.ph.split.us, label %.lr.ph.split

.lr.ph.split.us:                                  ; preds = %.lr.ph, %tailrecurse.us
  %6 = phi i32 [ %17, %tailrecurse.us ], [ %5, %.lr.ph ]
  %.tr47.us = phi i32 [ %10, %tailrecurse.us ], [ %0, %.lr.ph ]
  %accumulator.tr46.us = phi i32 [ %16, %tailrecurse.us ], [ 0, %.lr.ph ]
  %7 = add nsw i32 %.tr47.us, %1
  %8 = ashr i32 %7, 1
  %9 = tail call noundef i32 @_Z6segIdxii(i32 noundef %.tr47.us, i32 noundef %8)
  %10 = add nsw i32 %8, 1
  %11 = tail call noundef i32 @_Z6segIdxii(i32 noundef %10, i32 noundef %1)
  tail call void @_Z7segDowniii(i32 noundef %6, i32 noundef %9, i32 noundef %11)
  %.not37.us = icmp slt i32 %8, %2
  br i1 %.not37.us, label %14, label %12

12:                                               ; preds = %.lr.ph.split.us
  %13 = tail call noundef i32 @_Z6segQueiiii(i32 noundef %.tr47.us, i32 noundef %8, i32 noundef %2, i32 noundef %3)
  br label %14

14:                                               ; preds = %12, %.lr.ph.split.us
  %.0.us = phi i32 [ %13, %12 ], [ 0, %.lr.ph.split.us ]
  %15 = icmp slt i32 %8, %3
  br i1 %15, label %tailrecurse.us, label %.loopexit

tailrecurse.us:                                   ; preds = %14
  %16 = add nsw i32 %.0.us, %accumulator.tr46.us
  %17 = tail call noundef i32 @_Z6segIdxii(i32 noundef %10, i32 noundef %1)
  br label %.lr.ph.split.us

tailrecurse._crit_edge:                           ; preds = %tailrecurse, %4
  %accumulator.tr.lcssa = phi i32 [ 0, %4 ], [ %31, %tailrecurse ]
  %.lcssa = phi i32 [ %5, %4 ], [ %32, %tailrecurse ]
  %18 = sext i32 %.lcssa to i64
  %19 = getelementptr inbounds [200003 x %struct.Node], ptr @seg, i64 0, i64 %18, i32 1
  %20 = load i32, ptr %19, align 4, !tbaa !5
  br label %.loopexit

.lr.ph.split:                                     ; preds = %.lr.ph, %tailrecurse
  %21 = phi i32 [ %32, %tailrecurse ], [ %5, %.lr.ph ]
  %.tr47 = phi i32 [ %25, %tailrecurse ], [ %0, %.lr.ph ]
  %accumulator.tr46 = phi i32 [ %31, %tailrecurse ], [ 0, %.lr.ph ]
  %22 = add nsw i32 %.tr47, %1
  %23 = ashr i32 %22, 1
  %24 = tail call noundef i32 @_Z6segIdxii(i32 noundef %.tr47, i32 noundef %23)
  %25 = add nsw i32 %23, 1
  %26 = tail call noundef i32 @_Z6segIdxii(i32 noundef %25, i32 noundef %1)
  tail call void @_Z7segDowniii(i32 noundef %21, i32 noundef %24, i32 noundef %26)
  %.not37 = icmp slt i32 %23, %2
  br i1 %.not37, label %29, label %27

27:                                               ; preds = %.lr.ph.split
  %28 = tail call noundef i32 @_Z6segQueiiii(i32 noundef %.tr47, i32 noundef %23, i32 noundef %2, i32 noundef %3)
  br label %29

29:                                               ; preds = %27, %.lr.ph.split
  %.0 = phi i32 [ %28, %27 ], [ 0, %.lr.ph.split ]
  %30 = icmp slt i32 %23, %3
  br i1 %30, label %tailrecurse, label %.loopexit

tailrecurse:                                      ; preds = %29
  %31 = add nsw i32 %.0, %accumulator.tr46
  %32 = tail call noundef i32 @_Z6segIdxii(i32 noundef %25, i32 noundef %1)
  %.not = icmp slt i32 %25, %2
  br i1 %.not, label %.lr.ph.split, label %tailrecurse._crit_edge

.loopexit:                                        ; preds = %29, %14, %tailrecurse._crit_edge
  %accumulator.tr43 = phi i32 [ %accumulator.tr.lcssa, %tailrecurse._crit_edge ], [ %accumulator.tr46.us, %14 ], [ %accumulator.tr46, %29 ]
  %.032 = phi i32 [ %20, %tailrecurse._crit_edge ], [ %.0.us, %14 ], [ %.0, %29 ]
  %accumulator.ret.tr = add nsw i32 %.032, %accumulator.tr43
  ret i32 %accumulator.ret.tr
}

attributes #0 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"_ZTS4Node", !7, i64 0, !7, i64 4, !7, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass