; LLVM IR from tangjz/acm-icpc :: hdu/4754.ll (Z5solved)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Edge2 = type { i32, i32, i64 }

@N = external dso_local global i32, align 4
@M = external dso_local global i32, align 4
@S = external dso_local global i32, align 4
@T = external dso_local global i32, align 4
@lnk = external dso_local global [303 x i32], align 16
@cur = external dso_local global [303 x i32], align 16
@n = external dso_local global i32, align 4
@m = external dso_local global i32, align 4
@sum = external dso_local global [303 x i64], align 16
@mx = external dso_local global i64, align 8
@g = external dso_local global [90601 x %struct.Edge2], align 16

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z3bfsv() #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z3sgnd(double noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef double @_Z3dfsid(i32 noundef, double noundef) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z5solved(double noundef %0) #0 {
  %2 = alloca double, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca double, align 8
  %6 = alloca double, align 8
  store double %0, ptr %2, align 8, !tbaa !5
  %7 = load i32, ptr @n, align 4, !tbaa !9
  %8 = add nsw i32 %7, 2
  store i32 %8, ptr @N, align 4, !tbaa !9
  store i32 0, ptr @M, align 4, !tbaa !9
  %9 = load i32, ptr @N, align 4, !tbaa !9
  %10 = sub nsw i32 %9, 2
  store i32 %10, ptr @S, align 4, !tbaa !9
  %11 = load i32, ptr @N, align 4, !tbaa !9
  %12 = sub nsw i32 %11, 1
  store i32 %12, ptr @T, align 4, !tbaa !9
  %13 = load i32, ptr @N, align 4, !tbaa !9
  %14 = sext i32 %13 to i64
  %15 = mul i64 %14, 4
  call void @llvm.memset.p0.i64(ptr align 16 @lnk, i8 -1, i64 %15, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #6
  store i32 0, ptr %3, align 4, !tbaa !9
  br label %16

16:                                               ; preds = %37, %1
  %17 = load i32, ptr %3, align 4, !tbaa !9
  %18 = load i32, ptr @n, align 4, !tbaa !9
  %19 = icmp slt i32 %17, %18
  br i1 %19, label %21, label %20

20:                                               ; preds = %16
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #6
  br label %40

21:                                               ; preds = %16
  %22 = load i32, ptr @S, align 4, !tbaa !9
  %23 = load i32, ptr %3, align 4, !tbaa !9
  %24 = load i64, ptr @mx, align 8, !tbaa !11
  %25 = sitofp i64 %24 to double
  call void @_Z7addEdgeiidb(i32 noundef %22, i32 noundef %23, double noundef %25, i1 noundef zeroext false)
  %26 = load i32, ptr %3, align 4, !tbaa !9
  %27 = load i32, ptr @T, align 4, !tbaa !9
  %28 = load i64, ptr @mx, align 8, !tbaa !11
  %29 = load i32, ptr %3, align 4, !tbaa !9
  %30 = sext i32 %29 to i64
  %31 = getelementptr inbounds [303 x i64], ptr @sum, i64 0, i64 %30
  %32 = load i64, ptr %31, align 8, !tbaa !11
  %33 = sub nsw i64 %28, %32
  %34 = sitofp i64 %33 to double
  %35 = load double, ptr %2, align 8, !tbaa !5
  %36 = call double @llvm.fmuladd.f64(double 2.000000e+00, double %35, double %34)
  call void @_Z7addEdgeiidb(i32 noundef %26, i32 noundef %27, double noundef %36, i1 noundef zeroext false)
  br label %37

37:                                               ; preds = %21
  %38 = load i32, ptr %3, align 4, !tbaa !9
  %39 = add nsw i32 %38, 1
  store i32 %39, ptr %3, align 4, !tbaa !9
  br label %16, !llvm.loop !13

40:                                               ; preds = %20
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #6
  store i32 0, ptr %4, align 4, !tbaa !9
  br label %41

41:                                               ; preds = %71, %40
  %42 = load i32, ptr %4, align 4, !tbaa !9
  %43 = load i32, ptr @m, align 4, !tbaa !9
  %44 = icmp slt i32 %42, %43
  br i1 %44, label %46, label %45

45:                                               ; preds = %41
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #6
  br label %74

46:                                               ; preds = %41
  %47 = load i32, ptr %4, align 4, !tbaa !9
  %48 = sext i32 %47 to i64
  %49 = getelementptr inbounds [90601 x %struct.Edge2], ptr @g, i64 0, i64 %48
  %50 = getelementptr inbounds %struct.Edge2, ptr %49, i32 0, i32 2
  %51 = load i64, ptr %50, align 8, !tbaa !15
  %52 = icmp ne i64 %51, 0
  br i1 %52, label %53, label %70

53:                                               ; preds = %46
  %54 = load i32, ptr %4, align 4, !tbaa !9
  %55 = sext i32 %54 to i64
  %56 = getelementptr inbounds [90601 x %struct.Edge2], ptr @g, i64 0, i64 %55
  %57 = getelementptr inbounds %struct.Edge2, ptr %56, i32 0, i32 0
  %58 = load i32, ptr %57, align 16, !tbaa !17
  %59 = load i32, ptr %4, align 4, !tbaa !9
  %60 = sext i32 %59 to i64
  %61 = getelementptr inbounds [90601 x %struct.Edge2], ptr @g, i64 0, i64 %60
  %62 = getelementptr inbounds %struct.Edge2, ptr %61, i32 0, i32 1
  %63 = load i32, ptr %62, align 4, !tbaa !18
  %64 = load i32, ptr %4, align 4, !tbaa !9
  %65 = sext i32 %64 to i64
  %66 = getelementptr inbounds [90601 x %struct.Edge2], ptr @g, i64 0, i64 %65
  %67 = getelementptr inbounds %struct.Edge2, ptr %66, i32 0, i32 2
  %68 = load i64, ptr %67, align 8, !tbaa !15
  %69 = sitofp i64 %68 to double
  call void @_Z7addEdgeiidb(i32 noundef %58, i32 noundef %63, double noundef %69, i1 noundef zeroext true)
  br label %70

70:                                               ; preds = %53, %46
  br label %71

71:                                               ; preds = %70
  %72 = load i32, ptr %4, align 4, !tbaa !9
  %73 = add nsw i32 %72, 1
  store i32 %73, ptr %4, align 4, !tbaa !9
  br label %41, !llvm.loop !19

74:                                               ; preds = %45
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #6
  store double 0.000000e+00, ptr %5, align 8, !tbaa !5
  br label %75

75:                                               ; preds = %92, %74
  %76 = call noundef zeroext i1 @_Z3bfsv()
  br i1 %76, label %77, label %93

77:                                               ; preds = %75
  %78 = load i32, ptr @N, align 4, !tbaa !9
  %79 = sext i32 %78 to i64
  %80 = mul i64 %79, 4
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 @cur, ptr align 16 @lnk, i64 %80, i1 false)
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #6
  br label %81

81:                                               ; preds = %88, %77
  %82 = load i32, ptr @S, align 4, !tbaa !9
  %83 = call noundef double @_Z3dfsid(i32 noundef %82, double noundef 6.000000e+16)
  store double %83, ptr %6, align 8, !tbaa !5
  %84 = call noundef i32 @_Z3sgnd(double noundef %83)
  %85 = icmp sgt i32 %84, 0
  br i1 %85, label %87, label %86

86:                                               ; preds = %81
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #6
  br label %92

87:                                               ; preds = %81
  br label %88

88:                                               ; preds = %87
  %89 = load double, ptr %6, align 8, !tbaa !5
  %90 = load double, ptr %5, align 8, !tbaa !5
  %91 = fadd double %90, %89
  store double %91, ptr %5, align 8, !tbaa !5
  br label %81, !llvm.loop !20

92:                                               ; preds = %86
  br label %75, !llvm.loop !21

93:                                               ; preds = %75
  %94 = load double, ptr %5, align 8, !tbaa !5
  %95 = load i64, ptr @mx, align 8, !tbaa !11
  %96 = load i32, ptr @n, align 4, !tbaa !9
  %97 = sext i32 %96 to i64
  %98 = mul nsw i64 %95, %97
  %99 = sitofp i64 %98 to double
  %100 = fsub double %94, %99
  %101 = call noundef i32 @_Z3sgnd(double noundef %100)
  %102 = icmp sge i32 %101, 0
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #6
  ret i1 %102
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_Z7addEdgeiidb(i32 noundef, i32 noundef, double noundef, i1 noundef zeroext) #3

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #4

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #5

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long long", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{!16, !12, i64 8}
!16 = !{!"_ZTS5Edge2", !10, i64 0, !10, i64 4, !12, i64 8}
!17 = !{!16, !10, i64 0}
!18 = !{!16, !10, i64 4}
!19 = distinct !{!19, !14}
!20 = distinct !{!20, !14}
!21 = distinct !{!21, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Edge2 = type { i32, i32, i64 }

@N = external dso_local local_unnamed_addr global i32, align 4
@M = external dso_local local_unnamed_addr global i32, align 4
@S = external dso_local local_unnamed_addr global i32, align 4
@T = external dso_local local_unnamed_addr global i32, align 4
@lnk = external dso_local local_unnamed_addr global [303 x i32], align 16
@cur = external dso_local local_unnamed_addr global [303 x i32], align 16
@n = external dso_local local_unnamed_addr global i32, align 4
@m = external dso_local local_unnamed_addr global i32, align 4
@sum = external dso_local local_unnamed_addr global [303 x i64], align 16
@mx = external dso_local local_unnamed_addr global i64, align 8
@g = external dso_local local_unnamed_addr global [90601 x %struct.Edge2], align 16

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z3bfsv() local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z3sgnd(double noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare dso_local noundef double @_Z3dfsid(i32 noundef, double noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z5solved(double noundef %0) local_unnamed_addr #0 {
  %2 = load i32, ptr @n, align 4, !tbaa !5
  %3 = add nsw i32 %2, 2
  store i32 %3, ptr @N, align 4, !tbaa !5
  store i32 0, ptr @M, align 4, !tbaa !5
  store i32 %2, ptr @S, align 4, !tbaa !5
  %4 = add nsw i32 %2, 1
  store i32 %4, ptr @T, align 4, !tbaa !5
  %5 = sext i32 %3 to i64
  %6 = shl nsw i64 %5, 2
  tail call void @llvm.memset.p0.i64(ptr nonnull align 16 @lnk, i8 -1, i64 %6, i1 false)
  %7 = icmp sgt i32 %2, 0
  br i1 %7, label %.lr.ph, label %.preheader17

.preheader17:                                     ; preds = %.lr.ph, %1
  %8 = load i32, ptr @m, align 4, !tbaa !5
  %9 = icmp sgt i32 %8, 0
  br i1 %9, label %.lr.ph20, label %.preheader

.lr.ph:                                           ; preds = %1, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %1 ]
  %10 = load i32, ptr @S, align 4, !tbaa !5
  %11 = load i64, ptr @mx, align 8, !tbaa !9
  %12 = sitofp i64 %11 to double
  %13 = trunc nuw nsw i64 %indvars.iv to i32
  tail call void @_Z7addEdgeiidb(i32 noundef %10, i32 noundef %13, double noundef %12, i1 noundef zeroext false)
  %14 = load i32, ptr @T, align 4, !tbaa !5
  %15 = load i64, ptr @mx, align 8, !tbaa !9
  %16 = getelementptr inbounds [303 x i64], ptr @sum, i64 0, i64 %indvars.iv
  %17 = load i64, ptr %16, align 8, !tbaa !9
  %18 = sub nsw i64 %15, %17
  %19 = sitofp i64 %18 to double
  %20 = tail call double @llvm.fmuladd.f64(double %0, double 2.000000e+00, double %19)
  tail call void @_Z7addEdgeiidb(i32 noundef %13, i32 noundef %14, double noundef %20, i1 noundef zeroext false)
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %21 = load i32, ptr @n, align 4, !tbaa !5
  %22 = sext i32 %21 to i64
  %23 = icmp slt i64 %indvars.iv.next, %22
  br i1 %23, label %.lr.ph, label %.preheader17, !llvm.loop !11

.preheader:                                       ; preds = %34, %.preheader17
  %24 = tail call noundef zeroext i1 @_Z3bfsv()
  br i1 %24, label %.lr.ph24, label %._crit_edge

.lr.ph20:                                         ; preds = %.preheader17, %34
  %25 = phi i32 [ %35, %34 ], [ %8, %.preheader17 ]
  %indvars.iv27 = phi i64 [ %indvars.iv.next28, %34 ], [ 0, %.preheader17 ]
  %26 = getelementptr inbounds [90601 x %struct.Edge2], ptr @g, i64 0, i64 %indvars.iv27
  %27 = getelementptr inbounds i8, ptr %26, i64 8
  %28 = load i64, ptr %27, align 8, !tbaa !13
  %.not = icmp eq i64 %28, 0
  br i1 %.not, label %34, label %29

29:                                               ; preds = %.lr.ph20
  %30 = load i32, ptr %26, align 16, !tbaa !15
  %31 = getelementptr inbounds i8, ptr %26, i64 4
  %32 = load i32, ptr %31, align 4, !tbaa !16
  %33 = sitofp i64 %28 to double
  tail call void @_Z7addEdgeiidb(i32 noundef %30, i32 noundef %32, double noundef %33, i1 noundef zeroext true)
  %.pre = load i32, ptr @m, align 4, !tbaa !5
  br label %34

34:                                               ; preds = %.lr.ph20, %29
  %35 = phi i32 [ %25, %.lr.ph20 ], [ %.pre, %29 ]
  %indvars.iv.next28 = add nuw nsw i64 %indvars.iv27, 1
  %36 = sext i32 %35 to i64
  %37 = icmp slt i64 %indvars.iv.next28, %36
  br i1 %37, label %.lr.ph20, label %.preheader, !llvm.loop !17

.loopexit:                                        ; preds = %.lr.ph22, %.lr.ph24
  %.1.lcssa = phi double [ %.01423, %.lr.ph24 ], [ %47, %.lr.ph22 ]
  %38 = tail call noundef zeroext i1 @_Z3bfsv()
  br i1 %38, label %.lr.ph24, label %._crit_edge, !llvm.loop !18

.lr.ph24:                                         ; preds = %.preheader, %.loopexit
  %.01423 = phi double [ %.1.lcssa, %.loopexit ], [ 0.000000e+00, %.preheader ]
  %39 = load i32, ptr @N, align 4, !tbaa !5
  %40 = sext i32 %39 to i64
  %41 = shl nsw i64 %40, 2
  tail call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 16 @cur, ptr nonnull align 16 @lnk, i64 %41, i1 false)
  %42 = load i32, ptr @S, align 4, !tbaa !5
  %43 = tail call noundef double @_Z3dfsid(i32 noundef %42, double noundef 6.000000e+16)
  %44 = tail call noundef i32 @_Z3sgnd(double noundef %43)
  %45 = icmp sgt i32 %44, 0
  br i1 %45, label %.lr.ph22, label %.loopexit

.lr.ph22:                                         ; preds = %.lr.ph24, %.lr.ph22
  %46 = phi double [ %49, %.lr.ph22 ], [ %43, %.lr.ph24 ]
  %.121 = phi double [ %47, %.lr.ph22 ], [ %.01423, %.lr.ph24 ]
  %47 = fadd double %.121, %46
  %48 = load i32, ptr @S, align 4, !tbaa !5
  %49 = tail call noundef double @_Z3dfsid(i32 noundef %48, double noundef 6.000000e+16)
  %50 = tail call noundef i32 @_Z3sgnd(double noundef %49)
  %51 = icmp sgt i32 %50, 0
  br i1 %51, label %.lr.ph22, label %.loopexit, !llvm.loop !19

._crit_edge:                                      ; preds = %.loopexit, %.preheader
  %.014.lcssa = phi double [ 0.000000e+00, %.preheader ], [ %.1.lcssa, %.loopexit ]
  %52 = load i64, ptr @mx, align 8, !tbaa !9
  %53 = load i32, ptr @n, align 4, !tbaa !5
  %54 = sext i32 %53 to i64
  %55 = mul nsw i64 %52, %54
  %56 = sitofp i64 %55 to double
  %57 = fsub double %.014.lcssa, %56
  %58 = tail call noundef i32 @_Z3sgnd(double noundef %57)
  %59 = icmp sgt i32 %58, -1
  ret i1 %59
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_Z7addEdgeiidb(i32 noundef, i32 noundef, double noundef, i1 noundef zeroext) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #3

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #4

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!14, !10, i64 8}
!14 = !{!"_ZTS5Edge2", !6, i64 0, !6, i64 4, !10, i64 8}
!15 = !{!14, !6, i64 0}
!16 = !{!14, !6, i64 4}
!17 = distinct !{!17, !12}
!18 = distinct !{!18, !12}
!19 = distinct !{!19, !12}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass