; LLVM IR from mitdbg/deneva :: benchmarks/tpcc_helper.ll (Z6NURandmmm)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZZ6NURandmmmE10C_255_init = external hidden global i8, align 1
@_ZZ6NURandmmmE11C_1023_init = external hidden global i8, align 1
@_ZZ6NURandmmmE11C_8191_init = external hidden global i8, align 1
@_ZZ6NURandmmmE5C_255 = external hidden global i64, align 8
@_ZZ6NURandmmmE6C_1023 = external hidden global i64, align 8
@_ZZ6NURandmmmE6C_8191 = external hidden global i64, align 8
@.str.10 = external hidden unnamed_addr constant [36 x i8], align 1
@.str.11 = external hidden unnamed_addr constant [74 x i8], align 1
@.str.12 = external hidden unnamed_addr constant [15 x i8], align 1
@stdout = external global ptr, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z5URandmm(i64 noundef, i64 noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z6NURandmmm(i64 noundef %0, i64 noundef %1, i64 noundef %2) #2 {
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i32, align 4
  store i64 %0, ptr %4, align 8, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !5
  store i64 %2, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  store i32 0, ptr %7, align 4, !tbaa !9
  %8 = load i64, ptr %4, align 8, !tbaa !5
  switch i64 %8, label %33 [
    i64 255, label %9
    i64 1023, label %17
    i64 8191, label %25
  ]

9:                                                ; preds = %3
  %10 = load i8, ptr @_ZZ6NURandmmmE10C_255_init, align 1, !tbaa !11, !range !13, !noundef !14
  %11 = trunc i8 %10 to i1
  br i1 %11, label %14, label %12

12:                                               ; preds = %9
  %13 = call noundef i64 @_Z5URandmm(i64 noundef 0, i64 noundef 255)
  store i64 %13, ptr @_ZZ6NURandmmmE5C_255, align 8, !tbaa !5
  store i8 1, ptr @_ZZ6NURandmmmE10C_255_init, align 1, !tbaa !11
  br label %14

14:                                               ; preds = %12, %9
  %15 = load i64, ptr @_ZZ6NURandmmmE5C_255, align 8, !tbaa !5
  %16 = trunc i64 %15 to i32
  store i32 %16, ptr %7, align 4, !tbaa !9
  br label %37

17:                                               ; preds = %3
  %18 = load i8, ptr @_ZZ6NURandmmmE11C_1023_init, align 1, !tbaa !11, !range !13, !noundef !14
  %19 = trunc i8 %18 to i1
  br i1 %19, label %22, label %20

20:                                               ; preds = %17
  %21 = call noundef i64 @_Z5URandmm(i64 noundef 0, i64 noundef 1023)
  store i64 %21, ptr @_ZZ6NURandmmmE6C_1023, align 8, !tbaa !5
  store i8 1, ptr @_ZZ6NURandmmmE11C_1023_init, align 1, !tbaa !11
  br label %22

22:                                               ; preds = %20, %17
  %23 = load i64, ptr @_ZZ6NURandmmmE6C_1023, align 8, !tbaa !5
  %24 = trunc i64 %23 to i32
  store i32 %24, ptr %7, align 4, !tbaa !9
  br label %37

25:                                               ; preds = %3
  %26 = load i8, ptr @_ZZ6NURandmmmE11C_8191_init, align 1, !tbaa !11, !range !13, !noundef !14
  %27 = trunc i8 %26 to i1
  br i1 %27, label %30, label %28

28:                                               ; preds = %25
  %29 = call noundef i64 @_Z5URandmm(i64 noundef 0, i64 noundef 8191)
  store i64 %29, ptr @_ZZ6NURandmmmE6C_8191, align 8, !tbaa !5
  store i8 1, ptr @_ZZ6NURandmmmE11C_8191_init, align 1, !tbaa !11
  br label %30

30:                                               ; preds = %28, %25
  %31 = load i64, ptr @_ZZ6NURandmmmE6C_8191, align 8, !tbaa !5
  %32 = trunc i64 %31 to i32
  store i32 %32, ptr %7, align 4, !tbaa !9
  br label %37

33:                                               ; preds = %3
  %34 = call i32 (ptr, ...) @printf(ptr noundef @.str.10, ptr noundef @.str.11, i32 noundef 130, ptr noundef @.str.12)
  %35 = load ptr, ptr @stdout, align 8, !tbaa !15
  %36 = call i32 @fflush(ptr noundef %35)
  call void @exit(i32 noundef 0) #6
  unreachable

37:                                               ; preds = %30, %22, %14
  %38 = load i64, ptr %4, align 8, !tbaa !5
  %39 = call noundef i64 @_Z5URandmm(i64 noundef 0, i64 noundef %38)
  %40 = load i64, ptr %5, align 8, !tbaa !5
  %41 = load i64, ptr %6, align 8, !tbaa !5
  %42 = call noundef i64 @_Z5URandmm(i64 noundef %40, i64 noundef %41)
  %43 = or i64 %39, %42
  %44 = load i32, ptr %7, align 4, !tbaa !9
  %45 = sext i32 %44 to i64
  %46 = add i64 %43, %45
  %47 = load i64, ptr %6, align 8, !tbaa !5
  %48 = load i64, ptr %5, align 8, !tbaa !5
  %49 = sub i64 %47, %48
  %50 = add i64 %49, 1
  %51 = urem i64 %46, %50
  %52 = load i64, ptr %5, align 8, !tbaa !5
  %53 = add i64 %51, %52
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  ret i64 %53
}

declare i32 @printf(ptr noundef, ...) #3

declare i32 @fflush(ptr noundef) #3

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) #4

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{i8 0, i8 2}
!14 = !{}
!15 = !{!16, !16, i64 0}
!16 = !{!"any pointer", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZZ6NURandmmmE10C_255_init = external hidden local_unnamed_addr global i8, align 1
@_ZZ6NURandmmmE11C_1023_init = external hidden local_unnamed_addr global i8, align 1
@_ZZ6NURandmmmE11C_8191_init = external hidden local_unnamed_addr global i8, align 1
@_ZZ6NURandmmmE5C_255 = external hidden local_unnamed_addr global i64, align 8
@_ZZ6NURandmmmE6C_1023 = external hidden local_unnamed_addr global i64, align 8
@_ZZ6NURandmmmE6C_8191 = external hidden local_unnamed_addr global i64, align 8
@.str.10 = external hidden unnamed_addr constant [36 x i8], align 1
@.str.11 = external hidden unnamed_addr constant [74 x i8], align 1
@.str.12 = external hidden unnamed_addr constant [15 x i8], align 1
@stdout = external local_unnamed_addr global ptr, align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z5URandmm(i64 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z6NURandmmm(i64 noundef %0, i64 noundef %1, i64 noundef %2) local_unnamed_addr #0 {
  switch i64 %0, label %13 [
    i64 255, label %4
    i64 1023, label %7
    i64 8191, label %10
  ]

4:                                                ; preds = %3
  %5 = load i8, ptr @_ZZ6NURandmmmE10C_255_init, align 1, !tbaa !5, !range !9, !noundef !10
  %6 = trunc nuw i8 %5 to i1
  br i1 %6, label %18, label %.sink.split

7:                                                ; preds = %3
  %8 = load i8, ptr @_ZZ6NURandmmmE11C_1023_init, align 1, !tbaa !5, !range !9, !noundef !10
  %9 = trunc nuw i8 %8 to i1
  br i1 %9, label %18, label %.sink.split

10:                                               ; preds = %3
  %11 = load i8, ptr @_ZZ6NURandmmmE11C_8191_init, align 1, !tbaa !5, !range !9, !noundef !10
  %12 = trunc nuw i8 %11 to i1
  br i1 %12, label %18, label %.sink.split

13:                                               ; preds = %3
  %14 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.10, ptr noundef nonnull @.str.11, i32 noundef 130, ptr noundef nonnull @.str.12)
  %15 = load ptr, ptr @stdout, align 8, !tbaa !11
  %16 = tail call i32 @fflush(ptr noundef %15)
  tail call void @exit(i32 noundef 0) #3
  unreachable

.sink.split:                                      ; preds = %10, %7, %4
  %_ZZ6NURandmmmE6C_8191.sink = phi ptr [ @_ZZ6NURandmmmE5C_255, %4 ], [ @_ZZ6NURandmmmE6C_1023, %7 ], [ @_ZZ6NURandmmmE6C_8191, %10 ]
  %_ZZ6NURandmmmE11C_8191_init.sink = phi ptr [ @_ZZ6NURandmmmE10C_255_init, %4 ], [ @_ZZ6NURandmmmE11C_1023_init, %7 ], [ @_ZZ6NURandmmmE11C_8191_init, %10 ]
  %17 = tail call noundef i64 @_Z5URandmm(i64 noundef 0, i64 noundef %0)
  store i64 %17, ptr %_ZZ6NURandmmmE6C_8191.sink, align 8, !tbaa !13
  store i8 1, ptr %_ZZ6NURandmmmE11C_8191_init.sink, align 1, !tbaa !5
  br label %18

18:                                               ; preds = %.sink.split, %10, %7, %4
  %.0.in.in = phi ptr [ @_ZZ6NURandmmmE5C_255, %4 ], [ @_ZZ6NURandmmmE6C_1023, %7 ], [ @_ZZ6NURandmmmE6C_8191, %10 ], [ %_ZZ6NURandmmmE6C_8191.sink, %.sink.split ]
  %.0.in = load i64, ptr %.0.in.in, align 8, !tbaa !13
  %19 = tail call noundef i64 @_Z5URandmm(i64 noundef 0, i64 noundef %0)
  %20 = tail call noundef i64 @_Z5URandmm(i64 noundef %1, i64 noundef %2)
  %21 = or i64 %20, %19
  %sext = shl i64 %.0.in, 32
  %22 = ashr exact i64 %sext, 32
  %23 = add i64 %21, %22
  %reass.sub = sub i64 %2, %1
  %24 = add i64 %reass.sub, 1
  %25 = urem i64 %23, %24
  %26 = add i64 %25, %1
  ret i64 %26
}

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #1

; Function Attrs: nofree nounwind
declare noundef i32 @fflush(ptr nocapture noundef) local_unnamed_addr #1

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) local_unnamed_addr #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"bool", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{i8 0, i8 2}
!10 = !{}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"long", !7, i64 0}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass