; LLVM IR from tangjz/acm-icpc :: lydsy (3894)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@N = external dso_local global i32, align 4
@M = external dso_local global i32, align 4
@S = external dso_local global i32, align 4
@T = external dso_local global i32, align 4
@lnk = external dso_local global [30003 x i32], align 16
@cur = external dso_local global [30003 x i32], align 16
@ans = external dso_local global i32, align 4
@.str = external hidden unnamed_addr constant [5 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [3 x i8], align 1
@_ZL1d = external hidden constant [5 x [2 x i32]], align 16
@.str.2 = external hidden unnamed_addr constant [4 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z7addEdgeiii(i32 noundef, i32 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z3bfsv() #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z3dfsii(i32 noundef, i32 noundef) #4

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #5 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #7
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #7
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #7
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #7
  %26 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef %2, ptr noundef %3)
  %27 = load i32, ptr %2, align 4, !tbaa !5
  %28 = load i32, ptr %3, align 4, !tbaa !5
  %29 = mul nsw i32 %27, %28
  store i32 %29, ptr %4, align 4, !tbaa !5
  %30 = load i32, ptr %4, align 4, !tbaa !5
  %31 = mul nsw i32 %30, 3
  %32 = add nsw i32 %31, 2
  store i32 %32, ptr @N, align 4, !tbaa !5
  store i32 0, ptr @M, align 4, !tbaa !5
  %33 = load i32, ptr @N, align 4, !tbaa !5
  %34 = sub nsw i32 %33, 2
  store i32 %34, ptr @S, align 4, !tbaa !5
  %35 = load i32, ptr @N, align 4, !tbaa !5
  %36 = sub nsw i32 %35, 1
  store i32 %36, ptr @T, align 4, !tbaa !5
  %37 = load i32, ptr @N, align 4, !tbaa !5
  %38 = sext i32 %37 to i64
  %39 = mul i64 %38, 4
  call void @llvm.memset.p0.i64(ptr align 16 @lnk, i8 -1, i64 %39, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #7
  store i32 0, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #7
  store i32 0, ptr %7, align 4, !tbaa !5
  br label %40

40:                                               ; preds = %65, %0
  %41 = load i32, ptr %6, align 4, !tbaa !5
  %42 = load i32, ptr %2, align 4, !tbaa !5
  %43 = icmp slt i32 %41, %42
  br i1 %43, label %45, label %44

44:                                               ; preds = %40
  store i32 2, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #7
  br label %68

45:                                               ; preds = %40
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #7
  store i32 0, ptr %9, align 4, !tbaa !5
  br label %46

46:                                               ; preds = %59, %45
  %47 = load i32, ptr %9, align 4, !tbaa !5
  %48 = load i32, ptr %3, align 4, !tbaa !5
  %49 = icmp slt i32 %47, %48
  br i1 %49, label %51, label %50

50:                                               ; preds = %46
  store i32 5, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #7
  br label %64

51:                                               ; preds = %46
  %52 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str.1, ptr noundef %5)
  %53 = load i32, ptr %5, align 4, !tbaa !5
  %54 = load i32, ptr @ans, align 4, !tbaa !5
  %55 = add nsw i32 %54, %53
  store i32 %55, ptr @ans, align 4, !tbaa !5
  %56 = load i32, ptr @S, align 4, !tbaa !5
  %57 = load i32, ptr %7, align 4, !tbaa !5
  %58 = load i32, ptr %5, align 4, !tbaa !5
  call void @_Z7addEdgeiii(i32 noundef %56, i32 noundef %57, i32 noundef %58)
  br label %59

59:                                               ; preds = %51
  %60 = load i32, ptr %9, align 4, !tbaa !5
  %61 = add nsw i32 %60, 1
  store i32 %61, ptr %9, align 4, !tbaa !5
  %62 = load i32, ptr %7, align 4, !tbaa !5
  %63 = add nsw i32 %62, 1
  store i32 %63, ptr %7, align 4, !tbaa !5
  br label %46, !llvm.loop !9

64:                                               ; preds = %50
  br label %65

65:                                               ; preds = %64
  %66 = load i32, ptr %6, align 4, !tbaa !5
  %67 = add nsw i32 %66, 1
  store i32 %67, ptr %6, align 4, !tbaa !5
  br label %40, !llvm.loop !11

68:                                               ; preds = %44
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #7
  store i32 0, ptr %10, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #7
  store i32 0, ptr %11, align 4, !tbaa !5
  br label %69

69:                                               ; preds = %94, %68
  %70 = load i32, ptr %10, align 4, !tbaa !5
  %71 = load i32, ptr %2, align 4, !tbaa !5
  %72 = icmp slt i32 %70, %71
  br i1 %72, label %74, label %73

73:                                               ; preds = %69
  store i32 8, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #7
  br label %97

74:                                               ; preds = %69
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #7
  store i32 0, ptr %12, align 4, !tbaa !5
  br label %75

75:                                               ; preds = %88, %74
  %76 = load i32, ptr %12, align 4, !tbaa !5
  %77 = load i32, ptr %3, align 4, !tbaa !5
  %78 = icmp slt i32 %76, %77
  br i1 %78, label %80, label %79

79:                                               ; preds = %75
  store i32 11, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #7
  br label %93

80:                                               ; preds = %75
  %81 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str.1, ptr noundef %5)
  %82 = load i32, ptr %5, align 4, !tbaa !5
  %83 = load i32, ptr @ans, align 4, !tbaa !5
  %84 = add nsw i32 %83, %82
  store i32 %84, ptr @ans, align 4, !tbaa !5
  %85 = load i32, ptr %11, align 4, !tbaa !5
  %86 = load i32, ptr @T, align 4, !tbaa !5
  %87 = load i32, ptr %5, align 4, !tbaa !5
  call void @_Z7addEdgeiii(i32 noundef %85, i32 noundef %86, i32 noundef %87)
  br label %88

88:                                               ; preds = %80
  %89 = load i32, ptr %12, align 4, !tbaa !5
  %90 = add nsw i32 %89, 1
  store i32 %90, ptr %12, align 4, !tbaa !5
  %91 = load i32, ptr %11, align 4, !tbaa !5
  %92 = add nsw i32 %91, 1
  store i32 %92, ptr %11, align 4, !tbaa !5
  br label %75, !llvm.loop !12

93:                                               ; preds = %79
  br label %94

94:                                               ; preds = %93
  %95 = load i32, ptr %10, align 4, !tbaa !5
  %96 = add nsw i32 %95, 1
  store i32 %96, ptr %10, align 4, !tbaa !5
  br label %69, !llvm.loop !13

97:                                               ; preds = %73
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #7
  store i32 0, ptr %13, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #7
  store i32 0, ptr %14, align 4, !tbaa !5
  br label %98

98:                                               ; preds = %171, %97
  %99 = load i32, ptr %13, align 4, !tbaa !5
  %100 = load i32, ptr %2, align 4, !tbaa !5
  %101 = icmp slt i32 %99, %100
  br i1 %101, label %103, label %102

102:                                              ; preds = %98
  store i32 14, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #7
  br label %174

103:                                              ; preds = %98
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #7
  store i32 0, ptr %15, align 4, !tbaa !5
  br label %104

104:                                              ; preds = %165, %103
  %105 = load i32, ptr %15, align 4, !tbaa !5
  %106 = load i32, ptr %3, align 4, !tbaa !5
  %107 = icmp slt i32 %105, %106
  br i1 %107, label %109, label %108

108:                                              ; preds = %104
  store i32 17, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #7
  br label %170

109:                                              ; preds = %104
  %110 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str.1, ptr noundef %5)
  %111 = load i32, ptr %5, align 4, !tbaa !5
  %112 = load i32, ptr @ans, align 4, !tbaa !5
  %113 = add nsw i32 %112, %111
  store i32 %113, ptr @ans, align 4, !tbaa !5
  %114 = load i32, ptr @S, align 4, !tbaa !5
  %115 = load i32, ptr %4, align 4, !tbaa !5
  %116 = load i32, ptr %14, align 4, !tbaa !5
  %117 = add nsw i32 %115, %116
  %118 = load i32, ptr %5, align 4, !tbaa !5
  call void @_Z7addEdgeiii(i32 noundef %114, i32 noundef %117, i32 noundef %118)
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #7
  store i32 0, ptr %16, align 4, !tbaa !5
  br label %119

119:                                              ; preds = %161, %109
  %120 = load i32, ptr %16, align 4, !tbaa !5
  %121 = icmp sle i32 %120, 4
  br i1 %121, label %123, label %122

122:                                              ; preds = %119
  store i32 20, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #7
  br label %164

123:                                              ; preds = %119
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #7
  %124 = load i32, ptr %13, align 4, !tbaa !5
  %125 = load i32, ptr %16, align 4, !tbaa !5
  %126 = sext i32 %125 to i64
  %127 = getelementptr inbounds [5 x [2 x i32]], ptr @_ZL1d, i64 0, i64 %126
  %128 = getelementptr inbounds [2 x i32], ptr %127, i64 0, i64 0
  %129 = load i32, ptr %128, align 8, !tbaa !5
  %130 = add nsw i32 %124, %129
  store i32 %130, ptr %17, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #7
  %131 = load i32, ptr %15, align 4, !tbaa !5
  %132 = load i32, ptr %16, align 4, !tbaa !5
  %133 = sext i32 %132 to i64
  %134 = getelementptr inbounds [5 x [2 x i32]], ptr @_ZL1d, i64 0, i64 %133
  %135 = getelementptr inbounds [2 x i32], ptr %134, i64 0, i64 1
  %136 = load i32, ptr %135, align 4, !tbaa !5
  %137 = add nsw i32 %131, %136
  store i32 %137, ptr %18, align 4, !tbaa !5
  %138 = load i32, ptr %17, align 4, !tbaa !5
  %139 = icmp sge i32 %138, 0
  br i1 %139, label %140, label %160

140:                                              ; preds = %123
  %141 = load i32, ptr %17, align 4, !tbaa !5
  %142 = load i32, ptr %2, align 4, !tbaa !5
  %143 = icmp slt i32 %141, %142
  br i1 %143, label %144, label %160

144:                                              ; preds = %140
  %145 = load i32, ptr %18, align 4, !tbaa !5
  %146 = icmp sge i32 %145, 0
  br i1 %146, label %147, label %160

147:                                              ; preds = %144
  %148 = load i32, ptr %18, align 4, !tbaa !5
  %149 = load i32, ptr %3, align 4, !tbaa !5
  %150 = icmp slt i32 %148, %149
  br i1 %150, label %151, label %160

151:                                              ; preds = %147
  %152 = load i32, ptr %4, align 4, !tbaa !5
  %153 = load i32, ptr %14, align 4, !tbaa !5
  %154 = add nsw i32 %152, %153
  %155 = load i32, ptr %17, align 4, !tbaa !5
  %156 = load i32, ptr %3, align 4, !tbaa !5
  %157 = mul nsw i32 %155, %156
  %158 = load i32, ptr %18, align 4, !tbaa !5
  %159 = add nsw i32 %157, %158
  call void @_Z7addEdgeiii(i32 noundef %154, i32 noundef %159, i32 noundef 1061109567)
  br label %160

160:                                              ; preds = %151, %147, %144, %140, %123
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #7
  br label %161

161:                                              ; preds = %160
  %162 = load i32, ptr %16, align 4, !tbaa !5
  %163 = add nsw i32 %162, 1
  store i32 %163, ptr %16, align 4, !tbaa !5
  br label %119, !llvm.loop !14

164:                                              ; preds = %122
  br label %165

165:                                              ; preds = %164
  %166 = load i32, ptr %15, align 4, !tbaa !5
  %167 = add nsw i32 %166, 1
  store i32 %167, ptr %15, align 4, !tbaa !5
  %168 = load i32, ptr %14, align 4, !tbaa !5
  %169 = add nsw i32 %168, 1
  store i32 %169, ptr %14, align 4, !tbaa !5
  br label %104, !llvm.loop !15

170:                                              ; preds = %108
  br label %171

171:                                              ; preds = %170
  %172 = load i32, ptr %13, align 4, !tbaa !5
  %173 = add nsw i32 %172, 1
  store i32 %173, ptr %13, align 4, !tbaa !5
  br label %98, !llvm.loop !16

174:                                              ; preds = %102
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #7
  store i32 0, ptr %19, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #7
  store i32 0, ptr %20, align 4, !tbaa !5
  br label %175

175:                                              ; preds = %252, %174
  %176 = load i32, ptr %19, align 4, !tbaa !5
  %177 = load i32, ptr %2, align 4, !tbaa !5
  %178 = icmp slt i32 %176, %177
  br i1 %178, label %180, label %179

179:                                              ; preds = %175
  store i32 23, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #7
  br label %255

180:                                              ; preds = %175
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #7
  store i32 0, ptr %21, align 4, !tbaa !5
  br label %181

181:                                              ; preds = %246, %180
  %182 = load i32, ptr %21, align 4, !tbaa !5
  %183 = load i32, ptr %3, align 4, !tbaa !5
  %184 = icmp slt i32 %182, %183
  br i1 %184, label %186, label %185

185:                                              ; preds = %181
  store i32 26, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #7
  br label %251

186:                                              ; preds = %181
  %187 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str.1, ptr noundef %5)
  %188 = load i32, ptr %5, align 4, !tbaa !5
  %189 = load i32, ptr @ans, align 4, !tbaa !5
  %190 = add nsw i32 %189, %188
  store i32 %190, ptr @ans, align 4, !tbaa !5
  %191 = load i32, ptr %4, align 4, !tbaa !5
  %192 = load i32, ptr %4, align 4, !tbaa !5
  %193 = add nsw i32 %191, %192
  %194 = load i32, ptr %20, align 4, !tbaa !5
  %195 = add nsw i32 %193, %194
  %196 = load i32, ptr @T, align 4, !tbaa !5
  %197 = load i32, ptr %5, align 4, !tbaa !5
  call void @_Z7addEdgeiii(i32 noundef %195, i32 noundef %196, i32 noundef %197)
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #7
  store i32 0, ptr %22, align 4, !tbaa !5
  br label %198

198:                                              ; preds = %242, %186
  %199 = load i32, ptr %22, align 4, !tbaa !5
  %200 = icmp sle i32 %199, 4
  br i1 %200, label %202, label %201

201:                                              ; preds = %198
  store i32 29, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #7
  br label %245

202:                                              ; preds = %198
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #7
  %203 = load i32, ptr %19, align 4, !tbaa !5
  %204 = load i32, ptr %22, align 4, !tbaa !5
  %205 = sext i32 %204 to i64
  %206 = getelementptr inbounds [5 x [2 x i32]], ptr @_ZL1d, i64 0, i64 %205
  %207 = getelementptr inbounds [2 x i32], ptr %206, i64 0, i64 0
  %208 = load i32, ptr %207, align 8, !tbaa !5
  %209 = add nsw i32 %203, %208
  store i32 %209, ptr %23, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #7
  %210 = load i32, ptr %21, align 4, !tbaa !5
  %211 = load i32, ptr %22, align 4, !tbaa !5
  %212 = sext i32 %211 to i64
  %213 = getelementptr inbounds [5 x [2 x i32]], ptr @_ZL1d, i64 0, i64 %212
  %214 = getelementptr inbounds [2 x i32], ptr %213, i64 0, i64 1
  %215 = load i32, ptr %214, align 4, !tbaa !5
  %216 = add nsw i32 %210, %215
  store i32 %216, ptr %24, align 4, !tbaa !5
  %217 = load i32, ptr %23, align 4, !tbaa !5
  %218 = icmp sge i32 %217, 0
  br i1 %218, label %219, label %241

219:                                              ; preds = %202
  %220 = load i32, ptr %23, align 4, !tbaa !5
  %221 = load i32, ptr %2, align 4, !tbaa !5
  %222 = icmp slt i32 %220, %221
  br i1 %222, label %223, label %241

223:                                              ; preds = %219
  %224 = load i32, ptr %24, align 4, !tbaa !5
  %225 = icmp sge i32 %224, 0
  br i1 %225, label %226, label %241

226:                                              ; preds = %223
  %227 = load i32, ptr %24, align 4, !tbaa !5
  %228 = load i32, ptr %3, align 4, !tbaa !5
  %229 = icmp slt i32 %227, %228
  br i1 %229, label %230, label %241

230:                                              ; preds = %226
  %231 = load i32, ptr %23, align 4, !tbaa !5
  %232 = load i32, ptr %3, align 4, !tbaa !5
  %233 = mul nsw i32 %231, %232
  %234 = load i32, ptr %24, align 4, !tbaa !5
  %235 = add nsw i32 %233, %234
  %236 = load i32, ptr %4, align 4, !tbaa !5
  %237 = load i32, ptr %4, align 4, !tbaa !5
  %238 = add nsw i32 %236, %237
  %239 = load i32, ptr %20, align 4, !tbaa !5
  %240 = add nsw i32 %238, %239
  call void @_Z7addEdgeiii(i32 noundef %235, i32 noundef %240, i32 noundef 1061109567)
  br label %241

241:                                              ; preds = %230, %226, %223, %219, %202
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #7
  br label %242

242:                                              ; preds = %241
  %243 = load i32, ptr %22, align 4, !tbaa !5
  %244 = add nsw i32 %243, 1
  store i32 %244, ptr %22, align 4, !tbaa !5
  br label %198, !llvm.loop !17

245:                                              ; preds = %201
  br label %246

246:                                              ; preds = %245
  %247 = load i32, ptr %21, align 4, !tbaa !5
  %248 = add nsw i32 %247, 1
  store i32 %248, ptr %21, align 4, !tbaa !5
  %249 = load i32, ptr %20, align 4, !tbaa !5
  %250 = add nsw i32 %249, 1
  store i32 %250, ptr %20, align 4, !tbaa !5
  br label %181, !llvm.loop !18

251:                                              ; preds = %185
  br label %252

252:                                              ; preds = %251
  %253 = load i32, ptr %19, align 4, !tbaa !5
  %254 = add nsw i32 %253, 1
  store i32 %254, ptr %19, align 4, !tbaa !5
  br label %175, !llvm.loop !19

255:                                              ; preds = %179
  br label %256

256:                                              ; preds = %272, %255
  %257 = call noundef zeroext i1 @_Z3bfsv()
  br i1 %257, label %258, label %273

258:                                              ; preds = %256
  %259 = load i32, ptr @N, align 4, !tbaa !5
  %260 = sext i32 %259 to i64
  %261 = mul i64 %260, 4
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 @cur, ptr align 16 @lnk, i64 %261, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #7
  br label %262

262:                                              ; preds = %268, %258
  %263 = load i32, ptr @S, align 4, !tbaa !5
  %264 = call noundef i32 @_Z3dfsii(i32 noundef %263, i32 noundef 1061109567)
  store i32 %264, ptr %25, align 4, !tbaa !5
  %265 = icmp sgt i32 %264, 0
  br i1 %265, label %267, label %266

266:                                              ; preds = %262
  store i32 34, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #7
  br label %272

267:                                              ; preds = %262
  br label %268

268:                                              ; preds = %267
  %269 = load i32, ptr %25, align 4, !tbaa !5
  %270 = load i32, ptr @ans, align 4, !tbaa !5
  %271 = sub nsw i32 %270, %269
  store i32 %271, ptr @ans, align 4, !tbaa !5
  br label %262, !llvm.loop !20

272:                                              ; preds = %266
  br label %256, !llvm.loop !21

273:                                              ; preds = %256
  %274 = load i32, ptr @ans, align 4, !tbaa !5
  %275 = call i32 (ptr, ...) @printf(ptr noundef @.str.2, i32 noundef %274)
  store i32 0, ptr %1, align 4
  store i32 1, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #7
  %276 = load i32, ptr %1, align 4
  ret i32 %276
}

declare i32 @__isoc99_scanf(ptr noundef, ...) #6

declare i32 @printf(ptr noundef, ...) #6

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10}
!16 = distinct !{!16, !10}
!17 = distinct !{!17, !10}
!18 = distinct !{!18, !10}
!19 = distinct !{!19, !10}
!20 = distinct !{!20, !10}
!21 = distinct !{!21, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@N = external dso_local local_unnamed_addr global i32, align 4
@M = external dso_local local_unnamed_addr global i32, align 4
@S = external dso_local local_unnamed_addr global i32, align 4
@T = external dso_local local_unnamed_addr global i32, align 4
@lnk = external dso_local local_unnamed_addr global [30003 x i32], align 16
@cur = external dso_local local_unnamed_addr global [30003 x i32], align 16
@ans = external dso_local local_unnamed_addr global i32, align 4
@.str = external hidden unnamed_addr constant [5 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [3 x i8], align 1
@_ZL1d = external hidden local_unnamed_addr constant [5 x [2 x i32]], align 16
@.str.2 = external hidden unnamed_addr constant [4 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z7addEdgeiii(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z3bfsv() local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z3dfsii(i32 noundef, i32 noundef) local_unnamed_addr #4

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() local_unnamed_addr #5 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #7
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #7
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #7
  %4 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull %1, ptr noundef nonnull %2)
  %5 = load i32, ptr %1, align 4, !tbaa !5
  %6 = load i32, ptr %2, align 4, !tbaa !5
  %7 = mul nsw i32 %6, %5
  %8 = mul nsw i32 %7, 3
  %9 = add nsw i32 %8, 2
  store i32 %9, ptr @N, align 4, !tbaa !5
  store i32 0, ptr @M, align 4, !tbaa !5
  store i32 %8, ptr @S, align 4, !tbaa !5
  %10 = add nsw i32 %8, 1
  store i32 %10, ptr @T, align 4, !tbaa !5
  %11 = sext i32 %9 to i64
  %12 = shl nsw i64 %11, 2
  call void @llvm.memset.p0.i64(ptr nonnull align 16 @lnk, i8 -1, i64 %12, i1 false)
  %13 = icmp sgt i32 %5, 0
  %14 = icmp sgt i32 %6, 0
  %or.cond164 = select i1 %13, i1 %14, i1 false
  br i1 %or.cond164, label %.preheader91, label %.preheader

.preheader91:                                     ; preds = %0, %._crit_edge
  %15 = phi i32 [ %20, %._crit_edge ], [ %5, %0 ]
  %16 = phi i32 [ %21, %._crit_edge ], [ %6, %0 ]
  %.095 = phi i32 [ %22, %._crit_edge ], [ 0, %0 ]
  %.06294 = phi i32 [ %.1.lcssa, %._crit_edge ], [ 0, %0 ]
  %17 = icmp sgt i32 %16, 0
  br i1 %17, label %.lr.ph, label %._crit_edge

.preheader90:                                     ; preds = %._crit_edge
  %18 = icmp sgt i32 %20, 0
  %19 = icmp sgt i32 %21, 0
  %or.cond165 = and i1 %18, %19
  br i1 %or.cond165, label %.preheader89, label %.preheader

._crit_edge.loopexit:                             ; preds = %.lr.ph
  %.pre = load i32, ptr %1, align 4, !tbaa !5
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %.preheader91
  %20 = phi i32 [ %15, %.preheader91 ], [ %.pre, %._crit_edge.loopexit ]
  %21 = phi i32 [ %16, %.preheader91 ], [ %31, %._crit_edge.loopexit ]
  %.1.lcssa = phi i32 [ %.06294, %.preheader91 ], [ %30, %._crit_edge.loopexit ]
  %22 = add nuw nsw i32 %.095, 1
  %23 = icmp slt i32 %22, %20
  br i1 %23, label %.preheader91, label %.preheader90, !llvm.loop !9

.lr.ph:                                           ; preds = %.preheader91, %.lr.ph
  %.193 = phi i32 [ %30, %.lr.ph ], [ %.06294, %.preheader91 ]
  %.06892 = phi i32 [ %29, %.lr.ph ], [ 0, %.preheader91 ]
  %24 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str.1, ptr noundef nonnull %3)
  %25 = load i32, ptr %3, align 4, !tbaa !5
  %26 = load i32, ptr @ans, align 4, !tbaa !5
  %27 = add nsw i32 %26, %25
  store i32 %27, ptr @ans, align 4, !tbaa !5
  %28 = load i32, ptr @S, align 4, !tbaa !5
  call void @_Z7addEdgeiii(i32 noundef %28, i32 noundef %.193, i32 noundef %25)
  %29 = add nuw nsw i32 %.06892, 1
  %30 = add nsw i32 %.193, 1
  %31 = load i32, ptr %2, align 4, !tbaa !5
  %32 = icmp slt i32 %29, %31
  br i1 %32, label %.lr.ph, label %._crit_edge.loopexit, !llvm.loop !12

.preheader89:                                     ; preds = %.preheader90, %._crit_edge99
  %33 = phi i32 [ %46, %._crit_edge99 ], [ %20, %.preheader90 ]
  %34 = phi i32 [ %47, %._crit_edge99 ], [ %21, %.preheader90 ]
  %.075102 = phi i32 [ %.176.lcssa, %._crit_edge99 ], [ 0, %.preheader90 ]
  %.077101 = phi i32 [ %48, %._crit_edge99 ], [ 0, %.preheader90 ]
  %35 = icmp sgt i32 %34, 0
  br i1 %35, label %.lr.ph98, label %._crit_edge99

.preheader88:                                     ; preds = %._crit_edge99
  %36 = icmp sgt i32 %46, 0
  %37 = icmp sgt i32 %47, 0
  %or.cond166 = and i1 %36, %37
  br i1 %or.cond166, label %.preheader87.preheader, label %.preheader

.preheader87.preheader:                           ; preds = %.preheader88
  %.pre133 = load i32, ptr @_ZL1d, align 16
  %.pre134 = load i32, ptr getelementptr inbounds (i8, ptr @_ZL1d, i64 4), align 4
  %38 = load i32, ptr getelementptr inbounds (i8, ptr @_ZL1d, i64 8), align 8
  %39 = load i32, ptr getelementptr inbounds (i8, ptr @_ZL1d, i64 12), align 4
  %40 = load i32, ptr getelementptr inbounds (i8, ptr @_ZL1d, i64 16), align 16
  %41 = load i32, ptr getelementptr inbounds (i8, ptr @_ZL1d, i64 20), align 4
  %42 = load i32, ptr getelementptr inbounds (i8, ptr @_ZL1d, i64 24), align 8
  %43 = load i32, ptr getelementptr inbounds (i8, ptr @_ZL1d, i64 28), align 4
  %44 = load i32, ptr getelementptr inbounds (i8, ptr @_ZL1d, i64 32), align 16
  %45 = load i32, ptr getelementptr inbounds (i8, ptr @_ZL1d, i64 36), align 4
  br label %.preheader87

._crit_edge99.loopexit:                           ; preds = %.lr.ph98
  %.pre132 = load i32, ptr %1, align 4, !tbaa !5
  br label %._crit_edge99

._crit_edge99:                                    ; preds = %._crit_edge99.loopexit, %.preheader89
  %46 = phi i32 [ %33, %.preheader89 ], [ %.pre132, %._crit_edge99.loopexit ]
  %47 = phi i32 [ %34, %.preheader89 ], [ %57, %._crit_edge99.loopexit ]
  %.176.lcssa = phi i32 [ %.075102, %.preheader89 ], [ %56, %._crit_edge99.loopexit ]
  %48 = add nuw nsw i32 %.077101, 1
  %49 = icmp slt i32 %48, %46
  br i1 %49, label %.preheader89, label %.preheader88, !llvm.loop !13

.lr.ph98:                                         ; preds = %.preheader89, %.lr.ph98
  %.07497 = phi i32 [ %55, %.lr.ph98 ], [ 0, %.preheader89 ]
  %.17696 = phi i32 [ %56, %.lr.ph98 ], [ %.075102, %.preheader89 ]
  %50 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str.1, ptr noundef nonnull %3)
  %51 = load i32, ptr %3, align 4, !tbaa !5
  %52 = load i32, ptr @ans, align 4, !tbaa !5
  %53 = add nsw i32 %52, %51
  store i32 %53, ptr @ans, align 4, !tbaa !5
  %54 = load i32, ptr @T, align 4, !tbaa !5
  call void @_Z7addEdgeiii(i32 noundef %.17696, i32 noundef %54, i32 noundef %51)
  %55 = add nuw nsw i32 %.07497, 1
  %56 = add nsw i32 %.17696, 1
  %57 = load i32, ptr %2, align 4, !tbaa !5
  %58 = icmp slt i32 %55, %57
  br i1 %58, label %.lr.ph98, label %._crit_edge99.loopexit, !llvm.loop !14

.preheader87:                                     ; preds = %.preheader87.preheader, %._crit_edge107
  %59 = phi i32 [ %83, %._crit_edge107 ], [ %46, %.preheader87.preheader ]
  %60 = phi i32 [ %84, %._crit_edge107 ], [ %47, %.preheader87.preheader ]
  %.071110 = phi i32 [ %.172.lcssa, %._crit_edge107 ], [ 0, %.preheader87.preheader ]
  %.073109 = phi i32 [ %85, %._crit_edge107 ], [ 0, %.preheader87.preheader ]
  %61 = icmp sgt i32 %60, 0
  br i1 %61, label %.lr.ph106.preheader, label %._crit_edge107

.lr.ph106.preheader:                              ; preds = %.preheader87
  %62 = add nsw i32 %.pre133, %.073109
  %63 = icmp sgt i32 %62, -1
  %64 = add nsw i32 %38, %.073109
  %65 = icmp sgt i32 %64, -1
  %66 = add nsw i32 %40, %.073109
  %67 = icmp sgt i32 %66, -1
  %68 = add nsw i32 %42, %.073109
  %69 = icmp sgt i32 %68, -1
  %70 = add nsw i32 %44, %.073109
  %71 = icmp sgt i32 %70, -1
  br label %.lr.ph106

.preheader86:                                     ; preds = %._crit_edge107
  %72 = icmp sgt i32 %83, 0
  br i1 %72, label %.preheader85.lr.ph, label %.preheader

.preheader85.lr.ph:                               ; preds = %.preheader86
  %73 = shl nuw nsw i32 %7, 1
  %74 = icmp sgt i32 %84, 0
  br i1 %74, label %.preheader85.preheader, label %.preheader

.preheader85.preheader:                           ; preds = %.preheader85.lr.ph
  %.pre136 = load i32, ptr @_ZL1d, align 16
  %.pre137 = load i32, ptr getelementptr inbounds (i8, ptr @_ZL1d, i64 4), align 4
  %75 = load i32, ptr getelementptr inbounds (i8, ptr @_ZL1d, i64 8), align 8
  %76 = load i32, ptr getelementptr inbounds (i8, ptr @_ZL1d, i64 12), align 4
  %77 = load i32, ptr getelementptr inbounds (i8, ptr @_ZL1d, i64 16), align 16
  %78 = load i32, ptr getelementptr inbounds (i8, ptr @_ZL1d, i64 20), align 4
  %79 = load i32, ptr getelementptr inbounds (i8, ptr @_ZL1d, i64 24), align 8
  %80 = load i32, ptr getelementptr inbounds (i8, ptr @_ZL1d, i64 28), align 4
  %81 = load i32, ptr getelementptr inbounds (i8, ptr @_ZL1d, i64 32), align 16
  %82 = load i32, ptr getelementptr inbounds (i8, ptr @_ZL1d, i64 36), align 4
  br label %.preheader85

._crit_edge107.loopexit:                          ; preds = %152
  %.pre135 = load i32, ptr %1, align 4, !tbaa !5
  br label %._crit_edge107

._crit_edge107:                                   ; preds = %._crit_edge107.loopexit, %.preheader87
  %83 = phi i32 [ %59, %.preheader87 ], [ %.pre135, %._crit_edge107.loopexit ]
  %84 = phi i32 [ %60, %.preheader87 ], [ %155, %._crit_edge107.loopexit ]
  %.172.lcssa = phi i32 [ %.071110, %.preheader87 ], [ %154, %._crit_edge107.loopexit ]
  %85 = add nuw nsw i32 %.073109, 1
  %86 = icmp slt i32 %85, %83
  br i1 %86, label %.preheader87, label %.preheader86, !llvm.loop !15

.lr.ph106:                                        ; preds = %.lr.ph106.preheader, %152
  %.070105 = phi i32 [ %153, %152 ], [ 0, %.lr.ph106.preheader ]
  %.172104 = phi i32 [ %154, %152 ], [ %.071110, %.lr.ph106.preheader ]
  %87 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str.1, ptr noundef nonnull %3)
  %88 = load i32, ptr %3, align 4, !tbaa !5
  %89 = load i32, ptr @ans, align 4, !tbaa !5
  %90 = add nsw i32 %89, %88
  store i32 %90, ptr @ans, align 4, !tbaa !5
  %91 = load i32, ptr @S, align 4, !tbaa !5
  %92 = add nsw i32 %.172104, %7
  call void @_Z7addEdgeiii(i32 noundef %91, i32 noundef %92, i32 noundef %88)
  %93 = add nsw i32 %.pre134, %.070105
  br i1 %63, label %94, label %104

94:                                               ; preds = %.lr.ph106
  %95 = load i32, ptr %1, align 4, !tbaa !5
  %96 = icmp slt i32 %62, %95
  %97 = icmp sgt i32 %93, -1
  %or.cond = select i1 %96, i1 %97, i1 false
  br i1 %or.cond, label %98, label %104

98:                                               ; preds = %94
  %99 = load i32, ptr %2, align 4, !tbaa !5
  %100 = icmp slt i32 %93, %99
  br i1 %100, label %101, label %104

101:                                              ; preds = %98
  %102 = mul nsw i32 %99, %62
  %103 = add nuw nsw i32 %102, %93
  call void @_Z7addEdgeiii(i32 noundef %92, i32 noundef %103, i32 noundef 1061109567)
  br label %104

104:                                              ; preds = %101, %98, %94, %.lr.ph106
  %105 = add nsw i32 %39, %.070105
  br i1 %65, label %106, label %116

106:                                              ; preds = %104
  %107 = load i32, ptr %1, align 4, !tbaa !5
  %108 = icmp slt i32 %64, %107
  %109 = icmp sgt i32 %105, -1
  %or.cond.1 = select i1 %108, i1 %109, i1 false
  br i1 %or.cond.1, label %110, label %116

110:                                              ; preds = %106
  %111 = load i32, ptr %2, align 4, !tbaa !5
  %112 = icmp slt i32 %105, %111
  br i1 %112, label %113, label %116

113:                                              ; preds = %110
  %114 = mul nsw i32 %111, %64
  %115 = add nuw nsw i32 %114, %105
  call void @_Z7addEdgeiii(i32 noundef %92, i32 noundef %115, i32 noundef 1061109567)
  br label %116

116:                                              ; preds = %113, %110, %106, %104
  %117 = add nsw i32 %41, %.070105
  br i1 %67, label %118, label %128

118:                                              ; preds = %116
  %119 = load i32, ptr %1, align 4, !tbaa !5
  %120 = icmp slt i32 %66, %119
  %121 = icmp sgt i32 %117, -1
  %or.cond.2 = select i1 %120, i1 %121, i1 false
  br i1 %or.cond.2, label %122, label %128

122:                                              ; preds = %118
  %123 = load i32, ptr %2, align 4, !tbaa !5
  %124 = icmp slt i32 %117, %123
  br i1 %124, label %125, label %128

125:                                              ; preds = %122
  %126 = mul nsw i32 %123, %66
  %127 = add nuw nsw i32 %126, %117
  call void @_Z7addEdgeiii(i32 noundef %92, i32 noundef %127, i32 noundef 1061109567)
  br label %128

128:                                              ; preds = %125, %122, %118, %116
  %129 = add nsw i32 %43, %.070105
  br i1 %69, label %130, label %140

130:                                              ; preds = %128
  %131 = load i32, ptr %1, align 4, !tbaa !5
  %132 = icmp slt i32 %68, %131
  %133 = icmp sgt i32 %129, -1
  %or.cond.3 = select i1 %132, i1 %133, i1 false
  br i1 %or.cond.3, label %134, label %140

134:                                              ; preds = %130
  %135 = load i32, ptr %2, align 4, !tbaa !5
  %136 = icmp slt i32 %129, %135
  br i1 %136, label %137, label %140

137:                                              ; preds = %134
  %138 = mul nsw i32 %135, %68
  %139 = add nuw nsw i32 %138, %129
  call void @_Z7addEdgeiii(i32 noundef %92, i32 noundef %139, i32 noundef 1061109567)
  br label %140

140:                                              ; preds = %137, %134, %130, %128
  %141 = add nsw i32 %45, %.070105
  br i1 %71, label %142, label %152

142:                                              ; preds = %140
  %143 = load i32, ptr %1, align 4, !tbaa !5
  %144 = icmp slt i32 %70, %143
  %145 = icmp sgt i32 %141, -1
  %or.cond.4 = select i1 %144, i1 %145, i1 false
  br i1 %or.cond.4, label %146, label %152

146:                                              ; preds = %142
  %147 = load i32, ptr %2, align 4, !tbaa !5
  %148 = icmp slt i32 %141, %147
  br i1 %148, label %149, label %152

149:                                              ; preds = %146
  %150 = mul nsw i32 %147, %70
  %151 = add nuw nsw i32 %150, %141
  call void @_Z7addEdgeiii(i32 noundef %92, i32 noundef %151, i32 noundef 1061109567)
  br label %152

152:                                              ; preds = %149, %146, %142, %140
  %153 = add nuw nsw i32 %.070105, 1
  %154 = add nsw i32 %.172104, 1
  %155 = load i32, ptr %2, align 4, !tbaa !5
  %156 = icmp slt i32 %153, %155
  br i1 %156, label %.lr.ph106, label %._crit_edge107.loopexit, !llvm.loop !16

.preheader85:                                     ; preds = %.preheader85.preheader, %._crit_edge115
  %157 = phi i32 [ %171, %._crit_edge115 ], [ %83, %.preheader85.preheader ]
  %158 = phi i32 [ %172, %._crit_edge115 ], [ %84, %.preheader85.preheader ]
  %.065118 = phi i32 [ %.166.lcssa, %._crit_edge115 ], [ 0, %.preheader85.preheader ]
  %.067117 = phi i32 [ %173, %._crit_edge115 ], [ 0, %.preheader85.preheader ]
  %159 = icmp sgt i32 %158, 0
  br i1 %159, label %.lr.ph114.preheader, label %._crit_edge115

.lr.ph114.preheader:                              ; preds = %.preheader85
  %160 = add nsw i32 %.pre136, %.067117
  %161 = icmp sgt i32 %160, -1
  %162 = add nsw i32 %75, %.067117
  %163 = icmp sgt i32 %162, -1
  %164 = add nsw i32 %77, %.067117
  %165 = icmp sgt i32 %164, -1
  %166 = add nsw i32 %79, %.067117
  %167 = icmp sgt i32 %166, -1
  %168 = add nsw i32 %81, %.067117
  %169 = icmp sgt i32 %168, -1
  br label %.lr.ph114

.preheader:                                       ; preds = %._crit_edge115, %0, %.preheader90, %.preheader88, %.preheader85.lr.ph, %.preheader86
  %170 = call noundef zeroext i1 @_Z3bfsv()
  br i1 %170, label %.lr.ph121, label %._crit_edge122

._crit_edge115.loopexit:                          ; preds = %240
  %.pre138 = load i32, ptr %1, align 4, !tbaa !5
  br label %._crit_edge115

._crit_edge115:                                   ; preds = %._crit_edge115.loopexit, %.preheader85
  %171 = phi i32 [ %157, %.preheader85 ], [ %.pre138, %._crit_edge115.loopexit ]
  %172 = phi i32 [ %158, %.preheader85 ], [ %243, %._crit_edge115.loopexit ]
  %.166.lcssa = phi i32 [ %.065118, %.preheader85 ], [ %242, %._crit_edge115.loopexit ]
  %173 = add nuw nsw i32 %.067117, 1
  %174 = icmp slt i32 %173, %171
  br i1 %174, label %.preheader85, label %.preheader, !llvm.loop !17

.lr.ph114:                                        ; preds = %.lr.ph114.preheader, %240
  %.064113 = phi i32 [ %241, %240 ], [ 0, %.lr.ph114.preheader ]
  %.166112 = phi i32 [ %242, %240 ], [ %.065118, %.lr.ph114.preheader ]
  %175 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str.1, ptr noundef nonnull %3)
  %176 = load i32, ptr %3, align 4, !tbaa !5
  %177 = load i32, ptr @ans, align 4, !tbaa !5
  %178 = add nsw i32 %177, %176
  store i32 %178, ptr @ans, align 4, !tbaa !5
  %179 = add nsw i32 %.166112, %73
  %180 = load i32, ptr @T, align 4, !tbaa !5
  call void @_Z7addEdgeiii(i32 noundef %179, i32 noundef %180, i32 noundef %176)
  %181 = add nsw i32 %.pre137, %.064113
  br i1 %161, label %182, label %192

182:                                              ; preds = %.lr.ph114
  %183 = load i32, ptr %1, align 4, !tbaa !5
  %184 = icmp slt i32 %160, %183
  %185 = icmp sgt i32 %181, -1
  %or.cond3 = select i1 %184, i1 %185, i1 false
  br i1 %or.cond3, label %186, label %192

186:                                              ; preds = %182
  %187 = load i32, ptr %2, align 4, !tbaa !5
  %188 = icmp slt i32 %181, %187
  br i1 %188, label %189, label %192

189:                                              ; preds = %186
  %190 = mul nsw i32 %187, %160
  %191 = add nuw nsw i32 %190, %181
  call void @_Z7addEdgeiii(i32 noundef %191, i32 noundef %179, i32 noundef 1061109567)
  br label %192

192:                                              ; preds = %189, %186, %182, %.lr.ph114
  %193 = add nsw i32 %76, %.064113
  br i1 %163, label %194, label %204

194:                                              ; preds = %192
  %195 = load i32, ptr %1, align 4, !tbaa !5
  %196 = icmp slt i32 %162, %195
  %197 = icmp sgt i32 %193, -1
  %or.cond3.1 = select i1 %196, i1 %197, i1 false
  br i1 %or.cond3.1, label %198, label %204

198:                                              ; preds = %194
  %199 = load i32, ptr %2, align 4, !tbaa !5
  %200 = icmp slt i32 %193, %199
  br i1 %200, label %201, label %204

201:                                              ; preds = %198
  %202 = mul nsw i32 %199, %162
  %203 = add nuw nsw i32 %202, %193
  call void @_Z7addEdgeiii(i32 noundef %203, i32 noundef %179, i32 noundef 1061109567)
  br label %204

204:                                              ; preds = %201, %198, %194, %192
  %205 = add nsw i32 %78, %.064113
  br i1 %165, label %206, label %216

206:                                              ; preds = %204
  %207 = load i32, ptr %1, align 4, !tbaa !5
  %208 = icmp slt i32 %164, %207
  %209 = icmp sgt i32 %205, -1
  %or.cond3.2 = select i1 %208, i1 %209, i1 false
  br i1 %or.cond3.2, label %210, label %216

210:                                              ; preds = %206
  %211 = load i32, ptr %2, align 4, !tbaa !5
  %212 = icmp slt i32 %205, %211
  br i1 %212, label %213, label %216

213:                                              ; preds = %210
  %214 = mul nsw i32 %211, %164
  %215 = add nuw nsw i32 %214, %205
  call void @_Z7addEdgeiii(i32 noundef %215, i32 noundef %179, i32 noundef 1061109567)
  br label %216

216:                                              ; preds = %213, %210, %206, %204
  %217 = add nsw i32 %80, %.064113
  br i1 %167, label %218, label %228

218:                                              ; preds = %216
  %219 = load i32, ptr %1, align 4, !tbaa !5
  %220 = icmp slt i32 %166, %219
  %221 = icmp sgt i32 %217, -1
  %or.cond3.3 = select i1 %220, i1 %221, i1 false
  br i1 %or.cond3.3, label %222, label %228

222:                                              ; preds = %218
  %223 = load i32, ptr %2, align 4, !tbaa !5
  %224 = icmp slt i32 %217, %223
  br i1 %224, label %225, label %228

225:                                              ; preds = %222
  %226 = mul nsw i32 %223, %166
  %227 = add nuw nsw i32 %226, %217
  call void @_Z7addEdgeiii(i32 noundef %227, i32 noundef %179, i32 noundef 1061109567)
  br label %228

228:                                              ; preds = %225, %222, %218, %216
  %229 = add nsw i32 %82, %.064113
  br i1 %169, label %230, label %240

230:                                              ; preds = %228
  %231 = load i32, ptr %1, align 4, !tbaa !5
  %232 = icmp slt i32 %168, %231
  %233 = icmp sgt i32 %229, -1
  %or.cond3.4 = select i1 %232, i1 %233, i1 false
  br i1 %or.cond3.4, label %234, label %240

234:                                              ; preds = %230
  %235 = load i32, ptr %2, align 4, !tbaa !5
  %236 = icmp slt i32 %229, %235
  br i1 %236, label %237, label %240

237:                                              ; preds = %234
  %238 = mul nsw i32 %235, %168
  %239 = add nuw nsw i32 %238, %229
  call void @_Z7addEdgeiii(i32 noundef %239, i32 noundef %179, i32 noundef 1061109567)
  br label %240

240:                                              ; preds = %237, %234, %230, %228
  %241 = add nuw nsw i32 %.064113, 1
  %242 = add nsw i32 %.166112, 1
  %243 = load i32, ptr %2, align 4, !tbaa !5
  %244 = icmp slt i32 %241, %243
  br i1 %244, label %.lr.ph114, label %._crit_edge115.loopexit, !llvm.loop !18

.loopexit:                                        ; preds = %.lr.ph120, %.lr.ph121
  %245 = call noundef zeroext i1 @_Z3bfsv()
  br i1 %245, label %.lr.ph121, label %._crit_edge122, !llvm.loop !19

.lr.ph121:                                        ; preds = %.preheader, %.loopexit
  %246 = load i32, ptr @N, align 4, !tbaa !5
  %247 = sext i32 %246 to i64
  %248 = shl nsw i64 %247, 2
  call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 16 @cur, ptr nonnull align 16 @lnk, i64 %248, i1 false)
  %249 = load i32, ptr @S, align 4, !tbaa !5
  %250 = call noundef i32 @_Z3dfsii(i32 noundef %249, i32 noundef 1061109567)
  %251 = icmp sgt i32 %250, 0
  br i1 %251, label %.lr.ph120, label %.loopexit

.lr.ph120:                                        ; preds = %.lr.ph121, %.lr.ph120
  %252 = phi i32 [ %256, %.lr.ph120 ], [ %250, %.lr.ph121 ]
  %253 = load i32, ptr @ans, align 4, !tbaa !5
  %254 = sub nsw i32 %253, %252
  store i32 %254, ptr @ans, align 4, !tbaa !5
  %255 = load i32, ptr @S, align 4, !tbaa !5
  %256 = call noundef i32 @_Z3dfsii(i32 noundef %255, i32 noundef 1061109567)
  %257 = icmp sgt i32 %256, 0
  br i1 %257, label %.lr.ph120, label %.loopexit, !llvm.loop !20

._crit_edge122:                                   ; preds = %.loopexit, %.preheader
  %258 = load i32, ptr @ans, align 4, !tbaa !5
  %259 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.2, i32 noundef %258)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #7
  ret i32 0
}

; Function Attrs: nofree nounwind
declare noundef i32 @__isoc99_scanf(ptr nocapture noundef readonly, ...) local_unnamed_addr #6

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #6

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10, !11}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.unswitch.partial.disable"}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10, !11}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10, !11}
!16 = distinct !{!16, !10}
!17 = distinct !{!17, !10, !11}
!18 = distinct !{!18, !10}
!19 = distinct !{!19, !10}
!20 = distinct !{!20, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimpleLoopUnswitchPass,SimplifyCFGPass