; LLVM IR from tangjz/acm-icpc :: codeforces/complete/815C.ll (Z5MergePxiS_i)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZZ5MergePxiS_iE3tmp = external hidden global [5001 x i64], align 16

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5MergePxiS_i(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3) #0 {
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i64, align 8
  %14 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store ptr %2, ptr %7, align 8, !tbaa !5
  store i32 %3, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %15

15:                                               ; preds = %26, %4
  %16 = load i32, ptr %9, align 4, !tbaa !9
  %17 = load i32, ptr %6, align 4, !tbaa !9
  %18 = load i32, ptr %8, align 4, !tbaa !9
  %19 = add nsw i32 %17, %18
  %20 = icmp sle i32 %16, %19
  br i1 %20, label %22, label %21

21:                                               ; preds = %15
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  br label %29

22:                                               ; preds = %15
  %23 = load i32, ptr %9, align 4, !tbaa !9
  %24 = sext i32 %23 to i64
  %25 = getelementptr inbounds [5001 x i64], ptr @_ZZ5MergePxiS_iE3tmp, i64 0, i64 %24
  store i64 4611686018427387903, ptr %25, align 8, !tbaa !11
  br label %26

26:                                               ; preds = %22
  %27 = load i32, ptr %9, align 4, !tbaa !9
  %28 = add nsw i32 %27, 1
  store i32 %28, ptr %9, align 4, !tbaa !9
  br label %15, !llvm.loop !13

29:                                               ; preds = %21
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  store i32 0, ptr %10, align 4, !tbaa !9
  br label %30

30:                                               ; preds = %85, %29
  %31 = load i32, ptr %10, align 4, !tbaa !9
  %32 = load i32, ptr %6, align 4, !tbaa !9
  %33 = icmp sle i32 %31, %32
  br i1 %33, label %35, label %34

34:                                               ; preds = %30
  store i32 5, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  br label %88

35:                                               ; preds = %30
  %36 = load ptr, ptr %5, align 8, !tbaa !5
  %37 = load i32, ptr %10, align 4, !tbaa !9
  %38 = sext i32 %37 to i64
  %39 = getelementptr inbounds i64, ptr %36, i64 %38
  %40 = load i64, ptr %39, align 8, !tbaa !11
  %41 = icmp slt i64 %40, 4611686018427387903
  br i1 %41, label %42, label %84

42:                                               ; preds = %35
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  store i32 0, ptr %12, align 4, !tbaa !9
  br label %43

43:                                               ; preds = %80, %42
  %44 = load i32, ptr %12, align 4, !tbaa !9
  %45 = load i32, ptr %8, align 4, !tbaa !9
  %46 = icmp sle i32 %44, %45
  br i1 %46, label %48, label %47

47:                                               ; preds = %43
  store i32 8, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  br label %83

48:                                               ; preds = %43
  %49 = load ptr, ptr %7, align 8, !tbaa !5
  %50 = load i32, ptr %12, align 4, !tbaa !9
  %51 = sext i32 %50 to i64
  %52 = getelementptr inbounds i64, ptr %49, i64 %51
  %53 = load i64, ptr %52, align 8, !tbaa !11
  %54 = icmp slt i64 %53, 4611686018427387903
  br i1 %54, label %55, label %79

55:                                               ; preds = %48
  %56 = load i32, ptr %10, align 4, !tbaa !9
  %57 = load i32, ptr %12, align 4, !tbaa !9
  %58 = add nsw i32 %56, %57
  %59 = sext i32 %58 to i64
  %60 = getelementptr inbounds [5001 x i64], ptr @_ZZ5MergePxiS_iE3tmp, i64 0, i64 %59
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #3
  %61 = load ptr, ptr %5, align 8, !tbaa !5
  %62 = load i32, ptr %10, align 4, !tbaa !9
  %63 = sext i32 %62 to i64
  %64 = getelementptr inbounds i64, ptr %61, i64 %63
  %65 = load i64, ptr %64, align 8, !tbaa !11
  %66 = load ptr, ptr %7, align 8, !tbaa !5
  %67 = load i32, ptr %12, align 4, !tbaa !9
  %68 = sext i32 %67 to i64
  %69 = getelementptr inbounds i64, ptr %66, i64 %68
  %70 = load i64, ptr %69, align 8, !tbaa !11
  %71 = add nsw i64 %65, %70
  store i64 %71, ptr %13, align 8, !tbaa !11
  %72 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %60, ptr noundef nonnull align 8 dereferenceable(8) %13)
  %73 = load i64, ptr %72, align 8, !tbaa !11
  %74 = load i32, ptr %10, align 4, !tbaa !9
  %75 = load i32, ptr %12, align 4, !tbaa !9
  %76 = add nsw i32 %74, %75
  %77 = sext i32 %76 to i64
  %78 = getelementptr inbounds [5001 x i64], ptr @_ZZ5MergePxiS_iE3tmp, i64 0, i64 %77
  store i64 %73, ptr %78, align 8, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #3
  br label %79

79:                                               ; preds = %55, %48
  br label %80

80:                                               ; preds = %79
  %81 = load i32, ptr %12, align 4, !tbaa !9
  %82 = add nsw i32 %81, 1
  store i32 %82, ptr %12, align 4, !tbaa !9
  br label %43, !llvm.loop !15

83:                                               ; preds = %47
  br label %84

84:                                               ; preds = %83, %35
  br label %85

85:                                               ; preds = %84
  %86 = load i32, ptr %10, align 4, !tbaa !9
  %87 = add nsw i32 %86, 1
  store i32 %87, ptr %10, align 4, !tbaa !9
  br label %30, !llvm.loop !16

88:                                               ; preds = %34
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  store i32 0, ptr %14, align 4, !tbaa !9
  br label %89

89:                                               ; preds = %105, %88
  %90 = load i32, ptr %14, align 4, !tbaa !9
  %91 = load i32, ptr %6, align 4, !tbaa !9
  %92 = load i32, ptr %8, align 4, !tbaa !9
  %93 = add nsw i32 %91, %92
  %94 = icmp sle i32 %90, %93
  br i1 %94, label %96, label %95

95:                                               ; preds = %89
  store i32 11, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  br label %108

96:                                               ; preds = %89
  %97 = load i32, ptr %14, align 4, !tbaa !9
  %98 = sext i32 %97 to i64
  %99 = getelementptr inbounds [5001 x i64], ptr @_ZZ5MergePxiS_iE3tmp, i64 0, i64 %98
  %100 = load i64, ptr %99, align 8, !tbaa !11
  %101 = load ptr, ptr %5, align 8, !tbaa !5
  %102 = load i32, ptr %14, align 4, !tbaa !9
  %103 = sext i32 %102 to i64
  %104 = getelementptr inbounds i64, ptr %101, i64 %103
  store i64 %100, ptr %104, align 8, !tbaa !11
  br label %105

105:                                              ; preds = %96
  %106 = load i32, ptr %14, align 4, !tbaa !9
  %107 = add nsw i32 %106, 1
  store i32 %107, ptr %14, align 4, !tbaa !9
  br label %89, !llvm.loop !17

108:                                              ; preds = %95
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long long", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}
!17 = distinct !{!17, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZZ5MergePxiS_iE3tmp = external hidden global [5001 x i64], align 16

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z5MergePxiS_i(ptr nocapture noundef %0, i32 noundef %1, ptr nocapture noundef readonly %2, i32 noundef %3) local_unnamed_addr #0 {
  %5 = ptrtoint ptr %0 to i64
  %6 = alloca i64, align 8
  %7 = add i32 %3, %1
  %.not38 = icmp slt i32 %7, 0
  br i1 %.not38, label %.preheader37, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %4
  %8 = add nuw i32 %7, 1
  %wide.trip.count = zext i32 %8 to i64
  %min.iters.check = icmp ult i32 %7, 3
  br i1 %min.iters.check, label %.lr.ph.preheader80, label %vector.ph

.lr.ph.preheader80:                               ; preds = %middle.block, %.lr.ph.preheader
  %indvars.iv.ph = phi i64 [ 0, %.lr.ph.preheader ], [ %n.vec, %middle.block ]
  br label %.lr.ph

vector.ph:                                        ; preds = %.lr.ph.preheader
  %n.vec = and i64 %wide.trip.count, 4294967292
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %9 = getelementptr inbounds [5001 x i64], ptr @_ZZ5MergePxiS_iE3tmp, i64 0, i64 %index
  %10 = getelementptr inbounds i8, ptr %9, i64 16
  store <2 x i64> <i64 4611686018427387903, i64 4611686018427387903>, ptr %9, align 16, !tbaa !5
  store <2 x i64> <i64 4611686018427387903, i64 4611686018427387903>, ptr %10, align 16, !tbaa !5
  %index.next = add nuw i64 %index, 4
  %11 = icmp eq i64 %index.next, %n.vec
  br i1 %11, label %middle.block, label %vector.body, !llvm.loop !9

middle.block:                                     ; preds = %vector.body
  %cmp.n = icmp eq i64 %n.vec, %wide.trip.count
  br i1 %cmp.n, label %.preheader37, label %.lr.ph.preheader80

.preheader37:                                     ; preds = %.lr.ph, %middle.block, %4
  %12 = or i32 %1, %3
  %or.cond.not = icmp sgt i32 %12, -1
  br i1 %or.cond.not, label %.lr.ph46.split.preheader, label %.preheader

.lr.ph46.split.preheader:                         ; preds = %.preheader37
  %13 = add nuw i32 %3, 1
  %14 = add nuw i32 %1, 1
  %wide.trip.count60 = zext i32 %14 to i64
  %wide.trip.count55 = zext i32 %13 to i64
  br label %.lr.ph46.split

.lr.ph:                                           ; preds = %.lr.ph.preheader80, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ %indvars.iv.ph, %.lr.ph.preheader80 ]
  %15 = getelementptr inbounds [5001 x i64], ptr @_ZZ5MergePxiS_iE3tmp, i64 0, i64 %indvars.iv
  store i64 4611686018427387903, ptr %15, align 8, !tbaa !5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %.preheader37, label %.lr.ph, !llvm.loop !13

.preheader:                                       ; preds = %..loopexit_crit_edge, %.preheader37
  br i1 %.not38, label %._crit_edge, label %.lr.ph49.preheader

.lr.ph49.preheader:                               ; preds = %.preheader
  %16 = add nuw i32 %7, 1
  %wide.trip.count65 = zext i32 %16 to i64
  %min.iters.check69 = icmp ult i32 %7, 5
  %17 = sub i64 %5, ptrtoint (ptr @_ZZ5MergePxiS_iE3tmp to i64)
  %diff.check = icmp ult i64 %17, 32
  %or.cond = or i1 %min.iters.check69, %diff.check
  br i1 %or.cond, label %.lr.ph49.preheader79, label %vector.ph70

.lr.ph49.preheader79:                             ; preds = %middle.block67, %.lr.ph49.preheader
  %indvars.iv62.ph = phi i64 [ 0, %.lr.ph49.preheader ], [ %n.vec72, %middle.block67 ]
  %18 = zext nneg i32 %7 to i64
  %19 = sub nsw i64 %18, %indvars.iv62.ph
  %xtraiter = and i64 %wide.trip.count65, 3
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %.lr.ph49.prol.loopexit, label %.lr.ph49.prol

.lr.ph49.prol:                                    ; preds = %.lr.ph49.preheader79, %.lr.ph49.prol
  %indvars.iv62.prol = phi i64 [ %indvars.iv.next63.prol, %.lr.ph49.prol ], [ %indvars.iv62.ph, %.lr.ph49.preheader79 ]
  %prol.iter = phi i64 [ %prol.iter.next, %.lr.ph49.prol ], [ 0, %.lr.ph49.preheader79 ]
  %20 = getelementptr inbounds [5001 x i64], ptr @_ZZ5MergePxiS_iE3tmp, i64 0, i64 %indvars.iv62.prol
  %21 = load i64, ptr %20, align 8, !tbaa !5
  %22 = getelementptr inbounds i64, ptr %0, i64 %indvars.iv62.prol
  store i64 %21, ptr %22, align 8, !tbaa !5
  %indvars.iv.next63.prol = add nuw nsw i64 %indvars.iv62.prol, 1
  %prol.iter.next = add i64 %prol.iter, 1
  %prol.iter.cmp.not = icmp eq i64 %prol.iter.next, %xtraiter
  br i1 %prol.iter.cmp.not, label %.lr.ph49.prol.loopexit, label %.lr.ph49.prol, !llvm.loop !14

.lr.ph49.prol.loopexit:                           ; preds = %.lr.ph49.prol, %.lr.ph49.preheader79
  %indvars.iv62.unr = phi i64 [ %indvars.iv62.ph, %.lr.ph49.preheader79 ], [ %indvars.iv.next63.prol, %.lr.ph49.prol ]
  %23 = icmp ult i64 %19, 3
  br i1 %23, label %._crit_edge, label %.lr.ph49

vector.ph70:                                      ; preds = %.lr.ph49.preheader
  %n.vec72 = and i64 %wide.trip.count65, 4294967292
  br label %vector.body74

vector.body74:                                    ; preds = %vector.body74, %vector.ph70
  %index75 = phi i64 [ 0, %vector.ph70 ], [ %index.next77, %vector.body74 ]
  %24 = getelementptr inbounds [5001 x i64], ptr @_ZZ5MergePxiS_iE3tmp, i64 0, i64 %index75
  %25 = getelementptr inbounds i8, ptr %24, i64 16
  %wide.load = load <2 x i64>, ptr %24, align 16, !tbaa !5
  %wide.load76 = load <2 x i64>, ptr %25, align 16, !tbaa !5
  %26 = getelementptr inbounds i64, ptr %0, i64 %index75
  %27 = getelementptr inbounds i8, ptr %26, i64 16
  store <2 x i64> %wide.load, ptr %26, align 8, !tbaa !5
  store <2 x i64> %wide.load76, ptr %27, align 8, !tbaa !5
  %index.next77 = add nuw i64 %index75, 4
  %28 = icmp eq i64 %index.next77, %n.vec72
  br i1 %28, label %middle.block67, label %vector.body74, !llvm.loop !16

middle.block67:                                   ; preds = %vector.body74
  %cmp.n78 = icmp eq i64 %n.vec72, %wide.trip.count65
  br i1 %cmp.n78, label %._crit_edge, label %.lr.ph49.preheader79

.lr.ph46.split:                                   ; preds = %.lr.ph46.split.preheader, %..loopexit_crit_edge
  %indvars.iv57 = phi i64 [ 0, %.lr.ph46.split.preheader ], [ %indvars.iv.next58, %..loopexit_crit_edge ]
  %29 = getelementptr inbounds i64, ptr %0, i64 %indvars.iv57
  %30 = load i64, ptr %29, align 8, !tbaa !5
  %31 = icmp slt i64 %30, 4611686018427387903
  br i1 %31, label %.preheader36, label %..loopexit_crit_edge

.preheader36:                                     ; preds = %.lr.ph46.split, %42
  %indvars.iv52 = phi i64 [ %indvars.iv.next53, %42 ], [ 0, %.lr.ph46.split ]
  %32 = getelementptr inbounds i64, ptr %2, i64 %indvars.iv52
  %33 = load i64, ptr %32, align 8, !tbaa !5
  %34 = icmp slt i64 %33, 4611686018427387903
  br i1 %34, label %35, label %42

35:                                               ; preds = %.preheader36
  %36 = add nuw nsw i64 %indvars.iv52, %indvars.iv57
  %37 = getelementptr inbounds [5001 x i64], ptr @_ZZ5MergePxiS_iE3tmp, i64 0, i64 %36
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #3
  %38 = load i64, ptr %29, align 8, !tbaa !5
  %39 = add nsw i64 %38, %33
  store i64 %39, ptr %6, align 8, !tbaa !5
  %40 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %37, ptr noundef nonnull align 8 dereferenceable(8) %6)
  %41 = load i64, ptr %40, align 8, !tbaa !5
  store i64 %41, ptr %37, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #3
  br label %42

42:                                               ; preds = %.preheader36, %35
  %indvars.iv.next53 = add nuw nsw i64 %indvars.iv52, 1
  %exitcond56.not = icmp eq i64 %indvars.iv.next53, %wide.trip.count55
  br i1 %exitcond56.not, label %..loopexit_crit_edge, label %.preheader36, !llvm.loop !17

..loopexit_crit_edge:                             ; preds = %42, %.lr.ph46.split
  %indvars.iv.next58 = add nuw nsw i64 %indvars.iv57, 1
  %exitcond61.not = icmp eq i64 %indvars.iv.next58, %wide.trip.count60
  br i1 %exitcond61.not, label %.preheader, label %.lr.ph46.split, !llvm.loop !18

._crit_edge:                                      ; preds = %.lr.ph49.prol.loopexit, %.lr.ph49, %middle.block67, %.preheader
  ret void

.lr.ph49:                                         ; preds = %.lr.ph49.prol.loopexit, %.lr.ph49
  %indvars.iv62 = phi i64 [ %indvars.iv.next63.3, %.lr.ph49 ], [ %indvars.iv62.unr, %.lr.ph49.prol.loopexit ]
  %43 = getelementptr inbounds [5001 x i64], ptr @_ZZ5MergePxiS_iE3tmp, i64 0, i64 %indvars.iv62
  %44 = load i64, ptr %43, align 8, !tbaa !5
  %45 = getelementptr inbounds i64, ptr %0, i64 %indvars.iv62
  store i64 %44, ptr %45, align 8, !tbaa !5
  %indvars.iv.next63 = add nuw nsw i64 %indvars.iv62, 1
  %46 = getelementptr inbounds [5001 x i64], ptr @_ZZ5MergePxiS_iE3tmp, i64 0, i64 %indvars.iv.next63
  %47 = load i64, ptr %46, align 8, !tbaa !5
  %48 = getelementptr inbounds i64, ptr %0, i64 %indvars.iv.next63
  store i64 %47, ptr %48, align 8, !tbaa !5
  %indvars.iv.next63.1 = add nuw nsw i64 %indvars.iv62, 2
  %49 = getelementptr inbounds [5001 x i64], ptr @_ZZ5MergePxiS_iE3tmp, i64 0, i64 %indvars.iv.next63.1
  %50 = load i64, ptr %49, align 8, !tbaa !5
  %51 = getelementptr inbounds i64, ptr %0, i64 %indvars.iv.next63.1
  store i64 %50, ptr %51, align 8, !tbaa !5
  %indvars.iv.next63.2 = add nuw nsw i64 %indvars.iv62, 3
  %52 = getelementptr inbounds [5001 x i64], ptr @_ZZ5MergePxiS_iE3tmp, i64 0, i64 %indvars.iv.next63.2
  %53 = load i64, ptr %52, align 8, !tbaa !5
  %54 = getelementptr inbounds i64, ptr %0, i64 %indvars.iv.next63.2
  store i64 %53, ptr %54, align 8, !tbaa !5
  %indvars.iv.next63.3 = add nuw nsw i64 %indvars.iv62, 4
  %exitcond66.not.3 = icmp eq i64 %indvars.iv.next63.3, %wide.trip.count65
  br i1 %exitcond66.not.3, label %._crit_edge, label %.lr.ph49, !llvm.loop !19
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10, !11, !12}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.isvectorized", i32 1}
!12 = !{!"llvm.loop.unroll.runtime.disable"}
!13 = distinct !{!13, !10, !12, !11}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.unroll.disable"}
!16 = distinct !{!16, !10, !11, !12}
!17 = distinct !{!17, !10}
!18 = distinct !{!18, !10}
!19 = distinct !{!19, !10, !11}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass