; LLVM IR from narke/Aragveli :: src/kernel/arch/x86 (pic)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @out8(i16 noundef zeroext, i8 noundef zeroext) #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i8 @in8(i16 noundef zeroext) #0

; Function Attrs: nounwind uwtable
define dso_local void @x86_pic_disable_irq_line(i64 noundef %0) #1 {
  %2 = alloca i64, align 8
  store i64 %0, ptr %2, align 8, !tbaa !5
  %3 = load i64, ptr %2, align 8, !tbaa !5
  %4 = icmp ult i64 %3, 8
  br i1 %4, label %5, label %13

5:                                                ; preds = %1
  %6 = call zeroext i8 @in8(i16 noundef zeroext 33)
  %7 = zext i8 %6 to i32
  %8 = load i64, ptr %2, align 8, !tbaa !5
  %9 = trunc i64 %8 to i32
  %10 = shl i32 1, %9
  %11 = or i32 %7, %10
  %12 = trunc i32 %11 to i16
  call void @out8(i16 noundef zeroext %12, i8 noundef zeroext 33)
  br label %22

13:                                               ; preds = %1
  %14 = call zeroext i8 @in8(i16 noundef zeroext 161)
  %15 = zext i8 %14 to i32
  %16 = load i64, ptr %2, align 8, !tbaa !5
  %17 = sub i64 %16, 8
  %18 = trunc i64 %17 to i32
  %19 = shl i32 1, %18
  %20 = or i32 %15, %19
  %21 = trunc i32 %20 to i16
  call void @out8(i16 noundef zeroext %21, i8 noundef zeroext -95)
  br label %22

22:                                               ; preds = %13, %5
  ret void
}

attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @out8(i16 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i8 @in8(i16 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @x86_pic_disable_irq_line(i64 noundef %0) local_unnamed_addr #1 {
  %2 = icmp ult i64 %0, 8
  %3 = trunc i64 %0 to i32
  br i1 %2, label %4, label %6

4:                                                ; preds = %1
  %5 = tail call zeroext i8 @in8(i16 noundef zeroext 33)
  br label %9

6:                                                ; preds = %1
  %7 = tail call zeroext i8 @in8(i16 noundef zeroext 161)
  %8 = add i32 %3, -8
  br label %9

9:                                                ; preds = %6, %4
  %.sink6 = phi i32 [ %8, %6 ], [ %3, %4 ]
  %.sink5.in = phi i8 [ %7, %6 ], [ %5, %4 ]
  %.sink3 = phi i8 [ -95, %6 ], [ 33, %4 ]
  %.sink5 = zext i8 %.sink5.in to i32
  %10 = shl nuw i32 1, %.sink6
  %11 = or i32 %10, %.sink5
  %12 = trunc i32 %11 to i16
  tail call void @out8(i16 noundef zeroext %12, i8 noundef zeroext %.sink3)
  ret void
}

attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass