; LLVM IR from ubaldot/defrecs :: stm32f4x/ADC_Readings/Drivers/CMSIS/DSP/Source/FastMathFunctions (f32)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i32 @arm_atan2_f32(float noundef %0, float noundef %1, ptr noundef %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca float, align 4
  %6 = alloca float, align 4
  %7 = alloca ptr, align 8
  store float %0, ptr %5, align 4, !tbaa !5
  store float %1, ptr %6, align 4, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !9
  %8 = load float, ptr %6, align 4, !tbaa !5
  %9 = fcmp ogt float %8, 0.000000e+00
  br i1 %9, label %10, label %16

10:                                               ; preds = %3
  %11 = load float, ptr %5, align 4, !tbaa !5
  %12 = load float, ptr %6, align 4, !tbaa !5
  %13 = fdiv float %11, %12
  %14 = call float @arm_atan_f32(float noundef %13)
  %15 = load ptr, ptr %7, align 8, !tbaa !9
  store float %14, ptr %15, align 4, !tbaa !5
  store i32 0, ptr %4, align 4
  br label %65

16:                                               ; preds = %3
  %17 = load float, ptr %6, align 4, !tbaa !5
  %18 = fcmp olt float %17, 0.000000e+00
  br i1 %18, label %19, label %50

19:                                               ; preds = %16
  %20 = load float, ptr %5, align 4, !tbaa !5
  %21 = fcmp ogt float %20, 0.000000e+00
  br i1 %21, label %22, label %29

22:                                               ; preds = %19
  %23 = load float, ptr %5, align 4, !tbaa !5
  %24 = load float, ptr %6, align 4, !tbaa !5
  %25 = fdiv float %23, %24
  %26 = call float @arm_atan_f32(float noundef %25)
  %27 = fadd float %26, 0x400921FB60000000
  %28 = load ptr, ptr %7, align 8, !tbaa !9
  store float %27, ptr %28, align 4, !tbaa !5
  br label %49

29:                                               ; preds = %19
  %30 = load float, ptr %5, align 4, !tbaa !5
  %31 = fcmp olt float %30, 0.000000e+00
  br i1 %31, label %32, label %39

32:                                               ; preds = %29
  %33 = load float, ptr %5, align 4, !tbaa !5
  %34 = load float, ptr %6, align 4, !tbaa !5
  %35 = fdiv float %33, %34
  %36 = call float @arm_atan_f32(float noundef %35)
  %37 = fsub float %36, 0x400921FB60000000
  %38 = load ptr, ptr %7, align 8, !tbaa !9
  store float %37, ptr %38, align 4, !tbaa !5
  br label %48

39:                                               ; preds = %29
  %40 = load float, ptr %5, align 4, !tbaa !5
  %41 = bitcast float %40 to i32
  %42 = icmp slt i32 %41, 0
  br i1 %42, label %43, label %45

43:                                               ; preds = %39
  %44 = load ptr, ptr %7, align 8, !tbaa !9
  store float 0xC00921FB60000000, ptr %44, align 4, !tbaa !5
  br label %47

45:                                               ; preds = %39
  %46 = load ptr, ptr %7, align 8, !tbaa !9
  store float 0x400921FB60000000, ptr %46, align 4, !tbaa !5
  br label %47

47:                                               ; preds = %45, %43
  br label %48

48:                                               ; preds = %47, %32
  br label %49

49:                                               ; preds = %48, %22
  store i32 0, ptr %4, align 4
  br label %65

50:                                               ; preds = %16
  %51 = load float, ptr %6, align 4, !tbaa !5
  %52 = fcmp oeq float %51, 0.000000e+00
  br i1 %52, label %53, label %64

53:                                               ; preds = %50
  %54 = load float, ptr %5, align 4, !tbaa !5
  %55 = fcmp ogt float %54, 0.000000e+00
  br i1 %55, label %56, label %58

56:                                               ; preds = %53
  %57 = load ptr, ptr %7, align 8, !tbaa !9
  store float 0x3FF921FB60000000, ptr %57, align 4, !tbaa !5
  store i32 0, ptr %4, align 4
  br label %65

58:                                               ; preds = %53
  %59 = load float, ptr %5, align 4, !tbaa !5
  %60 = fcmp olt float %59, 0.000000e+00
  br i1 %60, label %61, label %63

61:                                               ; preds = %58
  %62 = load ptr, ptr %7, align 8, !tbaa !9
  store float 0xBFF921FB60000000, ptr %62, align 4, !tbaa !5
  store i32 0, ptr %4, align 4
  br label %65

63:                                               ; preds = %58
  br label %64

64:                                               ; preds = %63, %50
  store i32 -4, ptr %4, align 4
  br label %65

65:                                               ; preds = %64, %61, %56, %49, %10
  %66 = load i32, ptr %4, align 4
  ret i32 %66
}

; Function Attrs: alwaysinline nounwind uwtable
declare hidden float @arm_atan_f32(float noundef) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local range(i32 -4, 1) i32 @arm_atan2_f32(float noundef %0, float noundef %1, ptr nocapture noundef writeonly %2) local_unnamed_addr #0 {
  %4 = fcmp ogt float %1, 0.000000e+00
  br i1 %4, label %5, label %8

5:                                                ; preds = %3
  %6 = fdiv float %0, %1
  %7 = tail call float @arm_atan_f32(float noundef %6)
  br label %.sink.split

8:                                                ; preds = %3
  %9 = fcmp olt float %1, 0.000000e+00
  br i1 %9, label %10, label %23

10:                                               ; preds = %8
  %11 = fcmp ogt float %0, 0.000000e+00
  br i1 %11, label %12, label %16

12:                                               ; preds = %10
  %13 = fdiv float %0, %1
  %14 = tail call float @arm_atan_f32(float noundef %13)
  %15 = fadd float %14, 0x400921FB60000000
  br label %.sink.split

16:                                               ; preds = %10
  %17 = fcmp olt float %0, 0.000000e+00
  br i1 %17, label %18, label %22

18:                                               ; preds = %16
  %19 = fdiv float %0, %1
  %20 = tail call float @arm_atan_f32(float noundef %19)
  %21 = fadd float %20, 0xC00921FB60000000
  br label %.sink.split

22:                                               ; preds = %16
  %. = tail call float @llvm.copysign.f32(float 0x400921FB60000000, float %0)
  br label %.sink.split

23:                                               ; preds = %8
  %24 = fcmp oeq float %1, 0.000000e+00
  br i1 %24, label %25, label %29

25:                                               ; preds = %23
  %26 = fcmp ogt float %0, 0.000000e+00
  br i1 %26, label %.sink.split, label %27

27:                                               ; preds = %25
  %28 = fcmp olt float %0, 0.000000e+00
  br i1 %28, label %.sink.split, label %29

.sink.split:                                      ; preds = %27, %25, %22, %5, %18, %12
  %.sink = phi float [ %15, %12 ], [ %21, %18 ], [ %7, %5 ], [ %., %22 ], [ 0x3FF921FB60000000, %25 ], [ 0xBFF921FB60000000, %27 ]
  store float %.sink, ptr %2, align 4, !tbaa !5
  br label %29

29:                                               ; preds = %.sink.split, %23, %27
  %.0 = phi i32 [ -4, %27 ], [ -4, %23 ], [ 0, %.sink.split ]
  ret i32 %.0
}

; Function Attrs: alwaysinline nounwind uwtable
declare hidden float @arm_atan_f32(float noundef) local_unnamed_addr #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.copysign.f32(float, float) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass