; LLVM IR from tangjz/acm-icpc :: poj/1845.ll (Z3sumix)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z3powix(i32 noundef, i64 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z3sumix(i32 noundef %0, i64 noundef %1) #2 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i64, align 8
  %6 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !9
  %7 = load i64, ptr %5, align 8, !tbaa !9
  %8 = icmp ne i64 %7, 0
  br i1 %8, label %10, label %9

9:                                                ; preds = %2
  store i32 1, ptr %3, align 4
  br label %42

10:                                               ; preds = %2
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  %11 = load i32, ptr %4, align 4, !tbaa !5
  %12 = load i64, ptr %5, align 8, !tbaa !9
  %13 = sub nsw i64 %12, 1
  %14 = ashr i64 %13, 1
  %15 = call noundef i32 @_Z3sumix(i32 noundef %11, i64 noundef %14)
  %16 = load i32, ptr %4, align 4, !tbaa !5
  %17 = load i64, ptr %5, align 8, !tbaa !9
  %18 = ashr i64 %17, 1
  %19 = add nsw i64 %18, 1
  %20 = call noundef i32 @_Z3powix(i32 noundef %16, i64 noundef %19)
  %21 = add nsw i32 1, %20
  %22 = mul nsw i32 %15, %21
  %23 = srem i32 %22, 9901
  store i32 %23, ptr %6, align 4, !tbaa !5
  %24 = load i64, ptr %5, align 8, !tbaa !9
  %25 = and i64 %24, 1
  %26 = icmp ne i64 %25, 0
  br i1 %26, label %40, label %27

27:                                               ; preds = %10
  %28 = load i32, ptr %4, align 4, !tbaa !5
  %29 = load i64, ptr %5, align 8, !tbaa !9
  %30 = ashr i64 %29, 1
  %31 = call noundef i32 @_Z3powix(i32 noundef %28, i64 noundef %30)
  %32 = load i32, ptr %6, align 4, !tbaa !5
  %33 = add nsw i32 %32, %31
  store i32 %33, ptr %6, align 4, !tbaa !5
  %34 = load i32, ptr %6, align 4, !tbaa !5
  %35 = icmp sge i32 %34, 9901
  br i1 %35, label %36, label %39

36:                                               ; preds = %27
  %37 = load i32, ptr %6, align 4, !tbaa !5
  %38 = sub nsw i32 %37, 9901
  store i32 %38, ptr %6, align 4, !tbaa !5
  br label %39

39:                                               ; preds = %36, %27
  br label %40

40:                                               ; preds = %39, %10
  %41 = load i32, ptr %6, align 4, !tbaa !5
  store i32 %41, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  br label %42

42:                                               ; preds = %40, %9
  %43 = load i32, ptr %3, align 4
  ret i32 %43
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z3powix(i32 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef range(i32 -2147483648, 2147473747) i32 @_Z3sumix(i32 noundef %0, i64 noundef %1) local_unnamed_addr #0 {
  %.not = icmp eq i64 %1, 0
  br i1 %.not, label %19, label %3

3:                                                ; preds = %2
  %4 = add nsw i64 %1, -1
  %5 = ashr i64 %4, 1
  %6 = tail call noundef i32 @_Z3sumix(i32 noundef %0, i64 noundef %5)
  %7 = ashr i64 %1, 1
  %8 = add nsw i64 %7, 1
  %9 = tail call noundef i32 @_Z3powix(i32 noundef %0, i64 noundef %8)
  %10 = add nsw i32 %9, 1
  %11 = mul nsw i32 %10, %6
  %12 = srem i32 %11, 9901
  %13 = and i64 %1, 1
  %.not16 = icmp eq i64 %13, 0
  br i1 %.not16, label %14, label %19

14:                                               ; preds = %3
  %15 = tail call noundef i32 @_Z3powix(i32 noundef %0, i64 noundef %7)
  %16 = add nsw i32 %15, %12
  %17 = icmp sgt i32 %16, 9900
  %18 = add nsw i32 %16, -9901
  %spec.select = select i1 %17, i32 %18, i32 %16
  br label %19

19:                                               ; preds = %14, %3, %2
  %.013 = phi i32 [ 1, %2 ], [ %12, %3 ], [ %spec.select, %14 ]
  ret i32 %.013
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass