; LLVM IR from ubaldot/defrecs :: stm32f4x/ADC_Readings/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example (main)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.arm_linear_interp_instance_f32 = type { i32, float, float, ptr }

@testInputSin_f32 = external dso_local global [10 x float], align 16
@testRefSinOutput32_f32 = external dso_local global [10 x float], align 16
@__const.main.S = external hidden unnamed_addr constant %struct.arm_linear_interp_instance_f32, align 8
@testOutput = external dso_local global [10 x float], align 16
@testLinIntOutput = external dso_local global [10 x float], align 16
@snr1 = external dso_local global float, align 4
@snr2 = external dso_local global float, align 4

; Function Attrs: nounwind uwtable
define dso_local i32 @main() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca %struct.arm_linear_interp_instance_f32, align 8
  store i32 0, ptr %1, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  call void @llvm.lifetime.start.p0(i64 24, ptr %4) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %4, ptr align 8 @__const.main.S, i64 24, i1 false)
  store i32 0, ptr %2, align 4, !tbaa !5
  br label %5

5:                                                ; preds = %17, %0
  %6 = load i32, ptr %2, align 4, !tbaa !5
  %7 = icmp ult i32 %6, 10
  br i1 %7, label %8, label %20

8:                                                ; preds = %5
  %9 = load i32, ptr %2, align 4, !tbaa !5
  %10 = zext i32 %9 to i64
  %11 = getelementptr inbounds [10 x float], ptr @testInputSin_f32, i64 0, i64 %10
  %12 = load float, ptr %11, align 4, !tbaa !9
  %13 = call float @arm_sin_f32(float noundef %12)
  %14 = load i32, ptr %2, align 4, !tbaa !5
  %15 = zext i32 %14 to i64
  %16 = getelementptr inbounds [10 x float], ptr @testOutput, i64 0, i64 %15
  store float %13, ptr %16, align 4, !tbaa !9
  br label %17

17:                                               ; preds = %8
  %18 = load i32, ptr %2, align 4, !tbaa !5
  %19 = add i32 %18, 1
  store i32 %19, ptr %2, align 4, !tbaa !5
  br label %5, !llvm.loop !11

20:                                               ; preds = %5
  store i32 0, ptr %2, align 4, !tbaa !5
  br label %21

21:                                               ; preds = %33, %20
  %22 = load i32, ptr %2, align 4, !tbaa !5
  %23 = icmp ult i32 %22, 10
  br i1 %23, label %24, label %36

24:                                               ; preds = %21
  %25 = load i32, ptr %2, align 4, !tbaa !5
  %26 = zext i32 %25 to i64
  %27 = getelementptr inbounds [10 x float], ptr @testInputSin_f32, i64 0, i64 %26
  %28 = load float, ptr %27, align 4, !tbaa !9
  %29 = call float @arm_linear_interp_f32(ptr noundef %4, float noundef %28)
  %30 = load i32, ptr %2, align 4, !tbaa !5
  %31 = zext i32 %30 to i64
  %32 = getelementptr inbounds [10 x float], ptr @testLinIntOutput, i64 0, i64 %31
  store float %29, ptr %32, align 4, !tbaa !9
  br label %33

33:                                               ; preds = %24
  %34 = load i32, ptr %2, align 4, !tbaa !5
  %35 = add i32 %34, 1
  store i32 %35, ptr %2, align 4, !tbaa !5
  br label %21, !llvm.loop !13

36:                                               ; preds = %21
  %37 = call float @arm_snr_f32(ptr noundef @testRefSinOutput32_f32, ptr noundef @testOutput, i32 noundef 2)
  store float %37, ptr @snr1, align 4, !tbaa !9
  %38 = call float @arm_snr_f32(ptr noundef @testRefSinOutput32_f32, ptr noundef @testLinIntOutput, i32 noundef 2)
  store float %38, ptr @snr2, align 4, !tbaa !9
  %39 = load float, ptr @snr2, align 4, !tbaa !9
  %40 = load float, ptr @snr1, align 4, !tbaa !9
  %41 = fcmp ole float %39, %40
  %42 = zext i1 %41 to i64
  %43 = select i1 %41, i32 -6, i32 0
  store i32 %43, ptr %3, align 4, !tbaa !5
  %44 = load i32, ptr %3, align 4, !tbaa !5
  %45 = icmp ne i32 %44, 0
  br i1 %45, label %46, label %49

46:                                               ; preds = %36
  br label %47

47:                                               ; preds = %48, %46
  br label %48

48:                                               ; preds = %47
  br label %47

49:                                               ; preds = %36
  br label %50

50:                                               ; preds = %51, %49
  br label %51

51:                                               ; preds = %50
  br label %50
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

declare float @arm_sin_f32(float noundef) #3

declare float @arm_linear_interp_f32(ptr noundef, float noundef) #3

declare float @arm_snr_f32(ptr noundef, ptr noundef, i32 noundef) #3

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"float", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.arm_linear_interp_instance_f32 = type { i32, float, float, ptr }

@testInputSin_f32 = external dso_local local_unnamed_addr global [10 x float], align 16
@testRefSinOutput32_f32 = external dso_local global [10 x float], align 16
@__const.main.S = external hidden unnamed_addr constant %struct.arm_linear_interp_instance_f32, align 8
@testOutput = external dso_local global [10 x float], align 16
@testLinIntOutput = external dso_local global [10 x float], align 16
@snr1 = external dso_local local_unnamed_addr global float, align 4
@snr2 = external dso_local local_unnamed_addr global float, align 4

; Function Attrs: noreturn nounwind uwtable
define dso_local noundef i32 @main() local_unnamed_addr #0 {
.preheader10.preheader:
  %0 = alloca %struct.arm_linear_interp_instance_f32, align 8
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %0) #4
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) @__const.main.S, i64 24, i1 false)
  %1 = load float, ptr @testInputSin_f32, align 16, !tbaa !5
  %2 = tail call float @arm_sin_f32(float noundef %1) #4
  store float %2, ptr @testOutput, align 16, !tbaa !5
  %3 = load float, ptr getelementptr inbounds (i8, ptr @testInputSin_f32, i64 4), align 4, !tbaa !5
  %4 = tail call float @arm_sin_f32(float noundef %3) #4
  store float %4, ptr getelementptr inbounds (i8, ptr @testOutput, i64 4), align 4, !tbaa !5
  %5 = load float, ptr getelementptr inbounds (i8, ptr @testInputSin_f32, i64 8), align 8, !tbaa !5
  %6 = tail call float @arm_sin_f32(float noundef %5) #4
  store float %6, ptr getelementptr inbounds (i8, ptr @testOutput, i64 8), align 8, !tbaa !5
  %7 = load float, ptr getelementptr inbounds (i8, ptr @testInputSin_f32, i64 12), align 4, !tbaa !5
  %8 = tail call float @arm_sin_f32(float noundef %7) #4
  store float %8, ptr getelementptr inbounds (i8, ptr @testOutput, i64 12), align 4, !tbaa !5
  %9 = load float, ptr getelementptr inbounds (i8, ptr @testInputSin_f32, i64 16), align 16, !tbaa !5
  %10 = tail call float @arm_sin_f32(float noundef %9) #4
  store float %10, ptr getelementptr inbounds (i8, ptr @testOutput, i64 16), align 16, !tbaa !5
  %11 = load float, ptr getelementptr inbounds (i8, ptr @testInputSin_f32, i64 20), align 4, !tbaa !5
  %12 = tail call float @arm_sin_f32(float noundef %11) #4
  store float %12, ptr getelementptr inbounds (i8, ptr @testOutput, i64 20), align 4, !tbaa !5
  %13 = load float, ptr getelementptr inbounds (i8, ptr @testInputSin_f32, i64 24), align 8, !tbaa !5
  %14 = tail call float @arm_sin_f32(float noundef %13) #4
  store float %14, ptr getelementptr inbounds (i8, ptr @testOutput, i64 24), align 8, !tbaa !5
  %15 = load float, ptr getelementptr inbounds (i8, ptr @testInputSin_f32, i64 28), align 4, !tbaa !5
  %16 = tail call float @arm_sin_f32(float noundef %15) #4
  store float %16, ptr getelementptr inbounds (i8, ptr @testOutput, i64 28), align 4, !tbaa !5
  %17 = load float, ptr getelementptr inbounds (i8, ptr @testInputSin_f32, i64 32), align 16, !tbaa !5
  %18 = tail call float @arm_sin_f32(float noundef %17) #4
  store float %18, ptr getelementptr inbounds (i8, ptr @testOutput, i64 32), align 16, !tbaa !5
  %19 = load float, ptr getelementptr inbounds (i8, ptr @testInputSin_f32, i64 36), align 4, !tbaa !5
  %20 = tail call float @arm_sin_f32(float noundef %19) #4
  store float %20, ptr getelementptr inbounds (i8, ptr @testOutput, i64 36), align 4, !tbaa !5
  %21 = load float, ptr @testInputSin_f32, align 16, !tbaa !5
  %22 = call float @arm_linear_interp_f32(ptr noundef nonnull %0, float noundef %21) #4
  store float %22, ptr @testLinIntOutput, align 16, !tbaa !5
  %23 = load float, ptr getelementptr inbounds (i8, ptr @testInputSin_f32, i64 4), align 4, !tbaa !5
  %24 = call float @arm_linear_interp_f32(ptr noundef nonnull %0, float noundef %23) #4
  store float %24, ptr getelementptr inbounds (i8, ptr @testLinIntOutput, i64 4), align 4, !tbaa !5
  %25 = load float, ptr getelementptr inbounds (i8, ptr @testInputSin_f32, i64 8), align 8, !tbaa !5
  %26 = call float @arm_linear_interp_f32(ptr noundef nonnull %0, float noundef %25) #4
  store float %26, ptr getelementptr inbounds (i8, ptr @testLinIntOutput, i64 8), align 8, !tbaa !5
  %27 = load float, ptr getelementptr inbounds (i8, ptr @testInputSin_f32, i64 12), align 4, !tbaa !5
  %28 = call float @arm_linear_interp_f32(ptr noundef nonnull %0, float noundef %27) #4
  store float %28, ptr getelementptr inbounds (i8, ptr @testLinIntOutput, i64 12), align 4, !tbaa !5
  %29 = load float, ptr getelementptr inbounds (i8, ptr @testInputSin_f32, i64 16), align 16, !tbaa !5
  %30 = call float @arm_linear_interp_f32(ptr noundef nonnull %0, float noundef %29) #4
  store float %30, ptr getelementptr inbounds (i8, ptr @testLinIntOutput, i64 16), align 16, !tbaa !5
  %31 = load float, ptr getelementptr inbounds (i8, ptr @testInputSin_f32, i64 20), align 4, !tbaa !5
  %32 = call float @arm_linear_interp_f32(ptr noundef nonnull %0, float noundef %31) #4
  store float %32, ptr getelementptr inbounds (i8, ptr @testLinIntOutput, i64 20), align 4, !tbaa !5
  %33 = load float, ptr getelementptr inbounds (i8, ptr @testInputSin_f32, i64 24), align 8, !tbaa !5
  %34 = call float @arm_linear_interp_f32(ptr noundef nonnull %0, float noundef %33) #4
  store float %34, ptr getelementptr inbounds (i8, ptr @testLinIntOutput, i64 24), align 8, !tbaa !5
  %35 = load float, ptr getelementptr inbounds (i8, ptr @testInputSin_f32, i64 28), align 4, !tbaa !5
  %36 = call float @arm_linear_interp_f32(ptr noundef nonnull %0, float noundef %35) #4
  store float %36, ptr getelementptr inbounds (i8, ptr @testLinIntOutput, i64 28), align 4, !tbaa !5
  %37 = load float, ptr getelementptr inbounds (i8, ptr @testInputSin_f32, i64 32), align 16, !tbaa !5
  %38 = call float @arm_linear_interp_f32(ptr noundef nonnull %0, float noundef %37) #4
  store float %38, ptr getelementptr inbounds (i8, ptr @testLinIntOutput, i64 32), align 16, !tbaa !5
  %39 = load float, ptr getelementptr inbounds (i8, ptr @testInputSin_f32, i64 36), align 4, !tbaa !5
  %40 = call float @arm_linear_interp_f32(ptr noundef nonnull %0, float noundef %39) #4
  store float %40, ptr getelementptr inbounds (i8, ptr @testLinIntOutput, i64 36), align 4, !tbaa !5
  %41 = call float @arm_snr_f32(ptr noundef nonnull @testRefSinOutput32_f32, ptr noundef nonnull @testOutput, i32 noundef 2) #4
  store float %41, ptr @snr1, align 4, !tbaa !5
  %42 = call float @arm_snr_f32(ptr noundef nonnull @testRefSinOutput32_f32, ptr noundef nonnull @testLinIntOutput, i32 noundef 2) #4
  store float %42, ptr @snr2, align 4, !tbaa !5
  %43 = load float, ptr @snr1, align 4, !tbaa !5
  %44 = fcmp ugt float %42, %43
  br i1 %44, label %.preheader, label %.preheader9

.preheader9:                                      ; preds = %.preheader10.preheader, %.preheader9
  br label %.preheader9

.preheader:                                       ; preds = %.preheader10.preheader, %.preheader
  br label %.preheader
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

declare float @arm_sin_f32(float noundef) local_unnamed_addr #3

declare float @arm_linear_interp_f32(ptr noundef, float noundef) local_unnamed_addr #3

declare float @arm_snr_f32(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #3

attributes #0 = { noreturn nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass