; LLVM IR from FrancesoM/Bisc8FX :: sdk_projects/bisc8_platform/hw (ps7_init)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@ps7_pll_init_data_3_0 = external dso_local global [96 x i64], align 16
@ps7_clock_init_data_3_0 = external dso_local global [47 x i64], align 16
@ps7_ddr_init_data_3_0 = external dso_local global [327 x i64], align 16
@ps7_mio_init_data_3_0 = external dso_local global [287 x i64], align 16
@ps7_peripherals_init_data_3_0 = external dso_local global [93 x i64], align 16
@ps7_pll_init_data_2_0 = external dso_local global [96 x i64], align 16
@ps7_clock_init_data_2_0 = external dso_local global [47 x i64], align 16
@ps7_ddr_init_data_2_0 = external dso_local global [331 x i64], align 16
@ps7_mio_init_data_2_0 = external dso_local global [287 x i64], align 16
@ps7_peripherals_init_data_2_0 = external dso_local global [93 x i64], align 16
@ps7_pll_init_data_1_0 = external dso_local global [96 x i64], align 16
@ps7_clock_init_data_1_0 = external dso_local global [47 x i64], align 16
@ps7_ddr_init_data_1_0 = external dso_local global [323 x i64], align 16
@ps7_mio_init_data_1_0 = external dso_local global [287 x i64], align 16
@ps7_peripherals_init_data_1_0 = external dso_local global [93 x i64], align 16
@ps7_mio_init_data = external dso_local global ptr, align 8
@ps7_pll_init_data = external dso_local global ptr, align 8
@ps7_clock_init_data = external dso_local global ptr, align 8
@ps7_ddr_init_data = external dso_local global ptr, align 8
@ps7_peripherals_init_data = external dso_local global ptr, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i64 @ps7GetSiliconVersion() #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @ps7_config(ptr noundef) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @ps7_init() #1 {
  %1 = alloca i32, align 4
  %2 = alloca i64, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #2
  %5 = call i64 @ps7GetSiliconVersion()
  store i64 %5, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  %6 = load i64, ptr %2, align 8, !tbaa !5
  %7 = icmp eq i64 %6, 0
  br i1 %7, label %8, label %9

8:                                                ; preds = %0
  store ptr @ps7_mio_init_data_1_0, ptr @ps7_mio_init_data, align 8, !tbaa !9
  store ptr @ps7_pll_init_data_1_0, ptr @ps7_pll_init_data, align 8, !tbaa !9
  store ptr @ps7_clock_init_data_1_0, ptr @ps7_clock_init_data, align 8, !tbaa !9
  store ptr @ps7_ddr_init_data_1_0, ptr @ps7_ddr_init_data, align 8, !tbaa !9
  store ptr @ps7_peripherals_init_data_1_0, ptr @ps7_peripherals_init_data, align 8, !tbaa !9
  br label %15

9:                                                ; preds = %0
  %10 = load i64, ptr %2, align 8, !tbaa !5
  %11 = icmp eq i64 %10, 1
  br i1 %11, label %12, label %13

12:                                               ; preds = %9
  store ptr @ps7_mio_init_data_2_0, ptr @ps7_mio_init_data, align 8, !tbaa !9
  store ptr @ps7_pll_init_data_2_0, ptr @ps7_pll_init_data, align 8, !tbaa !9
  store ptr @ps7_clock_init_data_2_0, ptr @ps7_clock_init_data, align 8, !tbaa !9
  store ptr @ps7_ddr_init_data_2_0, ptr @ps7_ddr_init_data, align 8, !tbaa !9
  store ptr @ps7_peripherals_init_data_2_0, ptr @ps7_peripherals_init_data, align 8, !tbaa !9
  br label %14

13:                                               ; preds = %9
  store ptr @ps7_mio_init_data_3_0, ptr @ps7_mio_init_data, align 8, !tbaa !9
  store ptr @ps7_pll_init_data_3_0, ptr @ps7_pll_init_data, align 8, !tbaa !9
  store ptr @ps7_clock_init_data_3_0, ptr @ps7_clock_init_data, align 8, !tbaa !9
  store ptr @ps7_ddr_init_data_3_0, ptr @ps7_ddr_init_data, align 8, !tbaa !9
  store ptr @ps7_peripherals_init_data_3_0, ptr @ps7_peripherals_init_data, align 8, !tbaa !9
  br label %14

14:                                               ; preds = %13, %12
  br label %15

15:                                               ; preds = %14, %8
  %16 = load ptr, ptr @ps7_mio_init_data, align 8, !tbaa !9
  %17 = call i32 @ps7_config(ptr noundef %16)
  store i32 %17, ptr %3, align 4, !tbaa !11
  %18 = load i32, ptr %3, align 4, !tbaa !11
  %19 = icmp ne i32 %18, 0
  br i1 %19, label %20, label %22

20:                                               ; preds = %15
  %21 = load i32, ptr %3, align 4, !tbaa !11
  store i32 %21, ptr %1, align 4
  store i32 1, ptr %4, align 4
  br label %51

22:                                               ; preds = %15
  %23 = load ptr, ptr @ps7_pll_init_data, align 8, !tbaa !9
  %24 = call i32 @ps7_config(ptr noundef %23)
  store i32 %24, ptr %3, align 4, !tbaa !11
  %25 = load i32, ptr %3, align 4, !tbaa !11
  %26 = icmp ne i32 %25, 0
  br i1 %26, label %27, label %29

27:                                               ; preds = %22
  %28 = load i32, ptr %3, align 4, !tbaa !11
  store i32 %28, ptr %1, align 4
  store i32 1, ptr %4, align 4
  br label %51

29:                                               ; preds = %22
  %30 = load ptr, ptr @ps7_clock_init_data, align 8, !tbaa !9
  %31 = call i32 @ps7_config(ptr noundef %30)
  store i32 %31, ptr %3, align 4, !tbaa !11
  %32 = load i32, ptr %3, align 4, !tbaa !11
  %33 = icmp ne i32 %32, 0
  br i1 %33, label %34, label %36

34:                                               ; preds = %29
  %35 = load i32, ptr %3, align 4, !tbaa !11
  store i32 %35, ptr %1, align 4
  store i32 1, ptr %4, align 4
  br label %51

36:                                               ; preds = %29
  %37 = load ptr, ptr @ps7_ddr_init_data, align 8, !tbaa !9
  %38 = call i32 @ps7_config(ptr noundef %37)
  store i32 %38, ptr %3, align 4, !tbaa !11
  %39 = load i32, ptr %3, align 4, !tbaa !11
  %40 = icmp ne i32 %39, 0
  br i1 %40, label %41, label %43

41:                                               ; preds = %36
  %42 = load i32, ptr %3, align 4, !tbaa !11
  store i32 %42, ptr %1, align 4
  store i32 1, ptr %4, align 4
  br label %51

43:                                               ; preds = %36
  %44 = load ptr, ptr @ps7_peripherals_init_data, align 8, !tbaa !9
  %45 = call i32 @ps7_config(ptr noundef %44)
  store i32 %45, ptr %3, align 4, !tbaa !11
  %46 = load i32, ptr %3, align 4, !tbaa !11
  %47 = icmp ne i32 %46, 0
  br i1 %47, label %48, label %50

48:                                               ; preds = %43
  %49 = load i32, ptr %3, align 4, !tbaa !11
  store i32 %49, ptr %1, align 4
  store i32 1, ptr %4, align 4
  br label %51

50:                                               ; preds = %43
  store i32 0, ptr %1, align 4
  store i32 1, ptr %4, align 4
  br label %51

51:                                               ; preds = %50, %48, %41, %34, %27, %20
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #2
  %52 = load i32, ptr %1, align 4
  ret i32 %52
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@ps7_pll_init_data_3_0 = external dso_local global [96 x i64], align 16
@ps7_clock_init_data_3_0 = external dso_local global [47 x i64], align 16
@ps7_ddr_init_data_3_0 = external dso_local global [327 x i64], align 16
@ps7_mio_init_data_3_0 = external dso_local global [287 x i64], align 16
@ps7_peripherals_init_data_3_0 = external dso_local global [93 x i64], align 16
@ps7_pll_init_data_2_0 = external dso_local global [96 x i64], align 16
@ps7_clock_init_data_2_0 = external dso_local global [47 x i64], align 16
@ps7_ddr_init_data_2_0 = external dso_local global [331 x i64], align 16
@ps7_mio_init_data_2_0 = external dso_local global [287 x i64], align 16
@ps7_peripherals_init_data_2_0 = external dso_local global [93 x i64], align 16
@ps7_pll_init_data_1_0 = external dso_local global [96 x i64], align 16
@ps7_clock_init_data_1_0 = external dso_local global [47 x i64], align 16
@ps7_ddr_init_data_1_0 = external dso_local global [323 x i64], align 16
@ps7_mio_init_data_1_0 = external dso_local global [287 x i64], align 16
@ps7_peripherals_init_data_1_0 = external dso_local global [93 x i64], align 16
@ps7_mio_init_data = external dso_local local_unnamed_addr global ptr, align 8
@ps7_pll_init_data = external dso_local local_unnamed_addr global ptr, align 8
@ps7_clock_init_data = external dso_local local_unnamed_addr global ptr, align 8
@ps7_ddr_init_data = external dso_local local_unnamed_addr global ptr, align 8
@ps7_peripherals_init_data = external dso_local local_unnamed_addr global ptr, align 8

; Function Attrs: nounwind uwtable
declare dso_local i64 @ps7GetSiliconVersion() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @ps7_config(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local i32 @ps7_init() local_unnamed_addr #0 {
  %1 = tail call i64 @ps7GetSiliconVersion()
  switch i64 %1, label %3 [
    i64 0, label %4
    i64 1, label %2
  ]

2:                                                ; preds = %0
  br label %4

3:                                                ; preds = %0
  br label %4

4:                                                ; preds = %0, %2, %3
  %ps7_mio_init_data_2_0.sink = phi ptr [ @ps7_mio_init_data_2_0, %2 ], [ @ps7_mio_init_data_3_0, %3 ], [ @ps7_mio_init_data_1_0, %0 ]
  %ps7_pll_init_data_2_0.sink = phi ptr [ @ps7_pll_init_data_2_0, %2 ], [ @ps7_pll_init_data_3_0, %3 ], [ @ps7_pll_init_data_1_0, %0 ]
  %ps7_clock_init_data_2_0.sink = phi ptr [ @ps7_clock_init_data_2_0, %2 ], [ @ps7_clock_init_data_3_0, %3 ], [ @ps7_clock_init_data_1_0, %0 ]
  %ps7_ddr_init_data_2_0.sink = phi ptr [ @ps7_ddr_init_data_2_0, %2 ], [ @ps7_ddr_init_data_3_0, %3 ], [ @ps7_ddr_init_data_1_0, %0 ]
  %ps7_peripherals_init_data_2_0.sink = phi ptr [ @ps7_peripherals_init_data_2_0, %2 ], [ @ps7_peripherals_init_data_3_0, %3 ], [ @ps7_peripherals_init_data_1_0, %0 ]
  store ptr %ps7_mio_init_data_2_0.sink, ptr @ps7_mio_init_data, align 8, !tbaa !5
  store ptr %ps7_pll_init_data_2_0.sink, ptr @ps7_pll_init_data, align 8, !tbaa !5
  store ptr %ps7_clock_init_data_2_0.sink, ptr @ps7_clock_init_data, align 8, !tbaa !5
  store ptr %ps7_ddr_init_data_2_0.sink, ptr @ps7_ddr_init_data, align 8, !tbaa !5
  store ptr %ps7_peripherals_init_data_2_0.sink, ptr @ps7_peripherals_init_data, align 8, !tbaa !5
  %5 = tail call i32 @ps7_config(ptr noundef nonnull %ps7_mio_init_data_2_0.sink)
  %.not = icmp eq i32 %5, 0
  br i1 %.not, label %6, label %18

6:                                                ; preds = %4
  %7 = load ptr, ptr @ps7_pll_init_data, align 8, !tbaa !5
  %8 = tail call i32 @ps7_config(ptr noundef %7)
  %.not19 = icmp eq i32 %8, 0
  br i1 %.not19, label %9, label %18

9:                                                ; preds = %6
  %10 = load ptr, ptr @ps7_clock_init_data, align 8, !tbaa !5
  %11 = tail call i32 @ps7_config(ptr noundef %10)
  %.not20 = icmp eq i32 %11, 0
  br i1 %.not20, label %12, label %18

12:                                               ; preds = %9
  %13 = load ptr, ptr @ps7_ddr_init_data, align 8, !tbaa !5
  %14 = tail call i32 @ps7_config(ptr noundef %13)
  %.not21 = icmp eq i32 %14, 0
  br i1 %.not21, label %15, label %18

15:                                               ; preds = %12
  %16 = load ptr, ptr @ps7_peripherals_init_data, align 8, !tbaa !5
  %17 = tail call i32 @ps7_config(ptr noundef %16)
  br label %18

18:                                               ; preds = %15, %12, %9, %6, %4
  %.0 = phi i32 [ %5, %4 ], [ %8, %6 ], [ %11, %9 ], [ %14, %12 ], [ %17, %15 ]
  ret i32 %.0
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass