; LLVM IR from FrancesoM/Bisc8FX :: sdk_projects/bisc8_platform/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc (initialize)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XSdPs = type { %struct.XSdPs_Config, i32, i32, i32, i32, i8, i8, i8, i8, i32, i8, [4 x i32], i32, [4 x i32], i32, i32, i32, i32, i32, i64, i16, i32, i8, i32 }
%struct.XSdPs_Config = type { i16, i32, i32, i32, i32, i32, i32, i32, i8 }

@Stat = external hidden global [2 x i8], align 1
@SdInstance = external hidden global [2 x %struct.XSdPs], align 16
@BaseAddress = external hidden global [2 x i32], align 4
@CardDetect = external hidden global [2 x i32], align 4

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @disk_status(i8 noundef zeroext) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare ptr @XSdPs_LookupConfig(i16 noundef zeroext) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
define dso_local zeroext i8 @disk_initialize(i8 noundef zeroext %0) #0 {
  %2 = alloca i8, align 1
  %3 = alloca i8, align 1
  %4 = alloca i8, align 1
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  store i8 %0, ptr %3, align 1, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %4) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  store i32 1, ptr %5, align 4, !tbaa !8
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #4
  %8 = load i8, ptr %3, align 1, !tbaa !5
  %9 = call zeroext i8 @disk_status(i8 noundef zeroext %8)
  store i8 %9, ptr %4, align 1, !tbaa !5
  %10 = load i8, ptr %4, align 1, !tbaa !5
  %11 = zext i8 %10 to i32
  %12 = and i32 %11, 2
  %13 = icmp ne i32 %12, 0
  br i1 %13, label %14, label %16

14:                                               ; preds = %1
  %15 = load i8, ptr %4, align 1, !tbaa !5
  store i8 %15, ptr %2, align 1
  store i32 1, ptr %7, align 4
  br label %101

16:                                               ; preds = %1
  %17 = load i8, ptr %4, align 1, !tbaa !5
  %18 = zext i8 %17 to i32
  %19 = and i32 %18, 1
  %20 = icmp eq i32 %19, 0
  br i1 %20, label %21, label %23

21:                                               ; preds = %16
  %22 = load i8, ptr %4, align 1, !tbaa !5
  store i8 %22, ptr %2, align 1
  store i32 1, ptr %7, align 4
  br label %101

23:                                               ; preds = %16
  %24 = load i8, ptr %3, align 1, !tbaa !5
  %25 = zext i8 %24 to i64
  %26 = getelementptr inbounds [2 x i32], ptr @CardDetect, i64 0, i64 %25
  %27 = load i32, ptr %26, align 4, !tbaa !8
  %28 = icmp ne i32 %27, 0
  br i1 %28, label %29, label %43

29:                                               ; preds = %23
  br label %30

30:                                               ; preds = %41, %29
  %31 = load i8, ptr %3, align 1, !tbaa !5
  %32 = zext i8 %31 to i64
  %33 = getelementptr inbounds [2 x i32], ptr @BaseAddress, i64 0, i64 %32
  %34 = load i32, ptr %33, align 4, !tbaa !8
  %35 = add i32 %34, 36
  %36 = zext i32 %35 to i64
  %37 = call i32 @Xil_In32(i64 noundef %36)
  %38 = and i32 %37, 458752
  %39 = icmp eq i32 458752, %38
  %40 = xor i1 %39, true
  br i1 %40, label %41, label %42

41:                                               ; preds = %30
  br label %30, !llvm.loop !10

42:                                               ; preds = %30
  br label %43

43:                                               ; preds = %42, %23
  %44 = load i8, ptr %3, align 1, !tbaa !5
  %45 = zext i8 %44 to i16
  %46 = call ptr @XSdPs_LookupConfig(i16 noundef zeroext %45)
  store ptr %46, ptr %6, align 8, !tbaa !12
  %47 = load ptr, ptr %6, align 8, !tbaa !12
  %48 = icmp eq ptr null, %47
  br i1 %48, label %49, label %55

49:                                               ; preds = %43
  %50 = load i8, ptr %4, align 1, !tbaa !5
  %51 = zext i8 %50 to i32
  %52 = or i32 %51, 1
  %53 = trunc i32 %52 to i8
  store i8 %53, ptr %4, align 1, !tbaa !5
  %54 = load i8, ptr %4, align 1, !tbaa !5
  store i8 %54, ptr %2, align 1
  store i32 1, ptr %7, align 4
  br label %101

55:                                               ; preds = %43
  %56 = load i8, ptr %3, align 1, !tbaa !5
  %57 = zext i8 %56 to i64
  %58 = getelementptr inbounds [2 x %struct.XSdPs], ptr @SdInstance, i64 0, i64 %57
  %59 = getelementptr inbounds %struct.XSdPs, ptr %58, i32 0, i32 1
  store i32 0, ptr %59, align 4, !tbaa !14
  %60 = load i8, ptr %3, align 1, !tbaa !5
  %61 = zext i8 %60 to i64
  %62 = getelementptr inbounds [2 x %struct.XSdPs], ptr @SdInstance, i64 0, i64 %61
  %63 = load ptr, ptr %6, align 8, !tbaa !12
  %64 = load ptr, ptr %6, align 8, !tbaa !12
  %65 = getelementptr inbounds %struct.XSdPs_Config, ptr %64, i32 0, i32 1
  %66 = load i32, ptr %65, align 4, !tbaa !19
  %67 = call i32 @XSdPs_CfgInitialize(ptr noundef %62, ptr noundef %63, i32 noundef %66)
  store i32 %67, ptr %5, align 4, !tbaa !8
  %68 = load i32, ptr %5, align 4, !tbaa !8
  %69 = sext i32 %68 to i64
  %70 = icmp ne i64 %69, 0
  br i1 %70, label %71, label %77

71:                                               ; preds = %55
  %72 = load i8, ptr %4, align 1, !tbaa !5
  %73 = zext i8 %72 to i32
  %74 = or i32 %73, 1
  %75 = trunc i32 %74 to i8
  store i8 %75, ptr %4, align 1, !tbaa !5
  %76 = load i8, ptr %4, align 1, !tbaa !5
  store i8 %76, ptr %2, align 1
  store i32 1, ptr %7, align 4
  br label %101

77:                                               ; preds = %55
  %78 = load i8, ptr %3, align 1, !tbaa !5
  %79 = zext i8 %78 to i64
  %80 = getelementptr inbounds [2 x %struct.XSdPs], ptr @SdInstance, i64 0, i64 %79
  %81 = call i32 @XSdPs_CardInitialize(ptr noundef %80)
  store i32 %81, ptr %5, align 4, !tbaa !8
  %82 = load i32, ptr %5, align 4, !tbaa !8
  %83 = sext i32 %82 to i64
  %84 = icmp ne i64 %83, 0
  br i1 %84, label %85, label %91

85:                                               ; preds = %77
  %86 = load i8, ptr %4, align 1, !tbaa !5
  %87 = zext i8 %86 to i32
  %88 = or i32 %87, 1
  %89 = trunc i32 %88 to i8
  store i8 %89, ptr %4, align 1, !tbaa !5
  %90 = load i8, ptr %4, align 1, !tbaa !5
  store i8 %90, ptr %2, align 1
  store i32 1, ptr %7, align 4
  br label %101

91:                                               ; preds = %77
  %92 = load i8, ptr %4, align 1, !tbaa !5
  %93 = zext i8 %92 to i32
  %94 = and i32 %93, -2
  %95 = trunc i32 %94 to i8
  store i8 %95, ptr %4, align 1, !tbaa !5
  %96 = load i8, ptr %4, align 1, !tbaa !5
  %97 = load i8, ptr %3, align 1, !tbaa !5
  %98 = zext i8 %97 to i64
  %99 = getelementptr inbounds [2 x i8], ptr @Stat, i64 0, i64 %98
  store i8 %96, ptr %99, align 1, !tbaa !5
  %100 = load i8, ptr %4, align 1, !tbaa !5
  store i8 %100, ptr %2, align 1
  store i32 1, ptr %7, align 4
  br label %101

101:                                              ; preds = %91, %85, %71, %49, %21, %14
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %4) #4
  %102 = load i8, ptr %2, align 1
  ret i8 %102
}

declare i32 @XSdPs_CfgInitialize(ptr noundef, ptr noundef, i32 noundef) #2

declare i32 @XSdPs_CardInitialize(ptr noundef) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !6, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = !{!13, !13, i64 0}
!13 = !{!"any pointer", !6, i64 0}
!14 = !{!15, !9, i64 36}
!15 = !{!"", !16, i64 0, !9, i64 36, !9, i64 40, !9, i64 44, !9, i64 48, !6, i64 52, !6, i64 53, !6, i64 54, !6, i64 55, !9, i64 56, !6, i64 60, !6, i64 64, !9, i64 80, !6, i64 84, !9, i64 100, !9, i64 104, !9, i64 108, !9, i64 112, !9, i64 116, !18, i64 120, !17, i64 128, !9, i64 132, !6, i64 136, !9, i64 140}
!16 = !{!"", !17, i64 0, !9, i64 4, !9, i64 8, !9, i64 12, !9, i64 16, !9, i64 20, !9, i64 24, !9, i64 28, !6, i64 32}
!17 = !{!"short", !6, i64 0}
!18 = !{!"long", !6, i64 0}
!19 = !{!16, !9, i64 4}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XSdPs = type { %struct.XSdPs_Config, i32, i32, i32, i32, i8, i8, i8, i8, i32, i8, [4 x i32], i32, [4 x i32], i32, i32, i32, i32, i32, i64, i16, i32, i8, i32 }
%struct.XSdPs_Config = type { i16, i32, i32, i32, i32, i32, i32, i32, i8 }

@Stat = external hidden local_unnamed_addr global [2 x i8], align 1
@SdInstance = external hidden global [2 x %struct.XSdPs], align 16
@BaseAddress = external hidden local_unnamed_addr global [2 x i32], align 4
@CardDetect = external hidden local_unnamed_addr global [2 x i32], align 4

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @disk_status(i8 noundef zeroext) local_unnamed_addr #0

declare ptr @XSdPs_LookupConfig(i16 noundef zeroext) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local zeroext i8 @disk_initialize(i8 noundef zeroext %0) local_unnamed_addr #0 {
  %2 = tail call zeroext i8 @disk_status(i8 noundef zeroext %0)
  %3 = and i8 %2, 3
  %or.cond.not = icmp eq i8 %3, 1
  br i1 %or.cond.not, label %4, label %29

4:                                                ; preds = %1
  %5 = zext i8 %0 to i64
  %6 = getelementptr inbounds [2 x i32], ptr @CardDetect, i64 0, i64 %5
  %7 = load i32, ptr %6, align 4, !tbaa !5
  %.not27 = icmp eq i32 %7, 0
  br i1 %.not27, label %.loopexit, label %.preheader

.preheader:                                       ; preds = %4
  %8 = getelementptr inbounds [2 x i32], ptr @BaseAddress, i64 0, i64 %5
  br label %9

9:                                                ; preds = %.preheader, %9
  %10 = load i32, ptr %8, align 4, !tbaa !5
  %11 = add i32 %10, 36
  %12 = zext i32 %11 to i64
  %13 = tail call i32 @Xil_In32(i64 noundef %12)
  %14 = and i32 %13, 458752
  %.not28 = icmp eq i32 %14, 458752
  br i1 %.not28, label %.loopexit, label %9, !llvm.loop !9

.loopexit:                                        ; preds = %9, %4
  %15 = zext i8 %0 to i16
  %16 = tail call ptr @XSdPs_LookupConfig(i16 noundef zeroext %15) #3
  %17 = icmp eq ptr %16, null
  br i1 %17, label %29, label %18

18:                                               ; preds = %.loopexit
  %19 = getelementptr inbounds [2 x %struct.XSdPs], ptr @SdInstance, i64 0, i64 %5
  %20 = getelementptr inbounds i8, ptr %19, i64 36
  store i32 0, ptr %20, align 4, !tbaa !11
  %21 = getelementptr inbounds i8, ptr %16, i64 4
  %22 = load i32, ptr %21, align 4, !tbaa !16
  %23 = tail call i32 @XSdPs_CfgInitialize(ptr noundef nonnull %19, ptr noundef nonnull %16, i32 noundef %22) #3
  %.not29 = icmp eq i32 %23, 0
  br i1 %.not29, label %24, label %29

24:                                               ; preds = %18
  %25 = tail call i32 @XSdPs_CardInitialize(ptr noundef nonnull %19) #3
  %.not30 = icmp eq i32 %25, 0
  br i1 %.not30, label %26, label %29

26:                                               ; preds = %24
  %27 = and i8 %2, -4
  %28 = getelementptr inbounds [2 x i8], ptr @Stat, i64 0, i64 %5
  store i8 %27, ptr %28, align 1, !tbaa !17
  br label %29

29:                                               ; preds = %24, %18, %.loopexit, %1, %26
  %.0 = phi i8 [ %27, %26 ], [ %2, %1 ], [ %2, %.loopexit ], [ %2, %18 ], [ %2, %24 ]
  ret i8 %.0
}

declare i32 @XSdPs_CfgInitialize(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1

declare i32 @XSdPs_CardInitialize(ptr noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !6, i64 36}
!12 = !{!"", !13, i64 0, !6, i64 36, !6, i64 40, !6, i64 44, !6, i64 48, !7, i64 52, !7, i64 53, !7, i64 54, !7, i64 55, !6, i64 56, !7, i64 60, !7, i64 64, !6, i64 80, !7, i64 84, !6, i64 100, !6, i64 104, !6, i64 108, !6, i64 112, !6, i64 116, !15, i64 120, !14, i64 128, !6, i64 132, !7, i64 136, !6, i64 140}
!13 = !{!"", !14, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !7, i64 32}
!14 = !{!"short", !7, i64 0}
!15 = !{!"long", !7, i64 0}
!16 = !{!13, !6, i64 4}
!17 = !{!7, !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass