; LLVM IR from tangjz/acm-icpc :: 51nod/1376.ll (Z6updateiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Fenwick = type { i32, i32 }

@tot = external dso_local global i32, align 4
@bit = external dso_local global [50002 x %struct.Fenwick], align 16

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z6updateiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !5
  br label %7

7:                                                ; preds = %56, %3
  %8 = load i32, ptr %4, align 4, !tbaa !5
  %9 = load i32, ptr @tot, align 4, !tbaa !5
  %10 = icmp sle i32 %8, %9
  br i1 %10, label %11, label %63

11:                                               ; preds = %7
  %12 = load i32, ptr %4, align 4, !tbaa !5
  %13 = sext i32 %12 to i64
  %14 = getelementptr inbounds [50002 x %struct.Fenwick], ptr @bit, i64 0, i64 %13
  %15 = getelementptr inbounds %struct.Fenwick, ptr %14, i32 0, i32 0
  %16 = load i32, ptr %15, align 8, !tbaa !9
  %17 = load i32, ptr %5, align 4, !tbaa !5
  %18 = icmp slt i32 %16, %17
  br i1 %18, label %19, label %30

19:                                               ; preds = %11
  %20 = load i32, ptr %5, align 4, !tbaa !5
  %21 = load i32, ptr %4, align 4, !tbaa !5
  %22 = sext i32 %21 to i64
  %23 = getelementptr inbounds [50002 x %struct.Fenwick], ptr @bit, i64 0, i64 %22
  %24 = getelementptr inbounds %struct.Fenwick, ptr %23, i32 0, i32 0
  store i32 %20, ptr %24, align 8, !tbaa !9
  %25 = load i32, ptr %6, align 4, !tbaa !5
  %26 = load i32, ptr %4, align 4, !tbaa !5
  %27 = sext i32 %26 to i64
  %28 = getelementptr inbounds [50002 x %struct.Fenwick], ptr @bit, i64 0, i64 %27
  %29 = getelementptr inbounds %struct.Fenwick, ptr %28, i32 0, i32 1
  store i32 %25, ptr %29, align 4, !tbaa !11
  br label %55

30:                                               ; preds = %11
  %31 = load i32, ptr %4, align 4, !tbaa !5
  %32 = sext i32 %31 to i64
  %33 = getelementptr inbounds [50002 x %struct.Fenwick], ptr @bit, i64 0, i64 %32
  %34 = getelementptr inbounds %struct.Fenwick, ptr %33, i32 0, i32 0
  %35 = load i32, ptr %34, align 8, !tbaa !9
  %36 = load i32, ptr %5, align 4, !tbaa !5
  %37 = icmp eq i32 %35, %36
  br i1 %37, label %38, label %54

38:                                               ; preds = %30
  %39 = load i32, ptr %6, align 4, !tbaa !5
  %40 = load i32, ptr %4, align 4, !tbaa !5
  %41 = sext i32 %40 to i64
  %42 = getelementptr inbounds [50002 x %struct.Fenwick], ptr @bit, i64 0, i64 %41
  %43 = getelementptr inbounds %struct.Fenwick, ptr %42, i32 0, i32 1
  %44 = load i32, ptr %43, align 4, !tbaa !11
  %45 = add nsw i32 %44, %39
  store i32 %45, ptr %43, align 4, !tbaa !11
  %46 = icmp sge i32 %45, 1000000007
  br i1 %46, label %47, label %54

47:                                               ; preds = %38
  %48 = load i32, ptr %4, align 4, !tbaa !5
  %49 = sext i32 %48 to i64
  %50 = getelementptr inbounds [50002 x %struct.Fenwick], ptr @bit, i64 0, i64 %49
  %51 = getelementptr inbounds %struct.Fenwick, ptr %50, i32 0, i32 1
  %52 = load i32, ptr %51, align 4, !tbaa !11
  %53 = sub nsw i32 %52, 1000000007
  store i32 %53, ptr %51, align 4, !tbaa !11
  br label %54

54:                                               ; preds = %47, %38, %30
  br label %55

55:                                               ; preds = %54, %19
  br label %56

56:                                               ; preds = %55
  %57 = load i32, ptr %4, align 4, !tbaa !5
  %58 = load i32, ptr %4, align 4, !tbaa !5
  %59 = sub nsw i32 0, %58
  %60 = and i32 %57, %59
  %61 = load i32, ptr %4, align 4, !tbaa !5
  %62 = add nsw i32 %61, %60
  store i32 %62, ptr %4, align 4, !tbaa !5
  br label %7, !llvm.loop !12

63:                                               ; preds = %7
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"_ZTS7Fenwick", !6, i64 0, !6, i64 4}
!11 = !{!10, !6, i64 4}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Fenwick = type { i32, i32 }

@tot = external dso_local local_unnamed_addr global i32, align 4
@bit = external dso_local local_unnamed_addr global [50002 x %struct.Fenwick], align 16

; Function Attrs: mustprogress nofree norecurse nosync nounwind memory(readwrite, argmem: none, inaccessiblemem: none) uwtable
define dso_local void @_Z6updateiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = load i32, ptr @tot, align 4, !tbaa !5
  %.not18 = icmp slt i32 %4, %0
  br i1 %.not18, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %3, %20
  %.019 = phi i32 [ %23, %20 ], [ %0, %3 ]
  %5 = sext i32 %.019 to i64
  %6 = getelementptr inbounds [50002 x %struct.Fenwick], ptr @bit, i64 0, i64 %5
  %7 = load i32, ptr %6, align 8, !tbaa !9
  %8 = icmp slt i32 %7, %1
  br i1 %8, label %9, label %11

9:                                                ; preds = %.lr.ph
  store i32 %1, ptr %6, align 8, !tbaa !9
  %10 = getelementptr inbounds i8, ptr %6, i64 4
  store i32 %2, ptr %10, align 4, !tbaa !11
  br label %20

11:                                               ; preds = %.lr.ph
  %12 = icmp eq i32 %7, %1
  br i1 %12, label %13, label %20

13:                                               ; preds = %11
  %14 = getelementptr inbounds i8, ptr %6, i64 4
  %15 = load i32, ptr %14, align 4, !tbaa !11
  %16 = add nsw i32 %15, %2
  store i32 %16, ptr %14, align 4, !tbaa !11
  %17 = icmp sgt i32 %16, 1000000006
  br i1 %17, label %18, label %20

18:                                               ; preds = %13
  %19 = add nsw i32 %16, -1000000007
  store i32 %19, ptr %14, align 4, !tbaa !11
  br label %20

20:                                               ; preds = %9, %18, %13, %11
  %21 = sub nsw i32 0, %.019
  %22 = and i32 %.019, %21
  %23 = add nsw i32 %22, %.019
  %.not = icmp sgt i32 %23, %4
  br i1 %.not, label %._crit_edge, label %.lr.ph, !llvm.loop !12

._crit_edge:                                      ; preds = %20, %3
  ret void
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind memory(readwrite, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"_ZTS7Fenwick", !6, i64 0, !6, i64 4}
!11 = !{!10, !6, i64 4}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass