; LLVM IR from FrancesoM/Bisc8FX :: sdk_projects/bisc8_platform/ps7_cortexa9_0/standalone_domain/bsp/ps7_cortexa9_0_ (EpGetSetupData)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XUsbPs = type { %struct.XUsbPs_SetupData, %struct.XUsbPs_Config, i32, ptr, %struct.XUsbPs_DeviceConfig, ptr, ptr, i32, ptr, i8, ptr }
%struct.XUsbPs_SetupData = type { i8, i8, i16, i16, i16 }
%struct.XUsbPs_Config = type { i16, i32 }
%struct.XUsbPs_DeviceConfig = type { i8, [12 x %struct.XUsbPs_EpConfig], i32, [12 x %struct.XUsbPs_Endpoint], i32 }
%struct.XUsbPs_EpConfig = type { %struct.XUsbPs_EpSetup, %struct.XUsbPs_EpSetup }
%struct.XUsbPs_EpSetup = type { i32, i32, i32, i16 }
%struct.XUsbPs_Endpoint = type { %struct.XUsbPs_EpOut, %struct.XUsbPs_EpIn }
%struct.XUsbPs_EpOut = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, ptr, i8, i32 }
%struct.XUsbPs_EpIn = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, ptr, i32 }

@Xil_AssertStatus = external global i32, align 4
@.str = external hidden unnamed_addr constant [171 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @Xil_Assert(ptr noundef, i32 noundef) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @Xil_Out32(i64 noundef, i32 noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @Xil_DCacheInvalidateRange(i64 noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @XUsbPs_EpGetSetupData(ptr noundef %0, i32 noundef %1, ptr noundef %2) #3 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca [2 x i32], align 4
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store ptr %2, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  %13 = load ptr, ptr %5, align 8, !tbaa !5
  %14 = icmp ne ptr %13, null
  br i1 %14, label %15, label %16

15:                                               ; preds = %3
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %17

16:                                               ; preds = %3
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 819)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %4, align 4
  store i32 1, ptr %12, align 4
  br label %188

17:                                               ; preds = %15
  %18 = load ptr, ptr %7, align 8, !tbaa !5
  %19 = icmp ne ptr %18, null
  br i1 %19, label %20, label %21

20:                                               ; preds = %17
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %22

21:                                               ; preds = %17
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 820)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %4, align 4
  store i32 1, ptr %12, align 4
  br label %188

22:                                               ; preds = %20
  %23 = load i32, ptr %6, align 4, !tbaa !9
  %24 = load ptr, ptr %5, align 8, !tbaa !5
  %25 = getelementptr inbounds %struct.XUsbPs, ptr %24, i32 0, i32 4
  %26 = getelementptr inbounds %struct.XUsbPs_DeviceConfig, ptr %25, i32 0, i32 0
  %27 = load i8, ptr %26, align 8, !tbaa !11
  %28 = zext i8 %27 to i32
  %29 = icmp slt i32 %23, %28
  br i1 %29, label %30, label %31

30:                                               ; preds = %22
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %32

31:                                               ; preds = %22
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 821)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %4, align 4
  store i32 1, ptr %12, align 4
  br label %188

32:                                               ; preds = %30
  %33 = load ptr, ptr %5, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.XUsbPs, ptr %33, i32 0, i32 4
  %35 = getelementptr inbounds %struct.XUsbPs_DeviceConfig, ptr %34, i32 0, i32 3
  %36 = load i32, ptr %6, align 4, !tbaa !9
  %37 = sext i32 %36 to i64
  %38 = getelementptr inbounds [12 x %struct.XUsbPs_Endpoint], ptr %35, i64 0, i64 %37
  %39 = getelementptr inbounds %struct.XUsbPs_Endpoint, ptr %38, i32 0, i32 0
  store ptr %39, ptr %8, align 8, !tbaa !5
  br label %40

40:                                               ; preds = %78, %32
  %41 = load ptr, ptr %5, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.XUsbPs, ptr %41, i32 0, i32 1
  %43 = getelementptr inbounds %struct.XUsbPs_Config, ptr %42, i32 0, i32 1
  %44 = load i32, ptr %43, align 4, !tbaa !17
  %45 = add i32 %44, 320
  %46 = zext i32 %45 to i64
  %47 = load ptr, ptr %5, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.XUsbPs, ptr %47, i32 0, i32 1
  %49 = getelementptr inbounds %struct.XUsbPs_Config, ptr %48, i32 0, i32 1
  %50 = load i32, ptr %49, align 4, !tbaa !17
  %51 = add i32 %50, 320
  %52 = zext i32 %51 to i64
  %53 = call i32 @Xil_In32(i64 noundef %52)
  %54 = or i32 %53, 8192
  call void @Xil_Out32(i64 noundef %46, i32 noundef %54)
  %55 = load ptr, ptr %8, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.XUsbPs_EpOut, ptr %55, i32 0, i32 0
  %57 = load ptr, ptr %56, align 8, !tbaa !18
  %58 = ptrtoint ptr %57 to i32
  %59 = zext i32 %58 to i64
  call void @Xil_DCacheInvalidateRange(i64 noundef %59, i32 noundef 64)
  %60 = load ptr, ptr %8, align 8, !tbaa !5
  %61 = getelementptr inbounds %struct.XUsbPs_EpOut, ptr %60, i32 0, i32 0
  %62 = load ptr, ptr %61, align 8, !tbaa !18
  %63 = ptrtoint ptr %62 to i32
  %64 = add i32 %63, 40
  %65 = zext i32 %64 to i64
  %66 = inttoptr i64 %65 to ptr
  %67 = load i32, ptr %66, align 4, !tbaa !9
  %68 = getelementptr inbounds [2 x i32], ptr %9, i64 0, i64 0
  store i32 %67, ptr %68, align 4, !tbaa !9
  %69 = load ptr, ptr %8, align 8, !tbaa !5
  %70 = getelementptr inbounds %struct.XUsbPs_EpOut, ptr %69, i32 0, i32 0
  %71 = load ptr, ptr %70, align 8, !tbaa !18
  %72 = ptrtoint ptr %71 to i32
  %73 = add i32 %72, 44
  %74 = zext i32 %73 to i64
  %75 = inttoptr i64 %74 to ptr
  %76 = load i32, ptr %75, align 4, !tbaa !9
  %77 = getelementptr inbounds [2 x i32], ptr %9, i64 0, i64 1
  store i32 %76, ptr %77, align 4, !tbaa !9
  br label %78

78:                                               ; preds = %40
  %79 = load ptr, ptr %5, align 8, !tbaa !5
  %80 = getelementptr inbounds %struct.XUsbPs, ptr %79, i32 0, i32 1
  %81 = getelementptr inbounds %struct.XUsbPs_Config, ptr %80, i32 0, i32 1
  %82 = load i32, ptr %81, align 4, !tbaa !17
  %83 = add i32 %82, 320
  %84 = zext i32 %83 to i64
  %85 = call i32 @Xil_In32(i64 noundef %84)
  %86 = and i32 %85, 8192
  %87 = icmp ne i32 %86, 0
  %88 = zext i1 %87 to i64
  %89 = select i1 %87, i32 1, i32 0
  %90 = icmp eq i32 0, %89
  br i1 %90, label %40, label %91, !llvm.loop !20

91:                                               ; preds = %78
  %92 = load ptr, ptr %5, align 8, !tbaa !5
  %93 = getelementptr inbounds %struct.XUsbPs, ptr %92, i32 0, i32 1
  %94 = getelementptr inbounds %struct.XUsbPs_Config, ptr %93, i32 0, i32 1
  %95 = load i32, ptr %94, align 4, !tbaa !17
  %96 = add i32 %95, 428
  %97 = zext i32 %96 to i64
  %98 = load i32, ptr %6, align 4, !tbaa !9
  %99 = shl i32 1, %98
  call void @Xil_Out32(i64 noundef %97, i32 noundef %99)
  %100 = load ptr, ptr %5, align 8, !tbaa !5
  %101 = getelementptr inbounds %struct.XUsbPs, ptr %100, i32 0, i32 1
  %102 = getelementptr inbounds %struct.XUsbPs_Config, ptr %101, i32 0, i32 1
  %103 = load i32, ptr %102, align 4, !tbaa !17
  %104 = add i32 %103, 320
  %105 = zext i32 %104 to i64
  %106 = load ptr, ptr %5, align 8, !tbaa !5
  %107 = getelementptr inbounds %struct.XUsbPs, ptr %106, i32 0, i32 1
  %108 = getelementptr inbounds %struct.XUsbPs_Config, ptr %107, i32 0, i32 1
  %109 = load i32, ptr %108, align 4, !tbaa !17
  %110 = add i32 %109, 320
  %111 = zext i32 %110 to i64
  %112 = call i32 @Xil_In32(i64 noundef %111)
  %113 = and i32 %112, -8193
  call void @Xil_Out32(i64 noundef %105, i32 noundef %113)
  %114 = getelementptr inbounds [2 x i32], ptr %9, i64 0, i64 0
  store ptr %114, ptr %10, align 8, !tbaa !5
  %115 = load ptr, ptr %10, align 8, !tbaa !5
  %116 = getelementptr inbounds i8, ptr %115, i64 0
  %117 = load i8, ptr %116, align 1, !tbaa !22
  %118 = load ptr, ptr %7, align 8, !tbaa !5
  %119 = getelementptr inbounds %struct.XUsbPs_SetupData, ptr %118, i32 0, i32 0
  store i8 %117, ptr %119, align 2, !tbaa !23
  %120 = load ptr, ptr %10, align 8, !tbaa !5
  %121 = getelementptr inbounds i8, ptr %120, i64 1
  %122 = load i8, ptr %121, align 1, !tbaa !22
  %123 = load ptr, ptr %7, align 8, !tbaa !5
  %124 = getelementptr inbounds %struct.XUsbPs_SetupData, ptr %123, i32 0, i32 1
  store i8 %122, ptr %124, align 1, !tbaa !24
  %125 = load ptr, ptr %10, align 8, !tbaa !5
  %126 = getelementptr inbounds i8, ptr %125, i64 3
  %127 = load i8, ptr %126, align 1, !tbaa !22
  %128 = zext i8 %127 to i32
  %129 = shl i32 %128, 8
  %130 = load ptr, ptr %10, align 8, !tbaa !5
  %131 = getelementptr inbounds i8, ptr %130, i64 2
  %132 = load i8, ptr %131, align 1, !tbaa !22
  %133 = zext i8 %132 to i32
  %134 = or i32 %129, %133
  %135 = trunc i32 %134 to i16
  %136 = load ptr, ptr %7, align 8, !tbaa !5
  %137 = getelementptr inbounds %struct.XUsbPs_SetupData, ptr %136, i32 0, i32 2
  store i16 %135, ptr %137, align 2, !tbaa !25
  %138 = load ptr, ptr %10, align 8, !tbaa !5
  %139 = getelementptr inbounds i8, ptr %138, i64 5
  %140 = load i8, ptr %139, align 1, !tbaa !22
  %141 = zext i8 %140 to i32
  %142 = shl i32 %141, 8
  %143 = load ptr, ptr %10, align 8, !tbaa !5
  %144 = getelementptr inbounds i8, ptr %143, i64 4
  %145 = load i8, ptr %144, align 1, !tbaa !22
  %146 = zext i8 %145 to i32
  %147 = or i32 %142, %146
  %148 = trunc i32 %147 to i16
  %149 = load ptr, ptr %7, align 8, !tbaa !5
  %150 = getelementptr inbounds %struct.XUsbPs_SetupData, ptr %149, i32 0, i32 3
  store i16 %148, ptr %150, align 2, !tbaa !26
  %151 = load ptr, ptr %10, align 8, !tbaa !5
  %152 = getelementptr inbounds i8, ptr %151, i64 7
  %153 = load i8, ptr %152, align 1, !tbaa !22
  %154 = zext i8 %153 to i32
  %155 = shl i32 %154, 8
  %156 = load ptr, ptr %10, align 8, !tbaa !5
  %157 = getelementptr inbounds i8, ptr %156, i64 6
  %158 = load i8, ptr %157, align 1, !tbaa !22
  %159 = zext i8 %158 to i32
  %160 = or i32 %155, %159
  %161 = trunc i32 %160 to i16
  %162 = load ptr, ptr %7, align 8, !tbaa !5
  %163 = getelementptr inbounds %struct.XUsbPs_SetupData, ptr %162, i32 0, i32 4
  store i16 %161, ptr %163, align 2, !tbaa !27
  store i32 1000000, ptr %11, align 4, !tbaa !9
  br label %164

164:                                              ; preds = %182, %91
  %165 = load ptr, ptr %5, align 8, !tbaa !5
  %166 = getelementptr inbounds %struct.XUsbPs, ptr %165, i32 0, i32 1
  %167 = getelementptr inbounds %struct.XUsbPs_Config, ptr %166, i32 0, i32 1
  %168 = load i32, ptr %167, align 4, !tbaa !17
  %169 = add i32 %168, 428
  %170 = zext i32 %169 to i64
  %171 = call i32 @Xil_In32(i64 noundef %170)
  %172 = load i32, ptr %6, align 4, !tbaa !9
  %173 = shl i32 1, %172
  %174 = and i32 %171, %173
  %175 = icmp ne i32 %174, 0
  br i1 %175, label %176, label %180

176:                                              ; preds = %164
  %177 = load i32, ptr %11, align 4, !tbaa !9
  %178 = add nsw i32 %177, -1
  store i32 %178, ptr %11, align 4, !tbaa !9
  %179 = icmp ne i32 %178, 0
  br label %180

180:                                              ; preds = %176, %164
  %181 = phi i1 [ false, %164 ], [ %179, %176 ]
  br i1 %181, label %182, label %183

182:                                              ; preds = %180
  br label %164, !llvm.loop !28

183:                                              ; preds = %180
  %184 = load i32, ptr %11, align 4, !tbaa !9
  %185 = icmp eq i32 0, %184
  br i1 %185, label %186, label %187

186:                                              ; preds = %183
  store i32 1, ptr %4, align 4
  store i32 1, ptr %12, align 4
  br label %188

187:                                              ; preds = %183
  store i32 0, ptr %4, align 4
  store i32 1, ptr %12, align 4
  br label %188

188:                                              ; preds = %187, %186, %31, %21, %16
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #4
  %189 = load i32, ptr %4, align 4
  ret i32 %189
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !7, i64 32}
!12 = !{!"", !13, i64 0, !15, i64 8, !10, i64 16, !6, i64 24, !16, i64 32, !6, i64 2352, !6, i64 2360, !10, i64 2368, !6, i64 2376, !7, i64 2384, !6, i64 2392}
!13 = !{!"", !7, i64 0, !7, i64 1, !14, i64 2, !14, i64 4, !14, i64 6}
!14 = !{!"short", !7, i64 0}
!15 = !{!"", !14, i64 0, !10, i64 4}
!16 = !{!"", !7, i64 0, !7, i64 4, !10, i64 388, !7, i64 392, !10, i64 2312}
!17 = !{!12, !10, i64 12}
!18 = !{!19, !6, i64 0}
!19 = !{!"", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !10, i64 56, !10, i64 60, !6, i64 64, !7, i64 72, !10, i64 76}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
!22 = !{!7, !7, i64 0}
!23 = !{!13, !7, i64 0}
!24 = !{!13, !7, i64 1}
!25 = !{!13, !14, i64 2}
!26 = !{!13, !14, i64 4}
!27 = !{!13, !14, i64 6}
!28 = distinct !{!28, !21}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XUsbPs_Endpoint = type { %struct.XUsbPs_EpOut, %struct.XUsbPs_EpIn }
%struct.XUsbPs_EpOut = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, ptr, i8, i32 }
%struct.XUsbPs_EpIn = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, ptr, i32 }

@Xil_AssertStatus = external local_unnamed_addr global i32, align 4
@.str = external hidden unnamed_addr constant [171 x i8], align 1

declare void @Xil_Assert(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @Xil_Out32(i64 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) local_unnamed_addr #1

declare void @Xil_DCacheInvalidateRange(i64 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @XUsbPs_EpGetSetupData(ptr noundef readonly %0, i32 noundef %1, ptr noundef writeonly %2) local_unnamed_addr #2 {
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %5, label %4

4:                                                ; preds = %3
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !5
  %.not39 = icmp eq ptr %2, null
  br i1 %.not39, label %11, label %6

5:                                                ; preds = %3
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 819) #3
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %69

6:                                                ; preds = %4
  %7 = getelementptr inbounds i8, ptr %0, i64 32
  %8 = load i8, ptr %7, align 8, !tbaa !9
  %9 = zext i8 %8 to i32
  %10 = icmp sgt i32 %9, %1
  br i1 %10, label %12, label %17

11:                                               ; preds = %4
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 820) #3
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %69

12:                                               ; preds = %6
  %13 = getelementptr inbounds i8, ptr %0, i64 424
  %14 = sext i32 %1 to i64
  %15 = getelementptr inbounds [12 x %struct.XUsbPs_Endpoint], ptr %13, i64 0, i64 %14
  %16 = getelementptr inbounds i8, ptr %0, i64 12
  br label %18

17:                                               ; preds = %6
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 821) #3
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %69

18:                                               ; preds = %18, %12
  %19 = load i32, ptr %16, align 4, !tbaa !16
  %20 = add i32 %19, 320
  %21 = zext i32 %20 to i64
  %22 = tail call i32 @Xil_In32(i64 noundef %21)
  %23 = or i32 %22, 8192
  tail call void @Xil_Out32(i64 noundef %21, i32 noundef %23)
  %24 = load ptr, ptr %15, align 8, !tbaa !17
  %25 = ptrtoint ptr %24 to i64
  %26 = and i64 %25, 4294967295
  tail call void @Xil_DCacheInvalidateRange(i64 noundef %26, i32 noundef 64) #3
  %27 = load ptr, ptr %15, align 8, !tbaa !17
  %28 = ptrtoint ptr %27 to i64
  %29 = add i64 %28, 40
  %30 = and i64 %29, 4294967295
  %31 = inttoptr i64 %30 to ptr
  %32 = load i32, ptr %31, align 4, !tbaa !5
  %33 = add i64 %28, 44
  %34 = and i64 %33, 4294967295
  %35 = inttoptr i64 %34 to ptr
  %36 = load i32, ptr %35, align 4, !tbaa !5
  %37 = load i32, ptr %16, align 4, !tbaa !16
  %38 = add i32 %37, 320
  %39 = zext i32 %38 to i64
  %40 = tail call i32 @Xil_In32(i64 noundef %39)
  %41 = and i32 %40, 8192
  %42 = icmp eq i32 %41, 0
  br i1 %42, label %18, label %43, !llvm.loop !19

43:                                               ; preds = %18
  %44 = load i32, ptr %16, align 4, !tbaa !16
  %45 = add i32 %44, 428
  %46 = zext i32 %45 to i64
  %47 = shl nuw i32 1, %1
  tail call void @Xil_Out32(i64 noundef %46, i32 noundef %47)
  %48 = load i32, ptr %16, align 4, !tbaa !16
  %49 = add i32 %48, 320
  %50 = zext i32 %49 to i64
  %51 = tail call i32 @Xil_In32(i64 noundef %50)
  %52 = and i32 %51, -8193
  tail call void @Xil_Out32(i64 noundef %50, i32 noundef %52)
  %.sroa.0.0.extract.trunc = trunc i32 %32 to i8
  store i8 %.sroa.0.0.extract.trunc, ptr %2, align 2, !tbaa !21
  %.sroa.0.1.extract.shift = lshr i32 %32, 8
  %.sroa.0.1.extract.trunc = trunc i32 %.sroa.0.1.extract.shift to i8
  %53 = getelementptr inbounds i8, ptr %2, i64 1
  store i8 %.sroa.0.1.extract.trunc, ptr %53, align 1, !tbaa !22
  %54 = lshr i32 %32, 16
  %55 = trunc nuw i32 %54 to i16
  %56 = getelementptr inbounds i8, ptr %2, i64 2
  store i16 %55, ptr %56, align 2, !tbaa !23
  %57 = trunc i32 %36 to i16
  %58 = getelementptr inbounds i8, ptr %2, i64 4
  store i16 %57, ptr %58, align 2, !tbaa !24
  %59 = lshr i32 %36, 16
  %60 = trunc nuw i32 %59 to i16
  %61 = getelementptr inbounds i8, ptr %2, i64 6
  store i16 %60, ptr %61, align 2, !tbaa !25
  br label %62

62:                                               ; preds = %62, %43
  %.0 = phi i32 [ 1000000, %43 ], [ %68, %62 ]
  %63 = load i32, ptr %16, align 4, !tbaa !16
  %64 = add i32 %63, 428
  %65 = zext i32 %64 to i64
  %66 = tail call i32 @Xil_In32(i64 noundef %65)
  %67 = and i32 %66, %47
  %.not41.not = icmp eq i32 %67, 0
  %68 = add nsw i32 %.0, -1
  %.not42 = icmp eq i32 %68, 0
  %or.cond = select i1 %.not41.not, i1 true, i1 %.not42
  br i1 %or.cond, label %.critedge, label %62, !llvm.loop !26

.critedge:                                        ; preds = %62
  %not..not41.not = xor i1 %.not41.not, true
  %. = zext i1 %not..not41.not to i32
  br label %69

69:                                               ; preds = %.critedge, %17, %11, %5
  %.033 = phi i32 [ 0, %17 ], [ 0, %11 ], [ 0, %5 ], [ %., %.critedge ]
  ret i32 %.033
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !7, i64 32}
!10 = !{!"", !11, i64 0, !13, i64 8, !6, i64 16, !14, i64 24, !15, i64 32, !14, i64 2352, !14, i64 2360, !6, i64 2368, !14, i64 2376, !7, i64 2384, !14, i64 2392}
!11 = !{!"", !7, i64 0, !7, i64 1, !12, i64 2, !12, i64 4, !12, i64 6}
!12 = !{!"short", !7, i64 0}
!13 = !{!"", !12, i64 0, !6, i64 4}
!14 = !{!"any pointer", !7, i64 0}
!15 = !{!"", !7, i64 0, !7, i64 4, !6, i64 388, !7, i64 392, !6, i64 2312}
!16 = !{!10, !6, i64 12}
!17 = !{!18, !14, i64 0}
!18 = !{!"", !14, i64 0, !14, i64 8, !14, i64 16, !14, i64 24, !14, i64 32, !14, i64 40, !14, i64 48, !6, i64 56, !6, i64 60, !14, i64 64, !7, i64 72, !6, i64 76}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = !{!11, !7, i64 0}
!22 = !{!11, !7, i64 1}
!23 = !{!11, !12, i64 2}
!24 = !{!11, !12, i64 4}
!25 = !{!11, !12, i64 6}
!26 = distinct !{!26, !20}


; Effective O3 passes: DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LICMPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass