; LLVM IR from tangjz/acm-icpc :: 51nod/1297.ll (Z7addEdgeii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Edge = type { i32, i32 }

@m = external dso_local global i32, align 4
@lnk = external dso_local global [100001 x i32], align 16
@e = external dso_local global [200003 x %struct.Edge], align 16

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z7addEdgeii(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca %struct.Edge, align 4
  %6 = alloca %struct.Edge, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #3
  %7 = getelementptr inbounds %struct.Edge, ptr %5, i32 0, i32 0
  %8 = load i32, ptr %3, align 4, !tbaa !5
  %9 = sext i32 %8 to i64
  %10 = getelementptr inbounds [100001 x i32], ptr @lnk, i64 0, i64 %9
  %11 = load i32, ptr %10, align 4, !tbaa !5
  store i32 %11, ptr %7, align 4, !tbaa !9
  %12 = getelementptr inbounds %struct.Edge, ptr %5, i32 0, i32 1
  %13 = load i32, ptr %4, align 4, !tbaa !5
  store i32 %13, ptr %12, align 4, !tbaa !11
  %14 = load i32, ptr @m, align 4, !tbaa !5
  %15 = sext i32 %14 to i64
  %16 = getelementptr inbounds [200003 x %struct.Edge], ptr @e, i64 0, i64 %15
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %16, ptr align 4 %5, i64 8, i1 false), !tbaa.struct !12
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #3
  %17 = load i32, ptr @m, align 4, !tbaa !5
  %18 = add nsw i32 %17, 1
  store i32 %18, ptr @m, align 4, !tbaa !5
  %19 = load i32, ptr %3, align 4, !tbaa !5
  %20 = sext i32 %19 to i64
  %21 = getelementptr inbounds [100001 x i32], ptr @lnk, i64 0, i64 %20
  store i32 %17, ptr %21, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  %22 = getelementptr inbounds %struct.Edge, ptr %6, i32 0, i32 0
  %23 = load i32, ptr %4, align 4, !tbaa !5
  %24 = sext i32 %23 to i64
  %25 = getelementptr inbounds [100001 x i32], ptr @lnk, i64 0, i64 %24
  %26 = load i32, ptr %25, align 4, !tbaa !5
  store i32 %26, ptr %22, align 4, !tbaa !9
  %27 = getelementptr inbounds %struct.Edge, ptr %6, i32 0, i32 1
  %28 = load i32, ptr %3, align 4, !tbaa !5
  store i32 %28, ptr %27, align 4, !tbaa !11
  %29 = load i32, ptr @m, align 4, !tbaa !5
  %30 = sext i32 %29 to i64
  %31 = getelementptr inbounds [200003 x %struct.Edge], ptr @e, i64 0, i64 %30
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %31, ptr align 4 %6, i64 8, i1 false), !tbaa.struct !12
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  %32 = load i32, ptr @m, align 4, !tbaa !5
  %33 = add nsw i32 %32, 1
  store i32 %33, ptr @m, align 4, !tbaa !5
  %34 = load i32, ptr %4, align 4, !tbaa !5
  %35 = sext i32 %34 to i64
  %36 = getelementptr inbounds [100001 x i32], ptr @lnk, i64 0, i64 %35
  store i32 %32, ptr %36, align 4, !tbaa !5
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"_ZTS4Edge", !6, i64 0, !6, i64 4}
!11 = !{!10, !6, i64 4}
!12 = !{i64 0, i64 4, !5, i64 4, i64 4, !5}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Edge = type { i32, i32 }

@m = external dso_local local_unnamed_addr global i32, align 4
@lnk = external dso_local local_unnamed_addr global [100001 x i32], align 16
@e = external dso_local local_unnamed_addr global [200003 x %struct.Edge], align 16

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, argmem: none, inaccessiblemem: none) uwtable
define dso_local void @_Z7addEdgeii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = sext i32 %0 to i64
  %4 = getelementptr inbounds [100001 x i32], ptr @lnk, i64 0, i64 %3
  %5 = load i32, ptr %4, align 4, !tbaa !5
  %6 = load i32, ptr @m, align 4, !tbaa !5
  %7 = sext i32 %6 to i64
  %8 = getelementptr inbounds [200003 x %struct.Edge], ptr @e, i64 0, i64 %7
  store i32 %5, ptr %8, align 8, !tbaa !5
  %.sroa.42.0..sroa_idx = getelementptr inbounds i8, ptr %8, i64 4
  store i32 %1, ptr %.sroa.42.0..sroa_idx, align 4, !tbaa !5
  %9 = add nsw i32 %6, 1
  store i32 %6, ptr %4, align 4, !tbaa !5
  %10 = sext i32 %1 to i64
  %11 = getelementptr inbounds [100001 x i32], ptr @lnk, i64 0, i64 %10
  %12 = load i32, ptr %11, align 4, !tbaa !5
  %13 = sext i32 %9 to i64
  %14 = getelementptr inbounds [200003 x %struct.Edge], ptr @e, i64 0, i64 %13
  store i32 %12, ptr %14, align 8, !tbaa !5
  %.sroa.4.0..sroa_idx = getelementptr inbounds i8, ptr %14, i64 4
  store i32 %0, ptr %.sroa.4.0..sroa_idx, align 4, !tbaa !5
  %15 = add nsw i32 %6, 2
  store i32 %15, ptr @m, align 4, !tbaa !5
  store i32 %9, ptr %11, align 4, !tbaa !5
  ret void
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass