; LLVM IR from FrancesoM/Bisc8FX :: sdk_projects/bisc8_platform/ps7_cortexa9_0/standalone_domain/bsp/ps7_cortexa9_0_ (MmcCardEnum)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XSdPs = type { %struct.XSdPs_Config, i32, i32, i32, i32, i8, i8, i8, i8, i32, i8, [4 x i32], i32, [4 x i32], i32, i32, i32, i32, i32, i64, i16, i32, i8, i32 }
%struct.XSdPs_Config = type { i16, i32, i32, i32, i32, i32, i32, i32, i8 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @XSdPs_CheckCardDetect(ptr noundef) #1

declare i32 @XSdPs_CardReset(ptr noundef) #1

declare i32 @XSdPs_CardOpCond(ptr noundef) #1

declare i32 @XSdPs_GetCardId(ptr noundef) #1

declare i32 @XSdPs_GetCsd(ptr noundef) #1

declare i32 @XSdPs_Change_ClkFreq(ptr noundef, i32 noundef) #1

declare i32 @XSdPs_Select_Card(ptr noundef) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @XSdPs_MmcCardEnum(ptr noundef %0) #2 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  %4 = load ptr, ptr %2, align 8, !tbaa !5
  %5 = call i32 @XSdPs_CheckCardDetect(ptr noundef %4)
  store i32 %5, ptr %3, align 4, !tbaa !9
  %6 = load i32, ptr %3, align 4, !tbaa !9
  %7 = sext i32 %6 to i64
  %8 = icmp ne i64 %7, 0
  br i1 %8, label %9, label %10

9:                                                ; preds = %1
  store i32 1, ptr %3, align 4, !tbaa !9
  br label %58

10:                                               ; preds = %1
  %11 = load ptr, ptr %2, align 8, !tbaa !5
  %12 = call i32 @XSdPs_CardReset(ptr noundef %11)
  store i32 %12, ptr %3, align 4, !tbaa !9
  %13 = load i32, ptr %3, align 4, !tbaa !9
  %14 = sext i32 %13 to i64
  %15 = icmp ne i64 %14, 0
  br i1 %15, label %16, label %17

16:                                               ; preds = %10
  store i32 1, ptr %3, align 4, !tbaa !9
  br label %58

17:                                               ; preds = %10
  %18 = load ptr, ptr %2, align 8, !tbaa !5
  %19 = call i32 @XSdPs_CardOpCond(ptr noundef %18)
  store i32 %19, ptr %3, align 4, !tbaa !9
  %20 = load i32, ptr %3, align 4, !tbaa !9
  %21 = sext i32 %20 to i64
  %22 = icmp ne i64 %21, 0
  br i1 %22, label %23, label %24

23:                                               ; preds = %17
  store i32 1, ptr %3, align 4, !tbaa !9
  br label %58

24:                                               ; preds = %17
  %25 = load ptr, ptr %2, align 8, !tbaa !5
  %26 = call i32 @XSdPs_GetCardId(ptr noundef %25)
  store i32 %26, ptr %3, align 4, !tbaa !9
  %27 = load i32, ptr %3, align 4, !tbaa !9
  %28 = sext i32 %27 to i64
  %29 = icmp ne i64 %28, 0
  br i1 %29, label %30, label %31

30:                                               ; preds = %24
  store i32 1, ptr %3, align 4, !tbaa !9
  br label %58

31:                                               ; preds = %24
  %32 = load ptr, ptr %2, align 8, !tbaa !5
  %33 = call i32 @XSdPs_GetCsd(ptr noundef %32)
  store i32 %33, ptr %3, align 4, !tbaa !9
  %34 = load i32, ptr %3, align 4, !tbaa !9
  %35 = sext i32 %34 to i64
  %36 = icmp ne i64 %35, 0
  br i1 %36, label %37, label %38

37:                                               ; preds = %31
  store i32 1, ptr %3, align 4, !tbaa !9
  br label %58

38:                                               ; preds = %31
  %39 = load ptr, ptr %2, align 8, !tbaa !5
  %40 = getelementptr inbounds %struct.XSdPs, ptr %39, i32 0, i32 9
  store i32 26000000, ptr %40, align 8, !tbaa !11
  %41 = load ptr, ptr %2, align 8, !tbaa !5
  %42 = load ptr, ptr %2, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.XSdPs, ptr %42, i32 0, i32 9
  %44 = load i32, ptr %43, align 8, !tbaa !11
  %45 = call i32 @XSdPs_Change_ClkFreq(ptr noundef %41, i32 noundef %44)
  store i32 %45, ptr %3, align 4, !tbaa !9
  %46 = load i32, ptr %3, align 4, !tbaa !9
  %47 = sext i32 %46 to i64
  %48 = icmp ne i64 %47, 0
  br i1 %48, label %49, label %50

49:                                               ; preds = %38
  store i32 1, ptr %3, align 4, !tbaa !9
  br label %58

50:                                               ; preds = %38
  %51 = load ptr, ptr %2, align 8, !tbaa !5
  %52 = call i32 @XSdPs_Select_Card(ptr noundef %51)
  store i32 %52, ptr %3, align 4, !tbaa !9
  %53 = load i32, ptr %3, align 4, !tbaa !9
  %54 = sext i32 %53 to i64
  %55 = icmp ne i64 %54, 0
  br i1 %55, label %56, label %57

56:                                               ; preds = %50
  store i32 1, ptr %3, align 4, !tbaa !9
  br label %58

57:                                               ; preds = %50
  store i32 0, ptr %3, align 4, !tbaa !9
  br label %58

58:                                               ; preds = %57, %56, %49, %37, %30, %23, %16, %9
  %59 = load i32, ptr %3, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  ret i32 %59
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 56}
!12 = !{!"", !13, i64 0, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !7, i64 52, !7, i64 53, !7, i64 54, !7, i64 55, !10, i64 56, !7, i64 60, !7, i64 64, !10, i64 80, !7, i64 84, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !15, i64 120, !14, i64 128, !10, i64 132, !7, i64 136, !10, i64 140}
!13 = !{!"", !14, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !7, i64 32}
!14 = !{!"short", !7, i64 0}
!15 = !{!"long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare i32 @XSdPs_CheckCardDetect(ptr noundef) local_unnamed_addr #0

declare i32 @XSdPs_CardReset(ptr noundef) local_unnamed_addr #0

declare i32 @XSdPs_CardOpCond(ptr noundef) local_unnamed_addr #0

declare i32 @XSdPs_GetCardId(ptr noundef) local_unnamed_addr #0

declare i32 @XSdPs_GetCsd(ptr noundef) local_unnamed_addr #0

declare i32 @XSdPs_Change_ClkFreq(ptr noundef, i32 noundef) local_unnamed_addr #0

declare i32 @XSdPs_Select_Card(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @XSdPs_MmcCardEnum(ptr noundef %0) local_unnamed_addr #1 {
  %2 = tail call i32 @XSdPs_CheckCardDetect(ptr noundef %0) #2
  %.not = icmp eq i32 %2, 0
  br i1 %.not, label %3, label %16

3:                                                ; preds = %1
  %4 = tail call i32 @XSdPs_CardReset(ptr noundef %0) #2
  %.not16 = icmp eq i32 %4, 0
  br i1 %.not16, label %5, label %16

5:                                                ; preds = %3
  %6 = tail call i32 @XSdPs_CardOpCond(ptr noundef %0) #2
  %.not17 = icmp eq i32 %6, 0
  br i1 %.not17, label %7, label %16

7:                                                ; preds = %5
  %8 = tail call i32 @XSdPs_GetCardId(ptr noundef %0) #2
  %.not18 = icmp eq i32 %8, 0
  br i1 %.not18, label %9, label %16

9:                                                ; preds = %7
  %10 = tail call i32 @XSdPs_GetCsd(ptr noundef %0) #2
  %.not19 = icmp eq i32 %10, 0
  br i1 %.not19, label %11, label %16

11:                                               ; preds = %9
  %12 = getelementptr inbounds i8, ptr %0, i64 56
  store i32 26000000, ptr %12, align 8, !tbaa !5
  %13 = tail call i32 @XSdPs_Change_ClkFreq(ptr noundef %0, i32 noundef 26000000) #2
  %.not20 = icmp eq i32 %13, 0
  br i1 %.not20, label %14, label %16

14:                                               ; preds = %11
  %15 = tail call i32 @XSdPs_Select_Card(ptr noundef nonnull %0) #2
  %.not21 = icmp ne i32 %15, 0
  %. = zext i1 %.not21 to i32
  br label %16

16:                                               ; preds = %14, %11, %9, %7, %5, %3, %1
  %.0 = phi i32 [ 1, %1 ], [ 1, %3 ], [ 1, %5 ], [ 1, %7 ], [ 1, %9 ], [ 1, %11 ], [ %., %14 ]
  ret i32 %.0
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 56}
!6 = !{!"", !7, i64 0, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !9, i64 52, !9, i64 53, !9, i64 54, !9, i64 55, !11, i64 56, !9, i64 60, !9, i64 64, !11, i64 80, !9, i64 84, !11, i64 100, !11, i64 104, !11, i64 108, !11, i64 112, !11, i64 116, !12, i64 120, !8, i64 128, !11, i64 132, !9, i64 136, !11, i64 140}
!7 = !{!"", !8, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !9, i64 32}
!8 = !{!"short", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"long", !9, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass