; LLVM IR from FrancesoM/Bisc8FX :: sdk_projects/bisc8_platform/ps7_cortexa9_0/standalone_domain/bsp/ps7_cortexa9_0_ (ResetHw)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @XUsbPs_ResetHw(i32 noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  store i32 %0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  store i32 0, ptr %4, align 4, !tbaa !5
  %5 = load i32, ptr %2, align 4, !tbaa !5
  %6 = add i32 %5, 328
  %7 = zext i32 %6 to i64
  call void @Xil_Out32(i64 noundef %7, i32 noundef 0)
  %8 = load i32, ptr %2, align 4, !tbaa !5
  %9 = add i32 %8, 324
  %10 = zext i32 %9 to i64
  %11 = call i32 @Xil_In32(i64 noundef %10)
  store i32 %11, ptr %3, align 4, !tbaa !5
  %12 = load i32, ptr %2, align 4, !tbaa !5
  %13 = add i32 %12, 324
  %14 = zext i32 %13 to i64
  %15 = load i32, ptr %3, align 4, !tbaa !5
  call void @Xil_Out32(i64 noundef %14, i32 noundef %15)
  %16 = load i32, ptr %2, align 4, !tbaa !5
  %17 = add i32 %16, 320
  %18 = zext i32 %17 to i64
  %19 = call i32 @Xil_In32(i64 noundef %18)
  store i32 %19, ptr %3, align 4, !tbaa !5
  %20 = load i32, ptr %3, align 4, !tbaa !5
  %21 = or i32 %20, 2
  store i32 %21, ptr %3, align 4, !tbaa !5
  %22 = load i32, ptr %2, align 4, !tbaa !5
  %23 = add i32 %22, 320
  %24 = zext i32 %23 to i64
  %25 = load i32, ptr %3, align 4, !tbaa !5
  call void @Xil_Out32(i64 noundef %24, i32 noundef %25)
  %26 = load i32, ptr %2, align 4, !tbaa !5
  %27 = add i32 %26, 320
  %28 = zext i32 %27 to i64
  %29 = call i32 @Xil_In32(i64 noundef %28)
  store i32 %29, ptr %3, align 4, !tbaa !5
  br label %30

30:                                               ; preds = %39, %1
  %31 = load i32, ptr %3, align 4, !tbaa !5
  %32 = and i32 %31, 2
  %33 = icmp ne i32 %32, 0
  br i1 %33, label %34, label %37

34:                                               ; preds = %30
  %35 = load i32, ptr %4, align 4, !tbaa !5
  %36 = icmp ult i32 %35, 1048575
  br label %37

37:                                               ; preds = %34, %30
  %38 = phi i1 [ false, %30 ], [ %36, %34 ]
  br i1 %38, label %39, label %46

39:                                               ; preds = %37
  %40 = load i32, ptr %2, align 4, !tbaa !5
  %41 = add i32 %40, 320
  %42 = zext i32 %41 to i64
  %43 = call i32 @Xil_In32(i64 noundef %42)
  store i32 %43, ptr %3, align 4, !tbaa !5
  %44 = load i32, ptr %4, align 4, !tbaa !5
  %45 = add i32 %44, 1
  store i32 %45, ptr %4, align 4, !tbaa !5
  br label %30, !llvm.loop !9

46:                                               ; preds = %37
  %47 = load i32, ptr %2, align 4, !tbaa !5
  %48 = add i32 %47, 340
  %49 = zext i32 %48 to i64
  call void @Xil_Out32(i64 noundef %49, i32 noundef 0)
  %50 = load i32, ptr %2, align 4, !tbaa !5
  %51 = add i32 %50, 344
  %52 = zext i32 %51 to i64
  call void @Xil_Out32(i64 noundef %52, i32 noundef 0)
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @Xil_Out32(i64 noundef, i32 noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @XUsbPs_ResetHw(i32 noundef %0) local_unnamed_addr #0 {
  %2 = add i32 %0, 328
  %3 = zext i32 %2 to i64
  tail call void @Xil_Out32(i64 noundef %3, i32 noundef 0)
  %4 = add i32 %0, 324
  %5 = zext i32 %4 to i64
  %6 = tail call i32 @Xil_In32(i64 noundef %5)
  tail call void @Xil_Out32(i64 noundef %5, i32 noundef %6)
  %7 = add i32 %0, 320
  %8 = zext i32 %7 to i64
  %9 = tail call i32 @Xil_In32(i64 noundef %8)
  %10 = or i32 %9, 2
  tail call void @Xil_Out32(i64 noundef %8, i32 noundef %10)
  %11 = tail call i32 @Xil_In32(i64 noundef %8)
  %12 = and i32 %11, 2
  %.not = icmp eq i32 %12, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %1, %.lr.ph
  %.016 = phi i32 [ %14, %.lr.ph ], [ 0, %1 ]
  %13 = tail call i32 @Xil_In32(i64 noundef %8)
  %14 = add nuw nsw i32 %.016, 1
  %15 = and i32 %13, 2
  %16 = icmp ne i32 %15, 0
  %17 = icmp ult i32 %.016, 1048574
  %18 = select i1 %16, i1 %17, i1 false
  br i1 %18, label %.lr.ph, label %._crit_edge, !llvm.loop !5

._crit_edge:                                      ; preds = %.lr.ph, %1
  %19 = add i32 %0, 340
  %20 = zext i32 %19 to i64
  tail call void @Xil_Out32(i64 noundef %20, i32 noundef 0)
  %21 = add i32 %0, 344
  %22 = zext i32 %21 to i64
  tail call void @Xil_Out32(i64 noundef %22, i32 noundef 0)
  ret void
}

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @Xil_Out32(i64 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass