; LLVM IR from tangjz/acm-icpc :: 51nod/1162.ll (Z7mod_mulnnn)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef { i64, i64 } @_Z7mod_mulnnn(i64 noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, i64 noundef %4, i64 noundef %5) #1 {
  %7 = alloca i128, align 16
  %8 = alloca i128, align 16
  %9 = alloca i128, align 16
  %10 = alloca i128, align 16
  %11 = alloca i128, align 16
  %12 = alloca i128, align 16
  %13 = alloca i128, align 16
  %14 = alloca i128, align 16
  %15 = getelementptr inbounds { i64, i64 }, ptr %8, i32 0, i32 0
  store i64 %0, ptr %15, align 16
  %16 = getelementptr inbounds { i64, i64 }, ptr %8, i32 0, i32 1
  store i64 %1, ptr %16, align 8
  %17 = load i128, ptr %8, align 16, !tbaa !5
  %18 = getelementptr inbounds { i64, i64 }, ptr %9, i32 0, i32 0
  store i64 %2, ptr %18, align 16
  %19 = getelementptr inbounds { i64, i64 }, ptr %9, i32 0, i32 1
  store i64 %3, ptr %19, align 8
  %20 = load i128, ptr %9, align 16, !tbaa !5
  %21 = getelementptr inbounds { i64, i64 }, ptr %10, i32 0, i32 0
  store i64 %4, ptr %21, align 16
  %22 = getelementptr inbounds { i64, i64 }, ptr %10, i32 0, i32 1
  store i64 %5, ptr %22, align 8
  %23 = load i128, ptr %10, align 16, !tbaa !5
  store i128 %17, ptr %11, align 16, !tbaa !5
  store i128 %20, ptr %12, align 16, !tbaa !5
  store i128 %23, ptr %13, align 16, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 16, ptr %14) #3
  store i128 0, ptr %14, align 16, !tbaa !5
  %24 = load i128, ptr %11, align 16, !tbaa !5
  %25 = load i128, ptr %12, align 16, !tbaa !5
  %26 = icmp slt i128 %24, %25
  br i1 %26, label %27, label %28

27:                                               ; preds = %6
  call void @_ZSt4swapInENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 16 dereferenceable(16) %11, ptr noundef nonnull align 16 dereferenceable(16) %12) #3
  br label %28

28:                                               ; preds = %27, %6
  br label %29

29:                                               ; preds = %48, %28
  %30 = load i128, ptr %12, align 16, !tbaa !5
  %31 = icmp sgt i128 %30, 0
  br i1 %31, label %32, label %55

32:                                               ; preds = %29
  %33 = load i128, ptr %12, align 16, !tbaa !5
  %34 = and i128 %33, 1073741823
  %35 = icmp ne i128 %34, 0
  br i1 %35, label %36, label %46

36:                                               ; preds = %32
  %37 = load i128, ptr %14, align 16, !tbaa !5
  %38 = load i128, ptr %11, align 16, !tbaa !5
  %39 = load i128, ptr %12, align 16, !tbaa !5
  %40 = and i128 %39, 1073741823
  %41 = mul nsw i128 %38, %40
  %42 = add nsw i128 %37, %41
  %43 = load i128, ptr %13, align 16, !tbaa !5
  %44 = srem i128 %42, %43
  store i128 %44, ptr %14, align 16, !tbaa !5
  %45 = icmp ne i128 %44, 0
  br label %46

46:                                               ; preds = %36, %32
  %47 = phi i1 [ false, %32 ], [ %45, %36 ]
  br label %48

48:                                               ; preds = %46
  %49 = load i128, ptr %11, align 16, !tbaa !5
  %50 = shl i128 %49, 30
  %51 = load i128, ptr %13, align 16, !tbaa !5
  %52 = srem i128 %50, %51
  store i128 %52, ptr %11, align 16, !tbaa !5
  %53 = load i128, ptr %12, align 16, !tbaa !5
  %54 = ashr i128 %53, 30
  store i128 %54, ptr %12, align 16, !tbaa !5
  br label %29, !llvm.loop !9

55:                                               ; preds = %29
  %56 = load i128, ptr %14, align 16, !tbaa !5
  store i128 %56, ptr %7, align 16
  call void @llvm.lifetime.end.p0(i64 16, ptr %14) #3
  %57 = load { i64, i64 }, ptr %7, align 16
  ret { i64, i64 } %57
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapInENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 16 dereferenceable(16), ptr noundef nonnull align 16 dereferenceable(16)) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"__int128", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef { i64, i64 } @_Z7mod_mulnnn(i64 noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, i64 noundef %4, i64 noundef %5) local_unnamed_addr #0 {
  %7 = alloca i128, align 16
  %8 = alloca i128, align 16
  %.sroa.27.0.insert.ext = zext i64 %1 to i128
  %.sroa.27.0.insert.shift = shl nuw i128 %.sroa.27.0.insert.ext, 64
  %.sroa.06.0.insert.ext = zext i64 %0 to i128
  %.sroa.06.0.insert.insert = or disjoint i128 %.sroa.27.0.insert.shift, %.sroa.06.0.insert.ext
  %.sroa.25.0.insert.ext = zext i64 %3 to i128
  %.sroa.25.0.insert.shift = shl nuw i128 %.sroa.25.0.insert.ext, 64
  %.sroa.04.0.insert.ext = zext i64 %2 to i128
  %.sroa.04.0.insert.insert = or disjoint i128 %.sroa.25.0.insert.shift, %.sroa.04.0.insert.ext
  %.sroa.2.0.insert.ext = zext i64 %5 to i128
  %.sroa.2.0.insert.shift = shl nuw i128 %.sroa.2.0.insert.ext, 64
  %.sroa.0.0.insert.ext = zext i64 %4 to i128
  %.sroa.0.0.insert.insert = or disjoint i128 %.sroa.2.0.insert.shift, %.sroa.0.0.insert.ext
  store i128 %.sroa.06.0.insert.insert, ptr %7, align 16, !tbaa !5
  store i128 %.sroa.04.0.insert.insert, ptr %8, align 16, !tbaa !5
  %9 = icmp slt i128 %.sroa.06.0.insert.insert, %.sroa.04.0.insert.insert
  br i1 %9, label %10, label %11

10:                                               ; preds = %6
  call void @_ZSt4swapInENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 16 dereferenceable(16) %7, ptr noundef nonnull align 16 dereferenceable(16) %8) #2
  %.pr.pre = load i128, ptr %8, align 16, !tbaa !5
  %.promoted.pre = load i128, ptr %7, align 16, !tbaa !5
  br label %11

11:                                               ; preds = %10, %6
  %.promoted = phi i128 [ %.promoted.pre, %10 ], [ %.sroa.06.0.insert.insert, %6 ]
  %.pr = phi i128 [ %.pr.pre, %10 ], [ %.sroa.04.0.insert.insert, %6 ]
  %12 = icmp sgt i128 %.pr, 0
  br i1 %12, label %.lr.ph, label %24

.lr.ph:                                           ; preds = %11, %20
  %.012 = phi i128 [ %.1, %20 ], [ 0, %11 ]
  %13 = phi i128 [ %23, %20 ], [ %.pr, %11 ]
  %14 = phi i128 [ %22, %20 ], [ %.promoted, %11 ]
  %15 = and i128 %13, 1073741823
  %.not = icmp eq i128 %15, 0
  br i1 %.not, label %20, label %16

16:                                               ; preds = %.lr.ph
  %17 = mul nsw i128 %14, %15
  %18 = add nsw i128 %17, %.012
  %19 = srem i128 %18, %.sroa.0.0.insert.insert
  br label %20

20:                                               ; preds = %.lr.ph, %16
  %.1 = phi i128 [ %19, %16 ], [ %.012, %.lr.ph ]
  %21 = shl i128 %14, 30
  %22 = srem i128 %21, %.sroa.0.0.insert.insert
  %23 = lshr i128 %13, 30
  %.not14 = icmp ult i128 %13, 1073741824
  br i1 %.not14, label %._crit_edge, label %.lr.ph, !llvm.loop !9

._crit_edge:                                      ; preds = %20
  %extract.t = trunc i128 %.1 to i64
  %extract = lshr i128 %.1, 64
  %extract.t15 = trunc nuw i128 %extract to i64
  br label %24

24:                                               ; preds = %._crit_edge, %11
  %.0.lcssa.off0 = phi i64 [ %extract.t, %._crit_edge ], [ 0, %11 ]
  %.0.lcssa.off64 = phi i64 [ %extract.t15, %._crit_edge ], [ 0, %11 ]
  %.fca.0.insert = insertvalue { i64, i64 } poison, i64 %.0.lcssa.off0, 0
  %.fca.1.insert = insertvalue { i64, i64 } %.fca.0.insert, i64 %.0.lcssa.off64, 1
  ret { i64, i64 } %.fca.1.insert
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapInENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 16 dereferenceable(16), ptr noundef nonnull align 16 dereferenceable(16)) local_unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"__int128", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass