; LLVM IR from tangjz/acm-icpc :: 51nod/1076.ll (Z5solvev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@n = external dso_local global i32, align 4
@tot = external dso_local global i32, align 4
@pre = external dso_local global [50001 x i32], align 16
@cnt = external dso_local global i32, align 4
@bcc = external dso_local global [50001 x i32], align 16

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z6tarjanii(i32 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z3dfsi(i32 noundef) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5solvev() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  store i32 0, ptr @tot, align 4, !tbaa !5
  %3 = load i32, ptr @n, align 4, !tbaa !5
  %4 = sext i32 %3 to i64
  %5 = mul i64 %4, 4
  call void @llvm.memset.p0.i64(ptr align 16 @pre, i8 -1, i64 %5, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #3
  store i32 0, ptr %1, align 4, !tbaa !5
  br label %6

6:                                                ; preds = %21, %0
  %7 = load i32, ptr %1, align 4, !tbaa !5
  %8 = load i32, ptr @n, align 4, !tbaa !5
  %9 = icmp slt i32 %7, %8
  br i1 %9, label %11, label %10

10:                                               ; preds = %6
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #3
  br label %24

11:                                               ; preds = %6
  %12 = load i32, ptr %1, align 4, !tbaa !5
  %13 = sext i32 %12 to i64
  %14 = getelementptr inbounds [50001 x i32], ptr @pre, i64 0, i64 %13
  %15 = load i32, ptr %14, align 4, !tbaa !5
  %16 = icmp eq i32 %15, -1
  br i1 %16, label %17, label %20

17:                                               ; preds = %11
  %18 = load i32, ptr %1, align 4, !tbaa !5
  %19 = call noundef i32 @_Z6tarjanii(i32 noundef %18, i32 noundef -1)
  br label %20

20:                                               ; preds = %17, %11
  br label %21

21:                                               ; preds = %20
  %22 = load i32, ptr %1, align 4, !tbaa !5
  %23 = add nsw i32 %22, 1
  store i32 %23, ptr %1, align 4, !tbaa !5
  br label %6, !llvm.loop !9

24:                                               ; preds = %10
  store i32 0, ptr @cnt, align 4, !tbaa !5
  %25 = load i32, ptr @n, align 4, !tbaa !5
  %26 = sext i32 %25 to i64
  %27 = mul i64 %26, 4
  call void @llvm.memset.p0.i64(ptr align 16 @bcc, i8 -1, i64 %27, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #3
  store i32 0, ptr %2, align 4, !tbaa !5
  br label %28

28:                                               ; preds = %44, %24
  %29 = load i32, ptr %2, align 4, !tbaa !5
  %30 = load i32, ptr @n, align 4, !tbaa !5
  %31 = icmp slt i32 %29, %30
  br i1 %31, label %33, label %32

32:                                               ; preds = %28
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #3
  br label %47

33:                                               ; preds = %28
  %34 = load i32, ptr %2, align 4, !tbaa !5
  %35 = sext i32 %34 to i64
  %36 = getelementptr inbounds [50001 x i32], ptr @bcc, i64 0, i64 %35
  %37 = load i32, ptr %36, align 4, !tbaa !5
  %38 = icmp eq i32 %37, -1
  br i1 %38, label %39, label %43

39:                                               ; preds = %33
  %40 = load i32, ptr %2, align 4, !tbaa !5
  call void @_Z3dfsi(i32 noundef %40)
  %41 = load i32, ptr @cnt, align 4, !tbaa !5
  %42 = add nsw i32 %41, 1
  store i32 %42, ptr @cnt, align 4, !tbaa !5
  br label %43

43:                                               ; preds = %39, %33
  br label %44

44:                                               ; preds = %43
  %45 = load i32, ptr %2, align 4, !tbaa !5
  %46 = add nsw i32 %45, 1
  store i32 %46, ptr %2, align 4, !tbaa !5
  br label %28, !llvm.loop !11

47:                                               ; preds = %32
  ret void
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@n = external dso_local local_unnamed_addr global i32, align 4
@tot = external dso_local local_unnamed_addr global i32, align 4
@pre = external dso_local local_unnamed_addr global [50001 x i32], align 16
@cnt = external dso_local local_unnamed_addr global i32, align 4
@bcc = external dso_local local_unnamed_addr global [50001 x i32], align 16

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z6tarjanii(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z3dfsi(i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5solvev() local_unnamed_addr #0 {
  store i32 0, ptr @tot, align 4, !tbaa !5
  %1 = load i32, ptr @n, align 4, !tbaa !5
  %2 = sext i32 %1 to i64
  %3 = shl nsw i64 %2, 2
  tail call void @llvm.memset.p0.i64(ptr nonnull align 16 @pre, i8 -1, i64 %3, i1 false)
  %4 = icmp sgt i32 %1, 0
  br i1 %4, label %.lr.ph, label %._crit_edge.thread

._crit_edge.thread:                               ; preds = %0
  store i32 0, ptr @cnt, align 4, !tbaa !5
  tail call void @llvm.memset.p0.i64(ptr nonnull align 16 @bcc, i8 -1, i64 %3, i1 false)
  br label %._crit_edge13

._crit_edge:                                      ; preds = %13
  %.pre20 = shl nsw i64 %15, 2
  store i32 0, ptr @cnt, align 4, !tbaa !5
  tail call void @llvm.memset.p0.i64(ptr nonnull align 16 @bcc, i8 -1, i64 %.pre20, i1 false)
  %5 = icmp sgt i32 %14, 0
  br i1 %5, label %.lr.ph12, label %._crit_edge13

.lr.ph:                                           ; preds = %0, %13
  %6 = phi i32 [ %14, %13 ], [ %1, %0 ]
  %indvars.iv = phi i64 [ %indvars.iv.next, %13 ], [ 0, %0 ]
  %7 = getelementptr inbounds [50001 x i32], ptr @pre, i64 0, i64 %indvars.iv
  %8 = load i32, ptr %7, align 4, !tbaa !5
  %9 = icmp eq i32 %8, -1
  br i1 %9, label %10, label %13

10:                                               ; preds = %.lr.ph
  %11 = trunc nuw nsw i64 %indvars.iv to i32
  %12 = tail call noundef i32 @_Z6tarjanii(i32 noundef %11, i32 noundef -1)
  %.pre = load i32, ptr @n, align 4, !tbaa !5
  br label %13

13:                                               ; preds = %.lr.ph, %10
  %14 = phi i32 [ %6, %.lr.ph ], [ %.pre, %10 ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %15 = sext i32 %14 to i64
  %16 = icmp slt i64 %indvars.iv.next, %15
  br i1 %16, label %.lr.ph, label %._crit_edge, !llvm.loop !9

._crit_edge13:                                    ; preds = %25, %._crit_edge.thread, %._crit_edge
  ret void

.lr.ph12:                                         ; preds = %._crit_edge, %25
  %17 = phi i32 [ %26, %25 ], [ %14, %._crit_edge ]
  %indvars.iv16 = phi i64 [ %indvars.iv.next17, %25 ], [ 0, %._crit_edge ]
  %18 = getelementptr inbounds [50001 x i32], ptr @bcc, i64 0, i64 %indvars.iv16
  %19 = load i32, ptr %18, align 4, !tbaa !5
  %20 = icmp eq i32 %19, -1
  br i1 %20, label %21, label %25

21:                                               ; preds = %.lr.ph12
  %22 = trunc nuw nsw i64 %indvars.iv16 to i32
  tail call void @_Z3dfsi(i32 noundef %22)
  %23 = load i32, ptr @cnt, align 4, !tbaa !5
  %24 = add nsw i32 %23, 1
  store i32 %24, ptr @cnt, align 4, !tbaa !5
  %.pre19 = load i32, ptr @n, align 4, !tbaa !5
  br label %25

25:                                               ; preds = %.lr.ph12, %21
  %26 = phi i32 [ %17, %.lr.ph12 ], [ %.pre19, %21 ]
  %indvars.iv.next17 = add nuw nsw i64 %indvars.iv16, 1
  %27 = sext i32 %26 to i64
  %28 = icmp slt i64 %indvars.iv.next17, %27
  br i1 %28, label %.lr.ph12, label %._crit_edge13, !llvm.loop !11
}

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: BDCEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass