; LLVM IR from FrancesoM/Bisc8FX :: sdk_projects/bisc8_platform/ps7_cortexa9_0/standalone_domain/bsp/ps7_cortexa9_0_ (EpSetIsoHandler)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XUsbPs = type { %struct.XUsbPs_SetupData, %struct.XUsbPs_Config, i32, ptr, %struct.XUsbPs_DeviceConfig, ptr, ptr, i32, ptr, i8, ptr }
%struct.XUsbPs_SetupData = type { i8, i8, i16, i16, i16 }
%struct.XUsbPs_Config = type { i16, i32 }
%struct.XUsbPs_DeviceConfig = type { i8, [12 x %struct.XUsbPs_EpConfig], i32, [12 x %struct.XUsbPs_Endpoint], i32 }
%struct.XUsbPs_EpConfig = type { %struct.XUsbPs_EpSetup, %struct.XUsbPs_EpSetup }
%struct.XUsbPs_EpSetup = type { i32, i32, i32, i16 }
%struct.XUsbPs_Endpoint = type { %struct.XUsbPs_EpOut, %struct.XUsbPs_EpIn }
%struct.XUsbPs_EpOut = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, ptr, i8, i32 }
%struct.XUsbPs_EpIn = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, ptr, i32 }

@Xil_AssertStatus = external global i32, align 4
@.str = external hidden unnamed_addr constant [171 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @Xil_Assert(ptr noundef, i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @XUsbPs_EpSetIsoHandler(ptr noundef %0, i8 noundef zeroext %1, i8 noundef zeroext %2, ptr noundef %3) #2 {
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca i8, align 1
  %8 = alloca i8, align 1
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i8 %1, ptr %7, align 1, !tbaa !9
  store i8 %2, ptr %8, align 1, !tbaa !9
  store ptr %3, ptr %9, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  %13 = load ptr, ptr %6, align 8, !tbaa !5
  %14 = getelementptr inbounds %struct.XUsbPs, ptr %13, i32 0, i32 8
  %15 = load ptr, ptr %14, align 8, !tbaa !10
  store ptr %15, ptr %11, align 8, !tbaa !5
  %16 = load ptr, ptr %6, align 8, !tbaa !5
  %17 = icmp ne ptr %16, null
  br i1 %17, label %18, label %19

18:                                               ; preds = %4
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !17
  br label %20

19:                                               ; preds = %4
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 726)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !17
  store i32 0, ptr %5, align 4
  store i32 1, ptr %12, align 4
  br label %71

20:                                               ; preds = %18
  %21 = load ptr, ptr %9, align 8, !tbaa !5
  %22 = icmp ne ptr %21, null
  br i1 %22, label %23, label %24

23:                                               ; preds = %20
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !17
  br label %25

24:                                               ; preds = %20
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 727)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !17
  store i32 0, ptr %5, align 4
  store i32 1, ptr %12, align 4
  br label %71

25:                                               ; preds = %23
  %26 = load i8, ptr %7, align 1, !tbaa !9
  %27 = zext i8 %26 to i32
  %28 = load ptr, ptr %6, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.XUsbPs, ptr %28, i32 0, i32 4
  %30 = getelementptr inbounds %struct.XUsbPs_DeviceConfig, ptr %29, i32 0, i32 0
  %31 = load i8, ptr %30, align 8, !tbaa !18
  %32 = zext i8 %31 to i32
  %33 = icmp slt i32 %27, %32
  br i1 %33, label %34, label %35

34:                                               ; preds = %25
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !17
  br label %36

35:                                               ; preds = %25
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 728)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !17
  store i32 0, ptr %5, align 4
  store i32 1, ptr %12, align 4
  br label %71

36:                                               ; preds = %34
  %37 = load ptr, ptr %6, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.XUsbPs, ptr %37, i32 0, i32 4
  %39 = getelementptr inbounds %struct.XUsbPs_DeviceConfig, ptr %38, i32 0, i32 3
  %40 = load i8, ptr %7, align 1, !tbaa !9
  %41 = zext i8 %40 to i64
  %42 = getelementptr inbounds [12 x %struct.XUsbPs_Endpoint], ptr %39, i64 0, i64 %41
  store ptr %42, ptr %10, align 8, !tbaa !5
  %43 = load i8, ptr %8, align 1, !tbaa !9
  %44 = zext i8 %43 to i32
  %45 = and i32 %44, 2
  %46 = icmp ne i32 %45, 0
  br i1 %46, label %47, label %56

47:                                               ; preds = %36
  %48 = load ptr, ptr %9, align 8, !tbaa !5
  %49 = load ptr, ptr %10, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.XUsbPs_Endpoint, ptr %49, i32 0, i32 0
  %51 = getelementptr inbounds %struct.XUsbPs_EpOut, ptr %50, i32 0, i32 5
  store ptr %48, ptr %51, align 8, !tbaa !19
  %52 = load ptr, ptr %11, align 8, !tbaa !5
  %53 = load ptr, ptr %10, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.XUsbPs_Endpoint, ptr %53, i32 0, i32 0
  %55 = getelementptr inbounds %struct.XUsbPs_EpOut, ptr %54, i32 0, i32 6
  store ptr %52, ptr %55, align 8, !tbaa !23
  br label %56

56:                                               ; preds = %47, %36
  %57 = load i8, ptr %8, align 1, !tbaa !9
  %58 = zext i8 %57 to i32
  %59 = and i32 %58, 1
  %60 = icmp ne i32 %59, 0
  br i1 %60, label %61, label %70

61:                                               ; preds = %56
  %62 = load ptr, ptr %9, align 8, !tbaa !5
  %63 = load ptr, ptr %10, align 8, !tbaa !5
  %64 = getelementptr inbounds %struct.XUsbPs_Endpoint, ptr %63, i32 0, i32 1
  %65 = getelementptr inbounds %struct.XUsbPs_EpIn, ptr %64, i32 0, i32 5
  store ptr %62, ptr %65, align 8, !tbaa !24
  %66 = load ptr, ptr %11, align 8, !tbaa !5
  %67 = load ptr, ptr %10, align 8, !tbaa !5
  %68 = getelementptr inbounds %struct.XUsbPs_Endpoint, ptr %67, i32 0, i32 1
  %69 = getelementptr inbounds %struct.XUsbPs_EpIn, ptr %68, i32 0, i32 6
  store ptr %66, ptr %69, align 8, !tbaa !25
  br label %70

70:                                               ; preds = %61, %56
  store i32 0, ptr %5, align 4
  store i32 1, ptr %12, align 4
  br label %71

71:                                               ; preds = %70, %35, %24, %19
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  %72 = load i32, ptr %5, align 4
  ret i32 %72
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !6, i64 2376}
!11 = !{!"", !12, i64 0, !14, i64 8, !15, i64 16, !6, i64 24, !16, i64 32, !6, i64 2352, !6, i64 2360, !15, i64 2368, !6, i64 2376, !7, i64 2384, !6, i64 2392}
!12 = !{!"", !7, i64 0, !7, i64 1, !13, i64 2, !13, i64 4, !13, i64 6}
!13 = !{!"short", !7, i64 0}
!14 = !{!"", !13, i64 0, !15, i64 4}
!15 = !{!"int", !7, i64 0}
!16 = !{!"", !7, i64 0, !7, i64 4, !15, i64 388, !7, i64 392, !15, i64 2312}
!17 = !{!15, !15, i64 0}
!18 = !{!11, !7, i64 32}
!19 = !{!20, !6, i64 40}
!20 = !{!"", !21, i64 0, !22, i64 80}
!21 = !{!"", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !15, i64 56, !15, i64 60, !6, i64 64, !7, i64 72, !15, i64 76}
!22 = !{!"", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !15, i64 56, !15, i64 60, !6, i64 64, !15, i64 72}
!23 = !{!20, !6, i64 48}
!24 = !{!20, !6, i64 120}
!25 = !{!20, !6, i64 128}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XUsbPs_Endpoint = type { %struct.XUsbPs_EpOut, %struct.XUsbPs_EpIn }
%struct.XUsbPs_EpOut = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, ptr, i8, i32 }
%struct.XUsbPs_EpIn = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, ptr, i32 }

@Xil_AssertStatus = external local_unnamed_addr global i32, align 4
@.str = external hidden unnamed_addr constant [171 x i8], align 1

declare void @Xil_Assert(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local noundef i32 @XUsbPs_EpSetIsoHandler(ptr nocapture noundef %0, i8 noundef zeroext %1, i8 noundef zeroext %2, ptr noundef %3) local_unnamed_addr #1 {
  %5 = getelementptr inbounds i8, ptr %0, i64 2376
  %6 = load ptr, ptr %5, align 8, !tbaa !5
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !15
  %.not18 = icmp eq ptr %3, null
  br i1 %.not18, label %11, label %7

7:                                                ; preds = %4
  %8 = getelementptr inbounds i8, ptr %0, i64 32
  %9 = load i8, ptr %8, align 8, !tbaa !16
  %10 = icmp ugt i8 %9, %1
  br i1 %10, label %12, label %18

11:                                               ; preds = %4
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 727) #2
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !15
  br label %27

12:                                               ; preds = %7
  %13 = getelementptr inbounds i8, ptr %0, i64 424
  %14 = zext i8 %1 to i64
  %15 = getelementptr inbounds [12 x %struct.XUsbPs_Endpoint], ptr %13, i64 0, i64 %14
  %16 = zext i8 %2 to i32
  %17 = and i32 %16, 2
  %.not19 = icmp eq i32 %17, 0
  br i1 %.not19, label %22, label %19

18:                                               ; preds = %7
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 728) #2
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !15
  br label %27

19:                                               ; preds = %12
  %20 = getelementptr inbounds i8, ptr %15, i64 40
  store ptr %3, ptr %20, align 8, !tbaa !17
  %21 = getelementptr inbounds i8, ptr %15, i64 48
  store ptr %6, ptr %21, align 8, !tbaa !21
  br label %22

22:                                               ; preds = %19, %12
  %23 = and i32 %16, 1
  %.not20 = icmp eq i32 %23, 0
  br i1 %.not20, label %27, label %24

24:                                               ; preds = %22
  %25 = getelementptr inbounds i8, ptr %15, i64 120
  store ptr %3, ptr %25, align 8, !tbaa !22
  %26 = getelementptr inbounds i8, ptr %15, i64 128
  store ptr %6, ptr %26, align 8, !tbaa !23
  br label %27

27:                                               ; preds = %22, %24, %18, %11
  ret i32 0
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !13, i64 2376}
!6 = !{!"", !7, i64 0, !11, i64 8, !12, i64 16, !13, i64 24, !14, i64 32, !13, i64 2352, !13, i64 2360, !12, i64 2368, !13, i64 2376, !8, i64 2384, !13, i64 2392}
!7 = !{!"", !8, i64 0, !8, i64 1, !10, i64 2, !10, i64 4, !10, i64 6}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"short", !8, i64 0}
!11 = !{!"", !10, i64 0, !12, i64 4}
!12 = !{!"int", !8, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!"", !8, i64 0, !8, i64 4, !12, i64 388, !8, i64 392, !12, i64 2312}
!15 = !{!12, !12, i64 0}
!16 = !{!6, !8, i64 32}
!17 = !{!18, !13, i64 40}
!18 = !{!"", !19, i64 0, !20, i64 80}
!19 = !{!"", !13, i64 0, !13, i64 8, !13, i64 16, !13, i64 24, !13, i64 32, !13, i64 40, !13, i64 48, !12, i64 56, !12, i64 60, !13, i64 64, !8, i64 72, !12, i64 76}
!20 = !{!"", !13, i64 0, !13, i64 8, !13, i64 16, !13, i64 24, !13, i64 32, !13, i64 40, !13, i64 48, !12, i64 56, !12, i64 60, !13, i64 64, !12, i64 72}
!21 = !{!18, !13, i64 48}
!22 = !{!18, !13, i64 120}
!23 = !{!18, !13, i64 128}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass