; LLVM IR from Izaron/ACM-ICPC :: Timus Online Judge/Volume 1/1071. Nikifor 2.ll (Z3cani)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@x = external dso_local global i32, align 4
@y = external dso_local global i32, align 4
@tmp = external dso_local global i32, align 4
@curr = external dso_local global i32, align 4
@kz = external dso_local global i32, align 4
@vec = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z3cani(i32 noundef %0) #0 {
  %2 = alloca i1, align 1
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  call void @_ZNSt6vectorIiSaIiEE5clearEv(ptr noundef nonnull align 8 dereferenceable(24) @vec) #3
  %5 = load i32, ptr @y, align 4, !tbaa !5
  store i32 %5, ptr @tmp, align 4, !tbaa !5
  store i32 0, ptr @curr, align 4, !tbaa !5
  br label %6

6:                                                ; preds = %9, %1
  %7 = load i32, ptr @tmp, align 4, !tbaa !5
  %8 = icmp sgt i32 %7, 0
  br i1 %8, label %9, label %16

9:                                                ; preds = %6
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  %10 = load i32, ptr @tmp, align 4, !tbaa !5
  %11 = load i32, ptr %3, align 4, !tbaa !5
  %12 = srem i32 %10, %11
  store i32 %12, ptr %4, align 4, !tbaa !5
  call void @_ZNSt6vectorIiSaIiEE9push_backEOi(ptr noundef nonnull align 8 dereferenceable(24) @vec, ptr noundef nonnull align 4 dereferenceable(4) %4)
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  %13 = load i32, ptr %3, align 4, !tbaa !5
  %14 = load i32, ptr @tmp, align 4, !tbaa !5
  %15 = sdiv i32 %14, %13
  store i32 %15, ptr @tmp, align 4, !tbaa !5
  br label %6, !llvm.loop !9

16:                                               ; preds = %6
  %17 = load i32, ptr @x, align 4, !tbaa !5
  store i32 %17, ptr @tmp, align 4, !tbaa !5
  br label %18

18:                                               ; preds = %45, %16
  %19 = load i32, ptr @tmp, align 4, !tbaa !5
  %20 = icmp sgt i32 %19, 0
  br i1 %20, label %21, label %49

21:                                               ; preds = %18
  %22 = load i32, ptr @tmp, align 4, !tbaa !5
  %23 = load i32, ptr %3, align 4, !tbaa !5
  %24 = srem i32 %22, %23
  store i32 %24, ptr @kz, align 4, !tbaa !5
  %25 = load i32, ptr @curr, align 4, !tbaa !5
  %26 = sext i32 %25 to i64
  %27 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @vec) #3
  %28 = icmp ult i64 %26, %27
  br i1 %28, label %29, label %45

29:                                               ; preds = %21
  %30 = load i32, ptr @kz, align 4, !tbaa !5
  %31 = load i32, ptr @curr, align 4, !tbaa !5
  %32 = sext i32 %31 to i64
  %33 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vec, i64 noundef %32) #3
  %34 = load i32, ptr %33, align 4, !tbaa !5
  %35 = icmp eq i32 %30, %34
  br i1 %35, label %36, label %45

36:                                               ; preds = %29
  %37 = load i32, ptr @curr, align 4, !tbaa !5
  %38 = add nsw i32 %37, 1
  store i32 %38, ptr @curr, align 4, !tbaa !5
  %39 = load i32, ptr @curr, align 4, !tbaa !5
  %40 = sext i32 %39 to i64
  %41 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @vec) #3
  %42 = icmp eq i64 %40, %41
  br i1 %42, label %43, label %44

43:                                               ; preds = %36
  store i1 true, ptr %2, align 1
  br label %50

44:                                               ; preds = %36
  br label %45

45:                                               ; preds = %44, %29, %21
  %46 = load i32, ptr %3, align 4, !tbaa !5
  %47 = load i32, ptr @tmp, align 4, !tbaa !5
  %48 = sdiv i32 %47, %46
  store i32 %48, ptr @tmp, align 4, !tbaa !5
  br label %18, !llvm.loop !11

49:                                               ; preds = %18
  store i1 false, ptr %2, align 1
  br label %50

50:                                               ; preds = %49, %43
  %51 = load i1, ptr %2, align 1
  ret i1 %51
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE5clearEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE9push_backEOi(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(4)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@x = external dso_local local_unnamed_addr global i32, align 4
@y = external dso_local local_unnamed_addr global i32, align 4
@tmp = external dso_local local_unnamed_addr global i32, align 4
@curr = external dso_local local_unnamed_addr global i32, align 4
@kz = external dso_local local_unnamed_addr global i32, align 4
@vec = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z3cani(i32 noundef %0) local_unnamed_addr #0 {
  %2 = alloca i32, align 4
  tail call void @_ZNSt6vectorIiSaIiEE5clearEv(ptr noundef nonnull align 8 dereferenceable(24) @vec) #3
  %3 = load i32, ptr @y, align 4, !tbaa !5
  store i32 %3, ptr @tmp, align 4, !tbaa !5
  store i32 0, ptr @curr, align 4, !tbaa !5
  %4 = icmp sgt i32 %3, 0
  br i1 %4, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %1, %.lr.ph
  %5 = phi i32 [ %8, %.lr.ph ], [ %3, %1 ]
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
  %6 = srem i32 %5, %0
  store i32 %6, ptr %2, align 4, !tbaa !5
  call void @_ZNSt6vectorIiSaIiEE9push_backEOi(ptr noundef nonnull align 8 dereferenceable(24) @vec, ptr noundef nonnull align 4 dereferenceable(4) %2)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
  %7 = load i32, ptr @tmp, align 4, !tbaa !5
  %8 = sdiv i32 %7, %0
  store i32 %8, ptr @tmp, align 4, !tbaa !5
  %9 = icmp sgt i32 %8, 0
  br i1 %9, label %.lr.ph, label %._crit_edge, !llvm.loop !9

._crit_edge:                                      ; preds = %.lr.ph, %1
  %10 = load i32, ptr @x, align 4, !tbaa !5
  store i32 %10, ptr @tmp, align 4, !tbaa !5
  %11 = icmp sgt i32 %10, 0
  br i1 %11, label %.lr.ph7, label %._crit_edge8

.lr.ph7:                                          ; preds = %._crit_edge, %30
  %storemerge5 = phi i32 [ %32, %30 ], [ %10, %._crit_edge ]
  %12 = srem i32 %storemerge5, %0
  store i32 %12, ptr @kz, align 4, !tbaa !5
  %13 = load i32, ptr @curr, align 4, !tbaa !5
  %14 = sext i32 %13 to i64
  %15 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @vec) #3
  %16 = icmp ugt i64 %15, %14
  br i1 %16, label %17, label %30

17:                                               ; preds = %.lr.ph7
  %18 = load i32, ptr @kz, align 4, !tbaa !5
  %19 = load i32, ptr @curr, align 4, !tbaa !5
  %20 = sext i32 %19 to i64
  %21 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vec, i64 noundef %20) #3
  %22 = load i32, ptr %21, align 4, !tbaa !5
  %23 = icmp eq i32 %18, %22
  br i1 %23, label %24, label %30

24:                                               ; preds = %17
  %25 = load i32, ptr @curr, align 4, !tbaa !5
  %26 = add nsw i32 %25, 1
  store i32 %26, ptr @curr, align 4, !tbaa !5
  %27 = sext i32 %26 to i64
  %28 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @vec) #3
  %29 = icmp eq i64 %28, %27
  br i1 %29, label %._crit_edge8, label %30

30:                                               ; preds = %24, %17, %.lr.ph7
  %31 = load i32, ptr @tmp, align 4, !tbaa !5
  %32 = sdiv i32 %31, %0
  store i32 %32, ptr @tmp, align 4, !tbaa !5
  %33 = icmp sgt i32 %32, 0
  br i1 %33, label %.lr.ph7, label %._crit_edge8, !llvm.loop !11

._crit_edge8:                                     ; preds = %24, %30, %._crit_edge
  %.lcssa = phi i1 [ false, %._crit_edge ], [ false, %30 ], [ true, %24 ]
  ret i1 %.lcssa
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE5clearEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE9push_backEOi(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass