; LLVM IR from tangjz/acm-icpc :: 51nod/1376.ll (Z5queryiRiS_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Fenwick = type { i32, i32 }

@bit = external dso_local global [50002 x %struct.Fenwick], align 16

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z5queryiRiS_(i32 noundef %0, ptr noundef nonnull align 4 dereferenceable(4) %1, ptr noundef nonnull align 4 dereferenceable(4) %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  store i32 %0, ptr %4, align 4, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !9
  store ptr %2, ptr %6, align 8, !tbaa !9
  %7 = load ptr, ptr %5, align 8, !tbaa !9
  store i32 -1, ptr %7, align 4, !tbaa !5
  %8 = load ptr, ptr %6, align 8, !tbaa !9
  store i32 0, ptr %8, align 4, !tbaa !5
  br label %9

9:                                                ; preds = %59, %3
  %10 = load i32, ptr %4, align 4, !tbaa !5
  %11 = icmp sgt i32 %10, 0
  br i1 %11, label %12, label %66

12:                                               ; preds = %9
  %13 = load ptr, ptr %5, align 8, !tbaa !9
  %14 = load i32, ptr %13, align 4, !tbaa !5
  %15 = load i32, ptr %4, align 4, !tbaa !5
  %16 = sext i32 %15 to i64
  %17 = getelementptr inbounds [50002 x %struct.Fenwick], ptr @bit, i64 0, i64 %16
  %18 = getelementptr inbounds %struct.Fenwick, ptr %17, i32 0, i32 0
  %19 = load i32, ptr %18, align 8, !tbaa !11
  %20 = icmp slt i32 %14, %19
  br i1 %20, label %21, label %34

21:                                               ; preds = %12
  %22 = load i32, ptr %4, align 4, !tbaa !5
  %23 = sext i32 %22 to i64
  %24 = getelementptr inbounds [50002 x %struct.Fenwick], ptr @bit, i64 0, i64 %23
  %25 = getelementptr inbounds %struct.Fenwick, ptr %24, i32 0, i32 0
  %26 = load i32, ptr %25, align 8, !tbaa !11
  %27 = load ptr, ptr %5, align 8, !tbaa !9
  store i32 %26, ptr %27, align 4, !tbaa !5
  %28 = load i32, ptr %4, align 4, !tbaa !5
  %29 = sext i32 %28 to i64
  %30 = getelementptr inbounds [50002 x %struct.Fenwick], ptr @bit, i64 0, i64 %29
  %31 = getelementptr inbounds %struct.Fenwick, ptr %30, i32 0, i32 1
  %32 = load i32, ptr %31, align 4, !tbaa !13
  %33 = load ptr, ptr %6, align 8, !tbaa !9
  store i32 %32, ptr %33, align 4, !tbaa !5
  br label %58

34:                                               ; preds = %12
  %35 = load ptr, ptr %5, align 8, !tbaa !9
  %36 = load i32, ptr %35, align 4, !tbaa !5
  %37 = load i32, ptr %4, align 4, !tbaa !5
  %38 = sext i32 %37 to i64
  %39 = getelementptr inbounds [50002 x %struct.Fenwick], ptr @bit, i64 0, i64 %38
  %40 = getelementptr inbounds %struct.Fenwick, ptr %39, i32 0, i32 0
  %41 = load i32, ptr %40, align 8, !tbaa !11
  %42 = icmp eq i32 %36, %41
  br i1 %42, label %43, label %57

43:                                               ; preds = %34
  %44 = load i32, ptr %4, align 4, !tbaa !5
  %45 = sext i32 %44 to i64
  %46 = getelementptr inbounds [50002 x %struct.Fenwick], ptr @bit, i64 0, i64 %45
  %47 = getelementptr inbounds %struct.Fenwick, ptr %46, i32 0, i32 1
  %48 = load i32, ptr %47, align 4, !tbaa !13
  %49 = load ptr, ptr %6, align 8, !tbaa !9
  %50 = load i32, ptr %49, align 4, !tbaa !5
  %51 = add nsw i32 %50, %48
  store i32 %51, ptr %49, align 4, !tbaa !5
  %52 = icmp sge i32 %51, 1000000007
  br i1 %52, label %53, label %57

53:                                               ; preds = %43
  %54 = load ptr, ptr %6, align 8, !tbaa !9
  %55 = load i32, ptr %54, align 4, !tbaa !5
  %56 = sub nsw i32 %55, 1000000007
  store i32 %56, ptr %54, align 4, !tbaa !5
  br label %57

57:                                               ; preds = %53, %43, %34
  br label %58

58:                                               ; preds = %57, %21
  br label %59

59:                                               ; preds = %58
  %60 = load i32, ptr %4, align 4, !tbaa !5
  %61 = load i32, ptr %4, align 4, !tbaa !5
  %62 = sub nsw i32 0, %61
  %63 = and i32 %60, %62
  %64 = load i32, ptr %4, align 4, !tbaa !5
  %65 = sub nsw i32 %64, %63
  store i32 %65, ptr %4, align 4, !tbaa !5
  br label %9, !llvm.loop !14

66:                                               ; preds = %9
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"_ZTS7Fenwick", !6, i64 0, !6, i64 4}
!13 = !{!12, !6, i64 4}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Fenwick = type { i32, i32 }

@bit = external dso_local local_unnamed_addr global [50002 x %struct.Fenwick], align 16

; Function Attrs: mustprogress nofree norecurse nosync nounwind memory(read, argmem: readwrite, inaccessiblemem: none) uwtable
define dso_local void @_Z5queryiRiS_(i32 noundef %0, ptr nocapture noundef nonnull align 4 dereferenceable(4) %1, ptr nocapture noundef nonnull writeonly align 4 dereferenceable(4) %2) local_unnamed_addr #0 {
  store i32 -1, ptr %1, align 4, !tbaa !5
  store i32 0, ptr %2, align 4, !tbaa !5
  %4 = icmp sgt i32 %0, 0
  br i1 %4, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %3, %23
  %5 = phi i32 [ %24, %23 ], [ 0, %3 ]
  %.019 = phi i32 [ %25, %23 ], [ %0, %3 ]
  %6 = load i32, ptr %1, align 4, !tbaa !5
  %7 = zext nneg i32 %.019 to i64
  %8 = getelementptr inbounds [50002 x %struct.Fenwick], ptr @bit, i64 0, i64 %7
  %9 = load i32, ptr %8, align 8, !tbaa !9
  %10 = icmp slt i32 %6, %9
  br i1 %10, label %11, label %14

11:                                               ; preds = %.lr.ph
  store i32 %9, ptr %1, align 4, !tbaa !5
  %12 = getelementptr inbounds i8, ptr %8, i64 4
  %13 = load i32, ptr %12, align 4, !tbaa !11
  br label %.sink.split

14:                                               ; preds = %.lr.ph
  %15 = icmp eq i32 %6, %9
  br i1 %15, label %16, label %23

16:                                               ; preds = %14
  %17 = getelementptr inbounds i8, ptr %8, i64 4
  %18 = load i32, ptr %17, align 4, !tbaa !11
  %19 = add nsw i32 %5, %18
  store i32 %19, ptr %2, align 4, !tbaa !5
  %20 = icmp sgt i32 %19, 1000000006
  br i1 %20, label %21, label %23

21:                                               ; preds = %16
  %22 = add nsw i32 %19, -1000000007
  br label %.sink.split

.sink.split:                                      ; preds = %21, %11
  %.sink = phi i32 [ %13, %11 ], [ %22, %21 ]
  store i32 %.sink, ptr %2, align 4, !tbaa !5
  br label %23

23:                                               ; preds = %.sink.split, %16, %14
  %24 = phi i32 [ %19, %16 ], [ %5, %14 ], [ %.sink, %.sink.split ]
  %.not = add nsw i32 %.019, -1
  %25 = and i32 %.not, %.019
  %.not20 = icmp eq i32 %25, 0
  br i1 %.not20, label %._crit_edge, label %.lr.ph, !llvm.loop !12

._crit_edge:                                      ; preds = %23, %3
  ret void
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind memory(read, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"_ZTS7Fenwick", !6, i64 0, !6, i64 4}
!11 = !{!10, !6, i64 4}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass