; LLVM IR from Izaron/ACM-ICPC :: Russian Council of School Olympiads (R.S.O.Sh.)/Zaoch/2017 (eclair)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@n = external dso_local global i32, align 4
@vec = external dso_local global %"class.std::vector", align 8
@.str.7 = external hidden unnamed_addr constant [3 x i8], align 1
@.str.8 = external hidden unnamed_addr constant [4 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z3canib(i32 noundef, i1 noundef zeroext) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #3 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  %5 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str.7, ptr noundef @n)
  %6 = load i32, ptr @n, align 4, !tbaa !5
  %7 = sext i32 %6 to i64
  call void @_ZNSt6vectorIiSaIiEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) @vec, i64 noundef %7)
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #5
  store i32 0, ptr %2, align 4, !tbaa !5
  br label %8

8:                                                ; preds = %18, %0
  %9 = load i32, ptr %2, align 4, !tbaa !5
  %10 = load i32, ptr @n, align 4, !tbaa !5
  %11 = icmp slt i32 %9, %10
  br i1 %11, label %13, label %12

12:                                               ; preds = %8
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #5
  br label %21

13:                                               ; preds = %8
  %14 = load i32, ptr %2, align 4, !tbaa !5
  %15 = sext i32 %14 to i64
  %16 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vec, i64 noundef %15) #5
  %17 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str.7, ptr noundef %16)
  br label %18

18:                                               ; preds = %13
  %19 = load i32, ptr %2, align 4, !tbaa !5
  %20 = add nsw i32 %19, 1
  store i32 %20, ptr %2, align 4, !tbaa !5
  br label %8, !llvm.loop !9

21:                                               ; preds = %12
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #5
  store i32 0, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #5
  store i32 20, ptr %4, align 4, !tbaa !5
  br label %22

22:                                               ; preds = %38, %21
  %23 = load i32, ptr %4, align 4, !tbaa !5
  %24 = icmp sge i32 %23, 0
  br i1 %24, label %26, label %25

25:                                               ; preds = %22
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #5
  br label %41

26:                                               ; preds = %22
  %27 = load i32, ptr %3, align 4, !tbaa !5
  %28 = load i32, ptr %4, align 4, !tbaa !5
  %29 = shl i32 1, %28
  %30 = add nsw i32 %27, %29
  %31 = call noundef zeroext i1 @_Z3canib(i32 noundef %30, i1 noundef zeroext false)
  br i1 %31, label %37, label %32

32:                                               ; preds = %26
  %33 = load i32, ptr %4, align 4, !tbaa !5
  %34 = shl i32 1, %33
  %35 = load i32, ptr %3, align 4, !tbaa !5
  %36 = add nsw i32 %35, %34
  store i32 %36, ptr %3, align 4, !tbaa !5
  br label %37

37:                                               ; preds = %32, %26
  br label %38

38:                                               ; preds = %37
  %39 = load i32, ptr %4, align 4, !tbaa !5
  %40 = add nsw i32 %39, -1
  store i32 %40, ptr %4, align 4, !tbaa !5
  br label %22, !llvm.loop !11

41:                                               ; preds = %25
  %42 = load i32, ptr %3, align 4, !tbaa !5
  %43 = add nsw i32 %42, 1
  %44 = call i32 (ptr, ...) @printf(ptr noundef @.str.8, i32 noundef %43)
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #5
  %45 = load i32, ptr %1, align 4
  ret i32 %45
}

declare i32 @__isoc99_scanf(ptr noundef, ...) #4

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

declare i32 @printf(ptr noundef, ...) #4

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@n = external dso_local global i32, align 4
@vec = external dso_local global %"class.std::vector", align 8
@.str.7 = external hidden unnamed_addr constant [3 x i8], align 1
@.str.8 = external hidden unnamed_addr constant [4 x i8], align 1

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z3canib(i32 noundef, i1 noundef zeroext) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() local_unnamed_addr #2 {
  %1 = tail call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str.7, ptr noundef nonnull @n)
  %2 = load i32, ptr @n, align 4, !tbaa !5
  %3 = sext i32 %2 to i64
  tail call void @_ZNSt6vectorIiSaIiEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) @vec, i64 noundef %3)
  %4 = load i32, ptr @n, align 4, !tbaa !5
  %5 = icmp sgt i32 %4, 0
  br i1 %5, label %.lr.ph, label %.preheader

.preheader:                                       ; preds = %.lr.ph, %0
  %6 = tail call noundef zeroext i1 @_Z3canib(i32 noundef 1048576, i1 noundef zeroext false)
  %spec.select = select i1 %6, i32 0, i32 1048576
  %7 = or disjoint i32 %spec.select, 524288
  %8 = tail call noundef zeroext i1 @_Z3canib(i32 noundef %7, i1 noundef zeroext false)
  %spec.select.1 = select i1 %8, i32 %spec.select, i32 %7
  %9 = or disjoint i32 %spec.select.1, 262144
  %10 = tail call noundef zeroext i1 @_Z3canib(i32 noundef %9, i1 noundef zeroext false)
  %spec.select.2 = select i1 %10, i32 %spec.select.1, i32 %9
  %11 = or disjoint i32 %spec.select.2, 131072
  %12 = tail call noundef zeroext i1 @_Z3canib(i32 noundef %11, i1 noundef zeroext false)
  %spec.select.3 = select i1 %12, i32 %spec.select.2, i32 %11
  %13 = add nuw nsw i32 %spec.select.3, 65536
  %14 = tail call noundef zeroext i1 @_Z3canib(i32 noundef %13, i1 noundef zeroext false)
  %spec.select.4 = select i1 %14, i32 %spec.select.3, i32 %13
  %15 = add nuw nsw i32 %spec.select.4, 32768
  %16 = tail call noundef zeroext i1 @_Z3canib(i32 noundef %15, i1 noundef zeroext false)
  %spec.select.5 = select i1 %16, i32 %spec.select.4, i32 %15
  %17 = add nuw nsw i32 %spec.select.5, 16384
  %18 = tail call noundef zeroext i1 @_Z3canib(i32 noundef %17, i1 noundef zeroext false)
  %spec.select.6 = select i1 %18, i32 %spec.select.5, i32 %17
  %19 = add nuw nsw i32 %spec.select.6, 8192
  %20 = tail call noundef zeroext i1 @_Z3canib(i32 noundef %19, i1 noundef zeroext false)
  %spec.select.7 = select i1 %20, i32 %spec.select.6, i32 %19
  %21 = add nuw nsw i32 %spec.select.7, 4096
  %22 = tail call noundef zeroext i1 @_Z3canib(i32 noundef %21, i1 noundef zeroext false)
  %spec.select.8 = select i1 %22, i32 %spec.select.7, i32 %21
  %23 = add nuw nsw i32 %spec.select.8, 2048
  %24 = tail call noundef zeroext i1 @_Z3canib(i32 noundef %23, i1 noundef zeroext false)
  %spec.select.9 = select i1 %24, i32 %spec.select.8, i32 %23
  %25 = add nuw nsw i32 %spec.select.9, 1024
  %26 = tail call noundef zeroext i1 @_Z3canib(i32 noundef %25, i1 noundef zeroext false)
  %spec.select.10 = select i1 %26, i32 %spec.select.9, i32 %25
  %27 = add nuw nsw i32 %spec.select.10, 512
  %28 = tail call noundef zeroext i1 @_Z3canib(i32 noundef %27, i1 noundef zeroext false)
  %spec.select.11 = select i1 %28, i32 %spec.select.10, i32 %27
  %29 = add nuw nsw i32 %spec.select.11, 256
  %30 = tail call noundef zeroext i1 @_Z3canib(i32 noundef %29, i1 noundef zeroext false)
  %spec.select.12 = select i1 %30, i32 %spec.select.11, i32 %29
  %31 = add nuw nsw i32 %spec.select.12, 128
  %32 = tail call noundef zeroext i1 @_Z3canib(i32 noundef %31, i1 noundef zeroext false)
  %spec.select.13 = select i1 %32, i32 %spec.select.12, i32 %31
  %33 = add nuw nsw i32 %spec.select.13, 64
  %34 = tail call noundef zeroext i1 @_Z3canib(i32 noundef %33, i1 noundef zeroext false)
  %spec.select.14 = select i1 %34, i32 %spec.select.13, i32 %33
  %35 = add nuw nsw i32 %spec.select.14, 32
  %36 = tail call noundef zeroext i1 @_Z3canib(i32 noundef %35, i1 noundef zeroext false)
  %spec.select.15 = select i1 %36, i32 %spec.select.14, i32 %35
  %37 = add nuw nsw i32 %spec.select.15, 16
  %38 = tail call noundef zeroext i1 @_Z3canib(i32 noundef %37, i1 noundef zeroext false)
  %spec.select.16 = select i1 %38, i32 %spec.select.15, i32 %37
  %39 = add nuw nsw i32 %spec.select.16, 8
  %40 = tail call noundef zeroext i1 @_Z3canib(i32 noundef %39, i1 noundef zeroext false)
  %spec.select.17 = select i1 %40, i32 %spec.select.16, i32 %39
  %41 = add nuw nsw i32 %spec.select.17, 4
  %42 = tail call noundef zeroext i1 @_Z3canib(i32 noundef %41, i1 noundef zeroext false)
  %spec.select.18 = select i1 %42, i32 %spec.select.17, i32 %41
  %43 = add nuw nsw i32 %spec.select.18, 2
  %44 = tail call noundef zeroext i1 @_Z3canib(i32 noundef %43, i1 noundef zeroext false)
  %spec.select.19 = select i1 %44, i32 %spec.select.18, i32 %43
  %45 = add nuw nsw i32 %spec.select.19, 1
  %46 = tail call noundef zeroext i1 @_Z3canib(i32 noundef %45, i1 noundef zeroext false)
  %spec.select.20 = select i1 %46, i32 %spec.select.19, i32 %45
  %47 = add nuw nsw i32 %spec.select.20, 1
  %48 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.8, i32 noundef %47)
  ret i32 0

.lr.ph:                                           ; preds = %0, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %0 ]
  %49 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vec, i64 noundef %indvars.iv) #4
  %50 = tail call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str.7, ptr noundef nonnull %49)
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %51 = load i32, ptr @n, align 4, !tbaa !5
  %52 = sext i32 %51 to i64
  %53 = icmp slt i64 %indvars.iv.next, %52
  br i1 %53, label %.lr.ph, label %.preheader, !llvm.loop !9
}

; Function Attrs: nofree nounwind
declare noundef i32 @__isoc99_scanf(ptr nocapture noundef readonly, ...) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass