; LLVM IR from FrancesoM/Bisc8FX :: sdk_projects/bisc8_platform/ps7_cortexa9_0/standalone_domain/bsp/ps7_cortexa9_0_ (irq)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.shared_info = type { [1 x %struct.vcpu_info], [64 x i64], [64 x i64] }
%struct.vcpu_info = type { i8, i8, i64, [30 x i8] }

@shared_info = external hidden global ptr, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @handle_event_irq(ptr noundef %0) #1 {
  %2 = alloca ptr, align 8
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  store i32 0, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  %13 = load ptr, ptr @shared_info, align 8, !tbaa !5
  store ptr %13, ptr %9, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  %14 = load ptr, ptr %9, align 8, !tbaa !5
  %15 = getelementptr inbounds %struct.shared_info, ptr %14, i32 0, i32 0
  %16 = load i32, ptr %8, align 4, !tbaa !9
  %17 = sext i32 %16 to i64
  %18 = getelementptr inbounds [1 x %struct.vcpu_info], ptr %15, i64 0, i64 %17
  store ptr %18, ptr %10, align 8, !tbaa !5
  %19 = load ptr, ptr %10, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.vcpu_info, ptr %19, i32 0, i32 0
  store i8 0, ptr %20, align 8, !tbaa !11
  call void asm sideeffect "dsb st", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !14
  %21 = load ptr, ptr %10, align 8, !tbaa !5
  %22 = getelementptr inbounds %struct.vcpu_info, ptr %21, i32 0, i32 2
  store i64 0, ptr %11, align 8, !tbaa !15
  %23 = load i64, ptr %11, align 8
  %24 = atomicrmw xchg ptr %22, i64 %23 seq_cst, align 8
  store i64 %24, ptr %12, align 8
  %25 = load i64, ptr %12, align 8, !tbaa !15
  store i64 %25, ptr %3, align 8, !tbaa !15
  br label %26

26:                                               ; preds = %66, %1
  %27 = load i64, ptr %3, align 8, !tbaa !15
  %28 = icmp ne i64 %27, 0
  br i1 %28, label %29, label %67

29:                                               ; preds = %26
  %30 = load i64, ptr %3, align 8, !tbaa !15
  %31 = call i64 @__ffs(i64 noundef %30)
  store i64 %31, ptr %5, align 8, !tbaa !15
  %32 = load i64, ptr %5, align 8, !tbaa !15
  %33 = shl i64 1, %32
  %34 = xor i64 %33, -1
  %35 = load i64, ptr %3, align 8, !tbaa !15
  %36 = and i64 %35, %34
  store i64 %36, ptr %3, align 8, !tbaa !15
  br label %37

37:                                               ; preds = %51, %29
  %38 = load ptr, ptr %9, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.shared_info, ptr %38, i32 0, i32 1
  %40 = load i64, ptr %5, align 8, !tbaa !15
  %41 = getelementptr inbounds [64 x i64], ptr %39, i64 0, i64 %40
  %42 = load i64, ptr %41, align 8, !tbaa !15
  %43 = load ptr, ptr %9, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.shared_info, ptr %43, i32 0, i32 2
  %45 = load i64, ptr %5, align 8, !tbaa !15
  %46 = getelementptr inbounds [64 x i64], ptr %44, i64 0, i64 %45
  %47 = load i64, ptr %46, align 8, !tbaa !15
  %48 = xor i64 %47, -1
  %49 = and i64 %42, %48
  store i64 %49, ptr %4, align 8, !tbaa !15
  %50 = icmp ne i64 %49, 0
  br i1 %50, label %51, label %66

51:                                               ; preds = %37
  %52 = load i64, ptr %4, align 8, !tbaa !15
  %53 = call i64 @__ffs(i64 noundef %52)
  store i64 %53, ptr %6, align 8, !tbaa !15
  %54 = load i64, ptr %6, align 8, !tbaa !15
  %55 = shl i64 1, %54
  %56 = xor i64 %55, -1
  %57 = load i64, ptr %4, align 8, !tbaa !15
  %58 = and i64 %57, %56
  store i64 %58, ptr %4, align 8, !tbaa !15
  %59 = load i64, ptr %5, align 8, !tbaa !15
  %60 = mul i64 %59, 64
  %61 = load i64, ptr %6, align 8, !tbaa !15
  %62 = add i64 %60, %61
  %63 = trunc i64 %62 to i32
  store i32 %63, ptr %7, align 4, !tbaa !9
  %64 = load i32, ptr %7, align 4, !tbaa !9
  %65 = call i32 @do_event(i32 noundef %64)
  br label %37, !llvm.loop !16

66:                                               ; preds = %37
  br label %26, !llvm.loop !18

67:                                               ; preds = %26
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #3
  ret void
}

; Function Attrs: inlinehint nounwind uwtable
declare hidden i64 @__ffs(i64 noundef) #2

; Function Attrs: nounwind uwtable
declare hidden i32 @do_event(i32 noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !7, i64 0}
!12 = !{!"vcpu_info", !7, i64 0, !7, i64 1, !13, i64 8, !7, i64 16}
!13 = !{!"long", !7, i64 0}
!14 = !{i64 2147661420}
!15 = !{!13, !13, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = distinct !{!18, !17}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@shared_info = external hidden local_unnamed_addr global ptr, align 8

; Function Attrs: nounwind uwtable
define dso_local void @handle_event_irq(ptr nocapture noundef readnone %0) local_unnamed_addr #0 {
  %2 = load ptr, ptr @shared_info, align 8, !tbaa !5
  store i8 0, ptr %2, align 8, !tbaa !9
  tail call void asm sideeffect "dsb st", "~{memory},~{dirflag},~{fpsr},~{flags}"() #2, !srcloc !12
  %3 = getelementptr inbounds i8, ptr %2, i64 8
  %4 = atomicrmw xchg ptr %3, i64 0 seq_cst, align 8
  %.not22 = icmp eq i64 %4, 0
  br i1 %.not22, label %._crit_edge, label %.lr.ph24

.lr.ph24:                                         ; preds = %1
  %5 = getelementptr inbounds i8, ptr %2, i64 48
  %6 = getelementptr inbounds i8, ptr %2, i64 560
  br label %7

.loopexit:                                        ; preds = %19, %7
  %.not = icmp eq i64 %11, 0
  br i1 %.not, label %._crit_edge, label %7, !llvm.loop !13

7:                                                ; preds = %.lr.ph24, %.loopexit
  %.023 = phi i64 [ %4, %.lr.ph24 ], [ %11, %.loopexit ]
  %8 = tail call i64 @__ffs(i64 noundef %.023)
  %9 = shl nuw i64 1, %8
  %10 = xor i64 %9, -1
  %11 = and i64 %.023, %10
  %12 = getelementptr inbounds [64 x i64], ptr %5, i64 0, i64 %8
  %13 = getelementptr inbounds [64 x i64], ptr %6, i64 0, i64 %8
  %14 = load i64, ptr %12, align 8, !tbaa !15
  %15 = load i64, ptr %13, align 8, !tbaa !15
  %16 = xor i64 %15, -1
  %17 = and i64 %14, %16
  %.not2021 = icmp eq i64 %17, 0
  br i1 %.not2021, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %7
  %18 = shl i64 %8, 6
  br label %19

19:                                               ; preds = %.lr.ph, %19
  %20 = phi i64 [ %17, %.lr.ph ], [ %28, %19 ]
  %21 = tail call i64 @__ffs(i64 noundef %20)
  %22 = add i64 %21, %18
  %23 = trunc i64 %22 to i32
  %24 = tail call i32 @do_event(i32 noundef %23)
  %25 = load i64, ptr %12, align 8, !tbaa !15
  %26 = load i64, ptr %13, align 8, !tbaa !15
  %27 = xor i64 %26, -1
  %28 = and i64 %25, %27
  %.not20 = icmp eq i64 %28, 0
  br i1 %.not20, label %.loopexit, label %19, !llvm.loop !16

._crit_edge:                                      ; preds = %.loopexit, %1
  ret void
}

; Function Attrs: inlinehint nounwind uwtable
declare hidden i64 @__ffs(i64 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare hidden i32 @do_event(i32 noundef) local_unnamed_addr #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !7, i64 0}
!10 = !{!"vcpu_info", !7, i64 0, !7, i64 1, !11, i64 8, !7, i64 16}
!11 = !{!"long", !7, i64 0}
!12 = !{i64 2147661420}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{!11, !11, i64 0}
!16 = distinct !{!16, !14}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass