; LLVM IR from Izaron/ACM-ICPC :: Timus Online Judge/Volume 11/2027. URCAPL, Episode 1.ll (Z8workTaskv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }

@_Z4progB5cxx11 = external dso_local global [105 x %"class.std::__cxx11::basic_string"], align 16
@reg0 = external dso_local global i32, align 4
@regs = external dso_local global [26 x i32], align 16
@a = external dso_local global i32, align 4
@b = external dso_local global i32, align 4
@run = external dso_local global i8, align 1
@_ZSt4cout = external global %"class.std::basic_ostream", align 8

; Function Attrs: mustprogress nounwind uwtable
declare noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(32), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7nextIntv() #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z11changeClockv() #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z8workTaskv() #2 {
  %1 = alloca i8, align 1
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 1, ptr %1) #6
  %4 = load i32, ptr @a, align 4, !tbaa !5
  %5 = sext i32 %4 to i64
  %6 = getelementptr inbounds [105 x %"class.std::__cxx11::basic_string"], ptr @_Z4progB5cxx11, i64 0, i64 %5
  %7 = load i32, ptr @b, align 4, !tbaa !5
  %8 = sext i32 %7 to i64
  %9 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(32) %6, i64 noundef %8)
  %10 = load i8, ptr %9, align 1, !tbaa !9
  store i8 %10, ptr %1, align 1, !tbaa !9
  %11 = load i8, ptr %1, align 1, !tbaa !9
  %12 = sext i8 %11 to i32
  %13 = icmp eq i32 %12, 46
  br i1 %13, label %14, label %15

14:                                               ; preds = %0
  store i32 1, ptr %2, align 4
  br label %81

15:                                               ; preds = %0
  %16 = load i8, ptr %1, align 1, !tbaa !9
  %17 = sext i8 %16 to i32
  %18 = icmp sge i32 %17, 65
  br i1 %18, label %19, label %30

19:                                               ; preds = %15
  %20 = load i8, ptr %1, align 1, !tbaa !9
  %21 = sext i8 %20 to i32
  %22 = icmp sle i32 %21, 90
  br i1 %22, label %23, label %30

23:                                               ; preds = %19
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #6
  %24 = load i8, ptr %1, align 1, !tbaa !9
  %25 = sext i8 %24 to i32
  %26 = sub nsw i32 %25, 65
  store i32 %26, ptr %3, align 4, !tbaa !5
  %27 = load i32, ptr %3, align 4, !tbaa !5
  %28 = sext i32 %27 to i64
  %29 = getelementptr inbounds [26 x i32], ptr @regs, i64 0, i64 %28
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) @reg0, ptr noundef nonnull align 4 dereferenceable(4) %29) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #6
  br label %79

30:                                               ; preds = %19, %15
  %31 = load i8, ptr %1, align 1, !tbaa !9
  %32 = sext i8 %31 to i32
  %33 = icmp eq i32 %32, 63
  br i1 %33, label %34, label %36

34:                                               ; preds = %30
  %35 = call noundef i32 @_Z7nextIntv()
  store i32 %35, ptr @reg0, align 4, !tbaa !5
  br label %78

36:                                               ; preds = %30
  %37 = load i8, ptr %1, align 1, !tbaa !9
  %38 = sext i8 %37 to i32
  %39 = icmp eq i32 %38, 33
  br i1 %39, label %40, label %44

40:                                               ; preds = %36
  %41 = load i32, ptr @reg0, align 4, !tbaa !5
  %42 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i32 noundef %41)
  %43 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %42, ptr noundef @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  store i32 0, ptr @reg0, align 4, !tbaa !5
  br label %77

44:                                               ; preds = %36
  %45 = load i8, ptr %1, align 1, !tbaa !9
  %46 = sext i8 %45 to i32
  %47 = icmp eq i32 %46, 43
  br i1 %47, label %48, label %51

48:                                               ; preds = %44
  %49 = load i32, ptr @reg0, align 4, !tbaa !5
  %50 = add nsw i32 %49, 1
  store i32 %50, ptr @reg0, align 4, !tbaa !5
  br label %76

51:                                               ; preds = %44
  %52 = load i8, ptr %1, align 1, !tbaa !9
  %53 = sext i8 %52 to i32
  %54 = icmp eq i32 %53, 45
  br i1 %54, label %55, label %58

55:                                               ; preds = %51
  %56 = load i32, ptr @reg0, align 4, !tbaa !5
  %57 = add nsw i32 %56, -1
  store i32 %57, ptr @reg0, align 4, !tbaa !5
  br label %75

58:                                               ; preds = %51
  %59 = load i8, ptr %1, align 1, !tbaa !9
  %60 = sext i8 %59 to i32
  %61 = icmp eq i32 %60, 64
  br i1 %61, label %62, label %68

62:                                               ; preds = %58
  %63 = load i32, ptr @reg0, align 4, !tbaa !5
  %64 = icmp eq i32 %63, 0
  br i1 %64, label %65, label %66

65:                                               ; preds = %62
  call void @_Z11changeClockv()
  call void @_Z11changeClockv()
  call void @_Z11changeClockv()
  br label %67

66:                                               ; preds = %62
  call void @_Z11changeClockv()
  br label %67

67:                                               ; preds = %66, %65
  br label %74

68:                                               ; preds = %58
  %69 = load i8, ptr %1, align 1, !tbaa !9
  %70 = sext i8 %69 to i32
  %71 = icmp eq i32 %70, 35
  br i1 %71, label %72, label %73

72:                                               ; preds = %68
  store i8 0, ptr @run, align 1, !tbaa !10
  br label %73

73:                                               ; preds = %72, %68
  br label %74

74:                                               ; preds = %73, %67
  br label %75

75:                                               ; preds = %74, %55
  br label %76

76:                                               ; preds = %75, %48
  br label %77

77:                                               ; preds = %76, %40
  br label %78

78:                                               ; preds = %77, %34
  br label %79

79:                                               ; preds = %78, %23
  br label %80

80:                                               ; preds = %79
  store i32 0, ptr %2, align 4
  br label %81

81:                                               ; preds = %80, %14
  call void @llvm.lifetime.end.p0(i64 1, ptr %1) #6
  %82 = load i32, ptr %2, align 4
  switch i32 %82, label %84 [
    i32 0, label %83
    i32 1, label %83
  ]

83:                                               ; preds = %81, %81
  ret void

84:                                               ; preds = %81
  unreachable
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #3

declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8), i32 noundef) #4

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(8)) #5

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"bool", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }

@_Z4progB5cxx11 = external dso_local global [105 x %"class.std::__cxx11::basic_string"], align 16
@reg0 = external dso_local global i32, align 4
@regs = external dso_local global [26 x i32], align 16
@a = external dso_local local_unnamed_addr global i32, align 4
@b = external dso_local local_unnamed_addr global i32, align 4
@run = external dso_local local_unnamed_addr global i8, align 1
@_ZSt4cout = external global %"class.std::basic_ostream", align 8

; Function Attrs: mustprogress nounwind uwtable
declare noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(32), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7nextIntv() local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z11changeClockv() local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z8workTaskv() local_unnamed_addr #1 {
  %1 = load i32, ptr @a, align 4, !tbaa !5
  %2 = sext i32 %1 to i64
  %3 = getelementptr inbounds [105 x %"class.std::__cxx11::basic_string"], ptr @_Z4progB5cxx11, i64 0, i64 %2
  %4 = load i32, ptr @b, align 4, !tbaa !5
  %5 = sext i32 %4 to i64
  %6 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(32) %3, i64 noundef %5)
  %7 = load i8, ptr %6, align 1, !tbaa !9
  %8 = icmp eq i8 %7, 46
  br i1 %8, label %32, label %9

9:                                                ; preds = %0
  %10 = add i8 %7, -65
  %or.cond = icmp ult i8 %10, 26
  br i1 %or.cond, label %11, label %14

11:                                               ; preds = %9
  %12 = zext nneg i8 %10 to i64
  %13 = getelementptr inbounds [26 x i32], ptr @regs, i64 0, i64 %12
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) @reg0, ptr noundef nonnull align 4 dereferenceable(4) %13) #5
  br label %32

14:                                               ; preds = %9
  switch i8 %7, label %32 [
    i8 63, label %15
    i8 33, label %17
    i8 43, label %21
    i8 45, label %24
    i8 64, label %27
    i8 35, label %31
  ]

15:                                               ; preds = %14
  %16 = tail call noundef i32 @_Z7nextIntv()
  store i32 %16, ptr @reg0, align 4, !tbaa !5
  br label %32

17:                                               ; preds = %14
  %18 = load i32, ptr @reg0, align 4, !tbaa !5
  %19 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i32 noundef %18)
  %20 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %19, ptr noundef nonnull @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  store i32 0, ptr @reg0, align 4, !tbaa !5
  br label %32

21:                                               ; preds = %14
  %22 = load i32, ptr @reg0, align 4, !tbaa !5
  %23 = add nsw i32 %22, 1
  store i32 %23, ptr @reg0, align 4, !tbaa !5
  br label %32

24:                                               ; preds = %14
  %25 = load i32, ptr @reg0, align 4, !tbaa !5
  %26 = add nsw i32 %25, -1
  store i32 %26, ptr @reg0, align 4, !tbaa !5
  br label %32

27:                                               ; preds = %14
  %28 = load i32, ptr @reg0, align 4, !tbaa !5
  %29 = icmp eq i32 %28, 0
  tail call void @_Z11changeClockv()
  br i1 %29, label %30, label %32

30:                                               ; preds = %27
  tail call void @_Z11changeClockv()
  tail call void @_Z11changeClockv()
  br label %32

31:                                               ; preds = %14
  store i8 0, ptr @run, align 1, !tbaa !10
  br label %32

32:                                               ; preds = %27, %15, %21, %30, %31, %24, %17, %11, %14, %0
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8), i32 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) local_unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(8)) #4

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"bool", !7, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass