; LLVM IR from tangjz/acm-icpc :: 51nod/1186.ll (Z7mod_mulnnn)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef { i64, i64 } @_Z7mod_mulnnn(i64 noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, i64 noundef %4, i64 noundef %5) #1 {
  %7 = alloca i128, align 16
  %8 = alloca i128, align 16
  %9 = alloca i128, align 16
  %10 = alloca i128, align 16
  %11 = alloca i128, align 16
  %12 = alloca i128, align 16
  %13 = alloca i128, align 16
  %14 = alloca i128, align 16
  %15 = getelementptr inbounds { i64, i64 }, ptr %8, i32 0, i32 0
  store i64 %0, ptr %15, align 16
  %16 = getelementptr inbounds { i64, i64 }, ptr %8, i32 0, i32 1
  store i64 %1, ptr %16, align 8
  %17 = load i128, ptr %8, align 16, !tbaa !5
  %18 = getelementptr inbounds { i64, i64 }, ptr %9, i32 0, i32 0
  store i64 %2, ptr %18, align 16
  %19 = getelementptr inbounds { i64, i64 }, ptr %9, i32 0, i32 1
  store i64 %3, ptr %19, align 8
  %20 = load i128, ptr %9, align 16, !tbaa !5
  %21 = getelementptr inbounds { i64, i64 }, ptr %10, i32 0, i32 0
  store i64 %4, ptr %21, align 16
  %22 = getelementptr inbounds { i64, i64 }, ptr %10, i32 0, i32 1
  store i64 %5, ptr %22, align 8
  %23 = load i128, ptr %10, align 16, !tbaa !5
  store i128 %17, ptr %11, align 16, !tbaa !5
  store i128 %20, ptr %12, align 16, !tbaa !5
  store i128 %23, ptr %13, align 16, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 16, ptr %14) #2
  store i128 0, ptr %14, align 16, !tbaa !5
  br label %24

24:                                               ; preds = %43, %6
  %25 = load i128, ptr %12, align 16, !tbaa !5
  %26 = icmp sgt i128 %25, 0
  br i1 %26, label %27, label %50

27:                                               ; preds = %24
  %28 = load i128, ptr %12, align 16, !tbaa !5
  %29 = and i128 %28, 134217727
  %30 = icmp ne i128 %29, 0
  br i1 %30, label %31, label %41

31:                                               ; preds = %27
  %32 = load i128, ptr %14, align 16, !tbaa !5
  %33 = load i128, ptr %11, align 16, !tbaa !5
  %34 = load i128, ptr %12, align 16, !tbaa !5
  %35 = and i128 %34, 134217727
  %36 = mul nsw i128 %33, %35
  %37 = add nsw i128 %32, %36
  %38 = load i128, ptr %13, align 16, !tbaa !5
  %39 = srem i128 %37, %38
  store i128 %39, ptr %14, align 16, !tbaa !5
  %40 = icmp ne i128 %39, 0
  br label %41

41:                                               ; preds = %31, %27
  %42 = phi i1 [ false, %27 ], [ %40, %31 ]
  br label %43

43:                                               ; preds = %41
  %44 = load i128, ptr %11, align 16, !tbaa !5
  %45 = shl i128 %44, 27
  %46 = load i128, ptr %13, align 16, !tbaa !5
  %47 = srem i128 %45, %46
  store i128 %47, ptr %11, align 16, !tbaa !5
  %48 = load i128, ptr %12, align 16, !tbaa !5
  %49 = ashr i128 %48, 27
  store i128 %49, ptr %12, align 16, !tbaa !5
  br label %24, !llvm.loop !9

50:                                               ; preds = %24
  %51 = load i128, ptr %14, align 16, !tbaa !5
  store i128 %51, ptr %7, align 16
  call void @llvm.lifetime.end.p0(i64 16, ptr %14) #2
  %52 = load { i64, i64 }, ptr %7, align 16
  ret { i64, i64 } %52
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"__int128", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef { i64, i64 } @_Z7mod_mulnnn(i64 noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, i64 noundef %4, i64 noundef %5) local_unnamed_addr #0 {
  %.sroa.211.0.insert.ext = zext i64 %3 to i128
  %.sroa.211.0.insert.shift = shl nuw i128 %.sroa.211.0.insert.ext, 64
  %.sroa.010.0.insert.ext = zext i64 %2 to i128
  %.sroa.010.0.insert.insert = or disjoint i128 %.sroa.211.0.insert.shift, %.sroa.010.0.insert.ext
  %.sroa.2.0.insert.ext = zext i64 %5 to i128
  %.sroa.2.0.insert.shift = shl nuw i128 %.sroa.2.0.insert.ext, 64
  %.sroa.0.0.insert.ext = zext i64 %4 to i128
  %.sroa.0.0.insert.insert = or disjoint i128 %.sroa.2.0.insert.shift, %.sroa.0.0.insert.ext
  %7 = icmp sgt i128 %.sroa.010.0.insert.insert, 0
  br i1 %7, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %6
  %.sroa.213.0.insert.ext = zext i64 %1 to i128
  %.sroa.213.0.insert.shift = shl nuw i128 %.sroa.213.0.insert.ext, 64
  %.sroa.012.0.insert.ext = zext i64 %0 to i128
  %.sroa.012.0.insert.insert = or disjoint i128 %.sroa.213.0.insert.shift, %.sroa.012.0.insert.ext
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %13
  %.021 = phi i128 [ %.1, %13 ], [ 0, %.lr.ph.preheader ]
  %.01620 = phi i128 [ %15, %13 ], [ %.sroa.012.0.insert.insert, %.lr.ph.preheader ]
  %.01719 = phi i128 [ %16, %13 ], [ %.sroa.010.0.insert.insert, %.lr.ph.preheader ]
  %8 = and i128 %.01719, 134217727
  %.not = icmp eq i128 %8, 0
  br i1 %.not, label %13, label %9

9:                                                ; preds = %.lr.ph
  %10 = mul nsw i128 %.01620, %8
  %11 = add nsw i128 %.021, %10
  %12 = srem i128 %11, %.sroa.0.0.insert.insert
  br label %13

13:                                               ; preds = %.lr.ph, %9
  %.1 = phi i128 [ %12, %9 ], [ %.021, %.lr.ph ]
  %14 = shl i128 %.01620, 27
  %15 = srem i128 %14, %.sroa.0.0.insert.insert
  %16 = lshr i128 %.01719, 27
  %.not22 = icmp ult i128 %.01719, 134217728
  br i1 %.not22, label %._crit_edge.loopexit, label %.lr.ph, !llvm.loop !5

._crit_edge.loopexit:                             ; preds = %13
  %extract = lshr i128 %.1, 64
  %extract.t23 = trunc nuw i128 %extract to i64
  %extract.t = trunc i128 %.1 to i64
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %6
  %.0.lcssa.off0 = phi i64 [ 0, %6 ], [ %extract.t, %._crit_edge.loopexit ]
  %.0.lcssa.off64 = phi i64 [ 0, %6 ], [ %extract.t23, %._crit_edge.loopexit ]
  %.fca.0.insert = insertvalue { i64, i64 } poison, i64 %.0.lcssa.off0, 0
  %.fca.1.insert = insertvalue { i64, i64 } %.fca.0.insert, i64 %.0.lcssa.off64, 1
  ret { i64, i64 } %.fca.1.insert
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass