; LLVM IR from FrancesoM/Bisc8FX :: sdk_projects/bisc8_platform/ps7_cortexa9_0/standalone_domain/bsp/ps7_cortexa9_0_ (GetMPUFreeRegMask)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XMpuConfig = type { i32, i64, i64, i32 }

@Mpu_Config = external dso_local global [16 x %struct.XMpuConfig], section ".bootdata", align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local zeroext i16 @Xil_GetMPUFreeRegMask() #1 {
  %1 = alloca i32, align 4
  %2 = alloca i16, align 2
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #2
  store i32 0, ptr %1, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %2) #2
  store i16 0, ptr %2, align 2, !tbaa !9
  br label %3

3:                                                ; preds = %20, %0
  %4 = load i32, ptr %1, align 4, !tbaa !5
  %5 = icmp ult i32 %4, 16
  br i1 %5, label %6, label %23

6:                                                ; preds = %3
  %7 = load i32, ptr %1, align 4, !tbaa !5
  %8 = zext i32 %7 to i64
  %9 = getelementptr inbounds [16 x %struct.XMpuConfig], ptr @Mpu_Config, i64 0, i64 %8
  %10 = getelementptr inbounds %struct.XMpuConfig, ptr %9, i32 0, i32 0
  %11 = load i32, ptr %10, align 16, !tbaa !11
  %12 = icmp eq i32 0, %11
  br i1 %12, label %13, label %20

13:                                               ; preds = %6
  %14 = load i32, ptr %1, align 4, !tbaa !5
  %15 = shl i32 1, %14
  %16 = load i16, ptr %2, align 2, !tbaa !9
  %17 = zext i16 %16 to i32
  %18 = or i32 %17, %15
  %19 = trunc i32 %18 to i16
  store i16 %19, ptr %2, align 2, !tbaa !9
  br label %20

20:                                               ; preds = %13, %6
  %21 = load i32, ptr %1, align 4, !tbaa !5
  %22 = add i32 %21, 1
  store i32 %22, ptr %1, align 4, !tbaa !5
  br label %3, !llvm.loop !14

23:                                               ; preds = %3
  %24 = load i16, ptr %2, align 2, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 2, ptr %2) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #2
  ret i16 %24
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"XMpuConfig", !6, i64 0, !13, i64 8, !13, i64 16, !6, i64 24}
!13 = !{!"long", !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XMpuConfig = type { i32, i64, i64, i32 }

@Mpu_Config = external dso_local local_unnamed_addr global [16 x %struct.XMpuConfig], section ".bootdata", align 16

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define dso_local zeroext i16 @Xil_GetMPUFreeRegMask() local_unnamed_addr #0 {
  %1 = load i32, ptr @Mpu_Config, align 16, !tbaa !5
  %2 = icmp eq i32 %1, 0
  %3 = zext i1 %2 to i16
  %4 = load i32, ptr getelementptr inbounds (i8, ptr @Mpu_Config, i64 32), align 16, !tbaa !5
  %5 = icmp eq i32 %4, 0
  %6 = select i1 %5, i16 2, i16 0
  %.1.1 = or disjoint i16 %6, %3
  %7 = load i32, ptr getelementptr inbounds (i8, ptr @Mpu_Config, i64 64), align 16, !tbaa !5
  %8 = icmp eq i32 %7, 0
  %9 = select i1 %8, i16 4, i16 0
  %.1.2 = or disjoint i16 %9, %.1.1
  %10 = load i32, ptr getelementptr inbounds (i8, ptr @Mpu_Config, i64 96), align 16, !tbaa !5
  %11 = icmp eq i32 %10, 0
  %12 = select i1 %11, i16 8, i16 0
  %.1.3 = or disjoint i16 %12, %.1.2
  %13 = load i32, ptr getelementptr inbounds (i8, ptr @Mpu_Config, i64 128), align 16, !tbaa !5
  %14 = icmp eq i32 %13, 0
  %15 = select i1 %14, i16 16, i16 0
  %.1.4 = or disjoint i16 %15, %.1.3
  %16 = load i32, ptr getelementptr inbounds (i8, ptr @Mpu_Config, i64 160), align 16, !tbaa !5
  %17 = icmp eq i32 %16, 0
  %18 = select i1 %17, i16 32, i16 0
  %.1.5 = or disjoint i16 %18, %.1.4
  %19 = load i32, ptr getelementptr inbounds (i8, ptr @Mpu_Config, i64 192), align 16, !tbaa !5
  %20 = icmp eq i32 %19, 0
  %21 = select i1 %20, i16 64, i16 0
  %.1.6 = or i16 %21, %.1.5
  %22 = load i32, ptr getelementptr inbounds (i8, ptr @Mpu_Config, i64 224), align 16, !tbaa !5
  %23 = icmp eq i32 %22, 0
  %24 = select i1 %23, i16 128, i16 0
  %.1.7 = or i16 %24, %.1.6
  %25 = load i32, ptr getelementptr inbounds (i8, ptr @Mpu_Config, i64 256), align 16, !tbaa !5
  %26 = icmp eq i32 %25, 0
  %27 = select i1 %26, i16 256, i16 0
  %.1.8 = or i16 %27, %.1.7
  %28 = load i32, ptr getelementptr inbounds (i8, ptr @Mpu_Config, i64 288), align 16, !tbaa !5
  %29 = icmp eq i32 %28, 0
  %30 = select i1 %29, i16 512, i16 0
  %.1.9 = or i16 %30, %.1.8
  %31 = load i32, ptr getelementptr inbounds (i8, ptr @Mpu_Config, i64 320), align 16, !tbaa !5
  %32 = icmp eq i32 %31, 0
  %33 = select i1 %32, i16 1024, i16 0
  %.1.10 = or i16 %33, %.1.9
  %34 = load i32, ptr getelementptr inbounds (i8, ptr @Mpu_Config, i64 352), align 16, !tbaa !5
  %35 = icmp eq i32 %34, 0
  %36 = select i1 %35, i16 2048, i16 0
  %.1.11 = or i16 %36, %.1.10
  %37 = load i32, ptr getelementptr inbounds (i8, ptr @Mpu_Config, i64 384), align 16, !tbaa !5
  %38 = icmp eq i32 %37, 0
  %39 = select i1 %38, i16 4096, i16 0
  %.1.12 = or i16 %39, %.1.11
  %40 = load i32, ptr getelementptr inbounds (i8, ptr @Mpu_Config, i64 416), align 16, !tbaa !5
  %41 = icmp eq i32 %40, 0
  %42 = select i1 %41, i16 8192, i16 0
  %.1.13 = or i16 %42, %.1.12
  %43 = load i32, ptr getelementptr inbounds (i8, ptr @Mpu_Config, i64 448), align 16, !tbaa !5
  %44 = icmp eq i32 %43, 0
  %45 = select i1 %44, i16 16384, i16 0
  %.1.14 = or i16 %45, %.1.13
  %46 = load i32, ptr getelementptr inbounds (i8, ptr @Mpu_Config, i64 480), align 16, !tbaa !5
  %47 = icmp eq i32 %46, 0
  %48 = select i1 %47, i16 -32768, i16 0
  %.1.15 = or i16 %48, %.1.14
  ret i16 %.1.15
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"XMpuConfig", !7, i64 0, !10, i64 8, !10, i64 16, !7, i64 24}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LCSSAPass,LoopRotatePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass