; LLVM IR from tangjz/acm-icpc :: 51nod/Contest/Algorithm_Marathon_16/F.ll (Z10PolyInvHisiPiS_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZZ10PolyInvHisiPiS_E5cur_i = external hidden global i32, align 4
@_ZZ10PolyInvHisiPiS_E5pre_i = external hidden global i32, align 4
@_ZZ10PolyInvHisiPiS_E3len = external hidden global i32, align 4
@_ZZ10PolyInvHisiPiS_E3seq = external hidden global [2 x [4194304 x i32]], align 16

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z14PolyInvIterateiPiiS_(i32 noundef, ptr noundef, i32 noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_Z7mod_invi(i32 noundef) #2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z10PolyInvHisiPiS_(i32 noundef %0, ptr noundef %1, ptr noundef %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  store i32 %0, ptr %4, align 4, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !9
  store ptr %2, ptr %6, align 8, !tbaa !9
  %7 = load i32, ptr %4, align 4, !tbaa !5
  %8 = icmp eq i32 %7, 2
  br i1 %8, label %9, label %51

9:                                                ; preds = %3
  %10 = load ptr, ptr %5, align 8, !tbaa !9
  %11 = getelementptr inbounds i32, ptr %10, i64 0
  %12 = load i32, ptr %11, align 4, !tbaa !5
  %13 = call noundef i32 @_Z7mod_invi(i32 noundef %12)
  %14 = load i32, ptr @_ZZ10PolyInvHisiPiS_E5cur_i, align 4, !tbaa !5
  %15 = sext i32 %14 to i64
  %16 = getelementptr inbounds [2 x [4194304 x i32]], ptr @_ZZ10PolyInvHisiPiS_E3seq, i64 0, i64 %15
  %17 = getelementptr inbounds [4194304 x i32], ptr %16, i64 0, i64 0
  store i32 %13, ptr %17, align 16, !tbaa !5
  store i32 2, ptr @_ZZ10PolyInvHisiPiS_E3len, align 4, !tbaa !5
  br label %18

18:                                               ; preds = %47, %9
  %19 = load i32, ptr @_ZZ10PolyInvHisiPiS_E3len, align 4, !tbaa !5
  %20 = ashr i32 %19, 1
  %21 = load i32, ptr %4, align 4, !tbaa !5
  %22 = icmp slt i32 %20, %21
  br i1 %22, label %23, label %50

23:                                               ; preds = %18
  %24 = load i32, ptr @_ZZ10PolyInvHisiPiS_E5cur_i, align 4, !tbaa !5
  %25 = xor i32 %24, 1
  store i32 %25, ptr @_ZZ10PolyInvHisiPiS_E5cur_i, align 4, !tbaa !5
  %26 = load i32, ptr @_ZZ10PolyInvHisiPiS_E5pre_i, align 4, !tbaa !5
  %27 = xor i32 %26, 1
  store i32 %27, ptr @_ZZ10PolyInvHisiPiS_E5pre_i, align 4, !tbaa !5
  %28 = load i32, ptr @_ZZ10PolyInvHisiPiS_E5cur_i, align 4, !tbaa !5
  %29 = sext i32 %28 to i64
  %30 = getelementptr inbounds [2 x [4194304 x i32]], ptr @_ZZ10PolyInvHisiPiS_E3seq, i64 0, i64 %29
  %31 = getelementptr inbounds [4194304 x i32], ptr %30, i64 0, i64 0
  %32 = load i32, ptr @_ZZ10PolyInvHisiPiS_E5pre_i, align 4, !tbaa !5
  %33 = sext i32 %32 to i64
  %34 = getelementptr inbounds [2 x [4194304 x i32]], ptr @_ZZ10PolyInvHisiPiS_E3seq, i64 0, i64 %33
  %35 = getelementptr inbounds [4194304 x i32], ptr %34, i64 0, i64 0
  %36 = load i32, ptr @_ZZ10PolyInvHisiPiS_E3len, align 4, !tbaa !5
  %37 = ashr i32 %36, 1
  %38 = sext i32 %37 to i64
  %39 = mul i64 %38, 4
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %31, ptr align 16 %35, i64 %39, i1 false)
  %40 = load i32, ptr %4, align 4, !tbaa !5
  %41 = load ptr, ptr %5, align 8, !tbaa !9
  %42 = load i32, ptr @_ZZ10PolyInvHisiPiS_E3len, align 4, !tbaa !5
  %43 = load i32, ptr @_ZZ10PolyInvHisiPiS_E5cur_i, align 4, !tbaa !5
  %44 = sext i32 %43 to i64
  %45 = getelementptr inbounds [2 x [4194304 x i32]], ptr @_ZZ10PolyInvHisiPiS_E3seq, i64 0, i64 %44
  %46 = getelementptr inbounds [4194304 x i32], ptr %45, i64 0, i64 0
  call void @_Z14PolyInvIterateiPiiS_(i32 noundef %40, ptr noundef %41, i32 noundef %42, ptr noundef %46)
  br label %47

47:                                               ; preds = %23
  %48 = load i32, ptr @_ZZ10PolyInvHisiPiS_E3len, align 4, !tbaa !5
  %49 = shl i32 %48, 1
  store i32 %49, ptr @_ZZ10PolyInvHisiPiS_E3len, align 4, !tbaa !5
  br label %18, !llvm.loop !11

50:                                               ; preds = %18
  br label %91

51:                                               ; preds = %3
  %52 = load i32, ptr @_ZZ10PolyInvHisiPiS_E5cur_i, align 4, !tbaa !5
  %53 = xor i32 %52, 1
  store i32 %53, ptr @_ZZ10PolyInvHisiPiS_E5cur_i, align 4, !tbaa !5
  %54 = load i32, ptr @_ZZ10PolyInvHisiPiS_E5pre_i, align 4, !tbaa !5
  %55 = xor i32 %54, 1
  store i32 %55, ptr @_ZZ10PolyInvHisiPiS_E5pre_i, align 4, !tbaa !5
  %56 = load i32, ptr @_ZZ10PolyInvHisiPiS_E3len, align 4, !tbaa !5
  %57 = ashr i32 %56, 1
  store i32 %57, ptr @_ZZ10PolyInvHisiPiS_E3len, align 4, !tbaa !5
  br label %58

58:                                               ; preds = %87, %51
  %59 = load i32, ptr @_ZZ10PolyInvHisiPiS_E3len, align 4, !tbaa !5
  %60 = ashr i32 %59, 1
  %61 = load i32, ptr %4, align 4, !tbaa !5
  %62 = icmp slt i32 %60, %61
  br i1 %62, label %63, label %90

63:                                               ; preds = %58
  %64 = load i32, ptr @_ZZ10PolyInvHisiPiS_E5cur_i, align 4, !tbaa !5
  %65 = xor i32 %64, 1
  store i32 %65, ptr @_ZZ10PolyInvHisiPiS_E5cur_i, align 4, !tbaa !5
  %66 = load i32, ptr @_ZZ10PolyInvHisiPiS_E5pre_i, align 4, !tbaa !5
  %67 = xor i32 %66, 1
  store i32 %67, ptr @_ZZ10PolyInvHisiPiS_E5pre_i, align 4, !tbaa !5
  %68 = load i32, ptr @_ZZ10PolyInvHisiPiS_E5cur_i, align 4, !tbaa !5
  %69 = sext i32 %68 to i64
  %70 = getelementptr inbounds [2 x [4194304 x i32]], ptr @_ZZ10PolyInvHisiPiS_E3seq, i64 0, i64 %69
  %71 = getelementptr inbounds [4194304 x i32], ptr %70, i64 0, i64 0
  %72 = load i32, ptr @_ZZ10PolyInvHisiPiS_E5pre_i, align 4, !tbaa !5
  %73 = sext i32 %72 to i64
  %74 = getelementptr inbounds [2 x [4194304 x i32]], ptr @_ZZ10PolyInvHisiPiS_E3seq, i64 0, i64 %73
  %75 = getelementptr inbounds [4194304 x i32], ptr %74, i64 0, i64 0
  %76 = load i32, ptr @_ZZ10PolyInvHisiPiS_E3len, align 4, !tbaa !5
  %77 = ashr i32 %76, 1
  %78 = sext i32 %77 to i64
  %79 = mul i64 %78, 4
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %71, ptr align 16 %75, i64 %79, i1 false)
  %80 = load i32, ptr %4, align 4, !tbaa !5
  %81 = load ptr, ptr %5, align 8, !tbaa !9
  %82 = load i32, ptr @_ZZ10PolyInvHisiPiS_E3len, align 4, !tbaa !5
  %83 = load i32, ptr @_ZZ10PolyInvHisiPiS_E5cur_i, align 4, !tbaa !5
  %84 = sext i32 %83 to i64
  %85 = getelementptr inbounds [2 x [4194304 x i32]], ptr @_ZZ10PolyInvHisiPiS_E3seq, i64 0, i64 %84
  %86 = getelementptr inbounds [4194304 x i32], ptr %85, i64 0, i64 0
  call void @_Z14PolyInvIterateiPiiS_(i32 noundef %80, ptr noundef %81, i32 noundef %82, ptr noundef %86)
  br label %87

87:                                               ; preds = %63
  %88 = load i32, ptr @_ZZ10PolyInvHisiPiS_E3len, align 4, !tbaa !5
  %89 = shl i32 %88, 1
  store i32 %89, ptr @_ZZ10PolyInvHisiPiS_E3len, align 4, !tbaa !5
  br label %58, !llvm.loop !13

90:                                               ; preds = %58
  br label %91

91:                                               ; preds = %90, %50
  %92 = load ptr, ptr %6, align 8, !tbaa !9
  %93 = load i32, ptr @_ZZ10PolyInvHisiPiS_E5cur_i, align 4, !tbaa !5
  %94 = sext i32 %93 to i64
  %95 = getelementptr inbounds [2 x [4194304 x i32]], ptr @_ZZ10PolyInvHisiPiS_E3seq, i64 0, i64 %94
  %96 = getelementptr inbounds [4194304 x i32], ptr %95, i64 0, i64 0
  %97 = load i32, ptr @_ZZ10PolyInvHisiPiS_E3len, align 4, !tbaa !5
  %98 = sext i32 %97 to i64
  %99 = mul i64 %98, 4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %92, ptr align 16 %96, i64 %99, i1 false)
  ret void
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZZ10PolyInvHisiPiS_E5cur_i = external hidden local_unnamed_addr global i32, align 4
@_ZZ10PolyInvHisiPiS_E5pre_i = external hidden local_unnamed_addr global i32, align 4
@_ZZ10PolyInvHisiPiS_E3len = external hidden local_unnamed_addr global i32, align 4
@_ZZ10PolyInvHisiPiS_E3seq = external hidden global [2 x [4194304 x i32]], align 16

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z14PolyInvIterateiPiiS_(i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_Z7mod_invi(i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z10PolyInvHisiPiS_(i32 noundef %0, ptr noundef %1, ptr nocapture noundef writeonly %2) local_unnamed_addr #0 {
  %4 = icmp eq i32 %0, 2
  br i1 %4, label %5, label %26

5:                                                ; preds = %3
  %6 = load i32, ptr %1, align 4, !tbaa !5
  %7 = tail call noundef i32 @_Z7mod_invi(i32 noundef %6)
  %8 = load i32, ptr @_ZZ10PolyInvHisiPiS_E5cur_i, align 4, !tbaa !5
  %9 = sext i32 %8 to i64
  %10 = getelementptr inbounds [2 x [4194304 x i32]], ptr @_ZZ10PolyInvHisiPiS_E3seq, i64 0, i64 %9
  store i32 %7, ptr %10, align 16, !tbaa !5
  store i32 2, ptr @_ZZ10PolyInvHisiPiS_E3len, align 4, !tbaa !5
  br label %11

11:                                               ; preds = %5, %11
  %storemerge811 = phi i32 [ 2, %5 ], [ %24, %11 ]
  %12 = load i32, ptr @_ZZ10PolyInvHisiPiS_E5cur_i, align 4, !tbaa !5
  %13 = xor i32 %12, 1
  store i32 %13, ptr @_ZZ10PolyInvHisiPiS_E5cur_i, align 4, !tbaa !5
  %14 = load i32, ptr @_ZZ10PolyInvHisiPiS_E5pre_i, align 4, !tbaa !5
  %15 = xor i32 %14, 1
  store i32 %15, ptr @_ZZ10PolyInvHisiPiS_E5pre_i, align 4, !tbaa !5
  %16 = sext i32 %13 to i64
  %17 = getelementptr inbounds [2 x [4194304 x i32]], ptr @_ZZ10PolyInvHisiPiS_E3seq, i64 0, i64 %16
  %18 = sext i32 %15 to i64
  %19 = getelementptr inbounds [2 x [4194304 x i32]], ptr @_ZZ10PolyInvHisiPiS_E3seq, i64 0, i64 %18
  %20 = ashr exact i32 %storemerge811, 1
  %21 = sext i32 %20 to i64
  %22 = shl nsw i64 %21, 2
  tail call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 16 %17, ptr nonnull align 16 %19, i64 %22, i1 false)
  tail call void @_Z14PolyInvIterateiPiiS_(i32 noundef 2, ptr noundef nonnull %1, i32 noundef %storemerge811, ptr noundef nonnull %17)
  %23 = load i32, ptr @_ZZ10PolyInvHisiPiS_E3len, align 4, !tbaa !5
  %24 = shl i32 %23, 1
  store i32 %24, ptr @_ZZ10PolyInvHisiPiS_E3len, align 4, !tbaa !5
  %25 = icmp slt i32 %24, 3
  br i1 %25, label %11, label %.loopexit, !llvm.loop !9

26:                                               ; preds = %3
  %27 = load i32, ptr @_ZZ10PolyInvHisiPiS_E5cur_i, align 4, !tbaa !5
  %28 = xor i32 %27, 1
  store i32 %28, ptr @_ZZ10PolyInvHisiPiS_E5cur_i, align 4, !tbaa !5
  %29 = load i32, ptr @_ZZ10PolyInvHisiPiS_E5pre_i, align 4, !tbaa !5
  %30 = xor i32 %29, 1
  store i32 %30, ptr @_ZZ10PolyInvHisiPiS_E5pre_i, align 4, !tbaa !5
  %31 = load i32, ptr @_ZZ10PolyInvHisiPiS_E3len, align 4, !tbaa !5
  %32 = ashr i32 %31, 1
  store i32 %32, ptr @_ZZ10PolyInvHisiPiS_E3len, align 4, !tbaa !5
  %33 = ashr i32 %31, 2
  %34 = icmp slt i32 %33, %0
  br i1 %34, label %.lr.ph, label %.loopexit

.lr.ph:                                           ; preds = %26, %.lr.ph
  %35 = phi i32 [ %48, %.lr.ph ], [ %33, %26 ]
  %storemerge10 = phi i32 [ %47, %.lr.ph ], [ %32, %26 ]
  %36 = load i32, ptr @_ZZ10PolyInvHisiPiS_E5cur_i, align 4, !tbaa !5
  %37 = xor i32 %36, 1
  store i32 %37, ptr @_ZZ10PolyInvHisiPiS_E5cur_i, align 4, !tbaa !5
  %38 = load i32, ptr @_ZZ10PolyInvHisiPiS_E5pre_i, align 4, !tbaa !5
  %39 = xor i32 %38, 1
  store i32 %39, ptr @_ZZ10PolyInvHisiPiS_E5pre_i, align 4, !tbaa !5
  %40 = sext i32 %37 to i64
  %41 = getelementptr inbounds [2 x [4194304 x i32]], ptr @_ZZ10PolyInvHisiPiS_E3seq, i64 0, i64 %40
  %42 = sext i32 %39 to i64
  %43 = getelementptr inbounds [2 x [4194304 x i32]], ptr @_ZZ10PolyInvHisiPiS_E3seq, i64 0, i64 %42
  %44 = sext i32 %35 to i64
  %45 = shl nsw i64 %44, 2
  tail call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 16 %41, ptr nonnull align 16 %43, i64 %45, i1 false)
  tail call void @_Z14PolyInvIterateiPiiS_(i32 noundef %0, ptr noundef %1, i32 noundef %storemerge10, ptr noundef nonnull %41)
  %46 = load i32, ptr @_ZZ10PolyInvHisiPiS_E3len, align 4, !tbaa !5
  %47 = shl i32 %46, 1
  store i32 %47, ptr @_ZZ10PolyInvHisiPiS_E3len, align 4, !tbaa !5
  %48 = ashr exact i32 %47, 1
  %49 = icmp slt i32 %48, %0
  br i1 %49, label %.lr.ph, label %.loopexit, !llvm.loop !11

.loopexit:                                        ; preds = %.lr.ph, %11, %26
  %50 = phi i32 [ %32, %26 ], [ %24, %11 ], [ %47, %.lr.ph ]
  %51 = load i32, ptr @_ZZ10PolyInvHisiPiS_E5cur_i, align 4, !tbaa !5
  %52 = sext i32 %51 to i64
  %53 = getelementptr inbounds [2 x [4194304 x i32]], ptr @_ZZ10PolyInvHisiPiS_E3seq, i64 0, i64 %52
  %54 = sext i32 %50 to i64
  %55 = shl nsw i64 %54, 2
  tail call void @llvm.memcpy.p0.p0.i64(ptr align 4 %2, ptr nonnull align 16 %53, i64 %55, i1 false)
  ret void
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass