; LLVM IR from sourceryinstitute/MORFEUS-Source :: src/FV/src/mesh_optimize/OptMS (SMactive)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__SMactive = type { i32, i32, ptr, double }

@.str = external hidden unnamed_addr constant [16 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [108 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [18 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [42 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local i32 @SMfindActiveSet(i32 noundef %0, ptr noundef %1, double noundef %2, ptr noundef %3) #0 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca double, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca double, align 8
  %16 = alloca double, align 8
  %17 = alloca double, align 8
  %18 = alloca double, align 8
  %19 = alloca i32, align 4
  store i32 %0, ptr %6, align 4, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !9
  store double %2, ptr %8, align 8, !tbaa !11
  store ptr %3, ptr %9, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #4
  %20 = load ptr, ptr %9, align 8, !tbaa !9
  %21 = icmp eq ptr %20, null
  br i1 %21, label %22, label %24

22:                                               ; preds = %4
  %23 = call i32 @SMerror(i32 noundef 40, ptr noundef @.str, ptr noundef @.str.1, ptr noundef @.str.2, i32 noundef 56, i32 noundef 0, ptr noundef null)
  store i32 %23, ptr %5, align 4
  store i32 1, ptr %19, align 4
  br label %170

24:                                               ; preds = %4
  %25 = load i32, ptr %6, align 4, !tbaa !5
  %26 = icmp sgt i32 %25, 900
  br i1 %26, label %27, label %29

27:                                               ; preds = %24
  %28 = call i32 @SMerror(i32 noundef 42, ptr noundef @.str, ptr noundef @.str.1, ptr noundef @.str.2, i32 noundef 57, i32 noundef 0, ptr noundef @.str.3)
  store i32 %28, ptr %5, align 4
  store i32 1, ptr %19, align 4
  br label %170

29:                                               ; preds = %24
  %30 = load ptr, ptr %9, align 8, !tbaa !9
  %31 = getelementptr inbounds %struct.__SMactive, ptr %30, i32 0, i32 0
  store i32 0, ptr %31, align 8, !tbaa !13
  %32 = load ptr, ptr %9, align 8, !tbaa !9
  %33 = getelementptr inbounds %struct.__SMactive, ptr %32, i32 0, i32 1
  store i32 0, ptr %33, align 4, !tbaa !15
  %34 = load ptr, ptr %9, align 8, !tbaa !9
  %35 = getelementptr inbounds %struct.__SMactive, ptr %34, i32 0, i32 3
  store double 0.000000e+00, ptr %35, align 8, !tbaa !16
  store i32 0, ptr %11, align 4, !tbaa !5
  br label %36

36:                                               ; preds = %47, %29
  %37 = load i32, ptr %11, align 4, !tbaa !5
  %38 = load i32, ptr %6, align 4, !tbaa !5
  %39 = icmp slt i32 %37, %38
  br i1 %39, label %40, label %50

40:                                               ; preds = %36
  %41 = load ptr, ptr %9, align 8, !tbaa !9
  %42 = getelementptr inbounds %struct.__SMactive, ptr %41, i32 0, i32 2
  %43 = load ptr, ptr %42, align 8, !tbaa !17
  %44 = load i32, ptr %11, align 4, !tbaa !5
  %45 = sext i32 %44 to i64
  %46 = getelementptr inbounds i32, ptr %43, i64 %45
  store i32 0, ptr %46, align 4, !tbaa !5
  br label %47

47:                                               ; preds = %40
  %48 = load i32, ptr %11, align 4, !tbaa !5
  %49 = add nsw i32 %48, 1
  store i32 %49, ptr %11, align 4, !tbaa !5
  br label %36, !llvm.loop !18

50:                                               ; preds = %36
  store i32 1, ptr %13, align 4, !tbaa !5
  store i32 0, ptr %14, align 4, !tbaa !5
  %51 = load ptr, ptr %9, align 8, !tbaa !9
  %52 = getelementptr inbounds %struct.__SMactive, ptr %51, i32 0, i32 2
  %53 = load ptr, ptr %52, align 8, !tbaa !17
  %54 = getelementptr inbounds i32, ptr %53, i64 0
  store i32 0, ptr %54, align 4, !tbaa !5
  %55 = load ptr, ptr %7, align 8, !tbaa !9
  %56 = getelementptr inbounds double, ptr %55, i64 0
  %57 = load double, ptr %56, align 8, !tbaa !11
  store double %57, ptr %17, align 8, !tbaa !11
  store i32 1, ptr %11, align 4, !tbaa !5
  br label %58

58:                                               ; preds = %157, %50
  %59 = load i32, ptr %11, align 4, !tbaa !5
  %60 = load i32, ptr %6, align 4, !tbaa !5
  %61 = icmp slt i32 %59, %60
  br i1 %61, label %62, label %160

62:                                               ; preds = %58
  %63 = load ptr, ptr %7, align 8, !tbaa !9
  %64 = load i32, ptr %11, align 4, !tbaa !5
  %65 = sext i32 %64 to i64
  %66 = getelementptr inbounds double, ptr %63, i64 %65
  %67 = load double, ptr %66, align 8, !tbaa !11
  store double %67, ptr %15, align 8, !tbaa !11
  %68 = load double, ptr %15, align 8, !tbaa !11
  %69 = load double, ptr %17, align 8, !tbaa !11
  %70 = fcmp olt double %68, %69
  br i1 %70, label %71, label %73

71:                                               ; preds = %62
  %72 = load double, ptr %15, align 8, !tbaa !11
  br label %75

73:                                               ; preds = %62
  %74 = load double, ptr %17, align 8, !tbaa !11
  br label %75

75:                                               ; preds = %73, %71
  %76 = phi double [ %72, %71 ], [ %74, %73 ]
  store double %76, ptr %17, align 8, !tbaa !11
  %77 = load ptr, ptr %7, align 8, !tbaa !9
  %78 = load ptr, ptr %9, align 8, !tbaa !9
  %79 = getelementptr inbounds %struct.__SMactive, ptr %78, i32 0, i32 2
  %80 = load ptr, ptr %79, align 8, !tbaa !17
  %81 = getelementptr inbounds i32, ptr %80, i64 0
  %82 = load i32, ptr %81, align 4, !tbaa !5
  %83 = sext i32 %82 to i64
  %84 = getelementptr inbounds double, ptr %77, i64 %83
  %85 = load double, ptr %84, align 8, !tbaa !11
  store double %85, ptr %16, align 8, !tbaa !11
  %86 = load double, ptr %15, align 8, !tbaa !11
  %87 = load double, ptr %16, align 8, !tbaa !11
  %88 = fsub double %86, %87
  %89 = call double @llvm.fabs.f64(double %88)
  store double %89, ptr %18, align 8, !tbaa !11
  %90 = load double, ptr %15, align 8, !tbaa !11
  %91 = load double, ptr %16, align 8, !tbaa !11
  %92 = fcmp olt double %90, %91
  br i1 %92, label %93, label %130

93:                                               ; preds = %75
  %94 = load double, ptr %18, align 8, !tbaa !11
  %95 = load double, ptr %8, align 8, !tbaa !11
  %96 = fcmp ogt double %94, %95
  br i1 %96, label %97, label %103

97:                                               ; preds = %93
  store i32 1, ptr %13, align 4, !tbaa !5
  store i32 0, ptr %14, align 4, !tbaa !5
  %98 = load i32, ptr %11, align 4, !tbaa !5
  %99 = load ptr, ptr %9, align 8, !tbaa !9
  %100 = getelementptr inbounds %struct.__SMactive, ptr %99, i32 0, i32 2
  %101 = load ptr, ptr %100, align 8, !tbaa !17
  %102 = getelementptr inbounds i32, ptr %101, i64 0
  store i32 %98, ptr %102, align 4, !tbaa !5
  br label %129

103:                                              ; preds = %93
  %104 = load double, ptr %18, align 8, !tbaa !11
  %105 = load double, ptr %8, align 8, !tbaa !11
  %106 = fcmp olt double %104, %105
  br i1 %106, label %107, label %128

107:                                              ; preds = %103
  %108 = load i32, ptr %13, align 4, !tbaa !5
  %109 = add nsw i32 %108, 1
  store i32 %109, ptr %13, align 4, !tbaa !5
  %110 = load i32, ptr %13, align 4, !tbaa !5
  %111 = sub nsw i32 %110, 1
  store i32 %111, ptr %12, align 4, !tbaa !5
  %112 = load i32, ptr %11, align 4, !tbaa !5
  %113 = load ptr, ptr %9, align 8, !tbaa !9
  %114 = getelementptr inbounds %struct.__SMactive, ptr %113, i32 0, i32 2
  %115 = load ptr, ptr %114, align 8, !tbaa !17
  %116 = load i32, ptr %12, align 4, !tbaa !5
  %117 = sext i32 %116 to i64
  %118 = getelementptr inbounds i32, ptr %115, i64 %117
  store i32 %112, ptr %118, align 4, !tbaa !5
  %119 = load double, ptr %15, align 8, !tbaa !11
  %120 = load double, ptr %16, align 8, !tbaa !11
  %121 = fsub double %119, %120
  %122 = call double @llvm.fabs.f64(double %121)
  %123 = fcmp olt double %122, 1.000000e-15
  br i1 %123, label %124, label %127

124:                                              ; preds = %107
  %125 = load i32, ptr %14, align 4, !tbaa !5
  %126 = add nsw i32 %125, 1
  store i32 %126, ptr %14, align 4, !tbaa !5
  br label %127

127:                                              ; preds = %124, %107
  br label %128

128:                                              ; preds = %127, %103
  br label %129

129:                                              ; preds = %128, %97
  br label %156

130:                                              ; preds = %75
  %131 = load double, ptr %18, align 8, !tbaa !11
  %132 = load double, ptr %8, align 8, !tbaa !11
  %133 = fcmp olt double %131, %132
  br i1 %133, label %134, label %155

134:                                              ; preds = %130
  %135 = load i32, ptr %13, align 4, !tbaa !5
  %136 = add nsw i32 %135, 1
  store i32 %136, ptr %13, align 4, !tbaa !5
  %137 = load i32, ptr %13, align 4, !tbaa !5
  %138 = sub nsw i32 %137, 1
  store i32 %138, ptr %12, align 4, !tbaa !5
  %139 = load i32, ptr %11, align 4, !tbaa !5
  %140 = load ptr, ptr %9, align 8, !tbaa !9
  %141 = getelementptr inbounds %struct.__SMactive, ptr %140, i32 0, i32 2
  %142 = load ptr, ptr %141, align 8, !tbaa !17
  %143 = load i32, ptr %12, align 4, !tbaa !5
  %144 = sext i32 %143 to i64
  %145 = getelementptr inbounds i32, ptr %142, i64 %144
  store i32 %139, ptr %145, align 4, !tbaa !5
  %146 = load double, ptr %15, align 8, !tbaa !11
  %147 = load double, ptr %16, align 8, !tbaa !11
  %148 = fsub double %146, %147
  %149 = call double @llvm.fabs.f64(double %148)
  %150 = fcmp olt double %149, 1.000000e-15
  br i1 %150, label %151, label %154

151:                                              ; preds = %134
  %152 = load i32, ptr %14, align 4, !tbaa !5
  %153 = add nsw i32 %152, 1
  store i32 %153, ptr %14, align 4, !tbaa !5
  br label %154

154:                                              ; preds = %151, %134
  br label %155

155:                                              ; preds = %154, %130
  br label %156

156:                                              ; preds = %155, %129
  br label %157

157:                                              ; preds = %156
  %158 = load i32, ptr %11, align 4, !tbaa !5
  %159 = add nsw i32 %158, 1
  store i32 %159, ptr %11, align 4, !tbaa !5
  br label %58, !llvm.loop !20

160:                                              ; preds = %58
  %161 = load double, ptr %17, align 8, !tbaa !11
  %162 = load ptr, ptr %9, align 8, !tbaa !9
  %163 = getelementptr inbounds %struct.__SMactive, ptr %162, i32 0, i32 3
  store double %161, ptr %163, align 8, !tbaa !16
  %164 = load i32, ptr %13, align 4, !tbaa !5
  %165 = load ptr, ptr %9, align 8, !tbaa !9
  %166 = getelementptr inbounds %struct.__SMactive, ptr %165, i32 0, i32 0
  store i32 %164, ptr %166, align 8, !tbaa !13
  %167 = load i32, ptr %14, align 4, !tbaa !5
  %168 = load ptr, ptr %9, align 8, !tbaa !9
  %169 = getelementptr inbounds %struct.__SMactive, ptr %168, i32 0, i32 1
  store i32 %167, ptr %169, align 4, !tbaa !15
  store i32 0, ptr %10, align 4, !tbaa !5
  store i32 0, ptr %5, align 4
  store i32 1, ptr %19, align 4
  br label %170

170:                                              ; preds = %160, %27, %22
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  %171 = load i32, ptr %5, align 4
  ret i32 %171
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @SMerror(i32 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fabs.f64(double) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"double", !7, i64 0}
!13 = !{!14, !6, i64 0}
!14 = !{!"__SMactive", !6, i64 0, !6, i64 4, !10, i64 8, !12, i64 16}
!15 = !{!14, !6, i64 4}
!16 = !{!14, !12, i64 16}
!17 = !{!14, !10, i64 8}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
!20 = distinct !{!20, !19}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [16 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [108 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [18 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [42 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local i32 @SMfindActiveSet(i32 noundef %0, ptr nocapture noundef readonly %1, double noundef %2, ptr noundef %3) local_unnamed_addr #0 {
  %5 = icmp eq ptr %3, null
  br i1 %5, label %6, label %8

6:                                                ; preds = %4
  %7 = tail call i32 @SMerror(i32 noundef 40, ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, ptr noundef nonnull @.str.2, i32 noundef 56, i32 noundef 0, ptr noundef null) #4
  br label %58

8:                                                ; preds = %4
  %9 = icmp sgt i32 %0, 900
  br i1 %9, label %10, label %12

10:                                               ; preds = %8
  %11 = tail call i32 @SMerror(i32 noundef 42, ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, ptr noundef nonnull @.str.2, i32 noundef 57, i32 noundef 0, ptr noundef nonnull @.str.3) #4
  br label %58

12:                                               ; preds = %8
  store i32 0, ptr %3, align 8, !tbaa !5
  %13 = getelementptr inbounds i8, ptr %3, i64 4
  store i32 0, ptr %13, align 4, !tbaa !12
  %14 = getelementptr inbounds i8, ptr %3, i64 16
  store double 0.000000e+00, ptr %14, align 8, !tbaa !13
  %15 = icmp sgt i32 %0, 0
  %16 = getelementptr inbounds i8, ptr %3, i64 8
  %17 = load ptr, ptr %16, align 8, !tbaa !14
  br i1 %15, label %._crit_edge, label %._crit_edge.thread

._crit_edge.thread:                               ; preds = %12
  store i32 0, ptr %17, align 4, !tbaa !15
  %18 = load double, ptr %1, align 8, !tbaa !16
  br label %._crit_edge74

._crit_edge:                                      ; preds = %12
  %19 = zext nneg i32 %0 to i64
  %20 = shl nuw nsw i64 %19, 2
  tail call void @llvm.memset.p0.i64(ptr align 4 %17, i8 0, i64 %20, i1 false), !tbaa !15
  store i32 0, ptr %17, align 4, !tbaa !15
  %21 = load double, ptr %1, align 8, !tbaa !16
  %.not = icmp eq i32 %0, 1
  br i1 %.not, label %._crit_edge74, label %.lr.ph73.preheader

.lr.ph73.preheader:                               ; preds = %._crit_edge
  %wide.trip.count = zext nneg i32 %0 to i64
  br label %.lr.ph73

.lr.ph73:                                         ; preds = %.lr.ph73.preheader, %57
  %indvars.iv = phi i64 [ 1, %.lr.ph73.preheader ], [ %indvars.iv.next, %57 ]
  %.05771 = phi double [ %21, %.lr.ph73.preheader ], [ %25, %57 ]
  %.05969 = phi i32 [ 0, %.lr.ph73.preheader ], [ %.160, %57 ]
  %.06168 = phi i32 [ 1, %.lr.ph73.preheader ], [ %.162, %57 ]
  %22 = getelementptr inbounds double, ptr %1, i64 %indvars.iv
  %23 = load double, ptr %22, align 8, !tbaa !16
  %24 = fcmp olt double %23, %.05771
  %25 = select i1 %24, double %23, double %.05771
  %26 = load i32, ptr %17, align 4, !tbaa !15
  %27 = sext i32 %26 to i64
  %28 = getelementptr inbounds double, ptr %1, i64 %27
  %29 = load double, ptr %28, align 8, !tbaa !16
  %30 = fsub double %23, %29
  %31 = tail call double @llvm.fabs.f64(double %30)
  %32 = fcmp olt double %23, %29
  br i1 %32, label %33, label %47

33:                                               ; preds = %.lr.ph73
  %34 = fcmp ogt double %31, %2
  br i1 %34, label %35, label %37

35:                                               ; preds = %33
  %36 = trunc nuw nsw i64 %indvars.iv to i32
  store i32 %36, ptr %17, align 4, !tbaa !15
  br label %57

37:                                               ; preds = %33
  %38 = fcmp olt double %31, %2
  br i1 %38, label %39, label %57

39:                                               ; preds = %37
  %40 = add nsw i32 %.06168, 1
  %41 = sext i32 %.06168 to i64
  %42 = getelementptr inbounds i32, ptr %17, i64 %41
  %43 = trunc nuw nsw i64 %indvars.iv to i32
  store i32 %43, ptr %42, align 4, !tbaa !15
  %44 = fcmp olt double %31, 1.000000e-15
  br i1 %44, label %45, label %57

45:                                               ; preds = %39
  %46 = add nsw i32 %.05969, 1
  br label %57

47:                                               ; preds = %.lr.ph73
  %48 = fcmp olt double %31, %2
  br i1 %48, label %49, label %57

49:                                               ; preds = %47
  %50 = add nsw i32 %.06168, 1
  %51 = sext i32 %.06168 to i64
  %52 = getelementptr inbounds i32, ptr %17, i64 %51
  %53 = trunc nuw nsw i64 %indvars.iv to i32
  store i32 %53, ptr %52, align 4, !tbaa !15
  %54 = fcmp olt double %31, 1.000000e-15
  br i1 %54, label %55, label %57

55:                                               ; preds = %49
  %56 = add nsw i32 %.05969, 1
  br label %57

57:                                               ; preds = %37, %45, %39, %35, %49, %55, %47
  %.162 = phi i32 [ 1, %35 ], [ %40, %45 ], [ %40, %39 ], [ %.06168, %37 ], [ %50, %55 ], [ %50, %49 ], [ %.06168, %47 ]
  %.160 = phi i32 [ 0, %35 ], [ %46, %45 ], [ %.05969, %39 ], [ %.05969, %37 ], [ %56, %55 ], [ %.05969, %49 ], [ %.05969, %47 ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge74, label %.lr.ph73, !llvm.loop !17

._crit_edge74:                                    ; preds = %57, %._crit_edge.thread, %._crit_edge
  %.061.lcssa = phi i32 [ 1, %._crit_edge ], [ 1, %._crit_edge.thread ], [ %.162, %57 ]
  %.059.lcssa = phi i32 [ 0, %._crit_edge ], [ 0, %._crit_edge.thread ], [ %.160, %57 ]
  %.057.lcssa = phi double [ %21, %._crit_edge ], [ %18, %._crit_edge.thread ], [ %25, %57 ]
  store double %.057.lcssa, ptr %14, align 8, !tbaa !13
  store i32 %.061.lcssa, ptr %3, align 8, !tbaa !5
  store i32 %.059.lcssa, ptr %13, align 4, !tbaa !12
  br label %58

58:                                               ; preds = %._crit_edge74, %10, %6
  %.0 = phi i32 [ %7, %6 ], [ %11, %10 ], [ 0, %._crit_edge74 ]
  ret i32 %.0
}

declare i32 @SMerror(i32 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fabs.f64(double) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"__SMactive", !7, i64 0, !7, i64 4, !10, i64 8, !11, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!"double", !8, i64 0}
!12 = !{!6, !7, i64 4}
!13 = !{!6, !11, i64 16}
!14 = !{!6, !10, i64 8}
!15 = !{!7, !7, i64 0}
!16 = !{!11, !11, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: BDCEPass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopIdiomRecognizePass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass