; LLVM IR from Izaron/ACM-ICPC :: Russian Council of School Olympiads (R.S.O.Sh.)/IOIP/IOIP 2016/seating.ll (Z9check_ansv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@n = external dso_local global i32, align 4
@d = external dso_local global i32, align 4
@vec = external dso_local global %"class.std::vector", align 8
@ans = external dso_local global %"class.std::vector", align 8
@sums = external dso_local global %"class.std::vector", align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z8calc_sumii(i32 noundef, i32 noundef) #2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z9check_ansv() #2 {
  %1 = alloca i1, align 1
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #3
  store i32 0, ptr %2, align 4, !tbaa !5
  br label %6

6:                                                ; preds = %34, %0
  %7 = load i32, ptr %2, align 4, !tbaa !5
  %8 = load i32, ptr @n, align 4, !tbaa !5
  %9 = icmp slt i32 %7, %8
  br i1 %9, label %11, label %10

10:                                               ; preds = %6
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #3
  br label %37

11:                                               ; preds = %6
  %12 = load i32, ptr %2, align 4, !tbaa !5
  %13 = sext i32 %12 to i64
  %14 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ans, i64 noundef %13) #3
  %15 = load i32, ptr %14, align 4, !tbaa !5
  %16 = load i32, ptr %2, align 4, !tbaa !5
  %17 = sext i32 %16 to i64
  %18 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @sums, i64 noundef %17) #3
  store i32 %15, ptr %18, align 4, !tbaa !5
  %19 = load i32, ptr %2, align 4, !tbaa !5
  %20 = sub nsw i32 %19, 1
  %21 = icmp sge i32 %20, 0
  br i1 %21, label %22, label %33

22:                                               ; preds = %11
  %23 = load i32, ptr %2, align 4, !tbaa !5
  %24 = sub nsw i32 %23, 1
  %25 = sext i32 %24 to i64
  %26 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @sums, i64 noundef %25) #3
  %27 = load i32, ptr %26, align 4, !tbaa !5
  %28 = load i32, ptr %2, align 4, !tbaa !5
  %29 = sext i32 %28 to i64
  %30 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @sums, i64 noundef %29) #3
  %31 = load i32, ptr %30, align 4, !tbaa !5
  %32 = add nsw i32 %31, %27
  store i32 %32, ptr %30, align 4, !tbaa !5
  br label %33

33:                                               ; preds = %22, %11
  br label %34

34:                                               ; preds = %33
  %35 = load i32, ptr %2, align 4, !tbaa !5
  %36 = add nsw i32 %35, 1
  store i32 %36, ptr %2, align 4, !tbaa !5
  br label %6, !llvm.loop !9

37:                                               ; preds = %10
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  store i32 0, ptr %3, align 4, !tbaa !5
  br label %38

38:                                               ; preds = %62, %37
  %39 = load i32, ptr %3, align 4, !tbaa !5
  %40 = load i32, ptr @n, align 4, !tbaa !5
  %41 = icmp slt i32 %39, %40
  br i1 %41, label %43, label %42

42:                                               ; preds = %38
  store i32 5, ptr %4, align 4
  br label %65

43:                                               ; preds = %38
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  %44 = load i32, ptr %3, align 4, !tbaa !5
  %45 = load i32, ptr @d, align 4, !tbaa !5
  %46 = sub nsw i32 %44, %45
  %47 = load i32, ptr %3, align 4, !tbaa !5
  %48 = load i32, ptr @d, align 4, !tbaa !5
  %49 = add nsw i32 %47, %48
  %50 = call noundef i32 @_Z8calc_sumii(i32 noundef %46, i32 noundef %49)
  store i32 %50, ptr %5, align 4, !tbaa !5
  %51 = load i32, ptr %5, align 4, !tbaa !5
  %52 = load i32, ptr %3, align 4, !tbaa !5
  %53 = sext i32 %52 to i64
  %54 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vec, i64 noundef %53) #3
  %55 = load i32, ptr %54, align 4, !tbaa !5
  %56 = icmp ne i32 %51, %55
  br i1 %56, label %57, label %58

57:                                               ; preds = %43
  store i1 false, ptr %1, align 1
  store i32 1, ptr %4, align 4
  br label %59

58:                                               ; preds = %43
  store i32 0, ptr %4, align 4
  br label %59

59:                                               ; preds = %58, %57
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  %60 = load i32, ptr %4, align 4
  switch i32 %60, label %65 [
    i32 0, label %61
  ]

61:                                               ; preds = %59
  br label %62

62:                                               ; preds = %61
  %63 = load i32, ptr %3, align 4, !tbaa !5
  %64 = add nsw i32 %63, 1
  store i32 %64, ptr %3, align 4, !tbaa !5
  br label %38, !llvm.loop !11

65:                                               ; preds = %59, %42
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  %66 = load i32, ptr %4, align 4
  switch i32 %66, label %70 [
    i32 5, label %67
    i32 1, label %68
  ]

67:                                               ; preds = %65
  store i1 true, ptr %1, align 1
  br label %68

68:                                               ; preds = %67, %65
  %69 = load i1, ptr %1, align 1
  ret i1 %69

70:                                               ; preds = %65
  unreachable
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@n = external dso_local local_unnamed_addr global i32, align 4
@d = external dso_local local_unnamed_addr global i32, align 4
@vec = external dso_local global %"class.std::vector", align 8
@ans = external dso_local global %"class.std::vector", align 8
@sums = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z8calc_sumii(i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z9check_ansv() local_unnamed_addr #1 {
  %1 = load i32, ptr @n, align 4, !tbaa !5
  %2 = icmp sgt i32 %1, 0
  br i1 %2, label %3, label %._crit_edge

3:                                                ; preds = %0
  %4 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ans, i64 noundef 0) #2
  %5 = load i32, ptr %4, align 4, !tbaa !5
  %6 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @sums, i64 noundef 0) #2
  store i32 %5, ptr %6, align 4, !tbaa !5
  %.pre = load i32, ptr @n, align 4, !tbaa !5
  %7 = icmp sgt i32 %.pre, 1
  br i1 %7, label %.lr.ph.peel.next, label %.preheader

.preheader:                                       ; preds = %.lr.ph.peel.next, %3
  %8 = phi i32 [ %.pre, %3 ], [ %19, %.lr.ph.peel.next ]
  %9 = icmp slt i32 %8, 1
  br i1 %9, label %._crit_edge, label %.lr.ph23

.lr.ph.peel.next:                                 ; preds = %3, %.lr.ph.peel.next
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph.peel.next ], [ 1, %3 ]
  %10 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ans, i64 noundef %indvars.iv) #2
  %11 = load i32, ptr %10, align 4, !tbaa !5
  %12 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @sums, i64 noundef %indvars.iv) #2
  store i32 %11, ptr %12, align 4, !tbaa !5
  %13 = add nsw i64 %indvars.iv, -1
  %14 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @sums, i64 noundef %13) #2
  %15 = load i32, ptr %14, align 4, !tbaa !5
  %16 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @sums, i64 noundef %indvars.iv) #2
  %17 = load i32, ptr %16, align 4, !tbaa !5
  %18 = add nsw i32 %17, %15
  store i32 %18, ptr %16, align 4, !tbaa !5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %19 = load i32, ptr @n, align 4, !tbaa !5
  %20 = sext i32 %19 to i64
  %21 = icmp slt i64 %indvars.iv.next, %20
  br i1 %21, label %.lr.ph.peel.next, label %.preheader, !llvm.loop !9

22:                                               ; preds = %.lr.ph23
  %indvars.iv.next29 = add nuw nsw i64 %indvars.iv28, 1
  %23 = load i32, ptr @n, align 4, !tbaa !5
  %24 = sext i32 %23 to i64
  %.not30 = icmp slt i64 %indvars.iv.next29, %24
  br i1 %.not30, label %.lr.ph23, label %._crit_edge, !llvm.loop !12

.lr.ph23:                                         ; preds = %.preheader, %22
  %indvars.iv28 = phi i64 [ %indvars.iv.next29, %22 ], [ 0, %.preheader ]
  %25 = load i32, ptr @d, align 4, !tbaa !5
  %26 = trunc nuw nsw i64 %indvars.iv28 to i32
  %27 = sub nsw i32 %26, %25
  %28 = add nsw i32 %25, %26
  %29 = tail call noundef i32 @_Z8calc_sumii(i32 noundef %27, i32 noundef %28)
  %30 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vec, i64 noundef %indvars.iv28) #2
  %31 = load i32, ptr %30, align 4, !tbaa !5
  %.not = icmp eq i32 %29, %31
  br i1 %.not, label %22, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph23, %22, %0, %.preheader
  %.lcssa = phi i1 [ true, %.preheader ], [ true, %0 ], [ %.not, %22 ], [ %.not, %.lr.ph23 ]
  ret i1 %.lcssa
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10, !11}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.peeled.count", i32 1}
!12 = distinct !{!12, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopFullUnrollPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass