; LLVM IR from tangjz/acm-icpc :: 51nod/1039.ll (Z7mod_powii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@p = external dso_local global i32, align 4

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z7mod_powii(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 1, ptr %5, align 4, !tbaa !5
  br label %6

6:                                                ; preds = %24, %2
  %7 = load i32, ptr %4, align 4, !tbaa !5
  %8 = icmp sgt i32 %7, 0
  br i1 %8, label %9, label %36

9:                                                ; preds = %6
  %10 = load i32, ptr %4, align 4, !tbaa !5
  %11 = and i32 %10, 1
  %12 = icmp ne i32 %11, 0
  br i1 %12, label %13, label %23

13:                                               ; preds = %9
  %14 = load i32, ptr %5, align 4, !tbaa !5
  %15 = sext i32 %14 to i64
  %16 = load i32, ptr %3, align 4, !tbaa !5
  %17 = sext i32 %16 to i64
  %18 = mul nsw i64 %15, %17
  %19 = load i32, ptr @p, align 4, !tbaa !5
  %20 = sext i32 %19 to i64
  %21 = srem i64 %18, %20
  %22 = trunc i64 %21 to i32
  store i32 %22, ptr %5, align 4, !tbaa !5
  br label %23

23:                                               ; preds = %13, %9
  br label %24

24:                                               ; preds = %23
  %25 = load i32, ptr %4, align 4, !tbaa !5
  %26 = ashr i32 %25, 1
  store i32 %26, ptr %4, align 4, !tbaa !5
  %27 = load i32, ptr %3, align 4, !tbaa !5
  %28 = sext i32 %27 to i64
  %29 = load i32, ptr %3, align 4, !tbaa !5
  %30 = sext i32 %29 to i64
  %31 = mul nsw i64 %28, %30
  %32 = load i32, ptr @p, align 4, !tbaa !5
  %33 = sext i32 %32 to i64
  %34 = srem i64 %31, %33
  %35 = trunc i64 %34 to i32
  store i32 %35, ptr %3, align 4, !tbaa !5
  br label %6, !llvm.loop !9

36:                                               ; preds = %6
  %37 = load i32, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  ret i32 %37
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@p = external dso_local local_unnamed_addr global i32, align 4

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define dso_local noundef range(i32 -2147483647, -2147483648) i32 @_Z7mod_powii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = icmp sgt i32 %1, 0
  br i1 %3, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %2
  %4 = load i32, ptr @p, align 4
  %5 = sext i32 %4 to i64
  br label %6

6:                                                ; preds = %.lr.ph, %14
  %.012 = phi i32 [ 1, %.lr.ph ], [ %.1, %14 ]
  %.0811 = phi i32 [ %1, %.lr.ph ], [ %15, %14 ]
  %.0910 = phi i32 [ %0, %.lr.ph ], [ %18, %14 ]
  %7 = and i32 %.0811, 1
  %.not = icmp eq i32 %7, 0
  br i1 %.not, label %._crit_edge14, label %8

._crit_edge14:                                    ; preds = %6
  %.pre = sext i32 %.0910 to i64
  br label %14

8:                                                ; preds = %6
  %9 = sext i32 %.012 to i64
  %10 = sext i32 %.0910 to i64
  %11 = mul nsw i64 %9, %10
  %12 = srem i64 %11, %5
  %13 = trunc nsw i64 %12 to i32
  br label %14

14:                                               ; preds = %._crit_edge14, %8
  %.pre-phi = phi i64 [ %.pre, %._crit_edge14 ], [ %10, %8 ]
  %.1 = phi i32 [ %.012, %._crit_edge14 ], [ %13, %8 ]
  %15 = lshr i32 %.0811, 1
  %16 = mul nsw i64 %.pre-phi, %.pre-phi
  %17 = srem i64 %16, %5
  %18 = trunc nsw i64 %17 to i32
  %.not13 = icmp ult i32 %.0811, 2
  br i1 %.not13, label %._crit_edge, label %6, !llvm.loop !5

._crit_edge:                                      ; preds = %14, %2
  %.0.lcssa = phi i32 [ 1, %2 ], [ %.1, %14 ]
  ret i32 %.0.lcssa
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass