; LLVM IR from Muhammad-Magdi/problem-solving :: LIS.ll (Z6updateiiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@st = external dso_local global [4000 x i32], align 16

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z6updateiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #1 {
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store i32 %0, ptr %6, align 4, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !5
  store i32 %4, ptr %10, align 4, !tbaa !5
  %11 = load i32, ptr %7, align 4, !tbaa !5
  %12 = load i32, ptr %8, align 4, !tbaa !5
  %13 = icmp sgt i32 %11, %12
  br i1 %13, label %22, label %14

14:                                               ; preds = %5
  %15 = load i32, ptr %7, align 4, !tbaa !5
  %16 = load i32, ptr %9, align 4, !tbaa !5
  %17 = icmp sgt i32 %15, %16
  br i1 %17, label %22, label %18

18:                                               ; preds = %14
  %19 = load i32, ptr %8, align 4, !tbaa !5
  %20 = load i32, ptr %9, align 4, !tbaa !5
  %21 = icmp slt i32 %19, %20
  br i1 %21, label %22, label %23

22:                                               ; preds = %18, %14, %5
  br label %67

23:                                               ; preds = %18
  %24 = load i32, ptr %7, align 4, !tbaa !5
  %25 = load i32, ptr %8, align 4, !tbaa !5
  %26 = icmp eq i32 %24, %25
  br i1 %26, label %27, label %32

27:                                               ; preds = %23
  %28 = load i32, ptr %10, align 4, !tbaa !5
  %29 = load i32, ptr %6, align 4, !tbaa !5
  %30 = sext i32 %29 to i64
  %31 = getelementptr inbounds [4000 x i32], ptr @st, i64 0, i64 %30
  store i32 %28, ptr %31, align 4, !tbaa !5
  br label %67

32:                                               ; preds = %23
  %33 = load i32, ptr %6, align 4, !tbaa !5
  %34 = shl i32 %33, 1
  %35 = load i32, ptr %7, align 4, !tbaa !5
  %36 = load i32, ptr %7, align 4, !tbaa !5
  %37 = load i32, ptr %8, align 4, !tbaa !5
  %38 = add nsw i32 %36, %37
  %39 = ashr i32 %38, 1
  %40 = load i32, ptr %9, align 4, !tbaa !5
  %41 = load i32, ptr %10, align 4, !tbaa !5
  call void @_Z6updateiiiii(i32 noundef %34, i32 noundef %35, i32 noundef %39, i32 noundef %40, i32 noundef %41)
  %42 = load i32, ptr %6, align 4, !tbaa !5
  %43 = shl i32 %42, 1
  %44 = or i32 %43, 1
  %45 = load i32, ptr %7, align 4, !tbaa !5
  %46 = load i32, ptr %8, align 4, !tbaa !5
  %47 = add nsw i32 %45, %46
  %48 = ashr i32 %47, 1
  %49 = add nsw i32 %48, 1
  %50 = load i32, ptr %8, align 4, !tbaa !5
  %51 = load i32, ptr %9, align 4, !tbaa !5
  %52 = load i32, ptr %10, align 4, !tbaa !5
  call void @_Z6updateiiiii(i32 noundef %44, i32 noundef %49, i32 noundef %50, i32 noundef %51, i32 noundef %52)
  %53 = load i32, ptr %6, align 4, !tbaa !5
  %54 = shl i32 %53, 1
  %55 = sext i32 %54 to i64
  %56 = getelementptr inbounds [4000 x i32], ptr @st, i64 0, i64 %55
  %57 = load i32, ptr %6, align 4, !tbaa !5
  %58 = shl i32 %57, 1
  %59 = or i32 %58, 1
  %60 = sext i32 %59 to i64
  %61 = getelementptr inbounds [4000 x i32], ptr @st, i64 0, i64 %60
  %62 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %56, ptr noundef nonnull align 4 dereferenceable(4) %61)
  %63 = load i32, ptr %62, align 4, !tbaa !5
  %64 = load i32, ptr %6, align 4, !tbaa !5
  %65 = sext i32 %64 to i64
  %66 = getelementptr inbounds [4000 x i32], ptr @st, i64 0, i64 %65
  store i32 %63, ptr %66, align 4, !tbaa !5
  br label %67

67:                                               ; preds = %32, %27, %22
  ret void
}

attributes #0 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@st = external dso_local global [4000 x i32], align 16

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z6updateiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #1 {
  %6 = icmp sgt i32 %1, %2
  %7 = icmp sgt i32 %1, %3
  %or.cond = or i1 %6, %7
  %8 = icmp slt i32 %2, %3
  %or.cond27 = or i1 %8, %or.cond
  br i1 %or.cond27, label %common.ret, label %9

9:                                                ; preds = %5
  %10 = icmp eq i32 %1, %2
  br i1 %10, label %common.ret.sink.split, label %13

common.ret.sink.split:                            ; preds = %9, %13
  %.sink = phi i32 [ %24, %13 ], [ %4, %9 ]
  %11 = sext i32 %0 to i64
  %12 = getelementptr inbounds [4000 x i32], ptr @st, i64 0, i64 %11
  store i32 %.sink, ptr %12, align 4, !tbaa !5
  br label %common.ret

common.ret:                                       ; preds = %common.ret.sink.split, %5
  ret void

13:                                               ; preds = %9
  %14 = shl i32 %0, 1
  %15 = add nsw i32 %2, %1
  %16 = ashr i32 %15, 1
  tail call void @_Z6updateiiiii(i32 noundef %14, i32 noundef %1, i32 noundef %16, i32 noundef %3, i32 noundef %4)
  %17 = or disjoint i32 %14, 1
  %18 = add nsw i32 %16, 1
  tail call void @_Z6updateiiiii(i32 noundef %17, i32 noundef %18, i32 noundef %2, i32 noundef %3, i32 noundef %4)
  %19 = sext i32 %14 to i64
  %20 = getelementptr inbounds [4000 x i32], ptr @st, i64 0, i64 %19
  %21 = sext i32 %17 to i64
  %22 = getelementptr inbounds [4000 x i32], ptr @st, i64 0, i64 %21
  %23 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %20, ptr noundef nonnull align 4 dereferenceable(4) %22)
  %24 = load i32, ptr %23, align 4, !tbaa !5
  br label %common.ret.sink.split
}

attributes #0 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass