; LLVM IR from FrancesoM/Bisc8FX :: sdk_projects/bisc8_platform/ps7_cortexa9_0/standalone_domain/bsp/ps7_cortexa9_0_ (BusWidth)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XSdPs = type { %struct.XSdPs_Config, i32, i32, i32, i32, i8, i8, i8, i8, i32, i8, [4 x i32], i32, [4 x i32], i32, i32, i32, i32, i32, i64, i16, i32, i8, i32 }
%struct.XSdPs_Config = type { i16, i32, i32, i32, i32, i32, i32, i32, i8 }

@Xil_AssertStatus = external global i32, align 4
@.str = external hidden unnamed_addr constant [169 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @Xil_Assert(ptr noundef, i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @XSdPs_CmdTransfer(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @XSdPs_WriteReg16(i32 noundef, i8 noundef zeroext, i16 noundef zeroext) #2

; Function Attrs: nounwind uwtable
define dso_local i32 @XSdPs_Change_BusWidth(ptr noundef %0) #3 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  %8 = load ptr, ptr %3, align 8, !tbaa !5
  %9 = icmp ne ptr %8, null
  br i1 %9, label %10, label %11

10:                                               ; preds = %1
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %12

11:                                               ; preds = %1
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 247)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %2, align 4
  store i32 1, ptr %7, align 4
  br label %143

12:                                               ; preds = %10
  %13 = load ptr, ptr %3, align 8, !tbaa !5
  %14 = getelementptr inbounds %struct.XSdPs, ptr %13, i32 0, i32 1
  %15 = load i32, ptr %14, align 4, !tbaa !11
  %16 = icmp eq i32 %15, 286331153
  br i1 %16, label %17, label %18

17:                                               ; preds = %12
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %19

18:                                               ; preds = %12
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 248)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %2, align 4
  store i32 1, ptr %7, align 4
  br label %143

19:                                               ; preds = %17
  %20 = load ptr, ptr %3, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.XSdPs, ptr %20, i32 0, i32 7
  %22 = load i8, ptr %21, align 2, !tbaa !16
  %23 = zext i8 %22 to i32
  %24 = icmp eq i32 %23, 2
  br i1 %24, label %25, label %32

25:                                               ; preds = %19
  %26 = load ptr, ptr %3, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.XSdPs, ptr %26, i32 0, i32 0
  %28 = getelementptr inbounds %struct.XSdPs_Config, ptr %27, i32 0, i32 5
  %29 = load i32, ptr %28, align 4, !tbaa !17
  %30 = icmp ult i32 %29, 4
  br i1 %30, label %31, label %32

31:                                               ; preds = %25
  store i32 0, ptr %4, align 4, !tbaa !9
  br label %141

32:                                               ; preds = %25, %19
  %33 = load ptr, ptr %3, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.XSdPs, ptr %33, i32 0, i32 5
  %35 = load i8, ptr %34, align 4, !tbaa !18
  %36 = zext i8 %35 to i32
  %37 = icmp eq i32 %36, 1
  br i1 %37, label %38, label %60

38:                                               ; preds = %32
  %39 = load ptr, ptr %3, align 8, !tbaa !5
  %40 = load ptr, ptr %3, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.XSdPs, ptr %40, i32 0, i32 12
  %42 = load i32, ptr %41, align 8, !tbaa !19
  %43 = call i32 @XSdPs_CmdTransfer(ptr noundef %39, i32 noundef 14080, i32 noundef %42, i32 noundef 0)
  store i32 %43, ptr %4, align 4, !tbaa !9
  %44 = load i32, ptr %4, align 4, !tbaa !9
  %45 = sext i32 %44 to i64
  %46 = icmp ne i64 %45, 0
  br i1 %46, label %47, label %48

47:                                               ; preds = %38
  store i32 1, ptr %4, align 4, !tbaa !9
  br label %141

48:                                               ; preds = %38
  %49 = load ptr, ptr %3, align 8, !tbaa !5
  %50 = load ptr, ptr %3, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.XSdPs, ptr %50, i32 0, i32 8
  %52 = load i8, ptr %51, align 1, !tbaa !20
  %53 = zext i8 %52 to i32
  %54 = call i32 @XSdPs_CmdTransfer(ptr noundef %49, i32 noundef 34304, i32 noundef %53, i32 noundef 0)
  store i32 %54, ptr %4, align 4, !tbaa !9
  %55 = load i32, ptr %4, align 4, !tbaa !9
  %56 = sext i32 %55 to i64
  %57 = icmp ne i64 %56, 0
  br i1 %57, label %58, label %59

58:                                               ; preds = %48
  store i32 1, ptr %4, align 4, !tbaa !9
  br label %141

59:                                               ; preds = %48
  br label %91

60:                                               ; preds = %32
  %61 = load ptr, ptr %3, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.XSdPs, ptr %61, i32 0, i32 8
  %63 = load i8, ptr %62, align 1, !tbaa !20
  %64 = zext i8 %63 to i32
  %65 = icmp eq i32 %64, 3
  br i1 %65, label %66, label %74

66:                                               ; preds = %60
  %67 = load ptr, ptr %3, align 8, !tbaa !5
  %68 = getelementptr inbounds %struct.XSdPs, ptr %67, i32 0, i32 16
  %69 = load i32, ptr %68, align 4, !tbaa !21
  %70 = icmp eq i32 %69, 4
  br i1 %70, label %71, label %72

71:                                               ; preds = %66
  store i32 62326272, ptr %6, align 4, !tbaa !9
  br label %73

72:                                               ; preds = %66
  store i32 62325248, ptr %6, align 4, !tbaa !9
  br label %73

73:                                               ; preds = %72, %71
  br label %82

74:                                               ; preds = %60
  %75 = load ptr, ptr %3, align 8, !tbaa !5
  %76 = getelementptr inbounds %struct.XSdPs, ptr %75, i32 0, i32 16
  %77 = load i32, ptr %76, align 4, !tbaa !21
  %78 = icmp eq i32 %77, 4
  br i1 %78, label %79, label %80

79:                                               ; preds = %74
  store i32 62326016, ptr %6, align 4, !tbaa !9
  br label %81

80:                                               ; preds = %74
  store i32 62324992, ptr %6, align 4, !tbaa !9
  br label %81

81:                                               ; preds = %80, %79
  br label %82

82:                                               ; preds = %81, %73
  %83 = load ptr, ptr %3, align 8, !tbaa !5
  %84 = load i32, ptr %6, align 4, !tbaa !9
  %85 = call i32 @XSdPs_Set_Mmc_ExtCsd(ptr noundef %83, i32 noundef %84)
  store i32 %85, ptr %4, align 4, !tbaa !9
  %86 = load i32, ptr %4, align 4, !tbaa !9
  %87 = sext i32 %86 to i64
  %88 = icmp ne i64 %87, 0
  br i1 %88, label %89, label %90

89:                                               ; preds = %82
  store i32 1, ptr %4, align 4, !tbaa !9
  br label %141

90:                                               ; preds = %82
  br label %91

91:                                               ; preds = %90, %59
  call void @usleep(i64 noundef 1000)
  %92 = load ptr, ptr %3, align 8, !tbaa !5
  %93 = getelementptr inbounds %struct.XSdPs, ptr %92, i32 0, i32 0
  %94 = getelementptr inbounds %struct.XSdPs_Config, ptr %93, i32 0, i32 1
  %95 = load i32, ptr %94, align 4, !tbaa !22
  %96 = call zeroext i8 @XSdPs_ReadReg8(i32 noundef %95, i8 noundef zeroext 40)
  %97 = zext i8 %96 to i32
  store i32 %97, ptr %5, align 4, !tbaa !9
  %98 = load ptr, ptr %3, align 8, !tbaa !5
  %99 = getelementptr inbounds %struct.XSdPs, ptr %98, i32 0, i32 8
  %100 = load i8, ptr %99, align 1, !tbaa !20
  %101 = zext i8 %100 to i32
  %102 = icmp eq i32 %101, 3
  br i1 %102, label %103, label %106

103:                                              ; preds = %91
  %104 = load i32, ptr %5, align 4, !tbaa !9
  %105 = or i32 %104, 32
  store i32 %105, ptr %5, align 4, !tbaa !9
  br label %109

106:                                              ; preds = %91
  %107 = load i32, ptr %5, align 4, !tbaa !9
  %108 = or i32 %107, 2
  store i32 %108, ptr %5, align 4, !tbaa !9
  br label %109

109:                                              ; preds = %106, %103
  %110 = load ptr, ptr %3, align 8, !tbaa !5
  %111 = getelementptr inbounds %struct.XSdPs, ptr %110, i32 0, i32 0
  %112 = getelementptr inbounds %struct.XSdPs_Config, ptr %111, i32 0, i32 1
  %113 = load i32, ptr %112, align 4, !tbaa !22
  %114 = load i32, ptr %5, align 4, !tbaa !9
  %115 = trunc i32 %114 to i8
  call void @XSdPs_WriteReg8(i32 noundef %113, i8 noundef zeroext 40, i8 noundef zeroext %115)
  %116 = load ptr, ptr %3, align 8, !tbaa !5
  %117 = getelementptr inbounds %struct.XSdPs, ptr %116, i32 0, i32 16
  %118 = load i32, ptr %117, align 4, !tbaa !21
  %119 = icmp eq i32 %118, 4
  br i1 %119, label %120, label %140

120:                                              ; preds = %109
  %121 = load ptr, ptr %3, align 8, !tbaa !5
  %122 = getelementptr inbounds %struct.XSdPs, ptr %121, i32 0, i32 0
  %123 = getelementptr inbounds %struct.XSdPs_Config, ptr %122, i32 0, i32 1
  %124 = load i32, ptr %123, align 4, !tbaa !22
  %125 = call zeroext i16 @XSdPs_ReadReg16(i32 noundef %124, i8 noundef zeroext 62)
  %126 = zext i16 %125 to i32
  store i32 %126, ptr %5, align 4, !tbaa !9
  %127 = load i32, ptr %5, align 4, !tbaa !9
  %128 = and i32 %127, -8
  store i32 %128, ptr %5, align 4, !tbaa !9
  %129 = load ptr, ptr %3, align 8, !tbaa !5
  %130 = getelementptr inbounds %struct.XSdPs, ptr %129, i32 0, i32 16
  %131 = load i32, ptr %130, align 4, !tbaa !21
  %132 = load i32, ptr %5, align 4, !tbaa !9
  %133 = or i32 %132, %131
  store i32 %133, ptr %5, align 4, !tbaa !9
  %134 = load ptr, ptr %3, align 8, !tbaa !5
  %135 = getelementptr inbounds %struct.XSdPs, ptr %134, i32 0, i32 0
  %136 = getelementptr inbounds %struct.XSdPs_Config, ptr %135, i32 0, i32 1
  %137 = load i32, ptr %136, align 4, !tbaa !22
  %138 = load i32, ptr %5, align 4, !tbaa !9
  %139 = trunc i32 %138 to i16
  call void @XSdPs_WriteReg16(i32 noundef %137, i8 noundef zeroext 62, i16 noundef zeroext %139)
  br label %140

140:                                              ; preds = %120, %109
  store i32 0, ptr %4, align 4, !tbaa !9
  br label %141

141:                                              ; preds = %140, %89, %58, %47, %31
  %142 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %142, ptr %2, align 4
  store i32 1, ptr %7, align 4
  br label %143

143:                                              ; preds = %141, %18, %11
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  %144 = load i32, ptr %2, align 4
  ret i32 %144
}

; Function Attrs: nounwind uwtable
declare dso_local i32 @XSdPs_Set_Mmc_ExtCsd(ptr noundef, i32 noundef) #3

declare void @usleep(i64 noundef) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i8 @XSdPs_ReadReg8(i32 noundef, i8 noundef zeroext) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @XSdPs_WriteReg8(i32 noundef, i8 noundef zeroext, i8 noundef zeroext) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i16 @XSdPs_ReadReg16(i32 noundef, i8 noundef zeroext) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 36}
!12 = !{!"", !13, i64 0, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !7, i64 52, !7, i64 53, !7, i64 54, !7, i64 55, !10, i64 56, !7, i64 60, !7, i64 64, !10, i64 80, !7, i64 84, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !15, i64 120, !14, i64 128, !10, i64 132, !7, i64 136, !10, i64 140}
!13 = !{!"", !14, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !7, i64 32}
!14 = !{!"short", !7, i64 0}
!15 = !{!"long", !7, i64 0}
!16 = !{!12, !7, i64 54}
!17 = !{!12, !10, i64 20}
!18 = !{!12, !7, i64 52}
!19 = !{!12, !10, i64 80}
!20 = !{!12, !7, i64 55}
!21 = !{!12, !10, i64 108}
!22 = !{!12, !10, i64 4}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@Xil_AssertStatus = external local_unnamed_addr global i32, align 4
@.str = external hidden unnamed_addr constant [169 x i8], align 1

declare void @Xil_Assert(ptr noundef, i32 noundef) local_unnamed_addr #0

declare i32 @XSdPs_CmdTransfer(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @XSdPs_WriteReg16(i32 noundef, i8 noundef zeroext, i16 noundef zeroext) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @XSdPs_Change_BusWidth(ptr noundef %0) local_unnamed_addr #2 {
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %6, label %2

2:                                                ; preds = %1
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !5
  %3 = getelementptr inbounds i8, ptr %0, i64 36
  %4 = load i32, ptr %3, align 4, !tbaa !9
  %5 = icmp eq i32 %4, 286331153
  br i1 %5, label %7, label %11

6:                                                ; preds = %1
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 247) #3
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %56

7:                                                ; preds = %2
  %8 = getelementptr inbounds i8, ptr %0, i64 54
  %9 = load i8, ptr %8, align 2, !tbaa !14
  %10 = icmp eq i8 %9, 2
  br i1 %10, label %12, label %16

11:                                               ; preds = %2
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 248) #3
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %56

12:                                               ; preds = %7
  %13 = getelementptr inbounds i8, ptr %0, i64 20
  %14 = load i32, ptr %13, align 4, !tbaa !15
  %15 = icmp ult i32 %14, 4
  br i1 %15, label %56, label %16

16:                                               ; preds = %12, %7
  %17 = getelementptr inbounds i8, ptr %0, i64 52
  %18 = load i8, ptr %17, align 4, !tbaa !16
  %19 = icmp eq i8 %18, 1
  br i1 %19, label %20, label %29

20:                                               ; preds = %16
  %21 = getelementptr inbounds i8, ptr %0, i64 80
  %22 = load i32, ptr %21, align 8, !tbaa !17
  %23 = tail call i32 @XSdPs_CmdTransfer(ptr noundef nonnull %0, i32 noundef 14080, i32 noundef %22, i32 noundef 0) #3
  %.not36 = icmp eq i32 %23, 0
  br i1 %.not36, label %24, label %56

24:                                               ; preds = %20
  %25 = getelementptr inbounds i8, ptr %0, i64 55
  %26 = load i8, ptr %25, align 1, !tbaa !18
  %27 = zext i8 %26 to i32
  %28 = tail call i32 @XSdPs_CmdTransfer(ptr noundef nonnull %0, i32 noundef 34304, i32 noundef %27, i32 noundef 0) #3
  %.not37 = icmp eq i32 %28, 0
  br i1 %.not37, label %37, label %56

29:                                               ; preds = %16
  %30 = getelementptr inbounds i8, ptr %0, i64 55
  %31 = load i8, ptr %30, align 1, !tbaa !18
  %32 = icmp eq i8 %31, 3
  %33 = getelementptr inbounds i8, ptr %0, i64 108
  %34 = load i32, ptr %33, align 4, !tbaa !19
  %35 = icmp eq i32 %34, 4
  %. = select i1 %35, i32 62326272, i32 62325248
  %.38 = select i1 %35, i32 62326016, i32 62324992
  %.0 = select i1 %32, i32 %., i32 %.38
  %36 = tail call i32 @XSdPs_Set_Mmc_ExtCsd(ptr noundef nonnull %0, i32 noundef %.0)
  %.not35 = icmp eq i32 %36, 0
  br i1 %.not35, label %37, label %56

37:                                               ; preds = %29, %24
  tail call void @usleep(i64 noundef 1000) #3
  %38 = getelementptr inbounds i8, ptr %0, i64 4
  %39 = load i32, ptr %38, align 4, !tbaa !20
  %40 = tail call zeroext i8 @XSdPs_ReadReg8(i32 noundef %39, i8 noundef zeroext 40)
  %41 = getelementptr inbounds i8, ptr %0, i64 55
  %42 = load i8, ptr %41, align 1, !tbaa !18
  %43 = icmp eq i8 %42, 3
  %.031.v = select i1 %43, i8 32, i8 2
  %.031 = or i8 %.031.v, %40
  %44 = load i32, ptr %38, align 4, !tbaa !20
  tail call void @XSdPs_WriteReg8(i32 noundef %44, i8 noundef zeroext 40, i8 noundef zeroext %.031)
  %45 = getelementptr inbounds i8, ptr %0, i64 108
  %46 = load i32, ptr %45, align 4, !tbaa !19
  %47 = icmp eq i32 %46, 4
  br i1 %47, label %48, label %56

48:                                               ; preds = %37
  %49 = load i32, ptr %38, align 4, !tbaa !20
  %50 = tail call zeroext i16 @XSdPs_ReadReg16(i32 noundef %49, i8 noundef zeroext 62)
  %51 = and i16 %50, -8
  %52 = load i32, ptr %45, align 4, !tbaa !19
  %53 = load i32, ptr %38, align 4, !tbaa !20
  %54 = trunc i32 %52 to i16
  %55 = or i16 %51, %54
  tail call void @XSdPs_WriteReg16(i32 noundef %53, i8 noundef zeroext 62, i16 noundef zeroext %55)
  br label %56

56:                                               ; preds = %12, %20, %24, %29, %48, %37, %11, %6
  %.033 = phi i32 [ 0, %11 ], [ 0, %6 ], [ 0, %12 ], [ 1, %20 ], [ 1, %24 ], [ 1, %29 ], [ 0, %48 ], [ 0, %37 ]
  ret i32 %.033
}

; Function Attrs: nounwind uwtable
declare dso_local i32 @XSdPs_Set_Mmc_ExtCsd(ptr noundef, i32 noundef) local_unnamed_addr #2

declare void @usleep(i64 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i8 @XSdPs_ReadReg8(i32 noundef, i8 noundef zeroext) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @XSdPs_WriteReg8(i32 noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i16 @XSdPs_ReadReg16(i32 noundef, i8 noundef zeroext) local_unnamed_addr #1

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 36}
!10 = !{!"", !11, i64 0, !6, i64 36, !6, i64 40, !6, i64 44, !6, i64 48, !7, i64 52, !7, i64 53, !7, i64 54, !7, i64 55, !6, i64 56, !7, i64 60, !7, i64 64, !6, i64 80, !7, i64 84, !6, i64 100, !6, i64 104, !6, i64 108, !6, i64 112, !6, i64 116, !13, i64 120, !12, i64 128, !6, i64 132, !7, i64 136, !6, i64 140}
!11 = !{!"", !12, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !7, i64 32}
!12 = !{!"short", !7, i64 0}
!13 = !{!"long", !7, i64 0}
!14 = !{!10, !7, i64 54}
!15 = !{!10, !6, i64 20}
!16 = !{!10, !7, i64 52}
!17 = !{!10, !6, i64 80}
!18 = !{!10, !7, i64 55}
!19 = !{!10, !6, i64 108}
!20 = !{!10, !6, i64 4}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass