; LLVM IR from tangjz/acm-icpc :: 51nod (1406)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@n = external dso_local global i32, align 4
@x = external dso_local global i32, align 4
@f = external dso_local global [1048576 x i32], align 16

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z4scanRi(ptr noundef nonnull align 4 dereferenceable(4)) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z5printi(i32 noundef) #0

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #2 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  call void @_Z4scanRi(ptr noundef nonnull align 4 dereferenceable(4) @n)
  br label %6

6:                                                ; preds = %10, %0
  %7 = load i32, ptr @n, align 4, !tbaa !5
  %8 = add nsw i32 %7, -1
  store i32 %8, ptr @n, align 4, !tbaa !5
  %9 = icmp ne i32 %7, 0
  br i1 %9, label %10, label %16

10:                                               ; preds = %6
  call void @_Z4scanRi(ptr noundef nonnull align 4 dereferenceable(4) @x)
  %11 = load i32, ptr @x, align 4, !tbaa !5
  %12 = sext i32 %11 to i64
  %13 = getelementptr inbounds [1048576 x i32], ptr @f, i64 0, i64 %12
  %14 = load i32, ptr %13, align 4, !tbaa !5
  %15 = add nsw i32 %14, 1
  store i32 %15, ptr %13, align 4, !tbaa !5
  br label %6, !llvm.loop !9

16:                                               ; preds = %6
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #3
  store i32 0, ptr %2, align 4, !tbaa !5
  br label %17

17:                                               ; preds = %51, %16
  %18 = load i32, ptr %2, align 4, !tbaa !5
  %19 = icmp slt i32 %18, 20
  br i1 %19, label %21, label %20

20:                                               ; preds = %17
  store i32 4, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #3
  br label %54

21:                                               ; preds = %17
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  store i32 0, ptr %4, align 4, !tbaa !5
  br label %22

22:                                               ; preds = %47, %21
  %23 = load i32, ptr %4, align 4, !tbaa !5
  %24 = icmp slt i32 %23, 1048576
  br i1 %24, label %26, label %25

25:                                               ; preds = %22
  store i32 7, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  br label %50

26:                                               ; preds = %22
  %27 = load i32, ptr %4, align 4, !tbaa !5
  %28 = xor i32 %27, -1
  %29 = load i32, ptr %2, align 4, !tbaa !5
  %30 = shl i32 1, %29
  %31 = and i32 %28, %30
  %32 = icmp ne i32 %31, 0
  br i1 %32, label %33, label %46

33:                                               ; preds = %26
  %34 = load i32, ptr %4, align 4, !tbaa !5
  %35 = load i32, ptr %2, align 4, !tbaa !5
  %36 = shl i32 1, %35
  %37 = or i32 %34, %36
  %38 = sext i32 %37 to i64
  %39 = getelementptr inbounds [1048576 x i32], ptr @f, i64 0, i64 %38
  %40 = load i32, ptr %39, align 4, !tbaa !5
  %41 = load i32, ptr %4, align 4, !tbaa !5
  %42 = sext i32 %41 to i64
  %43 = getelementptr inbounds [1048576 x i32], ptr @f, i64 0, i64 %42
  %44 = load i32, ptr %43, align 4, !tbaa !5
  %45 = add nsw i32 %44, %40
  store i32 %45, ptr %43, align 4, !tbaa !5
  br label %46

46:                                               ; preds = %33, %26
  br label %47

47:                                               ; preds = %46
  %48 = load i32, ptr %4, align 4, !tbaa !5
  %49 = add nsw i32 %48, 1
  store i32 %49, ptr %4, align 4, !tbaa !5
  br label %22, !llvm.loop !11

50:                                               ; preds = %25
  br label %51

51:                                               ; preds = %50
  %52 = load i32, ptr %2, align 4, !tbaa !5
  %53 = add nsw i32 %52, 1
  store i32 %53, ptr %2, align 4, !tbaa !5
  br label %17, !llvm.loop !12

54:                                               ; preds = %20
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 0, ptr %5, align 4, !tbaa !5
  br label %55

55:                                               ; preds = %64, %54
  %56 = load i32, ptr %5, align 4, !tbaa !5
  %57 = icmp sle i32 %56, 1000000
  br i1 %57, label %59, label %58

58:                                               ; preds = %55
  store i32 10, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  br label %67

59:                                               ; preds = %55
  %60 = load i32, ptr %5, align 4, !tbaa !5
  %61 = sext i32 %60 to i64
  %62 = getelementptr inbounds [1048576 x i32], ptr @f, i64 0, i64 %61
  %63 = load i32, ptr %62, align 4, !tbaa !5
  call void @_Z5printi(i32 noundef %63)
  br label %64

64:                                               ; preds = %59
  %65 = load i32, ptr %5, align 4, !tbaa !5
  %66 = add nsw i32 %65, 1
  store i32 %66, ptr %5, align 4, !tbaa !5
  br label %55, !llvm.loop !13

67:                                               ; preds = %58
  ret i32 0
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@n = external dso_local global i32, align 4
@x = external dso_local global i32, align 4
@f = external dso_local local_unnamed_addr global [1048576 x i32], align 16

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z4scanRi(ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z5printi(i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() local_unnamed_addr #1 {
  tail call void @_Z4scanRi(ptr noundef nonnull align 4 dereferenceable(4) @n)
  %1 = load i32, ptr @n, align 4, !tbaa !5
  %2 = add nsw i32 %1, -1
  store i32 %2, ptr @n, align 4, !tbaa !5
  %.not17 = icmp eq i32 %1, 0
  br i1 %.not17, label %.preheader15.preheader, label %.lr.ph

.lr.ph:                                           ; preds = %0, %.lr.ph
  tail call void @_Z4scanRi(ptr noundef nonnull align 4 dereferenceable(4) @x)
  %3 = load i32, ptr @x, align 4, !tbaa !5
  %4 = sext i32 %3 to i64
  %5 = getelementptr inbounds [1048576 x i32], ptr @f, i64 0, i64 %4
  %6 = load i32, ptr %5, align 4, !tbaa !5
  %7 = add nsw i32 %6, 1
  store i32 %7, ptr %5, align 4, !tbaa !5
  %8 = load i32, ptr @n, align 4, !tbaa !5
  %9 = add nsw i32 %8, -1
  store i32 %9, ptr @n, align 4, !tbaa !5
  %.not = icmp eq i32 %8, 0
  br i1 %.not, label %.preheader15.preheader, label %.lr.ph, !llvm.loop !9

.preheader15.preheader:                           ; preds = %.lr.ph, %0
  br label %.preheader15

.preheader15:                                     ; preds = %.preheader15.preheader, %11
  %.01319 = phi i32 [ %12, %11 ], [ 0, %.preheader15.preheader ]
  %10 = shl nuw nsw i32 1, %.01319
  br label %13

11:                                               ; preds = %35
  %12 = add nuw nsw i32 %.01319, 1
  %exitcond22.not = icmp eq i32 %12, 20
  br i1 %exitcond22.not, label %.preheader, label %.preheader15, !llvm.loop !11

13:                                               ; preds = %35, %.preheader15
  %indvars.iv = phi i64 [ 0, %.preheader15 ], [ %indvars.iv.next.1, %35 ]
  %14 = trunc nuw nsw i64 %indvars.iv to i32
  %15 = and i32 %10, %14
  %.not14.not = icmp eq i32 %15, 0
  br i1 %.not14.not, label %16, label %24

16:                                               ; preds = %13
  %17 = or i32 %10, %14
  %18 = zext nneg i32 %17 to i64
  %19 = getelementptr inbounds [1048576 x i32], ptr @f, i64 0, i64 %18
  %20 = load i32, ptr %19, align 4, !tbaa !5
  %21 = getelementptr inbounds [1048576 x i32], ptr @f, i64 0, i64 %indvars.iv
  %22 = load i32, ptr %21, align 8, !tbaa !5
  %23 = add nsw i32 %22, %20
  store i32 %23, ptr %21, align 8, !tbaa !5
  br label %24

24:                                               ; preds = %13, %16
  %indvars.iv.next = or disjoint i64 %indvars.iv, 1
  %25 = trunc nuw nsw i64 %indvars.iv.next to i32
  %26 = and i32 %10, %25
  %.not14.not.1 = icmp eq i32 %26, 0
  br i1 %.not14.not.1, label %27, label %35

27:                                               ; preds = %24
  %28 = or i32 %10, %25
  %29 = zext nneg i32 %28 to i64
  %30 = getelementptr inbounds [1048576 x i32], ptr @f, i64 0, i64 %29
  %31 = load i32, ptr %30, align 4, !tbaa !5
  %32 = getelementptr inbounds [1048576 x i32], ptr @f, i64 0, i64 %indvars.iv.next
  %33 = load i32, ptr %32, align 4, !tbaa !5
  %34 = add nsw i32 %33, %31
  store i32 %34, ptr %32, align 4, !tbaa !5
  br label %35

35:                                               ; preds = %27, %24
  %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2
  %exitcond.not.1 = icmp eq i64 %indvars.iv.next.1, 1048576
  br i1 %exitcond.not.1, label %11, label %13, !llvm.loop !12

36:                                               ; preds = %.preheader
  ret i32 0

.preheader:                                       ; preds = %11, %.preheader
  %indvars.iv23 = phi i64 [ %indvars.iv.next24, %.preheader ], [ 0, %11 ]
  %37 = getelementptr inbounds [1048576 x i32], ptr @f, i64 0, i64 %indvars.iv23
  %38 = load i32, ptr %37, align 4, !tbaa !5
  tail call void @_Z5printi(i32 noundef %38)
  %indvars.iv.next24 = add nuw nsw i64 %indvars.iv23, 1
  %exitcond26.not = icmp eq i64 %indvars.iv.next24, 1000001
  br i1 %exitcond26.not, label %36, label %.preheader, !llvm.loop !13
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass