; LLVM IR from FrancesoM/Bisc8FX :: sdk_projects/bisc8_platform/zynq_fsbl (main)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@FlashReadBaseAddress = external dso_local global i32, align 4
@LinearBootDeviceFlag = external dso_local global i8, align 1
@DcfgInstPtr = external global ptr, align 8
@PcapCtrlRegVal = external dso_local global i32, align 4
@MoveImage = external global ptr, align 8
@.str = external hidden unnamed_addr constant [9 x i8], align 1
@SystemInitFlag = external dso_local global i8, align 1

; Function Attrs: nounwind uwtable
define dso_local i32 @main() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #4
  store i32 0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  store i32 0, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  store i32 0, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  %6 = call i32 (...) @ps7_init()
  store i32 %6, ptr %4, align 4, !tbaa !5
  %7 = load i32, ptr %4, align 4, !tbaa !5
  %8 = icmp ne i32 %7, 0
  br i1 %8, label %9, label %10

9:                                                ; preds = %0
  call void @OutputStatus(i32 noundef 40978)
  call void @FsblHookFallback()
  br label %10

10:                                               ; preds = %9, %0
  call void @Xil_Out32(i64 noundef 4160749576, i32 noundef -552739059)
  call void @Xil_DCacheFlush()
  call void @Xil_DCacheDisable()
  call void @RegisterHandlers()
  %11 = call i32 @DDRInitCheck()
  store i32 %11, ptr %4, align 4, !tbaa !5
  %12 = load i32, ptr %4, align 4, !tbaa !5
  %13 = zext i32 %12 to i64
  %14 = icmp eq i64 %13, 1
  br i1 %14, label %15, label %16

15:                                               ; preds = %10
  call void @OutputStatus(i32 noundef 40967)
  call void @FsblHookFallback()
  br label %16

16:                                               ; preds = %15, %10
  %17 = call i32 @InitPcap()
  store i32 %17, ptr %4, align 4, !tbaa !5
  %18 = load i32, ptr %4, align 4, !tbaa !5
  %19 = zext i32 %18 to i64
  %20 = icmp eq i64 %19, 1
  br i1 %20, label %21, label %22

21:                                               ; preds = %16
  call void @OutputStatus(i32 noundef 40962)
  call void @FsblHookFallback()
  br label %22

22:                                               ; preds = %21, %16
  call void @GetSiliconVersion()
  %23 = load ptr, ptr @DcfgInstPtr, align 8, !tbaa !9
  %24 = call i32 @XDcfg_GetControlRegister(ptr noundef %23)
  store i32 %24, ptr @PcapCtrlRegVal, align 4, !tbaa !5
  %25 = load i32, ptr @PcapCtrlRegVal, align 4, !tbaa !5
  %26 = and i32 %25, 4096
  %27 = icmp ne i32 %26, 0
  br i1 %27, label %28, label %29

28:                                               ; preds = %22
  br label %29

29:                                               ; preds = %28, %22
  call void @MarkFSBLIn()
  %30 = call i32 @Xil_In32(i64 noundef 4160750172)
  store i32 %30, ptr %2, align 4, !tbaa !5
  %31 = load i32, ptr %2, align 4, !tbaa !5
  %32 = and i32 %31, 7
  store i32 %32, ptr %2, align 4, !tbaa !5
  %33 = load i32, ptr %2, align 4, !tbaa !5
  %34 = icmp eq i32 %33, 1
  br i1 %34, label %35, label %37

35:                                               ; preds = %29
  %36 = call i32 @InitQspi()
  store ptr @QspiAccess, ptr @MoveImage, align 8, !tbaa !9
  br label %77

37:                                               ; preds = %29
  %38 = load i32, ptr %2, align 4, !tbaa !5
  %39 = icmp eq i32 %38, 2
  br i1 %39, label %40, label %41

40:                                               ; preds = %37
  call void @InitNor()
  store ptr @NorAccess, ptr @MoveImage, align 8, !tbaa !9
  br label %76

41:                                               ; preds = %37
  %42 = load i32, ptr %2, align 4, !tbaa !5
  %43 = icmp eq i32 %42, 5
  br i1 %43, label %44, label %51

44:                                               ; preds = %41
  %45 = call i32 @InitSD(ptr noundef @.str)
  store i32 %45, ptr %4, align 4, !tbaa !5
  %46 = load i32, ptr %4, align 4, !tbaa !5
  %47 = zext i32 %46 to i64
  %48 = icmp ne i64 %47, 0
  br i1 %48, label %49, label %50

49:                                               ; preds = %44
  call void @OutputStatus(i32 noundef 40969)
  call void @FsblFallback()
  br label %50

50:                                               ; preds = %49, %44
  store ptr @SDAccess, ptr @MoveImage, align 8, !tbaa !9
  br label %75

51:                                               ; preds = %41
  %52 = load i32, ptr %2, align 4, !tbaa !5
  %53 = icmp eq i32 %52, 6
  br i1 %53, label %54, label %61

54:                                               ; preds = %51
  %55 = call i32 @InitSD(ptr noundef @.str)
  store i32 %55, ptr %4, align 4, !tbaa !5
  %56 = load i32, ptr %4, align 4, !tbaa !5
  %57 = zext i32 %56 to i64
  %58 = icmp ne i64 %57, 0
  br i1 %58, label %59, label %60

59:                                               ; preds = %54
  call void @OutputStatus(i32 noundef 40969)
  call void @FsblFallback()
  br label %60

60:                                               ; preds = %59, %54
  store ptr @SDAccess, ptr @MoveImage, align 8, !tbaa !9
  br label %74

61:                                               ; preds = %51
  %62 = load i32, ptr %2, align 4, !tbaa !5
  %63 = icmp eq i32 %62, 0
  br i1 %63, label %64, label %72

64:                                               ; preds = %61
  %65 = call i32 @Xil_In32(i64 noundef 4160778252)
  store i32 %65, ptr %5, align 4, !tbaa !5
  %66 = load i32, ptr %5, align 4, !tbaa !5
  %67 = and i32 %66, 4
  %68 = icmp ne i32 %67, 0
  br i1 %68, label %69, label %71

69:                                               ; preds = %64
  %70 = call i32 (...) @ps7_post_config()
  call void @Xil_Out32(i64 noundef 4160749576, i32 noundef -552739059)
  br label %71

71:                                               ; preds = %69, %64
  call void @ClearFSBLIn()
  call void @Xil_Out32(i64 noundef 4160749572, i32 noundef 1987802747)
  call void (...) @FsblHandoffJtagExit()
  br label %73

72:                                               ; preds = %61
  call void @OutputStatus(i32 noundef 40960)
  call void @FsblFallback()
  br label %73

73:                                               ; preds = %72, %71
  br label %74

74:                                               ; preds = %73, %60
  br label %75

75:                                               ; preds = %74, %50
  br label %76

76:                                               ; preds = %75, %40
  br label %77

77:                                               ; preds = %76, %35
  %78 = load i32, ptr @FlashReadBaseAddress, align 4, !tbaa !5
  %79 = icmp ne i32 %78, -67108864
  br i1 %79, label %80, label %90

80:                                               ; preds = %77
  %81 = load i32, ptr @FlashReadBaseAddress, align 4, !tbaa !5
  %82 = icmp ne i32 %81, -520093696
  br i1 %82, label %83, label %90

83:                                               ; preds = %80
  %84 = load i32, ptr @FlashReadBaseAddress, align 4, !tbaa !5
  %85 = icmp ne i32 %84, -503316480
  br i1 %85, label %86, label %90

86:                                               ; preds = %83
  %87 = load i32, ptr @FlashReadBaseAddress, align 4, !tbaa !5
  %88 = icmp ne i32 %87, -535822336
  br i1 %88, label %89, label %90

89:                                               ; preds = %86
  call void @OutputStatus(i32 noundef 40966)
  call void @FsblFallback()
  br label %90

90:                                               ; preds = %89, %86, %83, %80, %77
  %91 = load i32, ptr @FlashReadBaseAddress, align 4, !tbaa !5
  %92 = icmp eq i32 %91, -503316480
  br i1 %92, label %93, label %94

93:                                               ; preds = %90
  store i8 1, ptr @LinearBootDeviceFlag, align 1, !tbaa !11
  br label %94

94:                                               ; preds = %93, %90
  store i8 1, ptr @SystemInitFlag, align 1, !tbaa !11
  %95 = call i32 @LoadBootImage()
  store i32 %95, ptr %3, align 4, !tbaa !5
  %96 = load i32, ptr %3, align 4, !tbaa !5
  call void @FsblHandoff(i32 noundef %96)
  %97 = load i32, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #4
  ret i32 %97
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @ps7_init(...) #2

; Function Attrs: nounwind uwtable
declare dso_local void @OutputStatus(i32 noundef) #0

declare void @FsblHookFallback() #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @Xil_Out32(i64 noundef, i32 noundef) #3

declare void @Xil_DCacheFlush() #2

declare void @Xil_DCacheDisable() #2

; Function Attrs: nounwind uwtable
declare hidden void @RegisterHandlers() #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @DDRInitCheck() #0

declare i32 @InitPcap() #2

; Function Attrs: nounwind uwtable
declare dso_local void @GetSiliconVersion() #0

declare i32 @XDcfg_GetControlRegister(ptr noundef) #2

; Function Attrs: nounwind uwtable
declare dso_local void @MarkFSBLIn() #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) #3

declare i32 @InitQspi() #2

declare i32 @QspiAccess(i32 noundef, i32 noundef, i32 noundef) #2

declare void @InitNor() #2

declare i32 @NorAccess(i32 noundef, i32 noundef, i32 noundef) #2

declare i32 @InitSD(ptr noundef) #2

; Function Attrs: nounwind uwtable
declare dso_local void @FsblFallback() #0

declare i32 @SDAccess(i32 noundef, i32 noundef, i32 noundef) #2

declare i32 @ps7_post_config(...) #2

; Function Attrs: nounwind uwtable
declare dso_local void @ClearFSBLIn() #0

declare void @FsblHandoffJtagExit(...) #2

declare i32 @LoadBootImage() #2

; Function Attrs: nounwind uwtable
declare dso_local void @FsblHandoff(i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@FlashReadBaseAddress = external dso_local local_unnamed_addr global i32, align 4
@LinearBootDeviceFlag = external dso_local local_unnamed_addr global i8, align 1
@DcfgInstPtr = external local_unnamed_addr global ptr, align 8
@PcapCtrlRegVal = external dso_local local_unnamed_addr global i32, align 4
@MoveImage = external local_unnamed_addr global ptr, align 8
@.str = external hidden unnamed_addr constant [9 x i8], align 1
@SystemInitFlag = external dso_local local_unnamed_addr global i8, align 1

; Function Attrs: nounwind uwtable
define dso_local i32 @main() local_unnamed_addr #0 {
  %1 = tail call i32 (...) @ps7_init() #3
  %.not = icmp eq i32 %1, 0
  br i1 %.not, label %3, label %2

2:                                                ; preds = %0
  tail call void @OutputStatus(i32 noundef 40978)
  tail call void @FsblHookFallback() #3
  br label %3

3:                                                ; preds = %2, %0
  tail call void @Xil_Out32(i64 noundef 4160749576, i32 noundef -552739059)
  tail call void @Xil_DCacheFlush() #3
  tail call void @Xil_DCacheDisable() #3
  tail call void @RegisterHandlers()
  %4 = tail call i32 @DDRInitCheck()
  %5 = icmp eq i32 %4, 1
  br i1 %5, label %6, label %7

6:                                                ; preds = %3
  tail call void @OutputStatus(i32 noundef 40967)
  tail call void @FsblHookFallback() #3
  br label %7

7:                                                ; preds = %6, %3
  %8 = tail call i32 @InitPcap() #3
  %9 = icmp eq i32 %8, 1
  br i1 %9, label %10, label %11

10:                                               ; preds = %7
  tail call void @OutputStatus(i32 noundef 40962)
  tail call void @FsblHookFallback() #3
  br label %11

11:                                               ; preds = %10, %7
  tail call void @GetSiliconVersion()
  %12 = load ptr, ptr @DcfgInstPtr, align 8, !tbaa !5
  %13 = tail call i32 @XDcfg_GetControlRegister(ptr noundef %12) #3
  store i32 %13, ptr @PcapCtrlRegVal, align 4, !tbaa !9
  tail call void @MarkFSBLIn()
  %14 = tail call i32 @Xil_In32(i64 noundef 4160750172)
  %15 = and i32 %14, 7
  switch i32 %15, label %33 [
    i32 1, label %16
    i32 2, label %18
    i32 5, label %19
    i32 6, label %23
    i32 0, label %27
  ]

16:                                               ; preds = %11
  %17 = tail call i32 @InitQspi() #3
  store ptr @QspiAccess, ptr @MoveImage, align 8, !tbaa !5
  br label %34

18:                                               ; preds = %11
  tail call void @InitNor() #3
  store ptr @NorAccess, ptr @MoveImage, align 8, !tbaa !5
  br label %34

19:                                               ; preds = %11
  %20 = tail call i32 @InitSD(ptr noundef nonnull @.str) #3
  %.not22 = icmp eq i32 %20, 0
  br i1 %.not22, label %22, label %21

21:                                               ; preds = %19
  tail call void @OutputStatus(i32 noundef 40969)
  tail call void @FsblFallback()
  br label %22

22:                                               ; preds = %21, %19
  store ptr @SDAccess, ptr @MoveImage, align 8, !tbaa !5
  br label %34

23:                                               ; preds = %11
  %24 = tail call i32 @InitSD(ptr noundef nonnull @.str) #3
  %.not21 = icmp eq i32 %24, 0
  br i1 %.not21, label %26, label %25

25:                                               ; preds = %23
  tail call void @OutputStatus(i32 noundef 40969)
  tail call void @FsblFallback()
  br label %26

26:                                               ; preds = %25, %23
  store ptr @SDAccess, ptr @MoveImage, align 8, !tbaa !5
  br label %34

27:                                               ; preds = %11
  %28 = tail call i32 @Xil_In32(i64 noundef 4160778252)
  %29 = and i32 %28, 4
  %.not20 = icmp eq i32 %29, 0
  br i1 %.not20, label %32, label %30

30:                                               ; preds = %27
  %31 = tail call i32 (...) @ps7_post_config() #3
  tail call void @Xil_Out32(i64 noundef 4160749576, i32 noundef -552739059)
  br label %32

32:                                               ; preds = %30, %27
  tail call void @ClearFSBLIn()
  tail call void @Xil_Out32(i64 noundef 4160749572, i32 noundef 1987802747)
  tail call void (...) @FsblHandoffJtagExit() #3
  br label %34

33:                                               ; preds = %11
  tail call void @OutputStatus(i32 noundef 40960)
  tail call void @FsblFallback()
  br label %34

34:                                               ; preds = %18, %26, %33, %32, %22, %16
  %.0 = phi i32 [ %8, %16 ], [ %8, %18 ], [ %20, %22 ], [ %24, %26 ], [ %8, %32 ], [ %8, %33 ]
  %35 = load i32, ptr @FlashReadBaseAddress, align 4
  switch i32 %35, label %36 [
    i32 -67108864, label %37
    i32 -503316480, label %37
    i32 -520093696, label %37
    i32 -535822336, label %37
  ]

36:                                               ; preds = %34
  tail call void @OutputStatus(i32 noundef 40966)
  tail call void @FsblFallback()
  %.pr = load i32, ptr @FlashReadBaseAddress, align 4, !tbaa !9
  br label %37

37:                                               ; preds = %34, %34, %34, %34, %36
  %38 = phi i32 [ %35, %34 ], [ %35, %34 ], [ %35, %34 ], [ %35, %34 ], [ %.pr, %36 ]
  %39 = icmp eq i32 %38, -503316480
  br i1 %39, label %40, label %41

40:                                               ; preds = %37
  store i8 1, ptr @LinearBootDeviceFlag, align 1, !tbaa !11
  br label %41

41:                                               ; preds = %40, %37
  store i8 1, ptr @SystemInitFlag, align 1, !tbaa !11
  %42 = tail call i32 @LoadBootImage() #3
  tail call void @FsblHandoff(i32 noundef %42)
  ret i32 %.0
}

declare i32 @ps7_init(...) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local void @OutputStatus(i32 noundef) local_unnamed_addr #0

declare void @FsblHookFallback() local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @Xil_Out32(i64 noundef, i32 noundef) local_unnamed_addr #2

declare void @Xil_DCacheFlush() local_unnamed_addr #1

declare void @Xil_DCacheDisable() local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare hidden void @RegisterHandlers() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @DDRInitCheck() local_unnamed_addr #0

declare i32 @InitPcap() local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local void @GetSiliconVersion() local_unnamed_addr #0

declare i32 @XDcfg_GetControlRegister(ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local void @MarkFSBLIn() local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) local_unnamed_addr #2

declare i32 @InitQspi() local_unnamed_addr #1

declare i32 @QspiAccess(i32 noundef, i32 noundef, i32 noundef) #1

declare void @InitNor() local_unnamed_addr #1

declare i32 @NorAccess(i32 noundef, i32 noundef, i32 noundef) #1

declare i32 @InitSD(ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local void @FsblFallback() local_unnamed_addr #0

declare i32 @SDAccess(i32 noundef, i32 noundef, i32 noundef) #1

declare i32 @ps7_post_config(...) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local void @ClearFSBLIn() local_unnamed_addr #0

declare void @FsblHandoffJtagExit(...) local_unnamed_addr #1

declare i32 @LoadBootImage() local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local void @FsblHandoff(i32 noundef) local_unnamed_addr #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,SROAPass,SimplifyCFGPass,TailCallElimPass