; LLVM IR from FrancesoM/Bisc8FX :: sdk_projects/bisc8_platform/ps7_cortexa9_0/standalone_domain/bsp/ps7_cortexa9_0_ (SleepPerfCounter)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @Xpm_SleepPerfCounter(i32 noundef %0, i64 noundef %1) #1 {
  %3 = alloca i32, align 4
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i16, align 2
  %8 = alloca i16, align 2
  %9 = alloca i16, align 2
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  %13 = alloca i64, align 8
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i64 %1, ptr %4, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #2
  store i64 0, ptr %5, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #2
  store i64 0, ptr %6, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 2, ptr %7) #2
  store i16 0, ptr %7, align 2, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 2, ptr %8) #2
  store i16 0, ptr %8, align 2, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 2, ptr %9) #2
  store i16 0, ptr %9, align 2, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #2
  store i64 0, ptr %10, align 8, !tbaa !9
  %14 = call i64 asm sideeffect "mrs ${0:x}, XREG_CP15_PERF_CYCLE_COUNTER", "=r,~{dirflag},~{fpsr},~{flags}"() #2, !srcloc !13
  store i64 %14, ptr %10, align 8, !tbaa !9
  %15 = load i64, ptr %10, align 8, !tbaa !9
  store i64 %15, ptr %11, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #2
  %16 = load i64, ptr %11, align 8, !tbaa !9
  %17 = trunc i64 %16 to i16
  store i16 %17, ptr %8, align 2, !tbaa !11
  %18 = load i16, ptr %8, align 2, !tbaa !11
  %19 = zext i16 %18 to i64
  %20 = load i32, ptr %3, align 4, !tbaa !5
  %21 = zext i32 %20 to i64
  %22 = load i64, ptr %4, align 8, !tbaa !9
  %23 = mul i64 %21, %22
  %24 = add i64 %19, %23
  store i64 %24, ptr %5, align 8, !tbaa !9
  br label %25

25:                                               ; preds = %46, %2
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #2
  store i64 0, ptr %12, align 8, !tbaa !9
  %26 = call i64 asm sideeffect "mrs ${0:x}, XREG_CP15_PERF_CYCLE_COUNTER", "=r,~{dirflag},~{fpsr},~{flags}"() #2, !srcloc !14
  store i64 %26, ptr %12, align 8, !tbaa !9
  %27 = load i64, ptr %12, align 8, !tbaa !9
  store i64 %27, ptr %13, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #2
  %28 = load i64, ptr %13, align 8, !tbaa !9
  %29 = trunc i64 %28 to i16
  store i16 %29, ptr %9, align 2, !tbaa !11
  %30 = load i16, ptr %9, align 2, !tbaa !11
  %31 = zext i16 %30 to i32
  %32 = load i16, ptr %8, align 2, !tbaa !11
  %33 = zext i16 %32 to i32
  %34 = icmp slt i32 %31, %33
  br i1 %34, label %35, label %38

35:                                               ; preds = %25
  %36 = load i16, ptr %7, align 2, !tbaa !11
  %37 = add i16 %36, 1
  store i16 %37, ptr %7, align 2, !tbaa !11
  br label %38

38:                                               ; preds = %35, %25
  %39 = load i16, ptr %9, align 2, !tbaa !11
  store i16 %39, ptr %8, align 2, !tbaa !11
  %40 = load i16, ptr %7, align 2, !tbaa !11
  %41 = zext i16 %40 to i64
  %42 = shl i64 %41, 16
  %43 = load i16, ptr %9, align 2, !tbaa !11
  %44 = zext i16 %43 to i64
  %45 = or i64 %42, %44
  store i64 %45, ptr %6, align 8, !tbaa !9
  br label %46

46:                                               ; preds = %38
  %47 = load i64, ptr %6, align 8, !tbaa !9
  %48 = load i64, ptr %5, align 8, !tbaa !9
  %49 = icmp ult i64 %47, %48
  br i1 %49, label %25, label %50, !llvm.loop !15

50:                                               ; preds = %46
  call void @llvm.lifetime.end.p0(i64 2, ptr %9) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #2
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"short", !7, i64 0}
!13 = !{i64 2147838318}
!14 = !{i64 2147838496}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @Xpm_SleepPerfCounter(i32 noundef %0, i64 noundef %1) local_unnamed_addr #0 {
  %3 = tail call i64 asm sideeffect "mrs ${0:x}, XREG_CP15_PERF_CYCLE_COUNTER", "=r,~{dirflag},~{fpsr},~{flags}"() #1, !srcloc !5
  %4 = and i64 %3, 65535
  %5 = zext i32 %0 to i64
  %6 = mul i64 %5, %1
  %7 = add i64 %4, %6
  br label %8

8:                                                ; preds = %8, %2
  %.015.in = phi i64 [ %3, %2 ], [ %9, %8 ]
  %.0 = phi i16 [ 0, %2 ], [ %spec.select, %8 ]
  %.015 = trunc i64 %.015.in to i32
  %9 = tail call i64 asm sideeffect "mrs ${0:x}, XREG_CP15_PERF_CYCLE_COUNTER", "=r,~{dirflag},~{fpsr},~{flags}"() #1, !srcloc !6
  %10 = trunc i64 %9 to i32
  %11 = and i32 %10, 65535
  %12 = and i32 %.015, 65535
  %13 = icmp ult i32 %11, %12
  %14 = zext i1 %13 to i16
  %spec.select = add i16 %.0, %14
  %15 = zext i16 %spec.select to i64
  %16 = shl nuw nsw i64 %15, 16
  %17 = and i64 %9, 65535
  %18 = or disjoint i64 %16, %17
  %19 = icmp ult i64 %18, %7
  br i1 %19, label %8, label %20, !llvm.loop !7

20:                                               ; preds = %8
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{i64 2147838318}
!6 = !{i64 2147838496}
!7 = distinct !{!7, !8}
!8 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass