; LLVM IR from FrancesoM/Bisc8FX :: sdk_projects/bisc8_platform/ps7_cortexa9_0/standalone_domain/bsp/ps7_cortexa9_0_ (EmmcModeInit)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XSdPs = type { %struct.XSdPs_Config, i32, i32, i32, i32, i8, i8, i8, i8, i32, i8, [4 x i32], i32, [4 x i32], i32, i32, i32, i32, i32, i64, i16, i32, i8, i32 }
%struct.XSdPs_Config = type { i16, i32, i32, i32, i32, i32, i32, i32, i8 }

@XSdPs_EmmcModeInit.ExtCsd = external hidden global [512 x i8], align 32

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @XSdPs_Change_BusWidth(ptr noundef) #1

declare i32 @XSdPs_Change_BusSpeed(ptr noundef) #1

declare i32 @XSdPs_Get_Mmc_ExtCsd(ptr noundef, ptr noundef) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @XSdPs_EmmcModeInit(ptr noundef %0) #2 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  %4 = load ptr, ptr %2, align 8, !tbaa !5
  %5 = getelementptr inbounds %struct.XSdPs, ptr %4, i32 0, i32 7
  %6 = load i8, ptr %5, align 2, !tbaa !9
  %7 = zext i8 %6 to i32
  %8 = icmp eq i32 %7, 2
  br i1 %8, label %9, label %18

9:                                                ; preds = %1
  %10 = load ptr, ptr %2, align 8, !tbaa !5
  %11 = getelementptr inbounds %struct.XSdPs, ptr %10, i32 0, i32 0
  %12 = getelementptr inbounds %struct.XSdPs_Config, ptr %11, i32 0, i32 5
  %13 = load i32, ptr %12, align 4, !tbaa !15
  %14 = icmp eq i32 %13, 8
  br i1 %14, label %15, label %18

15:                                               ; preds = %9
  %16 = load ptr, ptr %2, align 8, !tbaa !5
  %17 = getelementptr inbounds %struct.XSdPs, ptr %16, i32 0, i32 8
  store i8 3, ptr %17, align 1, !tbaa !16
  br label %31

18:                                               ; preds = %9, %1
  %19 = load ptr, ptr %2, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.XSdPs, ptr %19, i32 0, i32 0
  %21 = getelementptr inbounds %struct.XSdPs_Config, ptr %20, i32 0, i32 5
  %22 = load i32, ptr %21, align 4, !tbaa !15
  %23 = icmp eq i32 %22, 4
  br i1 %23, label %24, label %27

24:                                               ; preds = %18
  %25 = load ptr, ptr %2, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.XSdPs, ptr %25, i32 0, i32 8
  store i8 2, ptr %26, align 1, !tbaa !16
  br label %30

27:                                               ; preds = %18
  %28 = load ptr, ptr %2, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.XSdPs, ptr %28, i32 0, i32 8
  store i8 1, ptr %29, align 1, !tbaa !16
  br label %30

30:                                               ; preds = %27, %24
  br label %31

31:                                               ; preds = %30, %15
  %32 = load ptr, ptr %2, align 8, !tbaa !5
  %33 = call i32 @XSdPs_Change_BusWidth(ptr noundef %32)
  store i32 %33, ptr %3, align 4, !tbaa !17
  %34 = load i32, ptr %3, align 4, !tbaa !17
  %35 = sext i32 %34 to i64
  %36 = icmp ne i64 %35, 0
  br i1 %36, label %37, label %38

37:                                               ; preds = %31
  store i32 1, ptr %3, align 4, !tbaa !17
  br label %117

38:                                               ; preds = %31
  %39 = load ptr, ptr %2, align 8, !tbaa !5
  %40 = call i32 @XSdPs_Get_Mmc_ExtCsd(ptr noundef %39, ptr noundef @XSdPs_EmmcModeInit.ExtCsd)
  store i32 %40, ptr %3, align 4, !tbaa !17
  %41 = load i32, ptr %3, align 4, !tbaa !17
  %42 = sext i32 %41 to i64
  %43 = icmp ne i64 %42, 0
  br i1 %43, label %44, label %45

44:                                               ; preds = %38
  store i32 1, ptr %3, align 4, !tbaa !17
  br label %117

45:                                               ; preds = %38
  %46 = load i8, ptr getelementptr inbounds ([512 x i8], ptr @XSdPs_EmmcModeInit.ExtCsd, i64 0, i64 215), align 1, !tbaa !18
  %47 = zext i8 %46 to i32
  %48 = shl i32 %47, 24
  %49 = load ptr, ptr %2, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.XSdPs, ptr %49, i32 0, i32 14
  store i32 %48, ptr %50, align 4, !tbaa !19
  %51 = load i8, ptr getelementptr inbounds ([512 x i8], ptr @XSdPs_EmmcModeInit.ExtCsd, i64 0, i64 214), align 2, !tbaa !18
  %52 = zext i8 %51 to i32
  %53 = shl i32 %52, 16
  %54 = load ptr, ptr %2, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.XSdPs, ptr %54, i32 0, i32 14
  %56 = load i32, ptr %55, align 4, !tbaa !19
  %57 = or i32 %56, %53
  store i32 %57, ptr %55, align 4, !tbaa !19
  %58 = load i8, ptr getelementptr inbounds ([512 x i8], ptr @XSdPs_EmmcModeInit.ExtCsd, i64 0, i64 213), align 1, !tbaa !18
  %59 = zext i8 %58 to i32
  %60 = shl i32 %59, 8
  %61 = load ptr, ptr %2, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.XSdPs, ptr %61, i32 0, i32 14
  %63 = load i32, ptr %62, align 4, !tbaa !19
  %64 = or i32 %63, %60
  store i32 %64, ptr %62, align 4, !tbaa !19
  %65 = load i8, ptr getelementptr inbounds ([512 x i8], ptr @XSdPs_EmmcModeInit.ExtCsd, i64 0, i64 212), align 4, !tbaa !18
  %66 = zext i8 %65 to i32
  %67 = load ptr, ptr %2, align 8, !tbaa !5
  %68 = getelementptr inbounds %struct.XSdPs, ptr %67, i32 0, i32 14
  %69 = load i32, ptr %68, align 4, !tbaa !19
  %70 = or i32 %69, %66
  store i32 %70, ptr %68, align 4, !tbaa !19
  %71 = load ptr, ptr %2, align 8, !tbaa !5
  call void @XSdPs_IdentifyEmmcMode(ptr noundef %71, ptr noundef @XSdPs_EmmcModeInit.ExtCsd)
  %72 = load ptr, ptr %2, align 8, !tbaa !5
  %73 = getelementptr inbounds %struct.XSdPs, ptr %72, i32 0, i32 16
  %74 = load i32, ptr %73, align 4, !tbaa !20
  %75 = icmp ne i32 %74, 6
  br i1 %75, label %76, label %104

76:                                               ; preds = %45
  %77 = load ptr, ptr %2, align 8, !tbaa !5
  %78 = call i32 @XSdPs_Change_BusSpeed(ptr noundef %77)
  store i32 %78, ptr %3, align 4, !tbaa !17
  %79 = load i32, ptr %3, align 4, !tbaa !17
  %80 = sext i32 %79 to i64
  %81 = icmp ne i64 %80, 0
  br i1 %81, label %82, label %83

82:                                               ; preds = %76
  store i32 1, ptr %3, align 4, !tbaa !17
  br label %117

83:                                               ; preds = %76
  %84 = load ptr, ptr %2, align 8, !tbaa !5
  %85 = call i32 @XSdPs_CheckEmmcTiming(ptr noundef %84, ptr noundef @XSdPs_EmmcModeInit.ExtCsd)
  store i32 %85, ptr %3, align 4, !tbaa !17
  %86 = load i32, ptr %3, align 4, !tbaa !17
  %87 = sext i32 %86 to i64
  %88 = icmp ne i64 %87, 0
  br i1 %88, label %89, label %90

89:                                               ; preds = %83
  store i32 1, ptr %3, align 4, !tbaa !17
  br label %117

90:                                               ; preds = %83
  %91 = load ptr, ptr %2, align 8, !tbaa !5
  %92 = getelementptr inbounds %struct.XSdPs, ptr %91, i32 0, i32 16
  %93 = load i32, ptr %92, align 4, !tbaa !20
  %94 = icmp eq i32 %93, 4
  br i1 %94, label %95, label %103

95:                                               ; preds = %90
  %96 = load ptr, ptr %2, align 8, !tbaa !5
  %97 = call i32 @XSdPs_Change_BusWidth(ptr noundef %96)
  store i32 %97, ptr %3, align 4, !tbaa !17
  %98 = load i32, ptr %3, align 4, !tbaa !17
  %99 = sext i32 %98 to i64
  %100 = icmp ne i64 %99, 0
  br i1 %100, label %101, label %102

101:                                              ; preds = %95
  store i32 1, ptr %3, align 4, !tbaa !17
  br label %117

102:                                              ; preds = %95
  br label %103

103:                                              ; preds = %102, %90
  br label %104

104:                                              ; preds = %103, %45
  %105 = load i8, ptr getelementptr inbounds ([512 x i8], ptr @XSdPs_EmmcModeInit.ExtCsd, i64 0, i64 162), align 2, !tbaa !18
  %106 = zext i8 %105 to i32
  %107 = icmp eq i32 %106, 0
  br i1 %107, label %108, label %116

108:                                              ; preds = %104
  %109 = load ptr, ptr %2, align 8, !tbaa !5
  %110 = call i32 @XSdPs_Set_Mmc_ExtCsd(ptr noundef %109, i32 noundef 60948736)
  store i32 %110, ptr %3, align 4, !tbaa !17
  %111 = load i32, ptr %3, align 4, !tbaa !17
  %112 = sext i32 %111 to i64
  %113 = icmp ne i64 %112, 0
  br i1 %113, label %114, label %115

114:                                              ; preds = %108
  store i32 1, ptr %3, align 4, !tbaa !17
  br label %117

115:                                              ; preds = %108
  br label %116

116:                                              ; preds = %115, %104
  store i32 0, ptr %3, align 4, !tbaa !17
  br label %117

117:                                              ; preds = %116, %114, %101, %89, %82, %44, %37
  %118 = load i32, ptr %3, align 4, !tbaa !17
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  ret i32 %118
}

declare void @XSdPs_IdentifyEmmcMode(ptr noundef, ptr noundef) #1

declare i32 @XSdPs_CheckEmmcTiming(ptr noundef, ptr noundef) #1

declare i32 @XSdPs_Set_Mmc_ExtCsd(ptr noundef, i32 noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !7, i64 54}
!10 = !{!"", !11, i64 0, !13, i64 36, !13, i64 40, !13, i64 44, !13, i64 48, !7, i64 52, !7, i64 53, !7, i64 54, !7, i64 55, !13, i64 56, !7, i64 60, !7, i64 64, !13, i64 80, !7, i64 84, !13, i64 100, !13, i64 104, !13, i64 108, !13, i64 112, !13, i64 116, !14, i64 120, !12, i64 128, !13, i64 132, !7, i64 136, !13, i64 140}
!11 = !{!"", !12, i64 0, !13, i64 4, !13, i64 8, !13, i64 12, !13, i64 16, !13, i64 20, !13, i64 24, !13, i64 28, !7, i64 32}
!12 = !{!"short", !7, i64 0}
!13 = !{!"int", !7, i64 0}
!14 = !{!"long", !7, i64 0}
!15 = !{!10, !13, i64 20}
!16 = !{!10, !7, i64 55}
!17 = !{!13, !13, i64 0}
!18 = !{!7, !7, i64 0}
!19 = !{!10, !13, i64 100}
!20 = !{!10, !13, i64 108}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@XSdPs_EmmcModeInit.ExtCsd = external hidden global [512 x i8], align 32

declare i32 @XSdPs_Change_BusWidth(ptr noundef) local_unnamed_addr #0

declare i32 @XSdPs_Change_BusSpeed(ptr noundef) local_unnamed_addr #0

declare i32 @XSdPs_Get_Mmc_ExtCsd(ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @XSdPs_EmmcModeInit(ptr noundef %0) local_unnamed_addr #1 {
  %2 = getelementptr inbounds i8, ptr %0, i64 54
  %3 = load i8, ptr %2, align 2, !tbaa !5
  %4 = icmp eq i8 %3, 2
  %5 = getelementptr inbounds i8, ptr %0, i64 20
  %6 = load i32, ptr %5, align 4, !tbaa !13
  %7 = icmp eq i32 %6, 8
  %or.cond = select i1 %4, i1 %7, i1 false
  br i1 %or.cond, label %8, label %._crit_edge

8:                                                ; preds = %1
  %9 = getelementptr inbounds i8, ptr %0, i64 55
  store i8 3, ptr %9, align 1, !tbaa !14
  br label %14

._crit_edge:                                      ; preds = %1
  %10 = icmp eq i32 %6, 4
  %11 = getelementptr inbounds i8, ptr %0, i64 55
  br i1 %10, label %12, label %13

12:                                               ; preds = %._crit_edge
  store i8 2, ptr %11, align 1, !tbaa !14
  br label %14

13:                                               ; preds = %._crit_edge
  store i8 1, ptr %11, align 1, !tbaa !14
  br label %14

14:                                               ; preds = %12, %13, %8
  %15 = tail call i32 @XSdPs_Change_BusWidth(ptr noundef nonnull %0) #2
  %.not = icmp eq i32 %15, 0
  br i1 %.not, label %16, label %51

16:                                               ; preds = %14
  %17 = tail call i32 @XSdPs_Get_Mmc_ExtCsd(ptr noundef nonnull %0, ptr noundef nonnull @XSdPs_EmmcModeInit.ExtCsd) #2
  %.not25 = icmp eq i32 %17, 0
  br i1 %.not25, label %18, label %51

18:                                               ; preds = %16
  %19 = load i8, ptr getelementptr inbounds (i8, ptr @XSdPs_EmmcModeInit.ExtCsd, i64 215), align 1, !tbaa !15
  %20 = zext i8 %19 to i32
  %21 = shl nuw i32 %20, 24
  %22 = getelementptr inbounds i8, ptr %0, i64 100
  store i32 %21, ptr %22, align 4, !tbaa !16
  %23 = load i8, ptr getelementptr inbounds (i8, ptr @XSdPs_EmmcModeInit.ExtCsd, i64 214), align 2, !tbaa !15
  %24 = zext i8 %23 to i32
  %25 = shl nuw nsw i32 %24, 16
  %26 = or disjoint i32 %25, %21
  store i32 %26, ptr %22, align 4, !tbaa !16
  %27 = load i8, ptr getelementptr inbounds (i8, ptr @XSdPs_EmmcModeInit.ExtCsd, i64 213), align 1, !tbaa !15
  %28 = zext i8 %27 to i32
  %29 = shl nuw nsw i32 %28, 8
  %30 = or disjoint i32 %29, %26
  store i32 %30, ptr %22, align 4, !tbaa !16
  %31 = load i8, ptr getelementptr inbounds (i8, ptr @XSdPs_EmmcModeInit.ExtCsd, i64 212), align 4, !tbaa !15
  %32 = zext i8 %31 to i32
  %33 = or disjoint i32 %30, %32
  store i32 %33, ptr %22, align 4, !tbaa !16
  tail call void @XSdPs_IdentifyEmmcMode(ptr noundef nonnull %0, ptr noundef nonnull @XSdPs_EmmcModeInit.ExtCsd) #2
  %34 = getelementptr inbounds i8, ptr %0, i64 108
  %35 = load i32, ptr %34, align 4, !tbaa !17
  %.not26 = icmp eq i32 %35, 6
  br i1 %.not26, label %45, label %36

36:                                               ; preds = %18
  %37 = tail call i32 @XSdPs_Change_BusSpeed(ptr noundef nonnull %0) #2
  %.not27 = icmp eq i32 %37, 0
  br i1 %.not27, label %38, label %51

38:                                               ; preds = %36
  %39 = tail call i32 @XSdPs_CheckEmmcTiming(ptr noundef nonnull %0, ptr noundef nonnull @XSdPs_EmmcModeInit.ExtCsd) #2
  %.not28 = icmp eq i32 %39, 0
  br i1 %.not28, label %40, label %51

40:                                               ; preds = %38
  %41 = load i32, ptr %34, align 4, !tbaa !17
  %42 = icmp eq i32 %41, 4
  br i1 %42, label %43, label %45

43:                                               ; preds = %40
  %44 = tail call i32 @XSdPs_Change_BusWidth(ptr noundef nonnull %0) #2
  %.not29 = icmp eq i32 %44, 0
  br i1 %.not29, label %45, label %51

45:                                               ; preds = %40, %43, %18
  %46 = load i8, ptr getelementptr inbounds (i8, ptr @XSdPs_EmmcModeInit.ExtCsd, i64 162), align 2, !tbaa !15
  %47 = icmp eq i8 %46, 0
  br i1 %47, label %48, label %50

48:                                               ; preds = %45
  %49 = tail call i32 @XSdPs_Set_Mmc_ExtCsd(ptr noundef nonnull %0, i32 noundef 60948736) #2
  %.not30 = icmp eq i32 %49, 0
  br i1 %.not30, label %50, label %51

50:                                               ; preds = %48, %45
  br label %51

51:                                               ; preds = %48, %43, %38, %36, %16, %14, %50
  %.0 = phi i32 [ 0, %50 ], [ 1, %14 ], [ 1, %16 ], [ 1, %36 ], [ 1, %38 ], [ 1, %43 ], [ 1, %48 ]
  ret i32 %.0
}

declare void @XSdPs_IdentifyEmmcMode(ptr noundef, ptr noundef) local_unnamed_addr #0

declare i32 @XSdPs_CheckEmmcTiming(ptr noundef, ptr noundef) local_unnamed_addr #0

declare i32 @XSdPs_Set_Mmc_ExtCsd(ptr noundef, i32 noundef) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !9, i64 54}
!6 = !{!"", !7, i64 0, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !9, i64 52, !9, i64 53, !9, i64 54, !9, i64 55, !11, i64 56, !9, i64 60, !9, i64 64, !11, i64 80, !9, i64 84, !11, i64 100, !11, i64 104, !11, i64 108, !11, i64 112, !11, i64 116, !12, i64 120, !8, i64 128, !11, i64 132, !9, i64 136, !11, i64 140}
!7 = !{!"", !8, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !9, i64 32}
!8 = !{!"short", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"long", !9, i64 0}
!13 = !{!6, !11, i64 20}
!14 = !{!6, !9, i64 55}
!15 = !{!9, !9, i64 0}
!16 = !{!6, !11, i64 100}
!17 = !{!6, !11, i64 108}


; Effective O3 passes: BDCEPass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass