; LLVM IR from FrancesoM/Bisc8FX :: sdk_projects/bisc8_platform/ps7_cortexa9_0/standalone_domain/bsp/ps7_cortexa9_0_ (ConfigureDevice)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XUsbPs = type { %struct.XUsbPs_SetupData, %struct.XUsbPs_Config, i32, ptr, %struct.XUsbPs_DeviceConfig, ptr, ptr, i32, ptr, i8, ptr }
%struct.XUsbPs_SetupData = type { i8, i8, i16, i16, i16 }
%struct.XUsbPs_Config = type { i16, i32 }
%struct.XUsbPs_DeviceConfig = type { i8, [12 x %struct.XUsbPs_EpConfig], i32, [12 x %struct.XUsbPs_Endpoint], i32 }
%struct.XUsbPs_EpConfig = type { %struct.XUsbPs_EpSetup, %struct.XUsbPs_EpSetup }
%struct.XUsbPs_EpSetup = type { i32, i32, i32, i16 }
%struct.XUsbPs_Endpoint = type { %struct.XUsbPs_EpOut, %struct.XUsbPs_EpIn }
%struct.XUsbPs_EpOut = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, ptr, i8, i32 }
%struct.XUsbPs_EpIn = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, ptr, i32 }

@Xil_AssertStatus = external global i32, align 4
@.str = external hidden unnamed_addr constant [171 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local i32 @XUsbPs_ConfigureDevice(ptr noundef %0, ptr noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  store i32 0, ptr %7, align 4, !tbaa !9
  %9 = load ptr, ptr %4, align 8, !tbaa !5
  %10 = icmp ne ptr %9, null
  br i1 %10, label %11, label %12

11:                                               ; preds = %2
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %13

12:                                               ; preds = %2
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 100)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %3, align 4
  store i32 1, ptr %8, align 4
  br label %80

13:                                               ; preds = %11
  %14 = load ptr, ptr %5, align 8, !tbaa !5
  %15 = icmp ne ptr %14, null
  br i1 %15, label %16, label %17

16:                                               ; preds = %13
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %18

17:                                               ; preds = %13
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 101)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %3, align 4
  store i32 1, ptr %8, align 4
  br label %80

18:                                               ; preds = %16
  %19 = load ptr, ptr %4, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.XUsbPs, ptr %19, i32 0, i32 4
  %21 = load ptr, ptr %5, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %20, ptr align 8 %21, i64 2320, i1 false), !tbaa.struct !11
  %22 = load ptr, ptr %4, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.XUsbPs, ptr %22, i32 0, i32 4
  %24 = getelementptr inbounds %struct.XUsbPs_DeviceConfig, ptr %23, i32 0, i32 2
  %25 = load i32, ptr %24, align 4, !tbaa !13
  %26 = add i32 %25, 2048
  %27 = and i32 %26, -2048
  %28 = load ptr, ptr %4, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.XUsbPs, ptr %28, i32 0, i32 4
  %30 = getelementptr inbounds %struct.XUsbPs_DeviceConfig, ptr %29, i32 0, i32 4
  store i32 %27, ptr %30, align 8, !tbaa !19
  %31 = load ptr, ptr %4, align 8, !tbaa !5
  %32 = getelementptr inbounds %struct.XUsbPs, ptr %31, i32 0, i32 4
  call void @XUsbPs_EpListInit(ptr noundef %32)
  %33 = load ptr, ptr %4, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.XUsbPs, ptr %33, i32 0, i32 4
  call void @XUsbPs_dQHInit(ptr noundef %34)
  %35 = load ptr, ptr %4, align 8, !tbaa !5
  %36 = getelementptr inbounds %struct.XUsbPs, ptr %35, i32 0, i32 4
  %37 = call i32 @XUsbPs_dTDInit(ptr noundef %36)
  store i32 %37, ptr %6, align 4, !tbaa !9
  %38 = load i32, ptr %6, align 4, !tbaa !9
  %39 = sext i32 %38 to i64
  %40 = icmp ne i64 0, %39
  br i1 %40, label %41, label %42

41:                                               ; preds = %18
  store i32 1, ptr %3, align 4
  store i32 1, ptr %8, align 4
  br label %80

42:                                               ; preds = %18
  %43 = load ptr, ptr %4, align 8, !tbaa !5
  %44 = call i32 @XUsbPs_Reset(ptr noundef %43)
  %45 = sext i32 %44 to i64
  %46 = icmp ne i64 0, %45
  br i1 %46, label %47, label %48

47:                                               ; preds = %42
  store i32 1, ptr %3, align 4
  store i32 1, ptr %8, align 4
  br label %80

48:                                               ; preds = %42
  %49 = load ptr, ptr %4, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.XUsbPs, ptr %49, i32 0, i32 1
  %51 = getelementptr inbounds %struct.XUsbPs_Config, ptr %50, i32 0, i32 1
  %52 = load i32, ptr %51, align 4, !tbaa !20
  %53 = add i32 %52, 344
  %54 = zext i32 %53 to i64
  %55 = load ptr, ptr %4, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.XUsbPs, ptr %55, i32 0, i32 4
  %57 = getelementptr inbounds %struct.XUsbPs_DeviceConfig, ptr %56, i32 0, i32 4
  %58 = load i32, ptr %57, align 8, !tbaa !19
  call void @Xil_Out32(i64 noundef %54, i32 noundef %58)
  store i32 10, ptr %7, align 4, !tbaa !9
  %59 = load ptr, ptr %4, align 8, !tbaa !5
  %60 = getelementptr inbounds %struct.XUsbPs, ptr %59, i32 0, i32 1
  %61 = getelementptr inbounds %struct.XUsbPs_Config, ptr %60, i32 0, i32 1
  %62 = load i32, ptr %61, align 4, !tbaa !20
  %63 = add i32 %62, 424
  %64 = zext i32 %63 to i64
  %65 = load i32, ptr %7, align 4, !tbaa !9
  call void @Xil_Out32(i64 noundef %64, i32 noundef %65)
  %66 = load ptr, ptr %4, align 8, !tbaa !5
  %67 = getelementptr inbounds %struct.XUsbPs, ptr %66, i32 0, i32 1
  %68 = getelementptr inbounds %struct.XUsbPs_Config, ptr %67, i32 0, i32 1
  %69 = load i32, ptr %68, align 4, !tbaa !20
  %70 = add i32 %69, 420
  %71 = zext i32 %70 to i64
  %72 = load ptr, ptr %4, align 8, !tbaa !5
  %73 = getelementptr inbounds %struct.XUsbPs, ptr %72, i32 0, i32 1
  %74 = getelementptr inbounds %struct.XUsbPs_Config, ptr %73, i32 0, i32 1
  %75 = load i32, ptr %74, align 4, !tbaa !20
  %76 = add i32 %75, 420
  %77 = zext i32 %76 to i64
  %78 = call i32 @Xil_In32(i64 noundef %77)
  %79 = or i32 %78, 8
  call void @Xil_Out32(i64 noundef %71, i32 noundef %79)
  store i32 0, ptr %3, align 4
  store i32 1, ptr %8, align 4
  br label %80

80:                                               ; preds = %48, %47, %41, %17, %12
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #5
  %81 = load i32, ptr %3, align 4
  ret i32 %81
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @Xil_Assert(ptr noundef, i32 noundef) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

; Function Attrs: nounwind uwtable
declare hidden void @XUsbPs_EpListInit(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @XUsbPs_dQHInit(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden i32 @XUsbPs_dTDInit(ptr noundef) #0

declare i32 @XUsbPs_Reset(ptr noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @Xil_Out32(i64 noundef, i32 noundef) #4

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) #4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{i64 0, i64 1, !12, i64 4, i64 384, !12, i64 388, i64 4, !9, i64 392, i64 1920, !12, i64 2312, i64 4, !9}
!12 = !{!7, !7, i64 0}
!13 = !{!14, !10, i64 420}
!14 = !{!"", !15, i64 0, !17, i64 8, !10, i64 16, !6, i64 24, !18, i64 32, !6, i64 2352, !6, i64 2360, !10, i64 2368, !6, i64 2376, !7, i64 2384, !6, i64 2392}
!15 = !{!"", !7, i64 0, !7, i64 1, !16, i64 2, !16, i64 4, !16, i64 6}
!16 = !{!"short", !7, i64 0}
!17 = !{!"", !16, i64 0, !10, i64 4}
!18 = !{!"", !7, i64 0, !7, i64 4, !10, i64 388, !7, i64 392, !10, i64 2312}
!19 = !{!14, !10, i64 2344}
!20 = !{!14, !10, i64 12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@Xil_AssertStatus = external local_unnamed_addr global i32, align 4
@.str = external hidden unnamed_addr constant [171 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @XUsbPs_ConfigureDevice(ptr noundef %0, ptr noundef readonly %1) local_unnamed_addr #0 {
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %4, label %3

3:                                                ; preds = %2
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !5
  %.not19 = icmp eq ptr %1, null
  br i1 %.not19, label %13, label %5

4:                                                ; preds = %2
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 100) #4
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %30

5:                                                ; preds = %3
  %6 = getelementptr inbounds i8, ptr %0, i64 32
  tail call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(2320) %6, ptr noundef nonnull align 8 dereferenceable(2320) %1, i64 2320, i1 false), !tbaa.struct !9
  %7 = getelementptr inbounds i8, ptr %0, i64 420
  %8 = load i32, ptr %7, align 4, !tbaa !11
  %9 = and i32 %8, -2048
  %10 = add i32 %9, 2048
  %11 = getelementptr inbounds i8, ptr %0, i64 2344
  store i32 %10, ptr %11, align 8, !tbaa !18
  tail call void @XUsbPs_EpListInit(ptr noundef nonnull %6)
  tail call void @XUsbPs_dQHInit(ptr noundef nonnull %6)
  %12 = tail call i32 @XUsbPs_dTDInit(ptr noundef nonnull %6)
  %.not20 = icmp eq i32 %12, 0
  br i1 %.not20, label %14, label %30

13:                                               ; preds = %3
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 101) #4
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %30

14:                                               ; preds = %5
  %15 = tail call i32 @XUsbPs_Reset(ptr noundef nonnull %0) #4
  %.not21 = icmp eq i32 %15, 0
  br i1 %.not21, label %16, label %30

16:                                               ; preds = %14
  %17 = getelementptr inbounds i8, ptr %0, i64 12
  %18 = load i32, ptr %17, align 4, !tbaa !19
  %19 = add i32 %18, 344
  %20 = zext i32 %19 to i64
  %21 = load i32, ptr %11, align 8, !tbaa !18
  tail call void @Xil_Out32(i64 noundef %20, i32 noundef %21)
  %22 = load i32, ptr %17, align 4, !tbaa !19
  %23 = add i32 %22, 424
  %24 = zext i32 %23 to i64
  tail call void @Xil_Out32(i64 noundef %24, i32 noundef 10)
  %25 = load i32, ptr %17, align 4, !tbaa !19
  %26 = add i32 %25, 420
  %27 = zext i32 %26 to i64
  %28 = tail call i32 @Xil_In32(i64 noundef %27)
  %29 = or i32 %28, 8
  tail call void @Xil_Out32(i64 noundef %27, i32 noundef %29)
  br label %30

30:                                               ; preds = %14, %5, %16, %13, %4
  %.0 = phi i32 [ 0, %16 ], [ 0, %13 ], [ 0, %4 ], [ 1, %5 ], [ 1, %14 ]
  ret i32 %.0
}

declare void @Xil_Assert(ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: nounwind uwtable
declare hidden void @XUsbPs_EpListInit(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare hidden void @XUsbPs_dQHInit(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare hidden i32 @XUsbPs_dTDInit(ptr noundef) local_unnamed_addr #0

declare i32 @XUsbPs_Reset(ptr noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @Xil_Out32(i64 noundef, i32 noundef) local_unnamed_addr #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) local_unnamed_addr #3

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{i64 0, i64 1, !10, i64 4, i64 384, !10, i64 388, i64 4, !5, i64 392, i64 1920, !10, i64 2312, i64 4, !5}
!10 = !{!7, !7, i64 0}
!11 = !{!12, !6, i64 420}
!12 = !{!"", !13, i64 0, !15, i64 8, !6, i64 16, !16, i64 24, !17, i64 32, !16, i64 2352, !16, i64 2360, !6, i64 2368, !16, i64 2376, !7, i64 2384, !16, i64 2392}
!13 = !{!"", !7, i64 0, !7, i64 1, !14, i64 2, !14, i64 4, !14, i64 6}
!14 = !{!"short", !7, i64 0}
!15 = !{!"", !14, i64 0, !6, i64 4}
!16 = !{!"any pointer", !7, i64 0}
!17 = !{!"", !7, i64 0, !7, i64 4, !6, i64 388, !7, i64 392, !6, i64 2312}
!18 = !{!12, !6, i64 2344}
!19 = !{!12, !6, i64 12}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass