; LLVM IR from andreimaximov/algorithms :: codeforces/dna-evolution/main.ll (Z6updateii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }

@_Z1SB5cxx11 = external dso_local global %"class.std::__cxx11::basic_string", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z3chrc(i8 noundef signext) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z6updateiiiii(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z6updateii(i32 noundef %0, i32 noundef %1) #1 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  %9 = load i32, ptr %3, align 4, !tbaa !5
  %10 = sext i32 %9 to i64
  %11 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(32) @_Z1SB5cxx11, i64 noundef %10)
  %12 = load i8, ptr %11, align 1, !tbaa !9
  %13 = call noundef i32 @_Z3chrc(i8 noundef signext %12)
  store i32 %13, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  store i32 1, ptr %6, align 4, !tbaa !5
  br label %14

14:                                               ; preds = %48, %2
  %15 = load i32, ptr %6, align 4, !tbaa !5
  %16 = icmp sle i32 %15, 10
  br i1 %16, label %18, label %17

17:                                               ; preds = %14
  store i32 2, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  br label %51

18:                                               ; preds = %14
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  store i32 0, ptr %8, align 4, !tbaa !5
  br label %19

19:                                               ; preds = %44, %18
  %20 = load i32, ptr %8, align 4, !tbaa !5
  %21 = load i32, ptr %6, align 4, !tbaa !5
  %22 = icmp slt i32 %20, %21
  br i1 %22, label %23, label %27

23:                                               ; preds = %19
  %24 = load i32, ptr %8, align 4, !tbaa !5
  %25 = load i32, ptr %3, align 4, !tbaa !5
  %26 = icmp sle i32 %24, %25
  br label %27

27:                                               ; preds = %23, %19
  %28 = phi i1 [ false, %19 ], [ %26, %23 ]
  br i1 %28, label %30, label %29

29:                                               ; preds = %27
  store i32 5, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  br label %47

30:                                               ; preds = %27
  %31 = load i32, ptr %3, align 4, !tbaa !5
  %32 = load i32, ptr %8, align 4, !tbaa !5
  %33 = sub nsw i32 %31, %32
  %34 = load i32, ptr %6, align 4, !tbaa !5
  %35 = srem i32 %33, %34
  %36 = icmp eq i32 %35, 0
  br i1 %36, label %37, label %43

37:                                               ; preds = %30
  %38 = load i32, ptr %5, align 4, !tbaa !5
  %39 = load i32, ptr %8, align 4, !tbaa !5
  %40 = load i32, ptr %6, align 4, !tbaa !5
  %41 = load i32, ptr %3, align 4, !tbaa !5
  %42 = load i32, ptr %4, align 4, !tbaa !5
  call void @_Z6updateiiiii(i32 noundef %38, i32 noundef %39, i32 noundef %40, i32 noundef %41, i32 noundef %42)
  br label %43

43:                                               ; preds = %37, %30
  br label %44

44:                                               ; preds = %43
  %45 = load i32, ptr %8, align 4, !tbaa !5
  %46 = add nsw i32 %45, 1
  store i32 %46, ptr %8, align 4, !tbaa !5
  br label %19, !llvm.loop !10

47:                                               ; preds = %29
  br label %48

48:                                               ; preds = %47
  %49 = load i32, ptr %6, align 4, !tbaa !5
  %50 = add nsw i32 %49, 1
  store i32 %50, ptr %6, align 4, !tbaa !5
  br label %14, !llvm.loop !12

51:                                               ; preds = %17
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(32), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }

@_Z1SB5cxx11 = external dso_local global %"class.std::__cxx11::basic_string", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z3chrc(i8 noundef signext) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z6updateiiiii(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z6updateii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = sext i32 %0 to i64
  %4 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(32) @_Z1SB5cxx11, i64 noundef %3)
  %5 = load i8, ptr %4, align 1, !tbaa !5
  %6 = tail call noundef i32 @_Z3chrc(i8 noundef signext %5)
  %7 = icmp sgt i32 %0, -1
  br i1 %7, label %._crit_edge.us, label %.split21.us

._crit_edge.us:                                   ; preds = %2
  tail call void @_Z6updateiiiii(i32 noundef %6, i32 noundef 0, i32 noundef 1, i32 noundef %0, i32 noundef %1)
  %.not = icmp eq i32 %0, 0
  %8 = select i1 %.not, i32 1, i32 2
  br label %9

9:                                                ; preds = %14, %._crit_edge.us
  %.018.us.1 = phi i32 [ 0, %._crit_edge.us ], [ %15, %14 ]
  %10 = sub nsw i32 %0, %.018.us.1
  %11 = and i32 %10, 1
  %12 = icmp eq i32 %11, 0
  br i1 %12, label %13, label %14

13:                                               ; preds = %9
  tail call void @_Z6updateiiiii(i32 noundef %6, i32 noundef %.018.us.1, i32 noundef 2, i32 noundef %0, i32 noundef %1)
  br label %14

14:                                               ; preds = %13, %9
  %15 = add nuw nsw i32 %.018.us.1, 1
  %exitcond.1.not = icmp eq i32 %15, %8
  br i1 %exitcond.1.not, label %._crit_edge.us.1, label %9, !llvm.loop !8

._crit_edge.us.1:                                 ; preds = %14
  %umin.2 = tail call i32 @llvm.umin.i32(i32 %0, i32 2)
  br label %16

16:                                               ; preds = %21, %._crit_edge.us.1
  %.018.us.2 = phi i32 [ 0, %._crit_edge.us.1 ], [ %22, %21 ]
  %17 = sub nsw i32 %0, %.018.us.2
  %18 = srem i32 %17, 3
  %19 = icmp eq i32 %18, 0
  br i1 %19, label %20, label %21

20:                                               ; preds = %16
  tail call void @_Z6updateiiiii(i32 noundef %6, i32 noundef %.018.us.2, i32 noundef 3, i32 noundef %0, i32 noundef %1)
  br label %21

21:                                               ; preds = %20, %16
  %22 = add nuw nsw i32 %.018.us.2, 1
  %exitcond.2.not = icmp eq i32 %.018.us.2, %umin.2
  br i1 %exitcond.2.not, label %._crit_edge.us.2, label %16, !llvm.loop !8

._crit_edge.us.2:                                 ; preds = %21
  %umin.3 = tail call i32 @llvm.umin.i32(i32 %0, i32 3)
  br label %23

23:                                               ; preds = %28, %._crit_edge.us.2
  %.018.us.3 = phi i32 [ 0, %._crit_edge.us.2 ], [ %29, %28 ]
  %24 = sub nsw i32 %0, %.018.us.3
  %25 = and i32 %24, 3
  %26 = icmp eq i32 %25, 0
  br i1 %26, label %27, label %28

27:                                               ; preds = %23
  tail call void @_Z6updateiiiii(i32 noundef %6, i32 noundef %.018.us.3, i32 noundef 4, i32 noundef %0, i32 noundef %1)
  br label %28

28:                                               ; preds = %27, %23
  %29 = add nuw nsw i32 %.018.us.3, 1
  %exitcond.3.not = icmp eq i32 %.018.us.3, %umin.3
  br i1 %exitcond.3.not, label %._crit_edge.us.3, label %23, !llvm.loop !8

._crit_edge.us.3:                                 ; preds = %28
  %umin.4 = tail call i32 @llvm.umin.i32(i32 %0, i32 4)
  br label %30

30:                                               ; preds = %35, %._crit_edge.us.3
  %.018.us.4 = phi i32 [ 0, %._crit_edge.us.3 ], [ %36, %35 ]
  %31 = sub nsw i32 %0, %.018.us.4
  %32 = srem i32 %31, 5
  %33 = icmp eq i32 %32, 0
  br i1 %33, label %34, label %35

34:                                               ; preds = %30
  tail call void @_Z6updateiiiii(i32 noundef %6, i32 noundef %.018.us.4, i32 noundef 5, i32 noundef %0, i32 noundef %1)
  br label %35

35:                                               ; preds = %34, %30
  %36 = add nuw nsw i32 %.018.us.4, 1
  %exitcond.4.not = icmp eq i32 %.018.us.4, %umin.4
  br i1 %exitcond.4.not, label %._crit_edge.us.4, label %30, !llvm.loop !8

._crit_edge.us.4:                                 ; preds = %35
  %umin.5 = tail call i32 @llvm.umin.i32(i32 %0, i32 5)
  br label %37

37:                                               ; preds = %42, %._crit_edge.us.4
  %.018.us.5 = phi i32 [ 0, %._crit_edge.us.4 ], [ %43, %42 ]
  %38 = sub nsw i32 %0, %.018.us.5
  %39 = srem i32 %38, 6
  %40 = icmp eq i32 %39, 0
  br i1 %40, label %41, label %42

41:                                               ; preds = %37
  tail call void @_Z6updateiiiii(i32 noundef %6, i32 noundef %.018.us.5, i32 noundef 6, i32 noundef %0, i32 noundef %1)
  br label %42

42:                                               ; preds = %41, %37
  %43 = add nuw nsw i32 %.018.us.5, 1
  %exitcond.5.not = icmp eq i32 %.018.us.5, %umin.5
  br i1 %exitcond.5.not, label %._crit_edge.us.5, label %37, !llvm.loop !8

._crit_edge.us.5:                                 ; preds = %42
  %umin.6 = tail call i32 @llvm.umin.i32(i32 %0, i32 6)
  br label %44

44:                                               ; preds = %49, %._crit_edge.us.5
  %.018.us.6 = phi i32 [ 0, %._crit_edge.us.5 ], [ %50, %49 ]
  %45 = sub nsw i32 %0, %.018.us.6
  %46 = srem i32 %45, 7
  %47 = icmp eq i32 %46, 0
  br i1 %47, label %48, label %49

48:                                               ; preds = %44
  tail call void @_Z6updateiiiii(i32 noundef %6, i32 noundef %.018.us.6, i32 noundef 7, i32 noundef %0, i32 noundef %1)
  br label %49

49:                                               ; preds = %48, %44
  %50 = add nuw nsw i32 %.018.us.6, 1
  %exitcond.6.not = icmp eq i32 %.018.us.6, %umin.6
  br i1 %exitcond.6.not, label %._crit_edge.us.6, label %44, !llvm.loop !8

._crit_edge.us.6:                                 ; preds = %49
  %umin.7 = tail call i32 @llvm.umin.i32(i32 %0, i32 7)
  br label %51

51:                                               ; preds = %56, %._crit_edge.us.6
  %.018.us.7 = phi i32 [ 0, %._crit_edge.us.6 ], [ %57, %56 ]
  %52 = sub nsw i32 %0, %.018.us.7
  %53 = and i32 %52, 7
  %54 = icmp eq i32 %53, 0
  br i1 %54, label %55, label %56

55:                                               ; preds = %51
  tail call void @_Z6updateiiiii(i32 noundef %6, i32 noundef %.018.us.7, i32 noundef 8, i32 noundef %0, i32 noundef %1)
  br label %56

56:                                               ; preds = %55, %51
  %57 = add nuw nsw i32 %.018.us.7, 1
  %exitcond.7.not = icmp eq i32 %.018.us.7, %umin.7
  br i1 %exitcond.7.not, label %._crit_edge.us.7, label %51, !llvm.loop !8

._crit_edge.us.7:                                 ; preds = %56
  %umin.8 = tail call i32 @llvm.umin.i32(i32 %0, i32 8)
  br label %58

58:                                               ; preds = %63, %._crit_edge.us.7
  %.018.us.8 = phi i32 [ 0, %._crit_edge.us.7 ], [ %64, %63 ]
  %59 = sub nsw i32 %0, %.018.us.8
  %60 = srem i32 %59, 9
  %61 = icmp eq i32 %60, 0
  br i1 %61, label %62, label %63

62:                                               ; preds = %58
  tail call void @_Z6updateiiiii(i32 noundef %6, i32 noundef %.018.us.8, i32 noundef 9, i32 noundef %0, i32 noundef %1)
  br label %63

63:                                               ; preds = %62, %58
  %64 = add nuw nsw i32 %.018.us.8, 1
  %exitcond.8.not = icmp eq i32 %.018.us.8, %umin.8
  br i1 %exitcond.8.not, label %._crit_edge.us.8, label %58, !llvm.loop !8

._crit_edge.us.8:                                 ; preds = %63
  %umin.9 = tail call i32 @llvm.umin.i32(i32 %0, i32 9)
  br label %65

65:                                               ; preds = %70, %._crit_edge.us.8
  %.018.us.9 = phi i32 [ 0, %._crit_edge.us.8 ], [ %71, %70 ]
  %66 = sub nsw i32 %0, %.018.us.9
  %67 = srem i32 %66, 10
  %68 = icmp eq i32 %67, 0
  br i1 %68, label %69, label %70

69:                                               ; preds = %65
  tail call void @_Z6updateiiiii(i32 noundef %6, i32 noundef %.018.us.9, i32 noundef 10, i32 noundef %0, i32 noundef %1)
  br label %70

70:                                               ; preds = %69, %65
  %71 = add nuw nsw i32 %.018.us.9, 1
  %exitcond.9.not = icmp eq i32 %.018.us.9, %umin.9
  br i1 %exitcond.9.not, label %.split21.us, label %65, !llvm.loop !8

.split21.us:                                      ; preds = %70, %2
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(32), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass