; LLVM IR from Izaron/ACM-ICPC :: Russian Olympiad in Informatics/Final Stage 2016/fisher.ll (Z6getAnsiiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@treeAns = external dso_local global [1280020 x i64], align 16

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z6getAnsiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #0 {
  %6 = alloca i64, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store i32 %0, ptr %7, align 4, !tbaa !5
  store i32 %1, ptr %8, align 4, !tbaa !5
  store i32 %2, ptr %9, align 4, !tbaa !5
  store i32 %3, ptr %10, align 4, !tbaa !5
  store i32 %4, ptr %11, align 4, !tbaa !5
  %12 = load i32, ptr %8, align 4, !tbaa !5
  %13 = load i32, ptr %11, align 4, !tbaa !5
  %14 = icmp sgt i32 %12, %13
  br i1 %14, label %19, label %15

15:                                               ; preds = %5
  %16 = load i32, ptr %10, align 4, !tbaa !5
  %17 = load i32, ptr %9, align 4, !tbaa !5
  %18 = icmp sgt i32 %16, %17
  br i1 %18, label %19, label %20

19:                                               ; preds = %15, %5
  store i64 0, ptr %6, align 8
  br label %57

20:                                               ; preds = %15
  %21 = load i32, ptr %8, align 4, !tbaa !5
  %22 = load i32, ptr %10, align 4, !tbaa !5
  %23 = icmp sge i32 %21, %22
  br i1 %23, label %24, label %33

24:                                               ; preds = %20
  %25 = load i32, ptr %9, align 4, !tbaa !5
  %26 = load i32, ptr %11, align 4, !tbaa !5
  %27 = icmp sle i32 %25, %26
  br i1 %27, label %28, label %33

28:                                               ; preds = %24
  %29 = load i32, ptr %7, align 4, !tbaa !5
  %30 = sext i32 %29 to i64
  %31 = getelementptr inbounds [1280020 x i64], ptr @treeAns, i64 0, i64 %30
  %32 = load i64, ptr %31, align 8, !tbaa !9
  store i64 %32, ptr %6, align 8
  br label %57

33:                                               ; preds = %24, %20
  %34 = load i32, ptr %7, align 4, !tbaa !5
  %35 = mul nsw i32 %34, 2
  %36 = load i32, ptr %8, align 4, !tbaa !5
  %37 = load i32, ptr %8, align 4, !tbaa !5
  %38 = load i32, ptr %9, align 4, !tbaa !5
  %39 = add nsw i32 %37, %38
  %40 = sdiv i32 %39, 2
  %41 = load i32, ptr %10, align 4, !tbaa !5
  %42 = load i32, ptr %11, align 4, !tbaa !5
  %43 = call noundef i64 @_Z6getAnsiiiii(i32 noundef %35, i32 noundef %36, i32 noundef %40, i32 noundef %41, i32 noundef %42)
  %44 = load i32, ptr %7, align 4, !tbaa !5
  %45 = mul nsw i32 %44, 2
  %46 = add nsw i32 %45, 1
  %47 = load i32, ptr %8, align 4, !tbaa !5
  %48 = load i32, ptr %9, align 4, !tbaa !5
  %49 = add nsw i32 %47, %48
  %50 = sdiv i32 %49, 2
  %51 = add nsw i32 %50, 1
  %52 = load i32, ptr %9, align 4, !tbaa !5
  %53 = load i32, ptr %10, align 4, !tbaa !5
  %54 = load i32, ptr %11, align 4, !tbaa !5
  %55 = call noundef i64 @_Z6getAnsiiiii(i32 noundef %46, i32 noundef %51, i32 noundef %52, i32 noundef %53, i32 noundef %54)
  %56 = add nsw i64 %43, %55
  store i64 %56, ptr %6, align 8
  br label %57

57:                                               ; preds = %33, %28, %19
  %58 = load i64, ptr %6, align 8
  ret i64 %58
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@treeAns = external dso_local local_unnamed_addr global [1280020 x i64], align 16

; Function Attrs: mustprogress nofree nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define dso_local noundef i64 @_Z6getAnsiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #0 {
  %6 = icmp sgt i32 %3, %2
  %7 = icmp sgt i32 %1, %4
  %or.cond35 = or i1 %6, %7
  br i1 %or.cond35, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %5
  %.not26 = icmp sgt i32 %2, %4
  br i1 %.not26, label %tailrecurse.us, label %.lr.ph.split.split

tailrecurse.us:                                   ; preds = %.lr.ph, %tailrecurse.us
  %.tr2838.us = phi i32 [ %13, %tailrecurse.us ], [ %1, %.lr.ph ]
  %.tr37.us = phi i32 [ %12, %tailrecurse.us ], [ %0, %.lr.ph ]
  %accumulator.tr36.us = phi i64 [ %14, %tailrecurse.us ], [ 0, %.lr.ph ]
  %8 = shl nsw i32 %.tr37.us, 1
  %9 = add nsw i32 %.tr2838.us, %2
  %10 = sdiv i32 %9, 2
  %11 = tail call noundef i64 @_Z6getAnsiiiii(i32 noundef %8, i32 noundef %.tr2838.us, i32 noundef %10, i32 noundef %3, i32 noundef %4)
  %12 = or disjoint i32 %8, 1
  %13 = add nsw i32 %10, 1
  %14 = add nsw i64 %11, %accumulator.tr36.us
  %.not50 = icmp slt i32 %10, %4
  br i1 %.not50, label %tailrecurse.us, label %.loopexit

.lr.ph.split.split:                               ; preds = %.lr.ph, %tailrecurse
  %.tr2838 = phi i32 [ %23, %tailrecurse ], [ %1, %.lr.ph ]
  %.tr37 = phi i32 [ %22, %tailrecurse ], [ %0, %.lr.ph ]
  %accumulator.tr36 = phi i64 [ %24, %tailrecurse ], [ 0, %.lr.ph ]
  %.not = icmp slt i32 %.tr2838, %3
  br i1 %.not, label %tailrecurse, label %.split.us

.split.us:                                        ; preds = %.lr.ph.split.split
  %15 = sext i32 %.tr37 to i64
  %16 = getelementptr inbounds [1280020 x i64], ptr @treeAns, i64 0, i64 %15
  %17 = load i64, ptr %16, align 8, !tbaa !5
  br label %.loopexit

tailrecurse:                                      ; preds = %.lr.ph.split.split
  %18 = shl nsw i32 %.tr37, 1
  %19 = add nsw i32 %.tr2838, %2
  %20 = sdiv i32 %19, 2
  %21 = tail call noundef i64 @_Z6getAnsiiiii(i32 noundef %18, i32 noundef %.tr2838, i32 noundef %20, i32 noundef %3, i32 noundef %4)
  %22 = or disjoint i32 %18, 1
  %23 = add nsw i32 %20, 1
  %24 = add nsw i64 %21, %accumulator.tr36
  %.not49 = icmp slt i32 %20, %4
  br i1 %.not49, label %.lr.ph.split.split, label %.loopexit

.loopexit:                                        ; preds = %tailrecurse, %tailrecurse.us, %5, %.split.us
  %accumulator.tr34 = phi i64 [ %accumulator.tr36, %.split.us ], [ 0, %5 ], [ %14, %tailrecurse.us ], [ %24, %tailrecurse ]
  %.0 = phi i64 [ %17, %.split.us ], [ 0, %5 ], [ 0, %tailrecurse.us ], [ 0, %tailrecurse ]
  %accumulator.ret.tr = add nsw i64 %.0, %accumulator.tr34
  ret i64 %accumulator.ret.tr
}

attributes #0 = { mustprogress nofree nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass