; LLVM IR from hanzohasashi33/Competetive_programming :: hackerrank/Data Structures/Stacks (Game_Of_Two_Stacks_Opt)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z9twoStacksiSt6vectorIiSaIiEES1_(i32 noundef %0, ptr noundef %1, ptr noundef %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !9
  store ptr %2, ptr %6, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  store i32 0, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  store i32 0, ptr %8, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  store i32 0, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  store i32 0, ptr %10, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #2
  store i32 0, ptr %11, align 4, !tbaa !5
  br label %12

12:                                               ; preds = %28, %3
  %13 = load i32, ptr %10, align 4, !tbaa !5
  %14 = sext i32 %13 to i64
  %15 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #2
  %16 = icmp ult i64 %14, %15
  br i1 %16, label %17, label %26

17:                                               ; preds = %12
  %18 = load i32, ptr %7, align 4, !tbaa !5
  %19 = load i32, ptr %10, align 4, !tbaa !5
  %20 = sext i32 %19 to i64
  %21 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %20) #2
  %22 = load i32, ptr %21, align 4, !tbaa !5
  %23 = add nsw i32 %18, %22
  %24 = load i32, ptr %4, align 4, !tbaa !5
  %25 = icmp sle i32 %23, %24
  br label %26

26:                                               ; preds = %17, %12
  %27 = phi i1 [ false, %12 ], [ %25, %17 ]
  br i1 %27, label %28, label %37

28:                                               ; preds = %26
  %29 = load i32, ptr %10, align 4, !tbaa !5
  %30 = sext i32 %29 to i64
  %31 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %30) #2
  %32 = load i32, ptr %31, align 4, !tbaa !5
  %33 = load i32, ptr %7, align 4, !tbaa !5
  %34 = add nsw i32 %33, %32
  store i32 %34, ptr %7, align 4, !tbaa !5
  %35 = load i32, ptr %10, align 4, !tbaa !5
  %36 = add nsw i32 %35, 1
  store i32 %36, ptr %10, align 4, !tbaa !5
  br label %12, !llvm.loop !11

37:                                               ; preds = %26
  %38 = load i32, ptr %10, align 4, !tbaa !5
  store i32 %38, ptr %9, align 4, !tbaa !5
  br label %39

39:                                               ; preds = %90, %37
  %40 = load i32, ptr %11, align 4, !tbaa !5
  %41 = sext i32 %40 to i64
  %42 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2) #2
  %43 = icmp ult i64 %41, %42
  br i1 %43, label %44, label %47

44:                                               ; preds = %39
  %45 = load i32, ptr %10, align 4, !tbaa !5
  %46 = icmp sge i32 %45, 0
  br label %47

47:                                               ; preds = %44, %39
  %48 = phi i1 [ false, %39 ], [ %46, %44 ]
  br i1 %48, label %49, label %91

49:                                               ; preds = %47
  %50 = load i32, ptr %11, align 4, !tbaa !5
  %51 = sext i32 %50 to i64
  %52 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %51) #2
  %53 = load i32, ptr %52, align 4, !tbaa !5
  %54 = load i32, ptr %7, align 4, !tbaa !5
  %55 = add nsw i32 %54, %53
  store i32 %55, ptr %7, align 4, !tbaa !5
  %56 = load i32, ptr %11, align 4, !tbaa !5
  %57 = add nsw i32 %56, 1
  store i32 %57, ptr %11, align 4, !tbaa !5
  br label %58

58:                                               ; preds = %67, %49
  %59 = load i32, ptr %7, align 4, !tbaa !5
  %60 = load i32, ptr %4, align 4, !tbaa !5
  %61 = icmp sgt i32 %59, %60
  br i1 %61, label %62, label %65

62:                                               ; preds = %58
  %63 = load i32, ptr %10, align 4, !tbaa !5
  %64 = icmp sgt i32 %63, 0
  br label %65

65:                                               ; preds = %62, %58
  %66 = phi i1 [ false, %58 ], [ %64, %62 ]
  br i1 %66, label %67, label %76

67:                                               ; preds = %65
  %68 = load i32, ptr %10, align 4, !tbaa !5
  %69 = add nsw i32 %68, -1
  store i32 %69, ptr %10, align 4, !tbaa !5
  %70 = load i32, ptr %10, align 4, !tbaa !5
  %71 = sext i32 %70 to i64
  %72 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %71) #2
  %73 = load i32, ptr %72, align 4, !tbaa !5
  %74 = load i32, ptr %7, align 4, !tbaa !5
  %75 = sub nsw i32 %74, %73
  store i32 %75, ptr %7, align 4, !tbaa !5
  br label %58, !llvm.loop !13

76:                                               ; preds = %65
  %77 = load i32, ptr %7, align 4, !tbaa !5
  %78 = load i32, ptr %4, align 4, !tbaa !5
  %79 = icmp sle i32 %77, %78
  br i1 %79, label %80, label %90

80:                                               ; preds = %76
  %81 = load i32, ptr %10, align 4, !tbaa !5
  %82 = load i32, ptr %11, align 4, !tbaa !5
  %83 = add nsw i32 %81, %82
  %84 = load i32, ptr %9, align 4, !tbaa !5
  %85 = icmp sgt i32 %83, %84
  br i1 %85, label %86, label %90

86:                                               ; preds = %80
  %87 = load i32, ptr %10, align 4, !tbaa !5
  %88 = load i32, ptr %11, align 4, !tbaa !5
  %89 = add nsw i32 %87, %88
  store i32 %89, ptr %9, align 4, !tbaa !5
  br label %90

90:                                               ; preds = %86, %80, %76
  br label %39, !llvm.loop !14

91:                                               ; preds = %47
  %92 = load i32, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  ret i32 %92
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z9twoStacksiSt6vectorIiSaIiEES1_(i32 noundef %0, ptr noundef nonnull %1, ptr noundef %2) local_unnamed_addr #0 {
  %4 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #2
  %.not56 = icmp eq i64 %4, 0
  br i1 %.not56, label %.critedge, label %.lr.ph

.lr.ph:                                           ; preds = %3, %8
  %indvars.iv = phi i64 [ %indvars.iv.next, %8 ], [ 0, %3 ]
  %.03037 = phi i32 [ %11, %8 ], [ 0, %3 ]
  %5 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv) #2
  %6 = load i32, ptr %5, align 4, !tbaa !5
  %7 = add nsw i32 %6, %.03037
  %.not = icmp sgt i32 %7, %0
  br i1 %.not, label %.critedge.loopexit, label %8

8:                                                ; preds = %.lr.ph
  %9 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv) #2
  %10 = load i32, ptr %9, align 4, !tbaa !5
  %11 = add nsw i32 %10, %.03037
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %12 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #2
  %13 = icmp ugt i64 %12, %indvars.iv.next
  br i1 %13, label %.lr.ph, label %.critedge.loopexit, !llvm.loop !9

.critedge.loopexit:                               ; preds = %8, %.lr.ph
  %.030.lcssa.ph = phi i32 [ %.03037, %.lr.ph ], [ %11, %8 ]
  %.027.lcssa.ph.in = phi i64 [ %indvars.iv, %.lr.ph ], [ %indvars.iv.next, %8 ]
  %.027.lcssa.ph = trunc i64 %.027.lcssa.ph.in to i32
  br label %.critedge

.critedge:                                        ; preds = %.critedge.loopexit, %3
  %.030.lcssa = phi i32 [ 0, %3 ], [ %.030.lcssa.ph, %.critedge.loopexit ]
  %.027.lcssa = phi i32 [ 0, %3 ], [ %.027.lcssa.ph, %.critedge.loopexit ]
  %14 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2) #2
  %15 = icmp ne i64 %14, 0
  %16 = icmp sgt i32 %.027.lcssa, -1
  %17 = select i1 %15, i1 %16, i1 false
  br i1 %17, label %.lr.ph53, label %._crit_edge54

.lr.ph53:                                         ; preds = %.critedge, %._crit_edge
  %indvars.iv65 = phi i64 [ %indvars.iv.next66, %._crit_edge ], [ 0, %.critedge ]
  %.151 = phi i32 [ %.2.lcssa, %._crit_edge ], [ %.027.lcssa, %.critedge ]
  %.02850 = phi i32 [ %.129, %._crit_edge ], [ %.027.lcssa, %.critedge ]
  %.13149 = phi i32 [ %.232.lcssa, %._crit_edge ], [ %.030.lcssa, %.critedge ]
  %18 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %indvars.iv65) #2
  %19 = load i32, ptr %18, align 4, !tbaa !5
  %20 = add nsw i32 %19, %.13149
  %indvars.iv.next66 = add nuw nsw i64 %indvars.iv65, 1
  %21 = icmp sgt i32 %20, %0
  %22 = icmp ne i32 %.151, 0
  %23 = select i1 %21, i1 %22, i1 false
  br i1 %23, label %.lr.ph45.preheader, label %._crit_edge

.lr.ph45.preheader:                               ; preds = %.lr.ph53
  %24 = zext nneg i32 %.151 to i64
  br label %.lr.ph45

.lr.ph45:                                         ; preds = %.lr.ph45.preheader, %.lr.ph45
  %indvars.iv61 = phi i64 [ %24, %.lr.ph45.preheader ], [ %25, %.lr.ph45 ]
  %.23243 = phi i32 [ %20, %.lr.ph45.preheader ], [ %28, %.lr.ph45 ]
  %25 = add nsw i64 %indvars.iv61, -1
  %26 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %25) #2
  %27 = load i32, ptr %26, align 4, !tbaa !5
  %28 = sub nsw i32 %.23243, %27
  %29 = icmp sgt i32 %28, %0
  %.wide = icmp ne i64 %25, 0
  %30 = and i1 %29, %.wide
  br i1 %30, label %.lr.ph45, label %._crit_edge.loopexit, !llvm.loop !11

._crit_edge.loopexit:                             ; preds = %.lr.ph45
  %31 = trunc i64 %25 to i32
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %.lr.ph53
  %.232.lcssa = phi i32 [ %20, %.lr.ph53 ], [ %28, %._crit_edge.loopexit ]
  %.2.lcssa = phi i32 [ %.151, %.lr.ph53 ], [ %31, %._crit_edge.loopexit ]
  %.lcssa = phi i1 [ %21, %.lr.ph53 ], [ %29, %._crit_edge.loopexit ]
  %32 = trunc nuw i64 %indvars.iv.next66 to i32
  %33 = add nsw i32 %.2.lcssa, %32
  %spec.select = tail call i32 @llvm.smax.i32(i32 %33, i32 %.02850)
  %.129 = select i1 %.lcssa, i32 %.02850, i32 %spec.select
  %34 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2) #2
  %35 = icmp ugt i64 %34, %indvars.iv.next66
  %36 = icmp sgt i32 %.2.lcssa, -1
  %37 = select i1 %35, i1 %36, i1 false
  br i1 %37, label %.lr.ph53, label %._crit_edge54, !llvm.loop !12

._crit_edge54:                                    ; preds = %._crit_edge, %.critedge
  %.028.lcssa = phi i32 [ %.027.lcssa, %.critedge ], [ %.129, %._crit_edge ]
  ret i32 %.028.lcssa
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass