; LLVM IR from FrancesoM/Bisc8FX :: sdk_projects/bisc8_platform/ps7_cortexa9_0/standalone_domain/bsp/ps7_cortexa9_0_ (IntrHandler)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XUsbPs = type { %struct.XUsbPs_SetupData, %struct.XUsbPs_Config, i32, ptr, %struct.XUsbPs_DeviceConfig, ptr, ptr, i32, ptr, i8, ptr }
%struct.XUsbPs_SetupData = type { i8, i8, i16, i16, i16 }
%struct.XUsbPs_Config = type { i16, i32 }
%struct.XUsbPs_DeviceConfig = type { i8, [12 x %struct.XUsbPs_EpConfig], i32, [12 x %struct.XUsbPs_Endpoint], i32 }
%struct.XUsbPs_EpConfig = type { %struct.XUsbPs_EpSetup, %struct.XUsbPs_EpSetup }
%struct.XUsbPs_EpSetup = type { i32, i32, i32, i16 }
%struct.XUsbPs_Endpoint = type { %struct.XUsbPs_EpOut, %struct.XUsbPs_EpIn }
%struct.XUsbPs_EpOut = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, ptr, i8, i32 }
%struct.XUsbPs_EpIn = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, ptr, i32 }

@Xil_AssertStatus = external global i32, align 4
@.str = external hidden unnamed_addr constant [167 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local void @XUsbPs_IntrHandler(ptr noundef %0) #0 {
  %2 = alloca ptr, align 8
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  %8 = load ptr, ptr %2, align 8, !tbaa !5
  %9 = icmp ne ptr %8, null
  br i1 %9, label %10, label %11

10:                                               ; preds = %1
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %12

11:                                               ; preds = %1
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 76)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 1, ptr %5, align 4
  br label %121

12:                                               ; preds = %10
  %13 = load ptr, ptr %2, align 8, !tbaa !5
  store ptr %13, ptr %3, align 8, !tbaa !5
  %14 = load ptr, ptr %3, align 8, !tbaa !5
  %15 = getelementptr inbounds %struct.XUsbPs, ptr %14, i32 0, i32 1
  %16 = getelementptr inbounds %struct.XUsbPs_Config, ptr %15, i32 0, i32 1
  %17 = load i32, ptr %16, align 4, !tbaa !11
  %18 = add i32 %17, 324
  %19 = zext i32 %18 to i64
  %20 = call i32 @Xil_In32(i64 noundef %19)
  store i32 %20, ptr %4, align 4, !tbaa !9
  %21 = load ptr, ptr %3, align 8, !tbaa !5
  %22 = getelementptr inbounds %struct.XUsbPs, ptr %21, i32 0, i32 1
  %23 = getelementptr inbounds %struct.XUsbPs_Config, ptr %22, i32 0, i32 1
  %24 = load i32, ptr %23, align 4, !tbaa !11
  %25 = add i32 %24, 324
  %26 = zext i32 %25 to i64
  %27 = load i32, ptr %4, align 4, !tbaa !9
  call void @Xil_Out32(i64 noundef %26, i32 noundef %27)
  %28 = load i32, ptr %4, align 4, !tbaa !9
  %29 = and i32 %28, 65536
  %30 = icmp ne i32 %29, 0
  br i1 %30, label %31, label %45

31:                                               ; preds = %12
  %32 = load ptr, ptr %3, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.XUsbPs, ptr %32, i32 0, i32 1
  %34 = getelementptr inbounds %struct.XUsbPs_Config, ptr %33, i32 0, i32 1
  %35 = load i32, ptr %34, align 4, !tbaa !11
  %36 = add i32 %35, 376
  %37 = zext i32 %36 to i64
  %38 = load ptr, ptr %3, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.XUsbPs, ptr %38, i32 0, i32 1
  %40 = getelementptr inbounds %struct.XUsbPs_Config, ptr %39, i32 0, i32 1
  %41 = load i32, ptr %40, align 4, !tbaa !11
  %42 = add i32 %41, 376
  %43 = zext i32 %42 to i64
  %44 = call i32 @Xil_In32(i64 noundef %43)
  call void @Xil_Out32(i64 noundef %37, i32 noundef %44)
  br label %45

45:                                               ; preds = %31, %12
  %46 = load i32, ptr %4, align 4, !tbaa !9
  %47 = and i32 %46, 64
  %48 = icmp ne i32 %47, 0
  br i1 %48, label %49, label %52

49:                                               ; preds = %45
  %50 = load ptr, ptr %3, align 8, !tbaa !5
  %51 = load i32, ptr %4, align 4, !tbaa !9
  call void @XUsbPs_IntrHandleReset(ptr noundef %50, i32 noundef %51)
  store i32 1, ptr %5, align 4
  br label %121

52:                                               ; preds = %45
  %53 = load i32, ptr %4, align 4, !tbaa !9
  %54 = load ptr, ptr %3, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.XUsbPs, ptr %54, i32 0, i32 7
  %56 = load i32, ptr %55, align 8, !tbaa !17
  %57 = and i32 %53, %56
  %58 = icmp ne i32 %57, 0
  br i1 %58, label %59, label %72

59:                                               ; preds = %52
  %60 = load ptr, ptr %3, align 8, !tbaa !5
  %61 = getelementptr inbounds %struct.XUsbPs, ptr %60, i32 0, i32 5
  %62 = load ptr, ptr %61, align 8, !tbaa !18
  %63 = icmp ne ptr %62, null
  br i1 %63, label %64, label %72

64:                                               ; preds = %59
  %65 = load ptr, ptr %3, align 8, !tbaa !5
  %66 = getelementptr inbounds %struct.XUsbPs, ptr %65, i32 0, i32 5
  %67 = load ptr, ptr %66, align 8, !tbaa !18
  %68 = load ptr, ptr %3, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.XUsbPs, ptr %68, i32 0, i32 6
  %70 = load ptr, ptr %69, align 8, !tbaa !19
  %71 = load i32, ptr %4, align 4, !tbaa !9
  call void %67(ptr noundef %70, i32 noundef %71)
  br label %72

72:                                               ; preds = %64, %59, %52
  %73 = load i32, ptr %4, align 4, !tbaa !9
  %74 = and i32 %73, 1
  %75 = icmp ne i32 %74, 0
  br i1 %75, label %76, label %120

76:                                               ; preds = %72
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  %77 = load ptr, ptr %3, align 8, !tbaa !5
  %78 = getelementptr inbounds %struct.XUsbPs, ptr %77, i32 0, i32 1
  %79 = getelementptr inbounds %struct.XUsbPs_Config, ptr %78, i32 0, i32 1
  %80 = load i32, ptr %79, align 4, !tbaa !11
  %81 = add i32 %80, 428
  %82 = zext i32 %81 to i64
  %83 = call i32 @Xil_In32(i64 noundef %82)
  store i32 %83, ptr %6, align 4, !tbaa !9
  %84 = load i32, ptr %6, align 4, !tbaa !9
  %85 = and i32 %84, 1
  %86 = icmp ne i32 %85, 0
  br i1 %86, label %87, label %91

87:                                               ; preds = %76
  %88 = load ptr, ptr %3, align 8, !tbaa !5
  call void @XUsbPs_IntrHandleEp0Setup(ptr noundef %88)
  %89 = load ptr, ptr %3, align 8, !tbaa !5
  %90 = call i32 @XUsbPs_EpPrime(ptr noundef %89, i8 noundef zeroext 0, i8 noundef zeroext 2)
  br label %91

91:                                               ; preds = %87, %76
  %92 = load ptr, ptr %3, align 8, !tbaa !5
  %93 = getelementptr inbounds %struct.XUsbPs, ptr %92, i32 0, i32 1
  %94 = getelementptr inbounds %struct.XUsbPs_Config, ptr %93, i32 0, i32 1
  %95 = load i32, ptr %94, align 4, !tbaa !11
  %96 = add i32 %95, 444
  %97 = zext i32 %96 to i64
  %98 = call i32 @Xil_In32(i64 noundef %97)
  store i32 %98, ptr %7, align 4, !tbaa !9
  %99 = load ptr, ptr %3, align 8, !tbaa !5
  %100 = getelementptr inbounds %struct.XUsbPs, ptr %99, i32 0, i32 1
  %101 = getelementptr inbounds %struct.XUsbPs_Config, ptr %100, i32 0, i32 1
  %102 = load i32, ptr %101, align 4, !tbaa !11
  %103 = add i32 %102, 444
  %104 = zext i32 %103 to i64
  %105 = load i32, ptr %7, align 4, !tbaa !9
  call void @Xil_Out32(i64 noundef %104, i32 noundef %105)
  %106 = load i32, ptr %7, align 4, !tbaa !9
  %107 = and i32 %106, 4095
  %108 = icmp ne i32 %107, 0
  br i1 %108, label %109, label %112

109:                                              ; preds = %91
  %110 = load ptr, ptr %3, align 8, !tbaa !5
  %111 = load i32, ptr %7, align 4, !tbaa !9
  call void @XUsbPs_IntrHandleRX(ptr noundef %110, i32 noundef %111)
  br label %112

112:                                              ; preds = %109, %91
  %113 = load i32, ptr %7, align 4, !tbaa !9
  %114 = and i32 %113, 268369920
  %115 = icmp ne i32 %114, 0
  br i1 %115, label %116, label %119

116:                                              ; preds = %112
  %117 = load ptr, ptr %3, align 8, !tbaa !5
  %118 = load i32, ptr %7, align 4, !tbaa !9
  call void @XUsbPs_IntrHandleTX(ptr noundef %117, i32 noundef %118)
  br label %119

119:                                              ; preds = %116, %112
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  br label %120

120:                                              ; preds = %119, %72
  store i32 0, ptr %5, align 4
  br label %121

121:                                              ; preds = %120, %49, %11
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #4
  %122 = load i32, ptr %5, align 4
  switch i32 %122, label %124 [
    i32 0, label %123
    i32 1, label %123
  ]

123:                                              ; preds = %121, %121
  ret void

124:                                              ; preds = %121
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @Xil_Assert(ptr noundef, i32 noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @Xil_Out32(i64 noundef, i32 noundef) #3

; Function Attrs: nounwind uwtable
declare hidden void @XUsbPs_IntrHandleReset(ptr noundef, i32 noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @XUsbPs_IntrHandleEp0Setup(ptr noundef) #0

declare i32 @XUsbPs_EpPrime(ptr noundef, i8 noundef zeroext, i8 noundef zeroext) #2

; Function Attrs: nounwind uwtable
declare hidden void @XUsbPs_IntrHandleRX(ptr noundef, i32 noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @XUsbPs_IntrHandleTX(ptr noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 12}
!12 = !{!"", !13, i64 0, !15, i64 8, !10, i64 16, !6, i64 24, !16, i64 32, !6, i64 2352, !6, i64 2360, !10, i64 2368, !6, i64 2376, !7, i64 2384, !6, i64 2392}
!13 = !{!"", !7, i64 0, !7, i64 1, !14, i64 2, !14, i64 4, !14, i64 6}
!14 = !{!"short", !7, i64 0}
!15 = !{!"", !14, i64 0, !10, i64 4}
!16 = !{!"", !7, i64 0, !7, i64 4, !10, i64 388, !7, i64 392, !10, i64 2312}
!17 = !{!12, !10, i64 2368}
!18 = !{!12, !6, i64 2352}
!19 = !{!12, !6, i64 2360}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@Xil_AssertStatus = external local_unnamed_addr global i32, align 4
@.str = external hidden unnamed_addr constant [167 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local void @XUsbPs_IntrHandler(ptr noundef %0) local_unnamed_addr #0 {
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %12, label %2

2:                                                ; preds = %1
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !5
  %3 = getelementptr inbounds i8, ptr %0, i64 12
  %4 = load i32, ptr %3, align 4, !tbaa !9
  %5 = add i32 %4, 324
  %6 = zext i32 %5 to i64
  %7 = tail call i32 @Xil_In32(i64 noundef %6)
  %8 = load i32, ptr %3, align 4, !tbaa !9
  %9 = add i32 %8, 324
  %10 = zext i32 %9 to i64
  tail call void @Xil_Out32(i64 noundef %10, i32 noundef %7)
  %11 = and i32 %7, 65536
  %.not31 = icmp eq i32 %11, 0
  br i1 %.not31, label %18, label %13

12:                                               ; preds = %1
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 76) #3
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %54

13:                                               ; preds = %2
  %14 = load i32, ptr %3, align 4, !tbaa !9
  %15 = add i32 %14, 376
  %16 = zext i32 %15 to i64
  %17 = tail call i32 @Xil_In32(i64 noundef %16)
  tail call void @Xil_Out32(i64 noundef %16, i32 noundef %17)
  br label %18

18:                                               ; preds = %13, %2
  %19 = and i32 %7, 64
  %.not32 = icmp eq i32 %19, 0
  br i1 %.not32, label %21, label %20

20:                                               ; preds = %18
  tail call void @XUsbPs_IntrHandleReset(ptr noundef nonnull %0, i32 noundef %7)
  br label %54

21:                                               ; preds = %18
  %22 = getelementptr inbounds i8, ptr %0, i64 2368
  %23 = load i32, ptr %22, align 8, !tbaa !16
  %24 = and i32 %23, %7
  %.not33 = icmp eq i32 %24, 0
  br i1 %.not33, label %31, label %25

25:                                               ; preds = %21
  %26 = getelementptr inbounds i8, ptr %0, i64 2352
  %27 = load ptr, ptr %26, align 8, !tbaa !17
  %.not34 = icmp eq ptr %27, null
  br i1 %.not34, label %31, label %28

28:                                               ; preds = %25
  %29 = getelementptr inbounds i8, ptr %0, i64 2360
  %30 = load ptr, ptr %29, align 8, !tbaa !18
  tail call void %27(ptr noundef %30, i32 noundef %7) #3
  br label %31

31:                                               ; preds = %28, %25, %21
  %32 = and i32 %7, 1
  %.not35 = icmp eq i32 %32, 0
  br i1 %.not35, label %54, label %33

33:                                               ; preds = %31
  %34 = load i32, ptr %3, align 4, !tbaa !9
  %35 = add i32 %34, 428
  %36 = zext i32 %35 to i64
  %37 = tail call i32 @Xil_In32(i64 noundef %36)
  %38 = and i32 %37, 1
  %.not36 = icmp eq i32 %38, 0
  br i1 %.not36, label %41, label %39

39:                                               ; preds = %33
  tail call void @XUsbPs_IntrHandleEp0Setup(ptr noundef nonnull %0)
  %40 = tail call i32 @XUsbPs_EpPrime(ptr noundef nonnull %0, i8 noundef zeroext 0, i8 noundef zeroext 2) #3
  br label %41

41:                                               ; preds = %39, %33
  %42 = load i32, ptr %3, align 4, !tbaa !9
  %43 = add i32 %42, 444
  %44 = zext i32 %43 to i64
  %45 = tail call i32 @Xil_In32(i64 noundef %44)
  %46 = load i32, ptr %3, align 4, !tbaa !9
  %47 = add i32 %46, 444
  %48 = zext i32 %47 to i64
  tail call void @Xil_Out32(i64 noundef %48, i32 noundef %45)
  %49 = and i32 %45, 4095
  %.not37 = icmp eq i32 %49, 0
  br i1 %.not37, label %51, label %50

50:                                               ; preds = %41
  tail call void @XUsbPs_IntrHandleRX(ptr noundef nonnull %0, i32 noundef %45)
  br label %51

51:                                               ; preds = %50, %41
  %52 = and i32 %45, 268369920
  %.not38 = icmp eq i32 %52, 0
  br i1 %.not38, label %54, label %53

53:                                               ; preds = %51
  tail call void @XUsbPs_IntrHandleTX(ptr noundef nonnull %0, i32 noundef %45)
  br label %54

54:                                               ; preds = %31, %53, %51, %20, %12
  ret void
}

declare void @Xil_Assert(ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) local_unnamed_addr #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @Xil_Out32(i64 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
declare hidden void @XUsbPs_IntrHandleReset(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare hidden void @XUsbPs_IntrHandleEp0Setup(ptr noundef) local_unnamed_addr #0

declare i32 @XUsbPs_EpPrime(ptr noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare hidden void @XUsbPs_IntrHandleRX(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare hidden void @XUsbPs_IntrHandleTX(ptr noundef, i32 noundef) local_unnamed_addr #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 12}
!10 = !{!"", !11, i64 0, !13, i64 8, !6, i64 16, !14, i64 24, !15, i64 32, !14, i64 2352, !14, i64 2360, !6, i64 2368, !14, i64 2376, !7, i64 2384, !14, i64 2392}
!11 = !{!"", !7, i64 0, !7, i64 1, !12, i64 2, !12, i64 4, !12, i64 6}
!12 = !{!"short", !7, i64 0}
!13 = !{!"", !12, i64 0, !6, i64 4}
!14 = !{!"any pointer", !7, i64 0}
!15 = !{!"", !7, i64 0, !7, i64 4, !6, i64 388, !7, i64 392, !6, i64 2312}
!16 = !{!10, !6, i64 2368}
!17 = !{!10, !14, i64 2352}
!18 = !{!10, !14, i64 2360}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass