; LLVM IR from Izaron/ACM-ICPC :: Google Code Jam/2017/Round 1B/steed_2_cruise_control.ll (Z3caniRSt6vectorIeSaIeEES2_ee)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z3caniRSt6vectorIeSaIeEES2_ee(i32 noundef %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull align 8 dereferenceable(24) %2, x86_fp80 noundef %3, x86_fp80 noundef %4) #0 {
  %6 = alloca i1, align 1
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca x86_fp80, align 16
  %11 = alloca x86_fp80, align 16
  %12 = alloca x86_fp80, align 16
  %13 = alloca x86_fp80, align 16
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  store i32 %0, ptr %7, align 4, !tbaa !5
  store ptr %1, ptr %8, align 8, !tbaa !9
  store ptr %2, ptr %9, align 8, !tbaa !9
  store x86_fp80 %3, ptr %10, align 16, !tbaa !11
  store x86_fp80 %4, ptr %11, align 16, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 16, ptr %12) #2
  call void @llvm.lifetime.start.p0(i64 16, ptr %13) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #2
  store i32 0, ptr %14, align 4, !tbaa !5
  br label %16

16:                                               ; preds = %52, %5
  %17 = load i32, ptr %14, align 4, !tbaa !5
  %18 = load i32, ptr %7, align 4, !tbaa !5
  %19 = icmp slt i32 %17, %18
  br i1 %19, label %21, label %20

20:                                               ; preds = %16
  store i32 2, ptr %15, align 4
  br label %55

21:                                               ; preds = %16
  %22 = load ptr, ptr %9, align 8, !tbaa !9
  %23 = load i32, ptr %14, align 4, !tbaa !5
  %24 = sext i32 %23 to i64
  %25 = call noundef nonnull align 16 dereferenceable(16) ptr @_ZNSt6vectorIeSaIeEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %22, i64 noundef %24) #2
  %26 = load x86_fp80, ptr %25, align 16, !tbaa !11
  %27 = load x86_fp80, ptr %11, align 16, !tbaa !11
  %28 = fcmp oge x86_fp80 %26, %27
  br i1 %28, label %29, label %30

29:                                               ; preds = %21
  br label %52

30:                                               ; preds = %21
  %31 = load ptr, ptr %8, align 8, !tbaa !9
  %32 = load i32, ptr %14, align 4, !tbaa !5
  %33 = sext i32 %32 to i64
  %34 = call noundef nonnull align 16 dereferenceable(16) ptr @_ZNSt6vectorIeSaIeEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %31, i64 noundef %33) #2
  %35 = load x86_fp80, ptr %34, align 16, !tbaa !11
  store x86_fp80 %35, ptr %12, align 16, !tbaa !11
  %36 = load x86_fp80, ptr %12, align 16, !tbaa !11
  %37 = load x86_fp80, ptr %11, align 16, !tbaa !11
  %38 = load ptr, ptr %9, align 8, !tbaa !9
  %39 = load i32, ptr %14, align 4, !tbaa !5
  %40 = sext i32 %39 to i64
  %41 = call noundef nonnull align 16 dereferenceable(16) ptr @_ZNSt6vectorIeSaIeEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %38, i64 noundef %40) #2
  %42 = load x86_fp80, ptr %41, align 16, !tbaa !11
  %43 = fsub x86_fp80 %37, %42
  %44 = fdiv x86_fp80 %36, %43
  store x86_fp80 %44, ptr %13, align 16, !tbaa !11
  %45 = load x86_fp80, ptr %13, align 16, !tbaa !11
  %46 = load x86_fp80, ptr %11, align 16, !tbaa !11
  %47 = fmul x86_fp80 %45, %46
  %48 = load x86_fp80, ptr %10, align 16, !tbaa !11
  %49 = fcmp oge x86_fp80 %47, %48
  br i1 %49, label %50, label %51

50:                                               ; preds = %30
  br label %52

51:                                               ; preds = %30
  store i1 false, ptr %6, align 1
  store i32 1, ptr %15, align 4
  br label %55

52:                                               ; preds = %50, %29
  %53 = load i32, ptr %14, align 4, !tbaa !5
  %54 = add nsw i32 %53, 1
  store i32 %54, ptr %14, align 4, !tbaa !5
  br label %16, !llvm.loop !13

55:                                               ; preds = %51, %20
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #2
  %56 = load i32, ptr %15, align 4
  switch i32 %56, label %58 [
    i32 2, label %57
  ]

57:                                               ; preds = %55
  store i1 true, ptr %6, align 1
  store i32 1, ptr %15, align 4
  br label %58

58:                                               ; preds = %57, %55
  call void @llvm.lifetime.end.p0(i64 16, ptr %13) #2
  call void @llvm.lifetime.end.p0(i64 16, ptr %12) #2
  %59 = load i1, ptr %6, align 1
  ret i1 %59
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 16 dereferenceable(16) ptr @_ZNSt6vectorIeSaIeEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long double", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z3caniRSt6vectorIeSaIeEES2_ee(i32 noundef %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull align 8 dereferenceable(24) %2, x86_fp80 noundef %3, x86_fp80 noundef %4) local_unnamed_addr #0 {
  %.not20 = icmp slt i32 %0, 1
  br i1 %.not20, label %.critedge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %5
  %6 = zext nneg i32 %0 to i64
  %wide.trip.count = zext nneg i32 %0 to i64
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %19
  %indvars.iv = phi i64 [ 0, %.lr.ph.preheader ], [ %indvars.iv.next, %19 ]
  %.not22 = phi i1 [ false, %.lr.ph.preheader ], [ %.not, %19 ]
  %7 = tail call noundef nonnull align 16 dereferenceable(16) ptr @_ZNSt6vectorIeSaIeEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %indvars.iv) #1
  %8 = load x86_fp80, ptr %7, align 16, !tbaa !5
  %9 = fcmp ult x86_fp80 %8, %4
  br i1 %9, label %10, label %19

10:                                               ; preds = %.lr.ph
  %11 = tail call noundef nonnull align 16 dereferenceable(16) ptr @_ZNSt6vectorIeSaIeEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv) #1
  %12 = load x86_fp80, ptr %11, align 16, !tbaa !5
  %13 = tail call noundef nonnull align 16 dereferenceable(16) ptr @_ZNSt6vectorIeSaIeEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %indvars.iv) #1
  %14 = load x86_fp80, ptr %13, align 16, !tbaa !5
  %15 = fsub x86_fp80 %4, %14
  %16 = fdiv x86_fp80 %12, %15
  %17 = fmul x86_fp80 %16, %4
  %18 = fcmp ult x86_fp80 %17, %3
  br i1 %18, label %.critedge, label %19

19:                                               ; preds = %10, %.lr.ph
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %.not = icmp uge i64 %indvars.iv.next, %6
  %exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond, label %.critedge, label %.lr.ph, !llvm.loop !9

.critedge:                                        ; preds = %10, %19, %5
  %.not.lcssa = phi i1 [ true, %5 ], [ %.not, %19 ], [ %.not22, %10 ]
  ret i1 %.not.lcssa
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 16 dereferenceable(16) ptr @_ZNSt6vectorIeSaIeEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass