; LLVM IR from tangjz/acm-icpc :: Summer_Training/2016-07-19/A - Abandoned country - liuzy.ll (Z5Unionii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@father = external dso_local global [110000 x i32], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z4findi(i32 noundef) #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z5Unionii(i32 noundef %0, i32 noundef %1) #1 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  %8 = load i32, ptr %3, align 4, !tbaa !5
  %9 = call noundef i32 @_Z4findi(i32 noundef %8)
  store i32 %9, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  %10 = load i32, ptr %4, align 4, !tbaa !5
  %11 = call noundef i32 @_Z4findi(i32 noundef %10)
  store i32 %11, ptr %6, align 4, !tbaa !5
  %12 = load i32, ptr %5, align 4, !tbaa !5
  %13 = load i32, ptr %6, align 4, !tbaa !5
  %14 = icmp eq i32 %12, %13
  br i1 %14, label %15, label %16

15:                                               ; preds = %2
  store i32 1, ptr %7, align 4
  br label %41

16:                                               ; preds = %2
  %17 = load i32, ptr %5, align 4, !tbaa !5
  %18 = sext i32 %17 to i64
  %19 = getelementptr inbounds [110000 x i32], ptr @father, i64 0, i64 %18
  %20 = load i32, ptr %19, align 4, !tbaa !5
  %21 = load i32, ptr %6, align 4, !tbaa !5
  %22 = sext i32 %21 to i64
  %23 = getelementptr inbounds [110000 x i32], ptr @father, i64 0, i64 %22
  %24 = load i32, ptr %23, align 4, !tbaa !5
  %25 = icmp sgt i32 %20, %24
  br i1 %25, label %26, label %27

26:                                               ; preds = %16
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %5, ptr noundef nonnull align 4 dereferenceable(4) %6) #3
  br label %27

27:                                               ; preds = %26, %16
  %28 = load i32, ptr %6, align 4, !tbaa !5
  %29 = sext i32 %28 to i64
  %30 = getelementptr inbounds [110000 x i32], ptr @father, i64 0, i64 %29
  %31 = load i32, ptr %30, align 4, !tbaa !5
  %32 = load i32, ptr %5, align 4, !tbaa !5
  %33 = sext i32 %32 to i64
  %34 = getelementptr inbounds [110000 x i32], ptr @father, i64 0, i64 %33
  %35 = load i32, ptr %34, align 4, !tbaa !5
  %36 = add nsw i32 %35, %31
  store i32 %36, ptr %34, align 4, !tbaa !5
  %37 = load i32, ptr %5, align 4, !tbaa !5
  %38 = load i32, ptr %6, align 4, !tbaa !5
  %39 = sext i32 %38 to i64
  %40 = getelementptr inbounds [110000 x i32], ptr @father, i64 0, i64 %39
  store i32 %37, ptr %40, align 4, !tbaa !5
  store i32 0, ptr %7, align 4
  br label %41

41:                                               ; preds = %27, %15
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  %42 = load i32, ptr %7, align 4
  switch i32 %42, label %44 [
    i32 0, label %43
    i32 1, label %43
  ]

43:                                               ; preds = %41, %41
  ret void

44:                                               ; preds = %41
  unreachable
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@father = external dso_local local_unnamed_addr global [110000 x i32], align 16

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z4findi(i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z5Unionii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #1 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
  %5 = tail call noundef i32 @_Z4findi(i32 noundef %0)
  store i32 %5, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
  %6 = tail call noundef i32 @_Z4findi(i32 noundef %1)
  store i32 %6, ptr %4, align 4, !tbaa !5
  %7 = icmp eq i32 %5, %6
  br i1 %7, label %24, label %8

8:                                                ; preds = %2
  %9 = sext i32 %5 to i64
  %10 = getelementptr inbounds [110000 x i32], ptr @father, i64 0, i64 %9
  %11 = load i32, ptr %10, align 4, !tbaa !5
  %12 = sext i32 %6 to i64
  %13 = getelementptr inbounds [110000 x i32], ptr @father, i64 0, i64 %12
  %14 = load i32, ptr %13, align 4, !tbaa !5
  %15 = icmp sgt i32 %11, %14
  br i1 %15, label %16, label %17

16:                                               ; preds = %8
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %3, ptr noundef nonnull align 4 dereferenceable(4) %4) #3
  %.pre = load i32, ptr %4, align 4, !tbaa !5
  %.phi.trans.insert = sext i32 %.pre to i64
  %.phi.trans.insert3 = getelementptr inbounds [110000 x i32], ptr @father, i64 0, i64 %.phi.trans.insert
  %.pre4 = load i32, ptr %.phi.trans.insert3, align 4, !tbaa !5
  %.pre5 = load i32, ptr %3, align 4, !tbaa !5
  %.phi.trans.insert6 = sext i32 %.pre5 to i64
  %.phi.trans.insert7 = getelementptr inbounds [110000 x i32], ptr @father, i64 0, i64 %.phi.trans.insert6
  %.pre8 = load i32, ptr %.phi.trans.insert7, align 4, !tbaa !5
  br label %17

17:                                               ; preds = %16, %8
  %.pre-phi9 = phi i64 [ %.phi.trans.insert6, %16 ], [ %9, %8 ]
  %.pre-phi = phi i64 [ %.phi.trans.insert, %16 ], [ %12, %8 ]
  %18 = phi i32 [ %.pre8, %16 ], [ %11, %8 ]
  %19 = phi i32 [ %.pre5, %16 ], [ %5, %8 ]
  %20 = phi i32 [ %.pre4, %16 ], [ %14, %8 ]
  %21 = getelementptr inbounds [110000 x i32], ptr @father, i64 0, i64 %.pre-phi
  %22 = getelementptr inbounds [110000 x i32], ptr @father, i64 0, i64 %.pre-phi9
  %23 = add nsw i32 %18, %20
  store i32 %23, ptr %22, align 4, !tbaa !5
  store i32 %19, ptr %21, align 4, !tbaa !5
  br label %24

24:                                               ; preds = %2, %17
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: BDCEPass,EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass