; LLVM IR from Dimandragon/non-parametric-dsp :: alglib-cpp/src/ap.ll (ZN11alglib_impl8ae_cpuidEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZN11alglib_implL21_ae_cpuid_initializedE = external hidden global i8, align 1
@_ZN11alglib_implL18_ae_cpuid_has_sse2E = external hidden global i8, align 1
@_ZN11alglib_implL18_ae_cpuid_has_avx2E = external hidden global i8, align 1
@_ZN11alglib_implL17_ae_cpuid_has_fmaE = external hidden global i8, align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_ZN11alglib_impl8ae_cpuidEv() #1 {
  %1 = alloca i64, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %1) #2
  %2 = load volatile i8, ptr @_ZN11alglib_implL21_ae_cpuid_initializedE, align 1, !tbaa !5, !range !9, !noundef !10
  %3 = trunc i8 %2 to i1
  br i1 %3, label %5, label %4

4:                                                ; preds = %0
  store volatile i8 1, ptr @_ZN11alglib_implL21_ae_cpuid_initializedE, align 1, !tbaa !5
  br label %5

5:                                                ; preds = %4, %0
  store i64 0, ptr %1, align 8, !tbaa !11
  %6 = load volatile i8, ptr @_ZN11alglib_implL18_ae_cpuid_has_sse2E, align 1, !tbaa !5, !range !9, !noundef !10
  %7 = trunc i8 %6 to i1
  br i1 %7, label %8, label %11

8:                                                ; preds = %5
  %9 = load i64, ptr %1, align 8, !tbaa !11
  %10 = or i64 %9, 1
  store i64 %10, ptr %1, align 8, !tbaa !11
  br label %11

11:                                               ; preds = %8, %5
  %12 = load volatile i8, ptr @_ZN11alglib_implL18_ae_cpuid_has_avx2E, align 1, !tbaa !5, !range !9, !noundef !10
  %13 = trunc i8 %12 to i1
  br i1 %13, label %14, label %17

14:                                               ; preds = %11
  %15 = load i64, ptr %1, align 8, !tbaa !11
  %16 = or i64 %15, 2
  store i64 %16, ptr %1, align 8, !tbaa !11
  br label %17

17:                                               ; preds = %14, %11
  %18 = load volatile i8, ptr @_ZN11alglib_implL17_ae_cpuid_has_fmaE, align 1, !tbaa !5, !range !9, !noundef !10
  %19 = trunc i8 %18 to i1
  br i1 %19, label %20, label %23

20:                                               ; preds = %17
  %21 = load i64, ptr %1, align 8, !tbaa !11
  %22 = or i64 %21, 4
  store i64 %22, ptr %1, align 8, !tbaa !11
  br label %23

23:                                               ; preds = %20, %17
  %24 = load i64, ptr %1, align 8, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 8, ptr %1) #2
  ret i64 %24
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"bool", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{i8 0, i8 2}
!10 = !{}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZN11alglib_implL21_ae_cpuid_initializedE = external hidden global i8, align 1
@_ZN11alglib_implL18_ae_cpuid_has_sse2E = external hidden global i8, align 1
@_ZN11alglib_implL18_ae_cpuid_has_avx2E = external hidden global i8, align 1
@_ZN11alglib_implL17_ae_cpuid_has_fmaE = external hidden global i8, align 1

; Function Attrs: mustprogress nofree norecurse nounwind memory(readwrite, argmem: none) uwtable
define dso_local noundef range(i64 0, 8) i64 @_ZN11alglib_impl8ae_cpuidEv() local_unnamed_addr #0 {
  %1 = load volatile i8, ptr @_ZN11alglib_implL21_ae_cpuid_initializedE, align 1, !tbaa !5, !range !9, !noundef !10
  %2 = trunc nuw i8 %1 to i1
  br i1 %2, label %4, label %3

3:                                                ; preds = %0
  store volatile i8 1, ptr @_ZN11alglib_implL21_ae_cpuid_initializedE, align 1, !tbaa !5
  br label %4

4:                                                ; preds = %3, %0
  %5 = load volatile i8, ptr @_ZN11alglib_implL18_ae_cpuid_has_sse2E, align 1, !tbaa !5, !range !9, !noundef !10
  %spec.select = zext nneg i8 %5 to i64
  %6 = load volatile i8, ptr @_ZN11alglib_implL18_ae_cpuid_has_avx2E, align 1, !tbaa !5, !range !9, !noundef !10
  %7 = trunc nuw i8 %6 to i1
  %8 = or disjoint i64 %spec.select, 2
  %.1 = select i1 %7, i64 %8, i64 %spec.select
  %9 = load volatile i8, ptr @_ZN11alglib_implL17_ae_cpuid_has_fmaE, align 1, !tbaa !5, !range !9, !noundef !10
  %10 = trunc nuw i8 %9 to i1
  %11 = or disjoint i64 %.1, 4
  %.2 = select i1 %10, i64 %11, i64 %.1
  ret i64 %.2
}

attributes #0 = { mustprogress nofree norecurse nounwind memory(readwrite, argmem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"bool", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{i8 0, i8 2}
!10 = !{}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass