; LLVM IR from FrancesoM/Bisc8FX :: sdk_projects/bisc8_platform/ps7_cortexa9_0/standalone_domain/bsp/ps7_cortexa9_0_ (SdBusSpeed)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XSdPs = type { %struct.XSdPs_Config, i32, i32, i32, i32, i8, i8, i8, i8, i32, i8, [4 x i32], i32, [4 x i32], i32, i32, i32, i32, i32, i64, i16, i32, i8, i32 }
%struct.XSdPs_Config = type { i16, i32, i32, i32, i32, i32, i32, i32, i8 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @XSdPs_SetupReadDma(ptr noundef, i16 noundef zeroext, i16 noundef zeroext, ptr noundef) #1

declare i32 @XSdPs_CmdTransfer(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i16 @XSdPs_ReadReg16(i32 noundef, i8 noundef zeroext) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @XSdPs_WriteReg16(i32 noundef, i8 noundef zeroext, i16 noundef zeroext) #2

; Function Attrs: nounwind uwtable
define dso_local i32 @XSdPs_Change_SdBusSpeed(ptr noundef %0) #3 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i16, align 2
  %6 = alloca i16, align 2
  %7 = alloca i16, align 2
  %8 = alloca [64 x i8], align 16
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #5
  call void @llvm.lifetime.start.p0(i64 2, ptr %5) #5
  call void @llvm.lifetime.start.p0(i64 2, ptr %6) #5
  call void @llvm.lifetime.start.p0(i64 2, ptr %7) #5
  call void @llvm.lifetime.start.p0(i64 64, ptr %8) #5
  call void @llvm.memset.p0.i64(ptr align 16 %8, i8 0, i64 64, i1 false)
  %9 = load ptr, ptr %2, align 8, !tbaa !5
  %10 = call i32 @XSdPs_CalcBusSpeed(ptr noundef %9, ptr noundef %4)
  store i32 %10, ptr %3, align 4, !tbaa !9
  %11 = load i32, ptr %3, align 4, !tbaa !9
  %12 = sext i32 %11 to i64
  %13 = icmp ne i64 %12, 0
  br i1 %13, label %14, label %15

14:                                               ; preds = %1
  store i32 1, ptr %3, align 4, !tbaa !9
  br label %64

15:                                               ; preds = %1
  store i16 1, ptr %5, align 2, !tbaa !11
  store i16 64, ptr %6, align 2, !tbaa !11
  %16 = load ptr, ptr %2, align 8, !tbaa !5
  %17 = load i16, ptr %5, align 2, !tbaa !11
  %18 = load i16, ptr %6, align 2, !tbaa !11
  %19 = getelementptr inbounds [64 x i8], ptr %8, i64 0, i64 0
  call void @XSdPs_SetupReadDma(ptr noundef %16, i16 noundef zeroext %17, i16 noundef zeroext %18, ptr noundef %19)
  %20 = load ptr, ptr %2, align 8, !tbaa !5
  %21 = load i32, ptr %4, align 4, !tbaa !9
  %22 = load i16, ptr %5, align 2, !tbaa !11
  %23 = zext i16 %22 to i32
  %24 = call i32 @XSdPs_CmdTransfer(ptr noundef %20, i32 noundef 1536, i32 noundef %21, i32 noundef %23)
  store i32 %24, ptr %3, align 4, !tbaa !9
  %25 = load i32, ptr %3, align 4, !tbaa !9
  %26 = sext i32 %25 to i64
  %27 = icmp ne i64 %26, 0
  br i1 %27, label %28, label %29

28:                                               ; preds = %15
  store i32 1, ptr %3, align 4, !tbaa !9
  br label %64

29:                                               ; preds = %15
  %30 = load ptr, ptr %2, align 8, !tbaa !5
  %31 = call i32 @XSdps_CheckTransferDone(ptr noundef %30)
  store i32 %31, ptr %3, align 4, !tbaa !9
  %32 = load i32, ptr %3, align 4, !tbaa !9
  %33 = sext i32 %32 to i64
  %34 = icmp ne i64 %33, 0
  br i1 %34, label %35, label %36

35:                                               ; preds = %29
  store i32 1, ptr %3, align 4, !tbaa !9
  br label %36

36:                                               ; preds = %35, %29
  %37 = load ptr, ptr %2, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.XSdPs, ptr %37, i32 0, i32 10
  %39 = load i8, ptr %38, align 4, !tbaa !13
  %40 = zext i8 %39 to i32
  %41 = icmp ne i32 %40, 0
  br i1 %41, label %42, label %63

42:                                               ; preds = %36
  %43 = load ptr, ptr %2, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.XSdPs, ptr %43, i32 0, i32 0
  %45 = getelementptr inbounds %struct.XSdPs_Config, ptr %44, i32 0, i32 1
  %46 = load i32, ptr %45, align 4, !tbaa !17
  %47 = call zeroext i16 @XSdPs_ReadReg16(i32 noundef %46, i8 noundef zeroext 62)
  store i16 %47, ptr %7, align 2, !tbaa !11
  %48 = load i16, ptr %7, align 2, !tbaa !11
  %49 = zext i16 %48 to i32
  %50 = and i32 %49, 65528
  %51 = trunc i32 %50 to i16
  store i16 %51, ptr %7, align 2, !tbaa !11
  %52 = load ptr, ptr %2, align 8, !tbaa !5
  %53 = getelementptr inbounds %struct.XSdPs, ptr %52, i32 0, i32 0
  %54 = getelementptr inbounds %struct.XSdPs_Config, ptr %53, i32 0, i32 1
  %55 = load i32, ptr %54, align 4, !tbaa !17
  %56 = load i16, ptr %7, align 2, !tbaa !11
  %57 = zext i16 %56 to i32
  %58 = load ptr, ptr %2, align 8, !tbaa !5
  %59 = getelementptr inbounds %struct.XSdPs, ptr %58, i32 0, i32 16
  %60 = load i32, ptr %59, align 4, !tbaa !18
  %61 = or i32 %57, %60
  %62 = trunc i32 %61 to i16
  call void @XSdPs_WriteReg16(i32 noundef %55, i8 noundef zeroext 62, i16 noundef zeroext %62)
  br label %63

63:                                               ; preds = %42, %36
  store i32 0, ptr %3, align 4, !tbaa !9
  br label %64

64:                                               ; preds = %63, %28, %14
  %65 = load i32, ptr %3, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 64, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 2, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 2, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 2, ptr %5) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #5
  ret i32 %65
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #4

declare i32 @XSdPs_CalcBusSpeed(ptr noundef, ptr noundef) #1

declare i32 @XSdps_CheckTransferDone(ptr noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"short", !7, i64 0}
!13 = !{!14, !7, i64 60}
!14 = !{!"", !15, i64 0, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !7, i64 52, !7, i64 53, !7, i64 54, !7, i64 55, !10, i64 56, !7, i64 60, !7, i64 64, !10, i64 80, !7, i64 84, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !16, i64 120, !12, i64 128, !10, i64 132, !7, i64 136, !10, i64 140}
!15 = !{!"", !12, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !7, i64 32}
!16 = !{!"long", !7, i64 0}
!17 = !{!14, !10, i64 4}
!18 = !{!14, !10, i64 108}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @XSdPs_SetupReadDma(ptr noundef, i16 noundef zeroext, i16 noundef zeroext, ptr noundef) local_unnamed_addr #1

declare i32 @XSdPs_CmdTransfer(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i16 @XSdPs_ReadReg16(i32 noundef, i8 noundef zeroext) local_unnamed_addr #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @XSdPs_WriteReg16(i32 noundef, i8 noundef zeroext, i16 noundef zeroext) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @XSdPs_Change_SdBusSpeed(ptr noundef %0) local_unnamed_addr #3 {
  %2 = alloca i32, align 4
  %3 = alloca [64 x i8], align 16
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #5
  call void @llvm.lifetime.start.p0(i64 64, ptr nonnull %3) #5
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(64) %3, i8 0, i64 64, i1 false)
  %4 = call i32 @XSdPs_CalcBusSpeed(ptr noundef %0, ptr noundef nonnull %2) #5
  %.not = icmp eq i32 %4, 0
  br i1 %.not, label %5, label %22

5:                                                ; preds = %1
  call void @XSdPs_SetupReadDma(ptr noundef %0, i16 noundef zeroext 1, i16 noundef zeroext 64, ptr noundef nonnull %3) #5
  %6 = load i32, ptr %2, align 4, !tbaa !5
  %7 = call i32 @XSdPs_CmdTransfer(ptr noundef %0, i32 noundef 1536, i32 noundef %6, i32 noundef 1) #5
  %.not16 = icmp eq i32 %7, 0
  br i1 %.not16, label %8, label %22

8:                                                ; preds = %5
  %9 = call i32 @XSdps_CheckTransferDone(ptr noundef %0) #5
  %10 = getelementptr inbounds i8, ptr %0, i64 60
  %11 = load i8, ptr %10, align 4, !tbaa !9
  %.not17 = icmp eq i8 %11, 0
  br i1 %.not17, label %22, label %12

12:                                               ; preds = %8
  %13 = getelementptr inbounds i8, ptr %0, i64 4
  %14 = load i32, ptr %13, align 4, !tbaa !14
  %15 = call zeroext i16 @XSdPs_ReadReg16(i32 noundef %14, i8 noundef zeroext 62)
  %16 = and i16 %15, -8
  %17 = load i32, ptr %13, align 4, !tbaa !14
  %18 = getelementptr inbounds i8, ptr %0, i64 108
  %19 = load i32, ptr %18, align 4, !tbaa !15
  %20 = trunc i32 %19 to i16
  %21 = or i16 %16, %20
  call void @XSdPs_WriteReg16(i32 noundef %17, i8 noundef zeroext 62, i16 noundef zeroext %21)
  br label %22

22:                                               ; preds = %8, %12, %5, %1
  %.0 = phi i32 [ 1, %1 ], [ 1, %5 ], [ 0, %12 ], [ 0, %8 ]
  call void @llvm.lifetime.end.p0(i64 64, ptr nonnull %3) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #5
  ret i32 %.0
}

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #4

declare i32 @XSdPs_CalcBusSpeed(ptr noundef, ptr noundef) local_unnamed_addr #1

declare i32 @XSdps_CheckTransferDone(ptr noundef) local_unnamed_addr #1

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !7, i64 60}
!10 = !{!"", !11, i64 0, !6, i64 36, !6, i64 40, !6, i64 44, !6, i64 48, !7, i64 52, !7, i64 53, !7, i64 54, !7, i64 55, !6, i64 56, !7, i64 60, !7, i64 64, !6, i64 80, !7, i64 84, !6, i64 100, !6, i64 104, !6, i64 108, !6, i64 112, !6, i64 116, !13, i64 120, !12, i64 128, !6, i64 132, !7, i64 136, !6, i64 140}
!11 = !{!"", !12, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !7, i64 32}
!12 = !{!"short", !7, i64 0}
!13 = !{!"long", !7, i64 0}
!14 = !{!10, !6, i64 4}
!15 = !{!10, !6, i64 108}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass