; LLVM IR from Muhammad-Magdi/problem-solving :: Backtracking/NQueens.ll (Z7solveNQi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@n = external dso_local global i32, align 4
@col = external dso_local global [15 x i8], align 1
@md = external dso_local global [30 x i8], align 16
@sd = external dso_local global [30 x i8], align 16
@board = external dso_local global [15 x [15 x i8]], align 16

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z9printGridv() #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z5validii(i32 noundef, i32 noundef) #2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z7solveNQi(i32 noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  store i32 %0, ptr %2, align 4, !tbaa !5
  %4 = load i32, ptr %2, align 4, !tbaa !5
  %5 = load i32, ptr @n, align 4, !tbaa !5
  %6 = icmp eq i32 %4, %5
  br i1 %6, label %7, label %8

7:                                                ; preds = %1
  call void @_Z9printGridv()
  br label %66

8:                                                ; preds = %1
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  store i32 0, ptr %3, align 4, !tbaa !5
  br label %9

9:                                                ; preds = %62, %8
  %10 = load i32, ptr %3, align 4, !tbaa !5
  %11 = load i32, ptr @n, align 4, !tbaa !5
  %12 = icmp slt i32 %10, %11
  br i1 %12, label %14, label %13

13:                                               ; preds = %9
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  br label %65

14:                                               ; preds = %9
  %15 = load i32, ptr %2, align 4, !tbaa !5
  %16 = load i32, ptr %3, align 4, !tbaa !5
  %17 = call noundef zeroext i1 @_Z5validii(i32 noundef %15, i32 noundef %16)
  br i1 %17, label %18, label %61

18:                                               ; preds = %14
  %19 = load i32, ptr %2, align 4, !tbaa !5
  %20 = load i32, ptr %3, align 4, !tbaa !5
  %21 = add nsw i32 %19, %20
  %22 = sext i32 %21 to i64
  %23 = getelementptr inbounds [30 x i8], ptr @sd, i64 0, i64 %22
  store i8 1, ptr %23, align 1, !tbaa !9
  %24 = load i32, ptr %2, align 4, !tbaa !5
  %25 = load i32, ptr %3, align 4, !tbaa !5
  %26 = sub nsw i32 %24, %25
  %27 = add nsw i32 %26, 15
  %28 = sext i32 %27 to i64
  %29 = getelementptr inbounds [30 x i8], ptr @md, i64 0, i64 %28
  store i8 1, ptr %29, align 1, !tbaa !9
  %30 = load i32, ptr %3, align 4, !tbaa !5
  %31 = sext i32 %30 to i64
  %32 = getelementptr inbounds [15 x i8], ptr @col, i64 0, i64 %31
  store i8 1, ptr %32, align 1, !tbaa !9
  %33 = load i32, ptr %2, align 4, !tbaa !5
  %34 = sext i32 %33 to i64
  %35 = getelementptr inbounds [15 x [15 x i8]], ptr @board, i64 0, i64 %34
  %36 = load i32, ptr %3, align 4, !tbaa !5
  %37 = sext i32 %36 to i64
  %38 = getelementptr inbounds [15 x i8], ptr %35, i64 0, i64 %37
  store i8 81, ptr %38, align 1, !tbaa !11
  %39 = load i32, ptr %2, align 4, !tbaa !5
  %40 = add nsw i32 %39, 1
  call void @_Z7solveNQi(i32 noundef %40)
  %41 = load i32, ptr %2, align 4, !tbaa !5
  %42 = load i32, ptr %3, align 4, !tbaa !5
  %43 = add nsw i32 %41, %42
  %44 = sext i32 %43 to i64
  %45 = getelementptr inbounds [30 x i8], ptr @sd, i64 0, i64 %44
  store i8 0, ptr %45, align 1, !tbaa !9
  %46 = load i32, ptr %2, align 4, !tbaa !5
  %47 = load i32, ptr %3, align 4, !tbaa !5
  %48 = sub nsw i32 %46, %47
  %49 = add nsw i32 %48, 15
  %50 = sext i32 %49 to i64
  %51 = getelementptr inbounds [30 x i8], ptr @md, i64 0, i64 %50
  store i8 0, ptr %51, align 1, !tbaa !9
  %52 = load i32, ptr %3, align 4, !tbaa !5
  %53 = sext i32 %52 to i64
  %54 = getelementptr inbounds [15 x i8], ptr @col, i64 0, i64 %53
  store i8 0, ptr %54, align 1, !tbaa !9
  %55 = load i32, ptr %2, align 4, !tbaa !5
  %56 = sext i32 %55 to i64
  %57 = getelementptr inbounds [15 x [15 x i8]], ptr @board, i64 0, i64 %56
  %58 = load i32, ptr %3, align 4, !tbaa !5
  %59 = sext i32 %58 to i64
  %60 = getelementptr inbounds [15 x i8], ptr %57, i64 0, i64 %59
  store i8 46, ptr %60, align 1, !tbaa !11
  br label %61

61:                                               ; preds = %18, %14
  br label %62

62:                                               ; preds = %61
  %63 = load i32, ptr %3, align 4, !tbaa !5
  %64 = add nsw i32 %63, 1
  store i32 %64, ptr %3, align 4, !tbaa !5
  br label %9, !llvm.loop !12

65:                                               ; preds = %13
  br label %66

66:                                               ; preds = %65, %7
  ret void
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@n = external dso_local local_unnamed_addr global i32, align 4
@col = external dso_local local_unnamed_addr global [15 x i8], align 1
@md = external dso_local local_unnamed_addr global [30 x i8], align 16
@sd = external dso_local local_unnamed_addr global [30 x i8], align 16
@board = external dso_local local_unnamed_addr global [15 x [15 x i8]], align 16

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z9printGridv() local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z5validii(i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z7solveNQi(i32 noundef %0) local_unnamed_addr #0 {
  %2 = load i32, ptr @n, align 4, !tbaa !5
  %3 = icmp eq i32 %2, %0
  br i1 %3, label %8, label %.preheader

.preheader:                                       ; preds = %1
  %4 = icmp sgt i32 %2, 0
  br i1 %4, label %.lr.ph, label %.loopexit

.lr.ph:                                           ; preds = %.preheader
  %5 = add i32 %0, 15
  %6 = sext i32 %0 to i64
  %7 = add nsw i32 %0, 1
  br label %9

8:                                                ; preds = %1
  tail call void @_Z9printGridv()
  br label %.loopexit

9:                                                ; preds = %.lr.ph, %20
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %20 ]
  %10 = trunc nuw nsw i64 %indvars.iv to i32
  %11 = tail call noundef zeroext i1 @_Z5validii(i32 noundef %0, i32 noundef %10)
  br i1 %11, label %12, label %20

12:                                               ; preds = %9
  %13 = add nsw i64 %indvars.iv, %6
  %14 = getelementptr inbounds [30 x i8], ptr @sd, i64 0, i64 %13
  store i8 1, ptr %14, align 1, !tbaa !9
  %15 = sub i32 %5, %10
  %16 = sext i32 %15 to i64
  %17 = getelementptr inbounds [30 x i8], ptr @md, i64 0, i64 %16
  store i8 1, ptr %17, align 1, !tbaa !9
  %18 = getelementptr inbounds [15 x i8], ptr @col, i64 0, i64 %indvars.iv
  store i8 1, ptr %18, align 1, !tbaa !9
  %19 = getelementptr inbounds [15 x [15 x i8]], ptr @board, i64 0, i64 %6, i64 %indvars.iv
  store i8 81, ptr %19, align 1, !tbaa !11
  tail call void @_Z7solveNQi(i32 noundef %7)
  store i8 0, ptr %14, align 1, !tbaa !9
  store i8 0, ptr %17, align 1, !tbaa !9
  store i8 0, ptr %18, align 1, !tbaa !9
  store i8 46, ptr %19, align 1, !tbaa !11
  br label %20

20:                                               ; preds = %9, %12
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %21 = load i32, ptr @n, align 4, !tbaa !5
  %22 = sext i32 %21 to i64
  %23 = icmp slt i64 %indvars.iv.next, %22
  br i1 %23, label %9, label %.loopexit, !llvm.loop !12

.loopexit:                                        ; preds = %20, %.preheader, %8
  ret void
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass