; LLVM IR from FrancesoM/Bisc8FX :: sdk_projects/bisc8_platform/ps7_cortexa9_0/standalone_domain/bsp/ps7_cortexa9_0_ (GetNextMPURegion)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XMpuConfig = type { i32, i64, i64, i32 }

@Mpu_Config = external dso_local global [16 x %struct.XMpuConfig], section ".bootdata", align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @Xil_GetNextMPURegion() #1 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #2
  store i32 0, ptr %1, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #2
  store i32 255, ptr %2, align 4, !tbaa !5
  br label %3

3:                                                ; preds = %15, %0
  %4 = load i32, ptr %1, align 4, !tbaa !5
  %5 = icmp ult i32 %4, 16
  br i1 %5, label %6, label %18

6:                                                ; preds = %3
  %7 = load i32, ptr %1, align 4, !tbaa !5
  %8 = zext i32 %7 to i64
  %9 = getelementptr inbounds [16 x %struct.XMpuConfig], ptr @Mpu_Config, i64 0, i64 %8
  %10 = getelementptr inbounds %struct.XMpuConfig, ptr %9, i32 0, i32 0
  %11 = load i32, ptr %10, align 16, !tbaa !9
  %12 = icmp ne i32 %11, 1
  br i1 %12, label %13, label %15

13:                                               ; preds = %6
  %14 = load i32, ptr %1, align 4, !tbaa !5
  store i32 %14, ptr %2, align 4, !tbaa !5
  br label %18

15:                                               ; preds = %6
  %16 = load i32, ptr %1, align 4, !tbaa !5
  %17 = add i32 %16, 1
  store i32 %17, ptr %1, align 4, !tbaa !5
  br label %3, !llvm.loop !12

18:                                               ; preds = %13, %3
  %19 = load i32, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #2
  ret i32 %19
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"XMpuConfig", !6, i64 0, !11, i64 8, !11, i64 16, !6, i64 24}
!11 = !{!"long", !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XMpuConfig = type { i32, i64, i64, i32 }

@Mpu_Config = external dso_local local_unnamed_addr global [16 x %struct.XMpuConfig], section ".bootdata", align 16

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define dso_local i32 @Xil_GetNextMPURegion() local_unnamed_addr #0 {
  %1 = load i32, ptr @Mpu_Config, align 16, !tbaa !5
  %.not = icmp eq i32 %1, 1
  br i1 %.not, label %2, label %32

2:                                                ; preds = %0
  %3 = load i32, ptr getelementptr inbounds (i8, ptr @Mpu_Config, i64 32), align 16, !tbaa !5
  %.not.1 = icmp eq i32 %3, 1
  br i1 %.not.1, label %4, label %32

4:                                                ; preds = %2
  %5 = load i32, ptr getelementptr inbounds (i8, ptr @Mpu_Config, i64 64), align 16, !tbaa !5
  %.not.2 = icmp eq i32 %5, 1
  br i1 %.not.2, label %6, label %32

6:                                                ; preds = %4
  %7 = load i32, ptr getelementptr inbounds (i8, ptr @Mpu_Config, i64 96), align 16, !tbaa !5
  %.not.3 = icmp eq i32 %7, 1
  br i1 %.not.3, label %8, label %32

8:                                                ; preds = %6
  %9 = load i32, ptr getelementptr inbounds (i8, ptr @Mpu_Config, i64 128), align 16, !tbaa !5
  %.not.4 = icmp eq i32 %9, 1
  br i1 %.not.4, label %10, label %32

10:                                               ; preds = %8
  %11 = load i32, ptr getelementptr inbounds (i8, ptr @Mpu_Config, i64 160), align 16, !tbaa !5
  %.not.5 = icmp eq i32 %11, 1
  br i1 %.not.5, label %12, label %32

12:                                               ; preds = %10
  %13 = load i32, ptr getelementptr inbounds (i8, ptr @Mpu_Config, i64 192), align 16, !tbaa !5
  %.not.6 = icmp eq i32 %13, 1
  br i1 %.not.6, label %14, label %32

14:                                               ; preds = %12
  %15 = load i32, ptr getelementptr inbounds (i8, ptr @Mpu_Config, i64 224), align 16, !tbaa !5
  %.not.7 = icmp eq i32 %15, 1
  br i1 %.not.7, label %16, label %32

16:                                               ; preds = %14
  %17 = load i32, ptr getelementptr inbounds (i8, ptr @Mpu_Config, i64 256), align 16, !tbaa !5
  %.not.8 = icmp eq i32 %17, 1
  br i1 %.not.8, label %18, label %32

18:                                               ; preds = %16
  %19 = load i32, ptr getelementptr inbounds (i8, ptr @Mpu_Config, i64 288), align 16, !tbaa !5
  %.not.9 = icmp eq i32 %19, 1
  br i1 %.not.9, label %20, label %32

20:                                               ; preds = %18
  %21 = load i32, ptr getelementptr inbounds (i8, ptr @Mpu_Config, i64 320), align 16, !tbaa !5
  %.not.10 = icmp eq i32 %21, 1
  br i1 %.not.10, label %22, label %32

22:                                               ; preds = %20
  %23 = load i32, ptr getelementptr inbounds (i8, ptr @Mpu_Config, i64 352), align 16, !tbaa !5
  %.not.11 = icmp eq i32 %23, 1
  br i1 %.not.11, label %24, label %32

24:                                               ; preds = %22
  %25 = load i32, ptr getelementptr inbounds (i8, ptr @Mpu_Config, i64 384), align 16, !tbaa !5
  %.not.12 = icmp eq i32 %25, 1
  br i1 %.not.12, label %26, label %32

26:                                               ; preds = %24
  %27 = load i32, ptr getelementptr inbounds (i8, ptr @Mpu_Config, i64 416), align 16, !tbaa !5
  %.not.13 = icmp eq i32 %27, 1
  br i1 %.not.13, label %28, label %32

28:                                               ; preds = %26
  %29 = load i32, ptr getelementptr inbounds (i8, ptr @Mpu_Config, i64 448), align 16, !tbaa !5
  %.not.14 = icmp eq i32 %29, 1
  br i1 %.not.14, label %30, label %32

30:                                               ; preds = %28
  %31 = load i32, ptr getelementptr inbounds (i8, ptr @Mpu_Config, i64 480), align 16, !tbaa !5
  %.not.15 = icmp eq i32 %31, 1
  %spec.select = select i1 %.not.15, i32 255, i32 15
  br label %32

32:                                               ; preds = %30, %28, %26, %24, %22, %20, %18, %16, %14, %12, %10, %8, %6, %4, %2, %0
  %.0 = phi i32 [ 0, %0 ], [ 1, %2 ], [ 2, %4 ], [ 3, %6 ], [ 4, %8 ], [ 5, %10 ], [ 6, %12 ], [ 7, %14 ], [ 8, %16 ], [ 9, %18 ], [ 10, %20 ], [ 11, %22 ], [ 12, %24 ], [ 13, %26 ], [ 14, %28 ], [ %spec.select, %30 ]
  ret i32 %.0
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"XMpuConfig", !7, i64 0, !10, i64 8, !10, i64 16, !7, i64 24}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LoopRotatePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass