; LLVM IR from tangjz/acm-icpc :: 51nod/1555.ll (Z8seg_initii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Segment = type { i32, i32, i32 }

@seg = external dso_local global [600001 x %struct.Segment], align 16

; Function Attrs: mustprogress uwtable
define dso_local void @_Z8seg_initii(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  %10 = load i32, ptr %3, align 4, !tbaa !5
  %11 = load i32, ptr %4, align 4, !tbaa !5
  %12 = call noundef i32 @_Z7seg_idxii(i32 noundef %10, i32 noundef %11)
  store i32 %12, ptr %5, align 4, !tbaa !5
  %13 = load i32, ptr %3, align 4, !tbaa !5
  %14 = load i32, ptr %4, align 4, !tbaa !5
  %15 = icmp eq i32 %13, %14
  br i1 %15, label %16, label %21

16:                                               ; preds = %2
  %17 = load i32, ptr %5, align 4, !tbaa !5
  %18 = sext i32 %17 to i64
  %19 = getelementptr inbounds [600001 x %struct.Segment], ptr @seg, i64 0, i64 %18
  %20 = getelementptr inbounds %struct.Segment, ptr %19, i32 0, i32 0
  store i32 1, ptr %20, align 4, !tbaa !9
  store i32 1, ptr %6, align 4
  br label %41

21:                                               ; preds = %2
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %22 = load i32, ptr %3, align 4, !tbaa !5
  %23 = load i32, ptr %4, align 4, !tbaa !5
  %24 = add nsw i32 %22, %23
  %25 = ashr i32 %24, 1
  store i32 %25, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %26 = load i32, ptr %3, align 4, !tbaa !5
  %27 = load i32, ptr %7, align 4, !tbaa !5
  %28 = call noundef i32 @_Z7seg_idxii(i32 noundef %26, i32 noundef %27)
  store i32 %28, ptr %8, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %29 = load i32, ptr %7, align 4, !tbaa !5
  %30 = add nsw i32 %29, 1
  %31 = load i32, ptr %4, align 4, !tbaa !5
  %32 = call noundef i32 @_Z7seg_idxii(i32 noundef %30, i32 noundef %31)
  store i32 %32, ptr %9, align 4, !tbaa !5
  %33 = load i32, ptr %3, align 4, !tbaa !5
  %34 = load i32, ptr %7, align 4, !tbaa !5
  call void @_Z8seg_initii(i32 noundef %33, i32 noundef %34)
  %35 = load i32, ptr %7, align 4, !tbaa !5
  %36 = add nsw i32 %35, 1
  %37 = load i32, ptr %4, align 4, !tbaa !5
  call void @_Z8seg_initii(i32 noundef %36, i32 noundef %37)
  %38 = load i32, ptr %5, align 4, !tbaa !5
  %39 = load i32, ptr %8, align 4, !tbaa !5
  %40 = load i32, ptr %9, align 4, !tbaa !5
  call void @_Z6seg_upiii(i32 noundef %38, i32 noundef %39, i32 noundef %40)
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  store i32 0, ptr %6, align 4
  br label %41

41:                                               ; preds = %21, %16
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  %42 = load i32, ptr %6, align 4
  switch i32 %42, label %44 [
    i32 0, label %43
    i32 1, label %43
  ]

43:                                               ; preds = %41, %41
  ret void

44:                                               ; preds = %41
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7seg_idxii(i32 noundef, i32 noundef) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_Z6seg_upiii(i32 noundef, i32 noundef, i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"_ZTS7Segment", !6, i64 0, !6, i64 4, !6, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Segment = type { i32, i32, i32 }

@seg = external dso_local local_unnamed_addr global [600001 x %struct.Segment], align 16

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z8seg_initii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = tail call noundef i32 @_Z7seg_idxii(i32 noundef %0, i32 noundef %1)
  %4 = icmp eq i32 %0, %1
  br i1 %4, label %common.ret, label %7

common.ret:                                       ; preds = %2
  %5 = sext i32 %3 to i64
  %6 = getelementptr inbounds [600001 x %struct.Segment], ptr @seg, i64 0, i64 %5
  store i32 1, ptr %6, align 4, !tbaa !5
  br label %common.ret19

common.ret19:                                     ; preds = %7, %common.ret
  ret void

7:                                                ; preds = %2
  %8 = add nsw i32 %1, %0
  %9 = ashr i32 %8, 1
  %10 = tail call noundef i32 @_Z7seg_idxii(i32 noundef %0, i32 noundef %9)
  %11 = add nsw i32 %9, 1
  %12 = tail call noundef i32 @_Z7seg_idxii(i32 noundef %11, i32 noundef %1)
  tail call void @_Z8seg_initii(i32 noundef %0, i32 noundef %9)
  tail call void @_Z8seg_initii(i32 noundef %11, i32 noundef %1)
  tail call void @_Z6seg_upiii(i32 noundef %3, i32 noundef %10, i32 noundef %12)
  br label %common.ret19
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7seg_idxii(i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_Z6seg_upiii(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS7Segment", !7, i64 0, !7, i64 4, !7, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass