; LLVM IR from tangjz/acm-icpc :: 51nod/1175.ll (Z6updateRiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Segment = type { i32, i32, i32 }

@seg_tot = external dso_local global i32, align 4
@seg = external dso_local global [850017 x %struct.Segment], align 16

; Function Attrs: mustprogress uwtable
define dso_local void @_Z6updateRiiii(ptr noundef nonnull align 4 dereferenceable(4) %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #0 {
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !9
  store i32 %3, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %12 = load ptr, ptr %5, align 8, !tbaa !5
  %13 = load i32, ptr %12, align 4, !tbaa !9
  store i32 %13, ptr %9, align 4, !tbaa !9
  %14 = load i32, ptr %9, align 4, !tbaa !9
  %15 = sext i32 %14 to i64
  %16 = getelementptr inbounds [850017 x %struct.Segment], ptr @seg, i64 0, i64 %15
  %17 = load i32, ptr @seg_tot, align 4, !tbaa !9
  %18 = add nsw i32 %17, 1
  store i32 %18, ptr @seg_tot, align 4, !tbaa !9
  %19 = load ptr, ptr %5, align 8, !tbaa !5
  store i32 %18, ptr %19, align 4, !tbaa !9
  %20 = sext i32 %18 to i64
  %21 = getelementptr inbounds [850017 x %struct.Segment], ptr @seg, i64 0, i64 %20
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %21, ptr align 4 %16, i64 12, i1 false), !tbaa.struct !11
  %22 = load ptr, ptr %5, align 8, !tbaa !5
  %23 = load i32, ptr %22, align 4, !tbaa !9
  %24 = sext i32 %23 to i64
  %25 = getelementptr inbounds [850017 x %struct.Segment], ptr @seg, i64 0, i64 %24
  %26 = getelementptr inbounds %struct.Segment, ptr %25, i32 0, i32 0
  %27 = load i32, ptr %26, align 4, !tbaa !12
  %28 = add nsw i32 %27, 1
  store i32 %28, ptr %26, align 4, !tbaa !12
  %29 = load i32, ptr %6, align 4, !tbaa !9
  %30 = load i32, ptr %7, align 4, !tbaa !9
  %31 = icmp eq i32 %29, %30
  br i1 %31, label %32, label %33

32:                                               ; preds = %4
  store i32 1, ptr %10, align 4
  br label %61

33:                                               ; preds = %4
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  %34 = load i32, ptr %6, align 4, !tbaa !9
  %35 = load i32, ptr %7, align 4, !tbaa !9
  %36 = add nsw i32 %34, %35
  %37 = ashr i32 %36, 1
  store i32 %37, ptr %11, align 4, !tbaa !9
  %38 = load i32, ptr %8, align 4, !tbaa !9
  %39 = load i32, ptr %11, align 4, !tbaa !9
  %40 = icmp sle i32 %38, %39
  br i1 %40, label %41, label %50

41:                                               ; preds = %33
  %42 = load ptr, ptr %5, align 8, !tbaa !5
  %43 = load i32, ptr %42, align 4, !tbaa !9
  %44 = sext i32 %43 to i64
  %45 = getelementptr inbounds [850017 x %struct.Segment], ptr @seg, i64 0, i64 %44
  %46 = getelementptr inbounds %struct.Segment, ptr %45, i32 0, i32 1
  %47 = load i32, ptr %6, align 4, !tbaa !9
  %48 = load i32, ptr %11, align 4, !tbaa !9
  %49 = load i32, ptr %8, align 4, !tbaa !9
  call void @_Z6updateRiiii(ptr noundef nonnull align 4 dereferenceable(4) %46, i32 noundef %47, i32 noundef %48, i32 noundef %49)
  br label %60

50:                                               ; preds = %33
  %51 = load ptr, ptr %5, align 8, !tbaa !5
  %52 = load i32, ptr %51, align 4, !tbaa !9
  %53 = sext i32 %52 to i64
  %54 = getelementptr inbounds [850017 x %struct.Segment], ptr @seg, i64 0, i64 %53
  %55 = getelementptr inbounds %struct.Segment, ptr %54, i32 0, i32 2
  %56 = load i32, ptr %11, align 4, !tbaa !9
  %57 = add nsw i32 %56, 1
  %58 = load i32, ptr %7, align 4, !tbaa !9
  %59 = load i32, ptr %8, align 4, !tbaa !9
  call void @_Z6updateRiiii(ptr noundef nonnull align 4 dereferenceable(4) %55, i32 noundef %57, i32 noundef %58, i32 noundef %59)
  br label %60

60:                                               ; preds = %50, %41
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  store i32 0, ptr %10, align 4
  br label %61

61:                                               ; preds = %60, %32
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  %62 = load i32, ptr %10, align 4
  switch i32 %62, label %64 [
    i32 0, label %63
    i32 1, label %63
  ]

63:                                               ; preds = %61, %61
  ret void

64:                                               ; preds = %61
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{i64 0, i64 4, !9, i64 4, i64 4, !9, i64 8, i64 4, !9}
!12 = !{!13, !10, i64 0}
!13 = !{!"_ZTS7Segment", !10, i64 0, !10, i64 4, !10, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Segment = type { i32, i32, i32 }

@seg_tot = external dso_local local_unnamed_addr global i32, align 4
@seg = external dso_local local_unnamed_addr global [850017 x %struct.Segment], align 16

; Function Attrs: mustprogress nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable
define dso_local void @_Z6updateRiiii(ptr nocapture noundef nonnull align 4 dereferenceable(4) %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  br label %tailrecurse.outer

tailrecurse.outer:                                ; preds = %25, %4
  %.tr.ph = phi ptr [ %26, %25 ], [ %0, %4 ]
  %.tr21.ph = phi i32 [ %27, %25 ], [ %1, %4 ]
  %.tr22.ph = phi i32 [ %.tr22, %25 ], [ %2, %4 ]
  br label %tailrecurse

tailrecurse:                                      ; preds = %tailrecurse.outer, %23
  %.tr = phi ptr [ %24, %23 ], [ %.tr.ph, %tailrecurse.outer ]
  %.tr22 = phi i32 [ %20, %23 ], [ %.tr22.ph, %tailrecurse.outer ]
  %5 = load i32, ptr %.tr, align 4, !tbaa !5
  %6 = sext i32 %5 to i64
  %7 = getelementptr inbounds [850017 x %struct.Segment], ptr @seg, i64 0, i64 %6
  %8 = load i32, ptr @seg_tot, align 4, !tbaa !5
  %9 = add nsw i32 %8, 1
  store i32 %9, ptr @seg_tot, align 4, !tbaa !5
  store i32 %9, ptr %.tr, align 4, !tbaa !5
  %10 = sext i32 %9 to i64
  %11 = getelementptr inbounds [850017 x %struct.Segment], ptr @seg, i64 0, i64 %10
  tail call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(12) %11, ptr noundef nonnull align 4 dereferenceable(12) %7, i64 12, i1 false), !tbaa.struct !9
  %12 = load i32, ptr %.tr, align 4, !tbaa !5
  %13 = sext i32 %12 to i64
  %14 = getelementptr inbounds [850017 x %struct.Segment], ptr @seg, i64 0, i64 %13
  %15 = load i32, ptr %14, align 4, !tbaa !10
  %16 = add nsw i32 %15, 1
  store i32 %16, ptr %14, align 4, !tbaa !10
  %17 = icmp eq i32 %.tr21.ph, %.tr22
  br i1 %17, label %28, label %18

18:                                               ; preds = %tailrecurse
  %19 = add nsw i32 %.tr22, %.tr21.ph
  %20 = ashr i32 %19, 1
  %.not = icmp slt i32 %20, %3
  %21 = load i32, ptr %.tr, align 4, !tbaa !5
  %22 = sext i32 %21 to i64
  br i1 %.not, label %25, label %23

23:                                               ; preds = %18
  %24 = getelementptr inbounds [850017 x %struct.Segment], ptr @seg, i64 0, i64 %22, i32 1
  br label %tailrecurse

25:                                               ; preds = %18
  %26 = getelementptr inbounds [850017 x %struct.Segment], ptr @seg, i64 0, i64 %22, i32 2
  %27 = add nsw i32 %20, 1
  br label %tailrecurse.outer

28:                                               ; preds = %tailrecurse
  ret void
}

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

attributes #0 = { mustprogress nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{i64 0, i64 4, !5, i64 4, i64 4, !5, i64 8, i64 4, !5}
!10 = !{!11, !6, i64 0}
!11 = !{!"_ZTS7Segment", !6, i64 0, !6, i64 4, !6, i64 8}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass