; LLVM IR from Izaron/ACM-ICPC :: Timus Online Judge/Volume 3/1204. Idempotents (main)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [3 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [5 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [4 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [2 x i8], align 1

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  store i32 0, ptr %1, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  %11 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef %2)
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  store i32 0, ptr %6, align 4, !tbaa !5
  br label %12

12:                                               ; preds = %108, %0
  %13 = load i32, ptr %6, align 4, !tbaa !5
  %14 = load i32, ptr %2, align 4, !tbaa !5
  %15 = icmp slt i32 %13, %14
  br i1 %15, label %17, label %16

16:                                               ; preds = %12
  store i32 2, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  br label %111

17:                                               ; preds = %12
  %18 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef %3)
  store i32 0, ptr %4, align 4, !tbaa !5
  store i32 0, ptr %5, align 4, !tbaa !5
  %19 = load i32, ptr %3, align 4, !tbaa !5
  %20 = srem i32 %19, 2
  %21 = icmp eq i32 %20, 0
  br i1 %21, label %22, label %25

22:                                               ; preds = %17
  store i32 2, ptr %4, align 4, !tbaa !5
  %23 = load i32, ptr %3, align 4, !tbaa !5
  %24 = sdiv i32 %23, 2
  store i32 %24, ptr %5, align 4, !tbaa !5
  br label %47

25:                                               ; preds = %17
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  store i32 3, ptr %8, align 4, !tbaa !5
  br label %26

26:                                               ; preds = %42, %25
  %27 = load i32, ptr %8, align 4, !tbaa !5
  %28 = load i32, ptr %3, align 4, !tbaa !5
  %29 = icmp slt i32 %27, %28
  br i1 %29, label %31, label %30

30:                                               ; preds = %26
  store i32 5, ptr %7, align 4
  br label %45

31:                                               ; preds = %26
  %32 = load i32, ptr %3, align 4, !tbaa !5
  %33 = load i32, ptr %8, align 4, !tbaa !5
  %34 = srem i32 %32, %33
  %35 = icmp eq i32 %34, 0
  br i1 %35, label %36, label %41

36:                                               ; preds = %31
  %37 = load i32, ptr %8, align 4, !tbaa !5
  store i32 %37, ptr %4, align 4, !tbaa !5
  %38 = load i32, ptr %3, align 4, !tbaa !5
  %39 = load i32, ptr %8, align 4, !tbaa !5
  %40 = sdiv i32 %38, %39
  store i32 %40, ptr %5, align 4, !tbaa !5
  store i32 5, ptr %7, align 4
  br label %45

41:                                               ; preds = %31
  br label %42

42:                                               ; preds = %41
  %43 = load i32, ptr %8, align 4, !tbaa !5
  %44 = add nsw i32 %43, 2
  store i32 %44, ptr %8, align 4, !tbaa !5
  br label %26, !llvm.loop !9

45:                                               ; preds = %36, %30
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  br label %46

46:                                               ; preds = %45
  br label %47

47:                                               ; preds = %46, %22
  %48 = load i32, ptr %5, align 4, !tbaa !5
  %49 = load i32, ptr %4, align 4, !tbaa !5
  %50 = icmp slt i32 %48, %49
  br i1 %50, label %51, label %52

51:                                               ; preds = %47
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %5, ptr noundef nonnull align 4 dereferenceable(4) %4) #4
  br label %52

52:                                               ; preds = %51, %47
  %53 = call i32 (ptr, ...) @printf(ptr noundef @.str.1)
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #4
  %54 = load i32, ptr %5, align 4, !tbaa !5
  %55 = sext i32 %54 to i64
  store i64 %55, ptr %9, align 8, !tbaa !11
  br label %56

56:                                               ; preds = %101, %52
  %57 = load i64, ptr %9, align 8, !tbaa !11
  %58 = load i32, ptr %3, align 4, !tbaa !5
  %59 = sext i32 %58 to i64
  %60 = icmp slt i64 %57, %59
  br i1 %60, label %62, label %61

61:                                               ; preds = %56
  store i32 8, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #4
  br label %106

62:                                               ; preds = %56
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #4
  %63 = load i64, ptr %9, align 8, !tbaa !11
  %64 = sub nsw i64 %63, 1
  store i64 %64, ptr %10, align 8, !tbaa !11
  %65 = load i64, ptr %9, align 8, !tbaa !11
  %66 = load i64, ptr %10, align 8, !tbaa !11
  %67 = mul nsw i64 %65, %66
  %68 = load i32, ptr %3, align 4, !tbaa !5
  %69 = sext i32 %68 to i64
  %70 = srem i64 %67, %69
  %71 = icmp eq i64 %70, 0
  br i1 %71, label %72, label %81

72:                                               ; preds = %62
  %73 = load i64, ptr %9, align 8, !tbaa !11
  %74 = load i32, ptr %3, align 4, !tbaa !5
  %75 = sext i32 %74 to i64
  %76 = icmp slt i64 %73, %75
  br i1 %76, label %77, label %81

77:                                               ; preds = %72
  %78 = load i64, ptr %9, align 8, !tbaa !11
  %79 = trunc i64 %78 to i32
  %80 = call i32 (ptr, ...) @printf(ptr noundef @.str.2, i32 noundef %79)
  br label %81

81:                                               ; preds = %77, %72, %62
  %82 = load i64, ptr %9, align 8, !tbaa !11
  %83 = add nsw i64 %82, 1
  store i64 %83, ptr %10, align 8, !tbaa !11
  %84 = load i64, ptr %9, align 8, !tbaa !11
  %85 = load i64, ptr %10, align 8, !tbaa !11
  %86 = mul nsw i64 %84, %85
  %87 = load i32, ptr %3, align 4, !tbaa !5
  %88 = sext i32 %87 to i64
  %89 = srem i64 %86, %88
  %90 = icmp eq i64 %89, 0
  br i1 %90, label %91, label %100

91:                                               ; preds = %81
  %92 = load i64, ptr %10, align 8, !tbaa !11
  %93 = load i32, ptr %3, align 4, !tbaa !5
  %94 = sext i32 %93 to i64
  %95 = icmp slt i64 %92, %94
  br i1 %95, label %96, label %100

96:                                               ; preds = %91
  %97 = load i64, ptr %10, align 8, !tbaa !11
  %98 = trunc i64 %97 to i32
  %99 = call i32 (ptr, ...) @printf(ptr noundef @.str.2, i32 noundef %98)
  br label %100

100:                                              ; preds = %96, %91, %81
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #4
  br label %101

101:                                              ; preds = %100
  %102 = load i32, ptr %5, align 4, !tbaa !5
  %103 = sext i32 %102 to i64
  %104 = load i64, ptr %9, align 8, !tbaa !11
  %105 = add nsw i64 %104, %103
  store i64 %105, ptr %9, align 8, !tbaa !11
  br label %56, !llvm.loop !13

106:                                              ; preds = %61
  %107 = call i32 (ptr, ...) @printf(ptr noundef @.str.3)
  br label %108

108:                                              ; preds = %106
  %109 = load i32, ptr %6, align 4, !tbaa !5
  %110 = add nsw i32 %109, 1
  store i32 %110, ptr %6, align 4, !tbaa !5
  br label %12, !llvm.loop !14

111:                                              ; preds = %16
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #4
  %112 = load i32, ptr %1, align 4
  ret i32 %112
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @__isoc99_scanf(ptr noundef, ...) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #3

declare i32 @printf(ptr noundef, ...) #2

attributes #0 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !12, i64 0}
!12 = !{!"long long", !7, i64 0}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [3 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [5 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [4 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [2 x i8], align 1

; Function Attrs: mustprogress norecurse nounwind uwtable
define dso_local noundef i32 @main() local_unnamed_addr #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #4
  %5 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull %1)
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #4
  %6 = load i32, ptr %1, align 4, !tbaa !5
  %7 = icmp sgt i32 %6, 0
  br i1 %7, label %.lr.ph31, label %._crit_edge32

._crit_edge32:                                    ; preds = %._crit_edge, %0
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #4
  ret i32 0

.lr.ph31:                                         ; preds = %0, %._crit_edge
  %.02129 = phi i32 [ %33, %._crit_edge ], [ 0, %0 ]
  %8 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull %2)
  store i32 0, ptr %3, align 4, !tbaa !5
  store i32 0, ptr %4, align 4, !tbaa !5
  %9 = load i32, ptr %2, align 4, !tbaa !5
  %10 = and i32 %9, 1
  %11 = icmp eq i32 %10, 0
  br i1 %11, label %13, label %.preheader

.preheader:                                       ; preds = %.lr.ph31
  %12 = icmp sgt i32 %9, 3
  br i1 %12, label %.lr.ph, label %.loopexit.thread

13:                                               ; preds = %.lr.ph31
  store i32 2, ptr %3, align 4, !tbaa !5
  %14 = ashr exact i32 %9, 1
  br label %.loopexit

.lr.ph:                                           ; preds = %.preheader, %19
  %.02026 = phi i32 [ %20, %19 ], [ 3, %.preheader ]
  %15 = urem i32 %9, %.02026
  %16 = udiv i32 %9, %.02026
  %17 = icmp eq i32 %15, 0
  br i1 %17, label %18, label %19

18:                                               ; preds = %.lr.ph
  store i32 %.02026, ptr %3, align 4, !tbaa !5
  br label %.loopexit

19:                                               ; preds = %.lr.ph
  %20 = add nuw nsw i32 %.02026, 2
  %21 = icmp slt i32 %20, %9
  br i1 %21, label %.lr.ph, label %.loopexit.thread, !llvm.loop !9

.loopexit:                                        ; preds = %18, %13
  %22 = phi i32 [ %.02026, %18 ], [ 2, %13 ]
  %23 = phi i32 [ %16, %18 ], [ %14, %13 ]
  store i32 %23, ptr %4, align 4, !tbaa !5
  %24 = icmp slt i32 %23, %22
  br i1 %24, label %25, label %.loopexit.thread

25:                                               ; preds = %.loopexit
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %4, ptr noundef nonnull align 4 dereferenceable(4) %3) #4
  br label %.loopexit.thread

.loopexit.thread:                                 ; preds = %19, %.preheader, %25, %.loopexit
  %26 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1)
  %27 = load i32, ptr %4, align 4, !tbaa !5
  %28 = load i32, ptr %2, align 4, !tbaa !5
  %29 = icmp slt i32 %27, %28
  br i1 %29, label %.lr.ph28.preheader, label %._crit_edge

.lr.ph28.preheader:                               ; preds = %.loopexit.thread
  %30 = sext i32 %28 to i64
  %31 = sext i32 %27 to i64
  br label %.lr.ph28

._crit_edge:                                      ; preds = %56, %.loopexit.thread
  %32 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.3)
  %33 = add nuw nsw i32 %.02129, 1
  %34 = load i32, ptr %1, align 4, !tbaa !5
  %35 = icmp slt i32 %33, %34
  br i1 %35, label %.lr.ph31, label %._crit_edge32, !llvm.loop !11

.lr.ph28:                                         ; preds = %.lr.ph28.preheader, %56
  %36 = phi i32 [ %57, %56 ], [ %28, %.lr.ph28.preheader ]
  %37 = phi i64 [ %.pre-phi, %56 ], [ %30, %.lr.ph28.preheader ]
  %.027 = phi i64 [ %60, %56 ], [ %31, %.lr.ph28.preheader ]
  %38 = add nsw i64 %.027, -1
  %39 = mul nsw i64 %38, %.027
  %40 = srem i64 %39, %37
  %41 = icmp eq i64 %40, 0
  br i1 %41, label %42, label %45

42:                                               ; preds = %.lr.ph28
  %43 = trunc i64 %.027 to i32
  %44 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.2, i32 noundef %43)
  %.pre = load i32, ptr %2, align 4, !tbaa !5
  br label %45

45:                                               ; preds = %42, %.lr.ph28
  %46 = phi i32 [ %.pre, %42 ], [ %36, %.lr.ph28 ]
  %47 = add nsw i64 %.027, 1
  %48 = mul nsw i64 %47, %.027
  %49 = sext i32 %46 to i64
  %50 = srem i64 %48, %49
  %51 = icmp eq i64 %50, 0
  %52 = icmp slt i64 %47, %49
  %or.cond = and i1 %51, %52
  br i1 %or.cond, label %53, label %56

53:                                               ; preds = %45
  %54 = trunc i64 %47 to i32
  %55 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.2, i32 noundef %54)
  %.pre34 = load i32, ptr %2, align 4, !tbaa !5
  %.pre35 = sext i32 %.pre34 to i64
  br label %56

56:                                               ; preds = %53, %45
  %.pre-phi = phi i64 [ %.pre35, %53 ], [ %49, %45 ]
  %57 = phi i32 [ %.pre34, %53 ], [ %46, %45 ]
  %58 = load i32, ptr %4, align 4, !tbaa !5
  %59 = sext i32 %58 to i64
  %60 = add nsw i64 %.027, %59
  %61 = icmp slt i64 %60, %.pre-phi
  br i1 %61, label %.lr.ph28, label %._crit_edge, !llvm.loop !12
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nofree nounwind
declare noundef i32 @__isoc99_scanf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #3

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

attributes #0 = { mustprogress norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Effective O3 passes: DivRemPairsPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass