; LLVM IR from Discngine/fpocket :: src/qhull/src/libqhullcpp (QhullPoints)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.orgQhull::QhullPoint" = type <{ ptr, ptr, i32, [4 x i8] }>
%"class.orgQhull::QhullPoints" = type <{ ptr, ptr, ptr, i32, [4 x i8] }>

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN8orgQhull10QhullPointC2EPNS_7QhullQhE(ptr noundef nonnull align 8 dereferenceable(20), ptr noundef) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZNK8orgQhull11QhullPoints5countEv(ptr noundef nonnull align 8 dereferenceable(28)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN8orgQhull10QhullPoint8defineAsEiPd(ptr noundef nonnull align 8 dereferenceable(20), i32 noundef, ptr noundef) #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZNK8orgQhull11QhullPoints5valueEiRNS_10QhullPointE(ptr dead_on_unwind noalias writable sret(%"class.orgQhull::QhullPoint") align 8 %0, ptr noundef nonnull align 8 dereferenceable(28) %1, i32 noundef %2, ptr noundef nonnull align 8 dereferenceable(20) %3) #1 align 2 personality ptr @__gxx_personality_v0 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca i1, align 1
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  store ptr %0, ptr %5, align 8
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !9
  store ptr %3, ptr %8, align 8, !tbaa !5
  %12 = load ptr, ptr %6, align 8
  store i1 false, ptr %9, align 1
  %13 = getelementptr inbounds %"class.orgQhull::QhullPoints", ptr %12, i32 0, i32 2
  %14 = load ptr, ptr %13, align 8, !tbaa !11
  call void @_ZN8orgQhull10QhullPointC2EPNS_7QhullQhE(ptr noundef nonnull align 8 dereferenceable(20) %0, ptr noundef %14)
  %15 = load i32, ptr %7, align 4, !tbaa !9
  %16 = icmp sge i32 %15, 0
  br i1 %16, label %17, label %38

17:                                               ; preds = %4
  %18 = load i32, ptr %7, align 4, !tbaa !9
  %19 = invoke noundef i32 @_ZNK8orgQhull11QhullPoints5countEv(ptr noundef nonnull align 8 dereferenceable(28) %12)
          to label %20 unwind label %34

20:                                               ; preds = %17
  %21 = icmp slt i32 %18, %19
  br i1 %21, label %22, label %38

22:                                               ; preds = %20
  %23 = getelementptr inbounds %"class.orgQhull::QhullPoints", ptr %12, i32 0, i32 3
  %24 = load i32, ptr %23, align 8, !tbaa !13
  %25 = getelementptr inbounds %"class.orgQhull::QhullPoints", ptr %12, i32 0, i32 0
  %26 = load ptr, ptr %25, align 8, !tbaa !14
  %27 = load i32, ptr %7, align 4, !tbaa !9
  %28 = getelementptr inbounds %"class.orgQhull::QhullPoints", ptr %12, i32 0, i32 3
  %29 = load i32, ptr %28, align 8, !tbaa !13
  %30 = mul nsw i32 %27, %29
  %31 = sext i32 %30 to i64
  %32 = getelementptr inbounds double, ptr %26, i64 %31
  invoke void @_ZN8orgQhull10QhullPoint8defineAsEiPd(ptr noundef nonnull align 8 dereferenceable(20) %0, i32 noundef %24, ptr noundef %32)
          to label %33 unwind label %34

33:                                               ; preds = %22
  br label %41

34:                                               ; preds = %38, %22, %17
  %35 = landingpad { ptr, i32 }
          cleanup
  %36 = extractvalue { ptr, i32 } %35, 0
  store ptr %36, ptr %10, align 8
  %37 = extractvalue { ptr, i32 } %35, 1
  store i32 %37, ptr %11, align 4
  call void @_ZN8orgQhull10QhullPointD2Ev(ptr noundef nonnull align 8 dereferenceable(20) %0) #2
  br label %45

38:                                               ; preds = %20, %4
  %39 = load ptr, ptr %8, align 8, !tbaa !5
  invoke void @_ZN8orgQhull10QhullPoint8defineAsERS0_(ptr noundef nonnull align 8 dereferenceable(20) %0, ptr noundef nonnull align 8 dereferenceable(20) %39)
          to label %40 unwind label %34

40:                                               ; preds = %38
  br label %41

41:                                               ; preds = %40, %33
  store i1 true, ptr %9, align 1
  %42 = load i1, ptr %9, align 1
  br i1 %42, label %44, label %43

43:                                               ; preds = %41
  call void @_ZN8orgQhull10QhullPointD2Ev(ptr noundef nonnull align 8 dereferenceable(20) %0) #2
  br label %44

44:                                               ; preds = %43, %41
  ret void

45:                                               ; preds = %34
  %46 = load ptr, ptr %10, align 8
  %47 = load i32, ptr %11, align 4
  %48 = insertvalue { ptr, i32 } poison, ptr %46, 0
  %49 = insertvalue { ptr, i32 } %48, i32 %47, 1
  resume { ptr, i32 } %49
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN8orgQhull10QhullPoint8defineAsERS0_(ptr noundef nonnull align 8 dereferenceable(20), ptr noundef nonnull align 8 dereferenceable(20)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN8orgQhull10QhullPointD2Ev(ptr noundef nonnull align 8 dereferenceable(20)) unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 16}
!12 = !{!"_ZTSN8orgQhull11QhullPointsE", !6, i64 0, !6, i64 8, !6, i64 16, !10, i64 24}
!13 = !{!12, !10, i64 24}
!14 = !{!12, !6, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.orgQhull::QhullPoint" = type <{ ptr, ptr, i32, [4 x i8] }>

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN8orgQhull10QhullPointC2EPNS_7QhullQhE(ptr noundef nonnull align 8 dereferenceable(20), ptr noundef) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZNK8orgQhull11QhullPoints5countEv(ptr noundef nonnull align 8 dereferenceable(28)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN8orgQhull10QhullPoint8defineAsEiPd(ptr noundef nonnull align 8 dereferenceable(20), i32 noundef, ptr noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZNK8orgQhull11QhullPoints5valueEiRNS_10QhullPointE(ptr dead_on_unwind noalias nonnull writable sret(%"class.orgQhull::QhullPoint") align 8 %0, ptr noundef nonnull align 8 dereferenceable(28) %1, i32 noundef %2, ptr noundef nonnull align 8 dereferenceable(20) %3) local_unnamed_addr #1 align 2 personality ptr @__gxx_personality_v0 {
  %5 = getelementptr inbounds i8, ptr %1, i64 16
  %6 = load ptr, ptr %5, align 8, !tbaa !5
  tail call void @_ZN8orgQhull10QhullPointC2EPNS_7QhullQhE(ptr noundef nonnull align 8 dereferenceable(20) %0, ptr noundef %6)
  %7 = icmp sgt i32 %2, -1
  br i1 %7, label %8, label %21

8:                                                ; preds = %4
  %9 = invoke noundef i32 @_ZNK8orgQhull11QhullPoints5countEv(ptr noundef nonnull align 8 dereferenceable(28) %1)
          to label %10 unwind label %19

10:                                               ; preds = %8
  %11 = icmp sgt i32 %9, %2
  br i1 %11, label %12, label %21

12:                                               ; preds = %10
  %13 = getelementptr inbounds i8, ptr %1, i64 24
  %14 = load i32, ptr %13, align 8, !tbaa !11
  %15 = load ptr, ptr %1, align 8, !tbaa !12
  %16 = mul nsw i32 %14, %2
  %17 = sext i32 %16 to i64
  %18 = getelementptr inbounds double, ptr %15, i64 %17
  tail call void @_ZN8orgQhull10QhullPoint8defineAsEiPd(ptr noundef nonnull align 8 dereferenceable(20) %0, i32 noundef %14, ptr noundef %18)
  br label %22

19:                                               ; preds = %8
  %20 = landingpad { ptr, i32 }
          cleanup
  tail call void @_ZN8orgQhull10QhullPointD2Ev(ptr noundef nonnull align 8 dereferenceable(20) %0) #2
  resume { ptr, i32 } %20

21:                                               ; preds = %10, %4
  tail call void @_ZN8orgQhull10QhullPoint8defineAsERS0_(ptr noundef nonnull align 8 dereferenceable(20) %0, ptr noundef nonnull align 8 dereferenceable(20) %3)
  br label %22

22:                                               ; preds = %12, %21
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN8orgQhull10QhullPoint8defineAsERS0_(ptr noundef nonnull align 8 dereferenceable(20), ptr noundef nonnull align 8 dereferenceable(20)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN8orgQhull10QhullPointD2Ev(ptr noundef nonnull align 8 dereferenceable(20)) unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 16}
!6 = !{!"_ZTSN8orgQhull11QhullPointsE", !7, i64 0, !7, i64 8, !7, i64 16, !10, i64 24}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!6, !10, i64 24}
!12 = !{!6, !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass