; LLVM IR from Izaron/ACM-ICPC :: Timus Online Judge/Volume 4/1346. Intervals of Monotonicity.ll (Z3defv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@n = external dso_local global i32, align 4
@vals = external dso_local global %"class.std::vector", align 8
@dp = external dso_local global [2 x %"class.std::vector"], align 16

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3defv() #0 {
  %1 = alloca i32, align 4
  %2 = load i32, ptr @n, align 4, !tbaa !5
  %3 = sext i32 %2 to i64
  call void @_ZNSt6vectorIiSaIiEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) @dp, i64 noundef %3)
  %4 = load i32, ptr @n, align 4, !tbaa !5
  %5 = sext i32 %4 to i64
  call void @_ZNSt6vectorIiSaIiEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) getelementptr inbounds ([2 x %"class.std::vector"], ptr @dp, i64 0, i64 1), i64 noundef %5)
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #3
  %6 = load i32, ptr @n, align 4, !tbaa !5
  %7 = sub nsw i32 %6, 1
  store i32 %7, ptr %1, align 4, !tbaa !5
  br label %8

8:                                                ; preds = %71, %0
  %9 = load i32, ptr %1, align 4, !tbaa !5
  %10 = icmp sge i32 %9, 0
  br i1 %10, label %12, label %11

11:                                               ; preds = %8
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #3
  br label %74

12:                                               ; preds = %8
  %13 = load i32, ptr %1, align 4, !tbaa !5
  %14 = sext i32 %13 to i64
  %15 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @dp, i64 noundef %14) #3
  store i32 1, ptr %15, align 4, !tbaa !5
  %16 = load i32, ptr %1, align 4, !tbaa !5
  %17 = sext i32 %16 to i64
  %18 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) getelementptr inbounds ([2 x %"class.std::vector"], ptr @dp, i64 0, i64 1), i64 noundef %17) #3
  store i32 1, ptr %18, align 4, !tbaa !5
  %19 = load i32, ptr %1, align 4, !tbaa !5
  %20 = add nsw i32 %19, 1
  %21 = load i32, ptr @n, align 4, !tbaa !5
  %22 = icmp slt i32 %20, %21
  br i1 %22, label %23, label %44

23:                                               ; preds = %12
  %24 = load i32, ptr %1, align 4, !tbaa !5
  %25 = sext i32 %24 to i64
  %26 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vals, i64 noundef %25) #3
  %27 = load i32, ptr %26, align 4, !tbaa !5
  %28 = load i32, ptr %1, align 4, !tbaa !5
  %29 = add nsw i32 %28, 1
  %30 = sext i32 %29 to i64
  %31 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vals, i64 noundef %30) #3
  %32 = load i32, ptr %31, align 4, !tbaa !5
  %33 = icmp sle i32 %27, %32
  br i1 %33, label %34, label %44

34:                                               ; preds = %23
  %35 = load i32, ptr %1, align 4, !tbaa !5
  %36 = add nsw i32 %35, 1
  %37 = sext i32 %36 to i64
  %38 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @dp, i64 noundef %37) #3
  %39 = load i32, ptr %38, align 4, !tbaa !5
  %40 = add nsw i32 1, %39
  %41 = load i32, ptr %1, align 4, !tbaa !5
  %42 = sext i32 %41 to i64
  %43 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @dp, i64 noundef %42) #3
  store i32 %40, ptr %43, align 4, !tbaa !5
  br label %44

44:                                               ; preds = %34, %23, %12
  %45 = load i32, ptr %1, align 4, !tbaa !5
  %46 = add nsw i32 %45, 1
  %47 = load i32, ptr @n, align 4, !tbaa !5
  %48 = icmp slt i32 %46, %47
  br i1 %48, label %49, label %70

49:                                               ; preds = %44
  %50 = load i32, ptr %1, align 4, !tbaa !5
  %51 = sext i32 %50 to i64
  %52 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vals, i64 noundef %51) #3
  %53 = load i32, ptr %52, align 4, !tbaa !5
  %54 = load i32, ptr %1, align 4, !tbaa !5
  %55 = add nsw i32 %54, 1
  %56 = sext i32 %55 to i64
  %57 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vals, i64 noundef %56) #3
  %58 = load i32, ptr %57, align 4, !tbaa !5
  %59 = icmp sge i32 %53, %58
  br i1 %59, label %60, label %70

60:                                               ; preds = %49
  %61 = load i32, ptr %1, align 4, !tbaa !5
  %62 = add nsw i32 %61, 1
  %63 = sext i32 %62 to i64
  %64 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) getelementptr inbounds ([2 x %"class.std::vector"], ptr @dp, i64 0, i64 1), i64 noundef %63) #3
  %65 = load i32, ptr %64, align 4, !tbaa !5
  %66 = add nsw i32 1, %65
  %67 = load i32, ptr %1, align 4, !tbaa !5
  %68 = sext i32 %67 to i64
  %69 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) getelementptr inbounds ([2 x %"class.std::vector"], ptr @dp, i64 0, i64 1), i64 noundef %68) #3
  store i32 %66, ptr %69, align 4, !tbaa !5
  br label %70

70:                                               ; preds = %60, %49, %44
  br label %71

71:                                               ; preds = %70
  %72 = load i32, ptr %1, align 4, !tbaa !5
  %73 = add nsw i32 %72, -1
  store i32 %73, ptr %1, align 4, !tbaa !5
  br label %8, !llvm.loop !9

74:                                               ; preds = %11
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@n = external dso_local local_unnamed_addr global i32, align 4
@vals = external dso_local global %"class.std::vector", align 8
@dp = external dso_local global [2 x %"class.std::vector"], align 16

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3defv() local_unnamed_addr #0 {
  %1 = load i32, ptr @n, align 4, !tbaa !5
  %2 = sext i32 %1 to i64
  tail call void @_ZNSt6vectorIiSaIiEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) @dp, i64 noundef %2)
  %3 = load i32, ptr @n, align 4, !tbaa !5
  %4 = sext i32 %3 to i64
  tail call void @_ZNSt6vectorIiSaIiEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) getelementptr inbounds (i8, ptr @dp, i64 24), i64 noundef %4)
  %5 = load i32, ptr @n, align 4, !tbaa !5
  %6 = icmp sgt i32 %5, 0
  br i1 %6, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %0
  %7 = zext nneg i32 %5 to i64
  br label %.lr.ph

._crit_edge:                                      ; preds = %37, %0
  ret void

.lr.ph:                                           ; preds = %.lr.ph.preheader, %37
  %indvars.iv = phi i64 [ %7, %.lr.ph.preheader ], [ %indvars.iv.next, %37 ]
  %indvars.iv.next = add nsw i64 %indvars.iv, -1
  %8 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @dp, i64 noundef %indvars.iv.next) #2
  store i32 1, ptr %8, align 4, !tbaa !5
  %9 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) getelementptr inbounds (i8, ptr @dp, i64 24), i64 noundef %indvars.iv.next) #2
  store i32 1, ptr %9, align 4, !tbaa !5
  %10 = load i32, ptr @n, align 4, !tbaa !5
  %11 = sext i32 %10 to i64
  %12 = icmp slt i64 %indvars.iv, %11
  br i1 %12, label %13, label %23

13:                                               ; preds = %.lr.ph
  %14 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vals, i64 noundef %indvars.iv.next) #2
  %15 = load i32, ptr %14, align 4, !tbaa !5
  %16 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vals, i64 noundef %indvars.iv) #2
  %17 = load i32, ptr %16, align 4, !tbaa !5
  %.not = icmp sgt i32 %15, %17
  br i1 %.not, label %23, label %18

18:                                               ; preds = %13
  %19 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @dp, i64 noundef %indvars.iv) #2
  %20 = load i32, ptr %19, align 4, !tbaa !5
  %21 = add nsw i32 %20, 1
  %22 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @dp, i64 noundef %indvars.iv.next) #2
  store i32 %21, ptr %22, align 4, !tbaa !5
  br label %23

23:                                               ; preds = %18, %13, %.lr.ph
  %24 = load i32, ptr @n, align 4, !tbaa !5
  %25 = sext i32 %24 to i64
  %26 = icmp slt i64 %indvars.iv, %25
  br i1 %26, label %27, label %37

27:                                               ; preds = %23
  %28 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vals, i64 noundef %indvars.iv.next) #2
  %29 = load i32, ptr %28, align 4, !tbaa !5
  %30 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vals, i64 noundef %indvars.iv) #2
  %31 = load i32, ptr %30, align 4, !tbaa !5
  %.not15 = icmp slt i32 %29, %31
  br i1 %.not15, label %37, label %32

32:                                               ; preds = %27
  %33 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) getelementptr inbounds (i8, ptr @dp, i64 24), i64 noundef %indvars.iv) #2
  %34 = load i32, ptr %33, align 4, !tbaa !5
  %35 = add nsw i32 %34, 1
  %36 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) getelementptr inbounds (i8, ptr @dp, i64 24), i64 noundef %indvars.iv.next) #2
  store i32 %35, ptr %36, align 4, !tbaa !5
  br label %37

37:                                               ; preds = %23, %27, %32
  %38 = icmp ugt i64 %indvars.iv, 1
  br i1 %38, label %.lr.ph, label %._crit_edge, !llvm.loop !9
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass