; LLVM IR from FrancesoM/Bisc8FX :: sdk_projects/bisc8_platform/ps7_cortexa9_0/standalone_domain/bsp/ps7_cortexa9_0_ (GetCsd)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XSdPs = type { %struct.XSdPs_Config, i32, i32, i32, i32, i8, i8, i8, i8, i32, i8, [4 x i32], i32, [4 x i32], i32, i32, i32, i32, i32, i64, i16, i32, i8, i32 }
%struct.XSdPs_Config = type { i16, i32, i32, i32, i32, i32, i32, i32, i8 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @XSdPs_CmdTransfer(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) #2

; Function Attrs: nounwind uwtable
define dso_local i32 @XSdPs_GetCsd(ptr noundef %0) #3 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca [4 x i32], align 16
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  call void @llvm.lifetime.start.p0(i64 16, ptr %4) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  %8 = load ptr, ptr %2, align 8, !tbaa !5
  %9 = load ptr, ptr %2, align 8, !tbaa !5
  %10 = getelementptr inbounds %struct.XSdPs, ptr %9, i32 0, i32 12
  %11 = load i32, ptr %10, align 8, !tbaa !9
  %12 = call i32 @XSdPs_CmdTransfer(ptr noundef %8, i32 noundef 2304, i32 noundef %11, i32 noundef 0)
  store i32 %12, ptr %3, align 4, !tbaa !15
  %13 = load i32, ptr %3, align 4, !tbaa !15
  %14 = sext i32 %13 to i64
  %15 = icmp ne i64 %14, 0
  br i1 %15, label %16, label %17

16:                                               ; preds = %1
  store i32 1, ptr %3, align 4, !tbaa !15
  br label %140

17:                                               ; preds = %1
  %18 = load ptr, ptr %2, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.XSdPs, ptr %18, i32 0, i32 0
  %20 = getelementptr inbounds %struct.XSdPs_Config, ptr %19, i32 0, i32 1
  %21 = load i32, ptr %20, align 4, !tbaa !16
  %22 = add i32 %21, 16
  %23 = zext i32 %22 to i64
  %24 = call i32 @Xil_In32(i64 noundef %23)
  %25 = getelementptr inbounds [4 x i32], ptr %4, i64 0, i64 0
  store i32 %24, ptr %25, align 16, !tbaa !15
  %26 = load ptr, ptr %2, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.XSdPs, ptr %26, i32 0, i32 0
  %28 = getelementptr inbounds %struct.XSdPs_Config, ptr %27, i32 0, i32 1
  %29 = load i32, ptr %28, align 4, !tbaa !16
  %30 = add i32 %29, 20
  %31 = zext i32 %30 to i64
  %32 = call i32 @Xil_In32(i64 noundef %31)
  %33 = getelementptr inbounds [4 x i32], ptr %4, i64 0, i64 1
  store i32 %32, ptr %33, align 4, !tbaa !15
  %34 = load ptr, ptr %2, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.XSdPs, ptr %34, i32 0, i32 0
  %36 = getelementptr inbounds %struct.XSdPs_Config, ptr %35, i32 0, i32 1
  %37 = load i32, ptr %36, align 4, !tbaa !16
  %38 = add i32 %37, 24
  %39 = zext i32 %38 to i64
  %40 = call i32 @Xil_In32(i64 noundef %39)
  %41 = getelementptr inbounds [4 x i32], ptr %4, i64 0, i64 2
  store i32 %40, ptr %41, align 8, !tbaa !15
  %42 = load ptr, ptr %2, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.XSdPs, ptr %42, i32 0, i32 0
  %44 = getelementptr inbounds %struct.XSdPs_Config, ptr %43, i32 0, i32 1
  %45 = load i32, ptr %44, align 4, !tbaa !16
  %46 = add i32 %45, 28
  %47 = zext i32 %46 to i64
  %48 = call i32 @Xil_In32(i64 noundef %47)
  %49 = getelementptr inbounds [4 x i32], ptr %4, i64 0, i64 3
  store i32 %48, ptr %49, align 4, !tbaa !15
  %50 = getelementptr inbounds [4 x i32], ptr %4, i64 0, i64 0
  %51 = load i32, ptr %50, align 16, !tbaa !15
  %52 = load ptr, ptr %2, align 8, !tbaa !5
  %53 = getelementptr inbounds %struct.XSdPs, ptr %52, i32 0, i32 13
  %54 = getelementptr inbounds [4 x i32], ptr %53, i64 0, i64 0
  store i32 %51, ptr %54, align 4, !tbaa !15
  %55 = getelementptr inbounds [4 x i32], ptr %4, i64 0, i64 1
  %56 = load i32, ptr %55, align 4, !tbaa !15
  %57 = load ptr, ptr %2, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.XSdPs, ptr %57, i32 0, i32 13
  %59 = getelementptr inbounds [4 x i32], ptr %58, i64 0, i64 1
  store i32 %56, ptr %59, align 4, !tbaa !15
  %60 = getelementptr inbounds [4 x i32], ptr %4, i64 0, i64 2
  %61 = load i32, ptr %60, align 8, !tbaa !15
  %62 = load ptr, ptr %2, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.XSdPs, ptr %62, i32 0, i32 13
  %64 = getelementptr inbounds [4 x i32], ptr %63, i64 0, i64 2
  store i32 %61, ptr %64, align 4, !tbaa !15
  %65 = getelementptr inbounds [4 x i32], ptr %4, i64 0, i64 3
  %66 = load i32, ptr %65, align 4, !tbaa !15
  %67 = load ptr, ptr %2, align 8, !tbaa !5
  %68 = getelementptr inbounds %struct.XSdPs, ptr %67, i32 0, i32 13
  %69 = getelementptr inbounds [4 x i32], ptr %68, i64 0, i64 3
  store i32 %66, ptr %69, align 4, !tbaa !15
  %70 = load ptr, ptr %2, align 8, !tbaa !5
  %71 = getelementptr inbounds %struct.XSdPs, ptr %70, i32 0, i32 5
  %72 = load i8, ptr %71, align 4, !tbaa !17
  %73 = zext i8 %72 to i32
  %74 = icmp ne i32 %73, 1
  br i1 %74, label %75, label %83

75:                                               ; preds = %17
  %76 = getelementptr inbounds [4 x i32], ptr %4, i64 0, i64 3
  %77 = load i32, ptr %76, align 4, !tbaa !15
  %78 = and i32 %77, 3932160
  %79 = lshr i32 %78, 18
  %80 = trunc i32 %79 to i8
  %81 = load ptr, ptr %2, align 8, !tbaa !5
  %82 = getelementptr inbounds %struct.XSdPs, ptr %81, i32 0, i32 6
  store i8 %80, ptr %82, align 1, !tbaa !18
  store i32 0, ptr %3, align 4, !tbaa !15
  br label %140

83:                                               ; preds = %17
  %84 = getelementptr inbounds [4 x i32], ptr %4, i64 0, i64 3
  %85 = load i32, ptr %84, align 4, !tbaa !15
  %86 = and i32 %85, 12582912
  %87 = lshr i32 %86, 22
  %88 = icmp eq i32 %87, 0
  br i1 %88, label %89, label %122

89:                                               ; preds = %83
  %90 = getelementptr inbounds [4 x i32], ptr %4, i64 0, i64 2
  %91 = load i32, ptr %90, align 8, !tbaa !15
  %92 = and i32 %91, 3840
  %93 = lshr i32 %92, 8
  %94 = shl i32 1, %93
  store i32 %94, ptr %5, align 4, !tbaa !15
  %95 = getelementptr inbounds [4 x i32], ptr %4, i64 0, i64 1
  %96 = load i32, ptr %95, align 4, !tbaa !15
  %97 = and i32 %96, 896
  %98 = lshr i32 %97, 7
  %99 = add i32 %98, 2
  %100 = shl i32 1, %99
  store i32 %100, ptr %7, align 4, !tbaa !15
  %101 = getelementptr inbounds [4 x i32], ptr %4, i64 0, i64 1
  %102 = load i32, ptr %101, align 4, !tbaa !15
  %103 = and i32 %102, -4194304
  %104 = lshr i32 %103, 22
  store i32 %104, ptr %6, align 4, !tbaa !15
  %105 = getelementptr inbounds [4 x i32], ptr %4, i64 0, i64 2
  %106 = load i32, ptr %105, align 8, !tbaa !15
  %107 = and i32 %106, 3
  %108 = shl i32 %107, 10
  %109 = load i32, ptr %6, align 4, !tbaa !15
  %110 = or i32 %109, %108
  store i32 %110, ptr %6, align 4, !tbaa !15
  %111 = load i32, ptr %6, align 4, !tbaa !15
  %112 = add i32 %111, 1
  %113 = load i32, ptr %7, align 4, !tbaa !15
  %114 = mul i32 %112, %113
  store i32 %114, ptr %6, align 4, !tbaa !15
  %115 = load i32, ptr %6, align 4, !tbaa !15
  %116 = load i32, ptr %5, align 4, !tbaa !15
  %117 = mul i32 %115, %116
  store i32 %117, ptr %6, align 4, !tbaa !15
  %118 = load i32, ptr %6, align 4, !tbaa !15
  %119 = udiv i32 %118, 512
  %120 = load ptr, ptr %2, align 8, !tbaa !5
  %121 = getelementptr inbounds %struct.XSdPs, ptr %120, i32 0, i32 14
  store i32 %119, ptr %121, align 4, !tbaa !19
  br label %139

122:                                              ; preds = %83
  %123 = getelementptr inbounds [4 x i32], ptr %4, i64 0, i64 3
  %124 = load i32, ptr %123, align 4, !tbaa !15
  %125 = and i32 %124, 12582912
  %126 = lshr i32 %125, 22
  %127 = icmp eq i32 %126, 1
  br i1 %127, label %128, label %137

128:                                              ; preds = %122
  %129 = getelementptr inbounds [4 x i32], ptr %4, i64 0, i64 1
  %130 = load i32, ptr %129, align 4, !tbaa !15
  %131 = and i32 %130, 1073741568
  %132 = lshr i32 %131, 8
  %133 = add i32 %132, 1
  %134 = mul i32 %133, 1024
  %135 = load ptr, ptr %2, align 8, !tbaa !5
  %136 = getelementptr inbounds %struct.XSdPs, ptr %135, i32 0, i32 14
  store i32 %134, ptr %136, align 4, !tbaa !19
  br label %138

137:                                              ; preds = %122
  store i32 1, ptr %3, align 4, !tbaa !15
  br label %140

138:                                              ; preds = %128
  br label %139

139:                                              ; preds = %138, %89
  store i32 0, ptr %3, align 4, !tbaa !15
  br label %140

140:                                              ; preds = %139, %137, %75, %16
  %141 = load i32, ptr %3, align 4, !tbaa !15
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  ret i32 %141
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !13, i64 80}
!10 = !{!"", !11, i64 0, !13, i64 36, !13, i64 40, !13, i64 44, !13, i64 48, !7, i64 52, !7, i64 53, !7, i64 54, !7, i64 55, !13, i64 56, !7, i64 60, !7, i64 64, !13, i64 80, !7, i64 84, !13, i64 100, !13, i64 104, !13, i64 108, !13, i64 112, !13, i64 116, !14, i64 120, !12, i64 128, !13, i64 132, !7, i64 136, !13, i64 140}
!11 = !{!"", !12, i64 0, !13, i64 4, !13, i64 8, !13, i64 12, !13, i64 16, !13, i64 20, !13, i64 24, !13, i64 28, !7, i64 32}
!12 = !{!"short", !7, i64 0}
!13 = !{!"int", !7, i64 0}
!14 = !{!"long", !7, i64 0}
!15 = !{!13, !13, i64 0}
!16 = !{!10, !13, i64 4}
!17 = !{!10, !7, i64 52}
!18 = !{!10, !7, i64 53}
!19 = !{!10, !13, i64 100}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare i32 @XSdPs_CmdTransfer(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @XSdPs_GetCsd(ptr noundef %0) local_unnamed_addr #2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 80
  %3 = load i32, ptr %2, align 8, !tbaa !5
  %4 = tail call i32 @XSdPs_CmdTransfer(ptr noundef %0, i32 noundef 2304, i32 noundef %3, i32 noundef 0) #3
  %.not = icmp eq i32 %4, 0
  br i1 %.not, label %5, label %57

5:                                                ; preds = %1
  %6 = getelementptr inbounds i8, ptr %0, i64 4
  %7 = load i32, ptr %6, align 4, !tbaa !13
  %8 = add i32 %7, 16
  %9 = zext i32 %8 to i64
  %10 = tail call i32 @Xil_In32(i64 noundef %9)
  %11 = load i32, ptr %6, align 4, !tbaa !13
  %12 = add i32 %11, 20
  %13 = zext i32 %12 to i64
  %14 = tail call i32 @Xil_In32(i64 noundef %13)
  %15 = load i32, ptr %6, align 4, !tbaa !13
  %16 = add i32 %15, 24
  %17 = zext i32 %16 to i64
  %18 = tail call i32 @Xil_In32(i64 noundef %17)
  %19 = load i32, ptr %6, align 4, !tbaa !13
  %20 = add i32 %19, 28
  %21 = zext i32 %20 to i64
  %22 = tail call i32 @Xil_In32(i64 noundef %21)
  %23 = getelementptr inbounds i8, ptr %0, i64 84
  store i32 %10, ptr %23, align 4, !tbaa !14
  %24 = getelementptr inbounds i8, ptr %0, i64 88
  store i32 %14, ptr %24, align 4, !tbaa !14
  %25 = getelementptr inbounds i8, ptr %0, i64 92
  store i32 %18, ptr %25, align 4, !tbaa !14
  %26 = getelementptr inbounds i8, ptr %0, i64 96
  store i32 %22, ptr %26, align 4, !tbaa !14
  %27 = getelementptr inbounds i8, ptr %0, i64 52
  %28 = load i8, ptr %27, align 4, !tbaa !15
  %.not30 = icmp eq i8 %28, 1
  br i1 %.not30, label %34, label %29

29:                                               ; preds = %5
  %30 = lshr i32 %22, 18
  %31 = trunc i32 %30 to i8
  %32 = and i8 %31, 15
  %33 = getelementptr inbounds i8, ptr %0, i64 53
  store i8 %32, ptr %33, align 1, !tbaa !16
  br label %57

34:                                               ; preds = %5
  %35 = lshr i32 %22, 22
  %36 = and i32 %35, 3
  switch i32 %36, label %57 [
    i32 0, label %37
    i32 1, label %52
  ]

37:                                               ; preds = %34
  %38 = lshr i32 %18, 8
  %39 = and i32 %38, 15
  %40 = lshr i32 %14, 7
  %41 = and i32 %40, 7
  %42 = lshr i32 %14, 22
  %43 = shl i32 %18, 10
  %44 = and i32 %43, 3072
  %45 = add nuw nsw i32 %42, 1
  %46 = add nuw nsw i32 %45, %44
  %47 = add nuw nsw i32 %41, 2
  %48 = shl nuw nsw i32 %46, %47
  %49 = shl i32 %48, %39
  %50 = lshr i32 %49, 9
  %51 = getelementptr inbounds i8, ptr %0, i64 100
  store i32 %50, ptr %51, align 4, !tbaa !17
  br label %57

52:                                               ; preds = %34
  %53 = shl i32 %14, 2
  %54 = and i32 %53, -1024
  %55 = add i32 %54, 1024
  %56 = getelementptr inbounds i8, ptr %0, i64 100
  store i32 %55, ptr %56, align 4, !tbaa !17
  br label %57

57:                                               ; preds = %37, %52, %34, %1, %29
  %.0 = phi i32 [ 0, %29 ], [ 1, %1 ], [ 1, %34 ], [ 0, %52 ], [ 0, %37 ]
  ret i32 %.0
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 80}
!6 = !{!"", !7, i64 0, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !9, i64 52, !9, i64 53, !9, i64 54, !9, i64 55, !11, i64 56, !9, i64 60, !9, i64 64, !11, i64 80, !9, i64 84, !11, i64 100, !11, i64 104, !11, i64 108, !11, i64 112, !11, i64 116, !12, i64 120, !8, i64 128, !11, i64 132, !9, i64 136, !11, i64 140}
!7 = !{!"", !8, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !9, i64 32}
!8 = !{!"short", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"long", !9, i64 0}
!13 = !{!6, !11, i64 4}
!14 = !{!11, !11, i64 0}
!15 = !{!6, !9, i64 52}
!16 = !{!6, !9, i64 53}
!17 = !{!6, !11, i64 100}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass