; LLVM IR from Izaron/ACM-ICPC :: Timus Online Judge/Volume 9/1809. Chapaev and Potatoes.ll (Z6isGoodv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@xs = external dso_local global [4 x i32], align 16
@ys = external dso_local global [4 x i32], align 16

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z6isGoodv() #0 {
  %1 = alloca i1, align 1
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #2
  store i32 0, ptr %2, align 4, !tbaa !5
  br label %6

6:                                                ; preds = %78, %0
  %7 = load i32, ptr %2, align 4, !tbaa !5
  %8 = icmp slt i32 %7, 4
  br i1 %8, label %10, label %9

9:                                                ; preds = %6
  store i32 2, ptr %3, align 4
  br label %81

10:                                               ; preds = %6
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  store i32 0, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 0, ptr %5, align 4, !tbaa !5
  br label %11

11:                                               ; preds = %65, %10
  %12 = load i32, ptr %5, align 4, !tbaa !5
  %13 = icmp slt i32 %12, 4
  br i1 %13, label %15, label %14

14:                                               ; preds = %11
  store i32 5, ptr %3, align 4
  br label %68

15:                                               ; preds = %11
  %16 = load i32, ptr %2, align 4, !tbaa !5
  %17 = load i32, ptr %5, align 4, !tbaa !5
  %18 = icmp eq i32 %16, %17
  br i1 %18, label %19, label %20

19:                                               ; preds = %15
  br label %65

20:                                               ; preds = %15
  %21 = load i32, ptr %5, align 4, !tbaa !5
  %22 = sext i32 %21 to i64
  %23 = getelementptr inbounds [4 x i32], ptr @xs, i64 0, i64 %22
  %24 = load i32, ptr %23, align 4, !tbaa !5
  %25 = load i32, ptr %2, align 4, !tbaa !5
  %26 = sext i32 %25 to i64
  %27 = getelementptr inbounds [4 x i32], ptr @xs, i64 0, i64 %26
  %28 = load i32, ptr %27, align 4, !tbaa !5
  %29 = icmp eq i32 %24, %28
  br i1 %29, label %40, label %30

30:                                               ; preds = %20
  %31 = load i32, ptr %5, align 4, !tbaa !5
  %32 = sext i32 %31 to i64
  %33 = getelementptr inbounds [4 x i32], ptr @ys, i64 0, i64 %32
  %34 = load i32, ptr %33, align 4, !tbaa !5
  %35 = load i32, ptr %2, align 4, !tbaa !5
  %36 = sext i32 %35 to i64
  %37 = getelementptr inbounds [4 x i32], ptr @ys, i64 0, i64 %36
  %38 = load i32, ptr %37, align 4, !tbaa !5
  %39 = icmp eq i32 %34, %38
  br i1 %39, label %40, label %43

40:                                               ; preds = %30, %20
  %41 = load i32, ptr %4, align 4, !tbaa !5
  %42 = add nsw i32 %41, 1
  store i32 %42, ptr %4, align 4, !tbaa !5
  br label %43

43:                                               ; preds = %40, %30
  %44 = load i32, ptr %5, align 4, !tbaa !5
  %45 = sext i32 %44 to i64
  %46 = getelementptr inbounds [4 x i32], ptr @xs, i64 0, i64 %45
  %47 = load i32, ptr %46, align 4, !tbaa !5
  %48 = load i32, ptr %2, align 4, !tbaa !5
  %49 = sext i32 %48 to i64
  %50 = getelementptr inbounds [4 x i32], ptr @xs, i64 0, i64 %49
  %51 = load i32, ptr %50, align 4, !tbaa !5
  %52 = icmp eq i32 %47, %51
  br i1 %52, label %53, label %64

53:                                               ; preds = %43
  %54 = load i32, ptr %5, align 4, !tbaa !5
  %55 = sext i32 %54 to i64
  %56 = getelementptr inbounds [4 x i32], ptr @ys, i64 0, i64 %55
  %57 = load i32, ptr %56, align 4, !tbaa !5
  %58 = load i32, ptr %2, align 4, !tbaa !5
  %59 = sext i32 %58 to i64
  %60 = getelementptr inbounds [4 x i32], ptr @ys, i64 0, i64 %59
  %61 = load i32, ptr %60, align 4, !tbaa !5
  %62 = icmp eq i32 %57, %61
  br i1 %62, label %63, label %64

63:                                               ; preds = %53
  store i1 false, ptr %1, align 1
  store i32 1, ptr %3, align 4
  br label %68

64:                                               ; preds = %53, %43
  br label %65

65:                                               ; preds = %64, %19
  %66 = load i32, ptr %5, align 4, !tbaa !5
  %67 = add nsw i32 %66, 1
  store i32 %67, ptr %5, align 4, !tbaa !5
  br label %11, !llvm.loop !9

68:                                               ; preds = %63, %14
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  %69 = load i32, ptr %3, align 4
  switch i32 %69, label %75 [
    i32 5, label %70
  ]

70:                                               ; preds = %68
  %71 = load i32, ptr %4, align 4, !tbaa !5
  %72 = icmp ne i32 %71, 1
  br i1 %72, label %73, label %74

73:                                               ; preds = %70
  store i1 false, ptr %1, align 1
  store i32 1, ptr %3, align 4
  br label %75

74:                                               ; preds = %70
  store i32 0, ptr %3, align 4
  br label %75

75:                                               ; preds = %74, %73, %68
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  %76 = load i32, ptr %3, align 4
  switch i32 %76, label %81 [
    i32 0, label %77
  ]

77:                                               ; preds = %75
  br label %78

78:                                               ; preds = %77
  %79 = load i32, ptr %2, align 4, !tbaa !5
  %80 = add nsw i32 %79, 1
  store i32 %80, ptr %2, align 4, !tbaa !5
  br label %6, !llvm.loop !11

81:                                               ; preds = %75, %9
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #2
  %82 = load i32, ptr %3, align 4
  switch i32 %82, label %86 [
    i32 2, label %83
    i32 1, label %84
  ]

83:                                               ; preds = %81
  unreachable

84:                                               ; preds = %81
  %85 = load i1, ptr %1, align 1
  ret i1 %85

86:                                               ; preds = %81
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef zeroext i1 @_Z6isGoodv() local_unnamed_addr #0 {
.critedge:
  ret i1 false
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: ADCEPass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass