; LLVM IR from FrancesoM/Bisc8FX :: sdk_projects/bisc8_platform/ps7_cortexa9_0/standalone_domain/bsp/ps7_cortexa9_0_ (IntrHandler)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XGpioPs = type { %struct.XGpioPs_Config, i32, ptr, ptr, i32, i32, i8, i32 }
%struct.XGpioPs_Config = type { i16, i64 }

@Xil_AssertStatus = external global i32, align 4
@.str = external hidden unnamed_addr constant [169 x i8], align 1

declare void @Xil_Assert(ptr noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @XGpioPs_IntrGetEnabled(ptr noundef, i8 noundef zeroext) #2

; Function Attrs: nounwind uwtable
declare dso_local i32 @XGpioPs_IntrGetStatus(ptr noundef, i8 noundef zeroext) #2

; Function Attrs: nounwind uwtable
declare dso_local void @XGpioPs_IntrClear(ptr noundef, i8 noundef zeroext, i32 noundef) #2

; Function Attrs: nounwind uwtable
define dso_local void @XGpioPs_IntrHandler(ptr noundef %0) #2 {
  %2 = alloca ptr, align 8
  %3 = alloca i8, align 1
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %3) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  %7 = load ptr, ptr %2, align 8, !tbaa !5
  %8 = icmp ne ptr %7, null
  br i1 %8, label %9, label %10

9:                                                ; preds = %1
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %11

10:                                               ; preds = %1
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 753)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 1, ptr %6, align 4
  br label %60

11:                                               ; preds = %9
  %12 = load ptr, ptr %2, align 8, !tbaa !5
  %13 = getelementptr inbounds %struct.XGpioPs, ptr %12, i32 0, i32 1
  %14 = load i32, ptr %13, align 8, !tbaa !11
  %15 = icmp eq i32 %14, 286331153
  br i1 %15, label %16, label %17

16:                                               ; preds = %11
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %18

17:                                               ; preds = %11
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 754)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 1, ptr %6, align 4
  br label %60

18:                                               ; preds = %16
  store i8 0, ptr %3, align 1, !tbaa !16
  br label %19

19:                                               ; preds = %56, %18
  %20 = load i8, ptr %3, align 1, !tbaa !16
  %21 = zext i8 %20 to i32
  %22 = load ptr, ptr %2, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.XGpioPs, ptr %22, i32 0, i32 6
  %24 = load i8, ptr %23, align 8, !tbaa !17
  %25 = zext i8 %24 to i32
  %26 = icmp slt i32 %21, %25
  br i1 %26, label %27, label %59

27:                                               ; preds = %19
  %28 = load ptr, ptr %2, align 8, !tbaa !5
  %29 = load i8, ptr %3, align 1, !tbaa !16
  %30 = call i32 @XGpioPs_IntrGetStatus(ptr noundef %28, i8 noundef zeroext %29)
  store i32 %30, ptr %4, align 4, !tbaa !9
  %31 = load ptr, ptr %2, align 8, !tbaa !5
  %32 = load i8, ptr %3, align 1, !tbaa !16
  %33 = call i32 @XGpioPs_IntrGetEnabled(ptr noundef %31, i8 noundef zeroext %32)
  store i32 %33, ptr %5, align 4, !tbaa !9
  %34 = load i32, ptr %4, align 4, !tbaa !9
  %35 = load i32, ptr %5, align 4, !tbaa !9
  %36 = and i32 %34, %35
  %37 = icmp ne i32 %36, 0
  br i1 %37, label %38, label %55

38:                                               ; preds = %27
  %39 = load ptr, ptr %2, align 8, !tbaa !5
  %40 = load i8, ptr %3, align 1, !tbaa !16
  %41 = load i32, ptr %4, align 4, !tbaa !9
  %42 = load i32, ptr %5, align 4, !tbaa !9
  %43 = and i32 %41, %42
  call void @XGpioPs_IntrClear(ptr noundef %39, i8 noundef zeroext %40, i32 noundef %43)
  %44 = load ptr, ptr %2, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.XGpioPs, ptr %44, i32 0, i32 2
  %46 = load ptr, ptr %45, align 8, !tbaa !18
  %47 = load ptr, ptr %2, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.XGpioPs, ptr %47, i32 0, i32 3
  %49 = load ptr, ptr %48, align 8, !tbaa !19
  %50 = load i8, ptr %3, align 1, !tbaa !16
  %51 = zext i8 %50 to i32
  %52 = load i32, ptr %4, align 4, !tbaa !9
  %53 = load i32, ptr %5, align 4, !tbaa !9
  %54 = and i32 %52, %53
  call void %46(ptr noundef %49, i32 noundef %51, i32 noundef %54)
  br label %55

55:                                               ; preds = %38, %27
  br label %56

56:                                               ; preds = %55
  %57 = load i8, ptr %3, align 1, !tbaa !16
  %58 = add i8 %57, 1
  store i8 %58, ptr %3, align 1, !tbaa !16
  br label %19, !llvm.loop !20

59:                                               ; preds = %19
  store i32 0, ptr %6, align 4
  br label %60

60:                                               ; preds = %59, %17, %10
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %3) #3
  %61 = load i32, ptr %6, align 4
  switch i32 %61, label %63 [
    i32 0, label %62
    i32 1, label %62
  ]

62:                                               ; preds = %60, %60
  ret void

63:                                               ; preds = %60
  unreachable
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 16}
!12 = !{!"", !13, i64 0, !10, i64 16, !6, i64 24, !6, i64 32, !10, i64 40, !10, i64 44, !7, i64 48, !10, i64 52}
!13 = !{!"", !14, i64 0, !15, i64 8}
!14 = !{!"short", !7, i64 0}
!15 = !{!"long", !7, i64 0}
!16 = !{!7, !7, i64 0}
!17 = !{!12, !7, i64 48}
!18 = !{!12, !6, i64 24}
!19 = !{!12, !6, i64 32}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@Xil_AssertStatus = external local_unnamed_addr global i32, align 4
@.str = external hidden unnamed_addr constant [169 x i8], align 1

declare void @Xil_Assert(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @XGpioPs_IntrGetEnabled(ptr noundef, i8 noundef zeroext) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @XGpioPs_IntrGetStatus(ptr noundef, i8 noundef zeroext) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local void @XGpioPs_IntrClear(ptr noundef, i8 noundef zeroext, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local void @XGpioPs_IntrHandler(ptr noundef %0) local_unnamed_addr #1 {
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %.loopexit.sink.split, label %2

2:                                                ; preds = %1
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !5
  %3 = getelementptr inbounds i8, ptr %0, i64 16
  %4 = load i32, ptr %3, align 8, !tbaa !9
  %5 = icmp eq i32 %4, 286331153
  br i1 %5, label %6, label %.loopexit.sink.split

6:                                                ; preds = %2
  %7 = getelementptr inbounds i8, ptr %0, i64 48
  %8 = load i8, ptr %7, align 8, !tbaa !15
  %.not24 = icmp eq i8 %8, 0
  br i1 %.not24, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %6
  %9 = getelementptr inbounds i8, ptr %0, i64 24
  %10 = getelementptr inbounds i8, ptr %0, i64 32
  br label %11

11:                                               ; preds = %.lr.ph, %19
  %indvars.iv = phi i32 [ 0, %.lr.ph ], [ %indvars.iv.next, %19 ]
  %12 = trunc nuw i32 %indvars.iv to i8
  %13 = tail call i32 @XGpioPs_IntrGetStatus(ptr noundef nonnull %0, i8 noundef zeroext %12)
  %14 = tail call i32 @XGpioPs_IntrGetEnabled(ptr noundef nonnull %0, i8 noundef zeroext %12)
  %15 = and i32 %14, %13
  %.not22 = icmp eq i32 %15, 0
  br i1 %.not22, label %19, label %16

16:                                               ; preds = %11
  tail call void @XGpioPs_IntrClear(ptr noundef nonnull %0, i8 noundef zeroext %12, i32 noundef %15)
  %17 = load ptr, ptr %9, align 8, !tbaa !16
  %18 = load ptr, ptr %10, align 8, !tbaa !17
  tail call void %17(ptr noundef %18, i32 noundef %indvars.iv, i32 noundef %15) #2
  br label %19

19:                                               ; preds = %11, %16
  %indvars.iv.next = add nuw nsw i32 %indvars.iv, 1
  %20 = load i8, ptr %7, align 8, !tbaa !15
  %21 = zext i8 %20 to i32
  %22 = icmp ult i32 %indvars.iv.next, %21
  br i1 %22, label %11, label %.loopexit, !llvm.loop !18

.loopexit.sink.split:                             ; preds = %2, %1
  %.sink = phi i32 [ 753, %1 ], [ 754, %2 ]
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef %.sink) #2
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %.loopexit

.loopexit:                                        ; preds = %19, %.loopexit.sink.split, %6
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 16}
!10 = !{!"", !11, i64 0, !6, i64 16, !14, i64 24, !14, i64 32, !6, i64 40, !6, i64 44, !7, i64 48, !6, i64 52}
!11 = !{!"", !12, i64 0, !13, i64 8}
!12 = !{!"short", !7, i64 0}
!13 = !{!"long", !7, i64 0}
!14 = !{!"any pointer", !7, i64 0}
!15 = !{!10, !7, i64 48}
!16 = !{!10, !14, i64 24}
!17 = !{!10, !14, i64 32}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass