; LLVM IR from FrancesoM/Bisc8FX :: sdk_projects/bisc8_platform/ps7_cortexa9_0/standalone_domain/bsp/ps7_cortexa9_0_ (Write)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.xencons_interface = type { [1024 x i8], [2048 x i8], i32, i32, i32, i32 }

@guest_phys_page = external hidden global i64, align 8
@cons_evtch = external hidden global i32, align 4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @XPVXenConsole_Write(ptr noundef %0) #1 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  store i32 0, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 0, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  %10 = load i64, ptr @guest_phys_page, align 8, !tbaa !11
  %11 = shl i64 %10, 12
  %12 = inttoptr i64 %11 to ptr
  store ptr %12, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %13 = load ptr, ptr %6, align 8, !tbaa !5
  %14 = getelementptr inbounds %struct.xencons_interface, ptr %13, i32 0, i32 4
  %15 = load i32, ptr %14, align 4, !tbaa !13
  store i32 %15, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %16 = load ptr, ptr %6, align 8, !tbaa !5
  %17 = getelementptr inbounds %struct.xencons_interface, ptr %16, i32 0, i32 5
  %18 = load i32, ptr %17, align 4, !tbaa !15
  store i32 %18, ptr %8, align 4, !tbaa !9
  call void asm sideeffect "dsb sy", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !16
  %19 = load i32, ptr %8, align 4, !tbaa !9
  %20 = load i32, ptr %7, align 4, !tbaa !9
  %21 = sub i32 %19, %20
  %22 = zext i32 %21 to i64
  %23 = icmp ugt i64 %22, 2048
  br i1 %23, label %24, label %26

24:                                               ; preds = %1
  %25 = load i32, ptr @cons_evtch, align 4, !tbaa !9
  call void @notify_evtch(i32 noundef %25)
  store i32 -4, ptr %2, align 4
  store i32 1, ptr %9, align 4
  br label %63

26:                                               ; preds = %1
  br label %27

27:                                               ; preds = %40, %26
  %28 = load ptr, ptr %3, align 8, !tbaa !5
  %29 = load i8, ptr %28, align 1, !tbaa !17
  %30 = sext i8 %29 to i32
  %31 = icmp ne i32 %30, 0
  br i1 %31, label %32, label %38

32:                                               ; preds = %27
  %33 = load i32, ptr %8, align 4, !tbaa !9
  %34 = load i32, ptr %7, align 4, !tbaa !9
  %35 = sub i32 %33, %34
  %36 = zext i32 %35 to i64
  %37 = icmp ult i64 %36, 2048
  br label %38

38:                                               ; preds = %32, %27
  %39 = phi i1 [ false, %27 ], [ %37, %32 ]
  br i1 %39, label %40, label %57

40:                                               ; preds = %38
  %41 = load i32, ptr %8, align 4, !tbaa !9
  %42 = zext i32 %41 to i64
  %43 = and i64 %42, 2047
  %44 = trunc i64 %43 to i32
  store i32 %44, ptr %5, align 4, !tbaa !9
  %45 = load ptr, ptr %3, align 8, !tbaa !5
  %46 = getelementptr inbounds i8, ptr %45, i32 1
  store ptr %46, ptr %3, align 8, !tbaa !5
  %47 = load i8, ptr %45, align 1, !tbaa !17
  %48 = load ptr, ptr %6, align 8, !tbaa !5
  %49 = getelementptr inbounds %struct.xencons_interface, ptr %48, i32 0, i32 1
  %50 = load i32, ptr %5, align 4, !tbaa !9
  %51 = zext i32 %50 to i64
  %52 = getelementptr inbounds [2048 x i8], ptr %49, i64 0, i64 %51
  store i8 %47, ptr %52, align 1, !tbaa !17
  %53 = load i32, ptr %8, align 4, !tbaa !9
  %54 = add i32 %53, 1
  store i32 %54, ptr %8, align 4, !tbaa !9
  %55 = load i32, ptr %4, align 4, !tbaa !9
  %56 = add i32 %55, 1
  store i32 %56, ptr %4, align 4, !tbaa !9
  br label %27, !llvm.loop !18

57:                                               ; preds = %38
  call void asm sideeffect "dsb st", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !20
  %58 = load i32, ptr %8, align 4, !tbaa !9
  %59 = load ptr, ptr %6, align 8, !tbaa !5
  %60 = getelementptr inbounds %struct.xencons_interface, ptr %59, i32 0, i32 5
  store i32 %58, ptr %60, align 4, !tbaa !15
  %61 = load i32, ptr @cons_evtch, align 4, !tbaa !9
  call void @notify_evtch(i32 noundef %61)
  %62 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %62, ptr %2, align 4
  store i32 1, ptr %9, align 4
  br label %63

63:                                               ; preds = %57, %24
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  %64 = load i32, ptr %2, align 4
  ret i32 %64
}

declare void @notify_evtch(i32 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!14, !10, i64 3080}
!14 = !{!"xencons_interface", !7, i64 0, !7, i64 1024, !10, i64 3072, !10, i64 3076, !10, i64 3080, !10, i64 3084}
!15 = !{!14, !10, i64 3084}
!16 = !{i64 2147923185}
!17 = !{!7, !7, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
!20 = !{i64 2147923301}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@guest_phys_page = external hidden local_unnamed_addr global i64, align 8
@cons_evtch = external hidden local_unnamed_addr global i32, align 4

; Function Attrs: nounwind uwtable
define dso_local i32 @XPVXenConsole_Write(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
  %2 = load i64, ptr @guest_phys_page, align 8, !tbaa !5
  %3 = shl i64 %2, 12
  %4 = inttoptr i64 %3 to ptr
  %5 = getelementptr inbounds i8, ptr %4, i64 3080
  %6 = load i32, ptr %5, align 8, !tbaa !9
  %7 = getelementptr inbounds i8, ptr %4, i64 3084
  %8 = load i32, ptr %7, align 4, !tbaa !12
  tail call void asm sideeffect "dsb sy", "~{memory},~{dirflag},~{fpsr},~{flags}"() #2, !srcloc !13
  %9 = sub i32 %8, %6
  %10 = icmp ugt i32 %9, 2048
  br i1 %10, label %29, label %.preheader

.preheader:                                       ; preds = %1
  %11 = load i8, ptr %0, align 1, !tbaa !14
  %12 = icmp ne i8 %11, 0
  %13 = icmp ne i32 %9, 2048
  %14 = and i1 %12, %13
  br i1 %14, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %.preheader
  %15 = getelementptr inbounds i8, ptr %4, i64 1024
  br label %16

16:                                               ; preds = %.lr.ph, %16
  %17 = phi i8 [ %11, %.lr.ph ], [ %24, %16 ]
  %.021 = phi i32 [ %8, %.lr.ph ], [ %22, %16 ]
  %.01720 = phi ptr [ %0, %.lr.ph ], [ %19, %16 ]
  %.01819 = phi i32 [ 0, %.lr.ph ], [ %23, %16 ]
  %18 = and i32 %.021, 2047
  %19 = getelementptr inbounds i8, ptr %.01720, i64 1
  %20 = zext nneg i32 %18 to i64
  %21 = getelementptr inbounds [2048 x i8], ptr %15, i64 0, i64 %20
  store i8 %17, ptr %21, align 1, !tbaa !14
  %22 = add i32 %.021, 1
  %23 = add nuw nsw i32 %.01819, 1
  %24 = load i8, ptr %19, align 1, !tbaa !14
  %25 = icmp ne i8 %24, 0
  %26 = sub i32 %22, %6
  %27 = icmp ult i32 %26, 2048
  %28 = select i1 %25, i1 %27, i1 false
  br i1 %28, label %16, label %._crit_edge, !llvm.loop !15

._crit_edge:                                      ; preds = %16, %.preheader
  %.018.lcssa = phi i32 [ 0, %.preheader ], [ %23, %16 ]
  %.0.lcssa = phi i32 [ %8, %.preheader ], [ %22, %16 ]
  tail call void asm sideeffect "dsb st", "~{memory},~{dirflag},~{fpsr},~{flags}"() #2, !srcloc !17
  store i32 %.0.lcssa, ptr %7, align 4, !tbaa !12
  br label %29

29:                                               ; preds = %1, %._crit_edge
  %.016 = phi i32 [ %.018.lcssa, %._crit_edge ], [ -4, %1 ]
  %30 = load i32, ptr @cons_evtch, align 4, !tbaa !18
  tail call void @notify_evtch(i32 noundef %30) #2
  ret i32 %.016
}

declare void @notify_evtch(i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 3080}
!10 = !{!"xencons_interface", !7, i64 0, !7, i64 1024, !11, i64 3072, !11, i64 3076, !11, i64 3080, !11, i64 3084}
!11 = !{!"int", !7, i64 0}
!12 = !{!10, !11, i64 3084}
!13 = !{i64 2147923185}
!14 = !{!7, !7, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = !{i64 2147923301}
!18 = !{!11, !11, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass