; LLVM IR from FrancesoM/Bisc8FX :: sdk_projects/bisc8_platform/zynq_fsbl (qspi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XQspiPs = type { %struct.XQspiPs_Config, i32, ptr, ptr, i32, i32, i32, ptr, ptr, i32 }
%struct.XQspiPs_Config = type { i16, i32, i32, i8 }

@QspiInstance = external dso_local global %struct.XQspiPs, align 8
@QspiInstancePtr = external dso_local global ptr, align 8
@FlashReadBaseAddress = external global i32, align 4
@QspiFlashSize = external dso_local global i32, align 4
@LinearBootDeviceFlag = external global i8, align 1

; Function Attrs: nounwind uwtable
define dso_local i32 @InitQspi() #0 {
  %1 = alloca i32, align 4
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  store ptr @QspiInstance, ptr @QspiInstancePtr, align 8, !tbaa !5
  store i32 -67108864, ptr @FlashReadBaseAddress, align 4, !tbaa !9
  %6 = call ptr @XQspiPs_LookupConfig(i16 noundef zeroext 0)
  store ptr %6, ptr %2, align 8, !tbaa !5
  %7 = load ptr, ptr %2, align 8, !tbaa !5
  %8 = icmp eq ptr null, %7
  br i1 %8, label %9, label %10

9:                                                ; preds = %0
  store i32 1, ptr %1, align 4
  store i32 1, ptr %5, align 4
  br label %67

10:                                               ; preds = %0
  %11 = load ptr, ptr @QspiInstancePtr, align 8, !tbaa !5
  %12 = load ptr, ptr %2, align 8, !tbaa !5
  %13 = load ptr, ptr %2, align 8, !tbaa !5
  %14 = getelementptr inbounds %struct.XQspiPs_Config, ptr %13, i32 0, i32 1
  %15 = load i32, ptr %14, align 4, !tbaa !11
  %16 = call i32 @XQspiPs_CfgInitialize(ptr noundef %11, ptr noundef %12, i32 noundef %15)
  store i32 %16, ptr %3, align 4, !tbaa !9
  %17 = load i32, ptr %3, align 4, !tbaa !9
  %18 = sext i32 %17 to i64
  %19 = icmp ne i64 %18, 0
  br i1 %19, label %20, label %21

20:                                               ; preds = %10
  store i32 1, ptr %1, align 4
  store i32 1, ptr %5, align 4
  br label %67

21:                                               ; preds = %10
  %22 = load ptr, ptr @QspiInstancePtr, align 8, !tbaa !5
  %23 = call i32 @XQspiPs_SetOptions(ptr noundef %22, i32 noundef 272)
  %24 = load ptr, ptr @QspiInstancePtr, align 8, !tbaa !5
  %25 = call i32 @XQspiPs_SetClkPrescaler(ptr noundef %24, i8 noundef zeroext 2)
  %26 = load ptr, ptr @QspiInstancePtr, align 8, !tbaa !5
  %27 = call i32 @XQspiPs_SetSlaveSelect(ptr noundef %26)
  %28 = call i32 @FlashReadID()
  store i32 %28, ptr %3, align 4, !tbaa !9
  %29 = load i32, ptr %3, align 4, !tbaa !9
  %30 = sext i32 %29 to i64
  %31 = icmp ne i64 %30, 0
  br i1 %31, label %32, label %33

32:                                               ; preds = %21
  store i32 1, ptr %1, align 4
  store i32 1, ptr %5, align 4
  br label %67

33:                                               ; preds = %21
  %34 = load i32, ptr @QspiFlashSize, align 4, !tbaa !9
  %35 = icmp ule i32 %34, 16777216
  br i1 %35, label %36, label %52

36:                                               ; preds = %33
  store i8 1, ptr @LinearBootDeviceFlag, align 1, !tbaa !14
  %37 = load ptr, ptr @QspiInstancePtr, align 8, !tbaa !5
  %38 = call i32 @XQspiPs_SetOptions(ptr noundef %37, i32 noundef 384)
  store i32 -2147483285, ptr %4, align 4, !tbaa !9
  %39 = load ptr, ptr @QspiInstancePtr, align 8, !tbaa !5
  %40 = getelementptr inbounds %struct.XQspiPs, ptr %39, i32 0, i32 0
  %41 = getelementptr inbounds %struct.XQspiPs_Config, ptr %40, i32 0, i32 1
  %42 = load i32, ptr %41, align 4, !tbaa !15
  %43 = add i32 %42, 160
  %44 = zext i32 %43 to i64
  %45 = load i32, ptr %4, align 4, !tbaa !9
  call void @Xil_Out32(i64 noundef %44, i32 noundef %45)
  %46 = load ptr, ptr @QspiInstancePtr, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.XQspiPs, ptr %46, i32 0, i32 0
  %48 = getelementptr inbounds %struct.XQspiPs_Config, ptr %47, i32 0, i32 1
  %49 = load i32, ptr %48, align 4, !tbaa !15
  %50 = add i32 %49, 20
  %51 = zext i32 %50 to i64
  call void @Xil_Out32(i64 noundef %51, i32 noundef 1)
  br label %66

52:                                               ; preds = %33
  store i32 363, ptr %4, align 4, !tbaa !9
  %53 = load ptr, ptr @QspiInstancePtr, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.XQspiPs, ptr %53, i32 0, i32 0
  %55 = getelementptr inbounds %struct.XQspiPs_Config, ptr %54, i32 0, i32 1
  %56 = load i32, ptr %55, align 4, !tbaa !15
  %57 = add i32 %56, 160
  %58 = zext i32 %57 to i64
  %59 = load i32, ptr %4, align 4, !tbaa !9
  call void @Xil_Out32(i64 noundef %58, i32 noundef %59)
  %60 = load ptr, ptr @QspiInstancePtr, align 8, !tbaa !5
  %61 = getelementptr inbounds %struct.XQspiPs, ptr %60, i32 0, i32 0
  %62 = getelementptr inbounds %struct.XQspiPs_Config, ptr %61, i32 0, i32 1
  %63 = load i32, ptr %62, align 4, !tbaa !15
  %64 = add i32 %63, 20
  %65 = zext i32 %64 to i64
  call void @Xil_Out32(i64 noundef %65, i32 noundef 1)
  br label %66

66:                                               ; preds = %52, %36
  store i32 0, ptr %1, align 4
  store i32 1, ptr %5, align 4
  br label %67

67:                                               ; preds = %66, %32, %20, %9
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #4
  %68 = load i32, ptr %1, align 4
  ret i32 %68
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare ptr @XQspiPs_LookupConfig(i16 noundef zeroext) #2

declare i32 @XQspiPs_CfgInitialize(ptr noundef, ptr noundef, i32 noundef) #2

declare i32 @XQspiPs_SetOptions(ptr noundef, i32 noundef) #2

declare i32 @XQspiPs_SetClkPrescaler(ptr noundef, i8 noundef zeroext) #2

declare i32 @XQspiPs_SetSlaveSelect(ptr noundef) #2

; Function Attrs: nounwind uwtable
declare dso_local i32 @FlashReadID() #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @Xil_Out32(i64 noundef, i32 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 4}
!12 = !{!"", !13, i64 0, !10, i64 4, !10, i64 8, !7, i64 12}
!13 = !{!"short", !7, i64 0}
!14 = !{!7, !7, i64 0}
!15 = !{!16, !10, i64 4}
!16 = !{!"", !12, i64 0, !10, i64 16, !6, i64 24, !6, i64 32, !10, i64 40, !10, i64 44, !10, i64 48, !6, i64 56, !6, i64 64, !10, i64 72}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XQspiPs = type { %struct.XQspiPs_Config, i32, ptr, ptr, i32, i32, i32, ptr, ptr, i32 }
%struct.XQspiPs_Config = type { i16, i32, i32, i8 }

@QspiInstance = external dso_local global %struct.XQspiPs, align 8
@QspiInstancePtr = external dso_local local_unnamed_addr global ptr, align 8
@FlashReadBaseAddress = external local_unnamed_addr global i32, align 4
@QspiFlashSize = external dso_local local_unnamed_addr global i32, align 4
@LinearBootDeviceFlag = external local_unnamed_addr global i8, align 1

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @InitQspi() local_unnamed_addr #0 {
  store ptr @QspiInstance, ptr @QspiInstancePtr, align 8, !tbaa !5
  store i32 -67108864, ptr @FlashReadBaseAddress, align 4, !tbaa !9
  %1 = tail call ptr @XQspiPs_LookupConfig(i16 noundef zeroext 0) #3
  %2 = icmp eq ptr %1, null
  br i1 %2, label %32, label %3

3:                                                ; preds = %0
  %4 = load ptr, ptr @QspiInstancePtr, align 8, !tbaa !5
  %5 = getelementptr inbounds i8, ptr %1, i64 4
  %6 = load i32, ptr %5, align 4, !tbaa !11
  %7 = tail call i32 @XQspiPs_CfgInitialize(ptr noundef %4, ptr noundef nonnull %1, i32 noundef %6) #3
  %.not = icmp eq i32 %7, 0
  br i1 %.not, label %8, label %32

8:                                                ; preds = %3
  %9 = load ptr, ptr @QspiInstancePtr, align 8, !tbaa !5
  %10 = tail call i32 @XQspiPs_SetOptions(ptr noundef %9, i32 noundef 272) #3
  %11 = load ptr, ptr @QspiInstancePtr, align 8, !tbaa !5
  %12 = tail call i32 @XQspiPs_SetClkPrescaler(ptr noundef %11, i8 noundef zeroext 2) #3
  %13 = load ptr, ptr @QspiInstancePtr, align 8, !tbaa !5
  %14 = tail call i32 @XQspiPs_SetSlaveSelect(ptr noundef %13) #3
  %15 = tail call i32 @FlashReadID()
  %.not8 = icmp eq i32 %15, 0
  br i1 %.not8, label %16, label %32

16:                                               ; preds = %8
  %17 = load i32, ptr @QspiFlashSize, align 4, !tbaa !9
  %18 = icmp ult i32 %17, 16777217
  br i1 %18, label %19, label %.sink.split

19:                                               ; preds = %16
  store i8 1, ptr @LinearBootDeviceFlag, align 1, !tbaa !14
  %20 = load ptr, ptr @QspiInstancePtr, align 8, !tbaa !5
  %21 = tail call i32 @XQspiPs_SetOptions(ptr noundef %20, i32 noundef 384) #3
  br label %.sink.split

.sink.split:                                      ; preds = %16, %19
  %.sink11 = phi i32 [ -2147483285, %19 ], [ 363, %16 ]
  %22 = load ptr, ptr @QspiInstancePtr, align 8, !tbaa !5
  %23 = getelementptr inbounds i8, ptr %22, i64 4
  %24 = load i32, ptr %23, align 4, !tbaa !15
  %25 = add i32 %24, 160
  %26 = zext i32 %25 to i64
  tail call void @Xil_Out32(i64 noundef %26, i32 noundef %.sink11)
  %27 = load ptr, ptr @QspiInstancePtr, align 8, !tbaa !5
  %28 = getelementptr inbounds i8, ptr %27, i64 4
  %29 = load i32, ptr %28, align 4, !tbaa !15
  %30 = add i32 %29, 20
  %31 = zext i32 %30 to i64
  tail call void @Xil_Out32(i64 noundef %31, i32 noundef 1)
  br label %32

32:                                               ; preds = %.sink.split, %8, %3, %0
  %.0 = phi i32 [ 1, %0 ], [ 1, %3 ], [ 1, %8 ], [ 0, %.sink.split ]
  ret i32 %.0
}

declare ptr @XQspiPs_LookupConfig(i16 noundef zeroext) local_unnamed_addr #1

declare i32 @XQspiPs_CfgInitialize(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1

declare i32 @XQspiPs_SetOptions(ptr noundef, i32 noundef) local_unnamed_addr #1

declare i32 @XQspiPs_SetClkPrescaler(ptr noundef, i8 noundef zeroext) local_unnamed_addr #1

declare i32 @XQspiPs_SetSlaveSelect(ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @FlashReadID() local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @Xil_Out32(i64 noundef, i32 noundef) local_unnamed_addr #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 4}
!12 = !{!"", !13, i64 0, !10, i64 4, !10, i64 8, !7, i64 12}
!13 = !{!"short", !7, i64 0}
!14 = !{!7, !7, i64 0}
!15 = !{!16, !10, i64 4}
!16 = !{!"", !12, i64 0, !10, i64 16, !6, i64 24, !6, i64 32, !10, i64 40, !10, i64 44, !10, i64 48, !6, i64 56, !6, i64 64, !10, i64 72}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass