; LLVM IR from tangjz/acm-icpc :: buaa/oj3rd/730.ll (Z3invii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z3invii(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 1, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  %7 = load i32, ptr %4, align 4, !tbaa !5
  %8 = sub nsw i32 %7, 2
  store i32 %8, ptr %6, align 4, !tbaa !5
  br label %9

9:                                                ; preds = %26, %2
  %10 = load i32, ptr %6, align 4, !tbaa !5
  %11 = icmp ne i32 %10, 0
  br i1 %11, label %12, label %38

12:                                               ; preds = %9
  %13 = load i32, ptr %6, align 4, !tbaa !5
  %14 = and i32 %13, 1
  %15 = icmp ne i32 %14, 0
  br i1 %15, label %16, label %26

16:                                               ; preds = %12
  %17 = load i32, ptr %5, align 4, !tbaa !5
  %18 = sext i32 %17 to i64
  %19 = load i32, ptr %3, align 4, !tbaa !5
  %20 = sext i32 %19 to i64
  %21 = mul nsw i64 %18, %20
  %22 = load i32, ptr %4, align 4, !tbaa !5
  %23 = sext i32 %22 to i64
  %24 = srem i64 %21, %23
  %25 = trunc i64 %24 to i32
  store i32 %25, ptr %5, align 4, !tbaa !5
  br label %26

26:                                               ; preds = %16, %12
  %27 = load i32, ptr %3, align 4, !tbaa !5
  %28 = sext i32 %27 to i64
  %29 = load i32, ptr %3, align 4, !tbaa !5
  %30 = sext i32 %29 to i64
  %31 = mul nsw i64 %28, %30
  %32 = load i32, ptr %4, align 4, !tbaa !5
  %33 = sext i32 %32 to i64
  %34 = srem i64 %31, %33
  %35 = trunc i64 %34 to i32
  store i32 %35, ptr %3, align 4, !tbaa !5
  %36 = load i32, ptr %6, align 4, !tbaa !5
  %37 = ashr i32 %36, 1
  store i32 %37, ptr %6, align 4, !tbaa !5
  br label %9, !llvm.loop !9

38:                                               ; preds = %9
  %39 = load i32, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  ret i32 %39
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef range(i32 -2147483647, -2147483648) i32 @_Z3invii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = add nsw i32 %1, -2
  %.not14 = icmp eq i32 %3, 0
  br i1 %.not14, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %2
  %4 = sext i32 %1 to i64
  br label %5

5:                                                ; preds = %.lr.ph, %13
  %.017 = phi i32 [ %3, %.lr.ph ], [ %17, %13 ]
  %.01116 = phi i32 [ 1, %.lr.ph ], [ %.1, %13 ]
  %.01215 = phi i32 [ %0, %.lr.ph ], [ %16, %13 ]
  %6 = and i32 %.017, 1
  %.not13 = icmp eq i32 %6, 0
  br i1 %.not13, label %._crit_edge18, label %7

._crit_edge18:                                    ; preds = %5
  %.pre = sext i32 %.01215 to i64
  br label %13

7:                                                ; preds = %5
  %8 = sext i32 %.01116 to i64
  %9 = sext i32 %.01215 to i64
  %10 = mul nsw i64 %8, %9
  %11 = srem i64 %10, %4
  %12 = trunc nsw i64 %11 to i32
  br label %13

13:                                               ; preds = %._crit_edge18, %7
  %.pre-phi = phi i64 [ %.pre, %._crit_edge18 ], [ %9, %7 ]
  %.1 = phi i32 [ %.01116, %._crit_edge18 ], [ %12, %7 ]
  %14 = mul nsw i64 %.pre-phi, %.pre-phi
  %15 = srem i64 %14, %4
  %16 = trunc nsw i64 %15 to i32
  %17 = ashr i32 %.017, 1
  %.not = icmp ult i32 %.017, 2
  br i1 %.not, label %._crit_edge, label %5, !llvm.loop !5

._crit_edge:                                      ; preds = %13, %2
  %.011.lcssa = phi i32 [ 1, %2 ], [ %.1, %13 ]
  ret i32 %.011.lcssa
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass