; LLVM IR from tangjz/acm-icpc :: 51nod/1035.ll (Z11pollard_rhox)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_Z3gcdxx(i64 noundef, i64 noundef) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z7mod_addxxx(i64 noundef, i64 noundef, i64 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z7mod_mulxxx(i64 noundef, i64 noundef, i64 noundef) #1

; Function Attrs: nounwind
declare i32 @rand() #3

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z11pollard_rhox(i64 noundef %0) #0 {
  %2 = alloca i64, align 8
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  store i64 %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #5
  %9 = call i32 @rand() #5
  %10 = sext i32 %9 to i64
  %11 = call i32 @rand() #5
  %12 = sext i32 %11 to i64
  %13 = mul nsw i64 %10, %12
  %14 = load i64, ptr %2, align 8, !tbaa !5
  %15 = srem i64 %13, %14
  store i64 %15, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #5
  %16 = load i64, ptr %3, align 8, !tbaa !5
  store i64 %16, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #5
  %17 = call i32 @rand() #5
  %18 = sext i32 %17 to i64
  %19 = call i32 @rand() #5
  %20 = sext i32 %19 to i64
  %21 = mul nsw i64 %18, %20
  %22 = load i64, ptr %2, align 8, !tbaa !5
  %23 = srem i64 %21, %22
  store i64 %23, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #5
  store i64 1, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #5
  store i64 2, ptr %8, align 8, !tbaa !5
  br label %24

24:                                               ; preds = %51, %1
  %25 = load i64, ptr %7, align 8, !tbaa !5
  %26 = load i64, ptr %8, align 8, !tbaa !5
  %27 = icmp eq i64 %25, %26
  br i1 %27, label %28, label %32

28:                                               ; preds = %24
  %29 = load i64, ptr %3, align 8, !tbaa !5
  store i64 %29, ptr %4, align 8, !tbaa !5
  %30 = load i64, ptr %8, align 8, !tbaa !5
  %31 = shl i64 %30, 1
  store i64 %31, ptr %8, align 8, !tbaa !5
  br label %32

32:                                               ; preds = %28, %24
  %33 = load i64, ptr %3, align 8, !tbaa !5
  %34 = load i64, ptr %3, align 8, !tbaa !5
  %35 = load i64, ptr %2, align 8, !tbaa !5
  %36 = call noundef i64 @_Z7mod_mulxxx(i64 noundef %33, i64 noundef %34, i64 noundef %35)
  %37 = load i64, ptr %5, align 8, !tbaa !5
  %38 = load i64, ptr %2, align 8, !tbaa !5
  %39 = call noundef i64 @_Z7mod_addxxx(i64 noundef %36, i64 noundef %37, i64 noundef %38)
  store i64 %39, ptr %3, align 8, !tbaa !5
  %40 = load i64, ptr %4, align 8, !tbaa !5
  %41 = load i64, ptr %3, align 8, !tbaa !5
  %42 = sub nsw i64 %40, %41
  %43 = call noundef i64 @_ZSt3absx(i64 noundef %42)
  %44 = load i64, ptr %2, align 8, !tbaa !5
  %45 = call noundef i64 @_Z3gcdxx(i64 noundef %43, i64 noundef %44)
  store i64 %45, ptr %6, align 8, !tbaa !5
  %46 = load i64, ptr %6, align 8, !tbaa !5
  %47 = icmp ne i64 %46, 1
  br i1 %47, label %48, label %50

48:                                               ; preds = %32
  %49 = load i64, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #5
  ret i64 %49

50:                                               ; preds = %32
  br label %51

51:                                               ; preds = %50
  %52 = load i64, ptr %7, align 8, !tbaa !5
  %53 = add nsw i64 %52, 1
  store i64 %53, ptr %7, align 8, !tbaa !5
  br label %24, !llvm.loop !9
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZSt3absx(i64 noundef) #4

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_Z3gcdxx(i64 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z7mod_addxxx(i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z7mod_mulxxx(i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: nounwind
declare i32 @rand() local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
define dso_local noundef range(i64 2, 1) i64 @_Z11pollard_rhox(i64 noundef %0) local_unnamed_addr #0 {
  %2 = tail call i32 @rand() #4
  %3 = sext i32 %2 to i64
  %4 = tail call i32 @rand() #4
  %5 = sext i32 %4 to i64
  %6 = mul nsw i64 %5, %3
  %7 = srem i64 %6, %0
  %8 = tail call i32 @rand() #4
  %9 = sext i32 %8 to i64
  %10 = tail call i32 @rand() #4
  %11 = sext i32 %10 to i64
  %12 = mul nsw i64 %11, %9
  %13 = srem i64 %12, %0
  br label %14

14:                                               ; preds = %22, %1
  %.020 = phi i64 [ %7, %1 ], [ %spec.select, %22 ]
  %.019 = phi i64 [ %7, %1 ], [ %17, %22 ]
  %.018 = phi i64 [ 1, %1 ], [ %24, %22 ]
  %.0 = phi i64 [ 2, %1 ], [ %spec.select23, %22 ]
  %15 = icmp eq i64 %.018, %.0
  %spec.select = select i1 %15, i64 %.019, i64 %.020
  %16 = tail call noundef i64 @_Z7mod_mulxxx(i64 noundef %.019, i64 noundef %.019, i64 noundef %0)
  %17 = tail call noundef i64 @_Z7mod_addxxx(i64 noundef %16, i64 noundef %13, i64 noundef %0)
  %18 = sub nsw i64 %spec.select, %17
  %19 = tail call noundef i64 @_ZSt3absx(i64 noundef %18)
  %20 = tail call noundef i64 @_Z3gcdxx(i64 noundef %19, i64 noundef %0)
  %.not = icmp eq i64 %20, 1
  br i1 %.not, label %22, label %21

21:                                               ; preds = %14
  ret i64 %20

22:                                               ; preds = %14
  %23 = zext i1 %15 to i64
  %spec.select23 = shl i64 %.0, %23
  %24 = add nuw nsw i64 %.018, 1
  br label %14, !llvm.loop !5
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZSt3absx(i64 noundef) local_unnamed_addr #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass