; LLVM IR from FrancesoM/Bisc8FX :: sdk_projects/bisc8_platform/ps7_cortexa9_0/standalone_domain/bsp/ps7_cortexa9_0_ (SdModeInit)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XSdPs = type { %struct.XSdPs_Config, i32, i32, i32, i32, i8, i8, i8, i8, i32, i8, [4 x i32], i32, [4 x i32], i32, i32, i32, i32, i32, i64, i16, i32, i8, i32 }
%struct.XSdPs_Config = type { i16, i32, i32, i32, i32, i32, i32, i32, i8 }

@XSdPs_SdModeInit.SCR = external hidden global [8 x i8], align 32

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @XSdPs_CardSetVoltage18(ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @XSdPs_SetBlkSize(ptr noundef, i16 noundef zeroext) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @XSdPs_SdModeInit(ptr noundef %0) #2 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca [64 x i8], align 16
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  call void @llvm.lifetime.start.p0(i64 64, ptr %4) #4
  call void @llvm.memset.p0.i64(ptr align 16 %4, i8 0, i64 64, i1 false)
  %5 = load ptr, ptr %2, align 8, !tbaa !5
  %6 = call i32 @XSdPs_Get_BusWidth(ptr noundef %5, ptr noundef @XSdPs_SdModeInit.SCR)
  store i32 %6, ptr %3, align 4, !tbaa !9
  %7 = load i32, ptr %3, align 4, !tbaa !9
  %8 = sext i32 %7 to i64
  %9 = icmp ne i64 %8, 0
  br i1 %9, label %10, label %11

10:                                               ; preds = %1
  store i32 1, ptr %3, align 4, !tbaa !9
  br label %122

11:                                               ; preds = %1
  %12 = load i8, ptr getelementptr inbounds ([8 x i8], ptr @XSdPs_SdModeInit.SCR, i64 0, i64 1), align 1, !tbaa !11
  %13 = zext i8 %12 to i32
  %14 = and i32 %13, 4
  %15 = icmp ne i32 %14, 0
  br i1 %15, label %16, label %26

16:                                               ; preds = %11
  %17 = load ptr, ptr %2, align 8, !tbaa !5
  %18 = getelementptr inbounds %struct.XSdPs, ptr %17, i32 0, i32 8
  store i8 2, ptr %18, align 1, !tbaa !12
  %19 = load ptr, ptr %2, align 8, !tbaa !5
  %20 = call i32 @XSdPs_Change_BusWidth(ptr noundef %19)
  store i32 %20, ptr %3, align 4, !tbaa !9
  %21 = load i32, ptr %3, align 4, !tbaa !9
  %22 = sext i32 %21 to i64
  %23 = icmp ne i64 %22, 0
  br i1 %23, label %24, label %25

24:                                               ; preds = %16
  store i32 1, ptr %3, align 4, !tbaa !9
  br label %122

25:                                               ; preds = %16
  br label %26

26:                                               ; preds = %25, %11
  %27 = load ptr, ptr %2, align 8, !tbaa !5
  %28 = getelementptr inbounds [64 x i8], ptr %4, i64 0, i64 0
  %29 = call i32 @XSdPs_Get_BusSpeed(ptr noundef %27, ptr noundef %28)
  store i32 %29, ptr %3, align 4, !tbaa !9
  %30 = load i32, ptr %3, align 4, !tbaa !9
  %31 = sext i32 %30 to i64
  %32 = icmp ne i64 %31, 0
  br i1 %32, label %33, label %34

33:                                               ; preds = %26
  br label %122

34:                                               ; preds = %26
  %35 = load i8, ptr getelementptr inbounds ([8 x i8], ptr @XSdPs_SdModeInit.SCR, i64 0, i64 2), align 2, !tbaa !11
  %36 = zext i8 %35 to i32
  %37 = and i32 %36, 128
  %38 = icmp ne i32 %37, 0
  br i1 %38, label %39, label %66

39:                                               ; preds = %34
  %40 = getelementptr inbounds [64 x i8], ptr %4, i64 0, i64 13
  %41 = load i8, ptr %40, align 1, !tbaa !11
  %42 = zext i8 %41 to i32
  %43 = icmp uge i32 %42, 4
  br i1 %43, label %44, label %66

44:                                               ; preds = %39
  %45 = load ptr, ptr %2, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.XSdPs, ptr %45, i32 0, i32 0
  %47 = getelementptr inbounds %struct.XSdPs_Config, ptr %46, i32 0, i32 5
  %48 = load i32, ptr %47, align 4, !tbaa !17
  %49 = icmp eq i32 %48, 8
  br i1 %49, label %50, label %66

50:                                               ; preds = %44
  %51 = load ptr, ptr %2, align 8, !tbaa !5
  %52 = getelementptr inbounds %struct.XSdPs, ptr %51, i32 0, i32 10
  %53 = load i8, ptr %52, align 4, !tbaa !18
  %54 = zext i8 %53 to i32
  %55 = icmp eq i32 %54, 0
  br i1 %55, label %56, label %66

56:                                               ; preds = %50
  %57 = load ptr, ptr %2, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.XSdPs, ptr %57, i32 0, i32 10
  store i8 1, ptr %58, align 4, !tbaa !18
  %59 = load ptr, ptr %2, align 8, !tbaa !5
  %60 = call i32 @XSdPs_CardSetVoltage18(ptr noundef %59)
  store i32 %60, ptr %3, align 4, !tbaa !9
  %61 = load i32, ptr %3, align 4, !tbaa !9
  %62 = sext i32 %61 to i64
  %63 = icmp ne i64 %62, 0
  br i1 %63, label %64, label %65

64:                                               ; preds = %56
  store i32 1, ptr %3, align 4, !tbaa !9
  br label %122

65:                                               ; preds = %56
  br label %66

66:                                               ; preds = %65, %50, %44, %39, %34
  %67 = load ptr, ptr %2, align 8, !tbaa !5
  %68 = getelementptr inbounds %struct.XSdPs, ptr %67, i32 0, i32 10
  %69 = load i8, ptr %68, align 4, !tbaa !18
  %70 = zext i8 %69 to i32
  %71 = icmp ne i32 %70, 0
  br i1 %71, label %72, label %82

72:                                               ; preds = %66
  %73 = load ptr, ptr %2, align 8, !tbaa !5
  %74 = getelementptr inbounds [64 x i8], ptr %4, i64 0, i64 0
  call void @XSdPs_Identify_UhsMode(ptr noundef %73, ptr noundef %74)
  %75 = load ptr, ptr %2, align 8, !tbaa !5
  %76 = call i32 @XSdPs_Change_BusSpeed(ptr noundef %75)
  store i32 %76, ptr %3, align 4, !tbaa !9
  %77 = load i32, ptr %3, align 4, !tbaa !9
  %78 = sext i32 %77 to i64
  %79 = icmp ne i64 %78, 0
  br i1 %79, label %80, label %81

80:                                               ; preds = %72
  store i32 1, ptr %3, align 4, !tbaa !9
  br label %122

81:                                               ; preds = %72
  br label %114

82:                                               ; preds = %66
  %83 = load i8, ptr @XSdPs_SdModeInit.SCR, align 32, !tbaa !11
  %84 = zext i8 %83 to i32
  %85 = icmp ne i32 %84, 0
  br i1 %85, label %86, label %113

86:                                               ; preds = %82
  %87 = getelementptr inbounds [64 x i8], ptr %4, i64 0, i64 13
  %88 = load i8, ptr %87, align 1, !tbaa !11
  %89 = zext i8 %88 to i32
  %90 = and i32 %89, 2
  %91 = icmp ne i32 %90, 0
  br i1 %91, label %92, label %112

92:                                               ; preds = %86
  %93 = load ptr, ptr %2, align 8, !tbaa !5
  %94 = getelementptr inbounds %struct.XSdPs, ptr %93, i32 0, i32 8
  %95 = load i8, ptr %94, align 1, !tbaa !12
  %96 = zext i8 %95 to i32
  %97 = icmp uge i32 %96, 2
  br i1 %97, label %98, label %112

98:                                               ; preds = %92
  %99 = load ptr, ptr %2, align 8, !tbaa !5
  %100 = getelementptr inbounds %struct.XSdPs, ptr %99, i32 0, i32 16
  store i32 5, ptr %100, align 4, !tbaa !19
  %101 = load ptr, ptr %2, align 8, !tbaa !5
  %102 = getelementptr inbounds %struct.XSdPs, ptr %101, i32 0, i32 17
  store i32 5, ptr %102, align 8, !tbaa !20
  %103 = load ptr, ptr %2, align 8, !tbaa !5
  %104 = getelementptr inbounds %struct.XSdPs, ptr %103, i32 0, i32 18
  store i32 21, ptr %104, align 4, !tbaa !21
  %105 = load ptr, ptr %2, align 8, !tbaa !5
  %106 = call i32 @XSdPs_Change_BusSpeed(ptr noundef %105)
  store i32 %106, ptr %3, align 4, !tbaa !9
  %107 = load i32, ptr %3, align 4, !tbaa !9
  %108 = sext i32 %107 to i64
  %109 = icmp ne i64 %108, 0
  br i1 %109, label %110, label %111

110:                                              ; preds = %98
  store i32 1, ptr %3, align 4, !tbaa !9
  br label %122

111:                                              ; preds = %98
  br label %112

112:                                              ; preds = %111, %92, %86
  br label %113

113:                                              ; preds = %112, %82
  br label %114

114:                                              ; preds = %113, %81
  %115 = load ptr, ptr %2, align 8, !tbaa !5
  %116 = call i32 @XSdPs_SetBlkSize(ptr noundef %115, i16 noundef zeroext 512)
  store i32 %116, ptr %3, align 4, !tbaa !9
  %117 = load i32, ptr %3, align 4, !tbaa !9
  %118 = sext i32 %117 to i64
  %119 = icmp ne i64 %118, 0
  br i1 %119, label %120, label %121

120:                                              ; preds = %114
  store i32 1, ptr %3, align 4, !tbaa !9
  br label %122

121:                                              ; preds = %114
  store i32 0, ptr %3, align 4, !tbaa !9
  br label %122

122:                                              ; preds = %121, %120, %110, %80, %64, %33, %24, %10
  %123 = load i32, ptr %3, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 64, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  ret i32 %123
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

declare i32 @XSdPs_Get_BusWidth(ptr noundef, ptr noundef) #1

declare i32 @XSdPs_Change_BusWidth(ptr noundef) #1

declare i32 @XSdPs_Get_BusSpeed(ptr noundef, ptr noundef) #1

declare void @XSdPs_Identify_UhsMode(ptr noundef, ptr noundef) #1

declare i32 @XSdPs_Change_BusSpeed(ptr noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !7, i64 55}
!13 = !{!"", !14, i64 0, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !7, i64 52, !7, i64 53, !7, i64 54, !7, i64 55, !10, i64 56, !7, i64 60, !7, i64 64, !10, i64 80, !7, i64 84, !10, i64 100, !10, i64 104, !10, i64 108, !10, i64 112, !10, i64 116, !16, i64 120, !15, i64 128, !10, i64 132, !7, i64 136, !10, i64 140}
!14 = !{!"", !15, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !7, i64 32}
!15 = !{!"short", !7, i64 0}
!16 = !{!"long", !7, i64 0}
!17 = !{!13, !10, i64 20}
!18 = !{!13, !7, i64 60}
!19 = !{!13, !10, i64 108}
!20 = !{!13, !10, i64 112}
!21 = !{!13, !10, i64 116}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@XSdPs_SdModeInit.SCR = external hidden global [8 x i8], align 32

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @XSdPs_CardSetVoltage18(ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @XSdPs_SetBlkSize(ptr noundef, i16 noundef zeroext) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local i32 @XSdPs_SdModeInit(ptr noundef %0) local_unnamed_addr #2 {
  %2 = alloca [64 x i8], align 16
  call void @llvm.lifetime.start.p0(i64 64, ptr nonnull %2) #4
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(64) %2, i8 0, i64 64, i1 false)
  %3 = tail call i32 @XSdPs_Get_BusWidth(ptr noundef %0, ptr noundef nonnull @XSdPs_SdModeInit.SCR) #4
  %.not = icmp eq i32 %3, 0
  br i1 %.not, label %4, label %49

4:                                                ; preds = %1
  %5 = load i8, ptr getelementptr inbounds (i8, ptr @XSdPs_SdModeInit.SCR, i64 1), align 1, !tbaa !5
  %6 = and i8 %5, 4
  %.not27 = icmp eq i8 %6, 0
  br i1 %.not27, label %10, label %7

7:                                                ; preds = %4
  %8 = getelementptr inbounds i8, ptr %0, i64 55
  store i8 2, ptr %8, align 1, !tbaa !8
  %9 = tail call i32 @XSdPs_Change_BusWidth(ptr noundef %0) #4
  %.not28 = icmp eq i32 %9, 0
  br i1 %.not28, label %10, label %49

10:                                               ; preds = %7, %4
  %11 = call i32 @XSdPs_Get_BusSpeed(ptr noundef %0, ptr noundef nonnull %2) #4
  %.not29 = icmp eq i32 %11, 0
  br i1 %.not29, label %12, label %49

12:                                               ; preds = %10
  %13 = load i8, ptr getelementptr inbounds (i8, ptr @XSdPs_SdModeInit.SCR, i64 2), align 2, !tbaa !5
  %14 = icmp slt i8 %13, 0
  %15 = getelementptr inbounds i8, ptr %2, i64 13
  %16 = load i8, ptr %15, align 1
  %17 = icmp ugt i8 %16, 3
  %or.cond = select i1 %14, i1 %17, i1 false
  br i1 %or.cond, label %18, label %28

18:                                               ; preds = %12
  %19 = getelementptr inbounds i8, ptr %0, i64 20
  %20 = load i32, ptr %19, align 4, !tbaa !14
  %21 = icmp eq i32 %20, 8
  br i1 %21, label %22, label %28

22:                                               ; preds = %18
  %23 = getelementptr inbounds i8, ptr %0, i64 60
  %24 = load i8, ptr %23, align 4, !tbaa !15
  %25 = icmp eq i8 %24, 0
  br i1 %25, label %26, label %28

26:                                               ; preds = %22
  store i8 1, ptr %23, align 4, !tbaa !15
  %27 = call i32 @XSdPs_CardSetVoltage18(ptr noundef nonnull %0) #4
  %.not30 = icmp eq i32 %27, 0
  br i1 %.not30, label %28, label %49

28:                                               ; preds = %26, %22, %18, %12
  %29 = getelementptr inbounds i8, ptr %0, i64 60
  %30 = load i8, ptr %29, align 4, !tbaa !15
  %.not31 = icmp eq i8 %30, 0
  br i1 %.not31, label %33, label %31

31:                                               ; preds = %28
  call void @XSdPs_Identify_UhsMode(ptr noundef nonnull %0, ptr noundef nonnull %2) #4
  %32 = call i32 @XSdPs_Change_BusSpeed(ptr noundef nonnull %0) #4
  %.not35 = icmp eq i32 %32, 0
  br i1 %.not35, label %47, label %49

33:                                               ; preds = %28
  %34 = load i8, ptr @XSdPs_SdModeInit.SCR, align 32, !tbaa !5
  %.not32 = icmp eq i8 %34, 0
  br i1 %.not32, label %47, label %35

35:                                               ; preds = %33
  %36 = load i8, ptr %15, align 1, !tbaa !5
  %37 = and i8 %36, 2
  %.not33 = icmp eq i8 %37, 0
  br i1 %.not33, label %47, label %38

38:                                               ; preds = %35
  %39 = getelementptr inbounds i8, ptr %0, i64 55
  %40 = load i8, ptr %39, align 1, !tbaa !8
  %41 = icmp ugt i8 %40, 1
  br i1 %41, label %42, label %47

42:                                               ; preds = %38
  %43 = getelementptr inbounds i8, ptr %0, i64 108
  store i32 5, ptr %43, align 4, !tbaa !16
  %44 = getelementptr inbounds i8, ptr %0, i64 112
  store i32 5, ptr %44, align 8, !tbaa !17
  %45 = getelementptr inbounds i8, ptr %0, i64 116
  store i32 21, ptr %45, align 4, !tbaa !18
  %46 = call i32 @XSdPs_Change_BusSpeed(ptr noundef nonnull %0) #4
  %.not34 = icmp eq i32 %46, 0
  br i1 %.not34, label %47, label %49

47:                                               ; preds = %33, %42, %38, %35, %31
  %48 = call i32 @XSdPs_SetBlkSize(ptr noundef nonnull %0, i16 noundef zeroext 512) #4
  %.not36 = icmp ne i32 %48, 0
  %. = zext i1 %.not36 to i32
  br label %49

49:                                               ; preds = %47, %42, %31, %26, %7, %1, %10
  %.0 = phi i32 [ %11, %10 ], [ 1, %1 ], [ 1, %7 ], [ 1, %26 ], [ 1, %31 ], [ 1, %42 ], [ %., %47 ]
  call void @llvm.lifetime.end.p0(i64 64, ptr nonnull %2) #4
  ret i32 %.0
}

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

declare i32 @XSdPs_Get_BusWidth(ptr noundef, ptr noundef) local_unnamed_addr #1

declare i32 @XSdPs_Change_BusWidth(ptr noundef) local_unnamed_addr #1

declare i32 @XSdPs_Get_BusSpeed(ptr noundef, ptr noundef) local_unnamed_addr #1

declare void @XSdPs_Identify_UhsMode(ptr noundef, ptr noundef) local_unnamed_addr #1

declare i32 @XSdPs_Change_BusSpeed(ptr noundef) local_unnamed_addr #1

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !6, i64 55}
!9 = !{!"", !10, i64 0, !12, i64 36, !12, i64 40, !12, i64 44, !12, i64 48, !6, i64 52, !6, i64 53, !6, i64 54, !6, i64 55, !12, i64 56, !6, i64 60, !6, i64 64, !12, i64 80, !6, i64 84, !12, i64 100, !12, i64 104, !12, i64 108, !12, i64 112, !12, i64 116, !13, i64 120, !11, i64 128, !12, i64 132, !6, i64 136, !12, i64 140}
!10 = !{!"", !11, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !6, i64 32}
!11 = !{!"short", !6, i64 0}
!12 = !{!"int", !6, i64 0}
!13 = !{!"long", !6, i64 0}
!14 = !{!9, !12, i64 20}
!15 = !{!9, !6, i64 60}
!16 = !{!9, !12, i64 108}
!17 = !{!9, !12, i64 112}
!18 = !{!9, !12, i64 116}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass