; LLVM IR from FrancesoM/Bisc8FX :: sdk_projects/bisc8_platform/zynq_fsbl (pcap)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XDcfg = type { %struct.XDcfg_Config, i32, i32, ptr, ptr }
%struct.XDcfg_Config = type { i16, i32 }

@DcfgInstPtr = external dso_local global ptr, align 8
@Silicon_Version = external global i32, align 4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @FabricInit() #1 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  store i32 0, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #4
  store i64 0, ptr %8, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #4
  store i64 0, ptr %9, align 8, !tbaa !9
  call void @Xil_Out32(i64 noundef 4160751872, i32 noundef 10)
  %11 = load ptr, ptr @DcfgInstPtr, align 8, !tbaa !11
  %12 = getelementptr inbounds %struct.XDcfg, ptr %11, i32 0, i32 0
  %13 = getelementptr inbounds %struct.XDcfg_Config, ptr %12, i32 0, i32 1
  %14 = load i32, ptr %13, align 4, !tbaa !13
  %15 = add i32 %14, 0
  %16 = zext i32 %15 to i64
  %17 = call i32 @Xil_In32(i64 noundef %16)
  store i32 %17, ptr %2, align 4, !tbaa !5
  %18 = load i32, ptr @Silicon_Version, align 4, !tbaa !5
  %19 = icmp uge i32 %18, 2
  br i1 %19, label %20, label %28

20:                                               ; preds = %0
  %21 = load ptr, ptr @DcfgInstPtr, align 8, !tbaa !11
  %22 = call i32 @XDcfg_GetMiscControlRegister(ptr noundef %21)
  store i32 %22, ptr %5, align 4, !tbaa !5
  %23 = load i32, ptr %5, align 4, !tbaa !5
  %24 = and i32 %23, 256
  %25 = icmp ne i32 %24, 256
  br i1 %25, label %26, label %27

26:                                               ; preds = %20
  store i32 1, ptr %1, align 4
  store i32 1, ptr %10, align 4
  br label %149

27:                                               ; preds = %20
  br label %28

28:                                               ; preds = %27, %0
  %29 = load ptr, ptr @DcfgInstPtr, align 8, !tbaa !11
  %30 = getelementptr inbounds %struct.XDcfg, ptr %29, i32 0, i32 0
  %31 = getelementptr inbounds %struct.XDcfg_Config, ptr %30, i32 0, i32 1
  %32 = load i32, ptr %31, align 4, !tbaa !13
  %33 = add i32 %32, 0
  %34 = zext i32 %33 to i64
  %35 = load i32, ptr %2, align 4, !tbaa !5
  %36 = or i32 %35, 1073741824
  call void @Xil_Out32(i64 noundef %34, i32 noundef %36)
  %37 = load ptr, ptr @DcfgInstPtr, align 8, !tbaa !11
  %38 = call i32 @XDcfg_GetControlRegister(ptr noundef %37)
  store i32 %38, ptr %3, align 4, !tbaa !5
  %39 = load i32, ptr %3, align 4, !tbaa !5
  %40 = and i32 %39, 4096
  %41 = icmp ne i32 %40, 0
  br i1 %41, label %42, label %43

42:                                               ; preds = %28
  call void @usleep(i64 noundef 5000)
  br label %43

43:                                               ; preds = %42, %28
  %44 = load ptr, ptr @DcfgInstPtr, align 8, !tbaa !11
  %45 = getelementptr inbounds %struct.XDcfg, ptr %44, i32 0, i32 0
  %46 = getelementptr inbounds %struct.XDcfg_Config, ptr %45, i32 0, i32 1
  %47 = load i32, ptr %46, align 4, !tbaa !13
  %48 = add i32 %47, 0
  %49 = zext i32 %48 to i64
  %50 = load i32, ptr %2, align 4, !tbaa !5
  %51 = and i32 %50, -1073741825
  call void @Xil_Out32(i64 noundef %49, i32 noundef %51)
  %52 = load i32, ptr %3, align 4, !tbaa !5
  %53 = and i32 %52, 4096
  %54 = icmp ne i32 %53, 0
  br i1 %54, label %55, label %56

55:                                               ; preds = %43
  call void @usleep(i64 noundef 5000)
  br label %56

56:                                               ; preds = %55, %43
  call void @XTime_GetTime(ptr noundef %8)
  br label %57

57:                                               ; preds = %71, %56
  %58 = load ptr, ptr @DcfgInstPtr, align 8, !tbaa !11
  %59 = call i32 @XDcfg_GetStatusRegister(ptr noundef %58)
  %60 = and i32 %59, 16
  store i32 %60, ptr %6, align 4, !tbaa !5
  %61 = load i32, ptr %6, align 4, !tbaa !5
  %62 = icmp eq i32 %61, 0
  br i1 %62, label %63, label %64

63:                                               ; preds = %57
  br label %75

64:                                               ; preds = %57
  call void @XTime_GetTime(ptr noundef %9)
  %65 = load i64, ptr %8, align 8, !tbaa !9
  %66 = add i64 %65, 9750000
  %67 = load i64, ptr %9, align 8, !tbaa !9
  %68 = icmp ugt i64 %66, %67
  br i1 %68, label %69, label %70

69:                                               ; preds = %64
  store i32 1, ptr %7, align 4, !tbaa !5
  br label %70

70:                                               ; preds = %69, %64
  br label %71

71:                                               ; preds = %70
  %72 = load i32, ptr %7, align 4, !tbaa !5
  %73 = icmp ne i32 %72, 0
  %74 = xor i1 %73, true
  br i1 %74, label %57, label %75, !llvm.loop !17

75:                                               ; preds = %71, %63
  %76 = load i32, ptr %7, align 4, !tbaa !5
  %77 = icmp eq i32 %76, 1
  br i1 %77, label %78, label %130

78:                                               ; preds = %75
  store i32 0, ptr %7, align 4, !tbaa !5
  %79 = load ptr, ptr @DcfgInstPtr, align 8, !tbaa !11
  %80 = getelementptr inbounds %struct.XDcfg, ptr %79, i32 0, i32 0
  %81 = getelementptr inbounds %struct.XDcfg_Config, ptr %80, i32 0, i32 1
  %82 = load i32, ptr %81, align 4, !tbaa !13
  %83 = add i32 %82, 0
  %84 = zext i32 %83 to i64
  %85 = load i32, ptr %2, align 4, !tbaa !5
  %86 = or i32 %85, 1073741824
  call void @Xil_Out32(i64 noundef %84, i32 noundef %86)
  %87 = load ptr, ptr @DcfgInstPtr, align 8, !tbaa !11
  %88 = call i32 @XDcfg_GetControlRegister(ptr noundef %87)
  store i32 %88, ptr %3, align 4, !tbaa !5
  %89 = load i32, ptr %3, align 4, !tbaa !5
  %90 = and i32 %89, 4096
  %91 = icmp ne i32 %90, 0
  br i1 %91, label %92, label %93

92:                                               ; preds = %78
  call void @usleep(i64 noundef 5000)
  br label %93

93:                                               ; preds = %92, %78
  %94 = load ptr, ptr @DcfgInstPtr, align 8, !tbaa !11
  %95 = getelementptr inbounds %struct.XDcfg, ptr %94, i32 0, i32 0
  %96 = getelementptr inbounds %struct.XDcfg_Config, ptr %95, i32 0, i32 1
  %97 = load i32, ptr %96, align 4, !tbaa !13
  %98 = add i32 %97, 0
  %99 = zext i32 %98 to i64
  %100 = load i32, ptr %2, align 4, !tbaa !5
  %101 = and i32 %100, -1073741825
  call void @Xil_Out32(i64 noundef %99, i32 noundef %101)
  %102 = load i32, ptr %3, align 4, !tbaa !5
  %103 = and i32 %102, 4096
  %104 = icmp ne i32 %103, 0
  br i1 %104, label %105, label %106

105:                                              ; preds = %93
  call void @usleep(i64 noundef 5000)
  br label %106

106:                                              ; preds = %105, %93
  call void @XTime_GetTime(ptr noundef %8)
  br label %107

107:                                              ; preds = %121, %106
  %108 = load ptr, ptr @DcfgInstPtr, align 8, !tbaa !11
  %109 = call i32 @XDcfg_GetStatusRegister(ptr noundef %108)
  %110 = and i32 %109, 16
  store i32 %110, ptr %6, align 4, !tbaa !5
  %111 = load i32, ptr %6, align 4, !tbaa !5
  %112 = icmp eq i32 %111, 0
  br i1 %112, label %113, label %114

113:                                              ; preds = %107
  br label %125

114:                                              ; preds = %107
  call void @XTime_GetTime(ptr noundef %9)
  %115 = load i64, ptr %8, align 8, !tbaa !9
  %116 = add i64 %115, 9750000
  %117 = load i64, ptr %9, align 8, !tbaa !9
  %118 = icmp ugt i64 %116, %117
  br i1 %118, label %119, label %120

119:                                              ; preds = %114
  store i32 1, ptr %7, align 4, !tbaa !5
  br label %120

120:                                              ; preds = %119, %114
  br label %121

121:                                              ; preds = %120
  %122 = load i32, ptr %7, align 4, !tbaa !5
  %123 = icmp ne i32 %122, 0
  %124 = xor i1 %123, true
  br i1 %124, label %107, label %125, !llvm.loop !19

125:                                              ; preds = %121, %113
  %126 = load i32, ptr %7, align 4, !tbaa !5
  %127 = icmp eq i32 %126, 1
  br i1 %127, label %128, label %129

128:                                              ; preds = %125
  store i32 1, ptr %1, align 4
  store i32 1, ptr %10, align 4
  br label %149

129:                                              ; preds = %125
  br label %130

130:                                              ; preds = %129, %75
  %131 = load ptr, ptr @DcfgInstPtr, align 8, !tbaa !11
  %132 = getelementptr inbounds %struct.XDcfg, ptr %131, i32 0, i32 0
  %133 = getelementptr inbounds %struct.XDcfg_Config, ptr %132, i32 0, i32 1
  %134 = load i32, ptr %133, align 4, !tbaa !13
  %135 = add i32 %134, 0
  %136 = zext i32 %135 to i64
  %137 = load i32, ptr %2, align 4, !tbaa !5
  %138 = or i32 %137, 1073741824
  call void @Xil_Out32(i64 noundef %136, i32 noundef %138)
  br label %139

139:                                              ; preds = %145, %130
  %140 = load ptr, ptr @DcfgInstPtr, align 8, !tbaa !11
  %141 = call i32 @XDcfg_GetStatusRegister(ptr noundef %140)
  %142 = and i32 %141, 16
  %143 = icmp ne i32 %142, 0
  %144 = xor i1 %143, true
  br i1 %144, label %145, label %146

145:                                              ; preds = %139
  br label %139, !llvm.loop !20

146:                                              ; preds = %139
  %147 = load ptr, ptr @DcfgInstPtr, align 8, !tbaa !11
  %148 = call i32 @XDcfg_GetStatusRegister(ptr noundef %147)
  store i32 %148, ptr %4, align 4, !tbaa !5
  store i32 0, ptr %1, align 4
  store i32 1, ptr %10, align 4
  br label %149

149:                                              ; preds = %146, %128, %26
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #4
  %150 = load i32, ptr %1, align 4
  ret i32 %150
}

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @Xil_Out32(i64 noundef, i32 noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) #2

declare i32 @XDcfg_GetMiscControlRegister(ptr noundef) #3

declare i32 @XDcfg_GetControlRegister(ptr noundef) #3

declare void @usleep(i64 noundef) #3

declare void @XTime_GetTime(ptr noundef) #3

declare i32 @XDcfg_GetStatusRegister(ptr noundef) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!14, !6, i64 4}
!14 = !{!"", !15, i64 0, !6, i64 8, !6, i64 12, !12, i64 16, !12, i64 24}
!15 = !{!"", !16, i64 0, !6, i64 4}
!16 = !{!"short", !7, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = distinct !{!19, !18}
!20 = distinct !{!20, !18}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@DcfgInstPtr = external dso_local local_unnamed_addr global ptr, align 8
@Silicon_Version = external local_unnamed_addr global i32, align 4

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @FabricInit() local_unnamed_addr #1 {
  %1 = alloca i64, align 8
  %2 = alloca i64, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %1) #4
  store i64 0, ptr %1, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #4
  store i64 0, ptr %2, align 8, !tbaa !5
  tail call void @Xil_Out32(i64 noundef 4160751872, i32 noundef 10)
  %3 = load ptr, ptr @DcfgInstPtr, align 8, !tbaa !9
  %4 = getelementptr inbounds i8, ptr %3, i64 4
  %5 = load i32, ptr %4, align 4, !tbaa !11
  %6 = zext i32 %5 to i64
  %7 = tail call i32 @Xil_In32(i64 noundef %6)
  %8 = load i32, ptr @Silicon_Version, align 4, !tbaa !16
  %9 = icmp ugt i32 %8, 1
  br i1 %9, label %10, label %14

10:                                               ; preds = %0
  %11 = load ptr, ptr @DcfgInstPtr, align 8, !tbaa !9
  %12 = tail call i32 @XDcfg_GetMiscControlRegister(ptr noundef %11) #4
  %13 = and i32 %12, 256
  %.not.not = icmp eq i32 %13, 0
  br i1 %.not.not, label %.loopexit, label %14

14:                                               ; preds = %10, %0
  %15 = load ptr, ptr @DcfgInstPtr, align 8, !tbaa !9
  %16 = getelementptr inbounds i8, ptr %15, i64 4
  %17 = load i32, ptr %16, align 4, !tbaa !11
  %18 = zext i32 %17 to i64
  %19 = or i32 %7, 1073741824
  tail call void @Xil_Out32(i64 noundef %18, i32 noundef %19)
  %20 = load ptr, ptr @DcfgInstPtr, align 8, !tbaa !9
  %21 = tail call i32 @XDcfg_GetControlRegister(ptr noundef %20) #4
  %22 = and i32 %21, 4096
  %.not = icmp eq i32 %22, 0
  br i1 %.not, label %24, label %23

23:                                               ; preds = %14
  tail call void @usleep(i64 noundef 5000) #4
  br label %24

24:                                               ; preds = %23, %14
  %25 = load ptr, ptr @DcfgInstPtr, align 8, !tbaa !9
  %26 = getelementptr inbounds i8, ptr %25, i64 4
  %27 = load i32, ptr %26, align 4, !tbaa !11
  %28 = zext i32 %27 to i64
  %29 = and i32 %7, -1073741825
  tail call void @Xil_Out32(i64 noundef %28, i32 noundef %29)
  br i1 %.not, label %31, label %30

30:                                               ; preds = %24
  tail call void @usleep(i64 noundef 5000) #4
  br label %31

31:                                               ; preds = %30, %24
  call void @XTime_GetTime(ptr noundef nonnull %1) #4
  br label %32

32:                                               ; preds = %37, %31
  %33 = load ptr, ptr @DcfgInstPtr, align 8, !tbaa !9
  %34 = call i32 @XDcfg_GetStatusRegister(ptr noundef %33) #4
  %35 = and i32 %34, 16
  %36 = icmp eq i32 %35, 0
  br i1 %36, label %.thread, label %37

37:                                               ; preds = %32
  call void @XTime_GetTime(ptr noundef nonnull %2) #4
  %38 = load i64, ptr %1, align 8, !tbaa !5
  %39 = add i64 %38, 9750000
  %40 = load i64, ptr %2, align 8, !tbaa !5
  %.not26 = icmp ugt i64 %39, %40
  br i1 %.not26, label %41, label %32, !llvm.loop !17

41:                                               ; preds = %37
  %42 = load ptr, ptr @DcfgInstPtr, align 8, !tbaa !9
  %43 = getelementptr inbounds i8, ptr %42, i64 4
  %44 = load i32, ptr %43, align 4, !tbaa !11
  %45 = zext i32 %44 to i64
  call void @Xil_Out32(i64 noundef %45, i32 noundef %19)
  %46 = load ptr, ptr @DcfgInstPtr, align 8, !tbaa !9
  %47 = call i32 @XDcfg_GetControlRegister(ptr noundef %46) #4
  %48 = and i32 %47, 4096
  %.not19 = icmp eq i32 %48, 0
  br i1 %.not19, label %.critedge, label %49

49:                                               ; preds = %41
  call void @usleep(i64 noundef 5000) #4
  %50 = load ptr, ptr @DcfgInstPtr, align 8, !tbaa !9
  %51 = getelementptr inbounds i8, ptr %50, i64 4
  %52 = load i32, ptr %51, align 4, !tbaa !11
  %53 = zext i32 %52 to i64
  call void @Xil_Out32(i64 noundef %53, i32 noundef %29)
  call void @usleep(i64 noundef 5000) #4
  br label %58

.critedge:                                        ; preds = %41
  %54 = load ptr, ptr @DcfgInstPtr, align 8, !tbaa !9
  %55 = getelementptr inbounds i8, ptr %54, i64 4
  %56 = load i32, ptr %55, align 4, !tbaa !11
  %57 = zext i32 %56 to i64
  call void @Xil_Out32(i64 noundef %57, i32 noundef %29)
  br label %58

58:                                               ; preds = %.critedge, %49
  call void @XTime_GetTime(ptr noundef nonnull %1) #4
  br label %59

59:                                               ; preds = %64, %58
  %60 = load ptr, ptr @DcfgInstPtr, align 8, !tbaa !9
  %61 = call i32 @XDcfg_GetStatusRegister(ptr noundef %60) #4
  %62 = and i32 %61, 16
  %63 = icmp eq i32 %62, 0
  br i1 %63, label %.thread, label %64

64:                                               ; preds = %59
  call void @XTime_GetTime(ptr noundef nonnull %2) #4
  %65 = load i64, ptr %1, align 8, !tbaa !5
  %66 = add i64 %65, 9750000
  %67 = load i64, ptr %2, align 8, !tbaa !5
  %.not27 = icmp ugt i64 %66, %67
  br i1 %.not27, label %.loopexit, label %59, !llvm.loop !19

.thread:                                          ; preds = %32, %59
  %68 = load ptr, ptr @DcfgInstPtr, align 8, !tbaa !9
  %69 = getelementptr inbounds i8, ptr %68, i64 4
  %70 = load i32, ptr %69, align 4, !tbaa !11
  %71 = zext i32 %70 to i64
  call void @Xil_Out32(i64 noundef %71, i32 noundef %19)
  br label %72

72:                                               ; preds = %72, %.thread
  %73 = load ptr, ptr @DcfgInstPtr, align 8, !tbaa !9
  %74 = call i32 @XDcfg_GetStatusRegister(ptr noundef %73) #4
  %75 = and i32 %74, 16
  %.not21 = icmp eq i32 %75, 0
  br i1 %.not21, label %72, label %76, !llvm.loop !20

76:                                               ; preds = %72
  %77 = load ptr, ptr @DcfgInstPtr, align 8, !tbaa !9
  %78 = call i32 @XDcfg_GetStatusRegister(ptr noundef %77) #4
  br label %.loopexit

.loopexit:                                        ; preds = %64, %10, %76
  %.017 = phi i32 [ 0, %76 ], [ 1, %10 ], [ 1, %64 ]
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %1) #4
  ret i32 %.017
}

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @Xil_Out32(i64 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) local_unnamed_addr #2

declare i32 @XDcfg_GetMiscControlRegister(ptr noundef) local_unnamed_addr #3

declare i32 @XDcfg_GetControlRegister(ptr noundef) local_unnamed_addr #3

declare void @usleep(i64 noundef) local_unnamed_addr #3

declare void @XTime_GetTime(ptr noundef) local_unnamed_addr #3

declare i32 @XDcfg_GetStatusRegister(ptr noundef) local_unnamed_addr #3

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !15, i64 4}
!12 = !{!"", !13, i64 0, !15, i64 8, !15, i64 12, !10, i64 16, !10, i64 24}
!13 = !{!"", !14, i64 0, !15, i64 4}
!14 = !{!"short", !7, i64 0}
!15 = !{!"int", !7, i64 0}
!16 = !{!15, !15, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = distinct !{!19, !18}
!20 = distinct !{!20, !18}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass