; LLVM IR from FrancesoM/Bisc8FX :: sdk_projects/bisc8_platform/zynq_fsbl (main)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XDcfg = type { %struct.XDcfg_Config, i32, i32, ptr, ptr }
%struct.XDcfg_Config = type { i16, i32 }

@FlashReadBaseAddress = external dso_local global i32, align 4
@DcfgInstPtr = external global ptr, align 8
@QspiFlashSize = external global i32, align 4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @Xil_Out32(i64 noundef, i32 noundef) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @NextValidImageCheck() #2 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  store i32 0, ptr %4, align 4, !tbaa !5
  %6 = load i32, ptr @FlashReadBaseAddress, align 4, !tbaa !5
  %7 = icmp eq i32 %6, -67108864
  br i1 %7, label %8, label %10

8:                                                ; preds = %0
  %9 = load i32, ptr @QspiFlashSize, align 4, !tbaa !5
  store i32 %9, ptr %4, align 4, !tbaa !5
  br label %10

10:                                               ; preds = %8, %0
  %11 = load i32, ptr @FlashReadBaseAddress, align 4, !tbaa !5
  %12 = icmp eq i32 %11, -520093696
  br i1 %12, label %13, label %14

13:                                               ; preds = %10
  store i32 134217728, ptr %4, align 4, !tbaa !5
  br label %14

14:                                               ; preds = %13, %10
  %15 = load i32, ptr @FlashReadBaseAddress, align 4, !tbaa !5
  %16 = icmp eq i32 %15, -503316480
  br i1 %16, label %17, label %18

17:                                               ; preds = %14
  store i32 33554432, ptr %4, align 4, !tbaa !5
  br label %18

18:                                               ; preds = %17, %14
  %19 = load ptr, ptr @DcfgInstPtr, align 8, !tbaa !9
  %20 = getelementptr inbounds %struct.XDcfg, ptr %19, i32 0, i32 0
  %21 = getelementptr inbounds %struct.XDcfg_Config, ptr %20, i32 0, i32 1
  %22 = load i32, ptr %21, align 4, !tbaa !11
  %23 = add i32 %22, 44
  %24 = zext i32 %23 to i64
  %25 = call i32 @Xil_In32(i64 noundef %24)
  store i32 %25, ptr %3, align 4, !tbaa !5
  %26 = load i32, ptr %3, align 4, !tbaa !5
  %27 = and i32 %26, 8191
  %28 = mul i32 %27, 32768
  store i32 %28, ptr %2, align 4, !tbaa !5
  br label %29

29:                                               ; preds = %51, %18
  %30 = load i32, ptr %2, align 4, !tbaa !5
  %31 = load i32, ptr %4, align 4, !tbaa !5
  %32 = icmp ult i32 %30, %31
  br i1 %32, label %33, label %57

33:                                               ; preds = %29
  %34 = load i32, ptr %2, align 4, !tbaa !5
  %35 = call i32 @ImageCheckID(i32 noundef %34)
  %36 = zext i32 %35 to i64
  %37 = icmp eq i64 %36, 0
  br i1 %37, label %38, label %51

38:                                               ; preds = %33
  %39 = load i32, ptr %2, align 4, !tbaa !5
  %40 = call i32 @HeaderChecksum(i32 noundef %39)
  %41 = zext i32 %40 to i64
  %42 = icmp eq i64 %41, 0
  br i1 %42, label %43, label %51

43:                                               ; preds = %38
  %44 = load ptr, ptr @DcfgInstPtr, align 8, !tbaa !9
  %45 = getelementptr inbounds %struct.XDcfg, ptr %44, i32 0, i32 0
  %46 = getelementptr inbounds %struct.XDcfg_Config, ptr %45, i32 0, i32 1
  %47 = load i32, ptr %46, align 4, !tbaa !11
  %48 = add i32 %47, 44
  %49 = zext i32 %48 to i64
  %50 = load i32, ptr %3, align 4, !tbaa !5
  call void @Xil_Out32(i64 noundef %49, i32 noundef %50)
  store i32 0, ptr %1, align 4
  store i32 1, ptr %5, align 4
  br label %58

51:                                               ; preds = %38, %33
  %52 = load i32, ptr %3, align 4, !tbaa !5
  %53 = add i32 %52, 1
  store i32 %53, ptr %3, align 4, !tbaa !5
  %54 = load i32, ptr %3, align 4, !tbaa !5
  %55 = and i32 %54, 8191
  %56 = mul i32 %55, 32768
  store i32 %56, ptr %2, align 4, !tbaa !5
  br label %29, !llvm.loop !15

57:                                               ; preds = %29
  store i32 1, ptr %1, align 4
  store i32 1, ptr %5, align 4
  br label %58

58:                                               ; preds = %57, %43
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #3
  %59 = load i32, ptr %1, align 4
  ret i32 %59
}

; Function Attrs: nounwind uwtable
declare dso_local i32 @HeaderChecksum(i32 noundef) #2

; Function Attrs: nounwind uwtable
declare dso_local i32 @ImageCheckID(i32 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !6, i64 4}
!12 = !{!"", !13, i64 0, !6, i64 8, !6, i64 12, !10, i64 16, !10, i64 24}
!13 = !{!"", !14, i64 0, !6, i64 4}
!14 = !{!"short", !7, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@FlashReadBaseAddress = external dso_local local_unnamed_addr global i32, align 4
@DcfgInstPtr = external local_unnamed_addr global ptr, align 8
@QspiFlashSize = external local_unnamed_addr global i32, align 4

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @Xil_Out32(i64 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @NextValidImageCheck() local_unnamed_addr #1 {
  %1 = load i32, ptr @FlashReadBaseAddress, align 4, !tbaa !5
  %2 = icmp eq i32 %1, -67108864
  %3 = load i32, ptr @QspiFlashSize, align 4
  %spec.select = select i1 %2, i32 %3, i32 0
  %4 = icmp eq i32 %1, -520093696
  %.1 = select i1 %4, i32 134217728, i32 %spec.select
  %5 = icmp eq i32 %1, -503316480
  %.2 = select i1 %5, i32 33554432, i32 %.1
  %6 = load ptr, ptr @DcfgInstPtr, align 8, !tbaa !9
  %7 = getelementptr inbounds i8, ptr %6, i64 4
  %8 = load i32, ptr %7, align 4, !tbaa !11
  %9 = add i32 %8, 44
  %10 = zext i32 %9 to i64
  %11 = tail call i32 @Xil_In32(i64 noundef %10)
  %.010.in13 = shl i32 %11, 15
  %.01014 = and i32 %.010.in13, 268402688
  %12 = icmp ult i32 %.01014, %.2
  br i1 %12, label %.lr.ph, label %.loopexit

.lr.ph:                                           ; preds = %0, %24
  %.01016 = phi i32 [ %.010, %24 ], [ %.01014, %0 ]
  %.0915 = phi i32 [ %25, %24 ], [ %11, %0 ]
  %13 = tail call i32 @ImageCheckID(i32 noundef %.01016)
  %14 = icmp eq i32 %13, 0
  br i1 %14, label %15, label %24

15:                                               ; preds = %.lr.ph
  %16 = tail call i32 @HeaderChecksum(i32 noundef %.01016)
  %17 = icmp eq i32 %16, 0
  br i1 %17, label %18, label %24

18:                                               ; preds = %15
  %19 = load ptr, ptr @DcfgInstPtr, align 8, !tbaa !9
  %20 = getelementptr inbounds i8, ptr %19, i64 4
  %21 = load i32, ptr %20, align 4, !tbaa !11
  %22 = add i32 %21, 44
  %23 = zext i32 %22 to i64
  tail call void @Xil_Out32(i64 noundef %23, i32 noundef %.0915)
  br label %.loopexit

24:                                               ; preds = %15, %.lr.ph
  %25 = add i32 %.0915, 1
  %.010.in = shl i32 %25, 15
  %.010 = and i32 %.010.in, 268402688
  %26 = icmp ult i32 %.010, %.2
  br i1 %26, label %.lr.ph, label %.loopexit, !llvm.loop !15

.loopexit:                                        ; preds = %24, %0, %18
  %.011 = phi i32 [ 0, %18 ], [ 1, %0 ], [ 1, %24 ]
  ret i32 %.011
}

; Function Attrs: nounwind uwtable
declare dso_local i32 @HeaderChecksum(i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @ImageCheckID(i32 noundef) local_unnamed_addr #1

attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !6, i64 4}
!12 = !{!"", !13, i64 0, !6, i64 8, !6, i64 12, !10, i64 16, !10, i64 24}
!13 = !{!"", !14, i64 0, !6, i64 4}
!14 = !{!"short", !7, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass