; LLVM IR from tangjz/acm-icpc :: 51nod/1672.ll (Z6updateiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@seg = external dso_local global [200020 x i32], align 16

; Function Attrs: mustprogress uwtable
define dso_local void @_Z6updateiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #0 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store i32 %0, ptr %5, align 4, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !5
  store i32 %3, ptr %8, align 4, !tbaa !5
  br label %10

10:                                               ; preds = %35, %4
  %11 = load i32, ptr %5, align 4, !tbaa !5
  %12 = load i32, ptr %6, align 4, !tbaa !5
  %13 = icmp slt i32 %11, %12
  br i1 %13, label %14, label %36

14:                                               ; preds = %10
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %15 = load i32, ptr %5, align 4, !tbaa !5
  %16 = load i32, ptr %6, align 4, !tbaa !5
  %17 = add nsw i32 %15, %16
  %18 = ashr i32 %17, 1
  store i32 %18, ptr %9, align 4, !tbaa !5
  %19 = load i32, ptr %8, align 4, !tbaa !5
  %20 = load i32, ptr %5, align 4, !tbaa !5
  %21 = load i32, ptr %6, align 4, !tbaa !5
  %22 = call noundef i32 @_Z7seg_idxii(i32 noundef %20, i32 noundef %21)
  %23 = sext i32 %22 to i64
  %24 = getelementptr inbounds [200020 x i32], ptr @seg, i64 0, i64 %23
  %25 = load i32, ptr %24, align 4, !tbaa !5
  %26 = add nsw i32 %25, %19
  store i32 %26, ptr %24, align 4, !tbaa !5
  %27 = load i32, ptr %7, align 4, !tbaa !5
  %28 = load i32, ptr %9, align 4, !tbaa !5
  %29 = icmp sle i32 %27, %28
  br i1 %29, label %30, label %32

30:                                               ; preds = %14
  %31 = load i32, ptr %9, align 4, !tbaa !5
  store i32 %31, ptr %6, align 4, !tbaa !5
  br label %35

32:                                               ; preds = %14
  %33 = load i32, ptr %9, align 4, !tbaa !5
  %34 = add nsw i32 %33, 1
  store i32 %34, ptr %5, align 4, !tbaa !5
  br label %35

35:                                               ; preds = %32, %30
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  br label %10, !llvm.loop !9

36:                                               ; preds = %10
  %37 = load i32, ptr %8, align 4, !tbaa !5
  %38 = load i32, ptr %5, align 4, !tbaa !5
  %39 = load i32, ptr %6, align 4, !tbaa !5
  %40 = call noundef i32 @_Z7seg_idxii(i32 noundef %38, i32 noundef %39)
  %41 = sext i32 %40 to i64
  %42 = getelementptr inbounds [200020 x i32], ptr @seg, i64 0, i64 %41
  %43 = load i32, ptr %42, align 4, !tbaa !5
  %44 = add nsw i32 %43, %37
  store i32 %44, ptr %42, align 4, !tbaa !5
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7seg_idxii(i32 noundef, i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@seg = external dso_local local_unnamed_addr global [200020 x i32], align 16

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z6updateiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  %5 = icmp slt i32 %0, %1
  br i1 %5, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %4, %.lr.ph
  %.019 = phi i32 [ %.1, %.lr.ph ], [ %0, %4 ]
  %.01418 = phi i32 [ %.115, %.lr.ph ], [ %1, %4 ]
  %6 = add nsw i32 %.019, %.01418
  %7 = ashr i32 %6, 1
  %8 = tail call noundef i32 @_Z7seg_idxii(i32 noundef %.019, i32 noundef %.01418)
  %9 = sext i32 %8 to i64
  %10 = getelementptr inbounds [200020 x i32], ptr @seg, i64 0, i64 %9
  %11 = load i32, ptr %10, align 4, !tbaa !5
  %12 = add nsw i32 %11, %3
  store i32 %12, ptr %10, align 4, !tbaa !5
  %.not = icmp slt i32 %7, %2
  %13 = add nsw i32 %7, 1
  %.115 = select i1 %.not, i32 %.01418, i32 %7
  %.1 = select i1 %.not, i32 %13, i32 %.019
  %14 = icmp slt i32 %.1, %.115
  br i1 %14, label %.lr.ph, label %._crit_edge, !llvm.loop !9

._crit_edge:                                      ; preds = %.lr.ph, %4
  %.014.lcssa = phi i32 [ %1, %4 ], [ %.115, %.lr.ph ]
  %.0.lcssa = phi i32 [ %0, %4 ], [ %.1, %.lr.ph ]
  %15 = tail call noundef i32 @_Z7seg_idxii(i32 noundef %.0.lcssa, i32 noundef %.014.lcssa)
  %16 = sext i32 %15 to i64
  %17 = getelementptr inbounds [200020 x i32], ptr @seg, i64 0, i64 %16
  %18 = load i32, ptr %17, align 4, !tbaa !5
  %19 = add nsw i32 %18, %3
  store i32 %19, ptr %17, align 4, !tbaa !5
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7seg_idxii(i32 noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass