; LLVM IR from rtfeldman/quicksort-benchmarks :: cpp/quicksort.ll (Z9partitionRSt6vectorIdSaIdEElll)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z4swapRSt6vectorIdSaIdEEll(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, i64 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z9partitionRSt6vectorIdSaIdEElll(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %1, i64 noundef %2, i64 noundef %3) #0 {
  %5 = alloca ptr, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i64 %1, ptr %6, align 8, !tbaa !9
  store i64 %2, ptr %7, align 8, !tbaa !9
  store i64 %3, ptr %8, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #2
  %11 = load i64, ptr %7, align 8, !tbaa !9
  store i64 %11, ptr %9, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #2
  %12 = load i64, ptr %7, align 8, !tbaa !9
  store i64 %12, ptr %10, align 8, !tbaa !9
  br label %13

13:                                               ; preds = %35, %4
  %14 = load i64, ptr %10, align 8, !tbaa !9
  %15 = load i64, ptr %8, align 8, !tbaa !9
  %16 = icmp slt i64 %14, %15
  br i1 %16, label %18, label %17

17:                                               ; preds = %13
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #2
  br label %38

18:                                               ; preds = %13
  %19 = load ptr, ptr %5, align 8, !tbaa !5
  %20 = load i64, ptr %10, align 8, !tbaa !9
  %21 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %19, i64 noundef %20) #2
  %22 = load double, ptr %21, align 8, !tbaa !11
  %23 = load ptr, ptr %5, align 8, !tbaa !5
  %24 = load i64, ptr %6, align 8, !tbaa !9
  %25 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %23, i64 noundef %24) #2
  %26 = load double, ptr %25, align 8, !tbaa !11
  %27 = fcmp olt double %22, %26
  br i1 %27, label %28, label %34

28:                                               ; preds = %18
  %29 = load ptr, ptr %5, align 8, !tbaa !5
  %30 = load i64, ptr %10, align 8, !tbaa !9
  %31 = load i64, ptr %9, align 8, !tbaa !9
  call void @_Z4swapRSt6vectorIdSaIdEEll(ptr noundef nonnull align 8 dereferenceable(24) %29, i64 noundef %30, i64 noundef %31)
  %32 = load i64, ptr %9, align 8, !tbaa !9
  %33 = add nsw i64 %32, 1
  store i64 %33, ptr %9, align 8, !tbaa !9
  br label %34

34:                                               ; preds = %28, %18
  br label %35

35:                                               ; preds = %34
  %36 = load i64, ptr %10, align 8, !tbaa !9
  %37 = add nsw i64 %36, 1
  store i64 %37, ptr %10, align 8, !tbaa !9
  br label %13, !llvm.loop !13

38:                                               ; preds = %17
  %39 = load ptr, ptr %5, align 8, !tbaa !5
  %40 = load i64, ptr %8, align 8, !tbaa !9
  %41 = load i64, ptr %9, align 8, !tbaa !9
  call void @_Z4swapRSt6vectorIdSaIdEEll(ptr noundef nonnull align 8 dereferenceable(24) %39, i64 noundef %40, i64 noundef %41)
  %42 = load i64, ptr %9, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #2
  ret i64 %42
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"double", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z4swapRSt6vectorIdSaIdEEll(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z9partitionRSt6vectorIdSaIdEElll(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %1, i64 noundef %2, i64 noundef %3) local_unnamed_addr #0 {
  %5 = icmp slt i64 %2, %3
  br i1 %5, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %13, %4
  %.016.lcssa = phi i64 [ %2, %4 ], [ %.1, %13 ]
  tail call void @_Z4swapRSt6vectorIdSaIdEEll(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %3, i64 noundef %.016.lcssa)
  ret i64 %.016.lcssa

.lr.ph:                                           ; preds = %4, %13
  %.019 = phi i64 [ %14, %13 ], [ %2, %4 ]
  %.01618 = phi i64 [ %.1, %13 ], [ %2, %4 ]
  %6 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %.019) #1
  %7 = load double, ptr %6, align 8, !tbaa !5
  %8 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %1) #1
  %9 = load double, ptr %8, align 8, !tbaa !5
  %10 = fcmp olt double %7, %9
  br i1 %10, label %11, label %13

11:                                               ; preds = %.lr.ph
  tail call void @_Z4swapRSt6vectorIdSaIdEEll(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %.019, i64 noundef %.01618)
  %12 = add nsw i64 %.01618, 1
  br label %13

13:                                               ; preds = %.lr.ph, %11
  %.1 = phi i64 [ %12, %11 ], [ %.01618, %.lr.ph ]
  %14 = add i64 %.019, 1
  %exitcond.not = icmp eq i64 %14, %3
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !9
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass