; LLVM IR from reazon-research/OpenArm :: control/canfd_control/Drivers/STM32H7xx_HAL_Driver/Src (stm32h7xx_hal_pwr_ex)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.PWR_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local void @HAL_PWREx_WAKEUP_PIN_IRQHandler() #0 {
  %1 = load volatile i32, ptr getelementptr inbounds (%struct.PWR_TypeDef, ptr inttoptr (i64 1476544512 to ptr), i32 0, i32 9), align 4, !tbaa !5
  %2 = zext i32 %1 to i64
  %3 = and i64 %2, 1
  %4 = icmp ne i64 %3, 0
  br i1 %4, label %5, label %10

5:                                                ; preds = %0
  %6 = load volatile i32, ptr getelementptr inbounds (%struct.PWR_TypeDef, ptr inttoptr (i64 1476544512 to ptr), i32 0, i32 8), align 4, !tbaa !10
  %7 = zext i32 %6 to i64
  %8 = or i64 %7, 1
  %9 = trunc i64 %8 to i32
  store volatile i32 %9, ptr getelementptr inbounds (%struct.PWR_TypeDef, ptr inttoptr (i64 1476544512 to ptr), i32 0, i32 8), align 4, !tbaa !10
  call void @HAL_PWREx_WKUP1_Callback()
  br label %37

10:                                               ; preds = %0
  %11 = load volatile i32, ptr getelementptr inbounds (%struct.PWR_TypeDef, ptr inttoptr (i64 1476544512 to ptr), i32 0, i32 9), align 4, !tbaa !5
  %12 = zext i32 %11 to i64
  %13 = and i64 %12, 2
  %14 = icmp ne i64 %13, 0
  br i1 %14, label %15, label %20

15:                                               ; preds = %10
  %16 = load volatile i32, ptr getelementptr inbounds (%struct.PWR_TypeDef, ptr inttoptr (i64 1476544512 to ptr), i32 0, i32 8), align 4, !tbaa !10
  %17 = zext i32 %16 to i64
  %18 = or i64 %17, 2
  %19 = trunc i64 %18 to i32
  store volatile i32 %19, ptr getelementptr inbounds (%struct.PWR_TypeDef, ptr inttoptr (i64 1476544512 to ptr), i32 0, i32 8), align 4, !tbaa !10
  call void @HAL_PWREx_WKUP2_Callback()
  br label %36

20:                                               ; preds = %10
  %21 = load volatile i32, ptr getelementptr inbounds (%struct.PWR_TypeDef, ptr inttoptr (i64 1476544512 to ptr), i32 0, i32 9), align 4, !tbaa !5
  %22 = zext i32 %21 to i64
  %23 = and i64 %22, 8
  %24 = icmp ne i64 %23, 0
  br i1 %24, label %25, label %30

25:                                               ; preds = %20
  %26 = load volatile i32, ptr getelementptr inbounds (%struct.PWR_TypeDef, ptr inttoptr (i64 1476544512 to ptr), i32 0, i32 8), align 4, !tbaa !10
  %27 = zext i32 %26 to i64
  %28 = or i64 %27, 8
  %29 = trunc i64 %28 to i32
  store volatile i32 %29, ptr getelementptr inbounds (%struct.PWR_TypeDef, ptr inttoptr (i64 1476544512 to ptr), i32 0, i32 8), align 4, !tbaa !10
  call void @HAL_PWREx_WKUP4_Callback()
  br label %35

30:                                               ; preds = %20
  %31 = load volatile i32, ptr getelementptr inbounds (%struct.PWR_TypeDef, ptr inttoptr (i64 1476544512 to ptr), i32 0, i32 8), align 4, !tbaa !10
  %32 = zext i32 %31 to i64
  %33 = or i64 %32, 32
  %34 = trunc i64 %33 to i32
  store volatile i32 %34, ptr getelementptr inbounds (%struct.PWR_TypeDef, ptr inttoptr (i64 1476544512 to ptr), i32 0, i32 8), align 4, !tbaa !10
  call void @HAL_PWREx_WKUP6_Callback()
  br label %35

35:                                               ; preds = %30, %25
  br label %36

36:                                               ; preds = %35, %15
  br label %37

37:                                               ; preds = %36, %5
  ret void
}

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_PWREx_WKUP1_Callback() #0

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_PWREx_WKUP2_Callback() #0

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_PWREx_WKUP4_Callback() #0

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_PWREx_WKUP6_Callback() #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 36}
!6 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 32}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @HAL_PWREx_WAKEUP_PIN_IRQHandler() local_unnamed_addr #0 {
  %1 = load volatile i32, ptr inttoptr (i64 1476544548 to ptr), align 4, !tbaa !5
  %2 = and i32 %1, 1
  %.not = icmp eq i32 %2, 0
  br i1 %.not, label %6, label %3

3:                                                ; preds = %0
  %4 = load volatile i32, ptr inttoptr (i64 1476544544 to ptr), align 32, !tbaa !10
  %5 = or i32 %4, 1
  store volatile i32 %5, ptr inttoptr (i64 1476544544 to ptr), align 32, !tbaa !10
  tail call void @HAL_PWREx_WKUP1_Callback()
  br label %20

6:                                                ; preds = %0
  %7 = load volatile i32, ptr inttoptr (i64 1476544548 to ptr), align 4, !tbaa !5
  %8 = and i32 %7, 2
  %.not1 = icmp eq i32 %8, 0
  br i1 %.not1, label %12, label %9

9:                                                ; preds = %6
  %10 = load volatile i32, ptr inttoptr (i64 1476544544 to ptr), align 32, !tbaa !10
  %11 = or i32 %10, 2
  store volatile i32 %11, ptr inttoptr (i64 1476544544 to ptr), align 32, !tbaa !10
  tail call void @HAL_PWREx_WKUP2_Callback()
  br label %20

12:                                               ; preds = %6
  %13 = load volatile i32, ptr inttoptr (i64 1476544548 to ptr), align 4, !tbaa !5
  %14 = and i32 %13, 8
  %.not2 = icmp eq i32 %14, 0
  %15 = load volatile i32, ptr inttoptr (i64 1476544544 to ptr), align 32, !tbaa !10
  br i1 %.not2, label %18, label %16

16:                                               ; preds = %12
  %17 = or i32 %15, 8
  store volatile i32 %17, ptr inttoptr (i64 1476544544 to ptr), align 32, !tbaa !10
  tail call void @HAL_PWREx_WKUP4_Callback()
  br label %20

18:                                               ; preds = %12
  %19 = or i32 %15, 32
  store volatile i32 %19, ptr inttoptr (i64 1476544544 to ptr), align 32, !tbaa !10
  tail call void @HAL_PWREx_WKUP6_Callback()
  br label %20

20:                                               ; preds = %9, %18, %16, %3
  ret void
}

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_PWREx_WKUP1_Callback() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_PWREx_WKUP2_Callback() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_PWREx_WKUP4_Callback() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_PWREx_WKUP6_Callback() local_unnamed_addr #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 36}
!6 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 32}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferAlignmentPass,InstCombinePass,SimplifyCFGPass,TailCallElimPass