; LLVM IR from dtecta/motion-toolkit :: test/moto/DualNumberTests.ll (ZN39DualNumber_DualQuaternionLogarithm_Test8TestBodyEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.mt::Vector4.5" = type { %"class.mt::Dual", %"class.mt::Dual", %"class.mt::Dual", %"class.mt::Dual" }
%"class.mt::Dual" = type { float, float }
%"class.mt::Vector4" = type { %union.anon.3 }
%union.anon.3 = type { <4 x float> }
%"class.mt::Vector3" = type { float, float, float }
%"class.mt::Vector3.2" = type { %"class.mt::Dual", %"class.mt::Dual", %"class.mt::Dual" }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN2mt5rigidIfEENS_7Vector4INS_4DualIT_EEEERKNS1_IS3_EERKNS_7Vector3IS3_EE(ptr dead_on_unwind noalias writable sret(%"class.mt::Vector4.5") align 4, ptr noundef nonnull align 16 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(12)) #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN2mt7Vector3IfEC2Efff(ptr noundef nonnull align 4 dereferenceable(12), float noundef, float noundef, float noundef) unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_Z14testFuzzyEqualRKN2mt7Vector4INS_4DualIfEEEES5_(ptr noundef nonnull align 4 dereferenceable(32), ptr noundef nonnull align 4 dereferenceable(32)) #3

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN39DualNumber_DualQuaternionLogarithm_Test8TestBodyEv(ptr noundef nonnull align 8 dereferenceable(16) %0) unnamed_addr #4 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca float, align 4
  %4 = alloca i32, align 4
  %5 = alloca %"class.mt::Vector4.5", align 4
  %6 = alloca %"class.mt::Vector4", align 16
  %7 = alloca %"class.mt::Vector3", align 4
  %8 = alloca %"class.mt::Vector3.2", align 4
  %9 = alloca %"class.mt::Vector4.5", align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  %10 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #6
  store float 1.000000e+00, ptr %3, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #6
  store i32 0, ptr %4, align 4, !tbaa !11
  br label %11

11:                                               ; preds = %26, %1
  %12 = load i32, ptr %4, align 4, !tbaa !11
  %13 = icmp ne i32 %12, 12
  br i1 %13, label %15, label %14

14:                                               ; preds = %11
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #6
  br label %29

15:                                               ; preds = %11
  call void @llvm.lifetime.start.p0(i64 32, ptr %5) #6
  call void @llvm.lifetime.start.p0(i64 16, ptr %6) #6
  %16 = load float, ptr %3, align 4, !tbaa !9
  %17 = call { double, double } @_ZN2mt13fromAxisAngleIfEENS_7Vector4IT_EEiS2_(i32 noundef 1, float noundef %16)
  %18 = getelementptr inbounds %"class.mt::Vector4", ptr %6, i32 0, i32 0
  %19 = getelementptr inbounds %union.anon.3, ptr %18, i32 0, i32 0
  %20 = getelementptr inbounds { double, double }, ptr %19, i32 0, i32 0
  %21 = extractvalue { double, double } %17, 0
  store double %21, ptr %20, align 16
  %22 = getelementptr inbounds { double, double }, ptr %19, i32 0, i32 1
  %23 = extractvalue { double, double } %17, 1
  store double %23, ptr %22, align 8
  call void @llvm.lifetime.start.p0(i64 12, ptr %7) #6
  call void @_ZN2mt7Vector3IfEC2Efff(ptr noundef nonnull align 4 dereferenceable(12) %7, float noundef 0.000000e+00, float noundef 0.000000e+00, float noundef 1.000000e+00)
  call void @_ZN2mt5rigidIfEENS_7Vector4INS_4DualIT_EEEERKNS1_IS3_EERKNS_7Vector3IS3_EE(ptr dead_on_unwind writable sret(%"class.mt::Vector4.5") align 4 %5, ptr noundef nonnull align 16 dereferenceable(16) %6, ptr noundef nonnull align 4 dereferenceable(12) %7)
  call void @llvm.lifetime.end.p0(i64 12, ptr %7) #6
  call void @llvm.lifetime.end.p0(i64 16, ptr %6) #6
  call void @llvm.lifetime.start.p0(i64 24, ptr %8) #6
  call void @_ZN2mt7logUnitIfEENS_7Vector3INS_4DualIT_EEEERKNS_7Vector4IS4_EE(ptr dead_on_unwind writable sret(%"class.mt::Vector3.2") align 4 %8, ptr noundef nonnull align 4 dereferenceable(32) %5)
  call void @llvm.lifetime.start.p0(i64 32, ptr %9) #6
  call void @_ZN2mt3expIfEENS_7Vector4INS_4DualIT_EEEERKNS_7Vector3IS4_EE(ptr dead_on_unwind writable sret(%"class.mt::Vector4.5") align 4 %9, ptr noundef nonnull align 4 dereferenceable(24) %8)
  call void @_Z14testFuzzyEqualRKN2mt7Vector4INS_4DualIfEEEES5_(ptr noundef nonnull align 4 dereferenceable(32) %5, ptr noundef nonnull align 4 dereferenceable(32) %9)
  %24 = load float, ptr %3, align 4, !tbaa !9
  %25 = fmul float %24, 5.000000e-01
  store float %25, ptr %3, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 32, ptr %9) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr %8) #6
  call void @llvm.lifetime.end.p0(i64 32, ptr %5) #6
  br label %26

26:                                               ; preds = %15
  %27 = load i32, ptr %4, align 4, !tbaa !11
  %28 = add nsw i32 %27, 1
  store i32 %28, ptr %4, align 4, !tbaa !11
  br label %11, !llvm.loop !13

29:                                               ; preds = %14
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #6
  ret void
}

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local { double, double } @_ZN2mt13fromAxisAngleIfEENS_7Vector4IT_EEiS2_(i32 noundef, float noundef) #5

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN2mt7logUnitIfEENS_7Vector3INS_4DualIT_EEEERKNS_7Vector4IS4_EE(ptr dead_on_unwind noalias writable sret(%"class.mt::Vector3.2") align 4, ptr noundef nonnull align 4 dereferenceable(32)) #5

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN2mt3expIfEENS_7Vector4INS_4DualIT_EEEERKNS_7Vector3IS4_EE(ptr dead_on_unwind noalias writable sret(%"class.mt::Vector4.5") align 4, ptr noundef nonnull align 4 dereferenceable(24)) #5

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"float", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.mt::Vector4.5" = type { %"class.mt::Dual", %"class.mt::Dual", %"class.mt::Dual", %"class.mt::Dual" }
%"class.mt::Dual" = type { float, float }
%"class.mt::Vector4" = type { %union.anon.3 }
%union.anon.3 = type { <4 x float> }
%"class.mt::Vector3" = type { float, float, float }
%"class.mt::Vector3.2" = type { %"class.mt::Dual", %"class.mt::Dual", %"class.mt::Dual" }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN2mt5rigidIfEENS_7Vector4INS_4DualIT_EEEERKNS1_IS3_EERKNS_7Vector3IS3_EE(ptr dead_on_unwind noalias writable sret(%"class.mt::Vector4.5") align 4, ptr noundef nonnull align 16 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(12)) local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare dso_local void @_ZN2mt7Vector3IfEC2Efff(ptr noundef nonnull align 4 dereferenceable(12), float noundef, float noundef, float noundef) unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_Z14testFuzzyEqualRKN2mt7Vector4INS_4DualIfEEEES5_(ptr noundef nonnull align 4 dereferenceable(32), ptr noundef nonnull align 4 dereferenceable(32)) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN39DualNumber_DualQuaternionLogarithm_Test8TestBodyEv(ptr nocapture noundef nonnull readnone align 8 dereferenceable(16) %0) unnamed_addr #4 align 2 {
  %2 = alloca %"class.mt::Vector4.5", align 4
  %3 = alloca %"class.mt::Vector4", align 16
  %4 = alloca %"class.mt::Vector3", align 4
  %5 = alloca %"class.mt::Vector3.2", align 4
  %6 = alloca %"class.mt::Vector4.5", align 4
  %7 = getelementptr inbounds i8, ptr %3, i64 8
  br label %9

8:                                                ; preds = %9
  ret void

9:                                                ; preds = %1, %9
  %.06 = phi i32 [ 0, %1 ], [ %14, %9 ]
  %.045 = phi float [ 1.000000e+00, %1 ], [ %13, %9 ]
  call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %2) #6
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3) #6
  %10 = call { double, double } @_ZN2mt13fromAxisAngleIfEENS_7Vector4IT_EEiS2_(i32 noundef 1, float noundef %.045)
  %11 = extractvalue { double, double } %10, 0
  store double %11, ptr %3, align 16
  %12 = extractvalue { double, double } %10, 1
  store double %12, ptr %7, align 8
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %4) #6
  call void @_ZN2mt7Vector3IfEC2Efff(ptr noundef nonnull align 4 dereferenceable(12) %4, float noundef 0.000000e+00, float noundef 0.000000e+00, float noundef 1.000000e+00)
  call void @_ZN2mt5rigidIfEENS_7Vector4INS_4DualIT_EEEERKNS1_IS3_EERKNS_7Vector3IS3_EE(ptr dead_on_unwind nonnull writable sret(%"class.mt::Vector4.5") align 4 %2, ptr noundef nonnull align 16 dereferenceable(16) %3, ptr noundef nonnull align 4 dereferenceable(12) %4)
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %4) #6
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3) #6
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %5) #6
  call void @_ZN2mt7logUnitIfEENS_7Vector3INS_4DualIT_EEEERKNS_7Vector4IS4_EE(ptr dead_on_unwind nonnull writable sret(%"class.mt::Vector3.2") align 4 %5, ptr noundef nonnull align 4 dereferenceable(32) %2)
  call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %6) #6
  call void @_ZN2mt3expIfEENS_7Vector4INS_4DualIT_EEEERKNS_7Vector3IS4_EE(ptr dead_on_unwind nonnull writable sret(%"class.mt::Vector4.5") align 4 %6, ptr noundef nonnull align 4 dereferenceable(24) %5)
  call void @_Z14testFuzzyEqualRKN2mt7Vector4INS_4DualIfEEEES5_(ptr noundef nonnull align 4 dereferenceable(32) %2, ptr noundef nonnull align 4 dereferenceable(32) %6)
  %13 = fmul float %.045, 5.000000e-01
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %6) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #6
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %2) #6
  %14 = add nuw nsw i32 %.06, 1
  %.not = icmp eq i32 %14, 12
  br i1 %.not, label %8, label %9, !llvm.loop !5
}

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local { double, double } @_ZN2mt13fromAxisAngleIfEENS_7Vector4IT_EEiS2_(i32 noundef, float noundef) local_unnamed_addr #5

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN2mt7logUnitIfEENS_7Vector3INS_4DualIT_EEEERKNS_7Vector4IS4_EE(ptr dead_on_unwind noalias writable sret(%"class.mt::Vector3.2") align 4, ptr noundef nonnull align 4 dereferenceable(32)) local_unnamed_addr #5

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local void @_ZN2mt3expIfEENS_7Vector4INS_4DualIT_EEEERKNS_7Vector3IS4_EE(ptr dead_on_unwind noalias writable sret(%"class.mt::Vector4.5") align 4, ptr noundef nonnull align 4 dereferenceable(24)) local_unnamed_addr #5

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,LICMPass,LoopRotatePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass