; LLVM IR from lfarcaro/ARINC653_ARMV7A_AM335X :: ARINC653_PORT (mmu)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct._MMU_INFORMATION_TYPE = type { ptr, i32, i32, ptr, i32, i32 }

@CORE_MMU_INFORMATION = external dso_local global [1 x %struct._MMU_INFORMATION_TYPE], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @MMU_STARTUP(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3) #1 {
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store ptr %2, ptr %7, align 8, !tbaa !5
  store i32 %3, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  store ptr @CORE_MMU_INFORMATION, ptr %9, align 8, !tbaa !5
  %10 = load ptr, ptr %5, align 8, !tbaa !5
  %11 = load ptr, ptr %9, align 8, !tbaa !5
  %12 = getelementptr inbounds %struct._MMU_INFORMATION_TYPE, ptr %11, i32 0, i32 0
  store ptr %10, ptr %12, align 8, !tbaa !11
  %13 = load i32, ptr %6, align 4, !tbaa !9
  %14 = load ptr, ptr %9, align 8, !tbaa !5
  %15 = getelementptr inbounds %struct._MMU_INFORMATION_TYPE, ptr %14, i32 0, i32 1
  store i32 %13, ptr %15, align 8, !tbaa !13
  %16 = load ptr, ptr %9, align 8, !tbaa !5
  %17 = getelementptr inbounds %struct._MMU_INFORMATION_TYPE, ptr %16, i32 0, i32 2
  store i32 0, ptr %17, align 4, !tbaa !14
  %18 = load ptr, ptr %7, align 8, !tbaa !5
  %19 = load ptr, ptr %9, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct._MMU_INFORMATION_TYPE, ptr %19, i32 0, i32 3
  store ptr %18, ptr %20, align 8, !tbaa !15
  %21 = load i32, ptr %8, align 4, !tbaa !9
  %22 = load ptr, ptr %9, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct._MMU_INFORMATION_TYPE, ptr %22, i32 0, i32 4
  store i32 %21, ptr %23, align 8, !tbaa !16
  %24 = load ptr, ptr %9, align 8, !tbaa !5
  %25 = getelementptr inbounds %struct._MMU_INFORMATION_TYPE, ptr %24, i32 0, i32 5
  store i32 0, ptr %25, align 4, !tbaa !17
  call void @CP15MMUDisable()
  call void @CP15DomainAccessClientSet()
  call void @CP15ControlFeatureDisable(i32 noundef 268435458)
  call void @CP15ControlFeatureEnable(i32 noundef 536870912)
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  ret void
}

declare void @CP15MMUDisable() #2

declare void @CP15DomainAccessClientSet() #2

declare void @CP15ControlFeatureDisable(i32 noundef) #2

declare void @CP15ControlFeatureEnable(i32 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"_MMU_INFORMATION_TYPE", !6, i64 0, !10, i64 8, !10, i64 12, !6, i64 16, !10, i64 24, !10, i64 28}
!13 = !{!12, !10, i64 8}
!14 = !{!12, !10, i64 12}
!15 = !{!12, !6, i64 16}
!16 = !{!12, !10, i64 24}
!17 = !{!12, !10, i64 28}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct._MMU_INFORMATION_TYPE = type { ptr, i32, i32, ptr, i32, i32 }

@CORE_MMU_INFORMATION = external dso_local local_unnamed_addr global [1 x %struct._MMU_INFORMATION_TYPE], align 16

; Function Attrs: nounwind uwtable
define dso_local void @MMU_STARTUP(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  store ptr %0, ptr @CORE_MMU_INFORMATION, align 16, !tbaa !5
  store i32 %1, ptr getelementptr inbounds (i8, ptr @CORE_MMU_INFORMATION, i64 8), align 8, !tbaa !11
  store i32 0, ptr getelementptr inbounds (i8, ptr @CORE_MMU_INFORMATION, i64 12), align 4, !tbaa !12
  store ptr %2, ptr getelementptr inbounds (i8, ptr @CORE_MMU_INFORMATION, i64 16), align 16, !tbaa !13
  store i32 %3, ptr getelementptr inbounds (i8, ptr @CORE_MMU_INFORMATION, i64 24), align 8, !tbaa !14
  store i32 0, ptr getelementptr inbounds (i8, ptr @CORE_MMU_INFORMATION, i64 28), align 4, !tbaa !15
  tail call void @CP15MMUDisable() #2
  tail call void @CP15DomainAccessClientSet() #2
  tail call void @CP15ControlFeatureDisable(i32 noundef 268435458) #2
  tail call void @CP15ControlFeatureEnable(i32 noundef 536870912) #2
  ret void
}

declare void @CP15MMUDisable() local_unnamed_addr #1

declare void @CP15DomainAccessClientSet() local_unnamed_addr #1

declare void @CP15ControlFeatureDisable(i32 noundef) local_unnamed_addr #1

declare void @CP15ControlFeatureEnable(i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_MMU_INFORMATION_TYPE", !7, i64 0, !10, i64 8, !10, i64 12, !7, i64 16, !10, i64 24, !10, i64 28}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!6, !10, i64 12}
!13 = !{!6, !7, i64 16}
!14 = !{!6, !10, i64 24}
!15 = !{!6, !10, i64 28}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,TailCallElimPass