; LLVM IR from Mithreindeir/VelocityRaptor :: VelocityRaptor/src (vrManifold)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.vrBlockSolverData = type { %struct.vrVec2, %struct.vrMat2, %struct.vrVec2, %struct.vrVec2, %struct.vrVec2, %struct.vrVec2 }
%struct.vrMat2 = type { %struct.vrVec2, %struct.vrVec2 }
%struct.vrVec2 = type { float, float }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare <2 x float> @vrVect(float noundef, float noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #2

; Function Attrs: nounwind uwtable
define dso_local <2 x float> @vrManifoldGuassSeidel(ptr noundef byval(%struct.vrBlockSolverData) align 8 %0) #3 {
  %2 = alloca %struct.vrVec2, align 4
  %3 = alloca i32, align 4
  %4 = alloca float, align 4
  %5 = alloca float, align 4
  %6 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  store i32 100, ptr %3, align 4, !tbaa !5
  %7 = call <2 x float> @vrVect(float noundef 0.000000e+00, float noundef 0.000000e+00)
  store <2 x float> %7, ptr %2, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  store float 0.000000e+00, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  store float 0x3FE8F5C280000000, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  store i32 0, ptr %6, align 4, !tbaa !5
  br label %8

8:                                                ; preds = %110, %1
  %9 = load i32, ptr %6, align 4, !tbaa !5
  %10 = load i32, ptr %3, align 4, !tbaa !5
  %11 = icmp slt i32 %9, %10
  br i1 %11, label %13, label %12

12:                                               ; preds = %8
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  br label %113

13:                                               ; preds = %8
  store float 0.000000e+00, ptr %4, align 4, !tbaa !9
  %14 = getelementptr inbounds %struct.vrBlockSolverData, ptr %0, i32 0, i32 0
  %15 = getelementptr inbounds %struct.vrVec2, ptr %14, i32 0, i32 0
  %16 = load float, ptr %15, align 8, !tbaa !11
  %17 = getelementptr inbounds %struct.vrVec2, ptr %2, i32 0, i32 0
  %18 = load float, ptr %17, align 4, !tbaa !15
  %19 = load float, ptr %4, align 4, !tbaa !9
  %20 = call float @llvm.fmuladd.f32(float %16, float %18, float %19)
  store float %20, ptr %4, align 4, !tbaa !9
  %21 = getelementptr inbounds %struct.vrBlockSolverData, ptr %0, i32 0, i32 2
  %22 = getelementptr inbounds %struct.vrVec2, ptr %21, i32 0, i32 0
  %23 = load float, ptr %22, align 8, !tbaa !16
  %24 = load float, ptr %4, align 4, !tbaa !9
  %25 = fsub float %23, %24
  %26 = getelementptr inbounds %struct.vrBlockSolverData, ptr %0, i32 0, i32 0
  %27 = getelementptr inbounds %struct.vrVec2, ptr %26, i32 0, i32 0
  %28 = load float, ptr %27, align 8, !tbaa !11
  %29 = fdiv float %25, %28
  store float %29, ptr %4, align 4, !tbaa !9
  %30 = load float, ptr %5, align 4, !tbaa !9
  %31 = load float, ptr %4, align 4, !tbaa !9
  %32 = getelementptr inbounds %struct.vrVec2, ptr %2, i32 0, i32 0
  %33 = load float, ptr %32, align 4, !tbaa !15
  %34 = fsub float %31, %33
  %35 = getelementptr inbounds %struct.vrVec2, ptr %2, i32 0, i32 0
  %36 = load float, ptr %35, align 4, !tbaa !15
  %37 = call float @llvm.fmuladd.f32(float %30, float %34, float %36)
  store float %37, ptr %35, align 4, !tbaa !15
  %38 = getelementptr inbounds %struct.vrVec2, ptr %2, i32 0, i32 0
  %39 = load float, ptr %38, align 4, !tbaa !15
  %40 = getelementptr inbounds %struct.vrBlockSolverData, ptr %0, i32 0, i32 4
  %41 = getelementptr inbounds %struct.vrVec2, ptr %40, i32 0, i32 0
  %42 = load float, ptr %41, align 8, !tbaa !17
  %43 = fcmp olt float %39, %42
  br i1 %43, label %44, label %49

44:                                               ; preds = %13
  %45 = getelementptr inbounds %struct.vrBlockSolverData, ptr %0, i32 0, i32 4
  %46 = getelementptr inbounds %struct.vrVec2, ptr %45, i32 0, i32 0
  %47 = load float, ptr %46, align 8, !tbaa !17
  %48 = getelementptr inbounds %struct.vrVec2, ptr %2, i32 0, i32 0
  store float %47, ptr %48, align 4, !tbaa !15
  br label %49

49:                                               ; preds = %44, %13
  %50 = getelementptr inbounds %struct.vrVec2, ptr %2, i32 0, i32 0
  %51 = load float, ptr %50, align 4, !tbaa !15
  %52 = getelementptr inbounds %struct.vrBlockSolverData, ptr %0, i32 0, i32 5
  %53 = getelementptr inbounds %struct.vrVec2, ptr %52, i32 0, i32 0
  %54 = load float, ptr %53, align 8, !tbaa !18
  %55 = fcmp ogt float %51, %54
  br i1 %55, label %56, label %61

56:                                               ; preds = %49
  %57 = getelementptr inbounds %struct.vrBlockSolverData, ptr %0, i32 0, i32 5
  %58 = getelementptr inbounds %struct.vrVec2, ptr %57, i32 0, i32 0
  %59 = load float, ptr %58, align 8, !tbaa !18
  %60 = getelementptr inbounds %struct.vrVec2, ptr %2, i32 0, i32 0
  store float %59, ptr %60, align 4, !tbaa !15
  br label %61

61:                                               ; preds = %56, %49
  store float 0.000000e+00, ptr %4, align 4, !tbaa !9
  %62 = getelementptr inbounds %struct.vrBlockSolverData, ptr %0, i32 0, i32 0
  %63 = getelementptr inbounds %struct.vrVec2, ptr %62, i32 0, i32 1
  %64 = load float, ptr %63, align 4, !tbaa !19
  %65 = getelementptr inbounds %struct.vrVec2, ptr %2, i32 0, i32 1
  %66 = load float, ptr %65, align 4, !tbaa !20
  %67 = load float, ptr %4, align 4, !tbaa !9
  %68 = call float @llvm.fmuladd.f32(float %64, float %66, float %67)
  store float %68, ptr %4, align 4, !tbaa !9
  %69 = getelementptr inbounds %struct.vrBlockSolverData, ptr %0, i32 0, i32 2
  %70 = getelementptr inbounds %struct.vrVec2, ptr %69, i32 0, i32 1
  %71 = load float, ptr %70, align 4, !tbaa !21
  %72 = load float, ptr %4, align 4, !tbaa !9
  %73 = fsub float %71, %72
  %74 = getelementptr inbounds %struct.vrBlockSolverData, ptr %0, i32 0, i32 0
  %75 = getelementptr inbounds %struct.vrVec2, ptr %74, i32 0, i32 1
  %76 = load float, ptr %75, align 4, !tbaa !19
  %77 = fdiv float %73, %76
  store float %77, ptr %4, align 4, !tbaa !9
  %78 = load float, ptr %5, align 4, !tbaa !9
  %79 = load float, ptr %4, align 4, !tbaa !9
  %80 = getelementptr inbounds %struct.vrVec2, ptr %2, i32 0, i32 1
  %81 = load float, ptr %80, align 4, !tbaa !20
  %82 = fsub float %79, %81
  %83 = getelementptr inbounds %struct.vrVec2, ptr %2, i32 0, i32 1
  %84 = load float, ptr %83, align 4, !tbaa !20
  %85 = call float @llvm.fmuladd.f32(float %78, float %82, float %84)
  store float %85, ptr %83, align 4, !tbaa !20
  %86 = getelementptr inbounds %struct.vrVec2, ptr %2, i32 0, i32 1
  %87 = load float, ptr %86, align 4, !tbaa !20
  %88 = getelementptr inbounds %struct.vrBlockSolverData, ptr %0, i32 0, i32 4
  %89 = getelementptr inbounds %struct.vrVec2, ptr %88, i32 0, i32 1
  %90 = load float, ptr %89, align 4, !tbaa !22
  %91 = fcmp olt float %87, %90
  br i1 %91, label %92, label %97

92:                                               ; preds = %61
  %93 = getelementptr inbounds %struct.vrBlockSolverData, ptr %0, i32 0, i32 4
  %94 = getelementptr inbounds %struct.vrVec2, ptr %93, i32 0, i32 1
  %95 = load float, ptr %94, align 4, !tbaa !22
  %96 = getelementptr inbounds %struct.vrVec2, ptr %2, i32 0, i32 1
  store float %95, ptr %96, align 4, !tbaa !20
  br label %97

97:                                               ; preds = %92, %61
  %98 = getelementptr inbounds %struct.vrVec2, ptr %2, i32 0, i32 1
  %99 = load float, ptr %98, align 4, !tbaa !20
  %100 = getelementptr inbounds %struct.vrBlockSolverData, ptr %0, i32 0, i32 5
  %101 = getelementptr inbounds %struct.vrVec2, ptr %100, i32 0, i32 1
  %102 = load float, ptr %101, align 4, !tbaa !23
  %103 = fcmp ogt float %99, %102
  br i1 %103, label %104, label %109

104:                                              ; preds = %97
  %105 = getelementptr inbounds %struct.vrBlockSolverData, ptr %0, i32 0, i32 5
  %106 = getelementptr inbounds %struct.vrVec2, ptr %105, i32 0, i32 1
  %107 = load float, ptr %106, align 4, !tbaa !23
  %108 = getelementptr inbounds %struct.vrVec2, ptr %2, i32 0, i32 1
  store float %107, ptr %108, align 4, !tbaa !20
  br label %109

109:                                              ; preds = %104, %97
  br label %110

110:                                              ; preds = %109
  %111 = load i32, ptr %6, align 4, !tbaa !5
  %112 = add nsw i32 %111, 1
  store i32 %112, ptr %6, align 4, !tbaa !5
  br label %8, !llvm.loop !24

113:                                              ; preds = %12
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  %114 = load <2 x float>, ptr %2, align 4
  ret <2 x float> %114
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"float", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"vrBlockSolverData", !13, i64 0, !14, i64 8, !13, i64 24, !13, i64 32, !13, i64 40, !13, i64 48}
!13 = !{!"vrVec2", !10, i64 0, !10, i64 4}
!14 = !{!"vrMat2", !13, i64 0, !13, i64 8}
!15 = !{!13, !10, i64 0}
!16 = !{!12, !10, i64 24}
!17 = !{!12, !10, i64 40}
!18 = !{!12, !10, i64 48}
!19 = !{!12, !10, i64 4}
!20 = !{!13, !10, i64 4}
!21 = !{!12, !10, i64 28}
!22 = !{!12, !10, i64 44}
!23 = !{!12, !10, i64 52}
!24 = distinct !{!24, !25}
!25 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.vrBlockSolverData = type { %struct.vrVec2, %struct.vrMat2, %struct.vrVec2, %struct.vrVec2, %struct.vrVec2, %struct.vrVec2 }
%struct.vrMat2 = type { %struct.vrVec2, %struct.vrVec2 }
%struct.vrVec2 = type { float, float }

declare <2 x float> @vrVect(float noundef, float noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #1

; Function Attrs: nounwind uwtable
define dso_local <2 x float> @vrManifoldGuassSeidel(ptr nocapture noundef readonly byval(%struct.vrBlockSolverData) align 8 %0) local_unnamed_addr #2 {
  %2 = tail call <2 x float> @vrVect(float noundef 0.000000e+00, float noundef 0.000000e+00) #3
  %3 = load float, ptr %0, align 8, !tbaa !5
  %4 = getelementptr inbounds i8, ptr %0, i64 24
  %5 = load float, ptr %4, align 8, !tbaa !12
  %6 = getelementptr inbounds i8, ptr %0, i64 40
  %7 = load float, ptr %6, align 8, !tbaa !13
  %8 = getelementptr inbounds i8, ptr %0, i64 48
  %9 = load float, ptr %8, align 8, !tbaa !14
  %10 = getelementptr inbounds i8, ptr %0, i64 4
  %11 = load float, ptr %10, align 4, !tbaa !15
  %12 = getelementptr inbounds i8, ptr %0, i64 28
  %13 = load float, ptr %12, align 4, !tbaa !16
  %14 = getelementptr inbounds i8, ptr %0, i64 44
  %15 = load float, ptr %14, align 4, !tbaa !17
  %16 = getelementptr inbounds i8, ptr %0, i64 52
  %17 = load float, ptr %16, align 4, !tbaa !18
  br label %19

18:                                               ; preds = %19
  ret <2 x float> %.sroa.0.4

19:                                               ; preds = %1, %19
  %.042 = phi i32 [ 0, %1 ], [ %34, %19 ]
  %.sroa.0.041 = phi <2 x float> [ %2, %1 ], [ %.sroa.0.4, %19 ]
  %.sroa.0.0.vec.extract = extractelement <2 x float> %.sroa.0.041, i64 0
  %20 = tail call float @llvm.fmuladd.f32(float %3, float %.sroa.0.0.vec.extract, float 0.000000e+00)
  %21 = fsub float %5, %20
  %22 = fdiv float %21, %3
  %23 = fsub float %22, %.sroa.0.0.vec.extract
  %24 = tail call float @llvm.fmuladd.f32(float %23, float 0x3FE8F5C280000000, float %.sroa.0.0.vec.extract)
  %.sroa.0.0.vec.insert = insertelement <2 x float> %.sroa.0.041, float %24, i64 0
  %25 = fcmp olt float %24, %7
  %.sroa.0.0.vec.insert19 = insertelement <2 x float> %.sroa.0.0.vec.insert, float %7, i64 0
  %.sroa.0.1 = select i1 %25, <2 x float> %.sroa.0.0.vec.insert19, <2 x float> %.sroa.0.0.vec.insert
  %.sroa.0.0.vec.extract21 = extractelement <2 x float> %.sroa.0.1, i64 0
  %26 = fcmp ogt float %.sroa.0.0.vec.extract21, %9
  %.sroa.0.0.vec.insert23 = insertelement <2 x float> %.sroa.0.1, float %9, i64 0
  %.sroa.0.2 = select i1 %26, <2 x float> %.sroa.0.0.vec.insert23, <2 x float> %.sroa.0.1
  %.sroa.0.4.vec.extract = extractelement <2 x float> %.sroa.0.2, i64 1
  %27 = tail call float @llvm.fmuladd.f32(float %11, float %.sroa.0.4.vec.extract, float 0.000000e+00)
  %28 = fsub float %13, %27
  %29 = fdiv float %28, %11
  %30 = fsub float %29, %.sroa.0.4.vec.extract
  %31 = tail call float @llvm.fmuladd.f32(float %30, float 0x3FE8F5C280000000, float %.sroa.0.4.vec.extract)
  %.sroa.0.4.vec.insert = insertelement <2 x float> %.sroa.0.2, float %31, i64 1
  %32 = fcmp olt float %31, %15
  %.sroa.0.4.vec.insert32 = insertelement <2 x float> %.sroa.0.4.vec.insert, float %15, i64 1
  %.sroa.0.3 = select i1 %32, <2 x float> %.sroa.0.4.vec.insert32, <2 x float> %.sroa.0.4.vec.insert
  %.sroa.0.4.vec.extract34 = extractelement <2 x float> %.sroa.0.3, i64 1
  %33 = fcmp ogt float %.sroa.0.4.vec.extract34, %17
  %.sroa.0.4.vec.insert36 = insertelement <2 x float> %.sroa.0.3, float %17, i64 1
  %.sroa.0.4 = select i1 %33, <2 x float> %.sroa.0.4.vec.insert36, <2 x float> %.sroa.0.3
  %34 = add nuw nsw i32 %.042, 1
  %exitcond.not = icmp eq i32 %34, 100
  br i1 %exitcond.not, label %18, label %19, !llvm.loop !19
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"vrBlockSolverData", !7, i64 0, !11, i64 8, !7, i64 24, !7, i64 32, !7, i64 40, !7, i64 48}
!7 = !{!"vrVec2", !8, i64 0, !8, i64 4}
!8 = !{!"float", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"vrMat2", !7, i64 0, !7, i64 8}
!12 = !{!6, !8, i64 24}
!13 = !{!6, !8, i64 40}
!14 = !{!6, !8, i64 48}
!15 = !{!6, !8, i64 4}
!16 = !{!6, !8, i64 28}
!17 = !{!6, !8, i64 44}
!18 = !{!6, !8, i64 52}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LICMPass,LoopRotatePass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass