; LLVM IR from fritzsedlazeck/SURVIVOR :: src/simulator/test_cov.ll (Z7est_coviiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<SV_sim, std::allocator<SV_sim>>::_Vector_impl" }
%"struct.std::_Vector_base<SV_sim, std::allocator<SV_sim>>::_Vector_impl" = type { %"struct.std::_Vector_base<SV_sim, std::allocator<SV_sim>>::_Vector_impl_data" }
%"struct.std::_Vector_base<SV_sim, std::allocator<SV_sim>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.SV_sim = type { i32, i32 }

@_ZSt4cout = external global %"class.std::basic_ostream", align 8
@.str = external hidden unnamed_addr constant [2 x i8], align 1

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z10get_SV_posii(ptr dead_on_unwind noalias writable sret(%"class.std::vector") align 8, i32 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI6SV_simSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: nounwind
declare i32 @rand() #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt6vectorI6SV_simSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorI6SV_simSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z7est_coviiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #0 personality ptr @__gxx_personality_v0 {
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca %"class.std::vector", align 8
  %16 = alloca i64, align 8
  %17 = alloca i64, align 8
  %18 = alloca i64, align 8
  %19 = alloca i32, align 4
  %20 = alloca i64, align 8
  %21 = alloca ptr, align 8
  %22 = alloca i32, align 4
  store i32 %0, ptr %6, align 4, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !5
  store i32 %4, ptr %10, align 4, !tbaa !5
  %23 = call i64 @time(ptr noundef null) #6
  %24 = trunc i64 %23 to i32
  call void @srand(i32 noundef %24) #6
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #6
  store i64 300000000, ptr %11, align 8, !tbaa !9
  %25 = load i32, ptr %10, align 4, !tbaa !5
  %26 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i32 noundef %25)
  %27 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) %26, ptr noundef @.str)
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #6
  store i64 0, ptr %12, align 8, !tbaa !9
  br label %28

28:                                               ; preds = %115, %5
  %29 = load i64, ptr %12, align 8, !tbaa !9
  %30 = icmp ult i64 %29, 20
  br i1 %30, label %32, label %31

31:                                               ; preds = %28
  store i32 2, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #6
  br label %122

32:                                               ; preds = %28
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #6
  store i32 0, ptr %14, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 24, ptr %15) #6
  %33 = load i32, ptr %7, align 4, !tbaa !5
  %34 = load i64, ptr %11, align 8, !tbaa !9
  %35 = trunc i64 %34 to i32
  call void @_Z10get_SV_posii(ptr dead_on_unwind writable sret(%"class.std::vector") align 8 %15, i32 noundef %33, i32 noundef %35)
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #6
  %36 = load i64, ptr %11, align 8, !tbaa !9
  %37 = load i32, ptr %6, align 4, !tbaa !5
  %38 = sext i32 %37 to i64
  %39 = sdiv i64 %36, %38
  %40 = load i32, ptr %10, align 4, !tbaa !5
  %41 = sext i32 %40 to i64
  %42 = mul nsw i64 %39, %41
  store i64 %42, ptr %16, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #6
  store i64 0, ptr %17, align 8, !tbaa !9
  br label %43

43:                                               ; preds = %106, %32
  %44 = load i64, ptr %17, align 8, !tbaa !9
  %45 = load i64, ptr %16, align 8, !tbaa !9
  %46 = icmp slt i64 %44, %45
  br i1 %46, label %48, label %47

47:                                               ; preds = %43
  store i32 5, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #6
  br label %109

48:                                               ; preds = %43
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #6
  %49 = call i32 @rand() #6
  %50 = sext i32 %49 to i64
  %51 = load i64, ptr %11, align 8, !tbaa !9
  %52 = srem i64 %50, %51
  store i64 %52, ptr %18, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #6
  %53 = load i32, ptr %6, align 4, !tbaa !5
  store i32 %53, ptr %19, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %20) #6
  store i64 0, ptr %20, align 8, !tbaa !9
  br label %54

54:                                               ; preds = %102, %48
  %55 = load i64, ptr %20, align 8, !tbaa !9
  %56 = call noundef i64 @_ZNKSt6vectorI6SV_simSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %15) #6
  %57 = icmp ult i64 %55, %56
  br i1 %57, label %59, label %58

58:                                               ; preds = %54
  store i32 8, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #6
  br label %105

59:                                               ; preds = %54
  %60 = load i64, ptr %18, align 8, !tbaa !9
  %61 = load i32, ptr %8, align 4, !tbaa !5
  %62 = sext i32 %61 to i64
  %63 = add nsw i64 %60, %62
  %64 = load i64, ptr %20, align 8, !tbaa !9
  %65 = call noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt6vectorI6SV_simSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %15, i64 noundef %64) #6
  %66 = getelementptr inbounds %struct.SV_sim, ptr %65, i32 0, i32 0
  %67 = load i32, ptr %66, align 4, !tbaa !11
  %68 = sext i32 %67 to i64
  %69 = icmp slt i64 %63, %68
  br i1 %69, label %70, label %101

70:                                               ; preds = %59
  %71 = load i64, ptr %18, align 8, !tbaa !9
  %72 = load i32, ptr %19, align 4, !tbaa !5
  %73 = sext i32 %72 to i64
  %74 = add nsw i64 %71, %73
  %75 = load i32, ptr %8, align 4, !tbaa !5
  %76 = sext i32 %75 to i64
  %77 = sub nsw i64 %74, %76
  %78 = load i64, ptr %20, align 8, !tbaa !9
  %79 = call noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt6vectorI6SV_simSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %15, i64 noundef %78) #6
  %80 = getelementptr inbounds %struct.SV_sim, ptr %79, i32 0, i32 0
  %81 = load i32, ptr %80, align 4, !tbaa !11
  %82 = sext i32 %81 to i64
  %83 = icmp sgt i64 %77, %82
  br i1 %83, label %84, label %101

84:                                               ; preds = %70
  %85 = load i64, ptr %20, align 8, !tbaa !9
  %86 = call noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt6vectorI6SV_simSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %15, i64 noundef %85) #6
  %87 = getelementptr inbounds %struct.SV_sim, ptr %86, i32 0, i32 1
  %88 = load i32, ptr %87, align 4, !tbaa !13
  %89 = add nsw i32 %88, 1
  store i32 %89, ptr %87, align 4, !tbaa !13
  %90 = load i64, ptr %20, align 8, !tbaa !9
  %91 = call noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt6vectorI6SV_simSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %15, i64 noundef %90) #6
  %92 = getelementptr inbounds %struct.SV_sim, ptr %91, i32 0, i32 1
  %93 = load i32, ptr %92, align 4, !tbaa !13
  %94 = load i32, ptr %9, align 4, !tbaa !5
  %95 = add nsw i32 %94, 1
  %96 = icmp eq i32 %93, %95
  br i1 %96, label %97, label %100

97:                                               ; preds = %84
  %98 = load i32, ptr %14, align 4, !tbaa !5
  %99 = add nsw i32 %98, 1
  store i32 %99, ptr %14, align 4, !tbaa !5
  br label %100

100:                                              ; preds = %97, %84
  br label %101

101:                                              ; preds = %100, %70, %59
  br label %102

102:                                              ; preds = %101
  %103 = load i64, ptr %20, align 8, !tbaa !9
  %104 = add i64 %103, 1
  store i64 %104, ptr %20, align 8, !tbaa !9
  br label %54, !llvm.loop !14

105:                                              ; preds = %58
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #6
  br label %106

106:                                              ; preds = %105
  %107 = load i64, ptr %17, align 8, !tbaa !9
  %108 = add nsw i64 %107, 1
  store i64 %108, ptr %17, align 8, !tbaa !9
  br label %43, !llvm.loop !16

109:                                              ; preds = %47
  %110 = load i32, ptr %14, align 4, !tbaa !5
  %111 = invoke noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i32 noundef %110)
          to label %112 unwind label %118

112:                                              ; preds = %109
  %113 = invoke noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) %111, ptr noundef @.str)
          to label %114 unwind label %118

114:                                              ; preds = %112
  call void @_ZNSt6vectorI6SV_simSaIS0_EE5clearEv(ptr noundef nonnull align 8 dereferenceable(24) %15) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #6
  call void @_ZNSt6vectorI6SV_simSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %15) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr %15) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #6
  br label %115

115:                                              ; preds = %114
  %116 = load i64, ptr %12, align 8, !tbaa !9
  %117 = add i64 %116, 1
  store i64 %117, ptr %12, align 8, !tbaa !9
  br label %28, !llvm.loop !17

118:                                              ; preds = %112, %109
  %119 = landingpad { ptr, i32 }
          cleanup
  %120 = extractvalue { ptr, i32 } %119, 0
  store ptr %120, ptr %21, align 8
  %121 = extractvalue { ptr, i32 } %119, 1
  store i32 %121, ptr %22, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #6
  call void @_ZNSt6vectorI6SV_simSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %15) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr %15) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #6
  br label %124

122:                                              ; preds = %31
  %123 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, ptr noundef @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #6
  ret void

124:                                              ; preds = %118
  %125 = load ptr, ptr %21, align 8
  %126 = load i32, ptr %22, align 4
  %127 = insertvalue { ptr, i32 } poison, ptr %125, 0
  %128 = insertvalue { ptr, i32 } %127, i32 %126, 1
  resume { ptr, i32 } %128
}

; Function Attrs: nounwind
declare void @srand(i32 noundef) #3

; Function Attrs: nounwind
declare i64 @time(ptr noundef) #3

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) #4

declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8), i32 noundef) #5

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorI6SV_simSaIS0_EE5clearEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(8)) #4

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"_ZTS6SV_sim", !6, i64 0, !6, i64 4}
!13 = !{!12, !6, i64 4}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}
!17 = distinct !{!17, !15}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<SV_sim, std::allocator<SV_sim>>::_Vector_impl" }
%"struct.std::_Vector_base<SV_sim, std::allocator<SV_sim>>::_Vector_impl" = type { %"struct.std::_Vector_base<SV_sim, std::allocator<SV_sim>>::_Vector_impl_data" }
%"struct.std::_Vector_base<SV_sim, std::allocator<SV_sim>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@_ZSt4cout = external global %"class.std::basic_ostream", align 8
@.str = external hidden unnamed_addr constant [2 x i8], align 1

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z10get_SV_posii(ptr dead_on_unwind noalias writable sret(%"class.std::vector") align 8, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI6SV_simSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #2 align 2

; Function Attrs: nounwind
declare i32 @rand() local_unnamed_addr #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt6vectorI6SV_simSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorI6SV_simSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z7est_coviiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #0 personality ptr @__gxx_personality_v0 {
  %6 = alloca %"class.std::vector", align 8
  %7 = tail call i64 @time(ptr noundef null) #6
  %8 = trunc i64 %7 to i32
  tail call void @srand(i32 noundef %8) #6
  %9 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i32 noundef %4)
  %10 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) %9, ptr noundef nonnull @.str)
  %11 = sext i32 %0 to i64
  %12 = sext i32 %4 to i64
  %13 = sext i32 %2 to i64
  %14 = sub nsw i64 %11, %13
  %15 = add nsw i32 %3, 1
  br label %18

16:                                               ; preds = %55
  %17 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, ptr noundef nonnull @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  ret void

18:                                               ; preds = %5, %55
  %.040 = phi i64 [ 0, %5 ], [ %56, %55 ]
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %6) #6
  call void @_Z10get_SV_posii(ptr dead_on_unwind nonnull writable sret(%"class.std::vector") align 8 %6, i32 noundef %1, i32 noundef 300000000)
  %19 = sdiv i32 300000000, %0
  %.sext = sext i32 %19 to i64
  %20 = mul nsw i64 %.sext, %12
  %21 = icmp sgt i64 %20, 0
  br i1 %21, label %.lr.ph37, label %._crit_edge38

._crit_edge38:                                    ; preds = %._crit_edge, %18
  %.029.lcssa = phi i32 [ 0, %18 ], [ %.1.lcssa, %._crit_edge ]
  %22 = invoke noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i32 noundef %.029.lcssa)
          to label %53 unwind label %57

.lr.ph37:                                         ; preds = %18, %._crit_edge
  %.02935 = phi i32 [ %.1.lcssa, %._crit_edge ], [ 0, %18 ]
  %.03034 = phi i64 [ %28, %._crit_edge ], [ 0, %18 ]
  %23 = call i32 @rand() #6
  %24 = call noundef i64 @_ZNKSt6vectorI6SV_simSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %6) #6
  %.not = icmp eq i64 %24, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph37
  %25 = srem i32 %23, 300000000
  %.sext31 = sext i32 %25 to i64
  %26 = add nsw i64 %.sext31, %13
  %27 = add nsw i64 %14, %.sext31
  br label %29

._crit_edge:                                      ; preds = %49, %.lr.ph37
  %.1.lcssa = phi i32 [ %.02935, %.lr.ph37 ], [ %.2, %49 ]
  %28 = add nuw nsw i64 %.03034, 1
  %exitcond.not = icmp eq i64 %28, %20
  br i1 %exitcond.not, label %._crit_edge38, label %.lr.ph37, !llvm.loop !5

29:                                               ; preds = %.lr.ph, %49
  %.02833 = phi i64 [ 0, %.lr.ph ], [ %50, %49 ]
  %.132 = phi i32 [ %.02935, %.lr.ph ], [ %.2, %49 ]
  %30 = call noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt6vectorI6SV_simSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %6, i64 noundef %.02833) #6
  %31 = load i32, ptr %30, align 4, !tbaa !7
  %32 = sext i32 %31 to i64
  %33 = icmp slt i64 %26, %32
  br i1 %33, label %34, label %49

34:                                               ; preds = %29
  %35 = call noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt6vectorI6SV_simSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %6, i64 noundef %.02833) #6
  %36 = load i32, ptr %35, align 4, !tbaa !7
  %37 = sext i32 %36 to i64
  %38 = icmp sgt i64 %27, %37
  br i1 %38, label %39, label %49

39:                                               ; preds = %34
  %40 = call noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt6vectorI6SV_simSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %6, i64 noundef %.02833) #6
  %41 = getelementptr inbounds i8, ptr %40, i64 4
  %42 = load i32, ptr %41, align 4, !tbaa !12
  %43 = add nsw i32 %42, 1
  store i32 %43, ptr %41, align 4, !tbaa !12
  %44 = call noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt6vectorI6SV_simSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %6, i64 noundef %.02833) #6
  %45 = getelementptr inbounds i8, ptr %44, i64 4
  %46 = load i32, ptr %45, align 4, !tbaa !12
  %47 = icmp eq i32 %46, %15
  %48 = zext i1 %47 to i32
  %spec.select = add nsw i32 %.132, %48
  br label %49

49:                                               ; preds = %39, %29, %34
  %.2 = phi i32 [ %.132, %34 ], [ %.132, %29 ], [ %spec.select, %39 ]
  %50 = add nuw i64 %.02833, 1
  %51 = call noundef i64 @_ZNKSt6vectorI6SV_simSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %6) #6
  %52 = icmp ult i64 %50, %51
  br i1 %52, label %29, label %._crit_edge, !llvm.loop !13

53:                                               ; preds = %._crit_edge38
  %54 = invoke noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) %22, ptr noundef nonnull @.str)
          to label %55 unwind label %57

55:                                               ; preds = %53
  call void @_ZNSt6vectorI6SV_simSaIS0_EE5clearEv(ptr noundef nonnull align 8 dereferenceable(24) %6) #6
  call void @_ZNSt6vectorI6SV_simSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %6) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %6) #6
  %56 = add nuw nsw i64 %.040, 1
  %exitcond41.not = icmp eq i64 %56, 20
  br i1 %exitcond41.not, label %16, label %18, !llvm.loop !14

57:                                               ; preds = %53, %._crit_edge38
  %58 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt6vectorI6SV_simSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %6) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %6) #6
  resume { ptr, i32 } %58
}

; Function Attrs: nounwind
declare void @srand(i32 noundef) local_unnamed_addr #3

; Function Attrs: nounwind
declare i64 @time(ptr noundef) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) local_unnamed_addr #4

declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8), i32 noundef) local_unnamed_addr #5

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorI6SV_simSaIS0_EE5clearEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(8)) #4

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!8, !9, i64 0}
!8 = !{!"_ZTS6SV_sim", !9, i64 0, !9, i64 4}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C++ TBAA"}
!12 = !{!8, !9, i64 4}
!13 = distinct !{!13, !6}
!14 = distinct !{!14, !6}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass