; LLVM IR from Columbitech/rohc :: src/crtp_profile.ll (ZN4ROHC11CRTPProfile20create_pt_2_seq_bothEjbRSt6vectorIhSaIhEE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.__gnu_cxx::__normal_iterator.16" = type { ptr }
%"class.__gnu_cxx::__normal_iterator" = type { ptr }
%"class.ROHC::CProfile" = type { ptr, ptr, i16, i64, i32, i32, i32, i32, i64, i64, i32, i32, i16, %"class.ROHC::WLSB", i32, i32, i8, i32, i32, i32, %"struct.ROHC::iphdr", i16, i16, %"class.ROHC::WLSB", [11 x i64] }
%"struct.ROHC::iphdr" = type { i8, i8, i16, i16, i16, i8, i8, i16, i32, i32 }
%"class.ROHC::WLSB" = type { %"class.std::vector", i64, i64, i64, i32, i32 }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<ROHC::WLSB<int>::LSB, std::allocator<ROHC::WLSB<int>::LSB>>::_Vector_impl" }
%"struct.std::_Vector_base<ROHC::WLSB<int>::LSB, std::allocator<ROHC::WLSB<int>::LSB>>::_Vector_impl" = type { %"struct.std::_Vector_base<ROHC::WLSB<int>::LSB, std::allocator<ROHC::WLSB<int>::LSB>>::_Vector_impl_data" }
%"struct.std::_Vector_base<ROHC::WLSB<int>::LSB, std::allocator<ROHC::WLSB<int>::LSB>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@.str.1 = external hidden unnamed_addr constant [71 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [105 x i8], align 1
@__PRETTY_FUNCTION__._ZN4ROHC11CRTPProfile20create_pt_2_seq_bothEjbRSt6vectorIhSaIhEE = external hidden unnamed_addr constant [71 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIhSaIhEE3endEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN9__gnu_cxx17__normal_iteratorIPKhSt6vectorIhSaIhEEEC2IPhvEERKNS0_IT_S5_EE(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #2 align 2

declare void @_ZN4ROHC8CProfile19IncreasePacketCountENS_10PacketTypeE(ptr noundef nonnull align 8 dereferenceable(328), i32 noundef) #3

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4ROHC11CRTPProfile20create_pt_2_seq_bothEjbRSt6vectorIhSaIhEE(ptr noundef nonnull align 8 dereferenceable(445) %0, i32 noundef %1, i1 noundef zeroext %2, ptr noundef nonnull align 8 dereferenceable(24) %3) #4 align 2 {
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i8, align 1
  %8 = alloca ptr, align 8
  %9 = alloca [4 x i8], align 1
  %10 = alloca i8, align 1
  %11 = alloca i8, align 1
  %12 = alloca i8, align 1
  %13 = alloca %"class.__gnu_cxx::__normal_iterator.16", align 8
  %14 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  %15 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  %16 = zext i1 %2 to i8
  store i8 %16, ptr %7, align 1, !tbaa !11
  store ptr %3, ptr %8, align 8, !tbaa !5
  %17 = load ptr, ptr %5, align 8
  call void @_ZN4ROHC8CProfile19IncreasePacketCountENS_10PacketTypeE(ptr noundef nonnull align 8 dereferenceable(328) %17, i32 noundef 9)
  %18 = getelementptr inbounds %"class.ROHC::CProfile", ptr %17, i32 0, i32 15
  %19 = load i32, ptr %18, align 4, !tbaa !13
  %20 = icmp eq i32 0, %19
  br i1 %20, label %25, label %21

21:                                               ; preds = %4
  %22 = getelementptr inbounds %"class.ROHC::CProfile", ptr %17, i32 0, i32 15
  %23 = load i32, ptr %22, align 4, !tbaa !13
  %24 = icmp eq i32 1, %23
  br label %25

25:                                               ; preds = %21, %4
  %26 = phi i1 [ true, %4 ], [ %24, %21 ]
  br i1 %26, label %27, label %28

27:                                               ; preds = %25
  br label %30

28:                                               ; preds = %25
  call void @__assert_fail(ptr noundef @.str.3, ptr noundef @.str.1, i32 noundef 795, ptr noundef @__PRETTY_FUNCTION__._ZN4ROHC11CRTPProfile20create_pt_2_seq_bothEjbRSt6vectorIhSaIhEE) #5
  unreachable

29:                                               ; No predecessors!
  br label %30

30:                                               ; preds = %29, %27
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #6
  call void @llvm.lifetime.start.p0(i64 1, ptr %10) #6
  %31 = getelementptr inbounds %"class.ROHC::CProfile", ptr %17, i32 0, i32 12
  %32 = load i16, ptr %31, align 8, !tbaa !26
  %33 = zext i16 %32 to i32
  %34 = and i32 %33, 127
  %35 = trunc i32 %34 to i8
  store i8 %35, ptr %10, align 1, !tbaa !27
  %36 = load i8, ptr %10, align 1, !tbaa !27
  %37 = zext i8 %36 to i32
  %38 = ashr i32 %37, 4
  %39 = or i32 200, %38
  %40 = trunc i32 %39 to i8
  %41 = getelementptr inbounds [4 x i8], ptr %9, i64 0, i64 0
  store i8 %40, ptr %41, align 1, !tbaa !27
  call void @llvm.lifetime.start.p0(i64 1, ptr %11) #6
  %42 = call noundef zeroext i16 @_ZNK4ROHC8CProfile10IpIdOffsetEv(ptr noundef nonnull align 8 dereferenceable(328) %17)
  %43 = zext i16 %42 to i32
  %44 = and i32 %43, 31
  %45 = trunc i32 %44 to i8
  store i8 %45, ptr %11, align 1, !tbaa !27
  %46 = getelementptr inbounds %"class.ROHC::CProfile", ptr %17, i32 0, i32 12
  %47 = load i16, ptr %46, align 8, !tbaa !26
  %48 = zext i16 %47 to i32
  %49 = shl i32 %48, 4
  %50 = load i8, ptr %11, align 1, !tbaa !27
  %51 = zext i8 %50 to i32
  %52 = ashr i32 %51, 1
  %53 = or i32 %49, %52
  %54 = trunc i32 %53 to i8
  %55 = getelementptr inbounds [4 x i8], ptr %9, i64 0, i64 1
  store i8 %54, ptr %55, align 1, !tbaa !27
  %56 = load i8, ptr %11, align 1, !tbaa !27
  %57 = zext i8 %56 to i32
  %58 = shl i32 %57, 7
  %59 = trunc i32 %58 to i8
  %60 = getelementptr inbounds [4 x i8], ptr %9, i64 0, i64 2
  store i8 %59, ptr %60, align 1, !tbaa !27
  %61 = load i32, ptr %6, align 4, !tbaa !9
  %62 = shl i32 %61, 1
  %63 = trunc i32 %62 to i8
  %64 = getelementptr inbounds [4 x i8], ptr %9, i64 0, i64 3
  store i8 %63, ptr %64, align 1, !tbaa !27
  %65 = load i8, ptr %7, align 1, !tbaa !11, !range !28, !noundef !29
  %66 = trunc i8 %65 to i1
  br i1 %66, label %67, label %73

67:                                               ; preds = %30
  %68 = getelementptr inbounds [4 x i8], ptr %9, i64 0, i64 3
  %69 = load i8, ptr %68, align 1, !tbaa !27
  %70 = zext i8 %69 to i32
  %71 = or i32 %70, 1
  %72 = trunc i32 %71 to i8
  store i8 %72, ptr %68, align 1, !tbaa !27
  br label %73

73:                                               ; preds = %67, %30
  call void @llvm.lifetime.start.p0(i64 1, ptr %12) #6
  %74 = getelementptr inbounds [4 x i8], ptr %9, i64 0, i64 0
  %75 = getelementptr inbounds [4 x i8], ptr %9, i64 0, i64 0
  %76 = getelementptr inbounds i8, ptr %75, i64 4
  %77 = call noundef zeroext i8 @_ZN4ROHC4CRC7EPKhS1_(ptr noundef %74, ptr noundef %76)
  store i8 %77, ptr %12, align 1, !tbaa !27
  %78 = load i8, ptr %12, align 1, !tbaa !27
  %79 = zext i8 %78 to i32
  %80 = getelementptr inbounds [4 x i8], ptr %9, i64 0, i64 2
  %81 = load i8, ptr %80, align 1, !tbaa !27
  %82 = zext i8 %81 to i32
  %83 = or i32 %82, %79
  %84 = trunc i32 %83 to i8
  store i8 %84, ptr %80, align 1, !tbaa !27
  %85 = load ptr, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #6
  %86 = load ptr, ptr %8, align 8, !tbaa !5
  %87 = call ptr @_ZNSt6vectorIhSaIhEE3endEv(ptr noundef nonnull align 8 dereferenceable(24) %86) #6
  %88 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator", ptr %14, i32 0, i32 0
  store ptr %87, ptr %88, align 8
  call void @_ZN9__gnu_cxx17__normal_iteratorIPKhSt6vectorIhSaIhEEEC2IPhvEERKNS0_IT_S5_EE(ptr noundef nonnull align 8 dereferenceable(8) %13, ptr noundef nonnull align 8 dereferenceable(8) %14) #6
  %89 = getelementptr inbounds [4 x i8], ptr %9, i64 0, i64 0
  %90 = getelementptr inbounds [4 x i8], ptr %9, i64 0, i64 0
  %91 = getelementptr inbounds i8, ptr %90, i64 4
  %92 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator.16", ptr %13, i32 0, i32 0
  %93 = load ptr, ptr %92, align 8
  %94 = call ptr @_ZNSt6vectorIhSaIhEE6insertIPhvEEN9__gnu_cxx17__normal_iteratorIS3_S1_EENS5_IPKhS1_EET_SA_(ptr noundef nonnull align 8 dereferenceable(24) %85, ptr %93, ptr noundef %89, ptr noundef %91)
  %95 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator", ptr %15, i32 0, i32 0
  store ptr %94, ptr %95, align 8
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #6
  call void @llvm.lifetime.end.p0(i64 1, ptr %12) #6
  call void @llvm.lifetime.end.p0(i64 1, ptr %11) #6
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #6
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i16 @_ZNK4ROHC8CProfile10IpIdOffsetEv(ptr noundef nonnull align 8 dereferenceable(328)) #2 align 2

declare noundef zeroext i8 @_ZN4ROHC4CRC7EPKhS1_(ptr noundef, ptr noundef) #3

; Function Attrs: mustprogress uwtable
declare dso_local ptr @_ZNSt6vectorIhSaIhEE6insertIPhvEEN9__gnu_cxx17__normal_iteratorIS3_S1_EENS5_IPKhS1_EET_SA_(ptr noundef nonnull align 8 dereferenceable(24), ptr, ptr noundef, ptr noundef) #4 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { noreturn nounwind }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{!14, !23, i64 140}
!14 = !{!"_ZTSN4ROHC8CProfileE", !6, i64 8, !15, i64 16, !16, i64 24, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !16, i64 48, !16, i64 56, !10, i64 64, !10, i64 68, !15, i64 72, !17, i64 80, !22, i64 136, !23, i64 140, !12, i64 144, !24, i64 148, !10, i64 152, !10, i64 156, !25, i64 160, !15, i64 180, !15, i64 182, !17, i64 184, !7, i64 240}
!15 = !{!"short", !7, i64 0}
!16 = !{!"long", !7, i64 0}
!17 = !{!"_ZTSN4ROHC4WLSBIiEE", !18, i64 0, !16, i64 24, !16, i64 32, !16, i64 40, !10, i64 48, !10, i64 52}
!18 = !{!"_ZTSSt6vectorIN4ROHC4WLSBIiE3LSBESaIS3_EE", !19, i64 0}
!19 = !{!"_ZTSSt12_Vector_baseIN4ROHC4WLSBIiE3LSBESaIS3_EE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIN4ROHC4WLSBIiE3LSBESaIS3_EE12_Vector_implE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIN4ROHC4WLSBIiE3LSBESaIS3_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!22 = !{!"_ZTSN4ROHC12Reordering_tE", !7, i64 0}
!23 = !{!"_ZTSN4ROHC15IPIDBehaviour_tE", !7, i64 0}
!24 = !{!"_ZTSN4ROHC8CProfileUt_E", !7, i64 0}
!25 = !{!"_ZTSN4ROHC5iphdrE", !7, i64 0, !7, i64 0, !7, i64 1, !15, i64 2, !15, i64 4, !15, i64 6, !7, i64 8, !7, i64 9, !15, i64 10, !10, i64 12, !10, i64 16}
!26 = !{!14, !15, i64 72}
!27 = !{!7, !7, i64 0}
!28 = !{i8 0, i8 2}
!29 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.__gnu_cxx::__normal_iterator.16" = type { ptr }
%"class.__gnu_cxx::__normal_iterator" = type { ptr }

@.str.1 = external hidden unnamed_addr constant [71 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [105 x i8], align 1
@__PRETTY_FUNCTION__._ZN4ROHC11CRTPProfile20create_pt_2_seq_bothEjbRSt6vectorIhSaIhEE = external hidden unnamed_addr constant [71 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIhSaIhEE3endEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN9__gnu_cxx17__normal_iteratorIPKhSt6vectorIhSaIhEEEC2IPhvEERKNS0_IT_S5_EE(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #2 align 2

declare void @_ZN4ROHC8CProfile19IncreasePacketCountENS_10PacketTypeE(ptr noundef nonnull align 8 dereferenceable(328), i32 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4ROHC11CRTPProfile20create_pt_2_seq_bothEjbRSt6vectorIhSaIhEE(ptr noundef nonnull align 8 dereferenceable(445) %0, i32 noundef %1, i1 noundef zeroext %2, ptr noundef nonnull align 8 dereferenceable(24) %3) local_unnamed_addr #4 align 2 {
  %5 = alloca [4 x i8], align 1
  %6 = alloca %"class.__gnu_cxx::__normal_iterator.16", align 8
  %7 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  tail call void @_ZN4ROHC8CProfile19IncreasePacketCountENS_10PacketTypeE(ptr noundef nonnull align 8 dereferenceable(328) %0, i32 noundef 9)
  %8 = getelementptr inbounds i8, ptr %0, i64 140
  %9 = load i32, ptr %8, align 4, !tbaa !5
  %switch = icmp ult i32 %9, 2
  br i1 %switch, label %.critedge, label %10

10:                                               ; preds = %4
  tail call void @__assert_fail(ptr noundef nonnull @.str.3, ptr noundef nonnull @.str.1, i32 noundef 795, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN4ROHC11CRTPProfile20create_pt_2_seq_bothEjbRSt6vectorIhSaIhEE) #5
  unreachable

.critedge:                                        ; preds = %4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #6
  %11 = getelementptr inbounds i8, ptr %0, i64 72
  %12 = load i16, ptr %11, align 8, !tbaa !23
  %13 = trunc i16 %12 to i8
  %14 = lshr i8 %13, 4
  %15 = or i8 %14, -56
  store i8 %15, ptr %5, align 1, !tbaa !24
  %16 = tail call noundef zeroext i16 @_ZNK4ROHC8CProfile10IpIdOffsetEv(ptr noundef nonnull align 8 dereferenceable(328) %0)
  %17 = load i16, ptr %11, align 8, !tbaa !23
  %18 = shl i16 %17, 4
  %19 = lshr i16 %16, 1
  %20 = and i16 %19, 15
  %21 = or disjoint i16 %18, %20
  %22 = trunc i16 %21 to i8
  %23 = getelementptr inbounds i8, ptr %5, i64 1
  store i8 %22, ptr %23, align 1, !tbaa !24
  %.tr = trunc i16 %16 to i8
  %24 = shl i8 %.tr, 7
  %25 = getelementptr inbounds i8, ptr %5, i64 2
  store i8 %24, ptr %25, align 1, !tbaa !24
  %.tr8 = trunc i32 %1 to i8
  %26 = shl i8 %.tr8, 1
  %27 = zext i1 %2 to i8
  %spec.select = or disjoint i8 %26, %27
  %28 = getelementptr inbounds i8, ptr %5, i64 3
  store i8 %spec.select, ptr %28, align 1, !tbaa !24
  %29 = getelementptr inbounds i8, ptr %5, i64 4
  %30 = call noundef zeroext i8 @_ZN4ROHC4CRC7EPKhS1_(ptr noundef nonnull %5, ptr noundef nonnull %29)
  %31 = load i8, ptr %25, align 1, !tbaa !24
  %32 = or i8 %31, %30
  store i8 %32, ptr %25, align 1, !tbaa !24
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %7) #6
  %33 = call ptr @_ZNSt6vectorIhSaIhEE3endEv(ptr noundef nonnull align 8 dereferenceable(24) %3) #6
  store ptr %33, ptr %7, align 8
  call void @_ZN9__gnu_cxx17__normal_iteratorIPKhSt6vectorIhSaIhEEEC2IPhvEERKNS0_IT_S5_EE(ptr noundef nonnull align 8 dereferenceable(8) %6, ptr noundef nonnull align 8 dereferenceable(8) %7) #6
  %34 = load ptr, ptr %6, align 8
  %35 = call ptr @_ZNSt6vectorIhSaIhEE6insertIPhvEEN9__gnu_cxx17__normal_iteratorIS3_S1_EENS5_IPKhS1_EET_SA_(ptr noundef nonnull align 8 dereferenceable(24) %3, ptr %34, ptr noundef nonnull %5, ptr noundef nonnull %29)
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #6
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i16 @_ZNK4ROHC8CProfile10IpIdOffsetEv(ptr noundef nonnull align 8 dereferenceable(328)) local_unnamed_addr #2 align 2

declare noundef zeroext i8 @_ZN4ROHC4CRC7EPKhS1_(ptr noundef, ptr noundef) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
declare dso_local ptr @_ZNSt6vectorIhSaIhEE6insertIPhvEEN9__gnu_cxx17__normal_iteratorIS3_S1_EENS5_IPKhS1_EET_SA_(ptr noundef nonnull align 8 dereferenceable(24), ptr, ptr noundef, ptr noundef) local_unnamed_addr #4 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { noreturn nounwind }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !19, i64 140}
!6 = !{!"_ZTSN4ROHC8CProfileE", !7, i64 8, !10, i64 16, !11, i64 24, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44, !11, i64 48, !11, i64 56, !12, i64 64, !12, i64 68, !10, i64 72, !13, i64 80, !18, i64 136, !19, i64 140, !20, i64 144, !21, i64 148, !12, i64 152, !12, i64 156, !22, i64 160, !10, i64 180, !10, i64 182, !13, i64 184, !8, i64 240}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"short", !8, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!"int", !8, i64 0}
!13 = !{!"_ZTSN4ROHC4WLSBIiEE", !14, i64 0, !11, i64 24, !11, i64 32, !11, i64 40, !12, i64 48, !12, i64 52}
!14 = !{!"_ZTSSt6vectorIN4ROHC4WLSBIiE3LSBESaIS3_EE", !15, i64 0}
!15 = !{!"_ZTSSt12_Vector_baseIN4ROHC4WLSBIiE3LSBESaIS3_EE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIN4ROHC4WLSBIiE3LSBESaIS3_EE12_Vector_implE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIN4ROHC4WLSBIiE3LSBESaIS3_EE17_Vector_impl_dataE", !7, i64 0, !7, i64 8, !7, i64 16}
!18 = !{!"_ZTSN4ROHC12Reordering_tE", !8, i64 0}
!19 = !{!"_ZTSN4ROHC15IPIDBehaviour_tE", !8, i64 0}
!20 = !{!"bool", !8, i64 0}
!21 = !{!"_ZTSN4ROHC8CProfileUt_E", !8, i64 0}
!22 = !{!"_ZTSN4ROHC5iphdrE", !8, i64 0, !8, i64 0, !8, i64 1, !10, i64 2, !10, i64 4, !10, i64 6, !8, i64 8, !8, i64 9, !10, i64 10, !12, i64 12, !12, i64 16}
!23 = !{!6, !10, i64 72}
!24 = !{!8, !8, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass