; LLVM IR from VastoLorde95/Competitive-Programming :: Codeforces/ZeptoLab 2015/Problem B (B)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }

@n = external dso_local global i32, align 4
@a = external dso_local global [4000 x i32], align 16
@mx = external dso_local global i32, align 4
@cnt = external dso_local global i32, align 4
@l = external dso_local global i32, align 4
@flag = external dso_local global i32, align 4
@s = external dso_local global i32, align 4
@lights = external dso_local global %"class.std::vector", align 8
@_ZSt3cin = external global %"class.std::basic_istream", align 8
@_ZSt4cout = external global %"class.std::basic_ostream", align 8

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z7computeiii(i32 noundef, i32 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #2 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  %13 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) @n)
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #7
  store i32 0, ptr %2, align 4, !tbaa !5
  br label %14

14:                                               ; preds = %35, %0
  %15 = load i32, ptr %2, align 4, !tbaa !5
  %16 = load i32, ptr @n, align 4, !tbaa !5
  %17 = add nsw i32 %16, 1
  %18 = shl i32 1, %17
  %19 = sub nsw i32 %18, 2
  %20 = icmp slt i32 %15, %19
  br i1 %20, label %22, label %21

21:                                               ; preds = %14
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #7
  br label %38

22:                                               ; preds = %14
  %23 = load i32, ptr %2, align 4, !tbaa !5
  %24 = add nsw i32 %23, 2
  %25 = sext i32 %24 to i64
  %26 = getelementptr inbounds [4000 x i32], ptr @a, i64 0, i64 %25
  %27 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %26)
  %28 = load i32, ptr %2, align 4, !tbaa !5
  %29 = add nsw i32 %28, 2
  %30 = sext i32 %29 to i64
  %31 = getelementptr inbounds [4000 x i32], ptr @a, i64 0, i64 %30
  %32 = load i32, ptr %31, align 4, !tbaa !5
  %33 = load i32, ptr @l, align 4, !tbaa !5
  %34 = add nsw i32 %33, %32
  store i32 %34, ptr @l, align 4, !tbaa !5
  br label %35

35:                                               ; preds = %22
  %36 = load i32, ptr %2, align 4, !tbaa !5
  %37 = add nsw i32 %36, 1
  store i32 %37, ptr %2, align 4, !tbaa !5
  br label %14, !llvm.loop !9

38:                                               ; preds = %21
  call void @_Z7computeiii(i32 noundef 2, i32 noundef 1, i32 noundef 0)
  call void @_Z7computeiii(i32 noundef 3, i32 noundef 1, i32 noundef 0)
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #7
  store i32 0, ptr %3, align 4, !tbaa !5
  br label %39

39:                                               ; preds = %62, %38
  %40 = load i32, ptr %3, align 4, !tbaa !5
  %41 = sext i32 %40 to i64
  %42 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @lights) #7
  %43 = icmp ult i64 %41, %42
  br i1 %43, label %45, label %44

44:                                               ; preds = %39
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #7
  br label %65

45:                                               ; preds = %39
  %46 = load i32, ptr %3, align 4, !tbaa !5
  %47 = sext i32 %46 to i64
  %48 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lights, i64 noundef %47) #7
  %49 = load i32, ptr %48, align 4, !tbaa !5
  %50 = load i32, ptr @mx, align 4, !tbaa !5
  %51 = icmp sgt i32 %49, %50
  br i1 %51, label %52, label %61

52:                                               ; preds = %45
  %53 = load i32, ptr %3, align 4, !tbaa !5
  %54 = sext i32 %53 to i64
  %55 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lights, i64 noundef %54) #7
  %56 = load i32, ptr %55, align 4, !tbaa !5
  store i32 %56, ptr @mx, align 4, !tbaa !5
  %57 = load i32, ptr @n, align 4, !tbaa !5
  %58 = shl i32 1, %57
  %59 = load i32, ptr %3, align 4, !tbaa !5
  %60 = add nsw i32 %58, %59
  store i32 %60, ptr @flag, align 4, !tbaa !5
  br label %61

61:                                               ; preds = %52, %45
  br label %62

62:                                               ; preds = %61
  %63 = load i32, ptr %3, align 4, !tbaa !5
  %64 = add nsw i32 %63, 1
  store i32 %64, ptr %3, align 4, !tbaa !5
  br label %39, !llvm.loop !11

65:                                               ; preds = %44
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #7
  store i32 2, ptr %4, align 4, !tbaa !5
  %66 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @lights) #7
  %67 = trunc i64 %66 to i32
  store i32 %67, ptr @s, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #7
  store i32 2, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #7
  store i32 2, ptr %6, align 4, !tbaa !5
  br label %68

68:                                               ; preds = %146, %65
  %69 = load i32, ptr %6, align 4, !tbaa !5
  %70 = load i32, ptr @n, align 4, !tbaa !5
  %71 = shl i32 1, %70
  %72 = icmp sle i32 %69, %71
  br i1 %72, label %74, label %73

73:                                               ; preds = %68
  store i32 8, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #7
  br label %149

74:                                               ; preds = %68
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #7
  store i32 0, ptr %8, align 4, !tbaa !5
  br label %75

75:                                               ; preds = %144, %74
  br label %76

76:                                               ; preds = %75
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #7
  store i32 0, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #7
  %77 = load i32, ptr %8, align 4, !tbaa !5
  store i32 %77, ptr %10, align 4, !tbaa !5
  br label %78

78:                                               ; preds = %93, %76
  %79 = load i32, ptr %10, align 4, !tbaa !5
  %80 = load i32, ptr %8, align 4, !tbaa !5
  %81 = load i32, ptr @s, align 4, !tbaa !5
  %82 = load i32, ptr %6, align 4, !tbaa !5
  %83 = sdiv i32 %81, %82
  %84 = add nsw i32 %80, %83
  %85 = icmp slt i32 %79, %84
  br i1 %85, label %87, label %86

86:                                               ; preds = %78
  store i32 13, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #7
  br label %96

87:                                               ; preds = %78
  %88 = load i32, ptr %10, align 4, !tbaa !5
  %89 = sext i32 %88 to i64
  %90 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lights, i64 noundef %89) #7
  %91 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %9, ptr noundef nonnull align 4 dereferenceable(4) %90)
  %92 = load i32, ptr %91, align 4, !tbaa !5
  store i32 %92, ptr %9, align 4, !tbaa !5
  br label %93

93:                                               ; preds = %87
  %94 = load i32, ptr %10, align 4, !tbaa !5
  %95 = add nsw i32 %94, 1
  store i32 %95, ptr %10, align 4, !tbaa !5
  br label %78, !llvm.loop !12

96:                                               ; preds = %86
  %97 = load i32, ptr @mx, align 4, !tbaa !5
  %98 = load i32, ptr %9, align 4, !tbaa !5
  %99 = sub nsw i32 %97, %98
  %100 = load i32, ptr %5, align 4, !tbaa !5
  %101 = sext i32 %100 to i64
  %102 = getelementptr inbounds [4000 x i32], ptr @a, i64 0, i64 %101
  %103 = load i32, ptr %102, align 4, !tbaa !5
  %104 = add nsw i32 %103, %99
  store i32 %104, ptr %102, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #7
  %105 = load i32, ptr %8, align 4, !tbaa !5
  store i32 %105, ptr %11, align 4, !tbaa !5
  br label %106

106:                                              ; preds = %124, %96
  %107 = load i32, ptr %11, align 4, !tbaa !5
  %108 = load i32, ptr %8, align 4, !tbaa !5
  %109 = load i32, ptr @s, align 4, !tbaa !5
  %110 = load i32, ptr %6, align 4, !tbaa !5
  %111 = sdiv i32 %109, %110
  %112 = add nsw i32 %108, %111
  %113 = icmp slt i32 %107, %112
  br i1 %113, label %115, label %114

114:                                              ; preds = %106
  store i32 16, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #7
  br label %127

115:                                              ; preds = %106
  %116 = load i32, ptr @mx, align 4, !tbaa !5
  %117 = load i32, ptr %9, align 4, !tbaa !5
  %118 = sub nsw i32 %116, %117
  %119 = load i32, ptr %11, align 4, !tbaa !5
  %120 = sext i32 %119 to i64
  %121 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lights, i64 noundef %120) #7
  %122 = load i32, ptr %121, align 4, !tbaa !5
  %123 = add nsw i32 %122, %118
  store i32 %123, ptr %121, align 4, !tbaa !5
  br label %124

124:                                              ; preds = %115
  %125 = load i32, ptr %11, align 4, !tbaa !5
  %126 = add nsw i32 %125, 1
  store i32 %126, ptr %11, align 4, !tbaa !5
  br label %106, !llvm.loop !13

127:                                              ; preds = %114
  %128 = load i32, ptr @s, align 4, !tbaa !5
  %129 = load i32, ptr %6, align 4, !tbaa !5
  %130 = sdiv i32 %128, %129
  %131 = load i32, ptr %8, align 4, !tbaa !5
  %132 = add nsw i32 %131, %130
  store i32 %132, ptr %8, align 4, !tbaa !5
  %133 = load i32, ptr %5, align 4, !tbaa !5
  %134 = add nsw i32 %133, 1
  store i32 %134, ptr %5, align 4, !tbaa !5
  %135 = load i32, ptr %5, align 4, !tbaa !5
  %136 = load i32, ptr %5, align 4, !tbaa !5
  %137 = sub nsw i32 %136, 1
  %138 = and i32 %135, %137
  %139 = icmp eq i32 %138, 0
  br i1 %139, label %140, label %141

140:                                              ; preds = %127
  store i32 12, ptr %7, align 4
  br label %142

141:                                              ; preds = %127
  store i32 0, ptr %7, align 4
  br label %142

142:                                              ; preds = %141, %140
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #7
  %143 = load i32, ptr %7, align 4
  switch i32 %143, label %176 [
    i32 0, label %144
    i32 12, label %145
  ]

144:                                              ; preds = %142
  br label %75, !llvm.loop !14

145:                                              ; preds = %142
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #7
  br label %146

146:                                              ; preds = %145
  %147 = load i32, ptr %6, align 4, !tbaa !5
  %148 = shl i32 %147, 1
  store i32 %148, ptr %6, align 4, !tbaa !5
  br label %68, !llvm.loop !15

149:                                              ; preds = %73
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #7
  store i32 0, ptr %12, align 4, !tbaa !5
  br label %150

150:                                              ; preds = %166, %149
  %151 = load i32, ptr %12, align 4, !tbaa !5
  %152 = load i32, ptr @n, align 4, !tbaa !5
  %153 = add nsw i32 %152, 1
  %154 = shl i32 1, %153
  %155 = sub nsw i32 %154, 2
  %156 = icmp slt i32 %151, %155
  br i1 %156, label %158, label %157

157:                                              ; preds = %150
  store i32 19, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #7
  br label %169

158:                                              ; preds = %150
  %159 = load i32, ptr %12, align 4, !tbaa !5
  %160 = add nsw i32 %159, 2
  %161 = sext i32 %160 to i64
  %162 = getelementptr inbounds [4000 x i32], ptr @a, i64 0, i64 %161
  %163 = load i32, ptr %162, align 4, !tbaa !5
  %164 = load i32, ptr @cnt, align 4, !tbaa !5
  %165 = add nsw i32 %164, %163
  store i32 %165, ptr @cnt, align 4, !tbaa !5
  br label %166

166:                                              ; preds = %158
  %167 = load i32, ptr %12, align 4, !tbaa !5
  %168 = add nsw i32 %167, 1
  store i32 %168, ptr %12, align 4, !tbaa !5
  br label %150, !llvm.loop !16

169:                                              ; preds = %157
  %170 = load i32, ptr @cnt, align 4, !tbaa !5
  %171 = load i32, ptr @l, align 4, !tbaa !5
  %172 = sub nsw i32 %170, %171
  %173 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i32 noundef %172)
  %174 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %173, ptr noundef @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  store i32 0, ptr %1, align 4
  store i32 1, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #7
  %175 = load i32, ptr %1, align 4
  ret i32 %175

176:                                              ; preds = %142
  unreachable
}

declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(4)) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #4 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #5

declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8), i32 noundef) #3

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(8)) #6

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10}
!16 = distinct !{!16, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }

@n = external dso_local global i32, align 4
@a = external dso_local global [4000 x i32], align 16
@mx = external dso_local local_unnamed_addr global i32, align 4
@cnt = external dso_local local_unnamed_addr global i32, align 4
@l = external dso_local local_unnamed_addr global i32, align 4
@flag = external dso_local local_unnamed_addr global i32, align 4
@s = external dso_local local_unnamed_addr global i32, align 4
@lights = external dso_local global %"class.std::vector", align 8
@_ZSt3cin = external global %"class.std::basic_istream", align 8
@_ZSt4cout = external global %"class.std::basic_ostream", align 8

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z7computeiii(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() local_unnamed_addr #2 {
  %1 = alloca i32, align 4
  %2 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) @n)
  %3 = load i32, ptr @n, align 4, !tbaa !5
  %4 = add nsw i32 %3, 1
  %5 = shl nuw i32 1, %4
  %6 = icmp sgt i32 %5, 2
  br i1 %6, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %0
  tail call void @_Z7computeiii(i32 noundef 2, i32 noundef 1, i32 noundef 0)
  tail call void @_Z7computeiii(i32 noundef 3, i32 noundef 1, i32 noundef 0)
  %7 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @lights) #8
  %.not69 = icmp eq i64 %7, 0
  br i1 %.not69, label %._crit_edge52, label %.lr.ph51

.lr.ph:                                           ; preds = %0, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %0 ]
  %8 = add nuw nsw i64 %indvars.iv, 2
  %9 = getelementptr inbounds [4000 x i32], ptr @a, i64 0, i64 %8
  %10 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %9)
  %11 = load i32, ptr %9, align 4, !tbaa !5
  %12 = load i32, ptr @l, align 4, !tbaa !5
  %13 = add nsw i32 %12, %11
  store i32 %13, ptr @l, align 4, !tbaa !5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %14 = load i32, ptr @n, align 4, !tbaa !5
  %15 = add nsw i32 %14, 1
  %16 = shl nuw i32 1, %15
  %17 = add nsw i32 %16, -2
  %18 = sext i32 %17 to i64
  %19 = icmp slt i64 %indvars.iv.next, %18
  br i1 %19, label %.lr.ph, label %._crit_edge, !llvm.loop !9

._crit_edge52:                                    ; preds = %35, %._crit_edge
  %20 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @lights) #8
  %21 = trunc i64 %20 to i32
  store i32 %21, ptr @s, align 4, !tbaa !5
  %22 = load i32, ptr @n, align 4, !tbaa !5
  %23 = shl nuw i32 1, %22
  %.not61 = icmp slt i32 %23, 2
  br i1 %.not61, label %.preheader, label %.preheader45

.lr.ph51:                                         ; preds = %._crit_edge, %35
  %indvars.iv75 = phi i64 [ %indvars.iv.next76, %35 ], [ 0, %._crit_edge ]
  %24 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lights, i64 noundef %indvars.iv75) #8
  %25 = load i32, ptr %24, align 4, !tbaa !5
  %26 = load i32, ptr @mx, align 4, !tbaa !5
  %27 = icmp sgt i32 %25, %26
  br i1 %27, label %28, label %35

28:                                               ; preds = %.lr.ph51
  %29 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lights, i64 noundef %indvars.iv75) #8
  %30 = load i32, ptr %29, align 4, !tbaa !5
  store i32 %30, ptr @mx, align 4, !tbaa !5
  %31 = load i32, ptr @n, align 4, !tbaa !5
  %32 = shl nuw i32 1, %31
  %33 = trunc nuw nsw i64 %indvars.iv75 to i32
  %34 = add nuw nsw i32 %32, %33
  store i32 %34, ptr @flag, align 4, !tbaa !5
  br label %35

35:                                               ; preds = %.lr.ph51, %28
  %indvars.iv.next76 = add nuw nsw i64 %indvars.iv75, 1
  %36 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @lights) #8
  %37 = icmp ugt i64 %36, %indvars.iv.next76
  br i1 %37, label %.lr.ph51, label %._crit_edge52, !llvm.loop !11

.preheader45:                                     ; preds = %._crit_edge52, %91
  %38 = phi i32 [ %76, %91 ], [ %21, %._crit_edge52 ]
  %.03863 = phi i32 [ %92, %91 ], [ 2, %._crit_edge52 ]
  %.03962 = phi i64 [ %indvars.iv.next85, %91 ], [ 2, %._crit_edge52 ]
  %sext = shl i64 %.03962, 32
  %39 = ashr exact i64 %sext, 32
  br label %52

.preheader:                                       ; preds = %91, %._crit_edge52
  %.lcssa47 = phi i32 [ %22, %._crit_edge52 ], [ %93, %91 ]
  %40 = add nsw i32 %.lcssa47, 1
  %41 = shl nuw i32 1, %40
  %cnt.promoted = load i32, ptr @cnt, align 4, !tbaa !5
  %42 = icmp sgt i32 %41, 2
  br i1 %42, label %.lr.ph66.preheader, label %95

.lr.ph66.preheader:                               ; preds = %.preheader
  %43 = add nsw i32 %41, -2
  %wide.trip.count = zext nneg i32 %43 to i64
  %min.iters.check = icmp ult i32 %43, 8
  br i1 %min.iters.check, label %.lr.ph66.preheader114, label %vector.ph

.lr.ph66.preheader114:                            ; preds = %middle.block, %.lr.ph66.preheader
  %indvars.iv87.ph = phi i64 [ 0, %.lr.ph66.preheader ], [ %n.vec, %middle.block ]
  %.ph = phi i32 [ %cnt.promoted, %.lr.ph66.preheader ], [ %51, %middle.block ]
  br label %.lr.ph66

vector.ph:                                        ; preds = %.lr.ph66.preheader
  %n.vec = and i64 %wide.trip.count, 2147483640
  %44 = insertelement <4 x i32> <i32 poison, i32 0, i32 0, i32 0>, i32 %cnt.promoted, i64 0
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %vec.phi = phi <4 x i32> [ %44, %vector.ph ], [ %48, %vector.body ]
  %vec.phi112 = phi <4 x i32> [ zeroinitializer, %vector.ph ], [ %49, %vector.body ]
  %45 = or disjoint i64 %index, 2
  %46 = getelementptr inbounds [4000 x i32], ptr @a, i64 0, i64 %45
  %47 = getelementptr inbounds i8, ptr %46, i64 16
  %wide.load = load <4 x i32>, ptr %46, align 8, !tbaa !5
  %wide.load113 = load <4 x i32>, ptr %47, align 8, !tbaa !5
  %48 = add <4 x i32> %vec.phi, %wide.load
  %49 = add <4 x i32> %vec.phi112, %wide.load113
  %index.next = add nuw i64 %index, 8
  %50 = icmp eq i64 %index.next, %n.vec
  br i1 %50, label %middle.block, label %vector.body, !llvm.loop !12

middle.block:                                     ; preds = %vector.body
  %bin.rdx = add <4 x i32> %49, %48
  %51 = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %bin.rdx)
  %cmp.n = icmp eq i64 %n.vec, %wide.trip.count
  br i1 %cmp.n, label %._crit_edge67, label %.lr.ph66.preheader114

52:                                               ; preds = %.preheader45, %._crit_edge60
  %53 = phi i32 [ %38, %.preheader45 ], [ %76, %._crit_edge60 ]
  %indvars.iv84 = phi i64 [ %39, %.preheader45 ], [ %indvars.iv.next85, %._crit_edge60 ]
  %.036 = phi i32 [ 0, %.preheader45 ], [ %.lcssa, %._crit_edge60 ]
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #8
  store i32 0, ptr %1, align 4, !tbaa !5
  %54 = sdiv i32 %53, %.03863
  %55 = icmp sgt i32 %54, 0
  br i1 %55, label %.lr.ph55.preheader, label %._crit_edge56.thread

._crit_edge56.thread:                             ; preds = %52
  %.pre = add nsw i32 %54, %.036
  %56 = load i32, ptr @mx, align 4, !tbaa !5
  %57 = getelementptr inbounds [4000 x i32], ptr @a, i64 0, i64 %indvars.iv84
  %58 = load i32, ptr %57, align 4, !tbaa !5
  %59 = add nsw i32 %56, %58
  store i32 %59, ptr %57, align 4, !tbaa !5
  br label %._crit_edge60

.lr.ph55.preheader:                               ; preds = %52
  %60 = sext i32 %.036 to i64
  br label %.lr.ph55

._crit_edge56:                                    ; preds = %.lr.ph55
  %61 = load i32, ptr @mx, align 4, !tbaa !5
  %62 = sub i32 %61, %70
  %63 = getelementptr inbounds [4000 x i32], ptr @a, i64 0, i64 %indvars.iv84
  %64 = load i32, ptr %63, align 4, !tbaa !5
  %65 = add nsw i32 %62, %64
  store i32 %65, ptr %63, align 4, !tbaa !5
  %66 = icmp sgt i32 %72, 0
  br i1 %66, label %.lr.ph59.preheader, label %._crit_edge60

.lr.ph59.preheader:                               ; preds = %._crit_edge56
  %67 = sext i32 %.036 to i64
  br label %.lr.ph59

.lr.ph55:                                         ; preds = %.lr.ph55.preheader, %.lr.ph55
  %indvars.iv78 = phi i64 [ %60, %.lr.ph55.preheader ], [ %indvars.iv.next79, %.lr.ph55 ]
  %68 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lights, i64 noundef %indvars.iv78) #8
  %69 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %1, ptr noundef nonnull align 4 dereferenceable(4) %68)
  %70 = load i32, ptr %69, align 4, !tbaa !5
  store i32 %70, ptr %1, align 4, !tbaa !5
  %indvars.iv.next79 = add nsw i64 %indvars.iv78, 1
  %71 = load i32, ptr @s, align 4, !tbaa !5
  %72 = sdiv i32 %71, %.03863
  %73 = add nsw i32 %72, %.036
  %74 = sext i32 %73 to i64
  %75 = icmp slt i64 %indvars.iv.next79, %74
  br i1 %75, label %.lr.ph55, label %._crit_edge56, !llvm.loop !15

._crit_edge60:                                    ; preds = %.lr.ph59, %._crit_edge56.thread, %._crit_edge56
  %76 = phi i32 [ %71, %._crit_edge56 ], [ %53, %._crit_edge56.thread ], [ %86, %.lr.ph59 ]
  %.lcssa = phi i32 [ %73, %._crit_edge56 ], [ %.pre, %._crit_edge56.thread ], [ %88, %.lr.ph59 ]
  %indvars.iv.next85 = add nsw i64 %indvars.iv84, 1
  %77 = and i64 %indvars.iv.next85, %indvars.iv84
  %78 = and i64 %77, 4294967294
  %79 = icmp eq i64 %78, 0
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #8
  br i1 %79, label %91, label %52

.lr.ph59:                                         ; preds = %.lr.ph59.preheader, %.lr.ph59
  %indvars.iv81 = phi i64 [ %67, %.lr.ph59.preheader ], [ %indvars.iv.next82, %.lr.ph59 ]
  %80 = load i32, ptr @mx, align 4, !tbaa !5
  %81 = load i32, ptr %1, align 4, !tbaa !5
  %82 = sub i32 %80, %81
  %83 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lights, i64 noundef %indvars.iv81) #8
  %84 = load i32, ptr %83, align 4, !tbaa !5
  %85 = add nsw i32 %82, %84
  store i32 %85, ptr %83, align 4, !tbaa !5
  %indvars.iv.next82 = add nsw i64 %indvars.iv81, 1
  %86 = load i32, ptr @s, align 4, !tbaa !5
  %87 = sdiv i32 %86, %.03863
  %88 = add nsw i32 %87, %.036
  %89 = sext i32 %88 to i64
  %90 = icmp slt i64 %indvars.iv.next82, %89
  br i1 %90, label %.lr.ph59, label %._crit_edge60, !llvm.loop !16

91:                                               ; preds = %._crit_edge60
  %92 = shl i32 %.03863, 1
  %93 = load i32, ptr @n, align 4, !tbaa !5
  %94 = shl nuw i32 1, %93
  %.not = icmp sgt i32 %92, %94
  br i1 %.not, label %.preheader, label %.preheader45, !llvm.loop !17

._crit_edge67:                                    ; preds = %.lr.ph66, %middle.block
  %.lcssa103 = phi i32 [ %51, %middle.block ], [ %105, %.lr.ph66 ]
  store i32 %.lcssa103, ptr @cnt, align 4, !tbaa !5
  br label %95

95:                                               ; preds = %._crit_edge67, %.preheader
  %96 = phi i32 [ %.lcssa103, %._crit_edge67 ], [ %cnt.promoted, %.preheader ]
  %97 = load i32, ptr @l, align 4, !tbaa !5
  %98 = sub nsw i32 %96, %97
  %99 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i32 noundef %98)
  %100 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %99, ptr noundef nonnull @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  ret i32 0

.lr.ph66:                                         ; preds = %.lr.ph66.preheader114, %.lr.ph66
  %indvars.iv87 = phi i64 [ %indvars.iv.next88, %.lr.ph66 ], [ %indvars.iv87.ph, %.lr.ph66.preheader114 ]
  %101 = phi i32 [ %105, %.lr.ph66 ], [ %.ph, %.lr.ph66.preheader114 ]
  %102 = add nuw nsw i64 %indvars.iv87, 2
  %103 = getelementptr inbounds [4000 x i32], ptr @a, i64 0, i64 %102
  %104 = load i32, ptr %103, align 4, !tbaa !5
  %105 = add nsw i32 %101, %104
  %indvars.iv.next88 = add nuw nsw i64 %indvars.iv87, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next88, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge67, label %.lr.ph66, !llvm.loop !18
}

declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #4 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #5

declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8), i32 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(8)) #6

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.add.v4i32(<4 x i32>) #7

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #8 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10, !13, !14}
!13 = !{!"llvm.loop.isvectorized", i32 1}
!14 = !{!"llvm.loop.unroll.runtime.disable"}
!15 = distinct !{!15, !10}
!16 = distinct !{!16, !10}
!17 = distinct !{!17, !10}
!18 = distinct !{!18, !10, !14, !13}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass