; LLVM IR from lfarcaro/ARINC653_ARMV7A_AM335X :: Hardware (edma_bb)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @EDMAModuleClkConfig() #0 {
  %1 = load volatile i32, ptr inttoptr (i64 1155530940 to ptr), align 4, !tbaa !5
  %2 = or i32 %1, 2
  store volatile i32 %2, ptr inttoptr (i64 1155530940 to ptr), align 4, !tbaa !5
  br label %3

3:                                                ; preds = %7, %0
  %4 = load volatile i32, ptr inttoptr (i64 1155530940 to ptr), align 4, !tbaa !5
  %5 = and i32 %4, 3
  %6 = icmp ne i32 2, %5
  br i1 %6, label %7, label %8

7:                                                ; preds = %3
  br label %3, !llvm.loop !9

8:                                                ; preds = %3
  %9 = load volatile i32, ptr inttoptr (i64 1155530788 to ptr), align 4, !tbaa !5
  %10 = or i32 %9, 2
  store volatile i32 %10, ptr inttoptr (i64 1155530788 to ptr), align 4, !tbaa !5
  br label %11

11:                                               ; preds = %15, %8
  %12 = load volatile i32, ptr inttoptr (i64 1155530788 to ptr), align 4, !tbaa !5
  %13 = and i32 %12, 3
  %14 = icmp ne i32 2, %13
  br i1 %14, label %15, label %16

15:                                               ; preds = %11
  br label %11, !llvm.loop !11

16:                                               ; preds = %11
  %17 = load volatile i32, ptr inttoptr (i64 1155531004 to ptr), align 4, !tbaa !5
  %18 = or i32 %17, 2
  store volatile i32 %18, ptr inttoptr (i64 1155531004 to ptr), align 4, !tbaa !5
  br label %19

19:                                               ; preds = %23, %16
  %20 = load volatile i32, ptr inttoptr (i64 1155531004 to ptr), align 4, !tbaa !5
  %21 = and i32 %20, 3
  %22 = icmp ne i32 2, %21
  br i1 %22, label %23, label %24

23:                                               ; preds = %19
  br label %19, !llvm.loop !12

24:                                               ; preds = %19
  %25 = load volatile i32, ptr inttoptr (i64 1155531008 to ptr), align 4, !tbaa !5
  %26 = or i32 %25, 2
  store volatile i32 %26, ptr inttoptr (i64 1155531008 to ptr), align 4, !tbaa !5
  br label %27

27:                                               ; preds = %31, %24
  %28 = load volatile i32, ptr inttoptr (i64 1155531008 to ptr), align 4, !tbaa !5
  %29 = and i32 %28, 3
  %30 = icmp ne i32 2, %29
  br i1 %30, label %31, label %32

31:                                               ; preds = %27
  br label %27, !llvm.loop !13

32:                                               ; preds = %27
  store volatile i32 40, ptr inttoptr (i64 1233125392 to ptr), align 4, !tbaa !5
  store volatile i32 40, ptr inttoptr (i64 1234173968 to ptr), align 4, !tbaa !5
  store volatile i32 40, ptr inttoptr (i64 1235222544 to ptr), align 4, !tbaa !5
  br label %33

33:                                               ; preds = %37, %32
  %34 = load volatile i32, ptr inttoptr (i64 1155530940 to ptr), align 4, !tbaa !5
  %35 = and i32 %34, 196608
  %36 = icmp ne i32 0, %35
  br i1 %36, label %37, label %38

37:                                               ; preds = %33
  br label %33, !llvm.loop !14

38:                                               ; preds = %33
  br label %39

39:                                               ; preds = %43, %38
  %40 = load volatile i32, ptr inttoptr (i64 1155530788 to ptr), align 4, !tbaa !5
  %41 = and i32 %40, 196608
  %42 = icmp ne i32 0, %41
  br i1 %42, label %43, label %44

43:                                               ; preds = %39
  br label %39, !llvm.loop !15

44:                                               ; preds = %39
  br label %45

45:                                               ; preds = %49, %44
  %46 = load volatile i32, ptr inttoptr (i64 1155530788 to ptr), align 4, !tbaa !5
  %47 = and i32 %46, 262144
  %48 = icmp ne i32 0, %47
  br i1 %48, label %49, label %50

49:                                               ; preds = %45
  br label %45, !llvm.loop !16

50:                                               ; preds = %45
  br label %51

51:                                               ; preds = %55, %50
  %52 = load volatile i32, ptr inttoptr (i64 1155531004 to ptr), align 4, !tbaa !5
  %53 = and i32 %52, 196608
  %54 = icmp ne i32 0, %53
  br i1 %54, label %55, label %56

55:                                               ; preds = %51
  br label %51, !llvm.loop !17

56:                                               ; preds = %51
  br label %57

57:                                               ; preds = %61, %56
  %58 = load volatile i32, ptr inttoptr (i64 1155531004 to ptr), align 4, !tbaa !5
  %59 = and i32 %58, 262144
  %60 = icmp ne i32 0, %59
  br i1 %60, label %61, label %62

61:                                               ; preds = %57
  br label %57, !llvm.loop !18

62:                                               ; preds = %57
  br label %63

63:                                               ; preds = %67, %62
  %64 = load volatile i32, ptr inttoptr (i64 1155531008 to ptr), align 4, !tbaa !5
  %65 = and i32 %64, 196608
  %66 = icmp ne i32 0, %65
  br i1 %66, label %67, label %68

67:                                               ; preds = %63
  br label %63, !llvm.loop !19

68:                                               ; preds = %63
  br label %69

69:                                               ; preds = %73, %68
  %70 = load volatile i32, ptr inttoptr (i64 1155531008 to ptr), align 4, !tbaa !5
  %71 = and i32 %70, 262144
  %72 = icmp ne i32 0, %71
  br i1 %72, label %73, label %74

73:                                               ; preds = %69
  br label %69, !llvm.loop !20

74:                                               ; preds = %69
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10}
!16 = distinct !{!16, !10}
!17 = distinct !{!17, !10}
!18 = distinct !{!18, !10}
!19 = distinct !{!19, !10}
!20 = distinct !{!20, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local void @EDMAModuleClkConfig() local_unnamed_addr #0 {
  %1 = load volatile i32, ptr inttoptr (i64 1155530940 to ptr), align 4, !tbaa !5
  %2 = or i32 %1, 2
  store volatile i32 %2, ptr inttoptr (i64 1155530940 to ptr), align 4, !tbaa !5
  br label %3

3:                                                ; preds = %3, %0
  %4 = load volatile i32, ptr inttoptr (i64 1155530940 to ptr), align 4, !tbaa !5
  %5 = and i32 %4, 3
  %.not = icmp eq i32 %5, 2
  br i1 %.not, label %6, label %3, !llvm.loop !9

6:                                                ; preds = %3
  %7 = load volatile i32, ptr inttoptr (i64 1155530788 to ptr), align 4, !tbaa !5
  %8 = or i32 %7, 2
  store volatile i32 %8, ptr inttoptr (i64 1155530788 to ptr), align 4, !tbaa !5
  br label %9

9:                                                ; preds = %9, %6
  %10 = load volatile i32, ptr inttoptr (i64 1155530788 to ptr), align 4, !tbaa !5
  %11 = and i32 %10, 3
  %.not1 = icmp eq i32 %11, 2
  br i1 %.not1, label %12, label %9, !llvm.loop !11

12:                                               ; preds = %9
  %13 = load volatile i32, ptr inttoptr (i64 1155531004 to ptr), align 4, !tbaa !5
  %14 = or i32 %13, 2
  store volatile i32 %14, ptr inttoptr (i64 1155531004 to ptr), align 4, !tbaa !5
  br label %15

15:                                               ; preds = %15, %12
  %16 = load volatile i32, ptr inttoptr (i64 1155531004 to ptr), align 4, !tbaa !5
  %17 = and i32 %16, 3
  %.not2 = icmp eq i32 %17, 2
  br i1 %.not2, label %18, label %15, !llvm.loop !12

18:                                               ; preds = %15
  %19 = load volatile i32, ptr inttoptr (i64 1155531008 to ptr), align 256, !tbaa !5
  %20 = or i32 %19, 2
  store volatile i32 %20, ptr inttoptr (i64 1155531008 to ptr), align 256, !tbaa !5
  br label %21

21:                                               ; preds = %21, %18
  %22 = load volatile i32, ptr inttoptr (i64 1155531008 to ptr), align 256, !tbaa !5
  %23 = and i32 %22, 3
  %.not3 = icmp eq i32 %23, 2
  br i1 %.not3, label %24, label %21, !llvm.loop !13

24:                                               ; preds = %21
  store volatile i32 40, ptr inttoptr (i64 1233125392 to ptr), align 16, !tbaa !5
  store volatile i32 40, ptr inttoptr (i64 1234173968 to ptr), align 16, !tbaa !5
  store volatile i32 40, ptr inttoptr (i64 1235222544 to ptr), align 16, !tbaa !5
  br label %25

25:                                               ; preds = %25, %24
  %26 = load volatile i32, ptr inttoptr (i64 1155530940 to ptr), align 4, !tbaa !5
  %27 = and i32 %26, 196608
  %.not4 = icmp eq i32 %27, 0
  br i1 %.not4, label %.preheader15, label %25, !llvm.loop !14

.preheader15:                                     ; preds = %25, %.preheader15
  %28 = load volatile i32, ptr inttoptr (i64 1155530788 to ptr), align 4, !tbaa !5
  %29 = and i32 %28, 196608
  %.not5 = icmp eq i32 %29, 0
  br i1 %.not5, label %.preheader14, label %.preheader15, !llvm.loop !15

.preheader14:                                     ; preds = %.preheader15, %.preheader14
  %30 = load volatile i32, ptr inttoptr (i64 1155530788 to ptr), align 4, !tbaa !5
  %31 = and i32 %30, 262144
  %.not6 = icmp eq i32 %31, 0
  br i1 %.not6, label %.preheader13, label %.preheader14, !llvm.loop !16

.preheader13:                                     ; preds = %.preheader14, %.preheader13
  %32 = load volatile i32, ptr inttoptr (i64 1155531004 to ptr), align 4, !tbaa !5
  %33 = and i32 %32, 196608
  %.not7 = icmp eq i32 %33, 0
  br i1 %.not7, label %.preheader12, label %.preheader13, !llvm.loop !17

.preheader12:                                     ; preds = %.preheader13, %.preheader12
  %34 = load volatile i32, ptr inttoptr (i64 1155531004 to ptr), align 4, !tbaa !5
  %35 = and i32 %34, 262144
  %.not8 = icmp eq i32 %35, 0
  br i1 %.not8, label %.preheader11, label %.preheader12, !llvm.loop !18

.preheader11:                                     ; preds = %.preheader12, %.preheader11
  %36 = load volatile i32, ptr inttoptr (i64 1155531008 to ptr), align 256, !tbaa !5
  %37 = and i32 %36, 196608
  %.not9 = icmp eq i32 %37, 0
  br i1 %.not9, label %.preheader, label %.preheader11, !llvm.loop !19

.preheader:                                       ; preds = %.preheader11, %.preheader
  %38 = load volatile i32, ptr inttoptr (i64 1155531008 to ptr), align 256, !tbaa !5
  %39 = and i32 %38, 262144
  %.not10 = icmp eq i32 %39, 0
  br i1 %.not10, label %40, label %.preheader, !llvm.loop !20

40:                                               ; preds = %.preheader
  ret void
}

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10}
!16 = distinct !{!16, !10}
!17 = distinct !{!17, !10}
!18 = distinct !{!18, !10}
!19 = distinct !{!19, !10}
!20 = distinct !{!20, !10}


; Effective O3 passes: GlobalOptPass,InferAlignmentPass,InstCombinePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SimplifyCFGPass