; LLVM IR from lfarcaro/ARINC653_ARMV7A_AM335X :: Hardware (gpmc)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @GPMCErrStatusGet(i32 noundef %0, i32 noundef %1) #1 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 0, ptr %5, align 4, !tbaa !5
  %6 = load i32, ptr %4, align 4, !tbaa !5
  switch i32 %6, label %31 [
    i32 0, label %7
    i32 1, label %15
    i32 2, label %23
  ]

7:                                                ; preds = %2
  %8 = load i32, ptr %3, align 4, !tbaa !5
  %9 = add i32 %8, 72
  %10 = zext i32 %9 to i64
  %11 = inttoptr i64 %10 to ptr
  %12 = load volatile i32, ptr %11, align 4, !tbaa !5
  %13 = and i32 %12, 4
  %14 = lshr i32 %13, 2
  store i32 %14, ptr %5, align 4, !tbaa !5
  br label %31

15:                                               ; preds = %2
  %16 = load i32, ptr %3, align 4, !tbaa !5
  %17 = add i32 %16, 72
  %18 = zext i32 %17 to i64
  %19 = inttoptr i64 %18 to ptr
  %20 = load volatile i32, ptr %19, align 4, !tbaa !5
  %21 = and i32 %20, 8
  %22 = lshr i32 %21, 3
  store i32 %22, ptr %5, align 4, !tbaa !5
  br label %31

23:                                               ; preds = %2
  %24 = load i32, ptr %3, align 4, !tbaa !5
  %25 = add i32 %24, 72
  %26 = zext i32 %25 to i64
  %27 = inttoptr i64 %26 to ptr
  %28 = load volatile i32, ptr %27, align 4, !tbaa !5
  %29 = and i32 %28, 16
  %30 = lshr i32 %29, 4
  store i32 %30, ptr %5, align 4, !tbaa !5
  br label %31

31:                                               ; preds = %23, %15, %7, %2
  %32 = load i32, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  ret i32 %32
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nounwind willreturn uwtable
define dso_local range(i32 0, 2) i32 @GPMCErrStatusGet(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = icmp ult i32 %1, 3
  br i1 %3, label %switch.lookup, label %10

switch.lookup:                                    ; preds = %2
  %switch.offset = add nuw nsw i32 %1, 2
  %4 = add i32 %0, 72
  %5 = zext i32 %4 to i64
  %6 = inttoptr i64 %5 to ptr
  %7 = load volatile i32, ptr %6, align 4, !tbaa !5
  %8 = lshr i32 %7, %switch.offset
  %9 = and i32 %8, 1
  br label %10

10:                                               ; preds = %2, %switch.lookup
  %.0 = phi i32 [ 0, %2 ], [ %9, %switch.lookup ]
  ret i32 %.0
}

attributes #0 = { mustprogress nofree norecurse nounwind willreturn uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass