; LLVM IR from lfarcaro/ARINC653_ARMV7A_AM335X :: Hardware (mdio)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @MDIOPhyRegWrite(i32 noundef %0, i32 noundef %1, i32 noundef %2, i16 noundef zeroext %3) #0 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i16, align 2
  store i32 %0, ptr %5, align 4, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !5
  store i16 %3, ptr %8, align 2, !tbaa !9
  br label %9

9:                                                ; preds = %17, %4
  %10 = load i32, ptr %5, align 4, !tbaa !5
  %11 = add i32 %10, 128
  %12 = zext i32 %11 to i64
  %13 = inttoptr i64 %12 to ptr
  %14 = load volatile i32, ptr %13, align 4, !tbaa !5
  %15 = and i32 %14, -2147483648
  %16 = icmp ne i32 %15, 0
  br i1 %16, label %17, label %18

17:                                               ; preds = %9
  br label %9, !llvm.loop !11

18:                                               ; preds = %9
  %19 = load i32, ptr %7, align 4, !tbaa !5
  %20 = and i32 %19, 31
  %21 = shl i32 %20, 21
  %22 = or i32 -1073741824, %21
  %23 = load i32, ptr %6, align 4, !tbaa !5
  %24 = and i32 %23, 31
  %25 = shl i32 %24, 16
  %26 = or i32 %22, %25
  %27 = load i16, ptr %8, align 2, !tbaa !9
  %28 = zext i16 %27 to i32
  %29 = or i32 %26, %28
  %30 = load i32, ptr %5, align 4, !tbaa !5
  %31 = add i32 %30, 128
  %32 = zext i32 %31 to i64
  %33 = inttoptr i64 %32 to ptr
  store volatile i32 %29, ptr %33, align 4, !tbaa !5
  br label %34

34:                                               ; preds = %42, %18
  %35 = load i32, ptr %5, align 4, !tbaa !5
  %36 = add i32 %35, 128
  %37 = zext i32 %36 to i64
  %38 = inttoptr i64 %37 to ptr
  %39 = load volatile i32, ptr %38, align 4, !tbaa !5
  %40 = and i32 %39, -2147483648
  %41 = icmp ne i32 %40, 0
  br i1 %41, label %42, label %43

42:                                               ; preds = %34
  br label %34, !llvm.loop !13

43:                                               ; preds = %34
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local void @MDIOPhyRegWrite(i32 noundef %0, i32 noundef %1, i32 noundef %2, i16 noundef zeroext %3) local_unnamed_addr #0 {
  %5 = add i32 %0, 128
  %6 = zext i32 %5 to i64
  %7 = inttoptr i64 %6 to ptr
  br label %8

8:                                                ; preds = %8, %4
  %9 = load volatile i32, ptr %7, align 4, !tbaa !5
  %.not = icmp sgt i32 %9, -1
  br i1 %.not, label %10, label %8, !llvm.loop !9

10:                                               ; preds = %8
  %11 = shl i32 %2, 21
  %12 = and i32 %11, 65011712
  %13 = shl i32 %1, 16
  %14 = and i32 %13, 2031616
  %15 = zext i16 %3 to i32
  %16 = or disjoint i32 %14, %12
  %17 = or disjoint i32 %16, %15
  %18 = or disjoint i32 %17, -1073741824
  store volatile i32 %18, ptr %7, align 4, !tbaa !5
  br label %19

19:                                               ; preds = %19, %10
  %20 = load volatile i32, ptr %7, align 4, !tbaa !5
  %.not6 = icmp sgt i32 %20, -1
  br i1 %.not6, label %21, label %19, !llvm.loop !11

21:                                               ; preds = %19
  ret void
}

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,LCSSAPass,LICMPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass