; LLVM IR from Columbitech/rohc :: src (cprofile)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.ROHC::CProfile" = type { ptr, ptr, i16, i64, i32, i32, i32, i32, i64, i64, i32, i32, i16, %"class.ROHC::WLSB", i32, i32, i8, i32, i32, i32, %"struct.ROHC::iphdr", i16, i16, %"class.ROHC::WLSB", [11 x i64] }
%"struct.ROHC::iphdr" = type { i8, i8, i16, i16, i16, i8, i8, i16, i32, i32 }
%"class.ROHC::WLSB" = type { %"class.std::vector", i64, i64, i64, i32, i32 }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<ROHC::WLSB<int>::LSB, std::allocator<ROHC::WLSB<int>::LSB>>::_Vector_impl" }
%"struct.std::_Vector_base<ROHC::WLSB<int>::LSB, std::allocator<ROHC::WLSB<int>::LSB>>::_Vector_impl" = type { %"struct.std::_Vector_base<ROHC::WLSB<int>::LSB, std::allocator<ROHC::WLSB<int>::LSB>>::_Vector_impl_data" }
%"struct.std::_Vector_base<ROHC::WLSB<int>::LSB, std::allocator<ROHC::WLSB<int>::LSB>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIhSaIhEE9push_backERKh(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 1 dereferenceable(1)) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4ROHC8CProfile37create_ipv4_regular_innermost_dynamicEPKNS_5iphdrERSt6vectorIhSaIhEE(ptr noundef nonnull align 8 dereferenceable(328) %0, ptr noundef %1, ptr noundef nonnull align 8 dereferenceable(24) %2) #1 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i8, align 1
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !5
  %8 = load ptr, ptr %4, align 8
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #3
  store i8 0, ptr %7, align 1, !tbaa !9
  %9 = load ptr, ptr %5, align 8, !tbaa !5
  %10 = call noundef zeroext i1 @_ZN4ROHC15HasDontFragmentEPKNS_5iphdrE(ptr noundef %9)
  br i1 %10, label %11, label %16

11:                                               ; preds = %3
  %12 = load i8, ptr %7, align 1, !tbaa !9
  %13 = zext i8 %12 to i32
  %14 = or i32 %13, 4
  %15 = trunc i32 %14 to i8
  store i8 %15, ptr %7, align 1, !tbaa !9
  br label %16

16:                                               ; preds = %11, %3
  %17 = getelementptr inbounds %"class.ROHC::CProfile", ptr %8, i32 0, i32 15
  %18 = load i32, ptr %17, align 4, !tbaa !10
  %19 = trunc i32 %18 to i8
  %20 = zext i8 %19 to i32
  %21 = load i8, ptr %7, align 1, !tbaa !9
  %22 = zext i8 %21 to i32
  %23 = or i32 %22, %20
  %24 = trunc i32 %23 to i8
  store i8 %24, ptr %7, align 1, !tbaa !9
  %25 = load ptr, ptr %6, align 8, !tbaa !5
  call void @_ZNSt6vectorIhSaIhEE9push_backERKh(ptr noundef nonnull align 8 dereferenceable(24) %25, ptr noundef nonnull align 1 dereferenceable(1) %7)
  %26 = load ptr, ptr %6, align 8, !tbaa !5
  %27 = load ptr, ptr %5, align 8, !tbaa !5
  %28 = getelementptr inbounds %"struct.ROHC::iphdr", ptr %27, i32 0, i32 1
  call void @_ZNSt6vectorIhSaIhEE9push_backERKh(ptr noundef nonnull align 8 dereferenceable(24) %26, ptr noundef nonnull align 1 dereferenceable(1) %28)
  %29 = load ptr, ptr %6, align 8, !tbaa !5
  %30 = load ptr, ptr %5, align 8, !tbaa !5
  %31 = getelementptr inbounds %"struct.ROHC::iphdr", ptr %30, i32 0, i32 5
  call void @_ZNSt6vectorIhSaIhEE9push_backERKh(ptr noundef nonnull align 8 dereferenceable(24) %29, ptr noundef nonnull align 1 dereferenceable(1) %31)
  %32 = load ptr, ptr %5, align 8, !tbaa !5
  %33 = load ptr, ptr %6, align 8, !tbaa !5
  call void @_ZN4ROHC8CProfile13ip_id_enc_dynEPKNS_5iphdrERSt6vectorIhSaIhEE(ptr noundef nonnull align 8 dereferenceable(328) %8, ptr noundef %32, ptr noundef nonnull align 8 dereferenceable(24) %33)
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #3
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN4ROHC15HasDontFragmentEPKNS_5iphdrE(ptr noundef) #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4ROHC8CProfile13ip_id_enc_dynEPKNS_5iphdrERSt6vectorIhSaIhEE(ptr noundef nonnull align 8 dereferenceable(328), ptr noundef, ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !21, i64 140}
!11 = !{!"_ZTSN4ROHC8CProfileE", !6, i64 8, !12, i64 16, !13, i64 24, !14, i64 32, !14, i64 36, !14, i64 40, !14, i64 44, !13, i64 48, !13, i64 56, !14, i64 64, !14, i64 68, !12, i64 72, !15, i64 80, !20, i64 136, !21, i64 140, !22, i64 144, !23, i64 148, !14, i64 152, !14, i64 156, !24, i64 160, !12, i64 180, !12, i64 182, !15, i64 184, !7, i64 240}
!12 = !{!"short", !7, i64 0}
!13 = !{!"long", !7, i64 0}
!14 = !{!"int", !7, i64 0}
!15 = !{!"_ZTSN4ROHC4WLSBIiEE", !16, i64 0, !13, i64 24, !13, i64 32, !13, i64 40, !14, i64 48, !14, i64 52}
!16 = !{!"_ZTSSt6vectorIN4ROHC4WLSBIiE3LSBESaIS3_EE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIN4ROHC4WLSBIiE3LSBESaIS3_EE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIN4ROHC4WLSBIiE3LSBESaIS3_EE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIN4ROHC4WLSBIiE3LSBESaIS3_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!20 = !{!"_ZTSN4ROHC12Reordering_tE", !7, i64 0}
!21 = !{!"_ZTSN4ROHC15IPIDBehaviour_tE", !7, i64 0}
!22 = !{!"bool", !7, i64 0}
!23 = !{!"_ZTSN4ROHC8CProfileUt_E", !7, i64 0}
!24 = !{!"_ZTSN4ROHC5iphdrE", !7, i64 0, !7, i64 0, !7, i64 1, !12, i64 2, !12, i64 4, !12, i64 6, !7, i64 8, !7, i64 9, !12, i64 10, !14, i64 12, !14, i64 16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIhSaIhEE9push_backERKh(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 1 dereferenceable(1)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4ROHC8CProfile37create_ipv4_regular_innermost_dynamicEPKNS_5iphdrERSt6vectorIhSaIhEE(ptr noundef nonnull align 8 dereferenceable(328) %0, ptr noundef %1, ptr noundef nonnull align 8 dereferenceable(24) %2) local_unnamed_addr #1 align 2 {
  %4 = alloca i8, align 1
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %4) #3
  %5 = tail call noundef zeroext i1 @_ZN4ROHC15HasDontFragmentEPKNS_5iphdrE(ptr noundef %1)
  %spec.select = select i1 %5, i8 4, i8 0
  %6 = getelementptr inbounds i8, ptr %0, i64 140
  %7 = load i32, ptr %6, align 4, !tbaa !5
  %8 = trunc i32 %7 to i8
  %9 = or i8 %spec.select, %8
  store i8 %9, ptr %4, align 1, !tbaa !23
  call void @_ZNSt6vectorIhSaIhEE9push_backERKh(ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef nonnull align 1 dereferenceable(1) %4)
  %10 = getelementptr inbounds i8, ptr %1, i64 1
  call void @_ZNSt6vectorIhSaIhEE9push_backERKh(ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef nonnull align 1 dereferenceable(1) %10)
  %11 = getelementptr inbounds i8, ptr %1, i64 8
  call void @_ZNSt6vectorIhSaIhEE9push_backERKh(ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef nonnull align 1 dereferenceable(1) %11)
  call void @_ZN4ROHC8CProfile13ip_id_enc_dynEPKNS_5iphdrERSt6vectorIhSaIhEE(ptr noundef nonnull align 8 dereferenceable(328) %0, ptr noundef %1, ptr noundef nonnull align 8 dereferenceable(24) %2)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %4) #3
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN4ROHC15HasDontFragmentEPKNS_5iphdrE(ptr noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4ROHC8CProfile13ip_id_enc_dynEPKNS_5iphdrERSt6vectorIhSaIhEE(ptr noundef nonnull align 8 dereferenceable(328), ptr noundef, ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !19, i64 140}
!6 = !{!"_ZTSN4ROHC8CProfileE", !7, i64 8, !10, i64 16, !11, i64 24, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44, !11, i64 48, !11, i64 56, !12, i64 64, !12, i64 68, !10, i64 72, !13, i64 80, !18, i64 136, !19, i64 140, !20, i64 144, !21, i64 148, !12, i64 152, !12, i64 156, !22, i64 160, !10, i64 180, !10, i64 182, !13, i64 184, !8, i64 240}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"short", !8, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!"int", !8, i64 0}
!13 = !{!"_ZTSN4ROHC4WLSBIiEE", !14, i64 0, !11, i64 24, !11, i64 32, !11, i64 40, !12, i64 48, !12, i64 52}
!14 = !{!"_ZTSSt6vectorIN4ROHC4WLSBIiE3LSBESaIS3_EE", !15, i64 0}
!15 = !{!"_ZTSSt12_Vector_baseIN4ROHC4WLSBIiE3LSBESaIS3_EE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIN4ROHC4WLSBIiE3LSBESaIS3_EE12_Vector_implE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIN4ROHC4WLSBIiE3LSBESaIS3_EE17_Vector_impl_dataE", !7, i64 0, !7, i64 8, !7, i64 16}
!18 = !{!"_ZTSN4ROHC12Reordering_tE", !8, i64 0}
!19 = !{!"_ZTSN4ROHC15IPIDBehaviour_tE", !8, i64 0}
!20 = !{!"bool", !8, i64 0}
!21 = !{!"_ZTSN4ROHC8CProfileUt_E", !8, i64 0}
!22 = !{!"_ZTSN4ROHC5iphdrE", !8, i64 0, !8, i64 0, !8, i64 1, !10, i64 2, !10, i64 4, !10, i64 6, !8, i64 8, !8, i64 9, !10, i64 10, !12, i64 12, !12, i64 16}
!23 = !{!8, !8, i64 0}


; Effective O3 passes: DSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass