; LLVM IR from intuitive-robots/mdt_policy :: pyhash-0.9.3/src/t1ha/tests (bench)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct._ia32_cpu_features = type { %struct.anon, %struct.anon, %struct.anon.0, %struct.anon.1 }
%struct.anon = type { i32, i32, i32 }
%struct.anon.0 = type { i32, i32 }
%struct.anon.1 = type { i32, i32 }

@.str.12 = external hidden unnamed_addr constant [32 x i8], align 1
@.str.13 = external hidden unnamed_addr constant [13 x i8], align 1
@.str.14 = external hidden unnamed_addr constant [17 x i8], align 1
@.str.15 = external hidden unnamed_addr constant [14 x i8], align 1
@.str.16 = external hidden unnamed_addr constant [17 x i8], align 1
@.str.17 = external hidden unnamed_addr constant [11 x i8], align 1
@.str.18 = external hidden unnamed_addr constant [11 x i8], align 1
@.str.19 = external hidden unnamed_addr constant [6 x i8], align 1
@.str.20 = external hidden unnamed_addr constant [11 x i8], align 1
@.str.21 = external hidden unnamed_addr constant [11 x i8], align 1
@.str.22 = external hidden unnamed_addr constant [22 x i8], align 1
@.str.23 = external hidden unnamed_addr constant [22 x i8], align 1
@.str.24 = external hidden unnamed_addr constant [20 x i8], align 1
@.str.25 = external hidden unnamed_addr constant [20 x i8], align 1
@.str.26 = external hidden unnamed_addr constant [20 x i8], align 1
@.str.27 = external hidden unnamed_addr constant [18 x i8], align 1
@.str.28 = external hidden unnamed_addr constant [21 x i8], align 1
@.str.29 = external hidden unnamed_addr constant [21 x i8], align 1
@.str.30 = external hidden unnamed_addr constant [19 x i8], align 1
@.str.31 = external hidden unnamed_addr constant [9 x i8], align 1
@.str.32 = external hidden unnamed_addr constant [9 x i8], align 1
@.str.33 = external hidden unnamed_addr constant [7 x i8], align 1
@.str.34 = external hidden unnamed_addr constant [21 x i8], align 1
@.str.35 = external hidden unnamed_addr constant [23 x i8], align 1
@ia32_cpu_features = external global %struct._ia32_cpu_features, align 4
@.str.36 = external hidden unnamed_addr constant [20 x i8], align 1
@.str.37 = external hidden unnamed_addr constant [19 x i8], align 1

; Function Attrs: nounwind uwtable
declare dso_local void @bench(ptr noundef, ptr noundef, ptr noundef, i32 noundef, i64 noundef) #0

declare i32 @printf(ptr noundef, ...) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nounwind uwtable
declare dso_local i64 @thunk_XXH32(ptr noundef, i64 noundef, i64 noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local i64 @thunk_HighwayHash64_pure_c(ptr noundef, i64 noundef, i64 noundef) #0

; Function Attrs: nounwind uwtable
define dso_local void @bench_size(i32 noundef %0, ptr noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca i64, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !9
  %8 = load ptr, ptr %4, align 8, !tbaa !9
  %9 = load i32, ptr %3, align 4, !tbaa !5
  %10 = call i32 (ptr, ...) @printf(ptr noundef @.str.12, ptr noundef %8, i32 noundef %9)
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #6
  store i64 -43, ptr %5, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #6
  %11 = load i32, ptr %3, align 4, !tbaa !5
  %12 = zext i32 %11 to i64
  %13 = call noalias ptr @malloc(i64 noundef %12) #7
  store ptr %13, ptr %6, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #6
  store i32 0, ptr %7, align 4, !tbaa !5
  br label %14

14:                                               ; preds = %28, %2
  %15 = load i32, ptr %7, align 4, !tbaa !5
  %16 = load i32, ptr %3, align 4, !tbaa !5
  %17 = icmp ult i32 %15, %16
  br i1 %17, label %19, label %18

18:                                               ; preds = %14
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #6
  br label %31

19:                                               ; preds = %14
  %20 = call i32 @rand() #6
  %21 = load i32, ptr %7, align 4, !tbaa !5
  %22 = add i32 %20, %21
  %23 = trunc i32 %22 to i8
  %24 = load ptr, ptr %6, align 8, !tbaa !9
  %25 = load i32, ptr %7, align 4, !tbaa !5
  %26 = zext i32 %25 to i64
  %27 = getelementptr inbounds i8, ptr %24, i64 %26
  store i8 %23, ptr %27, align 1, !tbaa !13
  br label %28

28:                                               ; preds = %19
  %29 = load i32, ptr %7, align 4, !tbaa !5
  %30 = add i32 %29, 1
  store i32 %30, ptr %7, align 4, !tbaa !5
  br label %14, !llvm.loop !14

31:                                               ; preds = %18
  %32 = call zeroext i1 @is_selected(i32 noundef 33555456)
  br i1 %32, label %33, label %42

33:                                               ; preds = %31
  %34 = load ptr, ptr %6, align 8, !tbaa !9
  %35 = load i32, ptr %3, align 4, !tbaa !5
  call void @bench(ptr noundef @.str.13, ptr noundef @t1ha2_atonce, ptr noundef %34, i32 noundef %35, i64 noundef -43)
  %36 = load ptr, ptr %6, align 8, !tbaa !9
  %37 = load i32, ptr %3, align 4, !tbaa !5
  call void @bench(ptr noundef @.str.14, ptr noundef @thunk_t1ha2_atonce128, ptr noundef %36, i32 noundef %37, i64 noundef -43)
  %38 = load ptr, ptr %6, align 8, !tbaa !9
  %39 = load i32, ptr %3, align 4, !tbaa !5
  call void @bench(ptr noundef @.str.15, ptr noundef @thunk_t1ha2_stream, ptr noundef %38, i32 noundef %39, i64 noundef -43)
  %40 = load ptr, ptr %6, align 8, !tbaa !9
  %41 = load i32, ptr %3, align 4, !tbaa !5
  call void @bench(ptr noundef @.str.16, ptr noundef @thunk_t1ha2_stream128, ptr noundef %40, i32 noundef %41, i64 noundef -43)
  br label %42

42:                                               ; preds = %33, %31
  %43 = call zeroext i1 @is_selected(i32 noundef 100663808)
  br i1 %43, label %44, label %47

44:                                               ; preds = %42
  %45 = load ptr, ptr %6, align 8, !tbaa !9
  %46 = load i32, ptr %3, align 4, !tbaa !5
  call void @bench(ptr noundef @.str.17, ptr noundef @t1ha1_le, ptr noundef %45, i32 noundef %46, i64 noundef -43)
  br label %47

47:                                               ; preds = %44, %42
  %48 = call zeroext i1 @is_selected(i32 noundef 167772672)
  br i1 %48, label %49, label %52

49:                                               ; preds = %47
  %50 = load ptr, ptr %6, align 8, !tbaa !9
  %51 = load i32, ptr %3, align 4, !tbaa !5
  call void @bench(ptr noundef @.str.18, ptr noundef @t1ha1_be, ptr noundef %50, i32 noundef %51, i64 noundef -43)
  br label %52

52:                                               ; preds = %49, %47
  %53 = call zeroext i1 @is_selected(i32 noundef 256)
  br i1 %53, label %54, label %57

54:                                               ; preds = %52
  %55 = load ptr, ptr %6, align 8, !tbaa !9
  %56 = load i32, ptr %3, align 4, !tbaa !5
  call void @bench(ptr noundef @.str.19, ptr noundef @t1ha0, ptr noundef %55, i32 noundef %56, i64 noundef -43)
  br label %57

57:                                               ; preds = %54, %52
  %58 = call zeroext i1 @is_selected(i32 noundef 83886336)
  br i1 %58, label %59, label %62

59:                                               ; preds = %57
  %60 = load ptr, ptr %6, align 8, !tbaa !9
  %61 = load i32, ptr %3, align 4, !tbaa !5
  call void @bench(ptr noundef @.str.20, ptr noundef @t1ha0_32le, ptr noundef %60, i32 noundef %61, i64 noundef -43)
  br label %62

62:                                               ; preds = %59, %57
  %63 = call zeroext i1 @is_selected(i32 noundef 150995200)
  br i1 %63, label %64, label %67

64:                                               ; preds = %62
  %65 = load ptr, ptr %6, align 8, !tbaa !9
  %66 = load i32, ptr %3, align 4, !tbaa !5
  call void @bench(ptr noundef @.str.21, ptr noundef @t1ha0_32be, ptr noundef %65, i32 noundef %66, i64 noundef -43)
  br label %67

67:                                               ; preds = %64, %62
  %68 = call zeroext i1 @is_selected(i32 noundef 268435456)
  br i1 %68, label %69, label %94

69:                                               ; preds = %67
  %70 = load ptr, ptr %6, align 8, !tbaa !9
  %71 = load i32, ptr %3, align 4, !tbaa !5
  call void @bench(ptr noundef @.str.22, ptr noundef @t1ha0_ia32aes_noavx_a, ptr noundef %70, i32 noundef %71, i64 noundef -43)
  %72 = load ptr, ptr %6, align 8, !tbaa !9
  %73 = load i32, ptr %3, align 4, !tbaa !5
  call void @bench(ptr noundef @.str.23, ptr noundef @t1ha0_ia32aes_noavx_b, ptr noundef %72, i32 noundef %73, i64 noundef -43)
  %74 = load ptr, ptr %6, align 8, !tbaa !9
  %75 = load i32, ptr %3, align 4, !tbaa !5
  call void @bench(ptr noundef @.str.24, ptr noundef @t1ha0_ia32aes_noavx, ptr noundef %74, i32 noundef %75, i64 noundef -43)
  %76 = call zeroext i1 @is_selected(i32 noundef 536870912)
  br i1 %76, label %77, label %84

77:                                               ; preds = %69
  %78 = load ptr, ptr %6, align 8, !tbaa !9
  %79 = load i32, ptr %3, align 4, !tbaa !5
  call void @bench(ptr noundef @.str.25, ptr noundef @t1ha0_ia32aes_avx_a, ptr noundef %78, i32 noundef %79, i64 noundef -43)
  %80 = load ptr, ptr %6, align 8, !tbaa !9
  %81 = load i32, ptr %3, align 4, !tbaa !5
  call void @bench(ptr noundef @.str.26, ptr noundef @t1ha0_ia32aes_avx_b, ptr noundef %80, i32 noundef %81, i64 noundef -43)
  %82 = load ptr, ptr %6, align 8, !tbaa !9
  %83 = load i32, ptr %3, align 4, !tbaa !5
  call void @bench(ptr noundef @.str.27, ptr noundef @t1ha0_ia32aes_avx, ptr noundef %82, i32 noundef %83, i64 noundef -43)
  br label %84

84:                                               ; preds = %77, %69
  %85 = call zeroext i1 @is_selected(i32 noundef 1073741824)
  br i1 %85, label %86, label %93

86:                                               ; preds = %84
  %87 = load ptr, ptr %6, align 8, !tbaa !9
  %88 = load i32, ptr %3, align 4, !tbaa !5
  call void @bench(ptr noundef @.str.28, ptr noundef @t1ha0_ia32aes_avx2_a, ptr noundef %87, i32 noundef %88, i64 noundef -43)
  %89 = load ptr, ptr %6, align 8, !tbaa !9
  %90 = load i32, ptr %3, align 4, !tbaa !5
  call void @bench(ptr noundef @.str.29, ptr noundef @t1ha0_ia32aes_avx2_b, ptr noundef %89, i32 noundef %90, i64 noundef -43)
  %91 = load ptr, ptr %6, align 8, !tbaa !9
  %92 = load i32, ptr %3, align 4, !tbaa !5
  call void @bench(ptr noundef @.str.30, ptr noundef @t1ha0_ia32aes_avx2, ptr noundef %91, i32 noundef %92, i64 noundef -43)
  br label %93

93:                                               ; preds = %86, %84
  br label %94

94:                                               ; preds = %93, %67
  %95 = call zeroext i1 @is_selected(i32 noundef 16)
  br i1 %95, label %96, label %101

96:                                               ; preds = %94
  %97 = load ptr, ptr %6, align 8, !tbaa !9
  %98 = load i32, ptr %3, align 4, !tbaa !5
  call void @bench(ptr noundef @.str.31, ptr noundef @thunk_XXH32, ptr noundef %97, i32 noundef %98, i64 noundef 4294967253)
  %99 = load ptr, ptr %6, align 8, !tbaa !9
  %100 = load i32, ptr %3, align 4, !tbaa !5
  call void @bench(ptr noundef @.str.32, ptr noundef @XXH64, ptr noundef %99, i32 noundef %100, i64 noundef -43)
  br label %101

101:                                              ; preds = %96, %94
  %102 = call zeroext i1 @is_selected(i32 noundef 64)
  br i1 %102, label %103, label %106

103:                                              ; preds = %101
  %104 = load ptr, ptr %6, align 8, !tbaa !9
  %105 = load i32, ptr %3, align 4, !tbaa !5
  call void @bench(ptr noundef @.str.33, ptr noundef @thunk_StadtX, ptr noundef %104, i32 noundef %105, i64 noundef -43)
  br label %106

106:                                              ; preds = %103, %101
  %107 = call zeroext i1 @is_selected(i32 noundef 32)
  br i1 %107, label %108, label %128

108:                                              ; preds = %106
  %109 = load ptr, ptr %6, align 8, !tbaa !9
  %110 = load i32, ptr %3, align 4, !tbaa !5
  call void @bench(ptr noundef @.str.34, ptr noundef @thunk_HighwayHash64_pure_c, ptr noundef %109, i32 noundef %110, i64 noundef -43)
  %111 = load ptr, ptr %6, align 8, !tbaa !9
  %112 = load i32, ptr %3, align 4, !tbaa !5
  call void @bench(ptr noundef @.str.35, ptr noundef @thunk_HighwayHash64_Portable, ptr noundef %111, i32 noundef %112, i64 noundef -43)
  %113 = load i32, ptr getelementptr inbounds (%struct.anon, ptr @ia32_cpu_features, i32 0, i32 1), align 4, !tbaa !16
  %114 = zext i32 %113 to i64
  %115 = and i64 %114, 524288
  %116 = icmp ne i64 %115, 0
  br i1 %116, label %117, label %120

117:                                              ; preds = %108
  %118 = load ptr, ptr %6, align 8, !tbaa !9
  %119 = load i32, ptr %3, align 4, !tbaa !5
  call void @bench(ptr noundef @.str.36, ptr noundef @thunk_HighwayHash64_SSE41, ptr noundef %118, i32 noundef %119, i64 noundef -43)
  br label %120

120:                                              ; preds = %117, %108
  %121 = load i32, ptr getelementptr inbounds (%struct._ia32_cpu_features, ptr @ia32_cpu_features, i32 0, i32 1), align 4, !tbaa !20
  %122 = and i32 %121, 32
  %123 = icmp ne i32 %122, 0
  br i1 %123, label %124, label %127

124:                                              ; preds = %120
  %125 = load ptr, ptr %6, align 8, !tbaa !9
  %126 = load i32, ptr %3, align 4, !tbaa !5
  call void @bench(ptr noundef @.str.37, ptr noundef @thunk_HighwayHash64_AVX2, ptr noundef %125, i32 noundef %126, i64 noundef -43)
  br label %127

127:                                              ; preds = %124, %120
  br label %128

128:                                              ; preds = %127, %106
  %129 = load ptr, ptr %6, align 8, !tbaa !9
  call void @free(ptr noundef %129) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #6
  ret void
}

; Function Attrs: nounwind allocsize(0)
declare noalias ptr @malloc(i64 noundef) #3

; Function Attrs: nounwind
declare i32 @rand() #4

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i1 @is_selected(i32 noundef) #5

declare hidden i64 @t1ha2_atonce(ptr noundef, i64 noundef, i64 noundef) #1

declare i64 @thunk_t1ha2_atonce128(ptr noundef, i64 noundef, i64 noundef) #1

declare i64 @thunk_t1ha2_stream(ptr noundef, i64 noundef, i64 noundef) #1

declare i64 @thunk_t1ha2_stream128(ptr noundef, i64 noundef, i64 noundef) #1

declare hidden i64 @t1ha1_le(ptr noundef, i64 noundef, i64 noundef) #1

declare hidden i64 @t1ha1_be(ptr noundef, i64 noundef, i64 noundef) #1

declare hidden i64 @t1ha0(ptr noundef, i64 noundef, i64 noundef) #1

declare hidden i64 @t1ha0_32le(ptr noundef, i64 noundef, i64 noundef) #1

declare hidden i64 @t1ha0_32be(ptr noundef, i64 noundef, i64 noundef) #1

declare i64 @t1ha0_ia32aes_noavx_a(ptr noundef, i64 noundef, i64 noundef) #1

declare i64 @t1ha0_ia32aes_noavx_b(ptr noundef, i64 noundef, i64 noundef) #1

declare hidden i64 @t1ha0_ia32aes_noavx(ptr noundef, i64 noundef, i64 noundef) #1

declare i64 @t1ha0_ia32aes_avx_a(ptr noundef, i64 noundef, i64 noundef) #1

declare i64 @t1ha0_ia32aes_avx_b(ptr noundef, i64 noundef, i64 noundef) #1

declare hidden i64 @t1ha0_ia32aes_avx(ptr noundef, i64 noundef, i64 noundef) #1

declare i64 @t1ha0_ia32aes_avx2_a(ptr noundef, i64 noundef, i64 noundef) #1

declare i64 @t1ha0_ia32aes_avx2_b(ptr noundef, i64 noundef, i64 noundef) #1

declare hidden i64 @t1ha0_ia32aes_avx2(ptr noundef, i64 noundef, i64 noundef) #1

declare i64 @XXH64(ptr noundef, i64 noundef, i64 noundef) #1

declare i64 @thunk_StadtX(ptr noundef, i64 noundef, i64 noundef) #1

declare i64 @thunk_HighwayHash64_Portable(ptr noundef, i64 noundef, i64 noundef) #1

declare i64 @thunk_HighwayHash64_SSE41(ptr noundef, i64 noundef, i64 noundef) #1

declare i64 @thunk_HighwayHash64_AVX2(ptr noundef, i64 noundef, i64 noundef) #1

; Function Attrs: nounwind
declare void @free(ptr noundef) #4

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }
attributes #7 = { nounwind allocsize(0) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = !{!17, !6, i64 4}
!17 = !{!"_ia32_cpu_features", !18, i64 0, !18, i64 12, !19, i64 24, !19, i64 32}
!18 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8}
!19 = !{!"", !6, i64 0, !6, i64 4}
!20 = !{!17, !6, i64 12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct._ia32_cpu_features = type { %struct.anon, %struct.anon, %struct.anon.0, %struct.anon.1 }
%struct.anon = type { i32, i32, i32 }
%struct.anon.0 = type { i32, i32 }
%struct.anon.1 = type { i32, i32 }

@.str.12 = external hidden unnamed_addr constant [32 x i8], align 1
@.str.13 = external hidden unnamed_addr constant [13 x i8], align 1
@.str.14 = external hidden unnamed_addr constant [17 x i8], align 1
@.str.15 = external hidden unnamed_addr constant [14 x i8], align 1
@.str.16 = external hidden unnamed_addr constant [17 x i8], align 1
@.str.17 = external hidden unnamed_addr constant [11 x i8], align 1
@.str.18 = external hidden unnamed_addr constant [11 x i8], align 1
@.str.19 = external hidden unnamed_addr constant [6 x i8], align 1
@.str.20 = external hidden unnamed_addr constant [11 x i8], align 1
@.str.21 = external hidden unnamed_addr constant [11 x i8], align 1
@.str.22 = external hidden unnamed_addr constant [22 x i8], align 1
@.str.23 = external hidden unnamed_addr constant [22 x i8], align 1
@.str.24 = external hidden unnamed_addr constant [20 x i8], align 1
@.str.25 = external hidden unnamed_addr constant [20 x i8], align 1
@.str.26 = external hidden unnamed_addr constant [20 x i8], align 1
@.str.27 = external hidden unnamed_addr constant [18 x i8], align 1
@.str.28 = external hidden unnamed_addr constant [21 x i8], align 1
@.str.29 = external hidden unnamed_addr constant [21 x i8], align 1
@.str.30 = external hidden unnamed_addr constant [19 x i8], align 1
@.str.31 = external hidden unnamed_addr constant [9 x i8], align 1
@.str.32 = external hidden unnamed_addr constant [9 x i8], align 1
@.str.33 = external hidden unnamed_addr constant [7 x i8], align 1
@.str.34 = external hidden unnamed_addr constant [21 x i8], align 1
@.str.35 = external hidden unnamed_addr constant [23 x i8], align 1
@ia32_cpu_features = external local_unnamed_addr global %struct._ia32_cpu_features, align 4
@.str.36 = external hidden unnamed_addr constant [20 x i8], align 1
@.str.37 = external hidden unnamed_addr constant [19 x i8], align 1

; Function Attrs: nounwind uwtable
declare dso_local void @bench(ptr noundef, ptr noundef, ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local i64 @thunk_XXH32(ptr noundef, i64 noundef, i64 noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local i64 @thunk_HighwayHash64_pure_c(ptr noundef, i64 noundef, i64 noundef) #0

; Function Attrs: nounwind uwtable
define dso_local void @bench_size(i32 noundef %0, ptr noundef %1) local_unnamed_addr #0 {
  %3 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.12, ptr noundef %1, i32 noundef %0)
  %4 = zext i32 %0 to i64
  %5 = tail call noalias ptr @malloc(i64 noundef %4) #7
  %.not62 = icmp eq i32 %0, 0
  br i1 %.not62, label %._crit_edge, label %.lr.ph

._crit_edge:                                      ; preds = %.lr.ph, %2
  %6 = tail call zeroext i1 @is_selected(i32 noundef 33555456)
  br i1 %6, label %12, label %13

.lr.ph:                                           ; preds = %2, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %2 ]
  %7 = tail call i32 @rand() #8
  %8 = trunc nuw i64 %indvars.iv to i32
  %9 = add i32 %7, %8
  %10 = trunc i32 %9 to i8
  %11 = getelementptr inbounds i8, ptr %5, i64 %indvars.iv
  store i8 %10, ptr %11, align 1, !tbaa !5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %4
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !8

12:                                               ; preds = %._crit_edge
  tail call void @bench(ptr noundef nonnull @.str.13, ptr noundef nonnull @t1ha2_atonce, ptr noundef %5, i32 noundef %0, i64 noundef -43)
  tail call void @bench(ptr noundef nonnull @.str.14, ptr noundef nonnull @thunk_t1ha2_atonce128, ptr noundef %5, i32 noundef %0, i64 noundef -43)
  tail call void @bench(ptr noundef nonnull @.str.15, ptr noundef nonnull @thunk_t1ha2_stream, ptr noundef %5, i32 noundef %0, i64 noundef -43)
  tail call void @bench(ptr noundef nonnull @.str.16, ptr noundef nonnull @thunk_t1ha2_stream128, ptr noundef %5, i32 noundef %0, i64 noundef -43)
  br label %13

13:                                               ; preds = %12, %._crit_edge
  %14 = tail call zeroext i1 @is_selected(i32 noundef 100663808)
  br i1 %14, label %15, label %16

15:                                               ; preds = %13
  tail call void @bench(ptr noundef nonnull @.str.17, ptr noundef nonnull @t1ha1_le, ptr noundef %5, i32 noundef %0, i64 noundef -43)
  br label %16

16:                                               ; preds = %15, %13
  %17 = tail call zeroext i1 @is_selected(i32 noundef 167772672)
  br i1 %17, label %18, label %19

18:                                               ; preds = %16
  tail call void @bench(ptr noundef nonnull @.str.18, ptr noundef nonnull @t1ha1_be, ptr noundef %5, i32 noundef %0, i64 noundef -43)
  br label %19

19:                                               ; preds = %18, %16
  %20 = tail call zeroext i1 @is_selected(i32 noundef 256)
  br i1 %20, label %21, label %22

21:                                               ; preds = %19
  tail call void @bench(ptr noundef nonnull @.str.19, ptr noundef nonnull @t1ha0, ptr noundef %5, i32 noundef %0, i64 noundef -43)
  br label %22

22:                                               ; preds = %21, %19
  %23 = tail call zeroext i1 @is_selected(i32 noundef 83886336)
  br i1 %23, label %24, label %25

24:                                               ; preds = %22
  tail call void @bench(ptr noundef nonnull @.str.20, ptr noundef nonnull @t1ha0_32le, ptr noundef %5, i32 noundef %0, i64 noundef -43)
  br label %25

25:                                               ; preds = %24, %22
  %26 = tail call zeroext i1 @is_selected(i32 noundef 150995200)
  br i1 %26, label %27, label %28

27:                                               ; preds = %25
  tail call void @bench(ptr noundef nonnull @.str.21, ptr noundef nonnull @t1ha0_32be, ptr noundef %5, i32 noundef %0, i64 noundef -43)
  br label %28

28:                                               ; preds = %27, %25
  %29 = tail call zeroext i1 @is_selected(i32 noundef 268435456)
  br i1 %29, label %30, label %36

30:                                               ; preds = %28
  tail call void @bench(ptr noundef nonnull @.str.22, ptr noundef nonnull @t1ha0_ia32aes_noavx_a, ptr noundef %5, i32 noundef %0, i64 noundef -43)
  tail call void @bench(ptr noundef nonnull @.str.23, ptr noundef nonnull @t1ha0_ia32aes_noavx_b, ptr noundef %5, i32 noundef %0, i64 noundef -43)
  tail call void @bench(ptr noundef nonnull @.str.24, ptr noundef nonnull @t1ha0_ia32aes_noavx, ptr noundef %5, i32 noundef %0, i64 noundef -43)
  %31 = tail call zeroext i1 @is_selected(i32 noundef 536870912)
  br i1 %31, label %32, label %33

32:                                               ; preds = %30
  tail call void @bench(ptr noundef nonnull @.str.25, ptr noundef nonnull @t1ha0_ia32aes_avx_a, ptr noundef %5, i32 noundef %0, i64 noundef -43)
  tail call void @bench(ptr noundef nonnull @.str.26, ptr noundef nonnull @t1ha0_ia32aes_avx_b, ptr noundef %5, i32 noundef %0, i64 noundef -43)
  tail call void @bench(ptr noundef nonnull @.str.27, ptr noundef nonnull @t1ha0_ia32aes_avx, ptr noundef %5, i32 noundef %0, i64 noundef -43)
  br label %33

33:                                               ; preds = %32, %30
  %34 = tail call zeroext i1 @is_selected(i32 noundef 1073741824)
  br i1 %34, label %35, label %36

35:                                               ; preds = %33
  tail call void @bench(ptr noundef nonnull @.str.28, ptr noundef nonnull @t1ha0_ia32aes_avx2_a, ptr noundef %5, i32 noundef %0, i64 noundef -43)
  tail call void @bench(ptr noundef nonnull @.str.29, ptr noundef nonnull @t1ha0_ia32aes_avx2_b, ptr noundef %5, i32 noundef %0, i64 noundef -43)
  tail call void @bench(ptr noundef nonnull @.str.30, ptr noundef nonnull @t1ha0_ia32aes_avx2, ptr noundef %5, i32 noundef %0, i64 noundef -43)
  br label %36

36:                                               ; preds = %33, %35, %28
  %37 = tail call zeroext i1 @is_selected(i32 noundef 16)
  br i1 %37, label %38, label %39

38:                                               ; preds = %36
  tail call void @bench(ptr noundef nonnull @.str.31, ptr noundef nonnull @thunk_XXH32, ptr noundef %5, i32 noundef %0, i64 noundef 4294967253)
  tail call void @bench(ptr noundef nonnull @.str.32, ptr noundef nonnull @XXH64, ptr noundef %5, i32 noundef %0, i64 noundef -43)
  br label %39

39:                                               ; preds = %38, %36
  %40 = tail call zeroext i1 @is_selected(i32 noundef 64)
  br i1 %40, label %41, label %42

41:                                               ; preds = %39
  tail call void @bench(ptr noundef nonnull @.str.33, ptr noundef nonnull @thunk_StadtX, ptr noundef %5, i32 noundef %0, i64 noundef -43)
  br label %42

42:                                               ; preds = %41, %39
  %43 = tail call zeroext i1 @is_selected(i32 noundef 32)
  br i1 %43, label %44, label %52

44:                                               ; preds = %42
  tail call void @bench(ptr noundef nonnull @.str.34, ptr noundef nonnull @thunk_HighwayHash64_pure_c, ptr noundef %5, i32 noundef %0, i64 noundef -43)
  tail call void @bench(ptr noundef nonnull @.str.35, ptr noundef nonnull @thunk_HighwayHash64_Portable, ptr noundef %5, i32 noundef %0, i64 noundef -43)
  %45 = load i32, ptr getelementptr inbounds (i8, ptr @ia32_cpu_features, i64 4), align 4, !tbaa !10
  %46 = and i32 %45, 524288
  %.not = icmp eq i32 %46, 0
  br i1 %.not, label %48, label %47

47:                                               ; preds = %44
  tail call void @bench(ptr noundef nonnull @.str.36, ptr noundef nonnull @thunk_HighwayHash64_SSE41, ptr noundef %5, i32 noundef %0, i64 noundef -43)
  br label %48

48:                                               ; preds = %47, %44
  %49 = load i32, ptr getelementptr inbounds (i8, ptr @ia32_cpu_features, i64 12), align 4, !tbaa !15
  %50 = and i32 %49, 32
  %.not60 = icmp eq i32 %50, 0
  br i1 %.not60, label %52, label %51

51:                                               ; preds = %48
  tail call void @bench(ptr noundef nonnull @.str.37, ptr noundef nonnull @thunk_HighwayHash64_AVX2, ptr noundef %5, i32 noundef %0, i64 noundef -43)
  br label %52

52:                                               ; preds = %48, %51, %42
  tail call void @free(ptr noundef %5) #8
  ret void
}

; Function Attrs: mustprogress nofree nounwind willreturn allockind("alloc,uninitialized") allocsize(0) memory(inaccessiblemem: readwrite)
declare noalias noundef ptr @malloc(i64 noundef) local_unnamed_addr #2

; Function Attrs: nounwind
declare i32 @rand() local_unnamed_addr #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i1 @is_selected(i32 noundef) local_unnamed_addr #4

declare hidden i64 @t1ha2_atonce(ptr noundef, i64 noundef, i64 noundef) #5

declare i64 @thunk_t1ha2_atonce128(ptr noundef, i64 noundef, i64 noundef) #5

declare i64 @thunk_t1ha2_stream(ptr noundef, i64 noundef, i64 noundef) #5

declare i64 @thunk_t1ha2_stream128(ptr noundef, i64 noundef, i64 noundef) #5

declare hidden i64 @t1ha1_le(ptr noundef, i64 noundef, i64 noundef) #5

declare hidden i64 @t1ha1_be(ptr noundef, i64 noundef, i64 noundef) #5

declare hidden i64 @t1ha0(ptr noundef, i64 noundef, i64 noundef) #5

declare hidden i64 @t1ha0_32le(ptr noundef, i64 noundef, i64 noundef) #5

declare hidden i64 @t1ha0_32be(ptr noundef, i64 noundef, i64 noundef) #5

declare i64 @t1ha0_ia32aes_noavx_a(ptr noundef, i64 noundef, i64 noundef) #5

declare i64 @t1ha0_ia32aes_noavx_b(ptr noundef, i64 noundef, i64 noundef) #5

declare hidden i64 @t1ha0_ia32aes_noavx(ptr noundef, i64 noundef, i64 noundef) #5

declare i64 @t1ha0_ia32aes_avx_a(ptr noundef, i64 noundef, i64 noundef) #5

declare i64 @t1ha0_ia32aes_avx_b(ptr noundef, i64 noundef, i64 noundef) #5

declare hidden i64 @t1ha0_ia32aes_avx(ptr noundef, i64 noundef, i64 noundef) #5

declare i64 @t1ha0_ia32aes_avx2_a(ptr noundef, i64 noundef, i64 noundef) #5

declare i64 @t1ha0_ia32aes_avx2_b(ptr noundef, i64 noundef, i64 noundef) #5

declare hidden i64 @t1ha0_ia32aes_avx2(ptr noundef, i64 noundef, i64 noundef) #5

declare i64 @XXH64(ptr noundef, i64 noundef, i64 noundef) #5

declare i64 @thunk_StadtX(ptr noundef, i64 noundef, i64 noundef) #5

declare i64 @thunk_HighwayHash64_Portable(ptr noundef, i64 noundef, i64 noundef) #5

declare i64 @thunk_HighwayHash64_SSE41(ptr noundef, i64 noundef, i64 noundef) #5

declare i64 @thunk_HighwayHash64_AVX2(ptr noundef, i64 noundef, i64 noundef) #5

; Function Attrs: mustprogress nounwind willreturn allockind("free") memory(argmem: readwrite, inaccessiblemem: readwrite)
declare void @free(ptr allocptr nocapture noundef) local_unnamed_addr #6

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nofree nounwind willreturn allockind("alloc,uninitialized") allocsize(0) memory(inaccessiblemem: readwrite) "alloc-family"="malloc" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { mustprogress nounwind willreturn allockind("free") memory(argmem: readwrite, inaccessiblemem: readwrite) "alloc-family"="malloc" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind allocsize(0) }
attributes #8 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}
!10 = !{!11, !13, i64 4}
!11 = !{!"_ia32_cpu_features", !12, i64 0, !12, i64 12, !14, i64 24, !14, i64 32}
!12 = !{!"", !13, i64 0, !13, i64 4, !13, i64 8}
!13 = !{!"int", !6, i64 0}
!14 = !{!"", !13, i64 0, !13, i64 4}
!15 = !{!11, !13, i64 12}


; Effective O3 passes: CorrelatedValuePropagationPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass