; LLVM IR from Shah-Shishir/Codeforces-Solutions :: 916A. Jamie and Alarm Snooze (main)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [9 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [3 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [4 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z12doesContain7i(i32 noundef) #0

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #1 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  br label %6

6:                                                ; preds = %67, %0
  %7 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef %2, ptr noundef %3, ptr noundef %4)
  %8 = icmp ne i32 %7, -1
  br i1 %8, label %9, label %68

9:                                                ; preds = %6
  %10 = load i32, ptr %3, align 4, !tbaa !5
  %11 = call noundef zeroext i1 @_Z12doesContain7i(i32 noundef %10)
  br i1 %11, label %15, label %12

12:                                               ; preds = %9
  %13 = load i32, ptr %4, align 4, !tbaa !5
  %14 = call noundef zeroext i1 @_Z12doesContain7i(i32 noundef %13)
  br i1 %14, label %15, label %17

15:                                               ; preds = %12, %9
  %16 = call i32 (ptr, ...) @printf(ptr noundef @.str.1)
  br label %67

17:                                               ; preds = %12
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  store i32 0, ptr %5, align 4, !tbaa !5
  br label %18

18:                                               ; preds = %63, %17
  br label %19

19:                                               ; preds = %18
  %20 = load i32, ptr %4, align 4, !tbaa !5
  %21 = load i32, ptr %2, align 4, !tbaa !5
  %22 = sub nsw i32 %20, %21
  %23 = icmp eq i32 %22, 0
  br i1 %23, label %24, label %25

24:                                               ; preds = %19
  store i32 60, ptr %4, align 4, !tbaa !5
  br label %42

25:                                               ; preds = %19
  %26 = load i32, ptr %4, align 4, !tbaa !5
  %27 = load i32, ptr %2, align 4, !tbaa !5
  %28 = sub nsw i32 %26, %27
  %29 = icmp slt i32 %28, 0
  br i1 %29, label %30, label %37

30:                                               ; preds = %25
  %31 = load i32, ptr %2, align 4, !tbaa !5
  %32 = load i32, ptr %4, align 4, !tbaa !5
  %33 = sub nsw i32 %31, %32
  %34 = sub nsw i32 60, %33
  store i32 %34, ptr %4, align 4, !tbaa !5
  %35 = load i32, ptr %3, align 4, !tbaa !5
  %36 = add nsw i32 %35, -1
  store i32 %36, ptr %3, align 4, !tbaa !5
  br label %41

37:                                               ; preds = %25
  %38 = load i32, ptr %2, align 4, !tbaa !5
  %39 = load i32, ptr %4, align 4, !tbaa !5
  %40 = sub nsw i32 %39, %38
  store i32 %40, ptr %4, align 4, !tbaa !5
  br label %41

41:                                               ; preds = %37, %30
  br label %42

42:                                               ; preds = %41, %24
  %43 = load i32, ptr %5, align 4, !tbaa !5
  %44 = add nsw i32 %43, 1
  store i32 %44, ptr %5, align 4, !tbaa !5
  %45 = load i32, ptr %3, align 4, !tbaa !5
  %46 = icmp slt i32 %45, 0
  br i1 %46, label %47, label %50

47:                                               ; preds = %42
  %48 = load i32, ptr %3, align 4, !tbaa !5
  %49 = add nsw i32 24, %48
  store i32 %49, ptr %3, align 4, !tbaa !5
  br label %50

50:                                               ; preds = %47, %42
  %51 = load i32, ptr %3, align 4, !tbaa !5
  %52 = call noundef zeroext i1 @_Z12doesContain7i(i32 noundef %51)
  br i1 %52, label %56, label %53

53:                                               ; preds = %50
  %54 = load i32, ptr %4, align 4, !tbaa !5
  %55 = call noundef zeroext i1 @_Z12doesContain7i(i32 noundef %54)
  br i1 %55, label %56, label %57

56:                                               ; preds = %53, %50
  br label %64

57:                                               ; preds = %53
  %58 = load i32, ptr %4, align 4, !tbaa !5
  %59 = icmp eq i32 %58, 60
  br i1 %59, label %60, label %63

60:                                               ; preds = %57
  %61 = load i32, ptr %3, align 4, !tbaa !5
  %62 = add nsw i32 %61, -1
  store i32 %62, ptr %3, align 4, !tbaa !5
  br label %63

63:                                               ; preds = %60, %57
  br label %18, !llvm.loop !9

64:                                               ; preds = %56
  %65 = load i32, ptr %5, align 4, !tbaa !5
  %66 = call i32 (ptr, ...) @printf(ptr noundef @.str.2, i32 noundef %65)
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  br label %67

67:                                               ; preds = %64, %15
  br label %6, !llvm.loop !11

68:                                               ; preds = %6
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #4
  ret i32 0
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

declare i32 @__isoc99_scanf(ptr noundef, ...) #3

declare i32 @printf(ptr noundef, ...) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [9 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [3 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [4 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z12doesContain7i(i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress norecurse nounwind uwtable
define dso_local noundef i32 @main() local_unnamed_addr #1 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #4
  %4 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull %1, ptr noundef nonnull %2, ptr noundef nonnull %3)
  %.not4 = icmp eq i32 %4, -1
  br i1 %.not4, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %0, %41
  %5 = load i32, ptr %2, align 4, !tbaa !5
  %6 = call noundef zeroext i1 @_Z12doesContain7i(i32 noundef %5)
  br i1 %6, label %10, label %7

7:                                                ; preds = %.lr.ph
  %8 = load i32, ptr %3, align 4, !tbaa !5
  %9 = call noundef zeroext i1 @_Z12doesContain7i(i32 noundef %8)
  br i1 %9, label %10, label %.preheader.preheader

.preheader.preheader:                             ; preds = %7
  %.pre = load i32, ptr %3, align 4, !tbaa !5
  br label %.preheader

10:                                               ; preds = %7, %.lr.ph
  %11 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1)
  br label %41

.preheader:                                       ; preds = %.preheader.backedge, %.preheader.preheader
  %12 = phi i32 [ %.pre, %.preheader.preheader ], [ %34, %.preheader.backedge ]
  %.0 = phi i32 [ 0, %.preheader.preheader ], [ %23, %.preheader.backedge ]
  %13 = load i32, ptr %1, align 4, !tbaa !5
  %14 = sub i32 %12, %13
  %15 = icmp eq i32 %12, %13
  br i1 %15, label %.preheader.thread-pre-split_crit_edge, label %16

.preheader.thread-pre-split_crit_edge:            ; preds = %.preheader
  %.pr.pre = load i32, ptr %2, align 4, !tbaa !5
  br label %thread-pre-split

16:                                               ; preds = %.preheader
  %17 = icmp slt i32 %14, 0
  %.pr.pre5 = load i32, ptr %2, align 4, !tbaa !5
  br i1 %17, label %18, label %thread-pre-split

18:                                               ; preds = %16
  %19 = add nsw i32 %14, 60
  store i32 %19, ptr %3, align 4, !tbaa !5
  %20 = add nsw i32 %.pr.pre5, -1
  store i32 %20, ptr %2, align 4, !tbaa !5
  br label %21

thread-pre-split:                                 ; preds = %.preheader.thread-pre-split_crit_edge, %16
  %.pr = phi i32 [ %.pr.pre, %.preheader.thread-pre-split_crit_edge ], [ %.pr.pre5, %16 ]
  %storemerge = phi i32 [ 60, %.preheader.thread-pre-split_crit_edge ], [ %14, %16 ]
  store i32 %storemerge, ptr %3, align 4, !tbaa !5
  br label %21

21:                                               ; preds = %thread-pre-split, %18
  %22 = phi i32 [ %.pr, %thread-pre-split ], [ %20, %18 ]
  %23 = add nuw nsw i32 %.0, 1
  %24 = icmp slt i32 %22, 0
  br i1 %24, label %25, label %27

25:                                               ; preds = %21
  %26 = add nsw i32 %22, 24
  store i32 %26, ptr %2, align 4, !tbaa !5
  br label %27

27:                                               ; preds = %25, %21
  %28 = phi i32 [ %26, %25 ], [ %22, %21 ]
  %29 = call noundef zeroext i1 @_Z12doesContain7i(i32 noundef %28)
  br i1 %29, label %39, label %30

30:                                               ; preds = %27
  %31 = load i32, ptr %3, align 4, !tbaa !5
  %32 = call noundef zeroext i1 @_Z12doesContain7i(i32 noundef %31)
  br i1 %32, label %39, label %33

33:                                               ; preds = %30
  %34 = load i32, ptr %3, align 4, !tbaa !5
  %35 = icmp eq i32 %34, 60
  br i1 %35, label %36, label %.preheader.backedge

36:                                               ; preds = %33
  %37 = load i32, ptr %2, align 4, !tbaa !5
  %38 = add nsw i32 %37, -1
  store i32 %38, ptr %2, align 4, !tbaa !5
  br label %.preheader.backedge

.preheader.backedge:                              ; preds = %36, %33
  br label %.preheader, !llvm.loop !9

39:                                               ; preds = %27, %30
  %40 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.2, i32 noundef %23)
  br label %41

41:                                               ; preds = %39, %10
  %42 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull %1, ptr noundef nonnull %2, ptr noundef nonnull %3)
  %.not = icmp eq i32 %42, -1
  br i1 %.not, label %._crit_edge, label %.lr.ph, !llvm.loop !11

._crit_edge:                                      ; preds = %41, %0
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #4
  ret i32 0
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nofree nounwind
declare noundef i32 @__isoc99_scanf(ptr nocapture noundef readonly, ...) local_unnamed_addr #3

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #3

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass