; LLVM IR from reazon-research/OpenArm :: control/canfd_control/Core/Src (tim)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.GPIO_InitTypeDef = type { i32, i32, i32, i32, i32 }
%struct.TIM_HandleTypeDef = type { ptr, %struct.TIM_Base_InitTypeDef, i32, [7 x ptr], i32, i32, [6 x i32], [4 x i32], i32 }
%struct.TIM_Base_InitTypeDef = type { i32, i32, i32, i32, i32, i32 }
%struct.RCC_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [9 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i32] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @HAL_GPIO_Init(ptr noundef, ptr noundef) #2

; Function Attrs: nounwind uwtable
define dso_local void @HAL_TIM_Base_MspInit(ptr noundef %0) #3 {
  %2 = alloca ptr, align 8
  %3 = alloca %struct.GPIO_InitTypeDef, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 20, ptr %3) #4
  call void @llvm.memset.p0.i64(ptr align 4 %3, i8 0, i64 20, i1 false)
  %6 = load ptr, ptr %2, align 8, !tbaa !5
  %7 = getelementptr inbounds %struct.TIM_HandleTypeDef, ptr %6, i32 0, i32 0
  %8 = load ptr, ptr %7, align 8, !tbaa !9
  %9 = icmp eq ptr %8, inttoptr (i64 1073741824 to ptr)
  br i1 %9, label %10, label %40

10:                                               ; preds = %1
  br label %11

11:                                               ; preds = %10
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  %12 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 50), align 4, !tbaa !13
  %13 = zext i32 %12 to i64
  %14 = or i64 %13, 1
  %15 = trunc i64 %14 to i32
  store volatile i32 %15, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 50), align 4, !tbaa !13
  %16 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 50), align 4, !tbaa !13
  %17 = zext i32 %16 to i64
  %18 = and i64 %17, 1
  %19 = trunc i64 %18 to i32
  store volatile i32 %19, ptr %4, align 4, !tbaa !15
  %20 = load volatile i32, ptr %4, align 4, !tbaa !15
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  br label %21

21:                                               ; preds = %11
  br label %22

22:                                               ; preds = %21
  br label %23

23:                                               ; preds = %22
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  %24 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 48), align 4, !tbaa !16
  %25 = zext i32 %24 to i64
  %26 = or i64 %25, 1
  %27 = trunc i64 %26 to i32
  store volatile i32 %27, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 48), align 4, !tbaa !16
  %28 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 48), align 4, !tbaa !16
  %29 = zext i32 %28 to i64
  %30 = and i64 %29, 1
  %31 = trunc i64 %30 to i32
  store volatile i32 %31, ptr %5, align 4, !tbaa !15
  %32 = load volatile i32, ptr %5, align 4, !tbaa !15
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  br label %33

33:                                               ; preds = %23
  br label %34

34:                                               ; preds = %33
  %35 = getelementptr inbounds %struct.GPIO_InitTypeDef, ptr %3, i32 0, i32 0
  store i32 5, ptr %35, align 4, !tbaa !17
  %36 = getelementptr inbounds %struct.GPIO_InitTypeDef, ptr %3, i32 0, i32 1
  store i32 2, ptr %36, align 4, !tbaa !19
  %37 = getelementptr inbounds %struct.GPIO_InitTypeDef, ptr %3, i32 0, i32 2
  store i32 0, ptr %37, align 4, !tbaa !20
  %38 = getelementptr inbounds %struct.GPIO_InitTypeDef, ptr %3, i32 0, i32 3
  store i32 0, ptr %38, align 4, !tbaa !21
  %39 = getelementptr inbounds %struct.GPIO_InitTypeDef, ptr %3, i32 0, i32 4
  store i32 1, ptr %39, align 4, !tbaa !22
  call void @HAL_GPIO_Init(ptr noundef inttoptr (i64 1476526080 to ptr), ptr noundef %3)
  call void @HAL_NVIC_SetPriority(i32 noundef 28, i32 noundef 0, i32 noundef 0)
  call void @HAL_NVIC_EnableIRQ(i32 noundef 28)
  br label %40

40:                                               ; preds = %34, %1
  call void @llvm.lifetime.end.p0(i64 20, ptr %3) #4
  ret void
}

declare void @HAL_NVIC_SetPriority(i32 noundef, i32 noundef, i32 noundef) #2

declare void @HAL_NVIC_EnableIRQ(i32 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"", !6, i64 0, !11, i64 8, !12, i64 32, !7, i64 40, !12, i64 96, !12, i64 100, !7, i64 104, !7, i64 128, !12, i64 144}
!11 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !12, i64 232}
!14 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44, !12, i64 48, !12, i64 52, !12, i64 56, !12, i64 60, !12, i64 64, !12, i64 68, !12, i64 72, !12, i64 76, !12, i64 80, !12, i64 84, !12, i64 88, !12, i64 92, !12, i64 96, !12, i64 100, !12, i64 104, !12, i64 108, !12, i64 112, !12, i64 116, !12, i64 120, !12, i64 124, !12, i64 128, !12, i64 132, !12, i64 136, !12, i64 140, !12, i64 144, !12, i64 148, !12, i64 152, !12, i64 156, !12, i64 160, !12, i64 164, !12, i64 168, !7, i64 172, !12, i64 208, !12, i64 212, !12, i64 216, !12, i64 220, !12, i64 224, !12, i64 228, !12, i64 232, !12, i64 236, !12, i64 240, !12, i64 244, !12, i64 248, !12, i64 252, !12, i64 256, !12, i64 260, !12, i64 264, !12, i64 268, !12, i64 272, !12, i64 276, !12, i64 280, !12, i64 284, !7, i64 288}
!15 = !{!12, !12, i64 0}
!16 = !{!14, !12, i64 224}
!17 = !{!18, !12, i64 0}
!18 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16}
!19 = !{!18, !12, i64 4}
!20 = !{!18, !12, i64 8}
!21 = !{!18, !12, i64 12}
!22 = !{!18, !12, i64 16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.GPIO_InitTypeDef = type { i32, i32, i32, i32, i32 }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @HAL_GPIO_Init(ptr noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local void @HAL_TIM_Base_MspInit(ptr nocapture noundef readonly %0) local_unnamed_addr #3 {
  %2 = alloca %struct.GPIO_InitTypeDef, align 16
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 20, ptr nonnull %2) #4
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(20) %2, i8 0, i64 20, i1 false)
  %5 = load ptr, ptr %0, align 8, !tbaa !5
  %6 = icmp eq ptr %5, inttoptr (i64 1073741824 to ptr)
  br i1 %6, label %7, label %17

7:                                                ; preds = %1
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3)
  %8 = load volatile i32, ptr inttoptr (i64 1476543720 to ptr), align 8, !tbaa !12
  %9 = or i32 %8, 1
  store volatile i32 %9, ptr inttoptr (i64 1476543720 to ptr), align 8, !tbaa !12
  %10 = load volatile i32, ptr inttoptr (i64 1476543720 to ptr), align 8, !tbaa !12
  %11 = and i32 %10, 1
  store volatile i32 %11, ptr %3, align 4, !tbaa !14
  %.0..0..0..0.1 = load volatile i32, ptr %3, align 4, !tbaa !14
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3)
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4)
  %12 = load volatile i32, ptr inttoptr (i64 1476543712 to ptr), align 32, !tbaa !15
  %13 = or i32 %12, 1
  store volatile i32 %13, ptr inttoptr (i64 1476543712 to ptr), align 32, !tbaa !15
  %14 = load volatile i32, ptr inttoptr (i64 1476543712 to ptr), align 32, !tbaa !15
  %15 = and i32 %14, 1
  store volatile i32 %15, ptr %4, align 4, !tbaa !14
  %.0..0..0..0. = load volatile i32, ptr %4, align 4, !tbaa !14
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4)
  store <4 x i32> <i32 5, i32 2, i32 0, i32 0>, ptr %2, align 16, !tbaa !14
  %16 = getelementptr inbounds i8, ptr %2, i64 16
  store i32 1, ptr %16, align 16, !tbaa !16
  call void @HAL_GPIO_Init(ptr noundef nonnull inttoptr (i64 1476526080 to ptr), ptr noundef nonnull %2) #4
  call void @HAL_NVIC_SetPriority(i32 noundef 28, i32 noundef 0, i32 noundef 0) #4
  call void @HAL_NVIC_EnableIRQ(i32 noundef 28) #4
  br label %17

17:                                               ; preds = %7, %1
  call void @llvm.lifetime.end.p0(i64 20, ptr nonnull %2) #4
  ret void
}

declare void @HAL_NVIC_SetPriority(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

declare void @HAL_NVIC_EnableIRQ(i32 noundef) local_unnamed_addr #2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !10, i64 8, !11, i64 32, !8, i64 40, !11, i64 96, !11, i64 100, !8, i64 104, !8, i64 128, !11, i64 144}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !11, i64 232}
!13 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92, !11, i64 96, !11, i64 100, !11, i64 104, !11, i64 108, !11, i64 112, !11, i64 116, !11, i64 120, !11, i64 124, !11, i64 128, !11, i64 132, !11, i64 136, !11, i64 140, !11, i64 144, !11, i64 148, !11, i64 152, !11, i64 156, !11, i64 160, !11, i64 164, !11, i64 168, !8, i64 172, !11, i64 208, !11, i64 212, !11, i64 216, !11, i64 220, !11, i64 224, !11, i64 228, !11, i64 232, !11, i64 236, !11, i64 240, !11, i64 244, !11, i64 248, !11, i64 252, !11, i64 256, !11, i64 260, !11, i64 264, !11, i64 268, !11, i64 272, !11, i64 276, !11, i64 280, !11, i64 284, !8, i64 288}
!14 = !{!11, !11, i64 0}
!15 = !{!13, !11, i64 224}
!16 = !{!17, !11, i64 16}
!17 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SLPVectorizerPass,SROAPass,SimplifyCFGPass