; LLVM IR from ShahjalalShohag/code-library :: Number Theory/Rational Approximation.ll (Z11approximateex)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::pair" = type { i64, i64 }

; Function Attrs: mustprogress uwtable
define dso_local { i64, i64 } @_Z11approximateex(x86_fp80 noundef %0, i64 noundef %1) #0 {
  %3 = alloca %"struct.std::pair", align 8
  %4 = alloca x86_fp80, align 16
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = alloca x86_fp80, align 16
  %12 = alloca i64, align 8
  %13 = alloca i64, align 8
  %14 = alloca i64, align 8
  %15 = alloca i64, align 8
  %16 = alloca i64, align 8
  %17 = alloca i64, align 8
  %18 = alloca i64, align 8
  %19 = alloca i32, align 4
  store x86_fp80 %0, ptr %4, align 16, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #4
  store i64 0, ptr %6, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #4
  store i64 1, ptr %7, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #4
  store i64 1, ptr %8, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #4
  store i64 0, ptr %9, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #4
  store i64 9223372036854775807, ptr %10, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 16, ptr %11) #4
  %20 = load x86_fp80, ptr %4, align 16, !tbaa !5
  store x86_fp80 %20, ptr %11, align 16, !tbaa !5
  br label %21

21:                                               ; preds = %117, %2
  br label %22

22:                                               ; preds = %21
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #4
  %23 = load i64, ptr %8, align 8, !tbaa !9
  %24 = icmp ne i64 %23, 0
  br i1 %24, label %25, label %31

25:                                               ; preds = %22
  %26 = load i64, ptr %5, align 8, !tbaa !9
  %27 = load i64, ptr %6, align 8, !tbaa !9
  %28 = sub nsw i64 %26, %27
  %29 = load i64, ptr %8, align 8, !tbaa !9
  %30 = sdiv i64 %28, %29
  br label %33

31:                                               ; preds = %22
  %32 = load i64, ptr %10, align 8, !tbaa !9
  br label %33

33:                                               ; preds = %31, %25
  %34 = phi i64 [ %30, %25 ], [ %32, %31 ]
  store i64 %34, ptr %13, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #4
  %35 = load i64, ptr %9, align 8, !tbaa !9
  %36 = icmp ne i64 %35, 0
  br i1 %36, label %37, label %43

37:                                               ; preds = %33
  %38 = load i64, ptr %5, align 8, !tbaa !9
  %39 = load i64, ptr %7, align 8, !tbaa !9
  %40 = sub nsw i64 %38, %39
  %41 = load i64, ptr %9, align 8, !tbaa !9
  %42 = sdiv i64 %40, %41
  br label %45

43:                                               ; preds = %33
  %44 = load i64, ptr %10, align 8, !tbaa !9
  br label %45

45:                                               ; preds = %43, %37
  %46 = phi i64 [ %42, %37 ], [ %44, %43 ]
  store i64 %46, ptr %14, align 8, !tbaa !9
  %47 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %13, ptr noundef nonnull align 8 dereferenceable(8) %14)
  %48 = load i64, ptr %47, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #4
  store i64 %48, ptr %12, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #4
  %49 = load x86_fp80, ptr %11, align 16, !tbaa !5
  %50 = call noundef x86_fp80 @_ZSt5floore(x86_fp80 noundef %49)
  %51 = fptosi x86_fp80 %50 to i64
  store i64 %51, ptr %15, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #4
  %52 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %15, ptr noundef nonnull align 8 dereferenceable(8) %12)
  %53 = load i64, ptr %52, align 8, !tbaa !9
  store i64 %53, ptr %16, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #4
  %54 = load i64, ptr %16, align 8, !tbaa !9
  %55 = load i64, ptr %8, align 8, !tbaa !9
  %56 = mul nsw i64 %54, %55
  %57 = load i64, ptr %6, align 8, !tbaa !9
  %58 = add nsw i64 %56, %57
  store i64 %58, ptr %17, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #4
  %59 = load i64, ptr %16, align 8, !tbaa !9
  %60 = load i64, ptr %9, align 8, !tbaa !9
  %61 = mul nsw i64 %59, %60
  %62 = load i64, ptr %7, align 8, !tbaa !9
  %63 = add nsw i64 %61, %62
  store i64 %63, ptr %18, align 8, !tbaa !9
  %64 = load i64, ptr %15, align 8, !tbaa !9
  %65 = load i64, ptr %16, align 8, !tbaa !9
  %66 = icmp sgt i64 %64, %65
  br i1 %66, label %67, label %98

67:                                               ; preds = %45
  %68 = load x86_fp80, ptr %4, align 16, !tbaa !5
  %69 = load i64, ptr %17, align 8, !tbaa !9
  %70 = sitofp i64 %69 to x86_fp80
  %71 = load i64, ptr %18, align 8, !tbaa !9
  %72 = sitofp i64 %71 to x86_fp80
  %73 = fdiv x86_fp80 %70, %72
  %74 = fsub x86_fp80 %68, %73
  %75 = call noundef x86_fp80 @_ZSt3abse(x86_fp80 noundef %74)
  %76 = load x86_fp80, ptr %4, align 16, !tbaa !5
  %77 = load i64, ptr %8, align 8, !tbaa !9
  %78 = sitofp i64 %77 to x86_fp80
  %79 = load i64, ptr %9, align 8, !tbaa !9
  %80 = sitofp i64 %79 to x86_fp80
  %81 = fdiv x86_fp80 %78, %80
  %82 = fsub x86_fp80 %76, %81
  %83 = call noundef x86_fp80 @_ZSt3abse(x86_fp80 noundef %82)
  %84 = fcmp olt x86_fp80 %75, %83
  br i1 %84, label %85, label %91

85:                                               ; preds = %67
  %86 = call { i64, i64 } @_ZSt9make_pairIRxS0_ESt4pairINSt25__strip_reference_wrapperINSt5decayIT_E4typeEE6__typeENS2_INS3_IT0_E4typeEE6__typeEEOS4_OS9_(ptr noundef nonnull align 8 dereferenceable(8) %17, ptr noundef nonnull align 8 dereferenceable(8) %18)
  %87 = getelementptr inbounds { i64, i64 }, ptr %3, i32 0, i32 0
  %88 = extractvalue { i64, i64 } %86, 0
  store i64 %88, ptr %87, align 8
  %89 = getelementptr inbounds { i64, i64 }, ptr %3, i32 0, i32 1
  %90 = extractvalue { i64, i64 } %86, 1
  store i64 %90, ptr %89, align 8
  br label %97

91:                                               ; preds = %67
  %92 = call { i64, i64 } @_ZSt9make_pairIRxS0_ESt4pairINSt25__strip_reference_wrapperINSt5decayIT_E4typeEE6__typeENS2_INS3_IT0_E4typeEE6__typeEEOS4_OS9_(ptr noundef nonnull align 8 dereferenceable(8) %8, ptr noundef nonnull align 8 dereferenceable(8) %9)
  %93 = getelementptr inbounds { i64, i64 }, ptr %3, i32 0, i32 0
  %94 = extractvalue { i64, i64 } %92, 0
  store i64 %94, ptr %93, align 8
  %95 = getelementptr inbounds { i64, i64 }, ptr %3, i32 0, i32 1
  %96 = extractvalue { i64, i64 } %92, 1
  store i64 %96, ptr %95, align 8
  br label %97

97:                                               ; preds = %91, %85
  store i32 1, ptr %19, align 4
  br label %115

98:                                               ; preds = %45
  %99 = load x86_fp80, ptr %11, align 16, !tbaa !5
  %100 = load i64, ptr %15, align 8, !tbaa !9
  %101 = sitofp i64 %100 to x86_fp80
  %102 = fsub x86_fp80 %99, %101
  %103 = fdiv x86_fp80 0xK3FFF8000000000000000, %102
  store x86_fp80 %103, ptr %11, align 16, !tbaa !5
  %104 = call noundef x86_fp80 @_ZSt3abse(x86_fp80 noundef %103)
  %105 = load i64, ptr %5, align 8, !tbaa !9
  %106 = mul nsw i64 3, %105
  %107 = sitofp i64 %106 to x86_fp80
  %108 = fcmp ogt x86_fp80 %104, %107
  br i1 %108, label %109, label %110

109:                                              ; preds = %98
  call void @_ZNSt4pairIxxEC2IRxS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 8 dereferenceable(16) %3, ptr noundef nonnull align 8 dereferenceable(8) %17, ptr noundef nonnull align 8 dereferenceable(8) %18)
  store i32 1, ptr %19, align 4
  br label %115

110:                                              ; preds = %98
  %111 = load i64, ptr %8, align 8, !tbaa !9
  store i64 %111, ptr %6, align 8, !tbaa !9
  %112 = load i64, ptr %17, align 8, !tbaa !9
  store i64 %112, ptr %8, align 8, !tbaa !9
  %113 = load i64, ptr %9, align 8, !tbaa !9
  store i64 %113, ptr %7, align 8, !tbaa !9
  %114 = load i64, ptr %18, align 8, !tbaa !9
  store i64 %114, ptr %9, align 8, !tbaa !9
  store i32 0, ptr %19, align 4
  br label %115

115:                                              ; preds = %110, %109, %97
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #4
  %116 = load i32, ptr %19, align 4
  switch i32 %116, label %118 [
    i32 0, label %117
  ]

117:                                              ; preds = %115
  br label %21, !llvm.loop !11

118:                                              ; preds = %115
  call void @llvm.lifetime.end.p0(i64 16, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #4
  %119 = load { i64, i64 }, ptr %3, align 8
  ret { i64, i64 } %119
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef x86_fp80 @_ZSt5floore(x86_fp80 noundef) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef x86_fp80 @_ZSt3abse(x86_fp80 noundef) #2

; Function Attrs: mustprogress uwtable
declare dso_local { i64, i64 } @_ZSt9make_pairIRxS0_ESt4pairINSt25__strip_reference_wrapperINSt5decayIT_E4typeEE6__typeENS2_INS3_IT0_E4typeEE6__typeEEOS4_OS9_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt4pairIxxEC2IRxS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #3 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::pair" = type { i64, i64 }

; Function Attrs: mustprogress uwtable
define dso_local { i64, i64 } @_Z11approximateex(x86_fp80 noundef %0, i64 noundef %1) local_unnamed_addr #0 {
  %3 = alloca %"struct.std::pair", align 8
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #4
  store i64 1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #4
  store i64 0, ptr %5, align 8, !tbaa !5
  %12 = mul nsw i64 %1, 3
  %13 = sitofp i64 %12 to x86_fp80
  br label %16

thread-pre-split:                                 ; preds = %61
  %14 = load i64, ptr %10, align 8, !tbaa !5
  store i64 %14, ptr %4, align 8, !tbaa !5
  %15 = load i64, ptr %11, align 8, !tbaa !5
  store i64 %15, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %11) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %10) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %9) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #4
  br label %16

16:                                               ; preds = %thread-pre-split, %2
  %17 = phi i64 [ %15, %thread-pre-split ], [ 0, %2 ]
  %18 = phi i64 [ %14, %thread-pre-split ], [ 1, %2 ]
  %.020 = phi i64 [ %17, %thread-pre-split ], [ 1, %2 ]
  %.018 = phi x86_fp80 [ %64, %thread-pre-split ], [ %0, %2 ]
  %.017 = phi i64 [ %18, %thread-pre-split ], [ 0, %2 ]
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %7) #4
  %.not = icmp eq i64 %18, 0
  br i1 %.not, label %22, label %19

19:                                               ; preds = %16
  %20 = sub nsw i64 %1, %.017
  %21 = sdiv i64 %20, %18
  br label %22

22:                                               ; preds = %16, %19
  %23 = phi i64 [ %21, %19 ], [ 9223372036854775807, %16 ]
  store i64 %23, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %8) #4
  %.not25 = icmp eq i64 %17, 0
  br i1 %.not25, label %27, label %24

24:                                               ; preds = %22
  %25 = sub nsw i64 %1, %.020
  %26 = sdiv i64 %25, %17
  br label %27

27:                                               ; preds = %22, %24
  %28 = phi i64 [ %26, %24 ], [ 9223372036854775807, %22 ]
  store i64 %28, ptr %8, align 8, !tbaa !5
  %29 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %7, ptr noundef nonnull align 8 dereferenceable(8) %8)
  %30 = load i64, ptr %29, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %8) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #4
  store i64 %30, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %9) #4
  %31 = call noundef x86_fp80 @_ZSt5floore(x86_fp80 noundef %.018)
  %32 = fptosi x86_fp80 %31 to i64
  store i64 %32, ptr %9, align 8, !tbaa !5
  %33 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %9, ptr noundef nonnull align 8 dereferenceable(8) %6)
  %34 = load i64, ptr %33, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %10) #4
  %35 = mul nsw i64 %18, %34
  %36 = add nsw i64 %35, %.017
  store i64 %36, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %11) #4
  %37 = mul nsw i64 %17, %34
  %38 = add nsw i64 %37, %.020
  store i64 %38, ptr %11, align 8, !tbaa !5
  %39 = load i64, ptr %9, align 8, !tbaa !5
  %40 = icmp sgt i64 %39, %34
  br i1 %40, label %41, label %61

41:                                               ; preds = %27
  %42 = sitofp i64 %36 to x86_fp80
  %43 = sitofp i64 %38 to x86_fp80
  %44 = fdiv x86_fp80 %42, %43
  %45 = fsub x86_fp80 %0, %44
  %46 = call noundef x86_fp80 @_ZSt3abse(x86_fp80 noundef %45)
  %47 = sitofp i64 %18 to x86_fp80
  %48 = sitofp i64 %17 to x86_fp80
  %49 = fdiv x86_fp80 %47, %48
  %50 = fsub x86_fp80 %0, %49
  %51 = call noundef x86_fp80 @_ZSt3abse(x86_fp80 noundef %50)
  %52 = fcmp olt x86_fp80 %46, %51
  br i1 %52, label %53, label %57

53:                                               ; preds = %41
  %54 = call { i64, i64 } @_ZSt9make_pairIRxS0_ESt4pairINSt25__strip_reference_wrapperINSt5decayIT_E4typeEE6__typeENS2_INS3_IT0_E4typeEE6__typeEEOS4_OS9_(ptr noundef nonnull align 8 dereferenceable(8) %10, ptr noundef nonnull align 8 dereferenceable(8) %11)
  %55 = extractvalue { i64, i64 } %54, 0
  %56 = extractvalue { i64, i64 } %54, 1
  br label %68

57:                                               ; preds = %41
  %58 = call { i64, i64 } @_ZSt9make_pairIRxS0_ESt4pairINSt25__strip_reference_wrapperINSt5decayIT_E4typeEE6__typeENS2_INS3_IT0_E4typeEE6__typeEEOS4_OS9_(ptr noundef nonnull align 8 dereferenceable(8) %4, ptr noundef nonnull align 8 dereferenceable(8) %5)
  %59 = extractvalue { i64, i64 } %58, 0
  %60 = extractvalue { i64, i64 } %58, 1
  br label %68

61:                                               ; preds = %27
  %62 = sitofp i64 %39 to x86_fp80
  %63 = fsub x86_fp80 %.018, %62
  %64 = fdiv x86_fp80 0xK3FFF8000000000000000, %63
  %65 = call noundef x86_fp80 @_ZSt3abse(x86_fp80 noundef %64)
  %66 = fcmp ogt x86_fp80 %65, %13
  br i1 %66, label %67, label %thread-pre-split

67:                                               ; preds = %61
  call void @_ZNSt4pairIxxEC2IRxS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 8 dereferenceable(16) %3, ptr noundef nonnull align 8 dereferenceable(8) %10, ptr noundef nonnull align 8 dereferenceable(8) %11)
  %.fca.0.load.pre = load i64, ptr %3, align 8
  %.fca.1.gep.phi.trans.insert = getelementptr inbounds i8, ptr %3, i64 8
  %.fca.1.load.pre = load i64, ptr %.fca.1.gep.phi.trans.insert, align 8
  br label %68

68:                                               ; preds = %67, %57, %53
  %.fca.1.load = phi i64 [ %.fca.1.load.pre, %67 ], [ %60, %57 ], [ %56, %53 ]
  %.fca.0.load = phi i64 [ %.fca.0.load.pre, %67 ], [ %59, %57 ], [ %55, %53 ]
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %11) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %10) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %9) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #4
  %.fca.0.insert = insertvalue { i64, i64 } poison, i64 %.fca.0.load, 0
  %.fca.1.insert = insertvalue { i64, i64 } %.fca.0.insert, i64 %.fca.1.load, 1
  ret { i64, i64 } %.fca.1.insert
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef x86_fp80 @_ZSt5floore(x86_fp80 noundef) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef x86_fp80 @_ZSt3abse(x86_fp80 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare dso_local { i64, i64 } @_ZSt9make_pairIRxS0_ESt4pairINSt25__strip_reference_wrapperINSt5decayIT_E4typeEE6__typeENS2_INS3_IT0_E4typeEE6__typeEEOS4_OS9_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt4pairIxxEC2IRxS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #3 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: BDCEPass,DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass