; LLVM IR from Columbitech/rohc :: src (ctcp_profile)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.ROHC::tcphdr" = type { i16, i16, i32, i32, i16, i16, i16, i16 }
%"class.ROHC::CProfile" = type { ptr, ptr, i16, i64, i32, i32, i32, i32, i64, i64, i32, i32, i16, %"class.ROHC::WLSB", i32, i32, i8, i32, i32, i32, %"struct.ROHC::iphdr", i16, i16, %"class.ROHC::WLSB", [11 x i64] }
%"struct.ROHC::iphdr" = type { i8, i8, i16, i16, i16, i8, i8, i16, i32, i32 }
%"class.ROHC::WLSB" = type { %"class.std::vector", i64, i64, i64, i32, i32 }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<ROHC::WLSB<int>::LSB, std::allocator<ROHC::WLSB<int>::LSB>>::_Vector_impl" }
%"struct.std::_Vector_base<ROHC::WLSB<int>::LSB, std::allocator<ROHC::WLSB<int>::LSB>>::_Vector_impl" = type { %"struct.std::_Vector_base<ROHC::WLSB<int>::LSB, std::allocator<ROHC::WLSB<int>::LSB>>::_Vector_impl_data" }
%"struct.std::_Vector_base<ROHC::WLSB<int>::LSB, std::allocator<ROHC::WLSB<int>::LSB>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIhSaIhEE9push_backERKh(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 1 dereferenceable(1)) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4ROHC10AppendDataItEEvRSt6vectorIhSaIhEERKT_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 2 dereferenceable(2)) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4ROHC11CTCPProfile18create_tcp_dynamicEPKNS_6tcphdrERSt6vectorIhSaIhEE(ptr noundef nonnull align 8 dereferenceable(348) %0, ptr noundef %1, ptr noundef nonnull align 8 dereferenceable(24) %2) #1 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i8, align 1
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !5
  %8 = load ptr, ptr %4, align 8
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #2
  store i8 0, ptr %7, align 1, !tbaa !9
  %9 = load ptr, ptr %5, align 8, !tbaa !5
  %10 = getelementptr inbounds %"struct.ROHC::tcphdr", ptr %9, i32 0, i32 4
  %11 = load i16, ptr %10, align 4
  %12 = lshr i16 %11, 9
  %13 = and i16 %12, 1
  %14 = trunc i16 %13 to i8
  %15 = icmp ne i8 %14, 0
  br i1 %15, label %16, label %21

16:                                               ; preds = %3
  %17 = load i8, ptr %7, align 1, !tbaa !9
  %18 = zext i8 %17 to i32
  %19 = or i32 %18, 128
  %20 = trunc i32 %19 to i8
  store i8 %20, ptr %7, align 1, !tbaa !9
  br label %21

21:                                               ; preds = %16, %3
  %22 = load ptr, ptr %5, align 8, !tbaa !5
  %23 = getelementptr inbounds %"struct.ROHC::tcphdr", ptr %22, i32 0, i32 4
  %24 = load i16, ptr %23, align 4
  %25 = lshr i16 %24, 11
  %26 = and i16 %25, 1
  %27 = trunc i16 %26 to i8
  %28 = icmp ne i8 %27, 0
  br i1 %28, label %29, label %39

29:                                               ; preds = %21
  %30 = load ptr, ptr %5, align 8, !tbaa !5
  %31 = getelementptr inbounds %"struct.ROHC::tcphdr", ptr %30, i32 0, i32 3
  %32 = load i32, ptr %31, align 4, !tbaa !10
  %33 = icmp ne i32 %32, 0
  br i1 %33, label %34, label %39

34:                                               ; preds = %29
  %35 = load i8, ptr %7, align 1, !tbaa !9
  %36 = zext i8 %35 to i32
  %37 = or i32 %36, 32
  %38 = trunc i32 %37 to i8
  store i8 %38, ptr %7, align 1, !tbaa !9
  br label %39

39:                                               ; preds = %34, %29, %21
  %40 = load ptr, ptr %5, align 8, !tbaa !5
  %41 = getelementptr inbounds %"struct.ROHC::tcphdr", ptr %40, i32 0, i32 4
  %42 = load i16, ptr %41, align 4
  %43 = lshr i16 %42, 10
  %44 = and i16 %43, 1
  %45 = trunc i16 %44 to i8
  %46 = icmp ne i8 %45, 0
  br i1 %46, label %47, label %57

47:                                               ; preds = %39
  %48 = load ptr, ptr %5, align 8, !tbaa !5
  %49 = getelementptr inbounds %"struct.ROHC::tcphdr", ptr %48, i32 0, i32 7
  %50 = load i16, ptr %49, align 2, !tbaa !14
  %51 = icmp ne i16 %50, 0
  br i1 %51, label %52, label %57

52:                                               ; preds = %47
  %53 = load i8, ptr %7, align 1, !tbaa !9
  %54 = zext i8 %53 to i32
  %55 = or i32 %54, 16
  %56 = trunc i32 %55 to i8
  store i8 %56, ptr %7, align 1, !tbaa !9
  br label %57

57:                                               ; preds = %52, %47, %39
  %58 = load ptr, ptr %5, align 8, !tbaa !5
  %59 = getelementptr inbounds %"struct.ROHC::tcphdr", ptr %58, i32 0, i32 4
  %60 = load i16, ptr %59, align 4
  %61 = lshr i16 %60, 4
  %62 = and i16 %61, 7
  %63 = trunc i16 %62 to i8
  %64 = zext i8 %63 to i32
  %65 = load i8, ptr %7, align 1, !tbaa !9
  %66 = zext i8 %65 to i32
  %67 = or i32 %66, %64
  %68 = trunc i32 %67 to i8
  store i8 %68, ptr %7, align 1, !tbaa !9
  %69 = load ptr, ptr %6, align 8, !tbaa !5
  call void @_ZNSt6vectorIhSaIhEE9push_backERKh(ptr noundef nonnull align 8 dereferenceable(24) %69, ptr noundef nonnull align 1 dereferenceable(1) %7)
  %70 = load ptr, ptr %6, align 8, !tbaa !5
  %71 = getelementptr inbounds %"class.ROHC::CProfile", ptr %8, i32 0, i32 12
  call void @_ZN4ROHC10AppendDataItEEvRSt6vectorIhSaIhEERKT_(ptr noundef nonnull align 8 dereferenceable(24) %70, ptr noundef nonnull align 2 dereferenceable(2) %71)
  %72 = load ptr, ptr %6, align 8, !tbaa !5
  %73 = load ptr, ptr %5, align 8, !tbaa !5
  %74 = getelementptr inbounds %"struct.ROHC::tcphdr", ptr %73, i32 0, i32 2
  call void @_ZN4ROHC10AppendDataIjEEvRSt6vectorIhSaIhEERKT_(ptr noundef nonnull align 8 dereferenceable(24) %72, ptr noundef nonnull align 4 dereferenceable(4) %74)
  %75 = load ptr, ptr %5, align 8, !tbaa !5
  %76 = getelementptr inbounds %"struct.ROHC::tcphdr", ptr %75, i32 0, i32 4
  %77 = load i16, ptr %76, align 4
  %78 = lshr i16 %77, 11
  %79 = and i16 %78, 1
  %80 = trunc i16 %79 to i8
  %81 = icmp ne i8 %80, 0
  br i1 %81, label %82, label %91

82:                                               ; preds = %57
  %83 = load ptr, ptr %5, align 8, !tbaa !5
  %84 = getelementptr inbounds %"struct.ROHC::tcphdr", ptr %83, i32 0, i32 3
  %85 = load i32, ptr %84, align 4, !tbaa !10
  %86 = icmp ne i32 %85, 0
  br i1 %86, label %87, label %91

87:                                               ; preds = %82
  %88 = load ptr, ptr %6, align 8, !tbaa !5
  %89 = load ptr, ptr %5, align 8, !tbaa !5
  %90 = getelementptr inbounds %"struct.ROHC::tcphdr", ptr %89, i32 0, i32 3
  call void @_ZN4ROHC10AppendDataIjEEvRSt6vectorIhSaIhEERKT_(ptr noundef nonnull align 8 dereferenceable(24) %88, ptr noundef nonnull align 4 dereferenceable(4) %90)
  br label %91

91:                                               ; preds = %87, %82, %57
  %92 = load ptr, ptr %6, align 8, !tbaa !5
  %93 = load ptr, ptr %5, align 8, !tbaa !5
  %94 = getelementptr inbounds %"struct.ROHC::tcphdr", ptr %93, i32 0, i32 5
  call void @_ZN4ROHC10AppendDataItEEvRSt6vectorIhSaIhEERKT_(ptr noundef nonnull align 8 dereferenceable(24) %92, ptr noundef nonnull align 2 dereferenceable(2) %94)
  %95 = load ptr, ptr %6, align 8, !tbaa !5
  %96 = load ptr, ptr %5, align 8, !tbaa !5
  %97 = getelementptr inbounds %"struct.ROHC::tcphdr", ptr %96, i32 0, i32 6
  call void @_ZN4ROHC10AppendDataItEEvRSt6vectorIhSaIhEERKT_(ptr noundef nonnull align 8 dereferenceable(24) %95, ptr noundef nonnull align 2 dereferenceable(2) %97)
  %98 = load ptr, ptr %5, align 8, !tbaa !5
  %99 = getelementptr inbounds %"struct.ROHC::tcphdr", ptr %98, i32 0, i32 4
  %100 = load i16, ptr %99, align 4
  %101 = lshr i16 %100, 10
  %102 = and i16 %101, 1
  %103 = trunc i16 %102 to i8
  %104 = icmp ne i8 %103, 0
  br i1 %104, label %105, label %114

105:                                              ; preds = %91
  %106 = load ptr, ptr %5, align 8, !tbaa !5
  %107 = getelementptr inbounds %"struct.ROHC::tcphdr", ptr %106, i32 0, i32 7
  %108 = load i16, ptr %107, align 2, !tbaa !14
  %109 = icmp ne i16 %108, 0
  br i1 %109, label %110, label %114

110:                                              ; preds = %105
  %111 = load ptr, ptr %6, align 8, !tbaa !5
  %112 = load ptr, ptr %5, align 8, !tbaa !5
  %113 = getelementptr inbounds %"struct.ROHC::tcphdr", ptr %112, i32 0, i32 7
  call void @_ZN4ROHC10AppendDataItEEvRSt6vectorIhSaIhEERKT_(ptr noundef nonnull align 8 dereferenceable(24) %111, ptr noundef nonnull align 2 dereferenceable(2) %113)
  br label %114

114:                                              ; preds = %110, %105, %91
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #2
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4ROHC10AppendDataIjEEvRSt6vectorIhSaIhEERKT_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(4)) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !13, i64 8}
!11 = !{!"_ZTSN4ROHC6tcphdrE", !12, i64 0, !12, i64 2, !13, i64 4, !13, i64 8, !7, i64 12, !7, i64 12, !7, i64 12, !7, i64 13, !7, i64 13, !7, i64 13, !7, i64 13, !7, i64 13, !7, i64 13, !7, i64 13, !7, i64 13, !12, i64 14, !12, i64 16, !12, i64 18}
!12 = !{!"short", !7, i64 0}
!13 = !{!"int", !7, i64 0}
!14 = !{!11, !12, i64 18}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIhSaIhEE9push_backERKh(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 1 dereferenceable(1)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4ROHC10AppendDataItEEvRSt6vectorIhSaIhEERKT_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 2 dereferenceable(2)) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4ROHC11CTCPProfile18create_tcp_dynamicEPKNS_6tcphdrERSt6vectorIhSaIhEE(ptr noundef nonnull align 8 dereferenceable(348) %0, ptr noundef %1, ptr noundef nonnull align 8 dereferenceable(24) %2) local_unnamed_addr #1 align 2 {
  %4 = alloca i8, align 1
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %4) #2
  %5 = getelementptr inbounds i8, ptr %1, i64 12
  %6 = load i16, ptr %5, align 4
  %7 = lshr i16 %6, 2
  %8 = trunc i16 %7 to i8
  %spec.store.select = and i8 %8, -128
  %9 = and i16 %6, 2048
  %.not23 = icmp eq i16 %9, 0
  br i1 %.not23, label %14, label %10

10:                                               ; preds = %3
  %11 = getelementptr inbounds i8, ptr %1, i64 8
  %12 = load i32, ptr %11, align 4, !tbaa !5
  %.not24 = icmp eq i32 %12, 0
  %13 = or disjoint i8 %spec.store.select, 32
  %spec.select = select i1 %.not24, i8 %spec.store.select, i8 %13
  br label %14

14:                                               ; preds = %10, %3
  %15 = phi i8 [ %spec.store.select, %3 ], [ %spec.select, %10 ]
  %16 = and i16 %6, 1024
  %.not25 = icmp eq i16 %16, 0
  br i1 %.not25, label %21, label %17

17:                                               ; preds = %14
  %18 = getelementptr inbounds i8, ptr %1, i64 18
  %19 = load i16, ptr %18, align 2, !tbaa !11
  %.not26 = icmp eq i16 %19, 0
  %20 = or i8 %15, 16
  %spec.select31 = select i1 %.not26, i8 %15, i8 %20
  br label %21

21:                                               ; preds = %17, %14
  %22 = phi i8 [ %15, %14 ], [ %spec.select31, %17 ]
  %23 = trunc i16 %6 to i8
  %24 = lshr i8 %23, 4
  %25 = and i8 %24, 7
  %26 = or i8 %22, %25
  store i8 %26, ptr %4, align 1, !tbaa !12
  call void @_ZNSt6vectorIhSaIhEE9push_backERKh(ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef nonnull align 1 dereferenceable(1) %4)
  %27 = getelementptr inbounds i8, ptr %0, i64 72
  call void @_ZN4ROHC10AppendDataItEEvRSt6vectorIhSaIhEERKT_(ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef nonnull align 2 dereferenceable(2) %27)
  %28 = getelementptr inbounds i8, ptr %1, i64 4
  call void @_ZN4ROHC10AppendDataIjEEvRSt6vectorIhSaIhEERKT_(ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef nonnull align 4 dereferenceable(4) %28)
  %29 = load i16, ptr %5, align 4
  %30 = and i16 %29, 2048
  %.not27 = icmp eq i16 %30, 0
  br i1 %.not27, label %35, label %31

31:                                               ; preds = %21
  %32 = getelementptr inbounds i8, ptr %1, i64 8
  %33 = load i32, ptr %32, align 4, !tbaa !5
  %.not28 = icmp eq i32 %33, 0
  br i1 %.not28, label %35, label %34

34:                                               ; preds = %31
  call void @_ZN4ROHC10AppendDataIjEEvRSt6vectorIhSaIhEERKT_(ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef nonnull align 4 dereferenceable(4) %32)
  br label %35

35:                                               ; preds = %34, %31, %21
  %36 = getelementptr inbounds i8, ptr %1, i64 14
  call void @_ZN4ROHC10AppendDataItEEvRSt6vectorIhSaIhEERKT_(ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef nonnull align 2 dereferenceable(2) %36)
  %37 = getelementptr inbounds i8, ptr %1, i64 16
  call void @_ZN4ROHC10AppendDataItEEvRSt6vectorIhSaIhEERKT_(ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef nonnull align 2 dereferenceable(2) %37)
  %38 = load i16, ptr %5, align 4
  %39 = and i16 %38, 1024
  %.not29 = icmp eq i16 %39, 0
  br i1 %.not29, label %44, label %40

40:                                               ; preds = %35
  %41 = getelementptr inbounds i8, ptr %1, i64 18
  %42 = load i16, ptr %41, align 2, !tbaa !11
  %.not30 = icmp eq i16 %42, 0
  br i1 %.not30, label %44, label %43

43:                                               ; preds = %40
  call void @_ZN4ROHC10AppendDataItEEvRSt6vectorIhSaIhEERKT_(ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef nonnull align 2 dereferenceable(2) %41)
  br label %44

44:                                               ; preds = %43, %40, %35
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %4) #2
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4ROHC10AppendDataIjEEvRSt6vectorIhSaIhEERKT_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"_ZTSN4ROHC6tcphdrE", !7, i64 0, !7, i64 2, !10, i64 4, !10, i64 8, !8, i64 12, !8, i64 12, !8, i64 12, !8, i64 13, !8, i64 13, !8, i64 13, !8, i64 13, !8, i64 13, !8, i64 13, !8, i64 13, !8, i64 13, !7, i64 14, !7, i64 16, !7, i64 18}
!7 = !{!"short", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!6, !7, i64 18}
!12 = !{!8, !8, i64 0}


; Effective O3 passes: DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass