; LLVM IR from VastoLorde95/Competitive-Programming :: Hackerrank/Codeagon 2017/Problem E/E3.ll (Z3bfsv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl" }
%"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl" = type { %"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl_data" }
%"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.edge = type { i32, i32, i32, i32 }

@n = external dso_local global i32, align 4
@s = external dso_local global i32, align 4
@t = external dso_local global i32, align 4
@d = external dso_local global [2100 x i32], align 16
@q = external dso_local global [2100 x i32], align 16
@e = external dso_local global %"class.std::vector", align 8
@g = external dso_local global [2100 x %"class.std::vector.0"], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z3bfsv() #1 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #3
  store i32 0, ptr %1, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #3
  store i32 0, ptr %2, align 4, !tbaa !5
  %7 = load i32, ptr @s, align 4, !tbaa !5
  %8 = load i32, ptr %2, align 4, !tbaa !5
  %9 = add nsw i32 %8, 1
  store i32 %9, ptr %2, align 4, !tbaa !5
  %10 = sext i32 %8 to i64
  %11 = getelementptr inbounds [2100 x i32], ptr @q, i64 0, i64 %10
  store i32 %7, ptr %11, align 4, !tbaa !5
  %12 = load i32, ptr @n, align 4, !tbaa !5
  %13 = add nsw i32 %12, 1
  %14 = sext i32 %13 to i64
  %15 = mul i64 %14, 4
  call void @llvm.memset.p0.i64(ptr align 16 @d, i8 -1, i64 %15, i1 false)
  %16 = load i32, ptr @s, align 4, !tbaa !5
  %17 = sext i32 %16 to i64
  %18 = getelementptr inbounds [2100 x i32], ptr @d, i64 0, i64 %17
  store i32 0, ptr %18, align 4, !tbaa !5
  br label %19

19:                                               ; preds = %94, %0
  %20 = load i32, ptr %1, align 4, !tbaa !5
  %21 = load i32, ptr %2, align 4, !tbaa !5
  %22 = icmp slt i32 %20, %21
  br i1 %22, label %23, label %29

23:                                               ; preds = %19
  %24 = load i32, ptr @t, align 4, !tbaa !5
  %25 = sext i32 %24 to i64
  %26 = getelementptr inbounds [2100 x i32], ptr @d, i64 0, i64 %25
  %27 = load i32, ptr %26, align 4, !tbaa !5
  %28 = icmp eq i32 %27, -1
  br label %29

29:                                               ; preds = %23, %19
  %30 = phi i1 [ false, %19 ], [ %28, %23 ]
  br i1 %30, label %31, label %95

31:                                               ; preds = %29
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  %32 = load i32, ptr %1, align 4, !tbaa !5
  %33 = add nsw i32 %32, 1
  store i32 %33, ptr %1, align 4, !tbaa !5
  %34 = sext i32 %32 to i64
  %35 = getelementptr inbounds [2100 x i32], ptr @q, i64 0, i64 %34
  %36 = load i32, ptr %35, align 4, !tbaa !5
  store i32 %36, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  store i32 0, ptr %4, align 4, !tbaa !5
  br label %37

37:                                               ; preds = %91, %31
  %38 = load i32, ptr %4, align 4, !tbaa !5
  %39 = sext i32 %38 to i64
  %40 = load i32, ptr %3, align 4, !tbaa !5
  %41 = sext i32 %40 to i64
  %42 = getelementptr inbounds [2100 x %"class.std::vector.0"], ptr @g, i64 0, i64 %41
  %43 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %42) #3
  %44 = icmp ult i64 %39, %43
  br i1 %44, label %46, label %45

45:                                               ; preds = %37
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  br label %94

46:                                               ; preds = %37
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  %47 = load i32, ptr %3, align 4, !tbaa !5
  %48 = sext i32 %47 to i64
  %49 = getelementptr inbounds [2100 x %"class.std::vector.0"], ptr @g, i64 0, i64 %48
  %50 = load i32, ptr %4, align 4, !tbaa !5
  %51 = sext i32 %50 to i64
  %52 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %49, i64 noundef %51) #3
  %53 = load i32, ptr %52, align 4, !tbaa !5
  store i32 %53, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  %54 = load i32, ptr %5, align 4, !tbaa !5
  %55 = sext i32 %54 to i64
  %56 = call noundef nonnull align 4 dereferenceable(16) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @e, i64 noundef %55) #3
  %57 = getelementptr inbounds %struct.edge, ptr %56, i32 0, i32 1
  %58 = load i32, ptr %57, align 4, !tbaa !9
  store i32 %58, ptr %6, align 4, !tbaa !5
  %59 = load i32, ptr %6, align 4, !tbaa !5
  %60 = sext i32 %59 to i64
  %61 = getelementptr inbounds [2100 x i32], ptr @d, i64 0, i64 %60
  %62 = load i32, ptr %61, align 4, !tbaa !5
  %63 = icmp eq i32 %62, -1
  br i1 %63, label %64, label %90

64:                                               ; preds = %46
  %65 = load i32, ptr %5, align 4, !tbaa !5
  %66 = sext i32 %65 to i64
  %67 = call noundef nonnull align 4 dereferenceable(16) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @e, i64 noundef %66) #3
  %68 = getelementptr inbounds %struct.edge, ptr %67, i32 0, i32 3
  %69 = load i32, ptr %68, align 4, !tbaa !11
  %70 = load i32, ptr %5, align 4, !tbaa !5
  %71 = sext i32 %70 to i64
  %72 = call noundef nonnull align 4 dereferenceable(16) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @e, i64 noundef %71) #3
  %73 = getelementptr inbounds %struct.edge, ptr %72, i32 0, i32 2
  %74 = load i32, ptr %73, align 4, !tbaa !12
  %75 = icmp slt i32 %69, %74
  br i1 %75, label %76, label %90

76:                                               ; preds = %64
  %77 = load i32, ptr %6, align 4, !tbaa !5
  %78 = load i32, ptr %2, align 4, !tbaa !5
  %79 = add nsw i32 %78, 1
  store i32 %79, ptr %2, align 4, !tbaa !5
  %80 = sext i32 %78 to i64
  %81 = getelementptr inbounds [2100 x i32], ptr @q, i64 0, i64 %80
  store i32 %77, ptr %81, align 4, !tbaa !5
  %82 = load i32, ptr %3, align 4, !tbaa !5
  %83 = sext i32 %82 to i64
  %84 = getelementptr inbounds [2100 x i32], ptr @d, i64 0, i64 %83
  %85 = load i32, ptr %84, align 4, !tbaa !5
  %86 = add nsw i32 %85, 1
  %87 = load i32, ptr %6, align 4, !tbaa !5
  %88 = sext i32 %87 to i64
  %89 = getelementptr inbounds [2100 x i32], ptr @d, i64 0, i64 %88
  store i32 %86, ptr %89, align 4, !tbaa !5
  br label %90

90:                                               ; preds = %76, %64, %46
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  br label %91

91:                                               ; preds = %90
  %92 = load i32, ptr %4, align 4, !tbaa !5
  %93 = add nsw i32 %92, 1
  store i32 %93, ptr %4, align 4, !tbaa !5
  br label %37, !llvm.loop !13

94:                                               ; preds = %45
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  br label %19, !llvm.loop !15

95:                                               ; preds = %29
  %96 = load i32, ptr @t, align 4, !tbaa !5
  %97 = sext i32 %96 to i64
  %98 = getelementptr inbounds [2100 x i32], ptr @d, i64 0, i64 %97
  %99 = load i32, ptr %98, align 4, !tbaa !5
  %100 = icmp ne i32 %99, -1
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #3
  ret i1 %100
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(16) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 4}
!10 = !{!"_ZTS4edge", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12}
!11 = !{!10, !6, i64 12}
!12 = !{!10, !6, i64 8}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl" }
%"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl" = type { %"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl_data" }
%"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@n = external dso_local local_unnamed_addr global i32, align 4
@s = external dso_local local_unnamed_addr global i32, align 4
@t = external dso_local local_unnamed_addr global i32, align 4
@d = external dso_local local_unnamed_addr global [2100 x i32], align 16
@q = external dso_local local_unnamed_addr global [2100 x i32], align 16
@e = external dso_local global %"class.std::vector", align 8
@g = external dso_local global [2100 x %"class.std::vector.0"], align 16

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z3bfsv() local_unnamed_addr #0 {
  %1 = load i32, ptr @s, align 4, !tbaa !5
  store i32 %1, ptr @q, align 16, !tbaa !5
  %2 = load i32, ptr @n, align 4, !tbaa !5
  %3 = add nsw i32 %2, 1
  %4 = sext i32 %3 to i64
  %5 = shl nsw i64 %4, 2
  tail call void @llvm.memset.p0.i64(ptr nonnull align 16 @d, i8 -1, i64 %5, i1 false)
  %6 = sext i32 %1 to i64
  %7 = getelementptr inbounds [2100 x i32], ptr @d, i64 0, i64 %6
  store i32 0, ptr %7, align 4, !tbaa !5
  br label %11

.loopexit:                                        ; preds = %49, %17
  %.1.lcssa = phi i32 [ %.01722, %17 ], [ %.2, %49 ]
  %8 = sext i32 %.1.lcssa to i64
  %9 = icmp slt i64 %indvars.iv.next26, %8
  br i1 %9, label %11, label %.loopexit..critedge_crit_edge, !llvm.loop !9

.loopexit..critedge_crit_edge:                    ; preds = %.loopexit
  %.pre = load i32, ptr @t, align 4, !tbaa !5
  %.phi.trans.insert = sext i32 %.pre to i64
  %.phi.trans.insert28 = getelementptr inbounds [2100 x i32], ptr @d, i64 0, i64 %.phi.trans.insert
  %.pre29 = load i32, ptr %.phi.trans.insert28, align 4, !tbaa !5
  %10 = icmp ne i32 %.pre29, -1
  br label %.critedge

11:                                               ; preds = %0, %.loopexit
  %indvars.iv25 = phi i64 [ 0, %0 ], [ %indvars.iv.next26, %.loopexit ]
  %.01722 = phi i32 [ 1, %0 ], [ %.1.lcssa, %.loopexit ]
  %12 = load i32, ptr @t, align 4, !tbaa !5
  %13 = sext i32 %12 to i64
  %14 = getelementptr inbounds [2100 x i32], ptr @d, i64 0, i64 %13
  %15 = load i32, ptr %14, align 4, !tbaa !5
  %16 = icmp eq i32 %15, -1
  br i1 %16, label %17, label %.critedge

17:                                               ; preds = %11
  %indvars.iv.next26 = add nuw nsw i64 %indvars.iv25, 1
  %18 = getelementptr inbounds [2100 x i32], ptr @q, i64 0, i64 %indvars.iv25
  %19 = load i32, ptr %18, align 4, !tbaa !5
  %20 = sext i32 %19 to i64
  %21 = getelementptr inbounds [2100 x %"class.std::vector.0"], ptr @g, i64 0, i64 %20
  %22 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %21) #2
  %.not = icmp eq i64 %22, 0
  br i1 %.not, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %17
  %23 = getelementptr inbounds [2100 x i32], ptr @d, i64 0, i64 %20
  br label %24

24:                                               ; preds = %.lr.ph, %49
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %49 ]
  %.121 = phi i32 [ %.01722, %.lr.ph ], [ %.2, %49 ]
  %25 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %21, i64 noundef %indvars.iv) #2
  %26 = load i32, ptr %25, align 4, !tbaa !5
  %27 = sext i32 %26 to i64
  %28 = tail call noundef nonnull align 4 dereferenceable(16) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @e, i64 noundef %27) #2
  %29 = getelementptr inbounds i8, ptr %28, i64 4
  %30 = load i32, ptr %29, align 4, !tbaa !11
  %31 = sext i32 %30 to i64
  %32 = getelementptr inbounds [2100 x i32], ptr @d, i64 0, i64 %31
  %33 = load i32, ptr %32, align 4, !tbaa !5
  %34 = icmp eq i32 %33, -1
  br i1 %34, label %35, label %49

35:                                               ; preds = %24
  %36 = tail call noundef nonnull align 4 dereferenceable(16) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @e, i64 noundef %27) #2
  %37 = getelementptr inbounds i8, ptr %36, i64 12
  %38 = load i32, ptr %37, align 4, !tbaa !13
  %39 = tail call noundef nonnull align 4 dereferenceable(16) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @e, i64 noundef %27) #2
  %40 = getelementptr inbounds i8, ptr %39, i64 8
  %41 = load i32, ptr %40, align 4, !tbaa !14
  %42 = icmp slt i32 %38, %41
  br i1 %42, label %43, label %49

43:                                               ; preds = %35
  %44 = add nsw i32 %.121, 1
  %45 = sext i32 %.121 to i64
  %46 = getelementptr inbounds [2100 x i32], ptr @q, i64 0, i64 %45
  store i32 %30, ptr %46, align 4, !tbaa !5
  %47 = load i32, ptr %23, align 4, !tbaa !5
  %48 = add nsw i32 %47, 1
  store i32 %48, ptr %32, align 4, !tbaa !5
  br label %49

49:                                               ; preds = %43, %35, %24
  %.2 = phi i32 [ %44, %43 ], [ %.121, %35 ], [ %.121, %24 ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %50 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %21) #2
  %51 = icmp ugt i64 %50, %indvars.iv.next
  br i1 %51, label %24, label %.loopexit, !llvm.loop !15

.critedge:                                        ; preds = %11, %.loopexit..critedge_crit_edge
  %52 = phi i1 [ %10, %.loopexit..critedge_crit_edge ], [ true, %11 ]
  ret i1 %52
}

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(16) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !6, i64 4}
!12 = !{!"_ZTS4edge", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12}
!13 = !{!12, !6, i64 12}
!14 = !{!12, !6, i64 8}
!15 = distinct !{!15, !10}


; Effective O3 passes: BDCEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass