; LLVM IR from ShahjalalShohag/code-library :: Number Theory/Number of Nonnegative Integer Solutions to ax+by less than or equal to _ac9cefb8 (cntxxx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [17 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [153 x i8], align 1
@__PRETTY_FUNCTION__._Z11lattice_cntxxx = external hidden unnamed_addr constant [27 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [2 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [15 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z11lattice_cntxxx(i64 noundef %0, i64 noundef %1, i64 noundef %2) #0 {
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  %13 = alloca i64, align 8
  store i64 %0, ptr %5, align 8, !tbaa !5
  store i64 %1, ptr %6, align 8, !tbaa !5
  store i64 %2, ptr %7, align 8, !tbaa !5
  %14 = load i64, ptr %5, align 8, !tbaa !5
  %15 = icmp sge i64 %14, 0
  br i1 %15, label %16, label %19

16:                                               ; preds = %3
  %17 = load i64, ptr %6, align 8, !tbaa !5
  %18 = icmp sge i64 %17, 0
  br label %19

19:                                               ; preds = %16, %3
  %20 = phi i1 [ false, %3 ], [ %18, %16 ]
  br i1 %20, label %21, label %22

21:                                               ; preds = %19
  br label %24

22:                                               ; preds = %19
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 9, ptr noundef @__PRETTY_FUNCTION__._Z11lattice_cntxxx) #4
  unreachable

23:                                               ; No predecessors!
  br label %24

24:                                               ; preds = %23, %21
  %25 = load i64, ptr %7, align 8, !tbaa !5
  %26 = icmp slt i64 %25, 0
  br i1 %26, label %27, label %28

27:                                               ; preds = %24
  store i64 0, ptr %4, align 8
  br label %101

28:                                               ; preds = %24
  %29 = load i64, ptr %5, align 8, !tbaa !5
  %30 = icmp eq i64 %29, 0
  br i1 %30, label %34, label %31

31:                                               ; preds = %28
  %32 = load i64, ptr %6, align 8, !tbaa !5
  %33 = icmp eq i64 %32, 0
  br i1 %33, label %34, label %35

34:                                               ; preds = %31, %28
  call void @__assert_fail(ptr noundef @.str.2, ptr noundef @.str.1, i32 noundef 13, ptr noundef @__PRETTY_FUNCTION__._Z11lattice_cntxxx) #4
  unreachable

35:                                               ; preds = %31
  %36 = load i64, ptr %5, align 8, !tbaa !5
  %37 = icmp sgt i64 %36, 0
  br i1 %37, label %38, label %41

38:                                               ; preds = %35
  %39 = load i64, ptr %6, align 8, !tbaa !5
  %40 = icmp sgt i64 %39, 0
  br label %41

41:                                               ; preds = %38, %35
  %42 = phi i1 [ false, %35 ], [ %40, %38 ]
  br i1 %42, label %43, label %44

43:                                               ; preds = %41
  br label %46

44:                                               ; preds = %41
  call void @__assert_fail(ptr noundef @.str.3, ptr noundef @.str.1, i32 noundef 16, ptr noundef @__PRETTY_FUNCTION__._Z11lattice_cntxxx) #4
  unreachable

45:                                               ; No predecessors!
  br label %46

46:                                               ; preds = %45, %43
  %47 = load i64, ptr %5, align 8, !tbaa !5
  %48 = load i64, ptr %6, align 8, !tbaa !5
  %49 = icmp sgt i64 %47, %48
  br i1 %49, label %50, label %51

50:                                               ; preds = %46
  call void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) %5, ptr noundef nonnull align 8 dereferenceable(8) %6) #5
  br label %51

51:                                               ; preds = %50, %46
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #5
  store i64 0, ptr %8, align 8, !tbaa !5
  br label %52

52:                                               ; preds = %55, %51
  %53 = load i64, ptr %7, align 8, !tbaa !5
  %54 = icmp sge i64 %53, 0
  br i1 %54, label %55, label %99

55:                                               ; preds = %52
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #5
  %56 = load i64, ptr %6, align 8, !tbaa !5
  %57 = load i64, ptr %5, align 8, !tbaa !5
  %58 = sdiv i64 %56, %57
  store i64 %58, ptr %9, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #5
  %59 = load i64, ptr %6, align 8, !tbaa !5
  %60 = load i64, ptr %5, align 8, !tbaa !5
  %61 = srem i64 %59, %60
  store i64 %61, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #5
  %62 = load i64, ptr %7, align 8, !tbaa !5
  %63 = load i64, ptr %6, align 8, !tbaa !5
  %64 = sdiv i64 %62, %63
  store i64 %64, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #5
  %65 = load i64, ptr %7, align 8, !tbaa !5
  %66 = load i64, ptr %6, align 8, !tbaa !5
  %67 = srem i64 %65, %66
  %68 = load i64, ptr %5, align 8, !tbaa !5
  %69 = sdiv i64 %67, %68
  store i64 %69, ptr %12, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #5
  %70 = load i64, ptr %7, align 8, !tbaa !5
  %71 = load i64, ptr %6, align 8, !tbaa !5
  %72 = srem i64 %70, %71
  %73 = load i64, ptr %5, align 8, !tbaa !5
  %74 = srem i64 %72, %73
  store i64 %74, ptr %13, align 8, !tbaa !5
  %75 = load i64, ptr %11, align 8, !tbaa !5
  %76 = add nsw i64 %75, 1
  %77 = load i64, ptr %12, align 8, !tbaa !5
  %78 = add nsw i64 %77, 1
  %79 = mul nsw i64 %76, %78
  %80 = load i64, ptr %11, align 8, !tbaa !5
  %81 = add nsw i64 %80, 1
  %82 = load i64, ptr %11, align 8, !tbaa !5
  %83 = mul nsw i64 %81, %82
  %84 = sdiv i64 %83, 2
  %85 = load i64, ptr %9, align 8, !tbaa !5
  %86 = mul nsw i64 %84, %85
  %87 = add nsw i64 %79, %86
  %88 = load i64, ptr %8, align 8, !tbaa !5
  %89 = add nsw i64 %88, %87
  store i64 %89, ptr %8, align 8, !tbaa !5
  %90 = load i64, ptr %11, align 8, !tbaa !5
  %91 = load i64, ptr %10, align 8, !tbaa !5
  %92 = mul nsw i64 %90, %91
  %93 = load i64, ptr %5, align 8, !tbaa !5
  %94 = sub nsw i64 %92, %93
  %95 = load i64, ptr %13, align 8, !tbaa !5
  %96 = add nsw i64 %94, %95
  store i64 %96, ptr %7, align 8, !tbaa !5
  %97 = load i64, ptr %5, align 8, !tbaa !5
  store i64 %97, ptr %6, align 8, !tbaa !5
  %98 = load i64, ptr %10, align 8, !tbaa !5
  store i64 %98, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #5
  br label %52, !llvm.loop !9

99:                                               ; preds = %52
  %100 = load i64, ptr %8, align 8, !tbaa !5
  store i64 %100, ptr %4, align 8
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #5
  br label %101

101:                                              ; preds = %99, %27
  %102 = load i64, ptr %4, align 8
  ret i64 %102
}

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { noreturn nounwind }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [17 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [153 x i8], align 1
@__PRETTY_FUNCTION__._Z11lattice_cntxxx = external hidden unnamed_addr constant [27 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [2 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z11lattice_cntxxx(i64 noundef %0, i64 noundef %1, i64 noundef %2) local_unnamed_addr #0 {
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  store i64 %0, ptr %4, align 8, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !5
  %6 = or i64 %1, %0
  %7 = icmp sgt i64 %6, -1
  br i1 %7, label %9, label %8

8:                                                ; preds = %3
  tail call void @__assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 9, ptr noundef nonnull @__PRETTY_FUNCTION__._Z11lattice_cntxxx) #3
  unreachable

9:                                                ; preds = %3
  %10 = icmp slt i64 %2, 0
  br i1 %10, label %.loopexit, label %11

11:                                               ; preds = %9
  %12 = icmp eq i64 %0, 0
  %13 = icmp eq i64 %1, 0
  %or.cond = or i1 %12, %13
  br i1 %or.cond, label %14, label %15

14:                                               ; preds = %11
  tail call void @__assert_fail(ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.1, i32 noundef 13, ptr noundef nonnull @__PRETTY_FUNCTION__._Z11lattice_cntxxx) #3
  unreachable

15:                                               ; preds = %11
  %16 = icmp sgt i64 %0, %1
  br i1 %16, label %17, label %.lr.ph.preheader

17:                                               ; preds = %15
  call void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) %4, ptr noundef nonnull align 8 dereferenceable(8) %5) #4
  %.promoted.pre = load i64, ptr %5, align 8, !tbaa !5
  %.promoted23.pre = load i64, ptr %4, align 8, !tbaa !5
  br label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %15, %17
  %.ph = phi i64 [ %.promoted.pre, %17 ], [ %1, %15 ]
  %.ph32 = phi i64 [ %.promoted23.pre, %17 ], [ %0, %15 ]
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %.01825 = phi i64 [ %36, %.lr.ph ], [ %2, %.lr.ph.preheader ]
  %.01924 = phi i64 [ %33, %.lr.ph ], [ 0, %.lr.ph.preheader ]
  %18 = phi i64 [ %19, %.lr.ph ], [ %.ph, %.lr.ph.preheader ]
  %19 = phi i64 [ %21, %.lr.ph ], [ %.ph32, %.lr.ph.preheader ]
  %20 = sdiv i64 %18, %19
  %21 = srem i64 %18, %19
  %22 = sdiv i64 %.01825, %18
  %23 = srem i64 %.01825, %18
  %24 = sdiv i64 %23, %19
  %25 = srem i64 %23, %19
  %26 = add nsw i64 %22, 1
  %27 = add nsw i64 %24, 1
  %28 = mul nsw i64 %27, %26
  %29 = mul nsw i64 %26, %22
  %30 = sdiv i64 %29, 2
  %31 = mul nsw i64 %30, %20
  %32 = add i64 %31, %.01924
  %33 = add i64 %32, %28
  %34 = mul nsw i64 %22, %21
  %35 = sub i64 %34, %19
  %36 = add nsw i64 %35, %25
  %37 = icmp sgt i64 %36, -1
  br i1 %37, label %.lr.ph, label %.loopexit, !llvm.loop !9

.loopexit:                                        ; preds = %.lr.ph, %9
  %.0 = phi i64 [ 0, %9 ], [ %33, %.lr.ph ]
  ret i64 %.0
}

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIxENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn nounwind }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass