; LLVM IR from ShahjalalShohag/code-library :: Number Theory/Discrete Root Faster.ll (Z13discrete_rootxxx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z5powerxxx(i64 noundef, i64 noundef, i64 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z7inversexx(i64 noundef, i64 noundef) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_Z3gcdxx(i64 noundef, i64 noundef) #2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_Z9peth_rootxxix(i64 noundef, i64 noundef, i32 noundef, i64 noundef) #2

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z13discrete_rootxxx(i64 noundef %0, i64 noundef %1, i64 noundef %2) #2 {
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i32, align 4
  %10 = alloca i64, align 8
  %11 = alloca i32, align 4
  %12 = alloca i64, align 8
  store i64 %0, ptr %5, align 8, !tbaa !5
  store i64 %1, ptr %6, align 8, !tbaa !5
  store i64 %2, ptr %7, align 8, !tbaa !5
  %13 = load i64, ptr %5, align 8, !tbaa !5
  %14 = icmp sgt i64 %13, 0
  br i1 %14, label %15, label %19

15:                                               ; preds = %3
  %16 = load i64, ptr %6, align 8, !tbaa !5
  %17 = icmp eq i64 %16, 0
  br i1 %17, label %18, label %19

18:                                               ; preds = %15
  store i64 0, ptr %4, align 8
  br label %93

19:                                               ; preds = %15, %3
  %20 = load i64, ptr %7, align 8, !tbaa !5
  %21 = sub nsw i64 %20, 1
  %22 = load i64, ptr %5, align 8, !tbaa !5
  %23 = srem i64 %22, %21
  store i64 %23, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  %24 = load i64, ptr %5, align 8, !tbaa !5
  %25 = load i64, ptr %7, align 8, !tbaa !5
  %26 = sub nsw i64 %25, 1
  %27 = call noundef i64 @_Z3gcdxx(i64 noundef %24, i64 noundef %26)
  store i64 %27, ptr %8, align 8, !tbaa !5
  %28 = load i64, ptr %6, align 8, !tbaa !5
  %29 = load i64, ptr %7, align 8, !tbaa !5
  %30 = sub nsw i64 %29, 1
  %31 = load i64, ptr %8, align 8, !tbaa !5
  %32 = sdiv i64 %30, %31
  %33 = load i64, ptr %7, align 8, !tbaa !5
  %34 = call noundef i64 @_Z5powerxxx(i64 noundef %28, i64 noundef %32, i64 noundef %33)
  %35 = icmp ne i64 %34, 1
  br i1 %35, label %36, label %37

36:                                               ; preds = %19
  store i64 -1, ptr %4, align 8
  store i32 1, ptr %9, align 4
  br label %92

37:                                               ; preds = %19
  %38 = load i64, ptr %6, align 8, !tbaa !5
  %39 = load i64, ptr %5, align 8, !tbaa !5
  %40 = load i64, ptr %8, align 8, !tbaa !5
  %41 = sdiv i64 %39, %40
  %42 = load i64, ptr %7, align 8, !tbaa !5
  %43 = sub nsw i64 %42, 1
  %44 = load i64, ptr %8, align 8, !tbaa !5
  %45 = sdiv i64 %43, %44
  %46 = call noundef i64 @_Z7inversexx(i64 noundef %41, i64 noundef %45)
  %47 = load i64, ptr %7, align 8, !tbaa !5
  %48 = call noundef i64 @_Z5powerxxx(i64 noundef %38, i64 noundef %46, i64 noundef %47)
  store i64 %48, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  store i64 2, ptr %10, align 8, !tbaa !5
  br label %49

49:                                               ; preds = %79, %37
  %50 = load i64, ptr %10, align 8, !tbaa !5
  %51 = load i64, ptr %10, align 8, !tbaa !5
  %52 = mul nsw i64 %50, %51
  %53 = load i64, ptr %8, align 8, !tbaa !5
  %54 = icmp sle i64 %52, %53
  br i1 %54, label %56, label %55

55:                                               ; preds = %49
  store i32 2, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  br label %82

56:                                               ; preds = %49
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  store i32 0, ptr %11, align 4, !tbaa !9
  br label %57

57:                                               ; preds = %62, %56
  %58 = load i64, ptr %8, align 8, !tbaa !5
  %59 = load i64, ptr %10, align 8, !tbaa !5
  %60 = srem i64 %58, %59
  %61 = icmp eq i64 %60, 0
  br i1 %61, label %62, label %68

62:                                               ; preds = %57
  %63 = load i64, ptr %10, align 8, !tbaa !5
  %64 = load i64, ptr %8, align 8, !tbaa !5
  %65 = sdiv i64 %64, %63
  store i64 %65, ptr %8, align 8, !tbaa !5
  %66 = load i32, ptr %11, align 4, !tbaa !9
  %67 = add nsw i32 %66, 1
  store i32 %67, ptr %11, align 4, !tbaa !9
  br label %57, !llvm.loop !11

68:                                               ; preds = %57
  %69 = load i32, ptr %11, align 4, !tbaa !9
  %70 = icmp sgt i32 %69, 0
  br i1 %70, label %71, label %78

71:                                               ; preds = %68
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #3
  %72 = load i64, ptr %6, align 8, !tbaa !5
  %73 = load i64, ptr %10, align 8, !tbaa !5
  %74 = load i32, ptr %11, align 4, !tbaa !9
  %75 = load i64, ptr %7, align 8, !tbaa !5
  %76 = call noundef i64 @_Z9peth_rootxxix(i64 noundef %72, i64 noundef %73, i32 noundef %74, i64 noundef %75)
  store i64 %76, ptr %12, align 8, !tbaa !5
  %77 = load i64, ptr %12, align 8, !tbaa !5
  store i64 %77, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #3
  br label %78

78:                                               ; preds = %71, %68
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  br label %79

79:                                               ; preds = %78
  %80 = load i64, ptr %10, align 8, !tbaa !5
  %81 = add nsw i64 %80, 1
  store i64 %81, ptr %10, align 8, !tbaa !5
  br label %49, !llvm.loop !13

82:                                               ; preds = %55
  %83 = load i64, ptr %8, align 8, !tbaa !5
  %84 = icmp sgt i64 %83, 1
  br i1 %84, label %85, label %90

85:                                               ; preds = %82
  %86 = load i64, ptr %6, align 8, !tbaa !5
  %87 = load i64, ptr %8, align 8, !tbaa !5
  %88 = load i64, ptr %7, align 8, !tbaa !5
  %89 = call noundef i64 @_Z9peth_rootxxix(i64 noundef %86, i64 noundef %87, i32 noundef 1, i64 noundef %88)
  store i64 %89, ptr %6, align 8, !tbaa !5
  br label %90

90:                                               ; preds = %85, %82
  %91 = load i64, ptr %6, align 8, !tbaa !5
  store i64 %91, ptr %4, align 8
  store i32 1, ptr %9, align 4
  br label %92

92:                                               ; preds = %90, %36
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  br label %93

93:                                               ; preds = %92, %18
  %94 = load i64, ptr %4, align 8
  ret i64 %94
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z5powerxxx(i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z7inversexx(i64 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_Z3gcdxx(i64 noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_Z9peth_rootxxix(i64 noundef, i64 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z13discrete_rootxxx(i64 noundef %0, i64 noundef %1, i64 noundef %2) local_unnamed_addr #1 {
  %4 = icmp sgt i64 %0, 0
  %5 = icmp eq i64 %1, 0
  %or.cond = and i1 %4, %5
  br i1 %or.cond, label %28, label %6

6:                                                ; preds = %3
  %7 = add nsw i64 %2, -1
  %8 = srem i64 %0, %7
  %9 = tail call noundef i64 @_Z3gcdxx(i64 noundef %8, i64 noundef %7)
  %10 = sdiv i64 %7, %9
  %11 = tail call noundef i64 @_Z5powerxxx(i64 noundef %1, i64 noundef %10, i64 noundef %2)
  %.not = icmp eq i64 %11, 1
  br i1 %.not, label %12, label %28

12:                                               ; preds = %6
  %13 = sdiv i64 %8, %9
  %14 = tail call noundef i64 @_Z7inversexx(i64 noundef %13, i64 noundef %10)
  %15 = tail call noundef i64 @_Z5powerxxx(i64 noundef %1, i64 noundef %14, i64 noundef %2)
  %.not4449 = icmp slt i64 %9, 4
  br i1 %.not4449, label %._crit_edge53, label %.preheader

.preheader:                                       ; preds = %12, %._crit_edge.thread
  %.03952 = phi i64 [ %24, %._crit_edge.thread ], [ 2, %12 ]
  %.04051 = phi i64 [ %.141.lcssa60, %._crit_edge.thread ], [ %9, %12 ]
  %.04250 = phi i64 [ %.143, %._crit_edge.thread ], [ %15, %12 ]
  %16 = srem i64 %.04051, %.03952
  %17 = icmp eq i64 %16, 0
  br i1 %17, label %.lr.ph, label %._crit_edge.thread

._crit_edge53:                                    ; preds = %._crit_edge.thread, %12
  %.042.lcssa = phi i64 [ %15, %12 ], [ %.143, %._crit_edge.thread ]
  %.040.lcssa = phi i64 [ %9, %12 ], [ %.141.lcssa60, %._crit_edge.thread ]
  %18 = icmp sgt i64 %.040.lcssa, 1
  br i1 %18, label %26, label %28

.lr.ph:                                           ; preds = %.preheader, %.lr.ph
  %.03847 = phi i32 [ %20, %.lr.ph ], [ 0, %.preheader ]
  %.14146 = phi i64 [ %19, %.lr.ph ], [ %.04051, %.preheader ]
  %19 = sdiv i64 %.14146, %.03952
  %20 = add nuw nsw i32 %.03847, 1
  %21 = srem i64 %19, %.03952
  %22 = icmp eq i64 %21, 0
  br i1 %22, label %.lr.ph, label %._crit_edge, !llvm.loop !5

._crit_edge:                                      ; preds = %.lr.ph
  %23 = tail call noundef i64 @_Z9peth_rootxxix(i64 noundef %.04250, i64 noundef %.03952, i32 noundef %20, i64 noundef %2)
  br label %._crit_edge.thread

._crit_edge.thread:                               ; preds = %.preheader, %._crit_edge
  %.141.lcssa60 = phi i64 [ %19, %._crit_edge ], [ %.04051, %.preheader ]
  %.143 = phi i64 [ %23, %._crit_edge ], [ %.04250, %.preheader ]
  %24 = add nuw nsw i64 %.03952, 1
  %25 = mul nuw nsw i64 %24, %24
  %.not44 = icmp sgt i64 %25, %.141.lcssa60
  br i1 %.not44, label %._crit_edge53, label %.preheader, !llvm.loop !7

26:                                               ; preds = %._crit_edge53
  %27 = tail call noundef i64 @_Z9peth_rootxxix(i64 noundef %.042.lcssa, i64 noundef %.040.lcssa, i32 noundef 1, i64 noundef %2)
  br label %28

28:                                               ; preds = %6, %26, %._crit_edge53, %3
  %.1 = phi i64 [ 0, %3 ], [ -1, %6 ], [ %27, %26 ], [ %.042.lcssa, %._crit_edge53 ]
  ret i64 %.1
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass