; LLVM IR from libtcod/libtcod :: src/libtcod (color)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TCOD_ColorRGB = type { i8, i8, i8 }

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #0

; Function Attrs: nounwind uwtable
define dso_local i24 @TCOD_color_add(i24 %0, i24 %1) #1 {
  %3 = alloca %struct.TCOD_ColorRGB, align 1
  %4 = alloca %struct.TCOD_ColorRGB, align 1
  %5 = alloca %struct.TCOD_ColorRGB, align 1
  %6 = alloca i24, align 4
  store i24 %0, ptr %4, align 1
  store i24 %1, ptr %5, align 1
  %7 = getelementptr inbounds %struct.TCOD_ColorRGB, ptr %3, i32 0, i32 0
  %8 = getelementptr inbounds %struct.TCOD_ColorRGB, ptr %4, i32 0, i32 0
  %9 = load i8, ptr %8, align 1, !tbaa !5
  %10 = zext i8 %9 to i32
  %11 = getelementptr inbounds %struct.TCOD_ColorRGB, ptr %5, i32 0, i32 0
  %12 = load i8, ptr %11, align 1, !tbaa !5
  %13 = zext i8 %12 to i32
  %14 = add nsw i32 %10, %13
  %15 = icmp slt i32 255, %14
  br i1 %15, label %16, label %17

16:                                               ; preds = %2
  br label %25

17:                                               ; preds = %2
  %18 = getelementptr inbounds %struct.TCOD_ColorRGB, ptr %4, i32 0, i32 0
  %19 = load i8, ptr %18, align 1, !tbaa !5
  %20 = zext i8 %19 to i32
  %21 = getelementptr inbounds %struct.TCOD_ColorRGB, ptr %5, i32 0, i32 0
  %22 = load i8, ptr %21, align 1, !tbaa !5
  %23 = zext i8 %22 to i32
  %24 = add nsw i32 %20, %23
  br label %25

25:                                               ; preds = %17, %16
  %26 = phi i32 [ 255, %16 ], [ %24, %17 ]
  %27 = trunc i32 %26 to i8
  store i8 %27, ptr %7, align 1, !tbaa !5
  %28 = getelementptr inbounds %struct.TCOD_ColorRGB, ptr %3, i32 0, i32 1
  %29 = getelementptr inbounds %struct.TCOD_ColorRGB, ptr %4, i32 0, i32 1
  %30 = load i8, ptr %29, align 1, !tbaa !9
  %31 = zext i8 %30 to i32
  %32 = getelementptr inbounds %struct.TCOD_ColorRGB, ptr %5, i32 0, i32 1
  %33 = load i8, ptr %32, align 1, !tbaa !9
  %34 = zext i8 %33 to i32
  %35 = add nsw i32 %31, %34
  %36 = icmp slt i32 255, %35
  br i1 %36, label %37, label %38

37:                                               ; preds = %25
  br label %46

38:                                               ; preds = %25
  %39 = getelementptr inbounds %struct.TCOD_ColorRGB, ptr %4, i32 0, i32 1
  %40 = load i8, ptr %39, align 1, !tbaa !9
  %41 = zext i8 %40 to i32
  %42 = getelementptr inbounds %struct.TCOD_ColorRGB, ptr %5, i32 0, i32 1
  %43 = load i8, ptr %42, align 1, !tbaa !9
  %44 = zext i8 %43 to i32
  %45 = add nsw i32 %41, %44
  br label %46

46:                                               ; preds = %38, %37
  %47 = phi i32 [ 255, %37 ], [ %45, %38 ]
  %48 = trunc i32 %47 to i8
  store i8 %48, ptr %28, align 1, !tbaa !9
  %49 = getelementptr inbounds %struct.TCOD_ColorRGB, ptr %3, i32 0, i32 2
  %50 = getelementptr inbounds %struct.TCOD_ColorRGB, ptr %4, i32 0, i32 2
  %51 = load i8, ptr %50, align 1, !tbaa !10
  %52 = zext i8 %51 to i32
  %53 = getelementptr inbounds %struct.TCOD_ColorRGB, ptr %5, i32 0, i32 2
  %54 = load i8, ptr %53, align 1, !tbaa !10
  %55 = zext i8 %54 to i32
  %56 = add nsw i32 %52, %55
  %57 = icmp slt i32 255, %56
  br i1 %57, label %58, label %59

58:                                               ; preds = %46
  br label %67

59:                                               ; preds = %46
  %60 = getelementptr inbounds %struct.TCOD_ColorRGB, ptr %4, i32 0, i32 2
  %61 = load i8, ptr %60, align 1, !tbaa !10
  %62 = zext i8 %61 to i32
  %63 = getelementptr inbounds %struct.TCOD_ColorRGB, ptr %5, i32 0, i32 2
  %64 = load i8, ptr %63, align 1, !tbaa !10
  %65 = zext i8 %64 to i32
  %66 = add nsw i32 %62, %65
  br label %67

67:                                               ; preds = %59, %58
  %68 = phi i32 [ 255, %58 ], [ %66, %59 ]
  %69 = trunc i32 %68 to i8
  store i8 %69, ptr %49, align 1, !tbaa !10
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %6, ptr align 1 %3, i64 3, i1 false)
  %70 = load i24, ptr %6, align 4
  ret i24 %70
}

attributes #0 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TCOD_ColorRGB", !7, i64 0, !7, i64 1, !7, i64 2}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!6, !7, i64 1}
!10 = !{!6, !7, i64 2}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local i24 @TCOD_color_add(i24 %0, i24 %1) local_unnamed_addr #0 {
  %.sroa.36.0.extract.shift = lshr i24 %0, 8
  %.sroa.58.0.extract.shift = lshr i24 %0, 16
  %.sroa.3.0.extract.shift = lshr i24 %1, 8
  %.sroa.5.0.extract.shift = lshr i24 %1, 16
  %3 = and i24 %0, 255
  %4 = and i24 %1, 255
  %narrow = add nuw nsw i24 %4, %3
  %5 = tail call i24 @llvm.umin.i24(i24 %narrow, i24 255)
  %6 = and i24 %.sroa.36.0.extract.shift, 255
  %7 = and i24 %.sroa.3.0.extract.shift, 255
  %narrow12 = add nuw nsw i24 %7, %6
  %8 = tail call i24 @llvm.umin.i24(i24 %narrow12, i24 255)
  %narrow13 = add nuw nsw i24 %.sroa.5.0.extract.shift, %.sroa.58.0.extract.shift
  %9 = tail call i24 @llvm.umin.i24(i24 %narrow13, i24 255)
  %.sroa.311.0.insert.shift = shl nuw i24 %9, 16
  %.sroa.2.0.insert.shift = shl nuw nsw i24 %8, 8
  %.sroa.2.0.insert.insert = or disjoint i24 %.sroa.2.0.insert.shift, %.sroa.311.0.insert.shift
  %.sroa.010.0.insert.insert = or disjoint i24 %.sroa.2.0.insert.insert, %5
  ret i24 %.sroa.010.0.insert.insert
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i24 @llvm.umin.i24(i24, i24) #1

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass