; LLVM IR from atlantis13579/Riemann :: Src/Destruction/GraphPartition.ll (ZN5metis20ComputeLoadImbalanceEPNS_7graph_tEiPf)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.metis::graph_t" = type { i32, i32, i32, %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector.7", %"class.std::vector", %"class.std::vector", i32, i32, %"class.std::vector", %"class.std::vector", i32, %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector.12", %"class.std::vector.17", %"class.std::vector.22", i32, ptr, ptr }
%"class.std::vector.7" = type { %"struct.std::_Vector_base.8" }
%"struct.std::_Vector_base.8" = type { %"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl" }
%"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl" = type { %"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl_data" }
%"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.12" = type { %"struct.std::_Vector_base.13" }
%"struct.std::_Vector_base.13" = type { %"struct.std::_Vector_base<metis::ckrinfo_t, std::allocator<metis::ckrinfo_t>>::_Vector_impl" }
%"struct.std::_Vector_base<metis::ckrinfo_t, std::allocator<metis::ckrinfo_t>>::_Vector_impl" = type { %"struct.std::_Vector_base<metis::ckrinfo_t, std::allocator<metis::ckrinfo_t>>::_Vector_impl_data" }
%"struct.std::_Vector_base<metis::ckrinfo_t, std::allocator<metis::ckrinfo_t>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.17" = type { %"struct.std::_Vector_base.18" }
%"struct.std::_Vector_base.18" = type { %"struct.std::_Vector_base<metis::vkrinfo_t, std::allocator<metis::vkrinfo_t>>::_Vector_impl" }
%"struct.std::_Vector_base<metis::vkrinfo_t, std::allocator<metis::vkrinfo_t>>::_Vector_impl" = type { %"struct.std::_Vector_base<metis::vkrinfo_t, std::allocator<metis::vkrinfo_t>>::_Vector_impl_data" }
%"struct.std::_Vector_base<metis::vkrinfo_t, std::allocator<metis::vkrinfo_t>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.22" = type { %"struct.std::_Vector_base.23" }
%"struct.std::_Vector_base.23" = type { %"struct.std::_Vector_base<metis::nrinfo_t, std::allocator<metis::nrinfo_t>>::_Vector_impl" }
%"struct.std::_Vector_base<metis::nrinfo_t, std::allocator<metis::nrinfo_t>>::_Vector_impl" = type { %"struct.std::_Vector_base<metis::nrinfo_t, std::allocator<metis::nrinfo_t>>::_Vector_impl_data" }
%"struct.std::_Vector_base<metis::nrinfo_t, std::allocator<metis::nrinfo_t>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNSt6vectorIiSaIiEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef float @_ZN5metis20ComputeLoadImbalanceEPNS_7graph_tEiPf(ptr noundef %0, i32 noundef %1, ptr noundef %2) #1 {
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca ptr, align 8
  %11 = alloca float, align 4
  %12 = alloca float, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  store ptr %2, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #2
  %13 = load ptr, ptr %4, align 8, !tbaa !5
  %14 = getelementptr inbounds %"struct.metis::graph_t", ptr %13, i32 0, i32 2
  %15 = load i32, ptr %14, align 8, !tbaa !11
  store i32 %15, ptr %9, align 4, !tbaa !9
  %16 = load ptr, ptr %4, align 8, !tbaa !5
  %17 = getelementptr inbounds %"struct.metis::graph_t", ptr %16, i32 0, i32 15
  %18 = call noundef ptr @_ZNSt6vectorIiSaIiEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24) %17) #2
  store ptr %18, ptr %10, align 8, !tbaa !5
  store float 1.000000e+00, ptr %11, align 4, !tbaa !33
  store i32 0, ptr %7, align 4, !tbaa !9
  br label %19

19:                                               ; preds = %59, %3
  %20 = load i32, ptr %7, align 4, !tbaa !9
  %21 = load i32, ptr %9, align 4, !tbaa !9
  %22 = icmp slt i32 %20, %21
  br i1 %22, label %23, label %62

23:                                               ; preds = %19
  store i32 0, ptr %8, align 4, !tbaa !9
  br label %24

24:                                               ; preds = %55, %23
  %25 = load i32, ptr %8, align 4, !tbaa !9
  %26 = load i32, ptr %5, align 4, !tbaa !9
  %27 = icmp slt i32 %25, %26
  br i1 %27, label %28, label %58

28:                                               ; preds = %24
  %29 = load ptr, ptr %10, align 8, !tbaa !5
  %30 = load i32, ptr %8, align 4, !tbaa !9
  %31 = load i32, ptr %9, align 4, !tbaa !9
  %32 = mul nsw i32 %30, %31
  %33 = load i32, ptr %7, align 4, !tbaa !9
  %34 = add nsw i32 %32, %33
  %35 = sext i32 %34 to i64
  %36 = getelementptr inbounds i32, ptr %29, i64 %35
  %37 = load i32, ptr %36, align 4, !tbaa !9
  %38 = sitofp i32 %37 to float
  %39 = load ptr, ptr %6, align 8, !tbaa !5
  %40 = load i32, ptr %8, align 4, !tbaa !9
  %41 = load i32, ptr %9, align 4, !tbaa !9
  %42 = mul nsw i32 %40, %41
  %43 = load i32, ptr %7, align 4, !tbaa !9
  %44 = add nsw i32 %42, %43
  %45 = sext i32 %44 to i64
  %46 = getelementptr inbounds float, ptr %39, i64 %45
  %47 = load float, ptr %46, align 4, !tbaa !33
  %48 = fmul float %38, %47
  store float %48, ptr %12, align 4, !tbaa !33
  %49 = load float, ptr %12, align 4, !tbaa !33
  %50 = load float, ptr %11, align 4, !tbaa !33
  %51 = fcmp ogt float %49, %50
  br i1 %51, label %52, label %54

52:                                               ; preds = %28
  %53 = load float, ptr %12, align 4, !tbaa !33
  store float %53, ptr %11, align 4, !tbaa !33
  br label %54

54:                                               ; preds = %52, %28
  br label %55

55:                                               ; preds = %54
  %56 = load i32, ptr %8, align 4, !tbaa !9
  %57 = add nsw i32 %56, 1
  store i32 %57, ptr %8, align 4, !tbaa !9
  br label %24, !llvm.loop !35

58:                                               ; preds = %24
  br label %59

59:                                               ; preds = %58
  %60 = load i32, ptr %7, align 4, !tbaa !9
  %61 = add nsw i32 %60, 1
  store i32 %61, ptr %7, align 4, !tbaa !9
  br label %19, !llvm.loop !37

62:                                               ; preds = %19
  %63 = load float, ptr %11, align 4, !tbaa !33
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  ret float %63
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 8}
!12 = !{!"_ZTSN5metis7graph_tE", !10, i64 0, !10, i64 4, !10, i64 8, !13, i64 16, !13, i64 40, !13, i64 64, !13, i64 88, !13, i64 112, !13, i64 136, !17, i64 160, !13, i64 184, !13, i64 208, !10, i64 232, !10, i64 236, !13, i64 240, !13, i64 264, !10, i64 288, !13, i64 296, !13, i64 320, !13, i64 344, !13, i64 368, !21, i64 392, !25, i64 416, !29, i64 440, !10, i64 464, !6, i64 472, !6, i64 480}
!13 = !{!"_ZTSSt6vectorIiSaIiEE", !14, i64 0}
!14 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!17 = !{!"_ZTSSt6vectorIfSaIfEE", !18, i64 0}
!18 = !{!"_ZTSSt12_Vector_baseIfSaIfEE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE12_Vector_implE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!21 = !{!"_ZTSSt6vectorIN5metis9ckrinfo_tESaIS1_EE", !22, i64 0}
!22 = !{!"_ZTSSt12_Vector_baseIN5metis9ckrinfo_tESaIS1_EE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIN5metis9ckrinfo_tESaIS1_EE12_Vector_implE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseIN5metis9ckrinfo_tESaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!25 = !{!"_ZTSSt6vectorIN5metis9vkrinfo_tESaIS1_EE", !26, i64 0}
!26 = !{!"_ZTSSt12_Vector_baseIN5metis9vkrinfo_tESaIS1_EE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseIN5metis9vkrinfo_tESaIS1_EE12_Vector_implE", !28, i64 0}
!28 = !{!"_ZTSNSt12_Vector_baseIN5metis9vkrinfo_tESaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!29 = !{!"_ZTSSt6vectorIN5metis8nrinfo_tESaIS1_EE", !30, i64 0}
!30 = !{!"_ZTSSt12_Vector_baseIN5metis8nrinfo_tESaIS1_EE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseIN5metis8nrinfo_tESaIS1_EE12_Vector_implE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseIN5metis8nrinfo_tESaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!33 = !{!34, !34, i64 0}
!34 = !{!"float", !7, i64 0}
!35 = distinct !{!35, !36}
!36 = !{!"llvm.loop.mustprogress"}
!37 = distinct !{!37, !36}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNSt6vectorIiSaIiEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef float @_ZN5metis20ComputeLoadImbalanceEPNS_7graph_tEiPf(ptr noundef %0, i32 noundef %1, ptr nocapture noundef readonly %2) local_unnamed_addr #0 {
  %4 = getelementptr inbounds i8, ptr %0, i64 8
  %5 = load i32, ptr %4, align 8, !tbaa !5
  %6 = getelementptr inbounds i8, ptr %0, i64 264
  %7 = tail call noundef ptr @_ZNSt6vectorIiSaIiEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24) %6) #1
  %8 = icmp sgt i32 %5, 0
  %9 = icmp sgt i32 %1, 0
  %or.cond = and i1 %8, %9
  br i1 %or.cond, label %.preheader.us.preheader, label %._crit_edge27

.preheader.us.preheader:                          ; preds = %3
  %10 = zext nneg i32 %5 to i64
  %wide.trip.count = zext nneg i32 %1 to i64
  %xtraiter = and i64 %wide.trip.count, 1
  %11 = icmp eq i32 %1, 1
  %unroll_iter = and i64 %wide.trip.count, 2147483646
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br label %.preheader.us

.preheader.us:                                    ; preds = %.preheader.us.preheader, %._crit_edge.us
  %indvars.iv31 = phi i64 [ 0, %.preheader.us.preheader ], [ %indvars.iv.next32, %._crit_edge.us ]
  %.01925.us = phi float [ 1.000000e+00, %.preheader.us.preheader ], [ %.2.us.lcssa, %._crit_edge.us ]
  br i1 %11, label %._crit_edge.us.unr-lcssa, label %.preheader.us.new

.preheader.us.new:                                ; preds = %.preheader.us, %.preheader.us.new
  %indvars.iv = phi i64 [ %indvars.iv.next.1, %.preheader.us.new ], [ 0, %.preheader.us ]
  %.124.us = phi float [ %.2.us.1, %.preheader.us.new ], [ %.01925.us, %.preheader.us ]
  %niter = phi i64 [ %niter.next.1, %.preheader.us.new ], [ 0, %.preheader.us ]
  %12 = mul nuw nsw i64 %indvars.iv, %10
  %13 = add nuw nsw i64 %12, %indvars.iv31
  %14 = getelementptr inbounds i32, ptr %7, i64 %13
  %15 = load i32, ptr %14, align 4, !tbaa !31
  %16 = sitofp i32 %15 to float
  %17 = getelementptr inbounds float, ptr %2, i64 %13
  %18 = load float, ptr %17, align 4, !tbaa !32
  %19 = fmul float %18, %16
  %20 = fcmp ogt float %19, %.124.us
  %.2.us = select i1 %20, float %19, float %.124.us
  %indvars.iv.next = or disjoint i64 %indvars.iv, 1
  %21 = mul nuw nsw i64 %indvars.iv.next, %10
  %22 = add nuw nsw i64 %21, %indvars.iv31
  %23 = getelementptr inbounds i32, ptr %7, i64 %22
  %24 = load i32, ptr %23, align 4, !tbaa !31
  %25 = sitofp i32 %24 to float
  %26 = getelementptr inbounds float, ptr %2, i64 %22
  %27 = load float, ptr %26, align 4, !tbaa !32
  %28 = fmul float %27, %25
  %29 = fcmp ogt float %28, %.2.us
  %.2.us.1 = select i1 %29, float %28, float %.2.us
  %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2
  %niter.next.1 = add i64 %niter, 2
  %niter.ncmp.1 = icmp eq i64 %niter.next.1, %unroll_iter
  br i1 %niter.ncmp.1, label %._crit_edge.us.unr-lcssa, label %.preheader.us.new, !llvm.loop !34

._crit_edge.us.unr-lcssa:                         ; preds = %.preheader.us.new, %.preheader.us
  %.2.us.lcssa.ph = phi float [ poison, %.preheader.us ], [ %.2.us.1, %.preheader.us.new ]
  %indvars.iv.unr = phi i64 [ 0, %.preheader.us ], [ %indvars.iv.next.1, %.preheader.us.new ]
  %.124.us.unr = phi float [ %.01925.us, %.preheader.us ], [ %.2.us.1, %.preheader.us.new ]
  br i1 %lcmp.mod.not, label %._crit_edge.us, label %._crit_edge.us.epilog-lcssa

._crit_edge.us.epilog-lcssa:                      ; preds = %._crit_edge.us.unr-lcssa
  %30 = mul nuw nsw i64 %indvars.iv.unr, %10
  %31 = add nuw nsw i64 %30, %indvars.iv31
  %32 = getelementptr inbounds i32, ptr %7, i64 %31
  %33 = load i32, ptr %32, align 4, !tbaa !31
  %34 = sitofp i32 %33 to float
  %35 = getelementptr inbounds float, ptr %2, i64 %31
  %36 = load float, ptr %35, align 4, !tbaa !32
  %37 = fmul float %36, %34
  %38 = fcmp ogt float %37, %.124.us.unr
  %.2.us.epil = select i1 %38, float %37, float %.124.us.unr
  br label %._crit_edge.us

._crit_edge.us:                                   ; preds = %._crit_edge.us.unr-lcssa, %._crit_edge.us.epilog-lcssa
  %.2.us.lcssa = phi float [ %.2.us.lcssa.ph, %._crit_edge.us.unr-lcssa ], [ %.2.us.epil, %._crit_edge.us.epilog-lcssa ]
  %indvars.iv.next32 = add nuw nsw i64 %indvars.iv31, 1
  %exitcond35.not = icmp eq i64 %indvars.iv.next32, %10
  br i1 %exitcond35.not, label %._crit_edge27, label %.preheader.us, !llvm.loop !36

._crit_edge27:                                    ; preds = %._crit_edge.us, %3
  %.019.lcssa = phi float [ 1.000000e+00, %3 ], [ %.2.us.lcssa, %._crit_edge.us ]
  ret float %.019.lcssa
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"_ZTSN5metis7graph_tE", !7, i64 0, !7, i64 4, !7, i64 8, !10, i64 16, !10, i64 40, !10, i64 64, !10, i64 88, !10, i64 112, !10, i64 136, !15, i64 160, !10, i64 184, !10, i64 208, !7, i64 232, !7, i64 236, !10, i64 240, !10, i64 264, !7, i64 288, !10, i64 296, !10, i64 320, !10, i64 344, !10, i64 368, !19, i64 392, !23, i64 416, !27, i64 440, !7, i64 464, !14, i64 472, !14, i64 480}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTSSt6vectorIiSaIiEE", !11, i64 0}
!11 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !12, i64 0}
!12 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !13, i64 0}
!13 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!"_ZTSSt6vectorIfSaIfEE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseIfSaIfEE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!19 = !{!"_ZTSSt6vectorIN5metis9ckrinfo_tESaIS1_EE", !20, i64 0}
!20 = !{!"_ZTSSt12_Vector_baseIN5metis9ckrinfo_tESaIS1_EE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIN5metis9ckrinfo_tESaIS1_EE12_Vector_implE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIN5metis9ckrinfo_tESaIS1_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!23 = !{!"_ZTSSt6vectorIN5metis9vkrinfo_tESaIS1_EE", !24, i64 0}
!24 = !{!"_ZTSSt12_Vector_baseIN5metis9vkrinfo_tESaIS1_EE", !25, i64 0}
!25 = !{!"_ZTSNSt12_Vector_baseIN5metis9vkrinfo_tESaIS1_EE12_Vector_implE", !26, i64 0}
!26 = !{!"_ZTSNSt12_Vector_baseIN5metis9vkrinfo_tESaIS1_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!27 = !{!"_ZTSSt6vectorIN5metis8nrinfo_tESaIS1_EE", !28, i64 0}
!28 = !{!"_ZTSSt12_Vector_baseIN5metis8nrinfo_tESaIS1_EE", !29, i64 0}
!29 = !{!"_ZTSNSt12_Vector_baseIN5metis8nrinfo_tESaIS1_EE12_Vector_implE", !30, i64 0}
!30 = !{!"_ZTSNSt12_Vector_baseIN5metis8nrinfo_tESaIS1_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!31 = !{!7, !7, i64 0}
!32 = !{!33, !33, i64 0}
!33 = !{!"float", !8, i64 0}
!34 = distinct !{!34, !35}
!35 = !{!"llvm.loop.mustprogress"}
!36 = distinct !{!36, !35}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass