; LLVM IR from lfarcaro/ARINC653_ARMV7A_AM335X :: Hardware (cpsw)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @CPSWALETableEntryGet(i32 noundef %0, i32 noundef %1, ptr noundef %2) #1 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  %8 = load i32, ptr %5, align 4, !tbaa !5
  %9 = load i32, ptr %4, align 4, !tbaa !5
  %10 = add i32 %9, 32
  %11 = zext i32 %10 to i64
  %12 = inttoptr i64 %11 to ptr
  store volatile i32 %8, ptr %12, align 4, !tbaa !5
  store i32 0, ptr %7, align 4, !tbaa !5
  br label %13

13:                                               ; preds = %30, %3
  %14 = load i32, ptr %7, align 4, !tbaa !5
  %15 = icmp ult i32 %14, 3
  br i1 %15, label %16, label %33

16:                                               ; preds = %13
  %17 = load i32, ptr %4, align 4, !tbaa !5
  %18 = load i32, ptr %7, align 4, !tbaa !5
  %19 = sub i32 2, %18
  %20 = mul i32 %19, 4
  %21 = add i32 52, %20
  %22 = add i32 %17, %21
  %23 = zext i32 %22 to i64
  %24 = inttoptr i64 %23 to ptr
  %25 = load volatile i32, ptr %24, align 4, !tbaa !5
  %26 = load ptr, ptr %6, align 8, !tbaa !9
  %27 = load i32, ptr %7, align 4, !tbaa !5
  %28 = zext i32 %27 to i64
  %29 = getelementptr inbounds i32, ptr %26, i64 %28
  store i32 %25, ptr %29, align 4, !tbaa !5
  br label %30

30:                                               ; preds = %16
  %31 = load i32, ptr %7, align 4, !tbaa !5
  %32 = add i32 %31, 1
  store i32 %32, ptr %7, align 4, !tbaa !5
  br label %13, !llvm.loop !11

33:                                               ; preds = %13
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local void @CPSWALETableEntryGet(i32 noundef %0, i32 noundef %1, ptr nocapture noundef writeonly %2) local_unnamed_addr #0 {
  %4 = add i32 %0, 32
  %5 = zext i32 %4 to i64
  %6 = inttoptr i64 %5 to ptr
  store volatile i32 %1, ptr %6, align 4, !tbaa !5
  %reass.sub = add i32 %0, 60
  %7 = zext i32 %reass.sub to i64
  %8 = inttoptr i64 %7 to ptr
  %9 = load volatile i32, ptr %8, align 4, !tbaa !5
  store i32 %9, ptr %2, align 4, !tbaa !5
  %10 = add i32 %0, 56
  %11 = zext i32 %10 to i64
  %12 = inttoptr i64 %11 to ptr
  %13 = load volatile i32, ptr %12, align 4, !tbaa !5
  %14 = getelementptr inbounds i8, ptr %2, i64 4
  store i32 %13, ptr %14, align 4, !tbaa !5
  %15 = add i32 %0, 52
  %16 = zext i32 %15 to i64
  %17 = inttoptr i64 %16 to ptr
  %18 = load volatile i32, ptr %17, align 4, !tbaa !5
  %19 = getelementptr inbounds i8, ptr %2, i64 8
  store i32 %18, ptr %19, align 4, !tbaa !5
  ret void
}

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LICMPass,LoopRotatePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass