; LLVM IR from Eslam-Rizk/Elite-DriveGuard :: Application/Middlewares/Third_Party/FreeRTOS/Source (tasks)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.xLIST = type { i64, ptr, %struct.xMINI_LIST_ITEM }
%struct.xMINI_LIST_ITEM = type { i32, ptr, ptr }
%struct.tskTaskControlBlock = type { ptr, %struct.xLIST_ITEM, %struct.xLIST_ITEM, i64, ptr, [16 x i8], i64, i64, i64, i64, i32, i8, i8 }
%struct.xLIST_ITEM = type { i32, ptr, ptr, ptr, ptr }

@pxCurrentTCB = external dso_local global ptr, align 8
@pxReadyTasksLists = external hidden global [56 x %struct.xLIST], align 16
@uxTopReadyPriority = external hidden global i64, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @vPortRaiseBASEPRI() #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @vPortEnterCritical() #2

declare i64 @uxListRemove(ptr noundef) #2

declare void @vListInsertEnd(ptr noundef, ptr noundef) #2

declare void @vPortExitCritical() #2

; Function Attrs: nounwind uwtable
define dso_local i64 @xTaskGenericNotify(ptr noundef %0, i32 noundef %1, i32 noundef %2, ptr noundef %3) #3 {
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i64, align 8
  %11 = alloca i8, align 1
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !9
  store ptr %3, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #4
  store i64 1, ptr %10, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 1, ptr %11) #4
  %12 = load ptr, ptr %5, align 8, !tbaa !5
  %13 = icmp eq ptr %12, null
  br i1 %13, label %14, label %16

14:                                               ; preds = %4
  call void @vPortRaiseBASEPRI()
  br label %15

15:                                               ; preds = %15, %14
  br label %15

16:                                               ; preds = %4
  %17 = load ptr, ptr %5, align 8, !tbaa !5
  store ptr %17, ptr %9, align 8, !tbaa !5
  call void @vPortEnterCritical()
  %18 = load ptr, ptr %8, align 8, !tbaa !5
  %19 = icmp ne ptr %18, null
  br i1 %19, label %20, label %25

20:                                               ; preds = %16
  %21 = load ptr, ptr %9, align 8, !tbaa !5
  %22 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %21, i32 0, i32 10
  %23 = load volatile i32, ptr %22, align 8, !tbaa !13
  %24 = load ptr, ptr %8, align 8, !tbaa !5
  store i32 %23, ptr %24, align 4, !tbaa !9
  br label %25

25:                                               ; preds = %20, %16
  %26 = load ptr, ptr %9, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %26, i32 0, i32 11
  %28 = load volatile i8, ptr %27, align 4, !tbaa !16
  store i8 %28, ptr %11, align 1, !tbaa !17
  %29 = load ptr, ptr %9, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %29, i32 0, i32 11
  store volatile i8 2, ptr %30, align 4, !tbaa !16
  %31 = load i32, ptr %7, align 4, !tbaa !9
  switch i32 %31, label %57 [
    i32 1, label %32
    i32 2, label %38
    i32 3, label %43
    i32 4, label %47
    i32 0, label %68
  ]

32:                                               ; preds = %25
  %33 = load i32, ptr %6, align 4, !tbaa !9
  %34 = load ptr, ptr %9, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %34, i32 0, i32 10
  %36 = load volatile i32, ptr %35, align 8, !tbaa !13
  %37 = or i32 %36, %33
  store volatile i32 %37, ptr %35, align 8, !tbaa !13
  br label %68

38:                                               ; preds = %25
  %39 = load ptr, ptr %9, align 8, !tbaa !5
  %40 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %39, i32 0, i32 10
  %41 = load volatile i32, ptr %40, align 8, !tbaa !13
  %42 = add i32 %41, 1
  store volatile i32 %42, ptr %40, align 8, !tbaa !13
  br label %68

43:                                               ; preds = %25
  %44 = load i32, ptr %6, align 4, !tbaa !9
  %45 = load ptr, ptr %9, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %45, i32 0, i32 10
  store volatile i32 %44, ptr %46, align 8, !tbaa !13
  br label %68

47:                                               ; preds = %25
  %48 = load i8, ptr %11, align 1, !tbaa !17
  %49 = zext i8 %48 to i32
  %50 = icmp ne i32 %49, 2
  br i1 %50, label %51, label %55

51:                                               ; preds = %47
  %52 = load i32, ptr %6, align 4, !tbaa !9
  %53 = load ptr, ptr %9, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %53, i32 0, i32 10
  store volatile i32 %52, ptr %54, align 8, !tbaa !13
  br label %56

55:                                               ; preds = %47
  store i64 0, ptr %10, align 8, !tbaa !11
  br label %56

56:                                               ; preds = %55, %51
  br label %68

57:                                               ; preds = %25
  %58 = load ptr, ptr %9, align 8, !tbaa !5
  %59 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %58, i32 0, i32 10
  %60 = load volatile i32, ptr %59, align 8, !tbaa !13
  %61 = zext i32 %60 to i64
  %62 = icmp eq i64 %61, -1
  %63 = zext i1 %62 to i32
  %64 = icmp eq i32 %63, 0
  br i1 %64, label %65, label %67

65:                                               ; preds = %57
  call void @vPortRaiseBASEPRI()
  br label %66

66:                                               ; preds = %66, %65
  br label %66

67:                                               ; preds = %57
  br label %68

68:                                               ; preds = %67, %56, %43, %38, %32, %25
  %69 = load i8, ptr %11, align 1, !tbaa !17
  %70 = zext i8 %69 to i32
  %71 = icmp eq i32 %70, 1
  br i1 %71, label %72, label %112

72:                                               ; preds = %68
  %73 = load ptr, ptr %9, align 8, !tbaa !5
  %74 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %73, i32 0, i32 1
  %75 = call i64 @uxListRemove(ptr noundef %74)
  %76 = load ptr, ptr %9, align 8, !tbaa !5
  %77 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %76, i32 0, i32 3
  %78 = load i64, ptr %77, align 8, !tbaa !18
  %79 = load volatile i64, ptr @uxTopReadyPriority, align 8, !tbaa !11
  %80 = icmp ugt i64 %78, %79
  br i1 %80, label %81, label %85

81:                                               ; preds = %72
  %82 = load ptr, ptr %9, align 8, !tbaa !5
  %83 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %82, i32 0, i32 3
  %84 = load i64, ptr %83, align 8, !tbaa !18
  store volatile i64 %84, ptr @uxTopReadyPriority, align 8, !tbaa !11
  br label %85

85:                                               ; preds = %81, %72
  %86 = load ptr, ptr %9, align 8, !tbaa !5
  %87 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %86, i32 0, i32 3
  %88 = load i64, ptr %87, align 8, !tbaa !18
  %89 = getelementptr inbounds [56 x %struct.xLIST], ptr @pxReadyTasksLists, i64 0, i64 %88
  %90 = load ptr, ptr %9, align 8, !tbaa !5
  %91 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %90, i32 0, i32 1
  call void @vListInsertEnd(ptr noundef %89, ptr noundef %91)
  %92 = load ptr, ptr %9, align 8, !tbaa !5
  %93 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %92, i32 0, i32 2
  %94 = getelementptr inbounds %struct.xLIST_ITEM, ptr %93, i32 0, i32 4
  %95 = load ptr, ptr %94, align 8, !tbaa !19
  %96 = icmp eq ptr %95, null
  %97 = zext i1 %96 to i32
  %98 = icmp eq i32 %97, 0
  br i1 %98, label %99, label %101

99:                                               ; preds = %85
  call void @vPortRaiseBASEPRI()
  br label %100

100:                                              ; preds = %100, %99
  br label %100

101:                                              ; preds = %85
  %102 = load ptr, ptr %9, align 8, !tbaa !5
  %103 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %102, i32 0, i32 3
  %104 = load i64, ptr %103, align 8, !tbaa !18
  %105 = load volatile ptr, ptr @pxCurrentTCB, align 8, !tbaa !5
  %106 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %105, i32 0, i32 3
  %107 = load i64, ptr %106, align 8, !tbaa !18
  %108 = icmp ugt i64 %104, %107
  br i1 %108, label %109, label %110

109:                                              ; preds = %101
  store volatile i32 268435456, ptr inttoptr (i64 3758157060 to ptr), align 4, !tbaa !9
  call void asm sideeffect "dsb", "~{memory},~{dirflag},~{fpsr},~{flags}"() #4, !srcloc !20
  call void asm sideeffect "isb", "~{dirflag},~{fpsr},~{flags}"() #4, !srcloc !21
  br label %111

110:                                              ; preds = %101
  br label %111

111:                                              ; preds = %110, %109
  br label %113

112:                                              ; preds = %68
  br label %113

113:                                              ; preds = %112, %111
  call void @vPortExitCritical()
  %114 = load i64, ptr %10, align 8, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 1, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #4
  ret i64 %114
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!14, !10, i64 152}
!14 = !{!"tskTaskControlBlock", !6, i64 0, !15, i64 8, !15, i64 48, !12, i64 88, !6, i64 96, !7, i64 104, !12, i64 120, !12, i64 128, !12, i64 136, !12, i64 144, !10, i64 152, !7, i64 156, !7, i64 157}
!15 = !{!"xLIST_ITEM", !10, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32}
!16 = !{!14, !7, i64 156}
!17 = !{!7, !7, i64 0}
!18 = !{!14, !12, i64 88}
!19 = !{!14, !6, i64 80}
!20 = !{i64 2148314703}
!21 = !{i64 2148314754}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.xLIST = type { i64, ptr, %struct.xMINI_LIST_ITEM }
%struct.xMINI_LIST_ITEM = type { i32, ptr, ptr }

@pxCurrentTCB = external dso_local global ptr, align 8
@pxReadyTasksLists = external hidden global [56 x %struct.xLIST], align 16
@uxTopReadyPriority = external hidden global i64, align 8

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @vPortRaiseBASEPRI() local_unnamed_addr #0

declare void @vPortEnterCritical() local_unnamed_addr #1

declare i64 @uxListRemove(ptr noundef) local_unnamed_addr #1

declare void @vListInsertEnd(ptr noundef, ptr noundef) local_unnamed_addr #1

declare void @vPortExitCritical() local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local range(i64 0, 2) i64 @xTaskGenericNotify(ptr noundef %0, i32 noundef %1, i32 noundef %2, ptr noundef writeonly %3) local_unnamed_addr #2 {
  %5 = icmp eq ptr %0, null
  br i1 %5, label %6, label %8

6:                                                ; preds = %4
  tail call void @vPortRaiseBASEPRI()
  br label %7

7:                                                ; preds = %7, %6
  br label %7

8:                                                ; preds = %4
  tail call void @vPortEnterCritical() #3
  %.not = icmp eq ptr %3, null
  br i1 %.not, label %12, label %9

9:                                                ; preds = %8
  %10 = getelementptr inbounds i8, ptr %0, i64 152
  %11 = load volatile i32, ptr %10, align 8, !tbaa !5
  store i32 %11, ptr %3, align 4, !tbaa !13
  br label %12

12:                                               ; preds = %9, %8
  %13 = getelementptr inbounds i8, ptr %0, i64 156
  %14 = load volatile i8, ptr %13, align 4, !tbaa !14
  store volatile i8 2, ptr %13, align 4, !tbaa !14
  switch i32 %2, label %28 [
    i32 1, label %15
    i32 2, label %19
    i32 3, label %23
    i32 4, label %25
    i32 0, label %32
  ]

15:                                               ; preds = %12
  %16 = getelementptr inbounds i8, ptr %0, i64 152
  %17 = load volatile i32, ptr %16, align 8, !tbaa !5
  %18 = or i32 %17, %1
  store volatile i32 %18, ptr %16, align 8, !tbaa !5
  br label %32

19:                                               ; preds = %12
  %20 = getelementptr inbounds i8, ptr %0, i64 152
  %21 = load volatile i32, ptr %20, align 8, !tbaa !5
  %22 = add i32 %21, 1
  store volatile i32 %22, ptr %20, align 8, !tbaa !5
  br label %32

23:                                               ; preds = %12
  %24 = getelementptr inbounds i8, ptr %0, i64 152
  store volatile i32 %1, ptr %24, align 8, !tbaa !5
  br label %32

25:                                               ; preds = %12
  %.not27 = icmp eq i8 %14, 2
  br i1 %.not27, label %.thread, label %26

26:                                               ; preds = %25
  %27 = getelementptr inbounds i8, ptr %0, i64 152
  store volatile i32 %1, ptr %27, align 8, !tbaa !5
  br label %32

28:                                               ; preds = %12
  %29 = getelementptr inbounds i8, ptr %0, i64 152
  %30 = load volatile i32, ptr %29, align 8, !tbaa !5
  tail call void @vPortRaiseBASEPRI()
  br label %31

31:                                               ; preds = %31, %28
  br label %31

32:                                               ; preds = %26, %23, %19, %15, %12
  %33 = icmp eq i8 %14, 1
  br i1 %33, label %34, label %.thread

34:                                               ; preds = %32
  %35 = getelementptr inbounds i8, ptr %0, i64 8
  %36 = tail call i64 @uxListRemove(ptr noundef nonnull %35) #3
  %37 = getelementptr inbounds i8, ptr %0, i64 88
  %38 = load i64, ptr %37, align 8, !tbaa !15
  %39 = load volatile i64, ptr @uxTopReadyPriority, align 8, !tbaa !16
  %40 = icmp ugt i64 %38, %39
  br i1 %40, label %41, label %42

41:                                               ; preds = %34
  store volatile i64 %38, ptr @uxTopReadyPriority, align 8, !tbaa !16
  br label %42

42:                                               ; preds = %41, %34
  %43 = getelementptr inbounds [56 x %struct.xLIST], ptr @pxReadyTasksLists, i64 0, i64 %38
  tail call void @vListInsertEnd(ptr noundef nonnull %43, ptr noundef nonnull %35) #3
  %44 = getelementptr inbounds i8, ptr %0, i64 80
  %45 = load ptr, ptr %44, align 8, !tbaa !17
  %.not28 = icmp eq ptr %45, null
  br i1 %.not28, label %48, label %46

46:                                               ; preds = %42
  tail call void @vPortRaiseBASEPRI()
  br label %47

47:                                               ; preds = %47, %46
  br label %47

48:                                               ; preds = %42
  %49 = load i64, ptr %37, align 8, !tbaa !15
  %50 = load volatile ptr, ptr @pxCurrentTCB, align 8, !tbaa !18
  %51 = getelementptr inbounds i8, ptr %50, i64 88
  %52 = load i64, ptr %51, align 8, !tbaa !15
  %53 = icmp ugt i64 %49, %52
  br i1 %53, label %54, label %.thread

54:                                               ; preds = %48
  store volatile i32 268435456, ptr inttoptr (i64 3758157060 to ptr), align 4, !tbaa !13
  tail call void asm sideeffect "dsb", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !19
  tail call void asm sideeffect "isb", "~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !20
  br label %.thread

.thread:                                          ; preds = %25, %32, %54, %48
  %.030 = phi i64 [ 1, %32 ], [ 1, %54 ], [ 1, %48 ], [ 0, %25 ]
  tail call void @vPortExitCritical() #3
  ret i64 %.030
}

attributes #0 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 152}
!6 = !{!"tskTaskControlBlock", !7, i64 0, !10, i64 8, !10, i64 48, !12, i64 88, !7, i64 96, !8, i64 104, !12, i64 120, !12, i64 128, !12, i64 136, !12, i64 144, !11, i64 152, !8, i64 156, !8, i64 157}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"xLIST_ITEM", !11, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 32}
!11 = !{!"int", !8, i64 0}
!12 = !{!"long", !8, i64 0}
!13 = !{!11, !11, i64 0}
!14 = !{!6, !8, i64 156}
!15 = !{!6, !12, i64 88}
!16 = !{!12, !12, i64 0}
!17 = !{!6, !7, i64 80}
!18 = !{!7, !7, i64 0}
!19 = !{i64 2148314703}
!20 = !{i64 2148314754}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass