; LLVM IR from Ahmed-alkharusi/Interesting-problems- :: Sandpiles/Source.ll (Z15sandpile_matrixRSt6vectorIS_IiSaIiEESaIS1_EERm)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z15sandpile_matrixRSt6vectorIS_IiSaIiEESaIS1_EERm(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(8) %1) #1 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i32, align 4
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #2
  %12 = load ptr, ptr %3, align 8, !tbaa !5
  %13 = call noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %12) #2
  %14 = sub i64 %13, 1
  %15 = udiv i64 %14, 2
  store i64 %15, ptr %5, align 8, !tbaa !9
  %16 = load ptr, ptr %4, align 8, !tbaa !5
  %17 = load i64, ptr %16, align 8, !tbaa !9
  %18 = uitofp i64 %17 to double
  %19 = fmul double 1.200000e+00, %18
  %20 = fptosi double %19 to i32
  %21 = load ptr, ptr %3, align 8, !tbaa !5
  %22 = load i64, ptr %5, align 8, !tbaa !9
  %23 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %21, i64 noundef %22) #2
  %24 = load i64, ptr %5, align 8, !tbaa !9
  %25 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %23, i64 noundef %24) #2
  store i32 %20, ptr %25, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #2
  store i64 0, ptr %6, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #2
  store i64 0, ptr %7, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #2
  store i64 0, ptr %8, align 8, !tbaa !9
  br label %26

26:                                               ; preds = %122, %2
  %27 = load i64, ptr %8, align 8, !tbaa !9
  %28 = load ptr, ptr %4, align 8, !tbaa !5
  %29 = load i64, ptr %28, align 8, !tbaa !9
  %30 = icmp ult i64 %27, %29
  br i1 %30, label %32, label %31

31:                                               ; preds = %26
  store i32 2, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #2
  br label %125

32:                                               ; preds = %26
  %33 = load i64, ptr %8, align 8, !tbaa !9
  %34 = add i64 %33, 1
  %35 = load i64, ptr %5, align 8, !tbaa !9
  %36 = icmp ult i64 %34, %35
  br i1 %36, label %37, label %46

37:                                               ; preds = %32
  %38 = load i64, ptr %5, align 8, !tbaa !9
  %39 = load i64, ptr %8, align 8, !tbaa !9
  %40 = add i64 %39, 1
  %41 = sub i64 %38, %40
  store i64 %41, ptr %6, align 8, !tbaa !9
  %42 = load i64, ptr %5, align 8, !tbaa !9
  %43 = load i64, ptr %8, align 8, !tbaa !9
  %44 = add i64 %43, 1
  %45 = add i64 %42, %44
  store i64 %45, ptr %7, align 8, !tbaa !9
  br label %51

46:                                               ; preds = %32
  %47 = load i64, ptr %5, align 8, !tbaa !9
  %48 = sub i64 %47, 200
  store i64 %48, ptr %6, align 8, !tbaa !9
  %49 = load i64, ptr %5, align 8, !tbaa !9
  %50 = add i64 %49, 200
  store i64 %50, ptr %7, align 8, !tbaa !9
  br label %51

51:                                               ; preds = %46, %37
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #2
  %52 = load i64, ptr %6, align 8, !tbaa !9
  store i64 %52, ptr %10, align 8, !tbaa !9
  br label %53

53:                                               ; preds = %118, %51
  %54 = load i64, ptr %10, align 8, !tbaa !9
  %55 = load i64, ptr %7, align 8, !tbaa !9
  %56 = icmp ult i64 %54, %55
  br i1 %56, label %58, label %57

57:                                               ; preds = %53
  store i32 5, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #2
  br label %121

58:                                               ; preds = %53
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #2
  %59 = load i64, ptr %6, align 8, !tbaa !9
  store i64 %59, ptr %11, align 8, !tbaa !9
  br label %60

60:                                               ; preds = %114, %58
  %61 = load i64, ptr %11, align 8, !tbaa !9
  %62 = load i64, ptr %7, align 8, !tbaa !9
  %63 = icmp ult i64 %61, %62
  br i1 %63, label %65, label %64

64:                                               ; preds = %60
  store i32 8, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #2
  br label %117

65:                                               ; preds = %60
  %66 = load ptr, ptr %3, align 8, !tbaa !5
  %67 = load i64, ptr %10, align 8, !tbaa !9
  %68 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %66, i64 noundef %67) #2
  %69 = load i64, ptr %11, align 8, !tbaa !9
  %70 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %68, i64 noundef %69) #2
  %71 = load i32, ptr %70, align 4, !tbaa !11
  %72 = icmp sgt i32 %71, 3
  br i1 %72, label %73, label %113

73:                                               ; preds = %65
  %74 = load ptr, ptr %3, align 8, !tbaa !5
  %75 = load i64, ptr %10, align 8, !tbaa !9
  %76 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %74, i64 noundef %75) #2
  %77 = load i64, ptr %11, align 8, !tbaa !9
  %78 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %76, i64 noundef %77) #2
  %79 = load i32, ptr %78, align 4, !tbaa !11
  %80 = sub nsw i32 %79, 4
  store i32 %80, ptr %78, align 4, !tbaa !11
  %81 = load ptr, ptr %3, align 8, !tbaa !5
  %82 = load i64, ptr %10, align 8, !tbaa !9
  %83 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %81, i64 noundef %82) #2
  %84 = load i64, ptr %11, align 8, !tbaa !9
  %85 = add i64 %84, 1
  %86 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %83, i64 noundef %85) #2
  %87 = load i32, ptr %86, align 4, !tbaa !11
  %88 = add nsw i32 %87, 1
  store i32 %88, ptr %86, align 4, !tbaa !11
  %89 = load ptr, ptr %3, align 8, !tbaa !5
  %90 = load i64, ptr %10, align 8, !tbaa !9
  %91 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %89, i64 noundef %90) #2
  %92 = load i64, ptr %11, align 8, !tbaa !9
  %93 = sub i64 %92, 1
  %94 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %91, i64 noundef %93) #2
  %95 = load i32, ptr %94, align 4, !tbaa !11
  %96 = add nsw i32 %95, 1
  store i32 %96, ptr %94, align 4, !tbaa !11
  %97 = load ptr, ptr %3, align 8, !tbaa !5
  %98 = load i64, ptr %10, align 8, !tbaa !9
  %99 = add i64 %98, 1
  %100 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %97, i64 noundef %99) #2
  %101 = load i64, ptr %11, align 8, !tbaa !9
  %102 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %100, i64 noundef %101) #2
  %103 = load i32, ptr %102, align 4, !tbaa !11
  %104 = add nsw i32 %103, 1
  store i32 %104, ptr %102, align 4, !tbaa !11
  %105 = load ptr, ptr %3, align 8, !tbaa !5
  %106 = load i64, ptr %10, align 8, !tbaa !9
  %107 = sub i64 %106, 1
  %108 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %105, i64 noundef %107) #2
  %109 = load i64, ptr %11, align 8, !tbaa !9
  %110 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %108, i64 noundef %109) #2
  %111 = load i32, ptr %110, align 4, !tbaa !11
  %112 = add nsw i32 %111, 1
  store i32 %112, ptr %110, align 4, !tbaa !11
  br label %113

113:                                              ; preds = %73, %65
  br label %114

114:                                              ; preds = %113
  %115 = load i64, ptr %11, align 8, !tbaa !9
  %116 = add i64 %115, 1
  store i64 %116, ptr %11, align 8, !tbaa !9
  br label %60, !llvm.loop !13

117:                                              ; preds = %64
  br label %118

118:                                              ; preds = %117
  %119 = load i64, ptr %10, align 8, !tbaa !9
  %120 = add i64 %119, 1
  store i64 %120, ptr %10, align 8, !tbaa !9
  br label %53, !llvm.loop !15

121:                                              ; preds = %57
  br label %122

122:                                              ; preds = %121
  %123 = load i64, ptr %8, align 8, !tbaa !9
  %124 = add i64 %123, 1
  store i64 %124, ptr %8, align 8, !tbaa !9
  br label %26, !llvm.loop !16

125:                                              ; preds = %31
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #2
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z15sandpile_matrixRSt6vectorIS_IiSaIiEESaIS1_EERm(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr nocapture noundef nonnull readonly align 8 dereferenceable(8) %1) local_unnamed_addr #0 {
  %3 = tail call noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %4 = add i64 %3, -1
  %5 = lshr i64 %4, 1
  %6 = load i64, ptr %1, align 8, !tbaa !5
  %7 = uitofp i64 %6 to double
  %8 = fmul double %7, 1.200000e+00
  %9 = fptosi double %8 to i32
  %10 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %5) #1
  %11 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %10, i64 noundef %5) #1
  store i32 %9, ptr %11, align 4, !tbaa !9
  %12 = load i64, ptr %1, align 8, !tbaa !5
  %.not = icmp eq i64 %12, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

.loopexit.loopexit:                               ; preds = %._crit_edge.us
  %.pre = load i64, ptr %1, align 8, !tbaa !5
  br label %.loopexit

.loopexit:                                        ; preds = %.loopexit.loopexit, %.lr.ph
  %13 = phi i64 [ %.pre, %.loopexit.loopexit ], [ %15, %.lr.ph ]
  %14 = icmp ult i64 %16, %13
  br i1 %14, label %.lr.ph, label %._crit_edge, !llvm.loop !11

._crit_edge:                                      ; preds = %.loopexit, %2
  ret void

.lr.ph:                                           ; preds = %2, %.loopexit
  %15 = phi i64 [ %13, %.loopexit ], [ %12, %2 ]
  %.04249 = phi i64 [ %16, %.loopexit ], [ 0, %2 ]
  %16 = add nuw i64 %.04249, 1
  %17 = icmp ult i64 %16, %5
  %18 = xor i64 %.04249, -1
  %.044.p = select i1 %17, i64 %18, i64 -200
  %.044 = add i64 %.044.p, %5
  %.pn = select i1 %17, i64 %16, i64 200
  %.043 = add nuw i64 %.pn, %5
  %19 = icmp ult i64 %.044, %.043
  br i1 %19, label %.preheader.us, label %.loopexit

.preheader.us:                                    ; preds = %.lr.ph, %._crit_edge.us
  %.04148.us = phi i64 [ %20, %._crit_edge.us ], [ %.044, %.lr.ph ]
  %20 = add nuw i64 %.04148.us, 1
  %21 = add i64 %.04148.us, -1
  br label %22

22:                                               ; preds = %.preheader.us, %50
  %.047.us = phi i64 [ %.044, %.preheader.us ], [ %.pre-phi, %50 ]
  %23 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %.04148.us) #1
  %24 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %23, i64 noundef %.047.us) #1
  %25 = load i32, ptr %24, align 4, !tbaa !9
  %26 = icmp sgt i32 %25, 3
  br i1 %26, label %27, label %._crit_edge51

._crit_edge51:                                    ; preds = %22
  %.pre52 = add i64 %.047.us, 1
  br label %50

27:                                               ; preds = %22
  %28 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %.04148.us) #1
  %29 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %28, i64 noundef %.047.us) #1
  %30 = load i32, ptr %29, align 4, !tbaa !9
  %31 = add nsw i32 %30, -4
  store i32 %31, ptr %29, align 4, !tbaa !9
  %32 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %.04148.us) #1
  %33 = add i64 %.047.us, 1
  %34 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %32, i64 noundef %33) #1
  %35 = load i32, ptr %34, align 4, !tbaa !9
  %36 = add nsw i32 %35, 1
  store i32 %36, ptr %34, align 4, !tbaa !9
  %37 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %.04148.us) #1
  %38 = add i64 %.047.us, -1
  %39 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %37, i64 noundef %38) #1
  %40 = load i32, ptr %39, align 4, !tbaa !9
  %41 = add nsw i32 %40, 1
  store i32 %41, ptr %39, align 4, !tbaa !9
  %42 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %20) #1
  %43 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %42, i64 noundef %.047.us) #1
  %44 = load i32, ptr %43, align 4, !tbaa !9
  %45 = add nsw i32 %44, 1
  store i32 %45, ptr %43, align 4, !tbaa !9
  %46 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %21) #1
  %47 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %46, i64 noundef %.047.us) #1
  %48 = load i32, ptr %47, align 4, !tbaa !9
  %49 = add nsw i32 %48, 1
  store i32 %49, ptr %47, align 4, !tbaa !9
  br label %50

50:                                               ; preds = %._crit_edge51, %27
  %.pre-phi = phi i64 [ %.pre52, %._crit_edge51 ], [ %33, %27 ]
  %exitcond.not = icmp eq i64 %.pre-phi, %.043
  br i1 %exitcond.not, label %._crit_edge.us, label %22, !llvm.loop !13

._crit_edge.us:                                   ; preds = %50
  %exitcond50.not = icmp eq i64 %20, %.043
  br i1 %exitcond50.not, label %.loopexit.loopexit, label %.preheader.us, !llvm.loop !14
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass