; LLVM IR from ShahjalalShohag/code-library :: Math/Inverse of A Matrix.ll (Z5powerxxi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z5powerxxi(i64 noundef %0, i64 noundef %1, i32 noundef %2) #0 {
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store i64 %0, ptr %4, align 8, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  %8 = load i32, ptr %6, align 4, !tbaa !9
  %9 = srem i32 1, %8
  store i32 %9, ptr %7, align 4, !tbaa !9
  %10 = load i32, ptr %6, align 4, !tbaa !9
  %11 = sext i32 %10 to i64
  %12 = load i64, ptr %4, align 8, !tbaa !5
  %13 = srem i64 %12, %11
  store i64 %13, ptr %4, align 8, !tbaa !5
  %14 = load i64, ptr %4, align 8, !tbaa !5
  %15 = icmp slt i64 %14, 0
  br i1 %15, label %16, label %21

16:                                               ; preds = %3
  %17 = load i32, ptr %6, align 4, !tbaa !9
  %18 = sext i32 %17 to i64
  %19 = load i64, ptr %4, align 8, !tbaa !5
  %20 = add nsw i64 %19, %18
  store i64 %20, ptr %4, align 8, !tbaa !5
  br label %21

21:                                               ; preds = %16, %3
  br label %22

22:                                               ; preds = %38, %21
  %23 = load i64, ptr %5, align 8, !tbaa !5
  %24 = icmp ne i64 %23, 0
  br i1 %24, label %25, label %47

25:                                               ; preds = %22
  %26 = load i64, ptr %5, align 8, !tbaa !5
  %27 = and i64 %26, 1
  %28 = icmp ne i64 %27, 0
  br i1 %28, label %29, label %38

29:                                               ; preds = %25
  %30 = load i32, ptr %7, align 4, !tbaa !9
  %31 = sext i32 %30 to i64
  %32 = load i64, ptr %4, align 8, !tbaa !5
  %33 = mul nsw i64 %31, %32
  %34 = load i32, ptr %6, align 4, !tbaa !9
  %35 = sext i32 %34 to i64
  %36 = srem i64 %33, %35
  %37 = trunc i64 %36 to i32
  store i32 %37, ptr %7, align 4, !tbaa !9
  br label %38

38:                                               ; preds = %29, %25
  %39 = load i64, ptr %4, align 8, !tbaa !5
  %40 = load i64, ptr %4, align 8, !tbaa !5
  %41 = mul nsw i64 %39, %40
  %42 = load i32, ptr %6, align 4, !tbaa !9
  %43 = sext i32 %42 to i64
  %44 = srem i64 %41, %43
  store i64 %44, ptr %4, align 8, !tbaa !5
  %45 = load i64, ptr %5, align 8, !tbaa !5
  %46 = ashr i64 %45, 1
  store i64 %46, ptr %5, align 8, !tbaa !5
  br label %22, !llvm.loop !11

47:                                               ; preds = %22
  %48 = load i32, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  ret i32 %48
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef range(i32 -2147483647, -2147483648) i32 @_Z5powerxxi(i64 noundef %0, i64 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = srem i32 1, %2
  %5 = sext i32 %2 to i64
  %.not22 = icmp eq i64 %1, 0
  br i1 %.not22, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %3
  %6 = srem i64 %0, %5
  %7 = icmp slt i64 %6, 0
  %8 = select i1 %7, i64 %5, i64 0
  %spec.select = add nsw i64 %8, %6
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %15
  %.025 = phi i32 [ %.1, %15 ], [ %4, %.lr.ph.preheader ]
  %.11724 = phi i64 [ %17, %15 ], [ %spec.select, %.lr.ph.preheader ]
  %.01823 = phi i64 [ %18, %15 ], [ %1, %.lr.ph.preheader ]
  %9 = and i64 %.01823, 1
  %.not21 = icmp eq i64 %9, 0
  br i1 %.not21, label %15, label %10

10:                                               ; preds = %.lr.ph
  %11 = sext i32 %.025 to i64
  %12 = mul nsw i64 %.11724, %11
  %13 = srem i64 %12, %5
  %14 = trunc nsw i64 %13 to i32
  br label %15

15:                                               ; preds = %10, %.lr.ph
  %.1 = phi i32 [ %14, %10 ], [ %.025, %.lr.ph ]
  %16 = mul nsw i64 %.11724, %.11724
  %17 = srem i64 %16, %5
  %18 = ashr i64 %.01823, 1
  %.not = icmp ult i64 %.01823, 2
  br i1 %.not, label %._crit_edge, label %.lr.ph, !llvm.loop !5

._crit_edge:                                      ; preds = %15, %3
  %.0.lcssa = phi i32 [ %4, %3 ], [ %.1, %15 ]
  ret i32 %.0.lcssa
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass