; LLVM IR from Mithreindeir/VelocityRaptor :: VelocityRaptor/src (vrMath)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.vrVec2 = type { float, float }
%struct.vrMat2 = type { %struct.vrVec2, %struct.vrVec2 }

; Function Attrs: inlinehint nounwind uwtable
define dso_local <2 x float> @vrMat2Mult(<2 x float> %0, <2 x float> %1, <2 x float> %2) #0 {
  %4 = alloca %struct.vrVec2, align 4
  %5 = alloca %struct.vrMat2, align 4
  %6 = alloca %struct.vrVec2, align 4
  %7 = getelementptr inbounds { <2 x float>, <2 x float> }, ptr %5, i32 0, i32 0
  store <2 x float> %0, ptr %7, align 4
  %8 = getelementptr inbounds { <2 x float>, <2 x float> }, ptr %5, i32 0, i32 1
  store <2 x float> %1, ptr %8, align 4
  store <2 x float> %2, ptr %6, align 4
  %9 = getelementptr inbounds %struct.vrMat2, ptr %5, i32 0, i32 0
  %10 = getelementptr inbounds %struct.vrVec2, ptr %9, i32 0, i32 0
  %11 = load float, ptr %10, align 4, !tbaa !5
  %12 = getelementptr inbounds %struct.vrVec2, ptr %6, i32 0, i32 0
  %13 = load float, ptr %12, align 4, !tbaa !11
  %14 = getelementptr inbounds %struct.vrMat2, ptr %5, i32 0, i32 0
  %15 = getelementptr inbounds %struct.vrVec2, ptr %14, i32 0, i32 1
  %16 = load float, ptr %15, align 4, !tbaa !12
  %17 = getelementptr inbounds %struct.vrVec2, ptr %6, i32 0, i32 1
  %18 = load float, ptr %17, align 4, !tbaa !13
  %19 = fmul float %16, %18
  %20 = call float @llvm.fmuladd.f32(float %11, float %13, float %19)
  %21 = getelementptr inbounds %struct.vrMat2, ptr %5, i32 0, i32 1
  %22 = getelementptr inbounds %struct.vrVec2, ptr %21, i32 0, i32 0
  %23 = load float, ptr %22, align 4, !tbaa !14
  %24 = getelementptr inbounds %struct.vrVec2, ptr %6, i32 0, i32 0
  %25 = load float, ptr %24, align 4, !tbaa !11
  %26 = getelementptr inbounds %struct.vrMat2, ptr %5, i32 0, i32 1
  %27 = getelementptr inbounds %struct.vrVec2, ptr %26, i32 0, i32 1
  %28 = load float, ptr %27, align 4, !tbaa !15
  %29 = getelementptr inbounds %struct.vrVec2, ptr %6, i32 0, i32 1
  %30 = load float, ptr %29, align 4, !tbaa !13
  %31 = fmul float %28, %30
  %32 = call float @llvm.fmuladd.f32(float %23, float %25, float %31)
  %33 = call <2 x float> @vrVect(float noundef %20, float noundef %32)
  store <2 x float> %33, ptr %4, align 4
  %34 = load <2 x float>, ptr %4, align 4
  ret <2 x float> %34
}

; Function Attrs: inlinehint nounwind uwtable
declare dso_local <2 x float> @vrVect(float noundef, float noundef) #0

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #1

attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"vrMat2", !7, i64 0, !7, i64 8}
!7 = !{!"vrVec2", !8, i64 0, !8, i64 4}
!8 = !{!"float", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 0}
!12 = !{!6, !8, i64 4}
!13 = !{!7, !8, i64 4}
!14 = !{!6, !8, i64 8}
!15 = !{!6, !8, i64 12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint nounwind uwtable
define dso_local <2 x float> @vrMat2Mult(<2 x float> %0, <2 x float> %1, <2 x float> %2) local_unnamed_addr #0 {
  %.sroa.05.0.vec.extract = extractelement <2 x float> %0, i64 0
  %.sroa.0.0.vec.extract = extractelement <2 x float> %2, i64 0
  %4 = fmul <2 x float> %0, %2
  %5 = extractelement <2 x float> %4, i64 1
  %6 = tail call float @llvm.fmuladd.f32(float %.sroa.05.0.vec.extract, float %.sroa.0.0.vec.extract, float %5)
  %.sroa.3.8.vec.extract = extractelement <2 x float> %1, i64 0
  %7 = fmul <2 x float> %1, %2
  %8 = extractelement <2 x float> %7, i64 1
  %9 = tail call float @llvm.fmuladd.f32(float %.sroa.3.8.vec.extract, float %.sroa.0.0.vec.extract, float %8)
  %10 = tail call <2 x float> @vrVect(float noundef %6, float noundef %9)
  ret <2 x float> %10
}

; Function Attrs: inlinehint nounwind uwtable
declare dso_local <2 x float> @vrVect(float noundef, float noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #1

attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,TailCallElimPass,VectorCombinePass