; LLVM IR from edualgo/dsa-code-store :: Generic-Tree/Generic-Tree-master/TreeSource/main.ll (Z11isIdenticalP8TreeNodeIiES1_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.TreeNode = type { i32, %"class.std::vector" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<TreeNode<int> *, std::allocator<TreeNode<int> *>>::_Vector_impl" }
%"struct.std::_Vector_base<TreeNode<int> *, std::allocator<TreeNode<int> *>>::_Vector_impl" = type { %"struct.std::_Vector_base<TreeNode<int> *, std::allocator<TreeNode<int> *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<TreeNode<int> *, std::allocator<TreeNode<int> *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIP8TreeNodeIiESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP8TreeNodeIiESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z11isIdenticalP8TreeNodeIiES1_(ptr noundef %0, ptr noundef %1) #2 {
  %3 = alloca i1, align 1
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  %8 = load ptr, ptr %4, align 8, !tbaa !5
  %9 = icmp eq ptr %8, null
  br i1 %9, label %13, label %10

10:                                               ; preds = %2
  %11 = load ptr, ptr %5, align 8, !tbaa !5
  %12 = icmp eq ptr %11, null
  br i1 %12, label %13, label %14

13:                                               ; preds = %10, %2
  store i1 false, ptr %3, align 1
  br label %52

14:                                               ; preds = %10
  %15 = load ptr, ptr %4, align 8, !tbaa !5
  %16 = getelementptr inbounds %class.TreeNode, ptr %15, i32 0, i32 0
  %17 = load i32, ptr %16, align 8, !tbaa !9
  %18 = load ptr, ptr %5, align 8, !tbaa !5
  %19 = getelementptr inbounds %class.TreeNode, ptr %18, i32 0, i32 0
  %20 = load i32, ptr %19, align 8, !tbaa !9
  %21 = icmp eq i32 %17, %20
  br i1 %21, label %22, label %51

22:                                               ; preds = %14
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  store i32 0, ptr %6, align 4, !tbaa !16
  br label %23

23:                                               ; preds = %45, %22
  %24 = load i32, ptr %6, align 4, !tbaa !16
  %25 = sext i32 %24 to i64
  %26 = load ptr, ptr %4, align 8, !tbaa !5
  %27 = getelementptr inbounds %class.TreeNode, ptr %26, i32 0, i32 1
  %28 = call noundef i64 @_ZNKSt6vectorIP8TreeNodeIiESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %27) #3
  %29 = icmp ult i64 %25, %28
  br i1 %29, label %31, label %30

30:                                               ; preds = %23
  store i32 2, ptr %7, align 4
  br label %48

31:                                               ; preds = %23
  %32 = load ptr, ptr %4, align 8, !tbaa !5
  %33 = getelementptr inbounds %class.TreeNode, ptr %32, i32 0, i32 1
  %34 = load i32, ptr %6, align 4, !tbaa !16
  %35 = sext i32 %34 to i64
  %36 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP8TreeNodeIiESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %33, i64 noundef %35) #3
  %37 = load ptr, ptr %36, align 8, !tbaa !5
  %38 = load ptr, ptr %5, align 8, !tbaa !5
  %39 = getelementptr inbounds %class.TreeNode, ptr %38, i32 0, i32 1
  %40 = load i32, ptr %6, align 4, !tbaa !16
  %41 = sext i32 %40 to i64
  %42 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP8TreeNodeIiESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %39, i64 noundef %41) #3
  %43 = load ptr, ptr %42, align 8, !tbaa !5
  %44 = call noundef zeroext i1 @_Z11isIdenticalP8TreeNodeIiES1_(ptr noundef %37, ptr noundef %43)
  store i1 %44, ptr %3, align 1
  store i32 1, ptr %7, align 4
  br label %48

45:                                               ; No predecessors!
  %46 = load i32, ptr %6, align 4, !tbaa !16
  %47 = add nsw i32 %46, 1
  store i32 %47, ptr %6, align 4, !tbaa !16
  br label %23, !llvm.loop !17

48:                                               ; preds = %31, %30
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  %49 = load i32, ptr %7, align 4
  switch i32 %49, label %54 [
    i32 2, label %50
    i32 1, label %52
  ]

50:                                               ; preds = %48
  br label %51

51:                                               ; preds = %50, %14
  unreachable

52:                                               ; preds = %48, %13
  %53 = load i1, ptr %3, align 1
  ret i1 %53

54:                                               ; preds = %48
  unreachable
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"_ZTS8TreeNodeIiE", !11, i64 0, !12, i64 8}
!11 = !{!"int", !7, i64 0}
!12 = !{!"_ZTSSt6vectorIP8TreeNodeIiESaIS2_EE", !13, i64 0}
!13 = !{!"_ZTSSt12_Vector_baseIP8TreeNodeIiESaIS2_EE", !14, i64 0}
!14 = !{!"_ZTSNSt12_Vector_baseIP8TreeNodeIiESaIS2_EE12_Vector_implE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIP8TreeNodeIiESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!16 = !{!11, !11, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIP8TreeNodeIiESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP8TreeNodeIiESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z11isIdenticalP8TreeNodeIiES1_(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
  %3 = icmp eq ptr %0, null
  %4 = icmp eq ptr %1, null
  %or.cond15 = or i1 %3, %4
  br i1 %or.cond15, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %2
  %5 = load i32, ptr %0, align 8, !tbaa !5
  %6 = load i32, ptr %1, align 8, !tbaa !5
  %7 = icmp eq i32 %5, %6
  tail call void @llvm.assume(i1 %7)
  %8 = getelementptr inbounds i8, ptr %0, i64 8
  %9 = tail call noundef i64 @_ZNKSt6vectorIP8TreeNodeIiESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %8) #2
  %.not.peel = icmp eq i64 %9, 0
  br i1 %.not.peel, label %._crit_edge, label %tailrecurse.peel

tailrecurse.peel:                                 ; preds = %.lr.ph.preheader
  %10 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP8TreeNodeIiESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %8, i64 noundef 0) #2
  %11 = load ptr, ptr %10, align 8, !tbaa !15
  %12 = getelementptr inbounds i8, ptr %1, i64 8
  %13 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP8TreeNodeIiESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %12, i64 noundef 0) #2
  %14 = load ptr, ptr %13, align 8, !tbaa !15
  %15 = icmp eq ptr %11, null
  %16 = icmp eq ptr %14, null
  %or.cond.peel = or i1 %15, %16
  br i1 %or.cond.peel, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %tailrecurse.peel, %tailrecurse
  %.tr1317 = phi ptr [ %26, %tailrecurse ], [ %14, %tailrecurse.peel ]
  %.tr16 = phi ptr [ %23, %tailrecurse ], [ %11, %tailrecurse.peel ]
  %17 = load i32, ptr %.tr16, align 8, !tbaa !5
  %18 = load i32, ptr %.tr1317, align 8, !tbaa !5
  %19 = icmp eq i32 %17, %18
  tail call void @llvm.assume(i1 %19)
  %20 = getelementptr inbounds i8, ptr %.tr16, i64 8
  %21 = tail call noundef i64 @_ZNKSt6vectorIP8TreeNodeIiESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %20) #2
  %.not = icmp eq i64 %21, 0
  br i1 %.not, label %._crit_edge, label %tailrecurse

tailrecurse:                                      ; preds = %.lr.ph
  %22 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP8TreeNodeIiESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef 0) #2
  %23 = load ptr, ptr %22, align 8, !tbaa !15
  %24 = getelementptr inbounds i8, ptr %.tr1317, i64 8
  %25 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP8TreeNodeIiESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %24, i64 noundef 0) #2
  %26 = load ptr, ptr %25, align 8, !tbaa !15
  %27 = icmp eq ptr %23, null
  %28 = icmp eq ptr %26, null
  %or.cond = or i1 %27, %28
  br i1 %or.cond, label %._crit_edge, label %.lr.ph, !llvm.loop !16

._crit_edge:                                      ; preds = %tailrecurse, %.lr.ph, %.lr.ph.preheader, %tailrecurse.peel, %2
  ret i1 false
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write)
declare void @llvm.assume(i1 noundef) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS8TreeNodeIiE", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTSSt6vectorIP8TreeNodeIiESaIS2_EE", !11, i64 0}
!11 = !{!"_ZTSSt12_Vector_baseIP8TreeNodeIiESaIS2_EE", !12, i64 0}
!12 = !{!"_ZTSNSt12_Vector_baseIP8TreeNodeIiESaIS2_EE12_Vector_implE", !13, i64 0}
!13 = !{!"_ZTSNSt12_Vector_baseIP8TreeNodeIiESaIS2_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!14, !14, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.peeled.count", i32 1}


; Effective O3 passes: BDCEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LoopFullUnrollPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass