; LLVM IR from reazon-research/OpenArm :: control/canfd_control/Drivers/STM32H7xx_HAL_Driver/Src (stm32h7xx_ll_usb)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.USB_OTG_HostTypeDef = type { i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @USB_InitFSLSPClkSel(ptr noundef %0, i8 noundef zeroext %1) #1 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i8 %1, ptr %5, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  %8 = load ptr, ptr %4, align 8, !tbaa !5
  %9 = ptrtoint ptr %8 to i32
  store i32 %9, ptr %6, align 4, !tbaa !10
  %10 = load i32, ptr %6, align 4, !tbaa !10
  %11 = zext i32 %10 to i64
  %12 = add i64 %11, 1024
  %13 = inttoptr i64 %12 to ptr
  %14 = getelementptr inbounds %struct.USB_OTG_HostTypeDef, ptr %13, i32 0, i32 0
  %15 = load volatile i32, ptr %14, align 4, !tbaa !12
  %16 = zext i32 %15 to i64
  %17 = and i64 %16, -4
  %18 = trunc i64 %17 to i32
  store volatile i32 %18, ptr %14, align 4, !tbaa !12
  %19 = load i8, ptr %5, align 1, !tbaa !9
  %20 = zext i8 %19 to i32
  %21 = zext i32 %20 to i64
  %22 = and i64 %21, 3
  %23 = load i32, ptr %6, align 4, !tbaa !10
  %24 = zext i32 %23 to i64
  %25 = add i64 %24, 1024
  %26 = inttoptr i64 %25 to ptr
  %27 = getelementptr inbounds %struct.USB_OTG_HostTypeDef, ptr %26, i32 0, i32 0
  %28 = load volatile i32, ptr %27, align 4, !tbaa !12
  %29 = zext i32 %28 to i64
  %30 = or i64 %29, %22
  %31 = trunc i64 %30 to i32
  store volatile i32 %31, ptr %27, align 4, !tbaa !12
  %32 = load i8, ptr %5, align 1, !tbaa !9
  %33 = zext i8 %32 to i32
  %34 = icmp eq i32 %33, 1
  br i1 %34, label %35, label %41

35:                                               ; preds = %2
  %36 = load i32, ptr %6, align 4, !tbaa !10
  %37 = zext i32 %36 to i64
  %38 = add i64 %37, 1024
  %39 = inttoptr i64 %38 to ptr
  %40 = getelementptr inbounds %struct.USB_OTG_HostTypeDef, ptr %39, i32 0, i32 1
  store volatile i32 48000, ptr %40, align 4, !tbaa !14
  br label %53

41:                                               ; preds = %2
  %42 = load i8, ptr %5, align 1, !tbaa !9
  %43 = zext i8 %42 to i32
  %44 = icmp eq i32 %43, 2
  br i1 %44, label %45, label %51

45:                                               ; preds = %41
  %46 = load i32, ptr %6, align 4, !tbaa !10
  %47 = zext i32 %46 to i64
  %48 = add i64 %47, 1024
  %49 = inttoptr i64 %48 to ptr
  %50 = getelementptr inbounds %struct.USB_OTG_HostTypeDef, ptr %49, i32 0, i32 1
  store volatile i32 6000, ptr %50, align 4, !tbaa !14
  br label %52

51:                                               ; preds = %41
  store i32 1, ptr %3, align 4
  store i32 1, ptr %7, align 4
  br label %54

52:                                               ; preds = %45
  br label %53

53:                                               ; preds = %52, %35
  store i32 0, ptr %3, align 4
  store i32 1, ptr %7, align 4
  br label %54

54:                                               ; preds = %53, %51
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  %55 = load i32, ptr %3, align 4
  ret i32 %55
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24}
!14 = !{!13, !11, i64 4}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local range(i32 0, 2) i32 @USB_InitFSLSPClkSel(ptr noundef %0, i8 noundef zeroext %1) local_unnamed_addr #0 {
  %3 = ptrtoint ptr %0 to i64
  %4 = and i64 %3, 4294967295
  %5 = add nuw nsw i64 %4, 1024
  %6 = inttoptr i64 %5 to ptr
  %7 = load volatile i32, ptr %6, align 4, !tbaa !5
  %8 = and i32 %7, -4
  store volatile i32 %8, ptr %6, align 4, !tbaa !5
  %9 = and i8 %1, 3
  %10 = load volatile i32, ptr %6, align 4, !tbaa !5
  %11 = zext nneg i8 %9 to i32
  %12 = or i32 %10, %11
  store volatile i32 %12, ptr %6, align 4, !tbaa !5
  switch i8 %1, label %15 [
    i8 1, label %.sink.split
    i8 2, label %13
  ]

13:                                               ; preds = %2
  br label %.sink.split

.sink.split:                                      ; preds = %2, %13
  %.sink = phi i32 [ 6000, %13 ], [ 48000, %2 ]
  %14 = getelementptr inbounds i8, ptr %6, i64 4
  store volatile i32 %.sink, ptr %14, align 4, !tbaa !10
  br label %15

15:                                               ; preds = %.sink.split, %2
  %.0 = phi i32 [ 1, %2 ], [ 0, %.sink.split ]
  ret i32 %.0
}

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 4}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass