; LLVM IR from balintbalazs/B3D :: source/src/B3D_cudaCompress/CPU/HistogramCPU.ll (ZN12cudaCompress12histogramCPUEPjPKtjj)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN12cudaCompress12histogramCPUEPjPKtjj(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) #0 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i16, align 2
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !9
  store i32 %3, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %12

12:                                               ; preds = %22, %4
  %13 = load i32, ptr %9, align 4, !tbaa !9
  %14 = load i32, ptr %8, align 4, !tbaa !9
  %15 = icmp ult i32 %13, %14
  br i1 %15, label %17, label %16

16:                                               ; preds = %12
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  br label %25

17:                                               ; preds = %12
  %18 = load ptr, ptr %5, align 8, !tbaa !5
  %19 = load i32, ptr %9, align 4, !tbaa !9
  %20 = zext i32 %19 to i64
  %21 = getelementptr inbounds i32, ptr %18, i64 %20
  store i32 0, ptr %21, align 4, !tbaa !9
  br label %22

22:                                               ; preds = %17
  %23 = load i32, ptr %9, align 4, !tbaa !9
  %24 = add i32 %23, 1
  store i32 %24, ptr %9, align 4, !tbaa !9
  br label %12, !llvm.loop !11

25:                                               ; preds = %16
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  store i32 0, ptr %10, align 4, !tbaa !9
  br label %26

26:                                               ; preds = %49, %25
  %27 = load i32, ptr %10, align 4, !tbaa !9
  %28 = load i32, ptr %7, align 4, !tbaa !9
  %29 = icmp ult i32 %27, %28
  br i1 %29, label %31, label %30

30:                                               ; preds = %26
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  br label %52

31:                                               ; preds = %26
  call void @llvm.lifetime.start.p0(i64 2, ptr %11) #2
  %32 = load ptr, ptr %6, align 8, !tbaa !5
  %33 = load i32, ptr %10, align 4, !tbaa !9
  %34 = zext i32 %33 to i64
  %35 = getelementptr inbounds i16, ptr %32, i64 %34
  %36 = load i16, ptr %35, align 2, !tbaa !13
  store i16 %36, ptr %11, align 2, !tbaa !13
  %37 = load i16, ptr %11, align 2, !tbaa !13
  %38 = zext i16 %37 to i32
  %39 = load i32, ptr %8, align 4, !tbaa !9
  %40 = icmp ult i32 %38, %39
  br i1 %40, label %41, label %48

41:                                               ; preds = %31
  %42 = load ptr, ptr %5, align 8, !tbaa !5
  %43 = load i16, ptr %11, align 2, !tbaa !13
  %44 = zext i16 %43 to i64
  %45 = getelementptr inbounds i32, ptr %42, i64 %44
  %46 = load i32, ptr %45, align 4, !tbaa !9
  %47 = add i32 %46, 1
  store i32 %47, ptr %45, align 4, !tbaa !9
  br label %48

48:                                               ; preds = %41, %31
  call void @llvm.lifetime.end.p0(i64 2, ptr %11) #2
  br label %49

49:                                               ; preds = %48
  %50 = load i32, ptr %10, align 4, !tbaa !9
  %51 = add i32 %50, 1
  store i32 %51, ptr %10, align 4, !tbaa !9
  br label %26, !llvm.loop !15

52:                                               ; preds = %30
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!14, !14, i64 0}
!14 = !{!"short", !7, i64 0}
!15 = distinct !{!15, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable
define dso_local void @_ZN12cudaCompress12histogramCPUEPjPKtjj(ptr nocapture noundef %0, ptr nocapture noundef readonly %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  %.not = icmp eq i32 %3, 0
  br i1 %.not, label %.preheader, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %4
  %5 = zext i32 %3 to i64
  %6 = shl nuw nsw i64 %5, 2
  tail call void @llvm.memset.p0.i64(ptr align 4 %0, i8 0, i64 %6, i1 false), !tbaa !5
  br label %.preheader

.preheader:                                       ; preds = %.lr.ph.preheader, %4
  %.not18 = icmp eq i32 %2, 0
  br i1 %.not18, label %._crit_edge, label %.lr.ph17.preheader

.lr.ph17.preheader:                               ; preds = %.preheader
  %wide.trip.count = zext i32 %2 to i64
  %xtraiter = and i64 %wide.trip.count, 1
  %7 = icmp eq i32 %2, 1
  br i1 %7, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph17.preheader.new

.lr.ph17.preheader.new:                           ; preds = %.lr.ph17.preheader
  %unroll_iter = and i64 %wide.trip.count, 4294967294
  br label %.lr.ph17

._crit_edge.loopexit.unr-lcssa:                   ; preds = %35, %.lr.ph17.preheader
  %indvars.iv.unr = phi i64 [ 0, %.lr.ph17.preheader ], [ %indvars.iv.next.1, %35 ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge, label %.lr.ph17.epil

.lr.ph17.epil:                                    ; preds = %._crit_edge.loopexit.unr-lcssa
  %8 = getelementptr inbounds i16, ptr %1, i64 %indvars.iv.unr
  %9 = load i16, ptr %8, align 2, !tbaa !9
  %10 = zext i16 %9 to i32
  %11 = icmp ult i32 %10, %3
  br i1 %11, label %12, label %._crit_edge

12:                                               ; preds = %.lr.ph17.epil
  %13 = zext i16 %9 to i64
  %14 = getelementptr inbounds i32, ptr %0, i64 %13
  %15 = load i32, ptr %14, align 4, !tbaa !5
  %16 = add i32 %15, 1
  store i32 %16, ptr %14, align 4, !tbaa !5
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit.unr-lcssa, %12, %.lr.ph17.epil, %.preheader
  ret void

.lr.ph17:                                         ; preds = %35, %.lr.ph17.preheader.new
  %indvars.iv = phi i64 [ 0, %.lr.ph17.preheader.new ], [ %indvars.iv.next.1, %35 ]
  %niter = phi i64 [ 0, %.lr.ph17.preheader.new ], [ %niter.next.1, %35 ]
  %17 = getelementptr inbounds i16, ptr %1, i64 %indvars.iv
  %18 = load i16, ptr %17, align 2, !tbaa !9
  %19 = zext i16 %18 to i32
  %20 = icmp ult i32 %19, %3
  br i1 %20, label %21, label %.lr.ph17.1

21:                                               ; preds = %.lr.ph17
  %22 = zext i16 %18 to i64
  %23 = getelementptr inbounds i32, ptr %0, i64 %22
  %24 = load i32, ptr %23, align 4, !tbaa !5
  %25 = add i32 %24, 1
  store i32 %25, ptr %23, align 4, !tbaa !5
  br label %.lr.ph17.1

.lr.ph17.1:                                       ; preds = %21, %.lr.ph17
  %indvars.iv.next = or disjoint i64 %indvars.iv, 1
  %26 = getelementptr inbounds i16, ptr %1, i64 %indvars.iv.next
  %27 = load i16, ptr %26, align 2, !tbaa !9
  %28 = zext i16 %27 to i32
  %29 = icmp ult i32 %28, %3
  br i1 %29, label %30, label %35

30:                                               ; preds = %.lr.ph17.1
  %31 = zext i16 %27 to i64
  %32 = getelementptr inbounds i32, ptr %0, i64 %31
  %33 = load i32, ptr %32, align 4, !tbaa !5
  %34 = add i32 %33, 1
  store i32 %34, ptr %32, align 4, !tbaa !5
  br label %35

35:                                               ; preds = %30, %.lr.ph17.1
  %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2
  %niter.next.1 = add i64 %niter, 2
  %niter.ncmp.1 = icmp eq i64 %niter.next.1, %unroll_iter
  br i1 %niter.ncmp.1, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph17, !llvm.loop !11
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

attributes #0 = { mustprogress nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopIdiomRecognizePass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass