; LLVM IR from reazon-research/OpenArm :: control/canfd_control/Drivers/STM32H7xx_HAL_Driver/Src (stm32h7xx_hal_dcmi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.DCMI_HandleTypeDef = type { ptr, %struct.DCMI_InitTypeDef, i32, i32, i32, i32, i32, i32, ptr, i32 }
%struct.DCMI_InitTypeDef = type { i32, i32, i32, i32, i32, i32, %struct.DCMI_CodesInitTypeDef, i32, i32, i32, i32, i32 }
%struct.DCMI_CodesInitTypeDef = type { i8, i8, i8, i8 }
%struct.DCMI_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_DCMI_Init(ptr noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  %4 = load ptr, ptr %3, align 8, !tbaa !5
  %5 = icmp eq ptr %4, null
  br i1 %5, label %6, label %7

6:                                                ; preds = %1
  store i32 1, ptr %2, align 4
  br label %146

7:                                                ; preds = %1
  %8 = load ptr, ptr %3, align 8, !tbaa !5
  %9 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %8, i32 0, i32 3
  %10 = load volatile i32, ptr %9, align 4, !tbaa !9
  %11 = icmp eq i32 %10, 0
  br i1 %11, label %12, label %14

12:                                               ; preds = %7
  %13 = load ptr, ptr %3, align 8, !tbaa !5
  call void @HAL_DCMI_MspInit(ptr noundef %13)
  br label %14

14:                                               ; preds = %12, %7
  %15 = load ptr, ptr %3, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %15, i32 0, i32 3
  store volatile i32 2, ptr %16, align 4, !tbaa !9
  %17 = load ptr, ptr %3, align 8, !tbaa !5
  %18 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %17, i32 0, i32 1
  %19 = getelementptr inbounds %struct.DCMI_InitTypeDef, ptr %18, i32 0, i32 5
  %20 = load i32, ptr %19, align 4, !tbaa !14
  %21 = icmp ne i32 %20, 0
  br i1 %21, label %22, label %26

22:                                               ; preds = %14
  %23 = load ptr, ptr %3, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %23, i32 0, i32 1
  %25 = getelementptr inbounds %struct.DCMI_InitTypeDef, ptr %24, i32 0, i32 8
  store i32 0, ptr %25, align 8, !tbaa !15
  br label %26

26:                                               ; preds = %22, %14
  %27 = load ptr, ptr %3, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %27, i32 0, i32 0
  %29 = load ptr, ptr %28, align 8, !tbaa !16
  %30 = getelementptr inbounds %struct.DCMI_TypeDef, ptr %29, i32 0, i32 0
  %31 = load volatile i32, ptr %30, align 4, !tbaa !17
  %32 = zext i32 %31 to i64
  %33 = and i64 %32, -2035705
  %34 = trunc i64 %33 to i32
  store volatile i32 %34, ptr %30, align 4, !tbaa !17
  %35 = load ptr, ptr %3, align 8, !tbaa !5
  %36 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %35, i32 0, i32 1
  %37 = getelementptr inbounds %struct.DCMI_InitTypeDef, ptr %36, i32 0, i32 0
  %38 = load i32, ptr %37, align 8, !tbaa !19
  %39 = load ptr, ptr %3, align 8, !tbaa !5
  %40 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %39, i32 0, i32 1
  %41 = getelementptr inbounds %struct.DCMI_InitTypeDef, ptr %40, i32 0, i32 4
  %42 = load i32, ptr %41, align 8, !tbaa !20
  %43 = or i32 %38, %42
  %44 = load ptr, ptr %3, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %44, i32 0, i32 1
  %46 = getelementptr inbounds %struct.DCMI_InitTypeDef, ptr %45, i32 0, i32 2
  %47 = load i32, ptr %46, align 8, !tbaa !21
  %48 = or i32 %43, %47
  %49 = load ptr, ptr %3, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %49, i32 0, i32 1
  %51 = getelementptr inbounds %struct.DCMI_InitTypeDef, ptr %50, i32 0, i32 3
  %52 = load i32, ptr %51, align 4, !tbaa !22
  %53 = or i32 %48, %52
  %54 = load ptr, ptr %3, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %54, i32 0, i32 1
  %56 = getelementptr inbounds %struct.DCMI_InitTypeDef, ptr %55, i32 0, i32 1
  %57 = load i32, ptr %56, align 4, !tbaa !23
  %58 = or i32 %53, %57
  %59 = load ptr, ptr %3, align 8, !tbaa !5
  %60 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %59, i32 0, i32 1
  %61 = getelementptr inbounds %struct.DCMI_InitTypeDef, ptr %60, i32 0, i32 5
  %62 = load i32, ptr %61, align 4, !tbaa !14
  %63 = or i32 %58, %62
  %64 = load ptr, ptr %3, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %64, i32 0, i32 1
  %66 = getelementptr inbounds %struct.DCMI_InitTypeDef, ptr %65, i32 0, i32 7
  %67 = load i32, ptr %66, align 4, !tbaa !24
  %68 = or i32 %63, %67
  %69 = load ptr, ptr %3, align 8, !tbaa !5
  %70 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %69, i32 0, i32 1
  %71 = getelementptr inbounds %struct.DCMI_InitTypeDef, ptr %70, i32 0, i32 8
  %72 = load i32, ptr %71, align 8, !tbaa !15
  %73 = or i32 %68, %72
  %74 = load ptr, ptr %3, align 8, !tbaa !5
  %75 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %74, i32 0, i32 1
  %76 = getelementptr inbounds %struct.DCMI_InitTypeDef, ptr %75, i32 0, i32 9
  %77 = load i32, ptr %76, align 4, !tbaa !25
  %78 = or i32 %73, %77
  %79 = load ptr, ptr %3, align 8, !tbaa !5
  %80 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %79, i32 0, i32 1
  %81 = getelementptr inbounds %struct.DCMI_InitTypeDef, ptr %80, i32 0, i32 10
  %82 = load i32, ptr %81, align 8, !tbaa !26
  %83 = or i32 %78, %82
  %84 = load ptr, ptr %3, align 8, !tbaa !5
  %85 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %84, i32 0, i32 1
  %86 = getelementptr inbounds %struct.DCMI_InitTypeDef, ptr %85, i32 0, i32 11
  %87 = load i32, ptr %86, align 4, !tbaa !27
  %88 = or i32 %83, %87
  %89 = load ptr, ptr %3, align 8, !tbaa !5
  %90 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %89, i32 0, i32 0
  %91 = load ptr, ptr %90, align 8, !tbaa !16
  %92 = getelementptr inbounds %struct.DCMI_TypeDef, ptr %91, i32 0, i32 0
  %93 = load volatile i32, ptr %92, align 4, !tbaa !17
  %94 = or i32 %93, %88
  store volatile i32 %94, ptr %92, align 4, !tbaa !17
  %95 = load ptr, ptr %3, align 8, !tbaa !5
  %96 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %95, i32 0, i32 1
  %97 = getelementptr inbounds %struct.DCMI_InitTypeDef, ptr %96, i32 0, i32 0
  %98 = load i32, ptr %97, align 8, !tbaa !19
  %99 = icmp eq i32 %98, 16
  br i1 %99, label %100, label %135

100:                                              ; preds = %26
  %101 = load ptr, ptr %3, align 8, !tbaa !5
  %102 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %101, i32 0, i32 1
  %103 = getelementptr inbounds %struct.DCMI_InitTypeDef, ptr %102, i32 0, i32 6
  %104 = getelementptr inbounds %struct.DCMI_CodesInitTypeDef, ptr %103, i32 0, i32 0
  %105 = load i8, ptr %104, align 8, !tbaa !28
  %106 = zext i8 %105 to i32
  %107 = load ptr, ptr %3, align 8, !tbaa !5
  %108 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %107, i32 0, i32 1
  %109 = getelementptr inbounds %struct.DCMI_InitTypeDef, ptr %108, i32 0, i32 6
  %110 = getelementptr inbounds %struct.DCMI_CodesInitTypeDef, ptr %109, i32 0, i32 1
  %111 = load i8, ptr %110, align 1, !tbaa !29
  %112 = zext i8 %111 to i32
  %113 = shl i32 %112, 8
  %114 = or i32 %106, %113
  %115 = load ptr, ptr %3, align 8, !tbaa !5
  %116 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %115, i32 0, i32 1
  %117 = getelementptr inbounds %struct.DCMI_InitTypeDef, ptr %116, i32 0, i32 6
  %118 = getelementptr inbounds %struct.DCMI_CodesInitTypeDef, ptr %117, i32 0, i32 2
  %119 = load i8, ptr %118, align 2, !tbaa !30
  %120 = zext i8 %119 to i32
  %121 = shl i32 %120, 16
  %122 = or i32 %114, %121
  %123 = load ptr, ptr %3, align 8, !tbaa !5
  %124 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %123, i32 0, i32 1
  %125 = getelementptr inbounds %struct.DCMI_InitTypeDef, ptr %124, i32 0, i32 6
  %126 = getelementptr inbounds %struct.DCMI_CodesInitTypeDef, ptr %125, i32 0, i32 3
  %127 = load i8, ptr %126, align 1, !tbaa !31
  %128 = zext i8 %127 to i32
  %129 = shl i32 %128, 24
  %130 = or i32 %122, %129
  %131 = load ptr, ptr %3, align 8, !tbaa !5
  %132 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %131, i32 0, i32 0
  %133 = load ptr, ptr %132, align 8, !tbaa !16
  %134 = getelementptr inbounds %struct.DCMI_TypeDef, ptr %133, i32 0, i32 6
  store volatile i32 %130, ptr %134, align 4, !tbaa !32
  br label %135

135:                                              ; preds = %100, %26
  %136 = load ptr, ptr %3, align 8, !tbaa !5
  %137 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %136, i32 0, i32 0
  %138 = load ptr, ptr %137, align 8, !tbaa !16
  %139 = getelementptr inbounds %struct.DCMI_TypeDef, ptr %138, i32 0, i32 3
  %140 = load volatile i32, ptr %139, align 4, !tbaa !33
  %141 = or i32 %140, 30
  store volatile i32 %141, ptr %139, align 4, !tbaa !33
  %142 = load ptr, ptr %3, align 8, !tbaa !5
  %143 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %142, i32 0, i32 9
  store volatile i32 0, ptr %143, align 8, !tbaa !34
  %144 = load ptr, ptr %3, align 8, !tbaa !5
  %145 = getelementptr inbounds %struct.DCMI_HandleTypeDef, ptr %144, i32 0, i32 3
  store volatile i32 1, ptr %145, align 4, !tbaa !9
  store i32 0, ptr %2, align 4
  br label %146

146:                                              ; preds = %135, %6
  %147 = load i32, ptr %2, align 4
  ret i32 %147
}

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_DCMI_MspInit(ptr noundef) #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 60}
!10 = !{!"", !6, i64 0, !11, i64 8, !12, i64 56, !12, i64 60, !12, i64 64, !12, i64 68, !12, i64 72, !12, i64 76, !6, i64 80, !12, i64 88}
!11 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !13, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44}
!12 = !{!"int", !7, i64 0}
!13 = !{!"", !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 3}
!14 = !{!10, !12, i64 28}
!15 = !{!10, !12, i64 40}
!16 = !{!10, !6, i64 0}
!17 = !{!18, !12, i64 0}
!18 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40}
!19 = !{!10, !12, i64 8}
!20 = !{!10, !12, i64 24}
!21 = !{!10, !12, i64 16}
!22 = !{!10, !12, i64 20}
!23 = !{!10, !12, i64 12}
!24 = !{!10, !12, i64 36}
!25 = !{!10, !12, i64 44}
!26 = !{!10, !12, i64 48}
!27 = !{!10, !12, i64 52}
!28 = !{!10, !7, i64 32}
!29 = !{!10, !7, i64 33}
!30 = !{!10, !7, i64 34}
!31 = !{!10, !7, i64 35}
!32 = !{!18, !12, i64 24}
!33 = !{!18, !12, i64 12}
!34 = !{!10, !12, i64 88}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @HAL_DCMI_Init(ptr noundef %0) local_unnamed_addr #0 {
  %2 = icmp eq ptr %0, null
  br i1 %2, label %38, label %3

3:                                                ; preds = %1
  %4 = getelementptr inbounds i8, ptr %0, i64 60
  %5 = load volatile i32, ptr %4, align 4, !tbaa !5
  %6 = icmp eq i32 %5, 0
  br i1 %6, label %7, label %8

7:                                                ; preds = %3
  tail call void @HAL_DCMI_MspInit(ptr noundef nonnull %0)
  br label %8

8:                                                ; preds = %7, %3
  store volatile i32 2, ptr %4, align 4, !tbaa !5
  %9 = getelementptr inbounds i8, ptr %0, i64 8
  %10 = getelementptr inbounds i8, ptr %0, i64 28
  %11 = load i32, ptr %10, align 4, !tbaa !13
  %.not = icmp eq i32 %11, 0
  br i1 %.not, label %14, label %12

12:                                               ; preds = %8
  %13 = getelementptr inbounds i8, ptr %0, i64 40
  store i32 0, ptr %13, align 8, !tbaa !14
  br label %14

14:                                               ; preds = %12, %8
  %15 = load ptr, ptr %0, align 8, !tbaa !15
  %16 = load volatile i32, ptr %15, align 4, !tbaa !16
  %17 = and i32 %16, -2035705
  store volatile i32 %17, ptr %15, align 4, !tbaa !16
  %18 = load i32, ptr %9, align 8, !tbaa !18
  %19 = getelementptr inbounds i8, ptr %0, i64 12
  %20 = load <4 x i32>, ptr %19, align 4, !tbaa !19
  %21 = getelementptr inbounds i8, ptr %0, i64 36
  %22 = load <4 x i32>, ptr %21, align 4, !tbaa !19
  %23 = getelementptr inbounds i8, ptr %0, i64 52
  %24 = load i32, ptr %23, align 4, !tbaa !20
  %25 = load volatile i32, ptr %15, align 4, !tbaa !16
  %26 = tail call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> %20)
  %27 = tail call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> %22)
  %op.rdx = or i32 %26, %27
  %op.rdx29 = or i32 %op.rdx, %24
  %op.rdx30 = or i32 %18, %25
  %op.rdx31 = or i32 %op.rdx29, %op.rdx30
  %op.rdx32 = or i32 %op.rdx31, %11
  store volatile i32 %op.rdx32, ptr %15, align 4, !tbaa !16
  %28 = icmp eq i32 %18, 16
  br i1 %28, label %29, label %33

29:                                               ; preds = %14
  %30 = getelementptr inbounds i8, ptr %0, i64 32
  %31 = load i32, ptr %30, align 8
  %32 = getelementptr inbounds i8, ptr %15, i64 24
  store volatile i32 %31, ptr %32, align 4, !tbaa !21
  br label %33

33:                                               ; preds = %29, %14
  %34 = getelementptr inbounds i8, ptr %15, i64 12
  %35 = load volatile i32, ptr %34, align 4, !tbaa !22
  %36 = or i32 %35, 30
  store volatile i32 %36, ptr %34, align 4, !tbaa !22
  %37 = getelementptr inbounds i8, ptr %0, i64 88
  store volatile i32 0, ptr %37, align 8, !tbaa !23
  store volatile i32 1, ptr %4, align 4, !tbaa !5
  br label %38

38:                                               ; preds = %1, %33
  %.0 = phi i32 [ 0, %33 ], [ 1, %1 ]
  ret i32 %.0
}

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_DCMI_MspInit(ptr noundef) local_unnamed_addr #0

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.or.v4i32(<4 x i32>) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 60}
!6 = !{!"", !7, i64 0, !10, i64 8, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !7, i64 80, !11, i64 88}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !12, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44}
!11 = !{!"int", !8, i64 0}
!12 = !{!"", !8, i64 0, !8, i64 1, !8, i64 2, !8, i64 3}
!13 = !{!6, !11, i64 28}
!14 = !{!6, !11, i64 40}
!15 = !{!6, !7, i64 0}
!16 = !{!17, !11, i64 0}
!17 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40}
!18 = !{!6, !11, i64 8}
!19 = !{!11, !11, i64 0}
!20 = !{!6, !11, i64 52}
!21 = !{!17, !11, i64 24}
!22 = !{!17, !11, i64 12}
!23 = !{!6, !11, i64 88}


; Effective O3 passes: AggressiveInstCombinePass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass