; LLVM IR from libtcod/libtcod :: src/libtcod (color)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TCOD_ColorRGB = type { i8, i8, i8 }

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #0

; Function Attrs: nounwind uwtable
define dso_local i24 @TCOD_color_lerp(i24 %0, i24 %1, float noundef %2) #1 {
  %4 = alloca %struct.TCOD_ColorRGB, align 1
  %5 = alloca %struct.TCOD_ColorRGB, align 1
  %6 = alloca %struct.TCOD_ColorRGB, align 1
  %7 = alloca float, align 4
  %8 = alloca i24, align 4
  store i24 %0, ptr %5, align 1
  store i24 %1, ptr %6, align 1
  store float %2, ptr %7, align 4, !tbaa !5
  %9 = getelementptr inbounds %struct.TCOD_ColorRGB, ptr %4, i32 0, i32 0
  %10 = getelementptr inbounds %struct.TCOD_ColorRGB, ptr %5, i32 0, i32 0
  %11 = load i8, ptr %10, align 1, !tbaa !9
  %12 = zext i8 %11 to i32
  %13 = sitofp i32 %12 to float
  %14 = getelementptr inbounds %struct.TCOD_ColorRGB, ptr %6, i32 0, i32 0
  %15 = load i8, ptr %14, align 1, !tbaa !9
  %16 = zext i8 %15 to i32
  %17 = getelementptr inbounds %struct.TCOD_ColorRGB, ptr %5, i32 0, i32 0
  %18 = load i8, ptr %17, align 1, !tbaa !9
  %19 = zext i8 %18 to i32
  %20 = sub nsw i32 %16, %19
  %21 = sitofp i32 %20 to float
  %22 = load float, ptr %7, align 4, !tbaa !5
  %23 = call float @llvm.fmuladd.f32(float %21, float %22, float %13)
  %24 = fptoui float %23 to i8
  store i8 %24, ptr %9, align 1, !tbaa !9
  %25 = getelementptr inbounds %struct.TCOD_ColorRGB, ptr %4, i32 0, i32 1
  %26 = getelementptr inbounds %struct.TCOD_ColorRGB, ptr %5, i32 0, i32 1
  %27 = load i8, ptr %26, align 1, !tbaa !11
  %28 = zext i8 %27 to i32
  %29 = sitofp i32 %28 to float
  %30 = getelementptr inbounds %struct.TCOD_ColorRGB, ptr %6, i32 0, i32 1
  %31 = load i8, ptr %30, align 1, !tbaa !11
  %32 = zext i8 %31 to i32
  %33 = getelementptr inbounds %struct.TCOD_ColorRGB, ptr %5, i32 0, i32 1
  %34 = load i8, ptr %33, align 1, !tbaa !11
  %35 = zext i8 %34 to i32
  %36 = sub nsw i32 %32, %35
  %37 = sitofp i32 %36 to float
  %38 = load float, ptr %7, align 4, !tbaa !5
  %39 = call float @llvm.fmuladd.f32(float %37, float %38, float %29)
  %40 = fptoui float %39 to i8
  store i8 %40, ptr %25, align 1, !tbaa !11
  %41 = getelementptr inbounds %struct.TCOD_ColorRGB, ptr %4, i32 0, i32 2
  %42 = getelementptr inbounds %struct.TCOD_ColorRGB, ptr %5, i32 0, i32 2
  %43 = load i8, ptr %42, align 1, !tbaa !12
  %44 = zext i8 %43 to i32
  %45 = sitofp i32 %44 to float
  %46 = getelementptr inbounds %struct.TCOD_ColorRGB, ptr %6, i32 0, i32 2
  %47 = load i8, ptr %46, align 1, !tbaa !12
  %48 = zext i8 %47 to i32
  %49 = getelementptr inbounds %struct.TCOD_ColorRGB, ptr %5, i32 0, i32 2
  %50 = load i8, ptr %49, align 1, !tbaa !12
  %51 = zext i8 %50 to i32
  %52 = sub nsw i32 %48, %51
  %53 = sitofp i32 %52 to float
  %54 = load float, ptr %7, align 4, !tbaa !5
  %55 = call float @llvm.fmuladd.f32(float %53, float %54, float %45)
  %56 = fptoui float %55 to i8
  store i8 %56, ptr %41, align 1, !tbaa !12
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %8, ptr align 1 %4, i64 3, i1 false)
  %57 = load i24, ptr %8, align 4
  ret i24 %57
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #2

attributes #0 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !7, i64 0}
!10 = !{!"TCOD_ColorRGB", !7, i64 0, !7, i64 1, !7, i64 2}
!11 = !{!10, !7, i64 1}
!12 = !{!10, !7, i64 2}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local i24 @TCOD_color_lerp(i24 %0, i24 %1, float noundef %2) local_unnamed_addr #0 {
  %.sroa.35.0.extract.shift = lshr i24 %0, 8
  %.sroa.5.0.extract.shift = lshr i24 %0, 16
  %.sroa.5.0.extract.trunc = zext nneg i24 %.sroa.5.0.extract.shift to i32
  %.sroa.2.0.extract.shift = lshr i24 %1, 8
  %.sroa.3.0.extract.shift = lshr i24 %1, 16
  %.sroa.3.0.extract.trunc = zext nneg i24 %.sroa.3.0.extract.shift to i32
  %4 = and i24 %0, 255
  %5 = zext nneg i24 %4 to i32
  %6 = uitofp nneg i24 %4 to float
  %7 = and i24 %1, 255
  %8 = zext nneg i24 %7 to i32
  %9 = sub nsw i32 %8, %5
  %10 = sitofp i32 %9 to float
  %11 = tail call float @llvm.fmuladd.f32(float %10, float %2, float %6)
  %12 = fptoui float %11 to i8
  %13 = and i24 %.sroa.35.0.extract.shift, 255
  %14 = zext nneg i24 %13 to i32
  %15 = uitofp nneg i24 %13 to float
  %16 = and i24 %.sroa.2.0.extract.shift, 255
  %17 = zext nneg i24 %16 to i32
  %18 = sub nsw i32 %17, %14
  %19 = sitofp i32 %18 to float
  %20 = tail call float @llvm.fmuladd.f32(float %19, float %2, float %15)
  %21 = fptoui float %20 to i8
  %22 = uitofp nneg i24 %.sroa.5.0.extract.shift to float
  %23 = sub nsw i32 %.sroa.3.0.extract.trunc, %.sroa.5.0.extract.trunc
  %24 = sitofp i32 %23 to float
  %25 = tail call float @llvm.fmuladd.f32(float %24, float %2, float %22)
  %26 = fptoui float %25 to i8
  %.sroa.310.0.insert.ext = zext i8 %26 to i24
  %.sroa.310.0.insert.shift = shl nuw i24 %.sroa.310.0.insert.ext, 16
  %.sroa.29.0.insert.ext = zext i8 %21 to i24
  %.sroa.29.0.insert.shift = shl nuw nsw i24 %.sroa.29.0.insert.ext, 8
  %.sroa.29.0.insert.insert = or disjoint i24 %.sroa.29.0.insert.shift, %.sroa.310.0.insert.shift
  %.sroa.08.0.insert.ext = zext i8 %12 to i24
  %.sroa.08.0.insert.insert = or disjoint i24 %.sroa.29.0.insert.insert, %.sroa.08.0.insert.ext
  ret i24 %.sroa.08.0.insert.insert
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #1

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,TailCallElimPass