; LLVM IR from lfarcaro/ARINC653_ARMV7A_AM335X :: Hardware (raster)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @LCDVersionGet() #1

; Function Attrs: nounwind uwtable
define dso_local void @RasterHparamConfig(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #2 {
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  store i32 %0, ptr %6, align 4, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !5
  store i32 %4, ptr %10, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %13 = call i32 @LCDVersionGet()
  store i32 %13, ptr %12, align 4, !tbaa !5
  %14 = load i32, ptr %12, align 4, !tbaa !5
  %15 = icmp eq i32 2, %14
  br i1 %15, label %16, label %30

16:                                               ; preds = %5
  %17 = load i32, ptr %7, align 4, !tbaa !5
  %18 = sub i32 %17, 1
  store i32 %18, ptr %11, align 4, !tbaa !5
  %19 = load i32, ptr %11, align 4, !tbaa !5
  %20 = and i32 %19, 1008
  %21 = load i32, ptr %11, align 4, !tbaa !5
  %22 = and i32 %21, 1024
  %23 = lshr i32 %22, 7
  %24 = or i32 %20, %23
  store i32 %24, ptr %11, align 4, !tbaa !5
  %25 = load i32, ptr %11, align 4, !tbaa !5
  %26 = load i32, ptr %6, align 4, !tbaa !5
  %27 = add i32 %26, 44
  %28 = zext i32 %27 to i64
  %29 = inttoptr i64 %28 to ptr
  store volatile i32 %25, ptr %29, align 4, !tbaa !5
  br label %45

30:                                               ; preds = %5
  %31 = load i32, ptr %12, align 4, !tbaa !5
  %32 = icmp eq i32 1, %31
  br i1 %32, label %33, label %43

33:                                               ; preds = %30
  %34 = load i32, ptr %7, align 4, !tbaa !5
  %35 = udiv i32 %34, 16
  %36 = sub i32 %35, 1
  store i32 %36, ptr %11, align 4, !tbaa !5
  %37 = load i32, ptr %11, align 4, !tbaa !5
  %38 = shl i32 %37, 4
  %39 = load i32, ptr %6, align 4, !tbaa !5
  %40 = add i32 %39, 44
  %41 = zext i32 %40 to i64
  %42 = inttoptr i64 %41 to ptr
  store volatile i32 %38, ptr %42, align 4, !tbaa !5
  br label %44

43:                                               ; preds = %30
  br label %44

44:                                               ; preds = %43, %33
  br label %45

45:                                               ; preds = %44, %16
  %46 = load i32, ptr %8, align 4, !tbaa !5
  %47 = sub i32 %46, 1
  %48 = shl i32 %47, 10
  %49 = load i32, ptr %6, align 4, !tbaa !5
  %50 = add i32 %49, 44
  %51 = zext i32 %50 to i64
  %52 = inttoptr i64 %51 to ptr
  %53 = load volatile i32, ptr %52, align 4, !tbaa !5
  %54 = or i32 %53, %48
  store volatile i32 %54, ptr %52, align 4, !tbaa !5
  %55 = load i32, ptr %9, align 4, !tbaa !5
  %56 = sub i32 %55, 1
  %57 = shl i32 %56, 16
  %58 = load i32, ptr %6, align 4, !tbaa !5
  %59 = add i32 %58, 44
  %60 = zext i32 %59 to i64
  %61 = inttoptr i64 %60 to ptr
  %62 = load volatile i32, ptr %61, align 4, !tbaa !5
  %63 = or i32 %62, %57
  store volatile i32 %63, ptr %61, align 4, !tbaa !5
  %64 = load i32, ptr %10, align 4, !tbaa !5
  %65 = sub i32 %64, 1
  %66 = shl i32 %65, 24
  %67 = load i32, ptr %6, align 4, !tbaa !5
  %68 = add i32 %67, 44
  %69 = zext i32 %68 to i64
  %70 = inttoptr i64 %69 to ptr
  %71 = load volatile i32, ptr %70, align 4, !tbaa !5
  %72 = or i32 %71, %66
  store volatile i32 %72, ptr %70, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare i32 @LCDVersionGet() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @RasterHparamConfig(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #1 {
  %6 = tail call i32 @LCDVersionGet() #2
  switch i32 %6, label %._crit_edge [
    i32 2, label %7
    i32 1, label %16
  ]

._crit_edge:                                      ; preds = %5
  %.pre = add i32 %0, 44
  %.pre16 = zext i32 %.pre to i64
  %.pre18 = inttoptr i64 %.pre16 to ptr
  br label %22

7:                                                ; preds = %5
  %8 = add i32 %1, -1
  %9 = and i32 %8, 1008
  %10 = lshr i32 %8, 7
  %11 = and i32 %10, 8
  %12 = or disjoint i32 %11, %9
  %13 = add i32 %0, 44
  %14 = zext i32 %13 to i64
  %15 = inttoptr i64 %14 to ptr
  store volatile i32 %12, ptr %15, align 4, !tbaa !5
  br label %22

16:                                               ; preds = %5
  %17 = and i32 %1, -16
  %18 = add i32 %17, -16
  %19 = add i32 %0, 44
  %20 = zext i32 %19 to i64
  %21 = inttoptr i64 %20 to ptr
  store volatile i32 %18, ptr %21, align 4, !tbaa !5
  br label %22

22:                                               ; preds = %._crit_edge, %16, %7
  %.pre-phi19 = phi ptr [ %.pre18, %._crit_edge ], [ %21, %16 ], [ %15, %7 ]
  %23 = shl i32 %2, 10
  %24 = add i32 %23, -1024
  %25 = load volatile i32, ptr %.pre-phi19, align 4, !tbaa !5
  %26 = or i32 %25, %24
  store volatile i32 %26, ptr %.pre-phi19, align 4, !tbaa !5
  %27 = shl i32 %3, 16
  %28 = add i32 %27, -65536
  %29 = load volatile i32, ptr %.pre-phi19, align 4, !tbaa !5
  %30 = or i32 %29, %28
  store volatile i32 %30, ptr %.pre-phi19, align 4, !tbaa !5
  %31 = shl i32 %4, 24
  %32 = add i32 %31, -16777216
  %33 = load volatile i32, ptr %.pre-phi19, align 4, !tbaa !5
  %34 = or i32 %33, %32
  store volatile i32 %34, ptr %.pre-phi19, align 4, !tbaa !5
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: BDCEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass