; LLVM IR from lfarcaro/ARINC653_ARMV7A_AM335X :: Hardware (dcan)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local i32 @DCANIFBusyStatusGet(i32 noundef, i32 noundef) #0

; Function Attrs: nounwind uwtable
define dso_local void @DCANMsgIdSet(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #0 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store i32 %0, ptr %5, align 4, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !5
  store i32 %3, ptr %8, align 4, !tbaa !5
  %9 = load i32, ptr %7, align 4, !tbaa !5
  %10 = icmp eq i32 %9, 0
  br i1 %10, label %11, label %14

11:                                               ; preds = %4
  %12 = load i32, ptr %6, align 4, !tbaa !5
  %13 = shl i32 %12, 18
  store i32 %13, ptr %6, align 4, !tbaa !5
  br label %14

14:                                               ; preds = %11, %4
  br label %15

15:                                               ; preds = %20, %14
  %16 = load i32, ptr %5, align 4, !tbaa !5
  %17 = load i32, ptr %8, align 4, !tbaa !5
  %18 = call i32 @DCANIFBusyStatusGet(i32 noundef %16, i32 noundef %17)
  %19 = icmp ne i32 %18, 0
  br i1 %19, label %20, label %21

20:                                               ; preds = %15
  br label %15, !llvm.loop !9

21:                                               ; preds = %15
  %22 = load i32, ptr %5, align 4, !tbaa !5
  %23 = load i32, ptr %8, align 4, !tbaa !5
  %24 = sub i32 %23, 1
  %25 = mul i32 %24, 32
  %26 = add i32 264, %25
  %27 = add i32 %22, %26
  %28 = zext i32 %27 to i64
  %29 = inttoptr i64 %28 to ptr
  %30 = load volatile i32, ptr %29, align 4, !tbaa !5
  %31 = and i32 %30, -1610612736
  store volatile i32 %31, ptr %29, align 4, !tbaa !5
  br label %32

32:                                               ; preds = %37, %21
  %33 = load i32, ptr %5, align 4, !tbaa !5
  %34 = load i32, ptr %8, align 4, !tbaa !5
  %35 = call i32 @DCANIFBusyStatusGet(i32 noundef %33, i32 noundef %34)
  %36 = icmp ne i32 %35, 0
  br i1 %36, label %37, label %38

37:                                               ; preds = %32
  br label %32, !llvm.loop !11

38:                                               ; preds = %32
  %39 = load i32, ptr %6, align 4, !tbaa !5
  %40 = and i32 %39, 536870911
  %41 = load i32, ptr %7, align 4, !tbaa !5
  %42 = and i32 %41, 1073741824
  %43 = or i32 %40, %42
  %44 = load i32, ptr %5, align 4, !tbaa !5
  %45 = load i32, ptr %8, align 4, !tbaa !5
  %46 = sub i32 %45, 1
  %47 = mul i32 %46, 32
  %48 = add i32 264, %47
  %49 = add i32 %44, %48
  %50 = zext i32 %49 to i64
  %51 = inttoptr i64 %50 to ptr
  %52 = load volatile i32, ptr %51, align 4, !tbaa !5
  %53 = or i32 %52, %43
  store volatile i32 %53, ptr %51, align 4, !tbaa !5
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local i32 @DCANIFBusyStatusGet(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @DCANMsgIdSet(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  br label %5

5:                                                ; preds = %5, %4
  %6 = tail call i32 @DCANIFBusyStatusGet(i32 noundef %0, i32 noundef %3)
  %.not = icmp eq i32 %6, 0
  br i1 %.not, label %7, label %5, !llvm.loop !5

7:                                                ; preds = %5
  %8 = shl i32 %3, 5
  %9 = add i32 %0, 232
  %10 = add i32 %9, %8
  %11 = zext i32 %10 to i64
  %12 = inttoptr i64 %11 to ptr
  %13 = load volatile i32, ptr %12, align 4, !tbaa !7
  %14 = and i32 %13, -1610612736
  store volatile i32 %14, ptr %12, align 4, !tbaa !7
  br label %15

15:                                               ; preds = %15, %7
  %16 = tail call i32 @DCANIFBusyStatusGet(i32 noundef %0, i32 noundef %3)
  %.not12 = icmp eq i32 %16, 0
  br i1 %.not12, label %17, label %15, !llvm.loop !11

17:                                               ; preds = %15
  %18 = icmp eq i32 %2, 0
  %19 = shl i32 %1, 18
  %spec.select = select i1 %18, i32 %19, i32 %1
  %20 = and i32 %spec.select, 536870911
  %21 = and i32 %2, 1073741824
  %22 = or disjoint i32 %20, %21
  %23 = load volatile i32, ptr %12, align 4, !tbaa !7
  %24 = or i32 %22, %23
  store volatile i32 %24, ptr %12, align 4, !tbaa !7
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!8, !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = distinct !{!11, !6}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass