; LLVM IR from ShahjalalShohag/code-library :: Math/Determinant under Composite Modulo.ll (Z5GaussSt6vectorIS_IiSaIiEESaIS1_EEi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z5GaussSt6vectorIS_IiSaIiEESaIS1_EEi(ptr noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  %18 = call noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #3
  %19 = trunc i64 %18 to i32
  store i32 %19, ptr %6, align 4, !tbaa !9
  %20 = load i32, ptr %6, align 4, !tbaa !9
  %21 = sext i32 %20 to i64
  %22 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #3
  %23 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %22) #3
  %24 = icmp ne i64 %21, %23
  br i1 %24, label %25, label %26

25:                                               ; preds = %2
  store i32 0, ptr %3, align 4
  store i32 1, ptr %7, align 4
  br label %291

26:                                               ; preds = %2
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  store i32 1, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  store i32 0, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  store i32 0, ptr %10, align 4, !tbaa !9
  br label %27

27:                                               ; preds = %283, %26
  %28 = load i32, ptr %9, align 4, !tbaa !9
  %29 = load i32, ptr %6, align 4, !tbaa !9
  %30 = icmp slt i32 %28, %29
  br i1 %30, label %31, label %35

31:                                               ; preds = %27
  %32 = load i32, ptr %10, align 4, !tbaa !9
  %33 = load i32, ptr %6, align 4, !tbaa !9
  %34 = icmp slt i32 %32, %33
  br label %35

35:                                               ; preds = %31, %27
  %36 = phi i1 [ false, %27 ], [ %34, %31 ]
  br i1 %36, label %38, label %37

37:                                               ; preds = %35
  store i32 2, ptr %7, align 4
  br label %286

38:                                               ; preds = %35
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  %39 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %39, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %40 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %40, ptr %12, align 4, !tbaa !9
  br label %41

41:                                               ; preds = %65, %38
  %42 = load i32, ptr %12, align 4, !tbaa !9
  %43 = load i32, ptr %6, align 4, !tbaa !9
  %44 = icmp slt i32 %42, %43
  br i1 %44, label %46, label %45

45:                                               ; preds = %41
  store i32 5, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  br label %68

46:                                               ; preds = %41
  %47 = load i32, ptr %12, align 4, !tbaa !9
  %48 = sext i32 %47 to i64
  %49 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %48) #3
  %50 = load i32, ptr %9, align 4, !tbaa !9
  %51 = sext i32 %50 to i64
  %52 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %49, i64 noundef %51) #3
  %53 = load i32, ptr %52, align 4, !tbaa !9
  %54 = load i32, ptr %11, align 4, !tbaa !9
  %55 = sext i32 %54 to i64
  %56 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %55) #3
  %57 = load i32, ptr %9, align 4, !tbaa !9
  %58 = sext i32 %57 to i64
  %59 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %56, i64 noundef %58) #3
  %60 = load i32, ptr %59, align 4, !tbaa !9
  %61 = icmp sgt i32 %53, %60
  br i1 %61, label %62, label %64

62:                                               ; preds = %46
  %63 = load i32, ptr %12, align 4, !tbaa !9
  store i32 %63, ptr %11, align 4, !tbaa !9
  br label %64

64:                                               ; preds = %62, %46
  br label %65

65:                                               ; preds = %64
  %66 = load i32, ptr %12, align 4, !tbaa !9
  %67 = add nsw i32 %66, 1
  store i32 %67, ptr %12, align 4, !tbaa !9
  br label %41, !llvm.loop !11

68:                                               ; preds = %45
  %69 = load i32, ptr %11, align 4, !tbaa !9
  %70 = sext i32 %69 to i64
  %71 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %70) #3
  %72 = load i32, ptr %9, align 4, !tbaa !9
  %73 = sext i32 %72 to i64
  %74 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %71, i64 noundef %73) #3
  %75 = load i32, ptr %74, align 4, !tbaa !9
  %76 = icmp eq i32 %75, 0
  br i1 %76, label %77, label %78

77:                                               ; preds = %68
  store i32 0, ptr %3, align 4
  store i32 1, ptr %7, align 4
  br label %280

78:                                               ; preds = %68
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  %79 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %79, ptr %13, align 4, !tbaa !9
  br label %80

80:                                               ; preds = %98, %78
  %81 = load i32, ptr %13, align 4, !tbaa !9
  %82 = load i32, ptr %6, align 4, !tbaa !9
  %83 = icmp slt i32 %81, %82
  br i1 %83, label %85, label %84

84:                                               ; preds = %80
  store i32 8, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  br label %101

85:                                               ; preds = %80
  %86 = load i32, ptr %10, align 4, !tbaa !9
  %87 = sext i32 %86 to i64
  %88 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %87) #3
  %89 = load i32, ptr %13, align 4, !tbaa !9
  %90 = sext i32 %89 to i64
  %91 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %88, i64 noundef %90) #3
  %92 = load i32, ptr %11, align 4, !tbaa !9
  %93 = sext i32 %92 to i64
  %94 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %93) #3
  %95 = load i32, ptr %13, align 4, !tbaa !9
  %96 = sext i32 %95 to i64
  %97 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %94, i64 noundef %96) #3
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %91, ptr noundef nonnull align 4 dereferenceable(4) %97) #3
  br label %98

98:                                               ; preds = %85
  %99 = load i32, ptr %13, align 4, !tbaa !9
  %100 = add nsw i32 %99, 1
  store i32 %100, ptr %13, align 4, !tbaa !9
  br label %80, !llvm.loop !13

101:                                              ; preds = %84
  %102 = load i32, ptr %10, align 4, !tbaa !9
  %103 = load i32, ptr %11, align 4, !tbaa !9
  %104 = icmp ne i32 %102, %103
  br i1 %104, label %105, label %115

105:                                              ; preds = %101
  %106 = load i32, ptr %8, align 4, !tbaa !9
  %107 = icmp eq i32 %106, 0
  br i1 %107, label %108, label %109

108:                                              ; preds = %105
  br label %113

109:                                              ; preds = %105
  %110 = load i32, ptr %5, align 4, !tbaa !9
  %111 = load i32, ptr %8, align 4, !tbaa !9
  %112 = sub nsw i32 %110, %111
  br label %113

113:                                              ; preds = %109, %108
  %114 = phi i32 [ 0, %108 ], [ %112, %109 ]
  store i32 %114, ptr %8, align 4, !tbaa !9
  br label %115

115:                                              ; preds = %113, %101
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  %116 = load i32, ptr %10, align 4, !tbaa !9
  %117 = add nsw i32 %116, 1
  store i32 %117, ptr %14, align 4, !tbaa !9
  br label %118

118:                                              ; preds = %258, %115
  %119 = load i32, ptr %14, align 4, !tbaa !9
  %120 = load i32, ptr %6, align 4, !tbaa !9
  %121 = icmp slt i32 %119, %120
  br i1 %121, label %123, label %122

122:                                              ; preds = %118
  store i32 11, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  br label %261

123:                                              ; preds = %118
  br label %124

124:                                              ; preds = %223, %123
  %125 = load i32, ptr %10, align 4, !tbaa !9
  %126 = sext i32 %125 to i64
  %127 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %126) #3
  %128 = load i32, ptr %9, align 4, !tbaa !9
  %129 = sext i32 %128 to i64
  %130 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %127, i64 noundef %129) #3
  %131 = load i32, ptr %130, align 4, !tbaa !9
  %132 = icmp ne i32 %131, 0
  br i1 %132, label %133, label %225

133:                                              ; preds = %124
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  %134 = load i32, ptr %14, align 4, !tbaa !9
  %135 = sext i32 %134 to i64
  %136 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %135) #3
  %137 = load i32, ptr %9, align 4, !tbaa !9
  %138 = sext i32 %137 to i64
  %139 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %136, i64 noundef %138) #3
  %140 = load i32, ptr %139, align 4, !tbaa !9
  %141 = load i32, ptr %10, align 4, !tbaa !9
  %142 = sext i32 %141 to i64
  %143 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %142) #3
  %144 = load i32, ptr %9, align 4, !tbaa !9
  %145 = sext i32 %144 to i64
  %146 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %143, i64 noundef %145) #3
  %147 = load i32, ptr %146, align 4, !tbaa !9
  %148 = sdiv i32 %140, %147
  store i32 %148, ptr %15, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #3
  %149 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %149, ptr %16, align 4, !tbaa !9
  br label %150

150:                                              ; preds = %212, %133
  %151 = load i32, ptr %16, align 4, !tbaa !9
  %152 = load i32, ptr %6, align 4, !tbaa !9
  %153 = icmp slt i32 %151, %152
  br i1 %153, label %155, label %154

154:                                              ; preds = %150
  store i32 16, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #3
  br label %215

155:                                              ; preds = %150
  %156 = load i32, ptr %10, align 4, !tbaa !9
  %157 = sext i32 %156 to i64
  %158 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %157) #3
  %159 = load i32, ptr %16, align 4, !tbaa !9
  %160 = sext i32 %159 to i64
  %161 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %158, i64 noundef %160) #3
  %162 = load i32, ptr %161, align 4, !tbaa !9
  %163 = sext i32 %162 to i64
  %164 = mul nsw i64 1, %163
  %165 = load i32, ptr %15, align 4, !tbaa !9
  %166 = sext i32 %165 to i64
  %167 = mul nsw i64 %164, %166
  %168 = load i32, ptr %5, align 4, !tbaa !9
  %169 = sext i32 %168 to i64
  %170 = srem i64 %167, %169
  %171 = load i32, ptr %14, align 4, !tbaa !9
  %172 = sext i32 %171 to i64
  %173 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %172) #3
  %174 = load i32, ptr %16, align 4, !tbaa !9
  %175 = sext i32 %174 to i64
  %176 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %173, i64 noundef %175) #3
  %177 = load i32, ptr %176, align 4, !tbaa !9
  %178 = sext i32 %177 to i64
  %179 = sub nsw i64 %178, %170
  %180 = trunc i64 %179 to i32
  store i32 %180, ptr %176, align 4, !tbaa !9
  %181 = load i32, ptr %14, align 4, !tbaa !9
  %182 = sext i32 %181 to i64
  %183 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %182) #3
  %184 = load i32, ptr %16, align 4, !tbaa !9
  %185 = sext i32 %184 to i64
  %186 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %183, i64 noundef %185) #3
  %187 = load i32, ptr %186, align 4, !tbaa !9
  %188 = icmp slt i32 %187, 0
  br i1 %188, label %189, label %199

189:                                              ; preds = %155
  %190 = load i32, ptr %5, align 4, !tbaa !9
  %191 = load i32, ptr %14, align 4, !tbaa !9
  %192 = sext i32 %191 to i64
  %193 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %192) #3
  %194 = load i32, ptr %16, align 4, !tbaa !9
  %195 = sext i32 %194 to i64
  %196 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %193, i64 noundef %195) #3
  %197 = load i32, ptr %196, align 4, !tbaa !9
  %198 = add nsw i32 %197, %190
  store i32 %198, ptr %196, align 4, !tbaa !9
  br label %199

199:                                              ; preds = %189, %155
  %200 = load i32, ptr %14, align 4, !tbaa !9
  %201 = sext i32 %200 to i64
  %202 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %201) #3
  %203 = load i32, ptr %16, align 4, !tbaa !9
  %204 = sext i32 %203 to i64
  %205 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %202, i64 noundef %204) #3
  %206 = load i32, ptr %10, align 4, !tbaa !9
  %207 = sext i32 %206 to i64
  %208 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %207) #3
  %209 = load i32, ptr %16, align 4, !tbaa !9
  %210 = sext i32 %209 to i64
  %211 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %208, i64 noundef %210) #3
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %205, ptr noundef nonnull align 4 dereferenceable(4) %211) #3
  br label %212

212:                                              ; preds = %199
  %213 = load i32, ptr %16, align 4, !tbaa !9
  %214 = add nsw i32 %213, 1
  store i32 %214, ptr %16, align 4, !tbaa !9
  br label %150, !llvm.loop !14

215:                                              ; preds = %154
  %216 = load i32, ptr %8, align 4, !tbaa !9
  %217 = icmp eq i32 %216, 0
  br i1 %217, label %218, label %219

218:                                              ; preds = %215
  br label %223

219:                                              ; preds = %215
  %220 = load i32, ptr %5, align 4, !tbaa !9
  %221 = load i32, ptr %8, align 4, !tbaa !9
  %222 = sub nsw i32 %220, %221
  br label %223

223:                                              ; preds = %219, %218
  %224 = phi i32 [ 0, %218 ], [ %222, %219 ]
  store i32 %224, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  br label %124, !llvm.loop !15

225:                                              ; preds = %124
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #3
  %226 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %226, ptr %17, align 4, !tbaa !9
  br label %227

227:                                              ; preds = %245, %225
  %228 = load i32, ptr %17, align 4, !tbaa !9
  %229 = load i32, ptr %6, align 4, !tbaa !9
  %230 = icmp slt i32 %228, %229
  br i1 %230, label %232, label %231

231:                                              ; preds = %227
  store i32 19, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #3
  br label %248

232:                                              ; preds = %227
  %233 = load i32, ptr %10, align 4, !tbaa !9
  %234 = sext i32 %233 to i64
  %235 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %234) #3
  %236 = load i32, ptr %17, align 4, !tbaa !9
  %237 = sext i32 %236 to i64
  %238 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %235, i64 noundef %237) #3
  %239 = load i32, ptr %14, align 4, !tbaa !9
  %240 = sext i32 %239 to i64
  %241 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %240) #3
  %242 = load i32, ptr %17, align 4, !tbaa !9
  %243 = sext i32 %242 to i64
  %244 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %241, i64 noundef %243) #3
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %238, ptr noundef nonnull align 4 dereferenceable(4) %244) #3
  br label %245

245:                                              ; preds = %232
  %246 = load i32, ptr %17, align 4, !tbaa !9
  %247 = add nsw i32 %246, 1
  store i32 %247, ptr %17, align 4, !tbaa !9
  br label %227, !llvm.loop !16

248:                                              ; preds = %231
  %249 = load i32, ptr %8, align 4, !tbaa !9
  %250 = icmp eq i32 %249, 0
  br i1 %250, label %251, label %252

251:                                              ; preds = %248
  br label %256

252:                                              ; preds = %248
  %253 = load i32, ptr %5, align 4, !tbaa !9
  %254 = load i32, ptr %8, align 4, !tbaa !9
  %255 = sub nsw i32 %253, %254
  br label %256

256:                                              ; preds = %252, %251
  %257 = phi i32 [ 0, %251 ], [ %255, %252 ]
  store i32 %257, ptr %8, align 4, !tbaa !9
  br label %258

258:                                              ; preds = %256
  %259 = load i32, ptr %14, align 4, !tbaa !9
  %260 = add nsw i32 %259, 1
  store i32 %260, ptr %14, align 4, !tbaa !9
  br label %118, !llvm.loop !17

261:                                              ; preds = %122
  %262 = load i32, ptr %8, align 4, !tbaa !9
  %263 = sext i32 %262 to i64
  %264 = mul nsw i64 1, %263
  %265 = load i32, ptr %10, align 4, !tbaa !9
  %266 = sext i32 %265 to i64
  %267 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %266) #3
  %268 = load i32, ptr %9, align 4, !tbaa !9
  %269 = sext i32 %268 to i64
  %270 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %267, i64 noundef %269) #3
  %271 = load i32, ptr %270, align 4, !tbaa !9
  %272 = sext i32 %271 to i64
  %273 = mul nsw i64 %264, %272
  %274 = load i32, ptr %5, align 4, !tbaa !9
  %275 = sext i32 %274 to i64
  %276 = srem i64 %273, %275
  %277 = trunc i64 %276 to i32
  store i32 %277, ptr %8, align 4, !tbaa !9
  %278 = load i32, ptr %10, align 4, !tbaa !9
  %279 = add nsw i32 %278, 1
  store i32 %279, ptr %10, align 4, !tbaa !9
  store i32 0, ptr %7, align 4
  br label %280

280:                                              ; preds = %261, %77
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  %281 = load i32, ptr %7, align 4
  switch i32 %281, label %286 [
    i32 0, label %282
  ]

282:                                              ; preds = %280
  br label %283

283:                                              ; preds = %282
  %284 = load i32, ptr %9, align 4, !tbaa !9
  %285 = add nsw i32 %284, 1
  store i32 %285, ptr %9, align 4, !tbaa !9
  br label %27, !llvm.loop !18

286:                                              ; preds = %280, %37
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  %287 = load i32, ptr %7, align 4
  switch i32 %287, label %290 [
    i32 2, label %288
  ]

288:                                              ; preds = %286
  %289 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %289, ptr %3, align 4
  store i32 1, ptr %7, align 4
  br label %290

290:                                              ; preds = %288, %286
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  br label %291

291:                                              ; preds = %290, %25
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  %292 = load i32, ptr %3, align 4
  ret i32 %292
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}
!15 = distinct !{!15, !12}
!16 = distinct !{!16, !12}
!17 = distinct !{!17, !12}
!18 = distinct !{!18, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z5GaussSt6vectorIS_IiSaIiEESaIS1_EEi(ptr noundef nonnull %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = tail call noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #2
  %sext = shl i64 %3, 32
  %4 = ashr exact i64 %sext, 32
  %5 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #2
  %6 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %5) #2
  %.not = icmp eq i64 %4, %6
  br i1 %.not, label %.preheader114, label %.thread

.preheader114:                                    ; preds = %2
  %7 = trunc i64 %3 to i32
  %8 = icmp slt i32 %7, 1
  br i1 %8, label %.thread, label %.preheader113.lr.ph

.preheader113.lr.ph:                              ; preds = %.preheader114
  %9 = sext i32 %1 to i64
  %10 = and i64 %3, 2147483647
  %wide.trip.count170 = and i64 %3, 2147483647
  br label %.preheader113

.preheader113:                                    ; preds = %.preheader113.lr.ph, %._crit_edge131
  %indvars.iv160 = phi i64 [ 1, %.preheader113.lr.ph ], [ %indvars.iv.next161, %._crit_edge131 ]
  %indvars.iv = phi i64 [ 0, %.preheader113.lr.ph ], [ %indvars.iv.next, %._crit_edge131 ]
  %.094134 = phi i32 [ 1, %.preheader113.lr.ph ], [ %94, %._crit_edge131 ]
  %11 = trunc nuw nsw i64 %indvars.iv to i32
  br label %17

12:                                               ; preds = %17
  %13 = sext i32 %spec.select to i64
  %14 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %13) #2
  %15 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %14, i64 noundef %indvars.iv) #2
  %16 = load i32, ptr %15, align 4, !tbaa !5
  %.not104 = icmp eq i32 %16, 0
  br i1 %.not104, label %.thread, label %.lr.ph

17:                                               ; preds = %.preheader113, %17
  %indvars.iv141 = phi i64 [ %indvars.iv, %.preheader113 ], [ %indvars.iv.next142, %17 ]
  %.089115 = phi i32 [ %11, %.preheader113 ], [ %spec.select, %17 ]
  %18 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv141) #2
  %19 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %18, i64 noundef %indvars.iv) #2
  %20 = load i32, ptr %19, align 4, !tbaa !5
  %21 = sext i32 %.089115 to i64
  %22 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %21) #2
  %23 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %22, i64 noundef %indvars.iv) #2
  %24 = load i32, ptr %23, align 4, !tbaa !5
  %25 = icmp sgt i32 %20, %24
  %26 = trunc nuw nsw i64 %indvars.iv141 to i32
  %spec.select = select i1 %25, i32 %26, i32 %.089115
  %indvars.iv.next142 = add nuw nsw i64 %indvars.iv141, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next142, %wide.trip.count170
  br i1 %exitcond.not, label %12, label %17, !llvm.loop !9

._crit_edge:                                      ; preds = %.lr.ph
  %27 = zext i32 %spec.select to i64
  %.not102 = icmp eq i64 %indvars.iv, %27
  %28 = icmp eq i32 %.094134, 0
  %29 = sub nsw i32 %1, %.094134
  %30 = select i1 %28, i32 0, i32 %29
  %.195 = select i1 %.not102, i32 %.094134, i32 %30
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %31 = icmp ult i64 %indvars.iv.next, %10
  br i1 %31, label %.preheader111, label %._crit_edge131

.lr.ph:                                           ; preds = %12, %.lr.ph
  %indvars.iv144 = phi i64 [ %indvars.iv.next145, %.lr.ph ], [ %indvars.iv, %12 ]
  %32 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #2
  %33 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %32, i64 noundef %indvars.iv144) #2
  %34 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %13) #2
  %35 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %34, i64 noundef %indvars.iv144) #2
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %33, ptr noundef nonnull align 4 dereferenceable(4) %35) #2
  %indvars.iv.next145 = add nuw nsw i64 %indvars.iv144, 1
  %exitcond148.not = icmp eq i64 %indvars.iv.next145, %wide.trip.count170
  br i1 %exitcond148.not, label %._crit_edge, label %.lr.ph, !llvm.loop !11

.preheader111:                                    ; preds = %._crit_edge, %._crit_edge128
  %indvars.iv162 = phi i64 [ %indvars.iv.next163, %._crit_edge128 ], [ %indvars.iv160, %._crit_edge ]
  %.296129 = phi i32 [ %81, %._crit_edge128 ], [ %.195, %._crit_edge ]
  %36 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #2
  %37 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %36, i64 noundef %indvars.iv) #2
  %38 = load i32, ptr %37, align 4, !tbaa !5
  %.not103122 = icmp eq i32 %38, 0
  br i1 %.not103122, label %.lr.ph127, label %.lr.ph120

.lr.ph127:                                        ; preds = %._crit_edge121, %.preheader111
  %.397.lcssa = phi i32 [ %.296129, %.preheader111 ], [ %49, %._crit_edge121 ]
  br label %82

.lr.ph120:                                        ; preds = %.preheader111, %._crit_edge121
  %.397123 = phi i32 [ %49, %._crit_edge121 ], [ %.296129, %.preheader111 ]
  %39 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv162) #2
  %40 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %39, i64 noundef %indvars.iv) #2
  %41 = load i32, ptr %40, align 4, !tbaa !5
  %42 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #2
  %43 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %42, i64 noundef %indvars.iv) #2
  %44 = load i32, ptr %43, align 4, !tbaa !5
  %45 = sdiv i32 %41, %44
  %46 = sext i32 %45 to i64
  br label %53

._crit_edge121:                                   ; preds = %74
  %47 = icmp eq i32 %.397123, 0
  %48 = sub nsw i32 %1, %.397123
  %49 = select i1 %47, i32 0, i32 %48
  %50 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #2
  %51 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %50, i64 noundef %indvars.iv) #2
  %52 = load i32, ptr %51, align 4, !tbaa !5
  %.not103 = icmp eq i32 %52, 0
  br i1 %.not103, label %.lr.ph127, label %.lr.ph120, !llvm.loop !12

53:                                               ; preds = %.lr.ph120, %74
  %indvars.iv149 = phi i64 [ %indvars.iv, %.lr.ph120 ], [ %indvars.iv.next150, %74 ]
  %54 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #2
  %55 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %54, i64 noundef %indvars.iv149) #2
  %56 = load i32, ptr %55, align 4, !tbaa !5
  %57 = sext i32 %56 to i64
  %58 = mul nsw i64 %57, %46
  %59 = srem i64 %58, %9
  %60 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv162) #2
  %61 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %60, i64 noundef %indvars.iv149) #2
  %62 = load i32, ptr %61, align 4, !tbaa !5
  %63 = trunc nsw i64 %59 to i32
  %64 = sub i32 %62, %63
  store i32 %64, ptr %61, align 4, !tbaa !5
  %65 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv162) #2
  %66 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %65, i64 noundef %indvars.iv149) #2
  %67 = load i32, ptr %66, align 4, !tbaa !5
  %68 = icmp slt i32 %67, 0
  br i1 %68, label %69, label %74

69:                                               ; preds = %53
  %70 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv162) #2
  %71 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %70, i64 noundef %indvars.iv149) #2
  %72 = load i32, ptr %71, align 4, !tbaa !5
  %73 = add nsw i32 %72, %1
  store i32 %73, ptr %71, align 4, !tbaa !5
  br label %74

74:                                               ; preds = %69, %53
  %75 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv162) #2
  %76 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %75, i64 noundef %indvars.iv149) #2
  %77 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #2
  %78 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %77, i64 noundef %indvars.iv149) #2
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %76, ptr noundef nonnull align 4 dereferenceable(4) %78) #2
  %indvars.iv.next150 = add nuw nsw i64 %indvars.iv149, 1
  %exitcond154.not = icmp eq i64 %indvars.iv.next150, %wide.trip.count170
  br i1 %exitcond154.not, label %._crit_edge121, label %53, !llvm.loop !13

._crit_edge128:                                   ; preds = %82
  %79 = icmp eq i32 %.397.lcssa, 0
  %80 = sub nsw i32 %1, %.397.lcssa
  %81 = select i1 %79, i32 0, i32 %80
  %indvars.iv.next163 = add nuw nsw i64 %indvars.iv162, 1
  %exitcond166.not = icmp eq i64 %indvars.iv.next163, %wide.trip.count170
  br i1 %exitcond166.not, label %._crit_edge131, label %.preheader111, !llvm.loop !14

82:                                               ; preds = %.lr.ph127, %82
  %indvars.iv155 = phi i64 [ %indvars.iv, %.lr.ph127 ], [ %indvars.iv.next156, %82 ]
  %83 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #2
  %84 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %83, i64 noundef %indvars.iv155) #2
  %85 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv162) #2
  %86 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %85, i64 noundef %indvars.iv155) #2
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %84, ptr noundef nonnull align 4 dereferenceable(4) %86) #2
  %indvars.iv.next156 = add nuw nsw i64 %indvars.iv155, 1
  %exitcond159.not = icmp eq i64 %indvars.iv.next156, %wide.trip.count170
  br i1 %exitcond159.not, label %._crit_edge128, label %82, !llvm.loop !15

._crit_edge131:                                   ; preds = %._crit_edge128, %._crit_edge
  %.296.lcssa = phi i32 [ %.195, %._crit_edge ], [ %81, %._crit_edge128 ]
  %87 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #2
  %88 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %87, i64 noundef %indvars.iv) #2
  %89 = sext i32 %.296.lcssa to i64
  %90 = load i32, ptr %88, align 4, !tbaa !5
  %91 = sext i32 %90 to i64
  %92 = mul nsw i64 %91, %89
  %93 = srem i64 %92, %9
  %94 = trunc nsw i64 %93 to i32
  %indvars.iv.next161 = add nuw nsw i64 %indvars.iv160, 1
  %exitcond171 = icmp eq i64 %indvars.iv.next, %wide.trip.count170
  br i1 %exitcond171, label %.thread, label %.preheader113, !llvm.loop !16

.thread:                                          ; preds = %12, %._crit_edge131, %.preheader114, %2
  %.4 = phi i32 [ 0, %2 ], [ 1, %.preheader114 ], [ 0, %12 ], [ %94, %._crit_edge131 ]
  ret i32 %.4
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10}
!16 = distinct !{!16, !10}


; Effective O3 passes: ConstraintEliminationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass