; LLVM IR from ShahjalalShohag/code-library :: Number Theory/Number of Distinct Kth Powers Modulo n.ll (Z1fxxx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z5powerxx(i64 noundef, i64 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z1fxxx(i64 noundef %0, i64 noundef %1, i64 noundef %2) #2 {
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  store i64 %0, ptr %5, align 8, !tbaa !5
  store i64 %1, ptr %6, align 8, !tbaa !5
  store i64 %2, ptr %7, align 8, !tbaa !5
  %11 = load i64, ptr %6, align 8, !tbaa !5
  %12 = icmp sle i64 %11, 0
  br i1 %12, label %16, label %13

13:                                               ; preds = %3
  %14 = load i64, ptr %7, align 8, !tbaa !5
  %15 = icmp eq i64 %14, 0
  br i1 %15, label %16, label %17

16:                                               ; preds = %13, %3
  store i64 1, ptr %4, align 8
  br label %70

17:                                               ; preds = %13
  %18 = load i64, ptr %5, align 8, !tbaa !5
  %19 = icmp eq i64 %18, 2
  br i1 %19, label %20, label %48

20:                                               ; preds = %17
  %21 = load i64, ptr %6, align 8, !tbaa !5
  %22 = icmp eq i64 %21, 1
  br i1 %22, label %23, label %24

23:                                               ; preds = %20
  store i64 2, ptr %4, align 8
  br label %70

24:                                               ; preds = %20
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  %25 = load i64, ptr %6, align 8, !tbaa !5
  %26 = sub nsw i64 %25, 2
  %27 = call noundef i64 @_Z5powerxx(i64 noundef 2, i64 noundef %26)
  %28 = load i64, ptr %7, align 8, !tbaa !5
  %29 = load i64, ptr %6, align 8, !tbaa !5
  %30 = sub nsw i64 %29, 2
  %31 = call noundef i64 @_Z5powerxx(i64 noundef 2, i64 noundef %30)
  %32 = call noundef i64 @_ZSt5__gcdIxET_S0_S0_(i64 noundef %28, i64 noundef %31)
  %33 = sdiv i64 %27, %32
  store i64 %33, ptr %8, align 8, !tbaa !5
  %34 = load i64, ptr %7, align 8, !tbaa !5
  %35 = srem i64 %34, 2
  %36 = icmp ne i64 %35, 0
  br i1 %36, label %37, label %40

37:                                               ; preds = %24
  %38 = load i64, ptr %8, align 8, !tbaa !5
  %39 = mul nsw i64 %38, 2
  store i64 %39, ptr %8, align 8, !tbaa !5
  br label %40

40:                                               ; preds = %37, %24
  %41 = load i64, ptr %8, align 8, !tbaa !5
  %42 = load i64, ptr %6, align 8, !tbaa !5
  %43 = load i64, ptr %7, align 8, !tbaa !5
  %44 = sub nsw i64 %42, %43
  %45 = load i64, ptr %7, align 8, !tbaa !5
  %46 = call noundef i64 @_Z1fxxx(i64 noundef 2, i64 noundef %44, i64 noundef %45)
  %47 = add nsw i64 %41, %46
  store i64 %47, ptr %4, align 8
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  br label %70

48:                                               ; preds = %17
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  %49 = load i64, ptr %5, align 8, !tbaa !5
  %50 = load i64, ptr %6, align 8, !tbaa !5
  %51 = call noundef i64 @_Z5powerxx(i64 noundef %49, i64 noundef %50)
  %52 = load i64, ptr %5, align 8, !tbaa !5
  %53 = load i64, ptr %6, align 8, !tbaa !5
  %54 = sub nsw i64 %53, 1
  %55 = call noundef i64 @_Z5powerxx(i64 noundef %52, i64 noundef %54)
  %56 = sub nsw i64 %51, %55
  store i64 %56, ptr %9, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  %57 = load i64, ptr %9, align 8, !tbaa !5
  %58 = load i64, ptr %7, align 8, !tbaa !5
  %59 = load i64, ptr %9, align 8, !tbaa !5
  %60 = call noundef i64 @_ZSt5__gcdIxET_S0_S0_(i64 noundef %58, i64 noundef %59)
  %61 = sdiv i64 %57, %60
  store i64 %61, ptr %10, align 8, !tbaa !5
  %62 = load i64, ptr %10, align 8, !tbaa !5
  %63 = load i64, ptr %5, align 8, !tbaa !5
  %64 = load i64, ptr %6, align 8, !tbaa !5
  %65 = load i64, ptr %7, align 8, !tbaa !5
  %66 = sub nsw i64 %64, %65
  %67 = load i64, ptr %7, align 8, !tbaa !5
  %68 = call noundef i64 @_Z1fxxx(i64 noundef %63, i64 noundef %66, i64 noundef %67)
  %69 = add nsw i64 %62, %68
  store i64 %69, ptr %4, align 8
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  br label %70

70:                                               ; preds = %48, %40, %23, %16
  %71 = load i64, ptr %4, align 8
  ret i64 %71
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZSt5__gcdIxET_S0_S0_(i64 noundef, i64 noundef) #0

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z5powerxx(i64 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z1fxxx(i64 noundef %0, i64 noundef %1, i64 noundef %2) local_unnamed_addr #0 {
  br label %tailrecurse54

tailrecurse54:                                    ; preds = %.split, %3
  %accumulator.tr = phi i64 [ 0, %3 ], [ %accumulator.ret.tr, %.split ]
  %.tr55 = phi i64 [ %1, %3 ], [ %.pre, %.split ]
  %4 = icmp eq i64 %2, 0
  %5 = icmp slt i64 %.tr55, 1
  %or.cond37 = or i1 %4, %5
  br i1 %or.cond37, label %common.ret, label %.lr.ph

.lr.ph:                                           ; preds = %tailrecurse54
  %6 = and i64 %2, 1
  %7 = icmp eq i64 %0, 2
  br i1 %7, label %8, label %.split

8:                                                ; preds = %.lr.ph
  %9 = icmp eq i64 %.tr55, 1
  br i1 %9, label %._crit_edge.loopexit, label %tailrecurse.peel

tailrecurse.peel:                                 ; preds = %8
  %10 = add nsw i64 %.tr55, -2
  %11 = tail call noundef i64 @_Z5powerxx(i64 noundef 2, i64 noundef %10)
  %12 = tail call noundef i64 @_Z5powerxx(i64 noundef 2, i64 noundef %10)
  %13 = tail call noundef i64 @_ZSt5__gcdIxET_S0_S0_(i64 noundef %2, i64 noundef %12)
  %14 = sdiv i64 %11, %13
  %spec.select.peel = shl i64 %14, %6
  %15 = sub nsw i64 %.tr55, %2
  %16 = icmp slt i64 %15, 1
  br i1 %16, label %._crit_edge.loopexit, label %.peel.next

.peel.next:                                       ; preds = %tailrecurse.peel, %tailrecurse
  %.tr3140 = phi i64 [ %23, %tailrecurse ], [ %15, %tailrecurse.peel ]
  %accumulator.tr38 = phi i64 [ %24, %tailrecurse ], [ %spec.select.peel, %tailrecurse.peel ]
  %17 = icmp eq i64 %.tr3140, 1
  br i1 %17, label %._crit_edge.loopexit, label %tailrecurse

tailrecurse:                                      ; preds = %.peel.next
  %18 = add nsw i64 %.tr3140, -2
  %19 = tail call noundef i64 @_Z5powerxx(i64 noundef 2, i64 noundef %18)
  %20 = tail call noundef i64 @_Z5powerxx(i64 noundef 2, i64 noundef %18)
  %21 = tail call noundef i64 @_ZSt5__gcdIxET_S0_S0_(i64 noundef %2, i64 noundef %20)
  %22 = sdiv i64 %19, %21
  %spec.select = shl i64 %22, %6
  %23 = sub nsw i64 %.tr3140, %2
  %24 = add nsw i64 %spec.select, %accumulator.tr38
  %25 = icmp slt i64 %23, 1
  br i1 %25, label %._crit_edge.loopexit, label %.peel.next, !llvm.loop !5

common.ret:                                       ; preds = %tailrecurse54, %._crit_edge.loopexit
  %common.ret.op = phi i64 [ 1, %tailrecurse54 ], [ %32, %._crit_edge.loopexit ]
  %accumulator.ret.tr57 = add i64 %common.ret.op, %accumulator.tr
  ret i64 %accumulator.ret.tr57

.split:                                           ; preds = %.lr.ph
  %.pre = sub nsw i64 %.tr55, %2
  %26 = tail call noundef i64 @_Z5powerxx(i64 noundef %0, i64 noundef %.tr55)
  %27 = add nsw i64 %.tr55, -1
  %28 = tail call noundef i64 @_Z5powerxx(i64 noundef %0, i64 noundef %27)
  %29 = sub nsw i64 %26, %28
  %30 = tail call noundef i64 @_ZSt5__gcdIxET_S0_S0_(i64 noundef %2, i64 noundef %29)
  %31 = sdiv i64 %29, %30
  %accumulator.ret.tr = add i64 %31, %accumulator.tr
  br label %tailrecurse54

._crit_edge.loopexit:                             ; preds = %.peel.next, %tailrecurse, %tailrecurse.peel, %8
  %accumulator.tr.lcssa.ph = phi i64 [ 0, %8 ], [ %spec.select.peel, %tailrecurse.peel ], [ %24, %tailrecurse ], [ %accumulator.tr38, %.peel.next ]
  %.0.ph = phi i64 [ 2, %8 ], [ 1, %tailrecurse.peel ], [ 1, %tailrecurse ], [ 2, %.peel.next ]
  %32 = add nsw i64 %.0.ph, %accumulator.tr.lcssa.ph
  br label %common.ret
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZSt5__gcdIxET_S0_S0_(i64 noundef, i64 noundef) local_unnamed_addr #0

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.peeled.count", i32 1}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LICMPass,LoopFullUnrollPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass