; LLVM IR from lfarcaro/ARINC653_ARMV7A_AM335X :: Hardware (dmtimer)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.dmtimerContext = type { i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
declare dso_local i32 @DMTimerWritePostedStatusGet(i32 noundef) #0

; Function Attrs: nounwind uwtable
define dso_local void @DMTimerContextSave(i32 noundef %0, ptr noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  store i32 %0, ptr %3, align 4, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !9
  %5 = load i32, ptr %3, align 4, !tbaa !5
  %6 = add i32 %5, 64
  %7 = zext i32 %6 to i64
  %8 = inttoptr i64 %7 to ptr
  %9 = load volatile i32, ptr %8, align 4, !tbaa !5
  %10 = load ptr, ptr %4, align 8, !tbaa !9
  %11 = getelementptr inbounds %struct.dmtimerContext, ptr %10, i32 0, i32 0
  store i32 %9, ptr %11, align 4, !tbaa !11
  %12 = load i32, ptr %3, align 4, !tbaa !5
  %13 = add i32 %12, 76
  %14 = zext i32 %13 to i64
  %15 = inttoptr i64 %14 to ptr
  %16 = load volatile i32, ptr %15, align 4, !tbaa !5
  %17 = load ptr, ptr %4, align 8, !tbaa !9
  %18 = getelementptr inbounds %struct.dmtimerContext, ptr %17, i32 0, i32 1
  store i32 %16, ptr %18, align 4, !tbaa !13
  %19 = load i32, ptr %3, align 4, !tbaa !5
  %20 = add i32 %19, 44
  %21 = zext i32 %20 to i64
  %22 = inttoptr i64 %21 to ptr
  %23 = load volatile i32, ptr %22, align 4, !tbaa !5
  %24 = load ptr, ptr %4, align 8, !tbaa !9
  %25 = getelementptr inbounds %struct.dmtimerContext, ptr %24, i32 0, i32 2
  store i32 %23, ptr %25, align 4, !tbaa !14
  %26 = load i32, ptr %3, align 4, !tbaa !5
  %27 = add i32 %26, 84
  %28 = zext i32 %27 to i64
  %29 = inttoptr i64 %28 to ptr
  %30 = load volatile i32, ptr %29, align 4, !tbaa !5
  %31 = and i32 %30, 4
  %32 = icmp ne i32 %31, 0
  br i1 %32, label %33, label %41

33:                                               ; preds = %2
  br label %34

34:                                               ; preds = %39, %33
  %35 = load i32, ptr %3, align 4, !tbaa !5
  %36 = call i32 @DMTimerWritePostedStatusGet(i32 noundef %35)
  %37 = and i32 2, %36
  %38 = icmp ne i32 %37, 0
  br i1 %38, label %39, label %40

39:                                               ; preds = %34
  br label %34, !llvm.loop !15

40:                                               ; preds = %34
  br label %41

41:                                               ; preds = %40, %2
  %42 = load i32, ptr %3, align 4, !tbaa !5
  %43 = add i32 %42, 60
  %44 = zext i32 %43 to i64
  %45 = inttoptr i64 %44 to ptr
  %46 = load volatile i32, ptr %45, align 4, !tbaa !5
  %47 = load ptr, ptr %4, align 8, !tbaa !9
  %48 = getelementptr inbounds %struct.dmtimerContext, ptr %47, i32 0, i32 3
  store i32 %46, ptr %48, align 4, !tbaa !17
  %49 = load i32, ptr %3, align 4, !tbaa !5
  %50 = add i32 %49, 56
  %51 = zext i32 %50 to i64
  %52 = inttoptr i64 %51 to ptr
  %53 = load volatile i32, ptr %52, align 4, !tbaa !5
  %54 = load ptr, ptr %4, align 8, !tbaa !9
  %55 = getelementptr inbounds %struct.dmtimerContext, ptr %54, i32 0, i32 4
  store i32 %53, ptr %55, align 4, !tbaa !18
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"dmtimerContext", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16}
!13 = !{!12, !6, i64 4}
!14 = !{!12, !6, i64 8}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = !{!12, !6, i64 12}
!18 = !{!12, !6, i64 16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local i32 @DMTimerWritePostedStatusGet(i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @DMTimerContextSave(i32 noundef %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #0 {
  %3 = add i32 %0, 64
  %4 = zext i32 %3 to i64
  %5 = inttoptr i64 %4 to ptr
  %6 = load volatile i32, ptr %5, align 4, !tbaa !5
  store i32 %6, ptr %1, align 4, !tbaa !9
  %7 = add i32 %0, 76
  %8 = zext i32 %7 to i64
  %9 = inttoptr i64 %8 to ptr
  %10 = load volatile i32, ptr %9, align 4, !tbaa !5
  %11 = getelementptr inbounds i8, ptr %1, i64 4
  store i32 %10, ptr %11, align 4, !tbaa !11
  %12 = add i32 %0, 44
  %13 = zext i32 %12 to i64
  %14 = inttoptr i64 %13 to ptr
  %15 = load volatile i32, ptr %14, align 4, !tbaa !5
  %16 = getelementptr inbounds i8, ptr %1, i64 8
  store i32 %15, ptr %16, align 4, !tbaa !12
  %17 = add i32 %0, 84
  %18 = zext i32 %17 to i64
  %19 = inttoptr i64 %18 to ptr
  %20 = load volatile i32, ptr %19, align 4, !tbaa !5
  %21 = and i32 %20, 4
  %.not = icmp eq i32 %21, 0
  br i1 %.not, label %.loopexit, label %.preheader

.preheader:                                       ; preds = %2, %.preheader
  %22 = tail call i32 @DMTimerWritePostedStatusGet(i32 noundef %0)
  %23 = and i32 %22, 2
  %.not11 = icmp eq i32 %23, 0
  br i1 %.not11, label %.loopexit, label %.preheader, !llvm.loop !13

.loopexit:                                        ; preds = %.preheader, %2
  %24 = add i32 %0, 60
  %25 = zext i32 %24 to i64
  %26 = inttoptr i64 %25 to ptr
  %27 = load volatile i32, ptr %26, align 4, !tbaa !5
  %28 = getelementptr inbounds i8, ptr %1, i64 12
  store i32 %27, ptr %28, align 4, !tbaa !15
  %29 = add i32 %0, 56
  %30 = zext i32 %29 to i64
  %31 = inttoptr i64 %30 to ptr
  %32 = load volatile i32, ptr %31, align 4, !tbaa !5
  %33 = getelementptr inbounds i8, ptr %1, i64 16
  store i32 %32, ptr %33, align 4, !tbaa !16
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"dmtimerContext", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16}
!11 = !{!10, !6, i64 4}
!12 = !{!10, !6, i64 8}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{!10, !6, i64 12}
!16 = !{!10, !6, i64 16}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InstCombinePass,JumpThreadingPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass