; LLVM IR from lfarcaro/ARINC653_ARMV7A_AM335X :: Hardware (rtc)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @RTCAlarmTimeGet(i32 noundef %0) #1 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store i32 %0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  store i32 0, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  store i32 0, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 0, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  store i32 0, ptr %6, align 4, !tbaa !5
  br label %7

7:                                                ; preds = %15, %1
  %8 = load i32, ptr %2, align 4, !tbaa !5
  %9 = add i32 %8, 68
  %10 = zext i32 %9 to i64
  %11 = inttoptr i64 %10 to ptr
  %12 = load volatile i32, ptr %11, align 4, !tbaa !5
  %13 = and i32 %12, 1
  %14 = icmp ne i32 %13, 0
  br i1 %14, label %15, label %16

15:                                               ; preds = %7
  br label %7, !llvm.loop !9

16:                                               ; preds = %7
  %17 = load i32, ptr %2, align 4, !tbaa !5
  %18 = add i32 %17, 32
  %19 = zext i32 %18 to i64
  %20 = inttoptr i64 %19 to ptr
  %21 = load volatile i32, ptr %20, align 4, !tbaa !5
  store i32 %21, ptr %3, align 4, !tbaa !5
  %22 = load i32, ptr %3, align 4, !tbaa !5
  %23 = and i32 %22, 127
  %24 = shl i32 %23, 8
  store i32 %24, ptr %3, align 4, !tbaa !5
  %25 = load i32, ptr %2, align 4, !tbaa !5
  %26 = add i32 %25, 36
  %27 = zext i32 %26 to i64
  %28 = inttoptr i64 %27 to ptr
  %29 = load volatile i32, ptr %28, align 4, !tbaa !5
  store i32 %29, ptr %4, align 4, !tbaa !5
  %30 = load i32, ptr %4, align 4, !tbaa !5
  %31 = and i32 %30, 127
  %32 = shl i32 %31, 16
  store i32 %32, ptr %4, align 4, !tbaa !5
  %33 = load i32, ptr %2, align 4, !tbaa !5
  %34 = add i32 %33, 40
  %35 = zext i32 %34 to i64
  %36 = inttoptr i64 %35 to ptr
  %37 = load volatile i32, ptr %36, align 4, !tbaa !5
  store i32 %37, ptr %5, align 4, !tbaa !5
  %38 = load i32, ptr %5, align 4, !tbaa !5
  %39 = and i32 %38, 63
  %40 = shl i32 %39, 24
  store i32 %40, ptr %5, align 4, !tbaa !5
  %41 = load i32, ptr %2, align 4, !tbaa !5
  %42 = add i32 %41, 40
  %43 = zext i32 %42 to i64
  %44 = inttoptr i64 %43 to ptr
  %45 = load volatile i32, ptr %44, align 4, !tbaa !5
  %46 = and i32 %45, 128
  store i32 %46, ptr %6, align 4, !tbaa !5
  %47 = load i32, ptr %3, align 4, !tbaa !5
  %48 = load i32, ptr %4, align 4, !tbaa !5
  %49 = or i32 %47, %48
  %50 = load i32, ptr %5, align 4, !tbaa !5
  %51 = or i32 %49, %50
  %52 = load i32, ptr %6, align 4, !tbaa !5
  %53 = or i32 %51, %52
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  ret i32 %53
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local range(i32 0, 1073741824) i32 @RTCAlarmTimeGet(i32 noundef %0) local_unnamed_addr #0 {
  %2 = add i32 %0, 68
  %3 = zext i32 %2 to i64
  %4 = inttoptr i64 %3 to ptr
  br label %5

5:                                                ; preds = %5, %1
  %6 = load volatile i32, ptr %4, align 4, !tbaa !5
  %7 = and i32 %6, 1
  %.not = icmp eq i32 %7, 0
  br i1 %.not, label %8, label %5, !llvm.loop !9

8:                                                ; preds = %5
  %9 = add i32 %0, 32
  %10 = zext i32 %9 to i64
  %11 = inttoptr i64 %10 to ptr
  %12 = load volatile i32, ptr %11, align 4, !tbaa !5
  %13 = shl i32 %12, 8
  %14 = and i32 %13, 32512
  %15 = add i32 %0, 36
  %16 = zext i32 %15 to i64
  %17 = inttoptr i64 %16 to ptr
  %18 = load volatile i32, ptr %17, align 4, !tbaa !5
  %19 = shl i32 %18, 16
  %20 = and i32 %19, 8323072
  %21 = add i32 %0, 40
  %22 = zext i32 %21 to i64
  %23 = inttoptr i64 %22 to ptr
  %24 = load volatile i32, ptr %23, align 4, !tbaa !5
  %25 = shl i32 %24, 24
  %26 = and i32 %25, 1056964608
  %27 = load volatile i32, ptr %23, align 4, !tbaa !5
  %28 = and i32 %27, 128
  %29 = or disjoint i32 %20, %14
  %30 = or disjoint i32 %29, %26
  %31 = or disjoint i32 %30, %28
  ret i32 %31
}

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,LICMPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass