; LLVM IR from ShahjalalShohag/code-library :: Math/Faulhaber Formula Fastest.ll (Z11ensure_basei)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<base, std::allocator<base>>::_Vector_impl" }
%"struct.std::_Vector_base<base, std::allocator<base>>::_Vector_impl" = type { %"struct.std::_Vector_base<base, std::allocator<base>>::_Vector_impl_data" }
%"struct.std::_Vector_base<base, std::allocator<base>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.base = type { double, double }

@lim = external dso_local global i32, align 4
@roots = external dso_local global %"class.std::vector", align 8
@rev = external dso_local global %"class.std::vector.0", align 8
@_ZL2PI = external hidden global double, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4baseC2Edd(ptr noundef nonnull align 8 dereferenceable(16), double noundef, double noundef) unnamed_addr #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z11ensure_basei(i32 noundef %0) #2 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca double, align 8
  %5 = alloca i32, align 4
  %6 = alloca double, align 8
  %7 = alloca %struct.base, align 8
  store i32 %0, ptr %2, align 4, !tbaa !5
  %8 = load i32, ptr %2, align 4, !tbaa !5
  %9 = load i32, ptr @lim, align 4, !tbaa !5
  %10 = icmp sle i32 %8, %9
  br i1 %10, label %11, label %12

11:                                               ; preds = %1
  br label %98

12:                                               ; preds = %1
  %13 = load i32, ptr %2, align 4, !tbaa !5
  %14 = shl i32 1, %13
  %15 = sext i32 %14 to i64
  call void @_ZNSt6vectorIiSaIiEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) @rev, i64 noundef %15)
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #5
  store i32 0, ptr %3, align 4, !tbaa !5
  br label %16

16:                                               ; preds = %38, %12
  %17 = load i32, ptr %3, align 4, !tbaa !5
  %18 = load i32, ptr %2, align 4, !tbaa !5
  %19 = shl i32 1, %18
  %20 = icmp slt i32 %17, %19
  br i1 %20, label %22, label %21

21:                                               ; preds = %16
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #5
  br label %41

22:                                               ; preds = %16
  %23 = load i32, ptr %3, align 4, !tbaa !5
  %24 = ashr i32 %23, 1
  %25 = sext i32 %24 to i64
  %26 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @rev, i64 noundef %25) #5
  %27 = load i32, ptr %26, align 4, !tbaa !5
  %28 = ashr i32 %27, 1
  %29 = load i32, ptr %3, align 4, !tbaa !5
  %30 = and i32 %29, 1
  %31 = load i32, ptr %2, align 4, !tbaa !5
  %32 = sub nsw i32 %31, 1
  %33 = shl i32 %30, %32
  %34 = add nsw i32 %28, %33
  %35 = load i32, ptr %3, align 4, !tbaa !5
  %36 = sext i32 %35 to i64
  %37 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @rev, i64 noundef %36) #5
  store i32 %34, ptr %37, align 4, !tbaa !5
  br label %38

38:                                               ; preds = %22
  %39 = load i32, ptr %3, align 4, !tbaa !5
  %40 = add nsw i32 %39, 1
  store i32 %40, ptr %3, align 4, !tbaa !5
  br label %16, !llvm.loop !9

41:                                               ; preds = %21
  %42 = load i32, ptr %2, align 4, !tbaa !5
  %43 = shl i32 1, %42
  %44 = sext i32 %43 to i64
  call void @_ZNSt6vectorI4baseSaIS0_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) @roots, i64 noundef %44)
  br label %45

45:                                               ; preds = %95, %41
  %46 = load i32, ptr @lim, align 4, !tbaa !5
  %47 = load i32, ptr %2, align 4, !tbaa !5
  %48 = icmp slt i32 %46, %47
  br i1 %48, label %49, label %98

49:                                               ; preds = %45
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #5
  %50 = load double, ptr @_ZL2PI, align 8, !tbaa !11
  %51 = fmul double 2.000000e+00, %50
  %52 = load i32, ptr @lim, align 4, !tbaa !5
  %53 = add nsw i32 %52, 1
  %54 = shl i32 1, %53
  %55 = sitofp i32 %54 to double
  %56 = fdiv double %51, %55
  store double %56, ptr %4, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #5
  %57 = load i32, ptr @lim, align 4, !tbaa !5
  %58 = sub nsw i32 %57, 1
  %59 = shl i32 1, %58
  store i32 %59, ptr %5, align 4, !tbaa !5
  br label %60

60:                                               ; preds = %92, %49
  %61 = load i32, ptr %5, align 4, !tbaa !5
  %62 = load i32, ptr @lim, align 4, !tbaa !5
  %63 = shl i32 1, %62
  %64 = icmp slt i32 %61, %63
  br i1 %64, label %66, label %65

65:                                               ; preds = %60
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #5
  br label %95

66:                                               ; preds = %60
  %67 = load i32, ptr %5, align 4, !tbaa !5
  %68 = sext i32 %67 to i64
  %69 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @roots, i64 noundef %68) #5
  %70 = load i32, ptr %5, align 4, !tbaa !5
  %71 = shl i32 %70, 1
  %72 = sext i32 %71 to i64
  %73 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @roots, i64 noundef %72) #5
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %73, ptr align 8 %69, i64 16, i1 false), !tbaa.struct !13
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #5
  %74 = load double, ptr %4, align 8, !tbaa !11
  %75 = load i32, ptr %5, align 4, !tbaa !5
  %76 = mul nsw i32 2, %75
  %77 = add nsw i32 %76, 1
  %78 = load i32, ptr @lim, align 4, !tbaa !5
  %79 = shl i32 1, %78
  %80 = sub nsw i32 %77, %79
  %81 = sitofp i32 %80 to double
  %82 = fmul double %74, %81
  store double %82, ptr %6, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 16, ptr %7) #5
  %83 = load double, ptr %6, align 8, !tbaa !11
  %84 = call double @cos(double noundef %83) #5
  %85 = load double, ptr %6, align 8, !tbaa !11
  %86 = call double @sin(double noundef %85) #5
  call void @_ZN4baseC2Edd(ptr noundef nonnull align 8 dereferenceable(16) %7, double noundef %84, double noundef %86)
  %87 = load i32, ptr %5, align 4, !tbaa !5
  %88 = shl i32 %87, 1
  %89 = add nsw i32 %88, 1
  %90 = sext i32 %89 to i64
  %91 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @roots, i64 noundef %90) #5
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %91, ptr align 8 %7, i64 16, i1 false), !tbaa.struct !13
  call void @llvm.lifetime.end.p0(i64 16, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #5
  br label %92

92:                                               ; preds = %66
  %93 = load i32, ptr %5, align 4, !tbaa !5
  %94 = add nsw i32 %93, 1
  store i32 %94, ptr %5, align 4, !tbaa !5
  br label %60, !llvm.loop !14

95:                                               ; preds = %65
  %96 = load i32, ptr @lim, align 4, !tbaa !5
  %97 = add nsw i32 %96, 1
  store i32 %97, ptr @lim, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #5
  br label %45, !llvm.loop !15

98:                                               ; preds = %45, %11
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorI4baseSaIS0_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

; Function Attrs: nounwind
declare double @cos(double noundef) #4

; Function Attrs: nounwind
declare double @sin(double noundef) #4

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !12, i64 0}
!12 = !{!"double", !7, i64 0}
!13 = !{i64 0, i64 8, !11, i64 8, i64 8, !11}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<base, std::allocator<base>>::_Vector_impl" }
%"struct.std::_Vector_base<base, std::allocator<base>>::_Vector_impl" = type { %"struct.std::_Vector_base<base, std::allocator<base>>::_Vector_impl_data" }
%"struct.std::_Vector_base<base, std::allocator<base>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.base = type { double, double }

@lim = external dso_local local_unnamed_addr global i32, align 4
@roots = external dso_local global %"class.std::vector", align 8
@rev = external dso_local global %"class.std::vector.0", align 8
@_ZL2PI = external hidden local_unnamed_addr global double, align 8

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4baseC2Edd(ptr noundef nonnull align 8 dereferenceable(16), double noundef, double noundef) unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z11ensure_basei(i32 noundef %0) local_unnamed_addr #2 {
  %2 = alloca %struct.base, align 8
  %3 = load i32, ptr @lim, align 4, !tbaa !5
  %.not = icmp slt i32 %3, %0
  br i1 %.not, label %4, label %.loopexit

4:                                                ; preds = %1
  %5 = shl nuw i32 1, %0
  %6 = sext i32 %5 to i64
  tail call void @_ZNSt6vectorIiSaIiEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) @rev, i64 noundef %6)
  %.not29 = icmp eq i32 %0, 31
  br i1 %.not29, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %4
  %7 = add nsw i32 %0, -1
  %smax = tail call i32 @llvm.smax.i32(i32 %5, i32 1)
  %wide.trip.count = zext nneg i32 %smax to i64
  br label %10

._crit_edge:                                      ; preds = %10, %4
  tail call void @_ZNSt6vectorI4baseSaIS0_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) @roots, i64 noundef %6)
  %8 = load i32, ptr @lim, align 4, !tbaa !5
  %9 = icmp slt i32 %8, %0
  br i1 %9, label %.lr.ph28, label %.loopexit

10:                                               ; preds = %.lr.ph, %10
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %10 ]
  %11 = trunc nuw nsw i64 %indvars.iv to i32
  %12 = lshr i64 %indvars.iv, 1
  %13 = and i64 %12, 2147483647
  %14 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @rev, i64 noundef %13) #6
  %15 = load i32, ptr %14, align 4, !tbaa !5
  %16 = ashr i32 %15, 1
  %17 = and i32 %11, 1
  %18 = shl nuw i32 %17, %7
  %19 = add nsw i32 %16, %18
  %20 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @rev, i64 noundef %indvars.iv) #6
  store i32 %19, ptr %20, align 4, !tbaa !5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %10, !llvm.loop !9

.lr.ph28:                                         ; preds = %._crit_edge, %._crit_edge26
  %21 = phi i32 [ %.pre-phi, %._crit_edge26 ], [ %8, %._crit_edge ]
  %22 = load double, ptr @_ZL2PI, align 8, !tbaa !11
  %23 = fmul double %22, 2.000000e+00
  %24 = add nsw i32 %21, 1
  %25 = shl nuw i32 1, %24
  %26 = sitofp i32 %25 to double
  %27 = fdiv double %23, %26
  %28 = add nsw i32 %21, -1
  %29 = shl nuw i32 1, %28
  %30 = shl nuw i32 1, %21
  %31 = icmp slt i32 %29, %30
  br i1 %31, label %.lr.ph25.preheader, label %._crit_edge26

.lr.ph25.preheader:                               ; preds = %.lr.ph28
  %32 = sext i32 %29 to i64
  br label %.lr.ph25

._crit_edge26.loopexit:                           ; preds = %.lr.ph25
  %.pre = add nsw i32 %48, 1
  br label %._crit_edge26

._crit_edge26:                                    ; preds = %._crit_edge26.loopexit, %.lr.ph28
  %.pre-phi = phi i32 [ %.pre, %._crit_edge26.loopexit ], [ %24, %.lr.ph28 ]
  store i32 %.pre-phi, ptr @lim, align 4, !tbaa !5
  %33 = icmp slt i32 %.pre-phi, %0
  br i1 %33, label %.lr.ph28, label %.loopexit, !llvm.loop !13

.lr.ph25:                                         ; preds = %.lr.ph25.preheader, %.lr.ph25
  %indvars.iv32 = phi i64 [ %32, %.lr.ph25.preheader ], [ %indvars.iv.next33, %.lr.ph25 ]
  %34 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @roots, i64 noundef %indvars.iv32) #6
  %35 = trunc nsw i64 %indvars.iv32 to i32
  %36 = shl i32 %35, 1
  %37 = sext i32 %36 to i64
  %38 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @roots, i64 noundef %37) #6
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %38, ptr noundef nonnull align 8 dereferenceable(16) %34, i64 16, i1 false), !tbaa.struct !14
  %39 = or disjoint i32 %36, 1
  %40 = load i32, ptr @lim, align 4, !tbaa !5
  %.neg = shl nsw i32 -1, %40
  %41 = add i32 %.neg, %39
  %42 = sitofp i32 %41 to double
  %43 = fmul double %27, %42
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2) #6
  %44 = call double @cos(double noundef %43) #6
  %45 = call double @sin(double noundef %43) #6
  call void @_ZN4baseC2Edd(ptr noundef nonnull align 8 dereferenceable(16) %2, double noundef %44, double noundef %45)
  %46 = sext i32 %39 to i64
  %47 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @roots, i64 noundef %46) #6
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %47, ptr noundef nonnull align 8 dereferenceable(16) %2, i64 16, i1 false), !tbaa.struct !14
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2) #6
  %indvars.iv.next33 = add nsw i64 %indvars.iv32, 1
  %48 = load i32, ptr @lim, align 4, !tbaa !5
  %49 = shl nuw i32 1, %48
  %50 = sext i32 %49 to i64
  %51 = icmp slt i64 %indvars.iv.next33, %50
  br i1 %51, label %.lr.ph25, label %._crit_edge26.loopexit, !llvm.loop !15

.loopexit:                                        ; preds = %._crit_edge26, %._crit_edge, %1
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorI4baseSaIS0_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

; Function Attrs: mustprogress nofree nounwind willreturn memory(write)
declare double @cos(double noundef) local_unnamed_addr #4

; Function Attrs: mustprogress nofree nounwind willreturn memory(write)
declare double @sin(double noundef) local_unnamed_addr #4

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #5

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { mustprogress nofree nounwind willreturn memory(write) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !12, i64 0}
!12 = !{!"double", !7, i64 0}
!13 = distinct !{!13, !10}
!14 = !{i64 0, i64 8, !11, i64 8, i64 8, !11}
!15 = distinct !{!15, !10}


; Effective O3 passes: BDCEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass