; LLVM IR from Columbitech/rohc :: src/dprofile.ll (ZNK4ROHC8DProfile16UpdateIPIDOffsetEhjRt)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.ROHC::DProfile" = type <{ ptr, ptr, i16, [2 x i8], i32, i16, i16, i32, i32, i32, i64, i64, i8, [3 x i8], %"struct.ROHC::iphdr", i64, i32, [4 x i8] }>
%"struct.ROHC::iphdr" = type { i8, i8, i16, i16, i16, i8, i8, i16, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZNK4ROHC8DProfile16UpdateIPIDOffsetEhjRt(ptr noundef nonnull align 8 dereferenceable(92) %0, i8 noundef zeroext %1, i32 noundef %2, ptr noundef nonnull align 2 dereferenceable(2) %3) #1 align 2 {
  %5 = alloca ptr, align 8
  %6 = alloca i8, align 1
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i16, align 2
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i8 %1, ptr %6, align 1, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !10
  store ptr %3, ptr %8, align 8, !tbaa !5
  %11 = load ptr, ptr %5, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  %12 = getelementptr inbounds %"class.ROHC::DProfile", ptr %11, i32 0, i32 6
  %13 = load i16, ptr %12, align 2, !tbaa !12
  %14 = zext i16 %13 to i32
  %15 = sub nsw i32 %14, 0
  store i32 %15, ptr %9, align 4, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 2, ptr %10) #2
  %16 = load i32, ptr %7, align 4, !tbaa !10
  %17 = shl i32 1, %16
  %18 = sub nsw i32 %17, 1
  %19 = trunc i32 %18 to i16
  store i16 %19, ptr %10, align 2, !tbaa !21
  %20 = getelementptr inbounds %"class.ROHC::DProfile", ptr %11, i32 0, i32 6
  %21 = load i16, ptr %20, align 2, !tbaa !12
  %22 = zext i16 %21 to i32
  %23 = load i16, ptr %10, align 2, !tbaa !21
  %24 = zext i16 %23 to i32
  %25 = xor i32 %24, -1
  %26 = and i32 %22, %25
  %27 = load i8, ptr %6, align 1, !tbaa !9
  %28 = zext i8 %27 to i32
  %29 = load i16, ptr %10, align 2, !tbaa !21
  %30 = zext i16 %29 to i32
  %31 = and i32 %28, %30
  %32 = or i32 %26, %31
  %33 = trunc i32 %32 to i16
  %34 = load ptr, ptr %8, align 8, !tbaa !5
  store i16 %33, ptr %34, align 2, !tbaa !21
  %35 = load ptr, ptr %8, align 8, !tbaa !5
  %36 = load i16, ptr %35, align 2, !tbaa !21
  %37 = zext i16 %36 to i32
  %38 = load i32, ptr %9, align 4, !tbaa !10
  %39 = icmp slt i32 %37, %38
  br i1 %39, label %40, label %48

40:                                               ; preds = %4
  %41 = load i32, ptr %7, align 4, !tbaa !10
  %42 = shl i32 1, %41
  %43 = load ptr, ptr %8, align 8, !tbaa !5
  %44 = load i16, ptr %43, align 2, !tbaa !21
  %45 = zext i16 %44 to i32
  %46 = add nsw i32 %45, %42
  %47 = trunc i32 %46 to i16
  store i16 %47, ptr %43, align 2, !tbaa !21
  br label %48

48:                                               ; preds = %40, %4
  call void @llvm.lifetime.end.p0(i64 2, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{!13, !14, i64 26}
!13 = !{!"_ZTSN4ROHC8DProfileE", !6, i64 8, !14, i64 16, !15, i64 20, !14, i64 24, !14, i64 26, !16, i64 28, !11, i64 32, !11, i64 36, !17, i64 40, !17, i64 48, !18, i64 56, !19, i64 60, !17, i64 80, !20, i64 88}
!14 = !{!"short", !7, i64 0}
!15 = !{!"_ZTSN4ROHC8DProfileUt_E", !7, i64 0}
!16 = !{!"_ZTSN4ROHC15IPIDBehaviour_tE", !7, i64 0}
!17 = !{!"long", !7, i64 0}
!18 = !{!"bool", !7, i64 0}
!19 = !{!"_ZTSN4ROHC5iphdrE", !7, i64 0, !7, i64 0, !7, i64 1, !14, i64 2, !14, i64 4, !14, i64 6, !7, i64 8, !7, i64 9, !14, i64 10, !11, i64 12, !11, i64 16}
!20 = !{!"_ZTSN4ROHC12Reordering_tE", !7, i64 0}
!21 = !{!14, !14, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
define dso_local void @_ZNK4ROHC8DProfile16UpdateIPIDOffsetEhjRt(ptr nocapture noundef nonnull readonly align 8 dereferenceable(92) %0, i8 noundef zeroext %1, i32 noundef %2, ptr nocapture noundef nonnull writeonly align 2 dereferenceable(2) %3) local_unnamed_addr #0 align 2 {
  %5 = getelementptr inbounds i8, ptr %0, i64 26
  %6 = load i16, ptr %5, align 2, !tbaa !5
  %7 = zext i16 %6 to i32
  %8 = shl nuw i32 1, %2
  %9 = add nuw i32 %8, 255
  %10 = sub i32 0, %8
  %11 = and i32 %7, %10
  %12 = zext i8 %1 to i32
  %13 = and i32 %9, %12
  %14 = or i32 %11, %13
  %15 = icmp ult i32 %14, %7
  %16 = select i1 %15, i32 %8, i32 0
  %spec.select = add nuw nsw i32 %16, %14
  %storemerge = trunc i32 %spec.select to i16
  store i16 %storemerge, ptr %3, align 2, !tbaa !18
  ret void
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 26}
!6 = !{!"_ZTSN4ROHC8DProfileE", !7, i64 8, !10, i64 16, !11, i64 20, !10, i64 24, !10, i64 26, !12, i64 28, !13, i64 32, !13, i64 36, !14, i64 40, !14, i64 48, !15, i64 56, !16, i64 60, !14, i64 80, !17, i64 88}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"short", !8, i64 0}
!11 = !{!"_ZTSN4ROHC8DProfileUt_E", !8, i64 0}
!12 = !{!"_ZTSN4ROHC15IPIDBehaviour_tE", !8, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = !{!"long", !8, i64 0}
!15 = !{!"bool", !8, i64 0}
!16 = !{!"_ZTSN4ROHC5iphdrE", !8, i64 0, !8, i64 0, !8, i64 1, !10, i64 2, !10, i64 4, !10, i64 6, !8, i64 8, !8, i64 9, !10, i64 10, !13, i64 12, !13, i64 16}
!17 = !{!"_ZTSN4ROHC12Reordering_tE", !8, i64 0}
!18 = !{!10, !10, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass