; LLVM IR from lfarcaro/ARINC653_ARMV7A_AM335X :: Hardware (dmtimer)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local i32 @DMTimerWritePostedStatusGet(i32 noundef) #0

; Function Attrs: nounwind uwtable
define dso_local void @DMTimerGPOConfigure(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  %5 = load i32, ptr %3, align 4, !tbaa !5
  %6 = add i32 %5, 84
  %7 = zext i32 %6 to i64
  %8 = inttoptr i64 %7 to ptr
  %9 = load volatile i32, ptr %8, align 4, !tbaa !5
  %10 = and i32 %9, 4
  %11 = icmp ne i32 %10, 0
  br i1 %11, label %12, label %20

12:                                               ; preds = %2
  br label %13

13:                                               ; preds = %18, %12
  %14 = load i32, ptr %3, align 4, !tbaa !5
  %15 = call i32 @DMTimerWritePostedStatusGet(i32 noundef %14)
  %16 = and i32 1, %15
  %17 = icmp ne i32 %16, 0
  br i1 %17, label %18, label %19

18:                                               ; preds = %13
  br label %13, !llvm.loop !9

19:                                               ; preds = %13
  br label %20

20:                                               ; preds = %19, %2
  %21 = load i32, ptr %3, align 4, !tbaa !5
  %22 = add i32 %21, 56
  %23 = zext i32 %22 to i64
  %24 = inttoptr i64 %23 to ptr
  %25 = load volatile i32, ptr %24, align 4, !tbaa !5
  %26 = and i32 %25, -16385
  store volatile i32 %26, ptr %24, align 4, !tbaa !5
  %27 = load i32, ptr %3, align 4, !tbaa !5
  %28 = add i32 %27, 84
  %29 = zext i32 %28 to i64
  %30 = inttoptr i64 %29 to ptr
  %31 = load volatile i32, ptr %30, align 4, !tbaa !5
  %32 = and i32 %31, 4
  %33 = icmp ne i32 %32, 0
  br i1 %33, label %34, label %42

34:                                               ; preds = %20
  br label %35

35:                                               ; preds = %40, %34
  %36 = load i32, ptr %3, align 4, !tbaa !5
  %37 = call i32 @DMTimerWritePostedStatusGet(i32 noundef %36)
  %38 = and i32 1, %37
  %39 = icmp ne i32 %38, 0
  br i1 %39, label %40, label %41

40:                                               ; preds = %35
  br label %35, !llvm.loop !11

41:                                               ; preds = %35
  br label %42

42:                                               ; preds = %41, %20
  %43 = load i32, ptr %4, align 4, !tbaa !5
  %44 = and i32 %43, 16384
  %45 = load i32, ptr %3, align 4, !tbaa !5
  %46 = add i32 %45, 56
  %47 = zext i32 %46 to i64
  %48 = inttoptr i64 %47 to ptr
  %49 = load volatile i32, ptr %48, align 4, !tbaa !5
  %50 = or i32 %49, %44
  store volatile i32 %50, ptr %48, align 4, !tbaa !5
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local i32 @DMTimerWritePostedStatusGet(i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @DMTimerGPOConfigure(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = add i32 %0, 84
  %4 = zext i32 %3 to i64
  %5 = inttoptr i64 %4 to ptr
  %6 = load volatile i32, ptr %5, align 4, !tbaa !5
  %7 = and i32 %6, 4
  %.not = icmp eq i32 %7, 0
  br i1 %.not, label %.loopexit11, label %.preheader10

.preheader10:                                     ; preds = %2, %.preheader10
  %8 = tail call i32 @DMTimerWritePostedStatusGet(i32 noundef %0)
  %9 = and i32 %8, 1
  %.not7 = icmp eq i32 %9, 0
  br i1 %.not7, label %.loopexit11, label %.preheader10, !llvm.loop !9

.loopexit11:                                      ; preds = %.preheader10, %2
  %10 = add i32 %0, 56
  %11 = zext i32 %10 to i64
  %12 = inttoptr i64 %11 to ptr
  %13 = load volatile i32, ptr %12, align 4, !tbaa !5
  %14 = and i32 %13, -16385
  store volatile i32 %14, ptr %12, align 4, !tbaa !5
  %15 = load volatile i32, ptr %5, align 4, !tbaa !5
  %16 = and i32 %15, 4
  %.not8 = icmp eq i32 %16, 0
  br i1 %.not8, label %.loopexit, label %.preheader

.preheader:                                       ; preds = %.loopexit11, %.preheader
  %17 = tail call i32 @DMTimerWritePostedStatusGet(i32 noundef %0)
  %18 = and i32 %17, 1
  %.not9 = icmp eq i32 %18, 0
  br i1 %.not9, label %.loopexit, label %.preheader, !llvm.loop !11

.loopexit:                                        ; preds = %.preheader, %.loopexit11
  %19 = and i32 %1, 16384
  %20 = load volatile i32, ptr %12, align 4, !tbaa !5
  %21 = or i32 %20, %19
  store volatile i32 %21, ptr %12, align 4, !tbaa !5
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InstCombinePass,JumpThreadingPass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass