; LLVM IR from Shah-Shishir/Codeforces-Solutions :: 139A. Petr and Book.ll (Z5getItv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@arr = external dso_local global [7 x i32], align 16
@n = external dso_local global i32, align 4
@i = external dso_local global i32, align 4
@.str = external hidden unnamed_addr constant [4 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5getItv() #0 {
  store i32 0, ptr @i, align 4, !tbaa !5
  br label %1

1:                                                ; preds = %28, %0
  %2 = load i32, ptr @i, align 4, !tbaa !5
  %3 = icmp slt i32 %2, 7
  br i1 %3, label %4, label %31

4:                                                ; preds = %1
  %5 = load i32, ptr @n, align 4, !tbaa !5
  %6 = icmp sgt i32 %5, 0
  br i1 %6, label %7, label %20

7:                                                ; preds = %4
  %8 = load i32, ptr @i, align 4, !tbaa !5
  %9 = sext i32 %8 to i64
  %10 = getelementptr inbounds [7 x i32], ptr @arr, i64 0, i64 %9
  %11 = load i32, ptr %10, align 4, !tbaa !5
  %12 = icmp sgt i32 %11, 0
  br i1 %12, label %13, label %20

13:                                               ; preds = %7
  %14 = load i32, ptr @i, align 4, !tbaa !5
  %15 = sext i32 %14 to i64
  %16 = getelementptr inbounds [7 x i32], ptr @arr, i64 0, i64 %15
  %17 = load i32, ptr %16, align 4, !tbaa !5
  %18 = load i32, ptr @n, align 4, !tbaa !5
  %19 = sub nsw i32 %18, %17
  store i32 %19, ptr @n, align 4, !tbaa !5
  br label %20

20:                                               ; preds = %13, %7, %4
  %21 = load i32, ptr @n, align 4, !tbaa !5
  %22 = icmp sle i32 %21, 0
  br i1 %22, label %23, label %27

23:                                               ; preds = %20
  %24 = load i32, ptr @i, align 4, !tbaa !5
  %25 = add nsw i32 %24, 1
  %26 = call i32 (ptr, ...) @printf(ptr noundef @.str, i32 noundef %25)
  br label %32

27:                                               ; preds = %20
  br label %28

28:                                               ; preds = %27
  %29 = load i32, ptr @i, align 4, !tbaa !5
  %30 = add nsw i32 %29, 1
  store i32 %30, ptr @i, align 4, !tbaa !5
  br label %1, !llvm.loop !9

31:                                               ; preds = %1
  call void @_Z5getItv()
  br label %32

32:                                               ; preds = %31, %23
  ret void
}

declare i32 @printf(ptr noundef, ...) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@arr = external dso_local local_unnamed_addr global [7 x i32], align 16
@n = external dso_local local_unnamed_addr global i32, align 4
@i = external dso_local local_unnamed_addr global i32, align 4
@.str = external hidden unnamed_addr constant [4 x i8], align 1

; Function Attrs: mustprogress nofree nounwind uwtable
define dso_local void @_Z5getItv() local_unnamed_addr #0 {
  %n.promoted9 = load i32, ptr @n, align 4, !tbaa !5
  %1 = load i32, ptr @arr, align 16
  %2 = icmp sgt i32 %1, 0
  %3 = load i32, ptr getelementptr inbounds (i8, ptr @arr, i64 4), align 4
  %4 = icmp sgt i32 %3, 0
  %5 = load i32, ptr getelementptr inbounds (i8, ptr @arr, i64 8), align 8
  %6 = icmp sgt i32 %5, 0
  %7 = load i32, ptr getelementptr inbounds (i8, ptr @arr, i64 12), align 4
  %8 = icmp sgt i32 %7, 0
  %9 = load i32, ptr getelementptr inbounds (i8, ptr @arr, i64 16), align 16
  %10 = icmp sgt i32 %9, 0
  %11 = load i32, ptr getelementptr inbounds (i8, ptr @arr, i64 20), align 4
  %12 = icmp sgt i32 %11, 0
  %13 = load i32, ptr getelementptr inbounds (i8, ptr @arr, i64 24), align 8
  %14 = icmp sgt i32 %13, 0
  %15 = icmp sgt i32 %n.promoted9, 0
  br i1 %15, label %.lr.ph, label %.thread

.lr.ph:                                           ; preds = %0, %tailrecurse.loopexit
  %n.promoted1229 = phi i32 [ %n.promoted10.628, %tailrecurse.loopexit ], [ %n.promoted9, %0 ]
  br i1 %2, label %thread-pre-split, label %thread-pre-split.thread

thread-pre-split:                                 ; preds = %.lr.ph
  %16 = sub nsw i32 %n.promoted1229, %1
  store i32 %16, ptr @n, align 4, !tbaa !5
  %17 = icmp slt i32 %16, 1
  br i1 %17, label %.thread, label %thread-pre-split.thread

.thread:                                          ; preds = %thread-pre-split, %tailrecurse.loopexit, %thread-pre-split.1, %thread-pre-split.2, %thread-pre-split.3, %thread-pre-split.4, %thread-pre-split.5, %thread-pre-split.6, %0
  %storemerge8.lcssa.ph.ph.ph.ph.ph.ph = phi i32 [ 0, %0 ], [ 0, %thread-pre-split ], [ 0, %tailrecurse.loopexit ], [ 1, %thread-pre-split.1 ], [ 2, %thread-pre-split.2 ], [ 3, %thread-pre-split.3 ], [ 4, %thread-pre-split.4 ], [ 5, %thread-pre-split.5 ], [ 6, %thread-pre-split.6 ]
  store i32 %storemerge8.lcssa.ph.ph.ph.ph.ph.ph, ptr @i, align 4, !tbaa !5
  %18 = add nuw nsw i32 %storemerge8.lcssa.ph.ph.ph.ph.ph.ph, 1
  %19 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, i32 noundef %18)
  ret void

thread-pre-split.thread:                          ; preds = %.lr.ph, %thread-pre-split
  %n.promoted1016 = phi i32 [ %16, %thread-pre-split ], [ %n.promoted1229, %.lr.ph ]
  br i1 %4, label %thread-pre-split.1, label %thread-pre-split.1.thread

thread-pre-split.1:                               ; preds = %thread-pre-split.thread
  %20 = sub nsw i32 %n.promoted1016, %3
  store i32 %20, ptr @n, align 4, !tbaa !5
  %21 = icmp slt i32 %20, 1
  br i1 %21, label %.thread, label %thread-pre-split.1.thread

thread-pre-split.1.thread:                        ; preds = %thread-pre-split.thread, %thread-pre-split.1
  %n.promoted10.118 = phi i32 [ %20, %thread-pre-split.1 ], [ %n.promoted1016, %thread-pre-split.thread ]
  br i1 %6, label %thread-pre-split.2, label %thread-pre-split.2.thread

thread-pre-split.2:                               ; preds = %thread-pre-split.1.thread
  %22 = sub nsw i32 %n.promoted10.118, %5
  store i32 %22, ptr @n, align 4, !tbaa !5
  %23 = icmp slt i32 %22, 1
  br i1 %23, label %.thread, label %thread-pre-split.2.thread

thread-pre-split.2.thread:                        ; preds = %thread-pre-split.1.thread, %thread-pre-split.2
  %n.promoted10.220 = phi i32 [ %22, %thread-pre-split.2 ], [ %n.promoted10.118, %thread-pre-split.1.thread ]
  br i1 %8, label %thread-pre-split.3, label %thread-pre-split.3.thread

thread-pre-split.3:                               ; preds = %thread-pre-split.2.thread
  %24 = sub nsw i32 %n.promoted10.220, %7
  store i32 %24, ptr @n, align 4, !tbaa !5
  %25 = icmp slt i32 %24, 1
  br i1 %25, label %.thread, label %thread-pre-split.3.thread

thread-pre-split.3.thread:                        ; preds = %thread-pre-split.2.thread, %thread-pre-split.3
  %n.promoted10.322 = phi i32 [ %24, %thread-pre-split.3 ], [ %n.promoted10.220, %thread-pre-split.2.thread ]
  br i1 %10, label %thread-pre-split.4, label %thread-pre-split.4.thread

thread-pre-split.4:                               ; preds = %thread-pre-split.3.thread
  %26 = sub nsw i32 %n.promoted10.322, %9
  store i32 %26, ptr @n, align 4, !tbaa !5
  %27 = icmp slt i32 %26, 1
  br i1 %27, label %.thread, label %thread-pre-split.4.thread

thread-pre-split.4.thread:                        ; preds = %thread-pre-split.3.thread, %thread-pre-split.4
  %n.promoted10.424 = phi i32 [ %26, %thread-pre-split.4 ], [ %n.promoted10.322, %thread-pre-split.3.thread ]
  br i1 %12, label %thread-pre-split.5, label %thread-pre-split.5.thread

thread-pre-split.5:                               ; preds = %thread-pre-split.4.thread
  %28 = sub nsw i32 %n.promoted10.424, %11
  store i32 %28, ptr @n, align 4, !tbaa !5
  %29 = icmp slt i32 %28, 1
  br i1 %29, label %.thread, label %thread-pre-split.5.thread

thread-pre-split.5.thread:                        ; preds = %thread-pre-split.4.thread, %thread-pre-split.5
  %n.promoted10.526 = phi i32 [ %28, %thread-pre-split.5 ], [ %n.promoted10.424, %thread-pre-split.4.thread ]
  br i1 %14, label %thread-pre-split.6, label %tailrecurse.loopexit

thread-pre-split.6:                               ; preds = %thread-pre-split.5.thread
  %30 = sub nsw i32 %n.promoted10.526, %13
  store i32 %30, ptr @n, align 4, !tbaa !5
  %31 = icmp slt i32 %30, 1
  br i1 %31, label %.thread, label %tailrecurse.loopexit

tailrecurse.loopexit:                             ; preds = %thread-pre-split.5.thread, %thread-pre-split.6
  %n.promoted10.628 = phi i32 [ %30, %thread-pre-split.6 ], [ %n.promoted10.526, %thread-pre-split.5.thread ]
  store i32 7, ptr @i, align 4, !tbaa !5
  %32 = icmp sgt i32 %n.promoted10.628, 0
  br i1 %32, label %.lr.ph, label %.thread
}

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #1

attributes #0 = { mustprogress nofree nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SCCPPass,SimplifyCFGPass,TailCallElimPass