; LLVM IR from VastoLorde95/Competitive-Programming :: Hackerrank/World Cup 2016/World Cup Round 2/Problem E/E.ll (Z7update2iiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.node = type { i32, i32 }

@tree = external dso_local global [1048576 x %struct.node], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4node7combineERS_S0_(ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(8)) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z3updiiii(i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z5shiftiii(i32 noundef, i32 noundef, i32 noundef) #2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z7update2iiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #2 {
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  store i32 %0, ptr %6, align 4, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !5
  store i32 %4, ptr %10, align 4, !tbaa !5
  %14 = load i32, ptr %6, align 4, !tbaa !5
  %15 = load i32, ptr %10, align 4, !tbaa !5
  %16 = icmp sge i32 %14, %15
  br i1 %16, label %21, label %17

17:                                               ; preds = %5
  %18 = load i32, ptr %9, align 4, !tbaa !5
  %19 = load i32, ptr %7, align 4, !tbaa !5
  %20 = icmp sge i32 %18, %19
  br i1 %20, label %21, label %22

21:                                               ; preds = %17, %5
  br label %65

22:                                               ; preds = %17
  %23 = load i32, ptr %6, align 4, !tbaa !5
  %24 = load i32, ptr %9, align 4, !tbaa !5
  %25 = icmp sle i32 %23, %24
  br i1 %25, label %26, label %34

26:                                               ; preds = %22
  %27 = load i32, ptr %10, align 4, !tbaa !5
  %28 = load i32, ptr %7, align 4, !tbaa !5
  %29 = icmp sle i32 %27, %28
  br i1 %29, label %30, label %34

30:                                               ; preds = %26
  %31 = load i32, ptr %8, align 4, !tbaa !5
  %32 = load i32, ptr %9, align 4, !tbaa !5
  %33 = load i32, ptr %10, align 4, !tbaa !5
  call void @_Z3updiiii(i32 noundef %31, i32 noundef %32, i32 noundef %33, i32 noundef 1)
  br label %65

34:                                               ; preds = %26, %22
  %35 = load i32, ptr %8, align 4, !tbaa !5
  %36 = load i32, ptr %9, align 4, !tbaa !5
  %37 = load i32, ptr %10, align 4, !tbaa !5
  call void @_Z5shiftiii(i32 noundef %35, i32 noundef %36, i32 noundef %37)
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  %38 = load i32, ptr %8, align 4, !tbaa !5
  %39 = shl i32 %38, 1
  store i32 %39, ptr %11, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %40 = load i32, ptr %11, align 4, !tbaa !5
  %41 = add nsw i32 %40, 1
  store i32 %41, ptr %12, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  %42 = load i32, ptr %9, align 4, !tbaa !5
  %43 = load i32, ptr %10, align 4, !tbaa !5
  %44 = add nsw i32 %42, %43
  %45 = ashr i32 %44, 1
  store i32 %45, ptr %13, align 4, !tbaa !5
  %46 = load i32, ptr %6, align 4, !tbaa !5
  %47 = load i32, ptr %7, align 4, !tbaa !5
  %48 = load i32, ptr %11, align 4, !tbaa !5
  %49 = load i32, ptr %9, align 4, !tbaa !5
  %50 = load i32, ptr %13, align 4, !tbaa !5
  call void @_Z7update2iiiii(i32 noundef %46, i32 noundef %47, i32 noundef %48, i32 noundef %49, i32 noundef %50)
  %51 = load i32, ptr %6, align 4, !tbaa !5
  %52 = load i32, ptr %7, align 4, !tbaa !5
  %53 = load i32, ptr %12, align 4, !tbaa !5
  %54 = load i32, ptr %13, align 4, !tbaa !5
  %55 = load i32, ptr %10, align 4, !tbaa !5
  call void @_Z7update2iiiii(i32 noundef %51, i32 noundef %52, i32 noundef %53, i32 noundef %54, i32 noundef %55)
  %56 = load i32, ptr %8, align 4, !tbaa !5
  %57 = sext i32 %56 to i64
  %58 = getelementptr inbounds [1048576 x %struct.node], ptr @tree, i64 0, i64 %57
  %59 = load i32, ptr %11, align 4, !tbaa !5
  %60 = sext i32 %59 to i64
  %61 = getelementptr inbounds [1048576 x %struct.node], ptr @tree, i64 0, i64 %60
  %62 = load i32, ptr %12, align 4, !tbaa !5
  %63 = sext i32 %62 to i64
  %64 = getelementptr inbounds [1048576 x %struct.node], ptr @tree, i64 0, i64 %63
  call void @_ZN4node7combineERS_S0_(ptr noundef nonnull align 4 dereferenceable(8) %58, ptr noundef nonnull align 4 dereferenceable(8) %61, ptr noundef nonnull align 4 dereferenceable(8) %64)
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  br label %65

65:                                               ; preds = %34, %30, %21
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.node = type { i32, i32 }

@tree = external dso_local global [1048576 x %struct.node], align 16

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4node7combineERS_S0_(ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(8)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z3updiiii(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z5shiftiii(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z7update2iiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #1 {
  %.not = icmp slt i32 %0, %4
  %.not34 = icmp slt i32 %3, %1
  %or.cond = and i1 %.not34, %.not
  br i1 %or.cond, label %6, label %common.ret38

6:                                                ; preds = %5
  %.not35 = icmp sgt i32 %0, %3
  %.not36 = icmp sgt i32 %4, %1
  %or.cond37 = or i1 %.not35, %.not36
  br i1 %or.cond37, label %8, label %7

7:                                                ; preds = %6
  tail call void @_Z3updiiii(i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef 1)
  br label %common.ret38

common.ret38:                                     ; preds = %5, %7, %8
  ret void

8:                                                ; preds = %6
  tail call void @_Z5shiftiii(i32 noundef %2, i32 noundef %3, i32 noundef %4)
  %9 = shl i32 %2, 1
  %10 = or disjoint i32 %9, 1
  %11 = add nsw i32 %4, %3
  %12 = ashr i32 %11, 1
  tail call void @_Z7update2iiiii(i32 noundef %0, i32 noundef %1, i32 noundef %9, i32 noundef %3, i32 noundef %12)
  tail call void @_Z7update2iiiii(i32 noundef %0, i32 noundef %1, i32 noundef %10, i32 noundef %12, i32 noundef %4)
  %13 = sext i32 %2 to i64
  %14 = getelementptr inbounds [1048576 x %struct.node], ptr @tree, i64 0, i64 %13
  %15 = sext i32 %9 to i64
  %16 = getelementptr inbounds [1048576 x %struct.node], ptr @tree, i64 0, i64 %15
  %17 = sext i32 %10 to i64
  %18 = getelementptr inbounds [1048576 x %struct.node], ptr @tree, i64 0, i64 %17
  tail call void @_ZN4node7combineERS_S0_(ptr noundef nonnull align 4 dereferenceable(8) %14, ptr noundef nonnull align 4 dereferenceable(8) %16, ptr noundef nonnull align 4 dereferenceable(8) %18)
  br label %common.ret38
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass