; LLVM IR from MrSupW/C-Source-Code-of-Sorting-Algorithm :: 排序8 快速排序.ll (Z9PartitionPiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z4SwapPiii(ptr noundef, i32 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z9PartitionPiii(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 {
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  store i32 %2, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  %8 = load ptr, ptr %4, align 8, !tbaa !5
  %9 = load i32, ptr %5, align 4, !tbaa !9
  %10 = sext i32 %9 to i64
  %11 = getelementptr inbounds i32, ptr %8, i64 %10
  %12 = load i32, ptr %11, align 4, !tbaa !9
  store i32 %12, ptr %7, align 4, !tbaa !9
  br label %13

13:                                               ; preds = %56, %3
  %14 = load i32, ptr %5, align 4, !tbaa !9
  %15 = load i32, ptr %6, align 4, !tbaa !9
  %16 = icmp slt i32 %14, %15
  br i1 %16, label %17, label %60

17:                                               ; preds = %13
  br label %18

18:                                               ; preds = %32, %17
  %19 = load i32, ptr %5, align 4, !tbaa !9
  %20 = load i32, ptr %6, align 4, !tbaa !9
  %21 = icmp slt i32 %19, %20
  br i1 %21, label %22, label %30

22:                                               ; preds = %18
  %23 = load ptr, ptr %4, align 8, !tbaa !5
  %24 = load i32, ptr %6, align 4, !tbaa !9
  %25 = sext i32 %24 to i64
  %26 = getelementptr inbounds i32, ptr %23, i64 %25
  %27 = load i32, ptr %26, align 4, !tbaa !9
  %28 = load i32, ptr %7, align 4, !tbaa !9
  %29 = icmp sge i32 %27, %28
  br label %30

30:                                               ; preds = %22, %18
  %31 = phi i1 [ false, %18 ], [ %29, %22 ]
  br i1 %31, label %32, label %35

32:                                               ; preds = %30
  %33 = load i32, ptr %6, align 4, !tbaa !9
  %34 = add nsw i32 %33, -1
  store i32 %34, ptr %6, align 4, !tbaa !9
  br label %18, !llvm.loop !11

35:                                               ; preds = %30
  %36 = load ptr, ptr %4, align 8, !tbaa !5
  %37 = load i32, ptr %5, align 4, !tbaa !9
  %38 = load i32, ptr %6, align 4, !tbaa !9
  call void @_Z4SwapPiii(ptr noundef %36, i32 noundef %37, i32 noundef %38)
  br label %39

39:                                               ; preds = %53, %35
  %40 = load i32, ptr %5, align 4, !tbaa !9
  %41 = load i32, ptr %6, align 4, !tbaa !9
  %42 = icmp slt i32 %40, %41
  br i1 %42, label %43, label %51

43:                                               ; preds = %39
  %44 = load ptr, ptr %4, align 8, !tbaa !5
  %45 = load i32, ptr %5, align 4, !tbaa !9
  %46 = sext i32 %45 to i64
  %47 = getelementptr inbounds i32, ptr %44, i64 %46
  %48 = load i32, ptr %47, align 4, !tbaa !9
  %49 = load i32, ptr %7, align 4, !tbaa !9
  %50 = icmp sle i32 %48, %49
  br label %51

51:                                               ; preds = %43, %39
  %52 = phi i1 [ false, %39 ], [ %50, %43 ]
  br i1 %52, label %53, label %56

53:                                               ; preds = %51
  %54 = load i32, ptr %5, align 4, !tbaa !9
  %55 = add nsw i32 %54, 1
  store i32 %55, ptr %5, align 4, !tbaa !9
  br label %39, !llvm.loop !13

56:                                               ; preds = %51
  %57 = load ptr, ptr %4, align 8, !tbaa !5
  %58 = load i32, ptr %5, align 4, !tbaa !9
  %59 = load i32, ptr %6, align 4, !tbaa !9
  call void @_Z4SwapPiii(ptr noundef %57, i32 noundef %58, i32 noundef %59)
  br label %13, !llvm.loop !14

60:                                               ; preds = %13
  %61 = load i32, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  ret i32 %61
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z4SwapPiii(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z9PartitionPiii(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = sext i32 %1 to i64
  %5 = getelementptr inbounds i32, ptr %0, i64 %4
  %6 = load i32, ptr %5, align 4, !tbaa !5
  %7 = icmp slt i32 %1, %2
  br i1 %7, label %.preheader, label %._crit_edge

.preheader:                                       ; preds = %3, %.critedge2
  %.032 = phi i32 [ %.1.lcssa, %.critedge2 ], [ %1, %3 ]
  %.02431 = phi i32 [ %.125.lcssa, %.critedge2 ], [ %2, %3 ]
  %8 = sext i32 %.02431 to i64
  %9 = sext i32 %.032 to i64
  %10 = add nsw i32 %.02431, -1
  %smin = tail call i32 @llvm.smin.i32(i32 %.032, i32 %10)
  br label %11

11:                                               ; preds = %.preheader, %14
  %indvars.iv = phi i64 [ %8, %.preheader ], [ %indvars.iv.next, %14 ]
  %12 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv
  %13 = load i32, ptr %12, align 4, !tbaa !5
  %.not = icmp slt i32 %13, %6
  br i1 %.not, label %.critedge.split.loop.exit42, label %14

14:                                               ; preds = %11
  %indvars.iv.next = add nsw i64 %indvars.iv, -1
  %15 = icmp sgt i64 %indvars.iv.next, %9
  br i1 %15, label %11, label %.critedge, !llvm.loop !9

.critedge.split.loop.exit42:                      ; preds = %11
  %16 = trunc nsw i64 %indvars.iv to i32
  br label %.critedge

.critedge:                                        ; preds = %14, %.critedge.split.loop.exit42
  %.125.lcssa = phi i32 [ %16, %.critedge.split.loop.exit42 ], [ %smin, %14 ]
  tail call void @_Z4SwapPiii(ptr noundef nonnull %0, i32 noundef %.032, i32 noundef %.125.lcssa)
  %17 = icmp slt i32 %.032, %.125.lcssa
  br i1 %17, label %.lr.ph.preheader, label %.critedge2

.lr.ph.preheader:                                 ; preds = %.critedge
  %18 = sext i32 %.125.lcssa to i64
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %21
  %indvars.iv35 = phi i64 [ %9, %.lr.ph.preheader ], [ %indvars.iv.next36, %21 ]
  %19 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv35
  %20 = load i32, ptr %19, align 4, !tbaa !5
  %.not26 = icmp sgt i32 %20, %6
  br i1 %.not26, label %.critedge2.loopexit, label %21

21:                                               ; preds = %.lr.ph
  %indvars.iv.next36 = add nsw i64 %indvars.iv35, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next36, %18
  br i1 %exitcond.not, label %.critedge2.thread, label %.lr.ph, !llvm.loop !11

.critedge2.thread:                                ; preds = %21
  tail call void @_Z4SwapPiii(ptr noundef nonnull %0, i32 noundef %.125.lcssa, i32 noundef %.125.lcssa)
  br label %._crit_edge

.critedge2.loopexit:                              ; preds = %.lr.ph
  %22 = trunc nsw i64 %indvars.iv35 to i32
  br label %.critedge2

.critedge2:                                       ; preds = %.critedge2.loopexit, %.critedge
  %.1.lcssa = phi i32 [ %.032, %.critedge ], [ %22, %.critedge2.loopexit ]
  tail call void @_Z4SwapPiii(ptr noundef %0, i32 noundef %.1.lcssa, i32 noundef %.125.lcssa)
  %23 = icmp slt i32 %.1.lcssa, %.125.lcssa
  br i1 %23, label %.preheader, label %._crit_edge, !llvm.loop !12

._crit_edge:                                      ; preds = %.critedge2, %.critedge2.thread, %3
  %.0.lcssa = phi i32 [ %1, %3 ], [ %.125.lcssa, %.critedge2.thread ], [ %.1.lcssa, %.critedge2 ]
  ret i32 %.0.lcssa
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass