; LLVM IR from lfarcaro/ARINC653_ARMV7A_AM335X :: Hardware (rtc)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @RtcVersionGet() #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @RTCTimeSet(i32 noundef %0, i32 noundef %1) #2 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store volatile i32 0, ptr %5, align 4, !tbaa !5
  %6 = call i32 @RtcVersionGet()
  %7 = icmp eq i32 1, %6
  br i1 %7, label %8, label %9

8:                                                ; preds = %2
  store volatile i32 128, ptr %5, align 4, !tbaa !5
  br label %9

9:                                                ; preds = %8, %2
  %10 = load i32, ptr %3, align 4, !tbaa !5
  %11 = add i32 %10, 64
  %12 = zext i32 %11 to i64
  %13 = inttoptr i64 %12 to ptr
  %14 = load volatile i32, ptr %13, align 4, !tbaa !5
  %15 = and i32 %14, -2
  store volatile i32 %15, ptr %13, align 4, !tbaa !5
  %16 = load volatile i32, ptr %5, align 4, !tbaa !5
  %17 = load i32, ptr %3, align 4, !tbaa !5
  %18 = add i32 %17, 64
  %19 = zext i32 %18 to i64
  %20 = inttoptr i64 %19 to ptr
  %21 = load volatile i32, ptr %20, align 4, !tbaa !5
  %22 = or i32 %21, %16
  store volatile i32 %22, ptr %20, align 4, !tbaa !5
  %23 = load i32, ptr %4, align 4, !tbaa !5
  %24 = and i32 %23, 65280
  %25 = lshr i32 %24, 8
  %26 = load i32, ptr %3, align 4, !tbaa !5
  %27 = add i32 %26, 0
  %28 = zext i32 %27 to i64
  %29 = inttoptr i64 %28 to ptr
  store volatile i32 %25, ptr %29, align 4, !tbaa !5
  %30 = load i32, ptr %4, align 4, !tbaa !5
  %31 = and i32 %30, 16711680
  %32 = lshr i32 %31, 16
  %33 = load i32, ptr %3, align 4, !tbaa !5
  %34 = add i32 %33, 4
  %35 = zext i32 %34 to i64
  %36 = inttoptr i64 %35 to ptr
  store volatile i32 %32, ptr %36, align 4, !tbaa !5
  %37 = load i32, ptr %4, align 4, !tbaa !5
  %38 = and i32 %37, -16777216
  %39 = lshr i32 %38, 24
  %40 = load i32, ptr %4, align 4, !tbaa !5
  %41 = and i32 %40, 128
  %42 = or i32 %39, %41
  %43 = load i32, ptr %3, align 4, !tbaa !5
  %44 = add i32 %43, 8
  %45 = zext i32 %44 to i64
  %46 = inttoptr i64 %45 to ptr
  store volatile i32 %42, ptr %46, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @RtcVersionGet() local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @RTCTimeSet(i32 noundef %0, i32 noundef %1) local_unnamed_addr #2 {
  %3 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3)
  store volatile i32 0, ptr %3, align 4, !tbaa !5
  %4 = tail call i32 @RtcVersionGet() #3
  %5 = icmp eq i32 %4, 1
  br i1 %5, label %6, label %7

6:                                                ; preds = %2
  store volatile i32 128, ptr %3, align 4, !tbaa !5
  br label %7

7:                                                ; preds = %6, %2
  %8 = add i32 %0, 64
  %9 = zext i32 %8 to i64
  %10 = inttoptr i64 %9 to ptr
  %11 = load volatile i32, ptr %10, align 4, !tbaa !5
  %12 = and i32 %11, -2
  store volatile i32 %12, ptr %10, align 4, !tbaa !5
  %.0..0..0..0. = load volatile i32, ptr %3, align 4, !tbaa !5
  %13 = load volatile i32, ptr %10, align 4, !tbaa !5
  %14 = or i32 %13, %.0..0..0..0.
  store volatile i32 %14, ptr %10, align 4, !tbaa !5
  %15 = lshr i32 %1, 8
  %16 = and i32 %15, 255
  %17 = zext i32 %0 to i64
  %18 = inttoptr i64 %17 to ptr
  store volatile i32 %16, ptr %18, align 4, !tbaa !5
  %19 = lshr i32 %1, 16
  %20 = and i32 %19, 255
  %21 = add i32 %0, 4
  %22 = zext i32 %21 to i64
  %23 = inttoptr i64 %22 to ptr
  store volatile i32 %20, ptr %23, align 4, !tbaa !5
  %24 = lshr i32 %1, 24
  %25 = and i32 %1, 128
  %26 = or i32 %24, %25
  %27 = add i32 %0, 8
  %28 = zext i32 %27 to i64
  %29 = inttoptr i64 %28 to ptr
  store volatile i32 %26, ptr %29, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3)
  ret void
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,TailCallElimPass