; LLVM IR from Columbitech/rohc :: src (dprofile)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.__gnu_cxx::__normal_iterator.0" = type { ptr }
%"class.ROHC::DProfile" = type <{ ptr, ptr, i16, [2 x i8], i32, i16, i16, i32, i32, i32, i64, i64, i8, [3 x i8], %"struct.ROHC::iphdr", i64, i32, [4 x i8] }>
%"struct.ROHC::iphdr" = type { i8, i8, i16, i16, i16, i8, i8, i16, i32, i32 }

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN4ROHC8GetValueItN9__gnu_cxx17__normal_iteratorIPhSt6vectorIhSaIhEEEEEEbRT0_S8_RT_(ptr noundef nonnull align 8 dereferenceable(8), ptr, ptr noundef nonnull align 2 dereferenceable(2)) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN4ROHC8DProfile30parse_ipv4_innermost_irregularERN9__gnu_cxx17__normal_iteratorIPhSt6vectorIhSaIhEEEERKS7_(ptr noundef nonnull align 8 dereferenceable(92) %0, ptr noundef nonnull align 8 dereferenceable(8) %1, ptr noundef nonnull align 8 dereferenceable(8) %2) #2 align 2 {
  %4 = alloca i1, align 1
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca %"class.__gnu_cxx::__normal_iterator.0", align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  %9 = load ptr, ptr %5, align 8
  %10 = getelementptr inbounds %"class.ROHC::DProfile", ptr %9, i32 0, i32 7
  %11 = load i32, ptr %10, align 4, !tbaa !9
  %12 = icmp eq i32 2, %11
  br i1 %12, label %13, label %21

13:                                               ; preds = %3
  %14 = load ptr, ptr %6, align 8, !tbaa !5
  %15 = load ptr, ptr %7, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %8, ptr align 8 %15, i64 8, i1 false), !tbaa.struct !19
  %16 = getelementptr inbounds %"class.ROHC::DProfile", ptr %9, i32 0, i32 14
  %17 = getelementptr inbounds %"struct.ROHC::iphdr", ptr %16, i32 0, i32 3
  %18 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator.0", ptr %8, i32 0, i32 0
  %19 = load ptr, ptr %18, align 8
  %20 = call noundef zeroext i1 @_ZN4ROHC8GetValueItN9__gnu_cxx17__normal_iteratorIPhSt6vectorIhSaIhEEEEEEbRT0_S8_RT_(ptr noundef nonnull align 8 dereferenceable(8) %14, ptr %19, ptr noundef nonnull align 2 dereferenceable(2) %17)
  store i1 %20, ptr %4, align 1
  br label %30

21:                                               ; preds = %3
  %22 = getelementptr inbounds %"class.ROHC::DProfile", ptr %9, i32 0, i32 7
  %23 = load i32, ptr %22, align 4, !tbaa !9
  %24 = icmp eq i32 3, %23
  br i1 %24, label %25, label %28

25:                                               ; preds = %21
  %26 = getelementptr inbounds %"class.ROHC::DProfile", ptr %9, i32 0, i32 14
  %27 = getelementptr inbounds %"struct.ROHC::iphdr", ptr %26, i32 0, i32 3
  store i16 0, ptr %27, align 4, !tbaa !20
  br label %28

28:                                               ; preds = %25, %21
  br label %29

29:                                               ; preds = %28
  store i1 true, ptr %4, align 1
  br label %30

30:                                               ; preds = %29, %13
  %31 = load i1, ptr %4, align 1
  ret i1 %31
}

attributes #0 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !13, i64 28}
!10 = !{!"_ZTSN4ROHC8DProfileE", !6, i64 8, !11, i64 16, !12, i64 20, !11, i64 24, !11, i64 26, !13, i64 28, !14, i64 32, !14, i64 36, !15, i64 40, !15, i64 48, !16, i64 56, !17, i64 60, !15, i64 80, !18, i64 88}
!11 = !{!"short", !7, i64 0}
!12 = !{!"_ZTSN4ROHC8DProfileUt_E", !7, i64 0}
!13 = !{!"_ZTSN4ROHC15IPIDBehaviour_tE", !7, i64 0}
!14 = !{!"int", !7, i64 0}
!15 = !{!"long", !7, i64 0}
!16 = !{!"bool", !7, i64 0}
!17 = !{!"_ZTSN4ROHC5iphdrE", !7, i64 0, !7, i64 0, !7, i64 1, !11, i64 2, !11, i64 4, !11, i64 6, !7, i64 8, !7, i64 9, !11, i64 10, !14, i64 12, !14, i64 16}
!18 = !{!"_ZTSN4ROHC12Reordering_tE", !7, i64 0}
!19 = !{i64 0, i64 8, !5}
!20 = !{!10, !11, i64 64}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN4ROHC8GetValueItN9__gnu_cxx17__normal_iteratorIPhSt6vectorIhSaIhEEEEEEbRT0_S8_RT_(ptr noundef nonnull align 8 dereferenceable(8), ptr, ptr noundef nonnull align 2 dereferenceable(2)) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_ZN4ROHC8DProfile30parse_ipv4_innermost_irregularERN9__gnu_cxx17__normal_iteratorIPhSt6vectorIhSaIhEEEERKS7_(ptr noundef nonnull align 8 dereferenceable(92) %0, ptr noundef nonnull align 8 dereferenceable(8) %1, ptr nocapture noundef nonnull readonly align 8 dereferenceable(8) %2) local_unnamed_addr #0 align 2 {
  %4 = getelementptr inbounds i8, ptr %0, i64 28
  %5 = load i32, ptr %4, align 4, !tbaa !5
  switch i32 %5, label %11 [
    i32 2, label %6
    i32 3, label %9
  ]

6:                                                ; preds = %3
  %.sroa.0.0.copyload = load ptr, ptr %2, align 8, !tbaa !18
  %7 = getelementptr inbounds i8, ptr %0, i64 64
  %8 = tail call noundef zeroext i1 @_ZN4ROHC8GetValueItN9__gnu_cxx17__normal_iteratorIPhSt6vectorIhSaIhEEEEEEbRT0_S8_RT_(ptr noundef nonnull align 8 dereferenceable(8) %1, ptr %.sroa.0.0.copyload, ptr noundef nonnull align 2 dereferenceable(2) %7)
  br label %11

9:                                                ; preds = %3
  %10 = getelementptr inbounds i8, ptr %0, i64 64
  store i16 0, ptr %10, align 8, !tbaa !19
  br label %11

11:                                               ; preds = %9, %3, %6
  %.0 = phi i1 [ %8, %6 ], [ true, %3 ], [ true, %9 ]
  ret i1 %.0
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !12, i64 28}
!6 = !{!"_ZTSN4ROHC8DProfileE", !7, i64 8, !10, i64 16, !11, i64 20, !10, i64 24, !10, i64 26, !12, i64 28, !13, i64 32, !13, i64 36, !14, i64 40, !14, i64 48, !15, i64 56, !16, i64 60, !14, i64 80, !17, i64 88}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"short", !8, i64 0}
!11 = !{!"_ZTSN4ROHC8DProfileUt_E", !8, i64 0}
!12 = !{!"_ZTSN4ROHC15IPIDBehaviour_tE", !8, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = !{!"long", !8, i64 0}
!15 = !{!"bool", !8, i64 0}
!16 = !{!"_ZTSN4ROHC5iphdrE", !8, i64 0, !8, i64 0, !8, i64 1, !10, i64 2, !10, i64 4, !10, i64 6, !8, i64 8, !8, i64 9, !10, i64 10, !13, i64 12, !13, i64 16}
!17 = !{!"_ZTSN4ROHC12Reordering_tE", !8, i64 0}
!18 = !{!7, !7, i64 0}
!19 = !{!6, !10, i64 64}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass