; LLVM IR from xtruan/FlipBIP :: lib/crypto (segwit_addr)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local i32 @bech32_encode(ptr noundef, ptr noundef, ptr noundef, i64 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @segwit_addr_encode(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, i64 noundef %4) #0 {
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca ptr, align 8
  %11 = alloca i64, align 8
  %12 = alloca [65 x i8], align 16
  %13 = alloca i64, align 8
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  store ptr %0, ptr %7, align 8, !tbaa !5
  store ptr %1, ptr %8, align 8, !tbaa !5
  store i32 %2, ptr %9, align 4, !tbaa !9
  store ptr %3, ptr %10, align 8, !tbaa !5
  store i64 %4, ptr %11, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 65, ptr %12) #3
  call void @llvm.memset.p0.i64(ptr align 16 %12, i8 0, i64 65, i1 false)
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #3
  store i64 0, ptr %13, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  store i32 1, ptr %14, align 4, !tbaa !9
  %16 = load i32, ptr %9, align 4, !tbaa !9
  %17 = icmp sgt i32 %16, 16
  br i1 %17, label %18, label %19

18:                                               ; preds = %5
  store i32 0, ptr %6, align 4
  store i32 1, ptr %15, align 4
  br label %57

19:                                               ; preds = %5
  %20 = load i32, ptr %9, align 4, !tbaa !9
  %21 = icmp eq i32 %20, 0
  br i1 %21, label %22, label %29

22:                                               ; preds = %19
  %23 = load i64, ptr %11, align 8, !tbaa !11
  %24 = icmp ne i64 %23, 20
  br i1 %24, label %25, label %29

25:                                               ; preds = %22
  %26 = load i64, ptr %11, align 8, !tbaa !11
  %27 = icmp ne i64 %26, 32
  br i1 %27, label %28, label %29

28:                                               ; preds = %25
  store i32 0, ptr %6, align 4
  store i32 1, ptr %15, align 4
  br label %57

29:                                               ; preds = %25, %22, %19
  %30 = load i64, ptr %11, align 8, !tbaa !11
  %31 = icmp ult i64 %30, 2
  br i1 %31, label %35, label %32

32:                                               ; preds = %29
  %33 = load i64, ptr %11, align 8, !tbaa !11
  %34 = icmp ugt i64 %33, 40
  br i1 %34, label %35, label %36

35:                                               ; preds = %32, %29
  store i32 0, ptr %6, align 4
  store i32 1, ptr %15, align 4
  br label %57

36:                                               ; preds = %32
  %37 = load i32, ptr %9, align 4, !tbaa !9
  %38 = icmp sgt i32 %37, 0
  br i1 %38, label %39, label %40

39:                                               ; preds = %36
  store i32 2, ptr %14, align 4, !tbaa !9
  br label %40

40:                                               ; preds = %39, %36
  %41 = load i32, ptr %9, align 4, !tbaa !9
  %42 = trunc i32 %41 to i8
  %43 = getelementptr inbounds [65 x i8], ptr %12, i64 0, i64 0
  store i8 %42, ptr %43, align 16, !tbaa !13
  %44 = getelementptr inbounds [65 x i8], ptr %12, i64 0, i64 0
  %45 = getelementptr inbounds i8, ptr %44, i64 1
  %46 = load ptr, ptr %10, align 8, !tbaa !5
  %47 = load i64, ptr %11, align 8, !tbaa !11
  %48 = call i32 @convert_bits(ptr noundef %45, ptr noundef %13, i32 noundef 5, ptr noundef %46, i64 noundef %47, i32 noundef 8, i32 noundef 1)
  %49 = load i64, ptr %13, align 8, !tbaa !11
  %50 = add i64 %49, 1
  store i64 %50, ptr %13, align 8, !tbaa !11
  %51 = load ptr, ptr %7, align 8, !tbaa !5
  %52 = load ptr, ptr %8, align 8, !tbaa !5
  %53 = getelementptr inbounds [65 x i8], ptr %12, i64 0, i64 0
  %54 = load i64, ptr %13, align 8, !tbaa !11
  %55 = load i32, ptr %14, align 4, !tbaa !9
  %56 = call i32 @bech32_encode(ptr noundef %51, ptr noundef %52, ptr noundef %53, i64 noundef %54, i32 noundef %55)
  store i32 %56, ptr %6, align 4
  store i32 1, ptr %15, align 4
  br label %57

57:                                               ; preds = %40, %35, %28, %18
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 65, ptr %12) #3
  %58 = load i32, ptr %6, align 4
  ret i32 %58
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

; Function Attrs: nounwind uwtable
declare hidden i32 @convert_bits(ptr noundef, ptr noundef, i32 noundef, ptr noundef, i64 noundef, i32 noundef, i32 noundef) #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local i32 @bech32_encode(ptr noundef, ptr noundef, ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @segwit_addr_encode(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, i64 noundef %4) local_unnamed_addr #0 {
  %6 = alloca [65 x i8], align 16
  %7 = alloca i64, align 8
  call void @llvm.lifetime.start.p0(i64 65, ptr nonnull %6) #3
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(65) %6, i8 0, i64 65, i1 false)
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %7) #3
  store i64 0, ptr %7, align 8, !tbaa !5
  %8 = icmp sgt i32 %2, 16
  br i1 %8, label %19, label %9

9:                                                ; preds = %5
  %10 = icmp eq i32 %2, 0
  br i1 %10, label %switch.early.test, label %11

switch.early.test:                                ; preds = %9
  switch i64 %4, label %19 [
    i64 32, label %.thread
    i64 20, label %.thread
  ]

11:                                               ; preds = %9
  %12 = add i64 %4, -41
  %or.cond5 = icmp ult i64 %12, -39
  br i1 %or.cond5, label %19, label %.thread

.thread:                                          ; preds = %switch.early.test, %switch.early.test, %11
  %.inv = icmp slt i32 %2, 1
  %spec.select = select i1 %.inv, i32 1, i32 2
  %13 = trunc i32 %2 to i8
  store i8 %13, ptr %6, align 16, !tbaa !9
  %14 = getelementptr inbounds i8, ptr %6, i64 1
  %15 = call i32 @convert_bits(ptr noundef nonnull %14, ptr noundef nonnull %7, i32 noundef 5, ptr noundef %3, i64 noundef %4, i32 noundef 8, i32 noundef 1)
  %16 = load i64, ptr %7, align 8, !tbaa !5
  %17 = add i64 %16, 1
  store i64 %17, ptr %7, align 8, !tbaa !5
  %18 = call i32 @bech32_encode(ptr noundef %0, ptr noundef %1, ptr noundef nonnull %6, i64 noundef %17, i32 noundef %spec.select)
  br label %19

19:                                               ; preds = %11, %switch.early.test, %5, %.thread
  %.018 = phi i32 [ %18, %.thread ], [ 0, %5 ], [ 0, %switch.early.test ], [ 0, %11 ]
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #3
  call void @llvm.lifetime.end.p0(i64 65, ptr nonnull %6) #3
  ret i32 %.018
}

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

; Function Attrs: nounwind uwtable
declare hidden i32 @convert_bits(ptr noundef, ptr noundef, i32 noundef, ptr noundef, i64 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,SROAPass,SimplifyCFGPass