; LLVM IR from Algo-Phantoms/Algo-Tree :: Code/C++/cycle_sort.ll (Z10cycle_sortPii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z10cycle_sortPii(ptr noundef %0, i32 noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  store i32 0, ptr %5, align 4, !tbaa !9
  br label %11

11:                                               ; preds = %127, %2
  %12 = load i32, ptr %5, align 4, !tbaa !9
  %13 = load i32, ptr %4, align 4, !tbaa !9
  %14 = sub nsw i32 %13, 2
  %15 = icmp sle i32 %12, %14
  br i1 %15, label %16, label %130

16:                                               ; preds = %11
  %17 = load ptr, ptr %3, align 8, !tbaa !5
  %18 = load i32, ptr %5, align 4, !tbaa !9
  %19 = sext i32 %18 to i64
  %20 = getelementptr inbounds i32, ptr %17, i64 %19
  %21 = load i32, ptr %20, align 4, !tbaa !9
  store i32 %21, ptr %6, align 4, !tbaa !9
  %22 = load i32, ptr %5, align 4, !tbaa !9
  store i32 %22, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %23 = load i32, ptr %5, align 4, !tbaa !9
  %24 = add nsw i32 %23, 1
  store i32 %24, ptr %9, align 4, !tbaa !9
  br label %25

25:                                               ; preds = %42, %16
  %26 = load i32, ptr %9, align 4, !tbaa !9
  %27 = load i32, ptr %4, align 4, !tbaa !9
  %28 = icmp slt i32 %26, %27
  br i1 %28, label %30, label %29

29:                                               ; preds = %25
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  br label %45

30:                                               ; preds = %25
  %31 = load ptr, ptr %3, align 8, !tbaa !5
  %32 = load i32, ptr %9, align 4, !tbaa !9
  %33 = sext i32 %32 to i64
  %34 = getelementptr inbounds i32, ptr %31, i64 %33
  %35 = load i32, ptr %34, align 4, !tbaa !9
  %36 = load i32, ptr %6, align 4, !tbaa !9
  %37 = icmp slt i32 %35, %36
  br i1 %37, label %38, label %41

38:                                               ; preds = %30
  %39 = load i32, ptr %7, align 4, !tbaa !9
  %40 = add nsw i32 %39, 1
  store i32 %40, ptr %7, align 4, !tbaa !9
  br label %41

41:                                               ; preds = %38, %30
  br label %42

42:                                               ; preds = %41
  %43 = load i32, ptr %9, align 4, !tbaa !9
  %44 = add nsw i32 %43, 1
  store i32 %44, ptr %9, align 4, !tbaa !9
  br label %25, !llvm.loop !11

45:                                               ; preds = %29
  %46 = load i32, ptr %7, align 4, !tbaa !9
  %47 = load i32, ptr %5, align 4, !tbaa !9
  %48 = icmp eq i32 %46, %47
  br i1 %48, label %49, label %50

49:                                               ; preds = %45
  br label %127

50:                                               ; preds = %45
  br label %51

51:                                               ; preds = %59, %50
  %52 = load i32, ptr %6, align 4, !tbaa !9
  %53 = load ptr, ptr %3, align 8, !tbaa !5
  %54 = load i32, ptr %7, align 4, !tbaa !9
  %55 = sext i32 %54 to i64
  %56 = getelementptr inbounds i32, ptr %53, i64 %55
  %57 = load i32, ptr %56, align 4, !tbaa !9
  %58 = icmp eq i32 %52, %57
  br i1 %58, label %59, label %62

59:                                               ; preds = %51
  %60 = load i32, ptr %7, align 4, !tbaa !9
  %61 = add nsw i32 %60, 1
  store i32 %61, ptr %7, align 4, !tbaa !9
  br label %51, !llvm.loop !13

62:                                               ; preds = %51
  %63 = load i32, ptr %7, align 4, !tbaa !9
  %64 = load i32, ptr %5, align 4, !tbaa !9
  %65 = icmp ne i32 %63, %64
  br i1 %65, label %66, label %71

66:                                               ; preds = %62
  %67 = load ptr, ptr %3, align 8, !tbaa !5
  %68 = load i32, ptr %7, align 4, !tbaa !9
  %69 = sext i32 %68 to i64
  %70 = getelementptr inbounds i32, ptr %67, i64 %69
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %6, ptr noundef nonnull align 4 dereferenceable(4) %70) #3
  br label %71

71:                                               ; preds = %66, %62
  br label %72

72:                                               ; preds = %125, %71
  %73 = load i32, ptr %7, align 4, !tbaa !9
  %74 = load i32, ptr %5, align 4, !tbaa !9
  %75 = icmp ne i32 %73, %74
  br i1 %75, label %76, label %126

76:                                               ; preds = %72
  %77 = load i32, ptr %5, align 4, !tbaa !9
  store i32 %77, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  %78 = load i32, ptr %5, align 4, !tbaa !9
  %79 = add nsw i32 %78, 1
  store i32 %79, ptr %10, align 4, !tbaa !9
  br label %80

80:                                               ; preds = %97, %76
  %81 = load i32, ptr %10, align 4, !tbaa !9
  %82 = load i32, ptr %4, align 4, !tbaa !9
  %83 = icmp slt i32 %81, %82
  br i1 %83, label %85, label %84

84:                                               ; preds = %80
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  br label %100

85:                                               ; preds = %80
  %86 = load ptr, ptr %3, align 8, !tbaa !5
  %87 = load i32, ptr %10, align 4, !tbaa !9
  %88 = sext i32 %87 to i64
  %89 = getelementptr inbounds i32, ptr %86, i64 %88
  %90 = load i32, ptr %89, align 4, !tbaa !9
  %91 = load i32, ptr %6, align 4, !tbaa !9
  %92 = icmp slt i32 %90, %91
  br i1 %92, label %93, label %96

93:                                               ; preds = %85
  %94 = load i32, ptr %7, align 4, !tbaa !9
  %95 = add nsw i32 %94, 1
  store i32 %95, ptr %7, align 4, !tbaa !9
  br label %96

96:                                               ; preds = %93, %85
  br label %97

97:                                               ; preds = %96
  %98 = load i32, ptr %10, align 4, !tbaa !9
  %99 = add nsw i32 %98, 1
  store i32 %99, ptr %10, align 4, !tbaa !9
  br label %80, !llvm.loop !14

100:                                              ; preds = %84
  br label %101

101:                                              ; preds = %109, %100
  %102 = load i32, ptr %6, align 4, !tbaa !9
  %103 = load ptr, ptr %3, align 8, !tbaa !5
  %104 = load i32, ptr %7, align 4, !tbaa !9
  %105 = sext i32 %104 to i64
  %106 = getelementptr inbounds i32, ptr %103, i64 %105
  %107 = load i32, ptr %106, align 4, !tbaa !9
  %108 = icmp eq i32 %102, %107
  br i1 %108, label %109, label %112

109:                                              ; preds = %101
  %110 = load i32, ptr %7, align 4, !tbaa !9
  %111 = add nsw i32 %110, 1
  store i32 %111, ptr %7, align 4, !tbaa !9
  br label %101, !llvm.loop !15

112:                                              ; preds = %101
  %113 = load i32, ptr %6, align 4, !tbaa !9
  %114 = load ptr, ptr %3, align 8, !tbaa !5
  %115 = load i32, ptr %7, align 4, !tbaa !9
  %116 = sext i32 %115 to i64
  %117 = getelementptr inbounds i32, ptr %114, i64 %116
  %118 = load i32, ptr %117, align 4, !tbaa !9
  %119 = icmp ne i32 %113, %118
  br i1 %119, label %120, label %125

120:                                              ; preds = %112
  %121 = load ptr, ptr %3, align 8, !tbaa !5
  %122 = load i32, ptr %7, align 4, !tbaa !9
  %123 = sext i32 %122 to i64
  %124 = getelementptr inbounds i32, ptr %121, i64 %123
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %6, ptr noundef nonnull align 4 dereferenceable(4) %124) #3
  br label %125

125:                                              ; preds = %120, %112
  br label %72, !llvm.loop !16

126:                                              ; preds = %72
  br label %127

127:                                              ; preds = %126, %49
  %128 = load i32, ptr %5, align 4, !tbaa !9
  %129 = add nsw i32 %128, 1
  store i32 %129, ptr %5, align 4, !tbaa !9
  br label %11, !llvm.loop !17

130:                                              ; preds = %11
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}
!15 = distinct !{!15, !12}
!16 = distinct !{!16, !12}
!17 = distinct !{!17, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z10cycle_sortPii(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #4
  %.not56 = icmp slt i32 %1, 2
  br i1 %.not56, label %._crit_edge60, label %.lr.ph59.preheader

.lr.ph59.preheader:                               ; preds = %2
  %4 = add nsw i32 %1, -1
  %wide.trip.count84 = zext nneg i32 %4 to i64
  %wide.trip.count = zext nneg i32 %1 to i64
  %wide.trip.count78 = zext nneg i32 %1 to i64
  br label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %.loopexit, %.lr.ph59.preheader
  %indvars.iv70 = phi i64 [ 0, %.lr.ph59.preheader ], [ %indvars.iv.next71, %.loopexit ]
  %indvars.iv = phi i64 [ 1, %.lr.ph59.preheader ], [ %indvars.iv.next, %.loopexit ]
  %5 = xor i64 %indvars.iv70, -1
  %6 = add nsw i64 %5, %wide.trip.count
  %7 = xor i64 %indvars.iv70, -1
  %8 = add nsw i64 %7, %wide.trip.count
  %9 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv70
  %10 = load i32, ptr %9, align 4, !tbaa !5
  store i32 %10, ptr %3, align 4, !tbaa !5
  %indvars.iv.next71 = add nuw nsw i64 %indvars.iv70, 1
  %11 = trunc nuw nsw i64 %indvars.iv70 to i32
  %min.iters.check93 = icmp ult i64 %6, 8
  br i1 %min.iters.check93, label %.lr.ph.preheader112, label %vector.ph94

.lr.ph.preheader112:                              ; preds = %middle.block91, %.lr.ph.preheader
  %indvars.iv64.ph = phi i64 [ %indvars.iv, %.lr.ph.preheader ], [ %ind.end97, %middle.block91 ]
  %.04048.ph = phi i32 [ %11, %.lr.ph.preheader ], [ %23, %middle.block91 ]
  br label %.lr.ph

vector.ph94:                                      ; preds = %.lr.ph.preheader
  %n.vec96 = and i64 %6, -8
  %ind.end97 = add i64 %indvars.iv, %n.vec96
  %12 = insertelement <4 x i32> <i32 poison, i32 0, i32 0, i32 0>, i32 %11, i64 0
  %broadcast.splatinsert106 = insertelement <4 x i32> poison, i32 %10, i64 0
  %broadcast.splat107 = shufflevector <4 x i32> %broadcast.splatinsert106, <4 x i32> poison, <4 x i32> zeroinitializer
  %13 = getelementptr i32, ptr %0, i64 %indvars.iv
  br label %vector.body99

vector.body99:                                    ; preds = %vector.body99, %vector.ph94
  %index100 = phi i64 [ 0, %vector.ph94 ], [ %index.next108, %vector.body99 ]
  %vec.phi101 = phi <4 x i32> [ %12, %vector.ph94 ], [ %20, %vector.body99 ]
  %vec.phi102 = phi <4 x i32> [ zeroinitializer, %vector.ph94 ], [ %21, %vector.body99 ]
  %14 = getelementptr i32, ptr %13, i64 %index100
  %15 = getelementptr inbounds i8, ptr %14, i64 16
  %wide.load104 = load <4 x i32>, ptr %14, align 4, !tbaa !5
  %wide.load105 = load <4 x i32>, ptr %15, align 4, !tbaa !5
  %16 = icmp slt <4 x i32> %wide.load104, %broadcast.splat107
  %17 = icmp slt <4 x i32> %wide.load105, %broadcast.splat107
  %18 = zext <4 x i1> %16 to <4 x i32>
  %19 = zext <4 x i1> %17 to <4 x i32>
  %20 = add <4 x i32> %vec.phi101, %18
  %21 = add <4 x i32> %vec.phi102, %19
  %index.next108 = add nuw i64 %index100, 8
  %22 = icmp eq i64 %index.next108, %n.vec96
  br i1 %22, label %middle.block91, label %vector.body99, !llvm.loop !9

middle.block91:                                   ; preds = %vector.body99
  %bin.rdx109 = add <4 x i32> %21, %20
  %23 = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %bin.rdx109)
  %cmp.n110 = icmp eq i64 %6, %n.vec96
  br i1 %cmp.n110, label %._crit_edge, label %.lr.ph.preheader112

._crit_edge:                                      ; preds = %.lr.ph, %middle.block91
  %spec.select.lcssa = phi i32 [ %23, %middle.block91 ], [ %spec.select, %.lr.ph ]
  %24 = zext i32 %spec.select.lcssa to i64
  %25 = icmp eq i64 %indvars.iv70, %24
  br i1 %25, label %.loopexit, label %.preheader46.preheader

.preheader46.preheader:                           ; preds = %._crit_edge
  %26 = sext i32 %spec.select.lcssa to i64
  br label %.preheader46

.lr.ph:                                           ; preds = %.lr.ph.preheader112, %.lr.ph
  %indvars.iv64 = phi i64 [ %indvars.iv.next65, %.lr.ph ], [ %indvars.iv64.ph, %.lr.ph.preheader112 ]
  %.04048 = phi i32 [ %spec.select, %.lr.ph ], [ %.04048.ph, %.lr.ph.preheader112 ]
  %27 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv64
  %28 = load i32, ptr %27, align 4, !tbaa !5
  %29 = icmp slt i32 %28, %10
  %30 = zext i1 %29 to i32
  %spec.select = add nuw nsw i32 %.04048, %30
  %indvars.iv.next65 = add nuw nsw i64 %indvars.iv64, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next65, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !13

.preheader46:                                     ; preds = %.preheader46.preheader, %.preheader46
  %indvars.iv67 = phi i64 [ %26, %.preheader46.preheader ], [ %indvars.iv.next68, %.preheader46 ]
  %31 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv67
  %32 = load i32, ptr %31, align 4, !tbaa !5
  %33 = icmp eq i32 %10, %32
  %indvars.iv.next68 = add nsw i64 %indvars.iv67, 1
  br i1 %33, label %.preheader46, label %34, !llvm.loop !14

34:                                               ; preds = %.preheader46
  %35 = and i64 %indvars.iv67, 4294967295
  %.not42 = icmp eq i64 %35, %indvars.iv70
  br i1 %.not42, label %.loopexit, label %.preheader45.us.preheader

.preheader45.us.preheader:                        ; preds = %34
  %36 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv67
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %3, ptr noundef nonnull align 4 dereferenceable(4) %36) #4
  %min.iters.check = icmp ult i64 %8, 8
  %n.vec = and i64 %8, -8
  %ind.end = add i64 %indvars.iv, %n.vec
  %37 = insertelement <4 x i32> <i32 poison, i32 0, i32 0, i32 0>, i32 %11, i64 0
  %38 = getelementptr i32, ptr %0, i64 %indvars.iv
  %cmp.n = icmp eq i64 %8, %n.vec
  br label %.preheader45.us

.preheader45.us:                                  ; preds = %.preheader45.us.preheader, %54
  %39 = load i32, ptr %3, align 4, !tbaa !5
  br i1 %min.iters.check, label %scalar.ph.preheader, label %vector.ph

scalar.ph.preheader:                              ; preds = %middle.block, %.preheader45.us
  %indvars.iv75.ph = phi i64 [ %indvars.iv, %.preheader45.us ], [ %ind.end, %middle.block ]
  %.451.us.ph = phi i32 [ %11, %.preheader45.us ], [ %49, %middle.block ]
  br label %scalar.ph

vector.ph:                                        ; preds = %.preheader45.us
  %broadcast.splatinsert = insertelement <4 x i32> poison, i32 %39, i64 0
  %broadcast.splat = shufflevector <4 x i32> %broadcast.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %vec.phi = phi <4 x i32> [ %37, %vector.ph ], [ %46, %vector.body ]
  %vec.phi89 = phi <4 x i32> [ zeroinitializer, %vector.ph ], [ %47, %vector.body ]
  %40 = getelementptr i32, ptr %38, i64 %index
  %41 = getelementptr inbounds i8, ptr %40, i64 16
  %wide.load = load <4 x i32>, ptr %40, align 4, !tbaa !5
  %wide.load90 = load <4 x i32>, ptr %41, align 4, !tbaa !5
  %42 = icmp slt <4 x i32> %wide.load, %broadcast.splat
  %43 = icmp slt <4 x i32> %wide.load90, %broadcast.splat
  %44 = zext <4 x i1> %42 to <4 x i32>
  %45 = zext <4 x i1> %43 to <4 x i32>
  %46 = add <4 x i32> %vec.phi, %44
  %47 = add <4 x i32> %vec.phi89, %45
  %index.next = add nuw i64 %index, 8
  %48 = icmp eq i64 %index.next, %n.vec
  br i1 %48, label %middle.block, label %vector.body, !llvm.loop !15

middle.block:                                     ; preds = %vector.body
  %bin.rdx = add <4 x i32> %47, %46
  %49 = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %bin.rdx)
  br i1 %cmp.n, label %..preheader_crit_edge.us, label %scalar.ph.preheader

50:                                               ; preds = %..preheader_crit_edge.us, %50
  %indvars.iv80 = phi i64 [ %61, %..preheader_crit_edge.us ], [ %indvars.iv.next81, %50 ]
  %51 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv80
  %52 = load i32, ptr %51, align 4, !tbaa !5
  %53 = icmp eq i32 %39, %52
  %indvars.iv.next81 = add nuw nsw i64 %indvars.iv80, 1
  br i1 %53, label %50, label %54, !llvm.loop !16

54:                                               ; preds = %50
  %55 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv80
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %3, ptr noundef nonnull align 4 dereferenceable(4) %55) #4
  %56 = and i64 %indvars.iv80, 4294967295
  %.not43.us = icmp eq i64 %56, %indvars.iv70
  br i1 %.not43.us, label %.loopexit, label %.preheader45.us, !llvm.loop !17

scalar.ph:                                        ; preds = %scalar.ph.preheader, %scalar.ph
  %indvars.iv75 = phi i64 [ %indvars.iv.next76, %scalar.ph ], [ %indvars.iv75.ph, %scalar.ph.preheader ]
  %.451.us = phi i32 [ %spec.select44.us, %scalar.ph ], [ %.451.us.ph, %scalar.ph.preheader ]
  %57 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv75
  %58 = load i32, ptr %57, align 4, !tbaa !5
  %59 = icmp slt i32 %58, %39
  %60 = zext i1 %59 to i32
  %spec.select44.us = add i32 %.451.us, %60
  %indvars.iv.next76 = add nuw nsw i64 %indvars.iv75, 1
  %exitcond79.not = icmp eq i64 %indvars.iv.next76, %wide.trip.count78
  br i1 %exitcond79.not, label %..preheader_crit_edge.us, label %scalar.ph, !llvm.loop !18

..preheader_crit_edge.us:                         ; preds = %scalar.ph, %middle.block
  %spec.select44.us.lcssa = phi i32 [ %49, %middle.block ], [ %spec.select44.us, %scalar.ph ]
  %61 = zext i32 %spec.select44.us.lcssa to i64
  br label %50

.loopexit:                                        ; preds = %54, %34, %._crit_edge
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond85.not = icmp eq i64 %indvars.iv.next71, %wide.trip.count84
  br i1 %exitcond85.not, label %._crit_edge60, label %.lr.ph.preheader, !llvm.loop !19

._crit_edge60:                                    ; preds = %.loopexit, %2
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #4
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.add.v4i32(<4 x i32>) #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10, !11, !12}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.isvectorized", i32 1}
!12 = !{!"llvm.loop.unroll.runtime.disable"}
!13 = distinct !{!13, !10, !12, !11}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10, !11, !12}
!16 = distinct !{!16, !10}
!17 = distinct !{!17, !10}
!18 = distinct !{!18, !10, !12, !11}
!19 = distinct !{!19, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass