; LLVM IR from intuitive-robots/mdt_policy :: pyhash-0.9.3/src/t1ha/src (t1ha0)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: cold nounwind optsize uwtable
define hidden i64 @t1ha_ia32cpu_features() #1 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #3
  store i32 0, ptr %1, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #3
  store i32 0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %8 = call i32 @__get_cpuid_max(i32 noundef 0, ptr noundef null)
  store i32 %8, ptr %7, align 4, !tbaa !5
  %9 = load i32, ptr %7, align 4, !tbaa !5
  %10 = icmp uge i32 %9, 1
  br i1 %10, label %11, label %26

11:                                               ; preds = %0
  %12 = call { i32, i32, i32, i32 } asm "  xchgq  %rbx,${1:q}\0A  cpuid\0A  xchgq  %rbx,${1:q}", "={ax},=r,={cx},={dx},0,2,~{dirflag},~{fpsr},~{flags}"(i32 1, i32 0) #4, !srcloc !9
  %13 = extractvalue { i32, i32, i32, i32 } %12, 0
  %14 = extractvalue { i32, i32, i32, i32 } %12, 1
  %15 = extractvalue { i32, i32, i32, i32 } %12, 2
  %16 = extractvalue { i32, i32, i32, i32 } %12, 3
  store i32 %13, ptr %3, align 4, !tbaa !5
  store i32 %14, ptr %4, align 4, !tbaa !5
  store i32 %15, ptr %1, align 4, !tbaa !5
  store i32 %16, ptr %6, align 4, !tbaa !5
  %17 = load i32, ptr %7, align 4, !tbaa !5
  %18 = icmp uge i32 %17, 7
  br i1 %18, label %19, label %25

19:                                               ; preds = %11
  %20 = call { i32, i32, i32, i32 } asm "  xchgq  %rbx,${1:q}\0A  cpuid\0A  xchgq  %rbx,${1:q}", "={ax},=r,={cx},={dx},0,2,~{dirflag},~{fpsr},~{flags}"(i32 7, i32 0) #4, !srcloc !10
  %21 = extractvalue { i32, i32, i32, i32 } %20, 0
  %22 = extractvalue { i32, i32, i32, i32 } %20, 1
  %23 = extractvalue { i32, i32, i32, i32 } %20, 2
  %24 = extractvalue { i32, i32, i32, i32 } %20, 3
  store i32 %21, ptr %3, align 4, !tbaa !5
  store i32 %22, ptr %2, align 4, !tbaa !5
  store i32 %23, ptr %5, align 4, !tbaa !5
  store i32 %24, ptr %6, align 4, !tbaa !5
  br label %25

25:                                               ; preds = %19, %11
  br label %26

26:                                               ; preds = %25, %0
  %27 = load i32, ptr %1, align 4, !tbaa !5
  %28 = zext i32 %27 to i64
  %29 = load i32, ptr %2, align 4, !tbaa !5
  %30 = zext i32 %29 to i64
  %31 = shl i64 %30, 32
  %32 = or i64 %28, %31
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #3
  ret i64 %32
}

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @__get_cpuid_max(i32 noundef, ptr noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { cold nounwind optsize uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { nounwind memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{i64 2151636035, i64 2151636071, i64 2151636095}
!10 = !{i64 2151636249, i64 2151636285, i64 2151636309}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: cold nounwind optsize uwtable
define hidden i64 @t1ha_ia32cpu_features() local_unnamed_addr #0 {
  %1 = tail call i32 @__get_cpuid_max(i32 noundef 0, ptr noundef null)
  %.not = icmp eq i32 %1, 0
  br i1 %.not, label %11, label %2

2:                                                ; preds = %0
  %3 = tail call { i32, i32, i32, i32 } asm "  xchgq  %rbx,${1:q}\0A  cpuid\0A  xchgq  %rbx,${1:q}", "={ax},=r,={cx},={dx},0,2,~{dirflag},~{fpsr},~{flags}"(i32 1, i32 0) #2, !srcloc !5
  %4 = extractvalue { i32, i32, i32, i32 } %3, 2
  %5 = icmp ugt i32 %1, 6
  br i1 %5, label %6, label %11

6:                                                ; preds = %2
  %7 = tail call { i32, i32, i32, i32 } asm "  xchgq  %rbx,${1:q}\0A  cpuid\0A  xchgq  %rbx,${1:q}", "={ax},=r,={cx},={dx},0,2,~{dirflag},~{fpsr},~{flags}"(i32 7, i32 0) #2, !srcloc !6
  %8 = extractvalue { i32, i32, i32, i32 } %7, 1
  %9 = zext i32 %8 to i64
  %10 = shl nuw i64 %9, 32
  br label %11

11:                                               ; preds = %2, %6, %0
  %.04 = phi i64 [ %10, %6 ], [ 0, %2 ], [ 0, %0 ]
  %.0 = phi i32 [ %4, %6 ], [ %4, %2 ], [ 0, %0 ]
  %12 = zext i32 %.0 to i64
  %13 = or disjoint i64 %.04, %12
  ret i64 %13
}

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @__get_cpuid_max(i32 noundef, ptr noundef) local_unnamed_addr #1

attributes #0 = { cold nounwind optsize uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{i64 2151636035, i64 2151636071, i64 2151636095}
!6 = !{i64 2151636249, i64 2151636285, i64 2151636309}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass