; LLVM IR from Shah-Shishir/Codeforces-Solutions :: 266B. Queue at the School (main)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [9 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [4 x i8], align 1

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #0 {
  %1 = alloca i32, align 4
  %2 = alloca [55 x i8], align 16
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  call void @llvm.lifetime.start.p0(i64 55, ptr %2) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  br label %7

7:                                                ; preds = %64, %0
  %8 = getelementptr inbounds [55 x i8], ptr %2, i64 0, i64 0
  %9 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef %3, ptr noundef %4, ptr noundef %8)
  %10 = icmp ne i32 %9, -1
  br i1 %10, label %11, label %67

11:                                               ; preds = %7
  store i32 1, ptr %5, align 4, !tbaa !5
  br label %12

12:                                               ; preds = %61, %11
  %13 = load i32, ptr %5, align 4, !tbaa !5
  %14 = load i32, ptr %4, align 4, !tbaa !5
  %15 = icmp sle i32 %13, %14
  br i1 %15, label %16, label %64

16:                                               ; preds = %12
  store i32 0, ptr %6, align 4, !tbaa !5
  br label %17

17:                                               ; preds = %57, %16
  %18 = load i32, ptr %6, align 4, !tbaa !5
  %19 = load i32, ptr %3, align 4, !tbaa !5
  %20 = sub nsw i32 %19, 1
  %21 = icmp slt i32 %18, %20
  br i1 %21, label %22, label %60

22:                                               ; preds = %17
  %23 = load i32, ptr %6, align 4, !tbaa !5
  %24 = sext i32 %23 to i64
  %25 = getelementptr inbounds [55 x i8], ptr %2, i64 0, i64 %24
  %26 = load i8, ptr %25, align 1, !tbaa !9
  %27 = sext i8 %26 to i32
  %28 = icmp eq i32 %27, 66
  br i1 %28, label %29, label %56

29:                                               ; preds = %22
  %30 = load i32, ptr %6, align 4, !tbaa !5
  %31 = add nsw i32 %30, 1
  %32 = sext i32 %31 to i64
  %33 = getelementptr inbounds [55 x i8], ptr %2, i64 0, i64 %32
  %34 = load i8, ptr %33, align 1, !tbaa !9
  %35 = sext i8 %34 to i32
  %36 = icmp eq i32 %35, 71
  br i1 %36, label %37, label %56

37:                                               ; preds = %29
  %38 = load i32, ptr %6, align 4, !tbaa !5
  %39 = sext i32 %38 to i64
  %40 = getelementptr inbounds [55 x i8], ptr %2, i64 0, i64 %39
  %41 = load i32, ptr %6, align 4, !tbaa !5
  %42 = add nsw i32 %41, 1
  %43 = sext i32 %42 to i64
  %44 = getelementptr inbounds [55 x i8], ptr %2, i64 0, i64 %43
  call void @_ZSt4swapIcENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 1 dereferenceable(1) %40, ptr noundef nonnull align 1 dereferenceable(1) %44) #4
  %45 = load i32, ptr %6, align 4, !tbaa !5
  %46 = add nsw i32 %45, 2
  %47 = sext i32 %46 to i64
  %48 = getelementptr inbounds [55 x i8], ptr %2, i64 0, i64 %47
  %49 = load i8, ptr %48, align 1, !tbaa !9
  %50 = sext i8 %49 to i32
  %51 = icmp eq i32 %50, 71
  br i1 %51, label %52, label %55

52:                                               ; preds = %37
  %53 = load i32, ptr %6, align 4, !tbaa !5
  %54 = add nsw i32 %53, 2
  store i32 %54, ptr %6, align 4, !tbaa !5
  br label %55

55:                                               ; preds = %52, %37
  br label %56

56:                                               ; preds = %55, %29, %22
  br label %57

57:                                               ; preds = %56
  %58 = load i32, ptr %6, align 4, !tbaa !5
  %59 = add nsw i32 %58, 1
  store i32 %59, ptr %6, align 4, !tbaa !5
  br label %17, !llvm.loop !10

60:                                               ; preds = %17
  br label %61

61:                                               ; preds = %60
  %62 = load i32, ptr %5, align 4, !tbaa !5
  %63 = add nsw i32 %62, 1
  store i32 %63, ptr %5, align 4, !tbaa !5
  br label %12, !llvm.loop !12

64:                                               ; preds = %12
  %65 = getelementptr inbounds [55 x i8], ptr %2, i64 0, i64 0
  %66 = call i32 (ptr, ...) @printf(ptr noundef @.str.1, ptr noundef %65)
  br label %7, !llvm.loop !13

67:                                               ; preds = %7
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  call void @llvm.lifetime.end.p0(i64 55, ptr %2) #4
  ret i32 0
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @__isoc99_scanf(ptr noundef, ...) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIcENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 1 dereferenceable(1), ptr noundef nonnull align 1 dereferenceable(1)) #3

declare i32 @printf(ptr noundef, ...) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11}
!13 = distinct !{!13, !11}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [9 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [4 x i8], align 1

; Function Attrs: mustprogress norecurse nounwind uwtable
define dso_local noundef i32 @main() local_unnamed_addr #0 {
  %1 = alloca [55 x i8], align 16
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 55, ptr nonnull %1) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #4
  %4 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull %2, ptr noundef nonnull %3, ptr noundef nonnull %1)
  %.not17 = icmp eq i32 %4, -1
  br i1 %.not17, label %._crit_edge18, label %.preheader12

.preheader12:                                     ; preds = %0, %._crit_edge16
  %5 = load i32, ptr %3, align 4, !tbaa !5
  %.not1114 = icmp sgt i32 %5, 0
  %6 = load i32, ptr %2, align 4
  %7 = icmp sgt i32 %6, 1
  %or.cond = select i1 %.not1114, i1 %7, i1 false
  br i1 %or.cond, label %.preheader, label %._crit_edge16

.preheader:                                       ; preds = %.preheader12, %._crit_edge
  %8 = phi i32 [ %34, %._crit_edge ], [ %5, %.preheader12 ]
  %9 = phi i32 [ %35, %._crit_edge ], [ %6, %.preheader12 ]
  %10 = phi i32 [ %36, %._crit_edge ], [ %6, %.preheader12 ]
  %.01015 = phi i32 [ %37, %._crit_edge ], [ 1, %.preheader12 ]
  %11 = icmp sgt i32 %10, 1
  br i1 %11, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %.preheader, %29
  %12 = phi i32 [ %30, %29 ], [ %9, %.preheader ]
  %.013 = phi i32 [ %31, %29 ], [ 0, %.preheader ]
  %13 = sext i32 %.013 to i64
  %14 = getelementptr inbounds [55 x i8], ptr %1, i64 0, i64 %13
  %15 = load i8, ptr %14, align 1, !tbaa !9
  %16 = icmp eq i8 %15, 66
  br i1 %16, label %17, label %29

17:                                               ; preds = %.lr.ph
  %18 = add nsw i32 %.013, 1
  %19 = sext i32 %18 to i64
  %20 = getelementptr inbounds [55 x i8], ptr %1, i64 0, i64 %19
  %21 = load i8, ptr %20, align 1, !tbaa !9
  %22 = icmp eq i8 %21, 71
  br i1 %22, label %23, label %29

23:                                               ; preds = %17
  call void @_ZSt4swapIcENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 1 dereferenceable(1) %14, ptr noundef nonnull align 1 dereferenceable(1) %20) #4
  %24 = add nsw i32 %.013, 2
  %25 = sext i32 %24 to i64
  %26 = getelementptr inbounds [55 x i8], ptr %1, i64 0, i64 %25
  %27 = load i8, ptr %26, align 1, !tbaa !9
  %28 = icmp eq i8 %27, 71
  %spec.select = select i1 %28, i32 %24, i32 %.013
  %.pre = load i32, ptr %2, align 4, !tbaa !5
  br label %29

29:                                               ; preds = %23, %.lr.ph, %17
  %30 = phi i32 [ %12, %17 ], [ %12, %.lr.ph ], [ %.pre, %23 ]
  %.1 = phi i32 [ %.013, %17 ], [ %.013, %.lr.ph ], [ %spec.select, %23 ]
  %31 = add nsw i32 %.1, 1
  %32 = add nsw i32 %30, -1
  %33 = icmp slt i32 %31, %32
  br i1 %33, label %.lr.ph, label %._crit_edge.loopexit, !llvm.loop !10

._crit_edge.loopexit:                             ; preds = %29
  %.pre20 = load i32, ptr %3, align 4, !tbaa !5
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %.preheader
  %34 = phi i32 [ %.pre20, %._crit_edge.loopexit ], [ %8, %.preheader ]
  %35 = phi i32 [ %30, %._crit_edge.loopexit ], [ %9, %.preheader ]
  %36 = phi i32 [ %30, %._crit_edge.loopexit ], [ %10, %.preheader ]
  %37 = add nuw nsw i32 %.01015, 1
  %.not11.not = icmp slt i32 %.01015, %34
  br i1 %.not11.not, label %.preheader, label %._crit_edge16, !llvm.loop !12

._crit_edge16:                                    ; preds = %._crit_edge, %.preheader12
  %38 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1, ptr noundef nonnull %1)
  %39 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull %2, ptr noundef nonnull %3, ptr noundef nonnull %1)
  %.not = icmp eq i32 %39, -1
  br i1 %.not, label %._crit_edge18, label %.preheader12, !llvm.loop !14

._crit_edge18:                                    ; preds = %._crit_edge16, %0
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #4
  call void @llvm.lifetime.end.p0(i64 55, ptr nonnull %1) #4
  ret i32 0
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nofree nounwind
declare noundef i32 @__isoc99_scanf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIcENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 1 dereferenceable(1), ptr noundef nonnull align 1 dereferenceable(1)) local_unnamed_addr #3

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11, !13}
!13 = !{!"llvm.loop.unswitch.partial.disable"}
!14 = distinct !{!14, !11}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimpleLoopUnswitchPass,SimplifyCFGPass