; LLVM IR from xuxping/codelife :: leetcode (233_number_of_digit_one)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i32 @count_k_times(i32 noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  %7 = load i32, ptr %3, align 4, !tbaa !5
  %8 = icmp slt i32 %7, 1
  br i1 %8, label %12, label %9

9:                                                ; preds = %1
  %10 = load i32, ptr %3, align 4, !tbaa !5
  %11 = icmp sgt i32 %10, 2147483647
  br i1 %11, label %12, label %13

12:                                               ; preds = %9, %1
  store i32 0, ptr %2, align 4
  br label %40

13:                                               ; preds = %9
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  store i32 0, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 0, ptr %5, align 4, !tbaa !5
  br label %14

14:                                               ; preds = %35, %13
  %15 = load i32, ptr %5, align 4, !tbaa !5
  %16 = load i32, ptr %3, align 4, !tbaa !5
  %17 = icmp sle i32 %15, %16
  br i1 %17, label %19, label %18

18:                                               ; preds = %14
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  br label %38

19:                                               ; preds = %14
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  %20 = load i32, ptr %5, align 4, !tbaa !5
  store i32 %20, ptr %6, align 4, !tbaa !5
  br label %21

21:                                               ; preds = %31, %19
  %22 = load i32, ptr %6, align 4, !tbaa !5
  %23 = icmp sgt i32 %22, 0
  br i1 %23, label %24, label %34

24:                                               ; preds = %21
  %25 = load i32, ptr %6, align 4, !tbaa !5
  %26 = srem i32 %25, 10
  %27 = icmp eq i32 %26, 1
  br i1 %27, label %28, label %31

28:                                               ; preds = %24
  %29 = load i32, ptr %4, align 4, !tbaa !5
  %30 = add nsw i32 %29, 1
  store i32 %30, ptr %4, align 4, !tbaa !5
  br label %31

31:                                               ; preds = %28, %24
  %32 = load i32, ptr %6, align 4, !tbaa !5
  %33 = sdiv i32 %32, 10
  store i32 %33, ptr %6, align 4, !tbaa !5
  br label %21, !llvm.loop !9

34:                                               ; preds = %21
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  br label %35

35:                                               ; preds = %34
  %36 = load i32, ptr %5, align 4, !tbaa !5
  %37 = add nsw i32 %36, 1
  store i32 %37, ptr %5, align 4, !tbaa !5
  br label %14, !llvm.loop !11

38:                                               ; preds = %18
  %39 = load i32, ptr %4, align 4, !tbaa !5
  store i32 %39, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  br label %40

40:                                               ; preds = %38, %12
  %41 = load i32, ptr %2, align 4
  ret i32 %41
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nosync nounwind memory(none) uwtable
define dso_local i32 @count_k_times(i32 noundef %0) local_unnamed_addr #0 {
  %2 = icmp slt i32 %0, 1
  br i1 %2, label %.loopexit, label %.preheader

.preheader:                                       ; preds = %1, %._crit_edge
  %.01323 = phi i32 [ %7, %._crit_edge ], [ 0, %1 ]
  %.01422 = phi i32 [ %.1.lcssa, %._crit_edge ], [ 0, %1 ]
  %.not1719 = icmp eq i32 %.01323, 0
  br i1 %.not1719, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %.preheader, %.lr.ph
  %.021 = phi i32 [ %6, %.lr.ph ], [ %.01323, %.preheader ]
  %.120 = phi i32 [ %spec.select, %.lr.ph ], [ %.01422, %.preheader ]
  %3 = urem i32 %.021, 10
  %4 = icmp eq i32 %3, 1
  %5 = zext i1 %4 to i32
  %spec.select = add nsw i32 %.120, %5
  %6 = udiv i32 %.021, 10
  %.not17 = icmp ult i32 %.021, 10
  br i1 %.not17, label %._crit_edge, label %.lr.ph, !llvm.loop !5

._crit_edge:                                      ; preds = %.lr.ph, %.preheader
  %.1.lcssa = phi i32 [ %.01422, %.preheader ], [ %spec.select, %.lr.ph ]
  %7 = add nuw i32 %.01323, 1
  %exitcond.not = icmp eq i32 %.01323, %0
  br i1 %exitcond.not, label %.loopexit, label %.preheader, !llvm.loop !7

.loopexit:                                        ; preds = %._crit_edge, %1
  %.015 = phi i32 [ 0, %1 ], [ %.1.lcssa, %._crit_edge ]
  ret i32 %.015
}

attributes #0 = { nofree norecurse nosync nounwind memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass