; LLVM IR from VastoLorde95/Competitive-Programming :: Hackerrank/Codesprints 2016/Codesprint July/Problem H/H.ll (Z6updateiixiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.node = type { i64 }

@tree = external dso_local global [524288 x %struct.node], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4node7combineERS_S0_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z3updix(i32 noundef, i64 noundef) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z5shiftiii(i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z6updateiixiii(i32 noundef %0, i32 noundef %1, i64 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) #1 {
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i64, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  store i32 %0, ptr %7, align 4, !tbaa !5
  store i32 %1, ptr %8, align 4, !tbaa !5
  store i64 %2, ptr %9, align 8, !tbaa !9
  store i32 %3, ptr %10, align 4, !tbaa !5
  store i32 %4, ptr %11, align 4, !tbaa !5
  store i32 %5, ptr %12, align 4, !tbaa !5
  %16 = load i32, ptr %7, align 4, !tbaa !5
  %17 = load i32, ptr %8, align 4, !tbaa !5
  %18 = icmp sge i32 %16, %17
  br i1 %18, label %19, label %20

19:                                               ; preds = %6
  br label %73

20:                                               ; preds = %6
  %21 = load i32, ptr %7, align 4, !tbaa !5
  %22 = load i32, ptr %12, align 4, !tbaa !5
  %23 = icmp sge i32 %21, %22
  br i1 %23, label %28, label %24

24:                                               ; preds = %20
  %25 = load i32, ptr %11, align 4, !tbaa !5
  %26 = load i32, ptr %8, align 4, !tbaa !5
  %27 = icmp sge i32 %25, %26
  br i1 %27, label %28, label %29

28:                                               ; preds = %24, %20
  br label %73

29:                                               ; preds = %24
  %30 = load i32, ptr %7, align 4, !tbaa !5
  %31 = load i32, ptr %11, align 4, !tbaa !5
  %32 = icmp sle i32 %30, %31
  br i1 %32, label %33, label %40

33:                                               ; preds = %29
  %34 = load i32, ptr %12, align 4, !tbaa !5
  %35 = load i32, ptr %8, align 4, !tbaa !5
  %36 = icmp sle i32 %34, %35
  br i1 %36, label %37, label %40

37:                                               ; preds = %33
  %38 = load i32, ptr %10, align 4, !tbaa !5
  %39 = load i64, ptr %9, align 8, !tbaa !9
  call void @_Z3updix(i32 noundef %38, i64 noundef %39)
  br label %73

40:                                               ; preds = %33, %29
  %41 = load i32, ptr %10, align 4, !tbaa !5
  %42 = load i32, ptr %11, align 4, !tbaa !5
  %43 = load i32, ptr %12, align 4, !tbaa !5
  call void @_Z5shiftiii(i32 noundef %41, i32 noundef %42, i32 noundef %43)
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #2
  %44 = load i32, ptr %10, align 4, !tbaa !5
  %45 = shl i32 %44, 1
  store i32 %45, ptr %13, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #2
  %46 = load i32, ptr %13, align 4, !tbaa !5
  %47 = add nsw i32 %46, 1
  store i32 %47, ptr %14, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #2
  %48 = load i32, ptr %11, align 4, !tbaa !5
  %49 = load i32, ptr %12, align 4, !tbaa !5
  %50 = add nsw i32 %48, %49
  %51 = ashr i32 %50, 1
  store i32 %51, ptr %15, align 4, !tbaa !5
  %52 = load i32, ptr %7, align 4, !tbaa !5
  %53 = load i32, ptr %8, align 4, !tbaa !5
  %54 = load i64, ptr %9, align 8, !tbaa !9
  %55 = load i32, ptr %13, align 4, !tbaa !5
  %56 = load i32, ptr %11, align 4, !tbaa !5
  %57 = load i32, ptr %15, align 4, !tbaa !5
  call void @_Z6updateiixiii(i32 noundef %52, i32 noundef %53, i64 noundef %54, i32 noundef %55, i32 noundef %56, i32 noundef %57)
  %58 = load i32, ptr %7, align 4, !tbaa !5
  %59 = load i32, ptr %8, align 4, !tbaa !5
  %60 = load i64, ptr %9, align 8, !tbaa !9
  %61 = load i32, ptr %14, align 4, !tbaa !5
  %62 = load i32, ptr %15, align 4, !tbaa !5
  %63 = load i32, ptr %12, align 4, !tbaa !5
  call void @_Z6updateiixiii(i32 noundef %58, i32 noundef %59, i64 noundef %60, i32 noundef %61, i32 noundef %62, i32 noundef %63)
  %64 = load i32, ptr %10, align 4, !tbaa !5
  %65 = sext i32 %64 to i64
  %66 = getelementptr inbounds [524288 x %struct.node], ptr @tree, i64 0, i64 %65
  %67 = load i32, ptr %13, align 4, !tbaa !5
  %68 = sext i32 %67 to i64
  %69 = getelementptr inbounds [524288 x %struct.node], ptr @tree, i64 0, i64 %68
  %70 = load i32, ptr %14, align 4, !tbaa !5
  %71 = sext i32 %70 to i64
  %72 = getelementptr inbounds [524288 x %struct.node], ptr @tree, i64 0, i64 %71
  call void @_ZN4node7combineERS_S0_(ptr noundef nonnull align 8 dereferenceable(8) %66, ptr noundef nonnull align 8 dereferenceable(8) %69, ptr noundef nonnull align 8 dereferenceable(8) %72)
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #2
  br label %73

73:                                               ; preds = %40, %37, %28, %19
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.node = type { i64 }

@tree = external dso_local global [524288 x %struct.node], align 16

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4node7combineERS_S0_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z3updix(i32 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z5shiftiii(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z6updateiixiii(i32 noundef %0, i32 noundef %1, i64 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) local_unnamed_addr #0 {
  %.not = icmp slt i32 %0, %1
  %.not37 = icmp slt i32 %0, %5
  %or.cond = and i1 %.not, %.not37
  %.not38 = icmp slt i32 %4, %1
  %or.cond41 = and i1 %.not38, %or.cond
  br i1 %or.cond41, label %7, label %common.ret43

7:                                                ; preds = %6
  %.not39 = icmp sgt i32 %0, %4
  %.not40 = icmp sgt i32 %5, %1
  %or.cond42 = or i1 %.not39, %.not40
  br i1 %or.cond42, label %9, label %8

8:                                                ; preds = %7
  tail call void @_Z3updix(i32 noundef %3, i64 noundef %2)
  br label %common.ret43

common.ret43:                                     ; preds = %6, %8, %9
  ret void

9:                                                ; preds = %7
  tail call void @_Z5shiftiii(i32 noundef %3, i32 noundef %4, i32 noundef %5)
  %10 = shl i32 %3, 1
  %11 = or disjoint i32 %10, 1
  %12 = add nsw i32 %5, %4
  %13 = ashr i32 %12, 1
  tail call void @_Z6updateiixiii(i32 noundef %0, i32 noundef %1, i64 noundef %2, i32 noundef %10, i32 noundef %4, i32 noundef %13)
  tail call void @_Z6updateiixiii(i32 noundef %0, i32 noundef %1, i64 noundef %2, i32 noundef %11, i32 noundef %13, i32 noundef %5)
  %14 = sext i32 %3 to i64
  %15 = getelementptr inbounds [524288 x %struct.node], ptr @tree, i64 0, i64 %14
  %16 = sext i32 %10 to i64
  %17 = getelementptr inbounds [524288 x %struct.node], ptr @tree, i64 0, i64 %16
  %18 = sext i32 %11 to i64
  %19 = getelementptr inbounds [524288 x %struct.node], ptr @tree, i64 0, i64 %18
  tail call void @_ZN4node7combineERS_S0_(ptr noundef nonnull align 8 dereferenceable(8) %15, ptr noundef nonnull align 8 dereferenceable(8) %17, ptr noundef nonnull align 8 dereferenceable(8) %19)
  br label %common.ret43
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass