; LLVM IR from Columbitech/rohc :: src/cprofile.ll (ZN4ROHC8CProfileC2EPNS_10CompressorEtPKNS_5iphdrE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.ROHC::CProfile" = type { ptr, ptr, i16, i64, i32, i32, i32, i32, i64, i64, i32, i32, i16, %"class.ROHC::WLSB", i32, i32, i8, i32, i32, i32, %"struct.ROHC::iphdr", i16, i16, %"class.ROHC::WLSB", [11 x i64] }
%"struct.ROHC::iphdr" = type { i8, i8, i16, i16, i16, i8, i8, i16, i32, i32 }
%"class.ROHC::WLSB" = type { %"class.std::vector", i64, i64, i64, i32, i32 }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<ROHC::WLSB<int>::LSB, std::allocator<ROHC::WLSB<int>::LSB>>::_Vector_impl" }
%"struct.std::_Vector_base<ROHC::WLSB<int>::LSB, std::allocator<ROHC::WLSB<int>::LSB>>::_Vector_impl" = type { %"struct.std::_Vector_base<ROHC::WLSB<int>::LSB, std::allocator<ROHC::WLSB<int>::LSB>>::_Vector_impl_data" }
%"struct.std::_Vector_base<ROHC::WLSB<int>::LSB, std::allocator<ROHC::WLSB<int>::LSB>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@_ZTVN4ROHC8CProfileE = external dso_local unnamed_addr constant { [10 x ptr] }, align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4ROHC8CProfileC2EPNS_10CompressorEtPKNS_5iphdrE(ptr noundef nonnull align 8 dereferenceable(328) %0, ptr noundef %1, i16 noundef zeroext %2, ptr noundef %3) unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i16, align 2
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i16 %2, ptr %7, align 2, !tbaa !9
  store ptr %3, ptr %8, align 8, !tbaa !5
  %11 = load ptr, ptr %5, align 8
  store ptr getelementptr inbounds inrange(-16, 64) ({ [10 x ptr] }, ptr @_ZTVN4ROHC8CProfileE, i32 0, i32 0, i32 2), ptr %11, align 8, !tbaa !11
  %12 = getelementptr inbounds %"class.ROHC::CProfile", ptr %11, i32 0, i32 1
  %13 = load ptr, ptr %6, align 8, !tbaa !5
  store ptr %13, ptr %12, align 8, !tbaa !13
  %14 = getelementptr inbounds %"class.ROHC::CProfile", ptr %11, i32 0, i32 2
  %15 = load i16, ptr %7, align 2, !tbaa !9
  store i16 %15, ptr %14, align 8, !tbaa !27
  %16 = getelementptr inbounds %"class.ROHC::CProfile", ptr %11, i32 0, i32 3
  store i64 0, ptr %16, align 8, !tbaa !28
  %17 = getelementptr inbounds %"class.ROHC::CProfile", ptr %11, i32 0, i32 4
  store i32 0, ptr %17, align 8, !tbaa !29
  %18 = getelementptr inbounds %"class.ROHC::CProfile", ptr %11, i32 0, i32 5
  store i32 0, ptr %18, align 4, !tbaa !30
  %19 = getelementptr inbounds %"class.ROHC::CProfile", ptr %11, i32 0, i32 6
  store i32 0, ptr %19, align 8, !tbaa !31
  %20 = getelementptr inbounds %"class.ROHC::CProfile", ptr %11, i32 0, i32 7
  store i32 0, ptr %20, align 4, !tbaa !32
  %21 = getelementptr inbounds %"class.ROHC::CProfile", ptr %11, i32 0, i32 8
  store i64 0, ptr %21, align 8, !tbaa !33
  %22 = getelementptr inbounds %"class.ROHC::CProfile", ptr %11, i32 0, i32 9
  store i64 0, ptr %22, align 8, !tbaa !34
  %23 = getelementptr inbounds %"class.ROHC::CProfile", ptr %11, i32 0, i32 10
  store i32 0, ptr %23, align 8, !tbaa !35
  %24 = getelementptr inbounds %"class.ROHC::CProfile", ptr %11, i32 0, i32 11
  store i32 0, ptr %24, align 4, !tbaa !36
  %25 = getelementptr inbounds %"class.ROHC::CProfile", ptr %11, i32 0, i32 12
  %26 = call i32 @rand() #7
  %27 = trunc i32 %26 to i16
  store i16 %27, ptr %25, align 8, !tbaa !37
  %28 = getelementptr inbounds %"class.ROHC::CProfile", ptr %11, i32 0, i32 13
  call void @_ZN4ROHC4WLSBIiEC2Emji(ptr noundef nonnull align 8 dereferenceable(56) %28, i64 noundef 16, i32 noundef 16, i32 noundef 1)
  %29 = getelementptr inbounds %"class.ROHC::CProfile", ptr %11, i32 0, i32 14
  %30 = getelementptr inbounds %"class.ROHC::CProfile", ptr %11, i32 0, i32 1
  %31 = load ptr, ptr %30, align 8, !tbaa !13
  %32 = invoke noundef i32 @_ZNK4ROHC10Compressor12ReorderRatioEv(ptr noundef nonnull align 8 dereferenceable(368) %31)
          to label %33 unwind label %69

33:                                               ; preds = %4
  store i32 %32, ptr %29, align 8, !tbaa !38
  %34 = getelementptr inbounds %"class.ROHC::CProfile", ptr %11, i32 0, i32 15
  %35 = getelementptr inbounds %"class.ROHC::CProfile", ptr %11, i32 0, i32 1
  %36 = load ptr, ptr %35, align 8, !tbaa !13
  %37 = invoke noundef i32 @_ZNK4ROHC10Compressor13IPIdBehaviourEv(ptr noundef nonnull align 8 dereferenceable(368) %36)
          to label %38 unwind label %69

38:                                               ; preds = %33
  store i32 %37, ptr %34, align 4, !tbaa !39
  %39 = getelementptr inbounds %"class.ROHC::CProfile", ptr %11, i32 0, i32 16
  %40 = getelementptr inbounds %"class.ROHC::CProfile", ptr %11, i32 0, i32 1
  %41 = load ptr, ptr %40, align 8, !tbaa !13
  %42 = invoke noundef zeroext i1 @_ZNK4ROHC10Compressor8LargeCIDEv(ptr noundef nonnull align 8 dereferenceable(368) %41)
          to label %43 unwind label %69

43:                                               ; preds = %38
  %44 = zext i1 %42 to i8
  store i8 %44, ptr %39, align 8, !tbaa !40
  %45 = getelementptr inbounds %"class.ROHC::CProfile", ptr %11, i32 0, i32 17
  store i32 0, ptr %45, align 4, !tbaa !41
  %46 = getelementptr inbounds %"class.ROHC::CProfile", ptr %11, i32 0, i32 18
  %47 = load ptr, ptr %8, align 8, !tbaa !5
  %48 = getelementptr inbounds %"struct.ROHC::iphdr", ptr %47, i32 0, i32 8
  %49 = load i32, ptr %48, align 4, !tbaa !42
  store i32 %49, ptr %46, align 8, !tbaa !43
  %50 = getelementptr inbounds %"class.ROHC::CProfile", ptr %11, i32 0, i32 19
  %51 = load ptr, ptr %8, align 8, !tbaa !5
  %52 = getelementptr inbounds %"struct.ROHC::iphdr", ptr %51, i32 0, i32 9
  %53 = load i32, ptr %52, align 4, !tbaa !44
  store i32 %53, ptr %50, align 4, !tbaa !45
  %54 = getelementptr inbounds %"class.ROHC::CProfile", ptr %11, i32 0, i32 20
  %55 = getelementptr inbounds %"class.ROHC::CProfile", ptr %11, i32 0, i32 22
  store i16 0, ptr %55, align 2, !tbaa !46
  %56 = getelementptr inbounds %"class.ROHC::CProfile", ptr %11, i32 0, i32 23
  invoke void @_ZN4ROHC4WLSBIiEC2Emji(ptr noundef nonnull align 8 dereferenceable(56) %56, i64 noundef 8, i32 noundef 16, i32 noundef 0)
          to label %57 unwind label %69

57:                                               ; preds = %43
  %58 = getelementptr inbounds %"class.ROHC::CProfile", ptr %11, i32 0, i32 13
  %59 = getelementptr inbounds %"class.ROHC::CProfile", ptr %11, i32 0, i32 14
  %60 = load i32, ptr %59, align 8, !tbaa !38
  %61 = invoke noundef i32 @_ZN4ROHC23LSBWindowPForReorderingENS_12Reordering_tEm(i32 noundef %60, i64 noundef 16)
          to label %62 unwind label %73

62:                                               ; preds = %57
  invoke void @_ZN4ROHC4WLSBIiE4setPEi(ptr noundef nonnull align 8 dereferenceable(56) %58, i32 noundef %61)
          to label %63 unwind label %73

63:                                               ; preds = %62
  %64 = load ptr, ptr %8, align 8, !tbaa !5
  %65 = icmp ne ptr %64, null
  br i1 %65, label %66, label %77

66:                                               ; preds = %63
  %67 = getelementptr inbounds %"class.ROHC::CProfile", ptr %11, i32 0, i32 20
  %68 = load ptr, ptr %8, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %67, ptr align 4 %68, i64 20, i1 false)
  br label %77

69:                                               ; preds = %43, %38, %33, %4
  %70 = landingpad { ptr, i32 }
          cleanup
  %71 = extractvalue { ptr, i32 } %70, 0
  store ptr %71, ptr %9, align 8
  %72 = extractvalue { ptr, i32 } %70, 1
  store i32 %72, ptr %10, align 4
  br label %80

73:                                               ; preds = %62, %57
  %74 = landingpad { ptr, i32 }
          cleanup
  %75 = extractvalue { ptr, i32 } %74, 0
  store ptr %75, ptr %9, align 8
  %76 = extractvalue { ptr, i32 } %74, 1
  store i32 %76, ptr %10, align 4
  call void @_ZN4ROHC4WLSBIiED2Ev(ptr noundef nonnull align 8 dereferenceable(56) %56) #7
  br label %80

77:                                               ; preds = %66, %63
  %78 = getelementptr inbounds %"class.ROHC::CProfile", ptr %11, i32 0, i32 24
  %79 = getelementptr inbounds [11 x i64], ptr %78, i64 0, i64 0
  call void @llvm.memset.p0.i64(ptr align 8 %79, i8 0, i64 88, i1 false)
  ret void

80:                                               ; preds = %73, %69
  call void @_ZN4ROHC4WLSBIiED2Ev(ptr noundef nonnull align 8 dereferenceable(56) %28) #7
  br label %81

81:                                               ; preds = %80
  %82 = load ptr, ptr %9, align 8
  %83 = load i32, ptr %10, align 4
  %84 = insertvalue { ptr, i32 } poison, ptr %82, 0
  %85 = insertvalue { ptr, i32 } %84, i32 %83, 1
  resume { ptr, i32 } %85
}

; Function Attrs: nounwind
declare i32 @rand() #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4ROHC4WLSBIiEC2Emji(ptr noundef nonnull align 8 dereferenceable(56), i64 noundef, i32 noundef, i32 noundef) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4ROHC10Compressor12ReorderRatioEv(ptr noundef nonnull align 8 dereferenceable(368)) #2 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4ROHC10Compressor13IPIdBehaviourEv(ptr noundef nonnull align 8 dereferenceable(368)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK4ROHC10Compressor8LargeCIDEv(ptr noundef nonnull align 8 dereferenceable(368)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4ROHC4WLSBIiE4setPEi(ptr noundef nonnull align 8 dereferenceable(56), i32 noundef) #2 align 2

declare noundef i32 @_ZN4ROHC23LSBWindowPForReorderingENS_12Reordering_tEm(i32 noundef, i64 noundef) #3

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #4

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #5

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4ROHC4WLSBIiED2Ev(ptr noundef nonnull align 8 dereferenceable(56)) unnamed_addr #6 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #5 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #6 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"vtable pointer", !8, i64 0}
!13 = !{!14, !6, i64 8}
!14 = !{!"_ZTSN4ROHC8CProfileE", !6, i64 8, !10, i64 16, !15, i64 24, !16, i64 32, !16, i64 36, !16, i64 40, !16, i64 44, !15, i64 48, !15, i64 56, !16, i64 64, !16, i64 68, !10, i64 72, !17, i64 80, !22, i64 136, !23, i64 140, !24, i64 144, !25, i64 148, !16, i64 152, !16, i64 156, !26, i64 160, !10, i64 180, !10, i64 182, !17, i64 184, !7, i64 240}
!15 = !{!"long", !7, i64 0}
!16 = !{!"int", !7, i64 0}
!17 = !{!"_ZTSN4ROHC4WLSBIiEE", !18, i64 0, !15, i64 24, !15, i64 32, !15, i64 40, !16, i64 48, !16, i64 52}
!18 = !{!"_ZTSSt6vectorIN4ROHC4WLSBIiE3LSBESaIS3_EE", !19, i64 0}
!19 = !{!"_ZTSSt12_Vector_baseIN4ROHC4WLSBIiE3LSBESaIS3_EE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIN4ROHC4WLSBIiE3LSBESaIS3_EE12_Vector_implE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIN4ROHC4WLSBIiE3LSBESaIS3_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!22 = !{!"_ZTSN4ROHC12Reordering_tE", !7, i64 0}
!23 = !{!"_ZTSN4ROHC15IPIDBehaviour_tE", !7, i64 0}
!24 = !{!"bool", !7, i64 0}
!25 = !{!"_ZTSN4ROHC8CProfileUt_E", !7, i64 0}
!26 = !{!"_ZTSN4ROHC5iphdrE", !7, i64 0, !7, i64 0, !7, i64 1, !10, i64 2, !10, i64 4, !10, i64 6, !7, i64 8, !7, i64 9, !10, i64 10, !16, i64 12, !16, i64 16}
!27 = !{!14, !10, i64 16}
!28 = !{!14, !15, i64 24}
!29 = !{!14, !16, i64 32}
!30 = !{!14, !16, i64 36}
!31 = !{!14, !16, i64 40}
!32 = !{!14, !16, i64 44}
!33 = !{!14, !15, i64 48}
!34 = !{!14, !15, i64 56}
!35 = !{!14, !16, i64 64}
!36 = !{!14, !16, i64 68}
!37 = !{!14, !10, i64 72}
!38 = !{!14, !22, i64 136}
!39 = !{!14, !23, i64 140}
!40 = !{!14, !24, i64 144}
!41 = !{!14, !25, i64 148}
!42 = !{!26, !16, i64 12}
!43 = !{!14, !16, i64 152}
!44 = !{!26, !16, i64 16}
!45 = !{!14, !16, i64 156}
!46 = !{!14, !10, i64 182}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZTVN4ROHC8CProfileE = external dso_local unnamed_addr constant { [10 x ptr] }, align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4ROHC8CProfileC2EPNS_10CompressorEtPKNS_5iphdrE(ptr noundef nonnull align 8 dereferenceable(328) %0, ptr noundef %1, i16 noundef zeroext %2, ptr nocapture noundef readonly %3) unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  store ptr getelementptr inbounds inrange(-16, 64) (i8, ptr @_ZTVN4ROHC8CProfileE, i64 16), ptr %0, align 8, !tbaa !5
  %5 = getelementptr inbounds i8, ptr %0, i64 8
  store ptr %1, ptr %5, align 8, !tbaa !8
  %6 = getelementptr inbounds i8, ptr %0, i64 16
  store i16 %2, ptr %6, align 8, !tbaa !25
  %7 = getelementptr inbounds i8, ptr %0, i64 24
  %8 = getelementptr inbounds i8, ptr %0, i64 72
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(48) %7, i8 0, i64 48, i1 false)
  %9 = tail call i32 @rand() #7
  %10 = trunc i32 %9 to i16
  store i16 %10, ptr %8, align 8, !tbaa !26
  %11 = getelementptr inbounds i8, ptr %0, i64 80
  tail call void @_ZN4ROHC4WLSBIiEC2Emji(ptr noundef nonnull align 8 dereferenceable(56) %11, i64 noundef 16, i32 noundef 16, i32 noundef 1)
  %12 = getelementptr inbounds i8, ptr %0, i64 136
  %13 = load ptr, ptr %5, align 8, !tbaa !8
  %14 = tail call noundef i32 @_ZNK4ROHC10Compressor12ReorderRatioEv(ptr noundef nonnull align 8 dereferenceable(368) %13)
  store i32 %14, ptr %12, align 8, !tbaa !27
  %15 = getelementptr inbounds i8, ptr %0, i64 140
  %16 = load ptr, ptr %5, align 8, !tbaa !8
  %17 = tail call noundef i32 @_ZNK4ROHC10Compressor13IPIdBehaviourEv(ptr noundef nonnull align 8 dereferenceable(368) %16)
  store i32 %17, ptr %15, align 4, !tbaa !28
  %18 = getelementptr inbounds i8, ptr %0, i64 144
  %19 = load ptr, ptr %5, align 8, !tbaa !8
  %20 = tail call noundef zeroext i1 @_ZNK4ROHC10Compressor8LargeCIDEv(ptr noundef nonnull align 8 dereferenceable(368) %19)
  %21 = zext i1 %20 to i8
  store i8 %21, ptr %18, align 8, !tbaa !29
  %22 = getelementptr inbounds i8, ptr %0, i64 148
  store i32 0, ptr %22, align 4, !tbaa !30
  %23 = getelementptr inbounds i8, ptr %0, i64 152
  %24 = getelementptr inbounds i8, ptr %3, i64 12
  %25 = load <2 x i32>, ptr %24, align 4, !tbaa !31
  store <2 x i32> %25, ptr %23, align 8, !tbaa !31
  %26 = getelementptr inbounds i8, ptr %0, i64 182
  store i16 0, ptr %26, align 2, !tbaa !32
  %27 = getelementptr inbounds i8, ptr %0, i64 184
  invoke void @_ZN4ROHC4WLSBIiEC2Emji(ptr noundef nonnull align 8 dereferenceable(56) %27, i64 noundef 8, i32 noundef 16, i32 noundef 0)
          to label %28 unwind label %31

28:                                               ; preds = %4
  %29 = load i32, ptr %12, align 8, !tbaa !27
  %30 = invoke noundef i32 @_ZN4ROHC23LSBWindowPForReorderingENS_12Reordering_tEm(i32 noundef %29, i64 noundef 16)
          to label %35 unwind label %33

31:                                               ; preds = %4
  %32 = landingpad { ptr, i32 }
          cleanup
  br label %38

33:                                               ; preds = %28
  %34 = landingpad { ptr, i32 }
          cleanup
  tail call void @_ZN4ROHC4WLSBIiED2Ev(ptr noundef nonnull align 8 dereferenceable(56) %27) #7
  br label %38

35:                                               ; preds = %28
  tail call void @_ZN4ROHC4WLSBIiE4setPEi(ptr noundef nonnull align 8 dereferenceable(56) %11, i32 noundef %30)
  %36 = getelementptr inbounds i8, ptr %0, i64 160
  tail call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(20) %36, ptr noundef nonnull align 4 dereferenceable(20) %3, i64 20, i1 false)
  %37 = getelementptr inbounds i8, ptr %0, i64 240
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(88) %37, i8 0, i64 88, i1 false)
  ret void

38:                                               ; preds = %33, %31
  %.pn = phi { ptr, i32 } [ %34, %33 ], [ %32, %31 ]
  tail call void @_ZN4ROHC4WLSBIiED2Ev(ptr noundef nonnull align 8 dereferenceable(56) %11) #7
  resume { ptr, i32 } %.pn
}

; Function Attrs: nounwind
declare i32 @rand() local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4ROHC4WLSBIiEC2Emji(ptr noundef nonnull align 8 dereferenceable(56), i64 noundef, i32 noundef, i32 noundef) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4ROHC10Compressor12ReorderRatioEv(ptr noundef nonnull align 8 dereferenceable(368)) local_unnamed_addr #2 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4ROHC10Compressor13IPIdBehaviourEv(ptr noundef nonnull align 8 dereferenceable(368)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK4ROHC10Compressor8LargeCIDEv(ptr noundef nonnull align 8 dereferenceable(368)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4ROHC4WLSBIiE4setPEi(ptr noundef nonnull align 8 dereferenceable(56), i32 noundef) local_unnamed_addr #2 align 2

declare noundef i32 @_ZN4ROHC23LSBWindowPForReorderingENS_12Reordering_tEm(i32 noundef, i64 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #4

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #5

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4ROHC4WLSBIiED2Ev(ptr noundef nonnull align 8 dereferenceable(56)) unnamed_addr #6 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #5 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #6 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"vtable pointer", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !10, i64 8}
!9 = !{!"_ZTSN4ROHC8CProfileE", !10, i64 8, !12, i64 16, !13, i64 24, !14, i64 32, !14, i64 36, !14, i64 40, !14, i64 44, !13, i64 48, !13, i64 56, !14, i64 64, !14, i64 68, !12, i64 72, !15, i64 80, !20, i64 136, !21, i64 140, !22, i64 144, !23, i64 148, !14, i64 152, !14, i64 156, !24, i64 160, !12, i64 180, !12, i64 182, !15, i64 184, !11, i64 240}
!10 = !{!"any pointer", !11, i64 0}
!11 = !{!"omnipotent char", !7, i64 0}
!12 = !{!"short", !11, i64 0}
!13 = !{!"long", !11, i64 0}
!14 = !{!"int", !11, i64 0}
!15 = !{!"_ZTSN4ROHC4WLSBIiEE", !16, i64 0, !13, i64 24, !13, i64 32, !13, i64 40, !14, i64 48, !14, i64 52}
!16 = !{!"_ZTSSt6vectorIN4ROHC4WLSBIiE3LSBESaIS3_EE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIN4ROHC4WLSBIiE3LSBESaIS3_EE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIN4ROHC4WLSBIiE3LSBESaIS3_EE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIN4ROHC4WLSBIiE3LSBESaIS3_EE17_Vector_impl_dataE", !10, i64 0, !10, i64 8, !10, i64 16}
!20 = !{!"_ZTSN4ROHC12Reordering_tE", !11, i64 0}
!21 = !{!"_ZTSN4ROHC15IPIDBehaviour_tE", !11, i64 0}
!22 = !{!"bool", !11, i64 0}
!23 = !{!"_ZTSN4ROHC8CProfileUt_E", !11, i64 0}
!24 = !{!"_ZTSN4ROHC5iphdrE", !11, i64 0, !11, i64 0, !11, i64 1, !12, i64 2, !12, i64 4, !12, i64 6, !11, i64 8, !11, i64 9, !12, i64 10, !14, i64 12, !14, i64 16}
!25 = !{!9, !12, i64 16}
!26 = !{!9, !12, i64 72}
!27 = !{!9, !20, i64 136}
!28 = !{!9, !21, i64 140}
!29 = !{!9, !22, i64 144}
!30 = !{!9, !23, i64 148}
!31 = !{!14, !14, i64 0}
!32 = !{!9, !12, i64 182}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,MemCpyOptPass,PostOrderFunctionAttrsPass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass