; LLVM IR from xuxping/codelife :: algorthms/array (merge)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local void @display(ptr noundef, i32 noundef) #1

; Function Attrs: nounwind allocsize(0)
declare noalias ptr @malloc(i64 noundef) #2

; Function Attrs: nounwind uwtable
define dso_local void @mergeArr1(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3) #1 {
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store ptr %2, ptr %7, align 8, !tbaa !5
  store i32 %3, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  %14 = load i32, ptr %6, align 4, !tbaa !9
  %15 = load i32, ptr %8, align 4, !tbaa !9
  %16 = add nsw i32 %14, %15
  store i32 %16, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #4
  %17 = load i32, ptr %9, align 4, !tbaa !9
  %18 = sext i32 %17 to i64
  %19 = mul i64 4, %18
  %20 = call noalias ptr @malloc(i64 noundef %19) #5
  store ptr %20, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  store i32 0, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  store i32 0, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  store i32 0, ptr %13, align 4, !tbaa !9
  br label %21

21:                                               ; preds = %67, %4
  %22 = load i32, ptr %12, align 4, !tbaa !9
  %23 = load i32, ptr %6, align 4, !tbaa !9
  %24 = icmp slt i32 %22, %23
  br i1 %24, label %25, label %29

25:                                               ; preds = %21
  %26 = load i32, ptr %13, align 4, !tbaa !9
  %27 = load i32, ptr %8, align 4, !tbaa !9
  %28 = icmp slt i32 %26, %27
  br label %29

29:                                               ; preds = %25, %21
  %30 = phi i1 [ false, %21 ], [ %28, %25 ]
  br i1 %30, label %31, label %68

31:                                               ; preds = %29
  %32 = load ptr, ptr %5, align 8, !tbaa !5
  %33 = load i32, ptr %12, align 4, !tbaa !9
  %34 = sext i32 %33 to i64
  %35 = getelementptr inbounds i32, ptr %32, i64 %34
  %36 = load i32, ptr %35, align 4, !tbaa !9
  %37 = load ptr, ptr %7, align 8, !tbaa !5
  %38 = load i32, ptr %13, align 4, !tbaa !9
  %39 = sext i32 %38 to i64
  %40 = getelementptr inbounds i32, ptr %37, i64 %39
  %41 = load i32, ptr %40, align 4, !tbaa !9
  %42 = icmp slt i32 %36, %41
  br i1 %42, label %43, label %55

43:                                               ; preds = %31
  %44 = load ptr, ptr %5, align 8, !tbaa !5
  %45 = load i32, ptr %12, align 4, !tbaa !9
  %46 = add nsw i32 %45, 1
  store i32 %46, ptr %12, align 4, !tbaa !9
  %47 = sext i32 %45 to i64
  %48 = getelementptr inbounds i32, ptr %44, i64 %47
  %49 = load i32, ptr %48, align 4, !tbaa !9
  %50 = load ptr, ptr %10, align 8, !tbaa !5
  %51 = load i32, ptr %11, align 4, !tbaa !9
  %52 = add nsw i32 %51, 1
  store i32 %52, ptr %11, align 4, !tbaa !9
  %53 = sext i32 %51 to i64
  %54 = getelementptr inbounds i32, ptr %50, i64 %53
  store i32 %49, ptr %54, align 4, !tbaa !9
  br label %67

55:                                               ; preds = %31
  %56 = load ptr, ptr %7, align 8, !tbaa !5
  %57 = load i32, ptr %13, align 4, !tbaa !9
  %58 = add nsw i32 %57, 1
  store i32 %58, ptr %13, align 4, !tbaa !9
  %59 = sext i32 %57 to i64
  %60 = getelementptr inbounds i32, ptr %56, i64 %59
  %61 = load i32, ptr %60, align 4, !tbaa !9
  %62 = load ptr, ptr %10, align 8, !tbaa !5
  %63 = load i32, ptr %11, align 4, !tbaa !9
  %64 = add nsw i32 %63, 1
  store i32 %64, ptr %11, align 4, !tbaa !9
  %65 = sext i32 %63 to i64
  %66 = getelementptr inbounds i32, ptr %62, i64 %65
  store i32 %61, ptr %66, align 4, !tbaa !9
  br label %67

67:                                               ; preds = %55, %43
  br label %21, !llvm.loop !11

68:                                               ; preds = %29
  br label %69

69:                                               ; preds = %73, %68
  %70 = load i32, ptr %12, align 4, !tbaa !9
  %71 = load i32, ptr %6, align 4, !tbaa !9
  %72 = icmp slt i32 %70, %71
  br i1 %72, label %73, label %85

73:                                               ; preds = %69
  %74 = load ptr, ptr %5, align 8, !tbaa !5
  %75 = load i32, ptr %12, align 4, !tbaa !9
  %76 = add nsw i32 %75, 1
  store i32 %76, ptr %12, align 4, !tbaa !9
  %77 = sext i32 %75 to i64
  %78 = getelementptr inbounds i32, ptr %74, i64 %77
  %79 = load i32, ptr %78, align 4, !tbaa !9
  %80 = load ptr, ptr %10, align 8, !tbaa !5
  %81 = load i32, ptr %11, align 4, !tbaa !9
  %82 = add nsw i32 %81, 1
  store i32 %82, ptr %11, align 4, !tbaa !9
  %83 = sext i32 %81 to i64
  %84 = getelementptr inbounds i32, ptr %80, i64 %83
  store i32 %79, ptr %84, align 4, !tbaa !9
  br label %69, !llvm.loop !13

85:                                               ; preds = %69
  br label %86

86:                                               ; preds = %90, %85
  %87 = load i32, ptr %13, align 4, !tbaa !9
  %88 = load i32, ptr %8, align 4, !tbaa !9
  %89 = icmp slt i32 %87, %88
  br i1 %89, label %90, label %102

90:                                               ; preds = %86
  %91 = load ptr, ptr %7, align 8, !tbaa !5
  %92 = load i32, ptr %13, align 4, !tbaa !9
  %93 = add nsw i32 %92, 1
  store i32 %93, ptr %13, align 4, !tbaa !9
  %94 = sext i32 %92 to i64
  %95 = getelementptr inbounds i32, ptr %91, i64 %94
  %96 = load i32, ptr %95, align 4, !tbaa !9
  %97 = load ptr, ptr %10, align 8, !tbaa !5
  %98 = load i32, ptr %11, align 4, !tbaa !9
  %99 = add nsw i32 %98, 1
  store i32 %99, ptr %11, align 4, !tbaa !9
  %100 = sext i32 %98 to i64
  %101 = getelementptr inbounds i32, ptr %97, i64 %100
  store i32 %96, ptr %101, align 4, !tbaa !9
  br label %86, !llvm.loop !14

102:                                              ; preds = %86
  %103 = load ptr, ptr %10, align 8, !tbaa !5
  %104 = load i32, ptr %9, align 4, !tbaa !9
  call void @display(ptr noundef %103, i32 noundef %104)
  %105 = load ptr, ptr %10, align 8, !tbaa !5
  call void @free(ptr noundef %105) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  ret void
}

; Function Attrs: nounwind
declare void @free(ptr noundef) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { nounwind allocsize(0) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local void @display(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nofree nounwind willreturn allockind("alloc,uninitialized") allocsize(0) memory(inaccessiblemem: readwrite)
declare noalias noundef ptr @malloc(i64 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local void @mergeArr1(ptr nocapture noundef readonly %0, i32 noundef %1, ptr nocapture noundef readonly %2, i32 noundef %3) local_unnamed_addr #0 {
  %5 = add nsw i32 %3, %1
  %6 = sext i32 %5 to i64
  %7 = shl nsw i64 %6, 2
  %8 = tail call noalias ptr @malloc(i64 noundef %7) #5
  %9 = icmp sgt i32 %1, 0
  %10 = icmp sgt i32 %3, 0
  %11 = and i1 %9, %10
  br i1 %11, label %.lr.ph, label %.preheader41

.preheader41.loopexit:                            ; preds = %.lr.ph
  %12 = trunc nuw i64 %indvars.iv.next to i32
  br label %.preheader41

.preheader41:                                     ; preds = %.preheader41.loopexit, %4
  %.036.lcssa = phi i32 [ 0, %4 ], [ %12, %.preheader41.loopexit ]
  %.033.lcssa = phi i32 [ 0, %4 ], [ %.134, %.preheader41.loopexit ]
  %.0.lcssa = phi i32 [ 0, %4 ], [ %.1, %.preheader41.loopexit ]
  %13 = icmp slt i32 %.033.lcssa, %1
  br i1 %13, label %.lr.ph49.preheader, label %.preheader

.lr.ph49.preheader:                               ; preds = %.preheader41
  %14 = zext i32 %.036.lcssa to i64
  %15 = shl nuw nsw i64 %14, 2
  %scevgep = getelementptr i8, ptr %8, i64 %15
  %16 = sext i32 %.033.lcssa to i64
  %17 = shl nsw i64 %16, 2
  %scevgep55 = getelementptr i8, ptr %0, i64 %17
  %18 = xor i32 %.033.lcssa, -1
  %19 = add i32 %18, %1
  %20 = zext i32 %19 to i64
  %21 = shl nuw nsw i64 %20, 2
  %22 = add nuw nsw i64 %21, 4
  tail call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(1) %scevgep, ptr noundef nonnull align 4 dereferenceable(1) %scevgep55, i64 %22, i1 false), !tbaa !5
  %wide.trip.count = sext i32 %1 to i64
  %23 = sub nsw i64 %wide.trip.count, %16
  %min.iters.check = icmp ult i64 %23, 4
  br i1 %min.iters.check, label %.lr.ph49.preheader73, label %vector.ph

.lr.ph49.preheader73:                             ; preds = %middle.block, %.lr.ph49.preheader
  %indvars.iv58.ph = phi i64 [ %14, %.lr.ph49.preheader ], [ %28, %middle.block ]
  %indvars.iv56.ph = phi i64 [ %16, %.lr.ph49.preheader ], [ %ind.end, %middle.block ]
  br label %.lr.ph49

vector.ph:                                        ; preds = %.lr.ph49.preheader
  %n.vec = and i64 %23, -4
  %ind.end = add nsw i64 %n.vec, %16
  %24 = insertelement <2 x i64> <i64 poison, i64 0>, i64 %14, i64 0
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %vec.phi = phi <2 x i64> [ %24, %vector.ph ], [ %25, %vector.body ]
  %vec.phi72 = phi <2 x i64> [ zeroinitializer, %vector.ph ], [ %26, %vector.body ]
  %25 = add <2 x i64> %vec.phi, <i64 1, i64 1>
  %26 = add <2 x i64> %vec.phi72, <i64 1, i64 1>
  %index.next = add nuw i64 %index, 4
  %27 = icmp eq i64 %index.next, %n.vec
  br i1 %27, label %middle.block, label %vector.body, !llvm.loop !9

middle.block:                                     ; preds = %vector.body
  %bin.rdx = add <2 x i64> %26, %25
  %28 = tail call i64 @llvm.vector.reduce.add.v2i64(<2 x i64> %bin.rdx)
  %cmp.n = icmp eq i64 %23, %n.vec
  br i1 %cmp.n, label %.preheader.loopexit, label %.lr.ph49.preheader73

.lr.ph:                                           ; preds = %4, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %4 ]
  %.044 = phi i32 [ %.1, %.lr.ph ], [ 0, %4 ]
  %.03343 = phi i32 [ %.134, %.lr.ph ], [ 0, %4 ]
  %29 = zext nneg i32 %.03343 to i64
  %30 = getelementptr inbounds i32, ptr %0, i64 %29
  %31 = load i32, ptr %30, align 4, !tbaa !5
  %32 = zext nneg i32 %.044 to i64
  %33 = getelementptr inbounds i32, ptr %2, i64 %32
  %34 = load i32, ptr %33, align 4, !tbaa !5
  %35 = icmp slt i32 %31, %34
  %.sink = tail call i32 @llvm.smin.i32(i32 %31, i32 %34)
  %36 = zext i1 %35 to i32
  %.134 = add nuw nsw i32 %.03343, %36
  %not. = xor i1 %35, true
  %37 = zext i1 %not. to i32
  %.1 = add nuw nsw i32 %.044, %37
  %38 = getelementptr inbounds i32, ptr %8, i64 %indvars.iv
  store i32 %.sink, ptr %38, align 4
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %39 = icmp slt i32 %.134, %1
  %40 = icmp slt i32 %.1, %3
  %41 = select i1 %39, i1 %40, i1 false
  br i1 %41, label %.lr.ph, label %.preheader41.loopexit, !llvm.loop !13

.preheader.loopexit:                              ; preds = %.lr.ph49, %middle.block
  %indvars.iv.next59.lcssa = phi i64 [ %28, %middle.block ], [ %indvars.iv.next59, %.lr.ph49 ]
  %42 = trunc nuw i64 %indvars.iv.next59.lcssa to i32
  br label %.preheader

.preheader:                                       ; preds = %.preheader.loopexit, %.preheader41
  %.238.lcssa = phi i32 [ %.036.lcssa, %.preheader41 ], [ %42, %.preheader.loopexit ]
  %43 = icmp slt i32 %.0.lcssa, %3
  br i1 %43, label %.lr.ph53.preheader, label %._crit_edge

.lr.ph53.preheader:                               ; preds = %.preheader
  %44 = zext i32 %.238.lcssa to i64
  %45 = shl nuw nsw i64 %44, 2
  %scevgep63 = getelementptr i8, ptr %8, i64 %45
  %46 = sext i32 %.0.lcssa to i64
  %47 = shl nsw i64 %46, 2
  %scevgep64 = getelementptr i8, ptr %2, i64 %47
  %48 = xor i32 %.0.lcssa, -1
  %49 = add i32 %48, %3
  %50 = zext i32 %49 to i64
  %51 = shl nuw nsw i64 %50, 2
  %52 = add nuw nsw i64 %51, 4
  tail call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(1) %scevgep63, ptr noundef nonnull align 4 dereferenceable(1) %scevgep64, i64 %52, i1 false), !tbaa !5
  br label %._crit_edge

.lr.ph49:                                         ; preds = %.lr.ph49.preheader73, %.lr.ph49
  %indvars.iv58 = phi i64 [ %indvars.iv.next59, %.lr.ph49 ], [ %indvars.iv58.ph, %.lr.ph49.preheader73 ]
  %indvars.iv56 = phi i64 [ %indvars.iv.next57, %.lr.ph49 ], [ %indvars.iv56.ph, %.lr.ph49.preheader73 ]
  %indvars.iv.next57 = add nsw i64 %indvars.iv56, 1
  %indvars.iv.next59 = add nuw nsw i64 %indvars.iv58, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next57, %wide.trip.count
  br i1 %exitcond.not, label %.preheader.loopexit, label %.lr.ph49, !llvm.loop !14

._crit_edge:                                      ; preds = %.lr.ph53.preheader, %.preheader
  tail call void @display(ptr noundef %8, i32 noundef %5)
  tail call void @free(ptr noundef %8) #6
  ret void
}

; Function Attrs: mustprogress nounwind willreturn allockind("free") memory(argmem: readwrite, inaccessiblemem: readwrite)
declare void @free(ptr allocptr nocapture noundef) local_unnamed_addr #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #4

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.vector.reduce.add.v2i64(<2 x i64>) #4

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nofree nounwind willreturn allockind("alloc,uninitialized") allocsize(0) memory(inaccessiblemem: readwrite) "alloc-family"="malloc" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind willreturn allockind("free") memory(argmem: readwrite, inaccessiblemem: readwrite) "alloc-family"="malloc" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nounwind allocsize(0) }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10, !11, !12}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.isvectorized", i32 1}
!12 = !{!"llvm.loop.unroll.runtime.disable"}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10, !12, !11}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LoopIdiomRecognizePass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,MergedLoadStoreMotionPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass