; LLVM IR from Eslam-Rizk/Elite-DriveGuard :: Application/Middlewares/Third_Party/FreeRTOS/Source (stream_buffer)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.StreamBufferDef_t = type { i64, i64, i64, i64, ptr, ptr, ptr, i8, i64 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @vPortRaiseBASEPRI() #1

; Function Attrs: nounwind uwtable
declare hidden void @prvInitialiseNewStreamBuffer(ptr noundef, ptr noundef, i64 noundef, i64 noundef, i8 noundef zeroext) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local ptr @xStreamBufferGenericCreateStatic(i64 noundef %0, i64 noundef %1, i64 noundef %2, ptr noundef %3, ptr noundef %4) #2 {
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca i8, align 1
  %14 = alloca i64, align 8
  store i64 %0, ptr %6, align 8, !tbaa !5
  store i64 %1, ptr %7, align 8, !tbaa !5
  store i64 %2, ptr %8, align 8, !tbaa !5
  store ptr %3, ptr %9, align 8, !tbaa !9
  store ptr %4, ptr %10, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  %15 = load ptr, ptr %10, align 8, !tbaa !9
  store ptr %15, ptr %11, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %13) #3
  %16 = load ptr, ptr %9, align 8, !tbaa !9
  %17 = icmp eq ptr %16, null
  br i1 %17, label %18, label %20

18:                                               ; preds = %5
  call void @vPortRaiseBASEPRI()
  br label %19

19:                                               ; preds = %19, %18
  br label %19

20:                                               ; preds = %5
  %21 = load ptr, ptr %10, align 8, !tbaa !9
  %22 = icmp eq ptr %21, null
  br i1 %22, label %23, label %25

23:                                               ; preds = %20
  call void @vPortRaiseBASEPRI()
  br label %24

24:                                               ; preds = %24, %23
  br label %24

25:                                               ; preds = %20
  %26 = load i64, ptr %7, align 8, !tbaa !5
  %27 = load i64, ptr %6, align 8, !tbaa !5
  %28 = icmp ule i64 %26, %27
  %29 = zext i1 %28 to i32
  %30 = icmp eq i32 %29, 0
  br i1 %30, label %31, label %33

31:                                               ; preds = %25
  call void @vPortRaiseBASEPRI()
  br label %32

32:                                               ; preds = %32, %31
  br label %32

33:                                               ; preds = %25
  %34 = load i64, ptr %7, align 8, !tbaa !5
  %35 = icmp eq i64 %34, 0
  br i1 %35, label %36, label %37

36:                                               ; preds = %33
  store i64 1, ptr %7, align 8, !tbaa !5
  br label %37

37:                                               ; preds = %36, %33
  %38 = load i64, ptr %8, align 8, !tbaa !5
  %39 = icmp ne i64 %38, 0
  br i1 %39, label %40, label %41

40:                                               ; preds = %37
  store i8 3, ptr %13, align 1, !tbaa !11
  br label %42

41:                                               ; preds = %37
  store i8 2, ptr %13, align 1, !tbaa !11
  br label %42

42:                                               ; preds = %41, %40
  %43 = load i64, ptr %6, align 8, !tbaa !5
  %44 = icmp ugt i64 %43, 8
  %45 = zext i1 %44 to i32
  %46 = icmp eq i32 %45, 0
  br i1 %46, label %47, label %49

47:                                               ; preds = %42
  call void @vPortRaiseBASEPRI()
  br label %48

48:                                               ; preds = %48, %47
  br label %48

49:                                               ; preds = %42
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #3
  store volatile i64 72, ptr %14, align 8, !tbaa !5
  %50 = load volatile i64, ptr %14, align 8, !tbaa !5
  %51 = icmp eq i64 %50, 72
  %52 = zext i1 %51 to i32
  %53 = icmp eq i32 %52, 0
  br i1 %53, label %54, label %56

54:                                               ; preds = %49
  call void @vPortRaiseBASEPRI()
  br label %55

55:                                               ; preds = %55, %54
  br label %55

56:                                               ; preds = %49
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #3
  %57 = load ptr, ptr %9, align 8, !tbaa !9
  %58 = icmp ne ptr %57, null
  br i1 %58, label %59, label %75

59:                                               ; preds = %56
  %60 = load ptr, ptr %10, align 8, !tbaa !9
  %61 = icmp ne ptr %60, null
  br i1 %61, label %62, label %75

62:                                               ; preds = %59
  %63 = load ptr, ptr %11, align 8, !tbaa !9
  %64 = load ptr, ptr %9, align 8, !tbaa !9
  %65 = load i64, ptr %6, align 8, !tbaa !5
  %66 = load i64, ptr %7, align 8, !tbaa !5
  %67 = load i8, ptr %13, align 1, !tbaa !11
  call void @prvInitialiseNewStreamBuffer(ptr noundef %63, ptr noundef %64, i64 noundef %65, i64 noundef %66, i8 noundef zeroext %67)
  %68 = load ptr, ptr %11, align 8, !tbaa !9
  %69 = getelementptr inbounds %struct.StreamBufferDef_t, ptr %68, i32 0, i32 7
  %70 = load i8, ptr %69, align 8, !tbaa !12
  %71 = zext i8 %70 to i32
  %72 = or i32 %71, 2
  %73 = trunc i32 %72 to i8
  store i8 %73, ptr %69, align 8, !tbaa !12
  %74 = load ptr, ptr %10, align 8, !tbaa !9
  store ptr %74, ptr %12, align 8, !tbaa !9
  br label %76

75:                                               ; preds = %59, %56
  store ptr null, ptr %12, align 8, !tbaa !9
  br label %76

76:                                               ; preds = %75, %62
  %77 = load ptr, ptr %12, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 1, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  ret ptr %77
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !7, i64 56}
!13 = !{!"StreamBufferDef_t", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !7, i64 56, !6, i64 64}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @vPortRaiseBASEPRI() local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare hidden void @prvInitialiseNewStreamBuffer(ptr noundef, ptr noundef, i64 noundef, i64 noundef, i8 noundef zeroext) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local noundef ptr @xStreamBufferGenericCreateStatic(i64 noundef %0, i64 noundef %1, i64 noundef %2, ptr noundef %3, ptr noundef returned %4) local_unnamed_addr #2 {
  %6 = alloca i64, align 8
  %7 = icmp eq ptr %3, null
  br i1 %7, label %8, label %10

8:                                                ; preds = %5
  tail call void @vPortRaiseBASEPRI()
  br label %9

9:                                                ; preds = %9, %8
  br label %9

10:                                               ; preds = %5
  %11 = icmp eq ptr %4, null
  br i1 %11, label %12, label %14

12:                                               ; preds = %10
  tail call void @vPortRaiseBASEPRI()
  br label %13

13:                                               ; preds = %13, %12
  br label %13

14:                                               ; preds = %10
  %.not = icmp ugt i64 %1, %0
  br i1 %.not, label %15, label %17

15:                                               ; preds = %14
  tail call void @vPortRaiseBASEPRI()
  br label %16

16:                                               ; preds = %16, %15
  br label %16

17:                                               ; preds = %14
  %18 = icmp ult i64 %0, 9
  br i1 %18, label %19, label %21

19:                                               ; preds = %17
  tail call void @vPortRaiseBASEPRI()
  br label %20

20:                                               ; preds = %20, %19
  br label %20

21:                                               ; preds = %17
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6)
  store volatile i64 72, ptr %6, align 8, !tbaa !5
  %.0..0..0..0. = load volatile i64, ptr %6, align 8, !tbaa !5
  %.not23 = icmp eq i64 %.0..0..0..0., 72
  br i1 %.not23, label %24, label %22

22:                                               ; preds = %21
  tail call void @vPortRaiseBASEPRI()
  br label %23

23:                                               ; preds = %23, %22
  br label %23

24:                                               ; preds = %21
  %.not22 = icmp eq i64 %2, 0
  %. = select i1 %.not22, i8 2, i8 3
  %spec.store.select = tail call i64 @llvm.umax.i64(i64 %1, i64 1)
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6)
  tail call void @prvInitialiseNewStreamBuffer(ptr noundef nonnull %4, ptr noundef nonnull %3, i64 noundef %0, i64 noundef %spec.store.select, i8 noundef zeroext %.)
  %25 = getelementptr inbounds i8, ptr %4, i64 56
  %26 = load i8, ptr %25, align 8, !tbaa !9
  %27 = or i8 %26, 2
  store i8 %27, ptr %25, align 8, !tbaa !9
  ret ptr %4
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umax.i64(i64, i64) #3

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !7, i64 56}
!10 = !{!"StreamBufferDef_t", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !11, i64 32, !11, i64 40, !11, i64 48, !7, i64 56, !6, i64 64}
!11 = !{!"any pointer", !7, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass