; LLVM IR from intuitive-robots/mdt_policy :: pyhash-0.9.3/src/smhasher/Bitvec.ll (Z8window32Pviii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z6assertb(i1 noundef zeroext) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z8window32Pviii(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #0 {
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !9
  store i32 %2, ptr %8, align 4, !tbaa !9
  store i32 %3, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  %21 = load i32, ptr %7, align 4, !tbaa !9
  %22 = mul nsw i32 %21, 8
  store i32 %22, ptr %10, align 4, !tbaa !9
  %23 = load i32, ptr %10, align 4, !tbaa !9
  %24 = load i32, ptr %8, align 4, !tbaa !9
  %25 = srem i32 %24, %23
  store i32 %25, ptr %8, align 4, !tbaa !9
  %26 = load i32, ptr %7, align 4, !tbaa !9
  %27 = and i32 %26, 3
  %28 = icmp eq i32 %27, 0
  call void @_Z6assertb(i1 noundef zeroext %28)
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #2
  %29 = load i32, ptr %7, align 4, !tbaa !9
  %30 = sdiv i32 %29, 4
  store i32 %30, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #2
  %31 = load ptr, ptr %6, align 8, !tbaa !5
  store ptr %31, ptr %12, align 8, !tbaa !5
  %32 = load i32, ptr %9, align 4, !tbaa !9
  %33 = icmp eq i32 %32, 0
  br i1 %33, label %34, label %35

34:                                               ; preds = %4
  store i32 0, ptr %5, align 4
  store i32 1, ptr %13, align 4
  br label %86

35:                                               ; preds = %4
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #2
  %36 = load i32, ptr %8, align 4, !tbaa !9
  %37 = and i32 %36, 31
  store i32 %37, ptr %14, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #2
  %38 = load i32, ptr %8, align 4, !tbaa !9
  %39 = sdiv i32 %38, 32
  store i32 %39, ptr %15, align 4, !tbaa !9
  %40 = load i32, ptr %14, align 4, !tbaa !9
  %41 = icmp eq i32 %40, 0
  br i1 %41, label %42, label %52

42:                                               ; preds = %35
  %43 = load ptr, ptr %12, align 8, !tbaa !5
  %44 = load i32, ptr %15, align 4, !tbaa !9
  %45 = sext i32 %44 to i64
  %46 = getelementptr inbounds i32, ptr %43, i64 %45
  %47 = load i32, ptr %46, align 4, !tbaa !9
  %48 = load i32, ptr %9, align 4, !tbaa !9
  %49 = shl i32 1, %48
  %50 = sub nsw i32 %49, 1
  %51 = and i32 %47, %50
  store i32 %51, ptr %5, align 4
  store i32 1, ptr %13, align 4
  br label %85

52:                                               ; preds = %35
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #2
  %53 = load i32, ptr %15, align 4, !tbaa !9
  %54 = add nsw i32 %53, 1
  %55 = load i32, ptr %11, align 4, !tbaa !9
  %56 = srem i32 %54, %55
  store i32 %56, ptr %16, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #2
  %57 = load i32, ptr %15, align 4, !tbaa !9
  %58 = add nsw i32 %57, 0
  %59 = load i32, ptr %11, align 4, !tbaa !9
  %60 = srem i32 %58, %59
  store i32 %60, ptr %17, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #2
  %61 = load ptr, ptr %12, align 8, !tbaa !5
  %62 = load i32, ptr %16, align 4, !tbaa !9
  %63 = sext i32 %62 to i64
  %64 = getelementptr inbounds i32, ptr %61, i64 %63
  %65 = load i32, ptr %64, align 4, !tbaa !9
  store i32 %65, ptr %18, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #2
  %66 = load ptr, ptr %12, align 8, !tbaa !5
  %67 = load i32, ptr %17, align 4, !tbaa !9
  %68 = sext i32 %67 to i64
  %69 = getelementptr inbounds i32, ptr %66, i64 %68
  %70 = load i32, ptr %69, align 4, !tbaa !9
  store i32 %70, ptr %19, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #2
  %71 = load i32, ptr %18, align 4, !tbaa !9
  %72 = load i32, ptr %14, align 4, !tbaa !9
  %73 = sub nsw i32 32, %72
  %74 = shl i32 %71, %73
  %75 = load i32, ptr %19, align 4, !tbaa !9
  %76 = load i32, ptr %14, align 4, !tbaa !9
  %77 = lshr i32 %75, %76
  %78 = or i32 %74, %77
  store i32 %78, ptr %20, align 4, !tbaa !9
  %79 = load i32, ptr %9, align 4, !tbaa !9
  %80 = shl i32 1, %79
  %81 = sub nsw i32 %80, 1
  %82 = load i32, ptr %20, align 4, !tbaa !9
  %83 = and i32 %82, %81
  store i32 %83, ptr %20, align 4, !tbaa !9
  %84 = load i32, ptr %20, align 4, !tbaa !9
  store i32 %84, ptr %5, align 4
  store i32 1, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #2
  br label %85

85:                                               ; preds = %52, %42
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #2
  br label %86

86:                                               ; preds = %85, %34
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  %87 = load i32, ptr %5, align 4
  ret i32 %87
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z6assertb(i1 noundef zeroext) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z8window32Pviii(ptr nocapture noundef readonly %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  %5 = and i32 %1, 3
  %6 = icmp eq i32 %5, 0
  tail call void @_Z6assertb(i1 noundef zeroext %6)
  %7 = sdiv i32 %1, 4
  %8 = icmp eq i32 %3, 0
  br i1 %8, label %34, label %9

9:                                                ; preds = %4
  %10 = shl nsw i32 %1, 3
  %11 = srem i32 %2, %10
  %12 = and i32 %11, 31
  %13 = sdiv i32 %11, 32
  %14 = icmp eq i32 %12, 0
  br i1 %14, label %15, label %21

15:                                               ; preds = %9
  %16 = sext i32 %13 to i64
  %17 = getelementptr inbounds i32, ptr %0, i64 %16
  %18 = load i32, ptr %17, align 4, !tbaa !5
  %notmask30 = shl nsw i32 -1, %3
  %19 = xor i32 %notmask30, -1
  %20 = and i32 %18, %19
  br label %34

21:                                               ; preds = %9
  %22 = add nsw i32 %13, 1
  %23 = srem i32 %22, %7
  %24 = srem i32 %13, %7
  %25 = sext i32 %23 to i64
  %26 = getelementptr inbounds i32, ptr %0, i64 %25
  %27 = load i32, ptr %26, align 4, !tbaa !5
  %28 = sext i32 %24 to i64
  %29 = getelementptr inbounds i32, ptr %0, i64 %28
  %30 = load i32, ptr %29, align 4, !tbaa !5
  %31 = tail call i32 @llvm.fshr.i32(i32 %27, i32 %30, i32 %11)
  %notmask = shl nsw i32 -1, %3
  %32 = xor i32 %notmask, -1
  %33 = and i32 %31, %32
  br label %34

34:                                               ; preds = %15, %21, %4
  %.1 = phi i32 [ 0, %4 ], [ %20, %15 ], [ %33, %21 ]
  ret i32 %.1
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.fshr.i32(i32, i32, i32) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass