; LLVM IR from Columbitech/rohc :: src/cprofile.ll (ZN4ROHC8CProfile16UpdateIpIdOffsetEPKNS_5iphdrE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.ROHC::CProfile" = type { ptr, ptr, i16, i64, i32, i32, i32, i32, i64, i64, i32, i32, i16, %"class.ROHC::WLSB", i32, i32, i8, i32, i32, i32, %"struct.ROHC::iphdr", i16, i16, %"class.ROHC::WLSB", [11 x i64] }
%"struct.ROHC::iphdr" = type { i8, i8, i16, i16, i16, i8, i8, i16, i32, i32 }
%"class.ROHC::WLSB" = type { %"class.std::vector", i64, i64, i64, i32, i32 }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<ROHC::WLSB<int>::LSB, std::allocator<ROHC::WLSB<int>::LSB>>::_Vector_impl" }
%"struct.std::_Vector_base<ROHC::WLSB<int>::LSB, std::allocator<ROHC::WLSB<int>::LSB>>::_Vector_impl" = type { %"struct.std::_Vector_base<ROHC::WLSB<int>::LSB, std::allocator<ROHC::WLSB<int>::LSB>>::_Vector_impl_data" }
%"struct.std::_Vector_base<ROHC::WLSB<int>::LSB, std::allocator<ROHC::WLSB<int>::LSB>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4ROHC8CProfile16UpdateIpIdOffsetEPKNS_5iphdrE(ptr noundef nonnull align 8 dereferenceable(328) %0, ptr noundef %1) #1 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i16, align 2
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %6 = load ptr, ptr %3, align 8
  %7 = getelementptr inbounds %"class.ROHC::CProfile", ptr %6, i32 0, i32 22
  %8 = load i16, ptr %7, align 2, !tbaa !9
  %9 = getelementptr inbounds %"class.ROHC::CProfile", ptr %6, i32 0, i32 21
  store i16 %8, ptr %9, align 4, !tbaa !24
  %10 = getelementptr inbounds %"class.ROHC::CProfile", ptr %6, i32 0, i32 15
  %11 = load i32, ptr %10, align 4, !tbaa !25
  %12 = icmp eq i32 0, %11
  br i1 %12, label %13, label %26

13:                                               ; preds = %2
  call void @llvm.lifetime.start.p0(i64 2, ptr %5) #3
  %14 = load ptr, ptr %4, align 8, !tbaa !5
  %15 = getelementptr inbounds %"struct.ROHC::iphdr", ptr %14, i32 0, i32 3
  %16 = load i16, ptr %15, align 4, !tbaa !26
  %17 = call noundef zeroext i16 @_ZN4ROHC10rohc_htonsEt(i16 noundef zeroext %16)
  store i16 %17, ptr %5, align 2, !tbaa !27
  %18 = load i16, ptr %5, align 2, !tbaa !27
  %19 = zext i16 %18 to i32
  %20 = getelementptr inbounds %"class.ROHC::CProfile", ptr %6, i32 0, i32 12
  %21 = load i16, ptr %20, align 8, !tbaa !28
  %22 = zext i16 %21 to i32
  %23 = sub nsw i32 %19, %22
  %24 = trunc i32 %23 to i16
  %25 = getelementptr inbounds %"class.ROHC::CProfile", ptr %6, i32 0, i32 22
  store i16 %24, ptr %25, align 2, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 2, ptr %5) #3
  br label %42

26:                                               ; preds = %2
  %27 = getelementptr inbounds %"class.ROHC::CProfile", ptr %6, i32 0, i32 15
  %28 = load i32, ptr %27, align 4, !tbaa !25
  %29 = icmp eq i32 1, %28
  br i1 %29, label %30, label %41

30:                                               ; preds = %26
  %31 = load ptr, ptr %4, align 8, !tbaa !5
  %32 = getelementptr inbounds %"struct.ROHC::iphdr", ptr %31, i32 0, i32 3
  %33 = load i16, ptr %32, align 4, !tbaa !26
  %34 = zext i16 %33 to i32
  %35 = getelementptr inbounds %"class.ROHC::CProfile", ptr %6, i32 0, i32 12
  %36 = load i16, ptr %35, align 8, !tbaa !28
  %37 = zext i16 %36 to i32
  %38 = sub nsw i32 %34, %37
  %39 = trunc i32 %38 to i16
  %40 = getelementptr inbounds %"class.ROHC::CProfile", ptr %6, i32 0, i32 22
  store i16 %39, ptr %40, align 2, !tbaa !9
  br label %41

41:                                               ; preds = %30, %26
  br label %42

42:                                               ; preds = %41, %13
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i16 @_ZN4ROHC10rohc_htonsEt(i16 noundef zeroext) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 182}
!10 = !{!"_ZTSN4ROHC8CProfileE", !6, i64 8, !11, i64 16, !12, i64 24, !13, i64 32, !13, i64 36, !13, i64 40, !13, i64 44, !12, i64 48, !12, i64 56, !13, i64 64, !13, i64 68, !11, i64 72, !14, i64 80, !19, i64 136, !20, i64 140, !21, i64 144, !22, i64 148, !13, i64 152, !13, i64 156, !23, i64 160, !11, i64 180, !11, i64 182, !14, i64 184, !7, i64 240}
!11 = !{!"short", !7, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!"int", !7, i64 0}
!14 = !{!"_ZTSN4ROHC4WLSBIiEE", !15, i64 0, !12, i64 24, !12, i64 32, !12, i64 40, !13, i64 48, !13, i64 52}
!15 = !{!"_ZTSSt6vectorIN4ROHC4WLSBIiE3LSBESaIS3_EE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseIN4ROHC4WLSBIiE3LSBESaIS3_EE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIN4ROHC4WLSBIiE3LSBESaIS3_EE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIN4ROHC4WLSBIiE3LSBESaIS3_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!19 = !{!"_ZTSN4ROHC12Reordering_tE", !7, i64 0}
!20 = !{!"_ZTSN4ROHC15IPIDBehaviour_tE", !7, i64 0}
!21 = !{!"bool", !7, i64 0}
!22 = !{!"_ZTSN4ROHC8CProfileUt_E", !7, i64 0}
!23 = !{!"_ZTSN4ROHC5iphdrE", !7, i64 0, !7, i64 0, !7, i64 1, !11, i64 2, !11, i64 4, !11, i64 6, !7, i64 8, !7, i64 9, !11, i64 10, !13, i64 12, !13, i64 16}
!24 = !{!10, !11, i64 180}
!25 = !{!10, !20, i64 140}
!26 = !{!23, !11, i64 4}
!27 = !{!11, !11, i64 0}
!28 = !{!10, !11, i64 72}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN4ROHC8CProfile16UpdateIpIdOffsetEPKNS_5iphdrE(ptr nocapture noundef nonnull align 8 dereferenceable(328) %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 align 2 {
  %3 = getelementptr inbounds i8, ptr %0, i64 182
  %4 = load i16, ptr %3, align 2, !tbaa !5
  %5 = getelementptr inbounds i8, ptr %0, i64 180
  store i16 %4, ptr %5, align 4, !tbaa !23
  %6 = getelementptr inbounds i8, ptr %0, i64 140
  %7 = load i32, ptr %6, align 4, !tbaa !24
  switch i32 %7, label %18 [
    i32 0, label %8
    i32 1, label %12
  ]

8:                                                ; preds = %2
  %9 = getelementptr inbounds i8, ptr %1, i64 4
  %10 = load i16, ptr %9, align 4, !tbaa !25
  %11 = tail call noundef zeroext i16 @_ZN4ROHC10rohc_htonsEt(i16 noundef zeroext %10)
  br label %.sink.split

12:                                               ; preds = %2
  %13 = getelementptr inbounds i8, ptr %1, i64 4
  %14 = load i16, ptr %13, align 4, !tbaa !25
  br label %.sink.split

.sink.split:                                      ; preds = %8, %12
  %.sink3 = phi i16 [ %14, %12 ], [ %11, %8 ]
  %15 = getelementptr inbounds i8, ptr %0, i64 72
  %16 = load i16, ptr %15, align 8, !tbaa !26
  %17 = sub i16 %.sink3, %16
  store i16 %17, ptr %3, align 2, !tbaa !5
  br label %18

18:                                               ; preds = %.sink.split, %2
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i16 @_ZN4ROHC10rohc_htonsEt(i16 noundef zeroext) local_unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 182}
!6 = !{!"_ZTSN4ROHC8CProfileE", !7, i64 8, !10, i64 16, !11, i64 24, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44, !11, i64 48, !11, i64 56, !12, i64 64, !12, i64 68, !10, i64 72, !13, i64 80, !18, i64 136, !19, i64 140, !20, i64 144, !21, i64 148, !12, i64 152, !12, i64 156, !22, i64 160, !10, i64 180, !10, i64 182, !13, i64 184, !8, i64 240}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"short", !8, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!"int", !8, i64 0}
!13 = !{!"_ZTSN4ROHC4WLSBIiEE", !14, i64 0, !11, i64 24, !11, i64 32, !11, i64 40, !12, i64 48, !12, i64 52}
!14 = !{!"_ZTSSt6vectorIN4ROHC4WLSBIiE3LSBESaIS3_EE", !15, i64 0}
!15 = !{!"_ZTSSt12_Vector_baseIN4ROHC4WLSBIiE3LSBESaIS3_EE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIN4ROHC4WLSBIiE3LSBESaIS3_EE12_Vector_implE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIN4ROHC4WLSBIiE3LSBESaIS3_EE17_Vector_impl_dataE", !7, i64 0, !7, i64 8, !7, i64 16}
!18 = !{!"_ZTSN4ROHC12Reordering_tE", !8, i64 0}
!19 = !{!"_ZTSN4ROHC15IPIDBehaviour_tE", !8, i64 0}
!20 = !{!"bool", !8, i64 0}
!21 = !{!"_ZTSN4ROHC8CProfileUt_E", !8, i64 0}
!22 = !{!"_ZTSN4ROHC5iphdrE", !8, i64 0, !8, i64 0, !8, i64 1, !10, i64 2, !10, i64 4, !10, i64 6, !8, i64 8, !8, i64 9, !10, i64 10, !12, i64 12, !12, i64 16}
!23 = !{!6, !10, i64 180}
!24 = !{!6, !19, i64 140}
!25 = !{!22, !10, i64 4}
!26 = !{!6, !10, i64 72}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass