; LLVM IR from ShahjalalShohag/code-library :: Graph Theory/Kirchoffs Theorem.ll (Z3detSt6vectorIS_IiSaIiEESaIS1_EE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z5powerxx(i64 noundef, i64 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z3detSt6vectorIS_IiSaIiEESaIS1_EE(ptr noundef %0) #0 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i64, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  %19 = call noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #3
  %20 = trunc i64 %19 to i32
  store i32 %20, ptr %3, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  %21 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #3
  %22 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %21) #3
  %23 = trunc i64 %22 to i32
  store i32 %23, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 0, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  store i64 1000420910282047489, ptr %6, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  store i32 1, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  store i32 0, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  store i32 0, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  store i32 0, ptr %10, align 4, !tbaa !9
  br label %24

24:                                               ; preds = %239, %1
  %25 = load i32, ptr %9, align 4, !tbaa !9
  %26 = load i32, ptr %4, align 4, !tbaa !9
  %27 = icmp slt i32 %25, %26
  br i1 %27, label %28, label %32

28:                                               ; preds = %24
  %29 = load i32, ptr %10, align 4, !tbaa !9
  %30 = load i32, ptr %3, align 4, !tbaa !9
  %31 = icmp slt i32 %29, %30
  br label %32

32:                                               ; preds = %28, %24
  %33 = phi i1 [ false, %24 ], [ %31, %28 ]
  br i1 %33, label %35, label %34

34:                                               ; preds = %32
  store i32 2, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  br label %242

35:                                               ; preds = %32
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %36 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %36, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  %37 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %37, ptr %13, align 4, !tbaa !9
  br label %38

38:                                               ; preds = %62, %35
  %39 = load i32, ptr %13, align 4, !tbaa !9
  %40 = load i32, ptr %3, align 4, !tbaa !9
  %41 = icmp slt i32 %39, %40
  br i1 %41, label %43, label %42

42:                                               ; preds = %38
  store i32 5, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  br label %65

43:                                               ; preds = %38
  %44 = load i32, ptr %13, align 4, !tbaa !9
  %45 = sext i32 %44 to i64
  %46 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %45) #3
  %47 = load i32, ptr %9, align 4, !tbaa !9
  %48 = sext i32 %47 to i64
  %49 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %46, i64 noundef %48) #3
  %50 = load i32, ptr %49, align 4, !tbaa !9
  %51 = load i32, ptr %12, align 4, !tbaa !9
  %52 = sext i32 %51 to i64
  %53 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %52) #3
  %54 = load i32, ptr %9, align 4, !tbaa !9
  %55 = sext i32 %54 to i64
  %56 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %53, i64 noundef %55) #3
  %57 = load i32, ptr %56, align 4, !tbaa !9
  %58 = icmp sgt i32 %50, %57
  br i1 %58, label %59, label %61

59:                                               ; preds = %43
  %60 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %60, ptr %12, align 4, !tbaa !9
  br label %61

61:                                               ; preds = %59, %43
  br label %62

62:                                               ; preds = %61
  %63 = load i32, ptr %13, align 4, !tbaa !9
  %64 = add nsw i32 %63, 1
  store i32 %64, ptr %13, align 4, !tbaa !9
  br label %38, !llvm.loop !13

65:                                               ; preds = %42
  %66 = load i32, ptr %12, align 4, !tbaa !9
  %67 = sext i32 %66 to i64
  %68 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %67) #3
  %69 = load i32, ptr %9, align 4, !tbaa !9
  %70 = sext i32 %69 to i64
  %71 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %68, i64 noundef %70) #3
  %72 = load i32, ptr %71, align 4, !tbaa !9
  %73 = icmp eq i32 %72, 0
  br i1 %73, label %74, label %75

74:                                               ; preds = %65
  store i32 0, ptr %7, align 4, !tbaa !9
  store i32 4, ptr %11, align 4
  br label %236

75:                                               ; preds = %65
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  %76 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %76, ptr %14, align 4, !tbaa !9
  br label %77

77:                                               ; preds = %95, %75
  %78 = load i32, ptr %14, align 4, !tbaa !9
  %79 = load i32, ptr %4, align 4, !tbaa !9
  %80 = icmp slt i32 %78, %79
  br i1 %80, label %82, label %81

81:                                               ; preds = %77
  store i32 8, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  br label %98

82:                                               ; preds = %77
  %83 = load i32, ptr %12, align 4, !tbaa !9
  %84 = sext i32 %83 to i64
  %85 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %84) #3
  %86 = load i32, ptr %14, align 4, !tbaa !9
  %87 = sext i32 %86 to i64
  %88 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %85, i64 noundef %87) #3
  %89 = load i32, ptr %10, align 4, !tbaa !9
  %90 = sext i32 %89 to i64
  %91 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %90) #3
  %92 = load i32, ptr %14, align 4, !tbaa !9
  %93 = sext i32 %92 to i64
  %94 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %91, i64 noundef %93) #3
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %88, ptr noundef nonnull align 4 dereferenceable(4) %94) #3
  br label %95

95:                                               ; preds = %82
  %96 = load i32, ptr %14, align 4, !tbaa !9
  %97 = add nsw i32 %96, 1
  store i32 %97, ptr %14, align 4, !tbaa !9
  br label %77, !llvm.loop !15

98:                                               ; preds = %81
  %99 = load i32, ptr %10, align 4, !tbaa !9
  %100 = load i32, ptr %12, align 4, !tbaa !9
  %101 = icmp ne i32 %99, %100
  br i1 %101, label %102, label %111

102:                                              ; preds = %98
  %103 = load i32, ptr %7, align 4, !tbaa !9
  %104 = icmp eq i32 %103, 0
  br i1 %104, label %105, label %106

105:                                              ; preds = %102
  br label %109

106:                                              ; preds = %102
  %107 = load i32, ptr %7, align 4, !tbaa !9
  %108 = sub nsw i32 1000210433, %107
  br label %109

109:                                              ; preds = %106, %105
  %110 = phi i32 [ 0, %105 ], [ %108, %106 ]
  store i32 %110, ptr %7, align 4, !tbaa !9
  br label %111

111:                                              ; preds = %109, %98
  %112 = load i32, ptr %7, align 4, !tbaa !9
  %113 = sext i32 %112 to i64
  %114 = mul nsw i64 1, %113
  %115 = load i32, ptr %10, align 4, !tbaa !9
  %116 = sext i32 %115 to i64
  %117 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %116) #3
  %118 = load i32, ptr %9, align 4, !tbaa !9
  %119 = sext i32 %118 to i64
  %120 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %117, i64 noundef %119) #3
  %121 = load i32, ptr %120, align 4, !tbaa !9
  %122 = sext i32 %121 to i64
  %123 = mul nsw i64 %114, %122
  %124 = srem i64 %123, 1000210433
  %125 = trunc i64 %124 to i32
  store i32 %125, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  %126 = load i32, ptr %10, align 4, !tbaa !9
  %127 = sext i32 %126 to i64
  %128 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %127) #3
  %129 = load i32, ptr %9, align 4, !tbaa !9
  %130 = sext i32 %129 to i64
  %131 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %128, i64 noundef %130) #3
  %132 = load i32, ptr %131, align 4, !tbaa !9
  %133 = sext i32 %132 to i64
  %134 = call noundef i32 @_Z5powerxx(i64 noundef %133, i64 noundef 1000210431)
  store i32 %134, ptr %15, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #3
  store i32 0, ptr %16, align 4, !tbaa !9
  br label %135

135:                                              ; preds = %228, %111
  %136 = load i32, ptr %16, align 4, !tbaa !9
  %137 = load i32, ptr %3, align 4, !tbaa !9
  %138 = icmp slt i32 %136, %137
  br i1 %138, label %139, label %142

139:                                              ; preds = %135
  %140 = load i32, ptr %15, align 4, !tbaa !9
  %141 = icmp ne i32 %140, 0
  br label %142

142:                                              ; preds = %139, %135
  %143 = phi i1 [ false, %135 ], [ %141, %139 ]
  br i1 %143, label %145, label %144

144:                                              ; preds = %142
  store i32 11, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #3
  br label %231

145:                                              ; preds = %142
  %146 = load i32, ptr %16, align 4, !tbaa !9
  %147 = load i32, ptr %10, align 4, !tbaa !9
  %148 = icmp ne i32 %146, %147
  br i1 %148, label %149, label %227

149:                                              ; preds = %145
  %150 = load i32, ptr %16, align 4, !tbaa !9
  %151 = sext i32 %150 to i64
  %152 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %151) #3
  %153 = load i32, ptr %9, align 4, !tbaa !9
  %154 = sext i32 %153 to i64
  %155 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %152, i64 noundef %154) #3
  %156 = load i32, ptr %155, align 4, !tbaa !9
  %157 = icmp ne i32 %156, 0
  br i1 %157, label %158, label %227

158:                                              ; preds = %149
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #3
  %159 = load i32, ptr %16, align 4, !tbaa !9
  %160 = sext i32 %159 to i64
  %161 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %160) #3
  %162 = load i32, ptr %9, align 4, !tbaa !9
  %163 = sext i32 %162 to i64
  %164 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %161, i64 noundef %163) #3
  %165 = load i32, ptr %164, align 4, !tbaa !9
  %166 = sext i32 %165 to i64
  %167 = load i32, ptr %15, align 4, !tbaa !9
  %168 = sext i32 %167 to i64
  %169 = mul nsw i64 %166, %168
  %170 = srem i64 %169, 1000210433
  %171 = trunc i64 %170 to i32
  store i32 %171, ptr %17, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #3
  %172 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %172, ptr %18, align 4, !tbaa !9
  br label %173

173:                                              ; preds = %223, %158
  %174 = load i32, ptr %18, align 4, !tbaa !9
  %175 = load i32, ptr %4, align 4, !tbaa !9
  %176 = icmp slt i32 %174, %175
  br i1 %176, label %177, label %180

177:                                              ; preds = %173
  %178 = load i32, ptr %17, align 4, !tbaa !9
  %179 = icmp ne i32 %178, 0
  br label %180

180:                                              ; preds = %177, %173
  %181 = phi i1 [ false, %173 ], [ %179, %177 ]
  br i1 %181, label %183, label %182

182:                                              ; preds = %180
  store i32 14, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #3
  br label %226

183:                                              ; preds = %180
  %184 = load i32, ptr %10, align 4, !tbaa !9
  %185 = sext i32 %184 to i64
  %186 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %185) #3
  %187 = load i32, ptr %18, align 4, !tbaa !9
  %188 = sext i32 %187 to i64
  %189 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %186, i64 noundef %188) #3
  %190 = load i32, ptr %189, align 4, !tbaa !9
  %191 = icmp ne i32 %190, 0
  br i1 %191, label %192, label %222

192:                                              ; preds = %183
  %193 = load i32, ptr %16, align 4, !tbaa !9
  %194 = sext i32 %193 to i64
  %195 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %194) #3
  %196 = load i32, ptr %18, align 4, !tbaa !9
  %197 = sext i32 %196 to i64
  %198 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %195, i64 noundef %197) #3
  %199 = load i32, ptr %198, align 4, !tbaa !9
  %200 = sext i32 %199 to i64
  %201 = add nsw i64 1000420910282047489, %200
  %202 = load i32, ptr %10, align 4, !tbaa !9
  %203 = sext i32 %202 to i64
  %204 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %203) #3
  %205 = load i32, ptr %18, align 4, !tbaa !9
  %206 = sext i32 %205 to i64
  %207 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %204, i64 noundef %206) #3
  %208 = load i32, ptr %207, align 4, !tbaa !9
  %209 = sext i32 %208 to i64
  %210 = load i32, ptr %17, align 4, !tbaa !9
  %211 = sext i32 %210 to i64
  %212 = mul nsw i64 %209, %211
  %213 = sub nsw i64 %201, %212
  %214 = srem i64 %213, 1000210433
  %215 = trunc i64 %214 to i32
  %216 = load i32, ptr %16, align 4, !tbaa !9
  %217 = sext i32 %216 to i64
  %218 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %217) #3
  %219 = load i32, ptr %18, align 4, !tbaa !9
  %220 = sext i32 %219 to i64
  %221 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %218, i64 noundef %220) #3
  store i32 %215, ptr %221, align 4, !tbaa !9
  br label %222

222:                                              ; preds = %192, %183
  br label %223

223:                                              ; preds = %222
  %224 = load i32, ptr %18, align 4, !tbaa !9
  %225 = add nsw i32 %224, 1
  store i32 %225, ptr %18, align 4, !tbaa !9
  br label %173, !llvm.loop !16

226:                                              ; preds = %182
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #3
  br label %227

227:                                              ; preds = %226, %149, %145
  br label %228

228:                                              ; preds = %227
  %229 = load i32, ptr %16, align 4, !tbaa !9
  %230 = add nsw i32 %229, 1
  store i32 %230, ptr %16, align 4, !tbaa !9
  br label %135, !llvm.loop !17

231:                                              ; preds = %144
  %232 = load i32, ptr %10, align 4, !tbaa !9
  %233 = add nsw i32 %232, 1
  store i32 %233, ptr %10, align 4, !tbaa !9
  %234 = load i32, ptr %8, align 4, !tbaa !9
  %235 = add nsw i32 %234, 1
  store i32 %235, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  store i32 0, ptr %11, align 4
  br label %236

236:                                              ; preds = %231, %74
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  %237 = load i32, ptr %11, align 4
  switch i32 %237, label %244 [
    i32 0, label %238
    i32 4, label %239
  ]

238:                                              ; preds = %236
  br label %239

239:                                              ; preds = %238, %236
  %240 = load i32, ptr %9, align 4, !tbaa !9
  %241 = add nsw i32 %240, 1
  store i32 %241, ptr %9, align 4, !tbaa !9
  br label %24, !llvm.loop !18

242:                                              ; preds = %34
  %243 = load i32, ptr %7, align 4, !tbaa !9
  store i32 1, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  ret i32 %243

244:                                              ; preds = %236
  unreachable
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long long", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}
!17 = distinct !{!17, !14}
!18 = distinct !{!18, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z5powerxx(i64 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef range(i32 -1000210432, 1000210433) i32 @_Z3detSt6vectorIS_IiSaIiEESaIS1_EE(ptr noundef nonnull %0) local_unnamed_addr #0 {
  %2 = tail call noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #2
  %3 = trunc i64 %2 to i32
  %4 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #2
  %5 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %4) #2
  %6 = trunc i64 %5 to i32
  %7 = icmp sgt i32 %6, 0
  %8 = icmp sgt i32 %3, 0
  %9 = and i1 %7, %8
  br i1 %9, label %.preheader80.lr.ph, label %._crit_edge96

.preheader80.lr.ph:                               ; preds = %1
  %10 = and i64 %2, 2147483647
  %11 = and i64 %5, 2147483647
  %wide.trip.count = and i64 %5, 2147483647
  %wide.trip.count108 = and i64 %5, 2147483647
  br label %.preheader80

.preheader80:                                     ; preds = %.preheader80.lr.ph, %86
  %indvars.iv100 = phi i64 [ 0, %.preheader80.lr.ph ], [ %indvars.iv.next101, %86 ]
  %.06295 = phi i32 [ 1, %.preheader80.lr.ph ], [ %.2, %86 ]
  %.07093 = phi i32 [ 0, %.preheader80.lr.ph ], [ %.171, %86 ]
  %12 = sext i32 %.07093 to i64
  br label %19

._crit_edge96:                                    ; preds = %86, %1
  %.062.lcssa = phi i32 [ 1, %1 ], [ %.2, %86 ]
  ret i32 %.062.lcssa

13:                                               ; preds = %19
  %14 = sext i32 %spec.select to i64
  %15 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %14) #2
  %16 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %15, i64 noundef %indvars.iv100) #2
  %17 = load i32, ptr %16, align 4, !tbaa !5
  %18 = icmp eq i32 %17, 0
  br i1 %18, label %86, label %.lr.ph

19:                                               ; preds = %.preheader80, %19
  %indvars.iv = phi i64 [ %12, %.preheader80 ], [ %indvars.iv.next, %19 ]
  %.06881 = phi i32 [ %.07093, %.preheader80 ], [ %spec.select, %19 ]
  %20 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #2
  %21 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef %indvars.iv100) #2
  %22 = load i32, ptr %21, align 4, !tbaa !5
  %23 = sext i32 %.06881 to i64
  %24 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %23) #2
  %25 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %24, i64 noundef %indvars.iv100) #2
  %26 = load i32, ptr %25, align 4, !tbaa !5
  %27 = icmp sgt i32 %22, %26
  %28 = trunc nsw i64 %indvars.iv to i32
  %spec.select = select i1 %27, i32 %28, i32 %.06881
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %29 = icmp slt i64 %indvars.iv.next, %10
  br i1 %29, label %19, label %13, !llvm.loop !9

._crit_edge:                                      ; preds = %.lr.ph
  %.not = icmp eq i32 %.07093, %spec.select
  %30 = icmp eq i32 %.06295, 0
  %31 = sub nsw i32 1000210433, %.06295
  %32 = select i1 %30, i32 0, i32 %31
  %.1 = select i1 %.not, i32 %.06295, i32 %32
  %33 = sext i32 %.1 to i64
  %34 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %12) #2
  %35 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %34, i64 noundef %indvars.iv100) #2
  %36 = load i32, ptr %35, align 4, !tbaa !5
  %37 = sext i32 %36 to i64
  %38 = mul nsw i64 %37, %33
  %39 = srem i64 %38, 1000210433
  %40 = trunc nsw i64 %39 to i32
  %41 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %12) #2
  %42 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %41, i64 noundef %indvars.iv100) #2
  %43 = load i32, ptr %42, align 4, !tbaa !5
  %44 = sext i32 %43 to i64
  %45 = tail call noundef i32 @_Z5powerxx(i64 noundef %44, i64 noundef 1000210431)
  %.not114 = icmp eq i32 %45, 0
  br i1 %.not114, label %._crit_edge90, label %.lr.ph89

.lr.ph89:                                         ; preds = %._crit_edge
  %46 = sext i32 %45 to i64
  %47 = zext i32 %.07093 to i64
  br label %53

.lr.ph:                                           ; preds = %13, %.lr.ph
  %indvars.iv102 = phi i64 [ %indvars.iv.next103, %.lr.ph ], [ %indvars.iv100, %13 ]
  %48 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %14) #2
  %49 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %48, i64 noundef %indvars.iv102) #2
  %50 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %12) #2
  %51 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %50, i64 noundef %indvars.iv102) #2
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %49, ptr noundef nonnull align 4 dereferenceable(4) %51) #2
  %indvars.iv.next103 = add nuw nsw i64 %indvars.iv102, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next103, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !11

._crit_edge90:                                    ; preds = %.loopexit, %._crit_edge
  %52 = add nsw i32 %.07093, 1
  br label %86

53:                                               ; preds = %.lr.ph89, %.loopexit
  %indvars.iv110 = phi i64 [ 0, %.lr.ph89 ], [ %indvars.iv.next111, %.loopexit ]
  %.not77 = icmp eq i64 %indvars.iv110, %47
  br i1 %.not77, label %.loopexit, label %54

54:                                               ; preds = %53
  %55 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv110) #2
  %56 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %55, i64 noundef %indvars.iv100) #2
  %57 = load i32, ptr %56, align 4, !tbaa !5
  %.not78 = icmp eq i32 %57, 0
  br i1 %.not78, label %.loopexit, label %58

58:                                               ; preds = %54
  %59 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv110) #2
  %60 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %59, i64 noundef %indvars.iv100) #2
  %61 = load i32, ptr %60, align 4, !tbaa !5
  %.fr = freeze i32 %61
  %62 = sext i32 %.fr to i64
  %63 = mul nsw i64 %62, %46
  %64 = srem i64 %63, 1000210433
  %.not115 = icmp eq i64 %64, 0
  br i1 %.not115, label %.loopexit, label %.lr.ph86.split

.lr.ph86.split:                                   ; preds = %58, %84
  %indvars.iv105 = phi i64 [ %indvars.iv.next106, %84 ], [ %indvars.iv100, %58 ]
  %65 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %12) #2
  %66 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %65, i64 noundef %indvars.iv105) #2
  %67 = load i32, ptr %66, align 4, !tbaa !5
  %.not79 = icmp eq i32 %67, 0
  br i1 %.not79, label %84, label %68

68:                                               ; preds = %.lr.ph86.split
  %69 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv110) #2
  %70 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %69, i64 noundef %indvars.iv105) #2
  %71 = load i32, ptr %70, align 4, !tbaa !5
  %72 = sext i32 %71 to i64
  %73 = add nsw i64 %72, 1000420910282047489
  %74 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %12) #2
  %75 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %74, i64 noundef %indvars.iv105) #2
  %76 = load i32, ptr %75, align 4, !tbaa !5
  %77 = sext i32 %76 to i64
  %78 = mul nsw i64 %64, %77
  %79 = sub nsw i64 %73, %78
  %80 = srem i64 %79, 1000210433
  %81 = trunc nsw i64 %80 to i32
  %82 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv110) #2
  %83 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %82, i64 noundef %indvars.iv105) #2
  store i32 %81, ptr %83, align 4, !tbaa !5
  br label %84

84:                                               ; preds = %.lr.ph86.split, %68
  %indvars.iv.next106 = add nuw nsw i64 %indvars.iv105, 1
  %exitcond109.not = icmp eq i64 %indvars.iv.next106, %wide.trip.count108
  br i1 %exitcond109.not, label %.loopexit, label %.lr.ph86.split, !llvm.loop !12

.loopexit:                                        ; preds = %84, %58, %53, %54
  %indvars.iv.next111 = add nuw nsw i64 %indvars.iv110, 1
  %85 = icmp ult i64 %indvars.iv.next111, %10
  br i1 %85, label %53, label %._crit_edge90, !llvm.loop !13

86:                                               ; preds = %13, %._crit_edge90
  %.171 = phi i32 [ %52, %._crit_edge90 ], [ %.07093, %13 ]
  %.2 = phi i32 [ %40, %._crit_edge90 ], [ 0, %13 ]
  %indvars.iv.next101 = add nuw nsw i64 %indvars.iv100, 1
  %87 = icmp ult i64 %indvars.iv.next101, %11
  %88 = icmp slt i32 %.171, %3
  %89 = select i1 %87, i1 %88, i1 false
  br i1 %89, label %.preheader80, label %._crit_edge96, !llvm.loop !14
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}


; Effective O3 passes: BDCEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass