; LLVM IR from reazon-research/OpenArm :: control/canfd_control/Drivers/STM32H7xx_HAL_Driver/Src (stm32h7xx_hal_pwr_ex)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.PWR_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @HAL_GetTick() #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_PWREx_ControlVoltageScaling(i32 noundef %0) #2 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  %6 = load volatile i32, ptr getelementptr inbounds (%struct.PWR_TypeDef, ptr inttoptr (i64 1476544512 to ptr), i32 0, i32 1), align 4, !tbaa !9
  %7 = zext i32 %6 to i64
  %8 = and i64 %7, 49152
  %9 = load i32, ptr %3, align 4, !tbaa !5
  %10 = zext i32 %9 to i64
  %11 = icmp eq i64 %8, %10
  br i1 %11, label %12, label %13

12:                                               ; preds = %1
  store i32 0, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %37

13:                                               ; preds = %1
  %14 = load volatile i32, ptr getelementptr inbounds (%struct.PWR_TypeDef, ptr inttoptr (i64 1476544512 to ptr), i32 0, i32 6), align 4, !tbaa !11
  %15 = zext i32 %14 to i64
  %16 = and i64 %15, -49153
  %17 = load i32, ptr %3, align 4, !tbaa !5
  %18 = zext i32 %17 to i64
  %19 = or i64 %16, %18
  %20 = trunc i64 %19 to i32
  store volatile i32 %20, ptr getelementptr inbounds (%struct.PWR_TypeDef, ptr inttoptr (i64 1476544512 to ptr), i32 0, i32 6), align 4, !tbaa !11
  %21 = call i32 @HAL_GetTick()
  store i32 %21, ptr %4, align 4, !tbaa !5
  br label %22

22:                                               ; preds = %35, %13
  %23 = load volatile i32, ptr getelementptr inbounds (%struct.PWR_TypeDef, ptr inttoptr (i64 1476544512 to ptr), i32 0, i32 1), align 4, !tbaa !9
  %24 = zext i32 %23 to i64
  %25 = and i64 %24, 8192
  %26 = icmp eq i64 %25, 8192
  %27 = zext i1 %26 to i32
  %28 = icmp eq i32 %27, 0
  br i1 %28, label %29, label %36

29:                                               ; preds = %22
  %30 = call i32 @HAL_GetTick()
  %31 = load i32, ptr %4, align 4, !tbaa !5
  %32 = sub i32 %30, %31
  %33 = icmp ugt i32 %32, 1000
  br i1 %33, label %34, label %35

34:                                               ; preds = %29
  store i32 1, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %37

35:                                               ; preds = %29
  br label %22, !llvm.loop !12

36:                                               ; preds = %22
  store i32 0, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %37

37:                                               ; preds = %36, %34, %12
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  %38 = load i32, ptr %2, align 4
  ret i32 %38
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 4}
!10 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !6, i64 32, !6, i64 36, !6, i64 40}
!11 = !{!10, !6, i64 24}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare i32 @HAL_GetTick() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @HAL_PWREx_ControlVoltageScaling(i32 noundef %0) local_unnamed_addr #1 {
  %2 = load volatile i32, ptr inttoptr (i64 1476544516 to ptr), align 4, !tbaa !5
  %3 = and i32 %2, 49152
  %4 = icmp eq i32 %3, %0
  br i1 %4, label %.loopexit, label %5

5:                                                ; preds = %1
  %6 = load volatile i32, ptr inttoptr (i64 1476544536 to ptr), align 8, !tbaa !10
  %7 = and i32 %6, -49153
  %8 = or i32 %7, %0
  store volatile i32 %8, ptr inttoptr (i64 1476544536 to ptr), align 8, !tbaa !10
  %9 = tail call i32 @HAL_GetTick() #2
  br label %10

10:                                               ; preds = %14, %5
  %11 = load volatile i32, ptr inttoptr (i64 1476544516 to ptr), align 4, !tbaa !5
  %12 = and i32 %11, 8192
  %13 = icmp eq i32 %12, 0
  br i1 %13, label %14, label %.loopexit

14:                                               ; preds = %10
  %15 = tail call i32 @HAL_GetTick() #2
  %16 = sub i32 %15, %9
  %17 = icmp ugt i32 %16, 1000
  br i1 %17, label %.loopexit, label %10, !llvm.loop !11

.loopexit:                                        ; preds = %10, %14, %1
  %.0 = phi i32 [ 0, %1 ], [ 0, %10 ], [ 1, %14 ]
  ret i32 %.0
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 24}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass