; LLVM IR from ShahjalalShohag/code-library :: Math/Determinant.ll (Z5GaussSt6vectorIS_IdSaIdEESaIS1_EE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z5GaussSt6vectorIS_IdSaIdEESaIS1_EE(ptr noundef %0) #0 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca double, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca double, align 8
  %15 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  %16 = call noundef i64 @_ZNKSt6vectorIS_IdSaIdEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #4
  %17 = trunc i64 %16 to i32
  store i32 %17, ptr %3, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  %18 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #4
  %19 = call noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %18) #4
  %20 = trunc i64 %19 to i32
  store i32 %20, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #4
  store double 1.000000e+00, ptr %5, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  store i32 0, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  store i32 0, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  store i32 0, ptr %8, align 4, !tbaa !9
  br label %21

21:                                               ; preds = %190, %1
  %22 = load i32, ptr %7, align 4, !tbaa !9
  %23 = load i32, ptr %4, align 4, !tbaa !9
  %24 = icmp slt i32 %22, %23
  br i1 %24, label %25, label %29

25:                                               ; preds = %21
  %26 = load i32, ptr %8, align 4, !tbaa !9
  %27 = load i32, ptr %3, align 4, !tbaa !9
  %28 = icmp slt i32 %26, %27
  br label %29

29:                                               ; preds = %25, %21
  %30 = phi i1 [ false, %21 ], [ %28, %25 ]
  br i1 %30, label %32, label %31

31:                                               ; preds = %29
  store i32 2, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  br label %193

32:                                               ; preds = %29
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  %33 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %33, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  %34 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %34, ptr %11, align 4, !tbaa !9
  br label %35

35:                                               ; preds = %61, %32
  %36 = load i32, ptr %11, align 4, !tbaa !9
  %37 = load i32, ptr %3, align 4, !tbaa !9
  %38 = icmp slt i32 %36, %37
  br i1 %38, label %40, label %39

39:                                               ; preds = %35
  store i32 5, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  br label %64

40:                                               ; preds = %35
  %41 = load i32, ptr %11, align 4, !tbaa !9
  %42 = sext i32 %41 to i64
  %43 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %42) #4
  %44 = load i32, ptr %7, align 4, !tbaa !9
  %45 = sext i32 %44 to i64
  %46 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %43, i64 noundef %45) #4
  %47 = load double, ptr %46, align 8, !tbaa !11
  %48 = call double @llvm.fabs.f64(double %47)
  %49 = load i32, ptr %10, align 4, !tbaa !9
  %50 = sext i32 %49 to i64
  %51 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %50) #4
  %52 = load i32, ptr %7, align 4, !tbaa !9
  %53 = sext i32 %52 to i64
  %54 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %51, i64 noundef %53) #4
  %55 = load double, ptr %54, align 8, !tbaa !11
  %56 = call double @llvm.fabs.f64(double %55)
  %57 = fcmp ogt double %48, %56
  br i1 %57, label %58, label %60

58:                                               ; preds = %40
  %59 = load i32, ptr %11, align 4, !tbaa !9
  store i32 %59, ptr %10, align 4, !tbaa !9
  br label %60

60:                                               ; preds = %58, %40
  br label %61

61:                                               ; preds = %60
  %62 = load i32, ptr %11, align 4, !tbaa !9
  %63 = add nsw i32 %62, 1
  store i32 %63, ptr %11, align 4, !tbaa !9
  br label %35, !llvm.loop !13

64:                                               ; preds = %39
  %65 = load i32, ptr %10, align 4, !tbaa !9
  %66 = sext i32 %65 to i64
  %67 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %66) #4
  %68 = load i32, ptr %7, align 4, !tbaa !9
  %69 = sext i32 %68 to i64
  %70 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %67, i64 noundef %69) #4
  %71 = load double, ptr %70, align 8, !tbaa !11
  %72 = call double @llvm.fabs.f64(double %71)
  %73 = fcmp olt double %72, 1.000000e-09
  br i1 %73, label %74, label %75

74:                                               ; preds = %64
  store double 0.000000e+00, ptr %5, align 8, !tbaa !11
  store i32 4, ptr %9, align 4
  br label %187

75:                                               ; preds = %64
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  %76 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %76, ptr %12, align 4, !tbaa !9
  br label %77

77:                                               ; preds = %95, %75
  %78 = load i32, ptr %12, align 4, !tbaa !9
  %79 = load i32, ptr %4, align 4, !tbaa !9
  %80 = icmp slt i32 %78, %79
  br i1 %80, label %82, label %81

81:                                               ; preds = %77
  store i32 8, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  br label %98

82:                                               ; preds = %77
  %83 = load i32, ptr %8, align 4, !tbaa !9
  %84 = sext i32 %83 to i64
  %85 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %84) #4
  %86 = load i32, ptr %12, align 4, !tbaa !9
  %87 = sext i32 %86 to i64
  %88 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %85, i64 noundef %87) #4
  %89 = load i32, ptr %10, align 4, !tbaa !9
  %90 = sext i32 %89 to i64
  %91 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %90) #4
  %92 = load i32, ptr %12, align 4, !tbaa !9
  %93 = sext i32 %92 to i64
  %94 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %91, i64 noundef %93) #4
  call void @_ZSt4swapIdENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) %88, ptr noundef nonnull align 8 dereferenceable(8) %94) #4
  br label %95

95:                                               ; preds = %82
  %96 = load i32, ptr %12, align 4, !tbaa !9
  %97 = add nsw i32 %96, 1
  store i32 %97, ptr %12, align 4, !tbaa !9
  br label %77, !llvm.loop !15

98:                                               ; preds = %81
  %99 = load i32, ptr %8, align 4, !tbaa !9
  %100 = load i32, ptr %10, align 4, !tbaa !9
  %101 = icmp ne i32 %99, %100
  br i1 %101, label %102, label %105

102:                                              ; preds = %98
  %103 = load double, ptr %5, align 8, !tbaa !11
  %104 = fneg double %103
  store double %104, ptr %5, align 8, !tbaa !11
  br label %105

105:                                              ; preds = %102, %98
  %106 = load i32, ptr %8, align 4, !tbaa !9
  %107 = sext i32 %106 to i64
  %108 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %107) #4
  %109 = load i32, ptr %7, align 4, !tbaa !9
  %110 = sext i32 %109 to i64
  %111 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %108, i64 noundef %110) #4
  %112 = load double, ptr %111, align 8, !tbaa !11
  %113 = load double, ptr %5, align 8, !tbaa !11
  %114 = fmul double %113, %112
  store double %114, ptr %5, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  store i32 0, ptr %13, align 4, !tbaa !9
  br label %115

115:                                              ; preds = %179, %105
  %116 = load i32, ptr %13, align 4, !tbaa !9
  %117 = load i32, ptr %3, align 4, !tbaa !9
  %118 = icmp slt i32 %116, %117
  br i1 %118, label %120, label %119

119:                                              ; preds = %115
  store i32 11, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  br label %182

120:                                              ; preds = %115
  %121 = load i32, ptr %13, align 4, !tbaa !9
  %122 = load i32, ptr %8, align 4, !tbaa !9
  %123 = icmp ne i32 %121, %122
  br i1 %123, label %124, label %178

124:                                              ; preds = %120
  %125 = load i32, ptr %13, align 4, !tbaa !9
  %126 = sext i32 %125 to i64
  %127 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %126) #4
  %128 = load i32, ptr %7, align 4, !tbaa !9
  %129 = sext i32 %128 to i64
  %130 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %127, i64 noundef %129) #4
  %131 = load double, ptr %130, align 8, !tbaa !11
  %132 = call double @llvm.fabs.f64(double %131)
  %133 = fcmp ogt double %132, 1.000000e-09
  br i1 %133, label %134, label %178

134:                                              ; preds = %124
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #4
  %135 = load i32, ptr %13, align 4, !tbaa !9
  %136 = sext i32 %135 to i64
  %137 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %136) #4
  %138 = load i32, ptr %7, align 4, !tbaa !9
  %139 = sext i32 %138 to i64
  %140 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %137, i64 noundef %139) #4
  %141 = load double, ptr %140, align 8, !tbaa !11
  %142 = load i32, ptr %8, align 4, !tbaa !9
  %143 = sext i32 %142 to i64
  %144 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %143) #4
  %145 = load i32, ptr %7, align 4, !tbaa !9
  %146 = sext i32 %145 to i64
  %147 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %144, i64 noundef %146) #4
  %148 = load double, ptr %147, align 8, !tbaa !11
  %149 = fdiv double %141, %148
  store double %149, ptr %14, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #4
  %150 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %150, ptr %15, align 4, !tbaa !9
  br label %151

151:                                              ; preds = %174, %134
  %152 = load i32, ptr %15, align 4, !tbaa !9
  %153 = load i32, ptr %4, align 4, !tbaa !9
  %154 = icmp slt i32 %152, %153
  br i1 %154, label %156, label %155

155:                                              ; preds = %151
  store i32 14, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #4
  br label %177

156:                                              ; preds = %151
  %157 = load i32, ptr %8, align 4, !tbaa !9
  %158 = sext i32 %157 to i64
  %159 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %158) #4
  %160 = load i32, ptr %15, align 4, !tbaa !9
  %161 = sext i32 %160 to i64
  %162 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %159, i64 noundef %161) #4
  %163 = load double, ptr %162, align 8, !tbaa !11
  %164 = load double, ptr %14, align 8, !tbaa !11
  %165 = load i32, ptr %13, align 4, !tbaa !9
  %166 = sext i32 %165 to i64
  %167 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %166) #4
  %168 = load i32, ptr %15, align 4, !tbaa !9
  %169 = sext i32 %168 to i64
  %170 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %167, i64 noundef %169) #4
  %171 = load double, ptr %170, align 8, !tbaa !11
  %172 = fneg double %163
  %173 = call double @llvm.fmuladd.f64(double %172, double %164, double %171)
  store double %173, ptr %170, align 8, !tbaa !11
  br label %174

174:                                              ; preds = %156
  %175 = load i32, ptr %15, align 4, !tbaa !9
  %176 = add nsw i32 %175, 1
  store i32 %176, ptr %15, align 4, !tbaa !9
  br label %151, !llvm.loop !16

177:                                              ; preds = %155
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #4
  br label %178

178:                                              ; preds = %177, %124, %120
  br label %179

179:                                              ; preds = %178
  %180 = load i32, ptr %13, align 4, !tbaa !9
  %181 = add nsw i32 %180, 1
  store i32 %181, ptr %13, align 4, !tbaa !9
  br label %115, !llvm.loop !17

182:                                              ; preds = %119
  %183 = load i32, ptr %8, align 4, !tbaa !9
  %184 = add nsw i32 %183, 1
  store i32 %184, ptr %8, align 4, !tbaa !9
  %185 = load i32, ptr %6, align 4, !tbaa !9
  %186 = add nsw i32 %185, 1
  store i32 %186, ptr %6, align 4, !tbaa !9
  store i32 0, ptr %9, align 4
  br label %187

187:                                              ; preds = %182, %74
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  %188 = load i32, ptr %9, align 4
  switch i32 %188, label %196 [
    i32 0, label %189
    i32 4, label %190
  ]

189:                                              ; preds = %187
  br label %190

190:                                              ; preds = %189, %187
  %191 = load i32, ptr %7, align 4, !tbaa !9
  %192 = add nsw i32 %191, 1
  store i32 %192, ptr %7, align 4, !tbaa !9
  br label %21, !llvm.loop !18

193:                                              ; preds = %31
  %194 = load double, ptr %5, align 8, !tbaa !11
  %195 = fptosi double %194 to i32
  store i32 1, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  ret i32 %195

196:                                              ; preds = %187
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IdSaIdEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fabs.f64(double) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIdENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #3

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"double", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}
!17 = distinct !{!17, !14}
!18 = distinct !{!18, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z5GaussSt6vectorIS_IdSaIdEESaIS1_EE(ptr noundef nonnull %0) local_unnamed_addr #0 {
  %2 = tail call noundef i64 @_ZNKSt6vectorIS_IdSaIdEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #3
  %3 = trunc i64 %2 to i32
  %4 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #3
  %5 = tail call noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %4) #3
  %6 = trunc i64 %5 to i32
  %7 = icmp sgt i32 %6, 0
  %8 = icmp sgt i32 %3, 0
  %9 = and i1 %7, %8
  br i1 %9, label %.preheader67.lr.ph, label %._crit_edge83

.preheader67.lr.ph:                               ; preds = %1
  %10 = and i64 %2, 2147483647
  %11 = and i64 %5, 2147483647
  %wide.trip.count = and i64 %5, 2147483647
  %wide.trip.count98 = and i64 %2, 2147483647
  %wide.trip.count93 = and i64 %5, 2147483647
  br label %.preheader67

.preheader67:                                     ; preds = %.preheader67.lr.ph, %67
  %indvars.iv85 = phi i64 [ 0, %.preheader67.lr.ph ], [ %indvars.iv.next86, %67 ]
  %.05382 = phi double [ 1.000000e+00, %.preheader67.lr.ph ], [ %.2, %67 ]
  %.05981 = phi i32 [ 0, %.preheader67.lr.ph ], [ %.160, %67 ]
  %12 = sext i32 %.05981 to i64
  br label %21

._crit_edge83.loopexit:                           ; preds = %67
  %13 = fptosi double %.2 to i32
  br label %._crit_edge83

._crit_edge83:                                    ; preds = %._crit_edge83.loopexit, %1
  %.053.lcssa = phi i32 [ 1, %1 ], [ %13, %._crit_edge83.loopexit ]
  ret i32 %.053.lcssa

14:                                               ; preds = %21
  %15 = sext i32 %.158 to i64
  %16 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %15) #3
  %17 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %16, i64 noundef %indvars.iv85) #3
  %18 = load double, ptr %17, align 8, !tbaa !5
  %19 = tail call double @llvm.fabs.f64(double %18)
  %20 = fcmp olt double %19, 1.000000e-09
  br i1 %20, label %67, label %.lr.ph

21:                                               ; preds = %.preheader67, %21
  %indvars.iv = phi i64 [ %12, %.preheader67 ], [ %indvars.iv.next, %21 ]
  %.05768 = phi i32 [ %.05981, %.preheader67 ], [ %.158, %21 ]
  %22 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #3
  %23 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %22, i64 noundef %indvars.iv85) #3
  %24 = load double, ptr %23, align 8, !tbaa !5
  %25 = tail call double @llvm.fabs.f64(double %24)
  %26 = sext i32 %.05768 to i64
  %27 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %26) #3
  %28 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %27, i64 noundef %indvars.iv85) #3
  %29 = load double, ptr %28, align 8, !tbaa !5
  %30 = tail call double @llvm.fabs.f64(double %29)
  %31 = fcmp ogt double %25, %30
  %32 = trunc nsw i64 %indvars.iv to i32
  %.158 = select i1 %31, i32 %32, i32 %.05768
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %33 = icmp slt i64 %indvars.iv.next, %10
  br i1 %33, label %21, label %14, !llvm.loop !9

.lr.ph76:                                         ; preds = %.lr.ph
  %.not = icmp eq i32 %.05981, %.158
  %34 = fneg double %.05382
  %.1 = select i1 %.not, double %.05382, double %34
  %35 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %12) #3
  %36 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %35, i64 noundef %indvars.iv85) #3
  %37 = load double, ptr %36, align 8, !tbaa !5
  %38 = fmul double %.1, %37
  %39 = zext i32 %.05981 to i64
  br label %45

.lr.ph:                                           ; preds = %14, %.lr.ph
  %indvars.iv87 = phi i64 [ %indvars.iv.next88, %.lr.ph ], [ %indvars.iv85, %14 ]
  %40 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %12) #3
  %41 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %40, i64 noundef %indvars.iv87) #3
  %42 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %15) #3
  %43 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %42, i64 noundef %indvars.iv87) #3
  tail call void @_ZSt4swapIdENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) %41, ptr noundef nonnull align 8 dereferenceable(8) %43) #3
  %indvars.iv.next88 = add nuw nsw i64 %indvars.iv87, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next88, %wide.trip.count
  br i1 %exitcond.not, label %.lr.ph76, label %.lr.ph, !llvm.loop !11

._crit_edge77:                                    ; preds = %.loopexit
  %44 = add nsw i32 %.05981, 1
  br label %67

45:                                               ; preds = %.lr.ph76, %.loopexit
  %indvars.iv95 = phi i64 [ 0, %.lr.ph76 ], [ %indvars.iv.next96, %.loopexit ]
  %.not66 = icmp eq i64 %indvars.iv95, %39
  br i1 %.not66, label %.loopexit, label %46

46:                                               ; preds = %45
  %47 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv95) #3
  %48 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %47, i64 noundef %indvars.iv85) #3
  %49 = load double, ptr %48, align 8, !tbaa !5
  %50 = tail call double @llvm.fabs.f64(double %49)
  %51 = fcmp ogt double %50, 1.000000e-09
  br i1 %51, label %.lr.ph73.preheader, label %.loopexit

.lr.ph73.preheader:                               ; preds = %46
  %52 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv95) #3
  %53 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %52, i64 noundef %indvars.iv85) #3
  %54 = load double, ptr %53, align 8, !tbaa !5
  %55 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %12) #3
  %56 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %55, i64 noundef %indvars.iv85) #3
  %57 = load double, ptr %56, align 8, !tbaa !5
  %58 = fdiv double %54, %57
  br label %.lr.ph73

.lr.ph73:                                         ; preds = %.lr.ph73.preheader, %.lr.ph73
  %indvars.iv90 = phi i64 [ %indvars.iv85, %.lr.ph73.preheader ], [ %indvars.iv.next91, %.lr.ph73 ]
  %59 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %12) #3
  %60 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %59, i64 noundef %indvars.iv90) #3
  %61 = load double, ptr %60, align 8, !tbaa !5
  %62 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv95) #3
  %63 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %62, i64 noundef %indvars.iv90) #3
  %64 = load double, ptr %63, align 8, !tbaa !5
  %65 = fneg double %61
  %66 = tail call double @llvm.fmuladd.f64(double %65, double %58, double %64)
  store double %66, ptr %63, align 8, !tbaa !5
  %indvars.iv.next91 = add nuw nsw i64 %indvars.iv90, 1
  %exitcond94.not = icmp eq i64 %indvars.iv.next91, %wide.trip.count93
  br i1 %exitcond94.not, label %.loopexit, label %.lr.ph73, !llvm.loop !12

.loopexit:                                        ; preds = %.lr.ph73, %45, %46
  %indvars.iv.next96 = add nuw nsw i64 %indvars.iv95, 1
  %exitcond99.not = icmp eq i64 %indvars.iv.next96, %wide.trip.count98
  br i1 %exitcond99.not, label %._crit_edge77, label %45, !llvm.loop !13

67:                                               ; preds = %14, %._crit_edge77
  %.160 = phi i32 [ %44, %._crit_edge77 ], [ %.05981, %14 ]
  %.2 = phi double [ %38, %._crit_edge77 ], [ 0.000000e+00, %14 ]
  %indvars.iv.next86 = add nuw nsw i64 %indvars.iv85, 1
  %68 = icmp ult i64 %indvars.iv.next86, %11
  %69 = icmp slt i32 %.160, %3
  %70 = select i1 %68, i1 %69, i1 false
  br i1 %70, label %.preheader67, label %._crit_edge83.loopexit, !llvm.loop !14
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IdSaIdEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fabs.f64(double) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIdENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}


; Effective O3 passes: BDCEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass