; LLVM IR from Columbitech/rohc :: src (dudp_profile)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.ROHC::DProfile" = type <{ ptr, ptr, i16, [2 x i8], i32, i16, i16, i32, i32, i32, i64, i64, i8, [3 x i8], %"struct.ROHC::iphdr", i64, i32, [4 x i8] }>
%"struct.ROHC::iphdr" = type { i8, i8, i16, i16, i16, i8, i8, i16, i32, i32 }
%"struct.ROHC::global_control" = type { i16, i32, i32, i32, i32, i32, i32, %"struct.ROHC::iphdr", i8, %"struct.ROHC::udphdr", %"struct.ROHC::rtphdr" }
%"struct.ROHC::udphdr" = type { i16, i16, i16, i16 }
%"struct.ROHC::rtphdr" = type { i16, i16, i32, i32 }
%"class.ROHC::DUDPProfile" = type { %"class.ROHC::DProfile.base", i8, %"struct.ROHC::udphdr", [2 x i8] }
%"class.ROHC::DProfile.base" = type <{ ptr, ptr, i16, [2 x i8], i32, i16, i16, i32, i32, i32, i64, i64, i8, [3 x i8], %"struct.ROHC::iphdr", i64, i32 }>

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4ROHC11DUDPProfile34MergeGlobalControlAndAppendHeadersERKNS_14global_controlERSt6vectorIhSaIhEE(ptr noundef nonnull align 8 dereferenceable(102) %0, ptr noundef nonnull align 4 dereferenceable(72) %1, ptr noundef nonnull align 8 dereferenceable(24) %2) unnamed_addr #0 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !5
  %7 = load ptr, ptr %4, align 8
  %8 = getelementptr inbounds %"class.ROHC::DProfile", ptr %7, i32 0, i32 4
  store i32 2, ptr %8, align 4, !tbaa !9
  %9 = getelementptr inbounds %"class.ROHC::DProfile", ptr %7, i32 0, i32 8
  %10 = load i32, ptr %9, align 8, !tbaa !19
  %11 = add i32 %10, 1
  store i32 %11, ptr %9, align 8, !tbaa !19
  %12 = getelementptr inbounds %"class.ROHC::DProfile", ptr %7, i32 0, i32 9
  %13 = load i32, ptr %12, align 4, !tbaa !20
  %14 = add i32 %13, 1
  store i32 %14, ptr %12, align 4, !tbaa !20
  %15 = load ptr, ptr %5, align 8, !tbaa !5
  %16 = getelementptr inbounds %"struct.ROHC::global_control", ptr %15, i32 0, i32 0
  %17 = load i16, ptr %16, align 4, !tbaa !21
  %18 = getelementptr inbounds %"class.ROHC::DProfile", ptr %7, i32 0, i32 5
  store i16 %17, ptr %18, align 8, !tbaa !25
  %19 = load ptr, ptr %5, align 8, !tbaa !5
  %20 = getelementptr inbounds %"struct.ROHC::global_control", ptr %19, i32 0, i32 1
  %21 = load i32, ptr %20, align 4, !tbaa !26
  call void @_ZN4ROHC8DProfile15SetReorderRatioENS_12Reordering_tE(ptr noundef nonnull align 8 dereferenceable(92) %7, i32 noundef %21)
  %22 = load ptr, ptr %5, align 8, !tbaa !5
  %23 = getelementptr inbounds %"struct.ROHC::global_control", ptr %22, i32 0, i32 2
  %24 = load i32, ptr %23, align 4, !tbaa !27
  %25 = getelementptr inbounds %"class.ROHC::DProfile", ptr %7, i32 0, i32 7
  store i32 %24, ptr %25, align 4, !tbaa !28
  %26 = load ptr, ptr %5, align 8, !tbaa !5
  %27 = getelementptr inbounds %"struct.ROHC::global_control", ptr %26, i32 0, i32 8
  %28 = load i8, ptr %27, align 4, !tbaa !29, !range !30, !noundef !31
  %29 = trunc i8 %28 to i1
  %30 = getelementptr inbounds %"class.ROHC::DUDPProfile", ptr %7, i32 0, i32 1
  %31 = zext i1 %29 to i8
  store i8 %31, ptr %30, align 4, !tbaa !32
  %32 = load ptr, ptr %5, align 8, !tbaa !5
  %33 = getelementptr inbounds %"struct.ROHC::global_control", ptr %32, i32 0, i32 7
  %34 = getelementptr inbounds %"class.ROHC::DProfile", ptr %7, i32 0, i32 14
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %34, ptr align 4 %33, i64 20, i1 false), !tbaa.struct !34
  %35 = load ptr, ptr %5, align 8, !tbaa !5
  %36 = getelementptr inbounds %"struct.ROHC::global_control", ptr %35, i32 0, i32 9
  %37 = getelementptr inbounds %"class.ROHC::DUDPProfile", ptr %7, i32 0, i32 2
  call void @llvm.memcpy.p0.p0.i64(ptr align 2 %37, ptr align 2 %36, i64 8, i1 false), !tbaa.struct !38
  call void @_ZN4ROHC8DProfile22UpdateIPIDOffsetFromIDEv(ptr noundef nonnull align 8 dereferenceable(92) %7)
  %38 = load ptr, ptr %6, align 8, !tbaa !5
  %39 = getelementptr inbounds %"class.ROHC::DProfile", ptr %7, i32 0, i32 14
  call void @_ZN4ROHC10AppendDataINS_5iphdrEEEvRSt6vectorIhSaIhEERKT_(ptr noundef nonnull align 8 dereferenceable(24) %38, ptr noundef nonnull align 4 dereferenceable(20) %39)
  %40 = load ptr, ptr %6, align 8, !tbaa !5
  %41 = getelementptr inbounds %"class.ROHC::DUDPProfile", ptr %7, i32 0, i32 2
  call void @_ZN4ROHC10AppendDataINS_6udphdrEEEvRSt6vectorIhSaIhEERKT_(ptr noundef nonnull align 8 dereferenceable(24) %40, ptr noundef nonnull align 2 dereferenceable(8) %41)
  call void @_ZN4ROHC8DProfile13SendFeedback1Ev(ptr noundef nonnull align 8 dereferenceable(92) %7)
  ret void
}

declare void @_ZN4ROHC8DProfile15SetReorderRatioENS_12Reordering_tE(ptr noundef nonnull align 8 dereferenceable(92), i32 noundef) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

declare void @_ZN4ROHC8DProfile22UpdateIPIDOffsetFromIDEv(ptr noundef nonnull align 8 dereferenceable(92)) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4ROHC10AppendDataINS_5iphdrEEEvRSt6vectorIhSaIhEERKT_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(20)) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4ROHC10AppendDataINS_6udphdrEEEvRSt6vectorIhSaIhEERKT_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 2 dereferenceable(8)) #0

declare void @_ZN4ROHC8DProfile13SendFeedback1Ev(ptr noundef nonnull align 8 dereferenceable(92)) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !12, i64 20}
!10 = !{!"_ZTSN4ROHC8DProfileE", !6, i64 8, !11, i64 16, !12, i64 20, !11, i64 24, !11, i64 26, !13, i64 28, !14, i64 32, !14, i64 36, !15, i64 40, !15, i64 48, !16, i64 56, !17, i64 60, !15, i64 80, !18, i64 88}
!11 = !{!"short", !7, i64 0}
!12 = !{!"_ZTSN4ROHC8DProfileUt_E", !7, i64 0}
!13 = !{!"_ZTSN4ROHC15IPIDBehaviour_tE", !7, i64 0}
!14 = !{!"int", !7, i64 0}
!15 = !{!"long", !7, i64 0}
!16 = !{!"bool", !7, i64 0}
!17 = !{!"_ZTSN4ROHC5iphdrE", !7, i64 0, !7, i64 0, !7, i64 1, !11, i64 2, !11, i64 4, !11, i64 6, !7, i64 8, !7, i64 9, !11, i64 10, !14, i64 12, !14, i64 16}
!18 = !{!"_ZTSN4ROHC12Reordering_tE", !7, i64 0}
!19 = !{!10, !14, i64 32}
!20 = !{!10, !14, i64 36}
!21 = !{!22, !11, i64 0}
!22 = !{!"_ZTSN4ROHC14global_controlE", !11, i64 0, !18, i64 4, !13, i64 8, !14, i64 12, !14, i64 16, !14, i64 20, !14, i64 24, !17, i64 28, !16, i64 48, !23, i64 50, !24, i64 60}
!23 = !{!"_ZTSN4ROHC6udphdrE", !11, i64 0, !11, i64 2, !11, i64 4, !11, i64 6}
!24 = !{!"_ZTSN4ROHC6rtphdrE", !7, i64 0, !7, i64 0, !7, i64 0, !7, i64 0, !7, i64 1, !7, i64 1, !11, i64 2, !14, i64 4, !14, i64 8}
!25 = !{!10, !11, i64 24}
!26 = !{!22, !18, i64 4}
!27 = !{!22, !13, i64 8}
!28 = !{!10, !13, i64 28}
!29 = !{!22, !16, i64 48}
!30 = !{i8 0, i8 2}
!31 = !{}
!32 = !{!33, !16, i64 92}
!33 = !{!"_ZTSN4ROHC11DUDPProfileE", !10, i64 0, !16, i64 92, !23, i64 94}
!34 = !{i64 0, i64 1, !35, i64 1, i64 1, !35, i64 2, i64 2, !36, i64 4, i64 2, !36, i64 6, i64 2, !36, i64 8, i64 1, !35, i64 9, i64 1, !35, i64 10, i64 2, !36, i64 12, i64 4, !37, i64 16, i64 4, !37}
!35 = !{!7, !7, i64 0}
!36 = !{!11, !11, i64 0}
!37 = !{!14, !14, i64 0}
!38 = !{i64 0, i64 2, !36, i64 2, i64 2, !36, i64 4, i64 2, !36, i64 6, i64 2, !36}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4ROHC11DUDPProfile34MergeGlobalControlAndAppendHeadersERKNS_14global_controlERSt6vectorIhSaIhEE(ptr noundef nonnull align 8 dereferenceable(102) %0, ptr nocapture noundef nonnull readonly align 4 dereferenceable(72) %1, ptr noundef nonnull align 8 dereferenceable(24) %2) unnamed_addr #0 align 2 {
  %4 = getelementptr inbounds i8, ptr %0, i64 20
  store i32 2, ptr %4, align 4, !tbaa !5
  %5 = getelementptr inbounds i8, ptr %0, i64 32
  %6 = load <2 x i32>, ptr %5, align 8, !tbaa !18
  %7 = add <2 x i32> %6, <i32 1, i32 1>
  store <2 x i32> %7, ptr %5, align 8, !tbaa !18
  %8 = load i16, ptr %1, align 4, !tbaa !19
  %9 = getelementptr inbounds i8, ptr %0, i64 24
  store i16 %8, ptr %9, align 8, !tbaa !23
  %10 = getelementptr inbounds i8, ptr %1, i64 4
  %11 = load i32, ptr %10, align 4, !tbaa !24
  tail call void @_ZN4ROHC8DProfile15SetReorderRatioENS_12Reordering_tE(ptr noundef nonnull align 8 dereferenceable(92) %0, i32 noundef %11)
  %12 = getelementptr inbounds i8, ptr %1, i64 8
  %13 = load i32, ptr %12, align 4, !tbaa !25
  %14 = getelementptr inbounds i8, ptr %0, i64 28
  store i32 %13, ptr %14, align 4, !tbaa !26
  %15 = getelementptr inbounds i8, ptr %1, i64 48
  %16 = load i8, ptr %15, align 4, !tbaa !27, !range !28, !noundef !29
  %17 = getelementptr inbounds i8, ptr %0, i64 92
  store i8 %16, ptr %17, align 4, !tbaa !30
  %18 = getelementptr inbounds i8, ptr %1, i64 28
  %19 = getelementptr inbounds i8, ptr %0, i64 60
  tail call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(20) %19, ptr noundef nonnull align 4 dereferenceable(20) %18, i64 20, i1 false), !tbaa.struct !32
  %20 = getelementptr inbounds i8, ptr %1, i64 50
  %21 = getelementptr inbounds i8, ptr %0, i64 94
  %22 = load i64, ptr %20, align 2
  store i64 %22, ptr %21, align 2
  tail call void @_ZN4ROHC8DProfile22UpdateIPIDOffsetFromIDEv(ptr noundef nonnull align 8 dereferenceable(92) %0)
  tail call void @_ZN4ROHC10AppendDataINS_5iphdrEEEvRSt6vectorIhSaIhEERKT_(ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef nonnull align 4 dereferenceable(20) %19)
  tail call void @_ZN4ROHC10AppendDataINS_6udphdrEEEvRSt6vectorIhSaIhEERKT_(ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef nonnull align 2 dereferenceable(8) %21)
  tail call void @_ZN4ROHC8DProfile13SendFeedback1Ev(ptr noundef nonnull align 8 dereferenceable(92) %0)
  ret void
}

declare void @_ZN4ROHC8DProfile15SetReorderRatioENS_12Reordering_tE(ptr noundef nonnull align 8 dereferenceable(92), i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

declare void @_ZN4ROHC8DProfile22UpdateIPIDOffsetFromIDEv(ptr noundef nonnull align 8 dereferenceable(92)) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4ROHC10AppendDataINS_5iphdrEEEvRSt6vectorIhSaIhEERKT_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(20)) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4ROHC10AppendDataINS_6udphdrEEEvRSt6vectorIhSaIhEERKT_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 2 dereferenceable(8)) local_unnamed_addr #0

declare void @_ZN4ROHC8DProfile13SendFeedback1Ev(ptr noundef nonnull align 8 dereferenceable(92)) local_unnamed_addr #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 20}
!6 = !{!"_ZTSN4ROHC8DProfileE", !7, i64 8, !10, i64 16, !11, i64 20, !10, i64 24, !10, i64 26, !12, i64 28, !13, i64 32, !13, i64 36, !14, i64 40, !14, i64 48, !15, i64 56, !16, i64 60, !14, i64 80, !17, i64 88}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"short", !8, i64 0}
!11 = !{!"_ZTSN4ROHC8DProfileUt_E", !8, i64 0}
!12 = !{!"_ZTSN4ROHC15IPIDBehaviour_tE", !8, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = !{!"long", !8, i64 0}
!15 = !{!"bool", !8, i64 0}
!16 = !{!"_ZTSN4ROHC5iphdrE", !8, i64 0, !8, i64 0, !8, i64 1, !10, i64 2, !10, i64 4, !10, i64 6, !8, i64 8, !8, i64 9, !10, i64 10, !13, i64 12, !13, i64 16}
!17 = !{!"_ZTSN4ROHC12Reordering_tE", !8, i64 0}
!18 = !{!13, !13, i64 0}
!19 = !{!20, !10, i64 0}
!20 = !{!"_ZTSN4ROHC14global_controlE", !10, i64 0, !17, i64 4, !12, i64 8, !13, i64 12, !13, i64 16, !13, i64 20, !13, i64 24, !16, i64 28, !15, i64 48, !21, i64 50, !22, i64 60}
!21 = !{!"_ZTSN4ROHC6udphdrE", !10, i64 0, !10, i64 2, !10, i64 4, !10, i64 6}
!22 = !{!"_ZTSN4ROHC6rtphdrE", !8, i64 0, !8, i64 0, !8, i64 0, !8, i64 0, !8, i64 1, !8, i64 1, !10, i64 2, !13, i64 4, !13, i64 8}
!23 = !{!6, !10, i64 24}
!24 = !{!20, !17, i64 4}
!25 = !{!20, !12, i64 8}
!26 = !{!6, !12, i64 28}
!27 = !{!20, !15, i64 48}
!28 = !{i8 0, i8 2}
!29 = !{}
!30 = !{!31, !15, i64 92}
!31 = !{!"_ZTSN4ROHC11DUDPProfileE", !6, i64 0, !15, i64 92, !21, i64 94}
!32 = !{i64 0, i64 1, !33, i64 1, i64 1, !33, i64 2, i64 2, !34, i64 4, i64 2, !34, i64 6, i64 2, !34, i64 8, i64 1, !33, i64 9, i64 1, !33, i64 10, i64 2, !34, i64 12, i64 4, !18, i64 16, i64 4, !18}
!33 = !{!8, !8, i64 0}
!34 = !{!10, !10, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SLPVectorizerPass,SROAPass,TailCallElimPass