; LLVM IR from reazon-research/OpenArm :: control/canfd_control/Core/Src (spi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.GPIO_InitTypeDef = type { i32, i32, i32, i32, i32 }
%struct.RCC_PeriphCLKInitTypeDef = type { i64, %struct.RCC_PLL2InitTypeDef, %struct.RCC_PLL3InitTypeDef, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.RCC_PLL2InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.RCC_PLL3InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.__SPI_HandleTypeDef = type { ptr, %struct.SPI_InitTypeDef, ptr, i16, i16, ptr, i16, i16, i32, ptr, ptr, ptr, ptr, i32, i32, i32 }
%struct.SPI_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.RCC_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [9 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i32] }

declare void @Error_Handler() #0

; Function Attrs: nounwind uwtable
define dso_local void @HAL_SPI_MspInit(ptr noundef %0) #1 {
  %2 = alloca ptr, align 8
  %3 = alloca %struct.GPIO_InitTypeDef, align 4
  %4 = alloca %struct.RCC_PeriphCLKInitTypeDef, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 20, ptr %3) #4
  call void @llvm.memset.p0.i64(ptr align 4 %3, i8 0, i64 20, i1 false)
  call void @llvm.lifetime.start.p0(i64 184, ptr %4) #4
  call void @llvm.memset.p0.i64(ptr align 8 %4, i8 0, i64 184, i1 false)
  %13 = load ptr, ptr %2, align 8, !tbaa !5
  %14 = getelementptr inbounds %struct.__SPI_HandleTypeDef, ptr %13, i32 0, i32 0
  %15 = load ptr, ptr %14, align 8, !tbaa !9
  %16 = icmp eq ptr %15, inttoptr (i64 1073819648 to ptr)
  br i1 %16, label %17, label %70

17:                                               ; preds = %1
  %18 = getelementptr inbounds %struct.RCC_PeriphCLKInitTypeDef, ptr %4, i32 0, i32 0
  store i64 4096, ptr %18, align 8, !tbaa !14
  %19 = getelementptr inbounds %struct.RCC_PeriphCLKInitTypeDef, ptr %4, i32 0, i32 8
  store i32 0, ptr %19, align 4, !tbaa !18
  %20 = call i32 @HAL_RCCEx_PeriphCLKConfig(ptr noundef %4)
  %21 = icmp ne i32 %20, 0
  br i1 %21, label %22, label %23

22:                                               ; preds = %17
  call void @Error_Handler()
  br label %23

23:                                               ; preds = %22, %17
  br label %24

24:                                               ; preds = %23
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  %25 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 52), align 4, !tbaa !19
  %26 = zext i32 %25 to i64
  %27 = or i64 %26, 4096
  %28 = trunc i64 %27 to i32
  store volatile i32 %28, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 52), align 4, !tbaa !19
  %29 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 52), align 4, !tbaa !19
  %30 = zext i32 %29 to i64
  %31 = and i64 %30, 4096
  %32 = trunc i64 %31 to i32
  store volatile i32 %32, ptr %5, align 4, !tbaa !21
  %33 = load volatile i32, ptr %5, align 4, !tbaa !21
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  br label %34

34:                                               ; preds = %24
  br label %35

35:                                               ; preds = %34
  br label %36

36:                                               ; preds = %35
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  %37 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 48), align 4, !tbaa !22
  %38 = zext i32 %37 to i64
  %39 = or i64 %38, 8
  %40 = trunc i64 %39 to i32
  store volatile i32 %40, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 48), align 4, !tbaa !22
  %41 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 48), align 4, !tbaa !22
  %42 = zext i32 %41 to i64
  %43 = and i64 %42, 8
  %44 = trunc i64 %43 to i32
  store volatile i32 %44, ptr %6, align 4, !tbaa !21
  %45 = load volatile i32, ptr %6, align 4, !tbaa !21
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  br label %46

46:                                               ; preds = %36
  br label %47

47:                                               ; preds = %46
  br label %48

48:                                               ; preds = %47
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  %49 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 48), align 4, !tbaa !22
  %50 = zext i32 %49 to i64
  %51 = or i64 %50, 2
  %52 = trunc i64 %51 to i32
  store volatile i32 %52, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 48), align 4, !tbaa !22
  %53 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 48), align 4, !tbaa !22
  %54 = zext i32 %53 to i64
  %55 = and i64 %54, 2
  %56 = trunc i64 %55 to i32
  store volatile i32 %56, ptr %7, align 4, !tbaa !21
  %57 = load volatile i32, ptr %7, align 4, !tbaa !21
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  br label %58

58:                                               ; preds = %48
  br label %59

59:                                               ; preds = %58
  %60 = getelementptr inbounds %struct.GPIO_InitTypeDef, ptr %3, i32 0, i32 0
  store i32 128, ptr %60, align 4, !tbaa !23
  %61 = getelementptr inbounds %struct.GPIO_InitTypeDef, ptr %3, i32 0, i32 1
  store i32 2, ptr %61, align 4, !tbaa !25
  %62 = getelementptr inbounds %struct.GPIO_InitTypeDef, ptr %3, i32 0, i32 2
  store i32 0, ptr %62, align 4, !tbaa !26
  %63 = getelementptr inbounds %struct.GPIO_InitTypeDef, ptr %3, i32 0, i32 3
  store i32 0, ptr %63, align 4, !tbaa !27
  %64 = getelementptr inbounds %struct.GPIO_InitTypeDef, ptr %3, i32 0, i32 4
  store i32 5, ptr %64, align 4, !tbaa !28
  call void @HAL_GPIO_Init(ptr noundef inttoptr (i64 1476529152 to ptr), ptr noundef %3)
  %65 = getelementptr inbounds %struct.GPIO_InitTypeDef, ptr %3, i32 0, i32 0
  store i32 24, ptr %65, align 4, !tbaa !23
  %66 = getelementptr inbounds %struct.GPIO_InitTypeDef, ptr %3, i32 0, i32 1
  store i32 2, ptr %66, align 4, !tbaa !25
  %67 = getelementptr inbounds %struct.GPIO_InitTypeDef, ptr %3, i32 0, i32 2
  store i32 0, ptr %67, align 4, !tbaa !26
  %68 = getelementptr inbounds %struct.GPIO_InitTypeDef, ptr %3, i32 0, i32 3
  store i32 0, ptr %68, align 4, !tbaa !27
  %69 = getelementptr inbounds %struct.GPIO_InitTypeDef, ptr %3, i32 0, i32 4
  store i32 5, ptr %69, align 4, !tbaa !28
  call void @HAL_GPIO_Init(ptr noundef inttoptr (i64 1476527104 to ptr), ptr noundef %3)
  br label %171

70:                                               ; preds = %1
  %71 = load ptr, ptr %2, align 8, !tbaa !5
  %72 = getelementptr inbounds %struct.__SPI_HandleTypeDef, ptr %71, i32 0, i32 0
  %73 = load ptr, ptr %72, align 8, !tbaa !9
  %74 = icmp eq ptr %73, inttoptr (i64 1073756160 to ptr)
  br i1 %74, label %75, label %128

75:                                               ; preds = %70
  %76 = getelementptr inbounds %struct.RCC_PeriphCLKInitTypeDef, ptr %4, i32 0, i32 0
  store i64 4096, ptr %76, align 8, !tbaa !14
  %77 = getelementptr inbounds %struct.RCC_PeriphCLKInitTypeDef, ptr %4, i32 0, i32 8
  store i32 0, ptr %77, align 4, !tbaa !18
  %78 = call i32 @HAL_RCCEx_PeriphCLKConfig(ptr noundef %4)
  %79 = icmp ne i32 %78, 0
  br i1 %79, label %80, label %81

80:                                               ; preds = %75
  call void @Error_Handler()
  br label %81

81:                                               ; preds = %80, %75
  br label %82

82:                                               ; preds = %81
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  %83 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 50), align 4, !tbaa !29
  %84 = zext i32 %83 to i64
  %85 = or i64 %84, 16384
  %86 = trunc i64 %85 to i32
  store volatile i32 %86, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 50), align 4, !tbaa !29
  %87 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 50), align 4, !tbaa !29
  %88 = zext i32 %87 to i64
  %89 = and i64 %88, 16384
  %90 = trunc i64 %89 to i32
  store volatile i32 %90, ptr %8, align 4, !tbaa !21
  %91 = load volatile i32, ptr %8, align 4, !tbaa !21
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  br label %92

92:                                               ; preds = %82
  br label %93

93:                                               ; preds = %92
  br label %94

94:                                               ; preds = %93
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  %95 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 48), align 4, !tbaa !22
  %96 = zext i32 %95 to i64
  %97 = or i64 %96, 4
  %98 = trunc i64 %97 to i32
  store volatile i32 %98, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 48), align 4, !tbaa !22
  %99 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 48), align 4, !tbaa !22
  %100 = zext i32 %99 to i64
  %101 = and i64 %100, 4
  %102 = trunc i64 %101 to i32
  store volatile i32 %102, ptr %9, align 4, !tbaa !21
  %103 = load volatile i32, ptr %9, align 4, !tbaa !21
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  br label %104

104:                                              ; preds = %94
  br label %105

105:                                              ; preds = %104
  br label %106

106:                                              ; preds = %105
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  %107 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 48), align 4, !tbaa !22
  %108 = zext i32 %107 to i64
  %109 = or i64 %108, 2
  %110 = trunc i64 %109 to i32
  store volatile i32 %110, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 48), align 4, !tbaa !22
  %111 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 48), align 4, !tbaa !22
  %112 = zext i32 %111 to i64
  %113 = and i64 %112, 2
  %114 = trunc i64 %113 to i32
  store volatile i32 %114, ptr %10, align 4, !tbaa !21
  %115 = load volatile i32, ptr %10, align 4, !tbaa !21
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  br label %116

116:                                              ; preds = %106
  br label %117

117:                                              ; preds = %116
  %118 = getelementptr inbounds %struct.GPIO_InitTypeDef, ptr %3, i32 0, i32 0
  store i32 6, ptr %118, align 4, !tbaa !23
  %119 = getelementptr inbounds %struct.GPIO_InitTypeDef, ptr %3, i32 0, i32 1
  store i32 2, ptr %119, align 4, !tbaa !25
  %120 = getelementptr inbounds %struct.GPIO_InitTypeDef, ptr %3, i32 0, i32 2
  store i32 0, ptr %120, align 4, !tbaa !26
  %121 = getelementptr inbounds %struct.GPIO_InitTypeDef, ptr %3, i32 0, i32 3
  store i32 0, ptr %121, align 4, !tbaa !27
  %122 = getelementptr inbounds %struct.GPIO_InitTypeDef, ptr %3, i32 0, i32 4
  store i32 5, ptr %122, align 4, !tbaa !28
  call void @HAL_GPIO_Init(ptr noundef inttoptr (i64 1476528128 to ptr), ptr noundef %3)
  %123 = getelementptr inbounds %struct.GPIO_InitTypeDef, ptr %3, i32 0, i32 0
  store i32 8192, ptr %123, align 4, !tbaa !23
  %124 = getelementptr inbounds %struct.GPIO_InitTypeDef, ptr %3, i32 0, i32 1
  store i32 2, ptr %124, align 4, !tbaa !25
  %125 = getelementptr inbounds %struct.GPIO_InitTypeDef, ptr %3, i32 0, i32 2
  store i32 0, ptr %125, align 4, !tbaa !26
  %126 = getelementptr inbounds %struct.GPIO_InitTypeDef, ptr %3, i32 0, i32 3
  store i32 0, ptr %126, align 4, !tbaa !27
  %127 = getelementptr inbounds %struct.GPIO_InitTypeDef, ptr %3, i32 0, i32 4
  store i32 5, ptr %127, align 4, !tbaa !28
  call void @HAL_GPIO_Init(ptr noundef inttoptr (i64 1476527104 to ptr), ptr noundef %3)
  br label %170

128:                                              ; preds = %70
  %129 = load ptr, ptr %2, align 8, !tbaa !5
  %130 = getelementptr inbounds %struct.__SPI_HandleTypeDef, ptr %129, i32 0, i32 0
  %131 = load ptr, ptr %130, align 8, !tbaa !9
  %132 = icmp eq ptr %131, inttoptr (i64 1073757184 to ptr)
  br i1 %132, label %133, label %169

133:                                              ; preds = %128
  %134 = getelementptr inbounds %struct.RCC_PeriphCLKInitTypeDef, ptr %4, i32 0, i32 0
  store i64 4096, ptr %134, align 8, !tbaa !14
  %135 = getelementptr inbounds %struct.RCC_PeriphCLKInitTypeDef, ptr %4, i32 0, i32 8
  store i32 0, ptr %135, align 4, !tbaa !18
  %136 = call i32 @HAL_RCCEx_PeriphCLKConfig(ptr noundef %4)
  %137 = icmp ne i32 %136, 0
  br i1 %137, label %138, label %139

138:                                              ; preds = %133
  call void @Error_Handler()
  br label %139

139:                                              ; preds = %138, %133
  br label %140

140:                                              ; preds = %139
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  %141 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 50), align 4, !tbaa !29
  %142 = zext i32 %141 to i64
  %143 = or i64 %142, 32768
  %144 = trunc i64 %143 to i32
  store volatile i32 %144, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 50), align 4, !tbaa !29
  %145 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 50), align 4, !tbaa !29
  %146 = zext i32 %145 to i64
  %147 = and i64 %146, 32768
  %148 = trunc i64 %147 to i32
  store volatile i32 %148, ptr %11, align 4, !tbaa !21
  %149 = load volatile i32, ptr %11, align 4, !tbaa !21
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  br label %150

150:                                              ; preds = %140
  br label %151

151:                                              ; preds = %150
  br label %152

152:                                              ; preds = %151
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  %153 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 48), align 4, !tbaa !22
  %154 = zext i32 %153 to i64
  %155 = or i64 %154, 4
  %156 = trunc i64 %155 to i32
  store volatile i32 %156, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 48), align 4, !tbaa !22
  %157 = load volatile i32, ptr getelementptr inbounds (%struct.RCC_TypeDef, ptr inttoptr (i64 1476543488 to ptr), i32 0, i32 48), align 4, !tbaa !22
  %158 = zext i32 %157 to i64
  %159 = and i64 %158, 4
  %160 = trunc i64 %159 to i32
  store volatile i32 %160, ptr %12, align 4, !tbaa !21
  %161 = load volatile i32, ptr %12, align 4, !tbaa !21
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  br label %162

162:                                              ; preds = %152
  br label %163

163:                                              ; preds = %162
  %164 = getelementptr inbounds %struct.GPIO_InitTypeDef, ptr %3, i32 0, i32 0
  store i32 7168, ptr %164, align 4, !tbaa !23
  %165 = getelementptr inbounds %struct.GPIO_InitTypeDef, ptr %3, i32 0, i32 1
  store i32 2, ptr %165, align 4, !tbaa !25
  %166 = getelementptr inbounds %struct.GPIO_InitTypeDef, ptr %3, i32 0, i32 2
  store i32 0, ptr %166, align 4, !tbaa !26
  %167 = getelementptr inbounds %struct.GPIO_InitTypeDef, ptr %3, i32 0, i32 3
  store i32 0, ptr %167, align 4, !tbaa !27
  %168 = getelementptr inbounds %struct.GPIO_InitTypeDef, ptr %3, i32 0, i32 4
  store i32 6, ptr %168, align 4, !tbaa !28
  call void @HAL_GPIO_Init(ptr noundef inttoptr (i64 1476528128 to ptr), ptr noundef %3)
  br label %169

169:                                              ; preds = %163, %128
  br label %170

170:                                              ; preds = %169, %117
  br label %171

171:                                              ; preds = %170, %59
  call void @llvm.lifetime.end.p0(i64 184, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 20, ptr %3) #4
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

declare i32 @HAL_RCCEx_PeriphCLKConfig(ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

declare void @HAL_GPIO_Init(ptr noundef, ptr noundef) #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"__SPI_HandleTypeDef", !6, i64 0, !11, i64 8, !6, i64 96, !13, i64 104, !13, i64 106, !6, i64 112, !13, i64 120, !13, i64 122, !12, i64 124, !6, i64 128, !6, i64 136, !6, i64 144, !6, i64 152, !12, i64 160, !12, i64 164, !12, i64 168}
!11 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44, !12, i64 48, !12, i64 52, !12, i64 56, !12, i64 60, !12, i64 64, !12, i64 68, !12, i64 72, !12, i64 76, !12, i64 80, !12, i64 84}
!12 = !{!"int", !7, i64 0}
!13 = !{!"short", !7, i64 0}
!14 = !{!15, !16, i64 0}
!15 = !{!"", !16, i64 0, !17, i64 8, !17, i64 40, !12, i64 72, !12, i64 76, !12, i64 80, !12, i64 84, !12, i64 88, !12, i64 92, !12, i64 96, !12, i64 100, !12, i64 104, !12, i64 108, !12, i64 112, !12, i64 116, !12, i64 120, !12, i64 124, !12, i64 128, !12, i64 132, !12, i64 136, !12, i64 140, !12, i64 144, !12, i64 148, !12, i64 152, !12, i64 156, !12, i64 160, !12, i64 164, !12, i64 168, !12, i64 172, !12, i64 176, !12, i64 180}
!16 = !{!"long", !7, i64 0}
!17 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28}
!18 = !{!15, !12, i64 92}
!19 = !{!20, !12, i64 240}
!20 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44, !12, i64 48, !12, i64 52, !12, i64 56, !12, i64 60, !12, i64 64, !12, i64 68, !12, i64 72, !12, i64 76, !12, i64 80, !12, i64 84, !12, i64 88, !12, i64 92, !12, i64 96, !12, i64 100, !12, i64 104, !12, i64 108, !12, i64 112, !12, i64 116, !12, i64 120, !12, i64 124, !12, i64 128, !12, i64 132, !12, i64 136, !12, i64 140, !12, i64 144, !12, i64 148, !12, i64 152, !12, i64 156, !12, i64 160, !12, i64 164, !12, i64 168, !7, i64 172, !12, i64 208, !12, i64 212, !12, i64 216, !12, i64 220, !12, i64 224, !12, i64 228, !12, i64 232, !12, i64 236, !12, i64 240, !12, i64 244, !12, i64 248, !12, i64 252, !12, i64 256, !12, i64 260, !12, i64 264, !12, i64 268, !12, i64 272, !12, i64 276, !12, i64 280, !12, i64 284, !7, i64 288}
!21 = !{!12, !12, i64 0}
!22 = !{!20, !12, i64 224}
!23 = !{!24, !12, i64 0}
!24 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16}
!25 = !{!24, !12, i64 4}
!26 = !{!24, !12, i64 8}
!27 = !{!24, !12, i64 12}
!28 = !{!24, !12, i64 16}
!29 = !{!20, !12, i64 232}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.GPIO_InitTypeDef = type { i32, i32, i32, i32, i32 }
%struct.RCC_PeriphCLKInitTypeDef = type { i64, %struct.RCC_PLL2InitTypeDef, %struct.RCC_PLL3InitTypeDef, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.RCC_PLL2InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.RCC_PLL3InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32 }

declare void @Error_Handler() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @HAL_SPI_MspInit(ptr nocapture noundef readonly %0) local_unnamed_addr #1 {
  %2 = alloca %struct.GPIO_InitTypeDef, align 16
  %3 = alloca %struct.RCC_PeriphCLKInitTypeDef, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 20, ptr nonnull %2) #4
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(20) %2, i8 0, i64 20, i1 false)
  call void @llvm.lifetime.start.p0(i64 184, ptr nonnull %3) #4
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(184) %3, i8 0, i64 184, i1 false)
  %12 = load ptr, ptr %0, align 8, !tbaa !5
  %magicptr14 = ptrtoint ptr %12 to i64
  switch i64 %magicptr14, label %60 [
    i64 1073819648, label %13
    i64 1073756160, label %30
    i64 1073757184, label %47
  ]

13:                                               ; preds = %1
  store i64 4096, ptr %3, align 8, !tbaa !13
  %14 = call i32 @HAL_RCCEx_PeriphCLKConfig(ptr noundef nonnull %3) #4
  %.not13 = icmp eq i32 %14, 0
  br i1 %.not13, label %16, label %15

15:                                               ; preds = %13
  call void @Error_Handler() #4
  br label %16

16:                                               ; preds = %13, %15
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4)
  %17 = load volatile i32, ptr inttoptr (i64 1476543728 to ptr), align 16, !tbaa !17
  %18 = or i32 %17, 4096
  store volatile i32 %18, ptr inttoptr (i64 1476543728 to ptr), align 16, !tbaa !17
  %19 = load volatile i32, ptr inttoptr (i64 1476543728 to ptr), align 16, !tbaa !17
  %20 = and i32 %19, 4096
  store volatile i32 %20, ptr %4, align 4, !tbaa !19
  %.0..0..0..0.7 = load volatile i32, ptr %4, align 4, !tbaa !19
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4)
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5)
  %21 = load volatile i32, ptr inttoptr (i64 1476543712 to ptr), align 32, !tbaa !20
  %22 = or i32 %21, 8
  store volatile i32 %22, ptr inttoptr (i64 1476543712 to ptr), align 32, !tbaa !20
  %23 = load volatile i32, ptr inttoptr (i64 1476543712 to ptr), align 32, !tbaa !20
  %24 = and i32 %23, 8
  store volatile i32 %24, ptr %5, align 4, !tbaa !19
  %.0..0..0..0.6 = load volatile i32, ptr %5, align 4, !tbaa !19
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5)
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6)
  %25 = load volatile i32, ptr inttoptr (i64 1476543712 to ptr), align 32, !tbaa !20
  %26 = or i32 %25, 2
  store volatile i32 %26, ptr inttoptr (i64 1476543712 to ptr), align 32, !tbaa !20
  %27 = load volatile i32, ptr inttoptr (i64 1476543712 to ptr), align 32, !tbaa !20
  %28 = and i32 %27, 2
  store volatile i32 %28, ptr %6, align 4, !tbaa !19
  %.0..0..0..0.5 = load volatile i32, ptr %6, align 4, !tbaa !19
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6)
  store <4 x i32> <i32 128, i32 2, i32 0, i32 0>, ptr %2, align 16, !tbaa !19
  %29 = getelementptr inbounds i8, ptr %2, i64 16
  store i32 5, ptr %29, align 16, !tbaa !21
  call void @HAL_GPIO_Init(ptr noundef nonnull inttoptr (i64 1476529152 to ptr), ptr noundef nonnull %2) #4
  store <4 x i32> <i32 24, i32 2, i32 0, i32 0>, ptr %2, align 16, !tbaa !19
  store i32 5, ptr %29, align 16, !tbaa !21
  br label %.sink.split

30:                                               ; preds = %1
  store i64 4096, ptr %3, align 8, !tbaa !13
  %31 = call i32 @HAL_RCCEx_PeriphCLKConfig(ptr noundef nonnull %3) #4
  %.not12 = icmp eq i32 %31, 0
  br i1 %.not12, label %33, label %32

32:                                               ; preds = %30
  call void @Error_Handler() #4
  br label %33

33:                                               ; preds = %30, %32
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7)
  %34 = load volatile i32, ptr inttoptr (i64 1476543720 to ptr), align 8, !tbaa !23
  %35 = or i32 %34, 16384
  store volatile i32 %35, ptr inttoptr (i64 1476543720 to ptr), align 8, !tbaa !23
  %36 = load volatile i32, ptr inttoptr (i64 1476543720 to ptr), align 8, !tbaa !23
  %37 = and i32 %36, 16384
  store volatile i32 %37, ptr %7, align 4, !tbaa !19
  %.0..0..0..0.4 = load volatile i32, ptr %7, align 4, !tbaa !19
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7)
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8)
  %38 = load volatile i32, ptr inttoptr (i64 1476543712 to ptr), align 32, !tbaa !20
  %39 = or i32 %38, 4
  store volatile i32 %39, ptr inttoptr (i64 1476543712 to ptr), align 32, !tbaa !20
  %40 = load volatile i32, ptr inttoptr (i64 1476543712 to ptr), align 32, !tbaa !20
  %41 = and i32 %40, 4
  store volatile i32 %41, ptr %8, align 4, !tbaa !19
  %.0..0..0..0.3 = load volatile i32, ptr %8, align 4, !tbaa !19
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8)
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %9)
  %42 = load volatile i32, ptr inttoptr (i64 1476543712 to ptr), align 32, !tbaa !20
  %43 = or i32 %42, 2
  store volatile i32 %43, ptr inttoptr (i64 1476543712 to ptr), align 32, !tbaa !20
  %44 = load volatile i32, ptr inttoptr (i64 1476543712 to ptr), align 32, !tbaa !20
  %45 = and i32 %44, 2
  store volatile i32 %45, ptr %9, align 4, !tbaa !19
  %.0..0..0..0.2 = load volatile i32, ptr %9, align 4, !tbaa !19
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %9)
  store <4 x i32> <i32 6, i32 2, i32 0, i32 0>, ptr %2, align 16, !tbaa !19
  %46 = getelementptr inbounds i8, ptr %2, i64 16
  store i32 5, ptr %46, align 16, !tbaa !21
  call void @HAL_GPIO_Init(ptr noundef nonnull inttoptr (i64 1476528128 to ptr), ptr noundef nonnull %2) #4
  store <4 x i32> <i32 8192, i32 2, i32 0, i32 0>, ptr %2, align 16, !tbaa !19
  store i32 5, ptr %46, align 16, !tbaa !21
  br label %.sink.split

47:                                               ; preds = %1
  store i64 4096, ptr %3, align 8, !tbaa !13
  %48 = call i32 @HAL_RCCEx_PeriphCLKConfig(ptr noundef nonnull %3) #4
  %.not = icmp eq i32 %48, 0
  br i1 %.not, label %50, label %49

49:                                               ; preds = %47
  call void @Error_Handler() #4
  br label %50

50:                                               ; preds = %47, %49
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %10)
  %51 = load volatile i32, ptr inttoptr (i64 1476543720 to ptr), align 8, !tbaa !23
  %52 = or i32 %51, 32768
  store volatile i32 %52, ptr inttoptr (i64 1476543720 to ptr), align 8, !tbaa !23
  %53 = load volatile i32, ptr inttoptr (i64 1476543720 to ptr), align 8, !tbaa !23
  %54 = and i32 %53, 32768
  store volatile i32 %54, ptr %10, align 4, !tbaa !19
  %.0..0..0..0.1 = load volatile i32, ptr %10, align 4, !tbaa !19
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %10)
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %11)
  %55 = load volatile i32, ptr inttoptr (i64 1476543712 to ptr), align 32, !tbaa !20
  %56 = or i32 %55, 4
  store volatile i32 %56, ptr inttoptr (i64 1476543712 to ptr), align 32, !tbaa !20
  %57 = load volatile i32, ptr inttoptr (i64 1476543712 to ptr), align 32, !tbaa !20
  %58 = and i32 %57, 4
  store volatile i32 %58, ptr %11, align 4, !tbaa !19
  %.0..0..0..0. = load volatile i32, ptr %11, align 4, !tbaa !19
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %11)
  store <4 x i32> <i32 7168, i32 2, i32 0, i32 0>, ptr %2, align 16, !tbaa !19
  %59 = getelementptr inbounds i8, ptr %2, i64 16
  store i32 6, ptr %59, align 16, !tbaa !21
  br label %.sink.split

.sink.split:                                      ; preds = %16, %50, %33
  %.sink = phi ptr [ inttoptr (i64 1476527104 to ptr), %33 ], [ inttoptr (i64 1476528128 to ptr), %50 ], [ inttoptr (i64 1476527104 to ptr), %16 ]
  call void @HAL_GPIO_Init(ptr noundef nonnull %.sink, ptr noundef nonnull %2) #4
  br label %60

60:                                               ; preds = %.sink.split, %1
  call void @llvm.lifetime.end.p0(i64 184, ptr nonnull %3) #4
  call void @llvm.lifetime.end.p0(i64 20, ptr nonnull %2) #4
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

declare i32 @HAL_RCCEx_PeriphCLKConfig(ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

declare void @HAL_GPIO_Init(ptr noundef, ptr noundef) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"__SPI_HandleTypeDef", !7, i64 0, !10, i64 8, !7, i64 96, !12, i64 104, !12, i64 106, !7, i64 112, !12, i64 120, !12, i64 122, !11, i64 124, !7, i64 128, !7, i64 136, !7, i64 144, !7, i64 152, !11, i64 160, !11, i64 164, !11, i64 168}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84}
!11 = !{!"int", !8, i64 0}
!12 = !{!"short", !8, i64 0}
!13 = !{!14, !15, i64 0}
!14 = !{!"", !15, i64 0, !16, i64 8, !16, i64 40, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92, !11, i64 96, !11, i64 100, !11, i64 104, !11, i64 108, !11, i64 112, !11, i64 116, !11, i64 120, !11, i64 124, !11, i64 128, !11, i64 132, !11, i64 136, !11, i64 140, !11, i64 144, !11, i64 148, !11, i64 152, !11, i64 156, !11, i64 160, !11, i64 164, !11, i64 168, !11, i64 172, !11, i64 176, !11, i64 180}
!15 = !{!"long", !8, i64 0}
!16 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28}
!17 = !{!18, !11, i64 240}
!18 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92, !11, i64 96, !11, i64 100, !11, i64 104, !11, i64 108, !11, i64 112, !11, i64 116, !11, i64 120, !11, i64 124, !11, i64 128, !11, i64 132, !11, i64 136, !11, i64 140, !11, i64 144, !11, i64 148, !11, i64 152, !11, i64 156, !11, i64 160, !11, i64 164, !11, i64 168, !8, i64 172, !11, i64 208, !11, i64 212, !11, i64 216, !11, i64 220, !11, i64 224, !11, i64 228, !11, i64 232, !11, i64 236, !11, i64 240, !11, i64 244, !11, i64 248, !11, i64 252, !11, i64 256, !11, i64 260, !11, i64 264, !11, i64 268, !11, i64 272, !11, i64 276, !11, i64 280, !11, i64 284, !8, i64 288}
!19 = !{!11, !11, i64 0}
!20 = !{!18, !11, i64 224}
!21 = !{!22, !11, i64 16}
!22 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16}
!23 = !{!18, !11, i64 232}


; Effective O3 passes: CorrelatedValuePropagationPass,DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SLPVectorizerPass,SROAPass,SimplifyCFGPass