; LLVM IR from Mithreindeir/VelocityRaptor :: VelocityRaptor/src (vrMath)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.vrVec2 = type { float, float }

; Function Attrs: inlinehint nounwind uwtable
declare dso_local <2 x float> @vrVect(float noundef, float noundef) #0

; Function Attrs: inlinehint nounwind uwtable
define dso_local <2 x float> @vrMult(<2 x float> %0, <2 x float> %1) #0 {
  %3 = alloca %struct.vrVec2, align 4
  %4 = alloca %struct.vrVec2, align 4
  %5 = alloca %struct.vrVec2, align 4
  store <2 x float> %0, ptr %4, align 4
  store <2 x float> %1, ptr %5, align 4
  %6 = getelementptr inbounds %struct.vrVec2, ptr %4, i32 0, i32 0
  %7 = load float, ptr %6, align 4, !tbaa !5
  %8 = getelementptr inbounds %struct.vrVec2, ptr %5, i32 0, i32 0
  %9 = load float, ptr %8, align 4, !tbaa !5
  %10 = fmul float %7, %9
  %11 = getelementptr inbounds %struct.vrVec2, ptr %4, i32 0, i32 1
  %12 = load float, ptr %11, align 4, !tbaa !10
  %13 = getelementptr inbounds %struct.vrVec2, ptr %5, i32 0, i32 1
  %14 = load float, ptr %13, align 4, !tbaa !10
  %15 = fmul float %12, %14
  %16 = call <2 x float> @vrVect(float noundef %10, float noundef %15)
  store <2 x float> %16, ptr %3, align 4
  %17 = load <2 x float>, ptr %3, align 4
  ret <2 x float> %17
}

attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"vrVec2", !7, i64 0, !7, i64 4}
!7 = !{!"float", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 4}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint nounwind uwtable
declare dso_local <2 x float> @vrVect(float noundef, float noundef) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
define dso_local <2 x float> @vrMult(<2 x float> %0, <2 x float> %1) local_unnamed_addr #0 {
  %3 = fmul <2 x float> %0, %1
  %4 = extractelement <2 x float> %3, i64 0
  %5 = fmul <2 x float> %0, %1
  %6 = extractelement <2 x float> %5, i64 1
  %7 = tail call <2 x float> @vrVect(float noundef %4, float noundef %6)
  ret <2 x float> %7
}

attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: GlobalOptPass,InstCombinePass,SROAPass,TailCallElimPass,VectorCombinePass