; LLVM IR from reazon-research/OpenArm :: control/canfd_control/Drivers/STM32H7xx_HAL_Driver/Src (stm32h7xx_hal_ospi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.OSPI_HandleTypeDef = type { ptr, %struct.OSPI_InitTypeDef, ptr, i32, i32, ptr, i32, i32, i32 }
%struct.OSPI_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.OCTOSPI_TypeDef = type { i32, i32, i32, i32, i32, i32, [2 x i32], i32, i32, [6 x i32], i32, i32, i32, i32, i32, [11 x i32], i32, i32, i32, i32, i32, [27 x i32], i32, i32, i32, i32, i32, [3 x i32], i32, [3 x i32], i32, [3 x i32], i32, i32, i32, i32, i32, [3 x i32], i32, [7 x i32], i32, i32, i32, i32, i32, [3 x i32], i32, [23 x i32], i32, [122 x i32], i32, i32, i32, i32 }
%struct.__MDMA_HandleTypeDef = type { ptr, %struct.MDMA_InitTypeDef, i32, i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32 }
%struct.MDMA_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_OSPI_AbortCpltCallback(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare hidden void @OSPI_DMAAbortCplt(ptr noundef) #1

declare i32 @HAL_MDMA_Abort_IT(ptr noundef) #2

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_OSPI_Abort_IT(ptr noundef %0) #1 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  store i32 0, ptr %3, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  %5 = load ptr, ptr %2, align 8, !tbaa !5
  %6 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %5, i32 0, i32 6
  %7 = load volatile i32, ptr %6, align 8, !tbaa !11
  store i32 %7, ptr %4, align 4, !tbaa !9
  %8 = load i32, ptr %4, align 4, !tbaa !9
  %9 = and i32 %8, 8
  %10 = icmp ne i32 %9, 0
  br i1 %10, label %15, label %11

11:                                               ; preds = %1
  %12 = load i32, ptr %4, align 4, !tbaa !9
  %13 = and i32 %12, 4
  %14 = icmp ne i32 %13, 0
  br i1 %14, label %15, label %96

15:                                               ; preds = %11, %1
  %16 = load ptr, ptr %2, align 8, !tbaa !5
  %17 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %16, i32 0, i32 0
  %18 = load ptr, ptr %17, align 8, !tbaa !14
  %19 = getelementptr inbounds %struct.OCTOSPI_TypeDef, ptr %18, i32 0, i32 0
  %20 = load volatile i32, ptr %19, align 4, !tbaa !15
  %21 = zext i32 %20 to i64
  %22 = and i64 %21, -2031617
  %23 = trunc i64 %22 to i32
  store volatile i32 %23, ptr %19, align 4, !tbaa !15
  %24 = load ptr, ptr %2, align 8, !tbaa !5
  %25 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %24, i32 0, i32 6
  store volatile i32 256, ptr %25, align 8, !tbaa !11
  %26 = load ptr, ptr %2, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %26, i32 0, i32 0
  %28 = load ptr, ptr %27, align 8, !tbaa !14
  %29 = getelementptr inbounds %struct.OCTOSPI_TypeDef, ptr %28, i32 0, i32 0
  %30 = load volatile i32, ptr %29, align 4, !tbaa !15
  %31 = zext i32 %30 to i64
  %32 = and i64 %31, 4
  %33 = icmp ne i64 %32, 0
  br i1 %33, label %34, label %57

34:                                               ; preds = %15
  %35 = load ptr, ptr %2, align 8, !tbaa !5
  %36 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %35, i32 0, i32 0
  %37 = load ptr, ptr %36, align 8, !tbaa !14
  %38 = getelementptr inbounds %struct.OCTOSPI_TypeDef, ptr %37, i32 0, i32 0
  %39 = load volatile i32, ptr %38, align 4, !tbaa !15
  %40 = zext i32 %39 to i64
  %41 = and i64 %40, -5
  %42 = trunc i64 %41 to i32
  store volatile i32 %42, ptr %38, align 4, !tbaa !15
  %43 = load ptr, ptr %2, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %43, i32 0, i32 5
  %45 = load ptr, ptr %44, align 8, !tbaa !17
  %46 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %45, i32 0, i32 10
  store ptr @OSPI_DMAAbortCplt, ptr %46, align 8, !tbaa !18
  %47 = load ptr, ptr %2, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %47, i32 0, i32 5
  %49 = load ptr, ptr %48, align 8, !tbaa !17
  %50 = call i32 @HAL_MDMA_Abort_IT(ptr noundef %49)
  %51 = icmp ne i32 %50, 0
  br i1 %51, label %52, label %56

52:                                               ; preds = %34
  %53 = load ptr, ptr %2, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %53, i32 0, i32 6
  store volatile i32 2, ptr %54, align 8, !tbaa !11
  %55 = load ptr, ptr %2, align 8, !tbaa !5
  call void @HAL_OSPI_AbortCpltCallback(ptr noundef %55)
  br label %56

56:                                               ; preds = %52, %34
  br label %95

57:                                               ; preds = %15
  %58 = load ptr, ptr %2, align 8, !tbaa !5
  %59 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %58, i32 0, i32 0
  %60 = load ptr, ptr %59, align 8, !tbaa !14
  %61 = getelementptr inbounds %struct.OCTOSPI_TypeDef, ptr %60, i32 0, i32 7
  %62 = load volatile i32, ptr %61, align 4, !tbaa !21
  %63 = zext i32 %62 to i64
  %64 = and i64 %63, 32
  %65 = icmp ne i64 %64, 0
  %66 = zext i1 %65 to i64
  %67 = select i1 %65, i32 1, i32 0
  %68 = icmp ne i32 %67, 0
  br i1 %68, label %69, label %90

69:                                               ; preds = %57
  %70 = load ptr, ptr %2, align 8, !tbaa !5
  %71 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %70, i32 0, i32 0
  %72 = load ptr, ptr %71, align 8, !tbaa !14
  %73 = getelementptr inbounds %struct.OCTOSPI_TypeDef, ptr %72, i32 0, i32 8
  store volatile i32 2, ptr %73, align 4, !tbaa !22
  %74 = load ptr, ptr %2, align 8, !tbaa !5
  %75 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %74, i32 0, i32 0
  %76 = load ptr, ptr %75, align 8, !tbaa !14
  %77 = getelementptr inbounds %struct.OCTOSPI_TypeDef, ptr %76, i32 0, i32 0
  %78 = load volatile i32, ptr %77, align 4, !tbaa !15
  %79 = zext i32 %78 to i64
  %80 = or i64 %79, 131072
  %81 = trunc i64 %80 to i32
  store volatile i32 %81, ptr %77, align 4, !tbaa !15
  %82 = load ptr, ptr %2, align 8, !tbaa !5
  %83 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %82, i32 0, i32 0
  %84 = load ptr, ptr %83, align 8, !tbaa !14
  %85 = getelementptr inbounds %struct.OCTOSPI_TypeDef, ptr %84, i32 0, i32 0
  %86 = load volatile i32, ptr %85, align 4, !tbaa !15
  %87 = zext i32 %86 to i64
  %88 = or i64 %87, 2
  %89 = trunc i64 %88 to i32
  store volatile i32 %89, ptr %85, align 4, !tbaa !15
  br label %94

90:                                               ; preds = %57
  %91 = load ptr, ptr %2, align 8, !tbaa !5
  %92 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %91, i32 0, i32 6
  store volatile i32 2, ptr %92, align 8, !tbaa !11
  %93 = load ptr, ptr %2, align 8, !tbaa !5
  call void @HAL_OSPI_AbortCpltCallback(ptr noundef %93)
  br label %94

94:                                               ; preds = %90, %69
  br label %95

95:                                               ; preds = %94, %56
  br label %99

96:                                               ; preds = %11
  store i32 1, ptr %3, align 4, !tbaa !9
  %97 = load ptr, ptr %2, align 8, !tbaa !5
  %98 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %97, i32 0, i32 7
  store volatile i32 16, ptr %98, align 4, !tbaa !23
  br label %99

99:                                               ; preds = %96, %95
  %100 = load i32, ptr %3, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  ret i32 %100
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 96}
!12 = !{!"", !6, i64 0, !13, i64 8, !6, i64 72, !10, i64 80, !10, i64 84, !6, i64 88, !10, i64 96, !10, i64 100, !10, i64 104}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56}
!14 = !{!12, !6, i64 0}
!15 = !{!16, !10, i64 0}
!16 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !7, i64 24, !10, i64 32, !10, i64 36, !7, i64 40, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !7, i64 84, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144, !7, i64 148, !10, i64 256, !10, i64 260, !10, i64 264, !10, i64 268, !10, i64 272, !7, i64 276, !10, i64 288, !7, i64 292, !10, i64 304, !7, i64 308, !10, i64 320, !10, i64 324, !10, i64 328, !10, i64 332, !10, i64 336, !7, i64 340, !10, i64 352, !7, i64 356, !10, i64 384, !10, i64 388, !10, i64 392, !10, i64 396, !10, i64 400, !7, i64 404, !10, i64 416, !7, i64 420, !10, i64 512, !7, i64 516, !10, i64 1004, !10, i64 1008, !10, i64 1012, !10, i64 1016}
!17 = !{!12, !6, i64 88}
!18 = !{!19, !6, i64 120}
!19 = !{!"__MDMA_HandleTypeDef", !6, i64 0, !20, i64 8, !10, i64 64, !10, i64 68, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !6, i64 120, !6, i64 128, !6, i64 136, !10, i64 144, !10, i64 148}
!20 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52}
!21 = !{!16, !10, i64 32}
!22 = !{!16, !10, i64 36}
!23 = !{!12, !10, i64 100}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local void @HAL_OSPI_AbortCpltCallback(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare hidden void @OSPI_DMAAbortCplt(ptr noundef) #0

declare i32 @HAL_MDMA_Abort_IT(ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @HAL_OSPI_Abort_IT(ptr noundef %0) local_unnamed_addr #0 {
  %2 = getelementptr inbounds i8, ptr %0, i64 96
  %3 = load volatile i32, ptr %2, align 8, !tbaa !5
  %4 = and i32 %3, 12
  %or.cond = icmp eq i32 %4, 0
  br i1 %or.cond, label %30, label %5

5:                                                ; preds = %1
  %6 = load ptr, ptr %0, align 8, !tbaa !12
  %7 = load volatile i32, ptr %6, align 4, !tbaa !13
  %8 = and i32 %7, -2031617
  store volatile i32 %8, ptr %6, align 4, !tbaa !13
  store volatile i32 256, ptr %2, align 8, !tbaa !5
  %9 = load volatile i32, ptr %6, align 4, !tbaa !13
  %10 = and i32 %9, 4
  %.not19 = icmp eq i32 %10, 0
  br i1 %.not19, label %19, label %11

11:                                               ; preds = %5
  %12 = load volatile i32, ptr %6, align 4, !tbaa !13
  %13 = and i32 %12, -5
  store volatile i32 %13, ptr %6, align 4, !tbaa !13
  %14 = getelementptr inbounds i8, ptr %0, i64 88
  %15 = load ptr, ptr %14, align 8, !tbaa !15
  %16 = getelementptr inbounds i8, ptr %15, i64 120
  store ptr @OSPI_DMAAbortCplt, ptr %16, align 8, !tbaa !16
  %17 = tail call i32 @HAL_MDMA_Abort_IT(ptr noundef %15) #2
  %.not21 = icmp eq i32 %17, 0
  br i1 %.not21, label %32, label %18

18:                                               ; preds = %11
  store volatile i32 2, ptr %2, align 8, !tbaa !5
  tail call void @HAL_OSPI_AbortCpltCallback(ptr noundef nonnull %0)
  br label %32

19:                                               ; preds = %5
  %20 = getelementptr inbounds i8, ptr %6, i64 32
  %21 = load volatile i32, ptr %20, align 4, !tbaa !19
  %22 = and i32 %21, 32
  %.not20 = icmp eq i32 %22, 0
  br i1 %.not20, label %29, label %23

23:                                               ; preds = %19
  %24 = getelementptr inbounds i8, ptr %6, i64 36
  store volatile i32 2, ptr %24, align 4, !tbaa !20
  %25 = load volatile i32, ptr %6, align 4, !tbaa !13
  %26 = or i32 %25, 131072
  store volatile i32 %26, ptr %6, align 4, !tbaa !13
  %27 = load volatile i32, ptr %6, align 4, !tbaa !13
  %28 = or i32 %27, 2
  store volatile i32 %28, ptr %6, align 4, !tbaa !13
  br label %32

29:                                               ; preds = %19
  store volatile i32 2, ptr %2, align 8, !tbaa !5
  tail call void @HAL_OSPI_AbortCpltCallback(ptr noundef nonnull %0)
  br label %32

30:                                               ; preds = %1
  %31 = getelementptr inbounds i8, ptr %0, i64 100
  store volatile i32 16, ptr %31, align 4, !tbaa !21
  br label %32

32:                                               ; preds = %18, %11, %29, %23, %30
  %.0 = phi i32 [ 0, %18 ], [ 0, %11 ], [ 0, %23 ], [ 0, %29 ], [ 1, %30 ]
  ret i32 %.0
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 96}
!6 = !{!"", !7, i64 0, !10, i64 8, !7, i64 72, !11, i64 80, !11, i64 84, !7, i64 88, !11, i64 96, !11, i64 100, !11, i64 104}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56}
!11 = !{!"int", !8, i64 0}
!12 = !{!6, !7, i64 0}
!13 = !{!14, !11, i64 0}
!14 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !8, i64 24, !11, i64 32, !11, i64 36, !8, i64 40, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !8, i64 84, !11, i64 128, !11, i64 132, !11, i64 136, !11, i64 140, !11, i64 144, !8, i64 148, !11, i64 256, !11, i64 260, !11, i64 264, !11, i64 268, !11, i64 272, !8, i64 276, !11, i64 288, !8, i64 292, !11, i64 304, !8, i64 308, !11, i64 320, !11, i64 324, !11, i64 328, !11, i64 332, !11, i64 336, !8, i64 340, !11, i64 352, !8, i64 356, !11, i64 384, !11, i64 388, !11, i64 392, !11, i64 396, !11, i64 400, !8, i64 404, !11, i64 416, !8, i64 420, !11, i64 512, !8, i64 516, !11, i64 1004, !11, i64 1008, !11, i64 1012, !11, i64 1016}
!15 = !{!6, !7, i64 88}
!16 = !{!17, !7, i64 120}
!17 = !{!"__MDMA_HandleTypeDef", !7, i64 0, !18, i64 8, !11, i64 64, !11, i64 68, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !7, i64 120, !7, i64 128, !7, i64 136, !11, i64 144, !11, i64 148}
!18 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52}
!19 = !{!14, !11, i64 32}
!20 = !{!14, !11, i64 36}
!21 = !{!6, !11, i64 100}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass