; LLVM IR from reazon-research/OpenArm :: control/canfd_control/Drivers/STM32H7xx_HAL_Driver/Src (stm32h7xx_hal_fdcan)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.FDCAN_HandleTypeDef = type { ptr, ptr, %struct.FDCAN_InitTypeDef, %struct.FDCAN_MsgRamAddressTypeDef, i32, i32, i32, i32 }
%struct.FDCAN_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.FDCAN_MsgRamAddressTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.FDCAN_TxHeaderTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.FDCAN_GlobalTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i32], i32, i32, i32, i32, i32, i32, i32, i32, [8 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [2 x i32], i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare hidden void @FDCAN_CopyMessageToRAM(ptr noundef, ptr noundef, ptr noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_FDCAN_AddMessageToTxBuffer(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) #1 {
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store ptr %2, ptr %8, align 8, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  %12 = load ptr, ptr %6, align 8, !tbaa !5
  %13 = getelementptr inbounds %struct.FDCAN_HandleTypeDef, ptr %12, i32 0, i32 5
  %14 = load volatile i32, ptr %13, align 8, !tbaa !11
  store i32 %14, ptr %10, align 4, !tbaa !9
  %15 = load ptr, ptr %7, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.FDCAN_TxHeaderTypeDef, ptr %15, i32 0, i32 1
  %17 = load i32, ptr %16, align 4, !tbaa !15
  %18 = icmp eq i32 %17, 0
  br i1 %18, label %19, label %20

19:                                               ; preds = %4
  br label %21

20:                                               ; preds = %4
  br label %21

21:                                               ; preds = %20, %19
  %22 = load i32, ptr %10, align 4, !tbaa !9
  %23 = icmp eq i32 %22, 1
  br i1 %23, label %27, label %24

24:                                               ; preds = %21
  %25 = load i32, ptr %10, align 4, !tbaa !9
  %26 = icmp eq i32 %25, 2
  br i1 %26, label %27, label %69

27:                                               ; preds = %24, %21
  %28 = load i32, ptr %9, align 4, !tbaa !9
  %29 = call i32 @__RBIT(i32 noundef %28)
  %30 = call zeroext i8 @__CLZ(i32 noundef %29)
  %31 = zext i8 %30 to i64
  %32 = load ptr, ptr %6, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.FDCAN_HandleTypeDef, ptr %32, i32 0, i32 0
  %34 = load ptr, ptr %33, align 8, !tbaa !17
  %35 = getelementptr inbounds %struct.FDCAN_GlobalTypeDef, ptr %34, i32 0, i32 38
  %36 = load volatile i32, ptr %35, align 4, !tbaa !18
  %37 = zext i32 %36 to i64
  %38 = and i64 %37, 4128768
  %39 = lshr i64 %38, 16
  %40 = icmp uge i64 %31, %39
  br i1 %40, label %41, label %46

41:                                               ; preds = %27
  %42 = load ptr, ptr %6, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.FDCAN_HandleTypeDef, ptr %42, i32 0, i32 7
  %44 = load volatile i32, ptr %43, align 8, !tbaa !20
  %45 = or i32 %44, 32
  store volatile i32 %45, ptr %43, align 8, !tbaa !20
  store i32 1, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %74

46:                                               ; preds = %27
  %47 = load ptr, ptr %6, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.FDCAN_HandleTypeDef, ptr %47, i32 0, i32 0
  %49 = load ptr, ptr %48, align 8, !tbaa !17
  %50 = getelementptr inbounds %struct.FDCAN_GlobalTypeDef, ptr %49, i32 0, i32 41
  %51 = load volatile i32, ptr %50, align 4, !tbaa !21
  %52 = load i32, ptr %9, align 4, !tbaa !9
  %53 = and i32 %51, %52
  %54 = icmp ne i32 %53, 0
  br i1 %54, label %55, label %60

55:                                               ; preds = %46
  %56 = load ptr, ptr %6, align 8, !tbaa !5
  %57 = getelementptr inbounds %struct.FDCAN_HandleTypeDef, ptr %56, i32 0, i32 7
  %58 = load volatile i32, ptr %57, align 8, !tbaa !20
  %59 = or i32 %58, 64
  store volatile i32 %59, ptr %57, align 8, !tbaa !20
  store i32 1, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %74

60:                                               ; preds = %46
  %61 = load ptr, ptr %6, align 8, !tbaa !5
  %62 = load ptr, ptr %7, align 8, !tbaa !5
  %63 = load ptr, ptr %8, align 8, !tbaa !5
  %64 = load i32, ptr %9, align 4, !tbaa !9
  %65 = call i32 @__RBIT(i32 noundef %64)
  %66 = call zeroext i8 @__CLZ(i32 noundef %65)
  %67 = zext i8 %66 to i32
  call void @FDCAN_CopyMessageToRAM(ptr noundef %61, ptr noundef %62, ptr noundef %63, i32 noundef %67)
  br label %68

68:                                               ; preds = %60
  store i32 0, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %74

69:                                               ; preds = %24
  %70 = load ptr, ptr %6, align 8, !tbaa !5
  %71 = getelementptr inbounds %struct.FDCAN_HandleTypeDef, ptr %70, i32 0, i32 7
  %72 = load volatile i32, ptr %71, align 8, !tbaa !20
  %73 = or i32 %72, 2
  store volatile i32 %73, ptr %71, align 8, !tbaa !20
  store i32 1, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %74

74:                                               ; preds = %69, %68, %55, %41
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  %75 = load i32, ptr %5, align 4
  ret i32 %75
}

; Function Attrs: alwaysinline nounwind uwtable
declare hidden zeroext i8 @__CLZ(i32 noundef) #2

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @__RBIT(i32 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 168}
!12 = !{!"", !6, i64 0, !6, i64 8, !13, i64 16, !14, i64 124, !10, i64 164, !10, i64 168, !10, i64 172, !10, i64 176}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !10, i64 96, !10, i64 100, !10, i64 104}
!14 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36}
!15 = !{!16, !10, i64 4}
!16 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32}
!17 = !{!12, !6, i64 0}
!18 = !{!19, !10, i64 192}
!19 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !7, i64 48, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !10, i64 92, !7, i64 96, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144, !10, i64 148, !10, i64 152, !10, i64 156, !10, i64 160, !10, i64 164, !10, i64 168, !10, i64 172, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !10, i64 192, !10, i64 196, !10, i64 200, !10, i64 204, !10, i64 208, !10, i64 212, !10, i64 216, !10, i64 220, !10, i64 224, !10, i64 228, !7, i64 232, !10, i64 240, !10, i64 244, !10, i64 248, !10, i64 252}
!20 = !{!12, !10, i64 176}
!21 = !{!19, !10, i64 204}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare hidden void @FDCAN_CopyMessageToRAM(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @HAL_FDCAN_AddMessageToTxBuffer(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  %5 = getelementptr inbounds i8, ptr %0, i64 168
  %6 = load volatile i32, ptr %5, align 8, !tbaa !5
  %7 = add i32 %6, -1
  %or.cond = icmp ult i32 %7, 2
  br i1 %or.cond, label %8, label %33

8:                                                ; preds = %4
  %9 = tail call i32 @__RBIT(i32 noundef %3)
  %10 = tail call zeroext i8 @__CLZ(i32 noundef %9)
  %11 = load ptr, ptr %0, align 8, !tbaa !13
  %12 = getelementptr inbounds i8, ptr %11, i64 192
  %13 = load volatile i32, ptr %12, align 4, !tbaa !14
  %14 = lshr i32 %13, 16
  %15 = and i32 %14, 63
  %16 = zext i8 %10 to i32
  %.not = icmp ugt i32 %15, %16
  br i1 %.not, label %21, label %17

17:                                               ; preds = %8
  %18 = getelementptr inbounds i8, ptr %0, i64 176
  %19 = load volatile i32, ptr %18, align 8, !tbaa !16
  %20 = or i32 %19, 32
  store volatile i32 %20, ptr %18, align 8, !tbaa !16
  br label %37

21:                                               ; preds = %8
  %22 = getelementptr inbounds i8, ptr %11, i64 204
  %23 = load volatile i32, ptr %22, align 4, !tbaa !17
  %24 = and i32 %23, %3
  %.not15 = icmp eq i32 %24, 0
  br i1 %.not15, label %29, label %25

25:                                               ; preds = %21
  %26 = getelementptr inbounds i8, ptr %0, i64 176
  %27 = load volatile i32, ptr %26, align 8, !tbaa !16
  %28 = or i32 %27, 64
  store volatile i32 %28, ptr %26, align 8, !tbaa !16
  br label %37

29:                                               ; preds = %21
  %30 = tail call i32 @__RBIT(i32 noundef %3)
  %31 = tail call zeroext i8 @__CLZ(i32 noundef %30)
  %32 = zext i8 %31 to i32
  tail call void @FDCAN_CopyMessageToRAM(ptr noundef nonnull %0, ptr noundef %1, ptr noundef %2, i32 noundef %32)
  br label %37

33:                                               ; preds = %4
  %34 = getelementptr inbounds i8, ptr %0, i64 176
  %35 = load volatile i32, ptr %34, align 8, !tbaa !16
  %36 = or i32 %35, 2
  store volatile i32 %36, ptr %34, align 8, !tbaa !16
  br label %37

37:                                               ; preds = %33, %29, %25, %17
  %.0 = phi i32 [ 1, %17 ], [ 1, %25 ], [ 0, %29 ], [ 1, %33 ]
  ret i32 %.0
}

; Function Attrs: alwaysinline nounwind uwtable
declare hidden zeroext i8 @__CLZ(i32 noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @__RBIT(i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 168}
!6 = !{!"", !7, i64 0, !7, i64 8, !10, i64 16, !12, i64 124, !11, i64 164, !11, i64 168, !11, i64 172, !11, i64 176}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92, !11, i64 96, !11, i64 100, !11, i64 104}
!11 = !{!"int", !8, i64 0}
!12 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36}
!13 = !{!6, !7, i64 0}
!14 = !{!15, !11, i64 192}
!15 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !8, i64 48, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84, !11, i64 88, !11, i64 92, !8, i64 96, !11, i64 128, !11, i64 132, !11, i64 136, !11, i64 140, !11, i64 144, !11, i64 148, !11, i64 152, !11, i64 156, !11, i64 160, !11, i64 164, !11, i64 168, !11, i64 172, !11, i64 176, !11, i64 180, !11, i64 184, !11, i64 188, !11, i64 192, !11, i64 196, !11, i64 200, !11, i64 204, !11, i64 208, !11, i64 212, !11, i64 216, !11, i64 220, !11, i64 224, !11, i64 228, !8, i64 232, !11, i64 240, !11, i64 244, !11, i64 248, !11, i64 252}
!16 = !{!6, !11, i64 176}
!17 = !{!15, !11, i64 204}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass