; LLVM IR from Shah-Shishir/Codeforces-Solutions :: 1072A. Golden Plate (main)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [9 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [4 x i8], align 1

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  br label %7

7:                                                ; preds = %37, %0
  %8 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef %2, ptr noundef %3, ptr noundef %4)
  %9 = icmp ne i32 %8, -1
  br i1 %9, label %10, label %40

10:                                               ; preds = %7
  store i32 0, ptr %6, align 4, !tbaa !5
  store i32 1, ptr %5, align 4, !tbaa !5
  br label %11

11:                                               ; preds = %34, %10
  %12 = load i32, ptr %5, align 4, !tbaa !5
  %13 = load i32, ptr %4, align 4, !tbaa !5
  %14 = icmp sle i32 %12, %13
  br i1 %14, label %15, label %37

15:                                               ; preds = %11
  %16 = load i32, ptr %5, align 4, !tbaa !5
  %17 = icmp sge i32 %16, 2
  br i1 %17, label %18, label %23

18:                                               ; preds = %15
  %19 = load i32, ptr %2, align 4, !tbaa !5
  %20 = sub nsw i32 %19, 4
  store i32 %20, ptr %2, align 4, !tbaa !5
  %21 = load i32, ptr %3, align 4, !tbaa !5
  %22 = sub nsw i32 %21, 4
  store i32 %22, ptr %3, align 4, !tbaa !5
  br label %26

23:                                               ; preds = %15
  %24 = load i32, ptr %2, align 4, !tbaa !5
  %25 = sub nsw i32 %24, 2
  store i32 %25, ptr %2, align 4, !tbaa !5
  br label %26

26:                                               ; preds = %23, %18
  %27 = load i32, ptr %2, align 4, !tbaa !5
  %28 = mul nsw i32 2, %27
  %29 = load i32, ptr %3, align 4, !tbaa !5
  %30 = mul nsw i32 2, %29
  %31 = add nsw i32 %28, %30
  %32 = load i32, ptr %6, align 4, !tbaa !5
  %33 = add nsw i32 %32, %31
  store i32 %33, ptr %6, align 4, !tbaa !5
  br label %34

34:                                               ; preds = %26
  %35 = load i32, ptr %5, align 4, !tbaa !5
  %36 = add nsw i32 %35, 1
  store i32 %36, ptr %5, align 4, !tbaa !5
  br label %11, !llvm.loop !9

37:                                               ; preds = %11
  %38 = load i32, ptr %6, align 4, !tbaa !5
  %39 = call i32 (ptr, ...) @printf(ptr noundef @.str.1, i32 noundef %38)
  br label %7, !llvm.loop !11

40:                                               ; preds = %7
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #3
  ret i32 0
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @__isoc99_scanf(ptr noundef, ...) #2

declare i32 @printf(ptr noundef, ...) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [9 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [4 x i8], align 1

; Function Attrs: mustprogress nofree norecurse nounwind uwtable
define dso_local noundef i32 @main() local_unnamed_addr #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #4
  %4 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull %1, ptr noundef nonnull %2, ptr noundef nonnull %3)
  %.not11 = icmp eq i32 %4, -1
  br i1 %.not11, label %._crit_edge12, label %.preheader

.preheader:                                       ; preds = %0, %._crit_edge
  %5 = load i32, ptr %3, align 4, !tbaa !5
  %.not68 = icmp slt i32 %5, 1
  br i1 %.not68, label %._crit_edge, label %6

6:                                                ; preds = %.preheader
  %.promoted7 = load i32, ptr %2, align 4, !tbaa !5
  %.promoted = load i32, ptr %1, align 4, !tbaa !5
  %7 = add nsw i32 %.promoted, -2
  store i32 %7, ptr %1, align 4
  %8 = add i32 %.promoted7, %7
  %9 = shl i32 %8, 1
  %exitcond.peel.not = icmp eq i32 %5, 1
  br i1 %exitcond.peel.not, label %._crit_edge, label %.lr.ph.peel.next.preheader

.lr.ph.peel.next.preheader:                       ; preds = %6
  %10 = add nsw i32 %5, -1
  %min.iters.check = icmp ult i32 %5, 9
  br i1 %min.iters.check, label %.lr.ph.peel.next.preheader32, label %vector.ph

vector.ph:                                        ; preds = %.lr.ph.peel.next.preheader
  %n.vec = and i32 %10, -8
  %ind.end = or disjoint i32 %n.vec, 2
  %11 = shl i32 %n.vec, 2
  %ind.end19 = sub i32 %7, %11
  %12 = shl i32 %n.vec, 2
  %ind.end21 = sub i32 %.promoted7, %12
  %13 = insertelement <4 x i32> <i32 poison, i32 0, i32 0, i32 0>, i32 %9, i64 0
  %.splatinsert = insertelement <4 x i32> poison, i32 %7, i64 0
  %.splat = shufflevector <4 x i32> %.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer
  %induction = add <4 x i32> %.splat, <i32 0, i32 -4, i32 -8, i32 -12>
  %.splatinsert25 = insertelement <4 x i32> poison, i32 %.promoted7, i64 0
  %.splat26 = shufflevector <4 x i32> %.splatinsert25, <4 x i32> poison, <4 x i32> zeroinitializer
  %induction27 = add <4 x i32> %.splat26, <i32 0, i32 -4, i32 -8, i32 -12>
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %vec.phi = phi <4 x i32> [ %13, %vector.ph ], [ %20, %vector.body ]
  %vec.phi23 = phi <4 x i32> [ zeroinitializer, %vector.ph ], [ %21, %vector.body ]
  %vec.ind = phi <4 x i32> [ %induction, %vector.ph ], [ %vec.ind.next, %vector.body ]
  %vec.ind28 = phi <4 x i32> [ %induction27, %vector.ph ], [ %vec.ind.next31, %vector.body ]
  %14 = add <4 x i32> %vec.ind28, %vec.ind
  %15 = add <4 x i32> %vec.ind28, %vec.ind
  %16 = shl <4 x i32> %14, <i32 1, i32 1, i32 1, i32 1>
  %17 = add <4 x i32> %16, <i32 -16, i32 -16, i32 -16, i32 -16>
  %18 = shl <4 x i32> %15, <i32 1, i32 1, i32 1, i32 1>
  %19 = add <4 x i32> %18, <i32 -80, i32 -80, i32 -80, i32 -80>
  %20 = add <4 x i32> %17, %vec.phi
  %21 = add <4 x i32> %19, %vec.phi23
  %index.next = add nuw i32 %index, 8
  %vec.ind.next = add <4 x i32> %vec.ind, <i32 -32, i32 -32, i32 -32, i32 -32>
  %vec.ind.next31 = add <4 x i32> %vec.ind28, <i32 -32, i32 -32, i32 -32, i32 -32>
  %22 = icmp eq i32 %index.next, %n.vec
  br i1 %22, label %middle.block, label %vector.body, !llvm.loop !9

middle.block:                                     ; preds = %vector.body
  %bin.rdx = add <4 x i32> %21, %20
  %23 = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %bin.rdx)
  %cmp.n = icmp eq i32 %10, %n.vec
  br i1 %cmp.n, label %._crit_edge.loopexit, label %.lr.ph.peel.next.preheader32

.lr.ph.peel.next.preheader32:                     ; preds = %middle.block, %.lr.ph.peel.next.preheader
  %.010.ph = phi i32 [ %9, %.lr.ph.peel.next.preheader ], [ %23, %middle.block ]
  %.059.ph = phi i32 [ 2, %.lr.ph.peel.next.preheader ], [ %ind.end, %middle.block ]
  %.ph = phi i32 [ %7, %.lr.ph.peel.next.preheader ], [ %ind.end19, %middle.block ]
  %.ph33 = phi i32 [ %.promoted7, %.lr.ph.peel.next.preheader ], [ %ind.end21, %middle.block ]
  br label %.lr.ph.peel.next

.lr.ph.peel.next:                                 ; preds = %.lr.ph.peel.next.preheader32, %.lr.ph.peel.next
  %.010 = phi i32 [ %30, %.lr.ph.peel.next ], [ %.010.ph, %.lr.ph.peel.next.preheader32 ]
  %.059 = phi i32 [ %31, %.lr.ph.peel.next ], [ %.059.ph, %.lr.ph.peel.next.preheader32 ]
  %24 = phi i32 [ %27, %.lr.ph.peel.next ], [ %.ph, %.lr.ph.peel.next.preheader32 ]
  %25 = phi i32 [ %26, %.lr.ph.peel.next ], [ %.ph33, %.lr.ph.peel.next.preheader32 ]
  %26 = add nsw i32 %25, -4
  %27 = add nsw i32 %24, -4
  %28 = add i32 %26, %27
  %29 = shl i32 %28, 1
  %30 = add nsw i32 %29, %.010
  %31 = add nuw i32 %.059, 1
  %exitcond.not = icmp eq i32 %.059, %5
  br i1 %exitcond.not, label %._crit_edge.loopexit, label %.lr.ph.peel.next, !llvm.loop !14

._crit_edge.loopexit:                             ; preds = %.lr.ph.peel.next, %middle.block
  %.lcssa18 = phi i32 [ %ind.end21, %middle.block ], [ %26, %.lr.ph.peel.next ]
  %.lcssa17 = phi i32 [ %ind.end19, %middle.block ], [ %27, %.lr.ph.peel.next ]
  %.lcssa = phi i32 [ %23, %middle.block ], [ %30, %.lr.ph.peel.next ]
  store i32 %.lcssa18, ptr %2, align 4, !tbaa !5
  store i32 %.lcssa17, ptr %1, align 4
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %6, %.preheader
  %.0.lcssa = phi i32 [ 0, %.preheader ], [ %9, %6 ], [ %.lcssa, %._crit_edge.loopexit ]
  %32 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1, i32 noundef %.0.lcssa)
  %33 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull %1, ptr noundef nonnull %2, ptr noundef nonnull %3)
  %.not = icmp eq i32 %33, -1
  br i1 %.not, label %._crit_edge12, label %.preheader, !llvm.loop !15

._crit_edge12:                                    ; preds = %._crit_edge, %0
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #4
  ret i32 0
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nofree nounwind
declare noundef i32 @__isoc99_scanf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.add.v4i32(<4 x i32>) #3

attributes #0 = { mustprogress nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10, !11, !12, !13}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.peeled.count", i32 1}
!12 = !{!"llvm.loop.isvectorized", i32 1}
!13 = !{!"llvm.loop.unroll.runtime.disable"}
!14 = distinct !{!14, !10, !11, !13, !12}
!15 = distinct !{!15, !10}


; Effective O3 passes: GVNPass,GlobalOptPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopFullUnrollPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,MergedLoadStoreMotionPass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass