; LLVM IR from ShahjalalShohag/code-library :: Number Theory/Dirichlet Convolution.ll (ZN9Dirichlet3p_cEx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.modint = type { i32 }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN6modintILi998244353EEC2Ei(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local i32 @_ZN9Dirichlet3p_cEx(i64 noundef %0) #1 {
  %2 = alloca %struct.modint, align 4
  %3 = alloca i64, align 8
  store i64 %0, ptr %3, align 8, !tbaa !5
  %4 = load i64, ptr %3, align 8, !tbaa !5
  %5 = srem i64 %4, 2
  %6 = icmp eq i64 %5, 0
  br i1 %6, label %7, label %17

7:                                                ; preds = %1
  %8 = load i64, ptr %3, align 8, !tbaa !5
  %9 = sdiv i64 %8, 2
  %10 = srem i64 %9, 998244353
  %11 = load i64, ptr %3, align 8, !tbaa !5
  %12 = add nsw i64 %11, 1
  %13 = srem i64 %12, 998244353
  %14 = mul nsw i64 %10, %13
  %15 = srem i64 %14, 998244353
  %16 = trunc i64 %15 to i32
  call void @_ZN6modintILi998244353EEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) %2, i32 noundef %16)
  br label %27

17:                                               ; preds = %1
  %18 = load i64, ptr %3, align 8, !tbaa !5
  %19 = add nsw i64 %18, 1
  %20 = sdiv i64 %19, 2
  %21 = srem i64 %20, 998244353
  %22 = load i64, ptr %3, align 8, !tbaa !5
  %23 = srem i64 %22, 998244353
  %24 = mul nsw i64 %21, %23
  %25 = srem i64 %24, 998244353
  %26 = trunc i64 %25 to i32
  call void @_ZN6modintILi998244353EEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) %2, i32 noundef %26)
  br label %27

27:                                               ; preds = %17, %7
  %28 = getelementptr inbounds %struct.modint, ptr %2, i32 0, i32 0
  %29 = load i32, ptr %28, align 4
  ret i32 %29
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.modint = type { i32 }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN6modintILi998244353EEC2Ei(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local i32 @_ZN9Dirichlet3p_cEx(i64 noundef %0) local_unnamed_addr #0 {
  %2 = alloca %struct.modint, align 4
  %3 = and i64 %0, 1
  %.sink = or i64 %0, 1
  %.sink6.in.in = add i64 %3, %0
  %.sink6.in = ashr exact i64 %.sink6.in.in, 1
  %.sink6 = srem i64 %.sink6.in, 998244353
  %4 = srem i64 %.sink, 998244353
  %5 = mul nsw i64 %.sink6, %4
  %6 = srem i64 %5, 998244353
  %7 = trunc nsw i64 %6 to i32
  call void @_ZN6modintILi998244353EEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) %2, i32 noundef %7)
  %8 = load i32, ptr %2, align 4
  ret i32 %8
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass