; LLVM IR from lfarcaro/ARINC653_ARMV7A_AM335X :: Hardware (uartStdio)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local void @UARTPutc(i8 noundef zeroext) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @UARTGetc() #1

; Function Attrs: nounwind uwtable
define dso_local i32 @UARTGetNum() #1 {
  %1 = alloca i8, align 1
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 1, ptr %1) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #2
  store i32 1, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  store i32 0, ptr %3, align 4, !tbaa !5
  %4 = call zeroext i8 @UARTGetc()
  store i8 %4, ptr %1, align 1, !tbaa !9
  %5 = load i8, ptr %1, align 1, !tbaa !9
  %6 = zext i8 %5 to i32
  %7 = icmp eq i32 45, %6
  br i1 %7, label %8, label %9

8:                                                ; preds = %0
  call void @UARTPutc(i8 noundef zeroext 45)
  store i32 -1, ptr %2, align 4, !tbaa !5
  br label %17

9:                                                ; preds = %0
  %10 = load i8, ptr %1, align 1, !tbaa !9
  call void @UARTPutc(i8 noundef zeroext %10)
  %11 = load i32, ptr %3, align 4, !tbaa !5
  %12 = mul nsw i32 %11, 10
  %13 = load i8, ptr %1, align 1, !tbaa !9
  %14 = zext i8 %13 to i32
  %15 = sub nsw i32 %14, 48
  %16 = add nsw i32 %12, %15
  store i32 %16, ptr %3, align 4, !tbaa !5
  br label %17

17:                                               ; preds = %9, %8
  br label %18

18:                                               ; preds = %32, %17
  %19 = call zeroext i8 @UARTGetc()
  store i8 %19, ptr %1, align 1, !tbaa !9
  %20 = load i8, ptr %1, align 1, !tbaa !9
  call void @UARTPutc(i8 noundef zeroext %20)
  %21 = load i8, ptr %1, align 1, !tbaa !9
  %22 = zext i8 %21 to i32
  %23 = icmp eq i32 13, %22
  br i1 %23, label %24, label %25

24:                                               ; preds = %18
  br label %33

25:                                               ; preds = %18
  %26 = load i32, ptr %3, align 4, !tbaa !5
  %27 = mul nsw i32 %26, 10
  %28 = load i8, ptr %1, align 1, !tbaa !9
  %29 = zext i8 %28 to i32
  %30 = sub nsw i32 %29, 48
  %31 = add nsw i32 %27, %30
  store i32 %31, ptr %3, align 4, !tbaa !5
  br label %32

32:                                               ; preds = %25
  br i1 true, label %18, label %33

33:                                               ; preds = %32, %24
  %34 = load i32, ptr %3, align 4, !tbaa !5
  %35 = load i32, ptr %2, align 4, !tbaa !5
  %36 = mul nsw i32 %34, %35
  store i32 %36, ptr %3, align 4, !tbaa !5
  %37 = load i32, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #2
  call void @llvm.lifetime.end.p0(i64 1, ptr %1) #2
  ret i32 %37
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local void @UARTPutc(i8 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @UARTGetc() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local i32 @UARTGetNum() local_unnamed_addr #0 {
  %1 = tail call zeroext i8 @UARTGetc()
  %2 = icmp eq i8 %1, 45
  br i1 %2, label %3, label %4

3:                                                ; preds = %0
  tail call void @UARTPutc(i8 noundef zeroext 45)
  br label %7

4:                                                ; preds = %0
  %5 = zext i8 %1 to i32
  tail call void @UARTPutc(i8 noundef zeroext %1)
  %6 = add nsw i32 %5, -48
  br label %7

7:                                                ; preds = %4, %3
  %.011 = phi i32 [ -1, %3 ], [ 1, %4 ]
  %.0 = phi i32 [ 0, %3 ], [ %6, %4 ]
  %8 = tail call zeroext i8 @UARTGetc()
  tail call void @UARTPutc(i8 noundef zeroext %8)
  %9 = icmp eq i8 %8, 13
  br i1 %9, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %7, %.lr.ph
  %10 = phi i8 [ %15, %.lr.ph ], [ %8, %7 ]
  %.114 = phi i32 [ %14, %.lr.ph ], [ %.0, %7 ]
  %11 = zext i8 %10 to i32
  %12 = mul nsw i32 %.114, 10
  %13 = add i32 %12, -48
  %14 = add i32 %13, %11
  %15 = tail call zeroext i8 @UARTGetc()
  tail call void @UARTPutc(i8 noundef zeroext %15)
  %16 = icmp eq i8 %15, 13
  br i1 %16, label %._crit_edge, label %.lr.ph

._crit_edge:                                      ; preds = %.lr.ph, %7
  %.1.lcssa = phi i32 [ %.0, %7 ], [ %14, %.lr.ph ]
  %17 = mul nsw i32 %.1.lcssa, %.011
  ret i32 %17
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass