; LLVM IR from ShahjalalShohag/code-library :: Math/Faulhaber Formula Fastest.ll (Z3fftRSt6vectorI4baseSaIS0_EEi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<base, std::allocator<base>>::_Vector_impl" }
%"struct.std::_Vector_base<base, std::allocator<base>>::_Vector_impl" = type { %"struct.std::_Vector_base<base, std::allocator<base>>::_Vector_impl_data" }
%"struct.std::_Vector_base<base, std::allocator<base>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.base = type { double, double }

@lim = external dso_local global i32, align 4
@roots = external dso_local global %"class.std::vector", align 8
@rev = external dso_local global %"class.std::vector.0", align 8
@.str = external hidden unnamed_addr constant [19 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [97 x i8], align 1
@__PRETTY_FUNCTION__._Z3fftRSt6vectorI4baseSaIS0_EEi = external hidden unnamed_addr constant [30 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z11ensure_basei(i32 noundef) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3fftRSt6vectorI4baseSaIS0_EEi(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1) #1 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca %struct.base, align 8
  %13 = alloca %struct.base, align 8
  %14 = alloca %struct.base, align 8
  %15 = alloca %struct.base, align 8
  %16 = alloca %struct.base, align 8
  %17 = alloca %struct.base, align 8
  %18 = alloca %struct.base, align 8
  %19 = alloca %struct.base, align 8
  %20 = alloca %struct.base, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  %21 = load i32, ptr %4, align 4, !tbaa !9
  %22 = icmp eq i32 %21, -1
  br i1 %22, label %23, label %27

23:                                               ; preds = %2
  %24 = load ptr, ptr %3, align 8, !tbaa !5
  %25 = call noundef i64 @_ZNKSt6vectorI4baseSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %24) #8
  %26 = trunc i64 %25 to i32
  store i32 %26, ptr %4, align 4, !tbaa !9
  br label %27

27:                                               ; preds = %23, %2
  %28 = load i32, ptr %4, align 4, !tbaa !9
  %29 = load i32, ptr %4, align 4, !tbaa !9
  %30 = sub nsw i32 %29, 1
  %31 = and i32 %28, %30
  %32 = icmp eq i32 %31, 0
  br i1 %32, label %33, label %34

33:                                               ; preds = %27
  br label %36

34:                                               ; preds = %27
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.4, i32 noundef 36, ptr noundef @__PRETTY_FUNCTION__._Z3fftRSt6vectorI4baseSaIS0_EEi) #9
  unreachable

35:                                               ; No predecessors!
  br label %36

36:                                               ; preds = %35, %33
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #8
  %37 = load i32, ptr %4, align 4, !tbaa !9
  %38 = call i32 @llvm.cttz.i32(i32 %37, i1 true)
  store i32 %38, ptr %5, align 4, !tbaa !9
  %39 = load i32, ptr %5, align 4, !tbaa !9
  call void @_Z11ensure_basei(i32 noundef %39)
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #8
  %40 = load i32, ptr @lim, align 4, !tbaa !9
  %41 = load i32, ptr %5, align 4, !tbaa !9
  %42 = sub nsw i32 %40, %41
  store i32 %42, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #8
  store i32 0, ptr %7, align 4, !tbaa !9
  br label %43

43:                                               ; preds = %72, %36
  %44 = load i32, ptr %7, align 4, !tbaa !9
  %45 = load i32, ptr %4, align 4, !tbaa !9
  %46 = icmp slt i32 %44, %45
  br i1 %46, label %48, label %47

47:                                               ; preds = %43
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #8
  br label %75

48:                                               ; preds = %43
  %49 = load i32, ptr %7, align 4, !tbaa !9
  %50 = load i32, ptr %7, align 4, !tbaa !9
  %51 = sext i32 %50 to i64
  %52 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @rev, i64 noundef %51) #8
  %53 = load i32, ptr %52, align 4, !tbaa !9
  %54 = load i32, ptr %6, align 4, !tbaa !9
  %55 = ashr i32 %53, %54
  %56 = icmp slt i32 %49, %55
  br i1 %56, label %57, label %71

57:                                               ; preds = %48
  %58 = load ptr, ptr %3, align 8, !tbaa !5
  %59 = load i32, ptr %7, align 4, !tbaa !9
  %60 = sext i32 %59 to i64
  %61 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %58, i64 noundef %60) #8
  %62 = load ptr, ptr %3, align 8, !tbaa !5
  %63 = load i32, ptr %7, align 4, !tbaa !9
  %64 = sext i32 %63 to i64
  %65 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @rev, i64 noundef %64) #8
  %66 = load i32, ptr %65, align 4, !tbaa !9
  %67 = load i32, ptr %6, align 4, !tbaa !9
  %68 = ashr i32 %66, %67
  %69 = sext i32 %68 to i64
  %70 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %62, i64 noundef %69) #8
  call void @_ZSt4swapI4baseENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS4_ESt18is_move_assignableIS4_EEE5valueEvE4typeERS4_SD_(ptr noundef nonnull align 8 dereferenceable(16) %61, ptr noundef nonnull align 8 dereferenceable(16) %70) #8
  br label %71

71:                                               ; preds = %57, %48
  br label %72

72:                                               ; preds = %71
  %73 = load i32, ptr %7, align 4, !tbaa !9
  %74 = add nsw i32 %73, 1
  store i32 %74, ptr %7, align 4, !tbaa !9
  br label %43, !llvm.loop !11

75:                                               ; preds = %47
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #8
  store i32 1, ptr %8, align 4, !tbaa !9
  br label %76

76:                                               ; preds = %182, %75
  %77 = load i32, ptr %8, align 4, !tbaa !9
  %78 = load i32, ptr %4, align 4, !tbaa !9
  %79 = icmp slt i32 %77, %78
  br i1 %79, label %81, label %80

80:                                               ; preds = %76
  store i32 5, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #8
  br label %185

81:                                               ; preds = %76
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #8
  store i32 0, ptr %10, align 4, !tbaa !9
  br label %82

82:                                               ; preds = %176, %81
  %83 = load i32, ptr %10, align 4, !tbaa !9
  %84 = load i32, ptr %4, align 4, !tbaa !9
  %85 = icmp slt i32 %83, %84
  br i1 %85, label %87, label %86

86:                                               ; preds = %82
  store i32 8, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #8
  br label %181

87:                                               ; preds = %82
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #8
  store i32 0, ptr %11, align 4, !tbaa !9
  br label %88

88:                                               ; preds = %172, %87
  %89 = load i32, ptr %11, align 4, !tbaa !9
  %90 = load i32, ptr %8, align 4, !tbaa !9
  %91 = icmp slt i32 %89, %90
  br i1 %91, label %93, label %92

92:                                               ; preds = %88
  store i32 11, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #8
  br label %175

93:                                               ; preds = %88
  call void @llvm.lifetime.start.p0(i64 16, ptr %12) #8
  %94 = load ptr, ptr %3, align 8, !tbaa !5
  %95 = load i32, ptr %10, align 4, !tbaa !9
  %96 = load i32, ptr %11, align 4, !tbaa !9
  %97 = add nsw i32 %95, %96
  %98 = load i32, ptr %8, align 4, !tbaa !9
  %99 = add nsw i32 %97, %98
  %100 = sext i32 %99 to i64
  %101 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %94, i64 noundef %100) #8
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %13, ptr align 8 %101, i64 16, i1 false), !tbaa.struct !13
  %102 = load i32, ptr %11, align 4, !tbaa !9
  %103 = load i32, ptr %8, align 4, !tbaa !9
  %104 = add nsw i32 %102, %103
  %105 = sext i32 %104 to i64
  %106 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @roots, i64 noundef %105) #8
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %14, ptr align 8 %106, i64 16, i1 false), !tbaa.struct !13
  %107 = getelementptr inbounds { double, double }, ptr %13, i32 0, i32 0
  %108 = load double, ptr %107, align 8
  %109 = getelementptr inbounds { double, double }, ptr %13, i32 0, i32 1
  %110 = load double, ptr %109, align 8
  %111 = getelementptr inbounds { double, double }, ptr %14, i32 0, i32 0
  %112 = load double, ptr %111, align 8
  %113 = getelementptr inbounds { double, double }, ptr %14, i32 0, i32 1
  %114 = load double, ptr %113, align 8
  %115 = call { double, double } @_Zml4baseS_(double %108, double %110, double %112, double %114)
  %116 = getelementptr inbounds { double, double }, ptr %12, i32 0, i32 0
  %117 = extractvalue { double, double } %115, 0
  store double %117, ptr %116, align 8
  %118 = getelementptr inbounds { double, double }, ptr %12, i32 0, i32 1
  %119 = extractvalue { double, double } %115, 1
  store double %119, ptr %118, align 8
  call void @llvm.lifetime.start.p0(i64 16, ptr %15) #8
  %120 = load ptr, ptr %3, align 8, !tbaa !5
  %121 = load i32, ptr %10, align 4, !tbaa !9
  %122 = load i32, ptr %11, align 4, !tbaa !9
  %123 = add nsw i32 %121, %122
  %124 = sext i32 %123 to i64
  %125 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %120, i64 noundef %124) #8
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %16, ptr align 8 %125, i64 16, i1 false), !tbaa.struct !13
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %17, ptr align 8 %12, i64 16, i1 false), !tbaa.struct !13
  %126 = getelementptr inbounds { double, double }, ptr %16, i32 0, i32 0
  %127 = load double, ptr %126, align 8
  %128 = getelementptr inbounds { double, double }, ptr %16, i32 0, i32 1
  %129 = load double, ptr %128, align 8
  %130 = getelementptr inbounds { double, double }, ptr %17, i32 0, i32 0
  %131 = load double, ptr %130, align 8
  %132 = getelementptr inbounds { double, double }, ptr %17, i32 0, i32 1
  %133 = load double, ptr %132, align 8
  %134 = call { double, double } @_Zmi4baseS_(double %127, double %129, double %131, double %133)
  %135 = getelementptr inbounds { double, double }, ptr %15, i32 0, i32 0
  %136 = extractvalue { double, double } %134, 0
  store double %136, ptr %135, align 8
  %137 = getelementptr inbounds { double, double }, ptr %15, i32 0, i32 1
  %138 = extractvalue { double, double } %134, 1
  store double %138, ptr %137, align 8
  %139 = load ptr, ptr %3, align 8, !tbaa !5
  %140 = load i32, ptr %10, align 4, !tbaa !9
  %141 = load i32, ptr %11, align 4, !tbaa !9
  %142 = add nsw i32 %140, %141
  %143 = load i32, ptr %8, align 4, !tbaa !9
  %144 = add nsw i32 %142, %143
  %145 = sext i32 %144 to i64
  %146 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %139, i64 noundef %145) #8
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %146, ptr align 8 %15, i64 16, i1 false), !tbaa.struct !13
  call void @llvm.lifetime.end.p0(i64 16, ptr %15) #8
  call void @llvm.lifetime.start.p0(i64 16, ptr %18) #8
  %147 = load ptr, ptr %3, align 8, !tbaa !5
  %148 = load i32, ptr %10, align 4, !tbaa !9
  %149 = load i32, ptr %11, align 4, !tbaa !9
  %150 = add nsw i32 %148, %149
  %151 = sext i32 %150 to i64
  %152 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %147, i64 noundef %151) #8
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %19, ptr align 8 %152, i64 16, i1 false), !tbaa.struct !13
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %20, ptr align 8 %12, i64 16, i1 false), !tbaa.struct !13
  %153 = getelementptr inbounds { double, double }, ptr %19, i32 0, i32 0
  %154 = load double, ptr %153, align 8
  %155 = getelementptr inbounds { double, double }, ptr %19, i32 0, i32 1
  %156 = load double, ptr %155, align 8
  %157 = getelementptr inbounds { double, double }, ptr %20, i32 0, i32 0
  %158 = load double, ptr %157, align 8
  %159 = getelementptr inbounds { double, double }, ptr %20, i32 0, i32 1
  %160 = load double, ptr %159, align 8
  %161 = call { double, double } @_Zpl4baseS_(double %154, double %156, double %158, double %160)
  %162 = getelementptr inbounds { double, double }, ptr %18, i32 0, i32 0
  %163 = extractvalue { double, double } %161, 0
  store double %163, ptr %162, align 8
  %164 = getelementptr inbounds { double, double }, ptr %18, i32 0, i32 1
  %165 = extractvalue { double, double } %161, 1
  store double %165, ptr %164, align 8
  %166 = load ptr, ptr %3, align 8, !tbaa !5
  %167 = load i32, ptr %10, align 4, !tbaa !9
  %168 = load i32, ptr %11, align 4, !tbaa !9
  %169 = add nsw i32 %167, %168
  %170 = sext i32 %169 to i64
  %171 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %166, i64 noundef %170) #8
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %171, ptr align 8 %18, i64 16, i1 false), !tbaa.struct !13
  call void @llvm.lifetime.end.p0(i64 16, ptr %18) #8
  call void @llvm.lifetime.end.p0(i64 16, ptr %12) #8
  br label %172

172:                                              ; preds = %93
  %173 = load i32, ptr %11, align 4, !tbaa !9
  %174 = add nsw i32 %173, 1
  store i32 %174, ptr %11, align 4, !tbaa !9
  br label %88, !llvm.loop !16

175:                                              ; preds = %92
  br label %176

176:                                              ; preds = %175
  %177 = load i32, ptr %8, align 4, !tbaa !9
  %178 = mul nsw i32 2, %177
  %179 = load i32, ptr %10, align 4, !tbaa !9
  %180 = add nsw i32 %179, %178
  store i32 %180, ptr %10, align 4, !tbaa !9
  br label %82, !llvm.loop !17

181:                                              ; preds = %86
  br label %182

182:                                              ; preds = %181
  %183 = load i32, ptr %8, align 4, !tbaa !9
  %184 = shl i32 %183, 1
  store i32 %184, ptr %8, align 4, !tbaa !9
  br label %76, !llvm.loop !18

185:                                              ; preds = %80
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #8
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI4baseSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #4

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.cttz.i32(i32, i1 immarg) #5

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapI4baseENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS4_ESt18is_move_assignableIS4_EEE5valueEvE4typeERS4_SD_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16)) #6

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local { double, double } @_Zml4baseS_(double, double, double, double) #7

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local { double, double } @_Zmi4baseS_(double, double, double, double) #7

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local { double, double } @_Zpl4baseS_(double, double, double, double) #7

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #6 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { nounwind }
attributes #9 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{i64 0, i64 8, !14, i64 8, i64 8, !14}
!14 = !{!15, !15, i64 0}
!15 = !{!"double", !7, i64 0}
!16 = distinct !{!16, !12}
!17 = distinct !{!17, !12}
!18 = distinct !{!18, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<base, std::allocator<base>>::_Vector_impl" }
%"struct.std::_Vector_base<base, std::allocator<base>>::_Vector_impl" = type { %"struct.std::_Vector_base<base, std::allocator<base>>::_Vector_impl_data" }
%"struct.std::_Vector_base<base, std::allocator<base>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@lim = external dso_local local_unnamed_addr global i32, align 4
@roots = external dso_local global %"class.std::vector", align 8
@rev = external dso_local global %"class.std::vector.0", align 8
@.str = external hidden unnamed_addr constant [19 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [97 x i8], align 1
@__PRETTY_FUNCTION__._Z3fftRSt6vectorI4baseSaIS0_EEi = external hidden unnamed_addr constant [30 x i8], align 1

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z11ensure_basei(i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3fftRSt6vectorI4baseSaIS0_EEi(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = icmp eq i32 %1, -1
  br i1 %3, label %4, label %7

4:                                                ; preds = %2
  %5 = tail call noundef i64 @_ZNKSt6vectorI4baseSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #7
  %6 = trunc i64 %5 to i32
  br label %7

7:                                                ; preds = %4, %2
  %.0 = phi i32 [ %6, %4 ], [ %1, %2 ]
  %8 = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 %.0)
  %9 = icmp ult i32 %8, 2
  br i1 %9, label %11, label %10

10:                                               ; preds = %7
  tail call void @__assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.4, i32 noundef 36, ptr noundef nonnull @__PRETTY_FUNCTION__._Z3fftRSt6vectorI4baseSaIS0_EEi) #8
  unreachable

11:                                               ; preds = %7
  %12 = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 %.0, i1 true)
  tail call void @_Z11ensure_basei(i32 noundef %12)
  %13 = load i32, ptr @lim, align 4, !tbaa !5
  %14 = sub nsw i32 %13, %12
  %15 = icmp sgt i32 %.0, 0
  br i1 %15, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %11
  %wide.trip.count = zext nneg i32 %.0 to i64
  br label %.lr.ph

.preheader66:                                     ; preds = %54
  %.not = icmp eq i32 %.0, 1
  br i1 %.not, label %._crit_edge, label %.preheader65.us

.preheader65.us:                                  ; preds = %.preheader66, %._crit_edge71.us
  %.06172.us = phi i32 [ %17, %._crit_edge71.us ], [ 1, %.preheader66 ]
  %16 = icmp sgt i32 %.06172.us, 0
  %17 = shl i32 %.06172.us, 1
  br i1 %16, label %.preheader.us.us.preheader, label %._crit_edge71.us

.preheader.us.us.preheader:                       ; preds = %.preheader65.us
  %18 = zext nneg i32 %.06172.us to i64
  %19 = zext i32 %17 to i64
  br label %.preheader.us.us

._crit_edge71.us:                                 ; preds = %._crit_edge.us.us, %.preheader65.us
  %20 = icmp slt i32 %17, %.0
  br i1 %20, label %.preheader65.us, label %._crit_edge, !llvm.loop !9

.preheader.us.us:                                 ; preds = %.preheader.us.us.preheader, %._crit_edge.us.us
  %indvars.iv85 = phi i64 [ 0, %.preheader.us.us.preheader ], [ %indvars.iv.next86, %._crit_edge.us.us ]
  br label %21

21:                                               ; preds = %21, %.preheader.us.us
  %indvars.iv80 = phi i64 [ %indvars.iv.next81, %21 ], [ 0, %.preheader.us.us ]
  %22 = add nuw nsw i64 %indvars.iv80, %indvars.iv85
  %23 = add nuw nsw i64 %22, %18
  %24 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %23) #7
  %.sroa.012.0.copyload.us.us = load double, ptr %24, align 8, !tbaa !11
  %.sroa.213.0..sroa_idx.us.us = getelementptr inbounds i8, ptr %24, i64 8
  %.sroa.213.0.copyload.us.us = load double, ptr %.sroa.213.0..sroa_idx.us.us, align 8, !tbaa !11
  %25 = add nuw nsw i64 %indvars.iv80, %18
  %26 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @roots, i64 noundef %25) #7
  %.sroa.010.0.copyload.us.us = load double, ptr %26, align 8, !tbaa !11
  %.sroa.211.0..sroa_idx.us.us = getelementptr inbounds i8, ptr %26, i64 8
  %.sroa.211.0.copyload.us.us = load double, ptr %.sroa.211.0..sroa_idx.us.us, align 8, !tbaa !11
  %27 = tail call { double, double } @_Zml4baseS_(double %.sroa.012.0.copyload.us.us, double %.sroa.213.0.copyload.us.us, double %.sroa.010.0.copyload.us.us, double %.sroa.211.0.copyload.us.us)
  %28 = extractvalue { double, double } %27, 0
  %29 = extractvalue { double, double } %27, 1
  %30 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %22) #7
  %.sroa.06.0.copyload.us.us = load double, ptr %30, align 8, !tbaa !11
  %.sroa.27.0..sroa_idx.us.us = getelementptr inbounds i8, ptr %30, i64 8
  %.sroa.27.0.copyload.us.us = load double, ptr %.sroa.27.0..sroa_idx.us.us, align 8, !tbaa !11
  %31 = tail call { double, double } @_Zmi4baseS_(double %.sroa.06.0.copyload.us.us, double %.sroa.27.0.copyload.us.us, double %28, double %29)
  %32 = extractvalue { double, double } %31, 0
  %33 = extractvalue { double, double } %31, 1
  %34 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %23) #7
  store double %32, ptr %34, align 8, !tbaa !11
  %.sroa.49.0..sroa_idx.us.us = getelementptr inbounds i8, ptr %34, i64 8
  store double %33, ptr %.sroa.49.0..sroa_idx.us.us, align 8, !tbaa !11
  %35 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %22) #7
  %.sroa.01.0.copyload.us.us = load double, ptr %35, align 8, !tbaa !11
  %.sroa.22.0..sroa_idx.us.us = getelementptr inbounds i8, ptr %35, i64 8
  %.sroa.22.0.copyload.us.us = load double, ptr %.sroa.22.0..sroa_idx.us.us, align 8, !tbaa !11
  %36 = tail call { double, double } @_Zpl4baseS_(double %.sroa.01.0.copyload.us.us, double %.sroa.22.0.copyload.us.us, double %28, double %29)
  %37 = extractvalue { double, double } %36, 0
  %38 = extractvalue { double, double } %36, 1
  %39 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %22) #7
  store double %37, ptr %39, align 8, !tbaa !11
  %.sroa.4.0..sroa_idx.us.us = getelementptr inbounds i8, ptr %39, i64 8
  store double %38, ptr %.sroa.4.0..sroa_idx.us.us, align 8, !tbaa !11
  %indvars.iv.next81 = add nuw nsw i64 %indvars.iv80, 1
  %exitcond84.not = icmp eq i64 %indvars.iv.next81, %18
  br i1 %exitcond84.not, label %._crit_edge.us.us, label %21, !llvm.loop !13

._crit_edge.us.us:                                ; preds = %21
  %indvars.iv.next86 = add nuw nsw i64 %indvars.iv85, %19
  %40 = trunc nuw i64 %indvars.iv.next86 to i32
  %41 = icmp sgt i32 %.0, %40
  br i1 %41, label %.preheader.us.us, label %._crit_edge71.us, !llvm.loop !14

.lr.ph:                                           ; preds = %.lr.ph.preheader, %54
  %indvars.iv = phi i64 [ 0, %.lr.ph.preheader ], [ %indvars.iv.next, %54 ]
  %42 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @rev, i64 noundef %indvars.iv) #7
  %43 = load i32, ptr %42, align 4, !tbaa !5
  %44 = ashr i32 %43, %14
  %45 = sext i32 %44 to i64
  %46 = icmp slt i64 %indvars.iv, %45
  br i1 %46, label %47, label %54

47:                                               ; preds = %.lr.ph
  %48 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #7
  %49 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @rev, i64 noundef %indvars.iv) #7
  %50 = load i32, ptr %49, align 4, !tbaa !5
  %51 = ashr i32 %50, %14
  %52 = sext i32 %51 to i64
  %53 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI4baseSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %52) #7
  tail call void @_ZSt4swapI4baseENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS4_ESt18is_move_assignableIS4_EEE5valueEvE4typeERS4_SD_(ptr noundef nonnull align 8 dereferenceable(16) %48, ptr noundef nonnull align 8 dereferenceable(16) %53) #7
  br label %54

54:                                               ; preds = %.lr.ph, %47
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %.preheader66, label %.lr.ph, !llvm.loop !15

._crit_edge:                                      ; preds = %._crit_edge71.us, %11, %.preheader66
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI4baseSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.cttz.i32(i32, i1 immarg) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapI4baseENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS4_ESt18is_move_assignableIS4_EEE5valueEvE4typeERS4_SD_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #4

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local { double, double } @_Zml4baseS_(double, double, double, double) local_unnamed_addr #5

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local { double, double } @_Zmi4baseS_(double, double, double, double) local_unnamed_addr #5

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local { double, double } @_Zpl4baseS_(double, double, double, double) local_unnamed_addr #5

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.ctpop.i32(i32) #6

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #7 = { nounwind }
attributes #8 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !12, i64 0}
!12 = !{!"double", !7, i64 0}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass