; LLVM IR from ShahjalalShohag/code-library :: Game Theory/Alpha Beta Pruning.ll (Z5powerxx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z5powerxx(i64 noundef %0, i64 noundef %1) #0 {
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  %5 = alloca i32, align 4
  store i64 %0, ptr %3, align 8, !tbaa !5
  store i64 %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 1, ptr %5, align 4, !tbaa !9
  %6 = load i64, ptr %3, align 8, !tbaa !5
  %7 = srem i64 %6, 1000000007
  store i64 %7, ptr %3, align 8, !tbaa !5
  %8 = load i64, ptr %3, align 8, !tbaa !5
  %9 = icmp slt i64 %8, 0
  br i1 %9, label %10, label %13

10:                                               ; preds = %2
  %11 = load i64, ptr %3, align 8, !tbaa !5
  %12 = add nsw i64 %11, 1000000007
  store i64 %12, ptr %3, align 8, !tbaa !5
  br label %13

13:                                               ; preds = %10, %2
  br label %14

14:                                               ; preds = %28, %13
  %15 = load i64, ptr %4, align 8, !tbaa !5
  %16 = icmp ne i64 %15, 0
  br i1 %16, label %17, label %35

17:                                               ; preds = %14
  %18 = load i64, ptr %4, align 8, !tbaa !5
  %19 = and i64 %18, 1
  %20 = icmp ne i64 %19, 0
  br i1 %20, label %21, label %28

21:                                               ; preds = %17
  %22 = load i32, ptr %5, align 4, !tbaa !9
  %23 = sext i32 %22 to i64
  %24 = load i64, ptr %3, align 8, !tbaa !5
  %25 = mul nsw i64 %23, %24
  %26 = srem i64 %25, 1000000007
  %27 = trunc i64 %26 to i32
  store i32 %27, ptr %5, align 4, !tbaa !9
  br label %28

28:                                               ; preds = %21, %17
  %29 = load i64, ptr %3, align 8, !tbaa !5
  %30 = load i64, ptr %3, align 8, !tbaa !5
  %31 = mul nsw i64 %29, %30
  %32 = srem i64 %31, 1000000007
  store i64 %32, ptr %3, align 8, !tbaa !5
  %33 = load i64, ptr %4, align 8, !tbaa !5
  %34 = ashr i64 %33, 1
  store i64 %34, ptr %4, align 8, !tbaa !5
  br label %14, !llvm.loop !11

35:                                               ; preds = %14
  %36 = load i32, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  ret i32 %36
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef range(i32 0, 1000000007) i32 @_Z5powerxx(i64 noundef %0, i64 noundef %1) local_unnamed_addr #0 {
  %.not17 = icmp eq i64 %1, 0
  br i1 %.not17, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %2
  %3 = srem i64 %0, 1000000007
  %4 = icmp slt i64 %3, 0
  %5 = add nsw i64 %3, 1000000007
  %spec.select = select i1 %4, i64 %5, i64 %3
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %12
  %.020 = phi i32 [ %.1, %12 ], [ 1, %.lr.ph.preheader ]
  %.01119 = phi i64 [ %15, %12 ], [ %1, %.lr.ph.preheader ]
  %.11318 = phi i64 [ %14, %12 ], [ %spec.select, %.lr.ph.preheader ]
  %6 = and i64 %.01119, 1
  %.not16 = icmp eq i64 %6, 0
  br i1 %.not16, label %12, label %7

7:                                                ; preds = %.lr.ph
  %8 = zext nneg i32 %.020 to i64
  %9 = mul nuw nsw i64 %.11318, %8
  %10 = urem i64 %9, 1000000007
  %11 = trunc nuw nsw i64 %10 to i32
  br label %12

12:                                               ; preds = %7, %.lr.ph
  %.1 = phi i32 [ %11, %7 ], [ %.020, %.lr.ph ]
  %13 = mul nuw nsw i64 %.11318, %.11318
  %14 = urem i64 %13, 1000000007
  %15 = ashr i64 %.01119, 1
  %.not = icmp ult i64 %.01119, 2
  br i1 %.not, label %._crit_edge, label %.lr.ph, !llvm.loop !5

._crit_edge:                                      ; preds = %12, %2
  %.0.lcssa = phi i32 [ 1, %2 ], [ %.1, %12 ]
  ret i32 %.0.lcssa
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass