; LLVM IR from Algo-Phantoms/Algo-Tree :: Code/C++/rat_in_maze.ll (Z5solveRSt6vectorIS_IiSaIiEESaIS1_EEPA20_iiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@dx = external dso_local global [4 x i32], align 16
@dy = external dso_local global [4 x i32], align 16

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z5validiii(i32 noundef, i32 noundef, i32 noundef) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z5solveRSt6vectorIS_IiSaIiEESaIS1_EEPA20_iiii(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #1 {
  %6 = alloca i1, align 1
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  store ptr %0, ptr %7, align 8, !tbaa !5
  store ptr %1, ptr %8, align 8, !tbaa !5
  store i32 %2, ptr %9, align 4, !tbaa !9
  store i32 %3, ptr %10, align 4, !tbaa !9
  store i32 %4, ptr %11, align 4, !tbaa !9
  %16 = load i32, ptr %10, align 4, !tbaa !9
  %17 = load i32, ptr %9, align 4, !tbaa !9
  %18 = icmp sgt i32 %16, %17
  br i1 %18, label %29, label %19

19:                                               ; preds = %5
  %20 = load i32, ptr %11, align 4, !tbaa !9
  %21 = load i32, ptr %9, align 4, !tbaa !9
  %22 = icmp sgt i32 %20, %21
  br i1 %22, label %29, label %23

23:                                               ; preds = %19
  %24 = load i32, ptr %11, align 4, !tbaa !9
  %25 = icmp slt i32 %24, 0
  br i1 %25, label %29, label %26

26:                                               ; preds = %23
  %27 = load i32, ptr %10, align 4, !tbaa !9
  %28 = icmp slt i32 %27, 0
  br i1 %28, label %29, label %30

29:                                               ; preds = %26, %23, %19, %5
  store i1 false, ptr %6, align 1
  br label %122

30:                                               ; preds = %26
  %31 = load i32, ptr %10, align 4, !tbaa !9
  %32 = load i32, ptr %9, align 4, !tbaa !9
  %33 = sub nsw i32 %32, 1
  %34 = icmp eq i32 %31, %33
  br i1 %34, label %35, label %48

35:                                               ; preds = %30
  %36 = load i32, ptr %11, align 4, !tbaa !9
  %37 = load i32, ptr %9, align 4, !tbaa !9
  %38 = sub nsw i32 %37, 1
  %39 = icmp eq i32 %36, %38
  br i1 %39, label %40, label %48

40:                                               ; preds = %35
  %41 = load ptr, ptr %7, align 8, !tbaa !5
  %42 = load i32, ptr %10, align 4, !tbaa !9
  %43 = sext i32 %42 to i64
  %44 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %41, i64 noundef %43) #3
  %45 = load i32, ptr %11, align 4, !tbaa !9
  %46 = sext i32 %45 to i64
  %47 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %44, i64 noundef %46) #3
  store i32 1, ptr %47, align 4, !tbaa !9
  store i1 true, ptr %6, align 1
  br label %122

48:                                               ; preds = %35, %30
  %49 = load ptr, ptr %7, align 8, !tbaa !5
  %50 = load i32, ptr %10, align 4, !tbaa !9
  %51 = sext i32 %50 to i64
  %52 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %49, i64 noundef %51) #3
  %53 = load i32, ptr %11, align 4, !tbaa !9
  %54 = sext i32 %53 to i64
  %55 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %52, i64 noundef %54) #3
  store i32 1, ptr %55, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  store i32 0, ptr %12, align 4, !tbaa !9
  br label %56

56:                                               ; preds = %109, %48
  %57 = load i32, ptr %12, align 4, !tbaa !9
  %58 = icmp slt i32 %57, 4
  br i1 %58, label %60, label %59

59:                                               ; preds = %56
  store i32 2, ptr %13, align 4
  br label %112

60:                                               ; preds = %56
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  %61 = load i32, ptr %10, align 4, !tbaa !9
  %62 = load i32, ptr %12, align 4, !tbaa !9
  %63 = sext i32 %62 to i64
  %64 = getelementptr inbounds [4 x i32], ptr @dx, i64 0, i64 %63
  %65 = load i32, ptr %64, align 4, !tbaa !9
  %66 = add nsw i32 %61, %65
  store i32 %66, ptr %14, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  %67 = load i32, ptr %11, align 4, !tbaa !9
  %68 = load i32, ptr %12, align 4, !tbaa !9
  %69 = sext i32 %68 to i64
  %70 = getelementptr inbounds [4 x i32], ptr @dy, i64 0, i64 %69
  %71 = load i32, ptr %70, align 4, !tbaa !9
  %72 = add nsw i32 %67, %71
  store i32 %72, ptr %15, align 4, !tbaa !9
  %73 = load ptr, ptr %8, align 8, !tbaa !5
  %74 = load i32, ptr %14, align 4, !tbaa !9
  %75 = sext i32 %74 to i64
  %76 = getelementptr inbounds [20 x i32], ptr %73, i64 %75
  %77 = load i32, ptr %15, align 4, !tbaa !9
  %78 = sext i32 %77 to i64
  %79 = getelementptr inbounds [20 x i32], ptr %76, i64 0, i64 %78
  %80 = load i32, ptr %79, align 4, !tbaa !9
  %81 = icmp eq i32 %80, 1
  br i1 %81, label %82, label %105

82:                                               ; preds = %60
  %83 = load i32, ptr %14, align 4, !tbaa !9
  %84 = load i32, ptr %15, align 4, !tbaa !9
  %85 = load i32, ptr %9, align 4, !tbaa !9
  %86 = call noundef zeroext i1 @_Z5validiii(i32 noundef %83, i32 noundef %84, i32 noundef %85)
  br i1 %86, label %87, label %105

87:                                               ; preds = %82
  %88 = load ptr, ptr %7, align 8, !tbaa !5
  %89 = load i32, ptr %14, align 4, !tbaa !9
  %90 = sext i32 %89 to i64
  %91 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %88, i64 noundef %90) #3
  %92 = load i32, ptr %15, align 4, !tbaa !9
  %93 = sext i32 %92 to i64
  %94 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %91, i64 noundef %93) #3
  %95 = load i32, ptr %94, align 4, !tbaa !9
  %96 = icmp eq i32 %95, 0
  br i1 %96, label %97, label %105

97:                                               ; preds = %87
  %98 = load ptr, ptr %7, align 8, !tbaa !5
  %99 = load ptr, ptr %8, align 8, !tbaa !5
  %100 = load i32, ptr %9, align 4, !tbaa !9
  %101 = load i32, ptr %14, align 4, !tbaa !9
  %102 = load i32, ptr %15, align 4, !tbaa !9
  %103 = call noundef zeroext i1 @_Z5solveRSt6vectorIS_IiSaIiEESaIS1_EEPA20_iiii(ptr noundef nonnull align 8 dereferenceable(24) %98, ptr noundef %99, i32 noundef %100, i32 noundef %101, i32 noundef %102)
  br i1 %103, label %104, label %105

104:                                              ; preds = %97
  store i1 true, ptr %6, align 1
  store i32 1, ptr %13, align 4
  br label %106

105:                                              ; preds = %97, %87, %82, %60
  store i32 0, ptr %13, align 4
  br label %106

106:                                              ; preds = %105, %104
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  %107 = load i32, ptr %13, align 4
  switch i32 %107, label %112 [
    i32 0, label %108
  ]

108:                                              ; preds = %106
  br label %109

109:                                              ; preds = %108
  %110 = load i32, ptr %12, align 4, !tbaa !9
  %111 = add nsw i32 %110, 1
  store i32 %111, ptr %12, align 4, !tbaa !9
  br label %56, !llvm.loop !11

112:                                              ; preds = %106, %59
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  %113 = load i32, ptr %13, align 4
  switch i32 %113, label %124 [
    i32 2, label %114
    i32 1, label %122
  ]

114:                                              ; preds = %112
  %115 = load ptr, ptr %7, align 8, !tbaa !5
  %116 = load i32, ptr %10, align 4, !tbaa !9
  %117 = sext i32 %116 to i64
  %118 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %115, i64 noundef %117) #3
  %119 = load i32, ptr %11, align 4, !tbaa !9
  %120 = sext i32 %119 to i64
  %121 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %118, i64 noundef %120) #3
  store i32 0, ptr %121, align 4, !tbaa !9
  store i1 false, ptr %6, align 1
  br label %122

122:                                              ; preds = %114, %112, %40, %29
  %123 = load i1, ptr %6, align 1
  ret i1 %123

124:                                              ; preds = %112
  unreachable
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@dx = external dso_local local_unnamed_addr global [4 x i32], align 16
@dy = external dso_local local_unnamed_addr global [4 x i32], align 16

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z5validiii(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z5solveRSt6vectorIS_IiSaIiEESaIS1_EEPA20_iiii(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr nocapture noundef readonly %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #0 {
  %6 = icmp sgt i32 %3, %2
  br i1 %6, label %.loopexit, label %7

7:                                                ; preds = %5
  %8 = icmp sgt i32 %4, %2
  %9 = or i32 %4, %3
  %10 = icmp slt i32 %9, 0
  %or.cond3 = or i1 %8, %10
  br i1 %or.cond3, label %.loopexit, label %11

11:                                               ; preds = %7
  %12 = add nsw i32 %2, -1
  %13 = icmp eq i32 %12, %3
  %14 = icmp eq i32 %12, %4
  %or.cond = and i1 %13, %14
  %15 = zext nneg i32 %3 to i64
  %16 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %15) #1
  %17 = zext nneg i32 %4 to i64
  %18 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %16, i64 noundef %17) #1
  store i32 1, ptr %18, align 4, !tbaa !5
  br i1 %or.cond, label %.loopexit, label %19

19:                                               ; preds = %11
  %20 = load i32, ptr @dx, align 16, !tbaa !5
  %21 = add nsw i32 %20, %3
  %22 = load i32, ptr @dy, align 16, !tbaa !5
  %23 = add nsw i32 %22, %4
  %24 = sext i32 %21 to i64
  %25 = sext i32 %23 to i64
  %26 = getelementptr inbounds [20 x i32], ptr %1, i64 %24, i64 %25
  %27 = load i32, ptr %26, align 4, !tbaa !5
  %28 = icmp eq i32 %27, 1
  br i1 %28, label %29, label %.critedge

29:                                               ; preds = %19
  %30 = tail call noundef zeroext i1 @_Z5validiii(i32 noundef %21, i32 noundef %23, i32 noundef %2)
  br i1 %30, label %31, label %.critedge

31:                                               ; preds = %29
  %32 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %24) #1
  %33 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %32, i64 noundef %25) #1
  %34 = load i32, ptr %33, align 4, !tbaa !5
  %35 = icmp eq i32 %34, 0
  br i1 %35, label %36, label %.critedge

36:                                               ; preds = %31
  %37 = tail call noundef zeroext i1 @_Z5solveRSt6vectorIS_IiSaIiEESaIS1_EEPA20_iiii(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull %1, i32 noundef %2, i32 noundef %21, i32 noundef %23)
  br i1 %37, label %.loopexit, label %.critedge

.critedge:                                        ; preds = %36, %31, %29, %19
  %38 = load i32, ptr getelementptr inbounds (i8, ptr @dx, i64 4), align 4, !tbaa !5
  %39 = add nsw i32 %38, %3
  %40 = load i32, ptr getelementptr inbounds (i8, ptr @dy, i64 4), align 4, !tbaa !5
  %41 = add nsw i32 %40, %4
  %42 = sext i32 %39 to i64
  %43 = sext i32 %41 to i64
  %44 = getelementptr inbounds [20 x i32], ptr %1, i64 %42, i64 %43
  %45 = load i32, ptr %44, align 4, !tbaa !5
  %46 = icmp eq i32 %45, 1
  br i1 %46, label %47, label %.critedge.1

47:                                               ; preds = %.critedge
  %48 = tail call noundef zeroext i1 @_Z5validiii(i32 noundef %39, i32 noundef %41, i32 noundef %2)
  br i1 %48, label %49, label %.critedge.1

49:                                               ; preds = %47
  %50 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %42) #1
  %51 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %50, i64 noundef %43) #1
  %52 = load i32, ptr %51, align 4, !tbaa !5
  %53 = icmp eq i32 %52, 0
  br i1 %53, label %54, label %.critedge.1

54:                                               ; preds = %49
  %55 = tail call noundef zeroext i1 @_Z5solveRSt6vectorIS_IiSaIiEESaIS1_EEPA20_iiii(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull %1, i32 noundef %2, i32 noundef %39, i32 noundef %41)
  br i1 %55, label %.loopexit, label %.critedge.1

.critedge.1:                                      ; preds = %54, %49, %47, %.critedge
  %56 = load i32, ptr getelementptr inbounds (i8, ptr @dx, i64 8), align 8, !tbaa !5
  %57 = add nsw i32 %56, %3
  %58 = load i32, ptr getelementptr inbounds (i8, ptr @dy, i64 8), align 8, !tbaa !5
  %59 = add nsw i32 %58, %4
  %60 = sext i32 %57 to i64
  %61 = sext i32 %59 to i64
  %62 = getelementptr inbounds [20 x i32], ptr %1, i64 %60, i64 %61
  %63 = load i32, ptr %62, align 4, !tbaa !5
  %64 = icmp eq i32 %63, 1
  br i1 %64, label %65, label %.critedge.2

65:                                               ; preds = %.critedge.1
  %66 = tail call noundef zeroext i1 @_Z5validiii(i32 noundef %57, i32 noundef %59, i32 noundef %2)
  br i1 %66, label %67, label %.critedge.2

67:                                               ; preds = %65
  %68 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %60) #1
  %69 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %68, i64 noundef %61) #1
  %70 = load i32, ptr %69, align 4, !tbaa !5
  %71 = icmp eq i32 %70, 0
  br i1 %71, label %72, label %.critedge.2

72:                                               ; preds = %67
  %73 = tail call noundef zeroext i1 @_Z5solveRSt6vectorIS_IiSaIiEESaIS1_EEPA20_iiii(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull %1, i32 noundef %2, i32 noundef %57, i32 noundef %59)
  br i1 %73, label %.loopexit, label %.critedge.2

.critedge.2:                                      ; preds = %72, %67, %65, %.critedge.1
  %74 = load i32, ptr getelementptr inbounds (i8, ptr @dx, i64 12), align 4, !tbaa !5
  %75 = add nsw i32 %74, %3
  %76 = load i32, ptr getelementptr inbounds (i8, ptr @dy, i64 12), align 4, !tbaa !5
  %77 = add nsw i32 %76, %4
  %78 = sext i32 %75 to i64
  %79 = sext i32 %77 to i64
  %80 = getelementptr inbounds [20 x i32], ptr %1, i64 %78, i64 %79
  %81 = load i32, ptr %80, align 4, !tbaa !5
  %82 = icmp eq i32 %81, 1
  br i1 %82, label %83, label %.critedge.3

83:                                               ; preds = %.critedge.2
  %84 = tail call noundef zeroext i1 @_Z5validiii(i32 noundef %75, i32 noundef %77, i32 noundef %2)
  br i1 %84, label %85, label %.critedge.3

85:                                               ; preds = %83
  %86 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %78) #1
  %87 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %86, i64 noundef %79) #1
  %88 = load i32, ptr %87, align 4, !tbaa !5
  %89 = icmp eq i32 %88, 0
  br i1 %89, label %90, label %.critedge.3

90:                                               ; preds = %85
  %91 = tail call noundef zeroext i1 @_Z5solveRSt6vectorIS_IiSaIiEESaIS1_EEPA20_iiii(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull %1, i32 noundef %2, i32 noundef %75, i32 noundef %77)
  br i1 %91, label %.loopexit, label %.critedge.3

.critedge.3:                                      ; preds = %90, %85, %83, %.critedge.2
  %92 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %15) #1
  %93 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %92, i64 noundef %17) #1
  store i32 0, ptr %93, align 4, !tbaa !5
  br label %.loopexit

.loopexit:                                        ; preds = %11, %36, %54, %72, %90, %5, %7, %.critedge.3
  %.3 = phi i1 [ false, %.critedge.3 ], [ false, %7 ], [ false, %5 ], [ true, %90 ], [ true, %72 ], [ true, %54 ], [ true, %36 ], [ true, %11 ]
  ret i1 %.3
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass