; LLVM IR from lfarcaro/ARINC653_ARMV7A_AM335X :: Hardware (ctlregcontext_bb)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.ctrlRegContext = type { i32, i32, [211 x %struct.ioPadMap] }
%struct.ioPadMap = type { i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @ControlRegContextRestore(ptr noundef %0) #1 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  %4 = load ptr, ptr %2, align 8, !tbaa !5
  %5 = getelementptr inbounds %struct.ctrlRegContext, ptr %4, i32 0, i32 0
  %6 = load i32, ptr %5, align 4, !tbaa !9
  store volatile i32 %6, ptr inttoptr (i64 1155597924 to ptr), align 4, !tbaa !12
  %7 = load ptr, ptr %2, align 8, !tbaa !5
  %8 = getelementptr inbounds %struct.ctrlRegContext, ptr %7, i32 0, i32 1
  %9 = load i32, ptr %8, align 4, !tbaa !13
  store volatile i32 %9, ptr inttoptr (i64 1155597904 to ptr), align 4, !tbaa !12
  store i32 0, ptr %3, align 4, !tbaa !12
  br label %10

10:                                               ; preds = %26, %1
  %11 = load i32, ptr %3, align 4, !tbaa !12
  %12 = icmp ult i32 %11, 211
  br i1 %12, label %13, label %29

13:                                               ; preds = %10
  %14 = load ptr, ptr %2, align 8, !tbaa !5
  %15 = getelementptr inbounds %struct.ctrlRegContext, ptr %14, i32 0, i32 2
  %16 = load i32, ptr %3, align 4, !tbaa !12
  %17 = zext i32 %16 to i64
  %18 = getelementptr inbounds [211 x %struct.ioPadMap], ptr %15, i64 0, i64 %17
  %19 = getelementptr inbounds %struct.ioPadMap, ptr %18, i32 0, i32 0
  %20 = load i32, ptr %19, align 4, !tbaa !14
  %21 = load i32, ptr %3, align 4, !tbaa !12
  %22 = mul i32 %21, 4
  %23 = add i32 1155598336, %22
  %24 = zext i32 %23 to i64
  %25 = inttoptr i64 %24 to ptr
  store volatile i32 %20, ptr %25, align 4, !tbaa !12
  br label %26

26:                                               ; preds = %13
  %27 = load i32, ptr %3, align 4, !tbaa !12
  %28 = add i32 %27, 1
  store i32 %28, ptr %3, align 4, !tbaa !12
  br label %10, !llvm.loop !16

29:                                               ; preds = %10
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"ctrlRegContext", !11, i64 0, !11, i64 4, !7, i64 8}
!11 = !{!"int", !7, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!10, !11, i64 4}
!14 = !{!15, !11, i64 0}
!15 = !{!"ioPadMap", !11, i64 0, !11, i64 4}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.ioPadMap = type { i32, i32 }

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local void @ControlRegContextRestore(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
  %2 = load i32, ptr %0, align 4, !tbaa !5
  store volatile i32 %2, ptr inttoptr (i64 1155597924 to ptr), align 4, !tbaa !10
  %3 = getelementptr inbounds i8, ptr %0, i64 4
  %4 = load i32, ptr %3, align 4, !tbaa !11
  store volatile i32 %4, ptr inttoptr (i64 1155597904 to ptr), align 16, !tbaa !10
  %5 = getelementptr inbounds i8, ptr %0, i64 8
  br label %6

6:                                                ; preds = %22, %1
  %indvars.iv = phi i64 [ 0, %1 ], [ %indvars.iv.next.3, %22 ]
  %7 = getelementptr inbounds [211 x %struct.ioPadMap], ptr %5, i64 0, i64 %indvars.iv
  %8 = load i32, ptr %7, align 4, !tbaa !12
  %9 = shl nuw nsw i64 %indvars.iv, 2
  %10 = add nuw nsw i64 %9, 1155598336
  %11 = inttoptr i64 %10 to ptr
  store volatile i32 %8, ptr %11, align 16, !tbaa !10
  %indvars.iv.next = or disjoint i64 %indvars.iv, 1
  %12 = getelementptr inbounds [211 x %struct.ioPadMap], ptr %5, i64 0, i64 %indvars.iv.next
  %13 = load i32, ptr %12, align 4, !tbaa !12
  %14 = shl nuw nsw i64 %indvars.iv.next, 2
  %15 = add nuw nsw i64 %14, 1155598336
  %16 = inttoptr i64 %15 to ptr
  store volatile i32 %13, ptr %16, align 4, !tbaa !10
  %indvars.iv.next.1 = or disjoint i64 %indvars.iv, 2
  %17 = getelementptr inbounds [211 x %struct.ioPadMap], ptr %5, i64 0, i64 %indvars.iv.next.1
  %18 = load i32, ptr %17, align 4, !tbaa !12
  %19 = shl nuw nsw i64 %indvars.iv.next.1, 2
  %20 = add nuw nsw i64 %19, 1155598336
  %21 = inttoptr i64 %20 to ptr
  store volatile i32 %18, ptr %21, align 8, !tbaa !10
  %exitcond.not.2 = icmp eq i64 %indvars.iv, 208
  br i1 %exitcond.not.2, label %28, label %22, !llvm.loop !14

22:                                               ; preds = %6
  %indvars.iv.next.2 = or disjoint i64 %indvars.iv, 3
  %23 = getelementptr inbounds [211 x %struct.ioPadMap], ptr %5, i64 0, i64 %indvars.iv.next.2
  %24 = load i32, ptr %23, align 4, !tbaa !12
  %25 = shl nuw nsw i64 %indvars.iv.next.2, 2
  %26 = add nuw nsw i64 %25, 1155598336
  %27 = inttoptr i64 %26 to ptr
  store volatile i32 %24, ptr %27, align 4, !tbaa !10
  %indvars.iv.next.3 = add nuw nsw i64 %indvars.iv, 4
  br label %6

28:                                               ; preds = %6
  ret void
}

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"ctrlRegContext", !7, i64 0, !7, i64 4, !8, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!6, !7, i64 4}
!12 = !{!13, !7, i64 0}
!13 = !{!"ioPadMap", !7, i64 0, !7, i64 4}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,LICMPass,LoopRotatePass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass