; LLVM IR from VastoLorde95/Competitive-Programming :: Hackerrank/Company Contests/Indeed Prime/tree2.ll (Z5queryiiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.min_node = type { i32, i32 }

@seg_tree1 = external dso_local global [524288 x %struct.min_node], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN8min_node5mergeERS_S0_(ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(8)) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local i64 @_Z5queryiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #3 {
  %6 = alloca %struct.min_node, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca %struct.min_node, align 4
  %15 = alloca %struct.min_node, align 4
  store i32 %0, ptr %7, align 4, !tbaa !5
  store i32 %1, ptr %8, align 4, !tbaa !5
  store i32 %2, ptr %9, align 4, !tbaa !5
  store i32 %3, ptr %10, align 4, !tbaa !5
  store i32 %4, ptr %11, align 4, !tbaa !5
  %16 = load i32, ptr %8, align 4, !tbaa !5
  %17 = load i32, ptr %10, align 4, !tbaa !5
  %18 = icmp eq i32 %16, %17
  br i1 %18, label %19, label %27

19:                                               ; preds = %5
  %20 = load i32, ptr %9, align 4, !tbaa !5
  %21 = load i32, ptr %11, align 4, !tbaa !5
  %22 = icmp eq i32 %20, %21
  br i1 %22, label %23, label %27

23:                                               ; preds = %19
  %24 = load i32, ptr %7, align 4, !tbaa !5
  %25 = sext i32 %24 to i64
  %26 = getelementptr inbounds [524288 x %struct.min_node], ptr @seg_tree1, i64 0, i64 %25
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %6, ptr align 8 %26, i64 8, i1 false), !tbaa.struct !9
  br label %76

27:                                               ; preds = %19, %5
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  %28 = load i32, ptr %8, align 4, !tbaa !5
  %29 = load i32, ptr %9, align 4, !tbaa !5
  %30 = add nsw i32 %28, %29
  %31 = ashr i32 %30, 1
  store i32 %31, ptr %12, align 4, !tbaa !5
  %32 = load i32, ptr %10, align 4, !tbaa !5
  %33 = load i32, ptr %12, align 4, !tbaa !5
  %34 = icmp sgt i32 %32, %33
  br i1 %34, label %35, label %45

35:                                               ; preds = %27
  %36 = load i32, ptr %7, align 4, !tbaa !5
  %37 = shl i32 %36, 1
  %38 = add nsw i32 %37, 1
  %39 = load i32, ptr %12, align 4, !tbaa !5
  %40 = add nsw i32 %39, 1
  %41 = load i32, ptr %9, align 4, !tbaa !5
  %42 = load i32, ptr %10, align 4, !tbaa !5
  %43 = load i32, ptr %11, align 4, !tbaa !5
  %44 = call i64 @_Z5queryiiiii(i32 noundef %38, i32 noundef %40, i32 noundef %41, i32 noundef %42, i32 noundef %43)
  store i64 %44, ptr %6, align 4
  store i32 1, ptr %13, align 4
  br label %75

45:                                               ; preds = %27
  %46 = load i32, ptr %11, align 4, !tbaa !5
  %47 = load i32, ptr %12, align 4, !tbaa !5
  %48 = icmp sle i32 %46, %47
  br i1 %48, label %49, label %57

49:                                               ; preds = %45
  %50 = load i32, ptr %7, align 4, !tbaa !5
  %51 = shl i32 %50, 1
  %52 = load i32, ptr %8, align 4, !tbaa !5
  %53 = load i32, ptr %12, align 4, !tbaa !5
  %54 = load i32, ptr %10, align 4, !tbaa !5
  %55 = load i32, ptr %11, align 4, !tbaa !5
  %56 = call i64 @_Z5queryiiiii(i32 noundef %51, i32 noundef %52, i32 noundef %53, i32 noundef %54, i32 noundef %55)
  store i64 %56, ptr %6, align 4
  store i32 1, ptr %13, align 4
  br label %75

57:                                               ; preds = %45
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #4
  %58 = load i32, ptr %7, align 4, !tbaa !5
  %59 = shl i32 %58, 1
  %60 = load i32, ptr %8, align 4, !tbaa !5
  %61 = load i32, ptr %12, align 4, !tbaa !5
  %62 = load i32, ptr %10, align 4, !tbaa !5
  %63 = load i32, ptr %12, align 4, !tbaa !5
  %64 = call i64 @_Z5queryiiiii(i32 noundef %59, i32 noundef %60, i32 noundef %61, i32 noundef %62, i32 noundef %63)
  store i64 %64, ptr %14, align 4
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #4
  %65 = load i32, ptr %7, align 4, !tbaa !5
  %66 = shl i32 %65, 1
  %67 = add nsw i32 %66, 1
  %68 = load i32, ptr %12, align 4, !tbaa !5
  %69 = add nsw i32 %68, 1
  %70 = load i32, ptr %9, align 4, !tbaa !5
  %71 = load i32, ptr %12, align 4, !tbaa !5
  %72 = add nsw i32 %71, 1
  %73 = load i32, ptr %11, align 4, !tbaa !5
  %74 = call i64 @_Z5queryiiiii(i32 noundef %67, i32 noundef %69, i32 noundef %70, i32 noundef %72, i32 noundef %73)
  store i64 %74, ptr %15, align 4
  call void @_ZN8min_node5mergeERS_S0_(ptr noundef nonnull align 4 dereferenceable(8) %6, ptr noundef nonnull align 4 dereferenceable(8) %14, ptr noundef nonnull align 4 dereferenceable(8) %15)
  store i32 1, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #4
  br label %75

75:                                               ; preds = %57, %49, %35
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  br label %76

76:                                               ; preds = %75, %23
  %77 = load i64, ptr %6, align 4
  ret i64 %77
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{i64 0, i64 4, !5, i64 4, i64 4, !5}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.min_node = type { i32, i32 }

@seg_tree1 = external dso_local local_unnamed_addr global [524288 x %struct.min_node], align 16

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN8min_node5mergeERS_S0_(ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(8)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local i64 @_Z5queryiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #1 {
  %6 = alloca %struct.min_node, align 8
  %7 = alloca %struct.min_node, align 8
  %8 = alloca %struct.min_node, align 8
  br label %tailrecurse

tailrecurse:                                      ; preds = %24, %19, %5
  %.tr = phi i32 [ %0, %5 ], [ %21, %19 ], [ %25, %24 ]
  %.tr35 = phi i32 [ %1, %5 ], [ %22, %19 ], [ %.tr35, %24 ]
  %.tr36 = phi i32 [ %2, %5 ], [ %.tr36, %19 ], [ %17, %24 ]
  %9 = icmp eq i32 %.tr35, %3
  %10 = icmp eq i32 %.tr36, %4
  %or.cond = and i1 %9, %10
  br i1 %or.cond, label %11, label %15

11:                                               ; preds = %tailrecurse
  %12 = sext i32 %.tr to i64
  %13 = getelementptr inbounds [524288 x %struct.min_node], ptr @seg_tree1, i64 0, i64 %12
  %14 = load i64, ptr %13, align 8
  br label %common.ret

15:                                               ; preds = %tailrecurse
  %16 = add nsw i32 %.tr36, %.tr35
  %17 = ashr i32 %16, 1
  %18 = icmp slt i32 %17, %3
  br i1 %18, label %19, label %23

19:                                               ; preds = %15
  %20 = shl i32 %.tr, 1
  %21 = or disjoint i32 %20, 1
  %22 = add nsw i32 %17, 1
  br label %tailrecurse

23:                                               ; preds = %15
  %.not = icmp slt i32 %17, %4
  br i1 %.not, label %26, label %24

24:                                               ; preds = %23
  %25 = shl i32 %.tr, 1
  br label %tailrecurse

common.ret:                                       ; preds = %11, %26
  %common.ret.op = phi i64 [ %.pre, %26 ], [ %14, %11 ]
  ret i64 %common.ret.op

26:                                               ; preds = %23
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %7) #2
  %27 = shl i32 %.tr, 1
  %28 = tail call i64 @_Z5queryiiiii(i32 noundef %27, i32 noundef %.tr35, i32 noundef %17, i32 noundef %3, i32 noundef %17)
  store i64 %28, ptr %7, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %8) #2
  %29 = or disjoint i32 %27, 1
  %30 = add nsw i32 %17, 1
  %31 = tail call i64 @_Z5queryiiiii(i32 noundef %29, i32 noundef %30, i32 noundef %.tr36, i32 noundef %30, i32 noundef %4)
  store i64 %31, ptr %8, align 8
  call void @_ZN8min_node5mergeERS_S0_(ptr noundef nonnull align 4 dereferenceable(8) %6, ptr noundef nonnull align 4 dereferenceable(8) %7, ptr noundef nonnull align 4 dereferenceable(8) %8)
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %8) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #2
  %.pre = load i64, ptr %6, align 8
  br label %common.ret
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass