; LLVM IR from intuitive-robots/mdt_policy :: pyhash-0.9.3/src/smhasher/Bitvec.ll (Z10test_shiftv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Rand = type { i32, i32, i32, i32 }

@.str.2 = external hidden unnamed_addr constant [2 x i8], align 1
@.str.11 = external hidden unnamed_addr constant [6 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z6assertb(i1 noundef zeroext) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @printf(ptr noundef, ...) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z7lshift1Pvii(ptr noundef, i32 noundef, i32 noundef) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z7lshift8Pvii(ptr noundef, i32 noundef, i32 noundef) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z8lshift32Pvii(ptr noundef, i32 noundef, i32 noundef) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z7rshift1Pvii(ptr noundef, i32 noundef, i32 noundef) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z7rshift8Pvii(ptr noundef, i32 noundef, i32 noundef) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z8rshift32Pvii(ptr noundef, i32 noundef, i32 noundef) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z5lrot1Pvii(ptr noundef, i32 noundef, i32 noundef) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z5lrot8Pvii(ptr noundef, i32 noundef, i32 noundef) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z6lrot32Pvii(ptr noundef, i32 noundef, i32 noundef) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z5rrot1Pvii(ptr noundef, i32 noundef, i32 noundef) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z5rrot8Pvii(ptr noundef, i32 noundef, i32 noundef) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z6rrot32Pvii(ptr noundef, i32 noundef, i32 noundef) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z10test_shiftv() #3 {
  %1 = alloca %struct.Rand, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 16, ptr %1) #5
  call void @_ZN4RandC2Ej(ptr noundef nonnull align 4 dereferenceable(16) %1, i32 noundef 1123)
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #5
  store i32 64, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #5
  %10 = load i32, ptr %2, align 4, !tbaa !5
  %11 = sdiv i32 %10, 8
  store i32 %11, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #5
  store i32 10000, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #5
  store i32 0, ptr %5, align 4, !tbaa !5
  br label %12

12:                                               ; preds = %145, %0
  %13 = load i32, ptr %5, align 4, !tbaa !5
  %14 = load i32, ptr %4, align 4, !tbaa !5
  %15 = icmp slt i32 %13, %14
  br i1 %15, label %17, label %16

16:                                               ; preds = %12
  store i32 2, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #5
  br label %148

17:                                               ; preds = %12
  %18 = load i32, ptr %5, align 4, !tbaa !5
  %19 = load i32, ptr %4, align 4, !tbaa !5
  %20 = sdiv i32 %19, 10
  %21 = srem i32 %18, %20
  %22 = icmp eq i32 %21, 0
  br i1 %22, label %23, label %25

23:                                               ; preds = %17
  %24 = call i32 (ptr, ...) @printf(ptr noundef @.str.2)
  br label %25

25:                                               ; preds = %23, %17
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #5
  %26 = call noundef i64 @_ZN4Rand8rand_u64Ev(ptr noundef nonnull align 4 dereferenceable(16) %1)
  store i64 %26, ptr %7, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #5
  store i32 0, ptr %9, align 4, !tbaa !5
  br label %27

27:                                               ; preds = %141, %25
  %28 = load i32, ptr %9, align 4, !tbaa !5
  %29 = load i32, ptr %2, align 4, !tbaa !5
  %30 = icmp slt i32 %28, %29
  br i1 %30, label %32, label %31

31:                                               ; preds = %27
  store i32 5, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #5
  br label %144

32:                                               ; preds = %27
  %33 = load i64, ptr %7, align 8, !tbaa !9
  store i64 %33, ptr %8, align 8, !tbaa !9
  %34 = load i32, ptr %3, align 4, !tbaa !5
  %35 = load i32, ptr %9, align 4, !tbaa !5
  call void @_Z7lshift1Pvii(ptr noundef %8, i32 noundef %34, i32 noundef %35)
  %36 = load i64, ptr %8, align 8, !tbaa !9
  %37 = load i64, ptr %7, align 8, !tbaa !9
  %38 = load i32, ptr %9, align 4, !tbaa !5
  %39 = zext i32 %38 to i64
  %40 = shl i64 %37, %39
  %41 = icmp eq i64 %36, %40
  call void @_Z6assertb(i1 noundef zeroext %41)
  %42 = load i64, ptr %7, align 8, !tbaa !9
  store i64 %42, ptr %8, align 8, !tbaa !9
  %43 = load i32, ptr %3, align 4, !tbaa !5
  %44 = load i32, ptr %9, align 4, !tbaa !5
  call void @_Z7lshift8Pvii(ptr noundef %8, i32 noundef %43, i32 noundef %44)
  %45 = load i64, ptr %8, align 8, !tbaa !9
  %46 = load i64, ptr %7, align 8, !tbaa !9
  %47 = load i32, ptr %9, align 4, !tbaa !5
  %48 = zext i32 %47 to i64
  %49 = shl i64 %46, %48
  %50 = icmp eq i64 %45, %49
  call void @_Z6assertb(i1 noundef zeroext %50)
  %51 = load i64, ptr %7, align 8, !tbaa !9
  store i64 %51, ptr %8, align 8, !tbaa !9
  %52 = load i32, ptr %3, align 4, !tbaa !5
  %53 = load i32, ptr %9, align 4, !tbaa !5
  call void @_Z8lshift32Pvii(ptr noundef %8, i32 noundef %52, i32 noundef %53)
  %54 = load i64, ptr %8, align 8, !tbaa !9
  %55 = load i64, ptr %7, align 8, !tbaa !9
  %56 = load i32, ptr %9, align 4, !tbaa !5
  %57 = zext i32 %56 to i64
  %58 = shl i64 %55, %57
  %59 = icmp eq i64 %54, %58
  call void @_Z6assertb(i1 noundef zeroext %59)
  %60 = load i64, ptr %7, align 8, !tbaa !9
  store i64 %60, ptr %8, align 8, !tbaa !9
  %61 = load i32, ptr %3, align 4, !tbaa !5
  %62 = load i32, ptr %9, align 4, !tbaa !5
  call void @_Z7rshift1Pvii(ptr noundef %8, i32 noundef %61, i32 noundef %62)
  %63 = load i64, ptr %8, align 8, !tbaa !9
  %64 = load i64, ptr %7, align 8, !tbaa !9
  %65 = load i32, ptr %9, align 4, !tbaa !5
  %66 = zext i32 %65 to i64
  %67 = lshr i64 %64, %66
  %68 = icmp eq i64 %63, %67
  call void @_Z6assertb(i1 noundef zeroext %68)
  %69 = load i64, ptr %7, align 8, !tbaa !9
  store i64 %69, ptr %8, align 8, !tbaa !9
  %70 = load i32, ptr %3, align 4, !tbaa !5
  %71 = load i32, ptr %9, align 4, !tbaa !5
  call void @_Z7rshift8Pvii(ptr noundef %8, i32 noundef %70, i32 noundef %71)
  %72 = load i64, ptr %8, align 8, !tbaa !9
  %73 = load i64, ptr %7, align 8, !tbaa !9
  %74 = load i32, ptr %9, align 4, !tbaa !5
  %75 = zext i32 %74 to i64
  %76 = lshr i64 %73, %75
  %77 = icmp eq i64 %72, %76
  call void @_Z6assertb(i1 noundef zeroext %77)
  %78 = load i64, ptr %7, align 8, !tbaa !9
  store i64 %78, ptr %8, align 8, !tbaa !9
  %79 = load i32, ptr %3, align 4, !tbaa !5
  %80 = load i32, ptr %9, align 4, !tbaa !5
  call void @_Z8rshift32Pvii(ptr noundef %8, i32 noundef %79, i32 noundef %80)
  %81 = load i64, ptr %8, align 8, !tbaa !9
  %82 = load i64, ptr %7, align 8, !tbaa !9
  %83 = load i32, ptr %9, align 4, !tbaa !5
  %84 = zext i32 %83 to i64
  %85 = lshr i64 %82, %84
  %86 = icmp eq i64 %81, %85
  call void @_Z6assertb(i1 noundef zeroext %86)
  %87 = load i64, ptr %7, align 8, !tbaa !9
  store i64 %87, ptr %8, align 8, !tbaa !9
  %88 = load i32, ptr %3, align 4, !tbaa !5
  %89 = load i32, ptr %9, align 4, !tbaa !5
  call void @_Z5lrot1Pvii(ptr noundef %8, i32 noundef %88, i32 noundef %89)
  %90 = load i64, ptr %8, align 8, !tbaa !9
  %91 = load i64, ptr %7, align 8, !tbaa !9
  %92 = load i32, ptr %9, align 4, !tbaa !5
  %93 = trunc i32 %92 to i8
  %94 = call noundef i64 @_Z6rotl64ma(i64 noundef %91, i8 noundef signext %93)
  %95 = icmp eq i64 %90, %94
  call void @_Z6assertb(i1 noundef zeroext %95)
  %96 = load i64, ptr %7, align 8, !tbaa !9
  store i64 %96, ptr %8, align 8, !tbaa !9
  %97 = load i32, ptr %3, align 4, !tbaa !5
  %98 = load i32, ptr %9, align 4, !tbaa !5
  call void @_Z5lrot8Pvii(ptr noundef %8, i32 noundef %97, i32 noundef %98)
  %99 = load i64, ptr %8, align 8, !tbaa !9
  %100 = load i64, ptr %7, align 8, !tbaa !9
  %101 = load i32, ptr %9, align 4, !tbaa !5
  %102 = trunc i32 %101 to i8
  %103 = call noundef i64 @_Z6rotl64ma(i64 noundef %100, i8 noundef signext %102)
  %104 = icmp eq i64 %99, %103
  call void @_Z6assertb(i1 noundef zeroext %104)
  %105 = load i64, ptr %7, align 8, !tbaa !9
  store i64 %105, ptr %8, align 8, !tbaa !9
  %106 = load i32, ptr %3, align 4, !tbaa !5
  %107 = load i32, ptr %9, align 4, !tbaa !5
  call void @_Z6lrot32Pvii(ptr noundef %8, i32 noundef %106, i32 noundef %107)
  %108 = load i64, ptr %8, align 8, !tbaa !9
  %109 = load i64, ptr %7, align 8, !tbaa !9
  %110 = load i32, ptr %9, align 4, !tbaa !5
  %111 = trunc i32 %110 to i8
  %112 = call noundef i64 @_Z6rotl64ma(i64 noundef %109, i8 noundef signext %111)
  %113 = icmp eq i64 %108, %112
  call void @_Z6assertb(i1 noundef zeroext %113)
  %114 = load i64, ptr %7, align 8, !tbaa !9
  store i64 %114, ptr %8, align 8, !tbaa !9
  %115 = load i32, ptr %3, align 4, !tbaa !5
  %116 = load i32, ptr %9, align 4, !tbaa !5
  call void @_Z5rrot1Pvii(ptr noundef %8, i32 noundef %115, i32 noundef %116)
  %117 = load i64, ptr %8, align 8, !tbaa !9
  %118 = load i64, ptr %7, align 8, !tbaa !9
  %119 = load i32, ptr %9, align 4, !tbaa !5
  %120 = trunc i32 %119 to i8
  %121 = call noundef i64 @_Z6rotr64ma(i64 noundef %118, i8 noundef signext %120)
  %122 = icmp eq i64 %117, %121
  call void @_Z6assertb(i1 noundef zeroext %122)
  %123 = load i64, ptr %7, align 8, !tbaa !9
  store i64 %123, ptr %8, align 8, !tbaa !9
  %124 = load i32, ptr %3, align 4, !tbaa !5
  %125 = load i32, ptr %9, align 4, !tbaa !5
  call void @_Z5rrot8Pvii(ptr noundef %8, i32 noundef %124, i32 noundef %125)
  %126 = load i64, ptr %8, align 8, !tbaa !9
  %127 = load i64, ptr %7, align 8, !tbaa !9
  %128 = load i32, ptr %9, align 4, !tbaa !5
  %129 = trunc i32 %128 to i8
  %130 = call noundef i64 @_Z6rotr64ma(i64 noundef %127, i8 noundef signext %129)
  %131 = icmp eq i64 %126, %130
  call void @_Z6assertb(i1 noundef zeroext %131)
  %132 = load i64, ptr %7, align 8, !tbaa !9
  store i64 %132, ptr %8, align 8, !tbaa !9
  %133 = load i32, ptr %3, align 4, !tbaa !5
  %134 = load i32, ptr %9, align 4, !tbaa !5
  call void @_Z6rrot32Pvii(ptr noundef %8, i32 noundef %133, i32 noundef %134)
  %135 = load i64, ptr %8, align 8, !tbaa !9
  %136 = load i64, ptr %7, align 8, !tbaa !9
  %137 = load i32, ptr %9, align 4, !tbaa !5
  %138 = trunc i32 %137 to i8
  %139 = call noundef i64 @_Z6rotr64ma(i64 noundef %136, i8 noundef signext %138)
  %140 = icmp eq i64 %135, %139
  call void @_Z6assertb(i1 noundef zeroext %140)
  br label %141

141:                                              ; preds = %32
  %142 = load i32, ptr %9, align 4, !tbaa !5
  %143 = add nsw i32 %142, 1
  store i32 %143, ptr %9, align 4, !tbaa !5
  br label %27, !llvm.loop !11

144:                                              ; preds = %31
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #5
  br label %145

145:                                              ; preds = %144
  %146 = load i32, ptr %5, align 4, !tbaa !5
  %147 = add nsw i32 %146, 1
  store i32 %147, ptr %5, align 4, !tbaa !5
  br label %12, !llvm.loop !13

148:                                              ; preds = %16
  %149 = call i32 (ptr, ...) @printf(ptr noundef @.str.11)
  store i32 1, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #5
  call void @llvm.lifetime.end.p0(i64 16, ptr %1) #5
  ret i1 true
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4RandC2Ej(ptr noundef nonnull align 4 dereferenceable(16), i32 noundef) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Rand8rand_u64Ev(ptr noundef nonnull align 4 dereferenceable(16)) #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z6rotl64ma(i64 noundef, i8 noundef signext) #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z6rotr64ma(i64 noundef, i8 noundef signext) #4

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Rand = type { i32, i32, i32, i32 }

@.str.2 = external hidden unnamed_addr constant [2 x i8], align 1
@.str.11 = external hidden unnamed_addr constant [6 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z6assertb(i1 noundef zeroext) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z7lshift1Pvii(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z7lshift8Pvii(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z8lshift32Pvii(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z7rshift1Pvii(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z7rshift8Pvii(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z8rshift32Pvii(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z5lrot1Pvii(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z5lrot8Pvii(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z6lrot32Pvii(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z5rrot1Pvii(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z5rrot8Pvii(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z6rrot32Pvii(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z10test_shiftv() local_unnamed_addr #3 {
  %1 = alloca %struct.Rand, align 4
  %2 = alloca i64, align 8
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %1) #5
  call void @_ZN4RandC2Ej(ptr noundef nonnull align 4 dereferenceable(16) %1, i32 noundef 1123)
  br label %5

3:                                                ; preds = %12
  %4 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.11)
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %1) #5
  ret i1 true

5:                                                ; preds = %0, %12
  %.06971 = phi i32 [ 0, %0 ], [ %13, %12 ]
  %.lhs.trunc = trunc nuw i32 %.06971 to i16
  %6 = urem i16 %.lhs.trunc, 1000
  %7 = icmp eq i16 %6, 0
  br i1 %7, label %8, label %10

8:                                                ; preds = %5
  %9 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.2)
  br label %10

10:                                               ; preds = %8, %5
  %11 = call noundef i64 @_ZN4Rand8rand_u64Ev(ptr noundef nonnull align 4 dereferenceable(16) %1)
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #5
  br label %14

12:                                               ; preds = %14
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #5
  %13 = add nuw nsw i32 %.06971, 1
  %exitcond73.not = icmp eq i32 %13, 10000
  br i1 %exitcond73.not, label %3, label %5, !llvm.loop !5

14:                                               ; preds = %10, %14
  %indvars.iv = phi i64 [ 0, %10 ], [ %indvars.iv.next, %14 ]
  store i64 %11, ptr %2, align 8, !tbaa !7
  %15 = trunc nuw nsw i64 %indvars.iv to i32
  call void @_Z7lshift1Pvii(ptr noundef nonnull %2, i32 noundef 8, i32 noundef %15)
  %16 = load i64, ptr %2, align 8, !tbaa !7
  %17 = shl i64 %11, %indvars.iv
  %18 = icmp eq i64 %16, %17
  call void @_Z6assertb(i1 noundef zeroext %18)
  store i64 %11, ptr %2, align 8, !tbaa !7
  call void @_Z7lshift8Pvii(ptr noundef nonnull %2, i32 noundef 8, i32 noundef %15)
  %19 = load i64, ptr %2, align 8, !tbaa !7
  %20 = icmp eq i64 %19, %17
  call void @_Z6assertb(i1 noundef zeroext %20)
  store i64 %11, ptr %2, align 8, !tbaa !7
  call void @_Z8lshift32Pvii(ptr noundef nonnull %2, i32 noundef 8, i32 noundef %15)
  %21 = load i64, ptr %2, align 8, !tbaa !7
  %22 = icmp eq i64 %21, %17
  call void @_Z6assertb(i1 noundef zeroext %22)
  store i64 %11, ptr %2, align 8, !tbaa !7
  call void @_Z7rshift1Pvii(ptr noundef nonnull %2, i32 noundef 8, i32 noundef %15)
  %23 = load i64, ptr %2, align 8, !tbaa !7
  %24 = lshr i64 %11, %indvars.iv
  %25 = icmp eq i64 %23, %24
  call void @_Z6assertb(i1 noundef zeroext %25)
  store i64 %11, ptr %2, align 8, !tbaa !7
  call void @_Z7rshift8Pvii(ptr noundef nonnull %2, i32 noundef 8, i32 noundef %15)
  %26 = load i64, ptr %2, align 8, !tbaa !7
  %27 = icmp eq i64 %26, %24
  call void @_Z6assertb(i1 noundef zeroext %27)
  store i64 %11, ptr %2, align 8, !tbaa !7
  call void @_Z8rshift32Pvii(ptr noundef nonnull %2, i32 noundef 8, i32 noundef %15)
  %28 = load i64, ptr %2, align 8, !tbaa !7
  %29 = icmp eq i64 %28, %24
  call void @_Z6assertb(i1 noundef zeroext %29)
  store i64 %11, ptr %2, align 8, !tbaa !7
  call void @_Z5lrot1Pvii(ptr noundef nonnull %2, i32 noundef 8, i32 noundef %15)
  %30 = load i64, ptr %2, align 8, !tbaa !7
  %31 = trunc i64 %indvars.iv to i8
  %32 = call noundef i64 @_Z6rotl64ma(i64 noundef %11, i8 noundef signext %31)
  %33 = icmp eq i64 %30, %32
  call void @_Z6assertb(i1 noundef zeroext %33)
  store i64 %11, ptr %2, align 8, !tbaa !7
  call void @_Z5lrot8Pvii(ptr noundef nonnull %2, i32 noundef 8, i32 noundef %15)
  %34 = load i64, ptr %2, align 8, !tbaa !7
  %35 = call noundef i64 @_Z6rotl64ma(i64 noundef %11, i8 noundef signext %31)
  %36 = icmp eq i64 %34, %35
  call void @_Z6assertb(i1 noundef zeroext %36)
  store i64 %11, ptr %2, align 8, !tbaa !7
  call void @_Z6lrot32Pvii(ptr noundef nonnull %2, i32 noundef 8, i32 noundef %15)
  %37 = load i64, ptr %2, align 8, !tbaa !7
  %38 = call noundef i64 @_Z6rotl64ma(i64 noundef %11, i8 noundef signext %31)
  %39 = icmp eq i64 %37, %38
  call void @_Z6assertb(i1 noundef zeroext %39)
  store i64 %11, ptr %2, align 8, !tbaa !7
  call void @_Z5rrot1Pvii(ptr noundef nonnull %2, i32 noundef 8, i32 noundef %15)
  %40 = load i64, ptr %2, align 8, !tbaa !7
  %41 = call noundef i64 @_Z6rotr64ma(i64 noundef %11, i8 noundef signext %31)
  %42 = icmp eq i64 %40, %41
  call void @_Z6assertb(i1 noundef zeroext %42)
  store i64 %11, ptr %2, align 8, !tbaa !7
  call void @_Z5rrot8Pvii(ptr noundef nonnull %2, i32 noundef 8, i32 noundef %15)
  %43 = load i64, ptr %2, align 8, !tbaa !7
  %44 = call noundef i64 @_Z6rotr64ma(i64 noundef %11, i8 noundef signext %31)
  %45 = icmp eq i64 %43, %44
  call void @_Z6assertb(i1 noundef zeroext %45)
  store i64 %11, ptr %2, align 8, !tbaa !7
  call void @_Z6rrot32Pvii(ptr noundef nonnull %2, i32 noundef 8, i32 noundef %15)
  %46 = load i64, ptr %2, align 8, !tbaa !7
  %47 = call noundef i64 @_Z6rotr64ma(i64 noundef %11, i8 noundef signext %31)
  %48 = icmp eq i64 %46, %47
  call void @_Z6assertb(i1 noundef zeroext %48)
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, 64
  br i1 %exitcond.not, label %12, label %14, !llvm.loop !11
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4RandC2Ej(ptr noundef nonnull align 4 dereferenceable(16), i32 noundef) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4Rand8rand_u64Ev(ptr noundef nonnull align 4 dereferenceable(16)) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z6rotl64ma(i64 noundef, i8 noundef signext) local_unnamed_addr #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z6rotr64ma(i64 noundef, i8 noundef signext) local_unnamed_addr #4

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!8, !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = distinct !{!11, !6}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LoopRotatePass,SROAPass,SimplifyCFGPass