; LLVM IR from ShahjalalShohag/code-library :: Math/Max Convolution between Convex Funtions.ll (Z8multiplySt6vectorIiSaIiEES1_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::allocator" = type { i8 }

; Function Attrs: mustprogress uwtable
define dso_local void @_Z8multiplySt6vectorIiSaIiEES1_(ptr dead_on_unwind noalias writable sret(%"class.std::vector") align 8 %0, ptr noundef %1, ptr noundef %2) #0 personality ptr @__gxx_personality_v0 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i1, align 1
  %10 = alloca %"class.std::allocator", align 1
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  store ptr %0, ptr %4, align 8
  store ptr %1, ptr %5, align 8, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %16 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #3
  %17 = sub i64 %16, 1
  %18 = trunc i64 %17 to i32
  store i32 %18, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %19 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2) #3
  %20 = sub i64 %19, 1
  %21 = trunc i64 %20 to i32
  store i32 %21, ptr %8, align 4, !tbaa !9
  store i1 false, ptr %9, align 1
  %22 = load i32, ptr %7, align 4, !tbaa !9
  %23 = load i32, ptr %8, align 4, !tbaa !9
  %24 = add nsw i32 %22, %23
  %25 = add nsw i32 %24, 1
  %26 = sext i32 %25 to i64
  call void @llvm.lifetime.start.p0(i64 1, ptr %10) #3
  call void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %10) #3
  invoke void @_ZNSt6vectorIiSaIiEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %26, ptr noundef nonnull align 1 dereferenceable(1) %10)
          to label %27 unwind label %82

27:                                               ; preds = %3
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %10) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  %28 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef 0) #3
  %29 = load i32, ptr %28, align 4, !tbaa !9
  %30 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef 0) #3
  %31 = load i32, ptr %30, align 4, !tbaa !9
  %32 = add nsw i32 %29, %31
  store i32 %32, ptr %13, align 4, !tbaa !9
  %33 = load i32, ptr %13, align 4, !tbaa !9
  %34 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #3
  store i32 %33, ptr %34, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  store i32 0, ptr %14, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  store i32 0, ptr %15, align 4, !tbaa !9
  br label %35

35:                                               ; preds = %101, %27
  %36 = load i32, ptr %14, align 4, !tbaa !9
  %37 = load i32, ptr %7, align 4, !tbaa !9
  %38 = icmp slt i32 %36, %37
  br i1 %38, label %39, label %43

39:                                               ; preds = %35
  %40 = load i32, ptr %15, align 4, !tbaa !9
  %41 = load i32, ptr %8, align 4, !tbaa !9
  %42 = icmp slt i32 %40, %41
  br label %43

43:                                               ; preds = %39, %35
  %44 = phi i1 [ false, %35 ], [ %42, %39 ]
  br i1 %44, label %45, label %108

45:                                               ; preds = %43
  %46 = load i32, ptr %14, align 4, !tbaa !9
  %47 = add nsw i32 %46, 1
  %48 = sext i32 %47 to i64
  %49 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %48) #3
  %50 = load i32, ptr %49, align 4, !tbaa !9
  %51 = load i32, ptr %14, align 4, !tbaa !9
  %52 = sext i32 %51 to i64
  %53 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %52) #3
  %54 = load i32, ptr %53, align 4, !tbaa !9
  %55 = sub nsw i32 %50, %54
  %56 = load i32, ptr %15, align 4, !tbaa !9
  %57 = add nsw i32 %56, 1
  %58 = sext i32 %57 to i64
  %59 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %58) #3
  %60 = load i32, ptr %59, align 4, !tbaa !9
  %61 = load i32, ptr %15, align 4, !tbaa !9
  %62 = sext i32 %61 to i64
  %63 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %62) #3
  %64 = load i32, ptr %63, align 4, !tbaa !9
  %65 = sub nsw i32 %60, %64
  %66 = icmp sgt i32 %55, %65
  br i1 %66, label %67, label %86

67:                                               ; preds = %45
  %68 = load i32, ptr %14, align 4, !tbaa !9
  %69 = add nsw i32 %68, 1
  %70 = sext i32 %69 to i64
  %71 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %70) #3
  %72 = load i32, ptr %71, align 4, !tbaa !9
  %73 = load i32, ptr %14, align 4, !tbaa !9
  %74 = sext i32 %73 to i64
  %75 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %74) #3
  %76 = load i32, ptr %75, align 4, !tbaa !9
  %77 = sub nsw i32 %72, %76
  %78 = load i32, ptr %13, align 4, !tbaa !9
  %79 = add nsw i32 %78, %77
  store i32 %79, ptr %13, align 4, !tbaa !9
  %80 = load i32, ptr %14, align 4, !tbaa !9
  %81 = add nsw i32 %80, 1
  store i32 %81, ptr %14, align 4, !tbaa !9
  br label %101

82:                                               ; preds = %3
  %83 = landingpad { ptr, i32 }
          cleanup
  %84 = extractvalue { ptr, i32 } %83, 0
  store ptr %84, ptr %11, align 8
  %85 = extractvalue { ptr, i32 } %83, 1
  store i32 %85, ptr %12, align 4
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %10) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  br label %164

86:                                               ; preds = %45
  %87 = load i32, ptr %15, align 4, !tbaa !9
  %88 = add nsw i32 %87, 1
  %89 = sext i32 %88 to i64
  %90 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %89) #3
  %91 = load i32, ptr %90, align 4, !tbaa !9
  %92 = load i32, ptr %15, align 4, !tbaa !9
  %93 = sext i32 %92 to i64
  %94 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %93) #3
  %95 = load i32, ptr %94, align 4, !tbaa !9
  %96 = sub nsw i32 %91, %95
  %97 = load i32, ptr %13, align 4, !tbaa !9
  %98 = add nsw i32 %97, %96
  store i32 %98, ptr %13, align 4, !tbaa !9
  %99 = load i32, ptr %15, align 4, !tbaa !9
  %100 = add nsw i32 %99, 1
  store i32 %100, ptr %15, align 4, !tbaa !9
  br label %101

101:                                              ; preds = %86, %67
  %102 = load i32, ptr %13, align 4, !tbaa !9
  %103 = load i32, ptr %14, align 4, !tbaa !9
  %104 = load i32, ptr %15, align 4, !tbaa !9
  %105 = add nsw i32 %103, %104
  %106 = sext i32 %105 to i64
  %107 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %106) #3
  store i32 %102, ptr %107, align 4, !tbaa !9
  br label %35, !llvm.loop !11

108:                                              ; preds = %43
  br label %109

109:                                              ; preds = %113, %108
  %110 = load i32, ptr %14, align 4, !tbaa !9
  %111 = load i32, ptr %7, align 4, !tbaa !9
  %112 = icmp slt i32 %110, %111
  br i1 %112, label %113, label %134

113:                                              ; preds = %109
  %114 = load i32, ptr %14, align 4, !tbaa !9
  %115 = add nsw i32 %114, 1
  %116 = sext i32 %115 to i64
  %117 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %116) #3
  %118 = load i32, ptr %117, align 4, !tbaa !9
  %119 = load i32, ptr %14, align 4, !tbaa !9
  %120 = sext i32 %119 to i64
  %121 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %120) #3
  %122 = load i32, ptr %121, align 4, !tbaa !9
  %123 = sub nsw i32 %118, %122
  %124 = load i32, ptr %13, align 4, !tbaa !9
  %125 = add nsw i32 %124, %123
  store i32 %125, ptr %13, align 4, !tbaa !9
  %126 = load i32, ptr %14, align 4, !tbaa !9
  %127 = add nsw i32 %126, 1
  store i32 %127, ptr %14, align 4, !tbaa !9
  %128 = load i32, ptr %13, align 4, !tbaa !9
  %129 = load i32, ptr %14, align 4, !tbaa !9
  %130 = load i32, ptr %15, align 4, !tbaa !9
  %131 = add nsw i32 %129, %130
  %132 = sext i32 %131 to i64
  %133 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %132) #3
  store i32 %128, ptr %133, align 4, !tbaa !9
  br label %109, !llvm.loop !13

134:                                              ; preds = %109
  br label %135

135:                                              ; preds = %139, %134
  %136 = load i32, ptr %15, align 4, !tbaa !9
  %137 = load i32, ptr %8, align 4, !tbaa !9
  %138 = icmp slt i32 %136, %137
  br i1 %138, label %139, label %160

139:                                              ; preds = %135
  %140 = load i32, ptr %15, align 4, !tbaa !9
  %141 = add nsw i32 %140, 1
  %142 = sext i32 %141 to i64
  %143 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %142) #3
  %144 = load i32, ptr %143, align 4, !tbaa !9
  %145 = load i32, ptr %15, align 4, !tbaa !9
  %146 = sext i32 %145 to i64
  %147 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %146) #3
  %148 = load i32, ptr %147, align 4, !tbaa !9
  %149 = sub nsw i32 %144, %148
  %150 = load i32, ptr %13, align 4, !tbaa !9
  %151 = add nsw i32 %150, %149
  store i32 %151, ptr %13, align 4, !tbaa !9
  %152 = load i32, ptr %15, align 4, !tbaa !9
  %153 = add nsw i32 %152, 1
  store i32 %153, ptr %15, align 4, !tbaa !9
  %154 = load i32, ptr %13, align 4, !tbaa !9
  %155 = load i32, ptr %14, align 4, !tbaa !9
  %156 = load i32, ptr %15, align 4, !tbaa !9
  %157 = add nsw i32 %155, %156
  %158 = sext i32 %157 to i64
  %159 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %158) #3
  store i32 %154, ptr %159, align 4, !tbaa !9
  br label %135, !llvm.loop !14

160:                                              ; preds = %135
  store i1 true, ptr %9, align 1
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  %161 = load i1, ptr %9, align 1
  br i1 %161, label %163, label %162

162:                                              ; preds = %160
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %0) #3
  br label %163

163:                                              ; preds = %162, %160
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  ret void

164:                                              ; preds = %82
  %165 = load ptr, ptr %11, align 8
  %166 = load i32, ptr %12, align 4
  %167 = insertvalue { ptr, i32 } poison, ptr %165, 0
  %168 = insertvalue { ptr, i32 } %167, i32 %166, 1
  resume { ptr, i32 } %168
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #2 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::allocator" = type { i8 }

; Function Attrs: mustprogress uwtable
define dso_local void @_Z8multiplySt6vectorIiSaIiEES1_(ptr dead_on_unwind noalias writable sret(%"class.std::vector") align 8 %0, ptr noundef nonnull %1, ptr noundef %2) local_unnamed_addr #0 personality ptr @__gxx_personality_v0 {
  %4 = alloca %"class.std::allocator", align 1
  %5 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #3
  %6 = trunc i64 %5 to i32
  %7 = add i32 %6, -1
  %8 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2) #3
  %9 = trunc i64 %8 to i32
  %10 = add i32 %9, -1
  %11 = add i32 %7, %9
  %12 = sext i32 %11 to i64
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %4) #3
  call void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %4) #3
  invoke void @_ZNSt6vectorIiSaIiEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %12, ptr noundef nonnull align 1 dereferenceable(1) %4)
          to label %13 unwind label %47

13:                                               ; preds = %3
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %4) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %4) #3
  %14 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef 0) #3
  %15 = load i32, ptr %14, align 4, !tbaa !5
  %16 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef 0) #3
  %17 = load i32, ptr %16, align 4, !tbaa !5
  %18 = add nsw i32 %17, %15
  %19 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #3
  store i32 %18, ptr %19, align 4, !tbaa !5
  %20 = icmp sgt i32 %7, 0
  %21 = icmp sgt i32 %10, 0
  %22 = and i1 %20, %21
  br i1 %22, label %.lr.ph, label %.preheader48

.preheader48:                                     ; preds = %53, %13
  %.045.lcssa = phi i32 [ %18, %13 ], [ %.146, %53 ]
  %.042.lcssa = phi i32 [ 0, %13 ], [ %.143, %53 ]
  %.0.lcssa = phi i32 [ 0, %13 ], [ %.1, %53 ]
  %23 = icmp slt i32 %.042.lcssa, %7
  br i1 %23, label %.lr.ph56.preheader, label %.preheader

.lr.ph56.preheader:                               ; preds = %.preheader48
  %24 = sext i32 %.042.lcssa to i64
  %25 = sext i32 %.0.lcssa to i64
  %wide.trip.count = sext i32 %7 to i64
  br label %.lr.ph56

.lr.ph:                                           ; preds = %13, %53
  %.051 = phi i32 [ %.1, %53 ], [ 0, %13 ]
  %.04250 = phi i32 [ %.143, %53 ], [ 0, %13 ]
  %.04549 = phi i32 [ %.146, %53 ], [ %18, %13 ]
  %26 = add nsw i32 %.04250, 1
  %27 = sext i32 %26 to i64
  %28 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %27) #3
  %29 = load i32, ptr %28, align 4, !tbaa !5
  %30 = sext i32 %.04250 to i64
  %31 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %30) #3
  %32 = load i32, ptr %31, align 4, !tbaa !5
  %33 = sub nsw i32 %29, %32
  %34 = add nsw i32 %.051, 1
  %35 = sext i32 %34 to i64
  %36 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %35) #3
  %37 = load i32, ptr %36, align 4, !tbaa !5
  %38 = sext i32 %.051 to i64
  %39 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %38) #3
  %40 = load i32, ptr %39, align 4, !tbaa !5
  %41 = sub nsw i32 %37, %40
  %42 = icmp sgt i32 %33, %41
  br i1 %42, label %43, label %49

43:                                               ; preds = %.lr.ph
  %44 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %27) #3
  %45 = load i32, ptr %44, align 4, !tbaa !5
  %46 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %30) #3
  br label %53

47:                                               ; preds = %3
  %48 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %4) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %4) #3
  resume { ptr, i32 } %48

49:                                               ; preds = %.lr.ph
  %50 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %35) #3
  %51 = load i32, ptr %50, align 4, !tbaa !5
  %52 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %38) #3
  br label %53

53:                                               ; preds = %49, %43
  %.sink70 = phi ptr [ %52, %49 ], [ %46, %43 ]
  %.sink = phi i32 [ %51, %49 ], [ %45, %43 ]
  %.143 = phi i32 [ %.04250, %49 ], [ %26, %43 ]
  %.1 = phi i32 [ %34, %49 ], [ %.051, %43 ]
  %54 = load i32, ptr %.sink70, align 4, !tbaa !5
  %55 = sub nsw i32 %.sink, %54
  %.146 = add nsw i32 %55, %.04549
  %56 = add nsw i32 %.1, %.143
  %57 = sext i32 %56 to i64
  %58 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %57) #3
  store i32 %.146, ptr %58, align 4, !tbaa !5
  %59 = icmp slt i32 %.143, %7
  %60 = icmp slt i32 %.1, %10
  %61 = and i1 %59, %60
  br i1 %61, label %.lr.ph, label %.preheader48, !llvm.loop !9

.preheader:                                       ; preds = %.lr.ph56, %.preheader48
  %.247.lcssa = phi i32 [ %.045.lcssa, %.preheader48 ], [ %70, %.lr.ph56 ]
  %.244.lcssa = phi i32 [ %.042.lcssa, %.preheader48 ], [ %7, %.lr.ph56 ]
  %62 = icmp slt i32 %.0.lcssa, %10
  br i1 %62, label %.lr.ph61.preheader, label %._crit_edge

.lr.ph61.preheader:                               ; preds = %.preheader
  %63 = sext i32 %.0.lcssa to i64
  %64 = sext i32 %.244.lcssa to i64
  %wide.trip.count67 = sext i32 %10 to i64
  br label %.lr.ph61

.lr.ph56:                                         ; preds = %.lr.ph56.preheader, %.lr.ph56
  %indvars.iv = phi i64 [ %24, %.lr.ph56.preheader ], [ %indvars.iv.next, %.lr.ph56 ]
  %.24754 = phi i32 [ %.045.lcssa, %.lr.ph56.preheader ], [ %70, %.lr.ph56 ]
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %65 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv.next) #3
  %66 = load i32, ptr %65, align 4, !tbaa !5
  %67 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv) #3
  %68 = load i32, ptr %67, align 4, !tbaa !5
  %69 = sub nsw i32 %66, %68
  %70 = add nsw i32 %69, %.24754
  %71 = add nsw i64 %indvars.iv.next, %25
  %72 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %71) #3
  store i32 %70, ptr %72, align 4, !tbaa !5
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %.preheader, label %.lr.ph56, !llvm.loop !11

.lr.ph61:                                         ; preds = %.lr.ph61.preheader, %.lr.ph61
  %indvars.iv64 = phi i64 [ %63, %.lr.ph61.preheader ], [ %indvars.iv.next65, %.lr.ph61 ]
  %.359 = phi i32 [ %.247.lcssa, %.lr.ph61.preheader ], [ %78, %.lr.ph61 ]
  %indvars.iv.next65 = add nsw i64 %indvars.iv64, 1
  %73 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %indvars.iv.next65) #3
  %74 = load i32, ptr %73, align 4, !tbaa !5
  %75 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %indvars.iv64) #3
  %76 = load i32, ptr %75, align 4, !tbaa !5
  %77 = sub nsw i32 %74, %76
  %78 = add nsw i32 %77, %.359
  %79 = add nsw i64 %indvars.iv.next65, %64
  %80 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %79) #3
  store i32 %78, ptr %80, align 4, !tbaa !5
  %exitcond68.not = icmp eq i64 %indvars.iv.next65, %wide.trip.count67
  br i1 %exitcond68.not, label %._crit_edge, label %.lr.ph61, !llvm.loop !12

._crit_edge:                                      ; preds = %.lr.ph61, %.preheader
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #2 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass