; LLVM IR from dtecta/motion-toolkit :: test/jointlimits/JointLimitsTests.ll (Z14testFuzzyEqualRKN2mt7Vector3INS_4DualIfEEEES5_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.mt::Vector3" = type { float, float, float }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z14testFuzzyEqualRKN2mt7Vector3INS_4DualIfEEEES5_(ptr noundef nonnull align 4 dereferenceable(24) %0, ptr noundef nonnull align 4 dereferenceable(24) %1) #1 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca %"class.mt::Vector3", align 4
  %6 = alloca { <2 x float>, float }, align 8
  %7 = alloca %"class.mt::Vector3", align 4
  %8 = alloca { <2 x float>, float }, align 8
  %9 = alloca %"class.mt::Vector3", align 4
  %10 = alloca { <2 x float>, float }, align 8
  %11 = alloca %"class.mt::Vector3", align 4
  %12 = alloca { <2 x float>, float }, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 12, ptr %5) #4
  %13 = load ptr, ptr %3, align 8, !tbaa !5
  %14 = call { <2 x float>, float } @_ZN2mt4realIfEENS_7Vector3IT_EERKNS1_INS_4DualIS2_EEEE(ptr noundef nonnull align 4 dereferenceable(24) %13)
  store { <2 x float>, float } %14, ptr %6, align 8
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %5, ptr align 8 %6, i64 12, i1 false)
  call void @llvm.lifetime.start.p0(i64 12, ptr %7) #4
  %15 = load ptr, ptr %4, align 8, !tbaa !5
  %16 = call { <2 x float>, float } @_ZN2mt4realIfEENS_7Vector3IT_EERKNS1_INS_4DualIS2_EEEE(ptr noundef nonnull align 4 dereferenceable(24) %15)
  store { <2 x float>, float } %16, ptr %8, align 8
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %7, ptr align 8 %8, i64 12, i1 false)
  call void @_Z14testFuzzyEqualIN2mt7Vector3IfEEEvRKT_S5_(ptr noundef nonnull align 4 dereferenceable(12) %5, ptr noundef nonnull align 4 dereferenceable(12) %7)
  call void @llvm.lifetime.end.p0(i64 12, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 12, ptr %5) #4
  call void @llvm.lifetime.start.p0(i64 12, ptr %9) #4
  %17 = load ptr, ptr %3, align 8, !tbaa !5
  %18 = call { <2 x float>, float } @_ZN2mt4dualIfEENS_7Vector3IT_EERKNS1_INS_4DualIS2_EEEE(ptr noundef nonnull align 4 dereferenceable(24) %17)
  store { <2 x float>, float } %18, ptr %10, align 8
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %9, ptr align 8 %10, i64 12, i1 false)
  call void @llvm.lifetime.start.p0(i64 12, ptr %11) #4
  %19 = load ptr, ptr %4, align 8, !tbaa !5
  %20 = call { <2 x float>, float } @_ZN2mt4dualIfEENS_7Vector3IT_EERKNS1_INS_4DualIS2_EEEE(ptr noundef nonnull align 4 dereferenceable(24) %19)
  store { <2 x float>, float } %20, ptr %12, align 8
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %11, ptr align 8 %12, i64 12, i1 false)
  call void @_Z14testFuzzyEqualIN2mt7Vector3IfEEEvRKT_S5_(ptr noundef nonnull align 4 dereferenceable(12) %9, ptr noundef nonnull align 4 dereferenceable(12) %11)
  call void @llvm.lifetime.end.p0(i64 12, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 12, ptr %9) #4
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z14testFuzzyEqualIN2mt7Vector3IfEEEvRKT_S5_(ptr noundef nonnull align 4 dereferenceable(12), ptr noundef nonnull align 4 dereferenceable(12)) #1

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local { <2 x float>, float } @_ZN2mt4realIfEENS_7Vector3IT_EERKNS1_INS_4DualIS2_EEEE(ptr noundef nonnull align 4 dereferenceable(24)) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local { <2 x float>, float } @_ZN2mt4dualIfEENS_7Vector3IT_EERKNS1_INS_4DualIS2_EEEE(ptr noundef nonnull align 4 dereferenceable(24)) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.mt::Vector3" = type { float, float, float }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z14testFuzzyEqualRKN2mt7Vector3INS_4DualIfEEEES5_(ptr noundef nonnull align 4 dereferenceable(24) %0, ptr noundef nonnull align 4 dereferenceable(24) %1) local_unnamed_addr #1 {
  %3 = alloca %"class.mt::Vector3", align 8
  %4 = alloca %"class.mt::Vector3", align 8
  %5 = alloca %"class.mt::Vector3", align 8
  %6 = alloca %"class.mt::Vector3", align 8
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %3) #3
  %7 = tail call { <2 x float>, float } @_ZN2mt4realIfEENS_7Vector3IT_EERKNS1_INS_4DualIS2_EEEE(ptr noundef nonnull align 4 dereferenceable(24) %0)
  %.fca.0.extract9 = extractvalue { <2 x float>, float } %7, 0
  %.fca.1.extract10 = extractvalue { <2 x float>, float } %7, 1
  store <2 x float> %.fca.0.extract9, ptr %3, align 8
  %.sroa.212.0..sroa_idx = getelementptr inbounds i8, ptr %3, i64 8
  store float %.fca.1.extract10, ptr %.sroa.212.0..sroa_idx, align 8
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %4) #3
  %8 = tail call { <2 x float>, float } @_ZN2mt4realIfEENS_7Vector3IT_EERKNS1_INS_4DualIS2_EEEE(ptr noundef nonnull align 4 dereferenceable(24) %1)
  %.fca.0.extract5 = extractvalue { <2 x float>, float } %8, 0
  %.fca.1.extract6 = extractvalue { <2 x float>, float } %8, 1
  store <2 x float> %.fca.0.extract5, ptr %4, align 8
  %.sroa.28.0..sroa_idx = getelementptr inbounds i8, ptr %4, i64 8
  store float %.fca.1.extract6, ptr %.sroa.28.0..sroa_idx, align 8
  call void @_Z14testFuzzyEqualIN2mt7Vector3IfEEEvRKT_S5_(ptr noundef nonnull align 4 dereferenceable(12) %3, ptr noundef nonnull align 4 dereferenceable(12) %4)
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %4) #3
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %3) #3
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %5) #3
  %9 = call { <2 x float>, float } @_ZN2mt4dualIfEENS_7Vector3IT_EERKNS1_INS_4DualIS2_EEEE(ptr noundef nonnull align 4 dereferenceable(24) %0)
  %.fca.0.extract1 = extractvalue { <2 x float>, float } %9, 0
  %.fca.1.extract2 = extractvalue { <2 x float>, float } %9, 1
  store <2 x float> %.fca.0.extract1, ptr %5, align 8
  %.sroa.24.0..sroa_idx = getelementptr inbounds i8, ptr %5, i64 8
  store float %.fca.1.extract2, ptr %.sroa.24.0..sroa_idx, align 8
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %6) #3
  %10 = call { <2 x float>, float } @_ZN2mt4dualIfEENS_7Vector3IT_EERKNS1_INS_4DualIS2_EEEE(ptr noundef nonnull align 4 dereferenceable(24) %1)
  %.fca.0.extract = extractvalue { <2 x float>, float } %10, 0
  %.fca.1.extract = extractvalue { <2 x float>, float } %10, 1
  store <2 x float> %.fca.0.extract, ptr %6, align 8
  %.sroa.2.0..sroa_idx = getelementptr inbounds i8, ptr %6, i64 8
  store float %.fca.1.extract, ptr %.sroa.2.0..sroa_idx, align 8
  call void @_Z14testFuzzyEqualIN2mt7Vector3IfEEEvRKT_S5_(ptr noundef nonnull align 4 dereferenceable(12) %5, ptr noundef nonnull align 4 dereferenceable(12) %6)
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %6) #3
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %5) #3
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z14testFuzzyEqualIN2mt7Vector3IfEEEvRKT_S5_(ptr noundef nonnull align 4 dereferenceable(12), ptr noundef nonnull align 4 dereferenceable(12)) local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local { <2 x float>, float } @_ZN2mt4realIfEENS_7Vector3IT_EERKNS1_INS_4DualIS2_EEEE(ptr noundef nonnull align 4 dereferenceable(24)) local_unnamed_addr #2

; Function Attrs: alwaysinline mustprogress uwtable
declare dso_local { <2 x float>, float } @_ZN2mt4dualIfEENS_7Vector3IT_EERKNS1_INS_4DualIS2_EEEE(ptr noundef nonnull align 4 dereferenceable(24)) local_unnamed_addr #2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: GlobalOptPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,TailCallElimPass