; LLVM IR from VastoLorde95/Competitive-Programming :: Hackerrank/Week of Code/Week 20/Problem F/F.ll (Z3getii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.FenwickRMQ = type <{ %"class.std::vector", %"class.std::vector", i32, [4 x i8] }>
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@segmentTree = external dso_local global [200200 x %struct.FenwickRMQ], align 16
@d = external dso_local global i32, align 4

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z3getii(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 1000000000, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  %10 = load i32, ptr %3, align 4, !tbaa !5
  %11 = load i32, ptr @d, align 4, !tbaa !5
  %12 = add nsw i32 %10, %11
  %13 = sub nsw i32 %12, 1
  store i32 %13, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %14 = load i32, ptr %4, align 4, !tbaa !5
  %15 = load i32, ptr @d, align 4, !tbaa !5
  %16 = add nsw i32 %14, %15
  %17 = sub nsw i32 %16, 1
  store i32 %17, ptr %7, align 4, !tbaa !5
  br label %18

18:                                               ; preds = %52, %2
  %19 = load i32, ptr %6, align 4, !tbaa !5
  %20 = load i32, ptr %7, align 4, !tbaa !5
  %21 = icmp slt i32 %19, %20
  br i1 %21, label %23, label %22

22:                                               ; preds = %18
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  br label %57

23:                                               ; preds = %18
  %24 = load i32, ptr %6, align 4, !tbaa !5
  %25 = and i32 %24, 1
  %26 = icmp ne i32 %25, 0
  br i1 %26, label %27, label %37

27:                                               ; preds = %23
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %28 = load i32, ptr %6, align 4, !tbaa !5
  %29 = add nsw i32 %28, 1
  store i32 %29, ptr %6, align 4, !tbaa !5
  %30 = sext i32 %28 to i64
  %31 = getelementptr inbounds [200200 x %struct.FenwickRMQ], ptr @segmentTree, i64 0, i64 %30
  %32 = load i32, ptr %4, align 4, !tbaa !5
  %33 = sub nsw i32 %32, 1
  %34 = call noundef i32 @_ZN10FenwickRMQ5queryEi(ptr noundef nonnull align 8 dereferenceable(52) %31, i32 noundef %33)
  store i32 %34, ptr %8, align 4, !tbaa !5
  %35 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %5, ptr noundef nonnull align 4 dereferenceable(4) %8)
  %36 = load i32, ptr %35, align 4, !tbaa !5
  store i32 %36, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  br label %37

37:                                               ; preds = %27, %23
  %38 = load i32, ptr %7, align 4, !tbaa !5
  %39 = and i32 %38, 1
  %40 = icmp ne i32 %39, 0
  br i1 %40, label %41, label %51

41:                                               ; preds = %37
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %42 = load i32, ptr %7, align 4, !tbaa !5
  %43 = add nsw i32 %42, -1
  store i32 %43, ptr %7, align 4, !tbaa !5
  %44 = sext i32 %43 to i64
  %45 = getelementptr inbounds [200200 x %struct.FenwickRMQ], ptr @segmentTree, i64 0, i64 %44
  %46 = load i32, ptr %4, align 4, !tbaa !5
  %47 = sub nsw i32 %46, 1
  %48 = call noundef i32 @_ZN10FenwickRMQ5queryEi(ptr noundef nonnull align 8 dereferenceable(52) %45, i32 noundef %47)
  store i32 %48, ptr %9, align 4, !tbaa !5
  %49 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %5, ptr noundef nonnull align 4 dereferenceable(4) %9)
  %50 = load i32, ptr %49, align 4, !tbaa !5
  store i32 %50, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  br label %51

51:                                               ; preds = %41, %37
  br label %52

52:                                               ; preds = %51
  %53 = load i32, ptr %6, align 4, !tbaa !5
  %54 = ashr i32 %53, 1
  store i32 %54, ptr %6, align 4, !tbaa !5
  %55 = load i32, ptr %7, align 4, !tbaa !5
  %56 = ashr i32 %55, 1
  store i32 %56, ptr %7, align 4, !tbaa !5
  br label %18, !llvm.loop !9

57:                                               ; preds = %22
  %58 = load i32, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  ret i32 %58
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZN10FenwickRMQ5queryEi(ptr noundef nonnull align 8 dereferenceable(52), i32 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.FenwickRMQ = type <{ %"class.std::vector", %"class.std::vector", i32, [4 x i8] }>
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@segmentTree = external dso_local global [200200 x %struct.FenwickRMQ], align 16
@d = external dso_local local_unnamed_addr global i32, align 4

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z3getii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
  store i32 1000000000, ptr %3, align 4, !tbaa !5
  %6 = load i32, ptr @d, align 4, !tbaa !5
  %7 = add i32 %6, -1
  %8 = add i32 %7, %0
  %9 = add i32 %1, -1
  %10 = add i32 %9, %6
  %11 = icmp slt i32 %8, %10
  br i1 %11, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %32, %2
  %12 = phi i32 [ 1000000000, %2 ], [ %33, %32 ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
  ret i32 %12

.lr.ph:                                           ; preds = %2, %32
  %13 = phi i32 [ %33, %32 ], [ 1000000000, %2 ]
  %.016 = phi i32 [ %35, %32 ], [ %10, %2 ]
  %.01215 = phi i32 [ %34, %32 ], [ %8, %2 ]
  %14 = and i32 %.01215, 1
  %.not = icmp eq i32 %14, 0
  br i1 %.not, label %22, label %15

15:                                               ; preds = %.lr.ph
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
  %16 = add nsw i32 %.01215, 1
  %17 = sext i32 %.01215 to i64
  %18 = getelementptr inbounds [200200 x %struct.FenwickRMQ], ptr @segmentTree, i64 0, i64 %17
  %19 = call noundef i32 @_ZN10FenwickRMQ5queryEi(ptr noundef nonnull align 8 dereferenceable(52) %18, i32 noundef %9)
  store i32 %19, ptr %4, align 4, !tbaa !5
  %20 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %3, ptr noundef nonnull align 4 dereferenceable(4) %4)
  %21 = load i32, ptr %20, align 4, !tbaa !5
  store i32 %21, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
  br label %22

22:                                               ; preds = %15, %.lr.ph
  %23 = phi i32 [ %21, %15 ], [ %13, %.lr.ph ]
  %.113 = phi i32 [ %16, %15 ], [ %.01215, %.lr.ph ]
  %24 = and i32 %.016, 1
  %.not14 = icmp eq i32 %24, 0
  br i1 %.not14, label %32, label %25

25:                                               ; preds = %22
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
  %26 = add nsw i32 %.016, -1
  %27 = sext i32 %26 to i64
  %28 = getelementptr inbounds [200200 x %struct.FenwickRMQ], ptr @segmentTree, i64 0, i64 %27
  %29 = call noundef i32 @_ZN10FenwickRMQ5queryEi(ptr noundef nonnull align 8 dereferenceable(52) %28, i32 noundef %9)
  store i32 %29, ptr %5, align 4, !tbaa !5
  %30 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %3, ptr noundef nonnull align 4 dereferenceable(4) %5)
  %31 = load i32, ptr %30, align 4, !tbaa !5
  store i32 %31, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
  br label %32

32:                                               ; preds = %22, %25
  %33 = phi i32 [ %31, %25 ], [ %23, %22 ]
  %.1 = phi i32 [ %26, %25 ], [ %.016, %22 ]
  %34 = ashr i32 %.113, 1
  %35 = ashr i32 %.1, 1
  %36 = icmp slt i32 %34, %35
  br i1 %36, label %.lr.ph, label %._crit_edge, !llvm.loop !9
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZN10FenwickRMQ5queryEi(ptr noundef nonnull align 8 dereferenceable(52), i32 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass