; LLVM IR from Shah-Shishir/Codeforces-Solutions :: 144A. Arrival of the General (main)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@arr = external dso_local global [105 x i32], align 16
@.str = external hidden unnamed_addr constant [3 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [4 x i8], align 1

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  br label %9

9:                                                ; preds = %98, %0
  %10 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef %2)
  %11 = icmp ne i32 %10, -1
  br i1 %11, label %12, label %101

12:                                               ; preds = %9
  store i32 -1, ptr %4, align 4, !tbaa !5
  store i32 101, ptr %5, align 4, !tbaa !5
  store i32 0, ptr %8, align 4, !tbaa !5
  store i32 0, ptr %7, align 4, !tbaa !5
  store i32 0, ptr %3, align 4, !tbaa !5
  br label %13

13:                                               ; preds = %35, %12
  %14 = load i32, ptr %3, align 4, !tbaa !5
  %15 = load i32, ptr %2, align 4, !tbaa !5
  %16 = icmp slt i32 %14, %15
  br i1 %16, label %17, label %38

17:                                               ; preds = %13
  %18 = load i32, ptr %3, align 4, !tbaa !5
  %19 = sext i32 %18 to i64
  %20 = getelementptr inbounds [105 x i32], ptr @arr, i64 0, i64 %19
  %21 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef %20)
  %22 = load i32, ptr %3, align 4, !tbaa !5
  %23 = sext i32 %22 to i64
  %24 = getelementptr inbounds [105 x i32], ptr @arr, i64 0, i64 %23
  %25 = load i32, ptr %24, align 4, !tbaa !5
  %26 = load i32, ptr %4, align 4, !tbaa !5
  %27 = icmp sgt i32 %25, %26
  br i1 %27, label %28, label %34

28:                                               ; preds = %17
  %29 = load i32, ptr %3, align 4, !tbaa !5
  %30 = sext i32 %29 to i64
  %31 = getelementptr inbounds [105 x i32], ptr @arr, i64 0, i64 %30
  %32 = load i32, ptr %31, align 4, !tbaa !5
  store i32 %32, ptr %4, align 4, !tbaa !5
  %33 = load i32, ptr %3, align 4, !tbaa !5
  store i32 %33, ptr %7, align 4, !tbaa !5
  br label %34

34:                                               ; preds = %28, %17
  br label %35

35:                                               ; preds = %34
  %36 = load i32, ptr %3, align 4, !tbaa !5
  %37 = add nsw i32 %36, 1
  store i32 %37, ptr %3, align 4, !tbaa !5
  br label %13, !llvm.loop !9

38:                                               ; preds = %13
  store i32 0, ptr %6, align 4, !tbaa !5
  %39 = load i32, ptr %7, align 4, !tbaa !5
  store i32 %39, ptr %3, align 4, !tbaa !5
  br label %40

40:                                               ; preds = %53, %38
  %41 = load i32, ptr %3, align 4, !tbaa !5
  %42 = icmp sge i32 %41, 1
  br i1 %42, label %43, label %56

43:                                               ; preds = %40
  %44 = load i32, ptr %3, align 4, !tbaa !5
  %45 = sext i32 %44 to i64
  %46 = getelementptr inbounds [105 x i32], ptr @arr, i64 0, i64 %45
  %47 = load i32, ptr %3, align 4, !tbaa !5
  %48 = sub nsw i32 %47, 1
  %49 = sext i32 %48 to i64
  %50 = getelementptr inbounds [105 x i32], ptr @arr, i64 0, i64 %49
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %46, ptr noundef nonnull align 4 dereferenceable(4) %50) #4
  %51 = load i32, ptr %6, align 4, !tbaa !5
  %52 = add nsw i32 %51, 1
  store i32 %52, ptr %6, align 4, !tbaa !5
  br label %53

53:                                               ; preds = %43
  %54 = load i32, ptr %3, align 4, !tbaa !5
  %55 = add nsw i32 %54, -1
  store i32 %55, ptr %3, align 4, !tbaa !5
  br label %40, !llvm.loop !11

56:                                               ; preds = %40
  store i32 0, ptr %3, align 4, !tbaa !5
  br label %57

57:                                               ; preds = %75, %56
  %58 = load i32, ptr %3, align 4, !tbaa !5
  %59 = load i32, ptr %2, align 4, !tbaa !5
  %60 = icmp slt i32 %58, %59
  br i1 %60, label %61, label %78

61:                                               ; preds = %57
  %62 = load i32, ptr %3, align 4, !tbaa !5
  %63 = sext i32 %62 to i64
  %64 = getelementptr inbounds [105 x i32], ptr @arr, i64 0, i64 %63
  %65 = load i32, ptr %64, align 4, !tbaa !5
  %66 = load i32, ptr %5, align 4, !tbaa !5
  %67 = icmp sle i32 %65, %66
  br i1 %67, label %68, label %74

68:                                               ; preds = %61
  %69 = load i32, ptr %3, align 4, !tbaa !5
  %70 = sext i32 %69 to i64
  %71 = getelementptr inbounds [105 x i32], ptr @arr, i64 0, i64 %70
  %72 = load i32, ptr %71, align 4, !tbaa !5
  store i32 %72, ptr %5, align 4, !tbaa !5
  %73 = load i32, ptr %3, align 4, !tbaa !5
  store i32 %73, ptr %8, align 4, !tbaa !5
  br label %74

74:                                               ; preds = %68, %61
  br label %75

75:                                               ; preds = %74
  %76 = load i32, ptr %3, align 4, !tbaa !5
  %77 = add nsw i32 %76, 1
  store i32 %77, ptr %3, align 4, !tbaa !5
  br label %57, !llvm.loop !12

78:                                               ; preds = %57
  %79 = load i32, ptr %8, align 4, !tbaa !5
  store i32 %79, ptr %3, align 4, !tbaa !5
  br label %80

80:                                               ; preds = %95, %78
  %81 = load i32, ptr %3, align 4, !tbaa !5
  %82 = load i32, ptr %2, align 4, !tbaa !5
  %83 = sub nsw i32 %82, 1
  %84 = icmp slt i32 %81, %83
  br i1 %84, label %85, label %98

85:                                               ; preds = %80
  %86 = load i32, ptr %3, align 4, !tbaa !5
  %87 = sext i32 %86 to i64
  %88 = getelementptr inbounds [105 x i32], ptr @arr, i64 0, i64 %87
  %89 = load i32, ptr %3, align 4, !tbaa !5
  %90 = add nsw i32 %89, 1
  %91 = sext i32 %90 to i64
  %92 = getelementptr inbounds [105 x i32], ptr @arr, i64 0, i64 %91
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %88, ptr noundef nonnull align 4 dereferenceable(4) %92) #4
  %93 = load i32, ptr %6, align 4, !tbaa !5
  %94 = add nsw i32 %93, 1
  store i32 %94, ptr %6, align 4, !tbaa !5
  br label %95

95:                                               ; preds = %85
  %96 = load i32, ptr %3, align 4, !tbaa !5
  %97 = add nsw i32 %96, 1
  store i32 %97, ptr %3, align 4, !tbaa !5
  br label %80, !llvm.loop !13

98:                                               ; preds = %80
  %99 = load i32, ptr %6, align 4, !tbaa !5
  %100 = call i32 (ptr, ...) @printf(ptr noundef @.str.1, i32 noundef %99)
  br label %9, !llvm.loop !14

101:                                              ; preds = %9
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #4
  ret i32 0
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @__isoc99_scanf(ptr noundef, ...) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #3

declare i32 @printf(ptr noundef, ...) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@arr = external dso_local global [105 x i32], align 16
@.str = external hidden unnamed_addr constant [3 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [4 x i8], align 1

; Function Attrs: mustprogress norecurse nounwind uwtable
define dso_local noundef i32 @main() local_unnamed_addr #0 {
  %1 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #5
  %2 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull %1)
  %.not61 = icmp eq i32 %2, -1
  br i1 %.not61, label %._crit_edge62, label %.preheader44

.preheader44:                                     ; preds = %0, %._crit_edge
  %3 = load i32, ptr %1, align 4, !tbaa !5
  %4 = icmp sgt i32 %3, 0
  br i1 %4, label %.lr.ph, label %.preheader

.preheader43:                                     ; preds = %.lr.ph
  %5 = icmp sgt i32 %spec.select39, 0
  br i1 %5, label %.lr.ph50.preheader, label %.preheader42

.lr.ph50.preheader:                               ; preds = %.preheader43
  %6 = zext nneg i32 %spec.select39 to i64
  br label %.lr.ph50

.lr.ph:                                           ; preds = %.preheader44, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %.preheader44 ]
  %.02647 = phi i32 [ %spec.select39, %.lr.ph ], [ 0, %.preheader44 ]
  %.03246 = phi i32 [ %spec.select, %.lr.ph ], [ -1, %.preheader44 ]
  %7 = getelementptr inbounds [105 x i32], ptr @arr, i64 0, i64 %indvars.iv
  %8 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull %7)
  %9 = load i32, ptr %7, align 4, !tbaa !5
  %10 = icmp sgt i32 %9, %.03246
  %spec.select = call i32 @llvm.smax.i32(i32 %9, i32 %.03246)
  %11 = trunc nuw nsw i64 %indvars.iv to i32
  %spec.select39 = select i1 %10, i32 %11, i32 %.02647
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %12 = load i32, ptr %1, align 4, !tbaa !5
  %13 = sext i32 %12 to i64
  %14 = icmp slt i64 %indvars.iv.next, %13
  br i1 %14, label %.lr.ph, label %.preheader43, !llvm.loop !9

.preheader42.loopexit:                            ; preds = %.lr.ph50
  %.pre = load i32, ptr %1, align 4, !tbaa !5
  br label %.preheader42

.preheader42:                                     ; preds = %.preheader42.loopexit, %.preheader43
  %15 = phi i32 [ %12, %.preheader43 ], [ %.pre, %.preheader42.loopexit ]
  %.028.lcssa = phi i32 [ 0, %.preheader43 ], [ %spec.select39, %.preheader42.loopexit ]
  %16 = icmp sgt i32 %15, 0
  br i1 %16, label %.lr.ph55.preheader, label %.preheader

.lr.ph55.preheader:                               ; preds = %.preheader42
  %wide.trip.count = zext nneg i32 %15 to i64
  %xtraiter = and i64 %wide.trip.count, 3
  %17 = icmp ult i32 %15, 4
  br i1 %17, label %.preheader.loopexit.unr-lcssa, label %.lr.ph55.preheader.new

.lr.ph55.preheader.new:                           ; preds = %.lr.ph55.preheader
  %unroll_iter = and i64 %wide.trip.count, 2147483644
  br label %.lr.ph55

.lr.ph50:                                         ; preds = %.lr.ph50.preheader, %.lr.ph50
  %indvars.iv65 = phi i64 [ %6, %.lr.ph50.preheader ], [ %indvars.iv.next66, %.lr.ph50 ]
  %.02849 = phi i32 [ 0, %.lr.ph50.preheader ], [ %20, %.lr.ph50 ]
  %18 = getelementptr inbounds [105 x i32], ptr @arr, i64 0, i64 %indvars.iv65
  %indvars.iv.next66 = add nsw i64 %indvars.iv65, -1
  %19 = getelementptr inbounds [105 x i32], ptr @arr, i64 0, i64 %indvars.iv.next66
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %18, ptr noundef nonnull align 4 dereferenceable(4) %19) #5
  %20 = add nuw nsw i32 %.02849, 1
  %exitcond.not = icmp eq i32 %20, %spec.select39
  br i1 %exitcond.not, label %.preheader42.loopexit, label %.lr.ph50, !llvm.loop !11

.preheader.loopexit.unr-lcssa:                    ; preds = %.lr.ph55, %.lr.ph55.preheader
  %spec.select41.lcssa.ph = phi i32 [ poison, %.lr.ph55.preheader ], [ %spec.select41.3, %.lr.ph55 ]
  %indvars.iv68.unr = phi i64 [ 0, %.lr.ph55.preheader ], [ %indvars.iv.next69.3, %.lr.ph55 ]
  %.054.unr = phi i32 [ 0, %.lr.ph55.preheader ], [ %spec.select41.3, %.lr.ph55 ]
  %.03053.unr = phi i32 [ 101, %.lr.ph55.preheader ], [ %spec.select40.3, %.lr.ph55 ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %.preheader, label %.lr.ph55.epil

.lr.ph55.epil:                                    ; preds = %.preheader.loopexit.unr-lcssa, %.lr.ph55.epil
  %indvars.iv68.epil = phi i64 [ %indvars.iv.next69.epil, %.lr.ph55.epil ], [ %indvars.iv68.unr, %.preheader.loopexit.unr-lcssa ]
  %.054.epil = phi i32 [ %spec.select41.epil, %.lr.ph55.epil ], [ %.054.unr, %.preheader.loopexit.unr-lcssa ]
  %.03053.epil = phi i32 [ %spec.select40.epil, %.lr.ph55.epil ], [ %.03053.unr, %.preheader.loopexit.unr-lcssa ]
  %epil.iter = phi i64 [ %epil.iter.next, %.lr.ph55.epil ], [ 0, %.preheader.loopexit.unr-lcssa ]
  %21 = getelementptr inbounds [105 x i32], ptr @arr, i64 0, i64 %indvars.iv68.epil
  %22 = load i32, ptr %21, align 4, !tbaa !5
  %.not38.epil = icmp sgt i32 %22, %.03053.epil
  %spec.select40.epil = call i32 @llvm.smin.i32(i32 %22, i32 %.03053.epil)
  %23 = trunc nuw nsw i64 %indvars.iv68.epil to i32
  %spec.select41.epil = select i1 %.not38.epil, i32 %.054.epil, i32 %23
  %indvars.iv.next69.epil = add nuw nsw i64 %indvars.iv68.epil, 1
  %epil.iter.next = add i64 %epil.iter, 1
  %epil.iter.cmp.not = icmp eq i64 %epil.iter.next, %xtraiter
  br i1 %epil.iter.cmp.not, label %.preheader, label %.lr.ph55.epil, !llvm.loop !12

.preheader:                                       ; preds = %.preheader.loopexit.unr-lcssa, %.lr.ph55.epil, %.preheader44, %.preheader42
  %.028.lcssa77 = phi i32 [ %.028.lcssa, %.preheader42 ], [ 0, %.preheader44 ], [ %.028.lcssa, %.lr.ph55.epil ], [ %.028.lcssa, %.preheader.loopexit.unr-lcssa ]
  %24 = phi i32 [ %15, %.preheader42 ], [ %3, %.preheader44 ], [ %15, %.lr.ph55.epil ], [ %15, %.preheader.loopexit.unr-lcssa ]
  %.0.lcssa = phi i32 [ 0, %.preheader42 ], [ 0, %.preheader44 ], [ %spec.select41.lcssa.ph, %.preheader.loopexit.unr-lcssa ], [ %spec.select41.epil, %.lr.ph55.epil ]
  %25 = add nsw i32 %24, -1
  %26 = icmp slt i32 %.0.lcssa, %25
  br i1 %26, label %.lr.ph59.preheader, label %._crit_edge

.lr.ph59.preheader:                               ; preds = %.preheader
  %27 = sext i32 %.0.lcssa to i64
  br label %.lr.ph59

.lr.ph55:                                         ; preds = %.lr.ph55, %.lr.ph55.preheader.new
  %indvars.iv68 = phi i64 [ 0, %.lr.ph55.preheader.new ], [ %indvars.iv.next69.3, %.lr.ph55 ]
  %.054 = phi i32 [ 0, %.lr.ph55.preheader.new ], [ %spec.select41.3, %.lr.ph55 ]
  %.03053 = phi i32 [ 101, %.lr.ph55.preheader.new ], [ %spec.select40.3, %.lr.ph55 ]
  %niter = phi i64 [ 0, %.lr.ph55.preheader.new ], [ %niter.next.3, %.lr.ph55 ]
  %28 = getelementptr inbounds [105 x i32], ptr @arr, i64 0, i64 %indvars.iv68
  %29 = load i32, ptr %28, align 16, !tbaa !5
  %.not38 = icmp sgt i32 %29, %.03053
  %spec.select40 = call i32 @llvm.smin.i32(i32 %29, i32 %.03053)
  %30 = trunc nuw nsw i64 %indvars.iv68 to i32
  %spec.select41 = select i1 %.not38, i32 %.054, i32 %30
  %indvars.iv.next69 = or disjoint i64 %indvars.iv68, 1
  %31 = getelementptr inbounds [105 x i32], ptr @arr, i64 0, i64 %indvars.iv.next69
  %32 = load i32, ptr %31, align 4, !tbaa !5
  %.not38.1 = icmp sgt i32 %32, %spec.select40
  %spec.select40.1 = call i32 @llvm.smin.i32(i32 %32, i32 %spec.select40)
  %33 = trunc nuw nsw i64 %indvars.iv.next69 to i32
  %spec.select41.1 = select i1 %.not38.1, i32 %spec.select41, i32 %33
  %indvars.iv.next69.1 = or disjoint i64 %indvars.iv68, 2
  %34 = getelementptr inbounds [105 x i32], ptr @arr, i64 0, i64 %indvars.iv.next69.1
  %35 = load i32, ptr %34, align 8, !tbaa !5
  %.not38.2 = icmp sgt i32 %35, %spec.select40.1
  %spec.select40.2 = call i32 @llvm.smin.i32(i32 %35, i32 %spec.select40.1)
  %36 = trunc nuw nsw i64 %indvars.iv.next69.1 to i32
  %spec.select41.2 = select i1 %.not38.2, i32 %spec.select41.1, i32 %36
  %indvars.iv.next69.2 = or disjoint i64 %indvars.iv68, 3
  %37 = getelementptr inbounds [105 x i32], ptr @arr, i64 0, i64 %indvars.iv.next69.2
  %38 = load i32, ptr %37, align 4, !tbaa !5
  %.not38.3 = icmp sgt i32 %38, %spec.select40.2
  %spec.select40.3 = call i32 @llvm.smin.i32(i32 %38, i32 %spec.select40.2)
  %39 = trunc nuw nsw i64 %indvars.iv.next69.2 to i32
  %spec.select41.3 = select i1 %.not38.3, i32 %spec.select41.2, i32 %39
  %indvars.iv.next69.3 = add nuw nsw i64 %indvars.iv68, 4
  %niter.next.3 = add i64 %niter, 4
  %niter.ncmp.3 = icmp eq i64 %niter.next.3, %unroll_iter
  br i1 %niter.ncmp.3, label %.preheader.loopexit.unr-lcssa, label %.lr.ph55, !llvm.loop !14

.lr.ph59:                                         ; preds = %.lr.ph59.preheader, %.lr.ph59
  %indvars.iv72 = phi i64 [ %27, %.lr.ph59.preheader ], [ %indvars.iv.next73, %.lr.ph59 ]
  %.12958 = phi i32 [ %.028.lcssa77, %.lr.ph59.preheader ], [ %42, %.lr.ph59 ]
  %40 = getelementptr inbounds [105 x i32], ptr @arr, i64 0, i64 %indvars.iv72
  %indvars.iv.next73 = add nsw i64 %indvars.iv72, 1
  %41 = getelementptr inbounds [105 x i32], ptr @arr, i64 0, i64 %indvars.iv.next73
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %40, ptr noundef nonnull align 4 dereferenceable(4) %41) #5
  %42 = add nuw nsw i32 %.12958, 1
  %43 = load i32, ptr %1, align 4, !tbaa !5
  %44 = add nsw i32 %43, -1
  %45 = sext i32 %44 to i64
  %46 = icmp slt i64 %indvars.iv.next73, %45
  br i1 %46, label %.lr.ph59, label %._crit_edge, !llvm.loop !15

._crit_edge:                                      ; preds = %.lr.ph59, %.preheader
  %.129.lcssa = phi i32 [ %.028.lcssa77, %.preheader ], [ %42, %.lr.ph59 ]
  %47 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1, i32 noundef %.129.lcssa)
  %48 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull %1)
  %.not = icmp eq i32 %48, -1
  br i1 %.not, label %._crit_edge62, label %.preheader44, !llvm.loop !16

._crit_edge62:                                    ; preds = %._crit_edge, %0
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #5
  ret i32 0
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nofree nounwind
declare noundef i32 @__isoc99_scanf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #3

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #4

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #4

attributes #0 = { mustprogress norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.unroll.disable"}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10}
!16 = distinct !{!16, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass