; LLVM IR from lfarcaro/ARINC653_ARMV7A_AM335X :: Hardware (uart_irda_cir)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @UARTRegConfigModeEnable(i32 noundef %0, i32 noundef %1) #1 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 0, ptr %5, align 4, !tbaa !5
  %6 = load i32, ptr %3, align 4, !tbaa !5
  %7 = add i32 %6, 12
  %8 = zext i32 %7 to i64
  %9 = inttoptr i64 %8 to ptr
  %10 = load volatile i32, ptr %9, align 4, !tbaa !5
  store i32 %10, ptr %5, align 4, !tbaa !5
  %11 = load i32, ptr %4, align 4, !tbaa !5
  switch i32 %11, label %26 [
    i32 128, label %12
    i32 191, label %12
    i32 127, label %19
  ]

12:                                               ; preds = %2, %2
  %13 = load i32, ptr %4, align 4, !tbaa !5
  %14 = and i32 %13, 255
  %15 = load i32, ptr %3, align 4, !tbaa !5
  %16 = add i32 %15, 12
  %17 = zext i32 %16 to i64
  %18 = inttoptr i64 %17 to ptr
  store volatile i32 %14, ptr %18, align 4, !tbaa !5
  br label %27

19:                                               ; preds = %2
  %20 = load i32, ptr %3, align 4, !tbaa !5
  %21 = add i32 %20, 12
  %22 = zext i32 %21 to i64
  %23 = inttoptr i64 %22 to ptr
  %24 = load volatile i32, ptr %23, align 4, !tbaa !5
  %25 = and i32 %24, 127
  store volatile i32 %25, ptr %23, align 4, !tbaa !5
  br label %27

26:                                               ; preds = %2
  br label %27

27:                                               ; preds = %26, %19, %12
  %28 = load i32, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  ret i32 %28
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local i32 @UARTRegConfigModeEnable(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = add i32 %0, 12
  %4 = zext i32 %3 to i64
  %5 = inttoptr i64 %4 to ptr
  %6 = load volatile i32, ptr %5, align 4, !tbaa !5
  switch i32 %1, label %10 [
    i32 128, label %.sink.split
    i32 191, label %.sink.split
    i32 127, label %7
  ]

7:                                                ; preds = %2
  %8 = load volatile i32, ptr %5, align 4, !tbaa !5
  %9 = and i32 %8, 127
  br label %.sink.split

.sink.split:                                      ; preds = %2, %2, %7
  %.sink = phi i32 [ %9, %7 ], [ %1, %2 ], [ %1, %2 ]
  store volatile i32 %.sink, ptr %5, align 4, !tbaa !5
  br label %10

10:                                               ; preds = %.sink.split, %2
  ret i32 %6
}

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass