; LLVM IR from Softmotions/iowow :: src/json (iwjson)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [6 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local void @iwjson_ftoa(x86_fp80 noundef %0, ptr noundef align 1 dereferenceable(32) %1, ptr noundef %2) #0 {
  %4 = alloca x86_fp80, align 16
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  store x86_fp80 %0, ptr %4, align 16, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !9
  store ptr %2, ptr %6, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  %10 = load ptr, ptr %5, align 8, !tbaa !9
  %11 = load x86_fp80, ptr %4, align 16, !tbaa !5
  %12 = call i32 (ptr, i64, ptr, ...) @snprintf(ptr noundef %10, i64 noundef 32, ptr noundef @.str, x86_fp80 noundef %11) #4
  store i32 %12, ptr %7, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #4
  %13 = load ptr, ptr %5, align 8, !tbaa !9
  %14 = call ptr @strchr(ptr noundef %13, i32 noundef 44) #5
  store ptr %14, ptr %8, align 8, !tbaa !9
  %15 = load ptr, ptr %8, align 8, !tbaa !9
  %16 = icmp ne ptr %15, null
  br i1 %16, label %17, label %19

17:                                               ; preds = %3
  %18 = load ptr, ptr %8, align 8, !tbaa !9
  store i8 46, ptr %18, align 1, !tbaa !13
  br label %19

19:                                               ; preds = %17, %3
  %20 = load i32, ptr %7, align 4, !tbaa !11
  %21 = icmp sle i32 %20, 0
  br i1 %21, label %22, label %26

22:                                               ; preds = %19
  %23 = load ptr, ptr %5, align 8, !tbaa !9
  %24 = getelementptr inbounds i8, ptr %23, i64 0
  store i8 0, ptr %24, align 1, !tbaa !13
  %25 = load ptr, ptr %6, align 8, !tbaa !9
  store i64 0, ptr %25, align 8, !tbaa !14
  store i32 1, ptr %9, align 4
  br label %73

26:                                               ; preds = %19
  br label %27

27:                                               ; preds = %41, %26
  %28 = load i32, ptr %7, align 4, !tbaa !11
  %29 = icmp sgt i32 %28, 0
  br i1 %29, label %30, label %39

30:                                               ; preds = %27
  %31 = load ptr, ptr %5, align 8, !tbaa !9
  %32 = load i32, ptr %7, align 4, !tbaa !11
  %33 = sub nsw i32 %32, 1
  %34 = sext i32 %33 to i64
  %35 = getelementptr inbounds i8, ptr %31, i64 %34
  %36 = load i8, ptr %35, align 1, !tbaa !13
  %37 = sext i8 %36 to i32
  %38 = icmp eq i32 %37, 48
  br label %39

39:                                               ; preds = %30, %27
  %40 = phi i1 [ false, %27 ], [ %38, %30 ]
  br i1 %40, label %41, label %49

41:                                               ; preds = %39
  %42 = load ptr, ptr %5, align 8, !tbaa !9
  %43 = load i32, ptr %7, align 4, !tbaa !11
  %44 = sub nsw i32 %43, 1
  %45 = sext i32 %44 to i64
  %46 = getelementptr inbounds i8, ptr %42, i64 %45
  store i8 0, ptr %46, align 1, !tbaa !13
  %47 = load i32, ptr %7, align 4, !tbaa !11
  %48 = add nsw i32 %47, -1
  store i32 %48, ptr %7, align 4, !tbaa !11
  br label %27, !llvm.loop !16

49:                                               ; preds = %39
  %50 = load i32, ptr %7, align 4, !tbaa !11
  %51 = icmp sgt i32 %50, 0
  br i1 %51, label %52, label %69

52:                                               ; preds = %49
  %53 = load ptr, ptr %5, align 8, !tbaa !9
  %54 = load i32, ptr %7, align 4, !tbaa !11
  %55 = sub nsw i32 %54, 1
  %56 = sext i32 %55 to i64
  %57 = getelementptr inbounds i8, ptr %53, i64 %56
  %58 = load i8, ptr %57, align 1, !tbaa !13
  %59 = sext i8 %58 to i32
  %60 = icmp eq i32 %59, 46
  br i1 %60, label %61, label %69

61:                                               ; preds = %52
  %62 = load ptr, ptr %5, align 8, !tbaa !9
  %63 = load i32, ptr %7, align 4, !tbaa !11
  %64 = sub nsw i32 %63, 1
  %65 = sext i32 %64 to i64
  %66 = getelementptr inbounds i8, ptr %62, i64 %65
  store i8 0, ptr %66, align 1, !tbaa !13
  %67 = load i32, ptr %7, align 4, !tbaa !11
  %68 = add nsw i32 %67, -1
  store i32 %68, ptr %7, align 4, !tbaa !11
  br label %69

69:                                               ; preds = %61, %52, %49
  %70 = load i32, ptr %7, align 4, !tbaa !11
  %71 = sext i32 %70 to i64
  %72 = load ptr, ptr %6, align 8, !tbaa !9
  store i64 %71, ptr %72, align 8, !tbaa !14
  store i32 0, ptr %9, align 4
  br label %73

73:                                               ; preds = %69, %22
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  %74 = load i32, ptr %9, align 4
  switch i32 %74, label %76 [
    i32 0, label %75
    i32 1, label %75
  ]

75:                                               ; preds = %73, %73
  ret void

76:                                               ; preds = %73
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind
declare i32 @snprintf(ptr noundef, i64 noundef, ptr noundef, ...) #2

; Function Attrs: nounwind willreturn memory(read)
declare ptr @strchr(ptr noundef, i32 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind willreturn memory(read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { nounwind willreturn memory(read) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"long", !7, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [6 x i8], align 1

; Function Attrs: nofree nounwind uwtable
define dso_local void @iwjson_ftoa(x86_fp80 noundef %0, ptr noundef align 1 dereferenceable(32) %1, ptr nocapture noundef writeonly %2) local_unnamed_addr #0 {
  %4 = tail call i32 (ptr, i64, ptr, ...) @snprintf(ptr noundef nonnull dereferenceable(1) %1, i64 noundef 32, ptr noundef nonnull @.str, x86_fp80 noundef %0) #3
  %5 = tail call ptr @strchr(ptr noundef nonnull dereferenceable(1) %1, i32 noundef 44) #4
  %.not = icmp eq ptr %5, null
  br i1 %.not, label %7, label %6

6:                                                ; preds = %3
  store i8 46, ptr %5, align 1, !tbaa !5
  br label %7

7:                                                ; preds = %6, %3
  %8 = icmp slt i32 %4, 1
  br i1 %8, label %10, label %.preheader

.preheader:                                       ; preds = %7
  %invariant.gep = getelementptr i8, ptr %1, i64 -1
  %9 = zext nneg i32 %4 to i64
  br label %11

10:                                               ; preds = %7
  store i8 0, ptr %1, align 1, !tbaa !5
  br label %18

11:                                               ; preds = %.preheader, %13
  %indvars.iv = phi i64 [ %9, %.preheader ], [ %indvars.iv.next, %13 ]
  %gep = getelementptr i8, ptr %invariant.gep, i64 %indvars.iv
  %12 = load i8, ptr %gep, align 1, !tbaa !5
  switch i8 %12, label %.critedge23 [
    i8 48, label %13
    i8 46, label %15
  ]

13:                                               ; preds = %11
  store i8 0, ptr %gep, align 1, !tbaa !5
  %indvars.iv.next = add nsw i64 %indvars.iv, -1
  %14 = icmp sgt i64 %indvars.iv, 1
  br i1 %14, label %11, label %.critedge23, !llvm.loop !8

15:                                               ; preds = %11
  store i8 0, ptr %gep, align 1, !tbaa !5
  %16 = add nuw i64 %indvars.iv, 4294967295
  br label %.critedge23

.critedge23:                                      ; preds = %11, %13, %15
  %.1 = phi i64 [ %16, %15 ], [ %indvars.iv, %11 ], [ 0, %13 ]
  %17 = and i64 %.1, 4294967295
  br label %18

18:                                               ; preds = %.critedge23, %10
  %storemerge = phi i64 [ %17, %.critedge23 ], [ 0, %10 ]
  store i64 %storemerge, ptr %2, align 8, !tbaa !10
  ret void
}

; Function Attrs: nofree nounwind
declare noundef i32 @snprintf(ptr noalias nocapture noundef writeonly, i64 noundef, ptr nocapture noundef readonly, ...) local_unnamed_addr #1

; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare ptr @strchr(ptr noundef, i32 noundef) local_unnamed_addr #2

attributes #0 = { nofree nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nofree nounwind willreturn memory(argmem: read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { nounwind willreturn memory(read) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !6, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass