; LLVM IR from balintbalazs/B3D :: source/src/B3D_cudaCompress/CPU (HuffmanCPU)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.cudaCompress::HuffmanEncodeTableCPU" = type { %"class.std::vector.5" }
%"class.std::vector.5" = type { %"struct.std::_Vector_base.6" }
%"struct.std::_Vector_base.6" = type { %"struct.std::_Vector_base<cudaCompress::HuffmanEntry, std::allocator<cudaCompress::HuffmanEntry>>::_Vector_impl" }
%"struct.std::_Vector_base<cudaCompress::HuffmanEntry, std::allocator<cudaCompress::HuffmanEntry>>::_Vector_impl" = type { %"struct.std::_Vector_base<cudaCompress::HuffmanEntry, std::allocator<cudaCompress::HuffmanEntry>>::_Vector_impl_data" }
%"struct.std::_Vector_base<cudaCompress::HuffmanEntry, std::allocator<cudaCompress::HuffmanEntry>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.cudaCompress::HuffmanEntry" = type { i16, i32, i32 }

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN12cudaCompress16huffmanEncodeCPUERNS_9BitStreamERKSt6vectorItSaItEERKNS_21HuffmanEncodeTableCPUERS2_IjSaIjEEj(ptr noundef nonnull align 8 dereferenceable(41) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef %4) #0 {
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i16, align 2
  %15 = alloca ptr, align 8
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store ptr %2, ptr %8, align 8, !tbaa !5
  store ptr %3, ptr %9, align 8, !tbaa !5
  store i32 %4, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #5
  %16 = load ptr, ptr %6, align 8, !tbaa !5
  %17 = call noundef i32 @_ZNK12cudaCompress17BitStreamReadOnly14getBitPositionEv(ptr noundef nonnull align 8 dereferenceable(28) %16)
  store i32 %17, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #5
  store i32 0, ptr %12, align 4, !tbaa !9
  br label %18

18:                                               ; preds = %57, %5
  %19 = load i32, ptr %12, align 4, !tbaa !9
  %20 = zext i32 %19 to i64
  %21 = load ptr, ptr %7, align 8, !tbaa !5
  %22 = call noundef i64 @_ZNKSt6vectorItSaItEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %21) #5
  %23 = icmp ult i64 %20, %22
  br i1 %23, label %25, label %24

24:                                               ; preds = %18
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #5
  br label %60

25:                                               ; preds = %18
  %26 = load i32, ptr %10, align 4, !tbaa !9
  %27 = icmp ugt i32 %26, 0
  br i1 %27, label %28, label %39

28:                                               ; preds = %25
  %29 = load i32, ptr %12, align 4, !tbaa !9
  %30 = load i32, ptr %10, align 4, !tbaa !9
  %31 = urem i32 %29, %30
  %32 = icmp eq i32 %31, 0
  br i1 %32, label %33, label %39

33:                                               ; preds = %28
  %34 = load ptr, ptr %9, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #5
  %35 = load ptr, ptr %6, align 8, !tbaa !5
  %36 = call noundef i32 @_ZNK12cudaCompress17BitStreamReadOnly14getBitPositionEv(ptr noundef nonnull align 8 dereferenceable(28) %35)
  %37 = load i32, ptr %11, align 4, !tbaa !9
  %38 = sub i32 %36, %37
  store i32 %38, ptr %13, align 4, !tbaa !9
  call void @_ZNSt6vectorIjSaIjEE9push_backEOj(ptr noundef nonnull align 8 dereferenceable(24) %34, ptr noundef nonnull align 4 dereferenceable(4) %13)
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #5
  br label %39

39:                                               ; preds = %33, %28, %25
  call void @llvm.lifetime.start.p0(i64 2, ptr %14) #5
  %40 = load ptr, ptr %7, align 8, !tbaa !5
  %41 = load i32, ptr %12, align 4, !tbaa !9
  %42 = zext i32 %41 to i64
  %43 = call noundef nonnull align 2 dereferenceable(2) ptr @_ZNKSt6vectorItSaItEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %40, i64 noundef %42) #5
  %44 = load i16, ptr %43, align 2, !tbaa !11
  store i16 %44, ptr %14, align 2, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #5
  %45 = load ptr, ptr %8, align 8, !tbaa !5
  %46 = getelementptr inbounds %"class.cudaCompress::HuffmanEncodeTableCPU", ptr %45, i32 0, i32 0
  %47 = load i16, ptr %14, align 2, !tbaa !11
  %48 = zext i16 %47 to i64
  %49 = call noundef nonnull align 4 dereferenceable(12) ptr @_ZNKSt6vectorIN12cudaCompress12HuffmanEntryESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %46, i64 noundef %48) #5
  store ptr %49, ptr %15, align 8, !tbaa !5
  %50 = load ptr, ptr %6, align 8, !tbaa !5
  %51 = load ptr, ptr %15, align 8, !tbaa !5
  %52 = getelementptr inbounds %"struct.cudaCompress::HuffmanEntry", ptr %51, i32 0, i32 1
  %53 = load i32, ptr %52, align 4, !tbaa !13
  %54 = load ptr, ptr %15, align 8, !tbaa !5
  %55 = getelementptr inbounds %"struct.cudaCompress::HuffmanEntry", ptr %54, i32 0, i32 2
  %56 = load i32, ptr %55, align 4, !tbaa !15
  call void @_ZN12cudaCompress9BitStream9writeBitsEjj(ptr noundef nonnull align 8 dereferenceable(41) %50, i32 noundef %53, i32 noundef %56)
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #5
  call void @llvm.lifetime.end.p0(i64 2, ptr %14) #5
  br label %57

57:                                               ; preds = %39
  %58 = load i32, ptr %12, align 4, !tbaa !9
  %59 = add i32 %58, 1
  store i32 %59, ptr %12, align 4, !tbaa !9
  br label %18, !llvm.loop !16

60:                                               ; preds = %24
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #5
  ret i1 true
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK12cudaCompress17BitStreamReadOnly14getBitPositionEv(ptr noundef nonnull align 8 dereferenceable(28)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorItSaItEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIjSaIjEE9push_backEOj(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(4)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 2 dereferenceable(2) ptr @_ZNKSt6vectorItSaItEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(12) ptr @_ZNKSt6vectorIN12cudaCompress12HuffmanEntryESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN12cudaCompress9BitStream9writeBitsEjj(ptr noundef nonnull align 8 dereferenceable(41), i32 noundef, i32 noundef) #4 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"short", !7, i64 0}
!13 = !{!14, !10, i64 4}
!14 = !{!"_ZTSN12cudaCompress12HuffmanEntryE", !12, i64 0, !10, i64 4, !10, i64 8}
!15 = !{!14, !10, i64 8}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN12cudaCompress16huffmanEncodeCPUERNS_9BitStreamERKSt6vectorItSaItEERKNS_21HuffmanEncodeTableCPUERS2_IjSaIjEEj(ptr noundef nonnull align 8 dereferenceable(41) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef %4) local_unnamed_addr #0 {
  %6 = alloca i32, align 4
  %7 = tail call noundef i32 @_ZNK12cudaCompress17BitStreamReadOnly14getBitPositionEv(ptr noundef nonnull align 8 dereferenceable(28) %0)
  %8 = tail call noundef i64 @_ZNKSt6vectorItSaItEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #5
  %.not19 = icmp eq i64 %8, 0
  br i1 %.not19, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %5
  %.not = icmp eq i32 %4, 0
  br i1 %.not, label %.lr.ph.split.us, label %.lr.ph.split

.lr.ph.split.us:                                  ; preds = %.lr.ph, %.lr.ph.split.us
  %9 = phi i64 [ %19, %.lr.ph.split.us ], [ 0, %.lr.ph ]
  %.018.us = phi i32 [ %18, %.lr.ph.split.us ], [ 0, %.lr.ph ]
  %10 = tail call noundef nonnull align 2 dereferenceable(2) ptr @_ZNKSt6vectorItSaItEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %9) #5
  %11 = load i16, ptr %10, align 2, !tbaa !5
  %12 = zext i16 %11 to i64
  %13 = tail call noundef nonnull align 4 dereferenceable(12) ptr @_ZNKSt6vectorIN12cudaCompress12HuffmanEntryESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %12) #5
  %14 = getelementptr inbounds i8, ptr %13, i64 4
  %15 = load i32, ptr %14, align 4, !tbaa !9
  %16 = getelementptr inbounds i8, ptr %13, i64 8
  %17 = load i32, ptr %16, align 4, !tbaa !12
  tail call void @_ZN12cudaCompress9BitStream9writeBitsEjj(ptr noundef nonnull align 8 dereferenceable(41) %0, i32 noundef %15, i32 noundef %17)
  %18 = add i32 %.018.us, 1
  %19 = zext i32 %18 to i64
  %20 = tail call noundef i64 @_ZNKSt6vectorItSaItEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #5
  %21 = icmp ugt i64 %20, %19
  br i1 %21, label %.lr.ph.split.us, label %._crit_edge, !llvm.loop !13

._crit_edge:                                      ; preds = %28, %.lr.ph.split.us, %5
  ret i1 true

.lr.ph.split:                                     ; preds = %.lr.ph, %28
  %22 = phi i64 [ %38, %28 ], [ 0, %.lr.ph ]
  %.018 = phi i32 [ %37, %28 ], [ 0, %.lr.ph ]
  %23 = urem i32 %.018, %4
  %24 = icmp eq i32 %23, 0
  br i1 %24, label %25, label %28

25:                                               ; preds = %.lr.ph.split
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #5
  %26 = call noundef i32 @_ZNK12cudaCompress17BitStreamReadOnly14getBitPositionEv(ptr noundef nonnull align 8 dereferenceable(28) %0)
  %27 = sub i32 %26, %7
  store i32 %27, ptr %6, align 4, !tbaa !15
  call void @_ZNSt6vectorIjSaIjEE9push_backEOj(ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 4 dereferenceable(4) %6)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #5
  br label %28

28:                                               ; preds = %25, %.lr.ph.split
  %29 = call noundef nonnull align 2 dereferenceable(2) ptr @_ZNKSt6vectorItSaItEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %22) #5
  %30 = load i16, ptr %29, align 2, !tbaa !5
  %31 = zext i16 %30 to i64
  %32 = call noundef nonnull align 4 dereferenceable(12) ptr @_ZNKSt6vectorIN12cudaCompress12HuffmanEntryESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %31) #5
  %33 = getelementptr inbounds i8, ptr %32, i64 4
  %34 = load i32, ptr %33, align 4, !tbaa !9
  %35 = getelementptr inbounds i8, ptr %32, i64 8
  %36 = load i32, ptr %35, align 4, !tbaa !12
  call void @_ZN12cudaCompress9BitStream9writeBitsEjj(ptr noundef nonnull align 8 dereferenceable(41) %0, i32 noundef %34, i32 noundef %36)
  %37 = add i32 %.018, 1
  %38 = zext i32 %37 to i64
  %39 = call noundef i64 @_ZNKSt6vectorItSaItEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #5
  %40 = icmp ugt i64 %39, %38
  br i1 %40, label %.lr.ph.split, label %._crit_edge, !llvm.loop !13
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK12cudaCompress17BitStreamReadOnly14getBitPositionEv(ptr noundef nonnull align 8 dereferenceable(28)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorItSaItEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIjSaIjEE9push_backEOj(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 2 dereferenceable(2) ptr @_ZNKSt6vectorItSaItEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(12) ptr @_ZNKSt6vectorIN12cudaCompress12HuffmanEntryESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN12cudaCompress9BitStream9writeBitsEjj(ptr noundef nonnull align 8 dereferenceable(41), i32 noundef, i32 noundef) local_unnamed_addr #4 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"short", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 4}
!10 = !{!"_ZTSN12cudaCompress12HuffmanEntryE", !6, i64 0, !11, i64 4, !11, i64 8}
!11 = !{!"int", !7, i64 0}
!12 = !{!10, !11, i64 8}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{!11, !11, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass