; LLVM IR from VastoLorde95/Competitive-Programming :: Hackerrank/Company Contests/Zalando Codesprint 2016/Problem H/H.ll (Z5mergeRP4nodeS0_S0_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.node = type { i32, i32, i32, ptr, ptr }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z6upd_szP4node(ptr noundef) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5mergeRP4nodeS0_S0_(ptr noundef nonnull align 8 dereferenceable(8) %0, ptr noundef %1, ptr noundef %2) #1 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !5
  %7 = load ptr, ptr %5, align 8, !tbaa !5
  %8 = icmp ne ptr %7, null
  br i1 %8, label %9, label %12

9:                                                ; preds = %3
  %10 = load ptr, ptr %6, align 8, !tbaa !5
  %11 = icmp ne ptr %10, null
  br i1 %11, label %22, label %12

12:                                               ; preds = %9, %3
  %13 = load ptr, ptr %5, align 8, !tbaa !5
  %14 = icmp ne ptr %13, null
  br i1 %14, label %15, label %17

15:                                               ; preds = %12
  %16 = load ptr, ptr %5, align 8, !tbaa !5
  br label %19

17:                                               ; preds = %12
  %18 = load ptr, ptr %6, align 8, !tbaa !5
  br label %19

19:                                               ; preds = %17, %15
  %20 = phi ptr [ %16, %15 ], [ %18, %17 ]
  %21 = load ptr, ptr %4, align 8, !tbaa !5
  store ptr %20, ptr %21, align 8, !tbaa !5
  br label %49

22:                                               ; preds = %9
  %23 = load ptr, ptr %5, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.node, ptr %23, i32 0, i32 0
  %25 = load i32, ptr %24, align 8, !tbaa !9
  %26 = load ptr, ptr %6, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.node, ptr %26, i32 0, i32 0
  %28 = load i32, ptr %27, align 8, !tbaa !9
  %29 = icmp sgt i32 %25, %28
  br i1 %29, label %30, label %39

30:                                               ; preds = %22
  %31 = load ptr, ptr %5, align 8, !tbaa !5
  %32 = getelementptr inbounds %struct.node, ptr %31, i32 0, i32 4
  %33 = load ptr, ptr %5, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.node, ptr %33, i32 0, i32 4
  %35 = load ptr, ptr %34, align 8, !tbaa !12
  %36 = load ptr, ptr %6, align 8, !tbaa !5
  call void @_Z5mergeRP4nodeS0_S0_(ptr noundef nonnull align 8 dereferenceable(8) %32, ptr noundef %35, ptr noundef %36)
  %37 = load ptr, ptr %5, align 8, !tbaa !5
  %38 = load ptr, ptr %4, align 8, !tbaa !5
  store ptr %37, ptr %38, align 8, !tbaa !5
  br label %48

39:                                               ; preds = %22
  %40 = load ptr, ptr %6, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.node, ptr %40, i32 0, i32 3
  %42 = load ptr, ptr %5, align 8, !tbaa !5
  %43 = load ptr, ptr %6, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.node, ptr %43, i32 0, i32 3
  %45 = load ptr, ptr %44, align 8, !tbaa !13
  call void @_Z5mergeRP4nodeS0_S0_(ptr noundef nonnull align 8 dereferenceable(8) %41, ptr noundef %42, ptr noundef %45)
  %46 = load ptr, ptr %6, align 8, !tbaa !5
  %47 = load ptr, ptr %4, align 8, !tbaa !5
  store ptr %46, ptr %47, align 8, !tbaa !5
  br label %48

48:                                               ; preds = %39, %30
  br label %49

49:                                               ; preds = %48, %19
  %50 = load ptr, ptr %4, align 8, !tbaa !5
  %51 = load ptr, ptr %50, align 8, !tbaa !5
  call void @_Z6upd_szP4node(ptr noundef %51)
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"_ZTS4node", !11, i64 0, !11, i64 4, !11, i64 8, !6, i64 16, !6, i64 24}
!11 = !{!"int", !7, i64 0}
!12 = !{!10, !6, i64 24}
!13 = !{!10, !6, i64 16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z6upd_szP4node(ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z5mergeRP4nodeS0_S0_(ptr nocapture noundef nonnull writeonly align 8 dereferenceable(8) %0, ptr noundef %1, ptr noundef %2) local_unnamed_addr #0 {
  %4 = icmp ne ptr %1, null
  %5 = icmp ne ptr %2, null
  %or.cond = and i1 %4, %5
  br i1 %or.cond, label %8, label %6

6:                                                ; preds = %3
  %7 = select i1 %4, ptr %1, ptr %2
  br label %18

8:                                                ; preds = %3
  %9 = load i32, ptr %1, align 8, !tbaa !5
  %10 = load i32, ptr %2, align 8, !tbaa !5
  %11 = icmp sgt i32 %9, %10
  br i1 %11, label %12, label %15

12:                                               ; preds = %8
  %13 = getelementptr inbounds i8, ptr %1, i64 24
  %14 = load ptr, ptr %13, align 8, !tbaa !11
  tail call void @_Z5mergeRP4nodeS0_S0_(ptr noundef nonnull align 8 dereferenceable(8) %13, ptr noundef %14, ptr noundef nonnull %2)
  br label %18

15:                                               ; preds = %8
  %16 = getelementptr inbounds i8, ptr %2, i64 16
  %17 = load ptr, ptr %16, align 8, !tbaa !12
  tail call void @_Z5mergeRP4nodeS0_S0_(ptr noundef nonnull align 8 dereferenceable(8) %16, ptr noundef nonnull %1, ptr noundef %17)
  br label %18

18:                                               ; preds = %12, %15, %6
  %.sink = phi ptr [ %1, %12 ], [ %2, %15 ], [ %7, %6 ]
  store ptr %.sink, ptr %0, align 8, !tbaa !13
  tail call void @_Z6upd_szP4node(ptr noundef %.sink)
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS4node", !7, i64 0, !7, i64 4, !7, i64 8, !10, i64 16, !10, i64 24}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !10, i64 24}
!12 = !{!6, !10, i64 16}
!13 = !{!10, !10, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass