; LLVM IR from ShahjalalShohag/code-library :: Number Theory/nCr Modulo Any Mod.ll (Z3ncrxxii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z5powerxxi(i64 noundef, i64 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_Z7inversexx(i64 noundef, i64 noundef) #2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z7factmodxii(i64 noundef, i32 noundef, i32 noundef) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z12multiplicityxi(i64 noundef, i32 noundef) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z3ncrxxii(i64 noundef %0, i64 noundef %1, i32 noundef %2, i32 noundef %3) #2 {
  %5 = alloca i32, align 4
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i64, align 8
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  store i64 %0, ptr %6, align 8, !tbaa !5
  store i64 %1, ptr %7, align 8, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !9
  store i32 %3, ptr %9, align 4, !tbaa !9
  %15 = load i64, ptr %6, align 8, !tbaa !5
  %16 = load i64, ptr %7, align 8, !tbaa !5
  %17 = icmp slt i64 %15, %16
  br i1 %17, label %21, label %18

18:                                               ; preds = %4
  %19 = load i64, ptr %7, align 8, !tbaa !5
  %20 = icmp slt i64 %19, 0
  br i1 %20, label %21, label %22

21:                                               ; preds = %18, %4
  store i32 0, ptr %5, align 4
  br label %104

22:                                               ; preds = %18
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  store i32 1, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  store i32 0, ptr %11, align 4, !tbaa !9
  br label %23

23:                                               ; preds = %32, %22
  %24 = load i32, ptr %11, align 4, !tbaa !9
  %25 = load i32, ptr %9, align 4, !tbaa !9
  %26 = icmp slt i32 %24, %25
  br i1 %26, label %28, label %27

27:                                               ; preds = %23
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  br label %35

28:                                               ; preds = %23
  %29 = load i32, ptr %8, align 4, !tbaa !9
  %30 = load i32, ptr %10, align 4, !tbaa !9
  %31 = mul nsw i32 %30, %29
  store i32 %31, ptr %10, align 4, !tbaa !9
  br label %32

32:                                               ; preds = %28
  %33 = load i32, ptr %11, align 4, !tbaa !9
  %34 = add nsw i32 %33, 1
  store i32 %34, ptr %11, align 4, !tbaa !9
  br label %23, !llvm.loop !11

35:                                               ; preds = %27
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #3
  %36 = load i64, ptr %6, align 8, !tbaa !5
  %37 = load i32, ptr %8, align 4, !tbaa !9
  %38 = call noundef i64 @_Z12multiplicityxi(i64 noundef %36, i32 noundef %37)
  %39 = load i64, ptr %7, align 8, !tbaa !5
  %40 = load i32, ptr %8, align 4, !tbaa !9
  %41 = call noundef i64 @_Z12multiplicityxi(i64 noundef %39, i32 noundef %40)
  %42 = sub nsw i64 %38, %41
  %43 = load i64, ptr %6, align 8, !tbaa !5
  %44 = load i64, ptr %7, align 8, !tbaa !5
  %45 = sub nsw i64 %43, %44
  %46 = load i32, ptr %8, align 4, !tbaa !9
  %47 = call noundef i64 @_Z12multiplicityxi(i64 noundef %45, i32 noundef %46)
  %48 = sub nsw i64 %42, %47
  store i64 %48, ptr %12, align 8, !tbaa !5
  %49 = load i64, ptr %12, align 8, !tbaa !5
  %50 = load i32, ptr %9, align 4, !tbaa !9
  %51 = sext i32 %50 to i64
  %52 = icmp sge i64 %49, %51
  br i1 %52, label %53, label %54

53:                                               ; preds = %35
  store i32 0, ptr %5, align 4
  store i32 1, ptr %13, align 4
  br label %103

54:                                               ; preds = %35
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  %55 = load i64, ptr %6, align 8, !tbaa !5
  %56 = load i32, ptr %8, align 4, !tbaa !9
  %57 = load i32, ptr %10, align 4, !tbaa !9
  %58 = call noundef i32 @_Z7factmodxii(i64 noundef %55, i32 noundef %56, i32 noundef %57)
  %59 = sext i32 %58 to i64
  %60 = mul nsw i64 1, %59
  %61 = load i64, ptr %7, align 8, !tbaa !5
  %62 = load i32, ptr %8, align 4, !tbaa !9
  %63 = load i32, ptr %10, align 4, !tbaa !9
  %64 = call noundef i32 @_Z7factmodxii(i64 noundef %61, i32 noundef %62, i32 noundef %63)
  %65 = sext i32 %64 to i64
  %66 = load i32, ptr %10, align 4, !tbaa !9
  %67 = sext i32 %66 to i64
  %68 = call noundef i64 @_Z7inversexx(i64 noundef %65, i64 noundef %67)
  %69 = mul nsw i64 %60, %68
  %70 = load i32, ptr %10, align 4, !tbaa !9
  %71 = sext i32 %70 to i64
  %72 = srem i64 %69, %71
  %73 = load i64, ptr %6, align 8, !tbaa !5
  %74 = load i64, ptr %7, align 8, !tbaa !5
  %75 = sub nsw i64 %73, %74
  %76 = load i32, ptr %8, align 4, !tbaa !9
  %77 = load i32, ptr %10, align 4, !tbaa !9
  %78 = call noundef i32 @_Z7factmodxii(i64 noundef %75, i32 noundef %76, i32 noundef %77)
  %79 = sext i32 %78 to i64
  %80 = load i32, ptr %10, align 4, !tbaa !9
  %81 = sext i32 %80 to i64
  %82 = call noundef i64 @_Z7inversexx(i64 noundef %79, i64 noundef %81)
  %83 = mul nsw i64 %72, %82
  %84 = load i32, ptr %10, align 4, !tbaa !9
  %85 = sext i32 %84 to i64
  %86 = srem i64 %83, %85
  %87 = trunc i64 %86 to i32
  store i32 %87, ptr %14, align 4, !tbaa !9
  %88 = load i32, ptr %14, align 4, !tbaa !9
  %89 = sext i32 %88 to i64
  %90 = mul nsw i64 1, %89
  %91 = load i32, ptr %8, align 4, !tbaa !9
  %92 = sext i32 %91 to i64
  %93 = load i64, ptr %12, align 8, !tbaa !5
  %94 = load i32, ptr %10, align 4, !tbaa !9
  %95 = call noundef i32 @_Z5powerxxi(i64 noundef %92, i64 noundef %93, i32 noundef %94)
  %96 = sext i32 %95 to i64
  %97 = mul nsw i64 %90, %96
  %98 = load i32, ptr %10, align 4, !tbaa !9
  %99 = sext i32 %98 to i64
  %100 = srem i64 %97, %99
  %101 = trunc i64 %100 to i32
  store i32 %101, ptr %14, align 4, !tbaa !9
  %102 = load i32, ptr %14, align 4, !tbaa !9
  store i32 %102, ptr %5, align 4
  store i32 1, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  br label %103

103:                                              ; preds = %54, %53
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  br label %104

104:                                              ; preds = %103, %21
  %105 = load i32, ptr %5, align 4
  ret i32 %105
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z5powerxxi(i64 noundef, i64 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_Z7inversexx(i64 noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z7factmodxii(i64 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z12multiplicityxi(i64 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z3ncrxxii(i64 noundef %0, i64 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #1 {
  %5 = icmp slt i64 %0, %1
  %6 = icmp slt i64 %1, 0
  %or.cond = or i1 %5, %6
  br i1 %or.cond, label %41, label %.preheader

.preheader:                                       ; preds = %4
  %7 = icmp sgt i32 %3, 0
  br i1 %7, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %.preheader
  %min.iters.check = icmp ult i32 %3, 8
  br i1 %min.iters.check, label %.lr.ph.preheader50, label %vector.ph

.lr.ph.preheader50:                               ; preds = %middle.block, %.lr.ph.preheader
  %.03948.ph = phi i32 [ 1, %.lr.ph.preheader ], [ %11, %middle.block ]
  %.04047.ph = phi i32 [ 0, %.lr.ph.preheader ], [ %n.vec, %middle.block ]
  br label %.lr.ph

vector.ph:                                        ; preds = %.lr.ph.preheader
  %n.vec = and i32 %3, 2147483640
  %broadcast.splatinsert = insertelement <4 x i32> poison, i32 %2, i64 0
  %broadcast.splat = shufflevector <4 x i32> %broadcast.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %vec.phi = phi <4 x i32> [ <i32 1, i32 1, i32 1, i32 1>, %vector.ph ], [ %8, %vector.body ]
  %vec.phi49 = phi <4 x i32> [ <i32 1, i32 1, i32 1, i32 1>, %vector.ph ], [ %9, %vector.body ]
  %8 = mul <4 x i32> %vec.phi, %broadcast.splat
  %9 = mul <4 x i32> %vec.phi49, %broadcast.splat
  %index.next = add nuw i32 %index, 8
  %10 = icmp eq i32 %index.next, %n.vec
  br i1 %10, label %middle.block, label %vector.body, !llvm.loop !5

middle.block:                                     ; preds = %vector.body
  %bin.rdx = mul <4 x i32> %9, %8
  %11 = tail call i32 @llvm.vector.reduce.mul.v4i32(<4 x i32> %bin.rdx)
  %cmp.n = icmp eq i32 %n.vec, %3
  br i1 %cmp.n, label %._crit_edge, label %.lr.ph.preheader50

._crit_edge:                                      ; preds = %.lr.ph, %middle.block, %.preheader
  %.039.lcssa = phi i32 [ 1, %.preheader ], [ %11, %middle.block ], [ %19, %.lr.ph ]
  %12 = tail call noundef i64 @_Z12multiplicityxi(i64 noundef %0, i32 noundef %2)
  %13 = tail call noundef i64 @_Z12multiplicityxi(i64 noundef %1, i32 noundef %2)
  %14 = sub nsw i64 %0, %1
  %15 = tail call noundef i64 @_Z12multiplicityxi(i64 noundef %14, i32 noundef %2)
  %16 = add i64 %13, %15
  %17 = sub i64 %12, %16
  %18 = sext i32 %3 to i64
  %.not = icmp slt i64 %17, %18
  br i1 %.not, label %21, label %41

.lr.ph:                                           ; preds = %.lr.ph.preheader50, %.lr.ph
  %.03948 = phi i32 [ %19, %.lr.ph ], [ %.03948.ph, %.lr.ph.preheader50 ]
  %.04047 = phi i32 [ %20, %.lr.ph ], [ %.04047.ph, %.lr.ph.preheader50 ]
  %19 = mul nsw i32 %.03948, %2
  %20 = add nuw nsw i32 %.04047, 1
  %exitcond.not = icmp eq i32 %20, %3
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !9

21:                                               ; preds = %._crit_edge
  %22 = tail call noundef i32 @_Z7factmodxii(i64 noundef %0, i32 noundef %2, i32 noundef %.039.lcssa)
  %23 = sext i32 %22 to i64
  %24 = tail call noundef i32 @_Z7factmodxii(i64 noundef %1, i32 noundef %2, i32 noundef %.039.lcssa)
  %25 = sext i32 %24 to i64
  %26 = sext i32 %.039.lcssa to i64
  %27 = tail call noundef i64 @_Z7inversexx(i64 noundef %25, i64 noundef %26)
  %28 = mul nsw i64 %27, %23
  %29 = srem i64 %28, %26
  %30 = tail call noundef i32 @_Z7factmodxii(i64 noundef %14, i32 noundef %2, i32 noundef %.039.lcssa)
  %31 = sext i32 %30 to i64
  %32 = tail call noundef i64 @_Z7inversexx(i64 noundef %31, i64 noundef %26)
  %33 = mul nsw i64 %32, %29
  %34 = srem i64 %33, %26
  %35 = sext i32 %2 to i64
  %36 = tail call noundef i32 @_Z5powerxxi(i64 noundef %35, i64 noundef %17, i32 noundef %.039.lcssa)
  %37 = sext i32 %36 to i64
  %38 = mul nsw i64 %34, %37
  %39 = srem i64 %38, %26
  %40 = trunc i64 %39 to i32
  br label %41

41:                                               ; preds = %21, %._crit_edge, %4
  %.1 = phi i32 [ 0, %4 ], [ %40, %21 ], [ 0, %._crit_edge ]
  ret i32 %.1
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.mul.v4i32(<4 x i32>) #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6, !7, !8}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!"llvm.loop.isvectorized", i32 1}
!8 = !{!"llvm.loop.unroll.runtime.disable"}
!9 = distinct !{!9, !6, !8, !7}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass