; LLVM IR from reazon-research/OpenArm :: control/canfd_control/Core/Src (tim)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TIM_HandleTypeDef = type { ptr, %struct.TIM_Base_InitTypeDef, i32, [7 x ptr], i32, i32, [6 x i32], [4 x i32], i32 }
%struct.TIM_Base_InitTypeDef = type { i32, i32, i32, i32, i32, i32 }
%struct.TIM_ClockConfigTypeDef = type { i32, i32, i32, i32 }
%struct.TIM_MasterConfigTypeDef = type { i32, i32, i32 }

@htim2 = external dso_local global %struct.TIM_HandleTypeDef, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

declare void @Error_Handler() #2

declare i32 @HAL_TIMEx_MasterConfigSynchronization(ptr noundef, ptr noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @MX_TIM2_Init() #3 {
  %1 = alloca %struct.TIM_ClockConfigTypeDef, align 4
  %2 = alloca %struct.TIM_MasterConfigTypeDef, align 4
  call void @llvm.lifetime.start.p0(i64 16, ptr %1) #4
  call void @llvm.memset.p0.i64(ptr align 4 %1, i8 0, i64 16, i1 false)
  call void @llvm.lifetime.start.p0(i64 12, ptr %2) #4
  call void @llvm.memset.p0.i64(ptr align 4 %2, i8 0, i64 12, i1 false)
  store ptr inttoptr (i64 1073741824 to ptr), ptr @htim2, align 8, !tbaa !5
  store i32 249, ptr getelementptr inbounds (%struct.TIM_HandleTypeDef, ptr @htim2, i32 0, i32 1), align 8, !tbaa !12
  store i32 0, ptr getelementptr inbounds (%struct.TIM_Base_InitTypeDef, ptr getelementptr inbounds (%struct.TIM_HandleTypeDef, ptr @htim2, i32 0, i32 1), i32 0, i32 1), align 4, !tbaa !13
  store i32 -1, ptr getelementptr inbounds (%struct.TIM_Base_InitTypeDef, ptr getelementptr inbounds (%struct.TIM_HandleTypeDef, ptr @htim2, i32 0, i32 1), i32 0, i32 2), align 8, !tbaa !14
  store i32 0, ptr getelementptr inbounds (%struct.TIM_Base_InitTypeDef, ptr getelementptr inbounds (%struct.TIM_HandleTypeDef, ptr @htim2, i32 0, i32 1), i32 0, i32 3), align 4, !tbaa !15
  store i32 0, ptr getelementptr inbounds (%struct.TIM_Base_InitTypeDef, ptr getelementptr inbounds (%struct.TIM_HandleTypeDef, ptr @htim2, i32 0, i32 1), i32 0, i32 5), align 4, !tbaa !16
  %3 = call i32 @HAL_TIM_Base_Init(ptr noundef @htim2)
  %4 = icmp ne i32 %3, 0
  br i1 %4, label %5, label %6

5:                                                ; preds = %0
  call void @Error_Handler()
  br label %6

6:                                                ; preds = %5, %0
  %7 = getelementptr inbounds %struct.TIM_ClockConfigTypeDef, ptr %1, i32 0, i32 0
  store i32 4096, ptr %7, align 4, !tbaa !17
  %8 = call i32 @HAL_TIM_ConfigClockSource(ptr noundef @htim2, ptr noundef %1)
  %9 = icmp ne i32 %8, 0
  br i1 %9, label %10, label %11

10:                                               ; preds = %6
  call void @Error_Handler()
  br label %11

11:                                               ; preds = %10, %6
  %12 = getelementptr inbounds %struct.TIM_MasterConfigTypeDef, ptr %2, i32 0, i32 0
  store i32 0, ptr %12, align 4, !tbaa !19
  %13 = getelementptr inbounds %struct.TIM_MasterConfigTypeDef, ptr %2, i32 0, i32 2
  store i32 0, ptr %13, align 4, !tbaa !21
  %14 = call i32 @HAL_TIMEx_MasterConfigSynchronization(ptr noundef @htim2, ptr noundef %2)
  %15 = icmp ne i32 %14, 0
  br i1 %15, label %16, label %17

16:                                               ; preds = %11
  call void @Error_Handler()
  br label %17

17:                                               ; preds = %16, %11
  call void @llvm.lifetime.end.p0(i64 12, ptr %2) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr %1) #4
  ret void
}

declare i32 @HAL_TIM_Base_Init(ptr noundef) #2

declare i32 @HAL_TIM_ConfigClockSource(ptr noundef, ptr noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !10, i64 8, !11, i64 32, !8, i64 40, !11, i64 96, !11, i64 100, !8, i64 104, !8, i64 128, !11, i64 144}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20}
!11 = !{!"int", !8, i64 0}
!12 = !{!6, !11, i64 8}
!13 = !{!6, !11, i64 12}
!14 = !{!6, !11, i64 16}
!15 = !{!6, !11, i64 20}
!16 = !{!6, !11, i64 28}
!17 = !{!18, !11, i64 0}
!18 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12}
!19 = !{!20, !11, i64 0}
!20 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8}
!21 = !{!20, !11, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TIM_HandleTypeDef = type { ptr, %struct.TIM_Base_InitTypeDef, i32, [7 x ptr], i32, i32, [6 x i32], [4 x i32], i32 }
%struct.TIM_Base_InitTypeDef = type { i32, i32, i32, i32, i32, i32 }
%struct.TIM_ClockConfigTypeDef = type { i32, i32, i32, i32 }
%struct.TIM_MasterConfigTypeDef = type { i32, i32, i32 }

@htim2 = external dso_local global %struct.TIM_HandleTypeDef, align 8

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

declare void @Error_Handler() local_unnamed_addr #2

declare i32 @HAL_TIMEx_MasterConfigSynchronization(ptr noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @MX_TIM2_Init() local_unnamed_addr #3 {
  %1 = alloca %struct.TIM_ClockConfigTypeDef, align 4
  %2 = alloca %struct.TIM_MasterConfigTypeDef, align 4
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %1) #4
  %3 = getelementptr inbounds i8, ptr %1, i64 4
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) %3, i8 0, i64 12, i1 false)
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %2) #4
  %4 = getelementptr inbounds i8, ptr %2, i64 4
  store i32 0, ptr %4, align 4
  store ptr inttoptr (i64 1073741824 to ptr), ptr @htim2, align 8, !tbaa !5
  store <4 x i32> <i32 249, i32 0, i32 -1, i32 0>, ptr getelementptr inbounds (i8, ptr @htim2, i64 8), align 8, !tbaa !12
  store i32 0, ptr getelementptr inbounds (i8, ptr @htim2, i64 28), align 4, !tbaa !13
  %5 = tail call i32 @HAL_TIM_Base_Init(ptr noundef nonnull @htim2) #4
  %.not = icmp eq i32 %5, 0
  br i1 %.not, label %7, label %6

6:                                                ; preds = %0
  tail call void @Error_Handler() #4
  br label %7

7:                                                ; preds = %6, %0
  store i32 4096, ptr %1, align 4, !tbaa !14
  %8 = call i32 @HAL_TIM_ConfigClockSource(ptr noundef nonnull @htim2, ptr noundef nonnull %1) #4
  %.not1 = icmp eq i32 %8, 0
  br i1 %.not1, label %10, label %9

9:                                                ; preds = %7
  call void @Error_Handler() #4
  br label %10

10:                                               ; preds = %9, %7
  store i32 0, ptr %2, align 4, !tbaa !16
  %11 = getelementptr inbounds i8, ptr %2, i64 8
  store i32 0, ptr %11, align 4, !tbaa !18
  %12 = call i32 @HAL_TIMEx_MasterConfigSynchronization(ptr noundef nonnull @htim2, ptr noundef nonnull %2) #4
  %.not2 = icmp eq i32 %12, 0
  br i1 %.not2, label %14, label %13

13:                                               ; preds = %10
  call void @Error_Handler() #4
  br label %14

14:                                               ; preds = %13, %10
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %2) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %1) #4
  ret void
}

declare i32 @HAL_TIM_Base_Init(ptr noundef) local_unnamed_addr #2

declare i32 @HAL_TIM_ConfigClockSource(ptr noundef, ptr noundef) local_unnamed_addr #2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !10, i64 8, !11, i64 32, !8, i64 40, !11, i64 96, !11, i64 100, !8, i64 104, !8, i64 128, !11, i64 144}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20}
!11 = !{!"int", !8, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!6, !11, i64 28}
!14 = !{!15, !11, i64 0}
!15 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12}
!16 = !{!17, !11, i64 0}
!17 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8}
!18 = !{!17, !11, i64 8}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,SLPVectorizerPass,TailCallElimPass