; LLVM IR from reazon-research/OpenArm :: control/canfd_control/Drivers/STM32H7xx_HAL_Driver/Src (stm32h7xx_hal_ospi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.OSPI_HandleTypeDef = type { ptr, %struct.OSPI_InitTypeDef, ptr, i32, i32, ptr, i32, i32, i32 }
%struct.OSPI_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.OCTOSPI_TypeDef = type { i32, i32, i32, i32, i32, i32, [2 x i32], i32, i32, [6 x i32], i32, i32, i32, i32, i32, [11 x i32], i32, i32, i32, i32, i32, [27 x i32], i32, i32, i32, i32, i32, [3 x i32], i32, [3 x i32], i32, [3 x i32], i32, i32, i32, i32, i32, [3 x i32], i32, [7 x i32], i32, i32, i32, i32, i32, [3 x i32], i32, [23 x i32], i32, [122 x i32], i32, i32, i32, i32 }
%struct.__MDMA_HandleTypeDef = type { ptr, %struct.MDMA_InitTypeDef, i32, i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32 }
%struct.MDMA_InitTypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.MDMA_Channel_TypeDef = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @HAL_OSPI_Transmit_DMA(ptr noundef %0, ptr noundef %1) #1 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 0, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  %7 = load ptr, ptr %3, align 8, !tbaa !5
  %8 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %7, i32 0, i32 0
  %9 = load ptr, ptr %8, align 8, !tbaa !11
  %10 = getelementptr inbounds %struct.OCTOSPI_TypeDef, ptr %9, i32 0, i32 10
  %11 = load volatile i32, ptr %10, align 4, !tbaa !14
  %12 = add i32 %11, 1
  store i32 %12, ptr %6, align 4, !tbaa !9
  %13 = load ptr, ptr %4, align 8, !tbaa !5
  %14 = icmp eq ptr %13, null
  br i1 %14, label %15, label %18

15:                                               ; preds = %2
  store i32 1, ptr %5, align 4, !tbaa !9
  %16 = load ptr, ptr %3, align 8, !tbaa !5
  %17 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %16, i32 0, i32 7
  store volatile i32 8, ptr %17, align 4, !tbaa !16
  br label %202

18:                                               ; preds = %2
  %19 = load ptr, ptr %3, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %19, i32 0, i32 6
  %21 = load volatile i32, ptr %20, align 8, !tbaa !17
  %22 = icmp eq i32 %21, 4
  br i1 %22, label %23, label %198

23:                                               ; preds = %18
  %24 = load i32, ptr %6, align 4, !tbaa !9
  %25 = load ptr, ptr %3, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %25, i32 0, i32 4
  store volatile i32 %24, ptr %26, align 4, !tbaa !18
  %27 = load ptr, ptr %3, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %27, i32 0, i32 4
  %29 = load volatile i32, ptr %28, align 4, !tbaa !18
  %30 = load ptr, ptr %3, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %30, i32 0, i32 3
  store volatile i32 %29, ptr %31, align 8, !tbaa !19
  %32 = load ptr, ptr %4, align 8, !tbaa !5
  %33 = load ptr, ptr %3, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %33, i32 0, i32 2
  store ptr %32, ptr %34, align 8, !tbaa !20
  %35 = load ptr, ptr %3, align 8, !tbaa !5
  %36 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %35, i32 0, i32 0
  %37 = load ptr, ptr %36, align 8, !tbaa !11
  %38 = getelementptr inbounds %struct.OCTOSPI_TypeDef, ptr %37, i32 0, i32 0
  %39 = load volatile i32, ptr %38, align 4, !tbaa !21
  %40 = zext i32 %39 to i64
  %41 = and i64 %40, -805306369
  %42 = or i64 %41, 0
  %43 = trunc i64 %42 to i32
  %44 = load ptr, ptr %3, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %44, i32 0, i32 0
  %46 = load ptr, ptr %45, align 8, !tbaa !11
  %47 = getelementptr inbounds %struct.OCTOSPI_TypeDef, ptr %46, i32 0, i32 0
  store volatile i32 %43, ptr %47, align 4, !tbaa !21
  %48 = load ptr, ptr %3, align 8, !tbaa !5
  %49 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %48, i32 0, i32 0
  %50 = load ptr, ptr %49, align 8, !tbaa !11
  %51 = getelementptr inbounds %struct.OCTOSPI_TypeDef, ptr %50, i32 0, i32 8
  store volatile i32 3, ptr %51, align 4, !tbaa !22
  %52 = load ptr, ptr %3, align 8, !tbaa !5
  %53 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %52, i32 0, i32 6
  store volatile i32 24, ptr %53, align 8, !tbaa !17
  %54 = load ptr, ptr %3, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %54, i32 0, i32 5
  %56 = load ptr, ptr %55, align 8, !tbaa !23
  %57 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %56, i32 0, i32 5
  store ptr @OSPI_DMACplt, ptr %57, align 8, !tbaa !24
  %58 = load ptr, ptr %3, align 8, !tbaa !5
  %59 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %58, i32 0, i32 5
  %60 = load ptr, ptr %59, align 8, !tbaa !23
  %61 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %60, i32 0, i32 9
  store ptr @OSPI_DMAError, ptr %61, align 8, !tbaa !27
  %62 = load ptr, ptr %3, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %62, i32 0, i32 5
  %64 = load ptr, ptr %63, align 8, !tbaa !23
  %65 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %64, i32 0, i32 10
  store ptr null, ptr %65, align 8, !tbaa !28
  %66 = load ptr, ptr %3, align 8, !tbaa !5
  %67 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %66, i32 0, i32 5
  %68 = load ptr, ptr %67, align 8, !tbaa !23
  %69 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %68, i32 0, i32 0
  %70 = load ptr, ptr %69, align 8, !tbaa !29
  %71 = getelementptr inbounds %struct.MDMA_Channel_TypeDef, ptr %70, i32 0, i32 4
  %72 = load volatile i32, ptr %71, align 4, !tbaa !30
  %73 = zext i32 %72 to i64
  %74 = and i64 %73, -3085
  %75 = or i64 %74, 0
  %76 = trunc i64 %75 to i32
  %77 = load ptr, ptr %3, align 8, !tbaa !5
  %78 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %77, i32 0, i32 5
  %79 = load ptr, ptr %78, align 8, !tbaa !23
  %80 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %79, i32 0, i32 0
  %81 = load ptr, ptr %80, align 8, !tbaa !29
  %82 = getelementptr inbounds %struct.MDMA_Channel_TypeDef, ptr %81, i32 0, i32 4
  store volatile i32 %76, ptr %82, align 4, !tbaa !30
  %83 = load ptr, ptr %3, align 8, !tbaa !5
  %84 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %83, i32 0, i32 5
  %85 = load ptr, ptr %84, align 8, !tbaa !23
  %86 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %85, i32 0, i32 1
  %87 = getelementptr inbounds %struct.MDMA_InitTypeDef, ptr %86, i32 0, i32 6
  %88 = load i32, ptr %87, align 8, !tbaa !31
  %89 = icmp eq i32 %88, 0
  br i1 %89, label %90, label %108

90:                                               ; preds = %23
  %91 = load ptr, ptr %3, align 8, !tbaa !5
  %92 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %91, i32 0, i32 5
  %93 = load ptr, ptr %92, align 8, !tbaa !23
  %94 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %93, i32 0, i32 0
  %95 = load ptr, ptr %94, align 8, !tbaa !29
  %96 = getelementptr inbounds %struct.MDMA_Channel_TypeDef, ptr %95, i32 0, i32 4
  %97 = load volatile i32, ptr %96, align 4, !tbaa !30
  %98 = zext i32 %97 to i64
  %99 = and i64 %98, -772
  %100 = or i64 %99, 2
  %101 = trunc i64 %100 to i32
  %102 = load ptr, ptr %3, align 8, !tbaa !5
  %103 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %102, i32 0, i32 5
  %104 = load ptr, ptr %103, align 8, !tbaa !23
  %105 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %104, i32 0, i32 0
  %106 = load ptr, ptr %105, align 8, !tbaa !29
  %107 = getelementptr inbounds %struct.MDMA_Channel_TypeDef, ptr %106, i32 0, i32 4
  store volatile i32 %101, ptr %107, align 4, !tbaa !30
  br label %167

108:                                              ; preds = %23
  %109 = load ptr, ptr %3, align 8, !tbaa !5
  %110 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %109, i32 0, i32 5
  %111 = load ptr, ptr %110, align 8, !tbaa !23
  %112 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %111, i32 0, i32 1
  %113 = getelementptr inbounds %struct.MDMA_InitTypeDef, ptr %112, i32 0, i32 6
  %114 = load i32, ptr %113, align 8, !tbaa !31
  %115 = icmp eq i32 %114, 16
  br i1 %115, label %116, label %134

116:                                              ; preds = %108
  %117 = load ptr, ptr %3, align 8, !tbaa !5
  %118 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %117, i32 0, i32 5
  %119 = load ptr, ptr %118, align 8, !tbaa !23
  %120 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %119, i32 0, i32 0
  %121 = load ptr, ptr %120, align 8, !tbaa !29
  %122 = getelementptr inbounds %struct.MDMA_Channel_TypeDef, ptr %121, i32 0, i32 4
  %123 = load volatile i32, ptr %122, align 4, !tbaa !30
  %124 = zext i32 %123 to i64
  %125 = and i64 %124, -772
  %126 = or i64 %125, 258
  %127 = trunc i64 %126 to i32
  %128 = load ptr, ptr %3, align 8, !tbaa !5
  %129 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %128, i32 0, i32 5
  %130 = load ptr, ptr %129, align 8, !tbaa !23
  %131 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %130, i32 0, i32 0
  %132 = load ptr, ptr %131, align 8, !tbaa !29
  %133 = getelementptr inbounds %struct.MDMA_Channel_TypeDef, ptr %132, i32 0, i32 4
  store volatile i32 %127, ptr %133, align 4, !tbaa !30
  br label %166

134:                                              ; preds = %108
  %135 = load ptr, ptr %3, align 8, !tbaa !5
  %136 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %135, i32 0, i32 5
  %137 = load ptr, ptr %136, align 8, !tbaa !23
  %138 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %137, i32 0, i32 1
  %139 = getelementptr inbounds %struct.MDMA_InitTypeDef, ptr %138, i32 0, i32 6
  %140 = load i32, ptr %139, align 8, !tbaa !31
  %141 = icmp eq i32 %140, 32
  br i1 %141, label %142, label %160

142:                                              ; preds = %134
  %143 = load ptr, ptr %3, align 8, !tbaa !5
  %144 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %143, i32 0, i32 5
  %145 = load ptr, ptr %144, align 8, !tbaa !23
  %146 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %145, i32 0, i32 0
  %147 = load ptr, ptr %146, align 8, !tbaa !29
  %148 = getelementptr inbounds %struct.MDMA_Channel_TypeDef, ptr %147, i32 0, i32 4
  %149 = load volatile i32, ptr %148, align 4, !tbaa !30
  %150 = zext i32 %149 to i64
  %151 = and i64 %150, -772
  %152 = or i64 %151, 514
  %153 = trunc i64 %152 to i32
  %154 = load ptr, ptr %3, align 8, !tbaa !5
  %155 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %154, i32 0, i32 5
  %156 = load ptr, ptr %155, align 8, !tbaa !23
  %157 = getelementptr inbounds %struct.__MDMA_HandleTypeDef, ptr %156, i32 0, i32 0
  %158 = load ptr, ptr %157, align 8, !tbaa !29
  %159 = getelementptr inbounds %struct.MDMA_Channel_TypeDef, ptr %158, i32 0, i32 4
  store volatile i32 %153, ptr %159, align 4, !tbaa !30
  br label %165

160:                                              ; preds = %134
  %161 = load ptr, ptr %3, align 8, !tbaa !5
  %162 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %161, i32 0, i32 7
  %163 = load volatile i32, ptr %162, align 4, !tbaa !16
  %164 = or i32 %163, 4
  store volatile i32 %164, ptr %162, align 4, !tbaa !16
  store i32 1, ptr %5, align 4, !tbaa !9
  br label %165

165:                                              ; preds = %160, %142
  br label %166

166:                                              ; preds = %165, %116
  br label %167

167:                                              ; preds = %166, %90
  %168 = load ptr, ptr %3, align 8, !tbaa !5
  %169 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %168, i32 0, i32 5
  %170 = load ptr, ptr %169, align 8, !tbaa !23
  %171 = load ptr, ptr %4, align 8, !tbaa !5
  %172 = ptrtoint ptr %171 to i32
  %173 = load ptr, ptr %3, align 8, !tbaa !5
  %174 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %173, i32 0, i32 0
  %175 = load ptr, ptr %174, align 8, !tbaa !11
  %176 = getelementptr inbounds %struct.OCTOSPI_TypeDef, ptr %175, i32 0, i32 14
  %177 = ptrtoint ptr %176 to i32
  %178 = load ptr, ptr %3, align 8, !tbaa !5
  %179 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %178, i32 0, i32 3
  %180 = load volatile i32, ptr %179, align 8, !tbaa !19
  %181 = call i32 @HAL_MDMA_Start_IT(ptr noundef %170, i32 noundef %172, i32 noundef %177, i32 noundef %180, i32 noundef 1)
  %182 = icmp eq i32 %181, 0
  br i1 %182, label %183, label %192

183:                                              ; preds = %167
  %184 = load ptr, ptr %3, align 8, !tbaa !5
  %185 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %184, i32 0, i32 0
  %186 = load ptr, ptr %185, align 8, !tbaa !11
  %187 = getelementptr inbounds %struct.OCTOSPI_TypeDef, ptr %186, i32 0, i32 0
  %188 = load volatile i32, ptr %187, align 4, !tbaa !21
  %189 = zext i32 %188 to i64
  %190 = or i64 %189, 65536
  %191 = trunc i64 %190 to i32
  store volatile i32 %191, ptr %187, align 4, !tbaa !21
  br label %197

192:                                              ; preds = %167
  store i32 1, ptr %5, align 4, !tbaa !9
  %193 = load ptr, ptr %3, align 8, !tbaa !5
  %194 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %193, i32 0, i32 7
  store volatile i32 4, ptr %194, align 4, !tbaa !16
  %195 = load ptr, ptr %3, align 8, !tbaa !5
  %196 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %195, i32 0, i32 6
  store volatile i32 2, ptr %196, align 8, !tbaa !17
  br label %197

197:                                              ; preds = %192, %183
  br label %201

198:                                              ; preds = %18
  store i32 1, ptr %5, align 4, !tbaa !9
  %199 = load ptr, ptr %3, align 8, !tbaa !5
  %200 = getelementptr inbounds %struct.OSPI_HandleTypeDef, ptr %199, i32 0, i32 7
  store volatile i32 16, ptr %200, align 4, !tbaa !16
  br label %201

201:                                              ; preds = %198, %197
  br label %202

202:                                              ; preds = %201, %15
  %203 = load i32, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  ret i32 %203
}

; Function Attrs: nounwind uwtable
declare hidden void @OSPI_DMACplt(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare hidden void @OSPI_DMAError(ptr noundef) #1

declare i32 @HAL_MDMA_Start_IT(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"", !6, i64 0, !13, i64 8, !6, i64 72, !10, i64 80, !10, i64 84, !6, i64 88, !10, i64 96, !10, i64 100, !10, i64 104}
!13 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56}
!14 = !{!15, !10, i64 64}
!15 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !7, i64 24, !10, i64 32, !10, i64 36, !7, i64 40, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !7, i64 84, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144, !7, i64 148, !10, i64 256, !10, i64 260, !10, i64 264, !10, i64 268, !10, i64 272, !7, i64 276, !10, i64 288, !7, i64 292, !10, i64 304, !7, i64 308, !10, i64 320, !10, i64 324, !10, i64 328, !10, i64 332, !10, i64 336, !7, i64 340, !10, i64 352, !7, i64 356, !10, i64 384, !10, i64 388, !10, i64 392, !10, i64 396, !10, i64 400, !7, i64 404, !10, i64 416, !7, i64 420, !10, i64 512, !7, i64 516, !10, i64 1004, !10, i64 1008, !10, i64 1012, !10, i64 1016}
!16 = !{!12, !10, i64 100}
!17 = !{!12, !10, i64 96}
!18 = !{!12, !10, i64 84}
!19 = !{!12, !10, i64 80}
!20 = !{!12, !6, i64 72}
!21 = !{!15, !10, i64 0}
!22 = !{!15, !10, i64 36}
!23 = !{!12, !6, i64 88}
!24 = !{!25, !6, i64 80}
!25 = !{!"__MDMA_HandleTypeDef", !6, i64 0, !26, i64 8, !10, i64 64, !10, i64 68, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !6, i64 120, !6, i64 128, !6, i64 136, !10, i64 144, !10, i64 148}
!26 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52}
!27 = !{!25, !6, i64 112}
!28 = !{!25, !6, i64 120}
!29 = !{!25, !6, i64 0}
!30 = !{!26, !10, i64 16}
!31 = !{!25, !10, i64 32}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @HAL_OSPI_Transmit_DMA(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
  %3 = load ptr, ptr %0, align 8, !tbaa !5
  %4 = getelementptr inbounds i8, ptr %3, i64 64
  %5 = load volatile i32, ptr %4, align 4, !tbaa !12
  %6 = add i32 %5, 1
  %7 = icmp eq ptr %1, null
  br i1 %7, label %8, label %10

8:                                                ; preds = %2
  %9 = getelementptr inbounds i8, ptr %0, i64 100
  store volatile i32 8, ptr %9, align 4, !tbaa !14
  br label %66

10:                                               ; preds = %2
  %11 = getelementptr inbounds i8, ptr %0, i64 96
  %12 = load volatile i32, ptr %11, align 8, !tbaa !15
  %13 = icmp eq i32 %12, 4
  br i1 %13, label %14, label %64

14:                                               ; preds = %10
  %15 = getelementptr inbounds i8, ptr %0, i64 84
  store volatile i32 %6, ptr %15, align 4, !tbaa !16
  %16 = load volatile i32, ptr %15, align 4, !tbaa !16
  %17 = getelementptr inbounds i8, ptr %0, i64 80
  store volatile i32 %16, ptr %17, align 8, !tbaa !17
  %18 = getelementptr inbounds i8, ptr %0, i64 72
  store ptr %1, ptr %18, align 8, !tbaa !18
  %19 = load volatile i32, ptr %3, align 4, !tbaa !19
  %20 = and i32 %19, -805306369
  store volatile i32 %20, ptr %3, align 4, !tbaa !19
  %21 = getelementptr inbounds i8, ptr %3, i64 36
  store volatile i32 3, ptr %21, align 4, !tbaa !20
  store volatile i32 24, ptr %11, align 8, !tbaa !15
  %22 = getelementptr inbounds i8, ptr %0, i64 88
  %23 = load ptr, ptr %22, align 8, !tbaa !21
  %24 = getelementptr inbounds i8, ptr %23, i64 80
  store ptr @OSPI_DMACplt, ptr %24, align 8, !tbaa !22
  %25 = getelementptr inbounds i8, ptr %23, i64 112
  store ptr @OSPI_DMAError, ptr %25, align 8, !tbaa !25
  %26 = getelementptr inbounds i8, ptr %23, i64 120
  store ptr null, ptr %26, align 8, !tbaa !26
  %27 = load ptr, ptr %23, align 8, !tbaa !27
  %28 = getelementptr inbounds i8, ptr %27, i64 16
  %29 = load volatile i32, ptr %28, align 4, !tbaa !28
  %30 = and i32 %29, -3085
  store volatile i32 %30, ptr %28, align 4, !tbaa !28
  %31 = getelementptr inbounds i8, ptr %23, i64 32
  %32 = load i32, ptr %31, align 8, !tbaa !29
  switch i32 %32, label %45 [
    i32 0, label %33
    i32 16, label %37
    i32 32, label %41
  ]

33:                                               ; preds = %14
  %34 = load volatile i32, ptr %28, align 4, !tbaa !28
  %35 = and i32 %34, -772
  %36 = or disjoint i32 %35, 2
  store volatile i32 %36, ptr %28, align 4, !tbaa !28
  br label %49

37:                                               ; preds = %14
  %38 = load volatile i32, ptr %28, align 4, !tbaa !28
  %39 = and i32 %38, -772
  %40 = or disjoint i32 %39, 258
  store volatile i32 %40, ptr %28, align 4, !tbaa !28
  br label %49

41:                                               ; preds = %14
  %42 = load volatile i32, ptr %28, align 4, !tbaa !28
  %43 = and i32 %42, -772
  %44 = or disjoint i32 %43, 514
  store volatile i32 %44, ptr %28, align 4, !tbaa !28
  br label %49

45:                                               ; preds = %14
  %46 = getelementptr inbounds i8, ptr %0, i64 100
  %47 = load volatile i32, ptr %46, align 4, !tbaa !14
  %48 = or i32 %47, 4
  store volatile i32 %48, ptr %46, align 4, !tbaa !14
  br label %49

49:                                               ; preds = %37, %45, %41, %33
  %.0 = phi i32 [ 0, %33 ], [ 0, %37 ], [ 0, %41 ], [ 1, %45 ]
  %50 = ptrtoint ptr %1 to i64
  %51 = trunc i64 %50 to i32
  %52 = getelementptr inbounds i8, ptr %3, i64 80
  %53 = ptrtoint ptr %52 to i64
  %54 = trunc i64 %53 to i32
  %55 = load volatile i32, ptr %17, align 8, !tbaa !17
  %56 = tail call i32 @HAL_MDMA_Start_IT(ptr noundef nonnull %23, i32 noundef %51, i32 noundef %54, i32 noundef %55, i32 noundef 1) #2
  %57 = icmp eq i32 %56, 0
  br i1 %57, label %58, label %62

58:                                               ; preds = %49
  %59 = load ptr, ptr %0, align 8, !tbaa !5
  %60 = load volatile i32, ptr %59, align 4, !tbaa !19
  %61 = or i32 %60, 65536
  store volatile i32 %61, ptr %59, align 4, !tbaa !19
  br label %66

62:                                               ; preds = %49
  %63 = getelementptr inbounds i8, ptr %0, i64 100
  store volatile i32 4, ptr %63, align 4, !tbaa !14
  store volatile i32 2, ptr %11, align 8, !tbaa !15
  br label %66

64:                                               ; preds = %10
  %65 = getelementptr inbounds i8, ptr %0, i64 100
  store volatile i32 16, ptr %65, align 4, !tbaa !14
  br label %66

66:                                               ; preds = %64, %62, %58, %8
  %.1 = phi i32 [ 1, %8 ], [ %.0, %58 ], [ 1, %62 ], [ 1, %64 ]
  ret i32 %.1
}

; Function Attrs: nounwind uwtable
declare hidden void @OSPI_DMACplt(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @OSPI_DMAError(ptr noundef) #0

declare i32 @HAL_MDMA_Start_IT(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !10, i64 8, !7, i64 72, !11, i64 80, !11, i64 84, !7, i64 88, !11, i64 96, !11, i64 100, !11, i64 104}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !11, i64 64}
!13 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !8, i64 24, !11, i64 32, !11, i64 36, !8, i64 40, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !8, i64 84, !11, i64 128, !11, i64 132, !11, i64 136, !11, i64 140, !11, i64 144, !8, i64 148, !11, i64 256, !11, i64 260, !11, i64 264, !11, i64 268, !11, i64 272, !8, i64 276, !11, i64 288, !8, i64 292, !11, i64 304, !8, i64 308, !11, i64 320, !11, i64 324, !11, i64 328, !11, i64 332, !11, i64 336, !8, i64 340, !11, i64 352, !8, i64 356, !11, i64 384, !11, i64 388, !11, i64 392, !11, i64 396, !11, i64 400, !8, i64 404, !11, i64 416, !8, i64 420, !11, i64 512, !8, i64 516, !11, i64 1004, !11, i64 1008, !11, i64 1012, !11, i64 1016}
!14 = !{!6, !11, i64 100}
!15 = !{!6, !11, i64 96}
!16 = !{!6, !11, i64 84}
!17 = !{!6, !11, i64 80}
!18 = !{!6, !7, i64 72}
!19 = !{!13, !11, i64 0}
!20 = !{!13, !11, i64 36}
!21 = !{!6, !7, i64 88}
!22 = !{!23, !7, i64 80}
!23 = !{!"__MDMA_HandleTypeDef", !7, i64 0, !24, i64 8, !11, i64 64, !11, i64 68, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !7, i64 120, !7, i64 128, !7, i64 136, !11, i64 144, !11, i64 148}
!24 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52}
!25 = !{!23, !7, i64 112}
!26 = !{!23, !7, i64 120}
!27 = !{!23, !7, i64 0}
!28 = !{!24, !11, i64 16}
!29 = !{!23, !11, i64 32}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass