; LLVM IR from IOsonata/IOsonata :: src/sensors/accel_h3lis331dl.ll (ZN15AccelH3lis331dl5WriteEPhiS0_i)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Device = type { ptr, i8, i32, ptr, ptr, i64, i8, ptr, i8, i32 }

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN15AccelH3lis331dl5WriteEPhiS0_i(ptr noundef nonnull align 8 dereferenceable(156) %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4) unnamed_addr #0 align 2 {
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !9
  store ptr %3, ptr %9, align 8, !tbaa !5
  store i32 %4, ptr %10, align 4, !tbaa !9
  %11 = load ptr, ptr %6, align 8
  %12 = load ptr, ptr %11, align 8, !tbaa !11
  %13 = getelementptr i8, ptr %12, i64 -24
  %14 = load i64, ptr %13, align 8
  %15 = getelementptr inbounds i8, ptr %11, i64 %14
  %16 = getelementptr inbounds %class.Device, ptr %15, i32 0, i32 3
  %17 = load ptr, ptr %16, align 8, !tbaa !13
  %18 = load ptr, ptr %17, align 8, !tbaa !11
  %19 = getelementptr inbounds ptr, ptr %18, i64 1
  %20 = load ptr, ptr %19, align 8
  %21 = call noundef i32 %20(ptr noundef nonnull align 8 dereferenceable(8) %17)
  %22 = icmp eq i32 %21, 6
  br i1 %22, label %23, label %38

23:                                               ; preds = %5
  %24 = load ptr, ptr %7, align 8, !tbaa !5
  %25 = load i8, ptr %24, align 1, !tbaa !18
  %26 = zext i8 %25 to i32
  %27 = and i32 %26, 63
  %28 = trunc i32 %27 to i8
  store i8 %28, ptr %24, align 1, !tbaa !18
  %29 = load i32, ptr %10, align 4, !tbaa !9
  %30 = icmp sgt i32 %29, 1
  br i1 %30, label %31, label %37

31:                                               ; preds = %23
  %32 = load ptr, ptr %7, align 8, !tbaa !5
  %33 = load i8, ptr %32, align 1, !tbaa !18
  %34 = zext i8 %33 to i32
  %35 = or i32 %34, 64
  %36 = trunc i32 %35 to i8
  store i8 %36, ptr %32, align 1, !tbaa !18
  br label %37

37:                                               ; preds = %31, %23
  br label %53

38:                                               ; preds = %5
  %39 = load ptr, ptr %7, align 8, !tbaa !5
  %40 = load i8, ptr %39, align 1, !tbaa !18
  %41 = zext i8 %40 to i32
  %42 = and i32 %41, 127
  %43 = trunc i32 %42 to i8
  store i8 %43, ptr %39, align 1, !tbaa !18
  %44 = load i32, ptr %10, align 4, !tbaa !9
  %45 = icmp sgt i32 %44, 1
  br i1 %45, label %46, label %52

46:                                               ; preds = %38
  %47 = load ptr, ptr %7, align 8, !tbaa !5
  %48 = load i8, ptr %47, align 1, !tbaa !18
  %49 = zext i8 %48 to i32
  %50 = or i32 %49, 128
  %51 = trunc i32 %50 to i8
  store i8 %51, ptr %47, align 1, !tbaa !18
  br label %52

52:                                               ; preds = %46, %38
  br label %53

53:                                               ; preds = %52, %37
  %54 = load ptr, ptr %11, align 8, !tbaa !11
  %55 = getelementptr i8, ptr %54, i64 -24
  %56 = load i64, ptr %55, align 8
  %57 = getelementptr inbounds i8, ptr %11, i64 %56
  %58 = getelementptr inbounds %class.Device, ptr %57, i32 0, i32 3
  %59 = load ptr, ptr %58, align 8, !tbaa !13
  %60 = load ptr, ptr %11, align 8, !tbaa !11
  %61 = getelementptr i8, ptr %60, i64 -24
  %62 = load i64, ptr %61, align 8
  %63 = getelementptr inbounds i8, ptr %11, i64 %62
  %64 = getelementptr inbounds %class.Device, ptr %63, i32 0, i32 2
  %65 = load i32, ptr %64, align 4, !tbaa !19
  %66 = load ptr, ptr %7, align 8, !tbaa !5
  %67 = load i32, ptr %8, align 4, !tbaa !9
  %68 = load ptr, ptr %9, align 8, !tbaa !5
  %69 = load i32, ptr %10, align 4, !tbaa !9
  %70 = load ptr, ptr %59, align 8, !tbaa !11
  %71 = getelementptr inbounds ptr, ptr %70, i64 9
  %72 = load ptr, ptr %71, align 8
  %73 = call noundef i32 %72(ptr noundef nonnull align 8 dereferenceable(8) %59, i32 noundef %65, ptr noundef %66, i32 noundef %67, ptr noundef %68, i32 noundef %69)
  ret i32 %73
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"vtable pointer", !8, i64 0}
!13 = !{!14, !6, i64 16}
!14 = !{!"_ZTS6Device", !15, i64 8, !10, i64 12, !6, i64 16, !6, i64 24, !16, i64 32, !15, i64 40, !6, i64 48, !7, i64 56, !17, i64 60}
!15 = !{!"bool", !7, i64 0}
!16 = !{!"long", !7, i64 0}
!17 = !{!"_ZTS21__Dev_Data_Byte_Order", !7, i64 0}
!18 = !{!7, !7, i64 0}
!19 = !{!14, !10, i64 12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN15AccelH3lis331dl5WriteEPhiS0_i(ptr nocapture noundef nonnull readonly align 8 dereferenceable(156) %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4) unnamed_addr #0 align 2 {
  %6 = load ptr, ptr %0, align 8, !tbaa !5
  %7 = getelementptr i8, ptr %6, i64 -24
  %8 = load i64, ptr %7, align 8
  %9 = getelementptr inbounds i8, ptr %0, i64 %8
  %10 = getelementptr inbounds i8, ptr %9, i64 16
  %11 = load ptr, ptr %10, align 8, !tbaa !8
  %12 = load ptr, ptr %11, align 8, !tbaa !5
  %13 = getelementptr inbounds i8, ptr %12, i64 8
  %14 = load ptr, ptr %13, align 8
  %15 = tail call noundef i32 %14(ptr noundef nonnull align 8 dereferenceable(8) %11)
  %16 = icmp eq i32 %15, 6
  %17 = load i8, ptr %1, align 1, !tbaa !16
  %18 = icmp sgt i32 %4, 1
  br i1 %16, label %19, label %23

19:                                               ; preds = %5
  %20 = and i8 %17, 63
  store i8 %20, ptr %1, align 1, !tbaa !16
  br i1 %18, label %21, label %27

21:                                               ; preds = %19
  %22 = or disjoint i8 %20, 64
  br label %.sink.split

23:                                               ; preds = %5
  %24 = and i8 %17, 127
  store i8 %24, ptr %1, align 1, !tbaa !16
  br i1 %18, label %25, label %27

25:                                               ; preds = %23
  %26 = or i8 %17, -128
  br label %.sink.split

.sink.split:                                      ; preds = %21, %25
  %.sink = phi i8 [ %26, %25 ], [ %22, %21 ]
  store i8 %.sink, ptr %1, align 1, !tbaa !16
  br label %27

27:                                               ; preds = %.sink.split, %23, %19
  %28 = load ptr, ptr %0, align 8, !tbaa !5
  %29 = getelementptr i8, ptr %28, i64 -24
  %30 = load i64, ptr %29, align 8
  %31 = getelementptr inbounds i8, ptr %0, i64 %30
  %32 = getelementptr inbounds i8, ptr %31, i64 16
  %33 = load ptr, ptr %32, align 8, !tbaa !8
  %34 = getelementptr inbounds i8, ptr %31, i64 12
  %35 = load i32, ptr %34, align 4, !tbaa !17
  %36 = load ptr, ptr %33, align 8, !tbaa !5
  %37 = getelementptr inbounds i8, ptr %36, i64 72
  %38 = load ptr, ptr %37, align 8
  %39 = tail call noundef i32 %38(ptr noundef nonnull align 8 dereferenceable(8) %33, i32 noundef %35, ptr noundef nonnull %1, i32 noundef %2, ptr noundef %3, i32 noundef %4)
  ret i32 %39
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"vtable pointer", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !13, i64 16}
!9 = !{!"_ZTS6Device", !10, i64 8, !12, i64 12, !13, i64 16, !13, i64 24, !14, i64 32, !10, i64 40, !13, i64 48, !11, i64 56, !15, i64 60}
!10 = !{!"bool", !11, i64 0}
!11 = !{!"omnipotent char", !7, i64 0}
!12 = !{!"int", !11, i64 0}
!13 = !{!"any pointer", !11, i64 0}
!14 = !{!"long", !11, i64 0}
!15 = !{!"_ZTS21__Dev_Data_Byte_Order", !11, i64 0}
!16 = !{!11, !11, i64 0}
!17 = !{!9, !12, i64 12}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,IPSCCPPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass