; LLVM IR from Eclipse-SDV-Hackathon-Chapter-Two/challenge-threadx-and-beyond :: MXChip/AZ3166/lib/mxchip_bsp/stm_sensor/Src (lsm6dsl_reg)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.lsm6dsl_wake_up_dur_t = type { i8 }
%struct.lsm6dsl_free_fall_t = type { i8 }

; Function Attrs: nounwind uwtable
declare dso_local i32 @lsm6dsl_read_reg(ptr noundef, i8 noundef zeroext, ptr noundef, i16 noundef zeroext) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @lsm6dsl_write_reg(ptr noundef, i8 noundef zeroext, ptr noundef, i16 noundef zeroext) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @lsm6dsl_ff_dur_set(ptr noundef %0, i8 noundef zeroext %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca i8, align 1
  %5 = alloca %struct.lsm6dsl_wake_up_dur_t, align 1
  %6 = alloca %struct.lsm6dsl_free_fall_t, align 1
  %7 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i8 %1, ptr %4, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #2
  call void @llvm.lifetime.start.p0(i64 1, ptr %6) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  %8 = load ptr, ptr %3, align 8, !tbaa !5
  %9 = call i32 @lsm6dsl_read_reg(ptr noundef %8, i8 noundef zeroext 93, ptr noundef %6, i16 noundef zeroext 1)
  store i32 %9, ptr %7, align 4, !tbaa !10
  %10 = load i32, ptr %7, align 4, !tbaa !10
  %11 = icmp eq i32 %10, 0
  br i1 %11, label %12, label %46

12:                                               ; preds = %2
  %13 = load i8, ptr %4, align 1, !tbaa !9
  %14 = zext i8 %13 to i32
  %15 = and i32 %14, 31
  %16 = trunc i32 %15 to i8
  %17 = load i8, ptr %6, align 1
  %18 = and i8 %16, 31
  %19 = shl i8 %18, 3
  %20 = and i8 %17, 7
  %21 = or i8 %20, %19
  store i8 %21, ptr %6, align 1
  %22 = load ptr, ptr %3, align 8, !tbaa !5
  %23 = call i32 @lsm6dsl_write_reg(ptr noundef %22, i8 noundef zeroext 93, ptr noundef %6, i16 noundef zeroext 1)
  store i32 %23, ptr %7, align 4, !tbaa !10
  %24 = load i32, ptr %7, align 4, !tbaa !10
  %25 = icmp eq i32 %24, 0
  br i1 %25, label %26, label %45

26:                                               ; preds = %12
  %27 = load ptr, ptr %3, align 8, !tbaa !5
  %28 = call i32 @lsm6dsl_read_reg(ptr noundef %27, i8 noundef zeroext 92, ptr noundef %5, i16 noundef zeroext 1)
  store i32 %28, ptr %7, align 4, !tbaa !10
  %29 = load i32, ptr %7, align 4, !tbaa !10
  %30 = icmp eq i32 %29, 0
  br i1 %30, label %31, label %44

31:                                               ; preds = %26
  %32 = load i8, ptr %4, align 1, !tbaa !9
  %33 = zext i8 %32 to i32
  %34 = and i32 %33, 32
  %35 = lshr i32 %34, 5
  %36 = trunc i32 %35 to i8
  %37 = load i8, ptr %5, align 1
  %38 = and i8 %36, 1
  %39 = shl i8 %38, 7
  %40 = and i8 %37, 127
  %41 = or i8 %40, %39
  store i8 %41, ptr %5, align 1
  %42 = load ptr, ptr %3, align 8, !tbaa !5
  %43 = call i32 @lsm6dsl_write_reg(ptr noundef %42, i8 noundef zeroext 92, ptr noundef %5, i16 noundef zeroext 1)
  store i32 %43, ptr %7, align 4, !tbaa !10
  br label %44

44:                                               ; preds = %31, %26
  br label %45

45:                                               ; preds = %44, %12
  br label %46

46:                                               ; preds = %45, %2
  %47 = load i32, ptr %7, align 4, !tbaa !10
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 1, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #2
  ret i32 %47
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.lsm6dsl_wake_up_dur_t = type { i8 }
%struct.lsm6dsl_free_fall_t = type { i8 }

; Function Attrs: nounwind uwtable
declare dso_local i32 @lsm6dsl_read_reg(ptr noundef, i8 noundef zeroext, ptr noundef, i16 noundef zeroext) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @lsm6dsl_write_reg(ptr noundef, i8 noundef zeroext, ptr noundef, i16 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local i32 @lsm6dsl_ff_dur_set(ptr noundef %0, i8 noundef zeroext %1) local_unnamed_addr #0 {
  %3 = alloca %struct.lsm6dsl_wake_up_dur_t, align 1
  %4 = alloca %struct.lsm6dsl_free_fall_t, align 1
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %3) #2
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %4) #2
  %5 = call i32 @lsm6dsl_read_reg(ptr noundef %0, i8 noundef zeroext 93, ptr noundef nonnull %4, i16 noundef zeroext 1)
  %6 = icmp eq i32 %5, 0
  br i1 %6, label %7, label %24

7:                                                ; preds = %2
  %8 = load i8, ptr %4, align 1
  %9 = shl i8 %1, 3
  %10 = and i8 %8, 7
  %11 = or disjoint i8 %10, %9
  store i8 %11, ptr %4, align 1
  %12 = call i32 @lsm6dsl_write_reg(ptr noundef %0, i8 noundef zeroext 93, ptr noundef nonnull %4, i16 noundef zeroext 1)
  %13 = icmp eq i32 %12, 0
  br i1 %13, label %14, label %24

14:                                               ; preds = %7
  %15 = call i32 @lsm6dsl_read_reg(ptr noundef %0, i8 noundef zeroext 92, ptr noundef nonnull %3, i16 noundef zeroext 1)
  %16 = icmp eq i32 %15, 0
  br i1 %16, label %17, label %24

17:                                               ; preds = %14
  %18 = load i8, ptr %3, align 1
  %19 = shl i8 %1, 2
  %20 = and i8 %19, -128
  %21 = and i8 %18, 127
  %22 = or disjoint i8 %21, %20
  store i8 %22, ptr %3, align 1
  %23 = call i32 @lsm6dsl_write_reg(ptr noundef %0, i8 noundef zeroext 92, ptr noundef nonnull %3, i16 noundef zeroext 1)
  br label %24

24:                                               ; preds = %7, %17, %14, %2
  %.0 = phi i32 [ %23, %17 ], [ %15, %14 ], [ %12, %7 ], [ %5, %2 ]
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %4) #2
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %3) #2
  ret i32 %.0
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass