; LLVM IR from ftylitak/qzxing :: src/zxing/zxing/oned/rss (RSSUtils)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.__gnu_cxx::__normal_iterator" = type { ptr }

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN5zxing4oned3rss8RSSUtils11getRSSvalueESt6vectorIiSaIiEEib(ptr noundef %0, i32 noundef %1, i1 noundef zeroext %2) #0 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i8, align 1
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  %10 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  %21 = zext i1 %2 to i8
  store i8 %21, ptr %6, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  store i32 0, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #4
  store ptr %0, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #4
  %22 = load ptr, ptr %8, align 8, !tbaa !5
  %23 = call ptr @_ZNSt6vectorIiSaIiEE5beginEv(ptr noundef nonnull align 8 dereferenceable(24) %22) #4
  %24 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator", ptr %9, i32 0, i32 0
  store ptr %23, ptr %24, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #4
  %25 = load ptr, ptr %8, align 8, !tbaa !5
  %26 = call ptr @_ZNSt6vectorIiSaIiEE3endEv(ptr noundef nonnull align 8 dereferenceable(24) %25) #4
  %27 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator", ptr %10, i32 0, i32 0
  store ptr %26, ptr %27, align 8
  br label %28

28:                                               ; preds = %37, %3
  %29 = call noundef zeroext i1 @_ZN9__gnu_cxxneIPiSt6vectorIiSaIiEEEEbRKNS_17__normal_iteratorIT_T0_EESA_(ptr noundef nonnull align 8 dereferenceable(8) %9, ptr noundef nonnull align 8 dereferenceable(8) %10) #4
  br i1 %29, label %31, label %30

30:                                               ; preds = %28
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #4
  br label %39

31:                                               ; preds = %28
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  %32 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNK9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEdeEv(ptr noundef nonnull align 8 dereferenceable(8) %9) #4
  %33 = load i32, ptr %32, align 4, !tbaa !9
  store i32 %33, ptr %11, align 4, !tbaa !9
  %34 = load i32, ptr %11, align 4, !tbaa !9
  %35 = load i32, ptr %7, align 4, !tbaa !9
  %36 = add nsw i32 %35, %34
  store i32 %36, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  br label %37

37:                                               ; preds = %31
  %38 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEppEv(ptr noundef nonnull align 8 dereferenceable(8) %9) #4
  br label %28

39:                                               ; preds = %30
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  store i32 0, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  store i32 0, ptr %13, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #4
  %40 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #4
  %41 = trunc i64 %40 to i32
  store i32 %41, ptr %14, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #4
  store i32 0, ptr %15, align 4, !tbaa !9
  br label %42

42:                                               ; preds = %176, %39
  %43 = load i32, ptr %15, align 4, !tbaa !9
  %44 = load i32, ptr %14, align 4, !tbaa !9
  %45 = sub nsw i32 %44, 1
  %46 = icmp slt i32 %43, %45
  br i1 %46, label %48, label %47

47:                                               ; preds = %42
  store i32 4, ptr %16, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #4
  br label %179

48:                                               ; preds = %42
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #4
  store i32 1, ptr %17, align 4, !tbaa !9
  %49 = load i32, ptr %15, align 4, !tbaa !9
  %50 = shl i32 1, %49
  %51 = load i32, ptr %13, align 4, !tbaa !9
  %52 = or i32 %51, %50
  store i32 %52, ptr %13, align 4, !tbaa !9
  br label %53

53:                                               ; preds = %164, %48
  %54 = load i32, ptr %17, align 4, !tbaa !9
  %55 = load i32, ptr %15, align 4, !tbaa !9
  %56 = sext i32 %55 to i64
  %57 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %56) #4
  %58 = load i32, ptr %57, align 4, !tbaa !9
  %59 = icmp slt i32 %54, %58
  br i1 %59, label %60, label %172

60:                                               ; preds = %53
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #4
  %61 = load i32, ptr %7, align 4, !tbaa !9
  %62 = load i32, ptr %17, align 4, !tbaa !9
  %63 = sub nsw i32 %61, %62
  %64 = sub nsw i32 %63, 1
  %65 = load i32, ptr %14, align 4, !tbaa !9
  %66 = load i32, ptr %15, align 4, !tbaa !9
  %67 = sub nsw i32 %65, %66
  %68 = sub nsw i32 %67, 2
  %69 = call noundef i32 @_ZN5zxing4oned3rss8RSSUtils7combinsEii(i32 noundef %64, i32 noundef %68)
  store i32 %69, ptr %18, align 4, !tbaa !9
  %70 = load i8, ptr %6, align 1, !tbaa !11, !range !13, !noundef !14
  %71 = trunc i8 %70 to i1
  br i1 %71, label %72, label %104

72:                                               ; preds = %60
  %73 = load i32, ptr %13, align 4, !tbaa !9
  %74 = icmp eq i32 %73, 0
  br i1 %74, label %75, label %104

75:                                               ; preds = %72
  %76 = load i32, ptr %7, align 4, !tbaa !9
  %77 = load i32, ptr %17, align 4, !tbaa !9
  %78 = sub nsw i32 %76, %77
  %79 = load i32, ptr %14, align 4, !tbaa !9
  %80 = load i32, ptr %15, align 4, !tbaa !9
  %81 = sub nsw i32 %79, %80
  %82 = sub nsw i32 %81, 1
  %83 = sub nsw i32 %78, %82
  %84 = load i32, ptr %14, align 4, !tbaa !9
  %85 = load i32, ptr %15, align 4, !tbaa !9
  %86 = sub nsw i32 %84, %85
  %87 = sub nsw i32 %86, 1
  %88 = icmp sge i32 %83, %87
  br i1 %88, label %89, label %104

89:                                               ; preds = %75
  %90 = load i32, ptr %7, align 4, !tbaa !9
  %91 = load i32, ptr %17, align 4, !tbaa !9
  %92 = sub nsw i32 %90, %91
  %93 = load i32, ptr %14, align 4, !tbaa !9
  %94 = load i32, ptr %15, align 4, !tbaa !9
  %95 = sub nsw i32 %93, %94
  %96 = sub nsw i32 %92, %95
  %97 = load i32, ptr %14, align 4, !tbaa !9
  %98 = load i32, ptr %15, align 4, !tbaa !9
  %99 = sub nsw i32 %97, %98
  %100 = sub nsw i32 %99, 2
  %101 = call noundef i32 @_ZN5zxing4oned3rss8RSSUtils7combinsEii(i32 noundef %96, i32 noundef %100)
  %102 = load i32, ptr %18, align 4, !tbaa !9
  %103 = sub nsw i32 %102, %101
  store i32 %103, ptr %18, align 4, !tbaa !9
  br label %104

104:                                              ; preds = %89, %75, %72, %60
  %105 = load i32, ptr %14, align 4, !tbaa !9
  %106 = load i32, ptr %15, align 4, !tbaa !9
  %107 = sub nsw i32 %105, %106
  %108 = sub nsw i32 %107, 1
  %109 = icmp sgt i32 %108, 1
  br i1 %109, label %110, label %150

110:                                              ; preds = %104
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #4
  store i32 0, ptr %19, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #4
  %111 = load i32, ptr %7, align 4, !tbaa !9
  %112 = load i32, ptr %17, align 4, !tbaa !9
  %113 = sub nsw i32 %111, %112
  %114 = load i32, ptr %14, align 4, !tbaa !9
  %115 = load i32, ptr %15, align 4, !tbaa !9
  %116 = sub nsw i32 %114, %115
  %117 = sub nsw i32 %116, 2
  %118 = sub nsw i32 %113, %117
  store i32 %118, ptr %20, align 4, !tbaa !9
  br label %119

119:                                              ; preds = %138, %110
  %120 = load i32, ptr %20, align 4, !tbaa !9
  %121 = load i32, ptr %5, align 4, !tbaa !9
  %122 = icmp sgt i32 %120, %121
  br i1 %122, label %124, label %123

123:                                              ; preds = %119
  store i32 10, ptr %16, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #4
  br label %141

124:                                              ; preds = %119
  %125 = load i32, ptr %7, align 4, !tbaa !9
  %126 = load i32, ptr %17, align 4, !tbaa !9
  %127 = sub nsw i32 %125, %126
  %128 = load i32, ptr %20, align 4, !tbaa !9
  %129 = sub nsw i32 %127, %128
  %130 = sub nsw i32 %129, 1
  %131 = load i32, ptr %14, align 4, !tbaa !9
  %132 = load i32, ptr %15, align 4, !tbaa !9
  %133 = sub nsw i32 %131, %132
  %134 = sub nsw i32 %133, 3
  %135 = call noundef i32 @_ZN5zxing4oned3rss8RSSUtils7combinsEii(i32 noundef %130, i32 noundef %134)
  %136 = load i32, ptr %19, align 4, !tbaa !9
  %137 = add nsw i32 %136, %135
  store i32 %137, ptr %19, align 4, !tbaa !9
  br label %138

138:                                              ; preds = %124
  %139 = load i32, ptr %20, align 4, !tbaa !9
  %140 = add nsw i32 %139, -1
  store i32 %140, ptr %20, align 4, !tbaa !9
  br label %119, !llvm.loop !15

141:                                              ; preds = %123
  %142 = load i32, ptr %19, align 4, !tbaa !9
  %143 = load i32, ptr %14, align 4, !tbaa !9
  %144 = sub nsw i32 %143, 1
  %145 = load i32, ptr %15, align 4, !tbaa !9
  %146 = sub nsw i32 %144, %145
  %147 = mul nsw i32 %142, %146
  %148 = load i32, ptr %18, align 4, !tbaa !9
  %149 = sub nsw i32 %148, %147
  store i32 %149, ptr %18, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #4
  br label %160

150:                                              ; preds = %104
  %151 = load i32, ptr %7, align 4, !tbaa !9
  %152 = load i32, ptr %17, align 4, !tbaa !9
  %153 = sub nsw i32 %151, %152
  %154 = load i32, ptr %5, align 4, !tbaa !9
  %155 = icmp sgt i32 %153, %154
  br i1 %155, label %156, label %159

156:                                              ; preds = %150
  %157 = load i32, ptr %18, align 4, !tbaa !9
  %158 = add nsw i32 %157, -1
  store i32 %158, ptr %18, align 4, !tbaa !9
  br label %159

159:                                              ; preds = %156, %150
  br label %160

160:                                              ; preds = %159, %141
  %161 = load i32, ptr %18, align 4, !tbaa !9
  %162 = load i32, ptr %12, align 4, !tbaa !9
  %163 = add nsw i32 %162, %161
  store i32 %163, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #4
  br label %164

164:                                              ; preds = %160
  %165 = load i32, ptr %17, align 4, !tbaa !9
  %166 = add nsw i32 %165, 1
  store i32 %166, ptr %17, align 4, !tbaa !9
  %167 = load i32, ptr %15, align 4, !tbaa !9
  %168 = shl i32 1, %167
  %169 = xor i32 %168, -1
  %170 = load i32, ptr %13, align 4, !tbaa !9
  %171 = and i32 %170, %169
  store i32 %171, ptr %13, align 4, !tbaa !9
  br label %53, !llvm.loop !17

172:                                              ; preds = %53
  %173 = load i32, ptr %17, align 4, !tbaa !9
  %174 = load i32, ptr %7, align 4, !tbaa !9
  %175 = sub nsw i32 %174, %173
  store i32 %175, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #4
  br label %176

176:                                              ; preds = %172
  %177 = load i32, ptr %15, align 4, !tbaa !9
  %178 = add nsw i32 %177, 1
  store i32 %178, ptr %15, align 4, !tbaa !9
  br label %42, !llvm.loop !18

179:                                              ; preds = %47
  %180 = load i32, ptr %12, align 4, !tbaa !9
  store i32 1, ptr %16, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  ret i32 %180
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIiSaIiEE5beginEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIiSaIiEE3endEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN9__gnu_cxxneIPiSt6vectorIiSaIiEEEEbRKNS_17__normal_iteratorIT_T0_EESA_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNK9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEdeEv(ptr noundef nonnull align 8 dereferenceable(8)) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEppEv(ptr noundef nonnull align 8 dereferenceable(8)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5zxing4oned3rss8RSSUtils7combinsEii(i32 noundef, i32 noundef) #2 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{i8 0, i8 2}
!14 = !{}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = distinct !{!17, !16}
!18 = distinct !{!18, !16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.__gnu_cxx::__normal_iterator" = type { ptr }

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_ZN5zxing4oned3rss8RSSUtils11getRSSvalueESt6vectorIiSaIiEEib(ptr noundef nonnull %0, i32 noundef %1, i1 noundef zeroext %2) local_unnamed_addr #0 align 2 {
  %4 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  %5 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
  %6 = tail call ptr @_ZNSt6vectorIiSaIiEE5beginEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #3
  store ptr %6, ptr %4, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
  %7 = tail call ptr @_ZNSt6vectorIiSaIiEE3endEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #3
  store ptr %7, ptr %5, align 8
  %8 = call noundef zeroext i1 @_ZN9__gnu_cxxneIPiSt6vectorIiSaIiEEEEbRKNS_17__normal_iteratorIT_T0_EESA_(ptr noundef nonnull align 8 dereferenceable(8) %4, ptr noundef nonnull align 8 dereferenceable(8) %5) #3
  br i1 %8, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %3
  %.065.lcssa = phi i32 [ 0, %3 ], [ %15, %.lr.ph ]
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
  %9 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #3
  %10 = trunc i64 %9 to i32
  %11 = add i32 %10, -1
  %12 = icmp sgt i32 %10, 1
  br i1 %12, label %.lr.ph109.preheader, label %._crit_edge110

.lr.ph109.preheader:                              ; preds = %._crit_edge
  %wide.trip.count = zext nneg i32 %11 to i64
  %not. = xor i1 %2, true
  br label %.lr.ph109

.lr.ph:                                           ; preds = %3, %.lr.ph
  %.06573 = phi i32 [ %15, %.lr.ph ], [ 0, %3 ]
  %13 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNK9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEdeEv(ptr noundef nonnull align 8 dereferenceable(8) %4) #3
  %14 = load i32, ptr %13, align 4, !tbaa !5
  %15 = add nsw i32 %14, %.06573
  %16 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEppEv(ptr noundef nonnull align 8 dereferenceable(8) %4) #3
  %17 = call noundef zeroext i1 @_ZN9__gnu_cxxneIPiSt6vectorIiSaIiEEEEbRKNS_17__normal_iteratorIT_T0_EESA_(ptr noundef nonnull align 8 dereferenceable(8) %4, ptr noundef nonnull align 8 dereferenceable(8) %5) #3
  br i1 %17, label %.lr.ph, label %._crit_edge

._crit_edge110:                                   ; preds = %._crit_edge85, %._crit_edge
  %.069.lcssa = phi i32 [ 0, %._crit_edge ], [ %.170.lcssa, %._crit_edge85 ]
  ret i32 %.069.lcssa

.lr.ph109:                                        ; preds = %.lr.ph109.preheader, %._crit_edge85
  %indvars.iv = phi i64 [ 0, %.lr.ph109.preheader ], [ %indvars.iv.next, %._crit_edge85 ]
  %.166104 = phi i32 [ %.065.lcssa, %.lr.ph109.preheader ], [ %94, %._crit_edge85 ]
  %.067103 = phi i32 [ 0, %.lr.ph109.preheader ], [ %.168.lcssa, %._crit_edge85 ]
  %.069102 = phi i32 [ 0, %.lr.ph109.preheader ], [ %.170.lcssa, %._crit_edge85 ]
  %18 = trunc nuw nsw i64 %indvars.iv to i32
  %19 = shl nuw i32 1, %18
  %20 = or i32 %19, %.067103
  %21 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #3
  %22 = load i32, ptr %21, align 4, !tbaa !5
  %23 = icmp sgt i32 %22, 1
  br i1 %23, label %.lr.ph84, label %._crit_edge85

.lr.ph84:                                         ; preds = %.lr.ph109
  %24 = sub i32 %10, %18
  %25 = add nsw i32 %24, -2
  %26 = add nsw i32 %24, -1
  %27 = icmp sgt i32 %24, 2
  %28 = add nsw i32 %24, -3
  %.neg = sub i32 %18, %11
  %29 = xor i32 %19, -1
  br i1 %27, label %.lr.ph84.split.us.preheader, label %.lr.ph84.split

.lr.ph84.split.us.preheader:                      ; preds = %.lr.ph84
  %30 = and i32 %.067103, %29
  br label %.lr.ph84.split.us

.lr.ph84.split.us:                                ; preds = %.lr.ph84.split.us.preheader, %._crit_edge78.us
  %.06382.us = phi i32 [ %45, %._crit_edge78.us ], [ 1, %.lr.ph84.split.us.preheader ]
  %.16881.us = phi i32 [ %30, %._crit_edge78.us ], [ 1, %.lr.ph84.split.us.preheader ]
  %.17080.us = phi i32 [ %44, %._crit_edge78.us ], [ %.069102, %.lr.ph84.split.us.preheader ]
  %31 = sub nsw i32 %.166104, %.06382.us
  %32 = add nsw i32 %31, -1
  %33 = call noundef i32 @_ZN5zxing4oned3rss8RSSUtils7combinsEii(i32 noundef %32, i32 noundef %25)
  %34 = icmp ne i32 %.16881.us, 0
  %or.cond.us = select i1 %not., i1 true, i1 %34
  %35 = sub nsw i32 %31, %26
  %.not.us = icmp slt i32 %35, %26
  %or.cond = select i1 %or.cond.us, i1 true, i1 %.not.us
  br i1 %or.cond, label %40, label %36

36:                                               ; preds = %.lr.ph84.split.us
  %37 = sub nsw i32 %31, %24
  %38 = call noundef i32 @_ZN5zxing4oned3rss8RSSUtils7combinsEii(i32 noundef %37, i32 noundef %25)
  %39 = sub nsw i32 %33, %38
  br label %40

40:                                               ; preds = %36, %.lr.ph84.split.us
  %.062.us = phi i32 [ %39, %36 ], [ %33, %.lr.ph84.split.us ]
  %41 = sub nsw i32 %31, %25
  %42 = icmp sgt i32 %41, %1
  br i1 %42, label %.lr.ph77.us, label %._crit_edge78.us

._crit_edge78.us:                                 ; preds = %.lr.ph77.us, %40
  %.061.lcssa.us = phi i32 [ 0, %40 ], [ %52, %.lr.ph77.us ]
  %.neg72.us = mul i32 %.061.lcssa.us, %.neg
  %43 = add i32 %.neg72.us, %.062.us
  %44 = add nsw i32 %43, %.17080.us
  %45 = add nuw nsw i32 %.06382.us, 1
  %46 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #3
  %47 = load i32, ptr %46, align 4, !tbaa !5
  %48 = icmp slt i32 %45, %47
  br i1 %48, label %.lr.ph84.split.us, label %._crit_edge85, !llvm.loop !9

.lr.ph77.us:                                      ; preds = %40, %.lr.ph77.us
  %.075.us = phi i32 [ %53, %.lr.ph77.us ], [ %41, %40 ]
  %.06174.us = phi i32 [ %52, %.lr.ph77.us ], [ 0, %40 ]
  %49 = xor i32 %.075.us, -1
  %50 = add i32 %31, %49
  %51 = call noundef i32 @_ZN5zxing4oned3rss8RSSUtils7combinsEii(i32 noundef %50, i32 noundef %28)
  %52 = add nsw i32 %51, %.06174.us
  %53 = add nsw i32 %.075.us, -1
  %54 = icmp sgt i32 %53, %1
  br i1 %54, label %.lr.ph77.us, label %._crit_edge78.us, !llvm.loop !11

.lr.ph84.split:                                   ; preds = %.lr.ph84
  br i1 %2, label %55, label %.lr.ph84.split.split.us

55:                                               ; preds = %.lr.ph84.split
  %56 = add nsw i32 %.166104, -2
  %57 = call noundef i32 @_ZN5zxing4oned3rss8RSSUtils7combinsEii(i32 noundef %56, i32 noundef %25)
  %58 = add nsw i32 %.166104, -1
  %59 = icmp sgt i32 %58, %1
  %60 = sext i1 %59 to i32
  %spec.select.peel = add nsw i32 %57, %60
  %61 = add nsw i32 %spec.select.peel, %.069102
  %62 = and i32 %.067103, %29
  %63 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #3
  %64 = load i32, ptr %63, align 4, !tbaa !5
  %65 = icmp sgt i32 %64, 2
  br i1 %65, label %.lr.ph84.split.split.peel.next, label %._crit_edge85

.lr.ph84.split.split.peel.next:                   ; preds = %55
  %66 = icmp ne i32 %62, 0
  br label %.lr.ph84.split.split

.lr.ph84.split.split.us:                          ; preds = %.lr.ph84.split, %.lr.ph84.split.split.us
  %.06382.us91 = phi i32 [ %73, %.lr.ph84.split.split.us ], [ 1, %.lr.ph84.split ]
  %.17080.us93 = phi i32 [ %72, %.lr.ph84.split.split.us ], [ %.069102, %.lr.ph84.split ]
  %67 = sub nsw i32 %.166104, %.06382.us91
  %68 = add nsw i32 %67, -1
  %69 = call noundef i32 @_ZN5zxing4oned3rss8RSSUtils7combinsEii(i32 noundef %68, i32 noundef %25)
  %70 = icmp sgt i32 %67, %1
  %71 = sext i1 %70 to i32
  %spec.select.us = add nsw i32 %69, %71
  %72 = add nsw i32 %spec.select.us, %.17080.us93
  %73 = add nuw nsw i32 %.06382.us91, 1
  %74 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #3
  %75 = load i32, ptr %74, align 4, !tbaa !5
  %76 = icmp slt i32 %73, %75
  br i1 %76, label %.lr.ph84.split.split.us, label %._crit_edge85.loopexit115, !llvm.loop !9

.lr.ph84.split.split:                             ; preds = %.lr.ph84.split.split.peel.next, %85
  %.06382 = phi i32 [ %89, %85 ], [ 2, %.lr.ph84.split.split.peel.next ]
  %.17080 = phi i32 [ %88, %85 ], [ %61, %.lr.ph84.split.split.peel.next ]
  %77 = sub nsw i32 %.166104, %.06382
  %78 = add nsw i32 %77, -1
  %79 = call noundef i32 @_ZN5zxing4oned3rss8RSSUtils7combinsEii(i32 noundef %78, i32 noundef %25)
  %80 = sub nsw i32 %77, %26
  %.not = icmp slt i32 %80, %26
  %or.cond112 = select i1 %66, i1 true, i1 %.not
  br i1 %or.cond112, label %85, label %81

81:                                               ; preds = %.lr.ph84.split.split
  %82 = sub nsw i32 %77, %24
  %83 = call noundef i32 @_ZN5zxing4oned3rss8RSSUtils7combinsEii(i32 noundef %82, i32 noundef %25)
  %84 = sub nsw i32 %79, %83
  br label %85

85:                                               ; preds = %81, %.lr.ph84.split.split
  %.062 = phi i32 [ %84, %81 ], [ %79, %.lr.ph84.split.split ]
  %86 = icmp sgt i32 %77, %1
  %87 = sext i1 %86 to i32
  %spec.select = add nsw i32 %.062, %87
  %88 = add nsw i32 %spec.select, %.17080
  %89 = add nuw nsw i32 %.06382, 1
  %90 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #3
  %91 = load i32, ptr %90, align 4, !tbaa !5
  %92 = icmp slt i32 %89, %91
  br i1 %92, label %.lr.ph84.split.split, label %._crit_edge85, !llvm.loop !12

._crit_edge85.loopexit115:                        ; preds = %.lr.ph84.split.split.us
  %93 = and i32 %.067103, %29
  br label %._crit_edge85

._crit_edge85:                                    ; preds = %85, %._crit_edge78.us, %55, %._crit_edge85.loopexit115, %.lr.ph109
  %.170.lcssa = phi i32 [ %.069102, %.lr.ph109 ], [ %72, %._crit_edge85.loopexit115 ], [ %61, %55 ], [ %44, %._crit_edge78.us ], [ %88, %85 ]
  %.168.lcssa = phi i32 [ %20, %.lr.ph109 ], [ %93, %._crit_edge85.loopexit115 ], [ %62, %55 ], [ %30, %._crit_edge78.us ], [ %62, %85 ]
  %.063.lcssa = phi i32 [ 1, %.lr.ph109 ], [ %73, %._crit_edge85.loopexit115 ], [ 2, %55 ], [ %45, %._crit_edge78.us ], [ %89, %85 ]
  %94 = sub nsw i32 %.166104, %.063.lcssa
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge110, label %.lr.ph109, !llvm.loop !14
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIiSaIiEE5beginEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIiSaIiEE3endEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN9__gnu_cxxneIPiSt6vectorIiSaIiEEEEbRKNS_17__normal_iteratorIT_T0_EESA_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNK9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEdeEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEppEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN5zxing4oned3rss8RSSUtils7combinsEii(i32 noundef, i32 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10, !13}
!13 = !{!"llvm.loop.peeled.count", i32 1}
!14 = distinct !{!14, !10}


; Effective O3 passes: BDCEPass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopFullUnrollPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass