; LLVM IR from FidoProject/Fido :: src/NeuralNet.ll (ZN3net9NeuralNet10getWeightsEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.net::NeuralNet" = type { %"class.std::vector" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<net::Layer, std::allocator<net::Layer>>::_Vector_impl" }
%"struct.std::_Vector_base<net::Layer, std::allocator<net::Layer>>::_Vector_impl" = type { %"struct.std::_Vector_base<net::Layer, std::allocator<net::Layer>>::_Vector_impl_data" }
%"struct.std::_Vector_base<net::Layer, std::allocator<net::Layer>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.net::Layer" = type { ptr, %"class.std::vector.3" }
%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<net::Neuron, std::allocator<net::Neuron>>::_Vector_impl" }
%"struct.std::_Vector_base<net::Neuron, std::allocator<net::Neuron>>::_Vector_impl" = type { %"struct.std::_Vector_base<net::Neuron, std::allocator<net::Neuron>>::_Vector_impl_data" }
%"struct.std::_Vector_base<net::Neuron, std::allocator<net::Neuron>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.net::Neuron" = type { %"class.std::vector.8" }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN3net5LayerESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN3net5LayerESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN3net9NeuralNet10getWeightsEv(ptr dead_on_unwind noalias writable sret(%"class.std::vector.8") align 8 %0, ptr noundef nonnull align 8 dereferenceable(24) %1) #2 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i1, align 1
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  store ptr %0, ptr %3, align 8
  store ptr %1, ptr %4, align 8, !tbaa !5
  %12 = load ptr, ptr %4, align 8
  store i1 false, ptr %5, align 1
  call void @_ZNSt6vectorIdSaIdEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %0) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  store i32 0, ptr %6, align 4, !tbaa !9
  br label %13

13:                                               ; preds = %74, %2
  %14 = load i32, ptr %6, align 4, !tbaa !9
  %15 = zext i32 %14 to i64
  %16 = getelementptr inbounds %"class.net::NeuralNet", ptr %12, i32 0, i32 0
  %17 = call noundef i64 @_ZNKSt6vectorIN3net5LayerESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %16) #3
  %18 = icmp ult i64 %15, %17
  br i1 %18, label %20, label %19

19:                                               ; preds = %13
  store i32 2, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  br label %77

20:                                               ; preds = %13
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  store i32 0, ptr %8, align 4, !tbaa !9
  br label %21

21:                                               ; preds = %70, %20
  %22 = load i32, ptr %8, align 4, !tbaa !9
  %23 = zext i32 %22 to i64
  %24 = getelementptr inbounds %"class.net::NeuralNet", ptr %12, i32 0, i32 0
  %25 = load i32, ptr %6, align 4, !tbaa !9
  %26 = zext i32 %25 to i64
  %27 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN3net5LayerESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %24, i64 noundef %26) #3
  %28 = getelementptr inbounds %"class.net::Layer", ptr %27, i32 0, i32 1
  %29 = call noundef i64 @_ZNKSt6vectorIN3net6NeuronESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %28) #3
  %30 = icmp ult i64 %23, %29
  br i1 %30, label %32, label %31

31:                                               ; preds = %21
  store i32 5, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  br label %73

32:                                               ; preds = %21
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %33

33:                                               ; preds = %62, %32
  %34 = load i32, ptr %9, align 4, !tbaa !9
  %35 = zext i32 %34 to i64
  %36 = getelementptr inbounds %"class.net::NeuralNet", ptr %12, i32 0, i32 0
  %37 = load i32, ptr %6, align 4, !tbaa !9
  %38 = zext i32 %37 to i64
  %39 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN3net5LayerESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %36, i64 noundef %38) #3
  %40 = getelementptr inbounds %"class.net::Layer", ptr %39, i32 0, i32 1
  %41 = load i32, ptr %8, align 4, !tbaa !9
  %42 = zext i32 %41 to i64
  %43 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIN3net6NeuronESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %40, i64 noundef %42) #3
  %44 = getelementptr inbounds %"class.net::Neuron", ptr %43, i32 0, i32 0
  %45 = call noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %44) #3
  %46 = icmp ult i64 %35, %45
  br i1 %46, label %48, label %47

47:                                               ; preds = %33
  store i32 8, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  br label %69

48:                                               ; preds = %33
  %49 = getelementptr inbounds %"class.net::NeuralNet", ptr %12, i32 0, i32 0
  %50 = load i32, ptr %6, align 4, !tbaa !9
  %51 = zext i32 %50 to i64
  %52 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN3net5LayerESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %49, i64 noundef %51) #3
  %53 = getelementptr inbounds %"class.net::Layer", ptr %52, i32 0, i32 1
  %54 = load i32, ptr %8, align 4, !tbaa !9
  %55 = zext i32 %54 to i64
  %56 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIN3net6NeuronESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %53, i64 noundef %55) #3
  %57 = getelementptr inbounds %"class.net::Neuron", ptr %56, i32 0, i32 0
  %58 = load i32, ptr %9, align 4, !tbaa !9
  %59 = zext i32 %58 to i64
  %60 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %57, i64 noundef %59) #3
  invoke void @_ZNSt6vectorIdSaIdEE9push_backERKd(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(8) %60)
          to label %61 unwind label %65

61:                                               ; preds = %48
  br label %62

62:                                               ; preds = %61
  %63 = load i32, ptr %9, align 4, !tbaa !9
  %64 = add i32 %63, 1
  store i32 %64, ptr %9, align 4, !tbaa !9
  br label %33, !llvm.loop !11

65:                                               ; preds = %48
  %66 = landingpad { ptr, i32 }
          cleanup
  %67 = extractvalue { ptr, i32 } %66, 0
  store ptr %67, ptr %10, align 8
  %68 = extractvalue { ptr, i32 } %66, 1
  store i32 %68, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  call void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %0) #3
  br label %81

69:                                               ; preds = %47
  br label %70

70:                                               ; preds = %69
  %71 = load i32, ptr %8, align 4, !tbaa !9
  %72 = add i32 %71, 1
  store i32 %72, ptr %8, align 4, !tbaa !9
  br label %21, !llvm.loop !13

73:                                               ; preds = %31
  br label %74

74:                                               ; preds = %73
  %75 = load i32, ptr %6, align 4, !tbaa !9
  %76 = add i32 %75, 1
  store i32 %76, ptr %6, align 4, !tbaa !9
  br label %13, !llvm.loop !14

77:                                               ; preds = %19
  store i1 true, ptr %5, align 1
  store i32 1, ptr %7, align 4
  %78 = load i1, ptr %5, align 1
  br i1 %78, label %80, label %79

79:                                               ; preds = %77
  call void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %0) #3
  br label %80

80:                                               ; preds = %79, %77
  ret void

81:                                               ; preds = %65
  %82 = load ptr, ptr %10, align 8
  %83 = load i32, ptr %11, align 4
  %84 = insertvalue { ptr, i32 } poison, ptr %82, 0
  %85 = insertvalue { ptr, i32 } %84, i32 %83, 1
  resume { ptr, i32 } %85
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN3net6NeuronESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIN3net6NeuronESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEE9push_backERKd(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(8)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN3net5LayerESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN3net5LayerESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN3net9NeuralNet10getWeightsEv(ptr dead_on_unwind noalias nonnull writable sret(%"class.std::vector.8") align 8 %0, ptr noundef nonnull align 8 dereferenceable(24) %1) local_unnamed_addr #1 align 2 personality ptr @__gxx_personality_v0 {
  tail call void @_ZNSt6vectorIdSaIdEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %0) #2
  %3 = tail call noundef i64 @_ZNKSt6vectorIN3net5LayerESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #2
  %.not = icmp eq i64 %3, 0
  br i1 %.not, label %._crit_edge25, label %.preheader20

.preheader20:                                     ; preds = %2, %._crit_edge23
  %4 = phi i64 [ %14, %._crit_edge23 ], [ 0, %2 ]
  %.024 = phi i32 [ %13, %._crit_edge23 ], [ 0, %2 ]
  %5 = tail call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN3net5LayerESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %4) #2
  %6 = getelementptr inbounds i8, ptr %5, i64 8
  %7 = tail call noundef i64 @_ZNKSt6vectorIN3net6NeuronESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %6) #2
  %.not26 = icmp eq i64 %7, 0
  br i1 %.not26, label %._crit_edge23, label %.preheader

.preheader:                                       ; preds = %.preheader20, %._crit_edge
  %8 = phi i64 [ %18, %._crit_edge ], [ 0, %.preheader20 ]
  %.01622 = phi i32 [ %17, %._crit_edge ], [ 0, %.preheader20 ]
  %9 = tail call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN3net5LayerESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %4) #2
  %10 = getelementptr inbounds i8, ptr %9, i64 8
  %11 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIN3net6NeuronESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %10, i64 noundef %8) #2
  %12 = tail call noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %11) #2
  %.not27 = icmp eq i64 %12, 0
  br i1 %.not27, label %._crit_edge, label %.lr.ph

._crit_edge23:                                    ; preds = %._crit_edge, %.preheader20
  %13 = add i32 %.024, 1
  %14 = zext i32 %13 to i64
  %15 = tail call noundef i64 @_ZNKSt6vectorIN3net5LayerESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #2
  %16 = icmp ugt i64 %15, %14
  br i1 %16, label %.preheader20, label %._crit_edge25, !llvm.loop !5

._crit_edge:                                      ; preds = %28, %.preheader
  %17 = add i32 %.01622, 1
  %18 = zext i32 %17 to i64
  %19 = tail call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN3net5LayerESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %4) #2
  %20 = getelementptr inbounds i8, ptr %19, i64 8
  %21 = tail call noundef i64 @_ZNKSt6vectorIN3net6NeuronESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %20) #2
  %22 = icmp ugt i64 %21, %18
  br i1 %22, label %.preheader, label %._crit_edge23, !llvm.loop !7

.lr.ph:                                           ; preds = %.preheader, %28
  %23 = phi i64 [ %30, %28 ], [ 0, %.preheader ]
  %.01521 = phi i32 [ %29, %28 ], [ 0, %.preheader ]
  %24 = tail call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN3net5LayerESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %4) #2
  %25 = getelementptr inbounds i8, ptr %24, i64 8
  %26 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIN3net6NeuronESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %25, i64 noundef %8) #2
  %27 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %26, i64 noundef %23) #2
  invoke void @_ZNSt6vectorIdSaIdEE9push_backERKd(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(8) %27)
          to label %28 unwind label %36

28:                                               ; preds = %.lr.ph
  %29 = add i32 %.01521, 1
  %30 = zext i32 %29 to i64
  %31 = tail call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN3net5LayerESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %4) #2
  %32 = getelementptr inbounds i8, ptr %31, i64 8
  %33 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIN3net6NeuronESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %32, i64 noundef %8) #2
  %34 = tail call noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %33) #2
  %35 = icmp ugt i64 %34, %30
  br i1 %35, label %.lr.ph, label %._crit_edge, !llvm.loop !8

36:                                               ; preds = %.lr.ph
  %37 = landingpad { ptr, i32 }
          cleanup
  tail call void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %0) #2
  resume { ptr, i32 } %37

._crit_edge25:                                    ; preds = %._crit_edge23, %2
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN3net6NeuronESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIN3net6NeuronESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEE9push_backERKd(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}
!8 = distinct !{!8, !6}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass