; LLVM IR from UtkarshPathrabe/Competitive-Coding :: SPOJ Solutions (FRND)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }

@_ZSt3cin = external global %"class.std::basic_istream", align 8
@_ZSt4cout = external global %"class.std::basic_ostream", align 8

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca [30 x i64], align 16
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i64, align 8
  %9 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #5
  call void @llvm.lifetime.start.p0(i64 240, ptr %5) #5
  call void @llvm.memset.p0.i64(ptr align 16 %5, i8 0, i64 240, i1 false)
  %10 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %2)
  %11 = load i32, ptr %2, align 4, !tbaa !5
  store i32 %11, ptr %4, align 4, !tbaa !5
  %12 = load i32, ptr %2, align 4, !tbaa !5
  %13 = icmp eq i32 %12, 1
  br i1 %13, label %14, label %18

14:                                               ; preds = %0
  %15 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %3)
  %16 = load i32, ptr %3, align 4, !tbaa !5
  %17 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i32 noundef %16)
  store i32 0, ptr %1, align 4
  store i32 1, ptr %6, align 4
  br label %76

18:                                               ; preds = %0
  br label %19

19:                                               ; preds = %45, %18
  %20 = load i32, ptr %4, align 4, !tbaa !5
  %21 = add nsw i32 %20, -1
  store i32 %21, ptr %4, align 4, !tbaa !5
  %22 = icmp ne i32 %20, 0
  br i1 %22, label %23, label %46

23:                                               ; preds = %19
  %24 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %3)
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  store i32 0, ptr %7, align 4, !tbaa !5
  br label %25

25:                                               ; preds = %42, %23
  %26 = load i32, ptr %7, align 4, !tbaa !5
  %27 = icmp slt i32 %26, 20
  br i1 %27, label %29, label %28

28:                                               ; preds = %25
  store i32 4, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  br label %45

29:                                               ; preds = %25
  %30 = load i32, ptr %3, align 4, !tbaa !5
  %31 = load i32, ptr %7, align 4, !tbaa !5
  %32 = ashr i32 %30, %31
  %33 = and i32 %32, 1
  %34 = icmp ne i32 %33, 0
  br i1 %34, label %35, label %41

35:                                               ; preds = %29
  %36 = load i32, ptr %7, align 4, !tbaa !5
  %37 = sext i32 %36 to i64
  %38 = getelementptr inbounds [30 x i64], ptr %5, i64 0, i64 %37
  %39 = load i64, ptr %38, align 8, !tbaa !9
  %40 = add nsw i64 %39, 1
  store i64 %40, ptr %38, align 8, !tbaa !9
  br label %41

41:                                               ; preds = %35, %29
  br label %42

42:                                               ; preds = %41
  %43 = load i32, ptr %7, align 4, !tbaa !5
  %44 = add nsw i32 %43, 1
  store i32 %44, ptr %7, align 4, !tbaa !5
  br label %25, !llvm.loop !11

45:                                               ; preds = %28
  br label %19, !llvm.loop !13

46:                                               ; preds = %19
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #5
  store i64 0, ptr %8, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #5
  store i32 0, ptr %9, align 4, !tbaa !5
  br label %47

47:                                               ; preds = %70, %46
  %48 = load i32, ptr %9, align 4, !tbaa !5
  %49 = icmp slt i32 %48, 20
  br i1 %49, label %51, label %50

50:                                               ; preds = %47
  store i32 7, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #5
  br label %73

51:                                               ; preds = %47
  %52 = load i32, ptr %9, align 4, !tbaa !5
  %53 = sext i32 %52 to i64
  %54 = getelementptr inbounds [30 x i64], ptr %5, i64 0, i64 %53
  %55 = load i64, ptr %54, align 8, !tbaa !9
  %56 = load i32, ptr %2, align 4, !tbaa !5
  %57 = sext i32 %56 to i64
  %58 = load i32, ptr %9, align 4, !tbaa !5
  %59 = sext i32 %58 to i64
  %60 = getelementptr inbounds [30 x i64], ptr %5, i64 0, i64 %59
  %61 = load i64, ptr %60, align 8, !tbaa !9
  %62 = sub nsw i64 %57, %61
  %63 = mul nsw i64 %55, %62
  %64 = load i32, ptr %9, align 4, !tbaa !5
  %65 = shl i32 1, %64
  %66 = sext i32 %65 to i64
  %67 = mul nsw i64 %63, %66
  %68 = load i64, ptr %8, align 8, !tbaa !9
  %69 = add nsw i64 %68, %67
  store i64 %69, ptr %8, align 8, !tbaa !9
  br label %70

70:                                               ; preds = %51
  %71 = load i32, ptr %9, align 4, !tbaa !5
  %72 = add nsw i32 %71, 1
  store i32 %72, ptr %9, align 4, !tbaa !5
  br label %47, !llvm.loop !14

73:                                               ; preds = %50
  %74 = load i64, ptr %8, align 8, !tbaa !9
  %75 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEx(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i64 noundef %74)
  store i32 0, ptr %1, align 4
  store i32 1, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #5
  br label %76

76:                                               ; preds = %73, %14
  call void @llvm.lifetime.end.p0(i64 240, ptr %5) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #5
  %77 = load i32, ptr %1, align 4
  ret i32 %77
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(4)) #3

declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8), i32 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEx(ptr noundef nonnull align 8 dereferenceable(8), i64 noundef) #4 align 2

attributes #0 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }

@_ZSt3cin = external global %"class.std::basic_istream", align 8
@_ZSt4cout = external global %"class.std::basic_ostream", align 8

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() local_unnamed_addr #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #4
  %3 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %1)
  %4 = load i32, ptr %1, align 4, !tbaa !5
  switch i32 %4, label %.lr.ph [
    i32 1, label %5
    i32 0, label %.preheader
  ]

5:                                                ; preds = %0
  %6 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %2)
  %7 = load i32, ptr %2, align 4, !tbaa !5
  %8 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i32 noundef %7)
  br label %152

.preheader.loopexit:                              ; preds = %.lr.ph
  %.pre = load i32, ptr %1, align 4, !tbaa !5
  %9 = sext i32 %.pre to i64
  br label %.preheader

.preheader:                                       ; preds = %0, %.preheader.loopexit
  %10 = phi i64 [ %9, %.preheader.loopexit ], [ 0, %0 ]
  %.sroa.0.0 = phi i64 [ %spec.select, %.preheader.loopexit ], [ 0, %0 ]
  %.sroa.6.0 = phi i64 [ %.sroa.6.2, %.preheader.loopexit ], [ 0, %0 ]
  %.sroa.9.0 = phi i64 [ %.sroa.9.2, %.preheader.loopexit ], [ 0, %0 ]
  %.sroa.12.0 = phi i64 [ %.sroa.12.2, %.preheader.loopexit ], [ 0, %0 ]
  %.sroa.15.0 = phi i64 [ %.sroa.15.2, %.preheader.loopexit ], [ 0, %0 ]
  %.sroa.18.0 = phi i64 [ %.sroa.18.2, %.preheader.loopexit ], [ 0, %0 ]
  %.sroa.21.0 = phi i64 [ %.sroa.21.2, %.preheader.loopexit ], [ 0, %0 ]
  %.sroa.24.0 = phi i64 [ %.sroa.24.2, %.preheader.loopexit ], [ 0, %0 ]
  %.sroa.27.0 = phi i64 [ %.sroa.27.2, %.preheader.loopexit ], [ 0, %0 ]
  %.sroa.30.0 = phi i64 [ %.sroa.30.2, %.preheader.loopexit ], [ 0, %0 ]
  %.sroa.33.0 = phi i64 [ %.sroa.33.2, %.preheader.loopexit ], [ 0, %0 ]
  %.sroa.36.0 = phi i64 [ %.sroa.36.2, %.preheader.loopexit ], [ 0, %0 ]
  %.sroa.39.0 = phi i64 [ %.sroa.39.2, %.preheader.loopexit ], [ 0, %0 ]
  %.sroa.42.0 = phi i64 [ %.sroa.42.2, %.preheader.loopexit ], [ 0, %0 ]
  %.sroa.45.0 = phi i64 [ %.sroa.45.2, %.preheader.loopexit ], [ 0, %0 ]
  %.sroa.48.0 = phi i64 [ %.sroa.48.2, %.preheader.loopexit ], [ 0, %0 ]
  %.sroa.51.0 = phi i64 [ %.sroa.51.2, %.preheader.loopexit ], [ 0, %0 ]
  %.sroa.54.0 = phi i64 [ %.sroa.54.2, %.preheader.loopexit ], [ 0, %0 ]
  %.sroa.57.0 = phi i64 [ %.sroa.57.2, %.preheader.loopexit ], [ 0, %0 ]
  %.sroa.60.0 = phi i64 [ %.sroa.60.2, %.preheader.loopexit ], [ 0, %0 ]
  %11 = sub nsw i64 %10, %.sroa.0.0
  %12 = mul nsw i64 %11, %.sroa.0.0
  %13 = sub nsw i64 %10, %.sroa.6.0
  %14 = mul nsw i64 %13, %.sroa.6.0
  %15 = shl i64 %14, 1
  %16 = add nsw i64 %15, %12
  %17 = sub nsw i64 %10, %.sroa.9.0
  %18 = mul nsw i64 %17, %.sroa.9.0
  %19 = shl i64 %18, 2
  %20 = add nsw i64 %19, %16
  %21 = sub nsw i64 %10, %.sroa.12.0
  %22 = mul nsw i64 %21, %.sroa.12.0
  %23 = shl i64 %22, 3
  %24 = add nsw i64 %23, %20
  %25 = sub nsw i64 %10, %.sroa.15.0
  %26 = mul nsw i64 %25, %.sroa.15.0
  %27 = shl i64 %26, 4
  %28 = add nsw i64 %27, %24
  %29 = sub nsw i64 %10, %.sroa.18.0
  %30 = mul nsw i64 %29, %.sroa.18.0
  %31 = shl i64 %30, 5
  %32 = add nsw i64 %31, %28
  %33 = sub nsw i64 %10, %.sroa.21.0
  %34 = mul nsw i64 %33, %.sroa.21.0
  %35 = shl i64 %34, 6
  %36 = add nsw i64 %35, %32
  %37 = sub nsw i64 %10, %.sroa.24.0
  %38 = mul nsw i64 %37, %.sroa.24.0
  %39 = shl i64 %38, 7
  %40 = add nsw i64 %39, %36
  %41 = sub nsw i64 %10, %.sroa.27.0
  %42 = mul nsw i64 %41, %.sroa.27.0
  %43 = shl i64 %42, 8
  %44 = add nsw i64 %43, %40
  %45 = sub nsw i64 %10, %.sroa.30.0
  %46 = mul nsw i64 %45, %.sroa.30.0
  %47 = shl i64 %46, 9
  %48 = add nsw i64 %47, %44
  %49 = sub nsw i64 %10, %.sroa.33.0
  %50 = mul nsw i64 %49, %.sroa.33.0
  %51 = shl i64 %50, 10
  %52 = add nsw i64 %51, %48
  %53 = sub nsw i64 %10, %.sroa.36.0
  %54 = mul nsw i64 %53, %.sroa.36.0
  %55 = shl i64 %54, 11
  %56 = add nsw i64 %55, %52
  %57 = sub nsw i64 %10, %.sroa.39.0
  %58 = mul nsw i64 %57, %.sroa.39.0
  %59 = shl i64 %58, 12
  %60 = add nsw i64 %59, %56
  %61 = sub nsw i64 %10, %.sroa.42.0
  %62 = mul nsw i64 %61, %.sroa.42.0
  %63 = shl i64 %62, 13
  %64 = add nsw i64 %63, %60
  %65 = sub nsw i64 %10, %.sroa.45.0
  %66 = mul nsw i64 %65, %.sroa.45.0
  %67 = shl i64 %66, 14
  %68 = add nsw i64 %67, %64
  %69 = sub nsw i64 %10, %.sroa.48.0
  %70 = mul nsw i64 %69, %.sroa.48.0
  %71 = shl i64 %70, 15
  %72 = add nsw i64 %71, %68
  %73 = sub nsw i64 %10, %.sroa.51.0
  %74 = mul nsw i64 %73, %.sroa.51.0
  %75 = shl i64 %74, 16
  %76 = add nsw i64 %75, %72
  %77 = sub nsw i64 %10, %.sroa.54.0
  %78 = mul nsw i64 %77, %.sroa.54.0
  %79 = shl i64 %78, 17
  %80 = add nsw i64 %79, %76
  %81 = sub nsw i64 %10, %.sroa.57.0
  %82 = mul nsw i64 %81, %.sroa.57.0
  %83 = shl i64 %82, 18
  %84 = add nsw i64 %83, %80
  %85 = sub nsw i64 %10, %.sroa.60.0
  %86 = mul nsw i64 %85, %.sroa.60.0
  %87 = shl i64 %86, 19
  %88 = add nsw i64 %87, %84
  %89 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEx(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i64 noundef %88)
  br label %152

.lr.ph:                                           ; preds = %0, %.lr.ph
  %.sroa.0.1 = phi i64 [ %spec.select, %.lr.ph ], [ 0, %0 ]
  %.sroa.6.1 = phi i64 [ %.sroa.6.2, %.lr.ph ], [ 0, %0 ]
  %.sroa.9.1 = phi i64 [ %.sroa.9.2, %.lr.ph ], [ 0, %0 ]
  %.sroa.12.1 = phi i64 [ %.sroa.12.2, %.lr.ph ], [ 0, %0 ]
  %.sroa.15.1 = phi i64 [ %.sroa.15.2, %.lr.ph ], [ 0, %0 ]
  %.sroa.18.1 = phi i64 [ %.sroa.18.2, %.lr.ph ], [ 0, %0 ]
  %.sroa.21.1 = phi i64 [ %.sroa.21.2, %.lr.ph ], [ 0, %0 ]
  %.sroa.24.1 = phi i64 [ %.sroa.24.2, %.lr.ph ], [ 0, %0 ]
  %.sroa.27.1 = phi i64 [ %.sroa.27.2, %.lr.ph ], [ 0, %0 ]
  %.sroa.30.1 = phi i64 [ %.sroa.30.2, %.lr.ph ], [ 0, %0 ]
  %.sroa.33.1 = phi i64 [ %.sroa.33.2, %.lr.ph ], [ 0, %0 ]
  %.sroa.36.1 = phi i64 [ %.sroa.36.2, %.lr.ph ], [ 0, %0 ]
  %.sroa.39.1 = phi i64 [ %.sroa.39.2, %.lr.ph ], [ 0, %0 ]
  %.sroa.42.1 = phi i64 [ %.sroa.42.2, %.lr.ph ], [ 0, %0 ]
  %.sroa.45.1 = phi i64 [ %.sroa.45.2, %.lr.ph ], [ 0, %0 ]
  %.sroa.48.1 = phi i64 [ %.sroa.48.2, %.lr.ph ], [ 0, %0 ]
  %.sroa.51.1 = phi i64 [ %.sroa.51.2, %.lr.ph ], [ 0, %0 ]
  %.sroa.54.1 = phi i64 [ %.sroa.54.2, %.lr.ph ], [ 0, %0 ]
  %.sroa.57.1 = phi i64 [ %.sroa.57.2, %.lr.ph ], [ 0, %0 ]
  %.sroa.60.1 = phi i64 [ %.sroa.60.2, %.lr.ph ], [ 0, %0 ]
  %.in = phi i32 [ %151, %.lr.ph ], [ %4, %0 ]
  %90 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %2)
  %91 = load i32, ptr %2, align 4, !tbaa !5
  %92 = and i32 %91, 1
  %93 = zext nneg i32 %92 to i64
  %spec.select = add i64 %.sroa.0.1, %93
  %94 = lshr i32 %91, 1
  %95 = and i32 %94, 1
  %96 = zext nneg i32 %95 to i64
  %.sroa.6.2 = add i64 %.sroa.6.1, %96
  %97 = lshr i32 %91, 2
  %98 = and i32 %97, 1
  %99 = zext nneg i32 %98 to i64
  %.sroa.9.2 = add i64 %.sroa.9.1, %99
  %100 = lshr i32 %91, 3
  %101 = and i32 %100, 1
  %102 = zext nneg i32 %101 to i64
  %.sroa.12.2 = add i64 %.sroa.12.1, %102
  %103 = lshr i32 %91, 4
  %104 = and i32 %103, 1
  %105 = zext nneg i32 %104 to i64
  %.sroa.15.2 = add i64 %.sroa.15.1, %105
  %106 = lshr i32 %91, 5
  %107 = and i32 %106, 1
  %108 = zext nneg i32 %107 to i64
  %.sroa.18.2 = add i64 %.sroa.18.1, %108
  %109 = lshr i32 %91, 6
  %110 = and i32 %109, 1
  %111 = zext nneg i32 %110 to i64
  %.sroa.21.2 = add i64 %.sroa.21.1, %111
  %112 = lshr i32 %91, 7
  %113 = and i32 %112, 1
  %114 = zext nneg i32 %113 to i64
  %.sroa.24.2 = add i64 %.sroa.24.1, %114
  %115 = lshr i32 %91, 8
  %116 = and i32 %115, 1
  %117 = zext nneg i32 %116 to i64
  %.sroa.27.2 = add i64 %.sroa.27.1, %117
  %118 = lshr i32 %91, 9
  %119 = and i32 %118, 1
  %120 = zext nneg i32 %119 to i64
  %.sroa.30.2 = add i64 %.sroa.30.1, %120
  %121 = lshr i32 %91, 10
  %122 = and i32 %121, 1
  %123 = zext nneg i32 %122 to i64
  %.sroa.33.2 = add i64 %.sroa.33.1, %123
  %124 = lshr i32 %91, 11
  %125 = and i32 %124, 1
  %126 = zext nneg i32 %125 to i64
  %.sroa.36.2 = add i64 %.sroa.36.1, %126
  %127 = lshr i32 %91, 12
  %128 = and i32 %127, 1
  %129 = zext nneg i32 %128 to i64
  %.sroa.39.2 = add i64 %.sroa.39.1, %129
  %130 = lshr i32 %91, 13
  %131 = and i32 %130, 1
  %132 = zext nneg i32 %131 to i64
  %.sroa.42.2 = add i64 %.sroa.42.1, %132
  %133 = lshr i32 %91, 14
  %134 = and i32 %133, 1
  %135 = zext nneg i32 %134 to i64
  %.sroa.45.2 = add i64 %.sroa.45.1, %135
  %136 = lshr i32 %91, 15
  %137 = and i32 %136, 1
  %138 = zext nneg i32 %137 to i64
  %.sroa.48.2 = add i64 %.sroa.48.1, %138
  %139 = lshr i32 %91, 16
  %140 = and i32 %139, 1
  %141 = zext nneg i32 %140 to i64
  %.sroa.51.2 = add i64 %.sroa.51.1, %141
  %142 = lshr i32 %91, 17
  %143 = and i32 %142, 1
  %144 = zext nneg i32 %143 to i64
  %.sroa.54.2 = add i64 %.sroa.54.1, %144
  %145 = lshr i32 %91, 18
  %146 = and i32 %145, 1
  %147 = zext nneg i32 %146 to i64
  %.sroa.57.2 = add i64 %.sroa.57.1, %147
  %148 = lshr i32 %91, 19
  %149 = and i32 %148, 1
  %150 = zext nneg i32 %149 to i64
  %.sroa.60.2 = add i64 %.sroa.60.1, %150
  %151 = add nsw i32 %.in, -1
  %.not = icmp eq i32 %151, 0
  br i1 %.not, label %.preheader.loopexit, label %.lr.ph, !llvm.loop !9

152:                                              ; preds = %.preheader, %5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #4
  ret i32 0
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8), i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEx(ptr noundef nonnull align 8 dereferenceable(8), i64 noundef) local_unnamed_addr #3 align 2

attributes #0 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass