; LLVM IR from VastoLorde95/Competitive-Programming :: CodeChef/SHORT/COOK70/Problem D/D.ll (Z19longestCommonSuffixiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@h2 = external dso_local global i64, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z7getHashii(i32 noundef, i32 noundef) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z19longestCommonSuffixiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #3 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  store i32 %0, ptr %5, align 4, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !5
  store i32 %3, ptr %8, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  store i32 0, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  %14 = load i32, ptr %5, align 4, !tbaa !5
  %15 = add nsw i32 %14, 2
  store i32 %15, ptr %11, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  %16 = load i32, ptr %8, align 4, !tbaa !5
  %17 = add nsw i32 %16, 1
  store i32 %17, ptr %12, align 4, !tbaa !5
  %18 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %11, ptr noundef nonnull align 4 dereferenceable(4) %12)
  %19 = load i32, ptr %18, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  store i32 %19, ptr %10, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  br label %20

20:                                               ; preds = %57, %4
  %21 = load i32, ptr %9, align 4, !tbaa !5
  %22 = add nsw i32 %21, 1
  %23 = load i32, ptr %10, align 4, !tbaa !5
  %24 = icmp slt i32 %22, %23
  br i1 %24, label %25, label %58

25:                                               ; preds = %20
  %26 = load i32, ptr %9, align 4, !tbaa !5
  %27 = load i32, ptr %10, align 4, !tbaa !5
  %28 = add nsw i32 %26, %27
  %29 = ashr i32 %28, 1
  store i32 %29, ptr %13, align 4, !tbaa !5
  %30 = load i32, ptr %6, align 4, !tbaa !5
  %31 = load i32, ptr %13, align 4, !tbaa !5
  %32 = sub nsw i32 %30, %31
  %33 = add nsw i32 %32, 1
  %34 = load i32, ptr %6, align 4, !tbaa !5
  %35 = call noundef i64 @_Z7getHashii(i32 noundef %33, i32 noundef %34)
  store i64 %35, ptr @h2, align 8, !tbaa !9
  %36 = load i32, ptr %5, align 4, !tbaa !5
  %37 = load i32, ptr %13, align 4, !tbaa !5
  %38 = sub nsw i32 %36, %37
  %39 = add nsw i32 %38, 1
  %40 = load i32, ptr %5, align 4, !tbaa !5
  %41 = call noundef i64 @_Z7getHashii(i32 noundef %39, i32 noundef %40)
  %42 = load i64, ptr @h2, align 8, !tbaa !9
  %43 = icmp eq i64 %41, %42
  br i1 %43, label %44, label %55

44:                                               ; preds = %25
  %45 = load i64, ptr @h2, align 8, !tbaa !9
  %46 = load i32, ptr %7, align 4, !tbaa !5
  %47 = load i32, ptr %13, align 4, !tbaa !5
  %48 = sub nsw i32 %46, %47
  %49 = add nsw i32 %48, 1
  %50 = load i32, ptr %7, align 4, !tbaa !5
  %51 = call noundef i64 @_Z7getHashii(i32 noundef %49, i32 noundef %50)
  %52 = icmp eq i64 %45, %51
  br i1 %52, label %53, label %55

53:                                               ; preds = %44
  %54 = load i32, ptr %13, align 4, !tbaa !5
  store i32 %54, ptr %9, align 4, !tbaa !5
  br label %57

55:                                               ; preds = %44, %25
  %56 = load i32, ptr %13, align 4, !tbaa !5
  store i32 %56, ptr %10, align 4, !tbaa !5
  br label %57

57:                                               ; preds = %55, %53
  br label %20, !llvm.loop !11

58:                                               ; preds = %20
  %59 = load i32, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  ret i32 %59
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@h2 = external dso_local local_unnamed_addr global i64, align 8

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z7getHashii(i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef range(i32 0, 1073741824) i32 @_Z19longestCommonSuffixiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #1 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
  %7 = add nsw i32 %0, 2
  store i32 %7, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
  %8 = add nsw i32 %3, 1
  store i32 %8, ptr %6, align 4, !tbaa !5
  %9 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %5, ptr noundef nonnull align 4 dereferenceable(4) %6)
  %10 = load i32, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
  %11 = icmp sgt i32 %10, 1
  br i1 %11, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %4
  %12 = add i32 %1, 1
  %13 = add i32 %0, 1
  %14 = add i32 %2, 1
  br label %15

15:                                               ; preds = %.lr.ph, %29
  %.022 = phi i32 [ 0, %.lr.ph ], [ %.1, %29 ]
  %.01821 = phi i32 [ %10, %.lr.ph ], [ %.119, %29 ]
  %16 = add nuw nsw i32 %.022, %.01821
  %17 = lshr i32 %16, 1
  %18 = sub i32 %12, %17
  %19 = call noundef i64 @_Z7getHashii(i32 noundef %18, i32 noundef %1)
  store i64 %19, ptr @h2, align 8, !tbaa !9
  %20 = sub i32 %13, %17
  %21 = call noundef i64 @_Z7getHashii(i32 noundef %20, i32 noundef %0)
  %22 = load i64, ptr @h2, align 8, !tbaa !9
  %23 = icmp eq i64 %21, %22
  br i1 %23, label %24, label %28

24:                                               ; preds = %15
  %25 = sub i32 %14, %17
  %26 = call noundef i64 @_Z7getHashii(i32 noundef %25, i32 noundef %2)
  %27 = icmp eq i64 %21, %26
  br i1 %27, label %29, label %28

28:                                               ; preds = %24, %15
  br label %29

29:                                               ; preds = %24, %28
  %.119 = phi i32 [ %17, %28 ], [ %.01821, %24 ]
  %.1 = phi i32 [ %.022, %28 ], [ %17, %24 ]
  %30 = add nuw nsw i32 %.1, 1
  %31 = icmp slt i32 %30, %.119
  br i1 %31, label %15, label %._crit_edge, !llvm.loop !11

._crit_edge:                                      ; preds = %29, %4
  %.0.lcssa = phi i32 [ 0, %4 ], [ %.1, %29 ]
  ret i32 %.0.lcssa
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass