; LLVM IR from sgtlaugh/algovault :: code_library/convex_hull.ll (Z9is_convexSt6vectorI5PointSaIS0_EE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z5crossRK5PointS1_S1_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16)) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI5PointSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI5PointSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z9is_convexSt6vectorI5PointSaIS0_EE(ptr noundef %0) #2 {
  %2 = alloca i1, align 1
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i8, align 1
  %7 = alloca i32, align 4
  %8 = alloca i8, align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  %9 = call noundef i64 @_ZNKSt6vectorI5PointSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #3
  %10 = trunc i64 %9 to i32
  store i32 %10, ptr %4, align 4, !tbaa !9
  %11 = load i32, ptr %4, align 4, !tbaa !9
  %12 = icmp sle i32 %11, 2
  br i1 %12, label %13, label %14

13:                                               ; preds = %1
  store i1 false, ptr %2, align 1
  store i32 1, ptr %5, align 4
  br label %74

14:                                               ; preds = %1
  %15 = load i32, ptr %4, align 4, !tbaa !9
  %16 = add nsw i32 %15, 1
  store i32 %16, ptr %4, align 4, !tbaa !9
  %17 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI5PointSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #3
  call void @_ZNSt6vectorI5PointSaIS0_EE9push_backERKS0_(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(16) %17)
  call void @llvm.lifetime.start.p0(i64 1, ptr %6) #3
  %18 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI5PointSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #3
  %19 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI5PointSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 1) #3
  %20 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI5PointSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 2) #3
  %21 = call noundef i64 @_Z5crossRK5PointS1_S1_(ptr noundef nonnull align 8 dereferenceable(16) %18, ptr noundef nonnull align 8 dereferenceable(16) %19, ptr noundef nonnull align 8 dereferenceable(16) %20)
  %22 = icmp sgt i64 %21, 0
  %23 = zext i1 %22 to i8
  store i8 %23, ptr %6, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  store i32 1, ptr %7, align 4, !tbaa !9
  br label %24

24:                                               ; preds = %67, %14
  %25 = load i32, ptr %7, align 4, !tbaa !9
  %26 = add nsw i32 %25, 1
  %27 = load i32, ptr %4, align 4, !tbaa !9
  %28 = icmp slt i32 %26, %27
  br i1 %28, label %30, label %29

29:                                               ; preds = %24
  store i32 2, ptr %5, align 4
  br label %70

30:                                               ; preds = %24
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #3
  %31 = load i32, ptr %7, align 4, !tbaa !9
  %32 = sext i32 %31 to i64
  %33 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI5PointSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %32) #3
  %34 = load i32, ptr %7, align 4, !tbaa !9
  %35 = add nsw i32 %34, 1
  %36 = sext i32 %35 to i64
  %37 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI5PointSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %36) #3
  %38 = load i32, ptr %7, align 4, !tbaa !9
  %39 = add nsw i32 %38, 2
  %40 = load i32, ptr %4, align 4, !tbaa !9
  %41 = icmp eq i32 %39, %40
  br i1 %41, label %42, label %44

42:                                               ; preds = %30
  %43 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI5PointSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 1) #3
  br label %49

44:                                               ; preds = %30
  %45 = load i32, ptr %7, align 4, !tbaa !9
  %46 = add nsw i32 %45, 2
  %47 = sext i32 %46 to i64
  %48 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI5PointSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %47) #3
  br label %49

49:                                               ; preds = %44, %42
  %50 = phi ptr [ %43, %42 ], [ %48, %44 ]
  %51 = call noundef i64 @_Z5crossRK5PointS1_S1_(ptr noundef nonnull align 8 dereferenceable(16) %33, ptr noundef nonnull align 8 dereferenceable(16) %37, ptr noundef nonnull align 8 dereferenceable(16) %50)
  %52 = icmp sgt i64 %51, 0
  %53 = zext i1 %52 to i8
  store i8 %53, ptr %8, align 1, !tbaa !11
  %54 = load i8, ptr %6, align 1, !tbaa !11, !range !13, !noundef !14
  %55 = trunc i8 %54 to i1
  %56 = zext i1 %55 to i32
  %57 = load i8, ptr %8, align 1, !tbaa !11, !range !13, !noundef !14
  %58 = trunc i8 %57 to i1
  %59 = zext i1 %58 to i32
  %60 = xor i32 %56, %59
  %61 = icmp ne i32 %60, 0
  br i1 %61, label %62, label %63

62:                                               ; preds = %49
  store i1 false, ptr %2, align 1
  store i32 1, ptr %5, align 4
  br label %64

63:                                               ; preds = %49
  store i32 0, ptr %5, align 4
  br label %64

64:                                               ; preds = %63, %62
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #3
  %65 = load i32, ptr %5, align 4
  switch i32 %65, label %70 [
    i32 0, label %66
  ]

66:                                               ; preds = %64
  br label %67

67:                                               ; preds = %66
  %68 = load i32, ptr %7, align 4, !tbaa !9
  %69 = add nsw i32 %68, 1
  store i32 %69, ptr %7, align 4, !tbaa !9
  br label %24, !llvm.loop !15

70:                                               ; preds = %64, %29
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  %71 = load i32, ptr %5, align 4
  switch i32 %71, label %73 [
    i32 2, label %72
  ]

72:                                               ; preds = %70
  store i1 true, ptr %2, align 1
  store i32 1, ptr %5, align 4
  br label %73

73:                                               ; preds = %72, %70
  call void @llvm.lifetime.end.p0(i64 1, ptr %6) #3
  br label %74

74:                                               ; preds = %73, %13
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  %75 = load i1, ptr %2, align 1
  ret i1 %75
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorI5PointSaIS0_EE9push_backERKS0_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(16)) #2 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{i8 0, i8 2}
!14 = !{}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z5crossRK5PointS1_S1_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI5PointSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI5PointSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z9is_convexSt6vectorI5PointSaIS0_EE(ptr noundef nonnull %0) local_unnamed_addr #1 {
  %2 = tail call noundef i64 @_ZNKSt6vectorI5PointSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #2
  %3 = trunc i64 %2 to i32
  %4 = icmp slt i32 %3, 3
  br i1 %4, label %.critedge, label %5

5:                                                ; preds = %1
  %6 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI5PointSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #2
  tail call void @_ZNSt6vectorI5PointSaIS0_EE9push_backERKS0_(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(16) %6)
  %7 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI5PointSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #2
  %8 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI5PointSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 1) #2
  %9 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI5PointSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 2) #2
  %10 = tail call noundef i64 @_Z5crossRK5PointS1_S1_(ptr noundef nonnull align 8 dereferenceable(16) %7, ptr noundef nonnull align 8 dereferenceable(16) %8, ptr noundef nonnull align 8 dereferenceable(16) %9)
  %11 = icmp sgt i64 %10, 0
  %12 = and i64 %2, 2147483647
  br label %13

13:                                               ; preds = %14, %5
  %indvars.iv = phi i64 [ %indvars.iv.next, %14 ], [ 1, %5 ]
  %exitcond.not = icmp eq i64 %indvars.iv, %12
  br i1 %exitcond.not, label %.critedge, label %14

14:                                               ; preds = %13
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %15 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI5PointSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #2
  %16 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI5PointSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv.next) #2
  %17 = icmp eq i64 %indvars.iv.next, %12
  %18 = add nuw nsw i64 %indvars.iv, 2
  %.sink = select i1 %17, i64 1, i64 %18
  %19 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorI5PointSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %.sink) #2
  %20 = tail call noundef i64 @_Z5crossRK5PointS1_S1_(ptr noundef nonnull align 8 dereferenceable(16) %15, ptr noundef nonnull align 8 dereferenceable(16) %16, ptr noundef nonnull align 8 dereferenceable(16) %19)
  %21 = icmp sgt i64 %20, 0
  %22 = xor i1 %11, %21
  br i1 %22, label %.critedge, label %13, !llvm.loop !5

.critedge:                                        ; preds = %13, %14, %1
  %.4 = phi i1 [ false, %1 ], [ %exitcond.not, %14 ], [ %exitcond.not, %13 ]
  ret i1 %.4
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorI5PointSaIS0_EE9push_backERKS0_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass