; LLVM IR from mianzhi/fosolvers :: src/libfosolvers/otGrid (otree)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @nBinDigits(i64 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local void @getPos(i64 noundef %0, ptr noundef %1) #1 {
  %3 = alloca i64, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca double, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store i64 %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  %11 = load i64, ptr %3, align 8, !tbaa !5
  %12 = call i32 @nBinDigits(i64 noundef %11)
  store i32 %12, ptr %5, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  store double 2.500000e-01, ptr %6, align 8, !tbaa !13
  %13 = load ptr, ptr %4, align 8, !tbaa !9
  %14 = getelementptr inbounds double, ptr %13, i64 2
  store double 5.000000e-01, ptr %14, align 8, !tbaa !13
  %15 = load ptr, ptr %4, align 8, !tbaa !9
  %16 = getelementptr inbounds double, ptr %15, i64 1
  store double 5.000000e-01, ptr %16, align 8, !tbaa !13
  %17 = load ptr, ptr %4, align 8, !tbaa !9
  %18 = getelementptr inbounds double, ptr %17, i64 0
  store double 5.000000e-01, ptr %18, align 8, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %19 = load i32, ptr %5, align 4, !tbaa !11
  %20 = sub nsw i32 %19, 6
  store i32 %20, ptr %7, align 4, !tbaa !11
  br label %21

21:                                               ; preds = %58, %2
  %22 = load i32, ptr %7, align 4, !tbaa !11
  %23 = icmp sge i32 %22, 0
  br i1 %23, label %25, label %24

24:                                               ; preds = %21
  store i32 2, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  br label %61

25:                                               ; preds = %21
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  store i32 0, ptr %9, align 4, !tbaa !11
  br label %26

26:                                               ; preds = %52, %25
  %27 = load i32, ptr %9, align 4, !tbaa !11
  %28 = icmp slt i32 %27, 3
  br i1 %28, label %30, label %29

29:                                               ; preds = %26
  store i32 5, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  br label %55

30:                                               ; preds = %26
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  %31 = load i32, ptr %7, align 4, !tbaa !11
  %32 = load i32, ptr %9, align 4, !tbaa !11
  %33 = add nsw i32 %31, %32
  store i32 %33, ptr %10, align 4, !tbaa !11
  %34 = load double, ptr %6, align 8, !tbaa !13
  %35 = load i64, ptr %3, align 8, !tbaa !5
  %36 = load i32, ptr %10, align 4, !tbaa !11
  %37 = shl i32 1, %36
  %38 = sext i32 %37 to i64
  %39 = and i64 %35, %38
  %40 = load i32, ptr %10, align 4, !tbaa !11
  %41 = zext i32 %40 to i64
  %42 = ashr i64 %39, %41
  %43 = mul nsw i64 2, %42
  %44 = sub nsw i64 %43, 1
  %45 = sitofp i64 %44 to double
  %46 = load ptr, ptr %4, align 8, !tbaa !9
  %47 = load i32, ptr %9, align 4, !tbaa !11
  %48 = sext i32 %47 to i64
  %49 = getelementptr inbounds double, ptr %46, i64 %48
  %50 = load double, ptr %49, align 8, !tbaa !13
  %51 = call double @llvm.fmuladd.f64(double %34, double %45, double %50)
  store double %51, ptr %49, align 8, !tbaa !13
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  br label %52

52:                                               ; preds = %30
  %53 = load i32, ptr %9, align 4, !tbaa !11
  %54 = add nsw i32 %53, 1
  store i32 %54, ptr %9, align 4, !tbaa !11
  br label %26, !llvm.loop !15

55:                                               ; preds = %29
  %56 = load double, ptr %6, align 8, !tbaa !13
  %57 = fmul double %56, 5.000000e-01
  store double %57, ptr %6, align 8, !tbaa !13
  br label %58

58:                                               ; preds = %55
  %59 = load i32, ptr %7, align 4, !tbaa !11
  %60 = sub nsw i32 %59, 3
  store i32 %60, ptr %7, align 4, !tbaa !11
  br label %21, !llvm.loop !17

61:                                               ; preds = %24
  store i32 1, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"double", !7, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = distinct !{!17, !16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local i32 @nBinDigits(i64 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @getPos(i64 noundef %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #0 {
  %3 = tail call i32 @nBinDigits(i64 noundef %0)
  %4 = getelementptr inbounds i8, ptr %1, i64 16
  store double 5.000000e-01, ptr %4, align 8, !tbaa !5
  %5 = getelementptr inbounds i8, ptr %1, i64 8
  store <2 x double> <double 5.000000e-01, double 5.000000e-01>, ptr %1, align 8, !tbaa !5
  %6 = icmp sgt i32 %3, 5
  br i1 %6, label %.preheader.preheader, label %._crit_edge

.preheader.preheader:                             ; preds = %2
  %7 = add nsw i32 %3, -6
  %8 = zext nneg i32 %7 to i64
  br label %.preheader

.preheader:                                       ; preds = %.preheader.preheader, %.preheader
  %9 = phi double [ 5.000000e-01, %.preheader.preheader ], [ %40, %.preheader ]
  %10 = phi double [ 5.000000e-01, %.preheader.preheader ], [ %30, %.preheader ]
  %11 = phi double [ 5.000000e-01, %.preheader.preheader ], [ %20, %.preheader ]
  %indvars.iv = phi i64 [ %8, %.preheader.preheader ], [ %indvars.iv.next, %.preheader ]
  %.021 = phi double [ 2.500000e-01, %.preheader.preheader ], [ %41, %.preheader ]
  %12 = trunc nuw nsw i64 %indvars.iv to i32
  %13 = shl nuw i32 1, %12
  %14 = sext i32 %13 to i64
  %15 = and i64 %14, %0
  %16 = ashr i64 %15, %indvars.iv
  %17 = shl nsw i64 %16, 1
  %18 = add nsw i64 %17, -1
  %19 = sitofp i64 %18 to double
  %20 = tail call double @llvm.fmuladd.f64(double %.021, double %19, double %11)
  %21 = add nuw nsw i64 %indvars.iv, 1
  %22 = trunc nuw i64 %21 to i32
  %23 = shl nuw i32 1, %22
  %24 = sext i32 %23 to i64
  %25 = and i64 %24, %0
  %26 = ashr i64 %25, %21
  %27 = shl nsw i64 %26, 1
  %28 = add nsw i64 %27, -1
  %29 = sitofp i64 %28 to double
  %30 = tail call double @llvm.fmuladd.f64(double %.021, double %29, double %10)
  %31 = add nuw nsw i64 %indvars.iv, 2
  %32 = trunc nuw i64 %31 to i32
  %33 = shl nuw i32 1, %32
  %34 = sext i32 %33 to i64
  %35 = and i64 %34, %0
  %36 = ashr i64 %35, %31
  %37 = shl nsw i64 %36, 1
  %38 = add nsw i64 %37, -1
  %39 = sitofp i64 %38 to double
  %40 = tail call double @llvm.fmuladd.f64(double %.021, double %39, double %9)
  %41 = fmul double %.021, 5.000000e-01
  %indvars.iv.next = add nsw i64 %indvars.iv, -3
  %42 = icmp ugt i64 %indvars.iv, 2
  br i1 %42, label %.preheader, label %._crit_edge.loopexit, !llvm.loop !9

._crit_edge.loopexit:                             ; preds = %.preheader
  store double %20, ptr %1, align 8, !tbaa !5
  store double %30, ptr %5, align 8, !tbaa !5
  store double %40, ptr %4, align 8, !tbaa !5
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %2
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass