; LLVM IR from IOsonata/IOsonata :: ARM/Nordic/nRF52/nRF52840/exemples/BoschAppBoard/src (bmi3)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_get_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_set_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) #2

; Function Attrs: nounwind uwtable
define dso_local signext i8 @bmi3_set_fifo_config(i16 noundef zeroext %0, i8 noundef zeroext %1, ptr noundef %2) #2 {
  %4 = alloca i16, align 2
  %5 = alloca i8, align 1
  %6 = alloca ptr, align 8
  %7 = alloca i8, align 1
  %8 = alloca [2 x i8], align 1
  %9 = alloca i16, align 2
  store i16 %0, ptr %4, align 2, !tbaa !5
  store i8 %1, ptr %5, align 1, !tbaa !9
  store ptr %2, ptr %6, align 8, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 2, ptr %8) #3
  call void @llvm.memset.p0.i64(ptr align 1 %8, i8 0, i64 2, i1 false)
  call void @llvm.lifetime.start.p0(i64 2, ptr %9) #3
  %10 = load i16, ptr %4, align 2, !tbaa !5
  %11 = zext i16 %10 to i32
  %12 = and i32 %11, 3841
  %13 = trunc i32 %12 to i16
  store i16 %13, ptr %9, align 2, !tbaa !5
  %14 = getelementptr inbounds [2 x i8], ptr %8, i64 0, i64 0
  %15 = load ptr, ptr %6, align 8, !tbaa !10
  %16 = call signext i8 @bmi3_get_regs(i8 noundef zeroext 54, ptr noundef %14, i16 noundef zeroext 2, ptr noundef %15)
  store i8 %16, ptr %7, align 1, !tbaa !9
  %17 = load i8, ptr %7, align 1, !tbaa !9
  %18 = sext i8 %17 to i32
  %19 = icmp eq i32 %18, 0
  br i1 %19, label %20, label %69

20:                                               ; preds = %3
  %21 = load i8, ptr %5, align 1, !tbaa !9
  %22 = zext i8 %21 to i32
  %23 = icmp eq i32 %22, 1
  br i1 %23, label %24, label %45

24:                                               ; preds = %20
  %25 = getelementptr inbounds [2 x i8], ptr %8, i64 0, i64 0
  %26 = load i8, ptr %25, align 1, !tbaa !9
  %27 = zext i8 %26 to i32
  %28 = load i16, ptr %9, align 2, !tbaa !5
  %29 = trunc i16 %28 to i8
  %30 = zext i8 %29 to i32
  %31 = or i32 %27, %30
  %32 = trunc i32 %31 to i8
  %33 = getelementptr inbounds [2 x i8], ptr %8, i64 0, i64 0
  store i8 %32, ptr %33, align 1, !tbaa !9
  %34 = getelementptr inbounds [2 x i8], ptr %8, i64 0, i64 1
  %35 = load i8, ptr %34, align 1, !tbaa !9
  %36 = zext i8 %35 to i32
  %37 = load i16, ptr %9, align 2, !tbaa !5
  %38 = zext i16 %37 to i32
  %39 = ashr i32 %38, 8
  %40 = trunc i32 %39 to i8
  %41 = zext i8 %40 to i32
  %42 = or i32 %36, %41
  %43 = trunc i32 %42 to i8
  %44 = getelementptr inbounds [2 x i8], ptr %8, i64 0, i64 1
  store i8 %43, ptr %44, align 1, !tbaa !9
  br label %65

45:                                               ; preds = %20
  %46 = getelementptr inbounds [2 x i8], ptr %8, i64 0, i64 0
  %47 = load i8, ptr %46, align 1, !tbaa !9
  %48 = zext i8 %47 to i32
  %49 = load i16, ptr %9, align 2, !tbaa !5
  %50 = zext i16 %49 to i32
  %51 = xor i32 %50, -1
  %52 = and i32 %48, %51
  %53 = trunc i32 %52 to i8
  %54 = getelementptr inbounds [2 x i8], ptr %8, i64 0, i64 0
  store i8 %53, ptr %54, align 1, !tbaa !9
  %55 = getelementptr inbounds [2 x i8], ptr %8, i64 0, i64 1
  %56 = load i8, ptr %55, align 1, !tbaa !9
  %57 = zext i8 %56 to i32
  %58 = load i16, ptr %9, align 2, !tbaa !5
  %59 = zext i16 %58 to i32
  %60 = ashr i32 %59, 8
  %61 = xor i32 %60, -1
  %62 = and i32 %57, %61
  %63 = trunc i32 %62 to i8
  %64 = getelementptr inbounds [2 x i8], ptr %8, i64 0, i64 1
  store i8 %63, ptr %64, align 1, !tbaa !9
  br label %65

65:                                               ; preds = %45, %24
  %66 = getelementptr inbounds [2 x i8], ptr %8, i64 0, i64 0
  %67 = load ptr, ptr %6, align 8, !tbaa !10
  %68 = call signext i8 @bmi3_set_regs(i8 noundef zeroext 54, ptr noundef %66, i16 noundef zeroext 2, ptr noundef %67)
  store i8 %68, ptr %7, align 1, !tbaa !9
  br label %69

69:                                               ; preds = %65, %3
  %70 = load i8, ptr %7, align 1, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 2, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #3
  ret i8 %70
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"short", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_get_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_set_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local signext i8 @bmi3_set_fifo_config(i16 noundef zeroext %0, i8 noundef zeroext %1, ptr noundef %2) local_unnamed_addr #1 {
  %4 = alloca [2 x i8], align 2
  call void @llvm.lifetime.start.p0(i64 2, ptr nonnull %4) #2
  store i16 0, ptr %4, align 2
  %5 = and i16 %0, 3841
  %6 = call signext i8 @bmi3_get_regs(i8 noundef zeroext 54, ptr noundef nonnull %4, i16 noundef zeroext 2, ptr noundef %2)
  %7 = icmp eq i8 %6, 0
  br i1 %7, label %8, label %29

8:                                                ; preds = %3
  %9 = icmp eq i8 %1, 1
  %10 = load i8, ptr %4, align 2, !tbaa !5
  %11 = getelementptr inbounds i8, ptr %4, i64 1
  %12 = lshr i16 %5, 8
  %13 = trunc nuw nsw i16 %12 to i8
  br i1 %9, label %14, label %20

14:                                               ; preds = %8
  %15 = trunc i16 %0 to i8
  %16 = and i8 %15, 1
  %17 = or i8 %10, %16
  store i8 %17, ptr %4, align 2, !tbaa !5
  %18 = load i8, ptr %11, align 1, !tbaa !5
  %19 = or i8 %18, %13
  br label %27

20:                                               ; preds = %8
  %21 = trunc i16 %5 to i8
  %22 = xor i8 %21, -1
  %23 = and i8 %10, %22
  store i8 %23, ptr %4, align 2, !tbaa !5
  %24 = load i8, ptr %11, align 1, !tbaa !5
  %25 = xor i8 %13, -1
  %26 = and i8 %24, %25
  br label %27

27:                                               ; preds = %20, %14
  %.sink = phi i8 [ %26, %20 ], [ %19, %14 ]
  store i8 %.sink, ptr %11, align 1, !tbaa !5
  %28 = call signext i8 @bmi3_set_regs(i8 noundef zeroext 54, ptr noundef nonnull %4, i16 noundef zeroext 2, ptr noundef %2)
  br label %29

29:                                               ; preds = %27, %3
  %.0 = phi i8 [ %28, %27 ], [ %6, %3 ]
  call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %4) #2
  ret i8 %.0
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass