; LLVM IR from IOsonata/IOsonata :: ARM/NXP/src (spi_lpcxx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__device_intrf = type <{ ptr, i32, ptr, %struct.atomic_flag, [3 x i8], i32, i32, i32, i8, i8, i8, i8, i64, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr }>
%struct.atomic_flag = type { i8 }
%struct.SSPDEV = type { i32, i32, ptr, ptr }
%struct.LPCSSPREG = type { i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @LpcSSPRxData(ptr noundef %0, ptr noundef %1, i32 noundef %2) #1 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i8, align 1
  %10 = alloca i16, align 2
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #2
  %11 = load ptr, ptr %4, align 8, !tbaa !5
  %12 = getelementptr inbounds %struct.__device_intrf, ptr %11, i32 0, i32 0
  %13 = load ptr, ptr %12, align 4, !tbaa !11
  store ptr %13, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  store i32 0, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #2
  store i8 1, ptr %9, align 1, !tbaa !16
  call void @llvm.lifetime.start.p0(i64 2, ptr %10) #2
  store i16 255, ptr %10, align 2, !tbaa !17
  %14 = load ptr, ptr %7, align 8, !tbaa !5
  %15 = getelementptr inbounds %struct.SSPDEV, ptr %14, i32 0, i32 2
  %16 = load ptr, ptr %15, align 8, !tbaa !19
  %17 = getelementptr inbounds %struct.LPCSSPREG, ptr %16, i32 0, i32 0
  %18 = load volatile i32, ptr %17, align 4, !tbaa !21
  %19 = and i32 %18, 8
  %20 = icmp ne i32 %19, 0
  br i1 %20, label %21, label %22

21:                                               ; preds = %3
  store i8 0, ptr %9, align 1, !tbaa !16
  store i16 -1, ptr %10, align 2, !tbaa !17
  br label %22

22:                                               ; preds = %21, %3
  br label %23

23:                                               ; preds = %78, %22
  %24 = load i32, ptr %6, align 4, !tbaa !9
  %25 = load i32, ptr %8, align 4, !tbaa !9
  %26 = icmp sgt i32 %24, %25
  br i1 %26, label %27, label %79

27:                                               ; preds = %23
  %28 = load i16, ptr %10, align 2, !tbaa !17
  %29 = zext i16 %28 to i32
  %30 = load ptr, ptr %7, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.SSPDEV, ptr %30, i32 0, i32 2
  %32 = load ptr, ptr %31, align 8, !tbaa !19
  %33 = getelementptr inbounds %struct.LPCSSPREG, ptr %32, i32 0, i32 2
  store volatile i32 %29, ptr %33, align 4, !tbaa !23
  %34 = load ptr, ptr %7, align 8, !tbaa !5
  %35 = call zeroext i1 @LpcSSPWaitRxFifo(ptr noundef %34, i32 noundef 100000)
  br i1 %35, label %36, label %78

36:                                               ; preds = %27
  %37 = load i8, ptr %9, align 1, !tbaa !16, !range !24, !noundef !25
  %38 = trunc i8 %37 to i1
  br i1 %38, label %39, label %52

39:                                               ; preds = %36
  %40 = load ptr, ptr %7, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.SSPDEV, ptr %40, i32 0, i32 2
  %42 = load ptr, ptr %41, align 8, !tbaa !19
  %43 = getelementptr inbounds %struct.LPCSSPREG, ptr %42, i32 0, i32 2
  %44 = load volatile i32, ptr %43, align 4, !tbaa !23
  %45 = and i32 %44, 255
  %46 = trunc i32 %45 to i8
  %47 = load ptr, ptr %5, align 8, !tbaa !5
  store i8 %46, ptr %47, align 1, !tbaa !26
  %48 = load ptr, ptr %5, align 8, !tbaa !5
  %49 = getelementptr inbounds i8, ptr %48, i32 1
  store ptr %49, ptr %5, align 8, !tbaa !5
  %50 = load i32, ptr %8, align 4, !tbaa !9
  %51 = add nsw i32 %50, 1
  store i32 %51, ptr %8, align 4, !tbaa !9
  br label %77

52:                                               ; preds = %36
  %53 = load ptr, ptr %7, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.SSPDEV, ptr %53, i32 0, i32 2
  %55 = load ptr, ptr %54, align 8, !tbaa !19
  %56 = getelementptr inbounds %struct.LPCSSPREG, ptr %55, i32 0, i32 2
  %57 = load volatile i32, ptr %56, align 4, !tbaa !23
  %58 = and i32 %57, 65535
  %59 = trunc i32 %58 to i16
  store i16 %59, ptr %10, align 2, !tbaa !17
  %60 = load i16, ptr %10, align 2, !tbaa !17
  %61 = zext i16 %60 to i32
  %62 = and i32 %61, 255
  %63 = trunc i32 %62 to i8
  %64 = load ptr, ptr %5, align 8, !tbaa !5
  %65 = getelementptr inbounds i8, ptr %64, i64 0
  store i8 %63, ptr %65, align 1, !tbaa !26
  %66 = load i16, ptr %10, align 2, !tbaa !17
  %67 = zext i16 %66 to i32
  %68 = ashr i32 %67, 8
  %69 = and i32 %68, 255
  %70 = trunc i32 %69 to i8
  %71 = load ptr, ptr %5, align 8, !tbaa !5
  %72 = getelementptr inbounds i8, ptr %71, i64 1
  store i8 %70, ptr %72, align 1, !tbaa !26
  %73 = load i32, ptr %8, align 4, !tbaa !9
  %74 = add nsw i32 %73, 2
  store i32 %74, ptr %8, align 4, !tbaa !9
  %75 = load ptr, ptr %5, align 8, !tbaa !5
  %76 = getelementptr inbounds i8, ptr %75, i64 2
  store ptr %76, ptr %5, align 8, !tbaa !5
  br label %77

77:                                               ; preds = %52, %39
  br label %78

78:                                               ; preds = %77, %27
  br label %23, !llvm.loop !27

79:                                               ; preds = %23
  %80 = load i32, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 2, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #2
  ret i32 %80
}

; Function Attrs: nounwind uwtable
declare dso_local zeroext i1 @LpcSSPWaitRxFifo(ptr noundef, i32 noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"__device_intrf", !6, i64 0, !10, i64 8, !6, i64 12, !13, i64 20, !10, i64 24, !7, i64 28, !10, i64 32, !14, i64 36, !14, i64 37, !7, i64 38, !7, i64 39, !15, i64 40, !6, i64 48, !6, i64 56, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !6, i64 120, !6, i64 128, !6, i64 136, !6, i64 144, !6, i64 152}
!13 = !{!"atomic_flag", !7, i64 0}
!14 = !{!"_Bool", !7, i64 0}
!15 = !{!"long", !7, i64 0}
!16 = !{!14, !14, i64 0}
!17 = !{!18, !18, i64 0}
!18 = !{!"short", !7, i64 0}
!19 = !{!20, !6, i64 8}
!20 = !{!"", !10, i64 0, !10, i64 4, !6, i64 8, !6, i64 16}
!21 = !{!22, !10, i64 0}
!22 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32}
!23 = !{!22, !10, i64 8}
!24 = !{i8 0, i8 2}
!25 = !{}
!26 = !{!7, !7, i64 0}
!27 = distinct !{!27, !28}
!28 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i32 @LpcSSPRxData(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = load ptr, ptr %0, align 4, !tbaa !5
  %5 = getelementptr inbounds i8, ptr %4, i64 8
  %6 = load ptr, ptr %5, align 8, !tbaa !14
  %7 = load volatile i32, ptr %6, align 4, !tbaa !16
  %8 = icmp sgt i32 %2, 0
  br i1 %8, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %3
  %.fr27 = freeze i32 %7
  %9 = and i32 %.fr27, 8
  %.not = icmp eq i32 %9, 0
  br i1 %.not, label %.lr.ph.split.us, label %.lr.ph.split

.lr.ph.split.us:                                  ; preds = %.lr.ph, %20
  %.02025.us = phi i32 [ %.121.us, %20 ], [ 0, %.lr.ph ]
  %.02224.us = phi ptr [ %.123.us, %20 ], [ %1, %.lr.ph ]
  %10 = load ptr, ptr %5, align 8, !tbaa !14
  %11 = getelementptr inbounds i8, ptr %10, i64 8
  store volatile i32 255, ptr %11, align 4, !tbaa !18
  %12 = tail call zeroext i1 @LpcSSPWaitRxFifo(ptr noundef nonnull %4, i32 noundef 100000)
  br i1 %12, label %13, label %20

13:                                               ; preds = %.lr.ph.split.us
  %14 = load ptr, ptr %5, align 8, !tbaa !14
  %15 = getelementptr inbounds i8, ptr %14, i64 8
  %16 = load volatile i32, ptr %15, align 4, !tbaa !18
  %17 = trunc i32 %16 to i8
  store i8 %17, ptr %.02224.us, align 1, !tbaa !19
  %18 = getelementptr inbounds i8, ptr %.02224.us, i64 1
  %19 = add nsw i32 %.02025.us, 1
  br label %20

20:                                               ; preds = %13, %.lr.ph.split.us
  %.123.us = phi ptr [ %18, %13 ], [ %.02224.us, %.lr.ph.split.us ]
  %.121.us = phi i32 [ %19, %13 ], [ %.02025.us, %.lr.ph.split.us ]
  %21 = icmp slt i32 %.121.us, %2
  br i1 %21, label %.lr.ph.split.us, label %._crit_edge, !llvm.loop !20

.lr.ph.split:                                     ; preds = %.lr.ph, %37
  %.126 = phi i16 [ %.2, %37 ], [ -1, %.lr.ph ]
  %.02025 = phi i32 [ %.121, %37 ], [ 0, %.lr.ph ]
  %.02224 = phi ptr [ %.123, %37 ], [ %1, %.lr.ph ]
  %22 = zext i16 %.126 to i32
  %23 = load ptr, ptr %5, align 8, !tbaa !14
  %24 = getelementptr inbounds i8, ptr %23, i64 8
  store volatile i32 %22, ptr %24, align 4, !tbaa !18
  %25 = tail call zeroext i1 @LpcSSPWaitRxFifo(ptr noundef nonnull %4, i32 noundef 100000)
  br i1 %25, label %26, label %37

26:                                               ; preds = %.lr.ph.split
  %27 = load ptr, ptr %5, align 8, !tbaa !14
  %28 = getelementptr inbounds i8, ptr %27, i64 8
  %29 = load volatile i32, ptr %28, align 4, !tbaa !18
  %30 = trunc i32 %29 to i16
  %31 = trunc i32 %29 to i8
  store i8 %31, ptr %.02224, align 1, !tbaa !19
  %32 = lshr i32 %29, 8
  %33 = trunc i32 %32 to i8
  %34 = getelementptr inbounds i8, ptr %.02224, i64 1
  store i8 %33, ptr %34, align 1, !tbaa !19
  %35 = add nsw i32 %.02025, 2
  %36 = getelementptr inbounds i8, ptr %.02224, i64 2
  br label %37

37:                                               ; preds = %26, %.lr.ph.split
  %.123 = phi ptr [ %36, %26 ], [ %.02224, %.lr.ph.split ]
  %.121 = phi i32 [ %35, %26 ], [ %.02025, %.lr.ph.split ]
  %.2 = phi i16 [ %30, %26 ], [ %.126, %.lr.ph.split ]
  %38 = icmp slt i32 %.121, %2
  br i1 %38, label %.lr.ph.split, label %._crit_edge, !llvm.loop !20

._crit_edge:                                      ; preds = %37, %20, %3
  %.020.lcssa = phi i32 [ 0, %3 ], [ %.121.us, %20 ], [ %.121, %37 ]
  ret i32 %.020.lcssa
}

; Function Attrs: nounwind uwtable
declare dso_local zeroext i1 @LpcSSPWaitRxFifo(ptr noundef, i32 noundef) local_unnamed_addr #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"__device_intrf", !7, i64 0, !10, i64 8, !7, i64 12, !11, i64 20, !10, i64 24, !8, i64 28, !10, i64 32, !12, i64 36, !12, i64 37, !8, i64 38, !8, i64 39, !13, i64 40, !7, i64 48, !7, i64 56, !7, i64 64, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !7, i64 120, !7, i64 128, !7, i64 136, !7, i64 144, !7, i64 152}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"atomic_flag", !8, i64 0}
!12 = !{!"_Bool", !8, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = !{!15, !7, i64 8}
!15 = !{!"", !10, i64 0, !10, i64 4, !7, i64 8, !7, i64 16}
!16 = !{!17, !10, i64 0}
!17 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32}
!18 = !{!17, !10, i64 8}
!19 = !{!8, !8, i64 0}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass