; LLVM IR from TheAlgorithms/C-Plus-Plus :: others/tower_of_hanoi.ll (Z2THiP5towerS0_S0_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z4showPK5towerS1_S1_(ptr noundef, ptr noundef, ptr noundef) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z3movP5towerS0_(ptr noundef, ptr noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z2THiP5towerS0_S0_(i32 noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) #0 {
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  store i32 %0, ptr %5, align 4, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !9
  store ptr %2, ptr %7, align 8, !tbaa !9
  store ptr %3, ptr %8, align 8, !tbaa !9
  %9 = load i32, ptr %5, align 4, !tbaa !5
  %10 = icmp eq i32 %9, 1
  br i1 %10, label %11, label %17

11:                                               ; preds = %4
  %12 = load ptr, ptr %6, align 8, !tbaa !9
  %13 = load ptr, ptr %8, align 8, !tbaa !9
  call void @_Z3movP5towerS0_(ptr noundef %12, ptr noundef %13)
  %14 = load ptr, ptr %6, align 8, !tbaa !9
  %15 = load ptr, ptr %8, align 8, !tbaa !9
  %16 = load ptr, ptr %7, align 8, !tbaa !9
  call void @_Z4showPK5towerS1_S1_(ptr noundef %14, ptr noundef %15, ptr noundef %16)
  br label %33

17:                                               ; preds = %4
  %18 = load i32, ptr %5, align 4, !tbaa !5
  %19 = sub nsw i32 %18, 1
  %20 = load ptr, ptr %6, align 8, !tbaa !9
  %21 = load ptr, ptr %8, align 8, !tbaa !9
  %22 = load ptr, ptr %7, align 8, !tbaa !9
  call void @_Z2THiP5towerS0_S0_(i32 noundef %19, ptr noundef %20, ptr noundef %21, ptr noundef %22)
  %23 = load ptr, ptr %6, align 8, !tbaa !9
  %24 = load ptr, ptr %8, align 8, !tbaa !9
  call void @_Z3movP5towerS0_(ptr noundef %23, ptr noundef %24)
  %25 = load ptr, ptr %6, align 8, !tbaa !9
  %26 = load ptr, ptr %8, align 8, !tbaa !9
  %27 = load ptr, ptr %7, align 8, !tbaa !9
  call void @_Z4showPK5towerS1_S1_(ptr noundef %25, ptr noundef %26, ptr noundef %27)
  %28 = load i32, ptr %5, align 4, !tbaa !5
  %29 = sub nsw i32 %28, 1
  %30 = load ptr, ptr %7, align 8, !tbaa !9
  %31 = load ptr, ptr %6, align 8, !tbaa !9
  %32 = load ptr, ptr %8, align 8, !tbaa !9
  call void @_Z2THiP5towerS0_S0_(i32 noundef %29, ptr noundef %30, ptr noundef %31, ptr noundef %32)
  br label %33

33:                                               ; preds = %17, %11
  ret void
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z4showPK5towerS1_S1_(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z3movP5towerS0_(ptr noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z2THiP5towerS0_S0_(i32 noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) local_unnamed_addr #0 {
  %5 = icmp eq i32 %0, 1
  br i1 %5, label %tailrecurse._crit_edge, label %tailrecurse

tailrecurse._crit_edge:                           ; preds = %tailrecurse, %4
  %.tr18.lcssa = phi ptr [ %1, %4 ], [ %.tr1923, %tailrecurse ]
  %.tr19.lcssa = phi ptr [ %2, %4 ], [ %.tr1822, %tailrecurse ]
  tail call void @_Z3movP5towerS0_(ptr noundef %.tr18.lcssa, ptr noundef %3)
  tail call void @_Z4showPK5towerS1_S1_(ptr noundef %.tr18.lcssa, ptr noundef %3, ptr noundef %.tr19.lcssa)
  ret void

tailrecurse:                                      ; preds = %4, %tailrecurse
  %.tr1923 = phi ptr [ %.tr1822, %tailrecurse ], [ %2, %4 ]
  %.tr1822 = phi ptr [ %.tr1923, %tailrecurse ], [ %1, %4 ]
  %.tr21 = phi i32 [ %6, %tailrecurse ], [ %0, %4 ]
  %6 = add nsw i32 %.tr21, -1
  tail call void @_Z2THiP5towerS0_S0_(i32 noundef %6, ptr noundef %.tr1822, ptr noundef %3, ptr noundef %.tr1923)
  tail call void @_Z3movP5towerS0_(ptr noundef %.tr1822, ptr noundef %3)
  tail call void @_Z4showPK5towerS1_S1_(ptr noundef %.tr1822, ptr noundef %3, ptr noundef %.tr1923)
  %7 = icmp eq i32 %6, 1
  br i1 %7, label %tailrecurse._crit_edge, label %tailrecurse
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass