; LLVM IR from sca-secure-library-sca25519/sca25519 :: libopencm3/lib/lpc43xx (i2c)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @i2c0_init(i16 noundef zeroext %0) #0 {
  %2 = alloca i16, align 2
  store i16 %0, ptr %2, align 2, !tbaa !5
  store volatile i32 2056, ptr inttoptr (i64 1074293892 to ptr), align 4, !tbaa !9
  %3 = load i16, ptr %2, align 2, !tbaa !5
  %4 = zext i16 %3 to i32
  store volatile i32 %4, ptr inttoptr (i64 1074401296 to ptr), align 4, !tbaa !9
  %5 = load i16, ptr %2, align 2, !tbaa !5
  %6 = zext i16 %5 to i32
  store volatile i32 %6, ptr inttoptr (i64 1074401300 to ptr), align 4, !tbaa !9
  store volatile i32 108, ptr inttoptr (i64 1074401304 to ptr), align 4, !tbaa !9
  store volatile i32 64, ptr inttoptr (i64 1074401280 to ptr), align 4, !tbaa !9
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"short", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local void @i2c0_init(i16 noundef zeroext %0) local_unnamed_addr #0 {
  store volatile i32 2056, ptr inttoptr (i64 1074293892 to ptr), align 4, !tbaa !5
  %2 = zext i16 %0 to i32
  store volatile i32 %2, ptr inttoptr (i64 1074401296 to ptr), align 16, !tbaa !5
  store volatile i32 %2, ptr inttoptr (i64 1074401300 to ptr), align 4, !tbaa !5
  store volatile i32 108, ptr inttoptr (i64 1074401304 to ptr), align 8, !tbaa !5
  store volatile i32 64, ptr inttoptr (i64 1074401280 to ptr), align 4096, !tbaa !5
  ret void
}

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferAlignmentPass,PostOrderFunctionAttrsPass,SROAPass