; LLVM IR from IOsonata/IOsonata :: src/imu/imu_mpu9250.ll (ZN10ImuMpu925010UpdateDataEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.ImuMpu9250 = type <{ %class.Imu.base, [4 x i8], ptr, i32, [4 x i8], %class.Device }>
%class.Imu.base = type <{ ptr, ptr, ptr, ptr, i32, [4 x i8], %struct.__Imu_Quat, %struct.__Imu_Euler, i32 }>
%struct.__Imu_Quat = type { i64, %union.anon }
%union.anon = type { [4 x float] }
%struct.__Imu_Euler = type { i64, float, float, float }
%class.Device = type { ptr, i8, i32, ptr, ptr, i64, i8, ptr, i8, i32 }
%class.Imu = type <{ ptr, ptr, ptr, ptr, i32, [4 x i8], %struct.__Imu_Quat, %struct.__Imu_Euler, i32, [4 x i8], %class.Device }>
%struct.anon = type { float, float, float, float }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN10ImuMpu925010UpdateDataEv(ptr noundef nonnull align 8 dereferenceable(108) %0) unnamed_addr #1 align 2 {
  %2 = alloca i1, align 1
  %3 = alloca ptr, align 8
  %4 = alloca [4 x i32], align 16
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  %9 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 16, ptr %4) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #5
  %10 = getelementptr inbounds %class.ImuMpu9250, ptr %9, i32 0, i32 2
  %11 = load ptr, ptr %10, align 8, !tbaa !9
  %12 = call noundef i32 @_ZN10AgmMpu925010GetFifoLenEv(ptr noundef nonnull align 8 dereferenceable(580) %11)
  store i32 %12, ptr %5, align 4, !tbaa !17
  %13 = load i32, ptr %5, align 4, !tbaa !17
  %14 = getelementptr inbounds %class.ImuMpu9250, ptr %9, i32 0, i32 3
  %15 = load i32, ptr %14, align 8, !tbaa !18
  %16 = icmp sge i32 %13, %15
  br i1 %16, label %17, label %109

17:                                               ; preds = %1
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #5
  %18 = getelementptr inbounds %class.ImuMpu9250, ptr %9, i32 0, i32 2
  %19 = load ptr, ptr %18, align 8, !tbaa !9
  %20 = load ptr, ptr %19, align 8, !tbaa !19
  %21 = getelementptr i8, ptr %20, i64 -24
  %22 = load i64, ptr %21, align 8
  %23 = getelementptr inbounds i8, ptr %19, i64 %22
  %24 = load ptr, ptr %23, align 8, !tbaa !19
  %25 = getelementptr inbounds ptr, ptr %24, i64 17
  %26 = load ptr, ptr %25, align 8
  %27 = call noundef ptr %26(ptr noundef nonnull align 8 dereferenceable(64) %23)
  %28 = load ptr, ptr %27, align 8, !tbaa !19
  %29 = getelementptr inbounds ptr, ptr %28, i64 14
  %30 = load ptr, ptr %29, align 8
  %31 = call noundef i32 %30(ptr noundef nonnull align 8 dereferenceable(140) %27)
  store i32 %31, ptr %6, align 4, !tbaa !17
  %32 = getelementptr inbounds %class.ImuMpu9250, ptr %9, i32 0, i32 2
  %33 = load ptr, ptr %32, align 8, !tbaa !9
  %34 = getelementptr inbounds [4 x i32], ptr %4, i64 0, i64 0
  %35 = call noundef i32 @_ZN10AgmMpu92508ReadFifoEPhi(ptr noundef nonnull align 8 dereferenceable(580) %33, ptr noundef %34, i32 noundef 16)
  store i32 %35, ptr %5, align 4, !tbaa !17
  %36 = load i32, ptr %5, align 4, !tbaa !17
  %37 = icmp sgt i32 %36, 0
  br i1 %37, label %38, label %105

38:                                               ; preds = %17
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  %39 = load ptr, ptr %9, align 8, !tbaa !19
  %40 = getelementptr inbounds ptr, ptr %39, i64 18
  %41 = load ptr, ptr %40, align 8
  %42 = call noundef i32 %41(ptr noundef nonnull align 8 dereferenceable(92) %9)
  store i32 %42, ptr %7, align 4, !tbaa !17
  %43 = load i32, ptr %7, align 4, !tbaa !17
  %44 = and i32 %43, 2
  %45 = icmp ne i32 %44, 0
  br i1 %45, label %46, label %103

46:                                               ; preds = %38
  %47 = getelementptr inbounds [4 x i32], ptr %4, i64 0, i64 0
  %48 = load i32, ptr %47, align 16, !tbaa !17
  %49 = call noundef i32 @_ZL11EndianCvt32j(i32 noundef %48)
  %50 = getelementptr inbounds [4 x i32], ptr %4, i64 0, i64 0
  store i32 %49, ptr %50, align 16, !tbaa !17
  %51 = getelementptr inbounds [4 x i32], ptr %4, i64 0, i64 1
  %52 = load i32, ptr %51, align 4, !tbaa !17
  %53 = call noundef i32 @_ZL11EndianCvt32j(i32 noundef %52)
  %54 = getelementptr inbounds [4 x i32], ptr %4, i64 0, i64 1
  store i32 %53, ptr %54, align 4, !tbaa !17
  %55 = getelementptr inbounds [4 x i32], ptr %4, i64 0, i64 2
  %56 = load i32, ptr %55, align 8, !tbaa !17
  %57 = call noundef i32 @_ZL11EndianCvt32j(i32 noundef %56)
  %58 = getelementptr inbounds [4 x i32], ptr %4, i64 0, i64 2
  store i32 %57, ptr %58, align 8, !tbaa !17
  %59 = getelementptr inbounds [4 x i32], ptr %4, i64 0, i64 3
  %60 = load i32, ptr %59, align 4, !tbaa !17
  %61 = call noundef i32 @_ZL11EndianCvt32j(i32 noundef %60)
  %62 = getelementptr inbounds [4 x i32], ptr %4, i64 0, i64 3
  store i32 %61, ptr %62, align 4, !tbaa !17
  %63 = getelementptr inbounds [4 x i32], ptr %4, i64 0, i64 0
  %64 = call noundef zeroext i1 @_ZL12ValidateQuatPi(ptr noundef %63)
  %65 = zext i1 %64 to i32
  %66 = icmp eq i32 %65, 0
  br i1 %66, label %67, label %70

67:                                               ; preds = %46
  %68 = getelementptr inbounds %class.ImuMpu9250, ptr %9, i32 0, i32 2
  %69 = load ptr, ptr %68, align 8, !tbaa !9
  call void @_ZN10AgmMpu92509ResetFifoEv(ptr noundef nonnull align 8 dereferenceable(580) %69)
  store i1 false, ptr %2, align 1
  store i32 1, ptr %8, align 4
  br label %104

70:                                               ; preds = %46
  %71 = getelementptr inbounds [4 x i32], ptr %4, i64 0, i64 0
  %72 = load i32, ptr %71, align 16, !tbaa !17
  %73 = sitofp i32 %72 to float
  %74 = fdiv float %73, 0x41D0000000000000
  %75 = getelementptr inbounds %class.Imu, ptr %9, i32 0, i32 6
  %76 = getelementptr inbounds %struct.__Imu_Quat, ptr %75, i32 0, i32 1
  %77 = getelementptr inbounds %struct.anon, ptr %76, i32 0, i32 0
  store float %74, ptr %77, align 8, !tbaa !21
  %78 = getelementptr inbounds [4 x i32], ptr %4, i64 0, i64 1
  %79 = load i32, ptr %78, align 4, !tbaa !17
  %80 = sitofp i32 %79 to float
  %81 = fdiv float %80, 0x41D0000000000000
  %82 = getelementptr inbounds %class.Imu, ptr %9, i32 0, i32 6
  %83 = getelementptr inbounds %struct.__Imu_Quat, ptr %82, i32 0, i32 1
  %84 = getelementptr inbounds %struct.anon, ptr %83, i32 0, i32 1
  store float %81, ptr %84, align 4, !tbaa !21
  %85 = getelementptr inbounds [4 x i32], ptr %4, i64 0, i64 2
  %86 = load i32, ptr %85, align 8, !tbaa !17
  %87 = sitofp i32 %86 to float
  %88 = fdiv float %87, 0x41D0000000000000
  %89 = getelementptr inbounds %class.Imu, ptr %9, i32 0, i32 6
  %90 = getelementptr inbounds %struct.__Imu_Quat, ptr %89, i32 0, i32 1
  %91 = getelementptr inbounds %struct.anon, ptr %90, i32 0, i32 2
  store float %88, ptr %91, align 8, !tbaa !21
  %92 = getelementptr inbounds [4 x i32], ptr %4, i64 0, i64 3
  %93 = load i32, ptr %92, align 4, !tbaa !17
  %94 = sitofp i32 %93 to float
  %95 = fdiv float %94, 0x41D0000000000000
  %96 = getelementptr inbounds %class.Imu, ptr %9, i32 0, i32 6
  %97 = getelementptr inbounds %struct.__Imu_Quat, ptr %96, i32 0, i32 1
  %98 = getelementptr inbounds %struct.anon, ptr %97, i32 0, i32 3
  store float %95, ptr %98, align 4, !tbaa !21
  %99 = load i32, ptr %6, align 4, !tbaa !17
  %100 = zext i32 %99 to i64
  %101 = getelementptr inbounds %class.Imu, ptr %9, i32 0, i32 6
  %102 = getelementptr inbounds %struct.__Imu_Quat, ptr %101, i32 0, i32 0
  store i64 %100, ptr %102, align 8, !tbaa !22
  br label %103

103:                                              ; preds = %70, %38
  store i1 true, ptr %2, align 1
  store i32 1, ptr %8, align 4
  br label %104

104:                                              ; preds = %103, %67
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  br label %106

105:                                              ; preds = %17
  store i32 0, ptr %8, align 4
  br label %106

106:                                              ; preds = %105, %104
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #5
  %107 = load i32, ptr %8, align 4
  switch i32 %107, label %110 [
    i32 0, label %108
  ]

108:                                              ; preds = %106
  br label %109

109:                                              ; preds = %108, %1
  store i1 false, ptr %2, align 1
  store i32 1, ptr %8, align 4
  br label %110

110:                                              ; preds = %109, %106
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #5
  call void @llvm.lifetime.end.p0(i64 16, ptr %4) #5
  %111 = load i1, ptr %2, align 1
  ret i1 %111
}

declare noundef i32 @_ZN10AgmMpu925010GetFifoLenEv(ptr noundef nonnull align 8 dereferenceable(580)) #2

declare noundef i32 @_ZN10AgmMpu92508ReadFifoEPhi(ptr noundef nonnull align 8 dereferenceable(580), ptr noundef, i32 noundef) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i32 @_ZL11EndianCvt32j(i32 noundef) #3

; Function Attrs: mustprogress nounwind uwtable
declare hidden noundef zeroext i1 @_ZL12ValidateQuatPi(ptr noundef) #4

declare void @_ZN10AgmMpu92509ResetFifoEv(ptr noundef nonnull align 8 dereferenceable(580)) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 96}
!10 = !{!"_ZTS10ImuMpu9250", !11, i64 0, !6, i64 96, !12, i64 104}
!11 = !{!"_ZTS3Imu", !6, i64 8, !6, i64 16, !6, i64 24, !12, i64 32, !13, i64 40, !15, i64 64, !12, i64 88}
!12 = !{!"int", !7, i64 0}
!13 = !{!"_ZTS10__Imu_Quat", !14, i64 0, !7, i64 8}
!14 = !{!"long", !7, i64 0}
!15 = !{!"_ZTS11__Imu_Euler", !14, i64 0, !16, i64 8, !16, i64 12, !16, i64 16}
!16 = !{!"float", !7, i64 0}
!17 = !{!12, !12, i64 0}
!18 = !{!10, !12, i64 104}
!19 = !{!20, !20, i64 0}
!20 = !{!"vtable pointer", !8, i64 0}
!21 = !{!7, !7, i64 0}
!22 = !{!11, !14, i64 40}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN10ImuMpu925010UpdateDataEv(ptr noundef nonnull align 8 dereferenceable(108) %0) unnamed_addr #1 align 2 {
  %2 = alloca [4 x i32], align 16
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2) #5
  %3 = getelementptr inbounds i8, ptr %0, i64 96
  %4 = load ptr, ptr %3, align 8, !tbaa !5
  %5 = tail call noundef i32 @_ZN10AgmMpu925010GetFifoLenEv(ptr noundef nonnull align 8 dereferenceable(580) %4)
  %6 = getelementptr inbounds i8, ptr %0, i64 104
  %7 = load i32, ptr %6, align 8, !tbaa !16
  %.not = icmp slt i32 %5, %7
  br i1 %.not, label %.thread, label %8

8:                                                ; preds = %1
  %9 = load ptr, ptr %3, align 8, !tbaa !5
  %10 = load ptr, ptr %9, align 8, !tbaa !17
  %11 = getelementptr i8, ptr %10, i64 -24
  %12 = load i64, ptr %11, align 8
  %13 = getelementptr inbounds i8, ptr %9, i64 %12
  %14 = load ptr, ptr %13, align 8, !tbaa !17
  %15 = getelementptr inbounds i8, ptr %14, i64 136
  %16 = load ptr, ptr %15, align 8
  %17 = tail call noundef ptr %16(ptr noundef nonnull align 8 dereferenceable(64) %13)
  %18 = load ptr, ptr %17, align 8, !tbaa !17
  %19 = getelementptr inbounds i8, ptr %18, i64 112
  %20 = load ptr, ptr %19, align 8
  %21 = tail call noundef i32 %20(ptr noundef nonnull align 8 dereferenceable(140) %17)
  %22 = load ptr, ptr %3, align 8, !tbaa !5
  %23 = call noundef i32 @_ZN10AgmMpu92508ReadFifoEPhi(ptr noundef nonnull align 8 dereferenceable(580) %22, ptr noundef nonnull %2, i32 noundef 16)
  %24 = icmp slt i32 %23, 1
  br i1 %24, label %.thread, label %25

25:                                               ; preds = %8
  %26 = load ptr, ptr %0, align 8, !tbaa !17
  %27 = getelementptr inbounds i8, ptr %26, i64 144
  %28 = load ptr, ptr %27, align 8
  %29 = call noundef i32 %28(ptr noundef nonnull align 8 dereferenceable(92) %0)
  %30 = and i32 %29, 2
  %.not8 = icmp eq i32 %30, 0
  br i1 %.not8, label %.thread, label %31

31:                                               ; preds = %25
  %32 = load i32, ptr %2, align 16, !tbaa !19
  %33 = call noundef i32 @_ZL11EndianCvt32j(i32 noundef %32)
  store i32 %33, ptr %2, align 16, !tbaa !19
  %34 = getelementptr inbounds i8, ptr %2, i64 4
  %35 = load i32, ptr %34, align 4, !tbaa !19
  %36 = call noundef i32 @_ZL11EndianCvt32j(i32 noundef %35)
  store i32 %36, ptr %34, align 4, !tbaa !19
  %37 = getelementptr inbounds i8, ptr %2, i64 8
  %38 = load i32, ptr %37, align 8, !tbaa !19
  %39 = call noundef i32 @_ZL11EndianCvt32j(i32 noundef %38)
  store i32 %39, ptr %37, align 8, !tbaa !19
  %40 = getelementptr inbounds i8, ptr %2, i64 12
  %41 = load i32, ptr %40, align 4, !tbaa !19
  %42 = call noundef i32 @_ZL11EndianCvt32j(i32 noundef %41)
  store i32 %42, ptr %40, align 4, !tbaa !19
  %43 = call noundef zeroext i1 @_ZL12ValidateQuatPi(ptr noundef nonnull %2)
  br i1 %43, label %46, label %44

44:                                               ; preds = %31
  %45 = load ptr, ptr %3, align 8, !tbaa !5
  call void @_ZN10AgmMpu92509ResetFifoEv(ptr noundef nonnull align 8 dereferenceable(580) %45)
  br label %.thread

46:                                               ; preds = %31
  %47 = getelementptr inbounds i8, ptr %0, i64 40
  %48 = getelementptr inbounds i8, ptr %0, i64 48
  %49 = load <4 x i32>, ptr %2, align 16, !tbaa !19
  %50 = sitofp <4 x i32> %49 to <4 x float>
  %51 = fmul <4 x float> %50, <float 0x3E10000000000000, float 0x3E10000000000000, float 0x3E10000000000000, float 0x3E10000000000000>
  store <4 x float> %51, ptr %48, align 8, !tbaa !20
  %52 = zext i32 %21 to i64
  store i64 %52, ptr %47, align 8, !tbaa !21
  br label %.thread

.thread:                                          ; preds = %25, %46, %44, %1, %8
  %.2 = phi i1 [ false, %8 ], [ false, %1 ], [ true, %25 ], [ true, %46 ], [ false, %44 ]
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2) #5
  ret i1 %.2
}

declare noundef i32 @_ZN10AgmMpu925010GetFifoLenEv(ptr noundef nonnull align 8 dereferenceable(580)) local_unnamed_addr #2

declare noundef i32 @_ZN10AgmMpu92508ReadFifoEPhi(ptr noundef nonnull align 8 dereferenceable(580), ptr noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i32 @_ZL11EndianCvt32j(i32 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress nounwind uwtable
declare hidden noundef zeroext i1 @_ZL12ValidateQuatPi(ptr noundef) local_unnamed_addr #4

declare void @_ZN10AgmMpu92509ResetFifoEv(ptr noundef nonnull align 8 dereferenceable(580)) local_unnamed_addr #2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 96}
!6 = !{!"_ZTS10ImuMpu9250", !7, i64 0, !8, i64 96, !11, i64 104}
!7 = !{!"_ZTS3Imu", !8, i64 8, !8, i64 16, !8, i64 24, !11, i64 32, !12, i64 40, !14, i64 64, !11, i64 88}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"_ZTS10__Imu_Quat", !13, i64 0, !9, i64 8}
!13 = !{!"long", !9, i64 0}
!14 = !{!"_ZTS11__Imu_Euler", !13, i64 0, !15, i64 8, !15, i64 12, !15, i64 16}
!15 = !{!"float", !9, i64 0}
!16 = !{!6, !11, i64 104}
!17 = !{!18, !18, i64 0}
!18 = !{!"vtable pointer", !10, i64 0}
!19 = !{!11, !11, i64 0}
!20 = !{!9, !9, i64 0}
!21 = !{!7, !13, i64 40}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass