; LLVM IR from jingweizhanghuai/Morn :: src/deep_learning (morn_learning_net)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorRegister = type { [32 x i8], ptr, ptr, ptr }

@morn_tensor_register_num = external dso_local global i32, align 4
@morn_tensor_register = external dso_local global [256 x %struct.TensorRegister], align 16

; Function Attrs: nounwind uwtable
define dso_local void @mTensorRegister(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) #0 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  store ptr %3, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  %12 = load i32, ptr @morn_tensor_register_num, align 4, !tbaa !9
  store i32 %12, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  store i32 0, ptr %10, align 4, !tbaa !9
  br label %13

13:                                               ; preds = %29, %4
  %14 = load i32, ptr %10, align 4, !tbaa !9
  %15 = load i32, ptr %9, align 4, !tbaa !9
  %16 = icmp slt i32 %14, %15
  br i1 %16, label %18, label %17

17:                                               ; preds = %13
  store i32 2, ptr %11, align 4
  br label %32

18:                                               ; preds = %13
  %19 = load i32, ptr %9, align 4, !tbaa !9
  %20 = sext i32 %19 to i64
  %21 = getelementptr inbounds [256 x %struct.TensorRegister], ptr @morn_tensor_register, i64 0, i64 %20
  %22 = getelementptr inbounds %struct.TensorRegister, ptr %21, i32 0, i32 0
  %23 = getelementptr inbounds [32 x i8], ptr %22, i64 0, i64 0
  %24 = load ptr, ptr %5, align 8, !tbaa !5
  %25 = call i32 @strcmp(ptr noundef %23, ptr noundef %24) #5
  %26 = icmp eq i32 %25, 0
  br i1 %26, label %27, label %28

27:                                               ; preds = %18
  store i32 1, ptr %11, align 4
  br label %32

28:                                               ; preds = %18
  br label %29

29:                                               ; preds = %28
  %30 = load i32, ptr %10, align 4, !tbaa !9
  %31 = add nsw i32 %30, 1
  store i32 %31, ptr %10, align 4, !tbaa !9
  br label %13, !llvm.loop !11

32:                                               ; preds = %27, %17
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  %33 = load i32, ptr %11, align 4
  switch i32 %33, label %59 [
    i32 2, label %34
  ]

34:                                               ; preds = %32
  %35 = load i32, ptr %9, align 4, !tbaa !9
  %36 = add nsw i32 %35, 1
  store i32 %36, ptr @morn_tensor_register_num, align 4, !tbaa !9
  %37 = load i32, ptr %9, align 4, !tbaa !9
  %38 = sext i32 %37 to i64
  %39 = getelementptr inbounds [256 x %struct.TensorRegister], ptr @morn_tensor_register, i64 0, i64 %38
  %40 = getelementptr inbounds %struct.TensorRegister, ptr %39, i32 0, i32 0
  %41 = getelementptr inbounds [32 x i8], ptr %40, i64 0, i64 0
  %42 = load ptr, ptr %5, align 8, !tbaa !5
  %43 = call ptr @strcpy(ptr noundef %41, ptr noundef %42) #4
  %44 = load ptr, ptr %6, align 8, !tbaa !5
  %45 = load i32, ptr %9, align 4, !tbaa !9
  %46 = sext i32 %45 to i64
  %47 = getelementptr inbounds [256 x %struct.TensorRegister], ptr @morn_tensor_register, i64 0, i64 %46
  %48 = getelementptr inbounds %struct.TensorRegister, ptr %47, i32 0, i32 1
  store ptr %44, ptr %48, align 8, !tbaa !13
  %49 = load ptr, ptr %7, align 8, !tbaa !5
  %50 = load i32, ptr %9, align 4, !tbaa !9
  %51 = sext i32 %50 to i64
  %52 = getelementptr inbounds [256 x %struct.TensorRegister], ptr @morn_tensor_register, i64 0, i64 %51
  %53 = getelementptr inbounds %struct.TensorRegister, ptr %52, i32 0, i32 2
  store ptr %49, ptr %53, align 8, !tbaa !15
  %54 = load ptr, ptr %8, align 8, !tbaa !5
  %55 = load i32, ptr %9, align 4, !tbaa !9
  %56 = sext i32 %55 to i64
  %57 = getelementptr inbounds [256 x %struct.TensorRegister], ptr @morn_tensor_register, i64 0, i64 %56
  %58 = getelementptr inbounds %struct.TensorRegister, ptr %57, i32 0, i32 3
  store ptr %54, ptr %58, align 8, !tbaa !16
  store i32 0, ptr %11, align 4
  br label %59

59:                                               ; preds = %34, %32
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  %60 = load i32, ptr %11, align 4
  switch i32 %60, label %62 [
    i32 0, label %61
    i32 1, label %61
  ]

61:                                               ; preds = %59, %59
  ret void

62:                                               ; preds = %59
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind willreturn memory(read)
declare i32 @strcmp(ptr noundef, ptr noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind
declare ptr @strcpy(ptr noundef, ptr noundef) #3

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind willreturn memory(read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { nounwind willreturn memory(read) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!14, !6, i64 32}
!14 = !{!"TensorRegister", !7, i64 0, !6, i64 32, !6, i64 40, !6, i64 48}
!15 = !{!14, !6, i64 40}
!16 = !{!14, !6, i64 48}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorRegister = type { [32 x i8], ptr, ptr, ptr }

@morn_tensor_register_num = external dso_local local_unnamed_addr global i32, align 4
@morn_tensor_register = external dso_local global [256 x %struct.TensorRegister], align 16

; Function Attrs: mustprogress nofree nounwind willreturn memory(readwrite, inaccessiblemem: none) uwtable
define dso_local void @mTensorRegister(ptr nocapture noundef readonly %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) local_unnamed_addr #0 {
  %5 = load i32, ptr @morn_tensor_register_num, align 4, !tbaa !5
  %.not16 = icmp sgt i32 %5, 0
  br i1 %.not16, label %.lr.ph, label %.critedge

.lr.ph:                                           ; preds = %4
  %6 = zext nneg i32 %5 to i64
  %7 = getelementptr inbounds [256 x %struct.TensorRegister], ptr @morn_tensor_register, i64 0, i64 %6
  %8 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(1) %7, ptr noundef nonnull dereferenceable(1) %0) #3
  %9 = icmp eq i32 %8, 0
  br i1 %9, label %.loopexit, label %.critedge

.critedge:                                        ; preds = %.lr.ph, %4
  %10 = add nsw i32 %5, 1
  store i32 %10, ptr @morn_tensor_register_num, align 4, !tbaa !5
  %11 = sext i32 %5 to i64
  %12 = getelementptr inbounds [256 x %struct.TensorRegister], ptr @morn_tensor_register, i64 0, i64 %11
  %13 = tail call ptr @strcpy(ptr noundef nonnull dereferenceable(1) %12, ptr noundef nonnull dereferenceable(1) %0) #4
  %14 = getelementptr inbounds i8, ptr %12, i64 32
  store ptr %1, ptr %14, align 8, !tbaa !9
  %15 = getelementptr inbounds i8, ptr %12, i64 40
  store ptr %2, ptr %15, align 8, !tbaa !12
  %16 = getelementptr inbounds i8, ptr %12, i64 48
  store ptr %3, ptr %16, align 8, !tbaa !13
  br label %.loopexit

.loopexit:                                        ; preds = %.lr.ph, %.critedge
  ret void
}

; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare i32 @strcmp(ptr nocapture noundef, ptr nocapture noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: readwrite)
declare ptr @strcpy(ptr noalias noundef returned writeonly, ptr noalias nocapture noundef readonly) local_unnamed_addr #2

attributes #0 = { mustprogress nofree nounwind willreturn memory(readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nofree nounwind willreturn memory(argmem: read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nofree nounwind willreturn memory(argmem: readwrite) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind willreturn memory(read) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 32}
!10 = !{!"TensorRegister", !7, i64 0, !11, i64 32, !11, i64 40, !11, i64 48}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!10, !11, i64 40}
!13 = !{!10, !11, i64 48}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass