; LLVM IR from zsiciarz/aquila :: aquila/source/generator/TriangleGenerator.ll (ZN6Aquila17TriangleGenerator8generateEm)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.Aquila::SignalSource" = type { ptr, %"class.std::vector", double }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.Aquila::Generator" = type { %"class.Aquila::SignalSource", double, double, double }
%"class.Aquila::TriangleGenerator" = type { %"class.Aquila::Generator", double }

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN6Aquila17TriangleGenerator8generateEm(ptr noundef nonnull align 8 dereferenceable(72) %0, i64 noundef %1) unnamed_addr #0 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca i64, align 8
  %5 = alloca double, align 8
  %6 = alloca double, align 8
  %7 = alloca double, align 8
  %8 = alloca double, align 8
  %9 = alloca double, align 8
  %10 = alloca double, align 8
  %11 = alloca double, align 8
  %12 = alloca i64, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i64 %1, ptr %4, align 8, !tbaa !9
  %13 = load ptr, ptr %3, align 8
  %14 = getelementptr inbounds %"class.Aquila::SignalSource", ptr %13, i32 0, i32 1
  %15 = load i64, ptr %4, align 8, !tbaa !9
  call void @_ZNSt6vectorIdSaIdEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %14, i64 noundef %15)
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #4
  %16 = getelementptr inbounds %"class.Aquila::SignalSource", ptr %13, i32 0, i32 2
  %17 = load double, ptr %16, align 8, !tbaa !11
  %18 = fdiv double 1.000000e+00, %17
  store double %18, ptr %5, align 8, !tbaa !18
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #4
  %19 = getelementptr inbounds %"class.Aquila::Generator", ptr %13, i32 0, i32 1
  %20 = load double, ptr %19, align 8, !tbaa !19
  %21 = fdiv double 1.000000e+00, %20
  store double %21, ptr %6, align 8, !tbaa !18
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #4
  %22 = getelementptr inbounds %"class.Aquila::TriangleGenerator", ptr %13, i32 0, i32 1
  %23 = load double, ptr %22, align 8, !tbaa !21
  %24 = load double, ptr %6, align 8, !tbaa !18
  %25 = fmul double %23, %24
  store double %25, ptr %7, align 8, !tbaa !18
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #4
  %26 = load double, ptr %6, align 8, !tbaa !18
  %27 = load double, ptr %7, align 8, !tbaa !18
  %28 = fsub double %26, %27
  store double %28, ptr %8, align 8, !tbaa !18
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #4
  %29 = load double, ptr %7, align 8, !tbaa !18
  %30 = fcmp une double %29, 0.000000e+00
  br i1 %30, label %31, label %37

31:                                               ; preds = %2
  %32 = getelementptr inbounds %"class.Aquila::Generator", ptr %13, i32 0, i32 2
  %33 = load double, ptr %32, align 8, !tbaa !23
  %34 = fmul double 2.000000e+00, %33
  %35 = load double, ptr %7, align 8, !tbaa !18
  %36 = fdiv double %34, %35
  br label %38

37:                                               ; preds = %2
  br label %38

38:                                               ; preds = %37, %31
  %39 = phi double [ %36, %31 ], [ 0.000000e+00, %37 ]
  store double %39, ptr %9, align 8, !tbaa !18
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #4
  %40 = load double, ptr %8, align 8, !tbaa !18
  %41 = fcmp une double %40, 0.000000e+00
  br i1 %41, label %42, label %48

42:                                               ; preds = %38
  %43 = getelementptr inbounds %"class.Aquila::Generator", ptr %13, i32 0, i32 2
  %44 = load double, ptr %43, align 8, !tbaa !23
  %45 = fmul double 2.000000e+00, %44
  %46 = load double, ptr %8, align 8, !tbaa !18
  %47 = fdiv double %45, %46
  br label %49

48:                                               ; preds = %38
  br label %49

49:                                               ; preds = %48, %42
  %50 = phi double [ %47, %42 ], [ 0.000000e+00, %48 ]
  store double %50, ptr %10, align 8, !tbaa !18
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #4
  store double 0.000000e+00, ptr %11, align 8, !tbaa !18
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #4
  store i64 0, ptr %12, align 8, !tbaa !9
  br label %51

51:                                               ; preds = %94, %49
  %52 = load i64, ptr %12, align 8, !tbaa !9
  %53 = load i64, ptr %4, align 8, !tbaa !9
  %54 = icmp ult i64 %52, %53
  br i1 %54, label %56, label %55

55:                                               ; preds = %51
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #4
  br label %97

56:                                               ; preds = %51
  %57 = load double, ptr %11, align 8, !tbaa !18
  %58 = load double, ptr %6, align 8, !tbaa !18
  %59 = fcmp ogt double %57, %58
  br i1 %59, label %60, label %64

60:                                               ; preds = %56
  %61 = load double, ptr %6, align 8, !tbaa !18
  %62 = load double, ptr %11, align 8, !tbaa !18
  %63 = fsub double %62, %61
  store double %63, ptr %11, align 8, !tbaa !18
  br label %64

64:                                               ; preds = %60, %56
  %65 = load double, ptr %11, align 8, !tbaa !18
  %66 = load double, ptr %7, align 8, !tbaa !18
  %67 = fcmp olt double %65, %66
  br i1 %67, label %68, label %78

68:                                               ; preds = %64
  %69 = getelementptr inbounds %"class.Aquila::Generator", ptr %13, i32 0, i32 2
  %70 = load double, ptr %69, align 8, !tbaa !23
  %71 = fneg double %70
  %72 = load double, ptr %11, align 8, !tbaa !18
  %73 = load double, ptr %9, align 8, !tbaa !18
  %74 = call double @llvm.fmuladd.f64(double %72, double %73, double %71)
  %75 = getelementptr inbounds %"class.Aquila::SignalSource", ptr %13, i32 0, i32 1
  %76 = load i64, ptr %12, align 8, !tbaa !9
  %77 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %75, i64 noundef %76) #4
  store double %74, ptr %77, align 8, !tbaa !18
  br label %90

78:                                               ; preds = %64
  %79 = getelementptr inbounds %"class.Aquila::Generator", ptr %13, i32 0, i32 2
  %80 = load double, ptr %79, align 8, !tbaa !23
  %81 = load double, ptr %11, align 8, !tbaa !18
  %82 = load double, ptr %7, align 8, !tbaa !18
  %83 = fsub double %81, %82
  %84 = load double, ptr %10, align 8, !tbaa !18
  %85 = fneg double %83
  %86 = call double @llvm.fmuladd.f64(double %85, double %84, double %80)
  %87 = getelementptr inbounds %"class.Aquila::SignalSource", ptr %13, i32 0, i32 1
  %88 = load i64, ptr %12, align 8, !tbaa !9
  %89 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %87, i64 noundef %88) #4
  store double %86, ptr %89, align 8, !tbaa !18
  br label %90

90:                                               ; preds = %78, %68
  %91 = load double, ptr %5, align 8, !tbaa !18
  %92 = load double, ptr %11, align 8, !tbaa !18
  %93 = fadd double %92, %91
  store double %93, ptr %11, align 8, !tbaa !18
  br label %94

94:                                               ; preds = %90
  %95 = load i64, ptr %12, align 8, !tbaa !9
  %96 = add i64 %95, 1
  store i64 %96, ptr %12, align 8, !tbaa !9
  br label %51, !llvm.loop !24

97:                                               ; preds = %55
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #4
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #3 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !17, i64 32}
!12 = !{!"_ZTSN6Aquila12SignalSourceE", !13, i64 8, !17, i64 32}
!13 = !{!"_ZTSSt6vectorIdSaIdEE", !14, i64 0}
!14 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!17 = !{!"double", !7, i64 0}
!18 = !{!17, !17, i64 0}
!19 = !{!20, !17, i64 40}
!20 = !{!"_ZTSN6Aquila9GeneratorE", !12, i64 0, !17, i64 40, !17, i64 48, !17, i64 56}
!21 = !{!22, !17, i64 64}
!22 = !{!"_ZTSN6Aquila17TriangleGeneratorE", !20, i64 0, !17, i64 64}
!23 = !{!20, !17, i64 48}
!24 = distinct !{!24, !25}
!25 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN6Aquila17TriangleGenerator8generateEm(ptr noundef nonnull align 8 dereferenceable(72) %0, i64 noundef %1) unnamed_addr #0 align 2 {
  %3 = getelementptr inbounds i8, ptr %0, i64 8
  tail call void @_ZNSt6vectorIdSaIdEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %1)
  %4 = getelementptr inbounds i8, ptr %0, i64 32
  %5 = load double, ptr %4, align 8, !tbaa !5
  %6 = fdiv double 1.000000e+00, %5
  %7 = getelementptr inbounds i8, ptr %0, i64 40
  %8 = load double, ptr %7, align 8, !tbaa !15
  %9 = fdiv double 1.000000e+00, %8
  %10 = getelementptr inbounds i8, ptr %0, i64 64
  %11 = load double, ptr %10, align 8, !tbaa !17
  %12 = fmul double %11, %9
  %13 = fsub double %9, %12
  %14 = fcmp une double %12, 0.000000e+00
  %15 = getelementptr inbounds i8, ptr %0, i64 48
  %16 = load double, ptr %15, align 8
  %17 = fmul double %16, 2.000000e+00
  %18 = fdiv double %17, %12
  %19 = select i1 %14, double %18, double 0.000000e+00
  %20 = fcmp une double %13, 0.000000e+00
  %21 = fdiv double %17, %13
  %22 = select i1 %20, double %21, double 0.000000e+00
  %.not = icmp eq i64 %1, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

._crit_edge:                                      ; preds = %34, %2
  ret void

.lr.ph:                                           ; preds = %2, %34
  %.032 = phi i64 [ %37, %34 ], [ 0, %2 ]
  %.02631 = phi double [ %36, %34 ], [ 0.000000e+00, %2 ]
  %23 = fcmp ogt double %.02631, %9
  %24 = fsub double %.02631, %9
  %.1 = select i1 %23, double %24, double %.02631
  %25 = fcmp olt double %.1, %12
  %26 = load double, ptr %15, align 8, !tbaa !19
  br i1 %25, label %27, label %30

27:                                               ; preds = %.lr.ph
  %28 = fneg double %26
  %29 = tail call double @llvm.fmuladd.f64(double %.1, double %19, double %28)
  br label %34

30:                                               ; preds = %.lr.ph
  %31 = fsub double %.1, %12
  %32 = fneg double %31
  %33 = tail call double @llvm.fmuladd.f64(double %32, double %22, double %26)
  br label %34

34:                                               ; preds = %30, %27
  %.sink = phi double [ %33, %30 ], [ %29, %27 ]
  %35 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %.032) #3
  store double %.sink, ptr %35, align 8, !tbaa !20
  %36 = fadd double %6, %.1
  %37 = add nuw i64 %.032, 1
  %exitcond.not = icmp eq i64 %37, %1
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !21
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !14, i64 32}
!6 = !{!"_ZTSN6Aquila12SignalSourceE", !7, i64 8, !14, i64 32}
!7 = !{!"_ZTSSt6vectorIdSaIdEE", !8, i64 0}
!8 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !9, i64 0}
!9 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !10, i64 0}
!10 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !11, i64 0, !11, i64 8, !11, i64 16}
!11 = !{!"any pointer", !12, i64 0}
!12 = !{!"omnipotent char", !13, i64 0}
!13 = !{!"Simple C++ TBAA"}
!14 = !{!"double", !12, i64 0}
!15 = !{!16, !14, i64 40}
!16 = !{!"_ZTSN6Aquila9GeneratorE", !6, i64 0, !14, i64 40, !14, i64 48, !14, i64 56}
!17 = !{!18, !14, i64 64}
!18 = !{!"_ZTSN6Aquila17TriangleGeneratorE", !16, i64 0, !14, i64 64}
!19 = !{!16, !14, i64 48}
!20 = !{!14, !14, i64 0}
!21 = distinct !{!21, !22}
!22 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass