; LLVM IR from UtkarshPathrabe/Competitive-Coding :: Codeforces/Codeforces Round 280 (Div 2) (Vanya and Computer Game)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }

@attack = external dso_local global %"class.std::vector", align 8
@_ZSt3cin = external global %"class.std::basic_istream", align 8
@.str = external hidden unnamed_addr constant [6 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [6 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [7 x i8], align 1

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i64, align 8
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  store i32 0, ptr %1, align 4
  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #5
  %10 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 8 dereferenceable(8) %3)
  %11 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16) %10, ptr noundef nonnull align 8 dereferenceable(8) %4)
  %12 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16) %11, ptr noundef nonnull align 8 dereferenceable(8) %5)
  %13 = load i64, ptr %4, align 8, !tbaa !5
  store i64 %13, ptr %8, align 8, !tbaa !5
  %14 = load i64, ptr %5, align 8, !tbaa !5
  store i64 %14, ptr %9, align 8, !tbaa !5
  store i64 0, ptr %6, align 8, !tbaa !5
  br label %15

15:                                               ; preds = %48, %0
  %16 = load i64, ptr %6, align 8, !tbaa !5
  %17 = load i64, ptr %4, align 8, !tbaa !5
  %18 = load i64, ptr %5, align 8, !tbaa !5
  %19 = add nsw i64 %17, %18
  %20 = icmp slt i64 %16, %19
  br i1 %20, label %21, label %51

21:                                               ; preds = %15
  %22 = load i64, ptr %8, align 8, !tbaa !5
  %23 = load i64, ptr %9, align 8, !tbaa !5
  %24 = icmp slt i64 %22, %23
  br i1 %24, label %25, label %29

25:                                               ; preds = %21
  call void @_ZNSt6vectorIxSaIxEE9push_backERKx(ptr noundef nonnull align 8 dereferenceable(24) @attack, ptr noundef nonnull align 8 dereferenceable(8) %8)
  %26 = load i64, ptr %4, align 8, !tbaa !5
  %27 = load i64, ptr %8, align 8, !tbaa !5
  %28 = add nsw i64 %27, %26
  store i64 %28, ptr %8, align 8, !tbaa !5
  br label %47

29:                                               ; preds = %21
  %30 = load i64, ptr %8, align 8, !tbaa !5
  %31 = load i64, ptr %9, align 8, !tbaa !5
  %32 = icmp sgt i64 %30, %31
  br i1 %32, label %33, label %37

33:                                               ; preds = %29
  call void @_ZNSt6vectorIxSaIxEE9push_backERKx(ptr noundef nonnull align 8 dereferenceable(24) @attack, ptr noundef nonnull align 8 dereferenceable(8) %9)
  %34 = load i64, ptr %5, align 8, !tbaa !5
  %35 = load i64, ptr %9, align 8, !tbaa !5
  %36 = add nsw i64 %35, %34
  store i64 %36, ptr %9, align 8, !tbaa !5
  br label %46

37:                                               ; preds = %29
  call void @_ZNSt6vectorIxSaIxEE9push_backERKx(ptr noundef nonnull align 8 dereferenceable(24) @attack, ptr noundef nonnull align 8 dereferenceable(8) %8)
  call void @_ZNSt6vectorIxSaIxEE9push_backERKx(ptr noundef nonnull align 8 dereferenceable(24) @attack, ptr noundef nonnull align 8 dereferenceable(8) %9)
  %38 = load i64, ptr %6, align 8, !tbaa !5
  %39 = add nsw i64 %38, 1
  store i64 %39, ptr %6, align 8, !tbaa !5
  %40 = load i64, ptr %4, align 8, !tbaa !5
  %41 = load i64, ptr %8, align 8, !tbaa !5
  %42 = add nsw i64 %41, %40
  store i64 %42, ptr %8, align 8, !tbaa !5
  %43 = load i64, ptr %5, align 8, !tbaa !5
  %44 = load i64, ptr %9, align 8, !tbaa !5
  %45 = add nsw i64 %44, %43
  store i64 %45, ptr %9, align 8, !tbaa !5
  br label %46

46:                                               ; preds = %37, %33
  br label %47

47:                                               ; preds = %46, %25
  br label %48

48:                                               ; preds = %47
  %49 = load i64, ptr %6, align 8, !tbaa !5
  %50 = add nsw i64 %49, 1
  store i64 %50, ptr %6, align 8, !tbaa !5
  br label %15, !llvm.loop !9

51:                                               ; preds = %15
  store i64 0, ptr %2, align 8, !tbaa !5
  br label %52

52:                                               ; preds = %86, %51
  %53 = load i64, ptr %2, align 8, !tbaa !5
  %54 = load i64, ptr %3, align 8, !tbaa !5
  %55 = icmp slt i64 %53, %54
  br i1 %55, label %56, label %89

56:                                               ; preds = %52
  %57 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 8 dereferenceable(8) %7)
  %58 = load i64, ptr %7, align 8, !tbaa !5
  %59 = sub nsw i64 %58, 1
  store i64 %59, ptr %7, align 8, !tbaa !5
  %60 = load i64, ptr %7, align 8, !tbaa !5
  %61 = load i64, ptr %4, align 8, !tbaa !5
  %62 = load i64, ptr %5, align 8, !tbaa !5
  %63 = add nsw i64 %61, %62
  %64 = srem i64 %60, %63
  store i64 %64, ptr %6, align 8, !tbaa !5
  %65 = load i64, ptr %6, align 8, !tbaa !5
  %66 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @attack, i64 noundef %65) #5
  %67 = load i64, ptr %66, align 8, !tbaa !5
  %68 = load i64, ptr %4, align 8, !tbaa !5
  %69 = srem i64 %67, %68
  %70 = icmp eq i64 %69, 0
  br i1 %70, label %71, label %83

71:                                               ; preds = %56
  %72 = load i64, ptr %6, align 8, !tbaa !5
  %73 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @attack, i64 noundef %72) #5
  %74 = load i64, ptr %73, align 8, !tbaa !5
  %75 = load i64, ptr %5, align 8, !tbaa !5
  %76 = srem i64 %74, %75
  %77 = icmp eq i64 %76, 0
  br i1 %77, label %78, label %80

78:                                               ; preds = %71
  %79 = call i32 (ptr, ...) @printf(ptr noundef @.str)
  br label %82

80:                                               ; preds = %71
  %81 = call i32 (ptr, ...) @printf(ptr noundef @.str.2)
  br label %82

82:                                               ; preds = %80, %78
  br label %85

83:                                               ; preds = %56
  %84 = call i32 (ptr, ...) @printf(ptr noundef @.str.3)
  br label %85

85:                                               ; preds = %83, %82
  br label %86

86:                                               ; preds = %85
  %87 = load i64, ptr %2, align 8, !tbaa !5
  %88 = add nsw i64 %87, 1
  store i64 %88, ptr %2, align 8, !tbaa !5
  br label %52, !llvm.loop !11

89:                                               ; preds = %52
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #5
  ret i32 0
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(8)) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIxSaIxEE9push_backERKx(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(8)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #3 align 2

declare i32 @printf(ptr noundef, ...) #4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }

@attack = external dso_local global %"class.std::vector", align 8
@_ZSt3cin = external global %"class.std::basic_istream", align 8
@.str = external hidden unnamed_addr constant [6 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [6 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [7 x i8], align 1

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() local_unnamed_addr #0 {
  %1 = alloca i64, align 8
  %2 = alloca i64, align 8
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %1) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #5
  %7 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 8 dereferenceable(8) %1)
  %8 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16) %7, ptr noundef nonnull align 8 dereferenceable(8) %2)
  %9 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16) %8, ptr noundef nonnull align 8 dereferenceable(8) %3)
  %10 = load i64, ptr %2, align 8, !tbaa !5
  store i64 %10, ptr %5, align 8, !tbaa !5
  %11 = load i64, ptr %3, align 8, !tbaa !5
  store i64 %11, ptr %6, align 8, !tbaa !5
  %12 = add nsw i64 %11, %10
  %13 = icmp sgt i64 %12, 0
  br i1 %13, label %.lr.ph, label %.preheader

.preheader:                                       ; preds = %37, %0
  %14 = load i64, ptr %1, align 8, !tbaa !5
  %15 = icmp sgt i64 %14, 0
  br i1 %15, label %.lr.ph12, label %._crit_edge

.lr.ph:                                           ; preds = %0, %37
  %.010 = phi i64 [ %40, %37 ], [ 0, %0 ]
  %16 = load i64, ptr %5, align 8, !tbaa !5
  %17 = load i64, ptr %6, align 8, !tbaa !5
  %18 = icmp slt i64 %16, %17
  br i1 %18, label %19, label %23

19:                                               ; preds = %.lr.ph
  call void @_ZNSt6vectorIxSaIxEE9push_backERKx(ptr noundef nonnull align 8 dereferenceable(24) @attack, ptr noundef nonnull align 8 dereferenceable(8) %5)
  %20 = load i64, ptr %2, align 8, !tbaa !5
  %21 = load i64, ptr %5, align 8, !tbaa !5
  %22 = add nsw i64 %21, %20
  store i64 %22, ptr %5, align 8, !tbaa !5
  %.pre13 = load i64, ptr %3, align 8, !tbaa !5
  br label %37

23:                                               ; preds = %.lr.ph
  %24 = icmp sgt i64 %16, %17
  br i1 %24, label %25, label %29

25:                                               ; preds = %23
  call void @_ZNSt6vectorIxSaIxEE9push_backERKx(ptr noundef nonnull align 8 dereferenceable(24) @attack, ptr noundef nonnull align 8 dereferenceable(8) %6)
  %26 = load i64, ptr %3, align 8, !tbaa !5
  %27 = load i64, ptr %6, align 8, !tbaa !5
  %28 = add nsw i64 %27, %26
  store i64 %28, ptr %6, align 8, !tbaa !5
  %.pre = load i64, ptr %2, align 8, !tbaa !5
  br label %37

29:                                               ; preds = %23
  call void @_ZNSt6vectorIxSaIxEE9push_backERKx(ptr noundef nonnull align 8 dereferenceable(24) @attack, ptr noundef nonnull align 8 dereferenceable(8) %5)
  call void @_ZNSt6vectorIxSaIxEE9push_backERKx(ptr noundef nonnull align 8 dereferenceable(24) @attack, ptr noundef nonnull align 8 dereferenceable(8) %6)
  %30 = add nsw i64 %.010, 1
  %31 = load i64, ptr %2, align 8, !tbaa !5
  %32 = load i64, ptr %5, align 8, !tbaa !5
  %33 = add nsw i64 %32, %31
  store i64 %33, ptr %5, align 8, !tbaa !5
  %34 = load i64, ptr %3, align 8, !tbaa !5
  %35 = load i64, ptr %6, align 8, !tbaa !5
  %36 = add nsw i64 %35, %34
  store i64 %36, ptr %6, align 8, !tbaa !5
  br label %37

37:                                               ; preds = %19, %29, %25
  %38 = phi i64 [ %.pre13, %19 ], [ %26, %25 ], [ %34, %29 ]
  %39 = phi i64 [ %20, %19 ], [ %.pre, %25 ], [ %31, %29 ]
  %.1 = phi i64 [ %.010, %19 ], [ %.010, %25 ], [ %30, %29 ]
  %40 = add nsw i64 %.1, 1
  %41 = add nsw i64 %38, %39
  %42 = icmp slt i64 %40, %41
  br i1 %42, label %.lr.ph, label %.preheader, !llvm.loop !9

.lr.ph12:                                         ; preds = %.preheader, %61
  %.0711 = phi i64 [ %63, %61 ], [ 0, %.preheader ]
  %43 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 8 dereferenceable(8) %4)
  %44 = load i64, ptr %4, align 8, !tbaa !5
  %45 = add nsw i64 %44, -1
  store i64 %45, ptr %4, align 8, !tbaa !5
  %46 = load i64, ptr %2, align 8, !tbaa !5
  %47 = load i64, ptr %3, align 8, !tbaa !5
  %48 = add nsw i64 %47, %46
  %49 = srem i64 %45, %48
  %50 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @attack, i64 noundef %49) #5
  %51 = load i64, ptr %50, align 8, !tbaa !5
  %52 = load i64, ptr %2, align 8, !tbaa !5
  %53 = srem i64 %51, %52
  %54 = icmp eq i64 %53, 0
  br i1 %54, label %55, label %61

55:                                               ; preds = %.lr.ph12
  %56 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @attack, i64 noundef %49) #5
  %57 = load i64, ptr %56, align 8, !tbaa !5
  %58 = load i64, ptr %3, align 8, !tbaa !5
  %59 = srem i64 %57, %58
  %60 = icmp eq i64 %59, 0
  %.str..str.2 = select i1 %60, ptr @.str, ptr @.str.2
  br label %61

61:                                               ; preds = %.lr.ph12, %55
  %.str.3.sink = phi ptr [ %.str..str.2, %55 ], [ @.str.3, %.lr.ph12 ]
  %62 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) %.str.3.sink)
  %63 = add nuw nsw i64 %.0711, 1
  %64 = load i64, ptr %1, align 8, !tbaa !5
  %65 = icmp slt i64 %63, %64
  br i1 %65, label %.lr.ph12, label %._crit_edge, !llvm.loop !11

._crit_edge:                                      ; preds = %61, %.preheader
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %1) #5
  ret i32 0
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIxSaIxEE9push_backERKx(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #3 align 2

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #4

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass