; LLVM IR from VastoLorde95/Competitive-Programming :: Codeforces/373 Division 1/Problem C/C.ll (Z6updateiixxiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.node = type <{ i32, i32, i8, [3 x i8] }>

@tree = external dso_local global [262144 x %struct.node], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4node7combineERS_S0_(ptr noundef nonnull align 4 dereferenceable(9), ptr noundef nonnull align 4 dereferenceable(9), ptr noundef nonnull align 4 dereferenceable(9)) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z3updiiixx(i32 noundef, i32 noundef, i32 noundef, i64 noundef, i64 noundef) #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z5shiftiii(i32 noundef, i32 noundef, i32 noundef) #2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z6updateiixxiii(i32 noundef %0, i32 noundef %1, i64 noundef %2, i64 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6) #2 {
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  store i32 %0, ptr %8, align 4, !tbaa !5
  store i32 %1, ptr %9, align 4, !tbaa !5
  store i64 %2, ptr %10, align 8, !tbaa !9
  store i64 %3, ptr %11, align 8, !tbaa !9
  store i32 %4, ptr %12, align 4, !tbaa !5
  store i32 %5, ptr %13, align 4, !tbaa !5
  store i32 %6, ptr %14, align 4, !tbaa !5
  %18 = load i32, ptr %8, align 4, !tbaa !5
  %19 = load i32, ptr %14, align 4, !tbaa !5
  %20 = icmp sge i32 %18, %19
  br i1 %20, label %25, label %21

21:                                               ; preds = %7
  %22 = load i32, ptr %13, align 4, !tbaa !5
  %23 = load i32, ptr %9, align 4, !tbaa !5
  %24 = icmp sge i32 %22, %23
  br i1 %24, label %25, label %26

25:                                               ; preds = %21, %7
  br label %75

26:                                               ; preds = %21
  %27 = load i32, ptr %8, align 4, !tbaa !5
  %28 = load i32, ptr %13, align 4, !tbaa !5
  %29 = icmp sle i32 %27, %28
  br i1 %29, label %30, label %40

30:                                               ; preds = %26
  %31 = load i32, ptr %14, align 4, !tbaa !5
  %32 = load i32, ptr %9, align 4, !tbaa !5
  %33 = icmp sle i32 %31, %32
  br i1 %33, label %34, label %40

34:                                               ; preds = %30
  %35 = load i32, ptr %12, align 4, !tbaa !5
  %36 = load i32, ptr %13, align 4, !tbaa !5
  %37 = load i32, ptr %14, align 4, !tbaa !5
  %38 = load i64, ptr %10, align 8, !tbaa !9
  %39 = load i64, ptr %11, align 8, !tbaa !9
  call void @_Z3updiiixx(i32 noundef %35, i32 noundef %36, i32 noundef %37, i64 noundef %38, i64 noundef %39)
  br label %75

40:                                               ; preds = %30, %26
  %41 = load i32, ptr %12, align 4, !tbaa !5
  %42 = load i32, ptr %13, align 4, !tbaa !5
  %43 = load i32, ptr %14, align 4, !tbaa !5
  call void @_Z5shiftiii(i32 noundef %41, i32 noundef %42, i32 noundef %43)
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  %44 = load i32, ptr %12, align 4, !tbaa !5
  %45 = shl i32 %44, 1
  store i32 %45, ptr %15, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #3
  %46 = load i32, ptr %15, align 4, !tbaa !5
  %47 = add nsw i32 %46, 1
  store i32 %47, ptr %16, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #3
  %48 = load i32, ptr %13, align 4, !tbaa !5
  %49 = load i32, ptr %14, align 4, !tbaa !5
  %50 = add nsw i32 %48, %49
  %51 = ashr i32 %50, 1
  store i32 %51, ptr %17, align 4, !tbaa !5
  %52 = load i32, ptr %8, align 4, !tbaa !5
  %53 = load i32, ptr %9, align 4, !tbaa !5
  %54 = load i64, ptr %10, align 8, !tbaa !9
  %55 = load i64, ptr %11, align 8, !tbaa !9
  %56 = load i32, ptr %15, align 4, !tbaa !5
  %57 = load i32, ptr %13, align 4, !tbaa !5
  %58 = load i32, ptr %17, align 4, !tbaa !5
  call void @_Z6updateiixxiii(i32 noundef %52, i32 noundef %53, i64 noundef %54, i64 noundef %55, i32 noundef %56, i32 noundef %57, i32 noundef %58)
  %59 = load i32, ptr %8, align 4, !tbaa !5
  %60 = load i32, ptr %9, align 4, !tbaa !5
  %61 = load i64, ptr %10, align 8, !tbaa !9
  %62 = load i64, ptr %11, align 8, !tbaa !9
  %63 = load i32, ptr %16, align 4, !tbaa !5
  %64 = load i32, ptr %17, align 4, !tbaa !5
  %65 = load i32, ptr %14, align 4, !tbaa !5
  call void @_Z6updateiixxiii(i32 noundef %59, i32 noundef %60, i64 noundef %61, i64 noundef %62, i32 noundef %63, i32 noundef %64, i32 noundef %65)
  %66 = load i32, ptr %12, align 4, !tbaa !5
  %67 = sext i32 %66 to i64
  %68 = getelementptr inbounds [262144 x %struct.node], ptr @tree, i64 0, i64 %67
  %69 = load i32, ptr %15, align 4, !tbaa !5
  %70 = sext i32 %69 to i64
  %71 = getelementptr inbounds [262144 x %struct.node], ptr @tree, i64 0, i64 %70
  %72 = load i32, ptr %16, align 4, !tbaa !5
  %73 = sext i32 %72 to i64
  %74 = getelementptr inbounds [262144 x %struct.node], ptr @tree, i64 0, i64 %73
  call void @_ZN4node7combineERS_S0_(ptr noundef nonnull align 4 dereferenceable(9) %68, ptr noundef nonnull align 4 dereferenceable(9) %71, ptr noundef nonnull align 4 dereferenceable(9) %74)
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  br label %75

75:                                               ; preds = %40, %34, %25
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.node = type <{ i32, i32, i8, [3 x i8] }>

@tree = external dso_local global [262144 x %struct.node], align 16

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4node7combineERS_S0_(ptr noundef nonnull align 4 dereferenceable(9), ptr noundef nonnull align 4 dereferenceable(9), ptr noundef nonnull align 4 dereferenceable(9)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z3updiiixx(i32 noundef, i32 noundef, i32 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z5shiftiii(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z6updateiixxiii(i32 noundef %0, i32 noundef %1, i64 noundef %2, i64 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6) local_unnamed_addr #1 {
  %.not = icmp slt i32 %0, %6
  %.not40 = icmp slt i32 %5, %1
  %or.cond = and i1 %.not40, %.not
  br i1 %or.cond, label %8, label %common.ret44

8:                                                ; preds = %7
  %.not41 = icmp sgt i32 %0, %5
  %.not42 = icmp sgt i32 %6, %1
  %or.cond43 = or i1 %.not41, %.not42
  br i1 %or.cond43, label %10, label %9

9:                                                ; preds = %8
  tail call void @_Z3updiiixx(i32 noundef %4, i32 noundef %5, i32 noundef %6, i64 noundef %2, i64 noundef %3)
  br label %common.ret44

common.ret44:                                     ; preds = %7, %9, %10
  ret void

10:                                               ; preds = %8
  tail call void @_Z5shiftiii(i32 noundef %4, i32 noundef %5, i32 noundef %6)
  %11 = shl i32 %4, 1
  %12 = or disjoint i32 %11, 1
  %13 = add nsw i32 %6, %5
  %14 = ashr i32 %13, 1
  tail call void @_Z6updateiixxiii(i32 noundef %0, i32 noundef %1, i64 noundef %2, i64 noundef %3, i32 noundef %11, i32 noundef %5, i32 noundef %14)
  tail call void @_Z6updateiixxiii(i32 noundef %0, i32 noundef %1, i64 noundef %2, i64 noundef %3, i32 noundef %12, i32 noundef %14, i32 noundef %6)
  %15 = sext i32 %4 to i64
  %16 = getelementptr inbounds [262144 x %struct.node], ptr @tree, i64 0, i64 %15
  %17 = sext i32 %11 to i64
  %18 = getelementptr inbounds [262144 x %struct.node], ptr @tree, i64 0, i64 %17
  %19 = sext i32 %12 to i64
  %20 = getelementptr inbounds [262144 x %struct.node], ptr @tree, i64 0, i64 %19
  tail call void @_ZN4node7combineERS_S0_(ptr noundef nonnull align 4 dereferenceable(9) %16, ptr noundef nonnull align 4 dereferenceable(9) %18, ptr noundef nonnull align 4 dereferenceable(9) %20)
  br label %common.ret44
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass