; LLVM IR from stan-dev/math :: lib/tbb_2020.3/src/test/test_malloc_overload.ll (Z12CheckPvallocPFPvmEPFvS_E)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.17 = external hidden unnamed_addr constant [96 x i8], align 1
@.str.20 = external hidden unnamed_addr constant [32 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z11ReportErrorPKciS0_S0_(ptr noundef, i32 noundef, ptr noundef, ptr noundef) #1

; Function Attrs: mustprogress uwtable
declare hidden void @_ZL23scalableMallocCheckSizePvm(ptr noundef, i64 noundef) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef zeroext i1 @_ZL10is_alignedIPvEbT_m(ptr noundef, i64 noundef) #2

; Function Attrs: nounwind
declare i64 @sysconf(i32 noundef) #3

; Function Attrs: mustprogress uwtable
define dso_local void @_Z12CheckPvallocPFPvmEPFvS_E(ptr noundef %0, ptr noundef %1) #1 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca ptr, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #4
  %9 = call i64 @sysconf(i32 noundef 30) #4
  store i64 %9, ptr %5, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #4
  %10 = call noundef i32 @_ZL7alignUpIjET_S0_m(i32 noundef 8129, i64 noundef 16384)
  %11 = add i32 %10, 1
  %12 = zext i32 %11 to i64
  store i64 %12, ptr %6, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #4
  store i64 0, ptr %7, align 8, !tbaa !9
  br label %13

13:                                               ; preds = %41, %2
  %14 = load i64, ptr %7, align 8, !tbaa !9
  %15 = load i64, ptr %6, align 8, !tbaa !9
  %16 = icmp ule i64 %14, %15
  br i1 %16, label %18, label %17

17:                                               ; preds = %13
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #4
  br label %45

18:                                               ; preds = %13
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #4
  %19 = load ptr, ptr %3, align 8, !tbaa !5
  %20 = load i64, ptr %7, align 8, !tbaa !9
  %21 = call noundef ptr %19(i64 noundef %20)
  store ptr %21, ptr %8, align 8, !tbaa !5
  %22 = load ptr, ptr %8, align 8, !tbaa !5
  %23 = load i64, ptr %7, align 8, !tbaa !9
  %24 = icmp ne i64 %23, 0
  br i1 %24, label %25, label %29

25:                                               ; preds = %18
  %26 = load i64, ptr %7, align 8, !tbaa !9
  %27 = load i64, ptr %5, align 8, !tbaa !9
  %28 = call noundef i64 @_ZL7alignUpImET_S0_m(i64 noundef %26, i64 noundef %27)
  br label %31

29:                                               ; preds = %18
  %30 = load i64, ptr %5, align 8, !tbaa !9
  br label %31

31:                                               ; preds = %29, %25
  %32 = phi i64 [ %28, %25 ], [ %30, %29 ]
  call void @_ZL23scalableMallocCheckSizePvm(ptr noundef %22, i64 noundef %32)
  %33 = load ptr, ptr %8, align 8, !tbaa !5
  %34 = load i64, ptr %5, align 8, !tbaa !9
  %35 = call noundef zeroext i1 @_ZL10is_alignedIPvEbT_m(ptr noundef %33, i64 noundef %34)
  br i1 %35, label %36, label %37

36:                                               ; preds = %31
  br label %38

37:                                               ; preds = %31
  call void @_Z11ReportErrorPKciS0_S0_(ptr noundef @.str.17, i32 noundef 249, ptr noundef @.str.20, ptr noundef null)
  br label %38

38:                                               ; preds = %37, %36
  %39 = load ptr, ptr %4, align 8, !tbaa !5
  %40 = load ptr, ptr %8, align 8, !tbaa !5
  call void %39(ptr noundef %40)
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #4
  br label %41

41:                                               ; preds = %38
  %42 = load i64, ptr %6, align 8, !tbaa !9
  %43 = load i64, ptr %7, align 8, !tbaa !9
  %44 = add i64 %43, %42
  store i64 %44, ptr %7, align 8, !tbaa !9
  br label %13, !llvm.loop !11

45:                                               ; preds = %17
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #4
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i32 @_ZL7alignUpIjET_S0_m(i32 noundef, i64 noundef) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i64 @_ZL7alignUpImET_S0_m(i64 noundef, i64 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.17 = external hidden unnamed_addr constant [96 x i8], align 1
@.str.20 = external hidden unnamed_addr constant [32 x i8], align 1

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z11ReportErrorPKciS0_S0_(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
declare hidden void @_ZL23scalableMallocCheckSizePvm(ptr noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef zeroext i1 @_ZL10is_alignedIPvEbT_m(ptr noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: nounwind
declare i64 @sysconf(i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z12CheckPvallocPFPvmEPFvS_E(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
  %3 = tail call i64 @sysconf(i32 noundef 30) #3
  %4 = tail call noundef i32 @_ZL7alignUpIjET_S0_m(i32 noundef 8129, i64 noundef 16384)
  %5 = add i32 %4, 1
  %6 = zext i32 %5 to i64
  br label %8

7:                                                ; preds = %16
  ret void

8:                                                ; preds = %2, %16
  %.016 = phi i64 [ 0, %2 ], [ %17, %16 ]
  %9 = tail call noundef ptr %0(i64 noundef %.016)
  %.not15 = icmp eq i64 %.016, 0
  br i1 %.not15, label %12, label %10

10:                                               ; preds = %8
  %11 = tail call noundef i64 @_ZL7alignUpImET_S0_m(i64 noundef %.016, i64 noundef %3)
  br label %12

12:                                               ; preds = %8, %10
  %13 = phi i64 [ %11, %10 ], [ %3, %8 ]
  tail call void @_ZL23scalableMallocCheckSizePvm(ptr noundef %9, i64 noundef %13)
  %14 = tail call noundef zeroext i1 @_ZL10is_alignedIPvEbT_m(ptr noundef %9, i64 noundef %3)
  br i1 %14, label %16, label %15

15:                                               ; preds = %12
  tail call void @_Z11ReportErrorPKciS0_S0_(ptr noundef nonnull @.str.17, i32 noundef 249, ptr noundef nonnull @.str.20, ptr noundef null)
  br label %16

16:                                               ; preds = %12, %15
  tail call void %1(ptr noundef %9)
  %17 = add nuw nsw i64 %.016, %6
  br i1 %.not15, label %8, label %7, !llvm.loop !5
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i32 @_ZL7alignUpIjET_S0_m(i32 noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i64 @_ZL7alignUpImET_S0_m(i64 noundef, i64 noundef) local_unnamed_addr #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,LoopRotatePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass