; LLVM IR from VastoLorde95/Competitive-Programming :: Codeforces/342 Division 2/Problem D/D.ll (Z2goiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.std::pair" = type { i32, i32 }

@n = external dso_local global %"class.std::vector", align 8
@dp = external dso_local global [100100 x [2 x [2 x i32]]], align 16
@v = external dso_local global [100100 x [2 x [2 x %"struct.std::pair"]]], align 16

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z2goiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #0 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca %"struct.std::pair", align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca %"struct.std::pair", align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  %25 = alloca %"struct.std::pair", align 4
  store i32 %0, ptr %6, align 4, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !5
  %26 = load i32, ptr %6, align 4, !tbaa !5
  %27 = sext i32 %26 to i64
  %28 = getelementptr inbounds [100100 x [2 x [2 x i32]]], ptr @dp, i64 0, i64 %27
  %29 = load i32, ptr %8, align 4, !tbaa !5
  %30 = sext i32 %29 to i64
  %31 = getelementptr inbounds [2 x [2 x i32]], ptr %28, i64 0, i64 %30
  %32 = load i32, ptr %9, align 4, !tbaa !5
  %33 = sext i32 %32 to i64
  %34 = getelementptr inbounds [2 x i32], ptr %31, i64 0, i64 %33
  %35 = load i32, ptr %34, align 4, !tbaa !5
  %36 = icmp ne i32 %35, -1
  br i1 %36, label %37, label %48

37:                                               ; preds = %4
  %38 = load i32, ptr %6, align 4, !tbaa !5
  %39 = sext i32 %38 to i64
  %40 = getelementptr inbounds [100100 x [2 x [2 x i32]]], ptr @dp, i64 0, i64 %39
  %41 = load i32, ptr %8, align 4, !tbaa !5
  %42 = sext i32 %41 to i64
  %43 = getelementptr inbounds [2 x [2 x i32]], ptr %40, i64 0, i64 %42
  %44 = load i32, ptr %9, align 4, !tbaa !5
  %45 = sext i32 %44 to i64
  %46 = getelementptr inbounds [2 x i32], ptr %43, i64 0, i64 %45
  %47 = load i32, ptr %46, align 4, !tbaa !5
  store i32 %47, ptr %5, align 4
  br label %348

48:                                               ; preds = %4
  %49 = load i32, ptr %6, align 4, !tbaa !5
  %50 = add nsw i32 %49, 1
  %51 = load i32, ptr %7, align 4, !tbaa !5
  %52 = icmp eq i32 %50, %51
  br i1 %52, label %53, label %151

53:                                               ; preds = %48
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  store i32 0, ptr %10, align 4, !tbaa !5
  br label %54

54:                                               ; preds = %136, %53
  %55 = load i32, ptr %10, align 4, !tbaa !5
  %56 = icmp slt i32 %55, 10
  br i1 %56, label %58, label %57

57:                                               ; preds = %54
  store i32 2, ptr %11, align 4
  br label %139

58:                                               ; preds = %54
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  store i32 0, ptr %12, align 4, !tbaa !5
  br label %59

59:                                               ; preds = %130, %58
  %60 = load i32, ptr %12, align 4, !tbaa !5
  %61 = icmp slt i32 %60, 10
  br i1 %61, label %63, label %62

62:                                               ; preds = %59
  store i32 5, ptr %11, align 4
  br label %133

63:                                               ; preds = %59
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  %64 = load i32, ptr %10, align 4, !tbaa !5
  %65 = load i32, ptr %12, align 4, !tbaa !5
  %66 = add nsw i32 %64, %65
  %67 = load i32, ptr %8, align 4, !tbaa !5
  %68 = add nsw i32 %66, %67
  store i32 %68, ptr %13, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  %69 = load i32, ptr %10, align 4, !tbaa !5
  %70 = load i32, ptr %12, align 4, !tbaa !5
  %71 = add nsw i32 %69, %70
  %72 = load i32, ptr %9, align 4, !tbaa !5
  %73 = add nsw i32 %71, %72
  store i32 %73, ptr %14, align 4, !tbaa !5
  %74 = load i32, ptr %13, align 4, !tbaa !5
  %75 = srem i32 %74, 10
  %76 = load i32, ptr %6, align 4, !tbaa !5
  %77 = sext i32 %76 to i64
  %78 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %77) #3
  %79 = load i32, ptr %78, align 4, !tbaa !5
  %80 = icmp ne i32 %75, %79
  br i1 %80, label %99, label %81

81:                                               ; preds = %63
  %82 = load i32, ptr %13, align 4, !tbaa !5
  %83 = sdiv i32 %82, 10
  %84 = load i32, ptr %8, align 4, !tbaa !5
  %85 = icmp ne i32 %83, %84
  br i1 %85, label %99, label %86

86:                                               ; preds = %81
  %87 = load i32, ptr %14, align 4, !tbaa !5
  %88 = srem i32 %87, 10
  %89 = load i32, ptr %7, align 4, !tbaa !5
  %90 = sext i32 %89 to i64
  %91 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %90) #3
  %92 = load i32, ptr %91, align 4, !tbaa !5
  %93 = icmp ne i32 %88, %92
  br i1 %93, label %99, label %94

94:                                               ; preds = %86
  %95 = load i32, ptr %14, align 4, !tbaa !5
  %96 = sdiv i32 %95, 10
  %97 = load i32, ptr %8, align 4, !tbaa !5
  %98 = icmp ne i32 %96, %97
  br i1 %98, label %99, label %100

99:                                               ; preds = %94, %86, %81, %63
  store i32 7, ptr %11, align 4
  br label %128

100:                                              ; preds = %94
  %101 = load i32, ptr %6, align 4, !tbaa !5
  %102 = icmp eq i32 %101, 0
  br i1 %102, label %103, label %107

103:                                              ; preds = %100
  %104 = load i32, ptr %10, align 4, !tbaa !5
  %105 = icmp eq i32 %104, 0
  br i1 %105, label %106, label %107

106:                                              ; preds = %103
  store i32 7, ptr %11, align 4
  br label %128

107:                                              ; preds = %103, %100
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #3
  %108 = call i64 @_ZSt9make_pairIRiS0_ESt4pairINSt25__strip_reference_wrapperINSt5decayIT_E4typeEE6__typeENS2_INS3_IT0_E4typeEE6__typeEEOS4_OS9_(ptr noundef nonnull align 4 dereferenceable(4) %10, ptr noundef nonnull align 4 dereferenceable(4) %12)
  store i64 %108, ptr %15, align 4
  %109 = load i32, ptr %6, align 4, !tbaa !5
  %110 = sext i32 %109 to i64
  %111 = getelementptr inbounds [100100 x [2 x [2 x %"struct.std::pair"]]], ptr @v, i64 0, i64 %110
  %112 = load i32, ptr %8, align 4, !tbaa !5
  %113 = sext i32 %112 to i64
  %114 = getelementptr inbounds [2 x [2 x %"struct.std::pair"]], ptr %111, i64 0, i64 %113
  %115 = load i32, ptr %9, align 4, !tbaa !5
  %116 = sext i32 %115 to i64
  %117 = getelementptr inbounds [2 x %"struct.std::pair"], ptr %114, i64 0, i64 %116
  %118 = call noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt4pairIiiEaSEOS0_(ptr noundef nonnull align 4 dereferenceable(8) %117, ptr noundef nonnull align 4 dereferenceable(8) %15) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #3
  %119 = load i32, ptr %6, align 4, !tbaa !5
  %120 = sext i32 %119 to i64
  %121 = getelementptr inbounds [100100 x [2 x [2 x i32]]], ptr @dp, i64 0, i64 %120
  %122 = load i32, ptr %8, align 4, !tbaa !5
  %123 = sext i32 %122 to i64
  %124 = getelementptr inbounds [2 x [2 x i32]], ptr %121, i64 0, i64 %123
  %125 = load i32, ptr %9, align 4, !tbaa !5
  %126 = sext i32 %125 to i64
  %127 = getelementptr inbounds [2 x i32], ptr %124, i64 0, i64 %126
  store i32 1, ptr %127, align 4, !tbaa !5
  store i32 1, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %128

128:                                              ; preds = %107, %106, %99
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  %129 = load i32, ptr %11, align 4
  switch i32 %129, label %133 [
    i32 7, label %130
  ]

130:                                              ; preds = %128
  %131 = load i32, ptr %12, align 4, !tbaa !5
  %132 = add nsw i32 %131, 1
  store i32 %132, ptr %12, align 4, !tbaa !5
  br label %59, !llvm.loop !9

133:                                              ; preds = %128, %62
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  %134 = load i32, ptr %11, align 4
  switch i32 %134, label %139 [
    i32 5, label %135
  ]

135:                                              ; preds = %133
  br label %136

136:                                              ; preds = %135
  %137 = load i32, ptr %10, align 4, !tbaa !5
  %138 = add nsw i32 %137, 1
  store i32 %138, ptr %10, align 4, !tbaa !5
  br label %54, !llvm.loop !11

139:                                              ; preds = %133, %57
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  %140 = load i32, ptr %11, align 4
  switch i32 %140, label %350 [
    i32 2, label %141
    i32 1, label %348
  ]

141:                                              ; preds = %139
  %142 = load i32, ptr %6, align 4, !tbaa !5
  %143 = sext i32 %142 to i64
  %144 = getelementptr inbounds [100100 x [2 x [2 x i32]]], ptr @dp, i64 0, i64 %143
  %145 = load i32, ptr %8, align 4, !tbaa !5
  %146 = sext i32 %145 to i64
  %147 = getelementptr inbounds [2 x [2 x i32]], ptr %144, i64 0, i64 %146
  %148 = load i32, ptr %9, align 4, !tbaa !5
  %149 = sext i32 %148 to i64
  %150 = getelementptr inbounds [2 x i32], ptr %147, i64 0, i64 %149
  store i32 0, ptr %150, align 4, !tbaa !5
  store i32 0, ptr %5, align 4
  br label %348

151:                                              ; preds = %48
  %152 = load i32, ptr %6, align 4, !tbaa !5
  %153 = load i32, ptr %7, align 4, !tbaa !5
  %154 = icmp eq i32 %152, %153
  br i1 %154, label %155, label %224

155:                                              ; preds = %151
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #3
  store i32 0, ptr %16, align 4, !tbaa !5
  br label %156

156:                                              ; preds = %209, %155
  %157 = load i32, ptr %16, align 4, !tbaa !5
  %158 = icmp slt i32 %157, 10
  br i1 %158, label %160, label %159

159:                                              ; preds = %156
  store i32 8, ptr %11, align 4
  br label %212

160:                                              ; preds = %156
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #3
  %161 = load i32, ptr %16, align 4, !tbaa !5
  %162 = load i32, ptr %16, align 4, !tbaa !5
  %163 = add nsw i32 %161, %162
  %164 = load i32, ptr %9, align 4, !tbaa !5
  %165 = add nsw i32 %163, %164
  store i32 %165, ptr %17, align 4, !tbaa !5
  %166 = load i32, ptr %17, align 4, !tbaa !5
  %167 = srem i32 %166, 10
  %168 = load i32, ptr %6, align 4, !tbaa !5
  %169 = sext i32 %168 to i64
  %170 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %169) #3
  %171 = load i32, ptr %170, align 4, !tbaa !5
  %172 = icmp ne i32 %167, %171
  br i1 %172, label %178, label %173

173:                                              ; preds = %160
  %174 = load i32, ptr %17, align 4, !tbaa !5
  %175 = sdiv i32 %174, 10
  %176 = load i32, ptr %8, align 4, !tbaa !5
  %177 = icmp ne i32 %175, %176
  br i1 %177, label %178, label %179

178:                                              ; preds = %173, %160
  store i32 10, ptr %11, align 4
  br label %207

179:                                              ; preds = %173
  %180 = load i32, ptr %6, align 4, !tbaa !5
  %181 = icmp eq i32 %180, 0
  br i1 %181, label %182, label %186

182:                                              ; preds = %179
  %183 = load i32, ptr %16, align 4, !tbaa !5
  %184 = icmp eq i32 %183, 0
  br i1 %184, label %185, label %186

185:                                              ; preds = %182
  store i32 10, ptr %11, align 4
  br label %207

186:                                              ; preds = %182, %179
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #3
  %187 = call i64 @_ZSt9make_pairIRiS0_ESt4pairINSt25__strip_reference_wrapperINSt5decayIT_E4typeEE6__typeENS2_INS3_IT0_E4typeEE6__typeEEOS4_OS9_(ptr noundef nonnull align 4 dereferenceable(4) %16, ptr noundef nonnull align 4 dereferenceable(4) %16)
  store i64 %187, ptr %18, align 4
  %188 = load i32, ptr %6, align 4, !tbaa !5
  %189 = sext i32 %188 to i64
  %190 = getelementptr inbounds [100100 x [2 x [2 x %"struct.std::pair"]]], ptr @v, i64 0, i64 %189
  %191 = load i32, ptr %8, align 4, !tbaa !5
  %192 = sext i32 %191 to i64
  %193 = getelementptr inbounds [2 x [2 x %"struct.std::pair"]], ptr %190, i64 0, i64 %192
  %194 = load i32, ptr %9, align 4, !tbaa !5
  %195 = sext i32 %194 to i64
  %196 = getelementptr inbounds [2 x %"struct.std::pair"], ptr %193, i64 0, i64 %195
  %197 = call noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt4pairIiiEaSEOS0_(ptr noundef nonnull align 4 dereferenceable(8) %196, ptr noundef nonnull align 4 dereferenceable(8) %18) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #3
  %198 = load i32, ptr %6, align 4, !tbaa !5
  %199 = sext i32 %198 to i64
  %200 = getelementptr inbounds [100100 x [2 x [2 x i32]]], ptr @dp, i64 0, i64 %199
  %201 = load i32, ptr %8, align 4, !tbaa !5
  %202 = sext i32 %201 to i64
  %203 = getelementptr inbounds [2 x [2 x i32]], ptr %200, i64 0, i64 %202
  %204 = load i32, ptr %9, align 4, !tbaa !5
  %205 = sext i32 %204 to i64
  %206 = getelementptr inbounds [2 x i32], ptr %203, i64 0, i64 %205
  store i32 1, ptr %206, align 4, !tbaa !5
  store i32 1, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %207

207:                                              ; preds = %186, %185, %178
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #3
  %208 = load i32, ptr %11, align 4
  switch i32 %208, label %212 [
    i32 10, label %209
  ]

209:                                              ; preds = %207
  %210 = load i32, ptr %16, align 4, !tbaa !5
  %211 = add nsw i32 %210, 1
  store i32 %211, ptr %16, align 4, !tbaa !5
  br label %156, !llvm.loop !12

212:                                              ; preds = %207, %159
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #3
  %213 = load i32, ptr %11, align 4
  switch i32 %213, label %350 [
    i32 8, label %214
    i32 1, label %348
  ]

214:                                              ; preds = %212
  %215 = load i32, ptr %6, align 4, !tbaa !5
  %216 = sext i32 %215 to i64
  %217 = getelementptr inbounds [100100 x [2 x [2 x i32]]], ptr @dp, i64 0, i64 %216
  %218 = load i32, ptr %8, align 4, !tbaa !5
  %219 = sext i32 %218 to i64
  %220 = getelementptr inbounds [2 x [2 x i32]], ptr %217, i64 0, i64 %219
  %221 = load i32, ptr %9, align 4, !tbaa !5
  %222 = sext i32 %221 to i64
  %223 = getelementptr inbounds [2 x i32], ptr %220, i64 0, i64 %222
  store i32 0, ptr %223, align 4, !tbaa !5
  store i32 0, ptr %5, align 4
  br label %348

224:                                              ; preds = %151
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #3
  store i32 0, ptr %19, align 4, !tbaa !5
  br label %225

225:                                              ; preds = %333, %224
  %226 = load i32, ptr %19, align 4, !tbaa !5
  %227 = icmp slt i32 %226, 10
  br i1 %227, label %229, label %228

228:                                              ; preds = %225
  store i32 11, ptr %11, align 4
  br label %336

229:                                              ; preds = %225
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #3
  store i32 0, ptr %20, align 4, !tbaa !5
  br label %230

230:                                              ; preds = %327, %229
  %231 = load i32, ptr %20, align 4, !tbaa !5
  %232 = icmp slt i32 %231, 10
  br i1 %232, label %234, label %233

233:                                              ; preds = %230
  store i32 14, ptr %11, align 4
  br label %330

234:                                              ; preds = %230
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #3
  %235 = load i32, ptr %19, align 4, !tbaa !5
  %236 = load i32, ptr %20, align 4, !tbaa !5
  %237 = add nsw i32 %235, %236
  store i32 %237, ptr %21, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #3
  %238 = load i32, ptr %19, align 4, !tbaa !5
  %239 = load i32, ptr %20, align 4, !tbaa !5
  %240 = add nsw i32 %238, %239
  %241 = load i32, ptr %9, align 4, !tbaa !5
  %242 = add nsw i32 %240, %241
  store i32 %242, ptr %22, align 4, !tbaa !5
  %243 = load i32, ptr %22, align 4, !tbaa !5
  %244 = srem i32 %243, 10
  %245 = load i32, ptr %7, align 4, !tbaa !5
  %246 = sext i32 %245 to i64
  %247 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %246) #3
  %248 = load i32, ptr %247, align 4, !tbaa !5
  %249 = icmp ne i32 %244, %248
  br i1 %249, label %250, label %251

250:                                              ; preds = %234
  store i32 16, ptr %11, align 4
  br label %324

251:                                              ; preds = %234
  %252 = load i32, ptr %6, align 4, !tbaa !5
  %253 = icmp eq i32 %252, 0
  br i1 %253, label %254, label %258

254:                                              ; preds = %251
  %255 = load i32, ptr %19, align 4, !tbaa !5
  %256 = icmp eq i32 %255, 0
  br i1 %256, label %257, label %258

257:                                              ; preds = %254
  store i32 16, ptr %11, align 4
  br label %324

258:                                              ; preds = %254, %251
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #3
  store i32 0, ptr %23, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #3
  store i32 0, ptr %24, align 4, !tbaa !5
  %259 = load i32, ptr %21, align 4, !tbaa !5
  %260 = srem i32 %259, 10
  %261 = load i32, ptr %6, align 4, !tbaa !5
  %262 = sext i32 %261 to i64
  %263 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %262) #3
  %264 = load i32, ptr %263, align 4, !tbaa !5
  %265 = icmp eq i32 %260, %264
  br i1 %265, label %266, label %272

266:                                              ; preds = %258
  %267 = load i32, ptr %21, align 4, !tbaa !5
  %268 = sdiv i32 %267, 10
  %269 = load i32, ptr %8, align 4, !tbaa !5
  %270 = icmp eq i32 %268, %269
  br i1 %270, label %271, label %272

271:                                              ; preds = %266
  store i32 0, ptr %23, align 4, !tbaa !5
  br label %290

272:                                              ; preds = %266, %258
  %273 = load i32, ptr %21, align 4, !tbaa !5
  %274 = add nsw i32 %273, 1
  %275 = srem i32 %274, 10
  %276 = load i32, ptr %6, align 4, !tbaa !5
  %277 = sext i32 %276 to i64
  %278 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %277) #3
  %279 = load i32, ptr %278, align 4, !tbaa !5
  %280 = icmp eq i32 %275, %279
  br i1 %280, label %281, label %288

281:                                              ; preds = %272
  %282 = load i32, ptr %21, align 4, !tbaa !5
  %283 = add nsw i32 %282, 1
  %284 = sdiv i32 %283, 10
  %285 = load i32, ptr %8, align 4, !tbaa !5
  %286 = icmp eq i32 %284, %285
  br i1 %286, label %287, label %288

287:                                              ; preds = %281
  store i32 1, ptr %23, align 4, !tbaa !5
  br label %289

288:                                              ; preds = %281, %272
  store i32 16, ptr %11, align 4
  br label %323

289:                                              ; preds = %287
  br label %290

290:                                              ; preds = %289, %271
  %291 = load i32, ptr %22, align 4, !tbaa !5
  %292 = sdiv i32 %291, 10
  store i32 %292, ptr %24, align 4, !tbaa !5
  %293 = load i32, ptr %6, align 4, !tbaa !5
  %294 = add nsw i32 %293, 1
  %295 = load i32, ptr %7, align 4, !tbaa !5
  %296 = sub nsw i32 %295, 1
  %297 = load i32, ptr %23, align 4, !tbaa !5
  %298 = load i32, ptr %24, align 4, !tbaa !5
  %299 = call noundef i32 @_Z2goiiii(i32 noundef %294, i32 noundef %296, i32 noundef %297, i32 noundef %298)
  %300 = icmp ne i32 %299, 0
  br i1 %300, label %301, label %322

301:                                              ; preds = %290
  call void @llvm.lifetime.start.p0(i64 8, ptr %25) #3
  %302 = call i64 @_ZSt9make_pairIRiS0_ESt4pairINSt25__strip_reference_wrapperINSt5decayIT_E4typeEE6__typeENS2_INS3_IT0_E4typeEE6__typeEEOS4_OS9_(ptr noundef nonnull align 4 dereferenceable(4) %19, ptr noundef nonnull align 4 dereferenceable(4) %20)
  store i64 %302, ptr %25, align 4
  %303 = load i32, ptr %6, align 4, !tbaa !5
  %304 = sext i32 %303 to i64
  %305 = getelementptr inbounds [100100 x [2 x [2 x %"struct.std::pair"]]], ptr @v, i64 0, i64 %304
  %306 = load i32, ptr %8, align 4, !tbaa !5
  %307 = sext i32 %306 to i64
  %308 = getelementptr inbounds [2 x [2 x %"struct.std::pair"]], ptr %305, i64 0, i64 %307
  %309 = load i32, ptr %9, align 4, !tbaa !5
  %310 = sext i32 %309 to i64
  %311 = getelementptr inbounds [2 x %"struct.std::pair"], ptr %308, i64 0, i64 %310
  %312 = call noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt4pairIiiEaSEOS0_(ptr noundef nonnull align 4 dereferenceable(8) %311, ptr noundef nonnull align 4 dereferenceable(8) %25) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %25) #3
  %313 = load i32, ptr %6, align 4, !tbaa !5
  %314 = sext i32 %313 to i64
  %315 = getelementptr inbounds [100100 x [2 x [2 x i32]]], ptr @dp, i64 0, i64 %314
  %316 = load i32, ptr %8, align 4, !tbaa !5
  %317 = sext i32 %316 to i64
  %318 = getelementptr inbounds [2 x [2 x i32]], ptr %315, i64 0, i64 %317
  %319 = load i32, ptr %9, align 4, !tbaa !5
  %320 = sext i32 %319 to i64
  %321 = getelementptr inbounds [2 x i32], ptr %318, i64 0, i64 %320
  store i32 1, ptr %321, align 4, !tbaa !5
  store i32 1, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %323

322:                                              ; preds = %290
  store i32 0, ptr %11, align 4
  br label %323

323:                                              ; preds = %322, %301, %288
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #3
  br label %324

324:                                              ; preds = %323, %257, %250
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #3
  %325 = load i32, ptr %11, align 4
  switch i32 %325, label %330 [
    i32 0, label %326
    i32 16, label %327
  ]

326:                                              ; preds = %324
  br label %327

327:                                              ; preds = %326, %324
  %328 = load i32, ptr %20, align 4, !tbaa !5
  %329 = add nsw i32 %328, 1
  store i32 %329, ptr %20, align 4, !tbaa !5
  br label %230, !llvm.loop !13

330:                                              ; preds = %324, %233
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #3
  %331 = load i32, ptr %11, align 4
  switch i32 %331, label %336 [
    i32 14, label %332
  ]

332:                                              ; preds = %330
  br label %333

333:                                              ; preds = %332
  %334 = load i32, ptr %19, align 4, !tbaa !5
  %335 = add nsw i32 %334, 1
  store i32 %335, ptr %19, align 4, !tbaa !5
  br label %225, !llvm.loop !14

336:                                              ; preds = %330, %228
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #3
  %337 = load i32, ptr %11, align 4
  switch i32 %337, label %350 [
    i32 11, label %338
    i32 1, label %348
  ]

338:                                              ; preds = %336
  %339 = load i32, ptr %6, align 4, !tbaa !5
  %340 = sext i32 %339 to i64
  %341 = getelementptr inbounds [100100 x [2 x [2 x i32]]], ptr @dp, i64 0, i64 %340
  %342 = load i32, ptr %8, align 4, !tbaa !5
  %343 = sext i32 %342 to i64
  %344 = getelementptr inbounds [2 x [2 x i32]], ptr %341, i64 0, i64 %343
  %345 = load i32, ptr %9, align 4, !tbaa !5
  %346 = sext i32 %345 to i64
  %347 = getelementptr inbounds [2 x i32], ptr %344, i64 0, i64 %346
  store i32 0, ptr %347, align 4, !tbaa !5
  store i32 0, ptr %5, align 4
  br label %348

348:                                              ; preds = %338, %336, %214, %212, %141, %139, %37
  %349 = load i32, ptr %5, align 4
  ret i32 %349

350:                                              ; preds = %336, %212, %139
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local i64 @_ZSt9make_pairIRiS0_ESt4pairINSt25__strip_reference_wrapperINSt5decayIT_E4typeEE6__typeENS2_INS3_IT0_E4typeEE6__typeEEOS4_OS9_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt4pairIiiEaSEOS0_(ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(8)) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.std::pair" = type { i32, i32 }

@n = external dso_local global %"class.std::vector", align 8
@dp = external dso_local local_unnamed_addr global [100100 x [2 x [2 x i32]]], align 16
@v = external dso_local global [100100 x [2 x [2 x %"struct.std::pair"]]], align 16

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z2goiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca %"struct.std::pair", align 8
  %8 = alloca i32, align 4
  %9 = alloca %"struct.std::pair", align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca %"struct.std::pair", align 8
  %13 = sext i32 %0 to i64
  %14 = sext i32 %2 to i64
  %15 = sext i32 %3 to i64
  %16 = getelementptr inbounds [100100 x [2 x [2 x i32]]], ptr @dp, i64 0, i64 %13, i64 %14, i64 %15
  %17 = load i32, ptr %16, align 4, !tbaa !5
  %.not = icmp eq i32 %17, -1
  br i1 %.not, label %18, label %257

18:                                               ; preds = %4
  %19 = add nsw i32 %0, 1
  %20 = icmp eq i32 %19, %1
  br i1 %20, label %21, label %113

21:                                               ; preds = %18
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
  %22 = sext i32 %1 to i64
  store i32 0, ptr %5, align 4, !tbaa !5
  %23 = srem i32 %2, 10
  %.not117.us = icmp eq i32 %2, 0
  %24 = add nsw i32 %2, 1
  %25 = srem i32 %24, 10
  %26 = sdiv i32 %24, 10
  %.not117.us.1 = icmp eq i32 %26, %2
  %27 = add nsw i32 %2, 2
  %28 = srem i32 %27, 10
  %29 = sdiv i32 %27, 10
  %.not117.us.2 = icmp eq i32 %29, %2
  %30 = add nsw i32 %2, 3
  %31 = srem i32 %30, 10
  %32 = sdiv i32 %30, 10
  %.not117.us.3 = icmp eq i32 %32, %2
  %33 = add nsw i32 %2, 4
  %34 = srem i32 %33, 10
  %35 = sdiv i32 %33, 10
  %.not117.us.4 = icmp eq i32 %35, %2
  %36 = add nsw i32 %2, 5
  %37 = srem i32 %36, 10
  %38 = sdiv i32 %36, 10
  %.not117.us.5 = icmp eq i32 %38, %2
  %39 = add nsw i32 %2, 6
  %40 = srem i32 %39, 10
  %41 = sdiv i32 %39, 10
  %.not117.us.6 = icmp eq i32 %41, %2
  %42 = add nsw i32 %2, 7
  %43 = srem i32 %42, 10
  %44 = sdiv i32 %42, 10
  %.not117.us.7 = icmp eq i32 %44, %2
  %45 = add nsw i32 %2, 8
  %46 = srem i32 %45, 10
  %47 = sdiv i32 %45, 10
  %.not117.us.8 = icmp eq i32 %47, %2
  %48 = add nsw i32 %2, 9
  %49 = srem i32 %48, 10
  %50 = sdiv i32 %48, 10
  %.not117.us.9 = icmp eq i32 %50, %2
  br label %51

51:                                               ; preds = %21, %.split171.us
  %storemerge114172 = phi i32 [ 0, %21 ], [ %107, %.split171.us ]
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
  store i32 0, ptr %6, align 4, !tbaa !5
  %52 = or i32 %storemerge114172, %0
  %or.cond = icmp eq i32 %52, 0
  br i1 %or.cond, label %.split169.us.preheader, label %.split169

.split169.us.preheader:                           ; preds = %51
  %53 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %13) #3
  %54 = load i32, ptr %53, align 4, !tbaa !5
  %.not116.us = icmp eq i32 %23, %54
  %or.cond120.us = and i1 %.not116.us, %.not117.us
  br i1 %or.cond120.us, label %55, label %.split169.us.1

55:                                               ; preds = %.split169.us.preheader
  %56 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %22) #3
  br label %.split169.us.1

.split169.us.1:                                   ; preds = %55, %.split169.us.preheader
  %57 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %13) #3
  %58 = load i32, ptr %57, align 4, !tbaa !5
  %.not116.us.1 = icmp eq i32 %25, %58
  %or.cond120.us.1 = and i1 %.not116.us.1, %.not117.us.1
  br i1 %or.cond120.us.1, label %59, label %.split169.us.2

59:                                               ; preds = %.split169.us.1
  %60 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %22) #3
  br label %.split169.us.2

.split169.us.2:                                   ; preds = %59, %.split169.us.1
  store i32 2, ptr %6, align 4, !tbaa !5
  %61 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %13) #3
  %62 = load i32, ptr %61, align 4, !tbaa !5
  %.not116.us.2 = icmp eq i32 %28, %62
  %or.cond120.us.2 = and i1 %.not116.us.2, %.not117.us.2
  br i1 %or.cond120.us.2, label %63, label %.split169.us.3

63:                                               ; preds = %.split169.us.2
  %64 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %22) #3
  br label %.split169.us.3

.split169.us.3:                                   ; preds = %63, %.split169.us.2
  %65 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %13) #3
  %66 = load i32, ptr %65, align 4, !tbaa !5
  %.not116.us.3 = icmp eq i32 %31, %66
  %or.cond120.us.3 = and i1 %.not116.us.3, %.not117.us.3
  br i1 %or.cond120.us.3, label %67, label %.split169.us.4

67:                                               ; preds = %.split169.us.3
  %68 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %22) #3
  br label %.split169.us.4

.split169.us.4:                                   ; preds = %67, %.split169.us.3
  %69 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %13) #3
  %70 = load i32, ptr %69, align 4, !tbaa !5
  %.not116.us.4 = icmp eq i32 %34, %70
  %or.cond120.us.4 = and i1 %.not116.us.4, %.not117.us.4
  br i1 %or.cond120.us.4, label %71, label %.split169.us.5

71:                                               ; preds = %.split169.us.4
  %72 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %22) #3
  br label %.split169.us.5

.split169.us.5:                                   ; preds = %71, %.split169.us.4
  %73 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %13) #3
  %74 = load i32, ptr %73, align 4, !tbaa !5
  %.not116.us.5 = icmp eq i32 %37, %74
  %or.cond120.us.5 = and i1 %.not116.us.5, %.not117.us.5
  br i1 %or.cond120.us.5, label %75, label %.split169.us.6

75:                                               ; preds = %.split169.us.5
  %76 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %22) #3
  br label %.split169.us.6

.split169.us.6:                                   ; preds = %75, %.split169.us.5
  store i32 6, ptr %6, align 4, !tbaa !5
  %77 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %13) #3
  %78 = load i32, ptr %77, align 4, !tbaa !5
  %.not116.us.6 = icmp eq i32 %40, %78
  %or.cond120.us.6 = and i1 %.not116.us.6, %.not117.us.6
  br i1 %or.cond120.us.6, label %79, label %.split169.us.7

79:                                               ; preds = %.split169.us.6
  %80 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %22) #3
  br label %.split169.us.7

.split169.us.7:                                   ; preds = %79, %.split169.us.6
  %81 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %13) #3
  %82 = load i32, ptr %81, align 4, !tbaa !5
  %.not116.us.7 = icmp eq i32 %43, %82
  %or.cond120.us.7 = and i1 %.not116.us.7, %.not117.us.7
  br i1 %or.cond120.us.7, label %83, label %.split169.us.8

83:                                               ; preds = %.split169.us.7
  %84 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %22) #3
  br label %.split169.us.8

.split169.us.8:                                   ; preds = %83, %.split169.us.7
  %85 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %13) #3
  %86 = load i32, ptr %85, align 4, !tbaa !5
  %.not116.us.8 = icmp eq i32 %46, %86
  %or.cond120.us.8 = and i1 %.not116.us.8, %.not117.us.8
  br i1 %or.cond120.us.8, label %87, label %.split169.us.9

87:                                               ; preds = %.split169.us.8
  %88 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %22) #3
  br label %.split169.us.9

.split169.us.9:                                   ; preds = %87, %.split169.us.8
  %89 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %13) #3
  %90 = load i32, ptr %89, align 4, !tbaa !5
  %.not116.us.9 = icmp eq i32 %49, %90
  %or.cond120.us.9 = and i1 %.not116.us.9, %.not117.us.9
  br i1 %or.cond120.us.9, label %91, label %.split171.us

91:                                               ; preds = %.split169.us.9
  %92 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %22) #3
  br label %.split171.us

.split169:                                        ; preds = %51, %105
  %storemerge115168 = phi i32 [ %106, %105 ], [ 0, %51 ]
  %93 = add nuw nsw i32 %storemerge114172, %storemerge115168
  %94 = add nsw i32 %93, %2
  %95 = srem i32 %94, 10
  %96 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %13) #3
  %97 = load i32, ptr %96, align 4, !tbaa !5
  %.not116 = icmp eq i32 %95, %97
  %98 = sdiv i32 %94, 10
  %.not117 = icmp eq i32 %98, %2
  %or.cond120 = and i1 %.not116, %.not117
  br i1 %or.cond120, label %99, label %105

99:                                               ; preds = %.split169
  %100 = add nsw i32 %93, %3
  %101 = srem i32 %100, 10
  %102 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %22) #3
  %103 = load i32, ptr %102, align 4, !tbaa !5
  %.not118 = icmp eq i32 %101, %103
  %104 = sdiv i32 %100, 10
  %.not119 = icmp eq i32 %104, %2
  %or.cond121 = and i1 %.not119, %.not118
  br i1 %or.cond121, label %108, label %105

105:                                              ; preds = %99, %.split169
  %106 = add nuw nsw i32 %storemerge115168, 1
  store i32 %106, ptr %6, align 4, !tbaa !5
  %exitcond185.not = icmp eq i32 %106, 10
  br i1 %exitcond185.not, label %.split171.us, label %.split169, !llvm.loop !9

.split171.us:                                     ; preds = %105, %.split169.us.9, %91
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
  %107 = add nuw nsw i32 %storemerge114172, 1
  store i32 %107, ptr %5, align 4, !tbaa !5
  %exitcond187.not = icmp eq i32 %107, 10
  br i1 %exitcond187.not, label %112, label %51, !llvm.loop !11

108:                                              ; preds = %99
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %7) #3
  %109 = call i64 @_ZSt9make_pairIRiS0_ESt4pairINSt25__strip_reference_wrapperINSt5decayIT_E4typeEE6__typeENS2_INS3_IT0_E4typeEE6__typeEEOS4_OS9_(ptr noundef nonnull align 4 dereferenceable(4) %5, ptr noundef nonnull align 4 dereferenceable(4) %6)
  store i64 %109, ptr %7, align 8
  %110 = getelementptr inbounds [100100 x [2 x [2 x %"struct.std::pair"]]], ptr @v, i64 0, i64 %13, i64 %14, i64 %15
  %111 = call noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt4pairIiiEaSEOS0_(ptr noundef nonnull align 4 dereferenceable(8) %110, ptr noundef nonnull align 4 dereferenceable(8) %7) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #3
  store i32 1, ptr %16, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
  br label %257

112:                                              ; preds = %.split171.us
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
  store i32 0, ptr %16, align 4, !tbaa !5
  br label %257

113:                                              ; preds = %18
  %114 = icmp eq i32 %0, %1
  br i1 %114, label %115, label %215

115:                                              ; preds = %113
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8) #3
  store i32 0, ptr %8, align 4, !tbaa !5
  %116 = icmp eq i32 %0, 0
  br i1 %116, label %.split163.1, label %.split163.us.preheader

.split163.us.preheader:                           ; preds = %115
  %117 = srem i32 %3, 10
  %118 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %13) #3
  %119 = load i32, ptr %118, align 4, !tbaa !5
  %.not112.us = icmp eq i32 %117, %119
  %120 = sdiv i32 %3, 10
  %.not113.us = icmp eq i32 %120, %2
  %or.cond122.us = and i1 %.not113.us, %.not112.us
  br i1 %or.cond122.us, label %.split165.us, label %.split163.us.1

.split163.us.1:                                   ; preds = %.split163.us.preheader
  store i32 1, ptr %8, align 4, !tbaa !5
  %121 = add nsw i32 %3, 2
  %122 = srem i32 %121, 10
  %123 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %13) #3
  %124 = load i32, ptr %123, align 4, !tbaa !5
  %.not112.us.1 = icmp eq i32 %122, %124
  %125 = sdiv i32 %121, 10
  %.not113.us.1 = icmp eq i32 %125, %2
  %or.cond122.us.1 = and i1 %.not113.us.1, %.not112.us.1
  br i1 %or.cond122.us.1, label %.split165.us, label %.split163.us.2

.split163.us.2:                                   ; preds = %.split163.us.1
  store i32 2, ptr %8, align 4, !tbaa !5
  %126 = add nsw i32 %3, 4
  %127 = srem i32 %126, 10
  %128 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %13) #3
  %129 = load i32, ptr %128, align 4, !tbaa !5
  %.not112.us.2 = icmp eq i32 %127, %129
  %130 = sdiv i32 %126, 10
  %.not113.us.2 = icmp eq i32 %130, %2
  %or.cond122.us.2 = and i1 %.not113.us.2, %.not112.us.2
  br i1 %or.cond122.us.2, label %.split165.us, label %.split163.us.3

.split163.us.3:                                   ; preds = %.split163.us.2
  store i32 3, ptr %8, align 4, !tbaa !5
  %131 = add nsw i32 %3, 6
  %132 = srem i32 %131, 10
  %133 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %13) #3
  %134 = load i32, ptr %133, align 4, !tbaa !5
  %.not112.us.3 = icmp eq i32 %132, %134
  %135 = sdiv i32 %131, 10
  %.not113.us.3 = icmp eq i32 %135, %2
  %or.cond122.us.3 = and i1 %.not113.us.3, %.not112.us.3
  br i1 %or.cond122.us.3, label %.split165.us, label %.split163.us.4

.split163.us.4:                                   ; preds = %.split163.us.3
  store i32 4, ptr %8, align 4, !tbaa !5
  %136 = add nsw i32 %3, 8
  %137 = srem i32 %136, 10
  %138 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %13) #3
  %139 = load i32, ptr %138, align 4, !tbaa !5
  %.not112.us.4 = icmp eq i32 %137, %139
  %140 = sdiv i32 %136, 10
  %.not113.us.4 = icmp eq i32 %140, %2
  %or.cond122.us.4 = and i1 %.not113.us.4, %.not112.us.4
  br i1 %or.cond122.us.4, label %.split165.us, label %.split163.us.5

.split163.us.5:                                   ; preds = %.split163.us.4
  store i32 5, ptr %8, align 4, !tbaa !5
  %141 = add nsw i32 %3, 10
  %142 = srem i32 %141, 10
  %143 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %13) #3
  %144 = load i32, ptr %143, align 4, !tbaa !5
  %.not112.us.5 = icmp eq i32 %142, %144
  %145 = sdiv i32 %141, 10
  %.not113.us.5 = icmp eq i32 %145, %2
  %or.cond122.us.5 = and i1 %.not113.us.5, %.not112.us.5
  br i1 %or.cond122.us.5, label %.split165.us, label %.split163.us.6

.split163.us.6:                                   ; preds = %.split163.us.5
  store i32 6, ptr %8, align 4, !tbaa !5
  %146 = add nsw i32 %3, 12
  %147 = srem i32 %146, 10
  %148 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %13) #3
  %149 = load i32, ptr %148, align 4, !tbaa !5
  %.not112.us.6 = icmp eq i32 %147, %149
  %150 = sdiv i32 %146, 10
  %.not113.us.6 = icmp eq i32 %150, %2
  %or.cond122.us.6 = and i1 %.not113.us.6, %.not112.us.6
  br i1 %or.cond122.us.6, label %.split165.us, label %.split163.us.7

.split163.us.7:                                   ; preds = %.split163.us.6
  store i32 7, ptr %8, align 4, !tbaa !5
  %151 = add nsw i32 %3, 14
  %152 = srem i32 %151, 10
  %153 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %13) #3
  %154 = load i32, ptr %153, align 4, !tbaa !5
  %.not112.us.7 = icmp eq i32 %152, %154
  %155 = sdiv i32 %151, 10
  %.not113.us.7 = icmp eq i32 %155, %2
  %or.cond122.us.7 = and i1 %.not113.us.7, %.not112.us.7
  br i1 %or.cond122.us.7, label %.split165.us, label %.split163.us.8

.split163.us.8:                                   ; preds = %.split163.us.7
  store i32 8, ptr %8, align 4, !tbaa !5
  %156 = add nsw i32 %3, 16
  %157 = srem i32 %156, 10
  %158 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %13) #3
  %159 = load i32, ptr %158, align 4, !tbaa !5
  %.not112.us.8 = icmp eq i32 %157, %159
  %160 = sdiv i32 %156, 10
  %.not113.us.8 = icmp eq i32 %160, %2
  %or.cond122.us.8 = and i1 %.not113.us.8, %.not112.us.8
  br i1 %or.cond122.us.8, label %.split165.us, label %.split163.us.9

.split163.us.9:                                   ; preds = %.split163.us.8
  store i32 9, ptr %8, align 4, !tbaa !5
  %161 = add nsw i32 %3, 18
  %162 = srem i32 %161, 10
  %163 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %13) #3
  %164 = load i32, ptr %163, align 4, !tbaa !5
  %.not112.us.9 = icmp eq i32 %162, %164
  %165 = sdiv i32 %161, 10
  %.not113.us.9 = icmp eq i32 %165, %2
  %or.cond122.us.9 = and i1 %.not113.us.9, %.not112.us.9
  br i1 %or.cond122.us.9, label %.split165.us, label %.split167.us

.split163.1:                                      ; preds = %115
  %166 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %13) #3
  store i32 1, ptr %8, align 4, !tbaa !5
  %167 = add nsw i32 %3, 2
  %168 = srem i32 %167, 10
  %169 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %13) #3
  %170 = load i32, ptr %169, align 4, !tbaa !5
  %.not112.1 = icmp ne i32 %168, %170
  %171 = sdiv i32 %167, 10
  %.not113.1 = icmp ne i32 %171, %2
  %or.cond122.not174.1 = or i1 %.not113.1, %.not112.1
  br i1 %or.cond122.not174.1, label %.split163.2, label %.split165.us

.split163.2:                                      ; preds = %.split163.1
  store i32 2, ptr %8, align 4, !tbaa !5
  %172 = add nsw i32 %3, 4
  %173 = srem i32 %172, 10
  %174 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %13) #3
  %175 = load i32, ptr %174, align 4, !tbaa !5
  %.not112.2 = icmp ne i32 %173, %175
  %176 = sdiv i32 %172, 10
  %.not113.2 = icmp ne i32 %176, %2
  %or.cond122.not174.2 = or i1 %.not113.2, %.not112.2
  br i1 %or.cond122.not174.2, label %.split163.3, label %.split165.us

.split163.3:                                      ; preds = %.split163.2
  store i32 3, ptr %8, align 4, !tbaa !5
  %177 = add nsw i32 %3, 6
  %178 = srem i32 %177, 10
  %179 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %13) #3
  %180 = load i32, ptr %179, align 4, !tbaa !5
  %.not112.3 = icmp ne i32 %178, %180
  %181 = sdiv i32 %177, 10
  %.not113.3 = icmp ne i32 %181, %2
  %or.cond122.not174.3 = or i1 %.not113.3, %.not112.3
  br i1 %or.cond122.not174.3, label %.split163.4, label %.split165.us

.split163.4:                                      ; preds = %.split163.3
  store i32 4, ptr %8, align 4, !tbaa !5
  %182 = add nsw i32 %3, 8
  %183 = srem i32 %182, 10
  %184 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %13) #3
  %185 = load i32, ptr %184, align 4, !tbaa !5
  %.not112.4 = icmp ne i32 %183, %185
  %186 = sdiv i32 %182, 10
  %.not113.4 = icmp ne i32 %186, %2
  %or.cond122.not174.4 = or i1 %.not113.4, %.not112.4
  br i1 %or.cond122.not174.4, label %.split163.5, label %.split165.us

.split163.5:                                      ; preds = %.split163.4
  store i32 5, ptr %8, align 4, !tbaa !5
  %187 = add nsw i32 %3, 10
  %188 = srem i32 %187, 10
  %189 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %13) #3
  %190 = load i32, ptr %189, align 4, !tbaa !5
  %.not112.5 = icmp ne i32 %188, %190
  %191 = sdiv i32 %187, 10
  %.not113.5 = icmp ne i32 %191, %2
  %or.cond122.not174.5 = or i1 %.not113.5, %.not112.5
  br i1 %or.cond122.not174.5, label %.split163.6, label %.split165.us

.split163.6:                                      ; preds = %.split163.5
  store i32 6, ptr %8, align 4, !tbaa !5
  %192 = add nsw i32 %3, 12
  %193 = srem i32 %192, 10
  %194 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %13) #3
  %195 = load i32, ptr %194, align 4, !tbaa !5
  %.not112.6 = icmp ne i32 %193, %195
  %196 = sdiv i32 %192, 10
  %.not113.6 = icmp ne i32 %196, %2
  %or.cond122.not174.6 = or i1 %.not113.6, %.not112.6
  br i1 %or.cond122.not174.6, label %.split163.7, label %.split165.us

.split163.7:                                      ; preds = %.split163.6
  store i32 7, ptr %8, align 4, !tbaa !5
  %197 = add nsw i32 %3, 14
  %198 = srem i32 %197, 10
  %199 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %13) #3
  %200 = load i32, ptr %199, align 4, !tbaa !5
  %.not112.7 = icmp ne i32 %198, %200
  %201 = sdiv i32 %197, 10
  %.not113.7 = icmp ne i32 %201, %2
  %or.cond122.not174.7 = or i1 %.not113.7, %.not112.7
  br i1 %or.cond122.not174.7, label %.split163.8, label %.split165.us

.split163.8:                                      ; preds = %.split163.7
  store i32 8, ptr %8, align 4, !tbaa !5
  %202 = add nsw i32 %3, 16
  %203 = srem i32 %202, 10
  %204 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %13) #3
  %205 = load i32, ptr %204, align 4, !tbaa !5
  %.not112.8 = icmp ne i32 %203, %205
  %206 = sdiv i32 %202, 10
  %.not113.8 = icmp ne i32 %206, %2
  %or.cond122.not174.8 = or i1 %.not113.8, %.not112.8
  br i1 %or.cond122.not174.8, label %.split163.9, label %.split165.us

.split163.9:                                      ; preds = %.split163.8
  store i32 9, ptr %8, align 4, !tbaa !5
  %207 = add nsw i32 %3, 18
  %208 = srem i32 %207, 10
  %209 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %13) #3
  %210 = load i32, ptr %209, align 4, !tbaa !5
  %.not112.9 = icmp ne i32 %208, %210
  %211 = sdiv i32 %207, 10
  %.not113.9 = icmp ne i32 %211, %2
  %or.cond122.not174.9 = or i1 %.not113.9, %.not112.9
  br i1 %or.cond122.not174.9, label %.split167.us, label %.split165.us

.split165.us:                                     ; preds = %.split163.us.preheader, %.split163.us.1, %.split163.us.2, %.split163.us.3, %.split163.us.4, %.split163.us.5, %.split163.us.6, %.split163.us.7, %.split163.us.8, %.split163.us.9, %.split163.1, %.split163.2, %.split163.3, %.split163.4, %.split163.5, %.split163.6, %.split163.7, %.split163.8, %.split163.9
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %9) #3
  %212 = call i64 @_ZSt9make_pairIRiS0_ESt4pairINSt25__strip_reference_wrapperINSt5decayIT_E4typeEE6__typeENS2_INS3_IT0_E4typeEE6__typeEEOS4_OS9_(ptr noundef nonnull align 4 dereferenceable(4) %8, ptr noundef nonnull align 4 dereferenceable(4) %8)
  store i64 %212, ptr %9, align 8
  %213 = getelementptr inbounds [100100 x [2 x [2 x %"struct.std::pair"]]], ptr @v, i64 0, i64 %13, i64 %14, i64 %15
  %214 = call noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt4pairIiiEaSEOS0_(ptr noundef nonnull align 4 dereferenceable(8) %213, ptr noundef nonnull align 4 dereferenceable(8) %9) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %9) #3
  store i32 1, ptr %16, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #3
  br label %257

.split167.us:                                     ; preds = %.split163.9, %.split163.us.9
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #3
  store i32 0, ptr %16, align 4, !tbaa !5
  br label %257

215:                                              ; preds = %113
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %10) #3
  %216 = sext i32 %1 to i64
  %217 = add nsw i32 %1, -1
  store i32 0, ptr %10, align 4, !tbaa !5
  br label %218

218:                                              ; preds = %215, %.split160.us
  %storemerge161 = phi i32 [ 0, %215 ], [ %251, %.split160.us ]
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %11) #3
  store i32 0, ptr %11, align 4, !tbaa !5
  %219 = or i32 %storemerge161, %0
  %or.cond8 = icmp eq i32 %219, 0
  br i1 %or.cond8, label %.split.us.preheader, label %.split

.split.us.preheader:                              ; preds = %218
  %220 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %216) #3
  %221 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %216) #3
  store i32 2, ptr %11, align 4, !tbaa !5
  %222 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %216) #3
  %223 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %216) #3
  %224 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %216) #3
  %225 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %216) #3
  %226 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %216) #3
  %227 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %216) #3
  %228 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %216) #3
  %229 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %216) #3
  br label %.split160.us

.split:                                           ; preds = %218, %249
  %storemerge108158 = phi i32 [ %250, %249 ], [ 0, %218 ]
  %230 = add nuw nsw i32 %storemerge161, %storemerge108158
  %231 = add nsw i32 %230, %3
  %232 = srem i32 %231, 10
  %233 = sdiv i32 %231, 10
  %234 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %216) #3
  %235 = load i32, ptr %234, align 4, !tbaa !5
  %.not109 = icmp eq i32 %232, %235
  br i1 %.not109, label %236, label %249

236:                                              ; preds = %.split
  %.urem179 = urem i32 %230, 10
  %237 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %13) #3
  %238 = load i32, ptr %237, align 4, !tbaa !5
  %239 = icmp eq i32 %.urem179, %238
  %.udiv180 = udiv i32 %230, 10
  %240 = icmp eq i32 %.udiv180, %2
  %or.cond126 = and i1 %240, %239
  br i1 %or.cond126, label %247, label %241

241:                                              ; preds = %236
  %242 = add nuw nsw i32 %230, 1
  %.urem = urem i32 %242, 10
  %243 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @n, i64 noundef %13) #3
  %244 = load i32, ptr %243, align 4, !tbaa !5
  %245 = icmp eq i32 %.urem, %244
  %.udiv = udiv i32 %242, 10
  %246 = icmp eq i32 %.udiv, %2
  %or.cond128 = and i1 %246, %245
  br i1 %or.cond128, label %247, label %249

247:                                              ; preds = %241, %236
  %.0 = phi i32 [ 0, %236 ], [ 1, %241 ]
  %248 = tail call noundef i32 @_Z2goiiii(i32 noundef %19, i32 noundef %217, i32 noundef %.0, i32 noundef %233)
  %.not110 = icmp eq i32 %248, 0
  br i1 %.not110, label %249, label %252

249:                                              ; preds = %.split, %241, %247
  %250 = add nuw nsw i32 %storemerge108158, 1
  store i32 %250, ptr %11, align 4, !tbaa !5
  %exitcond.not = icmp eq i32 %250, 10
  br i1 %exitcond.not, label %.split160.us, label %.split, !llvm.loop !12

.split160.us:                                     ; preds = %249, %.split.us.preheader
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %11) #3
  %251 = add nuw nsw i32 %storemerge161, 1
  store i32 %251, ptr %10, align 4, !tbaa !5
  %exitcond182.not = icmp eq i32 %251, 10
  br i1 %exitcond182.not, label %256, label %218, !llvm.loop !13

252:                                              ; preds = %247
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %12) #3
  %253 = call i64 @_ZSt9make_pairIRiS0_ESt4pairINSt25__strip_reference_wrapperINSt5decayIT_E4typeEE6__typeENS2_INS3_IT0_E4typeEE6__typeEEOS4_OS9_(ptr noundef nonnull align 4 dereferenceable(4) %10, ptr noundef nonnull align 4 dereferenceable(4) %11)
  store i64 %253, ptr %12, align 8
  %254 = getelementptr inbounds [100100 x [2 x [2 x %"struct.std::pair"]]], ptr @v, i64 0, i64 %13, i64 %14, i64 %15
  %255 = call noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt4pairIiiEaSEOS0_(ptr noundef nonnull align 4 dereferenceable(8) %254, ptr noundef nonnull align 4 dereferenceable(8) %12) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %12) #3
  store i32 1, ptr %16, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %10) #3
  br label %257

256:                                              ; preds = %.split160.us
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %10) #3
  store i32 0, ptr %16, align 4, !tbaa !5
  br label %257

257:                                              ; preds = %252, %.split165.us, %108, %4, %256, %.split167.us, %112
  %.14 = phi i32 [ 1, %108 ], [ 0, %112 ], [ 1, %.split165.us ], [ 0, %.split167.us ], [ 1, %252 ], [ 0, %256 ], [ %17, %4 ]
  ret i32 %.14
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local i64 @_ZSt9make_pairIRiS0_ESt4pairINSt25__strip_reference_wrapperINSt5decayIT_E4typeEE6__typeENS2_INS3_IT0_E4typeEE6__typeEEOS4_OS9_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt4pairIiiEaSEOS0_(ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(8)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,DSEPass,DivRemPairsPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass