; LLVM IR from IOsonata/IOsonata :: ARM/Nordic/nRF52/nRF52840/exemples/BoschAppBoard/src (bmi3)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.bmi3_acc_usr_gain_offset = type { i16, i16, i16, i8, i8, i8 }

@__const.bmi3_get_user_acc_off_dgain.base_addr = external hidden unnamed_addr constant [2 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_get_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_set_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: nounwind uwtable
define dso_local signext i8 @bmi3_get_user_acc_off_dgain(ptr noundef %0, ptr noundef %1) #1 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  %6 = alloca [12 x i8], align 1
  %7 = alloca [2 x i8], align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 12, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 2, ptr %7) #3
  call void @llvm.memcpy.p0.p0.i64(ptr align 1 %7, ptr align 1 @__const.bmi3_get_user_acc_off_dgain.base_addr, i64 2, i1 false)
  %8 = load ptr, ptr %3, align 8, !tbaa !5
  %9 = icmp ne ptr %8, null
  br i1 %9, label %10, label %87

10:                                               ; preds = %2
  %11 = getelementptr inbounds [2 x i8], ptr %7, i64 0, i64 0
  %12 = load ptr, ptr %4, align 8, !tbaa !5
  %13 = call signext i8 @bmi3_set_regs(i8 noundef zeroext 65, ptr noundef %11, i16 noundef zeroext 2, ptr noundef %12)
  store i8 %13, ptr %5, align 1, !tbaa !9
  %14 = load i8, ptr %5, align 1, !tbaa !9
  %15 = sext i8 %14 to i32
  %16 = icmp eq i32 %15, 0
  br i1 %16, label %17, label %86

17:                                               ; preds = %10
  %18 = getelementptr inbounds [12 x i8], ptr %6, i64 0, i64 0
  %19 = load ptr, ptr %4, align 8, !tbaa !5
  %20 = call signext i8 @bmi3_get_regs(i8 noundef zeroext 66, ptr noundef %18, i16 noundef zeroext 12, ptr noundef %19)
  store i8 %20, ptr %5, align 1, !tbaa !9
  %21 = load i8, ptr %5, align 1, !tbaa !9
  %22 = sext i8 %21 to i32
  %23 = icmp eq i32 %22, 0
  br i1 %23, label %24, label %85

24:                                               ; preds = %17
  %25 = getelementptr inbounds [12 x i8], ptr %6, i64 0, i64 1
  %26 = load i8, ptr %25, align 1, !tbaa !9
  %27 = zext i8 %26 to i16
  %28 = zext i16 %27 to i32
  %29 = shl i32 %28, 8
  %30 = getelementptr inbounds [12 x i8], ptr %6, i64 0, i64 0
  %31 = load i8, ptr %30, align 1, !tbaa !9
  %32 = zext i8 %31 to i32
  %33 = or i32 %29, %32
  %34 = and i32 %33, 16383
  %35 = trunc i32 %34 to i16
  %36 = load ptr, ptr %3, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.bmi3_acc_usr_gain_offset, ptr %36, i32 0, i32 0
  store i16 %35, ptr %37, align 2, !tbaa !10
  %38 = getelementptr inbounds [12 x i8], ptr %6, i64 0, i64 3
  %39 = load i8, ptr %38, align 1, !tbaa !9
  %40 = zext i8 %39 to i16
  %41 = zext i16 %40 to i32
  %42 = shl i32 %41, 8
  %43 = getelementptr inbounds [12 x i8], ptr %6, i64 0, i64 2
  %44 = load i8, ptr %43, align 1, !tbaa !9
  %45 = zext i8 %44 to i32
  %46 = or i32 %42, %45
  %47 = and i32 %46, 16383
  %48 = trunc i32 %47 to i16
  %49 = load ptr, ptr %3, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.bmi3_acc_usr_gain_offset, ptr %49, i32 0, i32 1
  store i16 %48, ptr %50, align 2, !tbaa !13
  %51 = getelementptr inbounds [12 x i8], ptr %6, i64 0, i64 5
  %52 = load i8, ptr %51, align 1, !tbaa !9
  %53 = zext i8 %52 to i16
  %54 = zext i16 %53 to i32
  %55 = shl i32 %54, 8
  %56 = getelementptr inbounds [12 x i8], ptr %6, i64 0, i64 4
  %57 = load i8, ptr %56, align 1, !tbaa !9
  %58 = zext i8 %57 to i32
  %59 = or i32 %55, %58
  %60 = and i32 %59, 16383
  %61 = trunc i32 %60 to i16
  %62 = load ptr, ptr %3, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.bmi3_acc_usr_gain_offset, ptr %62, i32 0, i32 2
  store i16 %61, ptr %63, align 2, !tbaa !14
  %64 = getelementptr inbounds [12 x i8], ptr %6, i64 0, i64 6
  %65 = load i8, ptr %64, align 1, !tbaa !9
  %66 = zext i8 %65 to i32
  %67 = and i32 %66, 255
  %68 = trunc i32 %67 to i8
  %69 = load ptr, ptr %3, align 8, !tbaa !5
  %70 = getelementptr inbounds %struct.bmi3_acc_usr_gain_offset, ptr %69, i32 0, i32 3
  store i8 %68, ptr %70, align 2, !tbaa !15
  %71 = getelementptr inbounds [12 x i8], ptr %6, i64 0, i64 8
  %72 = load i8, ptr %71, align 1, !tbaa !9
  %73 = zext i8 %72 to i32
  %74 = and i32 %73, 255
  %75 = trunc i32 %74 to i8
  %76 = load ptr, ptr %3, align 8, !tbaa !5
  %77 = getelementptr inbounds %struct.bmi3_acc_usr_gain_offset, ptr %76, i32 0, i32 4
  store i8 %75, ptr %77, align 1, !tbaa !16
  %78 = getelementptr inbounds [12 x i8], ptr %6, i64 0, i64 10
  %79 = load i8, ptr %78, align 1, !tbaa !9
  %80 = zext i8 %79 to i32
  %81 = and i32 %80, 255
  %82 = trunc i32 %81 to i8
  %83 = load ptr, ptr %3, align 8, !tbaa !5
  %84 = getelementptr inbounds %struct.bmi3_acc_usr_gain_offset, ptr %83, i32 0, i32 5
  store i8 %82, ptr %84, align 2, !tbaa !17
  br label %85

85:                                               ; preds = %24, %17
  br label %86

86:                                               ; preds = %85, %10
  br label %88

87:                                               ; preds = %2
  store i8 -1, ptr %5, align 1, !tbaa !9
  br label %88

88:                                               ; preds = %87, %86
  %89 = load i8, ptr %5, align 1, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 2, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 12, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #3
  ret i8 %89
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !12, i64 0}
!11 = !{!"bmi3_acc_usr_gain_offset", !12, i64 0, !12, i64 2, !12, i64 4, !7, i64 6, !7, i64 7, !7, i64 8}
!12 = !{!"short", !7, i64 0}
!13 = !{!11, !12, i64 2}
!14 = !{!11, !12, i64 4}
!15 = !{!11, !7, i64 6}
!16 = !{!11, !7, i64 7}
!17 = !{!11, !7, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@__const.bmi3_get_user_acc_off_dgain.base_addr = external hidden unnamed_addr constant [2 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_get_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_set_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local signext i8 @bmi3_get_user_acc_off_dgain(ptr noundef writeonly %0, ptr noundef %1) local_unnamed_addr #1 {
  %3 = alloca [12 x i8], align 1
  %4 = alloca [2 x i8], align 2
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %3) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr nonnull %4) #2
  %5 = load i16, ptr @__const.bmi3_get_user_acc_off_dgain.base_addr, align 1
  store i16 %5, ptr %4, align 2
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %47, label %6

6:                                                ; preds = %2
  %7 = call signext i8 @bmi3_set_regs(i8 noundef zeroext 65, ptr noundef nonnull %4, i16 noundef zeroext 2, ptr noundef %1)
  %8 = icmp eq i8 %7, 0
  br i1 %8, label %9, label %47

9:                                                ; preds = %6
  %10 = call signext i8 @bmi3_get_regs(i8 noundef zeroext 66, ptr noundef nonnull %3, i16 noundef zeroext 12, ptr noundef %1)
  %11 = icmp eq i8 %10, 0
  br i1 %11, label %12, label %47

12:                                               ; preds = %9
  %13 = getelementptr inbounds i8, ptr %3, i64 1
  %14 = load i8, ptr %13, align 1, !tbaa !5
  %15 = zext i8 %14 to i16
  %16 = shl nuw i16 %15, 8
  %17 = load i8, ptr %3, align 1, !tbaa !5
  %18 = zext i8 %17 to i16
  %.masked = and i16 %16, 16128
  %19 = or disjoint i16 %.masked, %18
  store i16 %19, ptr %0, align 2, !tbaa !8
  %20 = getelementptr inbounds i8, ptr %3, i64 3
  %21 = load i8, ptr %20, align 1, !tbaa !5
  %22 = zext i8 %21 to i16
  %23 = shl nuw i16 %22, 8
  %24 = getelementptr inbounds i8, ptr %3, i64 2
  %25 = load i8, ptr %24, align 1, !tbaa !5
  %26 = zext i8 %25 to i16
  %.masked12 = and i16 %23, 16128
  %27 = or disjoint i16 %.masked12, %26
  %28 = getelementptr inbounds i8, ptr %0, i64 2
  store i16 %27, ptr %28, align 2, !tbaa !11
  %29 = getelementptr inbounds i8, ptr %3, i64 5
  %30 = load i8, ptr %29, align 1, !tbaa !5
  %31 = zext i8 %30 to i16
  %32 = shl nuw i16 %31, 8
  %33 = getelementptr inbounds i8, ptr %3, i64 4
  %34 = load i8, ptr %33, align 1, !tbaa !5
  %35 = zext i8 %34 to i16
  %.masked13 = and i16 %32, 16128
  %36 = or disjoint i16 %.masked13, %35
  %37 = getelementptr inbounds i8, ptr %0, i64 4
  store i16 %36, ptr %37, align 2, !tbaa !12
  %38 = getelementptr inbounds i8, ptr %3, i64 6
  %39 = load i8, ptr %38, align 1, !tbaa !5
  %40 = getelementptr inbounds i8, ptr %0, i64 6
  store i8 %39, ptr %40, align 2, !tbaa !13
  %41 = getelementptr inbounds i8, ptr %3, i64 8
  %42 = load i8, ptr %41, align 1, !tbaa !5
  %43 = getelementptr inbounds i8, ptr %0, i64 7
  store i8 %42, ptr %43, align 1, !tbaa !14
  %44 = getelementptr inbounds i8, ptr %3, i64 10
  %45 = load i8, ptr %44, align 1, !tbaa !5
  %46 = getelementptr inbounds i8, ptr %0, i64 8
  store i8 %45, ptr %46, align 2, !tbaa !15
  br label %47

47:                                               ; preds = %2, %6, %12, %9
  %.0 = phi i8 [ 0, %12 ], [ %10, %9 ], [ %7, %6 ], [ -1, %2 ]
  call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %4) #2
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %3) #2
  ret i8 %.0
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !10, i64 0}
!9 = !{!"bmi3_acc_usr_gain_offset", !10, i64 0, !10, i64 2, !10, i64 4, !6, i64 6, !6, i64 7, !6, i64 8}
!10 = !{!"short", !6, i64 0}
!11 = !{!9, !10, i64 2}
!12 = !{!9, !10, i64 4}
!13 = !{!9, !6, i64 6}
!14 = !{!9, !6, i64 7}
!15 = !{!9, !6, i64 8}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass