; LLVM IR from FidoProject/Fido :: src (WireFitQLearn)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<rl::Wire, std::allocator<rl::Wire>>::_Vector_impl" }
%"struct.std::_Vector_base<rl::Wire, std::allocator<rl::Wire>>::_Vector_impl" = type { %"struct.std::_Vector_base<rl::Wire, std::allocator<rl::Wire>>::_Vector_impl_data" }
%"struct.std::_Vector_base<rl::Wire, std::allocator<rl::Wire>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.__gnu_cxx::__normal_iterator" = type { ptr }
%"class.rl::WireFitQLearn" = type { %"class.rl::Learner", ptr, ptr, ptr, i32, i32, double, double, double, double, i32, i32, %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", ptr }
%"class.rl::Learner" = type { ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.rl::Wire" = type { %"class.std::vector", double }

@_ZSt4cout = external global %"class.std::basic_ostream", align 8
@.str.6 = external hidden unnamed_addr constant [2 x i8], align 1
@.str.10 = external hidden unnamed_addr constant [39 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN2rl4WireESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN2rl4WireESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) #2

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEd(ptr noundef nonnull align 8 dereferenceable(8), double noundef) #3 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef, i32 noundef) #5

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIN2rl4WireESaIS1_EEC2EOS3_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN2rl13WireFitQLearn15newControlWiresERKSt6vectorINS_4WireESaIS2_EES4_(ptr dead_on_unwind noalias writable sret(%"class.std::vector.8") align 8 %0, ptr noundef nonnull align 8 dereferenceable(184) %1, ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef %3) #3 align 2 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca double, align 8
  %10 = alloca i32, align 4
  %11 = alloca ptr, align 8
  %12 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  %13 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  %14 = alloca i32, align 4
  %15 = alloca ptr, align 8
  %16 = alloca i32, align 4
  %17 = alloca double, align 8
  %18 = alloca i32, align 4
  %19 = alloca double, align 8
  %20 = alloca ptr, align 8
  %21 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  %22 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  %23 = alloca ptr, align 8
  store ptr %0, ptr %5, align 8
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  store ptr %3, ptr %8, align 8, !tbaa !5
  %24 = load ptr, ptr %6, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #6
  store double 0.000000e+00, ptr %9, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #6
  store i32 0, ptr %10, align 4, !tbaa !11
  br label %25

25:                                               ; preds = %214, %4
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #6
  %26 = load ptr, ptr %7, align 8, !tbaa !5
  store ptr %26, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #6
  %27 = load ptr, ptr %11, align 8, !tbaa !5
  %28 = call ptr @_ZNKSt6vectorIN2rl4WireESaIS1_EE5beginEv(ptr noundef nonnull align 8 dereferenceable(24) %27) #6
  %29 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator", ptr %12, i32 0, i32 0
  store ptr %28, ptr %29, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #6
  %30 = load ptr, ptr %11, align 8, !tbaa !5
  %31 = call ptr @_ZNKSt6vectorIN2rl4WireESaIS1_EE3endEv(ptr noundef nonnull align 8 dereferenceable(24) %30) #6
  %32 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator", ptr %13, i32 0, i32 0
  store ptr %31, ptr %32, align 8
  br label %33

33:                                               ; preds = %164, %25
  %34 = call noundef zeroext i1 @_ZN9__gnu_cxxneIPKN2rl4WireESt6vectorIS2_SaIS2_EEEEbRKNS_17__normal_iteratorIT_T0_EESD_(ptr noundef nonnull align 8 dereferenceable(8) %12, ptr noundef nonnull align 8 dereferenceable(8) %13) #6
  br i1 %34, label %36, label %35

35:                                               ; preds = %33
  store i32 4, ptr %14, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #6
  br label %166

36:                                               ; preds = %33
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #6
  %37 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNK9__gnu_cxx17__normal_iteratorIPKN2rl4WireESt6vectorIS2_SaIS2_EEEdeEv(ptr noundef nonnull align 8 dereferenceable(8) %12) #6
  store ptr %37, ptr %15, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #6
  store i32 0, ptr %16, align 4, !tbaa !11
  br label %38

38:                                               ; preds = %160, %36
  %39 = load i32, ptr %16, align 4, !tbaa !11
  %40 = zext i32 %39 to i64
  %41 = call noundef i64 @_ZNKSt6vectorIN2rl4WireESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %3) #6
  %42 = icmp ult i64 %40, %41
  br i1 %42, label %44, label %43

43:                                               ; preds = %38
  store i32 6, ptr %14, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #6
  br label %163

44:                                               ; preds = %38
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #6
  %45 = getelementptr inbounds %"class.rl::WireFitQLearn", ptr %24, i32 0, i32 2
  %46 = load ptr, ptr %45, align 8, !tbaa !13
  %47 = load ptr, ptr %15, align 8, !tbaa !5
  %48 = getelementptr inbounds %"struct.rl::Wire", ptr %47, i32 0, i32 0
  %49 = load ptr, ptr %46, align 8, !tbaa !20
  %50 = getelementptr inbounds ptr, ptr %49, i64 2
  %51 = load ptr, ptr %50, align 8
  %52 = call noundef double %51(ptr noundef nonnull align 8 dereferenceable(8) %46, ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 8 dereferenceable(24) %48)
  %53 = fneg double %52
  %54 = load ptr, ptr %15, align 8, !tbaa !5
  %55 = getelementptr inbounds %"struct.rl::Wire", ptr %54, i32 0, i32 1
  %56 = load double, ptr %55, align 8, !tbaa !22
  %57 = fadd double %53, %56
  %58 = fmul double -2.000000e+00, %57
  %59 = getelementptr inbounds %"class.rl::WireFitQLearn", ptr %24, i32 0, i32 2
  %60 = load ptr, ptr %59, align 8, !tbaa !13
  %61 = load ptr, ptr %15, align 8, !tbaa !5
  %62 = getelementptr inbounds %"struct.rl::Wire", ptr %61, i32 0, i32 0
  %63 = load i32, ptr %16, align 4, !tbaa !11
  %64 = zext i32 %63 to i64
  %65 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN2rl4WireESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %64) #6
  %66 = load ptr, ptr %60, align 8, !tbaa !20
  %67 = getelementptr inbounds ptr, ptr %66, i64 3
  %68 = load ptr, ptr %67, align 8
  %69 = call noundef double %68(ptr noundef nonnull align 8 dereferenceable(8) %60, ptr noundef nonnull align 8 dereferenceable(24) %62, ptr noundef nonnull align 8 dereferenceable(32) %65, ptr noundef nonnull align 8 dereferenceable(24) %3)
  %70 = fmul double %58, %69
  store double %70, ptr %17, align 8, !tbaa !9
  %71 = load i32, ptr %16, align 4, !tbaa !11
  %72 = zext i32 %71 to i64
  %73 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN2rl4WireESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %72) #6
  %74 = getelementptr inbounds %"struct.rl::Wire", ptr %73, i32 0, i32 1
  %75 = load double, ptr %74, align 8, !tbaa !22
  %76 = getelementptr inbounds %"class.rl::WireFitQLearn", ptr %24, i32 0, i32 9
  %77 = load double, ptr %76, align 8, !tbaa !24
  %78 = load double, ptr %17, align 8, !tbaa !9
  %79 = fneg double %77
  %80 = call double @llvm.fmuladd.f64(double %79, double %78, double %75)
  %81 = load i32, ptr %16, align 4, !tbaa !11
  %82 = zext i32 %81 to i64
  %83 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN2rl4WireESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %82) #6
  %84 = getelementptr inbounds %"struct.rl::Wire", ptr %83, i32 0, i32 1
  store double %80, ptr %84, align 8, !tbaa !22
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #6
  store i32 0, ptr %18, align 4, !tbaa !11
  br label %85

85:                                               ; preds = %156, %44
  %86 = load i32, ptr %18, align 4, !tbaa !11
  %87 = zext i32 %86 to i64
  %88 = load i32, ptr %16, align 4, !tbaa !11
  %89 = zext i32 %88 to i64
  %90 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN2rl4WireESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %89) #6
  %91 = getelementptr inbounds %"struct.rl::Wire", ptr %90, i32 0, i32 0
  %92 = call noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %91) #6
  %93 = icmp ult i64 %87, %92
  br i1 %93, label %95, label %94

94:                                               ; preds = %85
  store i32 9, ptr %14, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #6
  br label %159

95:                                               ; preds = %85
  call void @llvm.lifetime.start.p0(i64 8, ptr %19) #6
  %96 = getelementptr inbounds %"class.rl::WireFitQLearn", ptr %24, i32 0, i32 2
  %97 = load ptr, ptr %96, align 8, !tbaa !13
  %98 = load ptr, ptr %15, align 8, !tbaa !5
  %99 = getelementptr inbounds %"struct.rl::Wire", ptr %98, i32 0, i32 0
  %100 = load ptr, ptr %97, align 8, !tbaa !20
  %101 = getelementptr inbounds ptr, ptr %100, i64 2
  %102 = load ptr, ptr %101, align 8
  %103 = call noundef double %102(ptr noundef nonnull align 8 dereferenceable(8) %97, ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 8 dereferenceable(24) %99)
  %104 = fneg double %103
  %105 = load ptr, ptr %15, align 8, !tbaa !5
  %106 = getelementptr inbounds %"struct.rl::Wire", ptr %105, i32 0, i32 1
  %107 = load double, ptr %106, align 8, !tbaa !22
  %108 = fadd double %104, %107
  %109 = fmul double -2.000000e+00, %108
  %110 = getelementptr inbounds %"class.rl::WireFitQLearn", ptr %24, i32 0, i32 2
  %111 = load ptr, ptr %110, align 8, !tbaa !13
  %112 = load ptr, ptr %15, align 8, !tbaa !5
  %113 = getelementptr inbounds %"struct.rl::Wire", ptr %112, i32 0, i32 0
  %114 = load i32, ptr %18, align 4, !tbaa !11
  %115 = zext i32 %114 to i64
  %116 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %113, i64 noundef %115) #6
  %117 = load double, ptr %116, align 8, !tbaa !9
  %118 = load i32, ptr %16, align 4, !tbaa !11
  %119 = zext i32 %118 to i64
  %120 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN2rl4WireESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %119) #6
  %121 = getelementptr inbounds %"struct.rl::Wire", ptr %120, i32 0, i32 0
  %122 = load i32, ptr %18, align 4, !tbaa !11
  %123 = zext i32 %122 to i64
  %124 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %121, i64 noundef %123) #6
  %125 = load double, ptr %124, align 8, !tbaa !9
  %126 = load ptr, ptr %15, align 8, !tbaa !5
  %127 = getelementptr inbounds %"struct.rl::Wire", ptr %126, i32 0, i32 0
  %128 = load i32, ptr %16, align 4, !tbaa !11
  %129 = zext i32 %128 to i64
  %130 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN2rl4WireESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %129) #6
  %131 = load ptr, ptr %111, align 8, !tbaa !20
  %132 = getelementptr inbounds ptr, ptr %131, i64 4
  %133 = load ptr, ptr %132, align 8
  %134 = call noundef double %133(ptr noundef nonnull align 8 dereferenceable(8) %111, double noundef %117, double noundef %125, ptr noundef nonnull align 8 dereferenceable(24) %127, ptr noundef nonnull align 8 dereferenceable(32) %130, ptr noundef nonnull align 8 dereferenceable(24) %3)
  %135 = fmul double %109, %134
  store double %135, ptr %19, align 8, !tbaa !9
  %136 = load i32, ptr %16, align 4, !tbaa !11
  %137 = zext i32 %136 to i64
  %138 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN2rl4WireESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %137) #6
  %139 = getelementptr inbounds %"struct.rl::Wire", ptr %138, i32 0, i32 0
  %140 = load i32, ptr %18, align 4, !tbaa !11
  %141 = zext i32 %140 to i64
  %142 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %139, i64 noundef %141) #6
  %143 = load double, ptr %142, align 8, !tbaa !9
  %144 = getelementptr inbounds %"class.rl::WireFitQLearn", ptr %24, i32 0, i32 9
  %145 = load double, ptr %144, align 8, !tbaa !24
  %146 = load double, ptr %19, align 8, !tbaa !9
  %147 = fneg double %145
  %148 = call double @llvm.fmuladd.f64(double %147, double %146, double %143)
  %149 = load i32, ptr %16, align 4, !tbaa !11
  %150 = zext i32 %149 to i64
  %151 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN2rl4WireESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %150) #6
  %152 = getelementptr inbounds %"struct.rl::Wire", ptr %151, i32 0, i32 0
  %153 = load i32, ptr %18, align 4, !tbaa !11
  %154 = zext i32 %153 to i64
  %155 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %152, i64 noundef %154) #6
  store double %148, ptr %155, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %19) #6
  br label %156

156:                                              ; preds = %95
  %157 = load i32, ptr %18, align 4, !tbaa !11
  %158 = add i32 %157, 1
  store i32 %158, ptr %18, align 4, !tbaa !11
  br label %85, !llvm.loop !25

159:                                              ; preds = %94
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #6
  br label %160

160:                                              ; preds = %159
  %161 = load i32, ptr %16, align 4, !tbaa !11
  %162 = add i32 %161, 1
  store i32 %162, ptr %16, align 4, !tbaa !11
  br label %38, !llvm.loop !27

163:                                              ; preds = %43
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #6
  br label %164

164:                                              ; preds = %163
  %165 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZN9__gnu_cxx17__normal_iteratorIPKN2rl4WireESt6vectorIS2_SaIS2_EEEppEv(ptr noundef nonnull align 8 dereferenceable(8) %12) #6
  br label %33

166:                                              ; preds = %35
  store double 0.000000e+00, ptr %9, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %20) #6
  %167 = load ptr, ptr %7, align 8, !tbaa !5
  store ptr %167, ptr %20, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %21) #6
  %168 = load ptr, ptr %20, align 8, !tbaa !5
  %169 = call ptr @_ZNKSt6vectorIN2rl4WireESaIS1_EE5beginEv(ptr noundef nonnull align 8 dereferenceable(24) %168) #6
  %170 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator", ptr %21, i32 0, i32 0
  store ptr %169, ptr %170, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %22) #6
  %171 = load ptr, ptr %20, align 8, !tbaa !5
  %172 = call ptr @_ZNKSt6vectorIN2rl4WireESaIS1_EE3endEv(ptr noundef nonnull align 8 dereferenceable(24) %171) #6
  %173 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator", ptr %22, i32 0, i32 0
  store ptr %172, ptr %173, align 8
  br label %174

174:                                              ; preds = %194, %166
  %175 = call noundef zeroext i1 @_ZN9__gnu_cxxneIPKN2rl4WireESt6vectorIS2_SaIS2_EEEEbRKNS_17__normal_iteratorIT_T0_EESD_(ptr noundef nonnull align 8 dereferenceable(8) %21, ptr noundef nonnull align 8 dereferenceable(8) %22) #6
  br i1 %175, label %177, label %176

176:                                              ; preds = %174
  store i32 12, ptr %14, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %22) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #6
  br label %196

177:                                              ; preds = %174
  call void @llvm.lifetime.start.p0(i64 8, ptr %23) #6
  %178 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNK9__gnu_cxx17__normal_iteratorIPKN2rl4WireESt6vectorIS2_SaIS2_EEEdeEv(ptr noundef nonnull align 8 dereferenceable(8) %21) #6
  store ptr %178, ptr %23, align 8, !tbaa !5
  %179 = load ptr, ptr %23, align 8, !tbaa !5
  %180 = getelementptr inbounds %"struct.rl::Wire", ptr %179, i32 0, i32 1
  %181 = load double, ptr %180, align 8, !tbaa !22
  %182 = getelementptr inbounds %"class.rl::WireFitQLearn", ptr %24, i32 0, i32 2
  %183 = load ptr, ptr %182, align 8, !tbaa !13
  %184 = load ptr, ptr %23, align 8, !tbaa !5
  %185 = getelementptr inbounds %"struct.rl::Wire", ptr %184, i32 0, i32 0
  %186 = load ptr, ptr %183, align 8, !tbaa !20
  %187 = getelementptr inbounds ptr, ptr %186, i64 2
  %188 = load ptr, ptr %187, align 8
  %189 = call noundef double %188(ptr noundef nonnull align 8 dereferenceable(8) %183, ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 8 dereferenceable(24) %185)
  %190 = fsub double %181, %189
  %191 = call noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef %190, i32 noundef 2)
  %192 = load double, ptr %9, align 8, !tbaa !9
  %193 = fadd double %192, %191
  store double %193, ptr %9, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %23) #6
  br label %194

194:                                              ; preds = %177
  %195 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZN9__gnu_cxx17__normal_iteratorIPKN2rl4WireESt6vectorIS2_SaIS2_EEEppEv(ptr noundef nonnull align 8 dereferenceable(8) %21) #6
  br label %174

196:                                              ; preds = %176
  %197 = load i32, ptr %10, align 4, !tbaa !11
  %198 = add nsw i32 %197, 1
  store i32 %198, ptr %10, align 4, !tbaa !11
  br label %199

199:                                              ; preds = %196
  %200 = load double, ptr %9, align 8, !tbaa !9
  %201 = getelementptr inbounds %"class.rl::WireFitQLearn", ptr %24, i32 0, i32 8
  %202 = load double, ptr %201, align 8, !tbaa !28
  %203 = load ptr, ptr %7, align 8, !tbaa !5
  %204 = call noundef i64 @_ZNKSt6vectorIN2rl4WireESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %203) #6
  %205 = uitofp i64 %204 to double
  %206 = fmul double %202, %205
  %207 = fmul double %206, 2.000000e+01
  %208 = fcmp ogt double %200, %207
  br i1 %208, label %209, label %214

209:                                              ; preds = %199
  %210 = load i32, ptr %10, align 4, !tbaa !11
  %211 = getelementptr inbounds %"class.rl::WireFitQLearn", ptr %24, i32 0, i32 10
  %212 = load i32, ptr %211, align 8, !tbaa !29
  %213 = icmp slt i32 %210, %212
  br label %214

214:                                              ; preds = %209, %199
  %215 = phi i1 [ false, %199 ], [ %213, %209 ]
  br i1 %215, label %25, label %216, !llvm.loop !30

216:                                              ; preds = %214
  %217 = load i32, ptr %10, align 4, !tbaa !11
  %218 = getelementptr inbounds %"class.rl::WireFitQLearn", ptr %24, i32 0, i32 10
  %219 = load i32, ptr %218, align 8, !tbaa !29
  %220 = icmp eq i32 %217, %219
  br i1 %220, label %221, label %226

221:                                              ; preds = %216
  %222 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, ptr noundef @.str.10)
  %223 = load double, ptr %9, align 8, !tbaa !9
  %224 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEd(ptr noundef nonnull align 8 dereferenceable(8) %222, double noundef %223)
  %225 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) %224, ptr noundef @.str.6)
  br label %226

226:                                              ; preds = %221, %216
  call void @_ZNSt6vectorIN2rl4WireESaIS1_EEC2EOS3_(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %3) #6
  store i32 1, ptr %14, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #6
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNKSt6vectorIN2rl4WireESaIS1_EE5beginEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNKSt6vectorIN2rl4WireESaIS1_EE3endEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN9__gnu_cxxneIPKN2rl4WireESt6vectorIS2_SaIS2_EEEEbRKNS_17__normal_iteratorIT_T0_EESD_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #5

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZNK9__gnu_cxx17__normal_iteratorIPKN2rl4WireESt6vectorIS2_SaIS2_EEEdeEv(ptr noundef nonnull align 8 dereferenceable(8)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZN9__gnu_cxx17__normal_iteratorIPKN2rl4WireESt6vectorIS2_SaIS2_EEEppEv(ptr noundef nonnull align 8 dereferenceable(8)) #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"double", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !6, i64 16}
!14 = !{!"_ZTSN2rl13WireFitQLearnE", !15, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !12, i64 32, !12, i64 36, !10, i64 40, !10, i64 48, !10, i64 56, !10, i64 64, !12, i64 72, !12, i64 76, !16, i64 80, !16, i64 104, !16, i64 128, !16, i64 152, !6, i64 176}
!15 = !{!"_ZTSN2rl7LearnerE"}
!16 = !{!"_ZTSSt6vectorIdSaIdEE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!20 = !{!21, !21, i64 0}
!21 = !{!"vtable pointer", !8, i64 0}
!22 = !{!23, !10, i64 24}
!23 = !{!"_ZTSN2rl4WireE", !16, i64 0, !10, i64 24}
!24 = !{!14, !10, i64 64}
!25 = distinct !{!25, !26}
!26 = !{!"llvm.loop.mustprogress"}
!27 = distinct !{!27, !26}
!28 = !{!14, !10, i64 56}
!29 = !{!14, !12, i64 72}
!30 = distinct !{!30, !26}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<rl::Wire, std::allocator<rl::Wire>>::_Vector_impl" }
%"struct.std::_Vector_base<rl::Wire, std::allocator<rl::Wire>>::_Vector_impl" = type { %"struct.std::_Vector_base<rl::Wire, std::allocator<rl::Wire>>::_Vector_impl_data" }
%"struct.std::_Vector_base<rl::Wire, std::allocator<rl::Wire>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.__gnu_cxx::__normal_iterator" = type { ptr }

@_ZSt4cout = external global %"class.std::basic_ostream", align 8
@.str.6 = external hidden unnamed_addr constant [2 x i8], align 1
@.str.10 = external hidden unnamed_addr constant [39 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN2rl4WireESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN2rl4WireESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEd(ptr noundef nonnull align 8 dereferenceable(8), double noundef) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef, i32 noundef) local_unnamed_addr #5

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIN2rl4WireESaIS1_EEC2EOS3_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN2rl13WireFitQLearn15newControlWiresERKSt6vectorINS_4WireESaIS2_EES4_(ptr dead_on_unwind noalias writable sret(%"class.std::vector.8") align 8 %0, ptr nocapture noundef nonnull readonly align 8 dereferenceable(184) %1, ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef %3) local_unnamed_addr #3 align 2 {
  %5 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  %6 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  %7 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  %8 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  %9 = getelementptr inbounds i8, ptr %1, i64 16
  %10 = getelementptr inbounds i8, ptr %1, i64 64
  %11 = getelementptr inbounds i8, ptr %1, i64 56
  %12 = getelementptr inbounds i8, ptr %1, i64 72
  br label %13

13:                                               ; preds = %._crit_edge60, %4
  %.040 = phi i32 [ 0, %4 ], [ %90, %._crit_edge60 ]
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #6
  %14 = call ptr @_ZNKSt6vectorIN2rl4WireESaIS1_EE5beginEv(ptr noundef nonnull align 8 dereferenceable(24) %2) #6
  store ptr %14, ptr %5, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #6
  %15 = call ptr @_ZNKSt6vectorIN2rl4WireESaIS1_EE3endEv(ptr noundef nonnull align 8 dereferenceable(24) %2) #6
  store ptr %15, ptr %6, align 8
  %16 = call noundef zeroext i1 @_ZN9__gnu_cxxneIPKN2rl4WireESt6vectorIS2_SaIS2_EEEEbRKNS_17__normal_iteratorIT_T0_EESD_(ptr noundef nonnull align 8 dereferenceable(8) %5, ptr noundef nonnull align 8 dereferenceable(8) %6) #6
  br i1 %16, label %.lr.ph55, label %._crit_edge56

._crit_edge56:                                    ; preds = %._crit_edge53, %13
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #6
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %7) #6
  %17 = call ptr @_ZNKSt6vectorIN2rl4WireESaIS1_EE5beginEv(ptr noundef nonnull align 8 dereferenceable(24) %2) #6
  store ptr %17, ptr %7, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %8) #6
  %18 = call ptr @_ZNKSt6vectorIN2rl4WireESaIS1_EE3endEv(ptr noundef nonnull align 8 dereferenceable(24) %2) #6
  store ptr %18, ptr %8, align 8
  %19 = call noundef zeroext i1 @_ZN9__gnu_cxxneIPKN2rl4WireESt6vectorIS2_SaIS2_EEEEbRKNS_17__normal_iteratorIT_T0_EESD_(ptr noundef nonnull align 8 dereferenceable(8) %7, ptr noundef nonnull align 8 dereferenceable(8) %8) #6
  br i1 %19, label %.lr.ph59, label %._crit_edge60

.lr.ph55:                                         ; preds = %13, %._crit_edge53
  %20 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNK9__gnu_cxx17__normal_iteratorIPKN2rl4WireESt6vectorIS2_SaIS2_EEEdeEv(ptr noundef nonnull align 8 dereferenceable(8) %5) #6
  %21 = call noundef i64 @_ZNKSt6vectorIN2rl4WireESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %3) #6
  %.not = icmp eq i64 %21, 0
  br i1 %.not, label %._crit_edge53, label %.lr.ph52

.lr.ph52:                                         ; preds = %.lr.ph55
  %22 = getelementptr inbounds i8, ptr %20, i64 24
  br label %25

._crit_edge53:                                    ; preds = %._crit_edge, %.lr.ph55
  %23 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZN9__gnu_cxx17__normal_iteratorIPKN2rl4WireESt6vectorIS2_SaIS2_EEEppEv(ptr noundef nonnull align 8 dereferenceable(8) %5) #6
  %24 = call noundef zeroext i1 @_ZN9__gnu_cxxneIPKN2rl4WireESt6vectorIS2_SaIS2_EEEEbRKNS_17__normal_iteratorIT_T0_EESD_(ptr noundef nonnull align 8 dereferenceable(8) %5, ptr noundef nonnull align 8 dereferenceable(8) %6) #6
  br i1 %24, label %.lr.ph55, label %._crit_edge56

25:                                               ; preds = %.lr.ph52, %._crit_edge
  %26 = phi i64 [ 0, %.lr.ph52 ], [ %53, %._crit_edge ]
  %.04250 = phi i32 [ 0, %.lr.ph52 ], [ %52, %._crit_edge ]
  %27 = load ptr, ptr %9, align 8, !tbaa !5
  %28 = load ptr, ptr %27, align 8, !tbaa !17
  %29 = getelementptr inbounds i8, ptr %28, i64 16
  %30 = load ptr, ptr %29, align 8
  %31 = call noundef double %30(ptr noundef nonnull align 8 dereferenceable(8) %27, ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 8 dereferenceable(24) %20)
  %32 = load double, ptr %22, align 8, !tbaa !19
  %33 = fsub double %32, %31
  %34 = fmul double %33, -2.000000e+00
  %35 = load ptr, ptr %9, align 8, !tbaa !5
  %36 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN2rl4WireESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %26) #6
  %37 = load ptr, ptr %35, align 8, !tbaa !17
  %38 = getelementptr inbounds i8, ptr %37, i64 24
  %39 = load ptr, ptr %38, align 8
  %40 = call noundef double %39(ptr noundef nonnull align 8 dereferenceable(8) %35, ptr noundef nonnull align 8 dereferenceable(24) %20, ptr noundef nonnull align 8 dereferenceable(32) %36, ptr noundef nonnull align 8 dereferenceable(24) %3)
  %41 = fmul double %34, %40
  %42 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN2rl4WireESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %26) #6
  %43 = getelementptr inbounds i8, ptr %42, i64 24
  %44 = load double, ptr %43, align 8, !tbaa !19
  %45 = load double, ptr %10, align 8, !tbaa !21
  %46 = fneg double %45
  %47 = call double @llvm.fmuladd.f64(double %46, double %41, double %44)
  %48 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN2rl4WireESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %26) #6
  %49 = getelementptr inbounds i8, ptr %48, i64 24
  store double %47, ptr %49, align 8, !tbaa !19
  %50 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN2rl4WireESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %26) #6
  %51 = call noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %50) #6
  %.not61 = icmp eq i64 %51, 0
  br i1 %.not61, label %._crit_edge, label %.lr.ph

._crit_edge:                                      ; preds = %.lr.ph, %25
  %52 = add i32 %.04250, 1
  %53 = zext i32 %52 to i64
  %54 = call noundef i64 @_ZNKSt6vectorIN2rl4WireESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %3) #6
  %55 = icmp ugt i64 %54, %53
  br i1 %55, label %25, label %._crit_edge53, !llvm.loop !22

.lr.ph:                                           ; preds = %25, %.lr.ph
  %56 = phi i64 [ %86, %.lr.ph ], [ 0, %25 ]
  %.04149 = phi i32 [ %85, %.lr.ph ], [ 0, %25 ]
  %57 = load ptr, ptr %9, align 8, !tbaa !5
  %58 = load ptr, ptr %57, align 8, !tbaa !17
  %59 = getelementptr inbounds i8, ptr %58, i64 16
  %60 = load ptr, ptr %59, align 8
  %61 = call noundef double %60(ptr noundef nonnull align 8 dereferenceable(8) %57, ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 8 dereferenceable(24) %20)
  %62 = load double, ptr %22, align 8, !tbaa !19
  %63 = fsub double %62, %61
  %64 = fmul double %63, -2.000000e+00
  %65 = load ptr, ptr %9, align 8, !tbaa !5
  %66 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef %56) #6
  %67 = load double, ptr %66, align 8, !tbaa !24
  %68 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN2rl4WireESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %26) #6
  %69 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %68, i64 noundef %56) #6
  %70 = load double, ptr %69, align 8, !tbaa !24
  %71 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN2rl4WireESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %26) #6
  %72 = load ptr, ptr %65, align 8, !tbaa !17
  %73 = getelementptr inbounds i8, ptr %72, i64 32
  %74 = load ptr, ptr %73, align 8
  %75 = call noundef double %74(ptr noundef nonnull align 8 dereferenceable(8) %65, double noundef %67, double noundef %70, ptr noundef nonnull align 8 dereferenceable(24) %20, ptr noundef nonnull align 8 dereferenceable(32) %71, ptr noundef nonnull align 8 dereferenceable(24) %3)
  %76 = fmul double %64, %75
  %77 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN2rl4WireESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %26) #6
  %78 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %77, i64 noundef %56) #6
  %79 = load double, ptr %78, align 8, !tbaa !24
  %80 = load double, ptr %10, align 8, !tbaa !21
  %81 = fneg double %80
  %82 = call double @llvm.fmuladd.f64(double %81, double %76, double %79)
  %83 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN2rl4WireESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %26) #6
  %84 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %83, i64 noundef %56) #6
  store double %82, ptr %84, align 8, !tbaa !24
  %85 = add i32 %.04149, 1
  %86 = zext i32 %85 to i64
  %87 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN2rl4WireESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %26) #6
  %88 = call noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %87) #6
  %89 = icmp ugt i64 %88, %86
  br i1 %89, label %.lr.ph, label %._crit_edge, !llvm.loop !25

._crit_edge60:                                    ; preds = %.lr.ph59, %._crit_edge56
  %.0.lcssa = phi double [ 0.000000e+00, %._crit_edge56 ], [ %109, %.lr.ph59 ]
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %8) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #6
  %90 = add nuw nsw i32 %.040, 1
  %91 = load double, ptr %11, align 8, !tbaa !26
  %92 = call noundef i64 @_ZNKSt6vectorIN2rl4WireESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2) #6
  %93 = uitofp i64 %92 to double
  %94 = fmul double %91, %93
  %95 = fmul double %94, 2.000000e+01
  %96 = fcmp ogt double %.0.lcssa, %95
  %97 = load i32, ptr %12, align 8
  %98 = icmp slt i32 %90, %97
  %or.cond = select i1 %96, i1 %98, i1 false
  br i1 %or.cond, label %13, label %.critedge, !llvm.loop !27

.lr.ph59:                                         ; preds = %._crit_edge56, %.lr.ph59
  %.057 = phi double [ %109, %.lr.ph59 ], [ 0.000000e+00, %._crit_edge56 ]
  %99 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNK9__gnu_cxx17__normal_iteratorIPKN2rl4WireESt6vectorIS2_SaIS2_EEEdeEv(ptr noundef nonnull align 8 dereferenceable(8) %7) #6
  %100 = getelementptr inbounds i8, ptr %99, i64 24
  %101 = load double, ptr %100, align 8, !tbaa !19
  %102 = load ptr, ptr %9, align 8, !tbaa !5
  %103 = load ptr, ptr %102, align 8, !tbaa !17
  %104 = getelementptr inbounds i8, ptr %103, i64 16
  %105 = load ptr, ptr %104, align 8
  %106 = call noundef double %105(ptr noundef nonnull align 8 dereferenceable(8) %102, ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 8 dereferenceable(24) %99)
  %107 = fsub double %101, %106
  %108 = call noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef %107, i32 noundef 2)
  %109 = fadd double %.057, %108
  %110 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZN9__gnu_cxx17__normal_iteratorIPKN2rl4WireESt6vectorIS2_SaIS2_EEEppEv(ptr noundef nonnull align 8 dereferenceable(8) %7) #6
  %111 = call noundef zeroext i1 @_ZN9__gnu_cxxneIPKN2rl4WireESt6vectorIS2_SaIS2_EEEEbRKNS_17__normal_iteratorIT_T0_EESD_(ptr noundef nonnull align 8 dereferenceable(8) %7, ptr noundef nonnull align 8 dereferenceable(8) %8) #6
  br i1 %111, label %.lr.ph59, label %._crit_edge60

.critedge:                                        ; preds = %._crit_edge60
  %112 = icmp eq i32 %90, %97
  br i1 %112, label %113, label %117

113:                                              ; preds = %.critedge
  %114 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, ptr noundef nonnull @.str.10)
  %115 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEd(ptr noundef nonnull align 8 dereferenceable(8) %114, double noundef %.0.lcssa)
  %116 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) %115, ptr noundef nonnull @.str.6)
  br label %117

117:                                              ; preds = %113, %.critedge
  call void @_ZNSt6vectorIN2rl4WireESaIS1_EEC2EOS3_(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %3) #6
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNKSt6vectorIN2rl4WireESaIS1_EE5beginEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNKSt6vectorIN2rl4WireESaIS1_EE3endEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN9__gnu_cxxneIPKN2rl4WireESt6vectorIS2_SaIS2_EEEEbRKNS_17__normal_iteratorIT_T0_EESD_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #5

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZNK9__gnu_cxx17__normal_iteratorIPKN2rl4WireESt6vectorIS2_SaIS2_EEEdeEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZN9__gnu_cxx17__normal_iteratorIPKN2rl4WireESt6vectorIS2_SaIS2_EEEppEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 16}
!6 = !{!"_ZTSN2rl13WireFitQLearnE", !7, i64 0, !8, i64 8, !8, i64 16, !8, i64 24, !11, i64 32, !11, i64 36, !12, i64 40, !12, i64 48, !12, i64 56, !12, i64 64, !11, i64 72, !11, i64 76, !13, i64 80, !13, i64 104, !13, i64 128, !13, i64 152, !8, i64 176}
!7 = !{!"_ZTSN2rl7LearnerE"}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"double", !9, i64 0}
!13 = !{!"_ZTSSt6vectorIdSaIdEE", !14, i64 0}
!14 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !8, i64 0, !8, i64 8, !8, i64 16}
!17 = !{!18, !18, i64 0}
!18 = !{!"vtable pointer", !10, i64 0}
!19 = !{!20, !12, i64 24}
!20 = !{!"_ZTSN2rl4WireE", !13, i64 0, !12, i64 24}
!21 = !{!6, !12, i64 64}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}
!24 = !{!12, !12, i64 0}
!25 = distinct !{!25, !23}
!26 = !{!6, !12, i64 56}
!27 = distinct !{!27, !23}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass