; LLVM IR from IOsonata/IOsonata :: ARM/Nordic/nRF52/nRF52840/exemples/BoschAppBoard/src (bmi3)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.bmi3_gyr_dp_gain_offset = type { i16, i16, i16, i8, i8, i8 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_set_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) #2

; Function Attrs: nounwind uwtable
define dso_local signext i8 @bmi3_set_gyro_dp_off_dgain(ptr noundef %0, ptr noundef %1) #2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  %6 = alloca i8, align 1
  %7 = alloca i8, align 1
  %8 = alloca i8, align 1
  %9 = alloca i16, align 2
  %10 = alloca i16, align 2
  %11 = alloca i16, align 2
  %12 = alloca [6 x i16], align 2
  %13 = alloca [12 x i8], align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 2, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 2, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 2, ptr %11) #3
  call void @llvm.lifetime.start.p0(i64 12, ptr %12) #3
  call void @llvm.memset.p0.i64(ptr align 2 %12, i8 0, i64 12, i1 false)
  call void @llvm.lifetime.start.p0(i64 12, ptr %13) #3
  call void @llvm.memset.p0.i64(ptr align 1 %13, i8 0, i64 12, i1 false)
  %14 = load ptr, ptr %3, align 8, !tbaa !5
  %15 = icmp ne ptr %14, null
  br i1 %15, label %16, label %125

16:                                               ; preds = %2
  %17 = getelementptr inbounds [6 x i16], ptr %12, i64 0, i64 0
  %18 = load i16, ptr %17, align 2, !tbaa !9
  %19 = zext i16 %18 to i32
  %20 = and i32 %19, -1024
  %21 = load ptr, ptr %3, align 8, !tbaa !5
  %22 = getelementptr inbounds %struct.bmi3_gyr_dp_gain_offset, ptr %21, i32 0, i32 0
  %23 = load i16, ptr %22, align 2, !tbaa !11
  %24 = zext i16 %23 to i32
  %25 = and i32 %24, 1023
  %26 = or i32 %20, %25
  %27 = trunc i32 %26 to i16
  store i16 %27, ptr %9, align 2, !tbaa !9
  %28 = getelementptr inbounds [6 x i16], ptr %12, i64 0, i64 1
  %29 = load i16, ptr %28, align 2, !tbaa !9
  %30 = zext i16 %29 to i32
  %31 = and i32 %30, -128
  %32 = load ptr, ptr %3, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.bmi3_gyr_dp_gain_offset, ptr %32, i32 0, i32 3
  %34 = load i8, ptr %33, align 2, !tbaa !13
  %35 = zext i8 %34 to i32
  %36 = and i32 %35, 127
  %37 = or i32 %31, %36
  %38 = trunc i32 %37 to i8
  store i8 %38, ptr %6, align 1, !tbaa !14
  %39 = getelementptr inbounds [6 x i16], ptr %12, i64 0, i64 2
  %40 = load i16, ptr %39, align 2, !tbaa !9
  %41 = zext i16 %40 to i32
  %42 = and i32 %41, -1024
  %43 = load ptr, ptr %3, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.bmi3_gyr_dp_gain_offset, ptr %43, i32 0, i32 1
  %45 = load i16, ptr %44, align 2, !tbaa !15
  %46 = zext i16 %45 to i32
  %47 = and i32 %46, 1023
  %48 = or i32 %42, %47
  %49 = trunc i32 %48 to i16
  store i16 %49, ptr %10, align 2, !tbaa !9
  %50 = getelementptr inbounds [6 x i16], ptr %12, i64 0, i64 3
  %51 = load i16, ptr %50, align 2, !tbaa !9
  %52 = zext i16 %51 to i32
  %53 = and i32 %52, -128
  %54 = load ptr, ptr %3, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.bmi3_gyr_dp_gain_offset, ptr %54, i32 0, i32 4
  %56 = load i8, ptr %55, align 1, !tbaa !16
  %57 = zext i8 %56 to i32
  %58 = and i32 %57, 127
  %59 = or i32 %53, %58
  %60 = trunc i32 %59 to i8
  store i8 %60, ptr %7, align 1, !tbaa !14
  %61 = getelementptr inbounds [6 x i16], ptr %12, i64 0, i64 4
  %62 = load i16, ptr %61, align 2, !tbaa !9
  %63 = zext i16 %62 to i32
  %64 = and i32 %63, -1024
  %65 = load ptr, ptr %3, align 8, !tbaa !5
  %66 = getelementptr inbounds %struct.bmi3_gyr_dp_gain_offset, ptr %65, i32 0, i32 2
  %67 = load i16, ptr %66, align 2, !tbaa !17
  %68 = zext i16 %67 to i32
  %69 = and i32 %68, 1023
  %70 = or i32 %64, %69
  %71 = trunc i32 %70 to i16
  store i16 %71, ptr %11, align 2, !tbaa !9
  %72 = getelementptr inbounds [6 x i16], ptr %12, i64 0, i64 5
  %73 = load i16, ptr %72, align 2, !tbaa !9
  %74 = zext i16 %73 to i32
  %75 = and i32 %74, -128
  %76 = load ptr, ptr %3, align 8, !tbaa !5
  %77 = getelementptr inbounds %struct.bmi3_gyr_dp_gain_offset, ptr %76, i32 0, i32 5
  %78 = load i8, ptr %77, align 2, !tbaa !18
  %79 = zext i8 %78 to i32
  %80 = and i32 %79, 127
  %81 = or i32 %75, %80
  %82 = trunc i32 %81 to i8
  store i8 %82, ptr %8, align 1, !tbaa !14
  %83 = load i16, ptr %9, align 2, !tbaa !9
  %84 = zext i16 %83 to i32
  %85 = and i32 %84, 255
  %86 = trunc i32 %85 to i8
  %87 = getelementptr inbounds [12 x i8], ptr %13, i64 0, i64 0
  store i8 %86, ptr %87, align 1, !tbaa !14
  %88 = load i16, ptr %9, align 2, !tbaa !9
  %89 = zext i16 %88 to i32
  %90 = and i32 %89, 65280
  %91 = ashr i32 %90, 8
  %92 = trunc i32 %91 to i8
  %93 = getelementptr inbounds [12 x i8], ptr %13, i64 0, i64 1
  store i8 %92, ptr %93, align 1, !tbaa !14
  %94 = load i8, ptr %6, align 1, !tbaa !14
  %95 = getelementptr inbounds [12 x i8], ptr %13, i64 0, i64 2
  store i8 %94, ptr %95, align 1, !tbaa !14
  %96 = load i16, ptr %10, align 2, !tbaa !9
  %97 = zext i16 %96 to i32
  %98 = and i32 %97, 255
  %99 = trunc i32 %98 to i8
  %100 = getelementptr inbounds [12 x i8], ptr %13, i64 0, i64 4
  store i8 %99, ptr %100, align 1, !tbaa !14
  %101 = load i16, ptr %10, align 2, !tbaa !9
  %102 = zext i16 %101 to i32
  %103 = and i32 %102, 65280
  %104 = ashr i32 %103, 8
  %105 = trunc i32 %104 to i8
  %106 = getelementptr inbounds [12 x i8], ptr %13, i64 0, i64 5
  store i8 %105, ptr %106, align 1, !tbaa !14
  %107 = load i8, ptr %7, align 1, !tbaa !14
  %108 = getelementptr inbounds [12 x i8], ptr %13, i64 0, i64 6
  store i8 %107, ptr %108, align 1, !tbaa !14
  %109 = load i16, ptr %11, align 2, !tbaa !9
  %110 = zext i16 %109 to i32
  %111 = and i32 %110, 255
  %112 = trunc i32 %111 to i8
  %113 = getelementptr inbounds [12 x i8], ptr %13, i64 0, i64 8
  store i8 %112, ptr %113, align 1, !tbaa !14
  %114 = load i16, ptr %11, align 2, !tbaa !9
  %115 = zext i16 %114 to i32
  %116 = and i32 %115, 65280
  %117 = ashr i32 %116, 8
  %118 = trunc i32 %117 to i8
  %119 = getelementptr inbounds [12 x i8], ptr %13, i64 0, i64 9
  store i8 %118, ptr %119, align 1, !tbaa !14
  %120 = load i8, ptr %8, align 1, !tbaa !14
  %121 = getelementptr inbounds [12 x i8], ptr %13, i64 0, i64 10
  store i8 %120, ptr %121, align 1, !tbaa !14
  %122 = getelementptr inbounds [12 x i8], ptr %13, i64 0, i64 0
  %123 = load ptr, ptr %4, align 8, !tbaa !5
  %124 = call signext i8 @bmi3_set_regs(i8 noundef zeroext 102, ptr noundef %122, i16 noundef zeroext 12, ptr noundef %123)
  store i8 %124, ptr %5, align 1, !tbaa !14
  br label %126

125:                                              ; preds = %2
  store i8 -1, ptr %5, align 1, !tbaa !14
  br label %126

126:                                              ; preds = %125, %16
  %127 = load i8, ptr %5, align 1, !tbaa !14
  call void @llvm.lifetime.end.p0(i64 12, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 12, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #3
  ret i8 %127
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"bmi3_gyr_dp_gain_offset", !10, i64 0, !10, i64 2, !10, i64 4, !7, i64 6, !7, i64 7, !7, i64 8}
!13 = !{!12, !7, i64 6}
!14 = !{!7, !7, i64 0}
!15 = !{!12, !10, i64 2}
!16 = !{!12, !7, i64 7}
!17 = !{!12, !10, i64 4}
!18 = !{!12, !7, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_set_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local signext i8 @bmi3_set_gyro_dp_off_dgain(ptr noundef readonly %0, ptr noundef %1) local_unnamed_addr #2 {
  %3 = alloca [12 x i8], align 1
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %3) #3
  %4 = getelementptr inbounds i8, ptr %3, i64 3
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(12) %4, i8 0, i64 9, i1 false)
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %41, label %5

5:                                                ; preds = %2
  %6 = load i16, ptr %0, align 2, !tbaa !5
  %7 = getelementptr inbounds i8, ptr %0, i64 6
  %8 = load i8, ptr %7, align 2, !tbaa !10
  %9 = and i8 %8, 127
  %10 = getelementptr inbounds i8, ptr %0, i64 2
  %11 = load i16, ptr %10, align 2, !tbaa !11
  %12 = getelementptr inbounds i8, ptr %0, i64 7
  %13 = load i8, ptr %12, align 1, !tbaa !12
  %14 = and i8 %13, 127
  %15 = getelementptr inbounds i8, ptr %0, i64 4
  %16 = load i16, ptr %15, align 2, !tbaa !13
  %17 = getelementptr inbounds i8, ptr %0, i64 8
  %18 = load i8, ptr %17, align 2, !tbaa !14
  %19 = and i8 %18, 127
  %20 = trunc i16 %6 to i8
  store i8 %20, ptr %3, align 1, !tbaa !15
  %21 = lshr i16 %6, 8
  %22 = trunc nuw i16 %21 to i8
  %23 = and i8 %22, 3
  %24 = getelementptr inbounds i8, ptr %3, i64 1
  store i8 %23, ptr %24, align 1, !tbaa !15
  %25 = getelementptr inbounds i8, ptr %3, i64 2
  store i8 %9, ptr %25, align 1, !tbaa !15
  %26 = trunc i16 %11 to i8
  %27 = getelementptr inbounds i8, ptr %3, i64 4
  store i8 %26, ptr %27, align 1, !tbaa !15
  %28 = lshr i16 %11, 8
  %29 = trunc nuw i16 %28 to i8
  %30 = and i8 %29, 3
  %31 = getelementptr inbounds i8, ptr %3, i64 5
  store i8 %30, ptr %31, align 1, !tbaa !15
  %32 = getelementptr inbounds i8, ptr %3, i64 6
  store i8 %14, ptr %32, align 1, !tbaa !15
  %33 = trunc i16 %16 to i8
  %34 = getelementptr inbounds i8, ptr %3, i64 8
  store i8 %33, ptr %34, align 1, !tbaa !15
  %35 = lshr i16 %16, 8
  %36 = trunc nuw i16 %35 to i8
  %37 = and i8 %36, 3
  %38 = getelementptr inbounds i8, ptr %3, i64 9
  store i8 %37, ptr %38, align 1, !tbaa !15
  %39 = getelementptr inbounds i8, ptr %3, i64 10
  store i8 %19, ptr %39, align 1, !tbaa !15
  %40 = call signext i8 @bmi3_set_regs(i8 noundef zeroext 102, ptr noundef nonnull %3, i16 noundef zeroext 12, ptr noundef %1)
  br label %41

41:                                               ; preds = %2, %5
  %.0 = phi i8 [ %40, %5 ], [ -1, %2 ]
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %3) #3
  ret i8 %.0
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"bmi3_gyr_dp_gain_offset", !7, i64 0, !7, i64 2, !7, i64 4, !8, i64 6, !8, i64 7, !8, i64 8}
!7 = !{!"short", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !8, i64 6}
!11 = !{!6, !7, i64 2}
!12 = !{!6, !8, i64 7}
!13 = !{!6, !7, i64 4}
!14 = !{!6, !8, i64 8}
!15 = !{!8, !8, i64 0}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass