; LLVM IR from cornell-zhang/rosetta :: optical-flow/imageLib/Image.ll (ZN6CImage10DeAllocateEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.CShape = type { i32, i32, i32 }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN6CImage11SetDefaultsEv(ptr noundef nonnull align 8 dereferenceable(76)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN6CShapeC2Ev(ptr noundef nonnull align 4 dereferenceable(12)) unnamed_addr #0 align 2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6CImage10ReAllocateE6CShapeRKSt9type_infoiPvbi(ptr noundef nonnull align 8 dereferenceable(76), i64, i32, ptr noundef nonnull align 8 dereferenceable(16), i32 noundef, ptr noundef, i1 noundef zeroext, i32 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN6CImage10DeAllocateEv(ptr noundef nonnull align 8 dereferenceable(76) %0) #2 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca %struct.CShape, align 4
  %4 = alloca { i64, i32 }, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  %5 = load ptr, ptr %2, align 8
  call void @_ZN6CShapeC2Ev(ptr noundef nonnull align 4 dereferenceable(12) %3)
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %4, ptr align 4 %3, i64 12, i1 false)
  %6 = getelementptr inbounds { i64, i32 }, ptr %4, i32 0, i32 0
  %7 = load i64, ptr %6, align 4
  %8 = getelementptr inbounds { i64, i32 }, ptr %4, i32 0, i32 1
  %9 = load i32, ptr %8, align 4
  call void @_ZN6CImage10ReAllocateE6CShapeRKSt9type_infoiPvbi(ptr noundef nonnull align 8 dereferenceable(76) %5, i64 %7, i32 %9, ptr noundef nonnull align 8 dereferenceable(16) null, i32 noundef 0, ptr noundef null, i1 noundef zeroext false, i32 noundef 0)
  call void @_ZN6CImage11SetDefaultsEv(ptr noundef nonnull align 8 dereferenceable(76) %5)
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.CShape = type { i32, i32, i32 }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN6CImage11SetDefaultsEv(ptr noundef nonnull align 8 dereferenceable(76)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN6CShapeC2Ev(ptr noundef nonnull align 4 dereferenceable(12)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6CImage10ReAllocateE6CShapeRKSt9type_infoiPvbi(ptr noundef nonnull align 8 dereferenceable(76), i64, i32, ptr noundef nonnull align 8 dereferenceable(16), i32 noundef, ptr noundef, i1 noundef zeroext, i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN6CImage10DeAllocateEv(ptr noundef nonnull align 8 dereferenceable(76) %0) local_unnamed_addr #1 align 2 {
  %2 = alloca %struct.CShape, align 8
  call void @_ZN6CShapeC2Ev(ptr noundef nonnull align 4 dereferenceable(12) %2)
  %.sroa.0.0.copyload = load i64, ptr %2, align 8
  %.sroa.2.0..sroa_idx = getelementptr inbounds i8, ptr %2, i64 8
  %.sroa.2.0.copyload = load i32, ptr %.sroa.2.0..sroa_idx, align 8
  call void @_ZN6CImage10ReAllocateE6CShapeRKSt9type_infoiPvbi(ptr noundef nonnull align 8 dereferenceable(76) %0, i64 %.sroa.0.0.copyload, i32 %.sroa.2.0.copyload, ptr noundef nonnull align 8 dereferenceable(16) null, i32 noundef 0, ptr noundef null, i1 noundef zeroext false, i32 noundef 0)
  call void @_ZN6CImage11SetDefaultsEv(ptr noundef nonnull align 8 dereferenceable(76) %0)
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: GlobalOptPass,InferAlignmentPass,InferFunctionAttrsPass,SROAPass