; LLVM IR from VastoLorde95/Competitive-Programming :: CodeChef/SNACKDOWN/17/Pre-Elimination A/E/E.ll (Z5solveSt6vectorISt4pairIxxESaIS1_EE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::pair" = type { i64, i64 }

@n = external dso_local global i64, align 8
@k = external dso_local global i64, align 8
@ans = external dso_local global i64, align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5solveSt6vectorISt4pairIxxESaIS1_EE(ptr noundef %0) #0 {
  %2 = alloca ptr, align 8
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #4
  %8 = load i64, ptr @n, align 8, !tbaa !9
  %9 = load i64, ptr @k, align 8, !tbaa !9
  %10 = sub nsw i64 %8, %9
  %11 = sdiv i64 %10, 2
  %12 = add nsw i64 %11, 1
  store i64 %12, ptr %3, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #4
  %13 = load i64, ptr %3, align 8, !tbaa !9
  %14 = load i64, ptr @k, align 8, !tbaa !9
  %15 = add nsw i64 %13, %14
  %16 = sub nsw i64 %15, 1
  store i64 %16, ptr %4, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #4
  store i64 -1, ptr %5, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  store i32 0, ptr %6, align 4, !tbaa !11
  br label %17

17:                                               ; preds = %81, %1
  %18 = load i32, ptr %6, align 4, !tbaa !11
  %19 = sext i32 %18 to i64
  %20 = call noundef i64 @_ZNKSt6vectorISt4pairIxxESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #4
  %21 = icmp ult i64 %19, %20
  br i1 %21, label %23, label %22

22:                                               ; preds = %17
  store i32 2, ptr %7, align 4
  br label %84

23:                                               ; preds = %17
  %24 = load i32, ptr %6, align 4, !tbaa !11
  %25 = sext i32 %24 to i64
  %26 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorISt4pairIxxESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %25) #4
  %27 = getelementptr inbounds %"struct.std::pair", ptr %26, i32 0, i32 0
  %28 = load i64, ptr %27, align 8, !tbaa !13
  %29 = load i64, ptr %3, align 8, !tbaa !9
  %30 = icmp sle i64 %28, %29
  br i1 %30, label %31, label %46

31:                                               ; preds = %23
  %32 = load i32, ptr %6, align 4, !tbaa !11
  %33 = sext i32 %32 to i64
  %34 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorISt4pairIxxESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %33) #4
  %35 = getelementptr inbounds %"struct.std::pair", ptr %34, i32 0, i32 1
  %36 = load i64, ptr %35, align 8, !tbaa !15
  %37 = load i64, ptr %3, align 8, !tbaa !9
  %38 = icmp sge i64 %36, %37
  br i1 %38, label %39, label %46

39:                                               ; preds = %31
  %40 = load i32, ptr %6, align 4, !tbaa !11
  %41 = sext i32 %40 to i64
  %42 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorISt4pairIxxESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %41) #4
  %43 = getelementptr inbounds %"struct.std::pair", ptr %42, i32 0, i32 1
  %44 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %5, ptr noundef nonnull align 8 dereferenceable(8) %43)
  %45 = load i64, ptr %44, align 8, !tbaa !9
  store i64 %45, ptr %5, align 8, !tbaa !9
  br label %80

46:                                               ; preds = %31, %23
  %47 = load i32, ptr %6, align 4, !tbaa !11
  %48 = sext i32 %47 to i64
  %49 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorISt4pairIxxESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %48) #4
  %50 = getelementptr inbounds %"struct.std::pair", ptr %49, i32 0, i32 0
  %51 = load i64, ptr %50, align 8, !tbaa !13
  %52 = load i64, ptr %3, align 8, !tbaa !9
  %53 = icmp sgt i64 %51, %52
  br i1 %53, label %54, label %58

54:                                               ; preds = %46
  %55 = load i64, ptr %5, align 8, !tbaa !9
  %56 = icmp eq i64 %55, -1
  br i1 %56, label %57, label %58

57:                                               ; preds = %54
  store i64 -1, ptr @ans, align 8, !tbaa !9
  store i32 1, ptr %7, align 4
  br label %84

58:                                               ; preds = %54, %46
  %59 = load i32, ptr %6, align 4, !tbaa !11
  %60 = sext i32 %59 to i64
  %61 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorISt4pairIxxESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %60) #4
  %62 = getelementptr inbounds %"struct.std::pair", ptr %61, i32 0, i32 0
  %63 = load i64, ptr %62, align 8, !tbaa !13
  %64 = load i64, ptr %3, align 8, !tbaa !9
  %65 = icmp sgt i64 %63, %64
  br i1 %65, label %66, label %78

66:                                               ; preds = %58
  %67 = load i64, ptr %5, align 8, !tbaa !9
  %68 = add nsw i64 %67, 1
  store i64 %68, ptr %3, align 8, !tbaa !9
  store i64 -1, ptr %5, align 8, !tbaa !9
  %69 = load i64, ptr @ans, align 8, !tbaa !9
  %70 = add nsw i64 %69, 1
  store i64 %70, ptr @ans, align 8, !tbaa !9
  %71 = load i32, ptr %6, align 4, !tbaa !11
  %72 = add nsw i32 %71, -1
  store i32 %72, ptr %6, align 4, !tbaa !11
  %73 = load i64, ptr %3, align 8, !tbaa !9
  %74 = load i64, ptr %4, align 8, !tbaa !9
  %75 = icmp sgt i64 %73, %74
  br i1 %75, label %76, label %77

76:                                               ; preds = %66
  store i32 2, ptr %7, align 4
  br label %84

77:                                               ; preds = %66
  br label %78

78:                                               ; preds = %77, %58
  br label %79

79:                                               ; preds = %78
  br label %80

80:                                               ; preds = %79, %39
  br label %81

81:                                               ; preds = %80
  %82 = load i32, ptr %6, align 4, !tbaa !11
  %83 = add nsw i32 %82, 1
  store i32 %83, ptr %6, align 4, !tbaa !11
  br label %17, !llvm.loop !16

84:                                               ; preds = %76, %57, %22
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  %85 = load i32, ptr %7, align 4
  switch i32 %85, label %108 [
    i32 2, label %86
  ]

86:                                               ; preds = %84
  %87 = load i64, ptr %3, align 8, !tbaa !9
  %88 = load i64, ptr %4, align 8, !tbaa !9
  %89 = icmp sle i64 %87, %88
  br i1 %89, label %90, label %95

90:                                               ; preds = %86
  %91 = load i64, ptr %5, align 8, !tbaa !9
  %92 = load i64, ptr %4, align 8, !tbaa !9
  %93 = icmp slt i64 %91, %92
  br i1 %93, label %94, label %95

94:                                               ; preds = %90
  store i64 -1, ptr @ans, align 8, !tbaa !9
  br label %107

95:                                               ; preds = %90, %86
  %96 = load i64, ptr %3, align 8, !tbaa !9
  %97 = load i64, ptr %4, align 8, !tbaa !9
  %98 = icmp sle i64 %96, %97
  br i1 %98, label %99, label %106

99:                                               ; preds = %95
  %100 = load i64, ptr %5, align 8, !tbaa !9
  %101 = load i64, ptr %4, align 8, !tbaa !9
  %102 = icmp sge i64 %100, %101
  br i1 %102, label %103, label %106

103:                                              ; preds = %99
  %104 = load i64, ptr @ans, align 8, !tbaa !9
  %105 = add nsw i64 %104, 1
  store i64 %105, ptr @ans, align 8, !tbaa !9
  br label %106

106:                                              ; preds = %103, %99, %95
  br label %107

107:                                              ; preds = %106, %94
  store i32 0, ptr %7, align 4
  br label %108

108:                                              ; preds = %107, %84
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #4
  %109 = load i32, ptr %7, align 4
  switch i32 %109, label %111 [
    i32 0, label %110
    i32 1, label %110
  ]

110:                                              ; preds = %108, %108
  ret void

111:                                              ; preds = %108
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorISt4pairIxxESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorISt4pairIxxESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !10, i64 0}
!14 = !{!"_ZTSSt4pairIxxE", !10, i64 0, !10, i64 8}
!15 = !{!14, !10, i64 8}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@n = external dso_local local_unnamed_addr global i64, align 8
@k = external dso_local local_unnamed_addr global i64, align 8
@ans = external dso_local local_unnamed_addr global i64, align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z5solveSt6vectorISt4pairIxxESaIS1_EE(ptr noundef nonnull %0) local_unnamed_addr #0 {
  %2 = alloca i64, align 8
  %3 = load i64, ptr @n, align 8, !tbaa !5
  %4 = load i64, ptr @k, align 8, !tbaa !5
  %5 = sub nsw i64 %3, %4
  %6 = sdiv i64 %5, 2
  %7 = add nsw i64 %6, 1
  %8 = add i64 %6, %4
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
  store i64 -1, ptr %2, align 8, !tbaa !5
  %9 = tail call noundef i64 @_ZNKSt6vectorISt4pairIxxESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #3
  %.not45 = icmp eq i64 %9, 0
  br i1 %.not45, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %1, %38
  %10 = phi i64 [ %40, %38 ], [ 0, %1 ]
  %.02342 = phi i32 [ %39, %38 ], [ 0, %1 ]
  %.02441 = phi i64 [ %.125, %38 ], [ %7, %1 ]
  %11 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorISt4pairIxxESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %10) #3
  %12 = load i64, ptr %11, align 8, !tbaa !9
  %.not = icmp sgt i64 %12, %.02441
  br i1 %.not, label %22, label %13

13:                                               ; preds = %.lr.ph
  %14 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorISt4pairIxxESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %10) #3
  %15 = getelementptr inbounds i8, ptr %14, i64 8
  %16 = load i64, ptr %15, align 8, !tbaa !11
  %.not31 = icmp slt i64 %16, %.02441
  br i1 %.not31, label %22, label %17

17:                                               ; preds = %13
  %18 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorISt4pairIxxESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %10) #3
  %19 = getelementptr inbounds i8, ptr %18, i64 8
  %20 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %2, ptr noundef nonnull align 8 dereferenceable(8) %19)
  %21 = load i64, ptr %20, align 8, !tbaa !5
  store i64 %21, ptr %2, align 8, !tbaa !5
  br label %38

22:                                               ; preds = %13, %.lr.ph
  %23 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorISt4pairIxxESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %10) #3
  %24 = load i64, ptr %23, align 8, !tbaa !9
  %25 = icmp sgt i64 %24, %.02441
  %26 = load i64, ptr %2, align 8
  %27 = icmp eq i64 %26, -1
  %or.cond = select i1 %25, i1 %27, i1 false
  br i1 %or.cond, label %.sink.split, label %28

28:                                               ; preds = %22
  %29 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorISt4pairIxxESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %10) #3
  %30 = load i64, ptr %29, align 8, !tbaa !9
  %31 = icmp sgt i64 %30, %.02441
  br i1 %31, label %32, label %38

32:                                               ; preds = %28
  %33 = load i64, ptr %2, align 8, !tbaa !5
  %34 = add nsw i64 %33, 1
  store i64 -1, ptr %2, align 8, !tbaa !5
  %35 = load i64, ptr @ans, align 8, !tbaa !5
  %36 = add nsw i64 %35, 1
  store i64 %36, ptr @ans, align 8, !tbaa !5
  %37 = add nsw i32 %.02342, -1
  %.not32 = icmp slt i64 %33, %8
  br i1 %.not32, label %38, label %._crit_edge

38:                                               ; preds = %17, %28, %32
  %.125 = phi i64 [ %.02441, %17 ], [ %34, %32 ], [ %.02441, %28 ]
  %.1 = phi i32 [ %.02342, %17 ], [ %37, %32 ], [ %.02342, %28 ]
  %39 = add nsw i32 %.1, 1
  %40 = sext i32 %39 to i64
  %41 = call noundef i64 @_ZNKSt6vectorISt4pairIxxESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #3
  %42 = icmp ugt i64 %41, %40
  br i1 %42, label %.lr.ph, label %.._crit_edge.loopexit_crit_edge, !llvm.loop !12

.._crit_edge.loopexit_crit_edge:                  ; preds = %38
  %.pre.pre = load i64, ptr %2, align 8
  br label %._crit_edge

._crit_edge:                                      ; preds = %32, %.._crit_edge.loopexit_crit_edge, %1
  %43 = phi i64 [ -1, %1 ], [ %.pre.pre, %.._crit_edge.loopexit_crit_edge ], [ -1, %32 ]
  %.2.ph = phi i64 [ %7, %1 ], [ %.125, %.._crit_edge.loopexit_crit_edge ], [ %34, %32 ]
  %.not33 = icmp sgt i64 %.2.ph, %8
  %.not33.not = xor i1 %.not33, true
  %44 = icmp slt i64 %43, %8
  %or.cond36 = select i1 %.not33.not, i1 %44, i1 false
  br i1 %or.cond36, label %.sink.split, label %45

45:                                               ; preds = %._crit_edge
  %or.cond37 = select i1 %.not33, i1 true, i1 %44
  br i1 %or.cond37, label %49, label %46

46:                                               ; preds = %45
  %47 = load i64, ptr @ans, align 8, !tbaa !5
  %48 = add nsw i64 %47, 1
  br label %.sink.split

.sink.split:                                      ; preds = %22, %._crit_edge, %46
  %.sink = phi i64 [ %48, %46 ], [ -1, %._crit_edge ], [ -1, %22 ]
  store i64 %.sink, ptr @ans, align 8, !tbaa !5
  br label %49

49:                                               ; preds = %.sink.split, %45
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorISt4pairIxxESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6vectorISt4pairIxxESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"_ZTSSt4pairIxxE", !6, i64 0, !6, i64 8}
!11 = !{!10, !6, i64 8}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass