; LLVM IR from sgtlaugh/algovault :: code_library/gauss_prime_mod.ll (Z5gaussSt6vectorIS_IiSaIiEESaIS1_EERS1_i)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::allocator.2" = type { i8 }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z4expoiii(i32 noundef, i32 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z5gaussSt6vectorIS_IiSaIiEESaIS1_EERS1_i(ptr noundef %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %2) #2 personality ptr @__gxx_personality_v0 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i64, align 8
  %19 = alloca i32, align 4
  %20 = alloca %"class.std::vector.0", align 8
  %21 = alloca i32, align 4
  %22 = alloca %"class.std::allocator.2", align 1
  %23 = alloca ptr, align 8
  %24 = alloca i32, align 4
  %25 = alloca i64, align 8
  %26 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  %27 = call noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #4
  %28 = trunc i64 %27 to i32
  store i32 %28, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  %29 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #4
  %30 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %29) #4
  %31 = sub i64 %30, 1
  %32 = trunc i64 %31 to i32
  store i32 %32, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #4
  store i32 0, ptr %17, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #4
  %33 = load i32, ptr %7, align 4, !tbaa !9
  %34 = sext i32 %33 to i64
  %35 = load i32, ptr %7, align 4, !tbaa !9
  %36 = sext i32 %35 to i64
  %37 = mul nsw i64 %34, %36
  store i64 %37, ptr %18, align 8, !tbaa !11
  %38 = load ptr, ptr %6, align 8, !tbaa !5
  %39 = load i32, ptr %9, align 4, !tbaa !9
  %40 = sext i32 %39 to i64
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #4
  store i32 0, ptr %19, align 4, !tbaa !9
  call void @_ZNSt6vectorIiSaIiEE6assignEmRKi(ptr noundef nonnull align 8 dereferenceable(24) %38, i64 noundef %40, ptr noundef nonnull align 4 dereferenceable(4) %19)
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #4
  call void @llvm.lifetime.start.p0(i64 24, ptr %20) #4
  %41 = load i32, ptr %9, align 4, !tbaa !9
  %42 = sext i32 %41 to i64
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #4
  store i32 -1, ptr %21, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %22) #4
  call void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %22) #4
  invoke void @_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef %42, ptr noundef nonnull align 4 dereferenceable(4) %21, ptr noundef nonnull align 1 dereferenceable(1) %22)
          to label %43 unwind label %79

43:                                               ; preds = %3
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %22) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %22) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #4
  store i32 0, ptr %11, align 4, !tbaa !9
  store i32 0, ptr %10, align 4, !tbaa !9
  br label %44

44:                                               ; preds = %237, %43
  %45 = load i32, ptr %11, align 4, !tbaa !9
  %46 = load i32, ptr %9, align 4, !tbaa !9
  %47 = icmp slt i32 %45, %46
  br i1 %47, label %48, label %52

48:                                               ; preds = %44
  %49 = load i32, ptr %10, align 4, !tbaa !9
  %50 = load i32, ptr %8, align 4, !tbaa !9
  %51 = icmp slt i32 %49, %50
  br label %52

52:                                               ; preds = %48, %44
  %53 = phi i1 [ false, %44 ], [ %51, %48 ]
  br i1 %53, label %54, label %240

54:                                               ; preds = %52
  %55 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %55, ptr %12, align 4, !tbaa !9
  %56 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %56, ptr %14, align 4, !tbaa !9
  br label %57

57:                                               ; preds = %84, %54
  %58 = load i32, ptr %12, align 4, !tbaa !9
  %59 = load i32, ptr %8, align 4, !tbaa !9
  %60 = icmp slt i32 %58, %59
  br i1 %60, label %61, label %87

61:                                               ; preds = %57
  %62 = load i32, ptr %12, align 4, !tbaa !9
  %63 = sext i32 %62 to i64
  %64 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %63) #4
  %65 = load i32, ptr %11, align 4, !tbaa !9
  %66 = sext i32 %65 to i64
  %67 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %64, i64 noundef %66) #4
  %68 = load i32, ptr %67, align 4, !tbaa !9
  %69 = load i32, ptr %14, align 4, !tbaa !9
  %70 = sext i32 %69 to i64
  %71 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %70) #4
  %72 = load i32, ptr %11, align 4, !tbaa !9
  %73 = sext i32 %72 to i64
  %74 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %71, i64 noundef %73) #4
  %75 = load i32, ptr %74, align 4, !tbaa !9
  %76 = icmp sgt i32 %68, %75
  br i1 %76, label %77, label %83

77:                                               ; preds = %61
  %78 = load i32, ptr %12, align 4, !tbaa !9
  store i32 %78, ptr %14, align 4, !tbaa !9
  br label %83

79:                                               ; preds = %3
  %80 = landingpad { ptr, i32 }
          cleanup
  %81 = extractvalue { ptr, i32 } %80, 0
  store ptr %81, ptr %23, align 8
  %82 = extractvalue { ptr, i32 } %80, 1
  store i32 %82, ptr %24, align 4
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %22) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %22) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr %20) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  br label %352

83:                                               ; preds = %77, %61
  br label %84

84:                                               ; preds = %83
  %85 = load i32, ptr %12, align 4, !tbaa !9
  %86 = add nsw i32 %85, 1
  store i32 %86, ptr %12, align 4, !tbaa !9
  br label %57, !llvm.loop !13

87:                                               ; preds = %57
  %88 = load i32, ptr %14, align 4, !tbaa !9
  %89 = sext i32 %88 to i64
  %90 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %89) #4
  %91 = load i32, ptr %11, align 4, !tbaa !9
  %92 = sext i32 %91 to i64
  %93 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %90, i64 noundef %92) #4
  %94 = load i32, ptr %93, align 4, !tbaa !9
  %95 = icmp ne i32 %94, 0
  br i1 %95, label %96, label %236

96:                                               ; preds = %87
  %97 = load i32, ptr %10, align 4, !tbaa !9
  %98 = load i32, ptr %11, align 4, !tbaa !9
  %99 = sext i32 %98 to i64
  %100 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef %99) #4
  store i32 %97, ptr %100, align 4, !tbaa !9
  %101 = load i32, ptr %11, align 4, !tbaa !9
  store i32 %101, ptr %13, align 4, !tbaa !9
  br label %102

102:                                              ; preds = %119, %96
  %103 = load i32, ptr %13, align 4, !tbaa !9
  %104 = load i32, ptr %9, align 4, !tbaa !9
  %105 = icmp sle i32 %103, %104
  br i1 %105, label %106, label %122

106:                                              ; preds = %102
  %107 = load i32, ptr %14, align 4, !tbaa !9
  %108 = sext i32 %107 to i64
  %109 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %108) #4
  %110 = load i32, ptr %13, align 4, !tbaa !9
  %111 = sext i32 %110 to i64
  %112 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %109, i64 noundef %111) #4
  %113 = load i32, ptr %10, align 4, !tbaa !9
  %114 = sext i32 %113 to i64
  %115 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %114) #4
  %116 = load i32, ptr %13, align 4, !tbaa !9
  %117 = sext i32 %116 to i64
  %118 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %115, i64 noundef %117) #4
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %112, ptr noundef nonnull align 4 dereferenceable(4) %118) #4
  br label %119

119:                                              ; preds = %106
  %120 = load i32, ptr %13, align 4, !tbaa !9
  %121 = add nsw i32 %120, 1
  store i32 %121, ptr %13, align 4, !tbaa !9
  br label %102, !llvm.loop !15

122:                                              ; preds = %102
  %123 = load i32, ptr %10, align 4, !tbaa !9
  %124 = sext i32 %123 to i64
  %125 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %124) #4
  %126 = load i32, ptr %11, align 4, !tbaa !9
  %127 = sext i32 %126 to i64
  %128 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %125, i64 noundef %127) #4
  %129 = load i32, ptr %128, align 4, !tbaa !9
  %130 = load i32, ptr %7, align 4, !tbaa !9
  %131 = sub nsw i32 %130, 2
  %132 = load i32, ptr %7, align 4, !tbaa !9
  %133 = call noundef i32 @_Z4expoiii(i32 noundef %129, i32 noundef %131, i32 noundef %132)
  store i32 %133, ptr %16, align 4, !tbaa !9
  store i32 0, ptr %12, align 4, !tbaa !9
  br label %134

134:                                              ; preds = %230, %122
  %135 = load i32, ptr %12, align 4, !tbaa !9
  %136 = load i32, ptr %8, align 4, !tbaa !9
  %137 = icmp slt i32 %135, %136
  br i1 %137, label %138, label %141

138:                                              ; preds = %134
  %139 = load i32, ptr %16, align 4, !tbaa !9
  %140 = icmp ne i32 %139, 0
  br label %141

141:                                              ; preds = %138, %134
  %142 = phi i1 [ false, %134 ], [ %140, %138 ]
  br i1 %142, label %143, label %233

143:                                              ; preds = %141
  %144 = load i32, ptr %12, align 4, !tbaa !9
  %145 = load i32, ptr %10, align 4, !tbaa !9
  %146 = icmp ne i32 %144, %145
  br i1 %146, label %147, label %229

147:                                              ; preds = %143
  %148 = load i32, ptr %12, align 4, !tbaa !9
  %149 = sext i32 %148 to i64
  %150 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %149) #4
  %151 = load i32, ptr %11, align 4, !tbaa !9
  %152 = sext i32 %151 to i64
  %153 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %150, i64 noundef %152) #4
  %154 = load i32, ptr %153, align 4, !tbaa !9
  %155 = icmp ne i32 %154, 0
  br i1 %155, label %156, label %229

156:                                              ; preds = %147
  %157 = load i32, ptr %12, align 4, !tbaa !9
  %158 = sext i32 %157 to i64
  %159 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %158) #4
  %160 = load i32, ptr %11, align 4, !tbaa !9
  %161 = sext i32 %160 to i64
  %162 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %159, i64 noundef %161) #4
  %163 = load i32, ptr %162, align 4, !tbaa !9
  %164 = sext i32 %163 to i64
  %165 = load i32, ptr %16, align 4, !tbaa !9
  %166 = sext i32 %165 to i64
  %167 = mul nsw i64 %164, %166
  %168 = load i32, ptr %7, align 4, !tbaa !9
  %169 = sext i32 %168 to i64
  %170 = srem i64 %167, %169
  %171 = trunc i64 %170 to i32
  store i32 %171, ptr %15, align 4, !tbaa !9
  %172 = load i32, ptr %11, align 4, !tbaa !9
  store i32 %172, ptr %13, align 4, !tbaa !9
  br label %173

173:                                              ; preds = %225, %156
  %174 = load i32, ptr %13, align 4, !tbaa !9
  %175 = load i32, ptr %9, align 4, !tbaa !9
  %176 = icmp sle i32 %174, %175
  br i1 %176, label %177, label %180

177:                                              ; preds = %173
  %178 = load i32, ptr %15, align 4, !tbaa !9
  %179 = icmp ne i32 %178, 0
  br label %180

180:                                              ; preds = %177, %173
  %181 = phi i1 [ false, %173 ], [ %179, %177 ]
  br i1 %181, label %182, label %228

182:                                              ; preds = %180
  %183 = load i32, ptr %10, align 4, !tbaa !9
  %184 = sext i32 %183 to i64
  %185 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %184) #4
  %186 = load i32, ptr %13, align 4, !tbaa !9
  %187 = sext i32 %186 to i64
  %188 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %185, i64 noundef %187) #4
  %189 = load i32, ptr %188, align 4, !tbaa !9
  %190 = icmp ne i32 %189, 0
  br i1 %190, label %191, label %224

191:                                              ; preds = %182
  %192 = load i64, ptr %18, align 8, !tbaa !11
  %193 = load i32, ptr %12, align 4, !tbaa !9
  %194 = sext i32 %193 to i64
  %195 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %194) #4
  %196 = load i32, ptr %13, align 4, !tbaa !9
  %197 = sext i32 %196 to i64
  %198 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %195, i64 noundef %197) #4
  %199 = load i32, ptr %198, align 4, !tbaa !9
  %200 = sext i32 %199 to i64
  %201 = add nsw i64 %192, %200
  %202 = load i32, ptr %10, align 4, !tbaa !9
  %203 = sext i32 %202 to i64
  %204 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %203) #4
  %205 = load i32, ptr %13, align 4, !tbaa !9
  %206 = sext i32 %205 to i64
  %207 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %204, i64 noundef %206) #4
  %208 = load i32, ptr %207, align 4, !tbaa !9
  %209 = sext i32 %208 to i64
  %210 = load i32, ptr %15, align 4, !tbaa !9
  %211 = sext i32 %210 to i64
  %212 = mul nsw i64 %209, %211
  %213 = sub nsw i64 %201, %212
  %214 = load i32, ptr %7, align 4, !tbaa !9
  %215 = sext i32 %214 to i64
  %216 = srem i64 %213, %215
  %217 = trunc i64 %216 to i32
  %218 = load i32, ptr %12, align 4, !tbaa !9
  %219 = sext i32 %218 to i64
  %220 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %219) #4
  %221 = load i32, ptr %13, align 4, !tbaa !9
  %222 = sext i32 %221 to i64
  %223 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %220, i64 noundef %222) #4
  store i32 %217, ptr %223, align 4, !tbaa !9
  br label %224

224:                                              ; preds = %191, %182
  br label %225

225:                                              ; preds = %224
  %226 = load i32, ptr %13, align 4, !tbaa !9
  %227 = add nsw i32 %226, 1
  store i32 %227, ptr %13, align 4, !tbaa !9
  br label %173, !llvm.loop !16

228:                                              ; preds = %180
  br label %229

229:                                              ; preds = %228, %147, %143
  br label %230

230:                                              ; preds = %229
  %231 = load i32, ptr %12, align 4, !tbaa !9
  %232 = add nsw i32 %231, 1
  store i32 %232, ptr %12, align 4, !tbaa !9
  br label %134, !llvm.loop !17

233:                                              ; preds = %141
  %234 = load i32, ptr %10, align 4, !tbaa !9
  %235 = add nsw i32 %234, 1
  store i32 %235, ptr %10, align 4, !tbaa !9
  br label %236

236:                                              ; preds = %233, %87
  br label %237

237:                                              ; preds = %236
  %238 = load i32, ptr %11, align 4, !tbaa !9
  %239 = add nsw i32 %238, 1
  store i32 %239, ptr %11, align 4, !tbaa !9
  br label %44, !llvm.loop !18

240:                                              ; preds = %52
  store i32 0, ptr %10, align 4, !tbaa !9
  br label %241

241:                                              ; preds = %292, %240
  %242 = load i32, ptr %10, align 4, !tbaa !9
  %243 = load i32, ptr %9, align 4, !tbaa !9
  %244 = icmp slt i32 %242, %243
  br i1 %244, label %245, label %295

245:                                              ; preds = %241
  %246 = load i32, ptr %10, align 4, !tbaa !9
  %247 = sext i32 %246 to i64
  %248 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef %247) #4
  %249 = load i32, ptr %248, align 4, !tbaa !9
  %250 = icmp eq i32 %249, -1
  br i1 %250, label %251, label %254

251:                                              ; preds = %245
  %252 = load i32, ptr %17, align 4, !tbaa !9
  %253 = add nsw i32 %252, 1
  store i32 %253, ptr %17, align 4, !tbaa !9
  br label %291

254:                                              ; preds = %245
  %255 = load i32, ptr %10, align 4, !tbaa !9
  %256 = sext i32 %255 to i64
  %257 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef %256) #4
  %258 = load i32, ptr %257, align 4, !tbaa !9
  %259 = sext i32 %258 to i64
  %260 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %259) #4
  %261 = load i32, ptr %10, align 4, !tbaa !9
  %262 = sext i32 %261 to i64
  %263 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %260, i64 noundef %262) #4
  %264 = load i32, ptr %263, align 4, !tbaa !9
  %265 = load i32, ptr %7, align 4, !tbaa !9
  %266 = sub nsw i32 %265, 2
  %267 = load i32, ptr %7, align 4, !tbaa !9
  %268 = call noundef i32 @_Z4expoiii(i32 noundef %264, i32 noundef %266, i32 noundef %267)
  store i32 %268, ptr %16, align 4, !tbaa !9
  %269 = load i32, ptr %10, align 4, !tbaa !9
  %270 = sext i32 %269 to i64
  %271 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef %270) #4
  %272 = load i32, ptr %271, align 4, !tbaa !9
  %273 = sext i32 %272 to i64
  %274 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %273) #4
  %275 = load i32, ptr %9, align 4, !tbaa !9
  %276 = sext i32 %275 to i64
  %277 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %274, i64 noundef %276) #4
  %278 = load i32, ptr %277, align 4, !tbaa !9
  %279 = sext i32 %278 to i64
  %280 = load i32, ptr %16, align 4, !tbaa !9
  %281 = sext i32 %280 to i64
  %282 = mul nsw i64 %279, %281
  %283 = load i32, ptr %7, align 4, !tbaa !9
  %284 = sext i32 %283 to i64
  %285 = srem i64 %282, %284
  %286 = trunc i64 %285 to i32
  %287 = load ptr, ptr %6, align 8, !tbaa !5
  %288 = load i32, ptr %10, align 4, !tbaa !9
  %289 = sext i32 %288 to i64
  %290 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %287, i64 noundef %289) #4
  store i32 %286, ptr %290, align 4, !tbaa !9
  br label %291

291:                                              ; preds = %254, %251
  br label %292

292:                                              ; preds = %291
  %293 = load i32, ptr %10, align 4, !tbaa !9
  %294 = add nsw i32 %293, 1
  store i32 %294, ptr %10, align 4, !tbaa !9
  br label %241, !llvm.loop !19

295:                                              ; preds = %241
  store i32 0, ptr %10, align 4, !tbaa !9
  br label %296

296:                                              ; preds = %345, %295
  %297 = load i32, ptr %10, align 4, !tbaa !9
  %298 = load i32, ptr %8, align 4, !tbaa !9
  %299 = icmp slt i32 %297, %298
  br i1 %299, label %300, label %348

300:                                              ; preds = %296
  call void @llvm.lifetime.start.p0(i64 8, ptr %25) #4
  store i64 0, ptr %25, align 8, !tbaa !11
  store i32 0, ptr %11, align 4, !tbaa !9
  br label %301

301:                                              ; preds = %326, %300
  %302 = load i32, ptr %11, align 4, !tbaa !9
  %303 = load i32, ptr %9, align 4, !tbaa !9
  %304 = icmp slt i32 %302, %303
  br i1 %304, label %305, label %329

305:                                              ; preds = %301
  %306 = load i64, ptr %25, align 8, !tbaa !11
  %307 = load ptr, ptr %6, align 8, !tbaa !5
  %308 = load i32, ptr %11, align 4, !tbaa !9
  %309 = sext i32 %308 to i64
  %310 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %307, i64 noundef %309) #4
  %311 = load i32, ptr %310, align 4, !tbaa !9
  %312 = sext i32 %311 to i64
  %313 = load i32, ptr %10, align 4, !tbaa !9
  %314 = sext i32 %313 to i64
  %315 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %314) #4
  %316 = load i32, ptr %11, align 4, !tbaa !9
  %317 = sext i32 %316 to i64
  %318 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %315, i64 noundef %317) #4
  %319 = load i32, ptr %318, align 4, !tbaa !9
  %320 = sext i32 %319 to i64
  %321 = mul nsw i64 %312, %320
  %322 = add nsw i64 %306, %321
  %323 = load i32, ptr %7, align 4, !tbaa !9
  %324 = sext i32 %323 to i64
  %325 = srem i64 %322, %324
  store i64 %325, ptr %25, align 8, !tbaa !11
  br label %326

326:                                              ; preds = %305
  %327 = load i32, ptr %11, align 4, !tbaa !9
  %328 = add nsw i32 %327, 1
  store i32 %328, ptr %11, align 4, !tbaa !9
  br label %301, !llvm.loop !20

329:                                              ; preds = %301
  %330 = load i64, ptr %25, align 8, !tbaa !11
  %331 = load i32, ptr %10, align 4, !tbaa !9
  %332 = sext i32 %331 to i64
  %333 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %332) #4
  %334 = load i32, ptr %9, align 4, !tbaa !9
  %335 = sext i32 %334 to i64
  %336 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %333, i64 noundef %335) #4
  %337 = load i32, ptr %336, align 4, !tbaa !9
  %338 = sext i32 %337 to i64
  %339 = icmp ne i64 %330, %338
  br i1 %339, label %340, label %341

340:                                              ; preds = %329
  store i32 -1, ptr %4, align 4
  store i32 1, ptr %26, align 4
  br label %342

341:                                              ; preds = %329
  store i32 0, ptr %26, align 4
  br label %342

342:                                              ; preds = %341, %340
  call void @llvm.lifetime.end.p0(i64 8, ptr %25) #4
  %343 = load i32, ptr %26, align 4
  switch i32 %343, label %350 [
    i32 0, label %344
  ]

344:                                              ; preds = %342
  br label %345

345:                                              ; preds = %344
  %346 = load i32, ptr %10, align 4, !tbaa !9
  %347 = add nsw i32 %346, 1
  store i32 %347, ptr %10, align 4, !tbaa !9
  br label %296, !llvm.loop !21

348:                                              ; preds = %296
  %349 = load i32, ptr %17, align 4, !tbaa !9
  store i32 %349, ptr %4, align 4
  store i32 1, ptr %26, align 4
  br label %350

350:                                              ; preds = %348, %342
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %20) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr %20) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  %351 = load i32, ptr %4, align 4
  ret i32 %351

352:                                              ; preds = %79
  %353 = load ptr, ptr %23, align 8
  %354 = load i32, ptr %24, align 4
  %355 = insertvalue { ptr, i32 } poison, ptr %353, 0
  %356 = insertvalue { ptr, i32 } %355, i32 %354, 1
  resume { ptr, i32 } %356
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE6assignEmRKi(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 4 dereferenceable(4)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #2 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long long", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}
!17 = distinct !{!17, !14}
!18 = distinct !{!18, !14}
!19 = distinct !{!19, !14}
!20 = distinct !{!20, !14}
!21 = distinct !{!21, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::allocator.2" = type { i8 }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z4expoiii(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z5gaussSt6vectorIS_IiSaIiEESaIS1_EERS1_i(ptr noundef nonnull %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %2) local_unnamed_addr #2 personality ptr @__gxx_personality_v0 {
  %4 = alloca i32, align 4
  %5 = alloca %"class.std::vector.0", align 8
  %6 = alloca i32, align 4
  %7 = alloca %"class.std::allocator.2", align 1
  %8 = tail call noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #4
  %9 = trunc i64 %8 to i32
  %10 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #4
  %11 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %10) #4
  %12 = trunc i64 %11 to i32
  %13 = add i32 %12, -1
  %14 = sext i32 %2 to i64
  %15 = mul nsw i64 %14, %14
  %16 = sext i32 %13 to i64
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #4
  store i32 0, ptr %4, align 4, !tbaa !5
  call void @_ZNSt6vectorIiSaIiEE6assignEmRKi(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %16, ptr noundef nonnull align 4 dereferenceable(4) %4)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #4
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %5) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #4
  store i32 -1, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %7) #4
  call void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %7) #4
  invoke void @_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %16, ptr noundef nonnull align 4 dereferenceable(4) %6, ptr noundef nonnull align 1 dereferenceable(1) %7)
          to label %17 unwind label %36

17:                                               ; preds = %3
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %7) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %7) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #4
  %18 = icmp sgt i32 %13, 0
  %19 = icmp sgt i32 %9, 0
  %20 = and i1 %18, %19
  br i1 %20, label %.preheader126.lr.ph, label %.preheader125

.preheader126.lr.ph:                              ; preds = %17
  %21 = add nsw i32 %2, -2
  %22 = and i64 %8, 2147483647
  %wide.trip.count = and i64 %11, 4294967295
  %wide.trip.count169 = and i64 %11, 4294967295
  br label %.preheader126

.preheader126:                                    ; preds = %.preheader126.lr.ph, %89
  %indvars.iv161 = phi i64 [ 0, %.preheader126.lr.ph ], [ %indvars.iv.next162, %89 ]
  %.0101140 = phi i32 [ 0, %.preheader126.lr.ph ], [ %.1102, %89 ]
  %23 = sext i32 %.0101140 to i64
  br label %25

.preheader125:                                    ; preds = %89, %17
  br i1 %18, label %.lr.ph143, label %.preheader124.thread

.lr.ph143:                                        ; preds = %.preheader125
  %24 = add nsw i32 %2, -2
  %wide.trip.count178 = zext nneg i32 %13 to i64
  br label %109

25:                                               ; preds = %.preheader126, %25
  %indvars.iv = phi i64 [ %23, %.preheader126 ], [ %indvars.iv.next, %25 ]
  %.0110127 = phi i32 [ %.0101140, %.preheader126 ], [ %spec.select, %25 ]
  %26 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #4
  %27 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %26, i64 noundef %indvars.iv161) #4
  %28 = load i32, ptr %27, align 4, !tbaa !5
  %29 = sext i32 %.0110127 to i64
  %30 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %29) #4
  %31 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %30, i64 noundef %indvars.iv161) #4
  %32 = load i32, ptr %31, align 4, !tbaa !5
  %33 = icmp sgt i32 %28, %32
  %34 = trunc nsw i64 %indvars.iv to i32
  %spec.select = select i1 %33, i32 %34, i32 %.0110127
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %35 = icmp slt i64 %indvars.iv.next, %22
  br i1 %35, label %25, label %38, !llvm.loop !9

36:                                               ; preds = %3
  %37 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %7) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %7) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #4
  resume { ptr, i32 } %37

38:                                               ; preds = %25
  %39 = sext i32 %spec.select to i64
  %40 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %39) #4
  %41 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %40, i64 noundef %indvars.iv161) #4
  %42 = load i32, ptr %41, align 4, !tbaa !5
  %.not119 = icmp eq i32 %42, 0
  br i1 %.not119, label %89, label %.lr.ph

.lr.ph:                                           ; preds = %38
  %43 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %indvars.iv161) #4
  store i32 %.0101140, ptr %43, align 4, !tbaa !5
  br label %44

44:                                               ; preds = %.lr.ph, %44
  %indvars.iv163 = phi i64 [ %indvars.iv161, %.lr.ph ], [ %indvars.iv.next164, %44 ]
  %45 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %39) #4
  %46 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %45, i64 noundef %indvars.iv163) #4
  %47 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %23) #4
  %48 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %47, i64 noundef %indvars.iv163) #4
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %46, ptr noundef nonnull align 4 dereferenceable(4) %48) #4
  %indvars.iv.next164 = add nuw nsw i64 %indvars.iv163, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next164, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %44, !llvm.loop !11

._crit_edge:                                      ; preds = %44
  %49 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %23) #4
  %50 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %49, i64 noundef %indvars.iv161) #4
  %51 = load i32, ptr %50, align 4, !tbaa !5
  %52 = call noundef i32 @_Z4expoiii(i32 noundef %51, i32 noundef %21, i32 noundef %2)
  %.not195 = icmp eq i32 %52, 0
  br i1 %.not195, label %._crit_edge137, label %.lr.ph136

.lr.ph136:                                        ; preds = %._crit_edge
  %53 = sext i32 %52 to i64
  %54 = zext i32 %.0101140 to i64
  br label %55

55:                                               ; preds = %.lr.ph136, %.loopexit
  %indvars.iv171 = phi i64 [ 0, %.lr.ph136 ], [ %indvars.iv.next172, %.loopexit ]
  %.not121 = icmp eq i64 %indvars.iv171, %54
  br i1 %.not121, label %.loopexit, label %56

56:                                               ; preds = %55
  %57 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv171) #4
  %58 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %57, i64 noundef %indvars.iv161) #4
  %59 = load i32, ptr %58, align 4, !tbaa !5
  %.not122 = icmp eq i32 %59, 0
  br i1 %.not122, label %.loopexit, label %60

60:                                               ; preds = %56
  %61 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv171) #4
  %62 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %61, i64 noundef %indvars.iv161) #4
  %63 = load i32, ptr %62, align 4, !tbaa !5
  %.fr = freeze i32 %63
  %64 = sext i32 %.fr to i64
  %65 = mul nsw i64 %64, %53
  %66 = srem i64 %65, %14
  %.not196 = icmp eq i64 %66, 0
  br i1 %.not196, label %.loopexit, label %.lr.ph133.split

.lr.ph133.split:                                  ; preds = %60, %86
  %indvars.iv166 = phi i64 [ %indvars.iv.next167, %86 ], [ %indvars.iv161, %60 ]
  %67 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %23) #4
  %68 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %67, i64 noundef %indvars.iv166) #4
  %69 = load i32, ptr %68, align 4, !tbaa !5
  %.not123 = icmp eq i32 %69, 0
  br i1 %.not123, label %86, label %70

70:                                               ; preds = %.lr.ph133.split
  %71 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv171) #4
  %72 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %71, i64 noundef %indvars.iv166) #4
  %73 = load i32, ptr %72, align 4, !tbaa !5
  %74 = sext i32 %73 to i64
  %75 = add nsw i64 %15, %74
  %76 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %23) #4
  %77 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %76, i64 noundef %indvars.iv166) #4
  %78 = load i32, ptr %77, align 4, !tbaa !5
  %79 = sext i32 %78 to i64
  %80 = mul nsw i64 %66, %79
  %81 = sub nsw i64 %75, %80
  %82 = srem i64 %81, %14
  %83 = trunc nsw i64 %82 to i32
  %84 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv171) #4
  %85 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %84, i64 noundef %indvars.iv166) #4
  store i32 %83, ptr %85, align 4, !tbaa !5
  br label %86

86:                                               ; preds = %.lr.ph133.split, %70
  %indvars.iv.next167 = add nuw nsw i64 %indvars.iv166, 1
  %exitcond170.not = icmp eq i64 %indvars.iv.next167, %wide.trip.count169
  br i1 %exitcond170.not, label %.loopexit, label %.lr.ph133.split, !llvm.loop !12

.loopexit:                                        ; preds = %86, %60, %55, %56
  %indvars.iv.next172 = add nuw nsw i64 %indvars.iv171, 1
  %87 = icmp ult i64 %indvars.iv.next172, %22
  br i1 %87, label %55, label %._crit_edge137, !llvm.loop !13

._crit_edge137:                                   ; preds = %.loopexit, %._crit_edge
  %88 = add nsw i32 %.0101140, 1
  br label %89

89:                                               ; preds = %38, %._crit_edge137
  %.1102 = phi i32 [ %88, %._crit_edge137 ], [ %.0101140, %38 ]
  %indvars.iv.next162 = add nuw nsw i64 %indvars.iv161, 1
  %90 = icmp slt i64 %indvars.iv.next162, %16
  %91 = icmp slt i32 %.1102, %9
  %92 = select i1 %90, i1 %91, i1 false
  br i1 %92, label %.preheader126, label %.preheader125, !llvm.loop !14

.preheader124:                                    ; preds = %135
  br i1 %19, label %.preheader.lr.ph, label %._crit_edge150

.preheader124.thread:                             ; preds = %.preheader125
  br i1 %19, label %.preheader.preheader, label %._crit_edge150

.preheader.lr.ph:                                 ; preds = %.preheader124
  br i1 %18, label %.preheader.us.preheader, label %.preheader.preheader

.preheader.preheader:                             ; preds = %.preheader124.thread, %.preheader.lr.ph
  %.0106.lcssa198200 = phi i32 [ %.1107, %.preheader.lr.ph ], [ 0, %.preheader124.thread ]
  %wide.trip.count183 = and i64 %8, 2147483647
  br label %.preheader

.preheader.us.preheader:                          ; preds = %.preheader.lr.ph
  %wide.trip.count193 = and i64 %8, 2147483647
  %wide.trip.count188 = zext nneg i32 %13 to i64
  br label %.preheader.us

.preheader.us:                                    ; preds = %.preheader.us.preheader, %104
  %indvars.iv190 = phi i64 [ 0, %.preheader.us.preheader ], [ %indvars.iv.next191, %104 ]
  br label %93

93:                                               ; preds = %.preheader.us, %93
  %indvars.iv185 = phi i64 [ 0, %.preheader.us ], [ %indvars.iv.next186, %93 ]
  %.099145.us = phi i64 [ 0, %.preheader.us ], [ %103, %93 ]
  %94 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv185) #4
  %95 = load i32, ptr %94, align 4, !tbaa !5
  %96 = sext i32 %95 to i64
  %97 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv190) #4
  %98 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %97, i64 noundef %indvars.iv185) #4
  %99 = load i32, ptr %98, align 4, !tbaa !5
  %100 = sext i32 %99 to i64
  %101 = mul nsw i64 %100, %96
  %102 = add nsw i64 %101, %.099145.us
  %103 = srem i64 %102, %14
  %indvars.iv.next186 = add nuw nsw i64 %indvars.iv185, 1
  %exitcond189.not = icmp eq i64 %indvars.iv.next186, %wide.trip.count188
  br i1 %exitcond189.not, label %._crit_edge147.us, label %93, !llvm.loop !15

104:                                              ; preds = %._crit_edge147.us
  %indvars.iv.next191 = add nuw nsw i64 %indvars.iv190, 1
  %exitcond194.not = icmp eq i64 %indvars.iv.next191, %wide.trip.count193
  br i1 %exitcond194.not, label %._crit_edge150, label %.preheader.us, !llvm.loop !16

._crit_edge147.us:                                ; preds = %93
  %105 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv190) #4
  %106 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %105, i64 noundef %16) #4
  %107 = load i32, ptr %106, align 4, !tbaa !5
  %108 = sext i32 %107 to i64
  %.not.us = icmp eq i64 %103, %108
  br i1 %.not.us, label %104, label %._crit_edge150

109:                                              ; preds = %.lr.ph143, %135
  %indvars.iv175 = phi i64 [ 0, %.lr.ph143 ], [ %indvars.iv.next176, %135 ]
  %.0106141 = phi i32 [ 0, %.lr.ph143 ], [ %.1107, %135 ]
  %110 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %indvars.iv175) #4
  %111 = load i32, ptr %110, align 4, !tbaa !5
  %112 = icmp eq i32 %111, -1
  br i1 %112, label %113, label %115

113:                                              ; preds = %109
  %114 = add nsw i32 %.0106141, 1
  br label %135

115:                                              ; preds = %109
  %116 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %indvars.iv175) #4
  %117 = load i32, ptr %116, align 4, !tbaa !5
  %118 = sext i32 %117 to i64
  %119 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %118) #4
  %120 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %119, i64 noundef %indvars.iv175) #4
  %121 = load i32, ptr %120, align 4, !tbaa !5
  %122 = call noundef i32 @_Z4expoiii(i32 noundef %121, i32 noundef %24, i32 noundef %2)
  %123 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %indvars.iv175) #4
  %124 = load i32, ptr %123, align 4, !tbaa !5
  %125 = sext i32 %124 to i64
  %126 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %125) #4
  %127 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %126, i64 noundef %16) #4
  %128 = load i32, ptr %127, align 4, !tbaa !5
  %129 = sext i32 %128 to i64
  %130 = sext i32 %122 to i64
  %131 = mul nsw i64 %129, %130
  %132 = srem i64 %131, %14
  %133 = trunc nsw i64 %132 to i32
  %134 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv175) #4
  store i32 %133, ptr %134, align 4, !tbaa !5
  br label %135

135:                                              ; preds = %113, %115
  %.1107 = phi i32 [ %114, %113 ], [ %.0106141, %115 ]
  %indvars.iv.next176 = add nuw nsw i64 %indvars.iv175, 1
  %exitcond179.not = icmp eq i64 %indvars.iv.next176, %wide.trip.count178
  br i1 %exitcond179.not, label %.preheader124, label %109, !llvm.loop !17

136:                                              ; preds = %.preheader
  %indvars.iv.next181 = add nuw nsw i64 %indvars.iv180, 1
  %exitcond184.not = icmp eq i64 %indvars.iv.next181, %wide.trip.count183
  br i1 %exitcond184.not, label %._crit_edge150, label %.preheader, !llvm.loop !16

.preheader:                                       ; preds = %.preheader.preheader, %136
  %indvars.iv180 = phi i64 [ 0, %.preheader.preheader ], [ %indvars.iv.next181, %136 ]
  %137 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv180) #4
  %138 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %137, i64 noundef %16) #4
  %139 = load i32, ptr %138, align 4, !tbaa !5
  %.not = icmp eq i32 %139, 0
  br i1 %.not, label %136, label %._crit_edge150

._crit_edge150:                                   ; preds = %.preheader, %136, %._crit_edge147.us, %104, %.preheader124.thread, %.preheader124
  %.2 = phi i32 [ %.1107, %.preheader124 ], [ 0, %.preheader124.thread ], [ %.1107, %104 ], [ -1, %._crit_edge147.us ], [ %.0106.lcssa198200, %136 ], [ -1, %.preheader ]
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %5) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #4
  ret i32 %.2
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE6assignEmRKi(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #2 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10}
!16 = distinct !{!16, !10}
!17 = distinct !{!17, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass