; LLVM IR from sgtlaugh/algovault :: code_library/misc/15_puzzle_solver.ll (Z11is_solvableii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@ar = external dso_local global [4 x [4 x i32]], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z11is_solvableii(i32 noundef %0, i32 noundef %1) #1 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  store i32 0, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  store i32 0, ptr %8, align 4, !tbaa !5
  store i32 0, ptr %5, align 4, !tbaa !5
  br label %9

9:                                                ; preds = %61, %2
  %10 = load i32, ptr %5, align 4, !tbaa !5
  %11 = icmp slt i32 %10, 16
  br i1 %11, label %12, label %64

12:                                               ; preds = %9
  %13 = load i32, ptr %5, align 4, !tbaa !5
  %14 = ashr i32 %13, 2
  %15 = sext i32 %14 to i64
  %16 = getelementptr inbounds [4 x [4 x i32]], ptr @ar, i64 0, i64 %15
  %17 = load i32, ptr %5, align 4, !tbaa !5
  %18 = and i32 %17, 3
  %19 = sext i32 %18 to i64
  %20 = getelementptr inbounds [4 x i32], ptr %16, i64 0, i64 %19
  %21 = load i32, ptr %20, align 4, !tbaa !5
  %22 = icmp eq i32 %21, 16
  br i1 %22, label %23, label %26

23:                                               ; preds = %12
  %24 = load i32, ptr %5, align 4, !tbaa !5
  %25 = ashr i32 %24, 2
  store i32 %25, ptr %7, align 4, !tbaa !5
  br label %60

26:                                               ; preds = %12
  %27 = load i32, ptr %5, align 4, !tbaa !5
  %28 = add nsw i32 %27, 1
  store i32 %28, ptr %6, align 4, !tbaa !5
  br label %29

29:                                               ; preds = %56, %26
  %30 = load i32, ptr %6, align 4, !tbaa !5
  %31 = icmp slt i32 %30, 16
  br i1 %31, label %32, label %59

32:                                               ; preds = %29
  %33 = load i32, ptr %6, align 4, !tbaa !5
  %34 = ashr i32 %33, 2
  %35 = sext i32 %34 to i64
  %36 = getelementptr inbounds [4 x [4 x i32]], ptr @ar, i64 0, i64 %35
  %37 = load i32, ptr %6, align 4, !tbaa !5
  %38 = and i32 %37, 3
  %39 = sext i32 %38 to i64
  %40 = getelementptr inbounds [4 x i32], ptr %36, i64 0, i64 %39
  %41 = load i32, ptr %40, align 4, !tbaa !5
  %42 = load i32, ptr %5, align 4, !tbaa !5
  %43 = ashr i32 %42, 2
  %44 = sext i32 %43 to i64
  %45 = getelementptr inbounds [4 x [4 x i32]], ptr @ar, i64 0, i64 %44
  %46 = load i32, ptr %5, align 4, !tbaa !5
  %47 = and i32 %46, 3
  %48 = sext i32 %47 to i64
  %49 = getelementptr inbounds [4 x i32], ptr %45, i64 0, i64 %48
  %50 = load i32, ptr %49, align 4, !tbaa !5
  %51 = icmp slt i32 %41, %50
  br i1 %51, label %52, label %55

52:                                               ; preds = %32
  %53 = load i32, ptr %8, align 4, !tbaa !5
  %54 = add nsw i32 %53, 1
  store i32 %54, ptr %8, align 4, !tbaa !5
  br label %55

55:                                               ; preds = %52, %32
  br label %56

56:                                               ; preds = %55
  %57 = load i32, ptr %6, align 4, !tbaa !5
  %58 = add nsw i32 %57, 1
  store i32 %58, ptr %6, align 4, !tbaa !5
  br label %29, !llvm.loop !9

59:                                               ; preds = %29
  br label %60

60:                                               ; preds = %59, %23
  br label %61

61:                                               ; preds = %60
  %62 = load i32, ptr %5, align 4, !tbaa !5
  %63 = add nsw i32 %62, 1
  store i32 %63, ptr %5, align 4, !tbaa !5
  br label %9, !llvm.loop !11

64:                                               ; preds = %9
  %65 = load i32, ptr %8, align 4, !tbaa !5
  %66 = load i32, ptr %7, align 4, !tbaa !5
  %67 = add nsw i32 %65, %66
  %68 = and i32 %67, 1
  %69 = icmp ne i32 %68, 0
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  ret i1 %69
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@ar = external dso_local local_unnamed_addr global [4 x [4 x i32]], align 16

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define dso_local noundef zeroext i1 @_Z11is_solvableii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  br label %3

3:                                                ; preds = %2, %.loopexit
  %.024 = phi i32 [ 0, %2 ], [ %.3, %.loopexit ]
  %.01523 = phi i32 [ 0, %2 ], [ %.116, %.loopexit ]
  %.01821 = phi i32 [ 0, %2 ], [ %38, %.loopexit ]
  %umax = tail call i32 @llvm.umax.i32(i32 %.01821, i32 14)
  %4 = lshr i32 %.01821, 2
  %5 = zext nneg i32 %4 to i64
  %6 = and i32 %.01821, 3
  %7 = zext nneg i32 %6 to i64
  %8 = getelementptr inbounds [4 x [4 x i32]], ptr @ar, i64 0, i64 %5, i64 %7
  %9 = load i32, ptr %8, align 4, !tbaa !5
  %10 = icmp eq i32 %9, 16
  br i1 %10, label %.loopexit, label %.preheader

.preheader:                                       ; preds = %3
  %.not = icmp eq i32 %.01821, 15
  br i1 %.not, label %.loopexit.thread, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %.preheader
  %11 = tail call i32 @llvm.usub.sat.i32(i32 14, i32 %.01821)
  %12 = and i32 %11, 1
  %lcmp.mod.not.not = icmp eq i32 %12, 0
  br i1 %lcmp.mod.not.not, label %.lr.ph.prol, label %.lr.ph.prol.loopexit

.lr.ph.prol:                                      ; preds = %.lr.ph.preheader
  %.017.prol = add nuw nsw i32 %.01821, 1
  %13 = lshr i32 %.017.prol, 2
  %14 = zext nneg i32 %13 to i64
  %15 = and i32 %.017.prol, 3
  %16 = zext nneg i32 %15 to i64
  %17 = getelementptr inbounds [4 x [4 x i32]], ptr @ar, i64 0, i64 %14, i64 %16
  %18 = load i32, ptr %17, align 4, !tbaa !5
  %19 = icmp slt i32 %18, %9
  %20 = zext i1 %19 to i32
  %spec.select.prol = add nsw i32 %.024, %20
  br label %.lr.ph.prol.loopexit

.lr.ph.prol.loopexit:                             ; preds = %.lr.ph.prol, %.lr.ph.preheader
  %spec.select.lcssa.unr = phi i32 [ poison, %.lr.ph.preheader ], [ %spec.select.prol, %.lr.ph.prol ]
  %.120.unr = phi i32 [ %.024, %.lr.ph.preheader ], [ %spec.select.prol, %.lr.ph.prol ]
  %.017.in19.unr = phi i32 [ %.01821, %.lr.ph.preheader ], [ %.017.prol, %.lr.ph.prol ]
  %21 = icmp ugt i32 %.01821, 13
  br i1 %21, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.prol.loopexit, %.lr.ph
  %.120 = phi i32 [ %spec.select.1, %.lr.ph ], [ %.120.unr, %.lr.ph.prol.loopexit ]
  %.017.in19 = phi i32 [ %.017.1, %.lr.ph ], [ %.017.in19.unr, %.lr.ph.prol.loopexit ]
  %.017 = add nuw nsw i32 %.017.in19, 1
  %22 = lshr i32 %.017, 2
  %23 = zext nneg i32 %22 to i64
  %24 = and i32 %.017, 3
  %25 = zext nneg i32 %24 to i64
  %26 = getelementptr inbounds [4 x [4 x i32]], ptr @ar, i64 0, i64 %23, i64 %25
  %27 = load i32, ptr %26, align 4, !tbaa !5
  %28 = icmp slt i32 %27, %9
  %29 = zext i1 %28 to i32
  %spec.select = add nsw i32 %.120, %29
  %.017.1 = add nuw nsw i32 %.017.in19, 2
  %30 = lshr i32 %.017.1, 2
  %31 = zext nneg i32 %30 to i64
  %32 = and i32 %.017.1, 3
  %33 = zext nneg i32 %32 to i64
  %34 = getelementptr inbounds [4 x [4 x i32]], ptr @ar, i64 0, i64 %31, i64 %33
  %35 = load i32, ptr %34, align 4, !tbaa !5
  %36 = icmp slt i32 %35, %9
  %37 = zext i1 %36 to i32
  %spec.select.1 = add nsw i32 %spec.select, %37
  %exitcond.not.1 = icmp eq i32 %.017, %umax
  br i1 %exitcond.not.1, label %.loopexit, label %.lr.ph, !llvm.loop !9

.loopexit:                                        ; preds = %.lr.ph.prol.loopexit, %.lr.ph, %3
  %.116 = phi i32 [ %4, %3 ], [ %.01523, %.lr.ph ], [ %.01523, %.lr.ph.prol.loopexit ]
  %.3 = phi i32 [ %.024, %3 ], [ %spec.select.lcssa.unr, %.lr.ph.prol.loopexit ], [ %spec.select.1, %.lr.ph ]
  %38 = add nuw nsw i32 %.01821, 1
  %exitcond25.not = icmp eq i32 %38, 16
  br i1 %exitcond25.not, label %.loopexit.thread, label %3, !llvm.loop !11

.loopexit.thread:                                 ; preds = %.preheader, %.loopexit
  %.330 = phi i32 [ %.3, %.loopexit ], [ %.024, %.preheader ]
  %.11629 = phi i32 [ %.116, %.loopexit ], [ %.01523, %.preheader ]
  %39 = add nsw i32 %.330, %.11629
  %40 = and i32 %39, 1
  %41 = icmp ne i32 %40, 0
  ret i1 %41
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umax.i32(i32, i32) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.usub.sat.i32(i32, i32) #1

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass