; LLVM IR from sgtlaugh/algovault :: code_library (simulated_annealing)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@n = external dso_local global i32, align 4
@dp = external dso_local global [52 x i32], align 16
@ar = external dso_local global [52 x i32], align 16

; Function Attrs: nounwind uwtable
define dso_local i32 @solve() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  store i32 0, ptr %4, align 4, !tbaa !5
  %5 = load i32, ptr @n, align 4, !tbaa !5
  %6 = sub nsw i32 %5, 1
  store i32 %6, ptr %1, align 4, !tbaa !5
  br label %7

7:                                                ; preds = %65, %0
  %8 = load i32, ptr %1, align 4, !tbaa !5
  %9 = icmp sge i32 %8, 0
  br i1 %9, label %10, label %68

10:                                               ; preds = %7
  %11 = load i32, ptr %1, align 4, !tbaa !5
  %12 = sext i32 %11 to i64
  %13 = getelementptr inbounds [52 x i32], ptr @dp, i64 0, i64 %12
  store i32 1, ptr %13, align 4, !tbaa !5
  %14 = load i32, ptr %1, align 4, !tbaa !5
  %15 = add nsw i32 %14, 1
  store i32 %15, ptr %2, align 4, !tbaa !5
  br label %16

16:                                               ; preds = %49, %10
  %17 = load i32, ptr %2, align 4, !tbaa !5
  %18 = load i32, ptr @n, align 4, !tbaa !5
  %19 = icmp slt i32 %17, %18
  br i1 %19, label %20, label %52

20:                                               ; preds = %16
  %21 = load i32, ptr %1, align 4, !tbaa !5
  %22 = sext i32 %21 to i64
  %23 = getelementptr inbounds [52 x i32], ptr @ar, i64 0, i64 %22
  %24 = load i32, ptr %23, align 4, !tbaa !5
  %25 = load i32, ptr %2, align 4, !tbaa !5
  %26 = sext i32 %25 to i64
  %27 = getelementptr inbounds [52 x i32], ptr @ar, i64 0, i64 %26
  %28 = load i32, ptr %27, align 4, !tbaa !5
  %29 = icmp sle i32 %24, %28
  br i1 %29, label %30, label %48

30:                                               ; preds = %20
  %31 = load i32, ptr %2, align 4, !tbaa !5
  %32 = sext i32 %31 to i64
  %33 = getelementptr inbounds [52 x i32], ptr @dp, i64 0, i64 %32
  %34 = load i32, ptr %33, align 4, !tbaa !5
  %35 = add nsw i32 1, %34
  store i32 %35, ptr %3, align 4, !tbaa !5
  %36 = load i32, ptr %3, align 4, !tbaa !5
  %37 = load i32, ptr %1, align 4, !tbaa !5
  %38 = sext i32 %37 to i64
  %39 = getelementptr inbounds [52 x i32], ptr @dp, i64 0, i64 %38
  %40 = load i32, ptr %39, align 4, !tbaa !5
  %41 = icmp sgt i32 %36, %40
  br i1 %41, label %42, label %47

42:                                               ; preds = %30
  %43 = load i32, ptr %3, align 4, !tbaa !5
  %44 = load i32, ptr %1, align 4, !tbaa !5
  %45 = sext i32 %44 to i64
  %46 = getelementptr inbounds [52 x i32], ptr @dp, i64 0, i64 %45
  store i32 %43, ptr %46, align 4, !tbaa !5
  br label %47

47:                                               ; preds = %42, %30
  br label %48

48:                                               ; preds = %47, %20
  br label %49

49:                                               ; preds = %48
  %50 = load i32, ptr %2, align 4, !tbaa !5
  %51 = add nsw i32 %50, 1
  store i32 %51, ptr %2, align 4, !tbaa !5
  br label %16, !llvm.loop !9

52:                                               ; preds = %16
  %53 = load i32, ptr %1, align 4, !tbaa !5
  %54 = sext i32 %53 to i64
  %55 = getelementptr inbounds [52 x i32], ptr @dp, i64 0, i64 %54
  %56 = load i32, ptr %55, align 4, !tbaa !5
  %57 = load i32, ptr %4, align 4, !tbaa !5
  %58 = icmp sgt i32 %56, %57
  br i1 %58, label %59, label %64

59:                                               ; preds = %52
  %60 = load i32, ptr %1, align 4, !tbaa !5
  %61 = sext i32 %60 to i64
  %62 = getelementptr inbounds [52 x i32], ptr @dp, i64 0, i64 %61
  %63 = load i32, ptr %62, align 4, !tbaa !5
  store i32 %63, ptr %4, align 4, !tbaa !5
  br label %64

64:                                               ; preds = %59, %52
  br label %65

65:                                               ; preds = %64
  %66 = load i32, ptr %1, align 4, !tbaa !5
  %67 = add nsw i32 %66, -1
  store i32 %67, ptr %1, align 4, !tbaa !5
  br label %7, !llvm.loop !11

68:                                               ; preds = %7
  %69 = load i32, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #2
  ret i32 %69
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@n = external dso_local local_unnamed_addr global i32, align 4
@dp = external dso_local local_unnamed_addr global [52 x i32], align 16
@ar = external dso_local local_unnamed_addr global [52 x i32], align 16

; Function Attrs: nofree norecurse nosync nounwind memory(readwrite, argmem: none, inaccessiblemem: none) uwtable
define dso_local range(i32 0, -2147483648) i32 @solve() local_unnamed_addr #0 {
  %1 = load i32, ptr @n, align 4, !tbaa !5
  %2 = icmp sgt i32 %1, 0
  br i1 %2, label %.lr.ph28.preheader, label %._crit_edge29

.lr.ph28.preheader:                               ; preds = %0
  %3 = zext nneg i32 %1 to i64
  %4 = zext nneg i32 %1 to i64
  br label %.lr.ph28

.lr.ph28:                                         ; preds = %.lr.ph28.preheader, %._crit_edge
  %indvars.iv = phi i64 [ %3, %.lr.ph28.preheader ], [ %indvars.iv.next, %._crit_edge ]
  %.025 = phi i32 [ 0, %.lr.ph28.preheader ], [ %spec.select, %._crit_edge ]
  %indvars.iv.next = add nsw i64 %indvars.iv, -1
  %5 = getelementptr inbounds [52 x i32], ptr @dp, i64 0, i64 %indvars.iv.next
  store i32 1, ptr %5, align 4, !tbaa !5
  %6 = icmp slt i64 %indvars.iv, %4
  br i1 %6, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %.lr.ph28
  %7 = getelementptr inbounds [52 x i32], ptr @ar, i64 0, i64 %indvars.iv.next
  %8 = load i32, ptr %7, align 4, !tbaa !5
  br label %9

9:                                                ; preds = %.lr.ph, %18
  %10 = phi i32 [ 1, %.lr.ph ], [ %19, %18 ]
  %indvars.iv30 = phi i64 [ %indvars.iv, %.lr.ph ], [ %indvars.iv.next31, %18 ]
  %11 = getelementptr inbounds [52 x i32], ptr @ar, i64 0, i64 %indvars.iv30
  %12 = load i32, ptr %11, align 4, !tbaa !5
  %.not = icmp sgt i32 %8, %12
  br i1 %.not, label %18, label %13

13:                                               ; preds = %9
  %14 = getelementptr inbounds [52 x i32], ptr @dp, i64 0, i64 %indvars.iv30
  %15 = load i32, ptr %14, align 4, !tbaa !5
  %.not21 = icmp slt i32 %15, %10
  br i1 %.not21, label %18, label %16

16:                                               ; preds = %13
  %17 = add nsw i32 %15, 1
  store i32 %17, ptr %5, align 4, !tbaa !5
  br label %18

18:                                               ; preds = %9, %16, %13
  %19 = phi i32 [ %10, %9 ], [ %17, %16 ], [ %10, %13 ]
  %indvars.iv.next31 = add nuw nsw i64 %indvars.iv30, 1
  %20 = trunc nuw i64 %indvars.iv.next31 to i32
  %21 = icmp sgt i32 %1, %20
  br i1 %21, label %9, label %._crit_edge, !llvm.loop !9

._crit_edge:                                      ; preds = %18, %.lr.ph28
  %22 = phi i32 [ 1, %.lr.ph28 ], [ %19, %18 ]
  %spec.select = tail call i32 @llvm.smax.i32(i32 %22, i32 %.025)
  %23 = icmp sgt i64 %indvars.iv, 1
  br i1 %23, label %.lr.ph28, label %._crit_edge29, !llvm.loop !11

._crit_edge29:                                    ; preds = %._crit_edge, %0
  %.0.lcssa = phi i32 [ 0, %0 ], [ %spec.select, %._crit_edge ]
  ret i32 %.0.lcssa
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #1

attributes #0 = { nofree norecurse nosync nounwind memory(readwrite, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass