; LLVM IR from IOsonata/IOsonata :: src/bluetooth (bt_hci_host)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__Bt_Hci_ACL_Data_Packet = type <{ %struct.__Bt_Hci_ACL_Data_Packet_Header, [1 x i8] }>
%struct.__Bt_Hci_ACL_Data_Packet_Header = type { i32 }
%struct.__Bt_L2Cap_Pdu = type <{ %struct.__Bt_L2Cap_Header, %union.anon }>
%struct.__Bt_L2Cap_Header = type { i16, i16 }
%union.anon = type <{ i32, [17 x i8] }>
%struct.__Bt_Hci_Device = type { ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @BtHciProcessData(ptr noundef %0, ptr noundef %1) #1 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca [260 x i8], align 16
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #4
  %10 = load ptr, ptr %4, align 8, !tbaa !5
  %11 = getelementptr inbounds %struct.__Bt_Hci_ACL_Data_Packet, ptr %10, i32 0, i32 1
  %12 = getelementptr inbounds [1 x i8], ptr %11, i64 0, i64 0
  store ptr %12, ptr %5, align 8, !tbaa !5
  %13 = load ptr, ptr %5, align 8, !tbaa !5
  %14 = getelementptr inbounds %struct.__Bt_L2Cap_Pdu, ptr %13, i32 0, i32 0
  %15 = getelementptr inbounds %struct.__Bt_L2Cap_Header, ptr %14, i32 0, i32 1
  %16 = load i16, ptr %15, align 1, !tbaa !9
  %17 = zext i16 %16 to i32
  switch i32 %17, label %116 [
    i32 1, label %116
    i32 2, label %116
    i32 4, label %18
    i32 5, label %116
    i32 6, label %113
  ]

18:                                               ; preds = %2
  call void @llvm.lifetime.start.p0(i64 260, ptr %6) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #4
  %19 = getelementptr inbounds [260 x i8], ptr %6, i64 0, i64 0
  store ptr %19, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #4
  %20 = load ptr, ptr %7, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.__Bt_Hci_ACL_Data_Packet, ptr %20, i32 0, i32 1
  %22 = getelementptr inbounds [1 x i8], ptr %21, i64 0, i64 0
  store ptr %22, ptr %8, align 8, !tbaa !5
  %23 = load ptr, ptr %4, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.__Bt_Hci_ACL_Data_Packet, ptr %23, i32 0, i32 0
  %25 = load i32, ptr %24, align 1
  %26 = and i32 %25, 4095
  %27 = load ptr, ptr %7, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.__Bt_Hci_ACL_Data_Packet, ptr %27, i32 0, i32 0
  %29 = load i32, ptr %28, align 1
  %30 = and i32 %26, 4095
  %31 = and i32 %29, -4096
  %32 = or i32 %31, %30
  store i32 %32, ptr %28, align 1
  %33 = load ptr, ptr %7, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.__Bt_Hci_ACL_Data_Packet, ptr %33, i32 0, i32 0
  %35 = load i32, ptr %34, align 1
  %36 = and i32 %35, -12289
  %37 = or i32 %36, 12288
  store i32 %37, ptr %34, align 1
  %38 = load ptr, ptr %7, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.__Bt_Hci_ACL_Data_Packet, ptr %38, i32 0, i32 0
  %40 = load i32, ptr %39, align 1
  %41 = and i32 %40, -49153
  %42 = or i32 %41, 0
  store i32 %42, ptr %39, align 1
  %43 = load ptr, ptr %5, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.__Bt_L2Cap_Pdu, ptr %43, i32 0, i32 0
  %45 = load ptr, ptr %8, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.__Bt_L2Cap_Pdu, ptr %45, i32 0, i32 0
  call void @llvm.memcpy.p0.p0.i64(ptr align 1 %46, ptr align 1 %44, i64 4, i1 false), !tbaa.struct !13
  %47 = load ptr, ptr %4, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.__Bt_Hci_ACL_Data_Packet, ptr %47, i32 0, i32 0
  %49 = load i32, ptr %48, align 1
  %50 = and i32 %49, 4095
  %51 = trunc i32 %50 to i16
  %52 = load ptr, ptr %5, align 8, !tbaa !5
  %53 = getelementptr inbounds %struct.__Bt_L2Cap_Pdu, ptr %52, i32 0, i32 1
  %54 = load ptr, ptr %5, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.__Bt_L2Cap_Pdu, ptr %54, i32 0, i32 0
  %56 = getelementptr inbounds %struct.__Bt_L2Cap_Header, ptr %55, i32 0, i32 0
  %57 = load i16, ptr %56, align 1, !tbaa !15
  %58 = zext i16 %57 to i32
  %59 = load ptr, ptr %8, align 8, !tbaa !5
  %60 = getelementptr inbounds %struct.__Bt_L2Cap_Pdu, ptr %59, i32 0, i32 1
  %61 = call i32 @BtAttProcessReq(i16 noundef zeroext %51, ptr noundef %53, i32 noundef %58, ptr noundef %60)
  %62 = trunc i32 %61 to i16
  %63 = load ptr, ptr %8, align 8, !tbaa !5
  %64 = getelementptr inbounds %struct.__Bt_L2Cap_Pdu, ptr %63, i32 0, i32 0
  %65 = getelementptr inbounds %struct.__Bt_L2Cap_Header, ptr %64, i32 0, i32 0
  store i16 %62, ptr %65, align 1, !tbaa !15
  %66 = load ptr, ptr %8, align 8, !tbaa !5
  %67 = getelementptr inbounds %struct.__Bt_L2Cap_Pdu, ptr %66, i32 0, i32 0
  %68 = getelementptr inbounds %struct.__Bt_L2Cap_Header, ptr %67, i32 0, i32 0
  %69 = load i16, ptr %68, align 1, !tbaa !15
  %70 = zext i16 %69 to i32
  %71 = icmp sgt i32 %70, 0
  br i1 %71, label %72, label %99

72:                                               ; preds = %18
  %73 = load ptr, ptr %8, align 8, !tbaa !5
  %74 = getelementptr inbounds %struct.__Bt_L2Cap_Pdu, ptr %73, i32 0, i32 0
  %75 = getelementptr inbounds %struct.__Bt_L2Cap_Header, ptr %74, i32 0, i32 0
  %76 = load i16, ptr %75, align 1, !tbaa !15
  %77 = zext i16 %76 to i64
  %78 = add i64 %77, 4
  %79 = trunc i64 %78 to i32
  %80 = load ptr, ptr %7, align 8, !tbaa !5
  %81 = getelementptr inbounds %struct.__Bt_Hci_ACL_Data_Packet, ptr %80, i32 0, i32 0
  %82 = load i32, ptr %81, align 1
  %83 = and i32 %79, 65535
  %84 = shl i32 %83, 16
  %85 = and i32 %82, 65535
  %86 = or i32 %85, %84
  store i32 %86, ptr %81, align 1
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  %87 = load ptr, ptr %3, align 8, !tbaa !5
  %88 = getelementptr inbounds %struct.__Bt_Hci_Device, ptr %87, i32 0, i32 3
  %89 = load ptr, ptr %88, align 8, !tbaa !16
  %90 = load ptr, ptr %7, align 8, !tbaa !5
  %91 = load ptr, ptr %7, align 8, !tbaa !5
  %92 = getelementptr inbounds %struct.__Bt_Hci_ACL_Data_Packet, ptr %91, i32 0, i32 0
  %93 = load i32, ptr %92, align 1
  %94 = lshr i32 %93, 16
  %95 = zext i32 %94 to i64
  %96 = add i64 %95, 4
  %97 = trunc i64 %96 to i32
  %98 = call noundef i32 %89(ptr noundef %90, i32 noundef %97)
  store i32 %98, ptr %9, align 4, !tbaa !19
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  br label %112

99:                                               ; preds = %18
  %100 = load ptr, ptr %4, align 8, !tbaa !5
  %101 = getelementptr inbounds %struct.__Bt_Hci_ACL_Data_Packet, ptr %100, i32 0, i32 0
  %102 = load i32, ptr %101, align 1
  %103 = and i32 %102, 4095
  %104 = trunc i32 %103 to i16
  %105 = load ptr, ptr %5, align 8, !tbaa !5
  %106 = getelementptr inbounds %struct.__Bt_L2Cap_Pdu, ptr %105, i32 0, i32 1
  %107 = load ptr, ptr %5, align 8, !tbaa !5
  %108 = getelementptr inbounds %struct.__Bt_L2Cap_Pdu, ptr %107, i32 0, i32 0
  %109 = getelementptr inbounds %struct.__Bt_L2Cap_Header, ptr %108, i32 0, i32 0
  %110 = load i16, ptr %109, align 1, !tbaa !15
  %111 = zext i16 %110 to i32
  call void @BtAttProcessRsp(i16 noundef zeroext %104, ptr noundef %106, i32 noundef %111)
  br label %112

112:                                              ; preds = %99, %72
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 260, ptr %6) #4
  br label %116

113:                                              ; preds = %2
  %114 = load ptr, ptr %3, align 8, !tbaa !5
  %115 = load ptr, ptr %5, align 8, !tbaa !5
  call void @BtProcessSmpData(ptr noundef %114, ptr noundef %115)
  br label %116

116:                                              ; preds = %113, %112, %2, %2, %2, %2
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #4
  ret void
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

declare i32 @BtAttProcessReq(i16 noundef zeroext, ptr noundef, i32 noundef, ptr noundef) #3

declare void @BtAttProcessRsp(i16 noundef zeroext, ptr noundef, i32 noundef) #3

declare void @BtProcessSmpData(ptr noundef, ptr noundef) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !12, i64 2}
!10 = !{!"_ZTS14__Bt_L2Cap_Pdu", !11, i64 0, !7, i64 4}
!11 = !{!"_ZTS17__Bt_L2Cap_Header", !12, i64 0, !12, i64 2}
!12 = !{!"short", !7, i64 0}
!13 = !{i64 0, i64 2, !14, i64 2, i64 2, !14}
!14 = !{!12, !12, i64 0}
!15 = !{!10, !12, i64 0}
!16 = !{!17, !6, i64 16}
!17 = !{!"_ZTS15__Bt_Hci_Device", !6, i64 0, !18, i64 8, !18, i64 12, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56, !6, i64 64}
!18 = !{!"int", !7, i64 0}
!19 = !{!18, !18, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @BtHciProcessData(ptr noundef %0, ptr noundef %1) local_unnamed_addr #1 {
  %3 = alloca [260 x i8], align 16
  %4 = getelementptr inbounds i8, ptr %1, i64 4
  %5 = getelementptr inbounds i8, ptr %1, i64 6
  %6 = load i16, ptr %5, align 1, !tbaa !5
  switch i16 %6, label %38 [
    i16 6, label %37
    i16 4, label %7
  ]

7:                                                ; preds = %2
  call void @llvm.lifetime.start.p0(i64 260, ptr nonnull %3) #3
  %8 = getelementptr inbounds i8, ptr %3, i64 4
  %9 = load i32, ptr %1, align 1
  %10 = and i32 %9, 4095
  %11 = or disjoint i32 %10, 12288
  store i32 %11, ptr %3, align 16
  %12 = load i32, ptr %4, align 1
  store i32 %12, ptr %8, align 4
  %13 = trunc i32 %9 to i16
  %14 = and i16 %13, 4095
  %15 = getelementptr inbounds i8, ptr %1, i64 8
  %16 = and i32 %12, 65535
  %17 = getelementptr inbounds i8, ptr %3, i64 8
  %18 = call i32 @BtAttProcessReq(i16 noundef zeroext %14, ptr noundef nonnull %15, i32 noundef %16, ptr noundef nonnull %17)
  %19 = trunc i32 %18 to i16
  store i16 %19, ptr %8, align 4, !tbaa !11
  %20 = and i32 %18, 65535
  %.not = icmp eq i32 %20, 0
  br i1 %.not, label %30, label %21

21:                                               ; preds = %7
  %22 = load i32, ptr %3, align 16
  %narrow = shl i32 %18, 16
  %23 = add i32 %narrow, 262144
  %24 = and i32 %22, 65535
  %25 = or disjoint i32 %24, %23
  store i32 %25, ptr %3, align 16
  %26 = getelementptr inbounds i8, ptr %0, i64 16
  %27 = load ptr, ptr %26, align 8, !tbaa !12
  %28 = lshr exact i32 %23, 16
  %narrow25 = add nuw nsw i32 %28, 4
  %29 = call noundef i32 %27(ptr noundef nonnull %3, i32 noundef %narrow25)
  br label %36

30:                                               ; preds = %7
  %31 = load i32, ptr %1, align 1
  %32 = trunc i32 %31 to i16
  %33 = and i16 %32, 4095
  %34 = load i16, ptr %4, align 1, !tbaa !11
  %35 = zext i16 %34 to i32
  call void @BtAttProcessRsp(i16 noundef zeroext %33, ptr noundef nonnull %15, i32 noundef %35)
  br label %36

36:                                               ; preds = %30, %21
  call void @llvm.lifetime.end.p0(i64 260, ptr nonnull %3) #3
  br label %38

37:                                               ; preds = %2
  tail call void @BtProcessSmpData(ptr noundef %0, ptr noundef nonnull %4)
  br label %38

38:                                               ; preds = %37, %36, %2
  ret void
}

declare i32 @BtAttProcessReq(i16 noundef zeroext, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2

declare void @BtAttProcessRsp(i16 noundef zeroext, ptr noundef, i32 noundef) local_unnamed_addr #2

declare void @BtProcessSmpData(ptr noundef, ptr noundef) local_unnamed_addr #2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 2}
!6 = !{!"_ZTS14__Bt_L2Cap_Pdu", !7, i64 0, !9, i64 4}
!7 = !{!"_ZTS17__Bt_L2Cap_Header", !8, i64 0, !8, i64 2}
!8 = !{!"short", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!6, !8, i64 0}
!12 = !{!13, !14, i64 16}
!13 = !{!"_ZTS15__Bt_Hci_Device", !14, i64 0, !15, i64 8, !15, i64 12, !14, i64 16, !14, i64 24, !14, i64 32, !14, i64 40, !14, i64 48, !14, i64 56, !14, i64 64}
!14 = !{!"any pointer", !9, i64 0}
!15 = !{!"int", !9, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass