; LLVM IR from sca-secure-library-sca25519/sca25519 :: libopencm3/lib/lm3s (rcc)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i32 @rcc_clock_setup_in_xtal_8mhz_out_50mhz() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #3
  store i32 126761681, ptr %1, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #3
  store i32 125839376, ptr %2, align 4, !tbaa !5
  %3 = load i32, ptr %1, align 4, !tbaa !5
  store volatile i32 %3, ptr inttoptr (i64 1074782304 to ptr), align 4, !tbaa !5
  %4 = load i32, ptr %2, align 4, !tbaa !5
  store volatile i32 %4, ptr inttoptr (i64 1074782320 to ptr), align 4, !tbaa !5
  call void @__dmb()
  store volatile i32 27132736, ptr inttoptr (i64 1074782304 to ptr), align 4, !tbaa !5
  store volatile i32 25165824, ptr inttoptr (i64 1074782320 to ptr), align 4, !tbaa !5
  call void @__dmb()
  %5 = load i32, ptr %1, align 4, !tbaa !5
  %6 = and i32 %5, -8193
  store i32 %6, ptr %1, align 4, !tbaa !5
  %7 = load i32, ptr %2, align 4, !tbaa !5
  %8 = and i32 %7, -8193
  store i32 %8, ptr %2, align 4, !tbaa !5
  %9 = load i32, ptr %1, align 4, !tbaa !5
  store volatile i32 %9, ptr inttoptr (i64 1074782304 to ptr), align 4, !tbaa !5
  %10 = load i32, ptr %2, align 4, !tbaa !5
  store volatile i32 %10, ptr inttoptr (i64 1074782320 to ptr), align 4, !tbaa !5
  call void @__dmb()
  %11 = load i32, ptr %1, align 4, !tbaa !5
  %12 = or i32 %11, 4196352
  store i32 %12, ptr %1, align 4, !tbaa !5
  %13 = load i32, ptr %1, align 4, !tbaa !5
  store volatile i32 %13, ptr inttoptr (i64 1074782304 to ptr), align 4, !tbaa !5
  call void @__dmb()
  br label %14

14:                                               ; preds = %18, %0
  %15 = load volatile i32, ptr inttoptr (i64 1074782288 to ptr), align 4, !tbaa !5
  %16 = and i32 %15, 64
  %17 = icmp eq i32 %16, 0
  br i1 %17, label %18, label %19

18:                                               ; preds = %14
  br label %14, !llvm.loop !9

19:                                               ; preds = %14
  %20 = load i32, ptr %1, align 4, !tbaa !5
  %21 = and i32 %20, -2049
  store i32 %21, ptr %1, align 4, !tbaa !5
  %22 = load i32, ptr %2, align 4, !tbaa !5
  %23 = and i32 %22, -2049
  store i32 %23, ptr %2, align 4, !tbaa !5
  %24 = load i32, ptr %1, align 4, !tbaa !5
  store volatile i32 %24, ptr inttoptr (i64 1074782304 to ptr), align 4, !tbaa !5
  %25 = load i32, ptr %2, align 4, !tbaa !5
  store volatile i32 %25, ptr inttoptr (i64 1074782320 to ptr), align 4, !tbaa !5
  call void @__dmb()
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #3
  ret i32 0
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @__dmb() #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local noundef i32 @rcc_clock_setup_in_xtal_8mhz_out_50mhz() local_unnamed_addr #0 {
  store volatile i32 126761681, ptr inttoptr (i64 1074782304 to ptr), align 32, !tbaa !5
  store volatile i32 125839376, ptr inttoptr (i64 1074782320 to ptr), align 16, !tbaa !5
  tail call void @__dmb() #2
  store volatile i32 27132736, ptr inttoptr (i64 1074782304 to ptr), align 32, !tbaa !5
  store volatile i32 25165824, ptr inttoptr (i64 1074782320 to ptr), align 16, !tbaa !5
  tail call void @__dmb() #2
  store volatile i32 126753489, ptr inttoptr (i64 1074782304 to ptr), align 32, !tbaa !5
  store volatile i32 125831184, ptr inttoptr (i64 1074782320 to ptr), align 16, !tbaa !5
  tail call void @__dmb() #2
  store volatile i32 130947793, ptr inttoptr (i64 1074782304 to ptr), align 32, !tbaa !5
  tail call void @__dmb() #2
  br label %1

1:                                                ; preds = %1, %0
  %2 = load volatile i32, ptr inttoptr (i64 1074782288 to ptr), align 16, !tbaa !5
  %3 = and i32 %2, 64
  %4 = icmp eq i32 %3, 0
  br i1 %4, label %1, label %5, !llvm.loop !9

5:                                                ; preds = %1
  store volatile i32 130945745, ptr inttoptr (i64 1074782304 to ptr), align 32, !tbaa !5
  store volatile i32 125829136, ptr inttoptr (i64 1074782320 to ptr), align 16, !tbaa !5
  tail call void @__dmb() #2
  ret i32 0
}

declare void @__dmb() local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass