; LLVM IR from IOsonata/IOsonata :: src (uart_retarget)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__Uart_Dev = type <{ i32, i32, i32, i32, i32, i32, i32, i8, i8, i8, i8, i32, %struct.__device_intrf, ptr, ptr, ptr, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i8, i8, [2 x i8] }>
%struct.__device_intrf = type <{ ptr, i32, ptr, %struct.atomic_flag, [3 x i8], i32, i32, i32, i8, i8, i8, i8, i64, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr }>
%struct.atomic_flag = type { i8 }

; Function Attrs: nounwind uwtable
define dso_local void @UARTRetargetDisable(ptr noundef %0, i32 noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  %5 = load i32, ptr %4, align 4, !tbaa !9
  switch i32 %5, label %18 [
    i32 0, label %6
    i32 1, label %12
    i32 2, label %12
  ]

6:                                                ; preds = %2
  %7 = load ptr, ptr %3, align 8, !tbaa !5
  %8 = getelementptr inbounds %struct.__Uart_Dev, ptr %7, i32 0, i32 18
  %9 = load i32, ptr %8, align 4, !tbaa !11
  call void @RemoveBlkDev(i32 noundef %9)
  %10 = load ptr, ptr %3, align 8, !tbaa !5
  %11 = getelementptr inbounds %struct.__Uart_Dev, ptr %10, i32 0, i32 18
  store i32 -1, ptr %11, align 4, !tbaa !11
  br label %18

12:                                               ; preds = %2, %2
  %13 = load ptr, ptr %3, align 8, !tbaa !5
  %14 = getelementptr inbounds %struct.__Uart_Dev, ptr %13, i32 0, i32 19
  %15 = load i32, ptr %14, align 4, !tbaa !17
  call void @RemoveBlkDev(i32 noundef %15)
  %16 = load ptr, ptr %3, align 8, !tbaa !5
  %17 = getelementptr inbounds %struct.__Uart_Dev, ptr %16, i32 0, i32 19
  store i32 -1, ptr %17, align 4, !tbaa !17
  br label %18

18:                                               ; preds = %12, %6, %2
  ret void
}

declare void @RemoveBlkDev(i32 noundef) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 232}
!12 = !{!"__Uart_Dev", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !13, i64 28, !13, i64 29, !13, i64 30, !10, i64 32, !14, i64 36, !6, i64 196, !6, i64 204, !6, i64 212, !6, i64 220, !10, i64 228, !10, i64 232, !10, i64 236, !10, i64 240, !10, i64 244, !10, i64 248, !10, i64 252, !10, i64 256, !13, i64 260, !13, i64 261}
!13 = !{!"_Bool", !7, i64 0}
!14 = !{!"__device_intrf", !6, i64 0, !10, i64 8, !6, i64 12, !15, i64 20, !10, i64 24, !7, i64 28, !10, i64 32, !13, i64 36, !13, i64 37, !7, i64 38, !7, i64 39, !16, i64 40, !6, i64 48, !6, i64 56, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !6, i64 120, !6, i64 128, !6, i64 136, !6, i64 144, !6, i64 152}
!15 = !{!"atomic_flag", !7, i64 0}
!16 = !{!"long", !7, i64 0}
!17 = !{!12, !10, i64 236}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@switch.table.UARTRetargetDisable = private unnamed_addr constant [3 x i64] [i64 232, i64 236, i64 236], align 8

; Function Attrs: nounwind uwtable
define dso_local void @UARTRetargetDisable(ptr nocapture noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = icmp ult i32 %1, 3
  br i1 %3, label %switch.lookup, label %7

switch.lookup:                                    ; preds = %2
  %4 = zext nneg i32 %1 to i64
  %switch.gep = getelementptr inbounds [3 x i64], ptr @switch.table.UARTRetargetDisable, i64 0, i64 %4
  %switch.load = load i64, ptr %switch.gep, align 8
  %5 = getelementptr inbounds i8, ptr %0, i64 %switch.load
  %6 = load i32, ptr %5, align 4, !tbaa !5
  tail call void @RemoveBlkDev(i32 noundef %6) #2
  store i32 -1, ptr %5, align 4, !tbaa !5
  br label %7

7:                                                ; preds = %2, %switch.lookup
  ret void
}

declare void @RemoveBlkDev(i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass