; LLVM IR from IOsonata/IOsonata :: ARM/Nordic/nRF52/nRF52840/exemples/BoschAppBoard/src (bmi3)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.bmi3_dev = type { i8, ptr, i8, i32, i8, i8, i8, i16, ptr, ptr, ptr, i16 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare hidden signext i8 @null_ptr_check(ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local signext i8 @bmi3_set_regs(i8 noundef zeroext %0, ptr noundef %1, i16 noundef zeroext %2, ptr noundef %3) #1 {
  %5 = alloca i8, align 1
  %6 = alloca ptr, align 8
  %7 = alloca i16, align 2
  %8 = alloca ptr, align 8
  %9 = alloca i8, align 1
  store i8 %0, ptr %5, align 1, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !8
  store i16 %2, ptr %7, align 2, !tbaa !10
  store ptr %3, ptr %8, align 8, !tbaa !8
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #2
  %10 = load ptr, ptr %8, align 8, !tbaa !8
  %11 = call signext i8 @null_ptr_check(ptr noundef %10)
  store i8 %11, ptr %9, align 1, !tbaa !5
  %12 = load i8, ptr %9, align 1, !tbaa !5
  %13 = sext i8 %12 to i32
  %14 = icmp eq i32 %13, 0
  br i1 %14, label %15, label %55

15:                                               ; preds = %4
  %16 = load ptr, ptr %6, align 8, !tbaa !8
  %17 = icmp ne ptr %16, null
  br i1 %17, label %18, label %55

18:                                               ; preds = %15
  %19 = load ptr, ptr %8, align 8, !tbaa !8
  %20 = getelementptr inbounds %struct.bmi3_dev, ptr %19, i32 0, i32 3
  %21 = load i32, ptr %20, align 4, !tbaa !12
  %22 = icmp eq i32 %21, 0
  br i1 %22, label %23, label %28

23:                                               ; preds = %18
  %24 = load i8, ptr %5, align 1, !tbaa !5
  %25 = zext i8 %24 to i32
  %26 = and i32 %25, 127
  %27 = trunc i32 %26 to i8
  store i8 %27, ptr %5, align 1, !tbaa !5
  br label %28

28:                                               ; preds = %23, %18
  %29 = load ptr, ptr %8, align 8, !tbaa !8
  %30 = getelementptr inbounds %struct.bmi3_dev, ptr %29, i32 0, i32 9
  %31 = load ptr, ptr %30, align 8, !tbaa !15
  %32 = load i8, ptr %5, align 1, !tbaa !5
  %33 = load ptr, ptr %6, align 8, !tbaa !8
  %34 = load i16, ptr %7, align 2, !tbaa !10
  %35 = zext i16 %34 to i32
  %36 = load ptr, ptr %8, align 8, !tbaa !8
  %37 = getelementptr inbounds %struct.bmi3_dev, ptr %36, i32 0, i32 1
  %38 = load ptr, ptr %37, align 8, !tbaa !16
  %39 = call signext i8 %31(i8 noundef zeroext %32, ptr noundef %33, i32 noundef %35, ptr noundef %38)
  %40 = load ptr, ptr %8, align 8, !tbaa !8
  %41 = getelementptr inbounds %struct.bmi3_dev, ptr %40, i32 0, i32 4
  store i8 %39, ptr %41, align 8, !tbaa !17
  %42 = load ptr, ptr %8, align 8, !tbaa !8
  %43 = getelementptr inbounds %struct.bmi3_dev, ptr %42, i32 0, i32 10
  %44 = load ptr, ptr %43, align 8, !tbaa !18
  %45 = load ptr, ptr %8, align 8, !tbaa !8
  %46 = getelementptr inbounds %struct.bmi3_dev, ptr %45, i32 0, i32 1
  %47 = load ptr, ptr %46, align 8, !tbaa !16
  call void %44(i32 noundef 2, ptr noundef %47)
  %48 = load ptr, ptr %8, align 8, !tbaa !8
  %49 = getelementptr inbounds %struct.bmi3_dev, ptr %48, i32 0, i32 4
  %50 = load i8, ptr %49, align 8, !tbaa !17
  %51 = sext i8 %50 to i32
  %52 = icmp ne i32 %51, 0
  br i1 %52, label %53, label %54

53:                                               ; preds = %28
  store i8 -2, ptr %9, align 1, !tbaa !5
  br label %54

54:                                               ; preds = %53, %28
  br label %56

55:                                               ; preds = %15, %4
  store i8 -1, ptr %9, align 1, !tbaa !5
  br label %56

56:                                               ; preds = %55, %54
  %57 = load i8, ptr %9, align 1, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #2
  ret i8 %57
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"any pointer", !6, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"short", !6, i64 0}
!12 = !{!13, !14, i64 20}
!13 = !{!"bmi3_dev", !6, i64 0, !9, i64 8, !6, i64 16, !14, i64 20, !6, i64 24, !6, i64 25, !6, i64 26, !11, i64 28, !9, i64 32, !9, i64 40, !9, i64 48, !11, i64 56}
!14 = !{!"int", !6, i64 0}
!15 = !{!13, !9, i64 40}
!16 = !{!13, !9, i64 8}
!17 = !{!13, !6, i64 24}
!18 = !{!13, !9, i64 48}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare hidden signext i8 @null_ptr_check(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local signext i8 @bmi3_set_regs(i8 noundef zeroext %0, ptr noundef %1, i16 noundef zeroext %2, ptr noundef %3) local_unnamed_addr #0 {
  %5 = tail call signext i8 @null_ptr_check(ptr noundef %3)
  %6 = icmp eq i8 %5, 0
  %7 = icmp ne ptr %1, null
  %or.cond = and i1 %7, %6
  br i1 %or.cond, label %8, label %24

8:                                                ; preds = %4
  %9 = getelementptr inbounds i8, ptr %3, i64 20
  %10 = load i32, ptr %9, align 4, !tbaa !5
  %11 = icmp eq i32 %10, 0
  %12 = and i8 %0, 127
  %spec.select = select i1 %11, i8 %12, i8 %0
  %13 = getelementptr inbounds i8, ptr %3, i64 40
  %14 = load ptr, ptr %13, align 8, !tbaa !12
  %15 = zext i16 %2 to i32
  %16 = getelementptr inbounds i8, ptr %3, i64 8
  %17 = load ptr, ptr %16, align 8, !tbaa !13
  %18 = tail call signext i8 %14(i8 noundef zeroext %spec.select, ptr noundef nonnull %1, i32 noundef %15, ptr noundef %17) #1
  %19 = getelementptr inbounds i8, ptr %3, i64 24
  store i8 %18, ptr %19, align 8, !tbaa !14
  %20 = getelementptr inbounds i8, ptr %3, i64 48
  %21 = load ptr, ptr %20, align 8, !tbaa !15
  %22 = load ptr, ptr %16, align 8, !tbaa !13
  tail call void %21(i32 noundef 2, ptr noundef %22) #1
  %23 = load i8, ptr %19, align 8, !tbaa !14
  %.not = icmp eq i8 %23, 0
  %spec.select17 = select i1 %.not, i8 0, i8 -2
  br label %24

24:                                               ; preds = %8, %4
  %.0 = phi i8 [ -1, %4 ], [ %spec.select17, %8 ]
  ret i8 %.0
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 20}
!6 = !{!"bmi3_dev", !7, i64 0, !9, i64 8, !7, i64 16, !10, i64 20, !7, i64 24, !7, i64 25, !7, i64 26, !11, i64 28, !9, i64 32, !9, i64 40, !9, i64 48, !11, i64 56}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!"any pointer", !7, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!"short", !7, i64 0}
!12 = !{!6, !9, i64 40}
!13 = !{!6, !9, i64 8}
!14 = !{!6, !7, i64 24}
!15 = !{!6, !9, i64 48}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass