; LLVM IR from cleongh/advancedprogramming :: lectures/lecture2/big_o.ll (Z9quickSortRSt6vectorIiSaIiEEii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_Z9quickSortRSt6vectorIiSaIiEEii(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1, i32 noundef %2) #0 {
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  store i32 %2, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %11 = load i32, ptr %5, align 4, !tbaa !9
  store i32 %11, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %12 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %12, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %13 = load ptr, ptr %4, align 8, !tbaa !5
  %14 = load i32, ptr %7, align 4, !tbaa !9
  %15 = load i32, ptr %8, align 4, !tbaa !9
  %16 = add nsw i32 %14, %15
  %17 = sdiv i32 %16, 2
  %18 = sext i32 %17 to i64
  %19 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %13, i64 noundef %18) #3
  %20 = load i32, ptr %19, align 4, !tbaa !9
  store i32 %20, ptr %9, align 4, !tbaa !9
  br label %21

21:                                               ; preds = %77, %3
  %22 = load i32, ptr %7, align 4, !tbaa !9
  %23 = load i32, ptr %8, align 4, !tbaa !9
  %24 = icmp sle i32 %22, %23
  br i1 %24, label %25, label %78

25:                                               ; preds = %21
  br label %26

26:                                               ; preds = %34, %25
  %27 = load ptr, ptr %4, align 8, !tbaa !5
  %28 = load i32, ptr %7, align 4, !tbaa !9
  %29 = sext i32 %28 to i64
  %30 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %27, i64 noundef %29) #3
  %31 = load i32, ptr %30, align 4, !tbaa !9
  %32 = load i32, ptr %9, align 4, !tbaa !9
  %33 = icmp slt i32 %31, %32
  br i1 %33, label %34, label %37

34:                                               ; preds = %26
  %35 = load i32, ptr %7, align 4, !tbaa !9
  %36 = add nsw i32 %35, 1
  store i32 %36, ptr %7, align 4, !tbaa !9
  br label %26, !llvm.loop !11

37:                                               ; preds = %26
  br label %38

38:                                               ; preds = %46, %37
  %39 = load ptr, ptr %4, align 8, !tbaa !5
  %40 = load i32, ptr %8, align 4, !tbaa !9
  %41 = sext i32 %40 to i64
  %42 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %39, i64 noundef %41) #3
  %43 = load i32, ptr %42, align 4, !tbaa !9
  %44 = load i32, ptr %9, align 4, !tbaa !9
  %45 = icmp sgt i32 %43, %44
  br i1 %45, label %46, label %49

46:                                               ; preds = %38
  %47 = load i32, ptr %8, align 4, !tbaa !9
  %48 = add nsw i32 %47, -1
  store i32 %48, ptr %8, align 4, !tbaa !9
  br label %38, !llvm.loop !13

49:                                               ; preds = %38
  %50 = load i32, ptr %7, align 4, !tbaa !9
  %51 = load i32, ptr %8, align 4, !tbaa !9
  %52 = icmp sle i32 %50, %51
  br i1 %52, label %53, label %77

53:                                               ; preds = %49
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  %54 = load ptr, ptr %4, align 8, !tbaa !5
  %55 = load i32, ptr %7, align 4, !tbaa !9
  %56 = sext i32 %55 to i64
  %57 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %54, i64 noundef %56) #3
  %58 = load i32, ptr %57, align 4, !tbaa !9
  store i32 %58, ptr %10, align 4, !tbaa !9
  %59 = load ptr, ptr %4, align 8, !tbaa !5
  %60 = load i32, ptr %8, align 4, !tbaa !9
  %61 = sext i32 %60 to i64
  %62 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %59, i64 noundef %61) #3
  %63 = load i32, ptr %62, align 4, !tbaa !9
  %64 = load ptr, ptr %4, align 8, !tbaa !5
  %65 = load i32, ptr %7, align 4, !tbaa !9
  %66 = sext i32 %65 to i64
  %67 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %64, i64 noundef %66) #3
  store i32 %63, ptr %67, align 4, !tbaa !9
  %68 = load i32, ptr %10, align 4, !tbaa !9
  %69 = load ptr, ptr %4, align 8, !tbaa !5
  %70 = load i32, ptr %8, align 4, !tbaa !9
  %71 = sext i32 %70 to i64
  %72 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %69, i64 noundef %71) #3
  store i32 %68, ptr %72, align 4, !tbaa !9
  %73 = load i32, ptr %7, align 4, !tbaa !9
  %74 = add nsw i32 %73, 1
  store i32 %74, ptr %7, align 4, !tbaa !9
  %75 = load i32, ptr %8, align 4, !tbaa !9
  %76 = add nsw i32 %75, -1
  store i32 %76, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  br label %77

77:                                               ; preds = %53, %49
  br label %21, !llvm.loop !14

78:                                               ; preds = %21
  %79 = load i32, ptr %5, align 4, !tbaa !9
  %80 = load i32, ptr %8, align 4, !tbaa !9
  %81 = icmp slt i32 %79, %80
  br i1 %81, label %82, label %86

82:                                               ; preds = %78
  %83 = load ptr, ptr %4, align 8, !tbaa !5
  %84 = load i32, ptr %5, align 4, !tbaa !9
  %85 = load i32, ptr %8, align 4, !tbaa !9
  call void @_Z9quickSortRSt6vectorIiSaIiEEii(ptr noundef nonnull align 8 dereferenceable(24) %83, i32 noundef %84, i32 noundef %85)
  br label %86

86:                                               ; preds = %82, %78
  %87 = load i32, ptr %7, align 4, !tbaa !9
  %88 = load i32, ptr %6, align 4, !tbaa !9
  %89 = icmp slt i32 %87, %88
  br i1 %89, label %90, label %94

90:                                               ; preds = %86
  %91 = load ptr, ptr %4, align 8, !tbaa !5
  %92 = load i32, ptr %7, align 4, !tbaa !9
  %93 = load i32, ptr %6, align 4, !tbaa !9
  call void @_Z9quickSortRSt6vectorIiSaIiEEii(ptr noundef nonnull align 8 dereferenceable(24) %91, i32 noundef %92, i32 noundef %93)
  br label %94

94:                                               ; preds = %90, %86
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z9quickSortRSt6vectorIiSaIiEEii(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  br label %tailrecurse

tailrecurse:                                      ; preds = %34, %3
  %.tr43 = phi i32 [ %1, %3 ], [ %.0.lcssa, %34 ]
  %4 = add nsw i32 %.tr43, %2
  %5 = sdiv i32 %4, 2
  %6 = sext i32 %5 to i64
  %7 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %6) #1
  %8 = load i32, ptr %7, align 4, !tbaa !5
  %.not47 = icmp sgt i32 %.tr43, %2
  br i1 %.not47, label %._crit_edge, label %.preheader45

.preheader45:                                     ; preds = %tailrecurse, %31
  %.049 = phi i32 [ %.2, %31 ], [ %.tr43, %tailrecurse ]
  %.03748 = phi i32 [ %.239, %31 ], [ %2, %tailrecurse ]
  %9 = sext i32 %.049 to i64
  br label %10

10:                                               ; preds = %10, %.preheader45
  %indvars.iv = phi i64 [ %indvars.iv.next, %10 ], [ %9, %.preheader45 ]
  %11 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #1
  %12 = load i32, ptr %11, align 4, !tbaa !5
  %13 = icmp slt i32 %12, %8
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  br i1 %13, label %10, label %.preheader, !llvm.loop !9

.preheader:                                       ; preds = %10
  %14 = sext i32 %.03748 to i64
  br label %15

15:                                               ; preds = %15, %.preheader
  %indvars.iv53 = phi i64 [ %indvars.iv.next54, %15 ], [ %14, %.preheader ]
  %16 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv53) #1
  %17 = load i32, ptr %16, align 4, !tbaa !5
  %18 = icmp sgt i32 %17, %8
  %indvars.iv.next54 = add nsw i64 %indvars.iv53, -1
  br i1 %18, label %15, label %19, !llvm.loop !11

19:                                               ; preds = %15
  %20 = trunc nsw i64 %indvars.iv to i32
  %21 = trunc nsw i64 %indvars.iv53 to i32
  %.not42 = icmp sgt i64 %indvars.iv, %indvars.iv53
  br i1 %.not42, label %31, label %22

22:                                               ; preds = %19
  %23 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #1
  %24 = load i32, ptr %23, align 4, !tbaa !5
  %25 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv53) #1
  %26 = load i32, ptr %25, align 4, !tbaa !5
  %27 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #1
  store i32 %26, ptr %27, align 4, !tbaa !5
  %28 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv53) #1
  store i32 %24, ptr %28, align 4, !tbaa !5
  %29 = add nsw i32 %20, 1
  %30 = add nsw i32 %21, -1
  br label %31

31:                                               ; preds = %22, %19
  %.239 = phi i32 [ %30, %22 ], [ %21, %19 ]
  %.2 = phi i32 [ %29, %22 ], [ %20, %19 ]
  %.not = icmp sgt i32 %.2, %.239
  br i1 %.not, label %._crit_edge, label %.preheader45, !llvm.loop !12

._crit_edge:                                      ; preds = %31, %tailrecurse
  %.037.lcssa = phi i32 [ %2, %tailrecurse ], [ %.239, %31 ]
  %.0.lcssa = phi i32 [ %.tr43, %tailrecurse ], [ %.2, %31 ]
  %32 = icmp sgt i32 %.037.lcssa, %.tr43
  br i1 %32, label %33, label %34

33:                                               ; preds = %._crit_edge
  tail call void @_Z9quickSortRSt6vectorIiSaIiEEii(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %.tr43, i32 noundef %.037.lcssa)
  br label %34

34:                                               ; preds = %33, %._crit_edge
  %35 = icmp slt i32 %.0.lcssa, %2
  br i1 %35, label %tailrecurse, label %36

36:                                               ; preds = %34
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass