; LLVM IR from VastoLorde95/Competitive-Programming :: CodeChef/SNACKDOWN/16/Elimination/Problem D/brute.ll (Z3go1iiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@h = external dso_local global %"class.std::vector", align 8
@ans1 = external dso_local global i32, align 4

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3go1iiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #0 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store i32 %0, ptr %5, align 4, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !5
  store i32 %3, ptr %8, align 4, !tbaa !5
  %9 = load i32, ptr %5, align 4, !tbaa !5
  %10 = sext i32 %9 to i64
  %11 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @h) #3
  %12 = icmp eq i64 %10, %11
  br i1 %12, label %13, label %40

13:                                               ; preds = %4
  %14 = load i32, ptr %6, align 4, !tbaa !5
  %15 = icmp eq i32 %14, 0
  br i1 %15, label %16, label %17

16:                                               ; preds = %13
  store i32 0, ptr @ans1, align 4, !tbaa !5
  br label %39

17:                                               ; preds = %13
  %18 = load i32, ptr %6, align 4, !tbaa !5
  %19 = icmp sgt i32 %18, 0
  br i1 %19, label %20, label %28

20:                                               ; preds = %17
  %21 = load i32, ptr %8, align 4, !tbaa !5
  %22 = load i32, ptr %6, align 4, !tbaa !5
  %23 = icmp sge i32 %21, %22
  br i1 %23, label %24, label %27

24:                                               ; preds = %20
  %25 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) @ans1, ptr noundef nonnull align 4 dereferenceable(4) %6)
  %26 = load i32, ptr %25, align 4, !tbaa !5
  store i32 %26, ptr @ans1, align 4, !tbaa !5
  br label %27

27:                                               ; preds = %24, %20
  br label %38

28:                                               ; preds = %17
  %29 = load i32, ptr %6, align 4, !tbaa !5
  %30 = sub nsw i32 0, %29
  store i32 %30, ptr %6, align 4, !tbaa !5
  %31 = load i32, ptr %7, align 4, !tbaa !5
  %32 = load i32, ptr %6, align 4, !tbaa !5
  %33 = icmp sge i32 %31, %32
  br i1 %33, label %34, label %37

34:                                               ; preds = %28
  %35 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) @ans1, ptr noundef nonnull align 4 dereferenceable(4) %6)
  %36 = load i32, ptr %35, align 4, !tbaa !5
  store i32 %36, ptr @ans1, align 4, !tbaa !5
  br label %37

37:                                               ; preds = %34, %28
  br label %38

38:                                               ; preds = %37, %27
  br label %39

39:                                               ; preds = %38, %16
  br label %73

40:                                               ; preds = %4
  %41 = load i32, ptr %5, align 4, !tbaa !5
  %42 = add nsw i32 %41, 1
  %43 = load i32, ptr %6, align 4, !tbaa !5
  %44 = load i32, ptr %5, align 4, !tbaa !5
  %45 = sext i32 %44 to i64
  %46 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @h, i64 noundef %45) #3
  %47 = load i32, ptr %46, align 4, !tbaa !5
  %48 = add nsw i32 %43, %47
  %49 = load i32, ptr %7, align 4, !tbaa !5
  %50 = load i32, ptr %8, align 4, !tbaa !5
  %51 = load i32, ptr %5, align 4, !tbaa !5
  %52 = sext i32 %51 to i64
  %53 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @h, i64 noundef %52) #3
  %54 = load i32, ptr %53, align 4, !tbaa !5
  %55 = add nsw i32 %50, %54
  %56 = sub nsw i32 %55, 1
  call void @_Z3go1iiii(i32 noundef %42, i32 noundef %48, i32 noundef %49, i32 noundef %56)
  %57 = load i32, ptr %5, align 4, !tbaa !5
  %58 = add nsw i32 %57, 1
  %59 = load i32, ptr %6, align 4, !tbaa !5
  %60 = load i32, ptr %5, align 4, !tbaa !5
  %61 = sext i32 %60 to i64
  %62 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @h, i64 noundef %61) #3
  %63 = load i32, ptr %62, align 4, !tbaa !5
  %64 = sub nsw i32 %59, %63
  %65 = load i32, ptr %7, align 4, !tbaa !5
  %66 = load i32, ptr %5, align 4, !tbaa !5
  %67 = sext i32 %66 to i64
  %68 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @h, i64 noundef %67) #3
  %69 = load i32, ptr %68, align 4, !tbaa !5
  %70 = add nsw i32 %65, %69
  %71 = sub nsw i32 %70, 1
  %72 = load i32, ptr %8, align 4, !tbaa !5
  call void @_Z3go1iiii(i32 noundef %58, i32 noundef %64, i32 noundef %71, i32 noundef %72)
  br label %73

73:                                               ; preds = %40, %39
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@h = external dso_local global %"class.std::vector", align 8
@ans1 = external dso_local global i32, align 4

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z3go1iiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  %5 = alloca i32, align 4
  store i32 %1, ptr %5, align 4, !tbaa !5
  %6 = sext i32 %0 to i64
  %7 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @h) #2
  %8 = icmp eq i64 %7, %6
  br i1 %8, label %tailrecurse._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %4
  %9 = add i32 %3, -1
  br label %tailrecurse

tailrecurse._crit_edge:                           ; preds = %tailrecurse, %4
  %10 = phi i32 [ %1, %4 ], [ %26, %tailrecurse ]
  %.tr16.lcssa = phi i32 [ %2, %4 ], [ %30, %tailrecurse ]
  %11 = icmp eq i32 %10, 0
  br i1 %11, label %.sink.split, label %12

12:                                               ; preds = %tailrecurse._crit_edge
  %13 = icmp sgt i32 %10, 0
  br i1 %13, label %14, label %15

14:                                               ; preds = %12
  %.not14 = icmp sgt i32 %10, %3
  br i1 %.not14, label %35, label %.sink.split.sink.split

15:                                               ; preds = %12
  %16 = sub nsw i32 0, %10
  store i32 %16, ptr %5, align 4, !tbaa !5
  %.not = icmp slt i32 %.tr16.lcssa, %16
  br i1 %.not, label %35, label %.sink.split.sink.split

tailrecurse:                                      ; preds = %.lr.ph, %tailrecurse
  %indvars.iv = phi i64 [ %6, %.lr.ph ], [ %indvars.iv.next, %tailrecurse ]
  %.tr1620 = phi i32 [ %2, %.lr.ph ], [ %30, %tailrecurse ]
  %.tr1519 = phi i32 [ %1, %.lr.ph ], [ %26, %tailrecurse ]
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %17 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @h, i64 noundef %indvars.iv) #2
  %18 = load i32, ptr %17, align 4, !tbaa !5
  %19 = add nsw i32 %18, %.tr1519
  %20 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @h, i64 noundef %indvars.iv) #2
  %21 = load i32, ptr %20, align 4, !tbaa !5
  %22 = add i32 %9, %21
  %23 = trunc nsw i64 %indvars.iv.next to i32
  tail call void @_Z3go1iiii(i32 noundef %23, i32 noundef %19, i32 noundef %.tr1620, i32 noundef %22)
  %24 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @h, i64 noundef %indvars.iv) #2
  %25 = load i32, ptr %24, align 4, !tbaa !5
  %26 = sub nsw i32 %.tr1519, %25
  %27 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @h, i64 noundef %indvars.iv) #2
  %28 = load i32, ptr %27, align 4, !tbaa !5
  %29 = add i32 %.tr1620, -1
  %30 = add i32 %29, %28
  store i32 %26, ptr %5, align 4, !tbaa !5
  %31 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @h) #2
  %32 = icmp eq i64 %31, %indvars.iv.next
  br i1 %32, label %tailrecurse._crit_edge, label %tailrecurse

.sink.split.sink.split:                           ; preds = %15, %14
  %33 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) @ans1, ptr noundef nonnull align 4 dereferenceable(4) %5)
  %34 = load i32, ptr %33, align 4, !tbaa !5
  br label %.sink.split

.sink.split:                                      ; preds = %.sink.split.sink.split, %tailrecurse._crit_edge
  %.sink = phi i32 [ 0, %tailrecurse._crit_edge ], [ %34, %.sink.split.sink.split ]
  store i32 %.sink, ptr @ans1, align 4, !tbaa !5
  br label %35

35:                                               ; preds = %.sink.split, %15, %14
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass