; LLVM IR from moarseniy/CudaFEMproject :: FEMproject/matrix_pack/src/cpu_matrix.ll (ZN10CPU_MatrixC2ERKS_b)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Matrix = type <{ ptr, i32, [4 x i8], i64, i64, i64, ptr, i8, [7 x i8] }>

@_ZTV10CPU_Matrix = external dso_local unnamed_addr constant { [35 x ptr] }, align 8

declare void @_ZN6MatrixC2EmmbPf11DEVICE_NAME(ptr noundef nonnull align 8 dereferenceable(49), i64 noundef, i64 noundef, i1 noundef zeroext, ptr noundef, i32 noundef) unnamed_addr #0

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) #1

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) #2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN6MatrixD2Ev(ptr noundef nonnull align 8 dereferenceable(49)) unnamed_addr #3 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN10CPU_MatrixC2ERKS_b(ptr noundef nonnull align 8 dereferenceable(49) %0, ptr noundef nonnull align 8 dereferenceable(49) %1, i1 noundef zeroext %2) unnamed_addr #4 align 2 personality ptr @__gxx_personality_v0 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i8, align 1
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  %10 = alloca i64, align 8
  %11 = alloca i1, align 1
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  %12 = zext i1 %2 to i8
  store i8 %12, ptr %6, align 1, !tbaa !9
  %13 = load ptr, ptr %4, align 8
  %14 = load ptr, ptr %5, align 8, !tbaa !5
  %15 = getelementptr inbounds %class.Matrix, ptr %14, i32 0, i32 3
  %16 = load i64, ptr %15, align 8, !tbaa !11
  %17 = load ptr, ptr %5, align 8, !tbaa !5
  %18 = getelementptr inbounds %class.Matrix, ptr %17, i32 0, i32 4
  %19 = load i64, ptr %18, align 8, !tbaa !15
  call void @_ZN6MatrixC2EmmbPf11DEVICE_NAME(ptr noundef nonnull align 8 dereferenceable(49) %13, i64 noundef %16, i64 noundef %19, i1 noundef zeroext true, ptr noundef null, i32 noundef 0)
  store ptr getelementptr inbounds inrange(-16, 264) ({ [35 x ptr] }, ptr @_ZTV10CPU_Matrix, i32 0, i32 0, i32 2), ptr %13, align 8, !tbaa !16
  %20 = load ptr, ptr %5, align 8, !tbaa !5
  %21 = getelementptr inbounds %class.Matrix, ptr %20, i32 0, i32 3
  %22 = load i64, ptr %21, align 8, !tbaa !11
  %23 = load ptr, ptr %5, align 8, !tbaa !5
  %24 = getelementptr inbounds %class.Matrix, ptr %23, i32 0, i32 4
  %25 = load i64, ptr %24, align 8, !tbaa !15
  %26 = mul i64 %22, %25
  %27 = icmp ugt i64 %26, 0
  store i1 false, ptr %11, align 1
  br i1 %27, label %28, label %37

28:                                               ; preds = %3
  %29 = getelementptr inbounds %class.Matrix, ptr %13, i32 0, i32 5
  %30 = load i64, ptr %29, align 8, !tbaa !18
  %31 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %30, i64 4)
  %32 = extractvalue { i64, i1 } %31, 1
  %33 = extractvalue { i64, i1 } %31, 0
  %34 = select i1 %32, i64 -1, i64 %33
  %35 = invoke noalias noundef nonnull ptr @_Znam(i64 noundef %34) #5
          to label %36 unwind label %46

36:                                               ; preds = %28
  store ptr %35, ptr %9, align 8
  store i64 %34, ptr %10, align 8
  store i1 true, ptr %11, align 1
  br label %38

37:                                               ; preds = %3
  br label %38

38:                                               ; preds = %37, %36
  %39 = phi ptr [ %35, %36 ], [ null, %37 ]
  %40 = getelementptr inbounds %class.Matrix, ptr %13, i32 0, i32 6
  store ptr %39, ptr %40, align 8, !tbaa !19
  %41 = load i8, ptr %6, align 1, !tbaa !9, !range !20, !noundef !21
  %42 = trunc i8 %41 to i1
  br i1 %42, label %43, label %50

43:                                               ; preds = %38
  %44 = load ptr, ptr %5, align 8, !tbaa !5
  invoke void @_ZN10CPU_Matrix4copyERK6MatrixRS0_(ptr noundef nonnull align 8 dereferenceable(49) %44, ptr noundef nonnull align 8 dereferenceable(49) %13)
          to label %45 unwind label %46

45:                                               ; preds = %43
  br label %50

46:                                               ; preds = %43, %28
  %47 = landingpad { ptr, i32 }
          cleanup
  %48 = extractvalue { ptr, i32 } %47, 0
  store ptr %48, ptr %7, align 8
  %49 = extractvalue { ptr, i32 } %47, 1
  store i32 %49, ptr %8, align 4
  call void @_ZN6MatrixD2Ev(ptr noundef nonnull align 8 dereferenceable(49) %13) #6
  br label %51

50:                                               ; preds = %45, %38
  ret void

51:                                               ; preds = %46
  %52 = load ptr, ptr %7, align 8
  %53 = load i32, ptr %8, align 4
  %54 = insertvalue { ptr, i32 } poison, ptr %52, 0
  %55 = insertvalue { ptr, i32 } %54, i32 %53, 1
  resume { ptr, i32 } %55
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN10CPU_Matrix4copyERK6MatrixRS0_(ptr noundef nonnull align 8 dereferenceable(49), ptr noundef nonnull align 8 dereferenceable(49)) #4 align 2

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { builtin allocsize(0) }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!12, !14, i64 16}
!12 = !{!"_ZTS6Matrix", !13, i64 8, !14, i64 16, !14, i64 24, !14, i64 32, !6, i64 40, !10, i64 48}
!13 = !{!"_ZTS11DEVICE_NAME", !7, i64 0}
!14 = !{!"long", !7, i64 0}
!15 = !{!12, !14, i64 24}
!16 = !{!17, !17, i64 0}
!17 = !{!"vtable pointer", !8, i64 0}
!18 = !{!12, !14, i64 32}
!19 = !{!12, !6, i64 40}
!20 = !{i8 0, i8 2}
!21 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZTV10CPU_Matrix = external dso_local unnamed_addr constant { [35 x ptr] }, align 8

declare void @_ZN6MatrixC2EmmbPf11DEVICE_NAME(ptr noundef nonnull align 8 dereferenceable(49), i64 noundef, i64 noundef, i1 noundef zeroext, ptr noundef, i32 noundef) unnamed_addr #0

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) local_unnamed_addr #1

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN6MatrixD2Ev(ptr noundef nonnull align 8 dereferenceable(49)) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN10CPU_MatrixC2ERKS_b(ptr noundef nonnull align 8 dereferenceable(49) %0, ptr noundef nonnull align 8 dereferenceable(49) %1, i1 noundef zeroext %2) unnamed_addr #3 align 2 personality ptr @__gxx_personality_v0 {
  %4 = getelementptr inbounds i8, ptr %1, i64 16
  %5 = load i64, ptr %4, align 8, !tbaa !5
  %6 = getelementptr inbounds i8, ptr %1, i64 24
  %7 = load i64, ptr %6, align 8, !tbaa !13
  tail call void @_ZN6MatrixC2EmmbPf11DEVICE_NAME(ptr noundef nonnull align 8 dereferenceable(49) %0, i64 noundef %5, i64 noundef %7, i1 noundef zeroext true, ptr noundef null, i32 noundef 0)
  store ptr getelementptr inbounds inrange(-16, 264) (i8, ptr @_ZTV10CPU_Matrix, i64 16), ptr %0, align 8, !tbaa !14
  %8 = load i64, ptr %4, align 8, !tbaa !5
  %9 = load i64, ptr %6, align 8, !tbaa !13
  %10 = mul i64 %9, %8
  %.not = icmp eq i64 %10, 0
  br i1 %.not, label %18, label %11

11:                                               ; preds = %3
  %12 = getelementptr inbounds i8, ptr %0, i64 32
  %13 = load i64, ptr %12, align 8, !tbaa !16
  %14 = icmp ugt i64 %13, 4611686018427387903
  %15 = shl i64 %13, 2
  %16 = select i1 %14, i64 -1, i64 %15
  %17 = invoke noalias noundef nonnull ptr @_Znam(i64 noundef %16) #4
          to label %18 unwind label %22

18:                                               ; preds = %11, %3
  %19 = phi ptr [ null, %3 ], [ %17, %11 ]
  %20 = getelementptr inbounds i8, ptr %0, i64 40
  store ptr %19, ptr %20, align 8, !tbaa !17
  br i1 %2, label %21, label %24

21:                                               ; preds = %18
  invoke void @_ZN10CPU_Matrix4copyERK6MatrixRS0_(ptr noundef nonnull align 8 dereferenceable(49) %1, ptr noundef nonnull align 8 dereferenceable(49) %0)
          to label %24 unwind label %22

22:                                               ; preds = %21, %11
  %23 = landingpad { ptr, i32 }
          cleanup
  tail call void @_ZN6MatrixD2Ev(ptr noundef nonnull align 8 dereferenceable(49) %0) #5
  resume { ptr, i32 } %23

24:                                               ; preds = %21, %18
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN10CPU_Matrix4copyERK6MatrixRS0_(ptr noundef nonnull align 8 dereferenceable(49), ptr noundef nonnull align 8 dereferenceable(49)) local_unnamed_addr #3 align 2

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { builtin allocsize(0) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 16}
!6 = !{!"_ZTS6Matrix", !7, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !11, i64 40, !12, i64 48}
!7 = !{!"_ZTS11DEVICE_NAME", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!"bool", !8, i64 0}
!13 = !{!6, !10, i64 24}
!14 = !{!15, !15, i64 0}
!15 = !{!"vtable pointer", !9, i64 0}
!16 = !{!6, !10, i64 32}
!17 = !{!6, !11, i64 40}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass