; LLVM IR from p4lang/p4c :: backends/tofino/bf-utils/dynamic_hash/dynamic_hash.ll (Z15get_from_bitvecPKmjjj)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z15get_from_bitvecPKmjjj(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #0 {
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i64, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i64, align 8
  %13 = alloca i64, align 8
  %14 = alloca i64, align 8
  %15 = alloca i64, align 8
  %16 = alloca i64, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !9
  store i32 %3, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #2
  store i64 0, ptr %9, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  %17 = load i32, ptr %7, align 4, !tbaa !9
  %18 = urem i32 %17, 64
  store i32 %18, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #2
  %19 = load i32, ptr %7, align 4, !tbaa !9
  %20 = udiv i32 %19, 64
  store i32 %20, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #2
  %21 = load i32, ptr %10, align 4, !tbaa !9
  %22 = zext i32 %21 to i64
  %23 = shl i64 1, %22
  %24 = sub i64 %23, 1
  store i64 %24, ptr %12, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #2
  %25 = load i64, ptr %12, align 8, !tbaa !11
  %26 = xor i64 %25, -1
  %27 = and i64 -1, %26
  store i64 %27, ptr %13, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #2
  store i64 0, ptr %14, align 8, !tbaa !11
  %28 = load i32, ptr %10, align 4, !tbaa !9
  %29 = icmp ne i32 %28, 0
  br i1 %29, label %30, label %49

30:                                               ; preds = %4
  %31 = load i32, ptr %11, align 4, !tbaa !9
  %32 = add i32 %31, 1
  %33 = load i32, ptr %6, align 4, !tbaa !9
  %34 = icmp ult i32 %32, %33
  br i1 %34, label %35, label %49

35:                                               ; preds = %30
  %36 = load i64, ptr %12, align 8, !tbaa !11
  %37 = load ptr, ptr %5, align 8, !tbaa !5
  %38 = load i32, ptr %11, align 4, !tbaa !9
  %39 = zext i32 %38 to i64
  %40 = getelementptr inbounds i64, ptr %37, i64 %39
  %41 = getelementptr inbounds i64, ptr %40, i64 1
  %42 = load i64, ptr %41, align 8, !tbaa !11
  %43 = and i64 %36, %42
  store i64 %43, ptr %14, align 8, !tbaa !11
  %44 = load i32, ptr %10, align 4, !tbaa !9
  %45 = sub i32 64, %44
  %46 = load i64, ptr %14, align 8, !tbaa !11
  %47 = zext i32 %45 to i64
  %48 = shl i64 %46, %47
  store i64 %48, ptr %14, align 8, !tbaa !11
  br label %49

49:                                               ; preds = %35, %30, %4
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #2
  %50 = load i64, ptr %13, align 8, !tbaa !11
  %51 = load ptr, ptr %5, align 8, !tbaa !5
  %52 = load i32, ptr %11, align 4, !tbaa !9
  %53 = zext i32 %52 to i64
  %54 = getelementptr inbounds i64, ptr %51, i64 %53
  %55 = load i64, ptr %54, align 8, !tbaa !11
  %56 = and i64 %50, %55
  store i64 %56, ptr %15, align 8, !tbaa !11
  %57 = load i32, ptr %10, align 4, !tbaa !9
  %58 = load i64, ptr %15, align 8, !tbaa !11
  %59 = zext i32 %57 to i64
  %60 = lshr i64 %58, %59
  store i64 %60, ptr %15, align 8, !tbaa !11
  %61 = load i64, ptr %15, align 8, !tbaa !11
  %62 = load i64, ptr %14, align 8, !tbaa !11
  %63 = or i64 %61, %62
  store i64 %63, ptr %9, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #2
  store i64 0, ptr %16, align 8, !tbaa !11
  %64 = load i32, ptr %8, align 4, !tbaa !9
  %65 = zext i32 %64 to i64
  %66 = icmp uge i64 %65, 64
  br i1 %66, label %67, label %68

67:                                               ; preds = %49
  store i64 -1, ptr %16, align 8, !tbaa !11
  br label %73

68:                                               ; preds = %49
  %69 = load i32, ptr %8, align 4, !tbaa !9
  %70 = zext i32 %69 to i64
  %71 = shl i64 1, %70
  %72 = sub i64 %71, 1
  store i64 %72, ptr %16, align 8, !tbaa !11
  br label %73

73:                                               ; preds = %68, %67
  %74 = load i64, ptr %9, align 8, !tbaa !11
  %75 = load i64, ptr %16, align 8, !tbaa !11
  %76 = and i64 %74, %75
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #2
  ret i64 %76
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable
define dso_local noundef i64 @_Z15get_from_bitvecPKmjjj(ptr nocapture noundef readonly %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  %5 = and i32 %2, 63
  %6 = lshr i32 %2, 6
  %.not = icmp ne i32 %5, 0
  %7 = add nuw nsw i32 %6, 1
  %8 = icmp ult i32 %7, %1
  %or.cond = select i1 %.not, i1 %8, i1 false
  %9 = zext nneg i32 %6 to i64
  br i1 %or.cond, label %10, label %._crit_edge

10:                                               ; preds = %4
  %11 = getelementptr inbounds i64, ptr %0, i64 %9
  %12 = getelementptr inbounds i8, ptr %11, i64 8
  %13 = load i64, ptr %12, align 8, !tbaa !5
  %14 = sub nuw nsw i32 64, %5
  %15 = zext nneg i32 %14 to i64
  %16 = shl i64 %13, %15
  br label %._crit_edge

._crit_edge:                                      ; preds = %4, %10
  %.022 = phi i64 [ %16, %10 ], [ 0, %4 ]
  %17 = getelementptr inbounds i64, ptr %0, i64 %9
  %18 = load i64, ptr %17, align 8, !tbaa !5
  %19 = icmp ugt i32 %3, 63
  %20 = zext nneg i32 %3 to i64
  %notmask25 = shl nsw i64 -1, %20
  %21 = xor i64 %notmask25, -1
  %.0 = select i1 %19, i64 -1, i64 %21
  %22 = zext nneg i32 %5 to i64
  %notmask = shl nsw i64 -1, %22
  %23 = and i64 %18, %notmask
  %24 = lshr i64 %23, %22
  %25 = or i64 %24, %.022
  %26 = and i64 %25, %.0
  ret i64 %26
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass