; LLVM IR from IOsonata/IOsonata :: src/sensors/accel_h3lis331dl.ll (ZN15AccelH3lis331dl10UpdateDataEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Device = type { ptr, i8, i32, ptr, ptr, i64, i8, ptr, i8, i32 }
%class.AccelSensor = type <{ %class.Sensor.base, %struct.__AccelSensor_Raw_Data, [5 x i8], ptr, i16, [2 x i8], [3 x [3 x float]], [3 x float], [4 x i8], %class.Device }>
%class.Sensor.base = type <{ ptr, i32, i32, i32, i32, i64, i8, [7 x i8], i64, i64, i32, i32, i32, i32, %"struct.std::atomic_flag" }>
%"struct.std::atomic_flag" = type { %"struct.std::__atomic_flag_base" }
%"struct.std::__atomic_flag_base" = type { i8 }
%struct.__AccelSensor_Raw_Data = type <{ i64, i16, i16, %union.anon }>
%union.anon = type { [3 x i16] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN15AccelH3lis331dl10UpdateDataEv(ptr noundef nonnull align 8 dereferenceable(156) %0) unnamed_addr #1 align 2 {
  %2 = alloca i1, align 1
  %3 = alloca ptr, align 8
  %4 = alloca i8, align 1
  %5 = alloca i8, align 1
  %6 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  %7 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 1, ptr %4) #2
  store i8 39, ptr %4, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #2
  %8 = load ptr, ptr %7, align 8, !tbaa !10
  %9 = getelementptr i8, ptr %8, i64 -24
  %10 = load i64, ptr %9, align 8
  %11 = getelementptr inbounds i8, ptr %7, i64 %10
  %12 = load ptr, ptr %11, align 8, !tbaa !10
  %13 = getelementptr inbounds ptr, ptr %12, i64 11
  %14 = load ptr, ptr %13, align 8
  %15 = call noundef zeroext i8 %14(ptr noundef nonnull align 8 dereferenceable(64) %11, ptr noundef %4, i32 noundef 1)
  store i8 %15, ptr %5, align 1, !tbaa !9
  %16 = load i8, ptr %5, align 1, !tbaa !9
  %17 = zext i8 %16 to i32
  %18 = and i32 %17, 15
  %19 = icmp ne i32 %18, 0
  br i1 %19, label %20, label %50

20:                                               ; preds = %1
  %21 = load ptr, ptr %7, align 8, !tbaa !10
  %22 = getelementptr i8, ptr %21, i64 -24
  %23 = load i64, ptr %22, align 8
  %24 = getelementptr inbounds i8, ptr %7, i64 %23
  %25 = getelementptr inbounds %class.Device, ptr %24, i32 0, i32 4
  %26 = load ptr, ptr %25, align 8, !tbaa !12
  %27 = icmp ne ptr %26, null
  br i1 %27, label %28, label %42

28:                                               ; preds = %20
  %29 = load ptr, ptr %7, align 8, !tbaa !10
  %30 = getelementptr i8, ptr %29, i64 -24
  %31 = load i64, ptr %30, align 8
  %32 = getelementptr inbounds i8, ptr %7, i64 %31
  %33 = getelementptr inbounds %class.Device, ptr %32, i32 0, i32 4
  %34 = load ptr, ptr %33, align 8, !tbaa !12
  %35 = load ptr, ptr %34, align 8, !tbaa !10
  %36 = getelementptr inbounds ptr, ptr %35, i64 14
  %37 = load ptr, ptr %36, align 8
  %38 = call noundef i32 %37(ptr noundef nonnull align 8 dereferenceable(140) %34)
  %39 = zext i32 %38 to i64
  %40 = getelementptr inbounds %class.AccelSensor, ptr %7, i32 0, i32 1
  %41 = getelementptr inbounds %struct.__AccelSensor_Raw_Data, ptr %40, i32 0, i32 0
  store i64 %39, ptr %41, align 1, !tbaa !18
  br label %42

42:                                               ; preds = %28, %20
  store i8 40, ptr %4, align 1, !tbaa !9
  %43 = getelementptr inbounds %class.AccelSensor, ptr %7, i32 0, i32 1
  %44 = getelementptr inbounds %struct.__AccelSensor_Raw_Data, ptr %43, i32 0, i32 3
  %45 = getelementptr inbounds [3 x i16], ptr %44, i64 0, i64 0
  %46 = load ptr, ptr %7, align 8, !tbaa !10
  %47 = getelementptr inbounds ptr, ptr %46, i64 29
  %48 = load ptr, ptr %47, align 8
  %49 = call noundef i32 %48(ptr noundef nonnull align 8 dereferenceable(156) %7, ptr noundef %4, i32 noundef 1, ptr noundef %45, i32 noundef 6)
  store i1 true, ptr %2, align 1
  store i32 1, ptr %6, align 4
  br label %51

50:                                               ; preds = %1
  store i1 false, ptr %2, align 1
  store i32 1, ptr %6, align 4
  br label %51

51:                                               ; preds = %50, %42
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #2
  call void @llvm.lifetime.end.p0(i64 1, ptr %4) #2
  %52 = load i1, ptr %2, align 1
  ret i1 %52
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"vtable pointer", !8, i64 0}
!12 = !{!13, !6, i64 24}
!13 = !{!"_ZTS6Device", !14, i64 8, !15, i64 12, !6, i64 16, !6, i64 24, !16, i64 32, !14, i64 40, !6, i64 48, !7, i64 56, !17, i64 60}
!14 = !{!"bool", !7, i64 0}
!15 = !{!"int", !7, i64 0}
!16 = !{!"long", !7, i64 0}
!17 = !{!"_ZTS21__Dev_Data_Byte_Order", !7, i64 0}
!18 = !{!19, !16, i64 73}
!19 = !{!"_ZTS11AccelSensor", !20, i64 0, !25, i64 73, !6, i64 96, !26, i64 104, !7, i64 108, !7, i64 144}
!20 = !{!"_ZTS6Sensor", !15, i64 8, !21, i64 12, !22, i64 16, !15, i64 20, !16, i64 24, !14, i64 32, !16, i64 40, !16, i64 48, !15, i64 56, !15, i64 60, !15, i64 64, !15, i64 68, !23, i64 72}
!21 = !{!"_ZTS14__Sensor_State", !7, i64 0}
!22 = !{!"_ZTS15__Sensor_OpMode", !7, i64 0}
!23 = !{!"_ZTSSt11atomic_flag", !24, i64 0}
!24 = !{!"_ZTSSt18__atomic_flag_base", !14, i64 0}
!25 = !{!"_ZTS22__AccelSensor_Raw_Data", !16, i64 0, !26, i64 8, !26, i64 10, !7, i64 12}
!26 = !{!"short", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN15AccelH3lis331dl10UpdateDataEv(ptr noundef nonnull align 8 dereferenceable(156) %0) unnamed_addr #1 align 2 {
  %2 = alloca i8, align 1
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %2) #2
  store i8 39, ptr %2, align 1, !tbaa !5
  %3 = load ptr, ptr %0, align 8, !tbaa !8
  %4 = getelementptr i8, ptr %3, i64 -24
  %5 = load i64, ptr %4, align 8
  %6 = getelementptr inbounds i8, ptr %0, i64 %5
  %7 = load ptr, ptr %6, align 8, !tbaa !8
  %8 = getelementptr inbounds i8, ptr %7, i64 88
  %9 = load ptr, ptr %8, align 8
  %10 = call noundef zeroext i8 %9(ptr noundef nonnull align 8 dereferenceable(64) %6, ptr noundef nonnull %2, i32 noundef 1)
  %11 = and i8 %10, 15
  %.not = icmp ne i8 %11, 0
  br i1 %.not, label %12, label %32

12:                                               ; preds = %1
  %13 = load ptr, ptr %0, align 8, !tbaa !8
  %14 = getelementptr i8, ptr %13, i64 -24
  %15 = load i64, ptr %14, align 8
  %16 = getelementptr inbounds i8, ptr %0, i64 %15
  %17 = getelementptr inbounds i8, ptr %16, i64 24
  %18 = load ptr, ptr %17, align 8, !tbaa !10
  %.not3 = icmp eq ptr %18, null
  br i1 %.not3, label %26, label %19

19:                                               ; preds = %12
  %20 = load ptr, ptr %18, align 8, !tbaa !8
  %21 = getelementptr inbounds i8, ptr %20, i64 112
  %22 = load ptr, ptr %21, align 8
  %23 = call noundef i32 %22(ptr noundef nonnull align 8 dereferenceable(140) %18)
  %24 = zext i32 %23 to i64
  %25 = getelementptr inbounds i8, ptr %0, i64 73
  store i64 %24, ptr %25, align 1, !tbaa !17
  %.pre = load ptr, ptr %0, align 8, !tbaa !8
  br label %26

26:                                               ; preds = %19, %12
  %27 = phi ptr [ %.pre, %19 ], [ %13, %12 ]
  store i8 40, ptr %2, align 1, !tbaa !5
  %28 = getelementptr inbounds i8, ptr %0, i64 85
  %29 = getelementptr inbounds i8, ptr %27, i64 232
  %30 = load ptr, ptr %29, align 8
  %31 = call noundef i32 %30(ptr noundef nonnull align 8 dereferenceable(156) %0, ptr noundef nonnull %2, i32 noundef 1, ptr noundef nonnull %28, i32 noundef 6)
  br label %32

32:                                               ; preds = %1, %26
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %2) #2
  ret i1 %.not
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"vtable pointer", !7, i64 0}
!10 = !{!11, !14, i64 24}
!11 = !{!"_ZTS6Device", !12, i64 8, !13, i64 12, !14, i64 16, !14, i64 24, !15, i64 32, !12, i64 40, !14, i64 48, !6, i64 56, !16, i64 60}
!12 = !{!"bool", !6, i64 0}
!13 = !{!"int", !6, i64 0}
!14 = !{!"any pointer", !6, i64 0}
!15 = !{!"long", !6, i64 0}
!16 = !{!"_ZTS21__Dev_Data_Byte_Order", !6, i64 0}
!17 = !{!18, !15, i64 73}
!18 = !{!"_ZTS11AccelSensor", !19, i64 0, !24, i64 73, !14, i64 96, !25, i64 104, !6, i64 108, !6, i64 144}
!19 = !{!"_ZTS6Sensor", !13, i64 8, !20, i64 12, !21, i64 16, !13, i64 20, !15, i64 24, !12, i64 32, !15, i64 40, !15, i64 48, !13, i64 56, !13, i64 60, !13, i64 64, !13, i64 68, !22, i64 72}
!20 = !{!"_ZTS14__Sensor_State", !6, i64 0}
!21 = !{!"_ZTS15__Sensor_OpMode", !6, i64 0}
!22 = !{!"_ZTSSt11atomic_flag", !23, i64 0}
!23 = !{!"_ZTSSt18__atomic_flag_base", !12, i64 0}
!24 = !{!"_ZTS22__AccelSensor_Raw_Data", !15, i64 0, !25, i64 8, !25, i64 10, !6, i64 12}
!25 = !{!"short", !6, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass