; LLVM IR from sgtlaugh/algovault :: code_library/fast_sieve.ll (Z11small_sievev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@s = external dso_local global i32, align 4
@sq = external dso_local global [65536 x i32], align 16
@sp = external dso_local global [65536 x i32], align 16

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z11small_sievev() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #2
  store i32 2, ptr %1, align 4, !tbaa !5
  br label %5

5:                                                ; preds = %37, %0
  %6 = load i32, ptr %1, align 4, !tbaa !5
  %7 = load i32, ptr %1, align 4, !tbaa !5
  %8 = mul i32 %6, %7
  %9 = icmp ult i32 %8, 65536
  br i1 %9, label %11, label %10

10:                                               ; preds = %5
  store i32 2, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #2
  br label %40

11:                                               ; preds = %5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  %12 = load i32, ptr %1, align 4, !tbaa !5
  %13 = load i32, ptr %1, align 4, !tbaa !5
  %14 = mul i32 %12, %13
  store i32 %14, ptr %3, align 4, !tbaa !5
  br label %15

15:                                               ; preds = %32, %11
  %16 = load i32, ptr %3, align 4, !tbaa !5
  %17 = icmp ult i32 %16, 65536
  br i1 %17, label %18, label %25

18:                                               ; preds = %15
  %19 = load i32, ptr %1, align 4, !tbaa !5
  %20 = zext i32 %19 to i64
  %21 = getelementptr inbounds [65536 x i32], ptr @sp, i64 0, i64 %20
  %22 = load i32, ptr %21, align 4, !tbaa !5
  %23 = icmp ne i32 %22, 0
  %24 = xor i1 %23, true
  br label %25

25:                                               ; preds = %18, %15
  %26 = phi i1 [ false, %15 ], [ %24, %18 ]
  br i1 %26, label %28, label %27

27:                                               ; preds = %25
  store i32 5, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  br label %36

28:                                               ; preds = %25
  %29 = load i32, ptr %3, align 4, !tbaa !5
  %30 = zext i32 %29 to i64
  %31 = getelementptr inbounds [65536 x i32], ptr @sp, i64 0, i64 %30
  store i32 1, ptr %31, align 4, !tbaa !5
  br label %32

32:                                               ; preds = %28
  %33 = load i32, ptr %1, align 4, !tbaa !5
  %34 = load i32, ptr %3, align 4, !tbaa !5
  %35 = add i32 %34, %33
  store i32 %35, ptr %3, align 4, !tbaa !5
  br label %15, !llvm.loop !9

36:                                               ; preds = %27
  br label %37

37:                                               ; preds = %36
  %38 = load i32, ptr %1, align 4, !tbaa !5
  %39 = add i32 %38, 1
  store i32 %39, ptr %1, align 4, !tbaa !5
  br label %5, !llvm.loop !11

40:                                               ; preds = %10
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  store i32 2, ptr %4, align 4, !tbaa !5
  br label %41

41:                                               ; preds = %64, %40
  %42 = load i32, ptr %4, align 4, !tbaa !5
  %43 = icmp ult i32 %42, 65536
  br i1 %43, label %45, label %44

44:                                               ; preds = %41
  store i32 8, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  br label %67

45:                                               ; preds = %41
  %46 = load i32, ptr %4, align 4, !tbaa !5
  %47 = zext i32 %46 to i64
  %48 = getelementptr inbounds [65536 x i32], ptr @sp, i64 0, i64 %47
  %49 = load i32, ptr %48, align 4, !tbaa !5
  %50 = icmp ne i32 %49, 0
  br i1 %50, label %63, label %51

51:                                               ; preds = %45
  %52 = load i32, ptr %4, align 4, !tbaa !5
  %53 = load i32, ptr @s, align 4, !tbaa !5
  %54 = zext i32 %53 to i64
  %55 = getelementptr inbounds [65536 x i32], ptr @sp, i64 0, i64 %54
  store i32 %52, ptr %55, align 4, !tbaa !5
  %56 = load i32, ptr %4, align 4, !tbaa !5
  %57 = load i32, ptr %4, align 4, !tbaa !5
  %58 = mul i32 %56, %57
  %59 = load i32, ptr @s, align 4, !tbaa !5
  %60 = add i32 %59, 1
  store i32 %60, ptr @s, align 4, !tbaa !5
  %61 = zext i32 %59 to i64
  %62 = getelementptr inbounds [65536 x i32], ptr @sq, i64 0, i64 %61
  store i32 %58, ptr %62, align 4, !tbaa !5
  br label %63

63:                                               ; preds = %51, %45
  br label %64

64:                                               ; preds = %63
  %65 = load i32, ptr %4, align 4, !tbaa !5
  %66 = add i32 %65, 1
  store i32 %66, ptr %4, align 4, !tbaa !5
  br label %41, !llvm.loop !12

67:                                               ; preds = %44
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@s = external dso_local local_unnamed_addr global i32, align 4
@sq = external dso_local local_unnamed_addr global [65536 x i32], align 16
@sp = external dso_local local_unnamed_addr global [65536 x i32], align 16

; Function Attrs: mustprogress nofree norecurse nosync nounwind memory(readwrite, argmem: none, inaccessiblemem: none) uwtable
define dso_local void @_Z11small_sievev() local_unnamed_addr #0 {
  br label %.preheader20

.preheader20:                                     ; preds = %.critedge.1, %0
  %indvars.iv = phi i64 [ 2, %0 ], [ %indvars.iv.next.1, %.critedge.1 ]
  %1 = phi i64 [ 4, %0 ], [ %14, %.critedge.1 ]
  %2 = getelementptr inbounds [65536 x i32], ptr @sp, i64 0, i64 %indvars.iv
  %3 = and i64 %1, 4294967295
  br label %4

.preheader:                                       ; preds = %.critedge.1
  %s.promoted = load i32, ptr @s, align 4, !tbaa !5
  br label %19

4:                                                ; preds = %.preheader20, %15
  %indvars.iv24 = phi i64 [ %3, %.preheader20 ], [ %indvars.iv.next25, %15 ]
  %5 = load i32, ptr %2, align 8, !tbaa !5
  %.not19 = icmp eq i32 %5, 0
  br i1 %.not19, label %15, label %.critedge

.critedge:                                        ; preds = %15, %4
  %indvars.iv.next = or disjoint i64 %indvars.iv, 1
  %6 = mul i64 %indvars.iv.next, %indvars.iv.next
  %7 = getelementptr inbounds [65536 x i32], ptr @sp, i64 0, i64 %indvars.iv.next
  %8 = and i64 %6, 4294967295
  br label %9

9:                                                ; preds = %11, %.critedge
  %indvars.iv24.1 = phi i64 [ %8, %.critedge ], [ %indvars.iv.next25.1, %11 ]
  %10 = load i32, ptr %7, align 4, !tbaa !5
  %.not19.1 = icmp eq i32 %10, 0
  br i1 %.not19.1, label %11, label %.critedge.1

11:                                               ; preds = %9
  %12 = getelementptr inbounds [65536 x i32], ptr @sp, i64 0, i64 %indvars.iv24.1
  store i32 1, ptr %12, align 4, !tbaa !5
  %indvars.iv.next25.1 = add nuw nsw i64 %indvars.iv24.1, %indvars.iv.next
  %13 = icmp ult i64 %indvars.iv.next25.1, 65536
  br i1 %13, label %9, label %.critedge.1, !llvm.loop !9

.critedge.1:                                      ; preds = %11, %9
  %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2
  %14 = mul i64 %indvars.iv.next.1, %indvars.iv.next.1
  %exitcond.not.1 = icmp eq i64 %indvars.iv.next.1, 256
  br i1 %exitcond.not.1, label %.preheader, label %.preheader20, !llvm.loop !11

15:                                               ; preds = %4
  %16 = getelementptr inbounds [65536 x i32], ptr @sp, i64 0, i64 %indvars.iv24
  store i32 1, ptr %16, align 4, !tbaa !5
  %indvars.iv.next25 = add nuw nsw i64 %indvars.iv24, %indvars.iv
  %17 = icmp ult i64 %indvars.iv.next25, 65536
  br i1 %17, label %4, label %.critedge, !llvm.loop !9

18:                                               ; preds = %43
  ret void

19:                                               ; preds = %43, %.preheader
  %indvars.iv28 = phi i64 [ 2, %.preheader ], [ %indvars.iv.next29.1, %43 ]
  %20 = phi i32 [ %s.promoted, %.preheader ], [ %44, %43 ]
  %21 = getelementptr inbounds [65536 x i32], ptr @sp, i64 0, i64 %indvars.iv28
  %22 = load i32, ptr %21, align 8, !tbaa !5
  %.not = icmp eq i32 %22, 0
  br i1 %.not, label %23, label %31

23:                                               ; preds = %19
  %24 = zext i32 %20 to i64
  %25 = getelementptr inbounds [65536 x i32], ptr @sp, i64 0, i64 %24
  %26 = trunc nuw nsw i64 %indvars.iv28 to i32
  store i32 %26, ptr %25, align 4, !tbaa !5
  %27 = mul nuw i64 %indvars.iv28, %indvars.iv28
  %28 = add i32 %20, 1
  store i32 %28, ptr @s, align 4, !tbaa !5
  %29 = getelementptr inbounds [65536 x i32], ptr @sq, i64 0, i64 %24
  %30 = trunc nuw i64 %27 to i32
  store i32 %30, ptr %29, align 4, !tbaa !5
  br label %31

31:                                               ; preds = %19, %23
  %32 = phi i32 [ %20, %19 ], [ %28, %23 ]
  %indvars.iv.next29 = or disjoint i64 %indvars.iv28, 1
  %33 = getelementptr inbounds [65536 x i32], ptr @sp, i64 0, i64 %indvars.iv.next29
  %34 = load i32, ptr %33, align 4, !tbaa !5
  %.not.1 = icmp eq i32 %34, 0
  br i1 %.not.1, label %35, label %43

35:                                               ; preds = %31
  %36 = zext i32 %32 to i64
  %37 = getelementptr inbounds [65536 x i32], ptr @sp, i64 0, i64 %36
  %38 = trunc nuw nsw i64 %indvars.iv.next29 to i32
  store i32 %38, ptr %37, align 4, !tbaa !5
  %39 = mul nuw i64 %indvars.iv.next29, %indvars.iv.next29
  %40 = add i32 %32, 1
  store i32 %40, ptr @s, align 4, !tbaa !5
  %41 = getelementptr inbounds [65536 x i32], ptr @sq, i64 0, i64 %36
  %42 = trunc nuw i64 %39 to i32
  store i32 %42, ptr %41, align 4, !tbaa !5
  br label %43

43:                                               ; preds = %35, %31
  %44 = phi i32 [ %32, %31 ], [ %40, %35 ]
  %indvars.iv.next29.1 = add nuw nsw i64 %indvars.iv28, 2
  %exitcond31.not.1 = icmp eq i64 %indvars.iv.next29.1, 65536
  br i1 %exitcond31.not.1, label %18, label %19, !llvm.loop !12
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind memory(readwrite, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass