; LLVM IR from VastoLorde95/Competitive-Programming :: Codeforces/312 Division 2/Problem E/E.ll (Z5queryiiiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.node = type { i32 }

@tree = external dso_local global [26 x [524288 x %struct.node]], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z5shiftiiii(i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z5queryiiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) #1 {
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  store i32 %0, ptr %8, align 4, !tbaa !5
  store i32 %1, ptr %9, align 4, !tbaa !5
  store i32 %2, ptr %10, align 4, !tbaa !5
  store i32 %3, ptr %11, align 4, !tbaa !5
  store i32 %4, ptr %12, align 4, !tbaa !5
  store i32 %5, ptr %13, align 4, !tbaa !5
  %17 = load i32, ptr %9, align 4, !tbaa !5
  %18 = load i32, ptr %13, align 4, !tbaa !5
  %19 = icmp sge i32 %17, %18
  br i1 %19, label %24, label %20

20:                                               ; preds = %6
  %21 = load i32, ptr %12, align 4, !tbaa !5
  %22 = load i32, ptr %10, align 4, !tbaa !5
  %23 = icmp sge i32 %21, %22
  br i1 %23, label %24, label %25

24:                                               ; preds = %20, %6
  store i32 0, ptr %7, align 4
  br label %70

25:                                               ; preds = %20
  %26 = load i32, ptr %9, align 4, !tbaa !5
  %27 = load i32, ptr %12, align 4, !tbaa !5
  %28 = icmp sle i32 %26, %27
  br i1 %28, label %29, label %42

29:                                               ; preds = %25
  %30 = load i32, ptr %13, align 4, !tbaa !5
  %31 = load i32, ptr %10, align 4, !tbaa !5
  %32 = icmp sle i32 %30, %31
  br i1 %32, label %33, label %42

33:                                               ; preds = %29
  %34 = load i32, ptr %8, align 4, !tbaa !5
  %35 = sext i32 %34 to i64
  %36 = getelementptr inbounds [26 x [524288 x %struct.node]], ptr @tree, i64 0, i64 %35
  %37 = load i32, ptr %11, align 4, !tbaa !5
  %38 = sext i32 %37 to i64
  %39 = getelementptr inbounds [524288 x %struct.node], ptr %36, i64 0, i64 %38
  %40 = getelementptr inbounds %struct.node, ptr %39, i32 0, i32 0
  %41 = load i32, ptr %40, align 4, !tbaa !9
  store i32 %41, ptr %7, align 4
  br label %70

42:                                               ; preds = %29, %25
  %43 = load i32, ptr %8, align 4, !tbaa !5
  %44 = load i32, ptr %11, align 4, !tbaa !5
  %45 = load i32, ptr %12, align 4, !tbaa !5
  %46 = load i32, ptr %13, align 4, !tbaa !5
  call void @_Z5shiftiiii(i32 noundef %43, i32 noundef %44, i32 noundef %45, i32 noundef %46)
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #2
  %47 = load i32, ptr %11, align 4, !tbaa !5
  %48 = shl i32 %47, 1
  store i32 %48, ptr %14, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #2
  %49 = load i32, ptr %14, align 4, !tbaa !5
  %50 = add nsw i32 %49, 1
  store i32 %50, ptr %15, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #2
  %51 = load i32, ptr %12, align 4, !tbaa !5
  %52 = load i32, ptr %13, align 4, !tbaa !5
  %53 = add nsw i32 %51, %52
  %54 = ashr i32 %53, 1
  store i32 %54, ptr %16, align 4, !tbaa !5
  %55 = load i32, ptr %8, align 4, !tbaa !5
  %56 = load i32, ptr %9, align 4, !tbaa !5
  %57 = load i32, ptr %10, align 4, !tbaa !5
  %58 = load i32, ptr %14, align 4, !tbaa !5
  %59 = load i32, ptr %12, align 4, !tbaa !5
  %60 = load i32, ptr %16, align 4, !tbaa !5
  %61 = call noundef i32 @_Z5queryiiiiii(i32 noundef %55, i32 noundef %56, i32 noundef %57, i32 noundef %58, i32 noundef %59, i32 noundef %60)
  %62 = load i32, ptr %8, align 4, !tbaa !5
  %63 = load i32, ptr %9, align 4, !tbaa !5
  %64 = load i32, ptr %10, align 4, !tbaa !5
  %65 = load i32, ptr %15, align 4, !tbaa !5
  %66 = load i32, ptr %16, align 4, !tbaa !5
  %67 = load i32, ptr %13, align 4, !tbaa !5
  %68 = call noundef i32 @_Z5queryiiiiii(i32 noundef %62, i32 noundef %63, i32 noundef %64, i32 noundef %65, i32 noundef %66, i32 noundef %67)
  %69 = add nsw i32 %61, %68
  store i32 %69, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #2
  br label %70

70:                                               ; preds = %42, %33, %24
  %71 = load i32, ptr %7, align 4
  ret i32 %71
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"_ZTS4node", !6, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.node = type { i32 }

@tree = external dso_local local_unnamed_addr global [26 x [524288 x %struct.node]], align 16

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z5shiftiiii(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z5queryiiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) local_unnamed_addr #0 {
  %.not = icmp slt i32 %1, %5
  %.not3547 = icmp slt i32 %4, %2
  %or.cond48 = and i1 %.not, %.not3547
  br i1 %or.cond48, label %.lr.ph, label %.loopexit

.lr.ph:                                           ; preds = %6
  %.not37 = icmp sgt i32 %5, %2
  br i1 %.not37, label %tailrecurse.us, label %.lr.ph.split.split

tailrecurse.us:                                   ; preds = %.lr.ph, %tailrecurse.us
  %.tr4251.us = phi i32 [ %10, %tailrecurse.us ], [ %4, %.lr.ph ]
  %.tr4150.us = phi i32 [ %8, %tailrecurse.us ], [ %3, %.lr.ph ]
  %accumulator.tr49.us = phi i32 [ %12, %tailrecurse.us ], [ 0, %.lr.ph ]
  tail call void @_Z5shiftiiii(i32 noundef %0, i32 noundef %.tr4150.us, i32 noundef %.tr4251.us, i32 noundef %5)
  %7 = shl i32 %.tr4150.us, 1
  %8 = or disjoint i32 %7, 1
  %9 = add nsw i32 %.tr4251.us, %5
  %10 = ashr i32 %9, 1
  %11 = tail call noundef i32 @_Z5queryiiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %7, i32 noundef %.tr4251.us, i32 noundef %10)
  %12 = add nsw i32 %11, %accumulator.tr49.us
  %.not35.us = icmp slt i32 %10, %2
  br i1 %.not35.us, label %tailrecurse.us, label %.loopexit

.lr.ph.split.split:                               ; preds = %.lr.ph, %tailrecurse
  %.tr4251 = phi i32 [ %20, %tailrecurse ], [ %4, %.lr.ph ]
  %.tr4150 = phi i32 [ %18, %tailrecurse ], [ %3, %.lr.ph ]
  %accumulator.tr49 = phi i32 [ %22, %tailrecurse ], [ 0, %.lr.ph ]
  %.not36 = icmp slt i32 %.tr4251, %1
  br i1 %.not36, label %tailrecurse, label %.split.us

.split.us:                                        ; preds = %.lr.ph.split.split
  %13 = sext i32 %0 to i64
  %14 = sext i32 %.tr4150 to i64
  %15 = getelementptr inbounds [26 x [524288 x %struct.node]], ptr @tree, i64 0, i64 %13, i64 %14
  %16 = load i32, ptr %15, align 4, !tbaa !5
  br label %.loopexit

tailrecurse:                                      ; preds = %.lr.ph.split.split
  tail call void @_Z5shiftiiii(i32 noundef %0, i32 noundef %.tr4150, i32 noundef %.tr4251, i32 noundef %5)
  %17 = shl i32 %.tr4150, 1
  %18 = or disjoint i32 %17, 1
  %19 = add nsw i32 %.tr4251, %5
  %20 = ashr i32 %19, 1
  %21 = tail call noundef i32 @_Z5queryiiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %17, i32 noundef %.tr4251, i32 noundef %20)
  %22 = add nsw i32 %21, %accumulator.tr49
  %.not35 = icmp slt i32 %20, %2
  br i1 %.not35, label %.lr.ph.split.split, label %.loopexit

.loopexit:                                        ; preds = %tailrecurse, %tailrecurse.us, %6, %.split.us
  %accumulator.tr46 = phi i32 [ %accumulator.tr49, %.split.us ], [ 0, %6 ], [ %12, %tailrecurse.us ], [ %22, %tailrecurse ]
  %.0 = phi i32 [ %16, %.split.us ], [ 0, %6 ], [ 0, %tailrecurse.us ], [ 0, %tailrecurse ]
  %accumulator.ret.tr = add nsw i32 %.0, %accumulator.tr46
  ret i32 %accumulator.ret.tr
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS4node", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass