; LLVM IR from IOsonata/IOsonata :: ARM/Nordic/nRF52/nRF52840/exemples/BoschAppBoard/src (bmi3)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_get_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_set_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) #2

; Function Attrs: nounwind uwtable
define dso_local signext i8 @bmi3_set_i3c_tc_sync_tph(i16 noundef zeroext %0, ptr noundef %1) #2 {
  %3 = alloca i16, align 2
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  %6 = alloca i16, align 2
  %7 = alloca i16, align 2
  %8 = alloca [2 x i8], align 1
  store i16 %0, ptr %3, align 2, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 2, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 2, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 2, ptr %8) #3
  call void @llvm.memset.p0.i64(ptr align 1 %8, i8 0, i64 2, i1 false)
  %9 = getelementptr inbounds [2 x i8], ptr %8, i64 0, i64 0
  %10 = load ptr, ptr %4, align 8, !tbaa !9
  %11 = call signext i8 @bmi3_get_regs(i8 noundef zeroext 112, ptr noundef %9, i16 noundef zeroext 2, ptr noundef %10)
  store i8 %11, ptr %5, align 1, !tbaa !11
  %12 = load i8, ptr %5, align 1, !tbaa !11
  %13 = sext i8 %12 to i32
  %14 = icmp eq i32 %13, 0
  br i1 %14, label %15, label %49

15:                                               ; preds = %2
  %16 = getelementptr inbounds [2 x i8], ptr %8, i64 0, i64 0
  %17 = load i8, ptr %16, align 1, !tbaa !11
  %18 = zext i8 %17 to i32
  %19 = and i32 %18, -65536
  %20 = load i16, ptr %3, align 2, !tbaa !5
  %21 = zext i16 %20 to i32
  %22 = and i32 %21, 65535
  %23 = or i32 %19, %22
  %24 = trunc i32 %23 to i8
  %25 = getelementptr inbounds [2 x i8], ptr %8, i64 0, i64 0
  store i8 %24, ptr %25, align 1, !tbaa !11
  %26 = getelementptr inbounds [2 x i8], ptr %8, i64 0, i64 1
  %27 = load i8, ptr %26, align 1, !tbaa !11
  %28 = zext i8 %27 to i16
  %29 = zext i16 %28 to i32
  %30 = shl i32 %29, 8
  %31 = trunc i32 %30 to i16
  store i16 %31, ptr %6, align 2, !tbaa !5
  %32 = load i16, ptr %6, align 2, !tbaa !5
  %33 = zext i16 %32 to i32
  %34 = and i32 %33, -65536
  %35 = load i16, ptr %3, align 2, !tbaa !5
  %36 = zext i16 %35 to i32
  %37 = and i32 %36, 65535
  %38 = or i32 %34, %37
  %39 = trunc i32 %38 to i8
  %40 = zext i8 %39 to i16
  store i16 %40, ptr %7, align 2, !tbaa !5
  %41 = load i16, ptr %7, align 2, !tbaa !5
  %42 = zext i16 %41 to i32
  %43 = ashr i32 %42, 8
  %44 = trunc i32 %43 to i8
  %45 = getelementptr inbounds [2 x i8], ptr %8, i64 0, i64 1
  store i8 %44, ptr %45, align 1, !tbaa !11
  %46 = getelementptr inbounds [2 x i8], ptr %8, i64 0, i64 0
  %47 = load ptr, ptr %4, align 8, !tbaa !9
  %48 = call signext i8 @bmi3_set_regs(i8 noundef zeroext 112, ptr noundef %46, i16 noundef zeroext 2, ptr noundef %47)
  store i8 %48, ptr %5, align 1, !tbaa !11
  br label %49

49:                                               ; preds = %15, %2
  %50 = load i8, ptr %5, align 1, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 2, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #3
  ret i8 %50
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"short", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_get_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_set_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local signext i8 @bmi3_set_i3c_tc_sync_tph(i16 noundef zeroext %0, ptr noundef %1) local_unnamed_addr #1 {
  %3 = alloca [2 x i8], align 2
  call void @llvm.lifetime.start.p0(i64 2, ptr nonnull %3) #2
  store i16 0, ptr %3, align 2
  %4 = call signext i8 @bmi3_get_regs(i8 noundef zeroext 112, ptr noundef nonnull %3, i16 noundef zeroext 2, ptr noundef %1)
  %5 = icmp eq i8 %4, 0
  br i1 %5, label %6, label %10

6:                                                ; preds = %2
  %7 = trunc i16 %0 to i8
  store i8 %7, ptr %3, align 2, !tbaa !5
  %8 = getelementptr inbounds i8, ptr %3, i64 1
  store i8 0, ptr %8, align 1, !tbaa !5
  %9 = call signext i8 @bmi3_set_regs(i8 noundef zeroext 112, ptr noundef nonnull %3, i16 noundef zeroext 2, ptr noundef %1)
  br label %10

10:                                               ; preds = %6, %2
  %.0 = phi i8 [ %9, %6 ], [ %4, %2 ]
  call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %3) #2
  ret i8 %.0
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,SROAPass