; LLVM IR from VastoLorde95/Competitive-Programming :: Codeforces/326 Division 2/Problem E/E.ll (Z5mergeRSt6vectorIiSaIiEES2_S2_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5mergeRSt6vectorIiSaIiEES2_S2_(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull align 8 dereferenceable(24) %2) #0 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  store i32 10, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  %13 = load ptr, ptr %5, align 8, !tbaa !5
  %14 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %13) #4
  %15 = load ptr, ptr %6, align 8, !tbaa !5
  %16 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %15) #4
  %17 = add i64 %14, %16
  %18 = trunc i64 %17 to i32
  store i32 %18, ptr %9, align 4, !tbaa !9
  %19 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %8, ptr noundef nonnull align 4 dereferenceable(4) %9)
  %20 = load i32, ptr %19, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  store i32 %20, ptr %7, align 4, !tbaa !9
  %21 = load ptr, ptr %4, align 8, !tbaa !5
  call void @_ZNSt6vectorIiSaIiEE5clearEv(ptr noundef nonnull align 8 dereferenceable(24) %21) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  store i32 0, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  store i32 0, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  store i32 0, ptr %12, align 4, !tbaa !9
  br label %22

22:                                               ; preds = %89, %3
  %23 = load i32, ptr %12, align 4, !tbaa !9
  %24 = load i32, ptr %7, align 4, !tbaa !9
  %25 = icmp slt i32 %23, %24
  br i1 %25, label %26, label %38

26:                                               ; preds = %22
  %27 = load i32, ptr %10, align 4, !tbaa !9
  %28 = sext i32 %27 to i64
  %29 = load ptr, ptr %5, align 8, !tbaa !5
  %30 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %29) #4
  %31 = icmp ult i64 %28, %30
  br i1 %31, label %32, label %38

32:                                               ; preds = %26
  %33 = load i32, ptr %11, align 4, !tbaa !9
  %34 = sext i32 %33 to i64
  %35 = load ptr, ptr %6, align 8, !tbaa !5
  %36 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %35) #4
  %37 = icmp ult i64 %34, %36
  br label %38

38:                                               ; preds = %32, %26, %22
  %39 = phi i1 [ false, %26 ], [ false, %22 ], [ %37, %32 ]
  br i1 %39, label %40, label %92

40:                                               ; preds = %38
  %41 = load ptr, ptr %5, align 8, !tbaa !5
  %42 = load i32, ptr %10, align 4, !tbaa !9
  %43 = sext i32 %42 to i64
  %44 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %41, i64 noundef %43) #4
  %45 = load i32, ptr %44, align 4, !tbaa !9
  %46 = load ptr, ptr %6, align 8, !tbaa !5
  %47 = load i32, ptr %11, align 4, !tbaa !9
  %48 = sext i32 %47 to i64
  %49 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %46, i64 noundef %48) #4
  %50 = load i32, ptr %49, align 4, !tbaa !9
  %51 = icmp eq i32 %45, %50
  br i1 %51, label %52, label %62

52:                                               ; preds = %40
  %53 = load ptr, ptr %4, align 8, !tbaa !5
  %54 = load ptr, ptr %5, align 8, !tbaa !5
  %55 = load i32, ptr %10, align 4, !tbaa !9
  %56 = sext i32 %55 to i64
  %57 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %54, i64 noundef %56) #4
  call void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24) %53, ptr noundef nonnull align 4 dereferenceable(4) %57)
  %58 = load i32, ptr %10, align 4, !tbaa !9
  %59 = add nsw i32 %58, 1
  store i32 %59, ptr %10, align 4, !tbaa !9
  %60 = load i32, ptr %11, align 4, !tbaa !9
  %61 = add nsw i32 %60, 1
  store i32 %61, ptr %11, align 4, !tbaa !9
  br label %89

62:                                               ; preds = %40
  %63 = load ptr, ptr %5, align 8, !tbaa !5
  %64 = load i32, ptr %10, align 4, !tbaa !9
  %65 = sext i32 %64 to i64
  %66 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %63, i64 noundef %65) #4
  %67 = load i32, ptr %66, align 4, !tbaa !9
  %68 = load ptr, ptr %6, align 8, !tbaa !5
  %69 = load i32, ptr %11, align 4, !tbaa !9
  %70 = sext i32 %69 to i64
  %71 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %68, i64 noundef %70) #4
  %72 = load i32, ptr %71, align 4, !tbaa !9
  %73 = icmp slt i32 %67, %72
  br i1 %73, label %74, label %81

74:                                               ; preds = %62
  %75 = load ptr, ptr %4, align 8, !tbaa !5
  %76 = load ptr, ptr %5, align 8, !tbaa !5
  %77 = load i32, ptr %10, align 4, !tbaa !9
  %78 = add nsw i32 %77, 1
  store i32 %78, ptr %10, align 4, !tbaa !9
  %79 = sext i32 %77 to i64
  %80 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %76, i64 noundef %79) #4
  call void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24) %75, ptr noundef nonnull align 4 dereferenceable(4) %80)
  br label %88

81:                                               ; preds = %62
  %82 = load ptr, ptr %4, align 8, !tbaa !5
  %83 = load ptr, ptr %6, align 8, !tbaa !5
  %84 = load i32, ptr %11, align 4, !tbaa !9
  %85 = add nsw i32 %84, 1
  store i32 %85, ptr %11, align 4, !tbaa !9
  %86 = sext i32 %84 to i64
  %87 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %83, i64 noundef %86) #4
  call void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24) %82, ptr noundef nonnull align 4 dereferenceable(4) %87)
  br label %88

88:                                               ; preds = %81, %74
  br label %89

89:                                               ; preds = %88, %52
  %90 = load i32, ptr %12, align 4, !tbaa !9
  %91 = add nsw i32 %90, 1
  store i32 %91, ptr %12, align 4, !tbaa !9
  br label %22, !llvm.loop !11

92:                                               ; preds = %38
  br label %93

93:                                               ; preds = %105, %92
  %94 = load i32, ptr %12, align 4, !tbaa !9
  %95 = load i32, ptr %7, align 4, !tbaa !9
  %96 = icmp slt i32 %94, %95
  br i1 %96, label %97, label %103

97:                                               ; preds = %93
  %98 = load i32, ptr %10, align 4, !tbaa !9
  %99 = sext i32 %98 to i64
  %100 = load ptr, ptr %5, align 8, !tbaa !5
  %101 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %100) #4
  %102 = icmp ult i64 %99, %101
  br label %103

103:                                              ; preds = %97, %93
  %104 = phi i1 [ false, %93 ], [ %102, %97 ]
  br i1 %104, label %105, label %114

105:                                              ; preds = %103
  %106 = load ptr, ptr %4, align 8, !tbaa !5
  %107 = load ptr, ptr %5, align 8, !tbaa !5
  %108 = load i32, ptr %10, align 4, !tbaa !9
  %109 = add nsw i32 %108, 1
  store i32 %109, ptr %10, align 4, !tbaa !9
  %110 = sext i32 %108 to i64
  %111 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %107, i64 noundef %110) #4
  call void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24) %106, ptr noundef nonnull align 4 dereferenceable(4) %111)
  %112 = load i32, ptr %12, align 4, !tbaa !9
  %113 = add nsw i32 %112, 1
  store i32 %113, ptr %12, align 4, !tbaa !9
  br label %93, !llvm.loop !13

114:                                              ; preds = %103
  br label %115

115:                                              ; preds = %127, %114
  %116 = load i32, ptr %12, align 4, !tbaa !9
  %117 = load i32, ptr %7, align 4, !tbaa !9
  %118 = icmp slt i32 %116, %117
  br i1 %118, label %119, label %125

119:                                              ; preds = %115
  %120 = load i32, ptr %11, align 4, !tbaa !9
  %121 = sext i32 %120 to i64
  %122 = load ptr, ptr %6, align 8, !tbaa !5
  %123 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %122) #4
  %124 = icmp ult i64 %121, %123
  br label %125

125:                                              ; preds = %119, %115
  %126 = phi i1 [ false, %115 ], [ %124, %119 ]
  br i1 %126, label %127, label %136

127:                                              ; preds = %125
  %128 = load ptr, ptr %4, align 8, !tbaa !5
  %129 = load ptr, ptr %6, align 8, !tbaa !5
  %130 = load i32, ptr %11, align 4, !tbaa !9
  %131 = add nsw i32 %130, 1
  store i32 %131, ptr %11, align 4, !tbaa !9
  %132 = sext i32 %130 to i64
  %133 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %129, i64 noundef %132) #4
  call void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24) %128, ptr noundef nonnull align 4 dereferenceable(4) %133)
  %134 = load i32, ptr %12, align 4, !tbaa !9
  %135 = add nsw i32 %134, 1
  store i32 %135, ptr %12, align 4, !tbaa !9
  br label %115, !llvm.loop !14

136:                                              ; preds = %125
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #3 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE5clearEv(ptr noundef nonnull align 8 dereferenceable(24)) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(4)) #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5mergeRSt6vectorIiSaIiEES2_S2_(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull align 8 dereferenceable(24) %2) local_unnamed_addr #0 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #4
  store i32 10, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #4
  %6 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #4
  %7 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2) #4
  %8 = add i64 %7, %6
  %9 = trunc i64 %8 to i32
  store i32 %9, ptr %5, align 4, !tbaa !5
  %10 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %4, ptr noundef nonnull align 4 dereferenceable(4) %5)
  %11 = load i32, ptr %10, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #4
  call void @_ZNSt6vectorIiSaIiEE5clearEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #4
  %12 = icmp sgt i32 %11, 0
  br i1 %12, label %.lr.ph, label %.critedge

.lr.ph:                                           ; preds = %3, %41
  %.060 = phi i32 [ %42, %41 ], [ 0, %3 ]
  %.04859 = phi i32 [ %.149, %41 ], [ 0, %3 ]
  %.05158 = phi i32 [ %.152, %41 ], [ 0, %3 ]
  %13 = sext i32 %.05158 to i64
  %14 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #4
  %15 = icmp ugt i64 %14, %13
  br i1 %15, label %16, label %.critedge.loopexit

16:                                               ; preds = %.lr.ph
  %17 = sext i32 %.04859 to i64
  %18 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2) #4
  %19 = icmp ugt i64 %18, %17
  br i1 %19, label %20, label %.critedge.loopexit

20:                                               ; preds = %16
  %21 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %13) #4
  %22 = load i32, ptr %21, align 4, !tbaa !5
  %23 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %17) #4
  %24 = load i32, ptr %23, align 4, !tbaa !5
  %25 = icmp eq i32 %22, %24
  %26 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %13) #4
  br i1 %25, label %27, label %30

27:                                               ; preds = %20
  call void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 4 dereferenceable(4) %26)
  %28 = add nsw i32 %.05158, 1
  %29 = add nsw i32 %.04859, 1
  br label %41

30:                                               ; preds = %20
  %31 = load i32, ptr %26, align 4, !tbaa !5
  %32 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %17) #4
  %33 = load i32, ptr %32, align 4, !tbaa !5
  %34 = icmp slt i32 %31, %33
  br i1 %34, label %35, label %38

35:                                               ; preds = %30
  %36 = add nsw i32 %.05158, 1
  %37 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %13) #4
  call void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 4 dereferenceable(4) %37)
  br label %41

38:                                               ; preds = %30
  %39 = add nsw i32 %.04859, 1
  %40 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %17) #4
  call void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 4 dereferenceable(4) %40)
  br label %41

41:                                               ; preds = %35, %38, %27
  %.152 = phi i32 [ %28, %27 ], [ %36, %35 ], [ %.05158, %38 ]
  %.149 = phi i32 [ %29, %27 ], [ %.04859, %35 ], [ %39, %38 ]
  %42 = add nuw nsw i32 %.060, 1
  %exitcond.not = icmp eq i32 %42, %11
  br i1 %exitcond.not, label %.critedge.loopexit, label %.lr.ph, !llvm.loop !9

.critedge.loopexit:                               ; preds = %.lr.ph, %41, %16
  %.051.lcssa.ph = phi i32 [ %.05158, %16 ], [ %.152, %41 ], [ %.05158, %.lr.ph ]
  %.048.lcssa.ph = phi i32 [ %.04859, %16 ], [ %.149, %41 ], [ %.04859, %.lr.ph ]
  %.0.lcssa.ph = phi i32 [ %.060, %16 ], [ %11, %41 ], [ %.060, %.lr.ph ]
  %43 = sext i32 %.051.lcssa.ph to i64
  %44 = sext i32 %.048.lcssa.ph to i64
  br label %.critedge

.critedge:                                        ; preds = %.critedge.loopexit, %3
  %.051.lcssa = phi i64 [ 0, %3 ], [ %43, %.critedge.loopexit ]
  %.048.lcssa = phi i64 [ 0, %3 ], [ %44, %.critedge.loopexit ]
  %.0.lcssa = phi i32 [ 0, %3 ], [ %.0.lcssa.ph, %.critedge.loopexit ]
  %45 = icmp slt i32 %.0.lcssa, %11
  br i1 %45, label %.lr.ph73, label %.critedge2

.lr.ph73:                                         ; preds = %.critedge, %48
  %indvars.iv = phi i64 [ %indvars.iv.next, %48 ], [ %.051.lcssa, %.critedge ]
  %.172 = phi i32 [ %50, %48 ], [ %.0.lcssa, %.critedge ]
  %46 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #4
  %47 = icmp ugt i64 %46, %indvars.iv
  br i1 %47, label %48, label %.critedge2

48:                                               ; preds = %.lr.ph73
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %49 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv) #4
  call void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 4 dereferenceable(4) %49)
  %50 = add nsw i32 %.172, 1
  %exitcond82.not = icmp eq i32 %50, %11
  br i1 %exitcond82.not, label %.critedge4, label %.lr.ph73, !llvm.loop !11

.critedge2:                                       ; preds = %.lr.ph73, %.critedge
  %.1.lcssa = phi i32 [ %.0.lcssa, %.critedge ], [ %.172, %.lr.ph73 ]
  %51 = icmp slt i32 %.1.lcssa, %11
  br i1 %51, label %.lr.ph79, label %.critedge4

.lr.ph79:                                         ; preds = %.critedge2, %54
  %indvars.iv83 = phi i64 [ %indvars.iv.next84, %54 ], [ %.048.lcssa, %.critedge2 ]
  %.278 = phi i32 [ %56, %54 ], [ %.1.lcssa, %.critedge2 ]
  %52 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2) #4
  %53 = icmp ugt i64 %52, %indvars.iv83
  br i1 %53, label %54, label %.critedge4

54:                                               ; preds = %.lr.ph79
  %indvars.iv.next84 = add nuw nsw i64 %indvars.iv83, 1
  %55 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %indvars.iv83) #4
  call void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 4 dereferenceable(4) %55)
  %56 = add nsw i32 %.278, 1
  %exitcond86.not = icmp eq i32 %56, %11
  br i1 %exitcond86.not, label %.critedge4, label %.lr.ph79, !llvm.loop !12

.critedge4:                                       ; preds = %48, %.lr.ph79, %54, %.critedge2
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE5clearEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass