; LLVM IR from IOsonata/IOsonata :: ARM/Nordic/nRF52/nRF52840/exemples/BoschAppBoard/src (bmi3)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.bmi3_err_reg = type { i8, i8, i8, i8, i8, i8, i8 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_get_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local signext i8 @bmi3_get_error_status(ptr noundef %0, ptr noundef %1) #2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  %6 = alloca [2 x i8], align 1
  %7 = alloca i16, align 2
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 2, ptr %6) #3
  call void @llvm.memset.p0.i64(ptr align 1 %6, i8 0, i64 2, i1 false)
  call void @llvm.lifetime.start.p0(i64 2, ptr %7) #3
  %8 = load ptr, ptr %3, align 8, !tbaa !5
  %9 = icmp ne ptr %8, null
  br i1 %9, label %10, label %73

10:                                               ; preds = %2
  %11 = getelementptr inbounds [2 x i8], ptr %6, i64 0, i64 0
  %12 = load ptr, ptr %4, align 8, !tbaa !5
  %13 = call signext i8 @bmi3_get_regs(i8 noundef zeroext 1, ptr noundef %11, i16 noundef zeroext 2, ptr noundef %12)
  store i8 %13, ptr %5, align 1, !tbaa !9
  %14 = load i8, ptr %5, align 1, !tbaa !9
  %15 = sext i8 %14 to i32
  %16 = icmp eq i32 %15, 0
  br i1 %16, label %17, label %72

17:                                               ; preds = %10
  %18 = getelementptr inbounds [2 x i8], ptr %6, i64 0, i64 0
  %19 = load i8, ptr %18, align 1, !tbaa !9
  %20 = zext i8 %19 to i16
  store i16 %20, ptr %7, align 2, !tbaa !10
  %21 = load i16, ptr %7, align 2, !tbaa !10
  %22 = zext i16 %21 to i32
  %23 = and i32 %22, 1
  %24 = trunc i32 %23 to i8
  %25 = load ptr, ptr %3, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.bmi3_err_reg, ptr %25, i32 0, i32 0
  store i8 %24, ptr %26, align 1, !tbaa !12
  %27 = load i16, ptr %7, align 2, !tbaa !10
  %28 = zext i16 %27 to i32
  %29 = and i32 %28, 4
  %30 = ashr i32 %29, 2
  %31 = trunc i32 %30 to i8
  %32 = load ptr, ptr %3, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.bmi3_err_reg, ptr %32, i32 0, i32 1
  store i8 %31, ptr %33, align 1, !tbaa !14
  %34 = load i16, ptr %7, align 2, !tbaa !10
  %35 = zext i16 %34 to i32
  %36 = and i32 %35, 16
  %37 = ashr i32 %36, 4
  %38 = trunc i32 %37 to i8
  %39 = load ptr, ptr %3, align 8, !tbaa !5
  %40 = getelementptr inbounds %struct.bmi3_err_reg, ptr %39, i32 0, i32 2
  store i8 %38, ptr %40, align 1, !tbaa !15
  %41 = load i16, ptr %7, align 2, !tbaa !10
  %42 = zext i16 %41 to i32
  %43 = and i32 %42, 32
  %44 = ashr i32 %43, 5
  %45 = trunc i32 %44 to i8
  %46 = load ptr, ptr %3, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.bmi3_err_reg, ptr %46, i32 0, i32 3
  store i8 %45, ptr %47, align 1, !tbaa !16
  %48 = load i16, ptr %7, align 2, !tbaa !10
  %49 = zext i16 %48 to i32
  %50 = and i32 %49, 64
  %51 = ashr i32 %50, 6
  %52 = trunc i32 %51 to i8
  %53 = load ptr, ptr %3, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.bmi3_err_reg, ptr %53, i32 0, i32 4
  store i8 %52, ptr %54, align 1, !tbaa !17
  %55 = getelementptr inbounds [2 x i8], ptr %6, i64 0, i64 1
  %56 = load i8, ptr %55, align 1, !tbaa !9
  %57 = zext i8 %56 to i16
  store i16 %57, ptr %7, align 2, !tbaa !10
  %58 = load i16, ptr %7, align 2, !tbaa !10
  %59 = zext i16 %58 to i32
  %60 = and i32 %59, 256
  %61 = ashr i32 %60, 8
  %62 = trunc i32 %61 to i8
  %63 = load ptr, ptr %3, align 8, !tbaa !5
  %64 = getelementptr inbounds %struct.bmi3_err_reg, ptr %63, i32 0, i32 5
  store i8 %62, ptr %64, align 1, !tbaa !18
  %65 = load i16, ptr %7, align 2, !tbaa !10
  %66 = zext i16 %65 to i32
  %67 = and i32 %66, 2048
  %68 = ashr i32 %67, 11
  %69 = trunc i32 %68 to i8
  %70 = load ptr, ptr %3, align 8, !tbaa !5
  %71 = getelementptr inbounds %struct.bmi3_err_reg, ptr %70, i32 0, i32 6
  store i8 %69, ptr %71, align 1, !tbaa !19
  br label %72

72:                                               ; preds = %17, %10
  br label %74

73:                                               ; preds = %2
  store i8 -1, ptr %5, align 1, !tbaa !9
  br label %74

74:                                               ; preds = %73, %72
  %75 = load i8, ptr %5, align 1, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 2, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #3
  ret i8 %75
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"short", !7, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"bmi3_err_reg", !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 3, !7, i64 4, !7, i64 5, !7, i64 6}
!14 = !{!13, !7, i64 1}
!15 = !{!13, !7, i64 2}
!16 = !{!13, !7, i64 3}
!17 = !{!13, !7, i64 4}
!18 = !{!13, !7, i64 5}
!19 = !{!13, !7, i64 6}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_get_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local signext i8 @bmi3_get_error_status(ptr noundef writeonly %0, ptr noundef %1) local_unnamed_addr #1 {
  %3 = alloca [2 x i8], align 2
  call void @llvm.lifetime.start.p0(i64 2, ptr nonnull %3) #2
  store i16 0, ptr %3, align 2
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %24, label %4

4:                                                ; preds = %2
  %5 = call signext i8 @bmi3_get_regs(i8 noundef zeroext 1, ptr noundef nonnull %3, i16 noundef zeroext 2, ptr noundef %1)
  %6 = icmp eq i8 %5, 0
  br i1 %6, label %7, label %24

7:                                                ; preds = %4
  %8 = load i8, ptr %3, align 2, !tbaa !5
  %9 = and i8 %8, 1
  store i8 %9, ptr %0, align 1, !tbaa !8
  %10 = lshr i8 %8, 2
  %11 = and i8 %10, 1
  %12 = getelementptr inbounds i8, ptr %0, i64 1
  store i8 %11, ptr %12, align 1, !tbaa !10
  %13 = lshr i8 %8, 4
  %14 = and i8 %13, 1
  %15 = getelementptr inbounds i8, ptr %0, i64 2
  store i8 %14, ptr %15, align 1, !tbaa !11
  %16 = lshr i8 %8, 5
  %17 = and i8 %16, 1
  %18 = getelementptr inbounds i8, ptr %0, i64 3
  store i8 %17, ptr %18, align 1, !tbaa !12
  %19 = lshr i8 %8, 6
  %20 = and i8 %19, 1
  %21 = getelementptr inbounds i8, ptr %0, i64 4
  store i8 %20, ptr %21, align 1, !tbaa !13
  %22 = getelementptr inbounds i8, ptr %0, i64 5
  store i8 0, ptr %22, align 1, !tbaa !14
  %23 = getelementptr inbounds i8, ptr %0, i64 6
  store i8 0, ptr %23, align 1, !tbaa !15
  br label %24

24:                                               ; preds = %2, %4, %7
  %.0 = phi i8 [ 0, %7 ], [ %5, %4 ], [ -1, %2 ]
  call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %3) #2
  ret i8 %.0
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !6, i64 0}
!9 = !{!"bmi3_err_reg", !6, i64 0, !6, i64 1, !6, i64 2, !6, i64 3, !6, i64 4, !6, i64 5, !6, i64 6}
!10 = !{!9, !6, i64 1}
!11 = !{!9, !6, i64 2}
!12 = !{!9, !6, i64 3}
!13 = !{!9, !6, i64 4}
!14 = !{!9, !6, i64 5}
!15 = !{!9, !6, i64 6}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass