; LLVM IR from openluopworld/aes_128 :: lut (gen_dec_key_table)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@I9 = external hidden global [256 x i8], align 16
@Ib = external hidden global [256 x i8], align 16
@Id = external hidden global [256 x i8], align 16
@Ie = external hidden global [256 x i8], align 16
@IK0 = external hidden global [256 x i32], align 16
@IK1 = external hidden global [256 x i32], align 16
@IK2 = external hidden global [256 x i32], align 16
@IK3 = external hidden global [256 x i32], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @generate_tables() #1 {
  %1 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #2
  store i32 0, ptr %1, align 4, !tbaa !5
  br label %2

2:                                                ; preds = %122, %0
  %3 = load i32, ptr %1, align 4, !tbaa !5
  %4 = icmp slt i32 %3, 256
  br i1 %4, label %5, label %125

5:                                                ; preds = %2
  %6 = load i32, ptr %1, align 4, !tbaa !5
  %7 = sext i32 %6 to i64
  %8 = getelementptr inbounds [256 x i8], ptr @Ib, i64 0, i64 %7
  %9 = load i8, ptr %8, align 1, !tbaa !9
  %10 = zext i8 %9 to i32
  %11 = shl i32 %10, 24
  %12 = load i32, ptr %1, align 4, !tbaa !5
  %13 = sext i32 %12 to i64
  %14 = getelementptr inbounds [256 x i8], ptr @Id, i64 0, i64 %13
  %15 = load i8, ptr %14, align 1, !tbaa !9
  %16 = zext i8 %15 to i32
  %17 = shl i32 %16, 16
  %18 = xor i32 %11, %17
  %19 = load i32, ptr %1, align 4, !tbaa !5
  %20 = sext i32 %19 to i64
  %21 = getelementptr inbounds [256 x i8], ptr @I9, i64 0, i64 %20
  %22 = load i8, ptr %21, align 1, !tbaa !9
  %23 = zext i8 %22 to i32
  %24 = shl i32 %23, 8
  %25 = xor i32 %18, %24
  %26 = load i32, ptr %1, align 4, !tbaa !5
  %27 = sext i32 %26 to i64
  %28 = getelementptr inbounds [256 x i8], ptr @Ie, i64 0, i64 %27
  %29 = load i8, ptr %28, align 1, !tbaa !9
  %30 = zext i8 %29 to i32
  %31 = xor i32 %25, %30
  %32 = load i32, ptr %1, align 4, !tbaa !5
  %33 = sext i32 %32 to i64
  %34 = getelementptr inbounds [256 x i32], ptr @IK0, i64 0, i64 %33
  store i32 %31, ptr %34, align 4, !tbaa !5
  %35 = load i32, ptr %1, align 4, !tbaa !5
  %36 = sext i32 %35 to i64
  %37 = getelementptr inbounds [256 x i8], ptr @Id, i64 0, i64 %36
  %38 = load i8, ptr %37, align 1, !tbaa !9
  %39 = zext i8 %38 to i32
  %40 = shl i32 %39, 24
  %41 = load i32, ptr %1, align 4, !tbaa !5
  %42 = sext i32 %41 to i64
  %43 = getelementptr inbounds [256 x i8], ptr @I9, i64 0, i64 %42
  %44 = load i8, ptr %43, align 1, !tbaa !9
  %45 = zext i8 %44 to i32
  %46 = shl i32 %45, 16
  %47 = xor i32 %40, %46
  %48 = load i32, ptr %1, align 4, !tbaa !5
  %49 = sext i32 %48 to i64
  %50 = getelementptr inbounds [256 x i8], ptr @Ie, i64 0, i64 %49
  %51 = load i8, ptr %50, align 1, !tbaa !9
  %52 = zext i8 %51 to i32
  %53 = shl i32 %52, 8
  %54 = xor i32 %47, %53
  %55 = load i32, ptr %1, align 4, !tbaa !5
  %56 = sext i32 %55 to i64
  %57 = getelementptr inbounds [256 x i8], ptr @Ib, i64 0, i64 %56
  %58 = load i8, ptr %57, align 1, !tbaa !9
  %59 = zext i8 %58 to i32
  %60 = xor i32 %54, %59
  %61 = load i32, ptr %1, align 4, !tbaa !5
  %62 = sext i32 %61 to i64
  %63 = getelementptr inbounds [256 x i32], ptr @IK1, i64 0, i64 %62
  store i32 %60, ptr %63, align 4, !tbaa !5
  %64 = load i32, ptr %1, align 4, !tbaa !5
  %65 = sext i32 %64 to i64
  %66 = getelementptr inbounds [256 x i8], ptr @I9, i64 0, i64 %65
  %67 = load i8, ptr %66, align 1, !tbaa !9
  %68 = zext i8 %67 to i32
  %69 = shl i32 %68, 24
  %70 = load i32, ptr %1, align 4, !tbaa !5
  %71 = sext i32 %70 to i64
  %72 = getelementptr inbounds [256 x i8], ptr @Ie, i64 0, i64 %71
  %73 = load i8, ptr %72, align 1, !tbaa !9
  %74 = zext i8 %73 to i32
  %75 = shl i32 %74, 16
  %76 = xor i32 %69, %75
  %77 = load i32, ptr %1, align 4, !tbaa !5
  %78 = sext i32 %77 to i64
  %79 = getelementptr inbounds [256 x i8], ptr @Ib, i64 0, i64 %78
  %80 = load i8, ptr %79, align 1, !tbaa !9
  %81 = zext i8 %80 to i32
  %82 = shl i32 %81, 8
  %83 = xor i32 %76, %82
  %84 = load i32, ptr %1, align 4, !tbaa !5
  %85 = sext i32 %84 to i64
  %86 = getelementptr inbounds [256 x i8], ptr @Id, i64 0, i64 %85
  %87 = load i8, ptr %86, align 1, !tbaa !9
  %88 = zext i8 %87 to i32
  %89 = xor i32 %83, %88
  %90 = load i32, ptr %1, align 4, !tbaa !5
  %91 = sext i32 %90 to i64
  %92 = getelementptr inbounds [256 x i32], ptr @IK2, i64 0, i64 %91
  store i32 %89, ptr %92, align 4, !tbaa !5
  %93 = load i32, ptr %1, align 4, !tbaa !5
  %94 = sext i32 %93 to i64
  %95 = getelementptr inbounds [256 x i8], ptr @Ie, i64 0, i64 %94
  %96 = load i8, ptr %95, align 1, !tbaa !9
  %97 = zext i8 %96 to i32
  %98 = shl i32 %97, 24
  %99 = load i32, ptr %1, align 4, !tbaa !5
  %100 = sext i32 %99 to i64
  %101 = getelementptr inbounds [256 x i8], ptr @Ib, i64 0, i64 %100
  %102 = load i8, ptr %101, align 1, !tbaa !9
  %103 = zext i8 %102 to i32
  %104 = shl i32 %103, 16
  %105 = xor i32 %98, %104
  %106 = load i32, ptr %1, align 4, !tbaa !5
  %107 = sext i32 %106 to i64
  %108 = getelementptr inbounds [256 x i8], ptr @Id, i64 0, i64 %107
  %109 = load i8, ptr %108, align 1, !tbaa !9
  %110 = zext i8 %109 to i32
  %111 = shl i32 %110, 8
  %112 = xor i32 %105, %111
  %113 = load i32, ptr %1, align 4, !tbaa !5
  %114 = sext i32 %113 to i64
  %115 = getelementptr inbounds [256 x i8], ptr @I9, i64 0, i64 %114
  %116 = load i8, ptr %115, align 1, !tbaa !9
  %117 = zext i8 %116 to i32
  %118 = xor i32 %112, %117
  %119 = load i32, ptr %1, align 4, !tbaa !5
  %120 = sext i32 %119 to i64
  %121 = getelementptr inbounds [256 x i32], ptr @IK3, i64 0, i64 %120
  store i32 %118, ptr %121, align 4, !tbaa !5
  br label %122

122:                                              ; preds = %5
  %123 = load i32, ptr %1, align 4, !tbaa !5
  %124 = add nsw i32 %123, 1
  store i32 %124, ptr %1, align 4, !tbaa !5
  br label %2, !llvm.loop !10

125:                                              ; preds = %2
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #2
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@I9 = external hidden local_unnamed_addr global [256 x i8], align 16
@Ib = external hidden local_unnamed_addr global [256 x i8], align 16
@Id = external hidden local_unnamed_addr global [256 x i8], align 16
@Ie = external hidden local_unnamed_addr global [256 x i8], align 16
@IK0 = external hidden local_unnamed_addr global [256 x i32], align 16
@IK1 = external hidden local_unnamed_addr global [256 x i32], align 16
@IK2 = external hidden local_unnamed_addr global [256 x i32], align 16
@IK3 = external hidden local_unnamed_addr global [256 x i32], align 16

; Function Attrs: nofree norecurse nosync nounwind memory(readwrite, argmem: none, inaccessiblemem: none) uwtable
define dso_local void @generate_tables() local_unnamed_addr #0 {
vector.ph:
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %0 = getelementptr inbounds [256 x i8], ptr @Ib, i64 0, i64 %index
  %wide.load = load <4 x i8>, ptr %0, align 4, !tbaa !5
  %1 = zext <4 x i8> %wide.load to <4 x i32>
  %2 = shl nuw <4 x i32> %1, <i32 24, i32 24, i32 24, i32 24>
  %3 = getelementptr inbounds [256 x i8], ptr @Id, i64 0, i64 %index
  %wide.load24 = load <4 x i8>, ptr %3, align 4, !tbaa !5
  %4 = zext <4 x i8> %wide.load24 to <4 x i32>
  %5 = shl nuw nsw <4 x i32> %4, <i32 16, i32 16, i32 16, i32 16>
  %6 = or disjoint <4 x i32> %5, %2
  %7 = getelementptr inbounds [256 x i8], ptr @I9, i64 0, i64 %index
  %wide.load25 = load <4 x i8>, ptr %7, align 4, !tbaa !5
  %8 = zext <4 x i8> %wide.load25 to <4 x i32>
  %9 = shl nuw nsw <4 x i32> %8, <i32 8, i32 8, i32 8, i32 8>
  %10 = or disjoint <4 x i32> %6, %9
  %11 = getelementptr inbounds [256 x i8], ptr @Ie, i64 0, i64 %index
  %wide.load26 = load <4 x i8>, ptr %11, align 4, !tbaa !5
  %12 = zext <4 x i8> %wide.load26 to <4 x i32>
  %13 = or disjoint <4 x i32> %10, %12
  %14 = getelementptr inbounds [256 x i32], ptr @IK0, i64 0, i64 %index
  store <4 x i32> %13, ptr %14, align 16, !tbaa !8
  %15 = shl nuw <4 x i32> %4, <i32 24, i32 24, i32 24, i32 24>
  %16 = shl nuw nsw <4 x i32> %8, <i32 16, i32 16, i32 16, i32 16>
  %17 = shl nuw nsw <4 x i32> %12, <i32 8, i32 8, i32 8, i32 8>
  %18 = or disjoint <4 x i32> %15, %16
  %19 = or disjoint <4 x i32> %18, %17
  %20 = or disjoint <4 x i32> %19, %1
  %21 = getelementptr inbounds [256 x i32], ptr @IK1, i64 0, i64 %index
  store <4 x i32> %20, ptr %21, align 16, !tbaa !8
  %22 = shl nuw <4 x i32> %8, <i32 24, i32 24, i32 24, i32 24>
  %23 = shl nuw nsw <4 x i32> %12, <i32 16, i32 16, i32 16, i32 16>
  %24 = shl nuw nsw <4 x i32> %1, <i32 8, i32 8, i32 8, i32 8>
  %25 = or disjoint <4 x i32> %24, %22
  %26 = or disjoint <4 x i32> %25, %23
  %27 = or disjoint <4 x i32> %26, %4
  %28 = getelementptr inbounds [256 x i32], ptr @IK2, i64 0, i64 %index
  store <4 x i32> %27, ptr %28, align 16, !tbaa !8
  %29 = shl nuw <4 x i32> %12, <i32 24, i32 24, i32 24, i32 24>
  %30 = shl nuw nsw <4 x i32> %1, <i32 16, i32 16, i32 16, i32 16>
  %31 = shl nuw nsw <4 x i32> %4, <i32 8, i32 8, i32 8, i32 8>
  %32 = or disjoint <4 x i32> %31, %30
  %33 = or disjoint <4 x i32> %32, %29
  %34 = or disjoint <4 x i32> %33, %8
  %35 = getelementptr inbounds [256 x i32], ptr @IK3, i64 0, i64 %index
  store <4 x i32> %34, ptr %35, align 16, !tbaa !8
  %index.next = add nuw i64 %index, 4
  %36 = icmp eq i64 %index.next, 256
  br i1 %36, label %middle.block, label %vector.body, !llvm.loop !10

middle.block:                                     ; preds = %vector.body
  ret void
}

attributes #0 = { nofree norecurse nosync nounwind memory(readwrite, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !6, i64 0}
!10 = distinct !{!10, !11, !12, !13}
!11 = !{!"llvm.loop.mustprogress"}
!12 = !{!"llvm.loop.isvectorized", i32 1}
!13 = !{!"llvm.loop.unroll.runtime.disable"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,LoopLoadEliminationPass,LoopRotatePass,LoopVectorizePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass