; LLVM IR from VastoLorde95/Competitive-Programming :: Codeforces/286 Division 1/Problem B/B.ll (Z28strongy_connected_componentsv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@order = external dso_local global %"class.std::vector", align 8
@visited = external dso_local global [100001 x i32], align 16
@n = external dso_local global i32, align 4
@no_of_comp = external dso_local global i32, align 4

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z3dfsi(i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z7rev_dfsii(i32 noundef, i32 noundef) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z28strongy_connected_componentsv() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #3
  store i32 1, ptr %1, align 4, !tbaa !5
  br label %4

4:                                                ; preds = %18, %0
  %5 = load i32, ptr %1, align 4, !tbaa !5
  %6 = load i32, ptr @n, align 4, !tbaa !5
  %7 = icmp sle i32 %5, %6
  br i1 %7, label %9, label %8

8:                                                ; preds = %4
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #3
  br label %21

9:                                                ; preds = %4
  %10 = load i32, ptr %1, align 4, !tbaa !5
  %11 = sext i32 %10 to i64
  %12 = getelementptr inbounds [100001 x i32], ptr @visited, i64 0, i64 %11
  %13 = load i32, ptr %12, align 4, !tbaa !5
  %14 = icmp ne i32 %13, 1
  br i1 %14, label %15, label %17

15:                                               ; preds = %9
  %16 = load i32, ptr %1, align 4, !tbaa !5
  call void @_Z3dfsi(i32 noundef %16)
  br label %17

17:                                               ; preds = %15, %9
  br label %18

18:                                               ; preds = %17
  %19 = load i32, ptr %1, align 4, !tbaa !5
  %20 = add nsw i32 %19, 1
  store i32 %20, ptr %1, align 4, !tbaa !5
  br label %4, !llvm.loop !9

21:                                               ; preds = %8
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #3
  store i32 1, ptr %2, align 4, !tbaa !5
  br label %22

22:                                               ; preds = %31, %21
  %23 = load i32, ptr %2, align 4, !tbaa !5
  %24 = load i32, ptr @n, align 4, !tbaa !5
  %25 = icmp sle i32 %23, %24
  br i1 %25, label %27, label %26

26:                                               ; preds = %22
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #3
  br label %34

27:                                               ; preds = %22
  %28 = load i32, ptr %2, align 4, !tbaa !5
  %29 = sext i32 %28 to i64
  %30 = getelementptr inbounds [100001 x i32], ptr @visited, i64 0, i64 %29
  store i32 0, ptr %30, align 4, !tbaa !5
  br label %31

31:                                               ; preds = %27
  %32 = load i32, ptr %2, align 4, !tbaa !5
  %33 = add nsw i32 %32, 1
  store i32 %33, ptr %2, align 4, !tbaa !5
  br label %22, !llvm.loop !11

34:                                               ; preds = %26
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  %35 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @order) #3
  %36 = sub i64 %35, 1
  %37 = trunc i64 %36 to i32
  store i32 %37, ptr %3, align 4, !tbaa !5
  br label %38

38:                                               ; preds = %59, %34
  %39 = load i32, ptr %3, align 4, !tbaa !5
  %40 = icmp sge i32 %39, 0
  br i1 %40, label %42, label %41

41:                                               ; preds = %38
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  br label %62

42:                                               ; preds = %38
  %43 = load i32, ptr %3, align 4, !tbaa !5
  %44 = sext i32 %43 to i64
  %45 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @order, i64 noundef %44) #3
  %46 = load i32, ptr %45, align 4, !tbaa !5
  %47 = sext i32 %46 to i64
  %48 = getelementptr inbounds [100001 x i32], ptr @visited, i64 0, i64 %47
  %49 = load i32, ptr %48, align 4, !tbaa !5
  %50 = icmp ne i32 %49, 1
  br i1 %50, label %51, label %58

51:                                               ; preds = %42
  %52 = load i32, ptr %3, align 4, !tbaa !5
  %53 = sext i32 %52 to i64
  %54 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @order, i64 noundef %53) #3
  %55 = load i32, ptr %54, align 4, !tbaa !5
  %56 = load i32, ptr @no_of_comp, align 4, !tbaa !5
  %57 = add nsw i32 %56, 1
  store i32 %57, ptr @no_of_comp, align 4, !tbaa !5
  call void @_Z7rev_dfsii(i32 noundef %55, i32 noundef %56)
  br label %58

58:                                               ; preds = %51, %42
  br label %59

59:                                               ; preds = %58
  %60 = load i32, ptr %3, align 4, !tbaa !5
  %61 = add nsw i32 %60, -1
  store i32 %61, ptr %3, align 4, !tbaa !5
  br label %38, !llvm.loop !12

62:                                               ; preds = %41
  ret void
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@order = external dso_local global %"class.std::vector", align 8
@visited = external dso_local local_unnamed_addr global [100001 x i32], align 16
@n = external dso_local local_unnamed_addr global i32, align 4
@no_of_comp = external dso_local local_unnamed_addr global i32, align 4

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z3dfsi(i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z7rev_dfsii(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z28strongy_connected_componentsv() local_unnamed_addr #0 {
  %1 = load i32, ptr @n, align 4, !tbaa !5
  %.not16 = icmp slt i32 %1, 1
  br i1 %.not16, label %._crit_edge, label %.lr.ph

.preheader:                                       ; preds = %9
  %.not1318 = icmp slt i32 %10, 1
  br i1 %.not1318, label %._crit_edge, label %.lr.ph20.preheader

.lr.ph20.preheader:                               ; preds = %.preheader
  %2 = zext nneg i32 %10 to i64
  %3 = shl nuw nsw i64 %2, 2
  tail call void @llvm.memset.p0.i64(ptr nonnull align 4 getelementptr inbounds (i8, ptr @visited, i64 4), i8 0, i64 %3, i1 false), !tbaa !5
  br label %._crit_edge

.lr.ph:                                           ; preds = %0, %9
  %4 = phi i32 [ %10, %9 ], [ %1, %0 ]
  %indvars.iv = phi i64 [ %indvars.iv.next, %9 ], [ 1, %0 ]
  %5 = getelementptr inbounds [100001 x i32], ptr @visited, i64 0, i64 %indvars.iv
  %6 = load i32, ptr %5, align 4, !tbaa !5
  %.not15 = icmp eq i32 %6, 1
  br i1 %.not15, label %9, label %7

7:                                                ; preds = %.lr.ph
  %8 = trunc nuw nsw i64 %indvars.iv to i32
  tail call void @_Z3dfsi(i32 noundef %8)
  %.pre = load i32, ptr @n, align 4, !tbaa !5
  br label %9

9:                                                ; preds = %.lr.ph, %7
  %10 = phi i32 [ %4, %.lr.ph ], [ %.pre, %7 ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %11 = sext i32 %10 to i64
  %.not.not = icmp slt i64 %indvars.iv, %11
  br i1 %.not.not, label %.lr.ph, label %.preheader, !llvm.loop !9

._crit_edge:                                      ; preds = %0, %.lr.ph20.preheader, %.preheader
  %12 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @order) #3
  %13 = trunc i64 %12 to i32
  %.021 = add i32 %13, -1
  %14 = icmp sgt i32 %.021, -1
  br i1 %14, label %.lr.ph24.preheader, label %._crit_edge25

.lr.ph24.preheader:                               ; preds = %._crit_edge
  %15 = zext nneg i32 %.021 to i64
  br label %.lr.ph24

._crit_edge25:                                    ; preds = %26, %._crit_edge
  ret void

.lr.ph24:                                         ; preds = %.lr.ph24.preheader, %26
  %indvars.iv31 = phi i64 [ %15, %.lr.ph24.preheader ], [ %indvars.iv.next32, %26 ]
  %16 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @order, i64 noundef %indvars.iv31) #3
  %17 = load i32, ptr %16, align 4, !tbaa !5
  %18 = sext i32 %17 to i64
  %19 = getelementptr inbounds [100001 x i32], ptr @visited, i64 0, i64 %18
  %20 = load i32, ptr %19, align 4, !tbaa !5
  %.not14 = icmp eq i32 %20, 1
  br i1 %.not14, label %26, label %21

21:                                               ; preds = %.lr.ph24
  %22 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @order, i64 noundef %indvars.iv31) #3
  %23 = load i32, ptr %22, align 4, !tbaa !5
  %24 = load i32, ptr @no_of_comp, align 4, !tbaa !5
  %25 = add nsw i32 %24, 1
  store i32 %25, ptr @no_of_comp, align 4, !tbaa !5
  tail call void @_Z7rev_dfsii(i32 noundef %23, i32 noundef %24)
  br label %26

26:                                               ; preds = %.lr.ph24, %21
  %indvars.iv.next32 = add nsw i64 %indvars.iv31, -1
  %27 = icmp sgt i64 %indvars.iv31, 0
  br i1 %27, label %.lr.ph24, label %._crit_edge25, !llvm.loop !11
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopIdiomRecognizePass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass