; LLVM IR from IOsonata/IOsonata :: src/bluetooth (bt_attreq)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__Bt_Hci_ACL_Data_Packet = type <{ %struct.__Bt_Hci_ACL_Data_Packet_Header, [1 x i8] }>
%struct.__Bt_Hci_ACL_Data_Packet_Header = type { i32 }
%struct.__Bt_L2Cap_Pdu = type <{ %struct.__Bt_L2Cap_Header, %union.anon }>
%struct.__Bt_L2Cap_Header = type { i16, i16 }
%union.anon = type <{ i32, [17 x i8] }>
%struct.__Bt_Attribute_Req_Rsp = type <{ i8, %union.anon.5 }>
%union.anon.5 = type { %struct.__Bt_Att_Read_By_Type_Req }
%struct.__Bt_Att_Read_By_Type_Req = type { i16, i16, %union.__Bt_Uuid_Val }
%union.__Bt_Uuid_Val = type { i32, [12 x i8] }
%struct.__Bt_Att_Read_Multiple_Req = type { [1 x i16] }
%struct.__Bt_Hci_Device = type { ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: mustprogress uwtable
define dso_local zeroext i1 @BtAttReadMultipleRequest(ptr noundef %0, i16 noundef zeroext %1, ptr noundef %2, i64 noundef %3) #2 {
  %5 = alloca ptr, align 8
  %6 = alloca i16, align 2
  %7 = alloca ptr, align 8
  %8 = alloca i64, align 8
  %9 = alloca [260 x i8], align 16
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i16 %1, ptr %6, align 2, !tbaa !9
  store ptr %2, ptr %7, align 8, !tbaa !5
  store i64 %3, ptr %8, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 260, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  %13 = getelementptr inbounds [260 x i8], ptr %9, i64 0, i64 0
  store ptr %13, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  %14 = load ptr, ptr %10, align 8, !tbaa !5
  %15 = getelementptr inbounds %struct.__Bt_Hci_ACL_Data_Packet, ptr %14, i32 0, i32 1
  %16 = getelementptr inbounds [1 x i8], ptr %15, i64 0, i64 0
  store ptr %16, ptr %11, align 8, !tbaa !5
  %17 = load i16, ptr %6, align 2, !tbaa !9
  %18 = zext i16 %17 to i32
  %19 = load ptr, ptr %10, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.__Bt_Hci_ACL_Data_Packet, ptr %19, i32 0, i32 0
  %21 = load i32, ptr %20, align 1
  %22 = and i32 %18, 4095
  %23 = and i32 %21, -4096
  %24 = or i32 %23, %22
  store i32 %24, ptr %20, align 1
  %25 = load ptr, ptr %10, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.__Bt_Hci_ACL_Data_Packet, ptr %25, i32 0, i32 0
  %27 = load i32, ptr %26, align 1
  %28 = and i32 %27, -12289
  %29 = or i32 %28, 12288
  store i32 %29, ptr %26, align 1
  %30 = load ptr, ptr %10, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.__Bt_Hci_ACL_Data_Packet, ptr %30, i32 0, i32 0
  %32 = load i32, ptr %31, align 1
  %33 = and i32 %32, -49153
  %34 = or i32 %33, 0
  store i32 %34, ptr %31, align 1
  %35 = load ptr, ptr %11, align 8, !tbaa !5
  %36 = getelementptr inbounds %struct.__Bt_L2Cap_Pdu, ptr %35, i32 0, i32 1
  %37 = getelementptr inbounds %struct.__Bt_Attribute_Req_Rsp, ptr %36, i32 0, i32 0
  store i8 14, ptr %37, align 1, !tbaa !13
  %38 = load ptr, ptr %11, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.__Bt_L2Cap_Pdu, ptr %38, i32 0, i32 1
  %40 = getelementptr inbounds %struct.__Bt_Attribute_Req_Rsp, ptr %39, i32 0, i32 1
  %41 = getelementptr inbounds %struct.__Bt_Att_Read_Multiple_Req, ptr %40, i32 0, i32 0
  %42 = getelementptr inbounds [1 x i16], ptr %41, i64 0, i64 0
  %43 = load ptr, ptr %7, align 8, !tbaa !5
  %44 = load i64, ptr %8, align 8, !tbaa !11
  %45 = shl i64 %44, 1
  call void @llvm.memcpy.p0.p0.i64(ptr align 1 %42, ptr align 2 %43, i64 %45, i1 false)
  %46 = load i64, ptr %8, align 8, !tbaa !11
  %47 = mul i64 2, %46
  %48 = add i64 %47, 1
  %49 = trunc i64 %48 to i16
  %50 = load ptr, ptr %11, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.__Bt_L2Cap_Pdu, ptr %50, i32 0, i32 0
  %52 = getelementptr inbounds %struct.__Bt_L2Cap_Header, ptr %51, i32 0, i32 0
  store i16 %49, ptr %52, align 1, !tbaa !14
  %53 = load ptr, ptr %11, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.__Bt_L2Cap_Pdu, ptr %53, i32 0, i32 0
  %55 = getelementptr inbounds %struct.__Bt_L2Cap_Header, ptr %54, i32 0, i32 1
  store i16 4, ptr %55, align 1, !tbaa !17
  %56 = load ptr, ptr %11, align 8, !tbaa !5
  %57 = getelementptr inbounds %struct.__Bt_L2Cap_Pdu, ptr %56, i32 0, i32 0
  %58 = getelementptr inbounds %struct.__Bt_L2Cap_Header, ptr %57, i32 0, i32 0
  %59 = load i16, ptr %58, align 1, !tbaa !14
  %60 = zext i16 %59 to i64
  %61 = add i64 %60, 4
  %62 = trunc i64 %61 to i32
  %63 = load ptr, ptr %10, align 8, !tbaa !5
  %64 = getelementptr inbounds %struct.__Bt_Hci_ACL_Data_Packet, ptr %63, i32 0, i32 0
  %65 = load i32, ptr %64, align 1
  %66 = and i32 %62, 65535
  %67 = shl i32 %66, 16
  %68 = and i32 %65, 65535
  %69 = or i32 %68, %67
  store i32 %69, ptr %64, align 1
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %70 = load ptr, ptr %5, align 8, !tbaa !5
  %71 = getelementptr inbounds %struct.__Bt_Hci_Device, ptr %70, i32 0, i32 3
  %72 = load ptr, ptr %71, align 8, !tbaa !18
  %73 = load ptr, ptr %10, align 8, !tbaa !5
  %74 = load ptr, ptr %10, align 8, !tbaa !5
  %75 = getelementptr inbounds %struct.__Bt_Hci_ACL_Data_Packet, ptr %74, i32 0, i32 0
  %76 = load i32, ptr %75, align 1
  %77 = lshr i32 %76, 16
  %78 = zext i32 %77 to i64
  %79 = add i64 %78, 4
  %80 = trunc i64 %79 to i32
  %81 = call noundef i32 %72(ptr noundef %73, i32 noundef %80)
  store i32 %81, ptr %12, align 4, !tbaa !21
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 260, ptr %9) #3
  ret i1 true
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = !{!15, !10, i64 0}
!15 = !{!"_ZTS14__Bt_L2Cap_Pdu", !16, i64 0, !7, i64 4}
!16 = !{!"_ZTS17__Bt_L2Cap_Header", !10, i64 0, !10, i64 2}
!17 = !{!15, !10, i64 2}
!18 = !{!19, !6, i64 16}
!19 = !{!"_ZTS15__Bt_Hci_Device", !6, i64 0, !20, i64 8, !20, i64 12, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56, !6, i64 64}
!20 = !{!"int", !7, i64 0}
!21 = !{!20, !20, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @BtAttReadMultipleRequest(ptr nocapture noundef readonly %0, i16 noundef zeroext %1, ptr nocapture noundef readonly %2, i64 noundef %3) local_unnamed_addr #2 {
  %5 = alloca [260 x i8], align 16
  call void @llvm.lifetime.start.p0(i64 260, ptr nonnull %5) #3
  %6 = getelementptr inbounds i8, ptr %5, i64 4
  %7 = and i16 %1, 4095
  %8 = or disjoint i16 %7, 12288
  %9 = zext nneg i16 %8 to i32
  %10 = getelementptr inbounds i8, ptr %5, i64 8
  store i8 14, ptr %10, align 8, !tbaa !5
  %11 = getelementptr inbounds i8, ptr %5, i64 9
  %12 = shl i64 %3, 1
  call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 1 %11, ptr align 2 %2, i64 %12, i1 false)
  %.tr = trunc i64 %3 to i16
  %13 = shl i16 %.tr, 1
  %14 = or disjoint i16 %13, 1
  store i16 %14, ptr %6, align 4, !tbaa !8
  %15 = getelementptr inbounds i8, ptr %5, i64 6
  store i16 4, ptr %15, align 2, !tbaa !12
  %16 = add i16 %13, 5
  %17 = zext i16 %16 to i32
  %18 = shl nuw i32 %17, 16
  %19 = or disjoint i32 %18, %9
  store i32 %19, ptr %5, align 16
  %20 = getelementptr inbounds i8, ptr %0, i64 16
  %21 = load ptr, ptr %20, align 8, !tbaa !13
  %22 = add nuw nsw i32 %17, 4
  %23 = call noundef i32 %21(ptr noundef nonnull %5, i32 noundef %22)
  call void @llvm.lifetime.end.p0(i64 260, ptr nonnull %5) #3
  ret i1 true
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !11, i64 0}
!9 = !{!"_ZTS14__Bt_L2Cap_Pdu", !10, i64 0, !6, i64 4}
!10 = !{!"_ZTS17__Bt_L2Cap_Header", !11, i64 0, !11, i64 2}
!11 = !{!"short", !6, i64 0}
!12 = !{!9, !11, i64 2}
!13 = !{!14, !15, i64 16}
!14 = !{!"_ZTS15__Bt_Hci_Device", !15, i64 0, !16, i64 8, !16, i64 12, !15, i64 16, !15, i64 24, !15, i64 32, !15, i64 40, !15, i64 48, !15, i64 56, !15, i64 64}
!15 = !{!"any pointer", !6, i64 0}
!16 = !{!"int", !6, i64 0}


; Effective O3 passes: DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass