; LLVM IR from VastoLorde95/Competitive-Programming :: Codeforces/190 Division 1/Problem B/B3.ll (Z3allv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.std::pair" = type { i32, i32 }

@n = external dso_local global i32, align 4
@m = external dso_local global i32, align 4
@aa = external dso_local global i32, align 4
@dd = external dso_local global i32, align 4
@a = external dso_local global %"class.std::vector", align 8
@d = external dso_local global %"class.std::vector", align 8
@c = external dso_local global %"class.std::vector", align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN14minCostMaxFlowC2Ei(ptr noundef nonnull align 8 dereferenceable(9032), i32 noundef) unnamed_addr #2 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN14minCostMaxFlow7addEdgeEiiii(ptr noundef nonnull align 8 dereferenceable(9032), i32 noundef, i32 noundef, i32 noundef, i32 noundef) #4 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local i64 @_ZN14minCostMaxFlow4mcmfEiib(ptr noundef nonnull align 8 dereferenceable(9032), i32 noundef, i32 noundef, i1 noundef zeroext) #4 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z3allv() #4 personality ptr @__gxx_personality_v0 {
  %1 = alloca i32, align 4
  %2 = alloca ptr, align 8
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca %"struct.std::pair", align 4
  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #5
  %19 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 9032) #6
  %20 = load i32, ptr @m, align 4, !tbaa !5
  %21 = load i32, ptr @m, align 4, !tbaa !5
  %22 = add nsw i32 %20, %21
  %23 = add nsw i32 %22, 2
  invoke void @_ZN14minCostMaxFlowC2Ei(ptr noundef nonnull align 8 dereferenceable(9032) %19, i32 noundef %23)
          to label %24 unwind label %35

24:                                               ; preds = %0
  store ptr %19, ptr %2, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #5
  %25 = load i32, ptr @m, align 4, !tbaa !5
  %26 = load i32, ptr @m, align 4, !tbaa !5
  %27 = add nsw i32 %25, %26
  store i32 %27, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #5
  %28 = load i32, ptr %5, align 4, !tbaa !5
  %29 = add nsw i32 %28, 1
  store i32 %29, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  store i32 0, ptr %7, align 4, !tbaa !5
  br label %30

30:                                               ; preds = %45, %24
  %31 = load i32, ptr %7, align 4, !tbaa !5
  %32 = load i32, ptr @m, align 4, !tbaa !5
  %33 = icmp slt i32 %31, %32
  br i1 %33, label %39, label %34

34:                                               ; preds = %30
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  br label %48

35:                                               ; preds = %0
  %36 = landingpad { ptr, i32 }
          cleanup
  %37 = extractvalue { ptr, i32 } %36, 0
  store ptr %37, ptr %3, align 8
  %38 = extractvalue { ptr, i32 } %36, 1
  store i32 %38, ptr %4, align 4
  call void @_ZdlPvm(ptr noundef %19, i64 noundef 9032) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #5
  br label %229

39:                                               ; preds = %30
  %40 = load ptr, ptr %2, align 8, !tbaa !9
  %41 = load i32, ptr @n, align 4, !tbaa !5
  %42 = load i32, ptr %7, align 4, !tbaa !5
  %43 = add nsw i32 %41, %42
  %44 = load i32, ptr %6, align 4, !tbaa !5
  call void @_ZN14minCostMaxFlow7addEdgeEiiii(ptr noundef nonnull align 8 dereferenceable(9032) %40, i32 noundef %43, i32 noundef %44, i32 noundef 1, i32 noundef 0)
  br label %45

45:                                               ; preds = %39
  %46 = load i32, ptr %7, align 4, !tbaa !5
  %47 = add nsw i32 %46, 1
  store i32 %47, ptr %7, align 4, !tbaa !5
  br label %30, !llvm.loop !11

48:                                               ; preds = %34
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #5
  store i32 0, ptr %8, align 4, !tbaa !5
  br label %49

49:                                               ; preds = %58, %48
  %50 = load i32, ptr %8, align 4, !tbaa !5
  %51 = load i32, ptr @aa, align 4, !tbaa !5
  %52 = icmp slt i32 %50, %51
  br i1 %52, label %54, label %53

53:                                               ; preds = %49
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #5
  br label %61

54:                                               ; preds = %49
  %55 = load ptr, ptr %2, align 8, !tbaa !9
  %56 = load i32, ptr %5, align 4, !tbaa !5
  %57 = load i32, ptr %8, align 4, !tbaa !5
  call void @_ZN14minCostMaxFlow7addEdgeEiiii(ptr noundef nonnull align 8 dereferenceable(9032) %55, i32 noundef %56, i32 noundef %57, i32 noundef 1, i32 noundef 0)
  br label %58

58:                                               ; preds = %54
  %59 = load i32, ptr %8, align 4, !tbaa !5
  %60 = add nsw i32 %59, 1
  store i32 %60, ptr %8, align 4, !tbaa !5
  br label %49, !llvm.loop !13

61:                                               ; preds = %53
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #5
  store i32 0, ptr %9, align 4, !tbaa !5
  br label %62

62:                                               ; preds = %73, %61
  %63 = load i32, ptr %9, align 4, !tbaa !5
  %64 = load i32, ptr @dd, align 4, !tbaa !5
  %65 = icmp slt i32 %63, %64
  br i1 %65, label %67, label %66

66:                                               ; preds = %62
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #5
  br label %76

67:                                               ; preds = %62
  %68 = load ptr, ptr %2, align 8, !tbaa !9
  %69 = load i32, ptr %5, align 4, !tbaa !5
  %70 = load i32, ptr @aa, align 4, !tbaa !5
  %71 = load i32, ptr %9, align 4, !tbaa !5
  %72 = add nsw i32 %70, %71
  call void @_ZN14minCostMaxFlow7addEdgeEiiii(ptr noundef nonnull align 8 dereferenceable(9032) %68, i32 noundef %69, i32 noundef %72, i32 noundef 1, i32 noundef 0)
  br label %73

73:                                               ; preds = %67
  %74 = load i32, ptr %9, align 4, !tbaa !5
  %75 = add nsw i32 %74, 1
  store i32 %75, ptr %9, align 4, !tbaa !5
  br label %62, !llvm.loop !14

76:                                               ; preds = %66
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #5
  %77 = load i32, ptr @m, align 4, !tbaa !5
  %78 = load i32, ptr @n, align 4, !tbaa !5
  %79 = add nsw i32 %77, %78
  store i32 %79, ptr %10, align 4, !tbaa !5
  br label %80

80:                                               ; preds = %91, %76
  %81 = load i32, ptr %10, align 4, !tbaa !5
  %82 = load i32, ptr @m, align 4, !tbaa !5
  %83 = load i32, ptr @m, align 4, !tbaa !5
  %84 = add nsw i32 %82, %83
  %85 = icmp slt i32 %81, %84
  br i1 %85, label %87, label %86

86:                                               ; preds = %80
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  br label %94

87:                                               ; preds = %80
  %88 = load ptr, ptr %2, align 8, !tbaa !9
  %89 = load i32, ptr %5, align 4, !tbaa !5
  %90 = load i32, ptr %10, align 4, !tbaa !5
  call void @_ZN14minCostMaxFlow7addEdgeEiiii(ptr noundef nonnull align 8 dereferenceable(9032) %88, i32 noundef %89, i32 noundef %90, i32 noundef 1, i32 noundef 0)
  br label %91

91:                                               ; preds = %87
  %92 = load i32, ptr %10, align 4, !tbaa !5
  %93 = add nsw i32 %92, 1
  store i32 %93, ptr %10, align 4, !tbaa !5
  br label %80, !llvm.loop !15

94:                                               ; preds = %86
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #5
  store i32 0, ptr %11, align 4, !tbaa !5
  br label %95

95:                                               ; preds = %137, %94
  %96 = load i32, ptr %11, align 4, !tbaa !5
  %97 = load i32, ptr @m, align 4, !tbaa !5
  %98 = icmp slt i32 %96, %97
  br i1 %98, label %100, label %99

99:                                               ; preds = %95
  store i32 14, ptr %12, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #5
  br label %140

100:                                              ; preds = %95
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #5
  store i32 0, ptr %13, align 4, !tbaa !5
  br label %101

101:                                              ; preds = %133, %100
  %102 = load i32, ptr %13, align 4, !tbaa !5
  %103 = load i32, ptr @aa, align 4, !tbaa !5
  %104 = icmp slt i32 %102, %103
  br i1 %104, label %106, label %105

105:                                              ; preds = %101
  store i32 17, ptr %12, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #5
  br label %136

106:                                              ; preds = %101
  %107 = load i32, ptr %11, align 4, !tbaa !5
  %108 = sext i32 %107 to i64
  %109 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @c, i64 noundef %108) #5
  %110 = load i32, ptr %109, align 4, !tbaa !5
  %111 = load i32, ptr %13, align 4, !tbaa !5
  %112 = sext i32 %111 to i64
  %113 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %112) #5
  %114 = load i32, ptr %113, align 4, !tbaa !5
  %115 = icmp sge i32 %110, %114
  br i1 %115, label %116, label %132

116:                                              ; preds = %106
  %117 = load ptr, ptr %2, align 8, !tbaa !9
  %118 = load i32, ptr %13, align 4, !tbaa !5
  %119 = load i32, ptr @n, align 4, !tbaa !5
  %120 = load i32, ptr %11, align 4, !tbaa !5
  %121 = add nsw i32 %119, %120
  %122 = load i32, ptr %11, align 4, !tbaa !5
  %123 = sext i32 %122 to i64
  %124 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @c, i64 noundef %123) #5
  %125 = load i32, ptr %124, align 4, !tbaa !5
  %126 = load i32, ptr %13, align 4, !tbaa !5
  %127 = sext i32 %126 to i64
  %128 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %127) #5
  %129 = load i32, ptr %128, align 4, !tbaa !5
  %130 = sub nsw i32 %125, %129
  %131 = sub nsw i32 0, %130
  call void @_ZN14minCostMaxFlow7addEdgeEiiii(ptr noundef nonnull align 8 dereferenceable(9032) %117, i32 noundef %118, i32 noundef %121, i32 noundef 1, i32 noundef %131)
  br label %132

132:                                              ; preds = %116, %106
  br label %133

133:                                              ; preds = %132
  %134 = load i32, ptr %13, align 4, !tbaa !5
  %135 = add nsw i32 %134, 1
  store i32 %135, ptr %13, align 4, !tbaa !5
  br label %101, !llvm.loop !16

136:                                              ; preds = %105
  br label %137

137:                                              ; preds = %136
  %138 = load i32, ptr %11, align 4, !tbaa !5
  %139 = add nsw i32 %138, 1
  store i32 %139, ptr %11, align 4, !tbaa !5
  br label %95, !llvm.loop !17

140:                                              ; preds = %99
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #5
  store i32 0, ptr %14, align 4, !tbaa !5
  br label %141

141:                                              ; preds = %175, %140
  %142 = load i32, ptr %14, align 4, !tbaa !5
  %143 = load i32, ptr @m, align 4, !tbaa !5
  %144 = icmp slt i32 %142, %143
  br i1 %144, label %146, label %145

145:                                              ; preds = %141
  store i32 20, ptr %12, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #5
  br label %178

146:                                              ; preds = %141
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #5
  store i32 0, ptr %15, align 4, !tbaa !5
  br label %147

147:                                              ; preds = %171, %146
  %148 = load i32, ptr %15, align 4, !tbaa !5
  %149 = load i32, ptr @dd, align 4, !tbaa !5
  %150 = icmp slt i32 %148, %149
  br i1 %150, label %152, label %151

151:                                              ; preds = %147
  store i32 23, ptr %12, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #5
  br label %174

152:                                              ; preds = %147
  %153 = load i32, ptr %14, align 4, !tbaa !5
  %154 = sext i32 %153 to i64
  %155 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @c, i64 noundef %154) #5
  %156 = load i32, ptr %155, align 4, !tbaa !5
  %157 = load i32, ptr %15, align 4, !tbaa !5
  %158 = sext i32 %157 to i64
  %159 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @d, i64 noundef %158) #5
  %160 = load i32, ptr %159, align 4, !tbaa !5
  %161 = icmp sgt i32 %156, %160
  br i1 %161, label %162, label %170

162:                                              ; preds = %152
  %163 = load ptr, ptr %2, align 8, !tbaa !9
  %164 = load i32, ptr @aa, align 4, !tbaa !5
  %165 = load i32, ptr %15, align 4, !tbaa !5
  %166 = add nsw i32 %164, %165
  %167 = load i32, ptr @n, align 4, !tbaa !5
  %168 = load i32, ptr %14, align 4, !tbaa !5
  %169 = add nsw i32 %167, %168
  call void @_ZN14minCostMaxFlow7addEdgeEiiii(ptr noundef nonnull align 8 dereferenceable(9032) %163, i32 noundef %166, i32 noundef %169, i32 noundef 1, i32 noundef 0)
  br label %170

170:                                              ; preds = %162, %152
  br label %171

171:                                              ; preds = %170
  %172 = load i32, ptr %15, align 4, !tbaa !5
  %173 = add nsw i32 %172, 1
  store i32 %173, ptr %15, align 4, !tbaa !5
  br label %147, !llvm.loop !18

174:                                              ; preds = %151
  br label %175

175:                                              ; preds = %174
  %176 = load i32, ptr %14, align 4, !tbaa !5
  %177 = add nsw i32 %176, 1
  store i32 %177, ptr %14, align 4, !tbaa !5
  br label %141, !llvm.loop !19

178:                                              ; preds = %145
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #5
  store i32 0, ptr %16, align 4, !tbaa !5
  br label %179

179:                                              ; preds = %210, %178
  %180 = load i32, ptr %16, align 4, !tbaa !5
  %181 = load i32, ptr @m, align 4, !tbaa !5
  %182 = icmp slt i32 %180, %181
  br i1 %182, label %184, label %183

183:                                              ; preds = %179
  store i32 26, ptr %12, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #5
  br label %213

184:                                              ; preds = %179
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #5
  %185 = load i32, ptr @m, align 4, !tbaa !5
  %186 = load i32, ptr @n, align 4, !tbaa !5
  %187 = add nsw i32 %185, %186
  store i32 %187, ptr %17, align 4, !tbaa !5
  br label %188

188:                                              ; preds = %206, %184
  %189 = load i32, ptr %17, align 4, !tbaa !5
  %190 = load i32, ptr @m, align 4, !tbaa !5
  %191 = load i32, ptr @m, align 4, !tbaa !5
  %192 = add nsw i32 %190, %191
  %193 = icmp slt i32 %189, %192
  br i1 %193, label %195, label %194

194:                                              ; preds = %188
  store i32 29, ptr %12, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #5
  br label %209

195:                                              ; preds = %188
  %196 = load ptr, ptr %2, align 8, !tbaa !9
  %197 = load i32, ptr %17, align 4, !tbaa !5
  %198 = load i32, ptr @n, align 4, !tbaa !5
  %199 = load i32, ptr %16, align 4, !tbaa !5
  %200 = add nsw i32 %198, %199
  %201 = load i32, ptr %16, align 4, !tbaa !5
  %202 = sext i32 %201 to i64
  %203 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @c, i64 noundef %202) #5
  %204 = load i32, ptr %203, align 4, !tbaa !5
  %205 = sub nsw i32 0, %204
  call void @_ZN14minCostMaxFlow7addEdgeEiiii(ptr noundef nonnull align 8 dereferenceable(9032) %196, i32 noundef %197, i32 noundef %200, i32 noundef 1, i32 noundef %205)
  br label %206

206:                                              ; preds = %195
  %207 = load i32, ptr %17, align 4, !tbaa !5
  %208 = add nsw i32 %207, 1
  store i32 %208, ptr %17, align 4, !tbaa !5
  br label %188, !llvm.loop !20

209:                                              ; preds = %194
  br label %210

210:                                              ; preds = %209
  %211 = load i32, ptr %16, align 4, !tbaa !5
  %212 = add nsw i32 %211, 1
  store i32 %212, ptr %16, align 4, !tbaa !5
  br label %179, !llvm.loop !21

213:                                              ; preds = %183
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #5
  %214 = load ptr, ptr %2, align 8, !tbaa !9
  %215 = load i32, ptr %5, align 4, !tbaa !5
  %216 = load i32, ptr %6, align 4, !tbaa !5
  %217 = call i64 @_ZN14minCostMaxFlow4mcmfEiib(ptr noundef nonnull align 8 dereferenceable(9032) %214, i32 noundef %215, i32 noundef %216, i1 noundef zeroext true)
  store i64 %217, ptr %18, align 4
  %218 = getelementptr inbounds %"struct.std::pair", ptr %18, i32 0, i32 0
  %219 = load i32, ptr %218, align 4, !tbaa !22
  %220 = load i32, ptr @m, align 4, !tbaa !5
  %221 = icmp eq i32 %219, %220
  br i1 %221, label %222, label %226

222:                                              ; preds = %213
  %223 = getelementptr inbounds %"struct.std::pair", ptr %18, i32 0, i32 1
  %224 = load i32, ptr %223, align 4, !tbaa !24
  %225 = sub nsw i32 0, %224
  store i32 %225, ptr %1, align 4
  store i32 1, ptr %12, align 4
  br label %227

226:                                              ; preds = %213
  store i32 0, ptr %1, align 4
  store i32 1, ptr %12, align 4
  br label %227

227:                                              ; preds = %226, %222
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #5
  %228 = load i32, ptr %1, align 4
  ret i32 %228

229:                                              ; preds = %35
  %230 = load ptr, ptr %3, align 8
  %231 = load i32, ptr %4, align 4
  %232 = insertvalue { ptr, i32 } poison, ptr %230, 0
  %233 = insertvalue { ptr, i32 } %232, i32 %231, 1
  resume { ptr, i32 } %233
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { builtin allocsize(0) }
attributes #7 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}
!15 = distinct !{!15, !12}
!16 = distinct !{!16, !12}
!17 = distinct !{!17, !12}
!18 = distinct !{!18, !12}
!19 = distinct !{!19, !12}
!20 = distinct !{!20, !12}
!21 = distinct !{!21, !12}
!22 = !{!23, !6, i64 0}
!23 = !{!"_ZTSSt4pairIiiE", !6, i64 0, !6, i64 4}
!24 = !{!23, !6, i64 4}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@n = external dso_local local_unnamed_addr global i32, align 4
@m = external dso_local local_unnamed_addr global i32, align 4
@aa = external dso_local local_unnamed_addr global i32, align 4
@dd = external dso_local local_unnamed_addr global i32, align 4
@a = external dso_local global %"class.std::vector", align 8
@d = external dso_local global %"class.std::vector", align 8
@c = external dso_local global %"class.std::vector", align 8

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN14minCostMaxFlowC2Ei(ptr noundef nonnull align 8 dereferenceable(9032), i32 noundef) unnamed_addr #1 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN14minCostMaxFlow7addEdgeEiiii(ptr noundef nonnull align 8 dereferenceable(9032), i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local i64 @_ZN14minCostMaxFlow4mcmfEiib(ptr noundef nonnull align 8 dereferenceable(9032), i32 noundef, i32 noundef, i1 noundef zeroext) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef range(i32 -2147483647, -2147483648) i32 @_Z3allv() local_unnamed_addr #2 personality ptr @__gxx_personality_v0 {
  %1 = tail call noalias noundef nonnull dereferenceable(9032) ptr @_Znwm(i64 noundef 9032) #3
  %2 = load i32, ptr @m, align 4, !tbaa !5
  %3 = shl nsw i32 %2, 1
  %4 = add nsw i32 %3, 2
  tail call void @_ZN14minCostMaxFlowC2Ei(ptr noundef nonnull align 8 dereferenceable(9032) %1, i32 noundef %4)
  %5 = load i32, ptr @m, align 4, !tbaa !5
  %6 = shl nsw i32 %5, 1
  %7 = or disjoint i32 %6, 1
  %8 = icmp sgt i32 %5, 0
  br i1 %8, label %.lr.ph, label %.preheader68

.preheader68:                                     ; preds = %.lr.ph, %0
  %9 = load i32, ptr @aa, align 4, !tbaa !5
  %10 = icmp sgt i32 %9, 0
  br i1 %10, label %.lr.ph71, label %.preheader67

.lr.ph:                                           ; preds = %0, %.lr.ph
  %.05269 = phi i32 [ %13, %.lr.ph ], [ 0, %0 ]
  %11 = load i32, ptr @n, align 4, !tbaa !5
  %12 = add nsw i32 %11, %.05269
  tail call void @_ZN14minCostMaxFlow7addEdgeEiiii(ptr noundef nonnull align 8 dereferenceable(9032) %1, i32 noundef %12, i32 noundef %7, i32 noundef 1, i32 noundef 0)
  %13 = add nuw nsw i32 %.05269, 1
  %14 = load i32, ptr @m, align 4, !tbaa !5
  %15 = icmp slt i32 %13, %14
  br i1 %15, label %.lr.ph, label %.preheader68, !llvm.loop !9

.preheader67:                                     ; preds = %.lr.ph71, %.preheader68
  %16 = load i32, ptr @dd, align 4, !tbaa !5
  %17 = icmp sgt i32 %16, 0
  br i1 %17, label %.lr.ph73, label %._crit_edge

.lr.ph71:                                         ; preds = %.preheader68, %.lr.ph71
  %.06170 = phi i32 [ %18, %.lr.ph71 ], [ 0, %.preheader68 ]
  tail call void @_ZN14minCostMaxFlow7addEdgeEiiii(ptr noundef nonnull align 8 dereferenceable(9032) %1, i32 noundef %6, i32 noundef %.06170, i32 noundef 1, i32 noundef 0)
  %18 = add nuw nsw i32 %.06170, 1
  %19 = load i32, ptr @aa, align 4, !tbaa !5
  %20 = icmp slt i32 %18, %19
  br i1 %20, label %.lr.ph71, label %.preheader67, !llvm.loop !11

._crit_edge:                                      ; preds = %.lr.ph73, %.preheader67
  %21 = load i32, ptr @m, align 4, !tbaa !5
  %22 = load i32, ptr @n, align 4, !tbaa !5
  %23 = add nsw i32 %22, %21
  %24 = shl nsw i32 %21, 1
  %25 = icmp slt i32 %23, %24
  br i1 %25, label %.lr.ph76, label %.preheader66

.lr.ph73:                                         ; preds = %.preheader67, %.lr.ph73
  %.06072 = phi i32 [ %28, %.lr.ph73 ], [ 0, %.preheader67 ]
  %26 = load i32, ptr @aa, align 4, !tbaa !5
  %27 = add nsw i32 %26, %.06072
  tail call void @_ZN14minCostMaxFlow7addEdgeEiiii(ptr noundef nonnull align 8 dereferenceable(9032) %1, i32 noundef %6, i32 noundef %27, i32 noundef 1, i32 noundef 0)
  %28 = add nuw nsw i32 %.06072, 1
  %29 = load i32, ptr @dd, align 4, !tbaa !5
  %30 = icmp slt i32 %28, %29
  br i1 %30, label %.lr.ph73, label %._crit_edge, !llvm.loop !12

.preheader66:                                     ; preds = %.lr.ph76, %._crit_edge
  %31 = phi i32 [ %21, %._crit_edge ], [ %36, %.lr.ph76 ]
  %32 = icmp sgt i32 %31, 0
  br i1 %32, label %.preheader65.lr.ph, label %._crit_edge91

.preheader65.lr.ph:                               ; preds = %.preheader66
  %33 = load i32, ptr @aa, align 4, !tbaa !5
  %34 = icmp sgt i32 %33, 0
  br i1 %34, label %.preheader65, label %.preheader63.lr.ph

.lr.ph76:                                         ; preds = %._crit_edge, %.lr.ph76
  %.05974 = phi i32 [ %35, %.lr.ph76 ], [ %23, %._crit_edge ]
  tail call void @_ZN14minCostMaxFlow7addEdgeEiiii(ptr noundef nonnull align 8 dereferenceable(9032) %1, i32 noundef %6, i32 noundef %.05974, i32 noundef 1, i32 noundef 0)
  %35 = add nsw i32 %.05974, 1
  %36 = load i32, ptr @m, align 4, !tbaa !5
  %37 = shl nsw i32 %36, 1
  %38 = icmp slt i32 %35, %37
  br i1 %38, label %.lr.ph76, label %.preheader66, !llvm.loop !13

.preheader65:                                     ; preds = %.preheader65.lr.ph, %._crit_edge79
  %39 = phi i32 [ %47, %._crit_edge79 ], [ %31, %.preheader65.lr.ph ]
  %40 = phi i32 [ %48, %._crit_edge79 ], [ %33, %.preheader65.lr.ph ]
  %indvars.iv95 = phi i64 [ %indvars.iv.next96, %._crit_edge79 ], [ 0, %.preheader65.lr.ph ]
  %41 = icmp sgt i32 %40, 0
  br i1 %41, label %.lr.ph78, label %._crit_edge79

.lr.ph78:                                         ; preds = %.preheader65
  %42 = trunc nuw nsw i64 %indvars.iv95 to i32
  br label %51

.preheader64:                                     ; preds = %._crit_edge79
  %43 = icmp sgt i32 %47, 0
  br i1 %43, label %.preheader63.lr.ph, label %._crit_edge91

.preheader63.lr.ph:                               ; preds = %.preheader65.lr.ph, %.preheader64
  %44 = phi i32 [ %47, %.preheader64 ], [ %31, %.preheader65.lr.ph ]
  %45 = load i32, ptr @dd, align 4, !tbaa !5
  %46 = icmp sgt i32 %45, 0
  br i1 %46, label %.preheader63, label %.lr.ph90.preheader

._crit_edge79.loopexit:                           ; preds = %64
  %.pre = load i32, ptr @m, align 4, !tbaa !5
  br label %._crit_edge79

._crit_edge79:                                    ; preds = %._crit_edge79.loopexit, %.preheader65
  %47 = phi i32 [ %.pre, %._crit_edge79.loopexit ], [ %39, %.preheader65 ]
  %48 = phi i32 [ %65, %._crit_edge79.loopexit ], [ %40, %.preheader65 ]
  %indvars.iv.next96 = add nuw nsw i64 %indvars.iv95, 1
  %49 = sext i32 %47 to i64
  %50 = icmp slt i64 %indvars.iv.next96, %49
  br i1 %50, label %.preheader65, label %.preheader64, !llvm.loop !14

51:                                               ; preds = %.lr.ph78, %64
  %indvars.iv = phi i64 [ 0, %.lr.ph78 ], [ %indvars.iv.next, %64 ]
  %52 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @c, i64 noundef %indvars.iv95) #4
  %53 = load i32, ptr %52, align 4, !tbaa !5
  %54 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %indvars.iv) #4
  %55 = load i32, ptr %54, align 4, !tbaa !5
  %.not = icmp slt i32 %53, %55
  br i1 %.not, label %64, label %56

56:                                               ; preds = %51
  %57 = load i32, ptr @n, align 4, !tbaa !5
  %58 = add nsw i32 %57, %42
  %59 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @c, i64 noundef %indvars.iv95) #4
  %60 = load i32, ptr %59, align 4, !tbaa !5
  %61 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %indvars.iv) #4
  %62 = load i32, ptr %61, align 4, !tbaa !5
  %.neg = sub nsw i32 %62, %60
  %63 = trunc nuw nsw i64 %indvars.iv to i32
  tail call void @_ZN14minCostMaxFlow7addEdgeEiiii(ptr noundef nonnull align 8 dereferenceable(9032) %1, i32 noundef %63, i32 noundef %58, i32 noundef 1, i32 noundef %.neg)
  br label %64

64:                                               ; preds = %51, %56
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %65 = load i32, ptr @aa, align 4, !tbaa !5
  %66 = sext i32 %65 to i64
  %67 = icmp slt i64 %indvars.iv.next, %66
  br i1 %67, label %51, label %._crit_edge79.loopexit, !llvm.loop !16

.preheader63:                                     ; preds = %.preheader63.lr.ph, %._crit_edge83
  %68 = phi i32 [ %73, %._crit_edge83 ], [ %44, %.preheader63.lr.ph ]
  %69 = phi i32 [ %74, %._crit_edge83 ], [ %45, %.preheader63.lr.ph ]
  %indvars.iv101 = phi i64 [ %indvars.iv.next102, %._crit_edge83 ], [ 0, %.preheader63.lr.ph ]
  %70 = icmp sgt i32 %69, 0
  br i1 %70, label %.lr.ph82, label %._crit_edge83

.lr.ph82:                                         ; preds = %.preheader63
  %71 = trunc nuw nsw i64 %indvars.iv101 to i32
  br label %77

.preheader:                                       ; preds = %._crit_edge83
  %72 = icmp sgt i32 %73, 0
  br i1 %72, label %.lr.ph90.preheader, label %._crit_edge91

.lr.ph90.preheader:                               ; preds = %.preheader63.lr.ph, %.preheader
  %.ph = phi i32 [ %44, %.preheader63.lr.ph ], [ %73, %.preheader ]
  br label %.lr.ph90

._crit_edge83.loopexit:                           ; preds = %89
  %.pre107 = load i32, ptr @m, align 4, !tbaa !5
  br label %._crit_edge83

._crit_edge83:                                    ; preds = %._crit_edge83.loopexit, %.preheader63
  %73 = phi i32 [ %.pre107, %._crit_edge83.loopexit ], [ %68, %.preheader63 ]
  %74 = phi i32 [ %90, %._crit_edge83.loopexit ], [ %69, %.preheader63 ]
  %indvars.iv.next102 = add nuw nsw i64 %indvars.iv101, 1
  %75 = sext i32 %73 to i64
  %76 = icmp slt i64 %indvars.iv.next102, %75
  br i1 %76, label %.preheader63, label %.preheader, !llvm.loop !17

77:                                               ; preds = %.lr.ph82, %89
  %indvars.iv98 = phi i64 [ 0, %.lr.ph82 ], [ %indvars.iv.next99, %89 ]
  %78 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @c, i64 noundef %indvars.iv101) #4
  %79 = load i32, ptr %78, align 4, !tbaa !5
  %80 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @d, i64 noundef %indvars.iv98) #4
  %81 = load i32, ptr %80, align 4, !tbaa !5
  %82 = icmp sgt i32 %79, %81
  br i1 %82, label %83, label %89

83:                                               ; preds = %77
  %84 = load i32, ptr @aa, align 4, !tbaa !5
  %85 = trunc nuw nsw i64 %indvars.iv98 to i32
  %86 = add nsw i32 %84, %85
  %87 = load i32, ptr @n, align 4, !tbaa !5
  %88 = add nsw i32 %87, %71
  tail call void @_ZN14minCostMaxFlow7addEdgeEiiii(ptr noundef nonnull align 8 dereferenceable(9032) %1, i32 noundef %86, i32 noundef %88, i32 noundef 1, i32 noundef 0)
  br label %89

89:                                               ; preds = %77, %83
  %indvars.iv.next99 = add nuw nsw i64 %indvars.iv98, 1
  %90 = load i32, ptr @dd, align 4, !tbaa !5
  %91 = sext i32 %90 to i64
  %92 = icmp slt i64 %indvars.iv.next99, %91
  br i1 %92, label %77, label %._crit_edge83.loopexit, !llvm.loop !18

._crit_edge91:                                    ; preds = %._crit_edge88, %.preheader66, %.preheader64, %.preheader
  %93 = tail call i64 @_ZN14minCostMaxFlow4mcmfEiib(ptr noundef nonnull align 8 dereferenceable(9032) %1, i32 noundef %6, i32 noundef %7, i1 noundef zeroext true)
  %.sroa.0.0.extract.trunc = trunc i64 %93 to i32
  %94 = load i32, ptr @m, align 4, !tbaa !5
  %95 = icmp eq i32 %94, %.sroa.0.0.extract.trunc
  %.sroa.4.0.extract.shift = lshr i64 %93, 32
  %.sroa.4.0.extract.trunc = trunc nuw i64 %.sroa.4.0.extract.shift to i32
  %96 = sub nsw i32 0, %.sroa.4.0.extract.trunc
  %.0 = select i1 %95, i32 %96, i32 0
  ret i32 %.0

.lr.ph90:                                         ; preds = %.lr.ph90.preheader, %._crit_edge88
  %97 = phi i32 [ %103, %._crit_edge88 ], [ %.ph, %.lr.ph90.preheader ]
  %indvars.iv104 = phi i64 [ %indvars.iv.next105, %._crit_edge88 ], [ 0, %.lr.ph90.preheader ]
  %98 = load i32, ptr @n, align 4, !tbaa !5
  %99 = add nsw i32 %98, %97
  %100 = shl nsw i32 %97, 1
  %101 = icmp slt i32 %99, %100
  br i1 %101, label %.lr.ph87, label %._crit_edge88

.lr.ph87:                                         ; preds = %.lr.ph90
  %102 = trunc nuw nsw i64 %indvars.iv104 to i32
  br label %106

._crit_edge88:                                    ; preds = %106, %.lr.ph90
  %103 = phi i32 [ %97, %.lr.ph90 ], [ %113, %106 ]
  %indvars.iv.next105 = add nuw nsw i64 %indvars.iv104, 1
  %104 = sext i32 %103 to i64
  %105 = icmp slt i64 %indvars.iv.next105, %104
  br i1 %105, label %.lr.ph90, label %._crit_edge91, !llvm.loop !19

106:                                              ; preds = %.lr.ph87, %106
  %.05385 = phi i32 [ %99, %.lr.ph87 ], [ %112, %106 ]
  %107 = load i32, ptr @n, align 4, !tbaa !5
  %108 = add nsw i32 %107, %102
  %109 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @c, i64 noundef %indvars.iv104) #4
  %110 = load i32, ptr %109, align 4, !tbaa !5
  %111 = sub nsw i32 0, %110
  tail call void @_ZN14minCostMaxFlow7addEdgeEiiii(ptr noundef nonnull align 8 dereferenceable(9032) %1, i32 noundef %.05385, i32 noundef %108, i32 noundef 1, i32 noundef %111)
  %112 = add nsw i32 %.05385, 1
  %113 = load i32, ptr @m, align 4, !tbaa !5
  %114 = shl nsw i32 %113, 1
  %115 = icmp slt i32 %112, %114
  br i1 %115, label %106, label %._crit_edge88, !llvm.loop !20
}

attributes #0 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { builtin allocsize(0) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10, !15}
!15 = !{!"llvm.loop.unswitch.partial.disable"}
!16 = distinct !{!16, !10}
!17 = distinct !{!17, !10, !15}
!18 = distinct !{!18, !10}
!19 = distinct !{!19, !10}
!20 = distinct !{!20, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimpleLoopUnswitchPass,SimplifyCFGPass,TailCallElimPass