; LLVM IR from IOsonata/IOsonata :: ARM/Nordic/nRF52/nRF52840/exemples/BoschAppBoard/src (bmi3)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.bmi3_dev = type { i8, ptr, i8, i32, i8, i8, i8, i16, ptr, ptr, ptr, i16 }

@__const.bmi3_soft_reset.feature_data = external hidden unnamed_addr constant [2 x i8], align 1
@__const.bmi3_soft_reset.feature_engine_en = external hidden unnamed_addr constant [2 x i8], align 1
@__const.bmi3_soft_reset.feature_io_status = external hidden unnamed_addr constant [2 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: nounwind uwtable
declare hidden signext i8 @null_ptr_check(ptr noundef) #2

; Function Attrs: nounwind uwtable
define dso_local signext i8 @bmi3_soft_reset(ptr noundef %0) #2 {
  %2 = alloca ptr, align 8
  %3 = alloca i8, align 1
  %4 = alloca [2 x i8], align 1
  %5 = alloca [2 x i8], align 1
  %6 = alloca [2 x i8], align 1
  %7 = alloca [2 x i8], align 1
  %8 = alloca [2 x i8], align 1
  %9 = alloca i8, align 1
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %3) #4
  call void @llvm.lifetime.start.p0(i64 2, ptr %4) #4
  call void @llvm.memset.p0.i64(ptr align 1 %4, i8 0, i64 2, i1 false)
  call void @llvm.lifetime.start.p0(i64 2, ptr %5) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 1 %5, ptr align 1 @__const.bmi3_soft_reset.feature_data, i64 2, i1 false)
  call void @llvm.lifetime.start.p0(i64 2, ptr %6) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 1 %6, ptr align 1 @__const.bmi3_soft_reset.feature_engine_en, i64 2, i1 false)
  call void @llvm.lifetime.start.p0(i64 2, ptr %7) #4
  call void @llvm.memset.p0.i64(ptr align 1 %7, i8 0, i64 2, i1 false)
  call void @llvm.lifetime.start.p0(i64 2, ptr %8) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 1 %8, ptr align 1 @__const.bmi3_soft_reset.feature_io_status, i64 2, i1 false)
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #4
  store i8 1, ptr %9, align 1, !tbaa !9
  %10 = load ptr, ptr %2, align 8, !tbaa !5
  %11 = call signext i8 @null_ptr_check(ptr noundef %10)
  store i8 %11, ptr %3, align 1, !tbaa !9
  %12 = load i8, ptr %3, align 1, !tbaa !9
  %13 = sext i8 %12 to i32
  %14 = icmp eq i32 %13, 0
  br i1 %14, label %15, label %96

15:                                               ; preds = %1
  %16 = load ptr, ptr %2, align 8, !tbaa !5
  %17 = call signext i8 @bmi3_set_command_register(i16 noundef zeroext -8529, ptr noundef %16)
  store i8 %17, ptr %3, align 1, !tbaa !9
  %18 = load ptr, ptr %2, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.bmi3_dev, ptr %18, i32 0, i32 10
  %20 = load ptr, ptr %19, align 8, !tbaa !10
  %21 = load ptr, ptr %2, align 8, !tbaa !5
  %22 = getelementptr inbounds %struct.bmi3_dev, ptr %21, i32 0, i32 1
  %23 = load ptr, ptr %22, align 8, !tbaa !14
  call void %20(i32 noundef 2000, ptr noundef %23)
  %24 = load i8, ptr %3, align 1, !tbaa !9
  %25 = sext i8 %24 to i32
  %26 = icmp eq i32 %25, 0
  br i1 %26, label %27, label %36

27:                                               ; preds = %15
  %28 = load ptr, ptr %2, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.bmi3_dev, ptr %28, i32 0, i32 3
  %30 = load i32, ptr %29, align 4, !tbaa !15
  %31 = icmp eq i32 %30, 0
  br i1 %31, label %32, label %36

32:                                               ; preds = %27
  %33 = getelementptr inbounds [2 x i8], ptr %4, i64 0, i64 0
  %34 = load ptr, ptr %2, align 8, !tbaa !5
  %35 = call signext i8 @bmi3_get_regs(i8 noundef zeroext 0, ptr noundef %33, i16 noundef zeroext 2, ptr noundef %34)
  store i8 %35, ptr %3, align 1, !tbaa !9
  br label %36

36:                                               ; preds = %32, %27, %15
  %37 = load i8, ptr %3, align 1, !tbaa !9
  %38 = sext i8 %37 to i32
  %39 = icmp eq i32 %38, 0
  br i1 %39, label %40, label %44

40:                                               ; preds = %36
  %41 = getelementptr inbounds [2 x i8], ptr %5, i64 0, i64 0
  %42 = load ptr, ptr %2, align 8, !tbaa !5
  %43 = call signext i8 @bmi3_set_regs(i8 noundef zeroext 18, ptr noundef %41, i16 noundef zeroext 2, ptr noundef %42)
  store i8 %43, ptr %3, align 1, !tbaa !9
  br label %44

44:                                               ; preds = %40, %36
  %45 = load i8, ptr %3, align 1, !tbaa !9
  %46 = sext i8 %45 to i32
  %47 = icmp eq i32 %46, 0
  br i1 %47, label %48, label %52

48:                                               ; preds = %44
  %49 = getelementptr inbounds [2 x i8], ptr %8, i64 0, i64 0
  %50 = load ptr, ptr %2, align 8, !tbaa !5
  %51 = call signext i8 @bmi3_set_regs(i8 noundef zeroext 20, ptr noundef %49, i16 noundef zeroext 2, ptr noundef %50)
  store i8 %51, ptr %3, align 1, !tbaa !9
  br label %52

52:                                               ; preds = %48, %44
  %53 = load i8, ptr %3, align 1, !tbaa !9
  %54 = sext i8 %53 to i32
  %55 = icmp eq i32 %54, 0
  br i1 %55, label %56, label %60

56:                                               ; preds = %52
  %57 = getelementptr inbounds [2 x i8], ptr %6, i64 0, i64 0
  %58 = load ptr, ptr %2, align 8, !tbaa !5
  %59 = call signext i8 @bmi3_set_regs(i8 noundef zeroext 64, ptr noundef %57, i16 noundef zeroext 2, ptr noundef %58)
  store i8 %59, ptr %3, align 1, !tbaa !9
  br label %60

60:                                               ; preds = %56, %52
  %61 = load i8, ptr %3, align 1, !tbaa !9
  %62 = sext i8 %61 to i32
  %63 = icmp eq i32 %62, 0
  br i1 %63, label %64, label %95

64:                                               ; preds = %60
  br label %65

65:                                               ; preds = %91, %64
  %66 = load i8, ptr %9, align 1, !tbaa !9
  %67 = zext i8 %66 to i32
  %68 = icmp sle i32 %67, 10
  br i1 %68, label %69, label %94

69:                                               ; preds = %65
  %70 = load ptr, ptr %2, align 8, !tbaa !5
  %71 = getelementptr inbounds %struct.bmi3_dev, ptr %70, i32 0, i32 10
  %72 = load ptr, ptr %71, align 8, !tbaa !10
  %73 = load ptr, ptr %2, align 8, !tbaa !5
  %74 = getelementptr inbounds %struct.bmi3_dev, ptr %73, i32 0, i32 1
  %75 = load ptr, ptr %74, align 8, !tbaa !14
  call void %72(i32 noundef 100000, ptr noundef %75)
  %76 = getelementptr inbounds [2 x i8], ptr %7, i64 0, i64 0
  %77 = load ptr, ptr %2, align 8, !tbaa !5
  %78 = call signext i8 @bmi3_get_regs(i8 noundef zeroext 17, ptr noundef %76, i16 noundef zeroext 2, ptr noundef %77)
  store i8 %78, ptr %3, align 1, !tbaa !9
  %79 = load i8, ptr %3, align 1, !tbaa !9
  %80 = sext i8 %79 to i32
  %81 = icmp eq i32 %80, 0
  br i1 %81, label %82, label %91

82:                                               ; preds = %69
  %83 = getelementptr inbounds [2 x i8], ptr %7, i64 0, i64 0
  %84 = load i8, ptr %83, align 1, !tbaa !9
  %85 = zext i8 %84 to i32
  %86 = and i32 %85, 1
  %87 = icmp ne i32 %86, 0
  br i1 %87, label %88, label %89

88:                                               ; preds = %82
  store i8 0, ptr %3, align 1, !tbaa !9
  br label %94

89:                                               ; preds = %82
  store i8 -14, ptr %3, align 1, !tbaa !9
  br label %90

90:                                               ; preds = %89
  br label %91

91:                                               ; preds = %90, %69
  %92 = load i8, ptr %9, align 1, !tbaa !9
  %93 = add i8 %92, 1
  store i8 %93, ptr %9, align 1, !tbaa !9
  br label %65, !llvm.loop !16

94:                                               ; preds = %88, %65
  br label %95

95:                                               ; preds = %94, %60
  br label %96

96:                                               ; preds = %95, %1
  %97 = load i8, ptr %3, align 1, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 2, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 2, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 2, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 2, ptr %5) #4
  call void @llvm.lifetime.end.p0(i64 2, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %3) #4
  ret i8 %97
}

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_get_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_set_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_set_command_register(i16 noundef zeroext, ptr noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !6, i64 48}
!11 = !{!"bmi3_dev", !7, i64 0, !6, i64 8, !7, i64 16, !12, i64 20, !7, i64 24, !7, i64 25, !7, i64 26, !13, i64 28, !6, i64 32, !6, i64 40, !6, i64 48, !13, i64 56}
!12 = !{!"int", !7, i64 0}
!13 = !{!"short", !7, i64 0}
!14 = !{!11, !6, i64 8}
!15 = !{!11, !12, i64 20}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@__const.bmi3_soft_reset.feature_data = external hidden unnamed_addr constant [2 x i8], align 1
@__const.bmi3_soft_reset.feature_engine_en = external hidden unnamed_addr constant [2 x i8], align 1
@__const.bmi3_soft_reset.feature_io_status = external hidden unnamed_addr constant [2 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare hidden signext i8 @null_ptr_check(ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local signext i8 @bmi3_soft_reset(ptr noundef %0) local_unnamed_addr #1 {
  %2 = alloca [2 x i8], align 2
  %3 = alloca [2 x i8], align 2
  %4 = alloca [2 x i8], align 2
  %5 = alloca [2 x i8], align 2
  %6 = alloca [2 x i8], align 2
  call void @llvm.lifetime.start.p0(i64 2, ptr nonnull %2) #2
  store i16 0, ptr %2, align 2
  call void @llvm.lifetime.start.p0(i64 2, ptr nonnull %3) #2
  %7 = load i16, ptr @__const.bmi3_soft_reset.feature_data, align 1
  store i16 %7, ptr %3, align 2
  call void @llvm.lifetime.start.p0(i64 2, ptr nonnull %4) #2
  %8 = load i16, ptr @__const.bmi3_soft_reset.feature_engine_en, align 1
  store i16 %8, ptr %4, align 2
  call void @llvm.lifetime.start.p0(i64 2, ptr nonnull %5) #2
  store i16 0, ptr %5, align 2
  call void @llvm.lifetime.start.p0(i64 2, ptr nonnull %6) #2
  %9 = load i16, ptr @__const.bmi3_soft_reset.feature_io_status, align 1
  store i16 %9, ptr %6, align 2
  %10 = tail call signext i8 @null_ptr_check(ptr noundef %0)
  %11 = icmp eq i8 %10, 0
  br i1 %11, label %12, label %.thread34

12:                                               ; preds = %1
  %13 = tail call signext i8 @bmi3_set_command_register(i16 noundef zeroext -8529, ptr noundef %0)
  %14 = getelementptr inbounds i8, ptr %0, i64 48
  %15 = load ptr, ptr %14, align 8, !tbaa !5
  %16 = getelementptr inbounds i8, ptr %0, i64 8
  %17 = load ptr, ptr %16, align 8, !tbaa !12
  tail call void %15(i32 noundef 2000, ptr noundef %17) #2
  %18 = icmp eq i8 %13, 0
  br i1 %18, label %19, label %.thread34

19:                                               ; preds = %12
  %20 = getelementptr inbounds i8, ptr %0, i64 20
  %21 = load i32, ptr %20, align 4, !tbaa !13
  %22 = icmp eq i32 %21, 0
  br i1 %22, label %23, label %.thread

23:                                               ; preds = %19
  %24 = call signext i8 @bmi3_get_regs(i8 noundef zeroext 0, ptr noundef nonnull %2, i16 noundef zeroext 2, ptr noundef nonnull %0)
  %25 = icmp eq i8 %24, 0
  br i1 %25, label %.thread, label %.thread34

.thread:                                          ; preds = %19, %23
  %26 = call signext i8 @bmi3_set_regs(i8 noundef zeroext 18, ptr noundef nonnull %3, i16 noundef zeroext 2, ptr noundef nonnull %0)
  %27 = icmp eq i8 %26, 0
  br i1 %27, label %28, label %.thread34

28:                                               ; preds = %.thread
  %29 = call signext i8 @bmi3_set_regs(i8 noundef zeroext 20, ptr noundef nonnull %6, i16 noundef zeroext 2, ptr noundef nonnull %0)
  %30 = icmp eq i8 %29, 0
  br i1 %30, label %31, label %.thread34

31:                                               ; preds = %28
  %32 = call signext i8 @bmi3_set_regs(i8 noundef zeroext 64, ptr noundef nonnull %4, i16 noundef zeroext 2, ptr noundef nonnull %0)
  %33 = icmp eq i8 %32, 0
  br i1 %33, label %.preheader.preheader, label %.thread34

.preheader.preheader:                             ; preds = %31
  %34 = load ptr, ptr %14, align 8, !tbaa !5
  %35 = load ptr, ptr %16, align 8, !tbaa !12
  call void %34(i32 noundef 100000, ptr noundef %35) #2
  %36 = call signext i8 @bmi3_get_regs(i8 noundef zeroext 17, ptr noundef nonnull %5, i16 noundef zeroext 2, ptr noundef nonnull %0)
  %37 = icmp eq i8 %36, 0
  br i1 %37, label %38, label %.preheader.1

38:                                               ; preds = %.preheader.preheader
  %39 = load i8, ptr %5, align 2, !tbaa !14
  %40 = and i8 %39, 1
  %.not = icmp eq i8 %40, 0
  br i1 %.not, label %.preheader.1, label %.thread34

.preheader.1:                                     ; preds = %38, %.preheader.preheader
  %41 = load ptr, ptr %14, align 8, !tbaa !5
  %42 = load ptr, ptr %16, align 8, !tbaa !12
  call void %41(i32 noundef 100000, ptr noundef %42) #2
  %43 = call signext i8 @bmi3_get_regs(i8 noundef zeroext 17, ptr noundef nonnull %5, i16 noundef zeroext 2, ptr noundef nonnull %0)
  %44 = icmp eq i8 %43, 0
  br i1 %44, label %45, label %.preheader.2

45:                                               ; preds = %.preheader.1
  %46 = load i8, ptr %5, align 2, !tbaa !14
  %47 = and i8 %46, 1
  %.not.1 = icmp eq i8 %47, 0
  br i1 %.not.1, label %.preheader.2, label %.thread34

.preheader.2:                                     ; preds = %45, %.preheader.1
  %48 = load ptr, ptr %14, align 8, !tbaa !5
  %49 = load ptr, ptr %16, align 8, !tbaa !12
  call void %48(i32 noundef 100000, ptr noundef %49) #2
  %50 = call signext i8 @bmi3_get_regs(i8 noundef zeroext 17, ptr noundef nonnull %5, i16 noundef zeroext 2, ptr noundef nonnull %0)
  %51 = icmp eq i8 %50, 0
  br i1 %51, label %52, label %.preheader.3

52:                                               ; preds = %.preheader.2
  %53 = load i8, ptr %5, align 2, !tbaa !14
  %54 = and i8 %53, 1
  %.not.2 = icmp eq i8 %54, 0
  br i1 %.not.2, label %.preheader.3, label %.thread34

.preheader.3:                                     ; preds = %52, %.preheader.2
  %55 = load ptr, ptr %14, align 8, !tbaa !5
  %56 = load ptr, ptr %16, align 8, !tbaa !12
  call void %55(i32 noundef 100000, ptr noundef %56) #2
  %57 = call signext i8 @bmi3_get_regs(i8 noundef zeroext 17, ptr noundef nonnull %5, i16 noundef zeroext 2, ptr noundef nonnull %0)
  %58 = icmp eq i8 %57, 0
  br i1 %58, label %59, label %.preheader.4

59:                                               ; preds = %.preheader.3
  %60 = load i8, ptr %5, align 2, !tbaa !14
  %61 = and i8 %60, 1
  %.not.3 = icmp eq i8 %61, 0
  br i1 %.not.3, label %.preheader.4, label %.thread34

.preheader.4:                                     ; preds = %59, %.preheader.3
  %62 = load ptr, ptr %14, align 8, !tbaa !5
  %63 = load ptr, ptr %16, align 8, !tbaa !12
  call void %62(i32 noundef 100000, ptr noundef %63) #2
  %64 = call signext i8 @bmi3_get_regs(i8 noundef zeroext 17, ptr noundef nonnull %5, i16 noundef zeroext 2, ptr noundef nonnull %0)
  %65 = icmp eq i8 %64, 0
  br i1 %65, label %66, label %.preheader.5

66:                                               ; preds = %.preheader.4
  %67 = load i8, ptr %5, align 2, !tbaa !14
  %68 = and i8 %67, 1
  %.not.4 = icmp eq i8 %68, 0
  br i1 %.not.4, label %.preheader.5, label %.thread34

.preheader.5:                                     ; preds = %66, %.preheader.4
  %69 = load ptr, ptr %14, align 8, !tbaa !5
  %70 = load ptr, ptr %16, align 8, !tbaa !12
  call void %69(i32 noundef 100000, ptr noundef %70) #2
  %71 = call signext i8 @bmi3_get_regs(i8 noundef zeroext 17, ptr noundef nonnull %5, i16 noundef zeroext 2, ptr noundef nonnull %0)
  %72 = icmp eq i8 %71, 0
  br i1 %72, label %73, label %.preheader.6

73:                                               ; preds = %.preheader.5
  %74 = load i8, ptr %5, align 2, !tbaa !14
  %75 = and i8 %74, 1
  %.not.5 = icmp eq i8 %75, 0
  br i1 %.not.5, label %.preheader.6, label %.thread34

.preheader.6:                                     ; preds = %73, %.preheader.5
  %76 = load ptr, ptr %14, align 8, !tbaa !5
  %77 = load ptr, ptr %16, align 8, !tbaa !12
  call void %76(i32 noundef 100000, ptr noundef %77) #2
  %78 = call signext i8 @bmi3_get_regs(i8 noundef zeroext 17, ptr noundef nonnull %5, i16 noundef zeroext 2, ptr noundef nonnull %0)
  %79 = icmp eq i8 %78, 0
  br i1 %79, label %80, label %.preheader.7

80:                                               ; preds = %.preheader.6
  %81 = load i8, ptr %5, align 2, !tbaa !14
  %82 = and i8 %81, 1
  %.not.6 = icmp eq i8 %82, 0
  br i1 %.not.6, label %.preheader.7, label %.thread34

.preheader.7:                                     ; preds = %80, %.preheader.6
  %83 = load ptr, ptr %14, align 8, !tbaa !5
  %84 = load ptr, ptr %16, align 8, !tbaa !12
  call void %83(i32 noundef 100000, ptr noundef %84) #2
  %85 = call signext i8 @bmi3_get_regs(i8 noundef zeroext 17, ptr noundef nonnull %5, i16 noundef zeroext 2, ptr noundef nonnull %0)
  %86 = icmp eq i8 %85, 0
  br i1 %86, label %87, label %.preheader.8

87:                                               ; preds = %.preheader.7
  %88 = load i8, ptr %5, align 2, !tbaa !14
  %89 = and i8 %88, 1
  %.not.7 = icmp eq i8 %89, 0
  br i1 %.not.7, label %.preheader.8, label %.thread34

.preheader.8:                                     ; preds = %87, %.preheader.7
  %90 = load ptr, ptr %14, align 8, !tbaa !5
  %91 = load ptr, ptr %16, align 8, !tbaa !12
  call void %90(i32 noundef 100000, ptr noundef %91) #2
  %92 = call signext i8 @bmi3_get_regs(i8 noundef zeroext 17, ptr noundef nonnull %5, i16 noundef zeroext 2, ptr noundef nonnull %0)
  %93 = icmp eq i8 %92, 0
  br i1 %93, label %94, label %.preheader.9

94:                                               ; preds = %.preheader.8
  %95 = load i8, ptr %5, align 2, !tbaa !14
  %96 = and i8 %95, 1
  %.not.8 = icmp eq i8 %96, 0
  br i1 %.not.8, label %.preheader.9, label %.thread34

.preheader.9:                                     ; preds = %94, %.preheader.8
  %97 = load ptr, ptr %14, align 8, !tbaa !5
  %98 = load ptr, ptr %16, align 8, !tbaa !12
  call void %97(i32 noundef 100000, ptr noundef %98) #2
  %99 = call signext i8 @bmi3_get_regs(i8 noundef zeroext 17, ptr noundef nonnull %5, i16 noundef zeroext 2, ptr noundef nonnull %0)
  %100 = icmp eq i8 %99, 0
  br i1 %100, label %101, label %.thread34

101:                                              ; preds = %.preheader.9
  %102 = load i8, ptr %5, align 2, !tbaa !14
  %103 = and i8 %102, 1
  %.not.9 = icmp eq i8 %103, 0
  %spec.select = select i1 %.not.9, i8 -14, i8 0
  br label %.thread34

.thread34:                                        ; preds = %101, %38, %45, %52, %59, %66, %73, %80, %87, %94, %.preheader.9, %12, %23, %.thread, %28, %31, %1
  %.5 = phi i8 [ %32, %31 ], [ %10, %1 ], [ %29, %28 ], [ %26, %.thread ], [ %24, %23 ], [ %13, %12 ], [ 0, %38 ], [ 0, %45 ], [ 0, %52 ], [ 0, %59 ], [ 0, %66 ], [ 0, %73 ], [ 0, %80 ], [ 0, %87 ], [ 0, %94 ], [ %99, %.preheader.9 ], [ %spec.select, %101 ]
  call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %6) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %5) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %4) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %3) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %2) #2
  ret i8 %.5
}

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_get_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_set_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_set_command_register(i16 noundef zeroext, ptr noundef) local_unnamed_addr #1

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !9, i64 48}
!6 = !{!"bmi3_dev", !7, i64 0, !9, i64 8, !7, i64 16, !10, i64 20, !7, i64 24, !7, i64 25, !7, i64 26, !11, i64 28, !9, i64 32, !9, i64 40, !9, i64 48, !11, i64 56}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!"any pointer", !7, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!"short", !7, i64 0}
!12 = !{!6, !9, i64 8}
!13 = !{!6, !10, i64 20}
!14 = !{!7, !7, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopSimplifyPass,SROAPass,SimplifyCFGPass,TailCallElimPass