; LLVM IR from IOsonata/IOsonata :: src (slip_intrf)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__Slip_Device = type <{ %struct.__device_intrf, ptr, ptr, i8, [7 x i8] }>
%struct.__device_intrf = type <{ ptr, i32, ptr, %"struct.std::atomic_flag", [3 x i8], i32, %"struct.std::atomic", i32, i8, i8, %"struct.std::atomic.0", %"struct.std::atomic.0", i64, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr }>
%"struct.std::atomic_flag" = type { %"struct.std::__atomic_flag_base" }
%"struct.std::__atomic_flag_base" = type { i8 }
%"struct.std::atomic" = type { %"struct.std::__atomic_base" }
%"struct.std::__atomic_base" = type { i32 }
%"struct.std::atomic.0" = type { %"struct.std::__atomic_base.1" }
%"struct.std::__atomic_base.1" = type { i8 }

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z16SlipIntrfDisableP14__device_intrf(ptr noundef) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z15SlipIntrfEnableP14__device_intrf(ptr noundef) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z16SlipIntrfGetRateP14__device_intrf(ptr noundef) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z16SlipIntrfSetRateP14__device_intrfj(ptr noundef, i32 noundef) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z16SlipIntrfStartRxP14__device_intrfj(ptr noundef, i32 noundef) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z23SlipIntrfRxDataBlockingP14__device_intrfPhi(ptr noundef, ptr noundef, i32 noundef) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z26SlipIntrfRxDataNonBlockingP14__device_intrfPhi(ptr noundef, ptr noundef, i32 noundef) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z15SlipIntrfStopRxP14__device_intrf(ptr noundef) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z16SlipIntrfStartTxP14__device_intrfj(ptr noundef, i32 noundef) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z15SlipIntrfTxDataP14__device_intrfPhi(ptr noundef, ptr noundef, i32 noundef) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z15SlipIntrfStopTxP14__device_intrf(ptr noundef) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z17SlipIntrfPowerOffP14__device_intrf(ptr noundef) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local zeroext i1 @SlipInit(ptr noundef %0, ptr noundef %1, i1 noundef zeroext %2) #1 {
  %4 = alloca i1, align 1
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i8, align 1
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  %8 = zext i1 %2 to i8
  store i8 %8, ptr %7, align 1, !tbaa !9
  %9 = load ptr, ptr %5, align 8, !tbaa !5
  %10 = icmp eq ptr %9, null
  br i1 %10, label %14, label %11

11:                                               ; preds = %3
  %12 = load ptr, ptr %6, align 8, !tbaa !5
  %13 = icmp eq ptr %12, null
  br i1 %13, label %14, label %15

14:                                               ; preds = %11, %3
  store i1 false, ptr %4, align 1
  br label %92

15:                                               ; preds = %11
  %16 = load ptr, ptr %5, align 8, !tbaa !5
  %17 = load ptr, ptr %5, align 8, !tbaa !5
  %18 = getelementptr inbounds %struct.__Slip_Device, ptr %17, i32 0, i32 0
  %19 = getelementptr inbounds %struct.__device_intrf, ptr %18, i32 0, i32 0
  store ptr %16, ptr %19, align 8, !tbaa !11
  %20 = load ptr, ptr %6, align 8, !tbaa !5
  %21 = load ptr, ptr %5, align 8, !tbaa !5
  %22 = getelementptr inbounds %struct.__Slip_Device, ptr %21, i32 0, i32 1
  store ptr %20, ptr %22, align 8, !tbaa !23
  %23 = load ptr, ptr %5, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.__Slip_Device, ptr %23, i32 0, i32 2
  store ptr null, ptr %24, align 8, !tbaa !24
  %25 = load ptr, ptr %5, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.__Slip_Device, ptr %25, i32 0, i32 3
  store volatile i8 0, ptr %26, align 8, !tbaa !25
  %27 = load ptr, ptr %5, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.__Slip_Device, ptr %27, i32 0, i32 0
  %29 = getelementptr inbounds %struct.__device_intrf, ptr %28, i32 0, i32 7
  store i32 6, ptr %29, align 8, !tbaa !26
  %30 = load ptr, ptr %5, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.__Slip_Device, ptr %30, i32 0, i32 0
  %32 = getelementptr inbounds %struct.__device_intrf, ptr %31, i32 0, i32 13
  store ptr @_Z16SlipIntrfDisableP14__device_intrf, ptr %32, align 8, !tbaa !27
  %33 = load ptr, ptr %5, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.__Slip_Device, ptr %33, i32 0, i32 0
  %35 = getelementptr inbounds %struct.__device_intrf, ptr %34, i32 0, i32 14
  store ptr @_Z15SlipIntrfEnableP14__device_intrf, ptr %35, align 8, !tbaa !28
  %36 = load ptr, ptr %5, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.__Slip_Device, ptr %36, i32 0, i32 0
  %38 = getelementptr inbounds %struct.__device_intrf, ptr %37, i32 0, i32 15
  store ptr @_Z16SlipIntrfGetRateP14__device_intrf, ptr %38, align 8, !tbaa !29
  %39 = load ptr, ptr %5, align 8, !tbaa !5
  %40 = getelementptr inbounds %struct.__Slip_Device, ptr %39, i32 0, i32 0
  %41 = getelementptr inbounds %struct.__device_intrf, ptr %40, i32 0, i32 16
  store ptr @_Z16SlipIntrfSetRateP14__device_intrfj, ptr %41, align 8, !tbaa !30
  %42 = load ptr, ptr %5, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.__Slip_Device, ptr %42, i32 0, i32 0
  %44 = getelementptr inbounds %struct.__device_intrf, ptr %43, i32 0, i32 17
  store ptr @_Z16SlipIntrfStartRxP14__device_intrfj, ptr %44, align 8, !tbaa !31
  %45 = load i8, ptr %7, align 1, !tbaa !9, !range !32, !noundef !33
  %46 = trunc i8 %45 to i1
  %47 = zext i1 %46 to i32
  %48 = icmp eq i32 %47, 1
  br i1 %48, label %49, label %53

49:                                               ; preds = %15
  %50 = load ptr, ptr %5, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.__Slip_Device, ptr %50, i32 0, i32 0
  %52 = getelementptr inbounds %struct.__device_intrf, ptr %51, i32 0, i32 18
  store ptr @_Z23SlipIntrfRxDataBlockingP14__device_intrfPhi, ptr %52, align 8, !tbaa !34
  br label %57

53:                                               ; preds = %15
  %54 = load ptr, ptr %5, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.__Slip_Device, ptr %54, i32 0, i32 0
  %56 = getelementptr inbounds %struct.__device_intrf, ptr %55, i32 0, i32 18
  store ptr @_Z26SlipIntrfRxDataNonBlockingP14__device_intrfPhi, ptr %56, align 8, !tbaa !34
  br label %57

57:                                               ; preds = %53, %49
  %58 = load ptr, ptr %5, align 8, !tbaa !5
  %59 = getelementptr inbounds %struct.__Slip_Device, ptr %58, i32 0, i32 0
  %60 = getelementptr inbounds %struct.__device_intrf, ptr %59, i32 0, i32 19
  store ptr @_Z15SlipIntrfStopRxP14__device_intrf, ptr %60, align 8, !tbaa !35
  %61 = load ptr, ptr %5, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.__Slip_Device, ptr %61, i32 0, i32 0
  %63 = getelementptr inbounds %struct.__device_intrf, ptr %62, i32 0, i32 20
  store ptr @_Z16SlipIntrfStartTxP14__device_intrfj, ptr %63, align 8, !tbaa !36
  %64 = load ptr, ptr %5, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.__Slip_Device, ptr %64, i32 0, i32 0
  %66 = getelementptr inbounds %struct.__device_intrf, ptr %65, i32 0, i32 21
  store ptr @_Z15SlipIntrfTxDataP14__device_intrfPhi, ptr %66, align 8, !tbaa !37
  %67 = load ptr, ptr %5, align 8, !tbaa !5
  %68 = getelementptr inbounds %struct.__Slip_Device, ptr %67, i32 0, i32 0
  %69 = getelementptr inbounds %struct.__device_intrf, ptr %68, i32 0, i32 23
  store ptr @_Z15SlipIntrfStopTxP14__device_intrf, ptr %69, align 8, !tbaa !38
  %70 = load ptr, ptr %5, align 8, !tbaa !5
  %71 = getelementptr inbounds %struct.__Slip_Device, ptr %70, i32 0, i32 0
  %72 = getelementptr inbounds %struct.__device_intrf, ptr %71, i32 0, i32 1
  store i32 0, ptr %72, align 8, !tbaa !39
  %73 = load ptr, ptr %5, align 8, !tbaa !5
  %74 = getelementptr inbounds %struct.__Slip_Device, ptr %73, i32 0, i32 0
  %75 = getelementptr inbounds %struct.__device_intrf, ptr %74, i32 0, i32 2
  store ptr null, ptr %75, align 4, !tbaa !40
  %76 = load ptr, ptr %5, align 8, !tbaa !5
  %77 = getelementptr inbounds %struct.__Slip_Device, ptr %76, i32 0, i32 0
  %78 = getelementptr inbounds %struct.__device_intrf, ptr %77, i32 0, i32 5
  store i32 0, ptr %78, align 8, !tbaa !41
  %79 = load ptr, ptr %5, align 8, !tbaa !5
  %80 = getelementptr inbounds %struct.__Slip_Device, ptr %79, i32 0, i32 0
  %81 = getelementptr inbounds %struct.__device_intrf, ptr %80, i32 0, i32 8
  store i8 0, ptr %81, align 4, !tbaa !42
  %82 = load ptr, ptr %5, align 8, !tbaa !5
  %83 = getelementptr inbounds %struct.__Slip_Device, ptr %82, i32 0, i32 0
  %84 = getelementptr inbounds %struct.__device_intrf, ptr %83, i32 0, i32 25
  store ptr @_Z17SlipIntrfPowerOffP14__device_intrf, ptr %84, align 8, !tbaa !43
  %85 = load ptr, ptr %5, align 8, !tbaa !5
  %86 = getelementptr inbounds %struct.__Slip_Device, ptr %85, i32 0, i32 0
  %87 = getelementptr inbounds %struct.__device_intrf, ptr %86, i32 0, i32 6
  %88 = call noundef i32 @_ZNSt13__atomic_baseIiEaSEi(ptr noundef nonnull align 4 dereferenceable(4) %87, i32 noundef 1) #3
  %89 = load ptr, ptr %5, align 8, !tbaa !5
  %90 = getelementptr inbounds %struct.__Slip_Device, ptr %89, i32 0, i32 0
  %91 = getelementptr inbounds %struct.__device_intrf, ptr %90, i32 0, i32 3
  call void @_ZSt17atomic_flag_clearPSt11atomic_flag(ptr noundef %91) #3
  store i1 true, ptr %4, align 1
  br label %92

92:                                               ; preds = %57, %14
  %93 = load i1, ptr %4, align 1
  ret i1 %93
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNSt13__atomic_baseIiEaSEi(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef) #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt17atomic_flag_clearPSt11atomic_flag(ptr noundef) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"_ZTS13__Slip_Device", !13, i64 0, !6, i64 160, !6, i64 168, !10, i64 176}
!13 = !{!"_ZTS14__device_intrf", !6, i64 0, !14, i64 8, !6, i64 12, !15, i64 20, !14, i64 24, !17, i64 28, !19, i64 32, !10, i64 36, !10, i64 37, !20, i64 38, !20, i64 39, !22, i64 40, !6, i64 48, !6, i64 56, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !6, i64 120, !6, i64 128, !6, i64 136, !6, i64 144, !6, i64 152}
!14 = !{!"int", !7, i64 0}
!15 = !{!"_ZTSSt11atomic_flag", !16, i64 0}
!16 = !{!"_ZTSSt18__atomic_flag_base", !10, i64 0}
!17 = !{!"_ZTSSt6atomicIiE", !18, i64 0}
!18 = !{!"_ZTSSt13__atomic_baseIiE", !14, i64 0}
!19 = !{!"_ZTS16__Dev_Intrf_Type", !7, i64 0}
!20 = !{!"_ZTSSt6atomicIbE", !21, i64 0}
!21 = !{!"_ZTSSt13__atomic_baseIbE", !10, i64 0}
!22 = !{!"long", !7, i64 0}
!23 = !{!12, !6, i64 160}
!24 = !{!12, !6, i64 168}
!25 = !{!12, !10, i64 176}
!26 = !{!12, !19, i64 32}
!27 = !{!12, !6, i64 48}
!28 = !{!12, !6, i64 56}
!29 = !{!12, !6, i64 64}
!30 = !{!12, !6, i64 72}
!31 = !{!12, !6, i64 80}
!32 = !{i8 0, i8 2}
!33 = !{}
!34 = !{!12, !6, i64 88}
!35 = !{!12, !6, i64 96}
!36 = !{!12, !6, i64 104}
!37 = !{!12, !6, i64 112}
!38 = !{!12, !6, i64 128}
!39 = !{!12, !14, i64 8}
!40 = !{!12, !6, i64 12}
!41 = !{!12, !14, i64 24}
!42 = !{!12, !10, i64 36}
!43 = !{!12, !6, i64 144}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z16SlipIntrfDisableP14__device_intrf(ptr noundef) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z15SlipIntrfEnableP14__device_intrf(ptr noundef) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z16SlipIntrfGetRateP14__device_intrf(ptr noundef) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z16SlipIntrfSetRateP14__device_intrfj(ptr noundef, i32 noundef) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z16SlipIntrfStartRxP14__device_intrfj(ptr noundef, i32 noundef) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z23SlipIntrfRxDataBlockingP14__device_intrfPhi(ptr noundef, ptr noundef, i32 noundef) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z26SlipIntrfRxDataNonBlockingP14__device_intrfPhi(ptr noundef, ptr noundef, i32 noundef) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z15SlipIntrfStopRxP14__device_intrf(ptr noundef) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z16SlipIntrfStartTxP14__device_intrfj(ptr noundef, i32 noundef) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z15SlipIntrfTxDataP14__device_intrfPhi(ptr noundef, ptr noundef, i32 noundef) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z15SlipIntrfStopTxP14__device_intrf(ptr noundef) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z17SlipIntrfPowerOffP14__device_intrf(ptr noundef) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @SlipInit(ptr noundef %0, ptr noundef %1, i1 noundef zeroext %2) local_unnamed_addr #1 {
  %4 = icmp ne ptr %0, null
  %5 = icmp ne ptr %1, null
  %or.cond.not = and i1 %4, %5
  br i1 %or.cond.not, label %6, label %29

6:                                                ; preds = %3
  store ptr %0, ptr %0, align 8, !tbaa !5
  %7 = getelementptr inbounds i8, ptr %0, i64 160
  store ptr %1, ptr %7, align 8, !tbaa !21
  %8 = getelementptr inbounds i8, ptr %0, i64 168
  store ptr null, ptr %8, align 8, !tbaa !22
  %9 = getelementptr inbounds i8, ptr %0, i64 176
  store volatile i8 0, ptr %9, align 8, !tbaa !23
  %10 = getelementptr inbounds i8, ptr %0, i64 32
  store i32 6, ptr %10, align 8, !tbaa !24
  %11 = getelementptr inbounds i8, ptr %0, i64 48
  store ptr @_Z16SlipIntrfDisableP14__device_intrf, ptr %11, align 8, !tbaa !25
  %12 = getelementptr inbounds i8, ptr %0, i64 56
  store ptr @_Z15SlipIntrfEnableP14__device_intrf, ptr %12, align 8, !tbaa !26
  %13 = getelementptr inbounds i8, ptr %0, i64 64
  store ptr @_Z16SlipIntrfGetRateP14__device_intrf, ptr %13, align 8, !tbaa !27
  %14 = getelementptr inbounds i8, ptr %0, i64 72
  store ptr @_Z16SlipIntrfSetRateP14__device_intrfj, ptr %14, align 8, !tbaa !28
  %15 = getelementptr inbounds i8, ptr %0, i64 80
  store ptr @_Z16SlipIntrfStartRxP14__device_intrfj, ptr %15, align 8, !tbaa !29
  %spec.select = select i1 %2, ptr @_Z23SlipIntrfRxDataBlockingP14__device_intrfPhi, ptr @_Z26SlipIntrfRxDataNonBlockingP14__device_intrfPhi
  %16 = getelementptr inbounds i8, ptr %0, i64 88
  store ptr %spec.select, ptr %16, align 8
  %17 = getelementptr inbounds i8, ptr %0, i64 96
  store ptr @_Z15SlipIntrfStopRxP14__device_intrf, ptr %17, align 8, !tbaa !30
  %18 = getelementptr inbounds i8, ptr %0, i64 104
  store ptr @_Z16SlipIntrfStartTxP14__device_intrfj, ptr %18, align 8, !tbaa !31
  %19 = getelementptr inbounds i8, ptr %0, i64 112
  store ptr @_Z15SlipIntrfTxDataP14__device_intrfPhi, ptr %19, align 8, !tbaa !32
  %20 = getelementptr inbounds i8, ptr %0, i64 128
  store ptr @_Z15SlipIntrfStopTxP14__device_intrf, ptr %20, align 8, !tbaa !33
  %21 = getelementptr inbounds i8, ptr %0, i64 8
  store i32 0, ptr %21, align 8, !tbaa !34
  %22 = getelementptr inbounds i8, ptr %0, i64 12
  store ptr null, ptr %22, align 4, !tbaa !35
  %23 = getelementptr inbounds i8, ptr %0, i64 24
  store i32 0, ptr %23, align 8, !tbaa !36
  %24 = getelementptr inbounds i8, ptr %0, i64 36
  store i8 0, ptr %24, align 4, !tbaa !37
  %25 = getelementptr inbounds i8, ptr %0, i64 144
  store ptr @_Z17SlipIntrfPowerOffP14__device_intrf, ptr %25, align 8, !tbaa !38
  %26 = getelementptr inbounds i8, ptr %0, i64 28
  %27 = tail call noundef i32 @_ZNSt13__atomic_baseIiEaSEi(ptr noundef nonnull align 4 dereferenceable(4) %26, i32 noundef 1) #3
  %28 = getelementptr inbounds i8, ptr %0, i64 20
  tail call void @_ZSt17atomic_flag_clearPSt11atomic_flag(ptr noundef nonnull %28) #3
  br label %29

29:                                               ; preds = %3, %6
  ret i1 %or.cond.not
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNSt13__atomic_baseIiEaSEi(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt17atomic_flag_clearPSt11atomic_flag(ptr noundef) local_unnamed_addr #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"_ZTS13__Slip_Device", !7, i64 0, !8, i64 160, !8, i64 168, !14, i64 176}
!7 = !{!"_ZTS14__device_intrf", !8, i64 0, !11, i64 8, !8, i64 12, !12, i64 20, !11, i64 24, !15, i64 28, !17, i64 32, !14, i64 36, !14, i64 37, !18, i64 38, !18, i64 39, !20, i64 40, !8, i64 48, !8, i64 56, !8, i64 64, !8, i64 72, !8, i64 80, !8, i64 88, !8, i64 96, !8, i64 104, !8, i64 112, !8, i64 120, !8, i64 128, !8, i64 136, !8, i64 144, !8, i64 152}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"_ZTSSt11atomic_flag", !13, i64 0}
!13 = !{!"_ZTSSt18__atomic_flag_base", !14, i64 0}
!14 = !{!"bool", !9, i64 0}
!15 = !{!"_ZTSSt6atomicIiE", !16, i64 0}
!16 = !{!"_ZTSSt13__atomic_baseIiE", !11, i64 0}
!17 = !{!"_ZTS16__Dev_Intrf_Type", !9, i64 0}
!18 = !{!"_ZTSSt6atomicIbE", !19, i64 0}
!19 = !{!"_ZTSSt13__atomic_baseIbE", !14, i64 0}
!20 = !{!"long", !9, i64 0}
!21 = !{!6, !8, i64 160}
!22 = !{!6, !8, i64 168}
!23 = !{!6, !14, i64 176}
!24 = !{!6, !17, i64 32}
!25 = !{!6, !8, i64 48}
!26 = !{!6, !8, i64 56}
!27 = !{!6, !8, i64 64}
!28 = !{!6, !8, i64 72}
!29 = !{!6, !8, i64 80}
!30 = !{!6, !8, i64 96}
!31 = !{!6, !8, i64 104}
!32 = !{!6, !8, i64 112}
!33 = !{!6, !8, i64 128}
!34 = !{!6, !11, i64 8}
!35 = !{!6, !8, i64 12}
!36 = !{!6, !11, i64 24}
!37 = !{!6, !14, i64 36}
!38 = !{!6, !8, i64 144}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InstCombinePass,JumpThreadingPass,MergedLoadStoreMotionPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass