; LLVM IR from IOsonata/IOsonata :: ARM/Nordic/nRF52/nRF52840/exemples/BoschAppBoard/src (bmi3)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.bmi3_config_version = type { i16, i8, i16, i8 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_get_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_set_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) #2

; Function Attrs: nounwind uwtable
define dso_local signext i8 @bmi3_get_config_version(ptr noundef %0, ptr noundef %1) #2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  %6 = alloca [2 x i8], align 1
  %7 = alloca [6 x i8], align 1
  %8 = alloca i16, align 2
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #3
  store i8 0, ptr %5, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 2, ptr %6) #3
  call void @llvm.memset.p0.i64(ptr align 1 %6, i8 0, i64 2, i1 false)
  call void @llvm.lifetime.start.p0(i64 6, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 2, ptr %8) #3
  %9 = load ptr, ptr %3, align 8, !tbaa !5
  %10 = icmp ne ptr %9, null
  br i1 %10, label %11, label %74

11:                                               ; preds = %2
  %12 = getelementptr inbounds [2 x i8], ptr %6, i64 0, i64 0
  %13 = load ptr, ptr %4, align 8, !tbaa !5
  %14 = call signext i8 @bmi3_set_regs(i8 noundef zeroext 65, ptr noundef %12, i16 noundef zeroext 2, ptr noundef %13)
  store i8 %14, ptr %5, align 1, !tbaa !9
  %15 = load i8, ptr %5, align 1, !tbaa !9
  %16 = sext i8 %15 to i32
  %17 = icmp eq i32 %16, 0
  br i1 %17, label %18, label %73

18:                                               ; preds = %11
  %19 = getelementptr inbounds [6 x i8], ptr %7, i64 0, i64 0
  %20 = load ptr, ptr %4, align 8, !tbaa !5
  %21 = call signext i8 @bmi3_get_regs(i8 noundef zeroext 66, ptr noundef %19, i16 noundef zeroext 6, ptr noundef %20)
  store i8 %21, ptr %5, align 1, !tbaa !9
  %22 = load i8, ptr %5, align 1, !tbaa !9
  %23 = sext i8 %22 to i32
  %24 = icmp eq i32 %23, 0
  br i1 %24, label %25, label %72

25:                                               ; preds = %18
  %26 = getelementptr inbounds [6 x i8], ptr %7, i64 0, i64 0
  %27 = load i8, ptr %26, align 1, !tbaa !9
  %28 = zext i8 %27 to i32
  %29 = getelementptr inbounds [6 x i8], ptr %7, i64 0, i64 1
  %30 = load i8, ptr %29, align 1, !tbaa !9
  %31 = zext i8 %30 to i16
  %32 = zext i16 %31 to i32
  %33 = shl i32 %32, 8
  %34 = or i32 %28, %33
  %35 = trunc i32 %34 to i16
  store i16 %35, ptr %8, align 2, !tbaa !10
  %36 = load i16, ptr %8, align 2, !tbaa !10
  %37 = zext i16 %36 to i32
  %38 = and i32 %37, 1023
  %39 = trunc i32 %38 to i8
  %40 = load ptr, ptr %3, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.bmi3_config_version, ptr %40, i32 0, i32 1
  store i8 %39, ptr %41, align 2, !tbaa !12
  %42 = load i16, ptr %8, align 2, !tbaa !10
  %43 = zext i16 %42 to i32
  %44 = and i32 %43, 64512
  %45 = ashr i32 %44, 10
  %46 = trunc i32 %45 to i16
  %47 = load ptr, ptr %3, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.bmi3_config_version, ptr %47, i32 0, i32 0
  store i16 %46, ptr %48, align 2, !tbaa !14
  %49 = getelementptr inbounds [6 x i8], ptr %7, i64 0, i64 2
  %50 = load i8, ptr %49, align 1, !tbaa !9
  %51 = zext i8 %50 to i32
  %52 = getelementptr inbounds [6 x i8], ptr %7, i64 0, i64 3
  %53 = load i8, ptr %52, align 1, !tbaa !9
  %54 = zext i8 %53 to i16
  %55 = zext i16 %54 to i32
  %56 = shl i32 %55, 8
  %57 = or i32 %51, %56
  %58 = trunc i32 %57 to i16
  store i16 %58, ptr %8, align 2, !tbaa !10
  %59 = load i16, ptr %8, align 2, !tbaa !10
  %60 = zext i16 %59 to i32
  %61 = and i32 %60, 1023
  %62 = trunc i32 %61 to i8
  %63 = load ptr, ptr %3, align 8, !tbaa !5
  %64 = getelementptr inbounds %struct.bmi3_config_version, ptr %63, i32 0, i32 3
  store i8 %62, ptr %64, align 2, !tbaa !15
  %65 = load i16, ptr %8, align 2, !tbaa !10
  %66 = zext i16 %65 to i32
  %67 = and i32 %66, 64512
  %68 = ashr i32 %67, 10
  %69 = trunc i32 %68 to i16
  %70 = load ptr, ptr %3, align 8, !tbaa !5
  %71 = getelementptr inbounds %struct.bmi3_config_version, ptr %70, i32 0, i32 2
  store i16 %69, ptr %71, align 2, !tbaa !16
  br label %72

72:                                               ; preds = %25, %18
  br label %73

73:                                               ; preds = %72, %11
  br label %75

74:                                               ; preds = %2
  store i8 -1, ptr %5, align 1, !tbaa !9
  br label %75

75:                                               ; preds = %74, %73
  %76 = load i8, ptr %5, align 1, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 2, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 6, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #3
  ret i8 %76
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"short", !7, i64 0}
!12 = !{!13, !7, i64 2}
!13 = !{!"bmi3_config_version", !11, i64 0, !7, i64 2, !11, i64 4, !7, i64 6}
!14 = !{!13, !11, i64 0}
!15 = !{!13, !7, i64 6}
!16 = !{!13, !11, i64 4}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_get_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_set_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local signext i8 @bmi3_get_config_version(ptr noundef writeonly %0, ptr noundef %1) local_unnamed_addr #1 {
  %3 = alloca [2 x i8], align 2
  %4 = alloca [6 x i8], align 1
  call void @llvm.lifetime.start.p0(i64 2, ptr nonnull %3) #2
  store i16 0, ptr %3, align 2
  call void @llvm.lifetime.start.p0(i64 6, ptr nonnull %4) #2
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %26, label %5

5:                                                ; preds = %2
  %6 = call signext i8 @bmi3_set_regs(i8 noundef zeroext 65, ptr noundef nonnull %3, i16 noundef zeroext 2, ptr noundef %1)
  %7 = icmp eq i8 %6, 0
  br i1 %7, label %8, label %26

8:                                                ; preds = %5
  %9 = call signext i8 @bmi3_get_regs(i8 noundef zeroext 66, ptr noundef nonnull %4, i16 noundef zeroext 6, ptr noundef %1)
  %10 = icmp eq i8 %9, 0
  br i1 %10, label %11, label %26

11:                                               ; preds = %8
  %12 = load i8, ptr %4, align 1, !tbaa !5
  %13 = getelementptr inbounds i8, ptr %4, i64 1
  %14 = load i8, ptr %13, align 1, !tbaa !5
  %15 = getelementptr inbounds i8, ptr %0, i64 2
  store i8 %12, ptr %15, align 2, !tbaa !8
  %16 = lshr i8 %14, 2
  %17 = zext nneg i8 %16 to i16
  store i16 %17, ptr %0, align 2, !tbaa !11
  %18 = getelementptr inbounds i8, ptr %4, i64 2
  %19 = load i8, ptr %18, align 1, !tbaa !5
  %20 = getelementptr inbounds i8, ptr %4, i64 3
  %21 = load i8, ptr %20, align 1, !tbaa !5
  %22 = getelementptr inbounds i8, ptr %0, i64 6
  store i8 %19, ptr %22, align 2, !tbaa !12
  %23 = lshr i8 %21, 2
  %24 = zext nneg i8 %23 to i16
  %25 = getelementptr inbounds i8, ptr %0, i64 4
  store i16 %24, ptr %25, align 2, !tbaa !13
  br label %26

26:                                               ; preds = %2, %5, %11, %8
  %.0 = phi i8 [ 0, %11 ], [ %9, %8 ], [ %6, %5 ], [ -1, %2 ]
  call void @llvm.lifetime.end.p0(i64 6, ptr nonnull %4) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %3) #2
  ret i8 %.0
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !6, i64 2}
!9 = !{!"bmi3_config_version", !10, i64 0, !6, i64 2, !10, i64 4, !6, i64 6}
!10 = !{!"short", !6, i64 0}
!11 = !{!9, !10, i64 0}
!12 = !{!9, !6, i64 6}
!13 = !{!9, !10, i64 4}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass