; LLVM IR from sgtlaugh/algovault :: code_library/misc/15_puzzle_solver.ll (Z8ida_stariiiiiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@str = external dso_local global [60 x i8], align 16
@found = external dso_local global i32, align 4
@ar = external dso_local global [4 x [4 x i32]], align 16
@.str = external hidden unnamed_addr constant [34 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [5 x i8], align 1
@_ZL2dx = external hidden constant [4 x i32], align 16
@_ZL2dy = external hidden constant [4 x i32], align 16
@_ZL3dir = external hidden constant [5 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z8get_costii(i32 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z8ida_stariiiiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7) #2 {
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  store i32 %0, ptr %10, align 4, !tbaa !5
  store i32 %1, ptr %11, align 4, !tbaa !5
  store i32 %2, ptr %12, align 4, !tbaa !5
  store i32 %3, ptr %13, align 4, !tbaa !5
  store i32 %4, ptr %14, align 4, !tbaa !5
  store i32 %5, ptr %15, align 4, !tbaa !5
  store i32 %6, ptr %16, align 4, !tbaa !5
  store i32 %7, ptr %17, align 4, !tbaa !5
  %26 = load i32, ptr @found, align 4, !tbaa !5
  %27 = icmp ne i32 %26, 0
  br i1 %27, label %28, label %29

28:                                               ; preds = %8
  store i32 1073741824, ptr %9, align 4
  br label %159

29:                                               ; preds = %8
  %30 = load i32, ptr %17, align 4, !tbaa !5
  %31 = icmp ne i32 %30, 0
  br i1 %31, label %40, label %32

32:                                               ; preds = %29
  store i32 1, ptr @found, align 4, !tbaa !5
  %33 = load i32, ptr %16, align 4, !tbaa !5
  %34 = sext i32 %33 to i64
  %35 = getelementptr inbounds [60 x i8], ptr @str, i64 0, i64 %34
  store i8 0, ptr %35, align 1, !tbaa !9
  %36 = load i32, ptr %14, align 4, !tbaa !5
  %37 = call i32 (ptr, ...) @printf(ptr noundef @.str, i32 noundef %36)
  %38 = call i32 (ptr, ...) @printf(ptr noundef @.str.1, ptr noundef @str)
  %39 = load i32, ptr %14, align 4, !tbaa !5
  store i32 %39, ptr %9, align 4
  br label %159

40:                                               ; preds = %29
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #5
  %41 = load i32, ptr %14, align 4, !tbaa !5
  %42 = load i32, ptr %17, align 4, !tbaa !5
  %43 = add nsw i32 %41, %42
  store i32 %43, ptr %18, align 4, !tbaa !5
  %44 = load i32, ptr %18, align 4, !tbaa !5
  %45 = load i32, ptr %15, align 4, !tbaa !5
  %46 = icmp sgt i32 %44, %45
  br i1 %46, label %47, label %49

47:                                               ; preds = %40
  %48 = load i32, ptr %18, align 4, !tbaa !5
  store i32 %48, ptr %9, align 4
  store i32 1, ptr %19, align 4
  br label %158

49:                                               ; preds = %40
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #5
  store i32 1048576, ptr %25, align 4, !tbaa !5
  store i32 0, ptr %20, align 4, !tbaa !5
  br label %50

50:                                               ; preds = %152, %49
  %51 = load i32, ptr %20, align 4, !tbaa !5
  %52 = icmp slt i32 %51, 4
  br i1 %52, label %53, label %155

53:                                               ; preds = %50
  %54 = load i32, ptr %10, align 4, !tbaa !5
  %55 = load i32, ptr %20, align 4, !tbaa !5
  %56 = sext i32 %55 to i64
  %57 = getelementptr inbounds [4 x i32], ptr @_ZL2dx, i64 0, i64 %56
  %58 = load i32, ptr %57, align 4, !tbaa !5
  %59 = add nsw i32 %54, %58
  store i32 %59, ptr %21, align 4, !tbaa !5
  %60 = load i32, ptr %11, align 4, !tbaa !5
  %61 = load i32, ptr %20, align 4, !tbaa !5
  %62 = sext i32 %61 to i64
  %63 = getelementptr inbounds [4 x i32], ptr @_ZL2dy, i64 0, i64 %62
  %64 = load i32, ptr %63, align 4, !tbaa !5
  %65 = add nsw i32 %60, %64
  store i32 %65, ptr %22, align 4, !tbaa !5
  %66 = load i32, ptr %21, align 4, !tbaa !5
  %67 = icmp sge i32 %66, 0
  br i1 %67, label %68, label %151

68:                                               ; preds = %53
  %69 = load i32, ptr %21, align 4, !tbaa !5
  %70 = icmp slt i32 %69, 4
  br i1 %70, label %71, label %151

71:                                               ; preds = %68
  %72 = load i32, ptr %22, align 4, !tbaa !5
  %73 = icmp sge i32 %72, 0
  br i1 %73, label %74, label %151

74:                                               ; preds = %71
  %75 = load i32, ptr %22, align 4, !tbaa !5
  %76 = icmp slt i32 %75, 4
  br i1 %76, label %77, label %151

77:                                               ; preds = %74
  %78 = load i32, ptr %21, align 4, !tbaa !5
  %79 = load i32, ptr %12, align 4, !tbaa !5
  %80 = icmp eq i32 %78, %79
  br i1 %80, label %81, label %85

81:                                               ; preds = %77
  %82 = load i32, ptr %22, align 4, !tbaa !5
  %83 = load i32, ptr %13, align 4, !tbaa !5
  %84 = icmp eq i32 %82, %83
  br i1 %84, label %151, label %85

85:                                               ; preds = %81, %77
  %86 = load i32, ptr %17, align 4, !tbaa !5
  store i32 %86, ptr %23, align 4, !tbaa !5
  %87 = load i32, ptr %21, align 4, !tbaa !5
  %88 = load i32, ptr %22, align 4, !tbaa !5
  %89 = call noundef i32 @_Z8get_costii(i32 noundef %87, i32 noundef %88)
  %90 = load i32, ptr %23, align 4, !tbaa !5
  %91 = sub nsw i32 %90, %89
  store i32 %91, ptr %23, align 4, !tbaa !5
  %92 = load i32, ptr %10, align 4, !tbaa !5
  %93 = sext i32 %92 to i64
  %94 = getelementptr inbounds [4 x [4 x i32]], ptr @ar, i64 0, i64 %93
  %95 = load i32, ptr %11, align 4, !tbaa !5
  %96 = sext i32 %95 to i64
  %97 = getelementptr inbounds [4 x i32], ptr %94, i64 0, i64 %96
  %98 = load i32, ptr %21, align 4, !tbaa !5
  %99 = sext i32 %98 to i64
  %100 = getelementptr inbounds [4 x [4 x i32]], ptr @ar, i64 0, i64 %99
  %101 = load i32, ptr %22, align 4, !tbaa !5
  %102 = sext i32 %101 to i64
  %103 = getelementptr inbounds [4 x i32], ptr %100, i64 0, i64 %102
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %97, ptr noundef nonnull align 4 dereferenceable(4) %103) #5
  %104 = load i32, ptr %10, align 4, !tbaa !5
  %105 = load i32, ptr %11, align 4, !tbaa !5
  %106 = call noundef i32 @_Z8get_costii(i32 noundef %104, i32 noundef %105)
  %107 = load i32, ptr %23, align 4, !tbaa !5
  %108 = add nsw i32 %107, %106
  store i32 %108, ptr %23, align 4, !tbaa !5
  %109 = load i32, ptr %20, align 4, !tbaa !5
  %110 = sext i32 %109 to i64
  %111 = getelementptr inbounds [5 x i8], ptr @_ZL3dir, i64 0, i64 %110
  %112 = load i8, ptr %111, align 1, !tbaa !9
  %113 = load i32, ptr %16, align 4, !tbaa !5
  %114 = sext i32 %113 to i64
  %115 = getelementptr inbounds [60 x i8], ptr @str, i64 0, i64 %114
  store i8 %112, ptr %115, align 1, !tbaa !9
  %116 = load i32, ptr %21, align 4, !tbaa !5
  %117 = load i32, ptr %22, align 4, !tbaa !5
  %118 = load i32, ptr %10, align 4, !tbaa !5
  %119 = load i32, ptr %11, align 4, !tbaa !5
  %120 = load i32, ptr %14, align 4, !tbaa !5
  %121 = add nsw i32 %120, 1
  %122 = load i32, ptr %15, align 4, !tbaa !5
  %123 = load i32, ptr %16, align 4, !tbaa !5
  %124 = add nsw i32 %123, 1
  %125 = load i32, ptr %23, align 4, !tbaa !5
  %126 = call noundef i32 @_Z8ida_stariiiiiiii(i32 noundef %116, i32 noundef %117, i32 noundef %118, i32 noundef %119, i32 noundef %121, i32 noundef %122, i32 noundef %124, i32 noundef %125)
  store i32 %126, ptr %24, align 4, !tbaa !5
  %127 = load i32, ptr %10, align 4, !tbaa !5
  %128 = sext i32 %127 to i64
  %129 = getelementptr inbounds [4 x [4 x i32]], ptr @ar, i64 0, i64 %128
  %130 = load i32, ptr %11, align 4, !tbaa !5
  %131 = sext i32 %130 to i64
  %132 = getelementptr inbounds [4 x i32], ptr %129, i64 0, i64 %131
  %133 = load i32, ptr %21, align 4, !tbaa !5
  %134 = sext i32 %133 to i64
  %135 = getelementptr inbounds [4 x [4 x i32]], ptr @ar, i64 0, i64 %134
  %136 = load i32, ptr %22, align 4, !tbaa !5
  %137 = sext i32 %136 to i64
  %138 = getelementptr inbounds [4 x i32], ptr %135, i64 0, i64 %137
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %132, ptr noundef nonnull align 4 dereferenceable(4) %138) #5
  %139 = load i32, ptr %24, align 4, !tbaa !5
  %140 = load i32, ptr %25, align 4, !tbaa !5
  %141 = icmp slt i32 %139, %140
  br i1 %141, label %142, label %144

142:                                              ; preds = %85
  %143 = load i32, ptr %24, align 4, !tbaa !5
  store i32 %143, ptr %25, align 4, !tbaa !5
  br label %144

144:                                              ; preds = %142, %85
  %145 = load i32, ptr %24, align 4, !tbaa !5
  %146 = load i32, ptr %15, align 4, !tbaa !5
  %147 = icmp sle i32 %145, %146
  br i1 %147, label %148, label %150

148:                                              ; preds = %144
  %149 = load i32, ptr %24, align 4, !tbaa !5
  store i32 %149, ptr %9, align 4
  store i32 1, ptr %19, align 4
  br label %157

150:                                              ; preds = %144
  br label %151

151:                                              ; preds = %150, %81, %74, %71, %68, %53
  br label %152

152:                                              ; preds = %151
  %153 = load i32, ptr %20, align 4, !tbaa !5
  %154 = add nsw i32 %153, 1
  store i32 %154, ptr %20, align 4, !tbaa !5
  br label %50, !llvm.loop !10

155:                                              ; preds = %50
  %156 = load i32, ptr %25, align 4, !tbaa !5
  store i32 %156, ptr %9, align 4
  store i32 1, ptr %19, align 4
  br label %157

157:                                              ; preds = %155, %148
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #5
  br label %158

158:                                              ; preds = %157, %47
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #5
  br label %159

159:                                              ; preds = %158, %32, %28
  %160 = load i32, ptr %9, align 4
  ret i32 %160
}

declare i32 @printf(ptr noundef, ...) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #4

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@str = external dso_local global [60 x i8], align 16
@found = external dso_local local_unnamed_addr global i32, align 4
@ar = external dso_local global [4 x [4 x i32]], align 16
@.str = external hidden unnamed_addr constant [34 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [5 x i8], align 1
@_ZL2dx = external hidden local_unnamed_addr constant [4 x i32], align 16
@_ZL2dy = external hidden local_unnamed_addr constant [4 x i32], align 16
@_ZL3dir = external hidden local_unnamed_addr constant [5 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z8get_costii(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z8ida_stariiiiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7) local_unnamed_addr #0 {
  %9 = load i32, ptr @found, align 4, !tbaa !5
  %.not = icmp eq i32 %9, 0
  br i1 %.not, label %10, label %common.ret

10:                                               ; preds = %8
  %.not72 = icmp eq i32 %7, 0
  br i1 %.not72, label %11, label %16

11:                                               ; preds = %10
  store i32 1, ptr @found, align 4, !tbaa !5
  %12 = sext i32 %6 to i64
  %13 = getelementptr inbounds [60 x i8], ptr @str, i64 0, i64 %12
  store i8 0, ptr %13, align 1, !tbaa !9
  %14 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, i32 noundef %4)
  %15 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1, ptr noundef nonnull @str)
  br label %common.ret

16:                                               ; preds = %10
  %17 = add nsw i32 %7, %4
  %18 = icmp sgt i32 %17, %5
  br i1 %18, label %common.ret, label %.preheader

.preheader:                                       ; preds = %16
  %19 = sext i32 %0 to i64
  %20 = sext i32 %1 to i64
  %21 = getelementptr inbounds [4 x [4 x i32]], ptr @ar, i64 0, i64 %19, i64 %20
  %22 = sext i32 %6 to i64
  %23 = getelementptr inbounds [60 x i8], ptr @str, i64 0, i64 %22
  %24 = add nsw i32 %4, 1
  %25 = add nsw i32 %6, 1
  %26 = load i32, ptr @_ZL2dx, align 16, !tbaa !5
  %27 = add nsw i32 %26, %0
  %28 = load i32, ptr @_ZL2dy, align 16, !tbaa !5
  %29 = add nsw i32 %28, %1
  %or.cond = icmp ult i32 %27, 4
  %30 = icmp ult i32 %29, 4
  %or.cond5 = select i1 %or.cond, i1 %30, i1 false
  br i1 %or.cond5, label %31, label %44

31:                                               ; preds = %.preheader
  %32 = icmp eq i32 %27, %2
  %33 = icmp eq i32 %29, %3
  %or.cond74 = select i1 %32, i1 %33, i1 false
  br i1 %or.cond74, label %44, label %34

34:                                               ; preds = %31
  %35 = tail call noundef i32 @_Z8get_costii(i32 noundef %27, i32 noundef %29)
  %36 = sub i32 %7, %35
  %37 = zext nneg i32 %27 to i64
  %38 = zext nneg i32 %29 to i64
  %39 = getelementptr inbounds [4 x [4 x i32]], ptr @ar, i64 0, i64 %37, i64 %38
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %21, ptr noundef nonnull align 4 dereferenceable(4) %39) #4
  %40 = tail call noundef i32 @_Z8get_costii(i32 noundef %0, i32 noundef %1)
  %41 = add nsw i32 %36, %40
  %42 = load i8, ptr @_ZL3dir, align 1, !tbaa !9
  store i8 %42, ptr %23, align 1, !tbaa !9
  %43 = tail call noundef i32 @_Z8ida_stariiiiiiii(i32 noundef %27, i32 noundef %29, i32 noundef %0, i32 noundef %1, i32 noundef %24, i32 noundef %5, i32 noundef %25, i32 noundef %41)
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %21, ptr noundef nonnull align 4 dereferenceable(4) %39) #4
  %spec.select = tail call i32 @llvm.smin.i32(i32 %43, i32 1048576)
  %.not73 = icmp sgt i32 %43, %5
  br i1 %.not73, label %44, label %common.ret

44:                                               ; preds = %31, %.preheader, %34
  %.2 = phi i32 [ %spec.select, %34 ], [ 1048576, %.preheader ], [ 1048576, %31 ]
  %45 = load i32, ptr getelementptr inbounds (i8, ptr @_ZL2dx, i64 4), align 4, !tbaa !5
  %46 = add nsw i32 %45, %0
  %47 = load i32, ptr getelementptr inbounds (i8, ptr @_ZL2dy, i64 4), align 4, !tbaa !5
  %48 = add nsw i32 %47, %1
  %or.cond.1 = icmp ult i32 %46, 4
  %49 = icmp ult i32 %48, 4
  %or.cond5.1 = select i1 %or.cond.1, i1 %49, i1 false
  br i1 %or.cond5.1, label %50, label %63

50:                                               ; preds = %44
  %51 = icmp eq i32 %46, %2
  %52 = icmp eq i32 %48, %3
  %or.cond74.1 = select i1 %51, i1 %52, i1 false
  br i1 %or.cond74.1, label %63, label %53

53:                                               ; preds = %50
  %54 = tail call noundef i32 @_Z8get_costii(i32 noundef %46, i32 noundef %48)
  %55 = sub i32 %7, %54
  %56 = zext nneg i32 %46 to i64
  %57 = zext nneg i32 %48 to i64
  %58 = getelementptr inbounds [4 x [4 x i32]], ptr @ar, i64 0, i64 %56, i64 %57
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %21, ptr noundef nonnull align 4 dereferenceable(4) %58) #4
  %59 = tail call noundef i32 @_Z8get_costii(i32 noundef %0, i32 noundef %1)
  %60 = add nsw i32 %55, %59
  %61 = load i8, ptr getelementptr inbounds (i8, ptr @_ZL3dir, i64 1), align 1, !tbaa !9
  store i8 %61, ptr %23, align 1, !tbaa !9
  %62 = tail call noundef i32 @_Z8ida_stariiiiiiii(i32 noundef %46, i32 noundef %48, i32 noundef %0, i32 noundef %1, i32 noundef %24, i32 noundef %5, i32 noundef %25, i32 noundef %60)
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %21, ptr noundef nonnull align 4 dereferenceable(4) %58) #4
  %spec.select.1 = tail call i32 @llvm.smin.i32(i32 %62, i32 %.2)
  %.not73.1 = icmp sgt i32 %62, %5
  br i1 %.not73.1, label %63, label %common.ret

63:                                               ; preds = %53, %50, %44
  %.2.1 = phi i32 [ %spec.select.1, %53 ], [ %.2, %44 ], [ %.2, %50 ]
  %64 = load i32, ptr getelementptr inbounds (i8, ptr @_ZL2dx, i64 8), align 8, !tbaa !5
  %65 = add nsw i32 %64, %0
  %66 = load i32, ptr getelementptr inbounds (i8, ptr @_ZL2dy, i64 8), align 8, !tbaa !5
  %67 = add nsw i32 %66, %1
  %or.cond.2 = icmp ult i32 %65, 4
  %68 = icmp ult i32 %67, 4
  %or.cond5.2 = select i1 %or.cond.2, i1 %68, i1 false
  br i1 %or.cond5.2, label %69, label %82

69:                                               ; preds = %63
  %70 = icmp eq i32 %65, %2
  %71 = icmp eq i32 %67, %3
  %or.cond74.2 = select i1 %70, i1 %71, i1 false
  br i1 %or.cond74.2, label %82, label %72

72:                                               ; preds = %69
  %73 = tail call noundef i32 @_Z8get_costii(i32 noundef %65, i32 noundef %67)
  %74 = sub i32 %7, %73
  %75 = zext nneg i32 %65 to i64
  %76 = zext nneg i32 %67 to i64
  %77 = getelementptr inbounds [4 x [4 x i32]], ptr @ar, i64 0, i64 %75, i64 %76
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %21, ptr noundef nonnull align 4 dereferenceable(4) %77) #4
  %78 = tail call noundef i32 @_Z8get_costii(i32 noundef %0, i32 noundef %1)
  %79 = add nsw i32 %74, %78
  %80 = load i8, ptr getelementptr inbounds (i8, ptr @_ZL3dir, i64 2), align 1, !tbaa !9
  store i8 %80, ptr %23, align 1, !tbaa !9
  %81 = tail call noundef i32 @_Z8ida_stariiiiiiii(i32 noundef %65, i32 noundef %67, i32 noundef %0, i32 noundef %1, i32 noundef %24, i32 noundef %5, i32 noundef %25, i32 noundef %79)
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %21, ptr noundef nonnull align 4 dereferenceable(4) %77) #4
  %spec.select.2 = tail call i32 @llvm.smin.i32(i32 %81, i32 %.2.1)
  %.not73.2 = icmp sgt i32 %81, %5
  br i1 %.not73.2, label %82, label %common.ret

82:                                               ; preds = %72, %69, %63
  %.2.2 = phi i32 [ %spec.select.2, %72 ], [ %.2.1, %63 ], [ %.2.1, %69 ]
  %83 = load i32, ptr getelementptr inbounds (i8, ptr @_ZL2dx, i64 12), align 4, !tbaa !5
  %84 = add nsw i32 %83, %0
  %85 = load i32, ptr getelementptr inbounds (i8, ptr @_ZL2dy, i64 12), align 4, !tbaa !5
  %86 = add nsw i32 %85, %1
  %or.cond.3 = icmp ult i32 %84, 4
  %87 = icmp ult i32 %86, 4
  %or.cond5.3 = select i1 %or.cond.3, i1 %87, i1 false
  br i1 %or.cond5.3, label %88, label %common.ret

88:                                               ; preds = %82
  %89 = icmp eq i32 %84, %2
  %90 = icmp eq i32 %86, %3
  %or.cond74.3 = select i1 %89, i1 %90, i1 false
  br i1 %or.cond74.3, label %common.ret, label %91

common.ret:                                       ; preds = %11, %8, %16, %82, %88, %72, %53, %34, %91
  %common.ret.op = phi i32 [ %spec.select78, %91 ], [ %4, %11 ], [ 1073741824, %8 ], [ %17, %16 ], [ %43, %34 ], [ %62, %53 ], [ %81, %72 ], [ %.2.2, %82 ], [ %.2.2, %88 ]
  ret i32 %common.ret.op

91:                                               ; preds = %88
  %92 = tail call noundef i32 @_Z8get_costii(i32 noundef %84, i32 noundef %86)
  %93 = sub i32 %7, %92
  %94 = zext nneg i32 %84 to i64
  %95 = zext nneg i32 %86 to i64
  %96 = getelementptr inbounds [4 x [4 x i32]], ptr @ar, i64 0, i64 %94, i64 %95
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %21, ptr noundef nonnull align 4 dereferenceable(4) %96) #4
  %97 = tail call noundef i32 @_Z8get_costii(i32 noundef %0, i32 noundef %1)
  %98 = add nsw i32 %93, %97
  %99 = load i8, ptr getelementptr inbounds (i8, ptr @_ZL3dir, i64 3), align 1, !tbaa !9
  store i8 %99, ptr %23, align 1, !tbaa !9
  %100 = tail call noundef i32 @_Z8ida_stariiiiiiii(i32 noundef %84, i32 noundef %86, i32 noundef %0, i32 noundef %1, i32 noundef %24, i32 noundef %5, i32 noundef %25, i32 noundef %98)
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %21, ptr noundef nonnull align 4 dereferenceable(4) %96) #4
  %spec.select.3 = tail call i32 @llvm.smin.i32(i32 %100, i32 %.2.2)
  %.not73.3 = icmp sgt i32 %100, %5
  %spec.select78 = select i1 %.not73.3, i32 %spec.select.3, i32 %100
  br label %common.ret
}

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass