; LLVM IR from IOsonata/IOsonata :: src/sensors (accel_adxl362)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.AccelAdxl362 = type { %class.AccelSensor.base, i8, %class.Device }
%class.AccelSensor.base = type <{ %class.Sensor.base, %struct.__AccelSensor_Raw_Data, [5 x i8], ptr, i16, [2 x i8], [3 x [3 x float]], [3 x float] }>
%class.Sensor.base = type <{ ptr, i32, i32, i32, i32, i64, i8, [7 x i8], i64, i64, i32, i32, i32, i32, %"struct.std::atomic_flag" }>
%"struct.std::atomic_flag" = type { %"struct.std::__atomic_flag_base" }
%"struct.std::__atomic_flag_base" = type { i8 }
%struct.__AccelSensor_Raw_Data = type <{ i64, i16, i16, %union.anon }>
%union.anon = type { [3 x i16] }
%class.Device = type { ptr, i8, i32, ptr, ptr, i64, i8, ptr, i8, i32 }
%struct.__AccelSensor_Config = type <{ i32, i32, i32, i16, i32, i8, i32, ptr }>

@__const._ZN12AccelAdxl3624InitERK20__AccelSensor_ConfigP11DeviceIntrfP5Timer.cmd = external hidden unnamed_addr constant [3 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN12AccelAdxl3624InitERK20__AccelSensor_ConfigP11DeviceIntrfP5Timer(ptr noundef nonnull align 8 dereferenceable(157) %0, ptr noundef nonnull align 1 dereferenceable(31) %1, ptr noundef %2, ptr noundef %3) unnamed_addr #0 align 2 {
  %5 = alloca i1, align 1
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i16, align 2
  %11 = alloca [3 x i8], align 1
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store ptr %2, ptr %8, align 8, !tbaa !5
  store ptr %3, ptr %9, align 8, !tbaa !5
  %14 = load ptr, ptr %6, align 8
  %15 = getelementptr inbounds %class.AccelAdxl362, ptr %14, i32 0, i32 1
  %16 = load i8, ptr %15, align 4, !tbaa !9, !range !22, !noundef !23
  %17 = trunc i8 %16 to i1
  br i1 %17, label %18, label %19

18:                                               ; preds = %4
  store i1 true, ptr %5, align 1
  br label %174

19:                                               ; preds = %4
  %20 = load ptr, ptr %8, align 8, !tbaa !5
  %21 = icmp eq ptr %20, null
  br i1 %21, label %22, label %23

22:                                               ; preds = %19
  store i1 false, ptr %5, align 1
  br label %174

23:                                               ; preds = %19
  %24 = load ptr, ptr %14, align 8, !tbaa !24
  %25 = getelementptr i8, ptr %24, i64 -24
  %26 = load i64, ptr %25, align 8
  %27 = getelementptr inbounds i8, ptr %14, i64 %26
  %28 = load ptr, ptr %8, align 8, !tbaa !5
  call void @_ZN6Device9InterfaceEP11DeviceIntrf(ptr noundef nonnull align 8 dereferenceable(64) %27, ptr noundef %28)
  %29 = load ptr, ptr %14, align 8, !tbaa !24
  %30 = getelementptr i8, ptr %29, i64 -24
  %31 = load i64, ptr %30, align 8
  %32 = getelementptr inbounds i8, ptr %14, i64 %31
  %33 = load ptr, ptr %7, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.__AccelSensor_Config, ptr %33, i32 0, i32 0
  %35 = load i32, ptr %34, align 1, !tbaa !26
  %36 = load ptr, ptr %32, align 8, !tbaa !24
  %37 = getelementptr inbounds ptr, ptr %36, i64 6
  %38 = load ptr, ptr %37, align 8
  call void %38(ptr noundef nonnull align 8 dereferenceable(64) %32, i32 noundef %35)
  %39 = load ptr, ptr %9, align 8, !tbaa !5
  %40 = icmp ne ptr %39, null
  br i1 %40, label %41, label %48

41:                                               ; preds = %23
  %42 = load ptr, ptr %9, align 8, !tbaa !5
  %43 = load ptr, ptr %14, align 8, !tbaa !24
  %44 = getelementptr i8, ptr %43, i64 -24
  %45 = load i64, ptr %44, align 8
  %46 = getelementptr inbounds i8, ptr %14, i64 %45
  %47 = getelementptr inbounds %class.Device, ptr %46, i32 0, i32 4
  store ptr %42, ptr %47, align 8, !tbaa !29
  br label %48

48:                                               ; preds = %41, %23
  call void @llvm.lifetime.start.p0(i64 2, ptr %10) #4
  call void @llvm.lifetime.start.p0(i64 3, ptr %11) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 1 %11, ptr align 1 @__const._ZN12AccelAdxl3624InitERK20__AccelSensor_ConfigP11DeviceIntrfP5Timer.cmd, i64 3, i1 false)
  %49 = load ptr, ptr %14, align 8, !tbaa !24
  %50 = getelementptr i8, ptr %49, i64 -24
  %51 = load i64, ptr %50, align 8
  %52 = getelementptr inbounds i8, ptr %14, i64 %51
  %53 = getelementptr inbounds [3 x i8], ptr %11, i64 0, i64 0
  %54 = load ptr, ptr %52, align 8, !tbaa !24
  %55 = getelementptr inbounds ptr, ptr %54, i64 12
  %56 = load ptr, ptr %55, align 8
  %57 = call noundef zeroext i16 %56(ptr noundef nonnull align 8 dereferenceable(64) %52, ptr noundef %53, i32 noundef 2)
  store i16 %57, ptr %10, align 2, !tbaa !32
  %58 = load i16, ptr %10, align 2, !tbaa !32
  %59 = zext i16 %58 to i32
  %60 = icmp ne i32 %59, 7597
  br i1 %60, label %61, label %62

61:                                               ; preds = %48
  store i1 false, ptr %5, align 1
  store i32 1, ptr %12, align 4
  br label %173

62:                                               ; preds = %48
  %63 = load ptr, ptr %14, align 8, !tbaa !24
  %64 = getelementptr inbounds ptr, ptr %63, i64 28
  %65 = load ptr, ptr %64, align 8
  call void %65(ptr noundef nonnull align 8 dereferenceable(157) %14)
  %66 = load ptr, ptr %14, align 8, !tbaa !24
  %67 = getelementptr i8, ptr %66, i64 -24
  %68 = load i64, ptr %67, align 8
  %69 = getelementptr inbounds i8, ptr %14, i64 %68
  %70 = load i16, ptr %10, align 2, !tbaa !32
  %71 = zext i16 %70 to i64
  call void @_ZN6Device8DeviceIDEm(ptr noundef nonnull align 8 dereferenceable(64) %69, i64 noundef %71)
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  store i32 0, ptr %13, align 4, !tbaa !33
  %72 = getelementptr inbounds [3 x i8], ptr %11, i64 0, i64 0
  store i8 10, ptr %72, align 1, !tbaa !34
  %73 = getelementptr inbounds [3 x i8], ptr %11, i64 0, i64 1
  store i8 44, ptr %73, align 1, !tbaa !34
  %74 = getelementptr inbounds [3 x i8], ptr %11, i64 0, i64 2
  store i8 16, ptr %74, align 1, !tbaa !34
  %75 = load ptr, ptr %7, align 8, !tbaa !5
  %76 = getelementptr inbounds %struct.__AccelSensor_Config, ptr %75, i32 0, i32 2
  %77 = load i32, ptr %76, align 1, !tbaa !35
  %78 = icmp ult i32 %77, 25
  br i1 %78, label %79, label %85

79:                                               ; preds = %62
  store i32 12, ptr %13, align 4, !tbaa !33
  %80 = getelementptr inbounds [3 x i8], ptr %11, i64 0, i64 2
  %81 = load i8, ptr %80, align 1, !tbaa !34
  %82 = zext i8 %81 to i32
  %83 = or i32 %82, 0
  %84 = trunc i32 %83 to i8
  store i8 %84, ptr %80, align 1, !tbaa !34
  br label %139

85:                                               ; preds = %62
  %86 = load ptr, ptr %7, align 8, !tbaa !5
  %87 = getelementptr inbounds %struct.__AccelSensor_Config, ptr %86, i32 0, i32 2
  %88 = load i32, ptr %87, align 1, !tbaa !35
  %89 = icmp ult i32 %88, 50
  br i1 %89, label %90, label %96

90:                                               ; preds = %85
  store i32 25, ptr %13, align 4, !tbaa !33
  %91 = getelementptr inbounds [3 x i8], ptr %11, i64 0, i64 2
  %92 = load i8, ptr %91, align 1, !tbaa !34
  %93 = zext i8 %92 to i32
  %94 = or i32 %93, 1
  %95 = trunc i32 %94 to i8
  store i8 %95, ptr %91, align 1, !tbaa !34
  br label %138

96:                                               ; preds = %85
  %97 = load ptr, ptr %7, align 8, !tbaa !5
  %98 = getelementptr inbounds %struct.__AccelSensor_Config, ptr %97, i32 0, i32 2
  %99 = load i32, ptr %98, align 1, !tbaa !35
  %100 = icmp ult i32 %99, 100
  br i1 %100, label %101, label %107

101:                                              ; preds = %96
  store i32 50, ptr %13, align 4, !tbaa !33
  %102 = getelementptr inbounds [3 x i8], ptr %11, i64 0, i64 2
  %103 = load i8, ptr %102, align 1, !tbaa !34
  %104 = zext i8 %103 to i32
  %105 = or i32 %104, 2
  %106 = trunc i32 %105 to i8
  store i8 %106, ptr %102, align 1, !tbaa !34
  br label %137

107:                                              ; preds = %96
  %108 = load ptr, ptr %7, align 8, !tbaa !5
  %109 = getelementptr inbounds %struct.__AccelSensor_Config, ptr %108, i32 0, i32 2
  %110 = load i32, ptr %109, align 1, !tbaa !35
  %111 = icmp ult i32 %110, 200
  br i1 %111, label %112, label %118

112:                                              ; preds = %107
  store i32 100, ptr %13, align 4, !tbaa !33
  %113 = getelementptr inbounds [3 x i8], ptr %11, i64 0, i64 2
  %114 = load i8, ptr %113, align 1, !tbaa !34
  %115 = zext i8 %114 to i32
  %116 = or i32 %115, 3
  %117 = trunc i32 %116 to i8
  store i8 %117, ptr %113, align 1, !tbaa !34
  br label %136

118:                                              ; preds = %107
  %119 = load ptr, ptr %7, align 8, !tbaa !5
  %120 = getelementptr inbounds %struct.__AccelSensor_Config, ptr %119, i32 0, i32 2
  %121 = load i32, ptr %120, align 1, !tbaa !35
  %122 = icmp ult i32 %121, 400
  br i1 %122, label %123, label %129

123:                                              ; preds = %118
  store i32 200, ptr %13, align 4, !tbaa !33
  %124 = getelementptr inbounds [3 x i8], ptr %11, i64 0, i64 2
  %125 = load i8, ptr %124, align 1, !tbaa !34
  %126 = zext i8 %125 to i32
  %127 = or i32 %126, 4
  %128 = trunc i32 %127 to i8
  store i8 %128, ptr %124, align 1, !tbaa !34
  br label %135

129:                                              ; preds = %118
  store i32 400, ptr %13, align 4, !tbaa !33
  %130 = getelementptr inbounds [3 x i8], ptr %11, i64 0, i64 2
  %131 = load i8, ptr %130, align 1, !tbaa !34
  %132 = zext i8 %131 to i32
  %133 = or i32 %132, 5
  %134 = trunc i32 %133 to i8
  store i8 %134, ptr %130, align 1, !tbaa !34
  br label %135

135:                                              ; preds = %129, %123
  br label %136

136:                                              ; preds = %135, %112
  br label %137

137:                                              ; preds = %136, %101
  br label %138

138:                                              ; preds = %137, %90
  br label %139

139:                                              ; preds = %138, %79
  %140 = load ptr, ptr %14, align 8, !tbaa !24
  %141 = getelementptr i8, ptr %140, i64 -24
  %142 = load i64, ptr %141, align 8
  %143 = getelementptr inbounds i8, ptr %14, i64 %142
  %144 = getelementptr inbounds [3 x i8], ptr %11, i64 0, i64 0
  %145 = load ptr, ptr %143, align 8, !tbaa !24
  %146 = getelementptr inbounds ptr, ptr %145, i64 10
  %147 = load ptr, ptr %146, align 8
  %148 = call noundef i32 %147(ptr noundef nonnull align 8 dereferenceable(64) %143, ptr noundef %144, i32 noundef 3, ptr noundef null, i32 noundef 0)
  %149 = load ptr, ptr %7, align 8, !tbaa !5
  %150 = getelementptr inbounds %struct.__AccelSensor_Config, ptr %149, i32 0, i32 1
  %151 = load i32, ptr %150, align 1, !tbaa !36
  %152 = load ptr, ptr %7, align 8, !tbaa !5
  %153 = getelementptr inbounds %struct.__AccelSensor_Config, ptr %152, i32 0, i32 2
  %154 = load i32, ptr %153, align 1, !tbaa !35
  %155 = load ptr, ptr %14, align 8, !tbaa !24
  %156 = getelementptr inbounds ptr, ptr %155, i64 3
  %157 = load ptr, ptr %156, align 8
  %158 = call noundef zeroext i1 %157(ptr noundef nonnull align 8 dereferenceable(73) %14, i32 noundef %151, i32 noundef %154)
  %159 = load ptr, ptr %7, align 8, !tbaa !5
  %160 = getelementptr inbounds %struct.__AccelSensor_Config, ptr %159, i32 0, i32 3
  %161 = load i16, ptr %160, align 1, !tbaa !37
  %162 = load ptr, ptr %14, align 8, !tbaa !24
  %163 = getelementptr inbounds ptr, ptr %162, i64 21
  %164 = load ptr, ptr %163, align 8
  %165 = call noundef zeroext i16 %164(ptr noundef nonnull align 8 dereferenceable(157) %14, i16 noundef zeroext %161)
  %166 = load ptr, ptr %7, align 8, !tbaa !5
  %167 = getelementptr inbounds %struct.__AccelSensor_Config, ptr %166, i32 0, i32 5
  %168 = load i8, ptr %167, align 1, !tbaa !38
  %169 = icmp ne i8 %168, 0
  br i1 %169, label %170, label %171

170:                                              ; preds = %139
  br label %171

171:                                              ; preds = %170, %139
  %172 = getelementptr inbounds %class.AccelAdxl362, ptr %14, i32 0, i32 1
  store i8 1, ptr %172, align 4, !tbaa !9
  store i1 true, ptr %5, align 1
  store i32 1, ptr %12, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  br label %173

173:                                              ; preds = %171, %61
  call void @llvm.lifetime.end.p0(i64 3, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 2, ptr %10) #4
  br label %174

174:                                              ; preds = %173, %22, %18
  %175 = load i1, ptr %5, align 1
  ret i1 %175
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN6Device9InterfaceEP11DeviceIntrf(ptr noundef nonnull align 8 dereferenceable(64), ptr noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN6Device8DeviceIDEm(ptr noundef nonnull align 8 dereferenceable(64), i64 noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !17, i64 156}
!10 = !{!"_ZTS12AccelAdxl362", !11, i64 0, !17, i64 156}
!11 = !{!"_ZTS11AccelSensor", !12, i64 0, !20, i64 73, !6, i64 96, !21, i64 104, !7, i64 108, !7, i64 144}
!12 = !{!"_ZTS6Sensor", !13, i64 8, !14, i64 12, !15, i64 16, !13, i64 20, !16, i64 24, !17, i64 32, !16, i64 40, !16, i64 48, !13, i64 56, !13, i64 60, !13, i64 64, !13, i64 68, !18, i64 72}
!13 = !{!"int", !7, i64 0}
!14 = !{!"_ZTS14__Sensor_State", !7, i64 0}
!15 = !{!"_ZTS15__Sensor_OpMode", !7, i64 0}
!16 = !{!"long", !7, i64 0}
!17 = !{!"bool", !7, i64 0}
!18 = !{!"_ZTSSt11atomic_flag", !19, i64 0}
!19 = !{!"_ZTSSt18__atomic_flag_base", !17, i64 0}
!20 = !{!"_ZTS22__AccelSensor_Raw_Data", !16, i64 0, !21, i64 8, !21, i64 10, !7, i64 12}
!21 = !{!"short", !7, i64 0}
!22 = !{i8 0, i8 2}
!23 = !{}
!24 = !{!25, !25, i64 0}
!25 = !{!"vtable pointer", !8, i64 0}
!26 = !{!27, !13, i64 0}
!27 = !{!"_ZTS20__AccelSensor_Config", !13, i64 0, !15, i64 4, !13, i64 8, !21, i64 12, !13, i64 14, !7, i64 18, !28, i64 19, !6, i64 23}
!28 = !{!"_ZTS24__Dev_Interrupt_Polarity", !7, i64 0}
!29 = !{!30, !6, i64 24}
!30 = !{!"_ZTS6Device", !17, i64 8, !13, i64 12, !6, i64 16, !6, i64 24, !16, i64 32, !17, i64 40, !6, i64 48, !7, i64 56, !31, i64 60}
!31 = !{!"_ZTS21__Dev_Data_Byte_Order", !7, i64 0}
!32 = !{!21, !21, i64 0}
!33 = !{!13, !13, i64 0}
!34 = !{!7, !7, i64 0}
!35 = !{!27, !13, i64 8}
!36 = !{!27, !15, i64 4}
!37 = !{!27, !21, i64 12}
!38 = !{!27, !7, i64 18}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@__const._ZN12AccelAdxl3624InitERK20__AccelSensor_ConfigP11DeviceIntrfP5Timer.cmd = external hidden unnamed_addr constant [3 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN12AccelAdxl3624InitERK20__AccelSensor_ConfigP11DeviceIntrfP5Timer(ptr noundef nonnull align 8 dereferenceable(157) %0, ptr nocapture noundef nonnull readonly align 1 dereferenceable(31) %1, ptr noundef %2, ptr noundef %3) unnamed_addr #0 align 2 {
  %5 = alloca [3 x i8], align 1
  %6 = getelementptr inbounds i8, ptr %0, i64 156
  %7 = load i8, ptr %6, align 4, !tbaa !5, !range !21, !noundef !22
  %8 = trunc nuw i8 %7 to i1
  br i1 %8, label %81, label %9

9:                                                ; preds = %4
  %10 = icmp eq ptr %2, null
  br i1 %10, label %81, label %11

11:                                               ; preds = %9
  %12 = load ptr, ptr %0, align 8, !tbaa !23
  %13 = getelementptr i8, ptr %12, i64 -24
  %14 = load i64, ptr %13, align 8
  %15 = getelementptr inbounds i8, ptr %0, i64 %14
  tail call void @_ZN6Device9InterfaceEP11DeviceIntrf(ptr noundef nonnull align 8 dereferenceable(64) %15, ptr noundef nonnull %2)
  %16 = load ptr, ptr %0, align 8, !tbaa !23
  %17 = getelementptr i8, ptr %16, i64 -24
  %18 = load i64, ptr %17, align 8
  %19 = getelementptr inbounds i8, ptr %0, i64 %18
  %20 = load i32, ptr %1, align 1, !tbaa !25
  %21 = load ptr, ptr %19, align 8, !tbaa !23
  %22 = getelementptr inbounds i8, ptr %21, i64 48
  %23 = load ptr, ptr %22, align 8
  tail call void %23(ptr noundef nonnull align 8 dereferenceable(64) %19, i32 noundef %20)
  %.not = icmp eq ptr %3, null
  %.pre = load ptr, ptr %0, align 8, !tbaa !23
  br i1 %.not, label %29, label %24

24:                                               ; preds = %11
  %25 = getelementptr i8, ptr %.pre, i64 -24
  %26 = load i64, ptr %25, align 8
  %27 = getelementptr inbounds i8, ptr %0, i64 %26
  %28 = getelementptr inbounds i8, ptr %27, i64 24
  store ptr %3, ptr %28, align 8, !tbaa !28
  br label %29

29:                                               ; preds = %24, %11
  call void @llvm.lifetime.start.p0(i64 3, ptr nonnull %5) #4
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 1 dereferenceable(3) %5, ptr noundef nonnull align 1 dereferenceable(3) @__const._ZN12AccelAdxl3624InitERK20__AccelSensor_ConfigP11DeviceIntrfP5Timer.cmd, i64 3, i1 false)
  %30 = getelementptr i8, ptr %.pre, i64 -24
  %31 = load i64, ptr %30, align 8
  %32 = getelementptr inbounds i8, ptr %0, i64 %31
  %33 = load ptr, ptr %32, align 8, !tbaa !23
  %34 = getelementptr inbounds i8, ptr %33, i64 96
  %35 = load ptr, ptr %34, align 8
  %36 = call noundef zeroext i16 %35(ptr noundef nonnull align 8 dereferenceable(64) %32, ptr noundef nonnull %5, i32 noundef 2)
  %.not20 = icmp eq i16 %36, 7597
  br i1 %.not20, label %37, label %80

37:                                               ; preds = %29
  %38 = load ptr, ptr %0, align 8, !tbaa !23
  %39 = getelementptr inbounds i8, ptr %38, i64 224
  %40 = load ptr, ptr %39, align 8
  call void %40(ptr noundef nonnull align 8 dereferenceable(157) %0)
  %41 = load ptr, ptr %0, align 8, !tbaa !23
  %42 = getelementptr i8, ptr %41, i64 -24
  %43 = load i64, ptr %42, align 8
  %44 = getelementptr inbounds i8, ptr %0, i64 %43
  call void @_ZN6Device8DeviceIDEm(ptr noundef nonnull align 8 dereferenceable(64) %44, i64 noundef 7597)
  store i8 10, ptr %5, align 1, !tbaa !31
  %45 = getelementptr inbounds i8, ptr %5, i64 1
  store i8 44, ptr %45, align 1, !tbaa !31
  %46 = getelementptr inbounds i8, ptr %5, i64 2
  %47 = getelementptr inbounds i8, ptr %1, i64 8
  %48 = load i32, ptr %47, align 1, !tbaa !32
  %49 = icmp ult i32 %48, 25
  br i1 %49, label %58, label %50

50:                                               ; preds = %37
  %51 = icmp ult i32 %48, 50
  br i1 %51, label %58, label %52

52:                                               ; preds = %50
  %53 = icmp ult i32 %48, 100
  br i1 %53, label %58, label %54

54:                                               ; preds = %52
  %55 = icmp ult i32 %48, 200
  br i1 %55, label %58, label %56

56:                                               ; preds = %54
  %57 = icmp ult i32 %48, 400
  %. = select i1 %57, i8 20, i8 21
  br label %58

58:                                               ; preds = %56, %54, %52, %50, %37
  %.sink = phi i8 [ 16, %37 ], [ 17, %50 ], [ 18, %52 ], [ 19, %54 ], [ %., %56 ]
  store i8 %.sink, ptr %46, align 1, !tbaa !31
  %59 = load ptr, ptr %0, align 8, !tbaa !23
  %60 = getelementptr i8, ptr %59, i64 -24
  %61 = load i64, ptr %60, align 8
  %62 = getelementptr inbounds i8, ptr %0, i64 %61
  %63 = load ptr, ptr %62, align 8, !tbaa !23
  %64 = getelementptr inbounds i8, ptr %63, i64 80
  %65 = load ptr, ptr %64, align 8
  %66 = call noundef i32 %65(ptr noundef nonnull align 8 dereferenceable(64) %62, ptr noundef nonnull %5, i32 noundef 3, ptr noundef null, i32 noundef 0)
  %67 = getelementptr inbounds i8, ptr %1, i64 4
  %68 = load i32, ptr %67, align 1, !tbaa !33
  %69 = load i32, ptr %47, align 1, !tbaa !32
  %70 = load ptr, ptr %0, align 8, !tbaa !23
  %71 = getelementptr inbounds i8, ptr %70, i64 24
  %72 = load ptr, ptr %71, align 8
  %73 = call noundef zeroext i1 %72(ptr noundef nonnull align 8 dereferenceable(73) %0, i32 noundef %68, i32 noundef %69)
  %74 = getelementptr inbounds i8, ptr %1, i64 12
  %75 = load i16, ptr %74, align 1, !tbaa !34
  %76 = load ptr, ptr %0, align 8, !tbaa !23
  %77 = getelementptr inbounds i8, ptr %76, i64 168
  %78 = load ptr, ptr %77, align 8
  %79 = call noundef zeroext i16 %78(ptr noundef nonnull align 8 dereferenceable(157) %0, i16 noundef zeroext %75)
  store i8 1, ptr %6, align 4, !tbaa !5
  br label %80

80:                                               ; preds = %29, %58
  call void @llvm.lifetime.end.p0(i64 3, ptr nonnull %5) #4
  br label %81

81:                                               ; preds = %9, %4, %80
  %.1 = phi i1 [ %.not20, %80 ], [ true, %4 ], [ false, %9 ]
  ret i1 %.1
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN6Device9InterfaceEP11DeviceIntrf(ptr noundef nonnull align 8 dereferenceable(64), ptr noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN6Device8DeviceIDEm(ptr noundef nonnull align 8 dereferenceable(64), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !15, i64 156}
!6 = !{!"_ZTS12AccelAdxl362", !7, i64 0, !15, i64 156}
!7 = !{!"_ZTS11AccelSensor", !8, i64 0, !18, i64 73, !20, i64 96, !19, i64 104, !10, i64 108, !10, i64 144}
!8 = !{!"_ZTS6Sensor", !9, i64 8, !12, i64 12, !13, i64 16, !9, i64 20, !14, i64 24, !15, i64 32, !14, i64 40, !14, i64 48, !9, i64 56, !9, i64 60, !9, i64 64, !9, i64 68, !16, i64 72}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C++ TBAA"}
!12 = !{!"_ZTS14__Sensor_State", !10, i64 0}
!13 = !{!"_ZTS15__Sensor_OpMode", !10, i64 0}
!14 = !{!"long", !10, i64 0}
!15 = !{!"bool", !10, i64 0}
!16 = !{!"_ZTSSt11atomic_flag", !17, i64 0}
!17 = !{!"_ZTSSt18__atomic_flag_base", !15, i64 0}
!18 = !{!"_ZTS22__AccelSensor_Raw_Data", !14, i64 0, !19, i64 8, !19, i64 10, !10, i64 12}
!19 = !{!"short", !10, i64 0}
!20 = !{!"any pointer", !10, i64 0}
!21 = !{i8 0, i8 2}
!22 = !{}
!23 = !{!24, !24, i64 0}
!24 = !{!"vtable pointer", !11, i64 0}
!25 = !{!26, !9, i64 0}
!26 = !{!"_ZTS20__AccelSensor_Config", !9, i64 0, !13, i64 4, !9, i64 8, !19, i64 12, !9, i64 14, !10, i64 18, !27, i64 19, !20, i64 23}
!27 = !{!"_ZTS24__Dev_Interrupt_Polarity", !10, i64 0}
!28 = !{!29, !20, i64 24}
!29 = !{!"_ZTS6Device", !15, i64 8, !9, i64 12, !20, i64 16, !20, i64 24, !14, i64 32, !15, i64 40, !20, i64 48, !10, i64 56, !30, i64 60}
!30 = !{!"_ZTS21__Dev_Data_Byte_Order", !10, i64 0}
!31 = !{!10, !10, i64 0}
!32 = !{!26, !9, i64 8}
!33 = !{!26, !13, i64 4}
!34 = !{!26, !19, i64 12}


; Effective O3 passes: DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass