; LLVM IR from siara-cc/Unishox_Arduino_lib :: src/unishox2.ll (Z14getStepCodeIdxPKciPii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7readBitPKci(ptr noundef, i32 noundef) #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z14getStepCodeIdxPKciPii(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3) #1 {
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !9
  store ptr %2, ptr %8, align 8, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  store i32 0, ptr %10, align 4, !tbaa !9
  br label %12

12:                                               ; preds = %36, %4
  %13 = load ptr, ptr %8, align 8, !tbaa !5
  %14 = load i32, ptr %13, align 4, !tbaa !9
  %15 = load i32, ptr %7, align 4, !tbaa !9
  %16 = icmp slt i32 %14, %15
  br i1 %16, label %17, label %23

17:                                               ; preds = %12
  %18 = load ptr, ptr %6, align 8, !tbaa !5
  %19 = load ptr, ptr %8, align 8, !tbaa !5
  %20 = load i32, ptr %19, align 4, !tbaa !9
  %21 = call noundef i32 @_Z7readBitPKci(ptr noundef %18, i32 noundef %20)
  %22 = icmp ne i32 %21, 0
  br label %23

23:                                               ; preds = %17, %12
  %24 = phi i1 [ false, %12 ], [ %22, %17 ]
  br i1 %24, label %25, label %37

25:                                               ; preds = %23
  %26 = load i32, ptr %10, align 4, !tbaa !9
  %27 = add nsw i32 %26, 1
  store i32 %27, ptr %10, align 4, !tbaa !9
  %28 = load ptr, ptr %8, align 8, !tbaa !5
  %29 = load i32, ptr %28, align 4, !tbaa !9
  %30 = add nsw i32 %29, 1
  store i32 %30, ptr %28, align 4, !tbaa !9
  %31 = load i32, ptr %10, align 4, !tbaa !9
  %32 = load i32, ptr %9, align 4, !tbaa !9
  %33 = icmp eq i32 %31, %32
  br i1 %33, label %34, label %36

34:                                               ; preds = %25
  %35 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %35, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %48

36:                                               ; preds = %25
  br label %12, !llvm.loop !11

37:                                               ; preds = %23
  %38 = load ptr, ptr %8, align 8, !tbaa !5
  %39 = load i32, ptr %38, align 4, !tbaa !9
  %40 = load i32, ptr %7, align 4, !tbaa !9
  %41 = icmp sge i32 %39, %40
  br i1 %41, label %42, label %43

42:                                               ; preds = %37
  store i32 99, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %48

43:                                               ; preds = %37
  %44 = load ptr, ptr %8, align 8, !tbaa !5
  %45 = load i32, ptr %44, align 4, !tbaa !9
  %46 = add nsw i32 %45, 1
  store i32 %46, ptr %44, align 4, !tbaa !9
  %47 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %47, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %48

48:                                               ; preds = %43, %42, %34
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  %49 = load i32, ptr %5, align 4
  ret i32 %49
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7readBitPKci(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z14getStepCodeIdxPKciPii(ptr noundef %0, i32 noundef %1, ptr nocapture noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  %.pre = load i32, ptr %2, align 4, !tbaa !5
  br label %5

5:                                                ; preds = %10, %4
  %6 = phi i32 [ %.pre, %4 ], [ %12, %10 ]
  %.0 = phi i32 [ 0, %4 ], [ %11, %10 ]
  %7 = icmp slt i32 %6, %1
  br i1 %7, label %8, label %.critedge

8:                                                ; preds = %5
  %9 = tail call noundef i32 @_Z7readBitPKci(ptr noundef %0, i32 noundef %6)
  %.not = icmp eq i32 %9, 0
  %.pre20 = load i32, ptr %2, align 4, !tbaa !5
  br i1 %.not, label %.critedge, label %10

10:                                               ; preds = %8
  %11 = add nuw nsw i32 %.0, 1
  %12 = add nsw i32 %.pre20, 1
  store i32 %12, ptr %2, align 4, !tbaa !5
  %13 = icmp eq i32 %11, %3
  br i1 %13, label %.loopexit, label %5, !llvm.loop !9

.critedge:                                        ; preds = %5, %8
  %14 = phi i32 [ %6, %5 ], [ %.pre20, %8 ]
  %.not17 = icmp slt i32 %14, %1
  br i1 %.not17, label %15, label %.loopexit

15:                                               ; preds = %.critedge
  %16 = add nsw i32 %14, 1
  store i32 %16, ptr %2, align 4, !tbaa !5
  br label %.loopexit

.loopexit:                                        ; preds = %10, %.critedge, %15
  %.013 = phi i32 [ %.0, %15 ], [ 99, %.critedge ], [ %3, %10 ]
  ret i32 %.013
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass