; LLVM IR from IOsonata/IOsonata :: src/bluetooth (bt_attreq)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__Bt_Hci_ACL_Data_Packet = type <{ %struct.__Bt_Hci_ACL_Data_Packet_Header, [1 x i8] }>
%struct.__Bt_Hci_ACL_Data_Packet_Header = type { i32 }
%struct.__Bt_L2Cap_Pdu = type <{ %struct.__Bt_L2Cap_Header, %union.anon }>
%struct.__Bt_L2Cap_Header = type { i16, i16 }
%union.anon = type <{ i32, [17 x i8] }>
%struct.__Bt_Attribute_Req_Rsp = type <{ i8, %union.anon.5 }>
%union.anon.5 = type { %struct.__Bt_Att_Read_By_Type_Req }
%struct.__Bt_Att_Read_By_Type_Req = type { i16, i16, %union.__Bt_Uuid_Val }
%union.__Bt_Uuid_Val = type { i32, [12 x i8] }
%struct.__Bt_Att_Exchange_Mtu_Req_Rsp = type { i16 }
%struct.__Bt_Hci_Device = type { ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr }

; Function Attrs: mustprogress uwtable
define dso_local zeroext i1 @BtAttExchangeMtuRequest(ptr noundef %0, i16 noundef zeroext %1, i16 noundef zeroext %2) #0 {
  %4 = alloca ptr, align 8
  %5 = alloca i16, align 2
  %6 = alloca i16, align 2
  %7 = alloca [260 x i8], align 16
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i16 %1, ptr %5, align 2, !tbaa !9
  store i16 %2, ptr %6, align 2, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 260, ptr %7) #2
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #2
  %11 = getelementptr inbounds [260 x i8], ptr %7, i64 0, i64 0
  store ptr %11, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #2
  %12 = load ptr, ptr %8, align 8, !tbaa !5
  %13 = getelementptr inbounds %struct.__Bt_Hci_ACL_Data_Packet, ptr %12, i32 0, i32 1
  %14 = getelementptr inbounds [1 x i8], ptr %13, i64 0, i64 0
  store ptr %14, ptr %9, align 8, !tbaa !5
  %15 = load i16, ptr %5, align 2, !tbaa !9
  %16 = zext i16 %15 to i32
  %17 = load ptr, ptr %8, align 8, !tbaa !5
  %18 = getelementptr inbounds %struct.__Bt_Hci_ACL_Data_Packet, ptr %17, i32 0, i32 0
  %19 = load i32, ptr %18, align 1
  %20 = and i32 %16, 4095
  %21 = and i32 %19, -4096
  %22 = or i32 %21, %20
  store i32 %22, ptr %18, align 1
  %23 = load ptr, ptr %8, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.__Bt_Hci_ACL_Data_Packet, ptr %23, i32 0, i32 0
  %25 = load i32, ptr %24, align 1
  %26 = and i32 %25, -12289
  %27 = or i32 %26, 12288
  store i32 %27, ptr %24, align 1
  %28 = load ptr, ptr %8, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.__Bt_Hci_ACL_Data_Packet, ptr %28, i32 0, i32 0
  %30 = load i32, ptr %29, align 1
  %31 = and i32 %30, -49153
  %32 = or i32 %31, 0
  store i32 %32, ptr %29, align 1
  %33 = load ptr, ptr %9, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.__Bt_L2Cap_Pdu, ptr %33, i32 0, i32 1
  %35 = getelementptr inbounds %struct.__Bt_Attribute_Req_Rsp, ptr %34, i32 0, i32 0
  store i8 2, ptr %35, align 1, !tbaa !11
  %36 = load i16, ptr %6, align 2, !tbaa !9
  %37 = load ptr, ptr %9, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.__Bt_L2Cap_Pdu, ptr %37, i32 0, i32 1
  %39 = getelementptr inbounds %struct.__Bt_Attribute_Req_Rsp, ptr %38, i32 0, i32 1
  %40 = getelementptr inbounds %struct.__Bt_Att_Exchange_Mtu_Req_Rsp, ptr %39, i32 0, i32 0
  store i16 %36, ptr %40, align 1, !tbaa !11
  %41 = load ptr, ptr %9, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.__Bt_L2Cap_Pdu, ptr %41, i32 0, i32 0
  %43 = getelementptr inbounds %struct.__Bt_L2Cap_Header, ptr %42, i32 0, i32 0
  store i16 3, ptr %43, align 1, !tbaa !12
  %44 = load ptr, ptr %9, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.__Bt_L2Cap_Pdu, ptr %44, i32 0, i32 0
  %46 = getelementptr inbounds %struct.__Bt_L2Cap_Header, ptr %45, i32 0, i32 1
  store i16 4, ptr %46, align 1, !tbaa !15
  %47 = load ptr, ptr %9, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.__Bt_L2Cap_Pdu, ptr %47, i32 0, i32 0
  %49 = getelementptr inbounds %struct.__Bt_L2Cap_Header, ptr %48, i32 0, i32 0
  %50 = load i16, ptr %49, align 1, !tbaa !12
  %51 = zext i16 %50 to i64
  %52 = add i64 %51, 4
  %53 = trunc i64 %52 to i32
  %54 = load ptr, ptr %8, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.__Bt_Hci_ACL_Data_Packet, ptr %54, i32 0, i32 0
  %56 = load i32, ptr %55, align 1
  %57 = and i32 %53, 65535
  %58 = shl i32 %57, 16
  %59 = and i32 %56, 65535
  %60 = or i32 %59, %58
  store i32 %60, ptr %55, align 1
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  %61 = load ptr, ptr %4, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.__Bt_Hci_Device, ptr %61, i32 0, i32 3
  %63 = load ptr, ptr %62, align 8, !tbaa !16
  %64 = load ptr, ptr %8, align 8, !tbaa !5
  %65 = load ptr, ptr %8, align 8, !tbaa !5
  %66 = getelementptr inbounds %struct.__Bt_Hci_ACL_Data_Packet, ptr %65, i32 0, i32 0
  %67 = load i32, ptr %66, align 1
  %68 = lshr i32 %67, 16
  %69 = zext i32 %68 to i64
  %70 = add i64 %69, 4
  %71 = trunc i64 %70 to i32
  %72 = call noundef i32 %63(ptr noundef %64, i32 noundef %71)
  store i32 %72, ptr %10, align 4, !tbaa !19
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 260, ptr %7) #2
  ret i1 true
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !10, i64 0}
!13 = !{!"_ZTS14__Bt_L2Cap_Pdu", !14, i64 0, !7, i64 4}
!14 = !{!"_ZTS17__Bt_L2Cap_Header", !10, i64 0, !10, i64 2}
!15 = !{!13, !10, i64 2}
!16 = !{!17, !6, i64 16}
!17 = !{!"_ZTS15__Bt_Hci_Device", !6, i64 0, !18, i64 8, !18, i64 12, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56, !6, i64 64}
!18 = !{!"int", !7, i64 0}
!19 = !{!18, !18, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @BtAttExchangeMtuRequest(ptr nocapture noundef readonly %0, i16 noundef zeroext %1, i16 noundef zeroext %2) local_unnamed_addr #0 {
  %4 = alloca [260 x i8], align 16
  call void @llvm.lifetime.start.p0(i64 260, ptr nonnull %4) #2
  %5 = getelementptr inbounds i8, ptr %4, i64 4
  %6 = and i16 %1, 4095
  %7 = zext nneg i16 %6 to i32
  %8 = getelementptr inbounds i8, ptr %4, i64 8
  store i8 2, ptr %8, align 8, !tbaa !5
  %9 = getelementptr inbounds i8, ptr %4, i64 9
  store i16 %2, ptr %9, align 1, !tbaa !5
  store i16 3, ptr %5, align 4, !tbaa !8
  %10 = getelementptr inbounds i8, ptr %4, i64 6
  store i16 4, ptr %10, align 2, !tbaa !12
  %11 = or disjoint i32 %7, 471040
  store i32 %11, ptr %4, align 16
  %12 = getelementptr inbounds i8, ptr %0, i64 16
  %13 = load ptr, ptr %12, align 8, !tbaa !13
  %14 = call noundef i32 %13(ptr noundef nonnull %4, i32 noundef 11)
  call void @llvm.lifetime.end.p0(i64 260, ptr nonnull %4) #2
  ret i1 true
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !11, i64 0}
!9 = !{!"_ZTS14__Bt_L2Cap_Pdu", !10, i64 0, !6, i64 4}
!10 = !{!"_ZTS17__Bt_L2Cap_Header", !11, i64 0, !11, i64 2}
!11 = !{!"short", !6, i64 0}
!12 = !{!9, !11, i64 2}
!13 = !{!14, !15, i64 16}
!14 = !{!"_ZTS15__Bt_Hci_Device", !15, i64 0, !16, i64 8, !16, i64 12, !15, i64 16, !15, i64 24, !15, i64 32, !15, i64 40, !15, i64 48, !15, i64 56, !15, i64 64}
!15 = !{!"any pointer", !6, i64 0}
!16 = !{!"int", !6, i64 0}


; Effective O3 passes: DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass