; LLVM IR from cornell-zhang/rosetta :: BNN/cpp/minizip/aes (pwd2key)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.hmac_ctx = type { [64 x i8], [1 x %struct.sha1_ctx], i64 }
%struct.sha1_ctx = type { [2 x i32], [5 x i32], [16 x i32] }

; Function Attrs: nounwind uwtable
define dso_local void @derive_key(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3, i32 noundef %4, ptr noundef %5, i32 noundef %6) #0 {
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca ptr, align 8
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca [20 x i8], align 16
  %20 = alloca [20 x i8], align 16
  %21 = alloca [1 x %struct.hmac_ctx], align 16
  %22 = alloca [1 x %struct.hmac_ctx], align 16
  %23 = alloca [1 x %struct.hmac_ctx], align 16
  store ptr %0, ptr %8, align 8, !tbaa !5
  store i32 %1, ptr %9, align 4, !tbaa !9
  store ptr %2, ptr %10, align 8, !tbaa !5
  store i32 %3, ptr %11, align 4, !tbaa !9
  store i32 %4, ptr %12, align 4, !tbaa !9
  store ptr %5, ptr %13, align 8, !tbaa !5
  store i32 %6, ptr %14, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #5
  call void @llvm.lifetime.start.p0(i64 20, ptr %19) #5
  call void @llvm.lifetime.start.p0(i64 20, ptr %20) #5
  call void @llvm.lifetime.start.p0(i64 168, ptr %21) #5
  call void @llvm.lifetime.start.p0(i64 168, ptr %22) #5
  call void @llvm.lifetime.start.p0(i64 168, ptr %23) #5
  %24 = getelementptr inbounds [1 x %struct.hmac_ctx], ptr %21, i64 0, i64 0
  call void @hmac_sha_begin(ptr noundef %24)
  %25 = load ptr, ptr %8, align 8, !tbaa !5
  %26 = load i32, ptr %9, align 4, !tbaa !9
  %27 = zext i32 %26 to i64
  %28 = getelementptr inbounds [1 x %struct.hmac_ctx], ptr %21, i64 0, i64 0
  %29 = call i32 @hmac_sha_key(ptr noundef %25, i64 noundef %27, ptr noundef %28)
  %30 = getelementptr inbounds [1 x %struct.hmac_ctx], ptr %22, i64 0, i64 0
  %31 = getelementptr inbounds [1 x %struct.hmac_ctx], ptr %21, i64 0, i64 0
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %30, ptr align 16 %31, i64 168, i1 false)
  %32 = load ptr, ptr %10, align 8, !tbaa !5
  %33 = load i32, ptr %11, align 4, !tbaa !9
  %34 = zext i32 %33 to i64
  %35 = getelementptr inbounds [1 x %struct.hmac_ctx], ptr %22, i64 0, i64 0
  call void @hmac_sha_data(ptr noundef %32, i64 noundef %34, ptr noundef %35)
  %36 = load i32, ptr %14, align 4, !tbaa !9
  %37 = sub i32 %36, 1
  %38 = udiv i32 %37, 20
  %39 = add i32 1, %38
  store i32 %39, ptr %18, align 4, !tbaa !9
  store i32 0, ptr %15, align 4, !tbaa !9
  br label %40

40:                                               ; preds = %127, %7
  %41 = load i32, ptr %15, align 4, !tbaa !9
  %42 = load i32, ptr %18, align 4, !tbaa !9
  %43 = icmp ult i32 %41, %42
  br i1 %43, label %44, label %130

44:                                               ; preds = %40
  %45 = getelementptr inbounds [20 x i8], ptr %20, i64 0, i64 0
  call void @llvm.memset.p0.i64(ptr align 16 %45, i8 0, i64 20, i1 false)
  %46 = getelementptr inbounds [1 x %struct.hmac_ctx], ptr %23, i64 0, i64 0
  %47 = getelementptr inbounds [1 x %struct.hmac_ctx], ptr %22, i64 0, i64 0
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %46, ptr align 16 %47, i64 168, i1 false)
  %48 = load i32, ptr %15, align 4, !tbaa !9
  %49 = add i32 %48, 1
  %50 = lshr i32 %49, 24
  %51 = trunc i32 %50 to i8
  %52 = getelementptr inbounds [20 x i8], ptr %19, i64 0, i64 0
  store i8 %51, ptr %52, align 16, !tbaa !11
  %53 = load i32, ptr %15, align 4, !tbaa !9
  %54 = add i32 %53, 1
  %55 = lshr i32 %54, 16
  %56 = trunc i32 %55 to i8
  %57 = getelementptr inbounds [20 x i8], ptr %19, i64 0, i64 1
  store i8 %56, ptr %57, align 1, !tbaa !11
  %58 = load i32, ptr %15, align 4, !tbaa !9
  %59 = add i32 %58, 1
  %60 = lshr i32 %59, 8
  %61 = trunc i32 %60 to i8
  %62 = getelementptr inbounds [20 x i8], ptr %19, i64 0, i64 2
  store i8 %61, ptr %62, align 2, !tbaa !11
  %63 = load i32, ptr %15, align 4, !tbaa !9
  %64 = add i32 %63, 1
  %65 = trunc i32 %64 to i8
  %66 = getelementptr inbounds [20 x i8], ptr %19, i64 0, i64 3
  store i8 %65, ptr %66, align 1, !tbaa !11
  store i32 0, ptr %16, align 4, !tbaa !9
  store i32 4, ptr %17, align 4, !tbaa !9
  br label %67

67:                                               ; preds = %100, %44
  %68 = load i32, ptr %16, align 4, !tbaa !9
  %69 = load i32, ptr %12, align 4, !tbaa !9
  %70 = icmp ult i32 %68, %69
  br i1 %70, label %71, label %103

71:                                               ; preds = %67
  %72 = getelementptr inbounds [20 x i8], ptr %19, i64 0, i64 0
  %73 = load i32, ptr %17, align 4, !tbaa !9
  %74 = zext i32 %73 to i64
  %75 = getelementptr inbounds [1 x %struct.hmac_ctx], ptr %23, i64 0, i64 0
  call void @hmac_sha_data(ptr noundef %72, i64 noundef %74, ptr noundef %75)
  %76 = getelementptr inbounds [20 x i8], ptr %19, i64 0, i64 0
  %77 = getelementptr inbounds [1 x %struct.hmac_ctx], ptr %23, i64 0, i64 0
  call void @hmac_sha_end(ptr noundef %76, i64 noundef 20, ptr noundef %77)
  store i32 0, ptr %17, align 4, !tbaa !9
  br label %78

78:                                               ; preds = %94, %71
  %79 = load i32, ptr %17, align 4, !tbaa !9
  %80 = icmp ult i32 %79, 20
  br i1 %80, label %81, label %97

81:                                               ; preds = %78
  %82 = load i32, ptr %17, align 4, !tbaa !9
  %83 = zext i32 %82 to i64
  %84 = getelementptr inbounds [20 x i8], ptr %19, i64 0, i64 %83
  %85 = load i8, ptr %84, align 1, !tbaa !11
  %86 = zext i8 %85 to i32
  %87 = load i32, ptr %17, align 4, !tbaa !9
  %88 = zext i32 %87 to i64
  %89 = getelementptr inbounds [20 x i8], ptr %20, i64 0, i64 %88
  %90 = load i8, ptr %89, align 1, !tbaa !11
  %91 = zext i8 %90 to i32
  %92 = xor i32 %91, %86
  %93 = trunc i32 %92 to i8
  store i8 %93, ptr %89, align 1, !tbaa !11
  br label %94

94:                                               ; preds = %81
  %95 = load i32, ptr %17, align 4, !tbaa !9
  %96 = add i32 %95, 1
  store i32 %96, ptr %17, align 4, !tbaa !9
  br label %78, !llvm.loop !12

97:                                               ; preds = %78
  %98 = getelementptr inbounds [1 x %struct.hmac_ctx], ptr %23, i64 0, i64 0
  %99 = getelementptr inbounds [1 x %struct.hmac_ctx], ptr %21, i64 0, i64 0
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %98, ptr align 16 %99, i64 168, i1 false)
  br label %100

100:                                              ; preds = %97
  %101 = load i32, ptr %16, align 4, !tbaa !9
  %102 = add i32 %101, 1
  store i32 %102, ptr %16, align 4, !tbaa !9
  br label %67, !llvm.loop !14

103:                                              ; preds = %67
  store i32 0, ptr %16, align 4, !tbaa !9
  %104 = load i32, ptr %15, align 4, !tbaa !9
  %105 = mul i32 %104, 20
  store i32 %105, ptr %17, align 4, !tbaa !9
  br label %106

106:                                              ; preds = %115, %103
  %107 = load i32, ptr %16, align 4, !tbaa !9
  %108 = icmp ult i32 %107, 20
  br i1 %108, label %109, label %113

109:                                              ; preds = %106
  %110 = load i32, ptr %17, align 4, !tbaa !9
  %111 = load i32, ptr %14, align 4, !tbaa !9
  %112 = icmp ult i32 %110, %111
  br label %113

113:                                              ; preds = %109, %106
  %114 = phi i1 [ false, %106 ], [ %112, %109 ]
  br i1 %114, label %115, label %126

115:                                              ; preds = %113
  %116 = load i32, ptr %16, align 4, !tbaa !9
  %117 = add i32 %116, 1
  store i32 %117, ptr %16, align 4, !tbaa !9
  %118 = zext i32 %116 to i64
  %119 = getelementptr inbounds [20 x i8], ptr %20, i64 0, i64 %118
  %120 = load i8, ptr %119, align 1, !tbaa !11
  %121 = load ptr, ptr %13, align 8, !tbaa !5
  %122 = load i32, ptr %17, align 4, !tbaa !9
  %123 = add i32 %122, 1
  store i32 %123, ptr %17, align 4, !tbaa !9
  %124 = zext i32 %122 to i64
  %125 = getelementptr inbounds i8, ptr %121, i64 %124
  store i8 %120, ptr %125, align 1, !tbaa !11
  br label %106, !llvm.loop !15

126:                                              ; preds = %113
  br label %127

127:                                              ; preds = %126
  %128 = load i32, ptr %15, align 4, !tbaa !9
  %129 = add i32 %128, 1
  store i32 %129, ptr %15, align 4, !tbaa !9
  br label %40, !llvm.loop !16

130:                                              ; preds = %40
  call void @llvm.lifetime.end.p0(i64 168, ptr %23) #5
  call void @llvm.lifetime.end.p0(i64 168, ptr %22) #5
  call void @llvm.lifetime.end.p0(i64 168, ptr %21) #5
  call void @llvm.lifetime.end.p0(i64 20, ptr %20) #5
  call void @llvm.lifetime.end.p0(i64 20, ptr %19) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #5
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @hmac_sha_begin(ptr noundef) #2

declare i32 @hmac_sha_key(ptr noundef, i64 noundef, ptr noundef) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

declare void @hmac_sha_data(ptr noundef, i64 noundef, ptr noundef) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #4

declare void @hmac_sha_end(ptr noundef, i64 noundef, ptr noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}
!15 = distinct !{!15, !13}
!16 = distinct !{!16, !13}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.hmac_ctx = type { [64 x i8], [1 x %struct.sha1_ctx], i64 }
%struct.sha1_ctx = type { [2 x i32], [5 x i32], [16 x i32] }

; Function Attrs: nounwind uwtable
define dso_local void @derive_key(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3, i32 noundef %4, ptr nocapture noundef writeonly %5, i32 noundef %6) local_unnamed_addr #0 {
  %8 = alloca [20 x i8], align 16
  %9 = alloca [20 x i8], align 16
  %10 = alloca [1 x %struct.hmac_ctx], align 16
  %11 = alloca [1 x %struct.hmac_ctx], align 16
  %12 = alloca [1 x %struct.hmac_ctx], align 16
  call void @llvm.lifetime.start.p0(i64 20, ptr nonnull %8) #6
  call void @llvm.lifetime.start.p0(i64 20, ptr nonnull %9)
  call void @llvm.lifetime.start.p0(i64 168, ptr nonnull %10) #6
  call void @llvm.lifetime.start.p0(i64 168, ptr nonnull %11) #6
  call void @llvm.lifetime.start.p0(i64 168, ptr nonnull %12) #6
  call void @hmac_sha_begin(ptr noundef nonnull %10) #6
  %13 = zext i32 %1 to i64
  %14 = call i32 @hmac_sha_key(ptr noundef %0, i64 noundef %13, ptr noundef nonnull %10) #6
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(168) %11, ptr noundef nonnull align 16 dereferenceable(168) %10, i64 168, i1 false)
  %15 = zext i32 %3 to i64
  call void @hmac_sha_data(ptr noundef %2, i64 noundef %15, ptr noundef nonnull %11) #6
  %16 = add i32 %6, -1
  %17 = udiv i32 %16, 20
  %18 = getelementptr inbounds i8, ptr %8, i64 1
  %19 = getelementptr inbounds i8, ptr %8, i64 2
  %20 = getelementptr inbounds i8, ptr %8, i64 3
  %.not48 = icmp eq i32 %4, 0
  %21 = add nuw nsw i32 %17, 1
  %wide.trip.count75 = zext nneg i32 %21 to i64
  br i1 %.not48, label %.split, label %.lr.ph.us.preheader

.lr.ph.us.preheader:                              ; preds = %7
  %22 = getelementptr inbounds i8, ptr %8, i64 16
  %exitcond.peel.not = icmp eq i32 %4, 1
  %.16.sroa_idx159 = getelementptr inbounds i8, ptr %9, i64 16
  %.16.sroa_idx161 = getelementptr inbounds i8, ptr %9, i64 16
  %.16.sroa_idx = getelementptr inbounds i8, ptr %9, i64 16
  br label %.lr.ph.us

.lr.ph.us:                                        ; preds = %.lr.ph.us.preheader, %.loopexit.us
  %indvar = phi i64 [ 0, %.lr.ph.us.preheader ], [ %indvar.next, %.loopexit.us ]
  %indvars59 = trunc i64 %indvar to i32
  %23 = mul nuw nsw i64 %indvar, 20
  %scevgep = getelementptr i8, ptr %5, i64 %23
  %24 = trunc i64 %indvar to i32
  %25 = mul i32 %24, -20
  %26 = add i32 %25, %16
  %27 = call i32 @llvm.umin.i32(i32 %26, i32 19)
  %narrow = add nuw nsw i32 %27, 1
  %28 = zext nneg i32 %narrow to i64
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(20) %9, i8 0, i64 20, i1 false)
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(168) %12, ptr noundef nonnull align 16 dereferenceable(168) %11, i64 168, i1 false)
  %indvar.next = add nuw nsw i64 %indvar, 1
  %29 = lshr i64 %indvar.next, 24
  %30 = trunc i64 %29 to i8
  store i8 %30, ptr %8, align 16, !tbaa !5
  %31 = lshr i64 %indvar.next, 16
  %32 = trunc i64 %31 to i8
  store i8 %32, ptr %18, align 1, !tbaa !5
  %33 = lshr i64 %indvar.next, 8
  %34 = trunc i64 %33 to i8
  store i8 %34, ptr %19, align 2, !tbaa !5
  %35 = trunc i64 %indvar.next to i8
  store i8 %35, ptr %20, align 1, !tbaa !5
  call void @hmac_sha_data(ptr noundef nonnull %8, i64 noundef 4, ptr noundef nonnull %12) #6
  call void @hmac_sha_end(ptr noundef nonnull %8, i64 noundef 20, ptr noundef nonnull %12) #6
  %36 = load <16 x i8>, ptr %8, align 16, !tbaa !5
  %.0.157 = load <16 x i8>, ptr %9, align 16, !tbaa !5
  %37 = xor <16 x i8> %.0.157, %36
  store <16 x i8> %37, ptr %9, align 16, !tbaa !5
  %38 = load <4 x i8>, ptr %22, align 16, !tbaa !5
  %.16.160 = load <4 x i8>, ptr %.16.sroa_idx159, align 16, !tbaa !5
  %39 = xor <4 x i8> %.16.160, %38
  store <4 x i8> %39, ptr %.16.sroa_idx161, align 16, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(168) %12, ptr noundef nonnull align 16 dereferenceable(168) %10, i64 168, i1 false)
  br i1 %exitcond.peel.not, label %._crit_edge.us, label %.peel.next.preheader

.peel.next.preheader:                             ; preds = %.lr.ph.us
  %.promoted = load <16 x i8>, ptr %9, align 16, !tbaa !5
  %.16.sroa_idx.promoted = load <4 x i8>, ptr %.16.sroa_idx, align 16, !tbaa !5
  br label %.peel.next

.peel.next:                                       ; preds = %.peel.next.preheader, %.peel.next
  %.16.162 = phi <4 x i8> [ %44, %.peel.next ], [ %.16.sroa_idx.promoted, %.peel.next.preheader ]
  %40 = phi <16 x i8> [ %42, %.peel.next ], [ %.promoted, %.peel.next.preheader ]
  %.02730.us = phi i32 [ %45, %.peel.next ], [ 1, %.peel.next.preheader ]
  call void @hmac_sha_data(ptr noundef nonnull %8, i64 noundef 20, ptr noundef nonnull %12) #6
  call void @hmac_sha_end(ptr noundef nonnull %8, i64 noundef 20, ptr noundef nonnull %12) #6
  %41 = load <16 x i8>, ptr %8, align 16, !tbaa !5
  %42 = xor <16 x i8> %40, %41
  %43 = load <4 x i8>, ptr %22, align 16, !tbaa !5
  %44 = xor <4 x i8> %.16.162, %43
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(168) %12, ptr noundef nonnull align 16 dereferenceable(168) %10, i64 168, i1 false)
  %45 = add nuw i32 %.02730.us, 1
  %exitcond.not = icmp eq i32 %45, %4
  br i1 %exitcond.not, label %._crit_edge.us.loopexit, label %.peel.next, !llvm.loop !8

.loopexit.us:                                     ; preds = %.lr.ph35.us.preheader, %._crit_edge.us
  %exitcond60.not = icmp eq i64 %indvar.next, %wide.trip.count75
  br i1 %exitcond60.not, label %.split38.us, label %.lr.ph.us, !llvm.loop !11

._crit_edge.us.loopexit:                          ; preds = %.peel.next
  store <16 x i8> %42, ptr %9, align 16, !tbaa !5
  store <4 x i8> %44, ptr %.16.sroa_idx, align 16, !tbaa !5
  br label %._crit_edge.us

._crit_edge.us:                                   ; preds = %._crit_edge.us.loopexit, %.lr.ph.us
  %46 = mul nuw i32 %indvars59, 20
  %47 = icmp ult i32 %46, %6
  br i1 %47, label %.lr.ph35.us.preheader, label %.loopexit.us

.lr.ph35.us.preheader:                            ; preds = %._crit_edge.us
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 1 dereferenceable(1) %scevgep, ptr noundef nonnull align 16 dereferenceable(1) %9, i64 %28, i1 false), !tbaa !5
  br label %.loopexit.us

.loopexit:                                        ; preds = %.lr.ph35.preheader, %.split
  %exitcond76.not = icmp eq i64 %indvar.next62, %wide.trip.count75
  br i1 %exitcond76.not, label %.split38.us, label %.split, !llvm.loop !11

.split:                                           ; preds = %7, %.loopexit
  %indvar61 = phi i64 [ %indvar.next62, %.loopexit ], [ 0, %7 ]
  %indvars74 = trunc i64 %indvar61 to i32
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(20) %9, i8 0, i64 20, i1 false)
  %indvar.next62 = add nuw nsw i64 %indvar61, 1
  %48 = mul nuw i32 %indvars74, 20
  %49 = icmp ult i32 %48, %6
  br i1 %49, label %.lr.ph35.preheader, label %.loopexit

.lr.ph35.preheader:                               ; preds = %.split
  %50 = trunc i64 %indvar61 to i32
  %51 = mul i32 %50, -20
  %52 = add i32 %51, %16
  %53 = call i32 @llvm.umin.i32(i32 %52, i32 19)
  %narrow154 = add nuw nsw i32 %53, 1
  %54 = zext nneg i32 %narrow154 to i64
  %55 = mul nuw nsw i64 %indvar61, 20
  %scevgep63 = getelementptr i8, ptr %5, i64 %55
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 1 dereferenceable(1) %scevgep63, ptr noundef nonnull align 16 dereferenceable(1) %9, i64 %54, i1 false), !tbaa !5
  br label %.loopexit

.split38.us:                                      ; preds = %.loopexit.us, %.loopexit
  call void @llvm.lifetime.end.p0(i64 168, ptr nonnull %12) #6
  call void @llvm.lifetime.end.p0(i64 168, ptr nonnull %11) #6
  call void @llvm.lifetime.end.p0(i64 168, ptr nonnull %10) #6
  call void @llvm.lifetime.end.p0(i64 20, ptr nonnull %9)
  call void @llvm.lifetime.end.p0(i64 20, ptr nonnull %8) #6
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @hmac_sha_begin(ptr noundef) local_unnamed_addr #2

declare i32 @hmac_sha_key(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

declare void @hmac_sha_data(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #4

declare void @hmac_sha_end(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #5

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #5 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = distinct !{!8, !9, !10}
!9 = !{!"llvm.loop.mustprogress"}
!10 = !{!"llvm.loop.peeled.count", i32 1}
!11 = distinct !{!11, !9}


; Effective O3 passes: CorrelatedValuePropagationPass,DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopFullUnrollPass,LoopIdiomRecognizePass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SCCPPass,SLPVectorizerPass,SROAPass,SimplifyCFGPass