; LLVM IR from ninn-kou/Lux :: App Ideas/Bin2Dec (Bin2Dec)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local double @myPow(double noundef %0, i64 noundef %1) #0 {
  %3 = alloca double, align 8
  %4 = alloca double, align 8
  %5 = alloca i64, align 8
  store double %0, ptr %4, align 8, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !9
  %6 = load i64, ptr %5, align 8, !tbaa !9
  %7 = icmp slt i64 %6, 0
  br i1 %7, label %8, label %14

8:                                                ; preds = %2
  %9 = load double, ptr %4, align 8, !tbaa !5
  %10 = fdiv double 1.000000e+00, %9
  %11 = load i64, ptr %5, align 8, !tbaa !9
  %12 = sub nsw i64 0, %11
  %13 = call double @myPow(double noundef %10, i64 noundef %12)
  store double %13, ptr %3, align 8
  br label %46

14:                                               ; preds = %2
  %15 = load i64, ptr %5, align 8, !tbaa !9
  %16 = sitofp i64 %15 to double
  %17 = fcmp oeq double %16, 0.000000e+00
  br i1 %17, label %18, label %19

18:                                               ; preds = %14
  store double 1.000000e+00, ptr %3, align 8
  br label %46

19:                                               ; preds = %14
  %20 = load i64, ptr %5, align 8, !tbaa !9
  %21 = sitofp i64 %20 to double
  %22 = fcmp oeq double %21, 1.000000e+00
  br i1 %22, label %23, label %25

23:                                               ; preds = %19
  %24 = load double, ptr %4, align 8, !tbaa !5
  store double %24, ptr %3, align 8
  br label %46

25:                                               ; preds = %19
  %26 = load i64, ptr %5, align 8, !tbaa !9
  %27 = and i64 %26, 1
  %28 = icmp ne i64 %27, 0
  br i1 %28, label %29, label %39

29:                                               ; preds = %25
  %30 = load double, ptr %4, align 8, !tbaa !5
  %31 = load double, ptr %4, align 8, !tbaa !5
  %32 = load double, ptr %4, align 8, !tbaa !5
  %33 = fmul double %31, %32
  %34 = load i64, ptr %5, align 8, !tbaa !9
  %35 = sub nsw i64 %34, 1
  %36 = sdiv i64 %35, 2
  %37 = call double @myPow(double noundef %33, i64 noundef %36)
  %38 = fmul double %30, %37
  store double %38, ptr %3, align 8
  br label %46

39:                                               ; preds = %25
  %40 = load double, ptr %4, align 8, !tbaa !5
  %41 = load double, ptr %4, align 8, !tbaa !5
  %42 = fmul double %40, %41
  %43 = load i64, ptr %5, align 8, !tbaa !9
  %44 = sdiv i64 %43, 2
  %45 = call double @myPow(double noundef %42, i64 noundef %44)
  store double %45, ptr %3, align 8
  br label %46

46:                                               ; preds = %39, %29, %23, %18, %8
  %47 = load double, ptr %3, align 8
  ret double %47
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree nosync nounwind memory(none) uwtable
define dso_local double @myPow(double noundef %0, i64 noundef %1) local_unnamed_addr #0 {
  br label %tailrecurse

tailrecurse:                                      ; preds = %tailrecurse.backedge, %2
  %.tr = phi double [ %0, %2 ], [ %.tr.be, %tailrecurse.backedge ]
  %.tr16 = phi i64 [ %1, %2 ], [ %.tr16.be, %tailrecurse.backedge ]
  %3 = icmp slt i64 %.tr16, 0
  br i1 %3, label %4, label %7

4:                                                ; preds = %tailrecurse
  %5 = fdiv double 1.000000e+00, %.tr
  %6 = sub nsw i64 0, %.tr16
  br label %tailrecurse.backedge

tailrecurse.backedge:                             ; preds = %4, %16
  %.tr.be = phi double [ %5, %4 ], [ %10, %16 ]
  %.tr16.be = phi i64 [ %6, %4 ], [ %17, %16 ]
  br label %tailrecurse

7:                                                ; preds = %tailrecurse
  switch i64 %.tr16, label %8 [
    i64 0, label %common.ret.loopexit
    i64 1, label %common.ret43
  ]

8:                                                ; preds = %7
  %9 = and i64 %.tr16, 1
  %.not = icmp eq i64 %9, 0
  %10 = fmul double %.tr, %.tr
  br i1 %.not, label %16, label %11

common.ret.loopexit:                              ; preds = %7
  br label %common.ret43

common.ret43:                                     ; preds = %common.ret.loopexit, %7, %11
  %common.ret43.op = phi double [ %15, %11 ], [ 1.000000e+00, %common.ret.loopexit ], [ %.tr, %7 ]
  ret double %common.ret43.op

11:                                               ; preds = %8
  %12 = add nsw i64 %.tr16, -1
  %13 = lshr exact i64 %12, 1
  %14 = tail call double @myPow(double noundef %10, i64 noundef %13)
  %15 = fmul double %.tr, %14
  br label %common.ret43

16:                                               ; preds = %8
  %17 = lshr exact i64 %.tr16, 1
  br label %tailrecurse.backedge
}

attributes #0 = { nofree nosync nounwind memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass