; LLVM IR from sca-secure-library-sca25519/sca25519 :: libopencm3/lib/pac55xx (gpio)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare hidden i32 @get_ccs_port_base(i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.cttz.i32(i32, i1 immarg) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @gpio_set_schmidt_trigger(i32 noundef %0, i1 noundef zeroext %1, i16 noundef zeroext %2) #1 {
  %4 = alloca i32, align 4
  %5 = alloca i8, align 1
  %6 = alloca i16, align 2
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  %11 = zext i1 %1 to i8
  store i8 %11, ptr %5, align 1, !tbaa !9
  store i16 %2, ptr %6, align 2, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %12 = load i32, ptr %4, align 4, !tbaa !5
  %13 = call i32 @get_ccs_port_base(i32 noundef %12)
  store i32 %13, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %14 = load i32, ptr %7, align 4, !tbaa !5
  %15 = add i32 %14, 84
  %16 = zext i32 %15 to i64
  %17 = inttoptr i64 %16 to ptr
  %18 = load volatile i32, ptr %17, align 4, !tbaa !5
  store i32 %18, ptr %8, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %19 = load i16, ptr %6, align 2, !tbaa !11
  %20 = zext i16 %19 to i32
  %21 = call i32 @llvm.cttz.i32(i32 %20, i1 true)
  %22 = add i32 %21, 1
  %23 = icmp eq i32 %20, 0
  %24 = select i1 %23, i32 0, i32 %22
  store i32 %24, ptr %9, align 4, !tbaa !5
  br label %25

25:                                               ; preds = %48, %3
  %26 = load i32, ptr %9, align 4, !tbaa !5
  %27 = icmp ne i32 %26, 0
  br i1 %27, label %28, label %61

28:                                               ; preds = %25
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  %29 = load i32, ptr %9, align 4, !tbaa !5
  %30 = sub nsw i32 %29, 1
  store i32 %30, ptr %10, align 4, !tbaa !5
  %31 = load i8, ptr %5, align 1, !tbaa !9, !range !13, !noundef !14
  %32 = trunc i8 %31 to i1
  br i1 %32, label %33, label %40

33:                                               ; preds = %28
  %34 = load i32, ptr %10, align 4, !tbaa !5
  %35 = mul nsw i32 %34, 4
  %36 = add nsw i32 %35, 3
  %37 = shl i32 1, %36
  %38 = load i32, ptr %8, align 4, !tbaa !5
  %39 = or i32 %38, %37
  store i32 %39, ptr %8, align 4, !tbaa !5
  br label %48

40:                                               ; preds = %28
  %41 = load i32, ptr %10, align 4, !tbaa !5
  %42 = mul nsw i32 %41, 4
  %43 = add nsw i32 %42, 3
  %44 = shl i32 1, %43
  %45 = xor i32 %44, -1
  %46 = load i32, ptr %8, align 4, !tbaa !5
  %47 = and i32 %46, %45
  store i32 %47, ptr %8, align 4, !tbaa !5
  br label %48

48:                                               ; preds = %40, %33
  %49 = load i32, ptr %10, align 4, !tbaa !5
  %50 = shl i32 1, %49
  %51 = load i16, ptr %6, align 2, !tbaa !11
  %52 = zext i16 %51 to i32
  %53 = xor i32 %52, %50
  %54 = trunc i32 %53 to i16
  store i16 %54, ptr %6, align 2, !tbaa !11
  %55 = load i16, ptr %6, align 2, !tbaa !11
  %56 = zext i16 %55 to i32
  %57 = call i32 @llvm.cttz.i32(i32 %56, i1 true)
  %58 = add i32 %57, 1
  %59 = icmp eq i32 %56, 0
  %60 = select i1 %59, i32 0, i32 %58
  store i32 %60, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  br label %25, !llvm.loop !15

61:                                               ; preds = %25
  %62 = load i32, ptr %8, align 4, !tbaa !5
  %63 = load i32, ptr %7, align 4, !tbaa !5
  %64 = add i32 %63, 84
  %65 = zext i32 %64 to i64
  %66 = inttoptr i64 %65 to ptr
  store volatile i32 %62, ptr %66, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_Bool", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"short", !7, i64 0}
!13 = !{i8 0, i8 2}
!14 = !{}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare hidden i32 @get_ccs_port_base(i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @gpio_set_schmidt_trigger(i32 noundef %0, i1 noundef zeroext %1, i16 noundef zeroext %2) local_unnamed_addr #0 {
  %4 = tail call i32 @get_ccs_port_base(i32 noundef %0)
  %5 = add i32 %4, 84
  %6 = zext i32 %5 to i64
  %7 = inttoptr i64 %6 to ptr
  %8 = load volatile i32, ptr %7, align 4, !tbaa !5
  %9 = icmp eq i16 %2, 0
  br i1 %9, label %select.unfold._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %3
  %10 = tail call range(i16 0, 17) i16 @llvm.cttz.i16(i16 %2, i1 true)
  %narrow = add nuw nsw i16 %10, 1
  br i1 %1, label %select.unfold.us, label %select.unfold

select.unfold.us:                                 ; preds = %.lr.ph, %select.unfold.us
  %.025.us = phi i16 [ %17, %select.unfold.us ], [ %2, %.lr.ph ]
  %.015.in24.us = phi i16 [ %narrow18.us, %select.unfold.us ], [ %narrow, %.lr.ph ]
  %.01623.us = phi i32 [ %14, %select.unfold.us ], [ %8, %.lr.ph ]
  %.015.us = zext nneg i16 %.015.in24.us to i32
  %11 = add nsw i32 %.015.us, -1
  %12 = shl nuw nsw i32 %11, 2
  %13 = shl nuw i32 8, %12
  %14 = or i32 %13, %.01623.us
  %15 = shl nuw nsw i32 1, %11
  %16 = trunc i32 %15 to i16
  %17 = xor i16 %.025.us, %16
  %18 = tail call range(i16 0, 17) i16 @llvm.cttz.i16(i16 %17, i1 true)
  %narrow18.us = add nuw nsw i16 %18, 1
  %19 = icmp eq i16 %.025.us, %16
  br i1 %19, label %select.unfold._crit_edge, label %select.unfold.us

select.unfold:                                    ; preds = %.lr.ph, %select.unfold
  %.025 = phi i16 [ %27, %select.unfold ], [ %2, %.lr.ph ]
  %.015.in24 = phi i16 [ %narrow18, %select.unfold ], [ %narrow, %.lr.ph ]
  %.01623 = phi i32 [ %24, %select.unfold ], [ %8, %.lr.ph ]
  %.015 = zext nneg i16 %.015.in24 to i32
  %20 = add nsw i32 %.015, -1
  %21 = shl nuw nsw i32 %20, 2
  %22 = shl nuw i32 8, %21
  %23 = xor i32 %22, -1
  %24 = and i32 %.01623, %23
  %25 = shl nuw nsw i32 1, %20
  %26 = trunc i32 %25 to i16
  %27 = xor i16 %.025, %26
  %28 = tail call range(i16 0, 17) i16 @llvm.cttz.i16(i16 %27, i1 true)
  %narrow18 = add nuw nsw i16 %28, 1
  %29 = icmp eq i16 %.025, %26
  br i1 %29, label %select.unfold._crit_edge, label %select.unfold

select.unfold._crit_edge:                         ; preds = %select.unfold, %select.unfold.us, %3
  %.016.lcssa = phi i32 [ %8, %3 ], [ %14, %select.unfold.us ], [ %24, %select.unfold ]
  store volatile i32 %.016.lcssa, ptr %7, align 4, !tbaa !5
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i16 @llvm.cttz.i16(i16, i1 immarg) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: ADCEPass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass