; LLVM IR from moarseniy/CudaFEMproject :: FEMproject/matrix_pack/src/cu/cuda_matrix.ll (ZN11CUDA_Matrix6resizeEmm)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Matrix = type <{ ptr, i32, [4 x i8], i64, i64, i64, ptr, i8, [7 x i8] }>

declare i32 @cudaFree(ptr noundef) #0

declare i32 @cudaMalloc(ptr noundef, i64 noundef) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN11CUDA_Matrix6resizeEmm(ptr noundef nonnull align 8 dereferenceable(49) %0, i64 noundef %1, i64 noundef %2) unnamed_addr #1 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !9
  store i64 %2, ptr %6, align 8, !tbaa !9
  %7 = load ptr, ptr %4, align 8
  %8 = load i64, ptr %5, align 8, !tbaa !9
  %9 = getelementptr inbounds %class.Matrix, ptr %7, i32 0, i32 3
  %10 = load i64, ptr %9, align 8, !tbaa !11
  %11 = icmp ne i64 %8, %10
  br i1 %11, label %17, label %12

12:                                               ; preds = %3
  %13 = load i64, ptr %6, align 8, !tbaa !9
  %14 = getelementptr inbounds %class.Matrix, ptr %7, i32 0, i32 4
  %15 = load i64, ptr %14, align 8, !tbaa !15
  %16 = icmp ne i64 %13, %15
  br i1 %16, label %17, label %57

17:                                               ; preds = %12, %3
  %18 = getelementptr inbounds %class.Matrix, ptr %7, i32 0, i32 5
  %19 = load i64, ptr %18, align 8, !tbaa !16
  %20 = load i64, ptr %5, align 8, !tbaa !9
  %21 = load i64, ptr %6, align 8, !tbaa !9
  %22 = mul i64 %20, %21
  %23 = icmp ne i64 %19, %22
  br i1 %23, label %24, label %48

24:                                               ; preds = %17
  %25 = getelementptr inbounds %class.Matrix, ptr %7, i32 0, i32 5
  %26 = load i64, ptr %25, align 8, !tbaa !16
  %27 = icmp ugt i64 %26, 0
  br i1 %27, label %28, label %33

28:                                               ; preds = %24
  %29 = getelementptr inbounds %class.Matrix, ptr %7, i32 0, i32 6
  %30 = load ptr, ptr %29, align 8, !tbaa !17
  %31 = call i32 @cudaFree(ptr noundef %30)
  %32 = getelementptr inbounds %class.Matrix, ptr %7, i32 0, i32 6
  store ptr null, ptr %32, align 8, !tbaa !17
  br label %33

33:                                               ; preds = %28, %24
  %34 = load i64, ptr %5, align 8, !tbaa !9
  %35 = load i64, ptr %6, align 8, !tbaa !9
  %36 = mul i64 %34, %35
  %37 = icmp ugt i64 %36, 0
  br i1 %37, label %38, label %45

38:                                               ; preds = %33
  %39 = getelementptr inbounds %class.Matrix, ptr %7, i32 0, i32 6
  %40 = load i64, ptr %5, align 8, !tbaa !9
  %41 = load i64, ptr %6, align 8, !tbaa !9
  %42 = mul i64 %40, %41
  %43 = mul i64 %42, 4
  %44 = call i32 @cudaMalloc(ptr noundef %39, i64 noundef %43)
  br label %47

45:                                               ; preds = %33
  %46 = getelementptr inbounds %class.Matrix, ptr %7, i32 0, i32 6
  store ptr null, ptr %46, align 8, !tbaa !17
  br label %47

47:                                               ; preds = %45, %38
  br label %48

48:                                               ; preds = %47, %17
  %49 = load i64, ptr %5, align 8, !tbaa !9
  %50 = getelementptr inbounds %class.Matrix, ptr %7, i32 0, i32 3
  store i64 %49, ptr %50, align 8, !tbaa !11
  %51 = load i64, ptr %6, align 8, !tbaa !9
  %52 = getelementptr inbounds %class.Matrix, ptr %7, i32 0, i32 4
  store i64 %51, ptr %52, align 8, !tbaa !15
  %53 = load i64, ptr %5, align 8, !tbaa !9
  %54 = load i64, ptr %6, align 8, !tbaa !9
  %55 = mul i64 %53, %54
  %56 = getelementptr inbounds %class.Matrix, ptr %7, i32 0, i32 5
  store i64 %55, ptr %56, align 8, !tbaa !16
  br label %57

57:                                               ; preds = %48, %12
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !10, i64 16}
!12 = !{!"_ZTS6Matrix", !13, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !6, i64 40, !14, i64 48}
!13 = !{!"_ZTS11DEVICE_NAME", !7, i64 0}
!14 = !{!"bool", !7, i64 0}
!15 = !{!12, !10, i64 24}
!16 = !{!12, !10, i64 32}
!17 = !{!12, !6, i64 40}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare i32 @cudaFree(ptr noundef) local_unnamed_addr #0

declare i32 @cudaMalloc(ptr noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN11CUDA_Matrix6resizeEmm(ptr noundef nonnull align 8 dereferenceable(49) %0, i64 noundef %1, i64 noundef %2) unnamed_addr #1 align 2 {
  %4 = getelementptr inbounds i8, ptr %0, i64 16
  %5 = load i64, ptr %4, align 8, !tbaa !5
  %.not = icmp eq i64 %5, %1
  %6 = getelementptr inbounds i8, ptr %0, i64 24
  %7 = load i64, ptr %6, align 8
  %.not13 = icmp eq i64 %7, %2
  %or.cond = select i1 %.not, i1 %.not13, i1 false
  br i1 %or.cond, label %24, label %8

8:                                                ; preds = %3
  %9 = getelementptr inbounds i8, ptr %0, i64 32
  %10 = load i64, ptr %9, align 8, !tbaa !13
  %11 = mul i64 %2, %1
  %.not14 = icmp eq i64 %10, %11
  br i1 %.not14, label %23, label %12

12:                                               ; preds = %8
  %.not15 = icmp eq i64 %10, 0
  br i1 %.not15, label %17, label %13

13:                                               ; preds = %12
  %14 = getelementptr inbounds i8, ptr %0, i64 40
  %15 = load ptr, ptr %14, align 8, !tbaa !14
  %16 = tail call i32 @cudaFree(ptr noundef %15)
  store ptr null, ptr %14, align 8, !tbaa !14
  br label %17

17:                                               ; preds = %13, %12
  %.not16 = icmp eq i64 %11, 0
  %18 = getelementptr inbounds i8, ptr %0, i64 40
  br i1 %.not16, label %22, label %19

19:                                               ; preds = %17
  %20 = shl i64 %11, 2
  %21 = tail call i32 @cudaMalloc(ptr noundef nonnull %18, i64 noundef %20)
  br label %23

22:                                               ; preds = %17
  store ptr null, ptr %18, align 8, !tbaa !14
  br label %23

23:                                               ; preds = %19, %22, %8
  store i64 %1, ptr %4, align 8, !tbaa !5
  store i64 %2, ptr %6, align 8, !tbaa !15
  store i64 %11, ptr %9, align 8, !tbaa !13
  br label %24

24:                                               ; preds = %3, %23
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 16}
!6 = !{!"_ZTS6Matrix", !7, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !11, i64 40, !12, i64 48}
!7 = !{!"_ZTS11DEVICE_NAME", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!"bool", !8, i64 0}
!13 = !{!6, !10, i64 32}
!14 = !{!6, !11, i64 40}
!15 = !{!6, !10, i64 24}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass