; LLVM IR from jingweizhanghuai/Morn :: src/image (morn_image_transform)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @TemplateCacuate(i32 noundef %0, i32 noundef %1, i32 noundef %2, float noundef %3, float noundef %4, float noundef %5, ptr noundef %6, ptr noundef %7) #2 {
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca float, align 4
  %13 = alloca float, align 4
  %14 = alloca float, align 4
  %15 = alloca ptr, align 8
  %16 = alloca ptr, align 8
  %17 = alloca float, align 4
  %18 = alloca float, align 4
  %19 = alloca float, align 4
  %20 = alloca float, align 4
  %21 = alloca i32, align 4
  store i32 %0, ptr %9, align 4, !tbaa !5
  store i32 %1, ptr %10, align 4, !tbaa !5
  store i32 %2, ptr %11, align 4, !tbaa !5
  store float %3, ptr %12, align 4, !tbaa !9
  store float %4, ptr %13, align 4, !tbaa !9
  store float %5, ptr %14, align 4, !tbaa !9
  store ptr %6, ptr %15, align 8, !tbaa !11
  store ptr %7, ptr %16, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #4
  %22 = load i32, ptr %9, align 4, !tbaa !5
  %23 = sitofp i32 %22 to float
  %24 = load float, ptr %13, align 4, !tbaa !9
  %25 = fsub float %23, %24
  store float %25, ptr %18, align 4, !tbaa !9
  %26 = load i32, ptr %10, align 4, !tbaa !5
  %27 = sitofp i32 %26 to float
  %28 = load float, ptr %14, align 4, !tbaa !9
  %29 = fsub float %27, %28
  store float %29, ptr %19, align 4, !tbaa !9
  %30 = load float, ptr %18, align 4, !tbaa !9
  %31 = load float, ptr %18, align 4, !tbaa !9
  %32 = load float, ptr %19, align 4, !tbaa !9
  %33 = load float, ptr %19, align 4, !tbaa !9
  %34 = fmul float %32, %33
  %35 = call float @llvm.fmuladd.f32(float %30, float %31, float %34)
  store float %35, ptr %20, align 4, !tbaa !9
  %36 = load float, ptr %20, align 4, !tbaa !9
  %37 = load i32, ptr %11, align 4, !tbaa !5
  %38 = load i32, ptr %11, align 4, !tbaa !5
  %39 = mul nsw i32 %37, %38
  %40 = sitofp i32 %39 to float
  %41 = fcmp oge float %36, %40
  br i1 %41, label %42, label %45

42:                                               ; preds = %8
  %43 = load ptr, ptr %15, align 8, !tbaa !11
  store i32 -1, ptr %43, align 4, !tbaa !5
  %44 = load ptr, ptr %16, align 8, !tbaa !11
  store i32 -1, ptr %44, align 4, !tbaa !5
  store i32 1, ptr %21, align 4
  br label %74

45:                                               ; preds = %8
  %46 = load float, ptr %20, align 4, !tbaa !9
  %47 = fpext float %46 to double
  %48 = call double @sqrt(double noundef %47) #4
  %49 = fptrunc double %48 to float
  store float %49, ptr %20, align 4, !tbaa !9
  %50 = load float, ptr %20, align 4, !tbaa !9
  %51 = load i32, ptr %11, align 4, !tbaa !5
  %52 = sitofp i32 %51 to float
  %53 = fdiv float %50, %52
  %54 = fsub float 1.000000e+00, %53
  store float %54, ptr %17, align 4, !tbaa !9
  %55 = load float, ptr %17, align 4, !tbaa !9
  %56 = load float, ptr %17, align 4, !tbaa !9
  %57 = fmul float %55, %56
  store float %57, ptr %17, align 4, !tbaa !9
  %58 = load float, ptr %12, align 4, !tbaa !9
  %59 = fsub float %58, 1.000000e+00
  %60 = load float, ptr %17, align 4, !tbaa !9
  %61 = call float @llvm.fmuladd.f32(float %59, float %60, float 1.000000e+00)
  store float %61, ptr %17, align 4, !tbaa !9
  %62 = load float, ptr %13, align 4, !tbaa !9
  %63 = load float, ptr %18, align 4, !tbaa !9
  %64 = load float, ptr %17, align 4, !tbaa !9
  %65 = call float @llvm.fmuladd.f32(float %63, float %64, float %62)
  %66 = fptosi float %65 to i32
  %67 = load ptr, ptr %15, align 8, !tbaa !11
  store i32 %66, ptr %67, align 4, !tbaa !5
  %68 = load float, ptr %14, align 4, !tbaa !9
  %69 = load float, ptr %19, align 4, !tbaa !9
  %70 = load float, ptr %17, align 4, !tbaa !9
  %71 = call float @llvm.fmuladd.f32(float %69, float %70, float %68)
  %72 = fptosi float %71 to i32
  %73 = load ptr, ptr %16, align 8, !tbaa !11
  store i32 %72, ptr %73, align 4, !tbaa !5
  store i32 0, ptr %21, align 4
  br label %74

74:                                               ; preds = %45, %42
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #4
  %75 = load i32, ptr %21, align 4
  switch i32 %75, label %77 [
    i32 0, label %76
    i32 1, label %76
  ]

76:                                               ; preds = %74, %74
  ret void

77:                                               ; preds = %74
  unreachable
}

; Function Attrs: nounwind
declare double @sqrt(double noundef) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"float", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #0

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable
define dso_local void @TemplateCacuate(i32 noundef %0, i32 noundef %1, i32 noundef %2, float noundef %3, float noundef %4, float noundef %5, ptr nocapture noundef writeonly %6, ptr nocapture noundef writeonly %7) local_unnamed_addr #1 {
  %9 = insertelement <2 x i32> poison, i32 %0, i64 0
  %10 = insertelement <2 x i32> %9, i32 %1, i64 1
  %11 = sitofp <2 x i32> %10 to <2 x float>
  %12 = insertelement <2 x float> poison, float %4, i64 0
  %13 = insertelement <2 x float> %12, float %5, i64 1
  %14 = fsub <2 x float> %11, %13
  %15 = fmul <2 x float> %14, %14
  %16 = extractelement <2 x float> %15, i64 1
  %17 = extractelement <2 x float> %14, i64 0
  %18 = tail call float @llvm.fmuladd.f32(float %17, float %17, float %16)
  %19 = mul nsw i32 %2, %2
  %20 = uitofp nneg i32 %19 to float
  %21 = fcmp ult float %18, %20
  br i1 %21, label %22, label %33

22:                                               ; preds = %8
  %sqrt = tail call float @llvm.sqrt.f32(float %18)
  %23 = sitofp i32 %2 to float
  %24 = fdiv float %sqrt, %23
  %25 = fsub float 1.000000e+00, %24
  %26 = fmul float %25, %25
  %27 = fadd float %3, -1.000000e+00
  %28 = tail call float @llvm.fmuladd.f32(float %27, float %26, float 1.000000e+00)
  %29 = insertelement <2 x float> poison, float %28, i64 0
  %30 = shufflevector <2 x float> %29, <2 x float> poison, <2 x i32> zeroinitializer
  %31 = tail call <2 x float> @llvm.fmuladd.v2f32(<2 x float> %14, <2 x float> %30, <2 x float> %13)
  %32 = fptosi <2 x float> %31 to <2 x i32>
  br label %33

33:                                               ; preds = %8, %22
  %34 = phi <2 x i32> [ %32, %22 ], [ <i32 -1, i32 -1>, %8 ]
  %35 = extractelement <2 x i32> %34, i64 0
  store i32 %35, ptr %6, align 4
  %36 = extractelement <2 x i32> %34, i64 1
  store i32 %36, ptr %7, align 4, !tbaa !5
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.sqrt.f32(float) #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare <2 x float> @llvm.fmuladd.v2f32(<2 x float>, <2 x float>, <2 x float>) #2

attributes #0 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #1 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: AggressiveInstCombinePass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,MergedLoadStoreMotionPass,PostOrderFunctionAttrsPass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass,VectorCombinePass