; LLVM IR from TheAlgorithms/C-Plus-Plus :: others (tower_of_hanoi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%struct.tower = type { [10 x i32], i32 }

@_ZSt4cout = external global %"class.std::basic_ostream", align 8
@.str.4 = external hidden unnamed_addr constant [26 x i8], align 1
@_ZSt3cin = external global %"class.std::basic_istream", align 8

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z4showPK5towerS1_S1_(ptr noundef, ptr noundef, ptr noundef) #0

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z2THiP5towerS0_S0_(i32 noundef, ptr noundef, ptr noundef, ptr noundef) #0

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #3 {
  %1 = alloca i32, align 4
  %2 = alloca %struct.tower, align 4
  %3 = alloca %struct.tower, align 4
  %4 = alloca %struct.tower, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  call void @llvm.lifetime.start.p0(i64 44, ptr %2) #5
  call void @llvm.lifetime.start.p0(i64 44, ptr %3) #5
  call void @llvm.lifetime.start.p0(i64 44, ptr %4) #5
  %7 = getelementptr inbounds %struct.tower, ptr %2, i32 0, i32 1
  store i32 0, ptr %7, align 4, !tbaa !5
  %8 = getelementptr inbounds %struct.tower, ptr %3, i32 0, i32 1
  store i32 0, ptr %8, align 4, !tbaa !5
  %9 = getelementptr inbounds %struct.tower, ptr %4, i32 0, i32 1
  store i32 0, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #5
  %10 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, ptr noundef @.str.4)
  %11 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %5)
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #5
  %12 = load i32, ptr %5, align 4, !tbaa !10
  store i32 %12, ptr %6, align 4, !tbaa !10
  br label %13

13:                                               ; preds = %25, %0
  %14 = load i32, ptr %6, align 4, !tbaa !10
  %15 = icmp sgt i32 %14, 0
  br i1 %15, label %17, label %16

16:                                               ; preds = %13
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #5
  br label %28

17:                                               ; preds = %13
  %18 = load i32, ptr %6, align 4, !tbaa !10
  %19 = getelementptr inbounds %struct.tower, ptr %2, i32 0, i32 0
  %20 = getelementptr inbounds %struct.tower, ptr %2, i32 0, i32 1
  %21 = load i32, ptr %20, align 4, !tbaa !5
  %22 = add nsw i32 %21, 1
  store i32 %22, ptr %20, align 4, !tbaa !5
  %23 = sext i32 %21 to i64
  %24 = getelementptr inbounds [10 x i32], ptr %19, i64 0, i64 %23
  store i32 %18, ptr %24, align 4, !tbaa !10
  br label %25

25:                                               ; preds = %17
  %26 = load i32, ptr %6, align 4, !tbaa !10
  %27 = add nsw i32 %26, -1
  store i32 %27, ptr %6, align 4, !tbaa !10
  br label %13, !llvm.loop !11

28:                                               ; preds = %16
  call void @_Z4showPK5towerS1_S1_(ptr noundef %2, ptr noundef %4, ptr noundef %3)
  %29 = load i32, ptr %5, align 4, !tbaa !10
  call void @_Z2THiP5towerS0_S0_(i32 noundef %29, ptr noundef %2, ptr noundef %3, ptr noundef %4)
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #5
  call void @llvm.lifetime.end.p0(i64 44, ptr %4) #5
  call void @llvm.lifetime.end.p0(i64 44, ptr %3) #5
  call void @llvm.lifetime.end.p0(i64 44, ptr %2) #5
  ret i32 0
}

declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(4)) #4

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !9, i64 40}
!6 = !{!"_ZTS5tower", !7, i64 0, !9, i64 40}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!"int", !7, i64 0}
!10 = !{!9, !9, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%struct.tower = type { [10 x i32], i32 }

@_ZSt4cout = external global %"class.std::basic_ostream", align 8
@.str.4 = external hidden unnamed_addr constant [26 x i8], align 1
@_ZSt3cin = external global %"class.std::basic_istream", align 8

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z4showPK5towerS1_S1_(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z2THiP5towerS0_S0_(i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() local_unnamed_addr #3 {
  %1 = alloca %struct.tower, align 4
  %2 = alloca %struct.tower, align 4
  %3 = alloca %struct.tower, align 4
  %4 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 44, ptr nonnull %1) #5
  call void @llvm.lifetime.start.p0(i64 44, ptr nonnull %2) #5
  call void @llvm.lifetime.start.p0(i64 44, ptr nonnull %3) #5
  %5 = getelementptr inbounds i8, ptr %1, i64 40
  store i32 0, ptr %5, align 4, !tbaa !5
  %6 = getelementptr inbounds i8, ptr %2, i64 40
  store i32 0, ptr %6, align 4, !tbaa !5
  %7 = getelementptr inbounds i8, ptr %3, i64 40
  store i32 0, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #5
  %8 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, ptr noundef nonnull @.str.4)
  %9 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %4)
  %10 = load i32, ptr %4, align 4, !tbaa !10
  %11 = icmp sgt i32 %10, 0
  br i1 %11, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %0
  %xtraiter = and i32 %10, 3
  %lcmp.mod.not = icmp eq i32 %xtraiter, 0
  br i1 %lcmp.mod.not, label %.lr.ph.prol.loopexit, label %.lr.ph.prol

.lr.ph.prol:                                      ; preds = %.lr.ph.preheader, %.lr.ph.prol
  %.03.prol = phi i32 [ %16, %.lr.ph.prol ], [ %10, %.lr.ph.preheader ]
  %prol.iter = phi i32 [ %prol.iter.next, %.lr.ph.prol ], [ 0, %.lr.ph.preheader ]
  %12 = load i32, ptr %5, align 4, !tbaa !5
  %13 = add nsw i32 %12, 1
  store i32 %13, ptr %5, align 4, !tbaa !5
  %14 = sext i32 %12 to i64
  %15 = getelementptr inbounds [10 x i32], ptr %1, i64 0, i64 %14
  store i32 %.03.prol, ptr %15, align 4, !tbaa !10
  %16 = add nsw i32 %.03.prol, -1
  %prol.iter.next = add i32 %prol.iter, 1
  %prol.iter.cmp.not = icmp eq i32 %prol.iter.next, %xtraiter
  br i1 %prol.iter.cmp.not, label %.lr.ph.prol.loopexit, label %.lr.ph.prol, !llvm.loop !11

.lr.ph.prol.loopexit:                             ; preds = %.lr.ph.prol, %.lr.ph.preheader
  %.03.unr = phi i32 [ %10, %.lr.ph.preheader ], [ %16, %.lr.ph.prol ]
  %17 = icmp ult i32 %10, 4
  br i1 %17, label %._crit_edge, label %.lr.ph

._crit_edge:                                      ; preds = %.lr.ph.prol.loopexit, %.lr.ph, %0
  call void @_Z4showPK5towerS1_S1_(ptr noundef nonnull %1, ptr noundef nonnull %3, ptr noundef nonnull %2)
  %18 = load i32, ptr %4, align 4, !tbaa !10
  call void @_Z2THiP5towerS0_S0_(i32 noundef %18, ptr noundef nonnull %1, ptr noundef nonnull %2, ptr noundef nonnull %3)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #5
  call void @llvm.lifetime.end.p0(i64 44, ptr nonnull %3) #5
  call void @llvm.lifetime.end.p0(i64 44, ptr nonnull %2) #5
  call void @llvm.lifetime.end.p0(i64 44, ptr nonnull %1) #5
  ret i32 0

.lr.ph:                                           ; preds = %.lr.ph.prol.loopexit, %.lr.ph
  %.03 = phi i32 [ %38, %.lr.ph ], [ %.03.unr, %.lr.ph.prol.loopexit ]
  %19 = load i32, ptr %5, align 4, !tbaa !5
  %20 = add nsw i32 %19, 1
  store i32 %20, ptr %5, align 4, !tbaa !5
  %21 = sext i32 %19 to i64
  %22 = getelementptr inbounds [10 x i32], ptr %1, i64 0, i64 %21
  store i32 %.03, ptr %22, align 4, !tbaa !10
  %23 = add nsw i32 %.03, -1
  %24 = load i32, ptr %5, align 4, !tbaa !5
  %25 = add nsw i32 %24, 1
  store i32 %25, ptr %5, align 4, !tbaa !5
  %26 = sext i32 %24 to i64
  %27 = getelementptr inbounds [10 x i32], ptr %1, i64 0, i64 %26
  store i32 %23, ptr %27, align 4, !tbaa !10
  %28 = add nsw i32 %.03, -2
  %29 = load i32, ptr %5, align 4, !tbaa !5
  %30 = add nsw i32 %29, 1
  store i32 %30, ptr %5, align 4, !tbaa !5
  %31 = sext i32 %29 to i64
  %32 = getelementptr inbounds [10 x i32], ptr %1, i64 0, i64 %31
  store i32 %28, ptr %32, align 4, !tbaa !10
  %33 = add nsw i32 %.03, -3
  %34 = load i32, ptr %5, align 4, !tbaa !5
  %35 = add nsw i32 %34, 1
  store i32 %35, ptr %5, align 4, !tbaa !5
  %36 = sext i32 %34 to i64
  %37 = getelementptr inbounds [10 x i32], ptr %1, i64 0, i64 %36
  store i32 %33, ptr %37, align 4, !tbaa !10
  %38 = add nsw i32 %.03, -4
  %39 = icmp ugt i32 %33, 1
  br i1 %39, label %.lr.ph, label %._crit_edge, !llvm.loop !13
}

declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #4

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !9, i64 40}
!6 = !{!"_ZTS5tower", !7, i64 0, !9, i64 40}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!"int", !7, i64 0}
!10 = !{!9, !9, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.unroll.disable"}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass