; LLVM IR from VastoLorde95/Competitive-Programming :: Codeforces/239 Division 2/Problem B (B)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }

@n = external dso_local global i32, align 4
@m = external dso_local global i32, align 4
@cnt1 = external dso_local global [26 x i32], align 16
@cnt2 = external dso_local global [26 x i32], align 16
@res = external dso_local global i32, align 4
@_Z1sB5cxx11 = external dso_local global %"class.std::__cxx11::basic_string", align 8
@_Z1tB5cxx11 = external dso_local global %"class.std::__cxx11::basic_string", align 8
@_ZSt3cin = external global %"class.std::basic_istream", align 8
@.str = external hidden unnamed_addr constant [4 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [4 x i8], align 1

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  %6 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZStrsIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 8 dereferenceable(32) @_Z1sB5cxx11)
  %7 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZStrsIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 8 dereferenceable(32) @_Z1tB5cxx11)
  %8 = call noundef i64 @_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6lengthEv(ptr noundef nonnull align 8 dereferenceable(32) @_Z1sB5cxx11) #4
  %9 = trunc i64 %8 to i32
  store i32 %9, ptr @n, align 4, !tbaa !5
  %10 = call noundef i64 @_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6lengthEv(ptr noundef nonnull align 8 dereferenceable(32) @_Z1tB5cxx11) #4
  %11 = trunc i64 %10 to i32
  store i32 %11, ptr @m, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #4
  store i32 0, ptr %2, align 4, !tbaa !5
  br label %12

12:                                               ; preds = %28, %0
  %13 = load i32, ptr %2, align 4, !tbaa !5
  %14 = load i32, ptr @n, align 4, !tbaa !5
  %15 = icmp slt i32 %13, %14
  br i1 %15, label %17, label %16

16:                                               ; preds = %12
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #4
  br label %31

17:                                               ; preds = %12
  %18 = load i32, ptr %2, align 4, !tbaa !5
  %19 = sext i32 %18 to i64
  %20 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(32) @_Z1sB5cxx11, i64 noundef %19)
  %21 = load i8, ptr %20, align 1, !tbaa !9
  %22 = sext i8 %21 to i32
  %23 = sub nsw i32 %22, 97
  %24 = sext i32 %23 to i64
  %25 = getelementptr inbounds [26 x i32], ptr @cnt1, i64 0, i64 %24
  %26 = load i32, ptr %25, align 4, !tbaa !5
  %27 = add nsw i32 %26, 1
  store i32 %27, ptr %25, align 4, !tbaa !5
  br label %28

28:                                               ; preds = %17
  %29 = load i32, ptr %2, align 4, !tbaa !5
  %30 = add nsw i32 %29, 1
  store i32 %30, ptr %2, align 4, !tbaa !5
  br label %12, !llvm.loop !10

31:                                               ; preds = %16
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  store i32 0, ptr %3, align 4, !tbaa !5
  br label %32

32:                                               ; preds = %48, %31
  %33 = load i32, ptr %3, align 4, !tbaa !5
  %34 = load i32, ptr @m, align 4, !tbaa !5
  %35 = icmp slt i32 %33, %34
  br i1 %35, label %37, label %36

36:                                               ; preds = %32
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  br label %51

37:                                               ; preds = %32
  %38 = load i32, ptr %3, align 4, !tbaa !5
  %39 = sext i32 %38 to i64
  %40 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(32) @_Z1tB5cxx11, i64 noundef %39)
  %41 = load i8, ptr %40, align 1, !tbaa !9
  %42 = sext i8 %41 to i32
  %43 = sub nsw i32 %42, 97
  %44 = sext i32 %43 to i64
  %45 = getelementptr inbounds [26 x i32], ptr @cnt2, i64 0, i64 %44
  %46 = load i32, ptr %45, align 4, !tbaa !5
  %47 = add nsw i32 %46, 1
  store i32 %47, ptr %45, align 4, !tbaa !5
  br label %48

48:                                               ; preds = %37
  %49 = load i32, ptr %3, align 4, !tbaa !5
  %50 = add nsw i32 %49, 1
  store i32 %50, ptr %3, align 4, !tbaa !5
  br label %32, !llvm.loop !12

51:                                               ; preds = %36
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  store i32 0, ptr %4, align 4, !tbaa !5
  br label %52

52:                                               ; preds = %95, %51
  %53 = load i32, ptr %4, align 4, !tbaa !5
  %54 = icmp slt i32 %53, 26
  br i1 %54, label %56, label %55

55:                                               ; preds = %52
  store i32 8, ptr %5, align 4
  br label %98

56:                                               ; preds = %52
  %57 = load i32, ptr %4, align 4, !tbaa !5
  %58 = sext i32 %57 to i64
  %59 = getelementptr inbounds [26 x i32], ptr @cnt1, i64 0, i64 %58
  %60 = load i32, ptr %59, align 4, !tbaa !5
  %61 = icmp eq i32 %60, 0
  br i1 %61, label %62, label %70

62:                                               ; preds = %56
  %63 = load i32, ptr %4, align 4, !tbaa !5
  %64 = sext i32 %63 to i64
  %65 = getelementptr inbounds [26 x i32], ptr @cnt2, i64 0, i64 %64
  %66 = load i32, ptr %65, align 4, !tbaa !5
  %67 = icmp ne i32 %66, 0
  br i1 %67, label %68, label %70

68:                                               ; preds = %62
  %69 = call i32 (ptr, ...) @printf(ptr noundef @.str)
  store i32 0, ptr %1, align 4
  store i32 1, ptr %5, align 4
  br label %98

70:                                               ; preds = %62, %56
  %71 = load i32, ptr %4, align 4, !tbaa !5
  %72 = sext i32 %71 to i64
  %73 = getelementptr inbounds [26 x i32], ptr @cnt1, i64 0, i64 %72
  %74 = load i32, ptr %73, align 4, !tbaa !5
  %75 = load i32, ptr %4, align 4, !tbaa !5
  %76 = sext i32 %75 to i64
  %77 = getelementptr inbounds [26 x i32], ptr @cnt2, i64 0, i64 %76
  %78 = load i32, ptr %77, align 4, !tbaa !5
  %79 = icmp sge i32 %74, %78
  br i1 %79, label %80, label %87

80:                                               ; preds = %70
  %81 = load i32, ptr %4, align 4, !tbaa !5
  %82 = sext i32 %81 to i64
  %83 = getelementptr inbounds [26 x i32], ptr @cnt2, i64 0, i64 %82
  %84 = load i32, ptr %83, align 4, !tbaa !5
  %85 = load i32, ptr @res, align 4, !tbaa !5
  %86 = add nsw i32 %85, %84
  store i32 %86, ptr @res, align 4, !tbaa !5
  br label %94

87:                                               ; preds = %70
  %88 = load i32, ptr %4, align 4, !tbaa !5
  %89 = sext i32 %88 to i64
  %90 = getelementptr inbounds [26 x i32], ptr @cnt1, i64 0, i64 %89
  %91 = load i32, ptr %90, align 4, !tbaa !5
  %92 = load i32, ptr @res, align 4, !tbaa !5
  %93 = add nsw i32 %92, %91
  store i32 %93, ptr @res, align 4, !tbaa !5
  br label %94

94:                                               ; preds = %87, %80
  br label %95

95:                                               ; preds = %94
  %96 = load i32, ptr %4, align 4, !tbaa !5
  %97 = add nsw i32 %96, 1
  store i32 %97, ptr %4, align 4, !tbaa !5
  br label %52, !llvm.loop !13

98:                                               ; preds = %68, %55
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  %99 = load i32, ptr %5, align 4
  switch i32 %99, label %105 [
    i32 8, label %100
    i32 1, label %103
  ]

100:                                              ; preds = %98
  %101 = load i32, ptr @res, align 4, !tbaa !5
  %102 = call i32 (ptr, ...) @printf(ptr noundef @.str.3, i32 noundef %101)
  store i32 0, ptr %1, align 4
  br label %103

103:                                              ; preds = %100, %98
  %104 = load i32, ptr %1, align 4
  ret i32 %104

105:                                              ; preds = %98
  unreachable
}

declare noundef nonnull align 8 dereferenceable(16) ptr @_ZStrsIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(32)) #1

; Function Attrs: mustprogress nounwind uwtable
declare noundef i64 @_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6lengthEv(ptr noundef nonnull align 8 dereferenceable(32)) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #3

; Function Attrs: mustprogress nounwind uwtable
declare noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(32), i64 noundef) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #3

declare i32 @printf(ptr noundef, ...) #1

attributes #0 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11}
!13 = distinct !{!13, !11}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }

@n = external dso_local local_unnamed_addr global i32, align 4
@m = external dso_local local_unnamed_addr global i32, align 4
@cnt1 = external dso_local local_unnamed_addr global [26 x i32], align 16
@cnt2 = external dso_local local_unnamed_addr global [26 x i32], align 16
@res = external dso_local local_unnamed_addr global i32, align 4
@_Z1sB5cxx11 = external dso_local global %"class.std::__cxx11::basic_string", align 8
@_Z1tB5cxx11 = external dso_local global %"class.std::__cxx11::basic_string", align 8
@_ZSt3cin = external global %"class.std::basic_istream", align 8
@.str = external hidden unnamed_addr constant [4 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [4 x i8], align 1

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() local_unnamed_addr #0 {
  %1 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZStrsIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 8 dereferenceable(32) @_Z1sB5cxx11)
  %2 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZStrsIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 8 dereferenceable(32) @_Z1tB5cxx11)
  %3 = tail call noundef i64 @_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6lengthEv(ptr noundef nonnull align 8 dereferenceable(32) @_Z1sB5cxx11) #5
  %4 = trunc i64 %3 to i32
  store i32 %4, ptr @n, align 4, !tbaa !5
  %5 = tail call noundef i64 @_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6lengthEv(ptr noundef nonnull align 8 dereferenceable(32) @_Z1tB5cxx11) #5
  %6 = trunc i64 %5 to i32
  store i32 %6, ptr @m, align 4, !tbaa !5
  %7 = load i32, ptr @n, align 4, !tbaa !5
  %8 = icmp sgt i32 %7, 0
  br i1 %8, label %.lr.ph, label %.preheader26

.preheader26.loopexit:                            ; preds = %.lr.ph
  %.pre = load i32, ptr @m, align 4, !tbaa !5
  br label %.preheader26

.preheader26:                                     ; preds = %.preheader26.loopexit, %0
  %9 = phi i32 [ %.pre, %.preheader26.loopexit ], [ %6, %0 ]
  %10 = icmp sgt i32 %9, 0
  br i1 %10, label %.lr.ph29, label %.preheader

.lr.ph:                                           ; preds = %0, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %0 ]
  %11 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(32) @_Z1sB5cxx11, i64 noundef %indvars.iv)
  %12 = load i8, ptr %11, align 1, !tbaa !9
  %13 = sext i8 %12 to i64
  %14 = add nsw i64 %13, -97
  %15 = getelementptr inbounds [26 x i32], ptr @cnt1, i64 0, i64 %14
  %16 = load i32, ptr %15, align 4, !tbaa !5
  %17 = add nsw i32 %16, 1
  store i32 %17, ptr %15, align 4, !tbaa !5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %18 = load i32, ptr @n, align 4, !tbaa !5
  %19 = sext i32 %18 to i64
  %20 = icmp slt i64 %indvars.iv.next, %19
  br i1 %20, label %.lr.ph, label %.preheader26.loopexit, !llvm.loop !10

.preheader:                                       ; preds = %.lr.ph29, %.preheader26
  %res.promoted = load i32, ptr @res, align 4
  %21 = load i32, ptr @cnt1, align 16, !tbaa !5
  %22 = icmp eq i32 %21, 0
  %23 = load i32, ptr @cnt2, align 16, !tbaa !5
  br i1 %22, label %34, label %._crit_edge

.lr.ph29:                                         ; preds = %.preheader26, %.lr.ph29
  %indvars.iv34 = phi i64 [ %indvars.iv.next35, %.lr.ph29 ], [ 0, %.preheader26 ]
  %24 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(32) @_Z1tB5cxx11, i64 noundef %indvars.iv34)
  %25 = load i8, ptr %24, align 1, !tbaa !9
  %26 = sext i8 %25 to i64
  %27 = add nsw i64 %26, -97
  %28 = getelementptr inbounds [26 x i32], ptr @cnt2, i64 0, i64 %27
  %29 = load i32, ptr %28, align 4, !tbaa !5
  %30 = add nsw i32 %29, 1
  store i32 %30, ptr %28, align 4, !tbaa !5
  %indvars.iv.next35 = add nuw nsw i64 %indvars.iv34, 1
  %31 = load i32, ptr @m, align 4, !tbaa !5
  %32 = sext i32 %31 to i64
  %33 = icmp slt i64 %indvars.iv.next35, %32
  br i1 %33, label %.lr.ph29, label %.preheader, !llvm.loop !12

34:                                               ; preds = %.preheader
  %.not = icmp eq i32 %23, 0
  br i1 %.not, label %._crit_edge, label %162

._crit_edge:                                      ; preds = %.preheader, %34
  %35 = phi i32 [ 0, %34 ], [ %23, %.preheader ]
  %storemerge.v = tail call i32 @llvm.smin.i32(i32 %21, i32 %35)
  %storemerge = add nsw i32 %res.promoted, %storemerge.v
  store i32 %storemerge, ptr @res, align 4, !tbaa !5
  %36 = load i32, ptr getelementptr inbounds (i8, ptr @cnt1, i64 4), align 4, !tbaa !5
  %37 = icmp eq i32 %36, 0
  %38 = load i32, ptr getelementptr inbounds (i8, ptr @cnt2, i64 4), align 4, !tbaa !5
  br i1 %37, label %39, label %._crit_edge.1

39:                                               ; preds = %._crit_edge
  %.not.1 = icmp eq i32 %38, 0
  br i1 %.not.1, label %._crit_edge.1, label %162

._crit_edge.1:                                    ; preds = %39, %._crit_edge
  %40 = phi i32 [ 0, %39 ], [ %38, %._crit_edge ]
  %storemerge.v.1 = tail call i32 @llvm.smin.i32(i32 %36, i32 %40)
  %storemerge.1 = add nsw i32 %storemerge, %storemerge.v.1
  store i32 %storemerge.1, ptr @res, align 4, !tbaa !5
  %41 = load i32, ptr getelementptr inbounds (i8, ptr @cnt1, i64 8), align 8, !tbaa !5
  %42 = icmp eq i32 %41, 0
  %43 = load i32, ptr getelementptr inbounds (i8, ptr @cnt2, i64 8), align 8, !tbaa !5
  br i1 %42, label %44, label %._crit_edge.2

44:                                               ; preds = %._crit_edge.1
  %.not.2 = icmp eq i32 %43, 0
  br i1 %.not.2, label %._crit_edge.2, label %162

._crit_edge.2:                                    ; preds = %44, %._crit_edge.1
  %45 = phi i32 [ 0, %44 ], [ %43, %._crit_edge.1 ]
  %storemerge.v.2 = tail call i32 @llvm.smin.i32(i32 %41, i32 %45)
  %storemerge.2 = add nsw i32 %storemerge.1, %storemerge.v.2
  store i32 %storemerge.2, ptr @res, align 4, !tbaa !5
  %46 = load i32, ptr getelementptr inbounds (i8, ptr @cnt1, i64 12), align 4, !tbaa !5
  %47 = icmp eq i32 %46, 0
  %48 = load i32, ptr getelementptr inbounds (i8, ptr @cnt2, i64 12), align 4, !tbaa !5
  br i1 %47, label %49, label %._crit_edge.3

49:                                               ; preds = %._crit_edge.2
  %.not.3 = icmp eq i32 %48, 0
  br i1 %.not.3, label %._crit_edge.3, label %162

._crit_edge.3:                                    ; preds = %49, %._crit_edge.2
  %50 = phi i32 [ 0, %49 ], [ %48, %._crit_edge.2 ]
  %storemerge.v.3 = tail call i32 @llvm.smin.i32(i32 %46, i32 %50)
  %storemerge.3 = add nsw i32 %storemerge.2, %storemerge.v.3
  store i32 %storemerge.3, ptr @res, align 4, !tbaa !5
  %51 = load i32, ptr getelementptr inbounds (i8, ptr @cnt1, i64 16), align 16, !tbaa !5
  %52 = icmp eq i32 %51, 0
  %53 = load i32, ptr getelementptr inbounds (i8, ptr @cnt2, i64 16), align 16, !tbaa !5
  br i1 %52, label %54, label %._crit_edge.4

54:                                               ; preds = %._crit_edge.3
  %.not.4 = icmp eq i32 %53, 0
  br i1 %.not.4, label %._crit_edge.4, label %162

._crit_edge.4:                                    ; preds = %54, %._crit_edge.3
  %55 = phi i32 [ 0, %54 ], [ %53, %._crit_edge.3 ]
  %storemerge.v.4 = tail call i32 @llvm.smin.i32(i32 %51, i32 %55)
  %storemerge.4 = add nsw i32 %storemerge.3, %storemerge.v.4
  store i32 %storemerge.4, ptr @res, align 4, !tbaa !5
  %56 = load i32, ptr getelementptr inbounds (i8, ptr @cnt1, i64 20), align 4, !tbaa !5
  %57 = icmp eq i32 %56, 0
  %58 = load i32, ptr getelementptr inbounds (i8, ptr @cnt2, i64 20), align 4, !tbaa !5
  br i1 %57, label %59, label %._crit_edge.5

59:                                               ; preds = %._crit_edge.4
  %.not.5 = icmp eq i32 %58, 0
  br i1 %.not.5, label %._crit_edge.5, label %162

._crit_edge.5:                                    ; preds = %59, %._crit_edge.4
  %60 = phi i32 [ 0, %59 ], [ %58, %._crit_edge.4 ]
  %storemerge.v.5 = tail call i32 @llvm.smin.i32(i32 %56, i32 %60)
  %storemerge.5 = add nsw i32 %storemerge.4, %storemerge.v.5
  store i32 %storemerge.5, ptr @res, align 4, !tbaa !5
  %61 = load i32, ptr getelementptr inbounds (i8, ptr @cnt1, i64 24), align 8, !tbaa !5
  %62 = icmp eq i32 %61, 0
  %63 = load i32, ptr getelementptr inbounds (i8, ptr @cnt2, i64 24), align 8, !tbaa !5
  br i1 %62, label %64, label %._crit_edge.6

64:                                               ; preds = %._crit_edge.5
  %.not.6 = icmp eq i32 %63, 0
  br i1 %.not.6, label %._crit_edge.6, label %162

._crit_edge.6:                                    ; preds = %64, %._crit_edge.5
  %65 = phi i32 [ 0, %64 ], [ %63, %._crit_edge.5 ]
  %storemerge.v.6 = tail call i32 @llvm.smin.i32(i32 %61, i32 %65)
  %storemerge.6 = add nsw i32 %storemerge.5, %storemerge.v.6
  store i32 %storemerge.6, ptr @res, align 4, !tbaa !5
  %66 = load i32, ptr getelementptr inbounds (i8, ptr @cnt1, i64 28), align 4, !tbaa !5
  %67 = icmp eq i32 %66, 0
  %68 = load i32, ptr getelementptr inbounds (i8, ptr @cnt2, i64 28), align 4, !tbaa !5
  br i1 %67, label %69, label %._crit_edge.7

69:                                               ; preds = %._crit_edge.6
  %.not.7 = icmp eq i32 %68, 0
  br i1 %.not.7, label %._crit_edge.7, label %162

._crit_edge.7:                                    ; preds = %69, %._crit_edge.6
  %70 = phi i32 [ 0, %69 ], [ %68, %._crit_edge.6 ]
  %storemerge.v.7 = tail call i32 @llvm.smin.i32(i32 %66, i32 %70)
  %storemerge.7 = add nsw i32 %storemerge.6, %storemerge.v.7
  store i32 %storemerge.7, ptr @res, align 4, !tbaa !5
  %71 = load i32, ptr getelementptr inbounds (i8, ptr @cnt1, i64 32), align 16, !tbaa !5
  %72 = icmp eq i32 %71, 0
  %73 = load i32, ptr getelementptr inbounds (i8, ptr @cnt2, i64 32), align 16, !tbaa !5
  br i1 %72, label %74, label %._crit_edge.8

74:                                               ; preds = %._crit_edge.7
  %.not.8 = icmp eq i32 %73, 0
  br i1 %.not.8, label %._crit_edge.8, label %162

._crit_edge.8:                                    ; preds = %74, %._crit_edge.7
  %75 = phi i32 [ 0, %74 ], [ %73, %._crit_edge.7 ]
  %storemerge.v.8 = tail call i32 @llvm.smin.i32(i32 %71, i32 %75)
  %storemerge.8 = add nsw i32 %storemerge.7, %storemerge.v.8
  store i32 %storemerge.8, ptr @res, align 4, !tbaa !5
  %76 = load i32, ptr getelementptr inbounds (i8, ptr @cnt1, i64 36), align 4, !tbaa !5
  %77 = icmp eq i32 %76, 0
  %78 = load i32, ptr getelementptr inbounds (i8, ptr @cnt2, i64 36), align 4, !tbaa !5
  br i1 %77, label %79, label %._crit_edge.9

79:                                               ; preds = %._crit_edge.8
  %.not.9 = icmp eq i32 %78, 0
  br i1 %.not.9, label %._crit_edge.9, label %162

._crit_edge.9:                                    ; preds = %79, %._crit_edge.8
  %80 = phi i32 [ 0, %79 ], [ %78, %._crit_edge.8 ]
  %storemerge.v.9 = tail call i32 @llvm.smin.i32(i32 %76, i32 %80)
  %storemerge.9 = add nsw i32 %storemerge.8, %storemerge.v.9
  store i32 %storemerge.9, ptr @res, align 4, !tbaa !5
  %81 = load i32, ptr getelementptr inbounds (i8, ptr @cnt1, i64 40), align 8, !tbaa !5
  %82 = icmp eq i32 %81, 0
  %83 = load i32, ptr getelementptr inbounds (i8, ptr @cnt2, i64 40), align 8, !tbaa !5
  br i1 %82, label %84, label %._crit_edge.10

84:                                               ; preds = %._crit_edge.9
  %.not.10 = icmp eq i32 %83, 0
  br i1 %.not.10, label %._crit_edge.10, label %162

._crit_edge.10:                                   ; preds = %84, %._crit_edge.9
  %85 = phi i32 [ 0, %84 ], [ %83, %._crit_edge.9 ]
  %storemerge.v.10 = tail call i32 @llvm.smin.i32(i32 %81, i32 %85)
  %storemerge.10 = add nsw i32 %storemerge.9, %storemerge.v.10
  store i32 %storemerge.10, ptr @res, align 4, !tbaa !5
  %86 = load i32, ptr getelementptr inbounds (i8, ptr @cnt1, i64 44), align 4, !tbaa !5
  %87 = icmp eq i32 %86, 0
  %88 = load i32, ptr getelementptr inbounds (i8, ptr @cnt2, i64 44), align 4, !tbaa !5
  br i1 %87, label %89, label %._crit_edge.11

89:                                               ; preds = %._crit_edge.10
  %.not.11 = icmp eq i32 %88, 0
  br i1 %.not.11, label %._crit_edge.11, label %162

._crit_edge.11:                                   ; preds = %89, %._crit_edge.10
  %90 = phi i32 [ 0, %89 ], [ %88, %._crit_edge.10 ]
  %storemerge.v.11 = tail call i32 @llvm.smin.i32(i32 %86, i32 %90)
  %storemerge.11 = add nsw i32 %storemerge.10, %storemerge.v.11
  store i32 %storemerge.11, ptr @res, align 4, !tbaa !5
  %91 = load i32, ptr getelementptr inbounds (i8, ptr @cnt1, i64 48), align 16, !tbaa !5
  %92 = icmp eq i32 %91, 0
  %93 = load i32, ptr getelementptr inbounds (i8, ptr @cnt2, i64 48), align 16, !tbaa !5
  br i1 %92, label %94, label %._crit_edge.12

94:                                               ; preds = %._crit_edge.11
  %.not.12 = icmp eq i32 %93, 0
  br i1 %.not.12, label %._crit_edge.12, label %162

._crit_edge.12:                                   ; preds = %94, %._crit_edge.11
  %95 = phi i32 [ 0, %94 ], [ %93, %._crit_edge.11 ]
  %storemerge.v.12 = tail call i32 @llvm.smin.i32(i32 %91, i32 %95)
  %storemerge.12 = add nsw i32 %storemerge.11, %storemerge.v.12
  store i32 %storemerge.12, ptr @res, align 4, !tbaa !5
  %96 = load i32, ptr getelementptr inbounds (i8, ptr @cnt1, i64 52), align 4, !tbaa !5
  %97 = icmp eq i32 %96, 0
  %98 = load i32, ptr getelementptr inbounds (i8, ptr @cnt2, i64 52), align 4, !tbaa !5
  br i1 %97, label %99, label %._crit_edge.13

99:                                               ; preds = %._crit_edge.12
  %.not.13 = icmp eq i32 %98, 0
  br i1 %.not.13, label %._crit_edge.13, label %162

._crit_edge.13:                                   ; preds = %99, %._crit_edge.12
  %100 = phi i32 [ 0, %99 ], [ %98, %._crit_edge.12 ]
  %storemerge.v.13 = tail call i32 @llvm.smin.i32(i32 %96, i32 %100)
  %storemerge.13 = add nsw i32 %storemerge.12, %storemerge.v.13
  store i32 %storemerge.13, ptr @res, align 4, !tbaa !5
  %101 = load i32, ptr getelementptr inbounds (i8, ptr @cnt1, i64 56), align 8, !tbaa !5
  %102 = icmp eq i32 %101, 0
  %103 = load i32, ptr getelementptr inbounds (i8, ptr @cnt2, i64 56), align 8, !tbaa !5
  br i1 %102, label %104, label %._crit_edge.14

104:                                              ; preds = %._crit_edge.13
  %.not.14 = icmp eq i32 %103, 0
  br i1 %.not.14, label %._crit_edge.14, label %162

._crit_edge.14:                                   ; preds = %104, %._crit_edge.13
  %105 = phi i32 [ 0, %104 ], [ %103, %._crit_edge.13 ]
  %storemerge.v.14 = tail call i32 @llvm.smin.i32(i32 %101, i32 %105)
  %storemerge.14 = add nsw i32 %storemerge.13, %storemerge.v.14
  store i32 %storemerge.14, ptr @res, align 4, !tbaa !5
  %106 = load i32, ptr getelementptr inbounds (i8, ptr @cnt1, i64 60), align 4, !tbaa !5
  %107 = icmp eq i32 %106, 0
  %108 = load i32, ptr getelementptr inbounds (i8, ptr @cnt2, i64 60), align 4, !tbaa !5
  br i1 %107, label %109, label %._crit_edge.15

109:                                              ; preds = %._crit_edge.14
  %.not.15 = icmp eq i32 %108, 0
  br i1 %.not.15, label %._crit_edge.15, label %162

._crit_edge.15:                                   ; preds = %109, %._crit_edge.14
  %110 = phi i32 [ 0, %109 ], [ %108, %._crit_edge.14 ]
  %storemerge.v.15 = tail call i32 @llvm.smin.i32(i32 %106, i32 %110)
  %storemerge.15 = add nsw i32 %storemerge.14, %storemerge.v.15
  store i32 %storemerge.15, ptr @res, align 4, !tbaa !5
  %111 = load i32, ptr getelementptr inbounds (i8, ptr @cnt1, i64 64), align 16, !tbaa !5
  %112 = icmp eq i32 %111, 0
  %113 = load i32, ptr getelementptr inbounds (i8, ptr @cnt2, i64 64), align 16, !tbaa !5
  br i1 %112, label %114, label %._crit_edge.16

114:                                              ; preds = %._crit_edge.15
  %.not.16 = icmp eq i32 %113, 0
  br i1 %.not.16, label %._crit_edge.16, label %162

._crit_edge.16:                                   ; preds = %114, %._crit_edge.15
  %115 = phi i32 [ 0, %114 ], [ %113, %._crit_edge.15 ]
  %storemerge.v.16 = tail call i32 @llvm.smin.i32(i32 %111, i32 %115)
  %storemerge.16 = add nsw i32 %storemerge.15, %storemerge.v.16
  store i32 %storemerge.16, ptr @res, align 4, !tbaa !5
  %116 = load i32, ptr getelementptr inbounds (i8, ptr @cnt1, i64 68), align 4, !tbaa !5
  %117 = icmp eq i32 %116, 0
  %118 = load i32, ptr getelementptr inbounds (i8, ptr @cnt2, i64 68), align 4, !tbaa !5
  br i1 %117, label %119, label %._crit_edge.17

119:                                              ; preds = %._crit_edge.16
  %.not.17 = icmp eq i32 %118, 0
  br i1 %.not.17, label %._crit_edge.17, label %162

._crit_edge.17:                                   ; preds = %119, %._crit_edge.16
  %120 = phi i32 [ 0, %119 ], [ %118, %._crit_edge.16 ]
  %storemerge.v.17 = tail call i32 @llvm.smin.i32(i32 %116, i32 %120)
  %storemerge.17 = add nsw i32 %storemerge.16, %storemerge.v.17
  store i32 %storemerge.17, ptr @res, align 4, !tbaa !5
  %121 = load i32, ptr getelementptr inbounds (i8, ptr @cnt1, i64 72), align 8, !tbaa !5
  %122 = icmp eq i32 %121, 0
  %123 = load i32, ptr getelementptr inbounds (i8, ptr @cnt2, i64 72), align 8, !tbaa !5
  br i1 %122, label %124, label %._crit_edge.18

124:                                              ; preds = %._crit_edge.17
  %.not.18 = icmp eq i32 %123, 0
  br i1 %.not.18, label %._crit_edge.18, label %162

._crit_edge.18:                                   ; preds = %124, %._crit_edge.17
  %125 = phi i32 [ 0, %124 ], [ %123, %._crit_edge.17 ]
  %storemerge.v.18 = tail call i32 @llvm.smin.i32(i32 %121, i32 %125)
  %storemerge.18 = add nsw i32 %storemerge.17, %storemerge.v.18
  store i32 %storemerge.18, ptr @res, align 4, !tbaa !5
  %126 = load i32, ptr getelementptr inbounds (i8, ptr @cnt1, i64 76), align 4, !tbaa !5
  %127 = icmp eq i32 %126, 0
  %128 = load i32, ptr getelementptr inbounds (i8, ptr @cnt2, i64 76), align 4, !tbaa !5
  br i1 %127, label %129, label %._crit_edge.19

129:                                              ; preds = %._crit_edge.18
  %.not.19 = icmp eq i32 %128, 0
  br i1 %.not.19, label %._crit_edge.19, label %162

._crit_edge.19:                                   ; preds = %129, %._crit_edge.18
  %130 = phi i32 [ 0, %129 ], [ %128, %._crit_edge.18 ]
  %storemerge.v.19 = tail call i32 @llvm.smin.i32(i32 %126, i32 %130)
  %storemerge.19 = add nsw i32 %storemerge.18, %storemerge.v.19
  store i32 %storemerge.19, ptr @res, align 4, !tbaa !5
  %131 = load i32, ptr getelementptr inbounds (i8, ptr @cnt1, i64 80), align 16, !tbaa !5
  %132 = icmp eq i32 %131, 0
  %133 = load i32, ptr getelementptr inbounds (i8, ptr @cnt2, i64 80), align 16, !tbaa !5
  br i1 %132, label %134, label %._crit_edge.20

134:                                              ; preds = %._crit_edge.19
  %.not.20 = icmp eq i32 %133, 0
  br i1 %.not.20, label %._crit_edge.20, label %162

._crit_edge.20:                                   ; preds = %134, %._crit_edge.19
  %135 = phi i32 [ 0, %134 ], [ %133, %._crit_edge.19 ]
  %storemerge.v.20 = tail call i32 @llvm.smin.i32(i32 %131, i32 %135)
  %storemerge.20 = add nsw i32 %storemerge.19, %storemerge.v.20
  store i32 %storemerge.20, ptr @res, align 4, !tbaa !5
  %136 = load i32, ptr getelementptr inbounds (i8, ptr @cnt1, i64 84), align 4, !tbaa !5
  %137 = icmp eq i32 %136, 0
  %138 = load i32, ptr getelementptr inbounds (i8, ptr @cnt2, i64 84), align 4, !tbaa !5
  br i1 %137, label %139, label %._crit_edge.21

139:                                              ; preds = %._crit_edge.20
  %.not.21 = icmp eq i32 %138, 0
  br i1 %.not.21, label %._crit_edge.21, label %162

._crit_edge.21:                                   ; preds = %139, %._crit_edge.20
  %140 = phi i32 [ 0, %139 ], [ %138, %._crit_edge.20 ]
  %storemerge.v.21 = tail call i32 @llvm.smin.i32(i32 %136, i32 %140)
  %storemerge.21 = add nsw i32 %storemerge.20, %storemerge.v.21
  store i32 %storemerge.21, ptr @res, align 4, !tbaa !5
  %141 = load i32, ptr getelementptr inbounds (i8, ptr @cnt1, i64 88), align 8, !tbaa !5
  %142 = icmp eq i32 %141, 0
  %143 = load i32, ptr getelementptr inbounds (i8, ptr @cnt2, i64 88), align 8, !tbaa !5
  br i1 %142, label %144, label %._crit_edge.22

144:                                              ; preds = %._crit_edge.21
  %.not.22 = icmp eq i32 %143, 0
  br i1 %.not.22, label %._crit_edge.22, label %162

._crit_edge.22:                                   ; preds = %144, %._crit_edge.21
  %145 = phi i32 [ 0, %144 ], [ %143, %._crit_edge.21 ]
  %storemerge.v.22 = tail call i32 @llvm.smin.i32(i32 %141, i32 %145)
  %storemerge.22 = add nsw i32 %storemerge.21, %storemerge.v.22
  store i32 %storemerge.22, ptr @res, align 4, !tbaa !5
  %146 = load i32, ptr getelementptr inbounds (i8, ptr @cnt1, i64 92), align 4, !tbaa !5
  %147 = icmp eq i32 %146, 0
  %148 = load i32, ptr getelementptr inbounds (i8, ptr @cnt2, i64 92), align 4, !tbaa !5
  br i1 %147, label %149, label %._crit_edge.23

149:                                              ; preds = %._crit_edge.22
  %.not.23 = icmp eq i32 %148, 0
  br i1 %.not.23, label %._crit_edge.23, label %162

._crit_edge.23:                                   ; preds = %149, %._crit_edge.22
  %150 = phi i32 [ 0, %149 ], [ %148, %._crit_edge.22 ]
  %storemerge.v.23 = tail call i32 @llvm.smin.i32(i32 %146, i32 %150)
  %storemerge.23 = add nsw i32 %storemerge.22, %storemerge.v.23
  store i32 %storemerge.23, ptr @res, align 4, !tbaa !5
  %151 = load i32, ptr getelementptr inbounds (i8, ptr @cnt1, i64 96), align 16, !tbaa !5
  %152 = icmp eq i32 %151, 0
  %153 = load i32, ptr getelementptr inbounds (i8, ptr @cnt2, i64 96), align 16, !tbaa !5
  br i1 %152, label %154, label %._crit_edge.24

154:                                              ; preds = %._crit_edge.23
  %.not.24 = icmp eq i32 %153, 0
  br i1 %.not.24, label %._crit_edge.24, label %162

._crit_edge.24:                                   ; preds = %154, %._crit_edge.23
  %155 = phi i32 [ 0, %154 ], [ %153, %._crit_edge.23 ]
  %storemerge.v.24 = tail call i32 @llvm.smin.i32(i32 %151, i32 %155)
  %storemerge.24 = add nsw i32 %storemerge.23, %storemerge.v.24
  store i32 %storemerge.24, ptr @res, align 4, !tbaa !5
  %156 = load i32, ptr getelementptr inbounds (i8, ptr @cnt1, i64 100), align 4, !tbaa !5
  %157 = icmp eq i32 %156, 0
  %158 = load i32, ptr getelementptr inbounds (i8, ptr @cnt2, i64 100), align 4, !tbaa !5
  br i1 %157, label %159, label %._crit_edge.25

159:                                              ; preds = %._crit_edge.24
  %.not.25 = icmp eq i32 %158, 0
  br i1 %.not.25, label %._crit_edge.25, label %162

._crit_edge.25:                                   ; preds = %159, %._crit_edge.24
  %160 = phi i32 [ 0, %159 ], [ %158, %._crit_edge.24 ]
  %storemerge.v.25 = tail call i32 @llvm.smin.i32(i32 %156, i32 %160)
  %storemerge.25 = add nsw i32 %storemerge.24, %storemerge.v.25
  store i32 %storemerge.25, ptr @res, align 4, !tbaa !5
  %161 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.3, i32 noundef %storemerge.25)
  br label %164

162:                                              ; preds = %159, %154, %149, %144, %139, %134, %129, %124, %119, %114, %109, %104, %99, %94, %89, %84, %79, %74, %69, %64, %59, %54, %49, %44, %39, %34
  %163 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str)
  br label %164

164:                                              ; preds = %162, %._crit_edge.25
  ret i32 0
}

declare noundef nonnull align 8 dereferenceable(16) ptr @_ZStrsIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare noundef i64 @_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6lengthEv(ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(32), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #3

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #4

attributes #0 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11}


; Effective O3 passes: BDCEPass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass