; LLVM IR from VastoLorde95/Competitive-Programming :: CodeChef/Other/HFCQ/Problem B/B.ll (Z7witnessxxxi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_Z4multxxx(i64 noundef, i64 noundef, i64 noundef) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_Z5powerxxx(i64 noundef, i64 noundef, i64 noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z7witnessxxxi(i64 noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %3) #1 {
  %5 = alloca i1, align 1
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i32, align 4
  %10 = alloca i64, align 8
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i64, align 8
  store i64 %0, ptr %6, align 8, !tbaa !5
  store i64 %1, ptr %7, align 8, !tbaa !5
  store i64 %2, ptr %8, align 8, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #2
  %14 = load i64, ptr %6, align 8, !tbaa !5
  %15 = load i64, ptr %8, align 8, !tbaa !5
  %16 = load i64, ptr %7, align 8, !tbaa !5
  %17 = call noundef i64 @_Z5powerxxx(i64 noundef %14, i64 noundef %15, i64 noundef %16)
  store i64 %17, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #2
  store i32 0, ptr %11, align 4, !tbaa !9
  br label %18

18:                                               ; preds = %44, %4
  %19 = load i32, ptr %11, align 4, !tbaa !9
  %20 = load i32, ptr %9, align 4, !tbaa !9
  %21 = icmp slt i32 %19, %20
  br i1 %21, label %23, label %22

22:                                               ; preds = %18
  store i32 2, ptr %12, align 4
  br label %47

23:                                               ; preds = %18
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #2
  %24 = load i64, ptr %10, align 8, !tbaa !5
  %25 = load i64, ptr %10, align 8, !tbaa !5
  %26 = load i64, ptr %7, align 8, !tbaa !5
  %27 = call noundef i64 @_Z4multxxx(i64 noundef %24, i64 noundef %25, i64 noundef %26)
  store i64 %27, ptr %13, align 8, !tbaa !5
  %28 = load i64, ptr %13, align 8, !tbaa !5
  %29 = icmp eq i64 %28, 1
  br i1 %29, label %30, label %39

30:                                               ; preds = %23
  %31 = load i64, ptr %10, align 8, !tbaa !5
  %32 = icmp ne i64 %31, 1
  br i1 %32, label %33, label %39

33:                                               ; preds = %30
  %34 = load i64, ptr %10, align 8, !tbaa !5
  %35 = load i64, ptr %7, align 8, !tbaa !5
  %36 = sub nsw i64 %35, 1
  %37 = icmp ne i64 %34, %36
  br i1 %37, label %38, label %39

38:                                               ; preds = %33
  store i1 true, ptr %5, align 1
  store i32 1, ptr %12, align 4
  br label %41

39:                                               ; preds = %33, %30, %23
  %40 = load i64, ptr %13, align 8, !tbaa !5
  store i64 %40, ptr %10, align 8, !tbaa !5
  store i32 0, ptr %12, align 4
  br label %41

41:                                               ; preds = %39, %38
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #2
  %42 = load i32, ptr %12, align 4
  switch i32 %42, label %47 [
    i32 0, label %43
  ]

43:                                               ; preds = %41
  br label %44

44:                                               ; preds = %43
  %45 = load i32, ptr %11, align 4, !tbaa !9
  %46 = add nsw i32 %45, 1
  store i32 %46, ptr %11, align 4, !tbaa !9
  br label %18, !llvm.loop !11

47:                                               ; preds = %41, %22
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #2
  %48 = load i32, ptr %12, align 4
  switch i32 %48, label %52 [
    i32 2, label %49
  ]

49:                                               ; preds = %47
  %50 = load i64, ptr %10, align 8, !tbaa !5
  %51 = icmp ne i64 %50, 1
  store i1 %51, ptr %5, align 1
  store i32 1, ptr %12, align 4
  br label %52

52:                                               ; preds = %49, %47
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #2
  %53 = load i1, ptr %5, align 1
  ret i1 %53
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_Z4multxxx(i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_Z5powerxxx(i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z7witnessxxxi(i64 noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  %5 = tail call noundef i64 @_Z5powerxxx(i64 noundef %0, i64 noundef %2, i64 noundef %1)
  %.not2530 = icmp sgt i32 %3, 0
  br i1 %.not2530, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %4
  %6 = add nsw i64 %1, -1
  %7 = tail call noundef i64 @_Z4multxxx(i64 noundef %5, i64 noundef %5, i64 noundef %1)
  %8 = icmp ne i64 %7, 1
  %9 = icmp eq i64 %5, 1
  %or.cond.not2938 = or i1 %9, %8
  %.not39 = icmp eq i64 %5, %6
  %or.cond2640 = select i1 %or.cond.not2938, i1 true, i1 %.not39
  br i1 %or.cond2640, label %.lr.ph42, label %._crit_edge

.lr.ph42:                                         ; preds = %.lr.ph, %12
  %10 = phi i64 [ %13, %12 ], [ %7, %.lr.ph ]
  %.0213241 = phi i32 [ %11, %12 ], [ 0, %.lr.ph ]
  %11 = add nuw nsw i32 %.0213241, 1
  %exitcond.not = icmp eq i32 %11, %3
  br i1 %exitcond.not, label %._crit_edge.loopexit, label %12, !llvm.loop !5

12:                                               ; preds = %.lr.ph42
  %13 = tail call noundef i64 @_Z4multxxx(i64 noundef %10, i64 noundef %10, i64 noundef %1)
  %14 = icmp ne i64 %13, 1
  %15 = icmp eq i64 %10, 1
  %or.cond.not29 = or i1 %15, %14
  %.not = icmp eq i64 %10, %6
  %or.cond26 = select i1 %or.cond.not29, i1 true, i1 %.not
  br i1 %or.cond26, label %.lr.ph42, label %._crit_edge.loopexit, !llvm.loop !5

._crit_edge.loopexit:                             ; preds = %12, %.lr.ph42
  %.not25.le = icmp slt i32 %11, %3
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %.lr.ph, %4
  %.022.lcssa = phi i64 [ %5, %4 ], [ %5, %.lr.ph ], [ %10, %._crit_edge.loopexit ]
  %.not25.lcssa = phi i1 [ false, %4 ], [ true, %.lr.ph ], [ %.not25.le, %._crit_edge.loopexit ]
  %16 = icmp ne i64 %.022.lcssa, 1
  %.3 = or i1 %16, %.not25.lcssa
  ret i1 %.3
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass