; LLVM IR from FidoProject/Fido :: src/WireFitQLearn.ll (ZN2rl13WireFitQLearn8getWiresESt6vectorIdSaIdEE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<rl::Wire, std::allocator<rl::Wire>>::_Vector_impl" }
%"struct.std::_Vector_base<rl::Wire, std::allocator<rl::Wire>>::_Vector_impl" = type { %"struct.std::_Vector_base<rl::Wire, std::allocator<rl::Wire>>::_Vector_impl_data" }
%"struct.std::_Vector_base<rl::Wire, std::allocator<rl::Wire>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::allocator.10" = type { i8 }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.rl::Wire" = type { %"class.std::vector", double }
%"class.std::allocator" = type { i8 }
%"class.rl::WireFitQLearn" = type { %"class.rl::Learner", ptr, ptr, ptr, i32, i32, double, double, double, double, i32, i32, %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", ptr }
%"class.rl::Learner" = type { ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaIdEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #2 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIdSaIdEEaSEOS1_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEEC2ERKS1_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN2rl4WireESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIN2rl4WireESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN2rl13WireFitQLearn8getWiresESt6vectorIdSaIdEE(ptr dead_on_unwind noalias writable sret(%"class.std::vector.8") align 8 %0, ptr noundef nonnull align 8 dereferenceable(184) %1, ptr noundef %2) #2 align 2 personality ptr @__gxx_personality_v0 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i1, align 1
  %8 = alloca %"class.std::allocator.10", align 1
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca %"class.std::vector", align 8
  %12 = alloca %"class.std::vector", align 8
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca %"struct.rl::Wire", align 8
  %17 = alloca %"class.std::vector", align 8
  %18 = alloca %"class.std::allocator", align 1
  %19 = alloca i32, align 4
  store ptr %0, ptr %4, align 8
  store ptr %1, ptr %5, align 8, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !5
  %20 = load ptr, ptr %5, align 8
  store i1 false, ptr %7, align 1
  %21 = getelementptr inbounds %"class.rl::WireFitQLearn", ptr %20, i32 0, i32 4
  %22 = load i32, ptr %21, align 8, !tbaa !9
  %23 = zext i32 %22 to i64
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #6
  call void @_ZNSaIN2rl4WireEEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %8) #6
  invoke void @_ZNSt6vectorIN2rl4WireESaIS1_EEC2EmRKS2_(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %23, ptr noundef nonnull align 1 dereferenceable(1) %8)
          to label %24 unwind label %35

24:                                               ; preds = %3
  call void @_ZNSt15__new_allocatorIN2rl4WireEED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %8) #6
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #6
  call void @llvm.lifetime.start.p0(i64 24, ptr %11) #6
  %25 = getelementptr inbounds %"class.rl::WireFitQLearn", ptr %20, i32 0, i32 1
  %26 = load ptr, ptr %25, align 8, !tbaa !18
  invoke void @_ZNSt6vectorIdSaIdEEC2ERKS1_(ptr noundef nonnull align 8 dereferenceable(24) %12, ptr noundef nonnull align 8 dereferenceable(24) %2)
          to label %27 unwind label %39

27:                                               ; preds = %24
  invoke void @_ZN3net9NeuralNet9getOutputESt6vectorIdSaIdEE(ptr dead_on_unwind writable sret(%"class.std::vector") align 8 %11, ptr noundef nonnull align 8 dereferenceable(24) %26, ptr noundef %12)
          to label %28 unwind label %43

28:                                               ; preds = %27
  call void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %12) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #6
  store i32 0, ptr %13, align 4, !tbaa !19
  br label %29

29:                                               ; preds = %97, %28
  %30 = load i32, ptr %13, align 4, !tbaa !19
  %31 = getelementptr inbounds %"class.rl::WireFitQLearn", ptr %20, i32 0, i32 4
  %32 = load i32, ptr %31, align 8, !tbaa !9
  %33 = icmp ult i32 %30, %32
  br i1 %33, label %47, label %34

34:                                               ; preds = %29
  store i32 2, ptr %14, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #6
  br label %105

35:                                               ; preds = %3
  %36 = landingpad { ptr, i32 }
          cleanup
  %37 = extractvalue { ptr, i32 } %36, 0
  store ptr %37, ptr %9, align 8
  %38 = extractvalue { ptr, i32 } %36, 1
  store i32 %38, ptr %10, align 4
  call void @_ZNSt15__new_allocatorIN2rl4WireEED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %8) #6
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #6
  br label %110

39:                                               ; preds = %24
  %40 = landingpad { ptr, i32 }
          cleanup
  %41 = extractvalue { ptr, i32 } %40, 0
  store ptr %41, ptr %9, align 8
  %42 = extractvalue { ptr, i32 } %40, 1
  store i32 %42, ptr %10, align 4
  br label %107

43:                                               ; preds = %27
  %44 = landingpad { ptr, i32 }
          cleanup
  %45 = extractvalue { ptr, i32 } %44, 0
  store ptr %45, ptr %9, align 8
  %46 = extractvalue { ptr, i32 } %44, 1
  store i32 %46, ptr %10, align 4
  call void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %12) #6
  br label %107

47:                                               ; preds = %29
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #6
  %48 = load i32, ptr %13, align 4, !tbaa !19
  %49 = getelementptr inbounds %"class.rl::WireFitQLearn", ptr %20, i32 0, i32 5
  %50 = load i32, ptr %49, align 4, !tbaa !20
  %51 = add i32 %50, 1
  %52 = mul i32 %48, %51
  store i32 %52, ptr %15, align 4, !tbaa !19
  call void @llvm.lifetime.start.p0(i64 32, ptr %16) #6
  call void @_ZN2rl4WireC2Ev(ptr noundef nonnull align 8 dereferenceable(32) %16) #6
  call void @llvm.lifetime.start.p0(i64 24, ptr %17) #6
  %53 = getelementptr inbounds %"class.rl::WireFitQLearn", ptr %20, i32 0, i32 5
  %54 = load i32, ptr %53, align 4, !tbaa !20
  %55 = zext i32 %54 to i64
  call void @llvm.lifetime.start.p0(i64 1, ptr %18) #6
  call void @_ZNSaIdEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %18) #6
  invoke void @_ZNSt6vectorIdSaIdEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24) %17, i64 noundef %55, ptr noundef nonnull align 1 dereferenceable(1) %18)
          to label %56 unwind label %65

56:                                               ; preds = %47
  %57 = getelementptr inbounds %"struct.rl::Wire", ptr %16, i32 0, i32 0
  %58 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIdSaIdEEaSEOS1_(ptr noundef nonnull align 8 dereferenceable(24) %57, ptr noundef nonnull align 8 dereferenceable(24) %17) #6
  call void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %17) #6
  call void @_ZNSt15__new_allocatorIdED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %18) #6
  call void @llvm.lifetime.end.p0(i64 1, ptr %18) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr %17) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #6
  store i32 0, ptr %19, align 4, !tbaa !19
  br label %59

59:                                               ; preds = %80, %56
  %60 = load i32, ptr %19, align 4, !tbaa !19
  %61 = getelementptr inbounds %"class.rl::WireFitQLearn", ptr %20, i32 0, i32 5
  %62 = load i32, ptr %61, align 4, !tbaa !20
  %63 = icmp ult i32 %60, %62
  br i1 %63, label %69, label %64

64:                                               ; preds = %59
  store i32 5, ptr %14, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #6
  br label %83

65:                                               ; preds = %47
  %66 = landingpad { ptr, i32 }
          cleanup
  %67 = extractvalue { ptr, i32 } %66, 0
  store ptr %67, ptr %9, align 8
  %68 = extractvalue { ptr, i32 } %66, 1
  store i32 %68, ptr %10, align 4
  call void @_ZNSt15__new_allocatorIdED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %18) #6
  call void @llvm.lifetime.end.p0(i64 1, ptr %18) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr %17) #6
  br label %104

69:                                               ; preds = %59
  %70 = load i32, ptr %15, align 4, !tbaa !19
  %71 = load i32, ptr %19, align 4, !tbaa !19
  %72 = add i32 %70, %71
  %73 = zext i32 %72 to i64
  %74 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %11, i64 noundef %73) #6
  %75 = load double, ptr %74, align 8, !tbaa !21
  %76 = getelementptr inbounds %"struct.rl::Wire", ptr %16, i32 0, i32 0
  %77 = load i32, ptr %19, align 4, !tbaa !19
  %78 = zext i32 %77 to i64
  %79 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %76, i64 noundef %78) #6
  store double %75, ptr %79, align 8, !tbaa !21
  br label %80

80:                                               ; preds = %69
  %81 = load i32, ptr %19, align 4, !tbaa !19
  %82 = add i32 %81, 1
  store i32 %82, ptr %19, align 4, !tbaa !19
  br label %59, !llvm.loop !22

83:                                               ; preds = %64
  %84 = load i32, ptr %15, align 4, !tbaa !19
  %85 = getelementptr inbounds %"class.rl::WireFitQLearn", ptr %20, i32 0, i32 5
  %86 = load i32, ptr %85, align 4, !tbaa !20
  %87 = add i32 %84, %86
  %88 = zext i32 %87 to i64
  %89 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %11, i64 noundef %88) #6
  %90 = load double, ptr %89, align 8, !tbaa !21
  %91 = getelementptr inbounds %"struct.rl::Wire", ptr %16, i32 0, i32 1
  store double %90, ptr %91, align 8, !tbaa !24
  %92 = load i32, ptr %13, align 4, !tbaa !19
  %93 = zext i32 %92 to i64
  %94 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN2rl4WireESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %93) #6
  %95 = invoke noundef nonnull align 8 dereferenceable(32) ptr @_ZN2rl4WireaSERKS0_(ptr noundef nonnull align 8 dereferenceable(32) %94, ptr noundef nonnull align 8 dereferenceable(32) %16)
          to label %96 unwind label %100

96:                                               ; preds = %83
  call void @_ZN2rl4WireD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %16) #6
  call void @llvm.lifetime.end.p0(i64 32, ptr %16) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #6
  br label %97

97:                                               ; preds = %96
  %98 = load i32, ptr %13, align 4, !tbaa !19
  %99 = add i32 %98, 1
  store i32 %99, ptr %13, align 4, !tbaa !19
  br label %29, !llvm.loop !26

100:                                              ; preds = %83
  %101 = landingpad { ptr, i32 }
          cleanup
  %102 = extractvalue { ptr, i32 } %101, 0
  store ptr %102, ptr %9, align 8
  %103 = extractvalue { ptr, i32 } %101, 1
  store i32 %103, ptr %10, align 4
  br label %104

104:                                              ; preds = %100, %65
  call void @_ZN2rl4WireD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %16) #6
  call void @llvm.lifetime.end.p0(i64 32, ptr %16) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #6
  call void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %11) #6
  br label %107

105:                                              ; preds = %34
  store i1 true, ptr %7, align 1
  store i32 1, ptr %14, align 4
  call void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %11) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr %11) #6
  %106 = load i1, ptr %7, align 1
  br i1 %106, label %109, label %108

107:                                              ; preds = %104, %43, %39
  call void @llvm.lifetime.end.p0(i64 24, ptr %11) #6
  call void @_ZNSt6vectorIN2rl4WireESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %0) #6
  br label %110

108:                                              ; preds = %105
  call void @_ZNSt6vectorIN2rl4WireESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %0) #6
  br label %109

109:                                              ; preds = %108, %105
  ret void

110:                                              ; preds = %107, %35
  %111 = load ptr, ptr %9, align 8
  %112 = load i32, ptr %10, align 4
  %113 = insertvalue { ptr, i32 } poison, ptr %111, 0
  %114 = insertvalue { ptr, i32 } %113, i32 %112, 1
  resume { ptr, i32 } %114
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN2rl4WireD2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaIN2rl4WireEEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIN2rl4WireESaIS1_EEC2EmRKS2_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIN2rl4WireEED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

declare void @_ZN3net9NeuralNet9getOutputESt6vectorIdSaIdEE(ptr dead_on_unwind writable sret(%"class.std::vector") align 8, ptr noundef nonnull align 8 dereferenceable(24), ptr noundef) #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN2rl4WireC2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZN2rl4WireaSERKS0_(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef nonnull align 8 dereferenceable(32)) #5 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIdED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !12, i64 32}
!10 = !{!"_ZTSN2rl13WireFitQLearnE", !11, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !12, i64 32, !12, i64 36, !13, i64 40, !13, i64 48, !13, i64 56, !13, i64 64, !12, i64 72, !12, i64 76, !14, i64 80, !14, i64 104, !14, i64 128, !14, i64 152, !6, i64 176}
!11 = !{!"_ZTSN2rl7LearnerE"}
!12 = !{!"int", !7, i64 0}
!13 = !{!"double", !7, i64 0}
!14 = !{!"_ZTSSt6vectorIdSaIdEE", !15, i64 0}
!15 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!18 = !{!10, !6, i64 8}
!19 = !{!12, !12, i64 0}
!20 = !{!10, !12, i64 36}
!21 = !{!13, !13, i64 0}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}
!24 = !{!25, !13, i64 24}
!25 = !{!"_ZTSN2rl4WireE", !14, i64 0, !13, i64 24}
!26 = distinct !{!26, !23}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<rl::Wire, std::allocator<rl::Wire>>::_Vector_impl" }
%"struct.std::_Vector_base<rl::Wire, std::allocator<rl::Wire>>::_Vector_impl" = type { %"struct.std::_Vector_base<rl::Wire, std::allocator<rl::Wire>>::_Vector_impl_data" }
%"struct.std::_Vector_base<rl::Wire, std::allocator<rl::Wire>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::allocator.10" = type { i8 }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.rl::Wire" = type { %"class.std::vector", double }
%"class.std::allocator" = type { i8 }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaIdEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #2 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIdSaIdEEaSEOS1_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEEC2ERKS1_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN2rl4WireESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIN2rl4WireESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN2rl13WireFitQLearn8getWiresESt6vectorIdSaIdEE(ptr dead_on_unwind noalias writable sret(%"class.std::vector.8") align 8 %0, ptr nocapture noundef nonnull readonly align 8 dereferenceable(184) %1, ptr noundef %2) local_unnamed_addr #2 align 2 personality ptr @__gxx_personality_v0 {
  %4 = alloca %"class.std::allocator.10", align 1
  %5 = alloca %"class.std::vector", align 8
  %6 = alloca %"class.std::vector", align 8
  %7 = alloca %"struct.rl::Wire", align 8
  %8 = alloca %"class.std::vector", align 8
  %9 = alloca %"class.std::allocator", align 1
  %10 = getelementptr inbounds i8, ptr %1, i64 32
  %11 = load i32, ptr %10, align 8, !tbaa !5
  %12 = zext i32 %11 to i64
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %4) #6
  call void @_ZNSaIN2rl4WireEEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %4) #6
  invoke void @_ZNSt6vectorIN2rl4WireESaIS1_EEC2EmRKS2_(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %12, ptr noundef nonnull align 1 dereferenceable(1) %4)
          to label %13 unwind label %21

13:                                               ; preds = %3
  call void @_ZNSt15__new_allocatorIN2rl4WireEED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %4) #6
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %4) #6
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %5) #6
  %14 = getelementptr inbounds i8, ptr %1, i64 8
  %15 = load ptr, ptr %14, align 8, !tbaa !17
  invoke void @_ZNSt6vectorIdSaIdEEC2ERKS1_(ptr noundef nonnull align 8 dereferenceable(24) %6, ptr noundef nonnull align 8 dereferenceable(24) %2)
          to label %16 unwind label %23

16:                                               ; preds = %13
  invoke void @_ZN3net9NeuralNet9getOutputESt6vectorIdSaIdEE(ptr dead_on_unwind nonnull writable sret(%"class.std::vector") align 8 %5, ptr noundef nonnull align 8 dereferenceable(24) %15, ptr noundef nonnull %6)
          to label %17 unwind label %25

17:                                               ; preds = %16
  call void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %6) #6
  %18 = load i32, ptr %10, align 8, !tbaa !5
  %.not = icmp eq i32 %18, 0
  br i1 %.not, label %._crit_edge26, label %.lr.ph25

.lr.ph25:                                         ; preds = %17
  %19 = getelementptr inbounds i8, ptr %1, i64 36
  %20 = getelementptr inbounds i8, ptr %7, i64 24
  br label %27

._crit_edge26:                                    ; preds = %54, %17
  call void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %5) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #6
  ret void

21:                                               ; preds = %3
  %22 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt15__new_allocatorIN2rl4WireEED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %4) #6
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %4) #6
  br label %62

23:                                               ; preds = %13
  %24 = landingpad { ptr, i32 }
          cleanup
  br label %61

25:                                               ; preds = %16
  %26 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %6) #6
  br label %61

27:                                               ; preds = %.lr.ph25, %54
  %indvars.iv30 = phi i64 [ 0, %.lr.ph25 ], [ %indvars.iv.next31, %54 ]
  %28 = load i32, ptr %19, align 4, !tbaa !18
  %29 = add i32 %28, 1
  %30 = trunc nuw i64 %indvars.iv30 to i32
  %31 = mul i32 %29, %30
  call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %7) #6
  call void @_ZN2rl4WireC2Ev(ptr noundef nonnull align 8 dereferenceable(32) %7) #6
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %8) #6
  %32 = load i32, ptr %19, align 4, !tbaa !18
  %33 = zext i32 %32 to i64
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %9) #6
  call void @_ZNSaIdEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %9) #6
  invoke void @_ZNSt6vectorIdSaIdEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24) %8, i64 noundef %33, ptr noundef nonnull align 1 dereferenceable(1) %9)
          to label %34 unwind label %43

34:                                               ; preds = %27
  %35 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIdSaIdEEaSEOS1_(ptr noundef nonnull align 8 dereferenceable(24) %7, ptr noundef nonnull align 8 dereferenceable(24) %8) #6
  call void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %8) #6
  call void @_ZNSt15__new_allocatorIdED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %9) #6
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %9) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %8) #6
  %36 = load i32, ptr %19, align 4, !tbaa !18
  %.not27 = icmp eq i32 %36, 0
  br i1 %.not27, label %._crit_edge, label %.lr.ph

._crit_edge:                                      ; preds = %.lr.ph, %34
  %.lcssa = phi i32 [ 0, %34 ], [ %51, %.lr.ph ]
  %37 = add i32 %.lcssa, %31
  %38 = zext i32 %37 to i64
  %39 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %38) #6
  %40 = load double, ptr %39, align 8, !tbaa !19
  store double %40, ptr %20, align 8, !tbaa !20
  %41 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN2rl4WireESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv30) #6
  %42 = invoke noundef nonnull align 8 dereferenceable(32) ptr @_ZN2rl4WireaSERKS0_(ptr noundef nonnull align 8 dereferenceable(32) %41, ptr noundef nonnull align 8 dereferenceable(32) %7)
          to label %54 unwind label %58

43:                                               ; preds = %27
  %44 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt15__new_allocatorIdED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %9) #6
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %9) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %8) #6
  br label %60

.lr.ph:                                           ; preds = %34, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %34 ]
  %45 = trunc nuw i64 %indvars.iv to i32
  %46 = add i32 %31, %45
  %47 = zext i32 %46 to i64
  %48 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %47) #6
  %49 = load double, ptr %48, align 8, !tbaa !19
  %50 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %7, i64 noundef %indvars.iv) #6
  store double %49, ptr %50, align 8, !tbaa !19
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %51 = load i32, ptr %19, align 4, !tbaa !18
  %52 = zext i32 %51 to i64
  %53 = icmp ult i64 %indvars.iv.next, %52
  br i1 %53, label %.lr.ph, label %._crit_edge, !llvm.loop !22

54:                                               ; preds = %._crit_edge
  call void @_ZN2rl4WireD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %7) #6
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %7) #6
  %indvars.iv.next31 = add nuw nsw i64 %indvars.iv30, 1
  %55 = load i32, ptr %10, align 8, !tbaa !5
  %56 = zext i32 %55 to i64
  %57 = icmp ult i64 %indvars.iv.next31, %56
  br i1 %57, label %27, label %._crit_edge26, !llvm.loop !24

58:                                               ; preds = %._crit_edge
  %59 = landingpad { ptr, i32 }
          cleanup
  br label %60

60:                                               ; preds = %58, %43
  %.pn = phi { ptr, i32 } [ %59, %58 ], [ %44, %43 ]
  call void @_ZN2rl4WireD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %7) #6
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %7) #6
  call void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %5) #6
  br label %61

61:                                               ; preds = %60, %25, %23
  %.pn.pn = phi { ptr, i32 } [ %.pn, %60 ], [ %26, %25 ], [ %24, %23 ]
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #6
  call void @_ZNSt6vectorIN2rl4WireESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %0) #6
  br label %62

62:                                               ; preds = %61, %21
  %.pn.pn.pn = phi { ptr, i32 } [ %.pn.pn, %61 ], [ %22, %21 ]
  resume { ptr, i32 } %.pn.pn.pn
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN2rl4WireD2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaIN2rl4WireEEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIN2rl4WireESaIS1_EEC2EmRKS2_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIN2rl4WireEED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

declare void @_ZN3net9NeuralNet9getOutputESt6vectorIdSaIdEE(ptr dead_on_unwind writable sret(%"class.std::vector") align 8, ptr noundef nonnull align 8 dereferenceable(24), ptr noundef) local_unnamed_addr #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN2rl4WireC2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZN2rl4WireaSERKS0_(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #5 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIdED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 32}
!6 = !{!"_ZTSN2rl13WireFitQLearnE", !7, i64 0, !8, i64 8, !8, i64 16, !8, i64 24, !11, i64 32, !11, i64 36, !12, i64 40, !12, i64 48, !12, i64 56, !12, i64 64, !11, i64 72, !11, i64 76, !13, i64 80, !13, i64 104, !13, i64 128, !13, i64 152, !8, i64 176}
!7 = !{!"_ZTSN2rl7LearnerE"}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"double", !9, i64 0}
!13 = !{!"_ZTSSt6vectorIdSaIdEE", !14, i64 0}
!14 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !8, i64 0, !8, i64 8, !8, i64 16}
!17 = !{!6, !8, i64 8}
!18 = !{!6, !11, i64 36}
!19 = !{!12, !12, i64 0}
!20 = !{!21, !12, i64 24}
!21 = !{!"_ZTSN2rl4WireE", !13, i64 0, !12, i64 24}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}
!24 = distinct !{!24, !23}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass