; LLVM IR from IOsonata/IOsonata :: ARM/Nordic/nRF52/nRF52840/exemples/BoschAppBoard/src (bmi3)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.bmi3_acc_dp_gain_offset = type { i16, i16, i16, i8, i8, i8 }
%struct.bmi3_dev = type { i8, ptr, i8, i32, i8, i8, i8, i16, ptr, ptr, ptr, i16 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: nounwind uwtable
declare hidden signext i8 @null_ptr_check(ptr noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_set_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) #2

; Function Attrs: nounwind uwtable
define dso_local signext i8 @bmi3_set_acc_dp_off_dgain(ptr noundef %0, ptr noundef %1) #2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  %6 = alloca i8, align 1
  %7 = alloca i8, align 1
  %8 = alloca i8, align 1
  %9 = alloca i16, align 2
  %10 = alloca i16, align 2
  %11 = alloca i16, align 2
  %12 = alloca [12 x i8], align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 2, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 2, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 2, ptr %11) #3
  call void @llvm.lifetime.start.p0(i64 12, ptr %12) #3
  call void @llvm.memset.p0.i64(ptr align 1 %12, i8 0, i64 12, i1 false)
  %13 = load ptr, ptr %4, align 8, !tbaa !5
  %14 = call signext i8 @null_ptr_check(ptr noundef %13)
  store i8 %14, ptr %5, align 1, !tbaa !9
  %15 = load i8, ptr %5, align 1, !tbaa !9
  %16 = sext i8 %15 to i32
  %17 = icmp eq i32 %16, 0
  br i1 %17, label %18, label %112

18:                                               ; preds = %2
  %19 = load ptr, ptr %3, align 8, !tbaa !5
  %20 = icmp ne ptr %19, null
  br i1 %20, label %21, label %112

21:                                               ; preds = %18
  %22 = load ptr, ptr %3, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.bmi3_acc_dp_gain_offset, ptr %22, i32 0, i32 0
  %24 = load i16, ptr %23, align 2, !tbaa !10
  %25 = zext i16 %24 to i32
  %26 = load ptr, ptr %4, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.bmi3_dev, ptr %26, i32 0, i32 11
  %28 = load i16, ptr %27, align 8, !tbaa !13
  %29 = zext i16 %28 to i32
  %30 = and i32 %25, %29
  %31 = trunc i32 %30 to i16
  store i16 %31, ptr %9, align 2, !tbaa !16
  %32 = load ptr, ptr %3, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.bmi3_acc_dp_gain_offset, ptr %32, i32 0, i32 3
  %34 = load i8, ptr %33, align 2, !tbaa !17
  %35 = zext i8 %34 to i32
  %36 = and i32 %35, 255
  %37 = trunc i32 %36 to i8
  store i8 %37, ptr %6, align 1, !tbaa !9
  %38 = load ptr, ptr %3, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.bmi3_acc_dp_gain_offset, ptr %38, i32 0, i32 1
  %40 = load i16, ptr %39, align 2, !tbaa !18
  %41 = zext i16 %40 to i32
  %42 = load ptr, ptr %4, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.bmi3_dev, ptr %42, i32 0, i32 11
  %44 = load i16, ptr %43, align 8, !tbaa !13
  %45 = zext i16 %44 to i32
  %46 = and i32 %41, %45
  %47 = trunc i32 %46 to i16
  store i16 %47, ptr %10, align 2, !tbaa !16
  %48 = load ptr, ptr %3, align 8, !tbaa !5
  %49 = getelementptr inbounds %struct.bmi3_acc_dp_gain_offset, ptr %48, i32 0, i32 4
  %50 = load i8, ptr %49, align 1, !tbaa !19
  %51 = zext i8 %50 to i32
  %52 = and i32 %51, 255
  %53 = trunc i32 %52 to i8
  store i8 %53, ptr %7, align 1, !tbaa !9
  %54 = load ptr, ptr %3, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.bmi3_acc_dp_gain_offset, ptr %54, i32 0, i32 2
  %56 = load i16, ptr %55, align 2, !tbaa !20
  %57 = zext i16 %56 to i32
  %58 = load ptr, ptr %4, align 8, !tbaa !5
  %59 = getelementptr inbounds %struct.bmi3_dev, ptr %58, i32 0, i32 11
  %60 = load i16, ptr %59, align 8, !tbaa !13
  %61 = zext i16 %60 to i32
  %62 = and i32 %57, %61
  %63 = trunc i32 %62 to i16
  store i16 %63, ptr %11, align 2, !tbaa !16
  %64 = load ptr, ptr %3, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.bmi3_acc_dp_gain_offset, ptr %64, i32 0, i32 5
  %66 = load i8, ptr %65, align 2, !tbaa !21
  %67 = zext i8 %66 to i32
  %68 = and i32 %67, 255
  %69 = trunc i32 %68 to i8
  store i8 %69, ptr %8, align 1, !tbaa !9
  %70 = load i16, ptr %9, align 2, !tbaa !16
  %71 = zext i16 %70 to i32
  %72 = and i32 %71, 255
  %73 = trunc i32 %72 to i8
  %74 = getelementptr inbounds [12 x i8], ptr %12, i64 0, i64 0
  store i8 %73, ptr %74, align 1, !tbaa !9
  %75 = load i16, ptr %9, align 2, !tbaa !16
  %76 = zext i16 %75 to i32
  %77 = and i32 %76, 65280
  %78 = ashr i32 %77, 8
  %79 = trunc i32 %78 to i8
  %80 = getelementptr inbounds [12 x i8], ptr %12, i64 0, i64 1
  store i8 %79, ptr %80, align 1, !tbaa !9
  %81 = load i8, ptr %6, align 1, !tbaa !9
  %82 = getelementptr inbounds [12 x i8], ptr %12, i64 0, i64 2
  store i8 %81, ptr %82, align 1, !tbaa !9
  %83 = load i16, ptr %10, align 2, !tbaa !16
  %84 = zext i16 %83 to i32
  %85 = and i32 %84, 255
  %86 = trunc i32 %85 to i8
  %87 = getelementptr inbounds [12 x i8], ptr %12, i64 0, i64 4
  store i8 %86, ptr %87, align 1, !tbaa !9
  %88 = load i16, ptr %10, align 2, !tbaa !16
  %89 = zext i16 %88 to i32
  %90 = and i32 %89, 65280
  %91 = ashr i32 %90, 8
  %92 = trunc i32 %91 to i8
  %93 = getelementptr inbounds [12 x i8], ptr %12, i64 0, i64 5
  store i8 %92, ptr %93, align 1, !tbaa !9
  %94 = load i8, ptr %7, align 1, !tbaa !9
  %95 = getelementptr inbounds [12 x i8], ptr %12, i64 0, i64 6
  store i8 %94, ptr %95, align 1, !tbaa !9
  %96 = load i16, ptr %11, align 2, !tbaa !16
  %97 = zext i16 %96 to i32
  %98 = and i32 %97, 255
  %99 = trunc i32 %98 to i8
  %100 = getelementptr inbounds [12 x i8], ptr %12, i64 0, i64 8
  store i8 %99, ptr %100, align 1, !tbaa !9
  %101 = load i16, ptr %11, align 2, !tbaa !16
  %102 = zext i16 %101 to i32
  %103 = and i32 %102, 65280
  %104 = ashr i32 %103, 8
  %105 = trunc i32 %104 to i8
  %106 = getelementptr inbounds [12 x i8], ptr %12, i64 0, i64 9
  store i8 %105, ptr %106, align 1, !tbaa !9
  %107 = load i8, ptr %8, align 1, !tbaa !9
  %108 = getelementptr inbounds [12 x i8], ptr %12, i64 0, i64 10
  store i8 %107, ptr %108, align 1, !tbaa !9
  %109 = getelementptr inbounds [12 x i8], ptr %12, i64 0, i64 0
  %110 = load ptr, ptr %4, align 8, !tbaa !5
  %111 = call signext i8 @bmi3_set_regs(i8 noundef zeroext 96, ptr noundef %109, i16 noundef zeroext 12, ptr noundef %110)
  store i8 %111, ptr %5, align 1, !tbaa !9
  br label %113

112:                                              ; preds = %18, %2
  store i8 -1, ptr %5, align 1, !tbaa !9
  br label %113

113:                                              ; preds = %112, %21
  %114 = load i8, ptr %5, align 1, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 12, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #3
  ret i8 %114
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !12, i64 0}
!11 = !{!"bmi3_acc_dp_gain_offset", !12, i64 0, !12, i64 2, !12, i64 4, !7, i64 6, !7, i64 7, !7, i64 8}
!12 = !{!"short", !7, i64 0}
!13 = !{!14, !12, i64 56}
!14 = !{!"bmi3_dev", !7, i64 0, !6, i64 8, !7, i64 16, !15, i64 20, !7, i64 24, !7, i64 25, !7, i64 26, !12, i64 28, !6, i64 32, !6, i64 40, !6, i64 48, !12, i64 56}
!15 = !{!"int", !7, i64 0}
!16 = !{!12, !12, i64 0}
!17 = !{!11, !7, i64 6}
!18 = !{!11, !12, i64 2}
!19 = !{!11, !7, i64 7}
!20 = !{!11, !12, i64 4}
!21 = !{!11, !7, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: nounwind uwtable
declare hidden signext i8 @null_ptr_check(ptr noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_set_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local signext i8 @bmi3_set_acc_dp_off_dgain(ptr noundef readonly %0, ptr noundef %1) local_unnamed_addr #2 {
  %3 = alloca [12 x i8], align 1
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %3) #3
  %4 = getelementptr inbounds i8, ptr %3, i64 3
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(12) %4, i8 0, i64 9, i1 false)
  %5 = tail call signext i8 @null_ptr_check(ptr noundef %1)
  %6 = icmp eq i8 %5, 0
  %7 = icmp ne ptr %0, null
  %or.cond = and i1 %7, %6
  br i1 %or.cond, label %8, label %43

8:                                                ; preds = %2
  %9 = load i16, ptr %0, align 2, !tbaa !5
  %10 = getelementptr inbounds i8, ptr %1, i64 56
  %11 = load i16, ptr %10, align 8, !tbaa !10
  %12 = and i16 %11, %9
  %13 = getelementptr inbounds i8, ptr %0, i64 6
  %14 = load i8, ptr %13, align 2, !tbaa !14
  %15 = getelementptr inbounds i8, ptr %0, i64 2
  %16 = load i16, ptr %15, align 2, !tbaa !15
  %17 = and i16 %16, %11
  %18 = getelementptr inbounds i8, ptr %0, i64 7
  %19 = load i8, ptr %18, align 1, !tbaa !16
  %20 = getelementptr inbounds i8, ptr %0, i64 4
  %21 = load i16, ptr %20, align 2, !tbaa !17
  %22 = and i16 %21, %11
  %23 = getelementptr inbounds i8, ptr %0, i64 8
  %24 = load i8, ptr %23, align 2, !tbaa !18
  %25 = trunc i16 %12 to i8
  store i8 %25, ptr %3, align 1, !tbaa !19
  %26 = lshr i16 %12, 8
  %27 = trunc nuw i16 %26 to i8
  %28 = getelementptr inbounds i8, ptr %3, i64 1
  store i8 %27, ptr %28, align 1, !tbaa !19
  %29 = getelementptr inbounds i8, ptr %3, i64 2
  store i8 %14, ptr %29, align 1, !tbaa !19
  %30 = trunc i16 %17 to i8
  %31 = getelementptr inbounds i8, ptr %3, i64 4
  store i8 %30, ptr %31, align 1, !tbaa !19
  %32 = lshr i16 %17, 8
  %33 = trunc nuw i16 %32 to i8
  %34 = getelementptr inbounds i8, ptr %3, i64 5
  store i8 %33, ptr %34, align 1, !tbaa !19
  %35 = getelementptr inbounds i8, ptr %3, i64 6
  store i8 %19, ptr %35, align 1, !tbaa !19
  %36 = trunc i16 %22 to i8
  %37 = getelementptr inbounds i8, ptr %3, i64 8
  store i8 %36, ptr %37, align 1, !tbaa !19
  %38 = lshr i16 %22, 8
  %39 = trunc nuw i16 %38 to i8
  %40 = getelementptr inbounds i8, ptr %3, i64 9
  store i8 %39, ptr %40, align 1, !tbaa !19
  %41 = getelementptr inbounds i8, ptr %3, i64 10
  store i8 %24, ptr %41, align 1, !tbaa !19
  %42 = call signext i8 @bmi3_set_regs(i8 noundef zeroext 96, ptr noundef nonnull %3, i16 noundef zeroext 12, ptr noundef %1)
  br label %43

43:                                               ; preds = %2, %8
  %.0 = phi i8 [ %42, %8 ], [ -1, %2 ]
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %3) #3
  ret i8 %.0
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"bmi3_acc_dp_gain_offset", !7, i64 0, !7, i64 2, !7, i64 4, !8, i64 6, !8, i64 7, !8, i64 8}
!7 = !{!"short", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 56}
!11 = !{!"bmi3_dev", !8, i64 0, !12, i64 8, !8, i64 16, !13, i64 20, !8, i64 24, !8, i64 25, !8, i64 26, !7, i64 28, !12, i64 32, !12, i64 40, !12, i64 48, !7, i64 56}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = !{!6, !8, i64 6}
!15 = !{!6, !7, i64 2}
!16 = !{!6, !8, i64 7}
!17 = !{!6, !7, i64 4}
!18 = !{!6, !8, i64 8}
!19 = !{!8, !8, i64 0}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass