; LLVM IR from IOsonata/IOsonata :: ARM/Nordic/nRF52/nRF52840/exemples/BoschAppBoard/src (bmi3)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.bmi3_axes_remap = type { i8, i8, i8, i8 }

@__const.bmi3_get_remap_axes.base_addr = external hidden unnamed_addr constant [2 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_get_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_set_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: nounwind uwtable
define dso_local signext i8 @bmi3_get_remap_axes(ptr noundef %0, ptr noundef %1) #1 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  %6 = alloca [4 x i8], align 1
  %7 = alloca [2 x i8], align 1
  %8 = alloca i8, align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 2, ptr %7) #3
  call void @llvm.memcpy.p0.p0.i64(ptr align 1 %7, ptr align 1 @__const.bmi3_get_remap_axes.base_addr, i64 2, i1 false)
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #3
  %9 = load ptr, ptr %3, align 8, !tbaa !5
  %10 = icmp ne ptr %9, null
  br i1 %10, label %11, label %57

11:                                               ; preds = %2
  %12 = getelementptr inbounds [2 x i8], ptr %7, i64 0, i64 0
  %13 = load ptr, ptr %4, align 8, !tbaa !5
  %14 = call signext i8 @bmi3_set_regs(i8 noundef zeroext 65, ptr noundef %12, i16 noundef zeroext 2, ptr noundef %13)
  store i8 %14, ptr %5, align 1, !tbaa !9
  %15 = load i8, ptr %5, align 1, !tbaa !9
  %16 = sext i8 %15 to i32
  %17 = icmp eq i32 %16, 0
  br i1 %17, label %18, label %56

18:                                               ; preds = %11
  %19 = getelementptr inbounds [4 x i8], ptr %6, i64 0, i64 0
  %20 = load ptr, ptr %4, align 8, !tbaa !5
  %21 = call signext i8 @bmi3_get_regs(i8 noundef zeroext 66, ptr noundef %19, i16 noundef zeroext 4, ptr noundef %20)
  store i8 %21, ptr %5, align 1, !tbaa !9
  %22 = load i8, ptr %5, align 1, !tbaa !9
  %23 = sext i8 %22 to i32
  %24 = icmp eq i32 %23, 0
  br i1 %24, label %25, label %55

25:                                               ; preds = %18
  %26 = getelementptr inbounds [4 x i8], ptr %6, i64 0, i64 0
  %27 = load i8, ptr %26, align 1, !tbaa !9
  store i8 %27, ptr %8, align 1, !tbaa !9
  %28 = load i8, ptr %8, align 1, !tbaa !9
  %29 = zext i8 %28 to i32
  %30 = and i32 %29, 7
  %31 = trunc i32 %30 to i8
  %32 = load ptr, ptr %3, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.bmi3_axes_remap, ptr %32, i32 0, i32 0
  store i8 %31, ptr %33, align 1, !tbaa !10
  %34 = load i8, ptr %8, align 1, !tbaa !9
  %35 = zext i8 %34 to i32
  %36 = and i32 %35, 8
  %37 = ashr i32 %36, 3
  %38 = trunc i32 %37 to i8
  %39 = load ptr, ptr %3, align 8, !tbaa !5
  %40 = getelementptr inbounds %struct.bmi3_axes_remap, ptr %39, i32 0, i32 1
  store i8 %38, ptr %40, align 1, !tbaa !12
  %41 = load i8, ptr %8, align 1, !tbaa !9
  %42 = zext i8 %41 to i32
  %43 = and i32 %42, 16
  %44 = ashr i32 %43, 4
  %45 = trunc i32 %44 to i8
  %46 = load ptr, ptr %3, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.bmi3_axes_remap, ptr %46, i32 0, i32 2
  store i8 %45, ptr %47, align 1, !tbaa !13
  %48 = load i8, ptr %8, align 1, !tbaa !9
  %49 = zext i8 %48 to i32
  %50 = and i32 %49, 32
  %51 = ashr i32 %50, 5
  %52 = trunc i32 %51 to i8
  %53 = load ptr, ptr %3, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.bmi3_axes_remap, ptr %53, i32 0, i32 3
  store i8 %52, ptr %54, align 1, !tbaa !14
  br label %55

55:                                               ; preds = %25, %18
  br label %56

56:                                               ; preds = %55, %11
  br label %58

57:                                               ; preds = %2
  store i8 -1, ptr %5, align 1, !tbaa !9
  br label %58

58:                                               ; preds = %57, %56
  %59 = load i8, ptr %5, align 1, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #3
  ret i8 %59
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !7, i64 0}
!11 = !{!"bmi3_axes_remap", !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 3}
!12 = !{!11, !7, i64 1}
!13 = !{!11, !7, i64 2}
!14 = !{!11, !7, i64 3}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@__const.bmi3_get_remap_axes.base_addr = external hidden unnamed_addr constant [2 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_get_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_set_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local signext i8 @bmi3_get_remap_axes(ptr noundef writeonly %0, ptr noundef %1) local_unnamed_addr #1 {
  %3 = alloca [4 x i8], align 1
  %4 = alloca [2 x i8], align 2
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr nonnull %4) #2
  %5 = load i16, ptr @__const.bmi3_get_remap_axes.base_addr, align 1
  store i16 %5, ptr %4, align 2
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %24, label %6

6:                                                ; preds = %2
  %7 = call signext i8 @bmi3_set_regs(i8 noundef zeroext 65, ptr noundef nonnull %4, i16 noundef zeroext 2, ptr noundef %1)
  %8 = icmp eq i8 %7, 0
  br i1 %8, label %9, label %24

9:                                                ; preds = %6
  %10 = call signext i8 @bmi3_get_regs(i8 noundef zeroext 66, ptr noundef nonnull %3, i16 noundef zeroext 4, ptr noundef %1)
  %11 = icmp eq i8 %10, 0
  br i1 %11, label %12, label %24

12:                                               ; preds = %9
  %13 = load i8, ptr %3, align 1, !tbaa !5
  %14 = and i8 %13, 7
  store i8 %14, ptr %0, align 1, !tbaa !8
  %15 = lshr i8 %13, 3
  %16 = and i8 %15, 1
  %17 = getelementptr inbounds i8, ptr %0, i64 1
  store i8 %16, ptr %17, align 1, !tbaa !10
  %18 = lshr i8 %13, 4
  %19 = and i8 %18, 1
  %20 = getelementptr inbounds i8, ptr %0, i64 2
  store i8 %19, ptr %20, align 1, !tbaa !11
  %21 = lshr i8 %13, 5
  %22 = and i8 %21, 1
  %23 = getelementptr inbounds i8, ptr %0, i64 3
  store i8 %22, ptr %23, align 1, !tbaa !12
  br label %24

24:                                               ; preds = %2, %6, %12, %9
  %.0 = phi i8 [ 0, %12 ], [ %10, %9 ], [ %7, %6 ], [ -1, %2 ]
  call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %4) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #2
  ret i8 %.0
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !6, i64 0}
!9 = !{!"bmi3_axes_remap", !6, i64 0, !6, i64 1, !6, i64 2, !6, i64 3}
!10 = !{!9, !6, i64 1}
!11 = !{!9, !6, i64 2}
!12 = !{!9, !6, i64 3}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass