; LLVM IR from IOsonata/IOsonata :: src/storage/diskio_impl.ll (ZN6DiskIO4ReadEmPhj)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN6DiskIO4ReadEmPhj(ptr noundef nonnull align 8 dereferenceable(32) %0, i64 noundef %1, ptr noundef %2, i32 noundef %3) unnamed_addr #1 align 2 {
  %5 = alloca ptr, align 8
  %6 = alloca i64, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i64, align 8
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i64 %1, ptr %6, align 8, !tbaa !9
  store ptr %2, ptr %7, align 8, !tbaa !5
  store i32 %3, ptr %8, align 4, !tbaa !11
  %15 = load ptr, ptr %5, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  %16 = load ptr, ptr %15, align 8, !tbaa !13
  %17 = getelementptr inbounds ptr, ptr %16, i64 2
  %18 = load ptr, ptr %17, align 8
  %19 = call noundef zeroext i16 %18(ptr noundef nonnull align 8 dereferenceable(32) %15)
  %20 = zext i16 %19 to i32
  store i32 %20, ptr %9, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #2
  %21 = load i64, ptr %6, align 8, !tbaa !9
  %22 = load i32, ptr %9, align 4, !tbaa !11
  %23 = zext i32 %22 to i64
  %24 = udiv i64 %21, %23
  store i64 %24, ptr %10, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #2
  %25 = load i64, ptr %6, align 8, !tbaa !9
  %26 = load i32, ptr %9, align 4, !tbaa !11
  %27 = zext i32 %26 to i64
  %28 = urem i64 %25, %27
  %29 = trunc i64 %28 to i32
  store i32 %29, ptr %11, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #2
  store i32 0, ptr %12, align 4, !tbaa !11
  br label %30

30:                                               ; preds = %69, %4
  %31 = load i32, ptr %8, align 4, !tbaa !11
  %32 = icmp ugt i32 %31, 0
  br i1 %32, label %33, label %70

33:                                               ; preds = %30
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #2
  %34 = load i64, ptr %10, align 8, !tbaa !9
  %35 = trunc i64 %34 to i32
  %36 = load i32, ptr %11, align 4, !tbaa !11
  %37 = load ptr, ptr %7, align 8, !tbaa !5
  %38 = load i32, ptr %8, align 4, !tbaa !11
  %39 = load ptr, ptr %15, align 8, !tbaa !13
  %40 = getelementptr inbounds ptr, ptr %39, i64 9
  %41 = load ptr, ptr %40, align 8
  %42 = call noundef i32 %41(ptr noundef nonnull align 8 dereferenceable(32) %15, i32 noundef %35, i32 noundef %36, ptr noundef %37, i32 noundef %38)
  store i32 %42, ptr %13, align 4, !tbaa !11
  %43 = load i32, ptr %13, align 4, !tbaa !11
  %44 = icmp sle i32 %43, 0
  br i1 %44, label %45, label %46

45:                                               ; preds = %33
  store i32 3, ptr %14, align 4
  br label %67

46:                                               ; preds = %33
  %47 = load i32, ptr %13, align 4, !tbaa !11
  %48 = load ptr, ptr %7, align 8, !tbaa !5
  %49 = sext i32 %47 to i64
  %50 = getelementptr inbounds i8, ptr %48, i64 %49
  store ptr %50, ptr %7, align 8, !tbaa !5
  %51 = load i32, ptr %13, align 4, !tbaa !11
  %52 = load i32, ptr %8, align 4, !tbaa !11
  %53 = sub i32 %52, %51
  store i32 %53, ptr %8, align 4, !tbaa !11
  %54 = load i32, ptr %13, align 4, !tbaa !11
  %55 = load i32, ptr %12, align 4, !tbaa !11
  %56 = add i32 %55, %54
  store i32 %56, ptr %12, align 4, !tbaa !11
  %57 = load i32, ptr %13, align 4, !tbaa !11
  %58 = load i32, ptr %11, align 4, !tbaa !11
  %59 = add i32 %58, %57
  store i32 %59, ptr %11, align 4, !tbaa !11
  %60 = load i32, ptr %11, align 4, !tbaa !11
  %61 = load i32, ptr %9, align 4, !tbaa !11
  %62 = icmp uge i32 %60, %61
  br i1 %62, label %63, label %66

63:                                               ; preds = %46
  %64 = load i64, ptr %10, align 8, !tbaa !9
  %65 = add i64 %64, 1
  store i64 %65, ptr %10, align 8, !tbaa !9
  store i32 0, ptr %11, align 4, !tbaa !11
  br label %66

66:                                               ; preds = %63, %46
  store i32 0, ptr %14, align 4
  br label %67

67:                                               ; preds = %66, %45
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #2
  %68 = load i32, ptr %14, align 4
  switch i32 %68, label %72 [
    i32 0, label %69
    i32 3, label %70
  ]

69:                                               ; preds = %67
  br label %30, !llvm.loop !15

70:                                               ; preds = %67, %30
  %71 = load i32, ptr %12, align 4, !tbaa !11
  store i32 1, ptr %14, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  ret i32 %71

72:                                               ; preds = %67
  unreachable
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"vtable pointer", !8, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN6DiskIO4ReadEmPhj(ptr noundef nonnull align 8 dereferenceable(32) %0, i64 noundef %1, ptr noundef %2, i32 noundef %3) unnamed_addr #0 align 2 {
  %5 = load ptr, ptr %0, align 8, !tbaa !5
  %6 = getelementptr inbounds i8, ptr %5, i64 16
  %7 = load ptr, ptr %6, align 8
  %8 = tail call noundef zeroext i16 %7(ptr noundef nonnull align 8 dereferenceable(32) %0)
  %9 = zext i16 %8 to i32
  %.not45 = icmp eq i32 %3, 0
  br i1 %.not45, label %.thread, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %4
  %10 = zext i16 %8 to i64
  %11 = urem i64 %1, %10
  %12 = trunc nuw nsw i64 %11 to i32
  %13 = udiv i64 %1, %10
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %20
  %.02350 = phi ptr [ %22, %20 ], [ %2, %.lr.ph.preheader ]
  %.02449 = phi i32 [ %24, %20 ], [ 0, %.lr.ph.preheader ]
  %.02648 = phi i32 [ %spec.select37, %20 ], [ %12, %.lr.ph.preheader ]
  %.02947 = phi i64 [ %spec.select, %20 ], [ %13, %.lr.ph.preheader ]
  %.03246 = phi i32 [ %23, %20 ], [ %3, %.lr.ph.preheader ]
  %14 = trunc i64 %.02947 to i32
  %15 = load ptr, ptr %0, align 8, !tbaa !5
  %16 = getelementptr inbounds i8, ptr %15, i64 72
  %17 = load ptr, ptr %16, align 8
  %18 = tail call noundef i32 %17(ptr noundef nonnull align 8 dereferenceable(32) %0, i32 noundef %14, i32 noundef %.02648, ptr noundef %.02350, i32 noundef %.03246)
  %19 = icmp slt i32 %18, 1
  br i1 %19, label %.thread, label %20

20:                                               ; preds = %.lr.ph
  %21 = zext nneg i32 %18 to i64
  %22 = getelementptr inbounds i8, ptr %.02350, i64 %21
  %23 = sub i32 %.03246, %18
  %24 = add i32 %18, %.02449
  %25 = add nuw i32 %18, %.02648
  %.not36 = icmp uge i32 %25, %9
  %26 = zext i1 %.not36 to i64
  %spec.select = add i64 %.02947, %26
  %spec.select37 = select i1 %.not36, i32 0, i32 %25
  %.not = icmp eq i32 %23, 0
  br i1 %.not, label %.thread, label %.lr.ph

.thread:                                          ; preds = %20, %.lr.ph, %4
  %.024.lcssa = phi i32 [ 0, %4 ], [ %.02449, %.lr.ph ], [ %24, %20 ]
  ret i32 %.024.lcssa
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"vtable pointer", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass