; LLVM IR from IOsonata/IOsonata :: src/converters/adc_ltc2495.ll/ZN10AdcLTC249511OpenChannelEPK20 (ADC_Channel_Configi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__ADC_Channel_Config = type <{ i32, i32, i32, i32, i32, i8, [3 x i8], %struct.__ADC_Pin_Config, %struct.__ADC_Pin_Config, i32, ptr }>
%struct.__ADC_Pin_Config = type { i32, i32 }
%class.AdcLTC2495 = type <{ %class.AdcDevice, [16 x float], i32, [4 x i8] }>
%class.AdcDevice = type { %class.Device, ptr, i32, i16, i32, i32, i8, i32 }
%class.Device = type { ptr, i8, i32, ptr, ptr, i64, i8, ptr, i8, i32 }

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN10AdcLTC249511OpenChannelEPK20__ADC_Channel_Configi(ptr noundef nonnull align 8 dereferenceable(164) %0, ptr noundef %1, i32 noundef %2) unnamed_addr #0 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca [2 x i8], align 1
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !9
  %10 = load ptr, ptr %4, align 8
  call void @llvm.lifetime.start.p0(i64 2, ptr %7) #3
  %11 = getelementptr inbounds [2 x i8], ptr %7, i64 0, i64 0
  store i8 -96, ptr %11, align 1, !tbaa !11
  %12 = getelementptr inbounds [2 x i8], ptr %7, i64 0, i64 1
  store i8 -128, ptr %12, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  store i32 0, ptr %8, align 4, !tbaa !9
  br label %13

13:                                               ; preds = %112, %3
  %14 = load i32, ptr %8, align 4, !tbaa !9
  %15 = load i32, ptr %6, align 4, !tbaa !9
  %16 = icmp slt i32 %14, %15
  br i1 %16, label %18, label %17

17:                                               ; preds = %13
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  br label %115

18:                                               ; preds = %13
  %19 = load ptr, ptr %5, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.__ADC_Channel_Config, ptr %19, i32 0, i32 2
  %21 = load i32, ptr %20, align 4, !tbaa !12
  %22 = icmp eq i32 %21, 1
  br i1 %22, label %23, label %36

23:                                               ; preds = %18
  %24 = load ptr, ptr %5, align 8, !tbaa !5
  %25 = load i32, ptr %8, align 4, !tbaa !9
  %26 = sext i32 %25 to i64
  %27 = getelementptr inbounds %struct.__ADC_Channel_Config, ptr %24, i64 %26
  %28 = getelementptr inbounds %struct.__ADC_Channel_Config, ptr %27, i32 0, i32 0
  %29 = load i32, ptr %28, align 4, !tbaa !18
  %30 = or i32 64, %29
  %31 = getelementptr inbounds [2 x i8], ptr %7, i64 0, i64 0
  %32 = load i8, ptr %31, align 1, !tbaa !11
  %33 = zext i8 %32 to i32
  %34 = or i32 %33, %30
  %35 = trunc i32 %34 to i8
  store i8 %35, ptr %31, align 1, !tbaa !11
  br label %48

36:                                               ; preds = %18
  %37 = load ptr, ptr %5, align 8, !tbaa !5
  %38 = load i32, ptr %8, align 4, !tbaa !9
  %39 = sext i32 %38 to i64
  %40 = getelementptr inbounds %struct.__ADC_Channel_Config, ptr %37, i64 %39
  %41 = getelementptr inbounds %struct.__ADC_Channel_Config, ptr %40, i32 0, i32 0
  %42 = load i32, ptr %41, align 4, !tbaa !18
  %43 = getelementptr inbounds [2 x i8], ptr %7, i64 0, i64 0
  %44 = load i8, ptr %43, align 1, !tbaa !11
  %45 = zext i8 %44 to i32
  %46 = or i32 %45, %42
  %47 = trunc i32 %46 to i8
  store i8 %47, ptr %43, align 1, !tbaa !11
  br label %48

48:                                               ; preds = %36, %23
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %49 = load ptr, ptr %5, align 8, !tbaa !5
  %50 = load i32, ptr %8, align 4, !tbaa !9
  %51 = sext i32 %50 to i64
  %52 = getelementptr inbounds %struct.__ADC_Channel_Config, ptr %49, i64 %51
  %53 = getelementptr inbounds %struct.__ADC_Channel_Config, ptr %52, i32 0, i32 3
  %54 = load i32, ptr %53, align 4, !tbaa !19
  %55 = lshr i32 %54, 8
  store i32 %55, ptr %9, align 4, !tbaa !9
  %56 = load i32, ptr %9, align 4, !tbaa !9
  %57 = icmp ugt i32 %56, 0
  br i1 %57, label %58, label %71

58:                                               ; preds = %48
  %59 = load i32, ptr %9, align 4, !tbaa !9
  %60 = zext i32 %59 to i64
  %61 = call i64 @llvm.ctlz.i64(i64 %60, i1 true)
  %62 = trunc i64 %61 to i32
  %63 = sub nsw i32 31, %62
  %64 = and i32 %63, 255
  %65 = or i32 128, %64
  %66 = getelementptr inbounds [2 x i8], ptr %7, i64 0, i64 1
  %67 = load i8, ptr %66, align 1, !tbaa !11
  %68 = zext i8 %67 to i32
  %69 = or i32 %68, %65
  %70 = trunc i32 %69 to i8
  store i8 %70, ptr %66, align 1, !tbaa !11
  br label %71

71:                                               ; preds = %58, %48
  %72 = getelementptr inbounds [2 x i8], ptr %7, i64 0, i64 0
  %73 = getelementptr inbounds [2 x i8], ptr %7, i64 0, i64 1
  %74 = load ptr, ptr %10, align 8, !tbaa !20
  %75 = getelementptr inbounds ptr, ptr %74, i64 10
  %76 = load ptr, ptr %75, align 8
  %77 = call noundef i32 %76(ptr noundef nonnull align 8 dereferenceable(64) %10, ptr noundef %72, i32 noundef 1, ptr noundef %73, i32 noundef 1)
  %78 = load i32, ptr %9, align 4, !tbaa !9
  %79 = and i32 %78, 7
  %80 = shl i32 %79, 2
  store i32 %80, ptr %9, align 4, !tbaa !9
  %81 = getelementptr inbounds %class.AdcLTC2495, ptr %10, i32 0, i32 2
  %82 = load i32, ptr %81, align 8, !tbaa !22
  %83 = sitofp i32 %82 to double
  %84 = fmul double 5.000000e-01, %83
  %85 = fptrunc double %84 to float
  %86 = getelementptr inbounds %class.AdcLTC2495, ptr %10, i32 0, i32 1
  %87 = load ptr, ptr %5, align 8, !tbaa !5
  %88 = load i32, ptr %8, align 4, !tbaa !9
  %89 = sext i32 %88 to i64
  %90 = getelementptr inbounds %struct.__ADC_Channel_Config, ptr %87, i64 %89
  %91 = getelementptr inbounds %struct.__ADC_Channel_Config, ptr %90, i32 0, i32 0
  %92 = load i32, ptr %91, align 4, !tbaa !18
  %93 = sext i32 %92 to i64
  %94 = getelementptr inbounds [16 x float], ptr %86, i64 0, i64 %93
  store float %85, ptr %94, align 4, !tbaa !30
  %95 = load i32, ptr %9, align 4, !tbaa !9
  %96 = icmp ugt i32 %95, 0
  br i1 %96, label %97, label %111

97:                                               ; preds = %71
  %98 = load i32, ptr %9, align 4, !tbaa !9
  %99 = uitofp i32 %98 to float
  %100 = getelementptr inbounds %class.AdcLTC2495, ptr %10, i32 0, i32 1
  %101 = load ptr, ptr %5, align 8, !tbaa !5
  %102 = load i32, ptr %8, align 4, !tbaa !9
  %103 = sext i32 %102 to i64
  %104 = getelementptr inbounds %struct.__ADC_Channel_Config, ptr %101, i64 %103
  %105 = getelementptr inbounds %struct.__ADC_Channel_Config, ptr %104, i32 0, i32 0
  %106 = load i32, ptr %105, align 4, !tbaa !18
  %107 = sext i32 %106 to i64
  %108 = getelementptr inbounds [16 x float], ptr %100, i64 0, i64 %107
  %109 = load float, ptr %108, align 4, !tbaa !30
  %110 = fdiv float %109, %99
  store float %110, ptr %108, align 4, !tbaa !30
  br label %111

111:                                              ; preds = %97, %71
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  br label %112

112:                                              ; preds = %111
  %113 = load i32, ptr %8, align 4, !tbaa !9
  %114 = add nsw i32 %113, 1
  store i32 %114, ptr %8, align 4, !tbaa !9
  br label %13, !llvm.loop !32

115:                                              ; preds = %17
  call void @llvm.lifetime.end.p0(i64 2, ptr %7) #3
  ret i1 true
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.ctlz.i64(i64, i1 immarg) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !14, i64 8}
!13 = !{!"_ZTS20__ADC_Channel_Config", !10, i64 0, !10, i64 4, !14, i64 8, !10, i64 12, !10, i64 16, !15, i64 20, !16, i64 24, !16, i64 32, !10, i64 40, !6, i64 44}
!14 = !{!"_ZTS18__ADC_Channel_Type", !7, i64 0}
!15 = !{!"bool", !7, i64 0}
!16 = !{!"_ZTS16__ADC_Pin_Config", !10, i64 0, !17, i64 4}
!17 = !{!"_ZTS14__ADC_Pin_Conn", !7, i64 0}
!18 = !{!13, !10, i64 0}
!19 = !{!13, !10, i64 12}
!20 = !{!21, !21, i64 0}
!21 = !{!"vtable pointer", !8, i64 0}
!22 = !{!23, !10, i64 160}
!23 = !{!"_ZTS10AdcLTC2495", !24, i64 0, !7, i64 96, !10, i64 160}
!24 = !{!"_ZTS9AdcDevice", !25, i64 0, !6, i64 64, !10, i64 72, !28, i64 76, !10, i64 80, !29, i64 84, !15, i64 88, !10, i64 92}
!25 = !{!"_ZTS6Device", !15, i64 8, !10, i64 12, !6, i64 16, !6, i64 24, !26, i64 32, !15, i64 40, !6, i64 48, !7, i64 56, !27, i64 60}
!26 = !{!"long", !7, i64 0}
!27 = !{!"_ZTS21__Dev_Data_Byte_Order", !7, i64 0}
!28 = !{!"short", !7, i64 0}
!29 = !{!"_ZTS21__ADC_Conversion_Mode", !7, i64 0}
!30 = !{!31, !31, i64 0}
!31 = !{!"float", !7, i64 0}
!32 = distinct !{!32, !33}
!33 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__ADC_Channel_Config = type <{ i32, i32, i32, i32, i32, i8, [3 x i8], %struct.__ADC_Pin_Config, %struct.__ADC_Pin_Config, i32, ptr }>
%struct.__ADC_Pin_Config = type { i32, i32 }

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN10AdcLTC249511OpenChannelEPK20__ADC_Channel_Configi(ptr noundef nonnull align 8 dereferenceable(164) %0, ptr nocapture noundef readonly %1, i32 noundef %2) unnamed_addr #0 align 2 {
  %4 = alloca [2 x i8], align 1
  call void @llvm.lifetime.start.p0(i64 2, ptr nonnull %4) #3
  store i8 -96, ptr %4, align 1, !tbaa !5
  %5 = getelementptr inbounds i8, ptr %4, i64 1
  store i8 -128, ptr %5, align 1, !tbaa !5
  %6 = icmp sgt i32 %2, 0
  br i1 %6, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %3
  %7 = getelementptr inbounds i8, ptr %1, i64 8
  %8 = getelementptr inbounds i8, ptr %0, i64 160
  %9 = getelementptr inbounds i8, ptr %0, i64 96
  %wide.trip.count = zext nneg i32 %2 to i64
  br label %10

._crit_edge:                                      ; preds = %29, %3
  call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %4) #3
  ret i1 true

10:                                               ; preds = %.lr.ph, %29
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %29 ]
  %11 = load i32, ptr %7, align 4, !tbaa !8
  %12 = icmp eq i32 %11, 1
  %13 = getelementptr inbounds %struct.__ADC_Channel_Config, ptr %1, i64 %indvars.iv
  %14 = load i32, ptr %13, align 4, !tbaa !16
  %15 = load i8, ptr %4, align 1, !tbaa !5
  %16 = trunc i32 %14 to i8
  %17 = or i8 %15, %16
  %18 = or i8 %17, 64
  %storemerge = select i1 %12, i8 %18, i8 %17
  store i8 %storemerge, ptr %4, align 1, !tbaa !5
  %19 = getelementptr inbounds %struct.__ADC_Channel_Config, ptr %1, i64 %indvars.iv
  %20 = getelementptr inbounds i8, ptr %19, i64 12
  %21 = load i32, ptr %20, align 4, !tbaa !17
  %22 = lshr i32 %21, 8
  %.not = icmp ult i32 %21, 256
  br i1 %.not, label %29, label %23

23:                                               ; preds = %10
  %24 = call range(i32 8, 33) i32 @llvm.ctlz.i32(i32 %22, i1 true)
  %25 = load i8, ptr %5, align 1, !tbaa !5
  %26 = trunc nuw nsw i32 %24 to i8
  %27 = xor i8 %26, -1
  %28 = or i8 %25, %27
  store i8 %28, ptr %5, align 1, !tbaa !5
  br label %29

29:                                               ; preds = %23, %10
  %30 = load ptr, ptr %0, align 8, !tbaa !18
  %31 = getelementptr inbounds i8, ptr %30, i64 80
  %32 = load ptr, ptr %31, align 8
  %33 = call noundef i32 %32(ptr noundef nonnull align 8 dereferenceable(64) %0, ptr noundef nonnull %4, i32 noundef 1, ptr noundef nonnull %5, i32 noundef 1)
  %34 = shl nuw nsw i32 %22, 2
  %35 = and i32 %34, 28
  %36 = load i32, ptr %8, align 8, !tbaa !20
  %37 = sitofp i32 %36 to double
  %38 = fmul double %37, 5.000000e-01
  %39 = fptrunc double %38 to float
  %40 = load i32, ptr %19, align 4, !tbaa !16
  %41 = sext i32 %40 to i64
  %42 = getelementptr inbounds [16 x float], ptr %9, i64 0, i64 %41
  %.not21 = icmp eq i32 %35, 0
  %43 = uitofp nneg i32 %35 to float
  %44 = select i1 %.not21, float 1.000000e+00, float %43
  %storemerge22 = fdiv float %39, %44
  store float %storemerge22, ptr %42, align 4, !tbaa !28
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %10, !llvm.loop !30
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.ctlz.i32(i32, i1 immarg) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !11, i64 8}
!9 = !{!"_ZTS20__ADC_Channel_Config", !10, i64 0, !10, i64 4, !11, i64 8, !10, i64 12, !10, i64 16, !12, i64 20, !13, i64 24, !13, i64 32, !10, i64 40, !15, i64 44}
!10 = !{!"int", !6, i64 0}
!11 = !{!"_ZTS18__ADC_Channel_Type", !6, i64 0}
!12 = !{!"bool", !6, i64 0}
!13 = !{!"_ZTS16__ADC_Pin_Config", !10, i64 0, !14, i64 4}
!14 = !{!"_ZTS14__ADC_Pin_Conn", !6, i64 0}
!15 = !{!"any pointer", !6, i64 0}
!16 = !{!9, !10, i64 0}
!17 = !{!9, !10, i64 12}
!18 = !{!19, !19, i64 0}
!19 = !{!"vtable pointer", !7, i64 0}
!20 = !{!21, !10, i64 160}
!21 = !{!"_ZTS10AdcLTC2495", !22, i64 0, !6, i64 96, !10, i64 160}
!22 = !{!"_ZTS9AdcDevice", !23, i64 0, !15, i64 64, !10, i64 72, !26, i64 76, !10, i64 80, !27, i64 84, !12, i64 88, !10, i64 92}
!23 = !{!"_ZTS6Device", !12, i64 8, !10, i64 12, !15, i64 16, !15, i64 24, !24, i64 32, !12, i64 40, !15, i64 48, !6, i64 56, !25, i64 60}
!24 = !{!"long", !6, i64 0}
!25 = !{!"_ZTS21__Dev_Data_Byte_Order", !6, i64 0}
!26 = !{!"short", !6, i64 0}
!27 = !{!"_ZTS21__ADC_Conversion_Mode", !6, i64 0}
!28 = !{!29, !29, i64 0}
!29 = !{!"float", !6, i64 0}
!30 = distinct !{!30, !31}
!31 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass