; LLVM IR from IOsonata/IOsonata :: src/slip_intrf.ll/Z23SlipIntrfRxDataBlockingP14 (device_intrfPhi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__device_intrf = type <{ ptr, i32, ptr, %"struct.std::atomic_flag", [3 x i8], i32, %"struct.std::atomic", i32, i8, i8, %"struct.std::atomic.0", %"struct.std::atomic.0", i64, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr }>
%"struct.std::atomic_flag" = type { %"struct.std::__atomic_flag_base" }
%"struct.std::__atomic_flag_base" = type { i8 }
%"struct.std::atomic" = type { %"struct.std::__atomic_base" }
%"struct.std::__atomic_base" = type { i32 }
%"struct.std::atomic.0" = type { %"struct.std::__atomic_base.1" }
%"struct.std::__atomic_base.1" = type { i8 }
%struct.__Slip_Device = type <{ %struct.__device_intrf, ptr, ptr, i8, [7 x i8] }>

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z23SlipIntrfRxDataBlockingP14__device_intrfPhi(ptr noundef %0, ptr noundef %1, i32 noundef %2) #1 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i8, align 1
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #2
  %10 = load ptr, ptr %4, align 8, !tbaa !5
  %11 = getelementptr inbounds %struct.__device_intrf, ptr %10, i32 0, i32 0
  %12 = load ptr, ptr %11, align 4, !tbaa !11
  store ptr %12, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  store i32 0, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #2
  %13 = load ptr, ptr %7, align 8, !tbaa !5
  %14 = getelementptr inbounds %struct.__Slip_Device, ptr %13, i32 0, i32 3
  store volatile i8 0, ptr %14, align 8, !tbaa !22
  br label %15

15:                                               ; preds = %77, %3
  %16 = load i32, ptr %6, align 4, !tbaa !9
  %17 = icmp sgt i32 %16, 0
  br i1 %17, label %18, label %78

18:                                               ; preds = %15
  %19 = load ptr, ptr %7, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.__Slip_Device, ptr %19, i32 0, i32 1
  %21 = load ptr, ptr %20, align 8, !tbaa !24
  %22 = getelementptr inbounds %struct.__device_intrf, ptr %21, i32 0, i32 18
  %23 = load ptr, ptr %22, align 4, !tbaa !25
  %24 = load ptr, ptr %7, align 8, !tbaa !5
  %25 = getelementptr inbounds %struct.__Slip_Device, ptr %24, i32 0, i32 1
  %26 = load ptr, ptr %25, align 8, !tbaa !24
  %27 = load ptr, ptr %5, align 8, !tbaa !5
  %28 = call noundef i32 %23(ptr noundef %26, ptr noundef %27, i32 noundef 1)
  %29 = icmp sgt i32 %28, 0
  br i1 %29, label %30, label %77

30:                                               ; preds = %18
  %31 = load ptr, ptr %5, align 8, !tbaa !5
  %32 = load i8, ptr %31, align 1, !tbaa !26
  %33 = zext i8 %32 to i32
  %34 = icmp eq i32 %33, 192
  br i1 %34, label %35, label %38

35:                                               ; preds = %30
  %36 = load ptr, ptr %7, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.__Slip_Device, ptr %36, i32 0, i32 3
  store volatile i8 1, ptr %37, align 8, !tbaa !22
  br label %78

38:                                               ; preds = %30
  %39 = load ptr, ptr %5, align 8, !tbaa !5
  %40 = load i8, ptr %39, align 1, !tbaa !26
  %41 = zext i8 %40 to i32
  %42 = icmp eq i32 %41, 219
  br i1 %42, label %43, label %70

43:                                               ; preds = %38
  br label %44

44:                                               ; preds = %55, %43
  %45 = load ptr, ptr %7, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.__Slip_Device, ptr %45, i32 0, i32 1
  %47 = load ptr, ptr %46, align 8, !tbaa !24
  %48 = getelementptr inbounds %struct.__device_intrf, ptr %47, i32 0, i32 18
  %49 = load ptr, ptr %48, align 4, !tbaa !25
  %50 = load ptr, ptr %7, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.__Slip_Device, ptr %50, i32 0, i32 1
  %52 = load ptr, ptr %51, align 8, !tbaa !24
  %53 = call noundef i32 %49(ptr noundef %52, ptr noundef %9, i32 noundef 1)
  %54 = icmp sle i32 %53, 0
  br i1 %54, label %55, label %56

55:                                               ; preds = %44
  br label %44, !llvm.loop !27

56:                                               ; preds = %44
  %57 = load i8, ptr %9, align 1, !tbaa !26
  %58 = zext i8 %57 to i32
  %59 = icmp eq i32 %58, 220
  br i1 %59, label %60, label %62

60:                                               ; preds = %56
  %61 = load ptr, ptr %5, align 8, !tbaa !5
  store i8 -64, ptr %61, align 1, !tbaa !26
  br label %69

62:                                               ; preds = %56
  %63 = load i8, ptr %9, align 1, !tbaa !26
  %64 = zext i8 %63 to i32
  %65 = icmp eq i32 %64, 221
  br i1 %65, label %66, label %68

66:                                               ; preds = %62
  %67 = load ptr, ptr %5, align 8, !tbaa !5
  store i8 -37, ptr %67, align 1, !tbaa !26
  br label %68

68:                                               ; preds = %66, %62
  br label %69

69:                                               ; preds = %68, %60
  br label %70

70:                                               ; preds = %69, %38
  %71 = load ptr, ptr %5, align 8, !tbaa !5
  %72 = getelementptr inbounds i8, ptr %71, i32 1
  store ptr %72, ptr %5, align 8, !tbaa !5
  %73 = load i32, ptr %6, align 4, !tbaa !9
  %74 = add nsw i32 %73, -1
  store i32 %74, ptr %6, align 4, !tbaa !9
  %75 = load i32, ptr %8, align 4, !tbaa !9
  %76 = add nsw i32 %75, 1
  store i32 %76, ptr %8, align 4, !tbaa !9
  br label %77

77:                                               ; preds = %70, %18
  br label %15, !llvm.loop !29

78:                                               ; preds = %35, %15
  %79 = load i32, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #2
  ret i32 %79
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"_ZTS14__device_intrf", !6, i64 0, !10, i64 8, !6, i64 12, !13, i64 20, !10, i64 24, !16, i64 28, !18, i64 32, !15, i64 36, !15, i64 37, !19, i64 38, !19, i64 39, !21, i64 40, !6, i64 48, !6, i64 56, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !6, i64 120, !6, i64 128, !6, i64 136, !6, i64 144, !6, i64 152}
!13 = !{!"_ZTSSt11atomic_flag", !14, i64 0}
!14 = !{!"_ZTSSt18__atomic_flag_base", !15, i64 0}
!15 = !{!"bool", !7, i64 0}
!16 = !{!"_ZTSSt6atomicIiE", !17, i64 0}
!17 = !{!"_ZTSSt13__atomic_baseIiE", !10, i64 0}
!18 = !{!"_ZTS16__Dev_Intrf_Type", !7, i64 0}
!19 = !{!"_ZTSSt6atomicIbE", !20, i64 0}
!20 = !{!"_ZTSSt13__atomic_baseIbE", !15, i64 0}
!21 = !{!"long", !7, i64 0}
!22 = !{!23, !15, i64 176}
!23 = !{!"_ZTS13__Slip_Device", !12, i64 0, !6, i64 160, !6, i64 168, !15, i64 176}
!24 = !{!23, !6, i64 160}
!25 = !{!12, !6, i64 88}
!26 = !{!7, !7, i64 0}
!27 = distinct !{!27, !28}
!28 = !{!"llvm.loop.mustprogress"}
!29 = distinct !{!29, !28}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z23SlipIntrfRxDataBlockingP14__device_intrfPhi(ptr nocapture noundef readonly %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #1 {
  %4 = alloca i8, align 1
  %5 = load ptr, ptr %0, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %4) #2
  %6 = getelementptr inbounds i8, ptr %5, i64 176
  store volatile i8 0, ptr %6, align 8, !tbaa !20
  %7 = icmp sgt i32 %2, 0
  br i1 %7, label %.lr.ph, label %.loopexit

.lr.ph:                                           ; preds = %3
  %8 = getelementptr inbounds i8, ptr %5, i64 160
  br label %9

9:                                                ; preds = %.lr.ph, %30
  %.026 = phi i32 [ 0, %.lr.ph ], [ %.1, %30 ]
  %.01625 = phi ptr [ %1, %.lr.ph ], [ %.117, %30 ]
  %.01824 = phi i32 [ %2, %.lr.ph ], [ %.119, %30 ]
  %10 = load ptr, ptr %8, align 8, !tbaa !22
  %11 = getelementptr inbounds i8, ptr %10, i64 88
  %12 = load ptr, ptr %11, align 4, !tbaa !23
  %13 = call noundef i32 %12(ptr noundef %10, ptr noundef %.01625, i32 noundef 1)
  %14 = icmp sgt i32 %13, 0
  br i1 %14, label %15, label %30

15:                                               ; preds = %9
  %16 = load i8, ptr %.01625, align 1, !tbaa !24
  switch i8 %16, label %26 [
    i8 -64, label %17
    i8 -37, label %.preheader
  ]

17:                                               ; preds = %15
  store volatile i8 1, ptr %6, align 8, !tbaa !20
  br label %.loopexit

.preheader:                                       ; preds = %15, %.preheader
  %18 = load ptr, ptr %8, align 8, !tbaa !22
  %19 = getelementptr inbounds i8, ptr %18, i64 88
  %20 = load ptr, ptr %19, align 4, !tbaa !23
  %21 = call noundef i32 %20(ptr noundef %18, ptr noundef nonnull %4, i32 noundef 1)
  %22 = icmp slt i32 %21, 1
  br i1 %22, label %.preheader, label %23, !llvm.loop !25

23:                                               ; preds = %.preheader
  %24 = load i8, ptr %4, align 1, !tbaa !24
  switch i8 %24, label %26 [
    i8 -36, label %.sink.split
    i8 -35, label %25
  ]

25:                                               ; preds = %23
  br label %.sink.split

.sink.split:                                      ; preds = %23, %25
  %.sink = phi i8 [ -37, %25 ], [ -64, %23 ]
  store i8 %.sink, ptr %.01625, align 1, !tbaa !24
  br label %26

26:                                               ; preds = %.sink.split, %23, %15
  %27 = getelementptr inbounds i8, ptr %.01625, i64 1
  %28 = add nsw i32 %.01824, -1
  %29 = add nsw i32 %.026, 1
  br label %30

30:                                               ; preds = %26, %9
  %.119 = phi i32 [ %28, %26 ], [ %.01824, %9 ]
  %.117 = phi ptr [ %27, %26 ], [ %.01625, %9 ]
  %.1 = phi i32 [ %29, %26 ], [ %.026, %9 ]
  %31 = icmp sgt i32 %.119, 0
  br i1 %31, label %9, label %.loopexit, !llvm.loop !27

.loopexit:                                        ; preds = %30, %3, %17
  %.023 = phi i32 [ %.026, %17 ], [ 0, %3 ], [ %.1, %30 ]
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %4) #2
  ret i32 %.023
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS14__device_intrf", !7, i64 0, !10, i64 8, !7, i64 12, !11, i64 20, !10, i64 24, !14, i64 28, !16, i64 32, !13, i64 36, !13, i64 37, !17, i64 38, !17, i64 39, !19, i64 40, !7, i64 48, !7, i64 56, !7, i64 64, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !7, i64 120, !7, i64 128, !7, i64 136, !7, i64 144, !7, i64 152}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"_ZTSSt11atomic_flag", !12, i64 0}
!12 = !{!"_ZTSSt18__atomic_flag_base", !13, i64 0}
!13 = !{!"bool", !8, i64 0}
!14 = !{!"_ZTSSt6atomicIiE", !15, i64 0}
!15 = !{!"_ZTSSt13__atomic_baseIiE", !10, i64 0}
!16 = !{!"_ZTS16__Dev_Intrf_Type", !8, i64 0}
!17 = !{!"_ZTSSt6atomicIbE", !18, i64 0}
!18 = !{!"_ZTSSt13__atomic_baseIbE", !13, i64 0}
!19 = !{!"long", !8, i64 0}
!20 = !{!21, !13, i64 176}
!21 = !{!"_ZTS13__Slip_Device", !6, i64 0, !7, i64 160, !7, i64 168, !13, i64 176}
!22 = !{!21, !7, i64 160}
!23 = !{!6, !7, i64 88}
!24 = !{!8, !8, i64 0}
!25 = distinct !{!25, !26}
!26 = !{!"llvm.loop.mustprogress"}
!27 = distinct !{!27, !26}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass