; LLVM IR from Tian-Xie/NLS :: NestedLogitModel.ll (ZN16NestedLogitModel10RandomCaseEiil)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::uniform_real_distribution" = type { %"struct.std::uniform_real_distribution<>::param_type" }
%"struct.std::uniform_real_distribution<>::param_type" = type { double, double }
%"class.std::mersenne_twister_engine" = type { [624 x i64], i64 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN16NestedLogitModel5ResetEv(ptr noundef nonnull align 8 dereferenceable(40)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN16NestedLogitModel5SetV0Ed(ptr noundef nonnull align 8 dereferenceable(40), double noundef) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZN16NestedLogitModel10InsertNestEd(ptr noundef nonnull align 8 dereferenceable(40), double noundef) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZN16NestedLogitModel13InsertProductEidd(ptr noundef nonnull align 8 dereferenceable(40), i32 noundef, double noundef, double noundef) #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN16NestedLogitModel10RandomCaseEiil(ptr noundef nonnull align 8 dereferenceable(40) %0, i32 noundef %1, i32 noundef %2, i64 noundef %3) #2 align 2 {
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i64, align 8
  %9 = alloca %"class.std::uniform_real_distribution", align 8
  %10 = alloca %"class.std::uniform_real_distribution", align 8
  %11 = alloca %"class.std::uniform_real_distribution", align 8
  %12 = alloca %"class.std::mersenne_twister_engine", align 8
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca double, align 8
  %17 = alloca double, align 8
  %18 = alloca double, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !9
  store i64 %3, ptr %8, align 8, !tbaa !11
  %19 = load ptr, ptr %5, align 8
  call void @_ZN16NestedLogitModel5ResetEv(ptr noundef nonnull align 8 dereferenceable(40) %19)
  %20 = load i32, ptr %6, align 4, !tbaa !9
  %21 = sitofp i32 %20 to double
  %22 = fmul double %21, 1.000000e+01
  call void @_ZN16NestedLogitModel5SetV0Ed(ptr noundef nonnull align 8 dereferenceable(40) %19, double noundef %22)
  call void @llvm.lifetime.start.p0(i64 16, ptr %9) #3
  call void @_ZNSt25uniform_real_distributionIdEC2Edd(ptr noundef nonnull align 8 dereferenceable(16) %9, double noundef 2.500000e-01, double noundef 7.500000e-01)
  call void @llvm.lifetime.start.p0(i64 16, ptr %10) #3
  call void @_ZNSt25uniform_real_distributionIdEC2Edd(ptr noundef nonnull align 8 dereferenceable(16) %10, double noundef 0.000000e+00, double noundef 1.000000e+00)
  call void @llvm.lifetime.start.p0(i64 16, ptr %11) #3
  call void @_ZNSt25uniform_real_distributionIdEC2Edd(ptr noundef nonnull align 8 dereferenceable(16) %11, double noundef 7.500000e-01, double noundef 1.250000e+00)
  call void @llvm.lifetime.start.p0(i64 5000, ptr %12) #3
  %23 = load i64, ptr %8, align 8, !tbaa !11
  call void @_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEC2Em(ptr noundef nonnull align 8 dereferenceable(5000) %12, i64 noundef %23)
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  store i32 0, ptr %13, align 4, !tbaa !9
  br label %24

24:                                               ; preds = %58, %4
  %25 = load i32, ptr %13, align 4, !tbaa !9
  %26 = load i32, ptr %6, align 4, !tbaa !9
  %27 = icmp slt i32 %25, %26
  br i1 %27, label %29, label %28

28:                                               ; preds = %24
  store i32 2, ptr %14, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  br label %61

29:                                               ; preds = %24
  %30 = call noundef double @_ZNSt25uniform_real_distributionIdEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEdRT_(ptr noundef nonnull align 8 dereferenceable(16) %9, ptr noundef nonnull align 8 dereferenceable(5000) %12)
  %31 = call noundef i32 @_ZN16NestedLogitModel10InsertNestEd(ptr noundef nonnull align 8 dereferenceable(40) %19, double noundef %30)
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  store i32 0, ptr %15, align 4, !tbaa !9
  br label %32

32:                                               ; preds = %54, %29
  %33 = load i32, ptr %15, align 4, !tbaa !9
  %34 = load i32, ptr %7, align 4, !tbaa !9
  %35 = icmp slt i32 %33, %34
  br i1 %35, label %37, label %36

36:                                               ; preds = %32
  store i32 5, ptr %14, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  br label %57

37:                                               ; preds = %32
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #3
  %38 = call noundef double @_ZNSt25uniform_real_distributionIdEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEdRT_(ptr noundef nonnull align 8 dereferenceable(16) %10, ptr noundef nonnull align 8 dereferenceable(5000) %12)
  store double %38, ptr %16, align 8, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #3
  %39 = load double, ptr %16, align 8, !tbaa !13
  %40 = fmul double 1.000000e+01, %39
  %41 = load double, ptr %16, align 8, !tbaa !13
  %42 = fmul double %40, %41
  %43 = call noundef double @_ZNSt25uniform_real_distributionIdEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEdRT_(ptr noundef nonnull align 8 dereferenceable(16) %11, ptr noundef nonnull align 8 dereferenceable(5000) %12)
  %44 = fmul double %42, %43
  store double %44, ptr %17, align 8, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #3
  %45 = load double, ptr %16, align 8, !tbaa !13
  %46 = fsub double 1.000000e+00, %45
  %47 = fmul double 1.000000e+01, %46
  %48 = call noundef double @_ZNSt25uniform_real_distributionIdEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEdRT_(ptr noundef nonnull align 8 dereferenceable(16) %11, ptr noundef nonnull align 8 dereferenceable(5000) %12)
  %49 = fmul double %47, %48
  store double %49, ptr %18, align 8, !tbaa !13
  %50 = load i32, ptr %13, align 4, !tbaa !9
  %51 = load double, ptr %18, align 8, !tbaa !13
  %52 = load double, ptr %17, align 8, !tbaa !13
  %53 = call noundef i32 @_ZN16NestedLogitModel13InsertProductEidd(ptr noundef nonnull align 8 dereferenceable(40) %19, i32 noundef %50, double noundef %51, double noundef %52)
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #3
  br label %54

54:                                               ; preds = %37
  %55 = load i32, ptr %15, align 4, !tbaa !9
  %56 = add nsw i32 %55, 1
  store i32 %56, ptr %15, align 4, !tbaa !9
  br label %32, !llvm.loop !15

57:                                               ; preds = %36
  br label %58

58:                                               ; preds = %57
  %59 = load i32, ptr %13, align 4, !tbaa !9
  %60 = add nsw i32 %59, 1
  store i32 %60, ptr %13, align 4, !tbaa !9
  br label %24, !llvm.loop !17

61:                                               ; preds = %28
  call void @llvm.lifetime.end.p0(i64 5000, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr %9) #3
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt25uniform_real_distributionIdEC2Edd(ptr noundef nonnull align 8 dereferenceable(16), double noundef, double noundef) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEC2Em(ptr noundef nonnull align 8 dereferenceable(5000), i64 noundef) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef double @_ZNSt25uniform_real_distributionIdEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEdRT_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(5000)) #2 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"double", !7, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = distinct !{!17, !16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::uniform_real_distribution" = type { %"struct.std::uniform_real_distribution<>::param_type" }
%"struct.std::uniform_real_distribution<>::param_type" = type { double, double }
%"class.std::mersenne_twister_engine" = type { [624 x i64], i64 }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN16NestedLogitModel5ResetEv(ptr noundef nonnull align 8 dereferenceable(40)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN16NestedLogitModel5SetV0Ed(ptr noundef nonnull align 8 dereferenceable(40), double noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZN16NestedLogitModel10InsertNestEd(ptr noundef nonnull align 8 dereferenceable(40), double noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZN16NestedLogitModel13InsertProductEidd(ptr noundef nonnull align 8 dereferenceable(40), i32 noundef, double noundef, double noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN16NestedLogitModel10RandomCaseEiil(ptr noundef nonnull align 8 dereferenceable(40) %0, i32 noundef %1, i32 noundef %2, i64 noundef %3) local_unnamed_addr #2 align 2 {
  %5 = alloca %"class.std::uniform_real_distribution", align 8
  %6 = alloca %"class.std::uniform_real_distribution", align 8
  %7 = alloca %"class.std::uniform_real_distribution", align 8
  %8 = alloca %"class.std::mersenne_twister_engine", align 8
  tail call void @_ZN16NestedLogitModel5ResetEv(ptr noundef nonnull align 8 dereferenceable(40) %0)
  %9 = sitofp i32 %1 to double
  %10 = fmul double %9, 1.000000e+01
  tail call void @_ZN16NestedLogitModel5SetV0Ed(ptr noundef nonnull align 8 dereferenceable(40) %0, double noundef %10)
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %5) #3
  call void @_ZNSt25uniform_real_distributionIdEC2Edd(ptr noundef nonnull align 8 dereferenceable(16) %5, double noundef 2.500000e-01, double noundef 7.500000e-01)
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %6) #3
  call void @_ZNSt25uniform_real_distributionIdEC2Edd(ptr noundef nonnull align 8 dereferenceable(16) %6, double noundef 0.000000e+00, double noundef 1.000000e+00)
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %7) #3
  call void @_ZNSt25uniform_real_distributionIdEC2Edd(ptr noundef nonnull align 8 dereferenceable(16) %7, double noundef 7.500000e-01, double noundef 1.250000e+00)
  call void @llvm.lifetime.start.p0(i64 5000, ptr nonnull %8) #3
  call void @_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEC2Em(ptr noundef nonnull align 8 dereferenceable(5000) %8, i64 noundef %3)
  %11 = icmp sgt i32 %1, 0
  br i1 %11, label %.lr.ph18, label %._crit_edge19

.lr.ph18:                                         ; preds = %4
  %12 = icmp sgt i32 %2, 0
  br i1 %12, label %.lr.ph.us, label %.lr.ph18.split

.lr.ph.us:                                        ; preds = %.lr.ph18, %._crit_edge.us
  %.016.us = phi i32 [ %27, %._crit_edge.us ], [ 0, %.lr.ph18 ]
  %13 = call noundef double @_ZNSt25uniform_real_distributionIdEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEdRT_(ptr noundef nonnull align 8 dereferenceable(16) %5, ptr noundef nonnull align 8 dereferenceable(5000) %8)
  %14 = call noundef i32 @_ZN16NestedLogitModel10InsertNestEd(ptr noundef nonnull align 8 dereferenceable(40) %0, double noundef %13)
  br label %15

15:                                               ; preds = %.lr.ph.us, %15
  %.01415.us = phi i32 [ 0, %.lr.ph.us ], [ %26, %15 ]
  %16 = call noundef double @_ZNSt25uniform_real_distributionIdEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEdRT_(ptr noundef nonnull align 8 dereferenceable(16) %6, ptr noundef nonnull align 8 dereferenceable(5000) %8)
  %17 = fmul double %16, 1.000000e+01
  %18 = fmul double %16, %17
  %19 = call noundef double @_ZNSt25uniform_real_distributionIdEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEdRT_(ptr noundef nonnull align 8 dereferenceable(16) %7, ptr noundef nonnull align 8 dereferenceable(5000) %8)
  %20 = fmul double %19, %18
  %21 = fsub double 1.000000e+00, %16
  %22 = fmul double %21, 1.000000e+01
  %23 = call noundef double @_ZNSt25uniform_real_distributionIdEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEdRT_(ptr noundef nonnull align 8 dereferenceable(16) %7, ptr noundef nonnull align 8 dereferenceable(5000) %8)
  %24 = fmul double %22, %23
  %25 = call noundef i32 @_ZN16NestedLogitModel13InsertProductEidd(ptr noundef nonnull align 8 dereferenceable(40) %0, i32 noundef %.016.us, double noundef %24, double noundef %20)
  %26 = add nuw nsw i32 %.01415.us, 1
  %exitcond21.not = icmp eq i32 %26, %2
  br i1 %exitcond21.not, label %._crit_edge.us, label %15, !llvm.loop !5

._crit_edge.us:                                   ; preds = %15
  %27 = add nuw nsw i32 %.016.us, 1
  %exitcond22.not = icmp eq i32 %27, %1
  br i1 %exitcond22.not, label %._crit_edge19, label %.lr.ph.us, !llvm.loop !7

._crit_edge19:                                    ; preds = %.lr.ph18.split, %._crit_edge.us, %4
  call void @llvm.lifetime.end.p0(i64 5000, ptr nonnull %8) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %7) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %6) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %5) #3
  ret void

.lr.ph18.split:                                   ; preds = %.lr.ph18, %.lr.ph18.split
  %.016 = phi i32 [ %30, %.lr.ph18.split ], [ 0, %.lr.ph18 ]
  %28 = call noundef double @_ZNSt25uniform_real_distributionIdEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEdRT_(ptr noundef nonnull align 8 dereferenceable(16) %5, ptr noundef nonnull align 8 dereferenceable(5000) %8)
  %29 = call noundef i32 @_ZN16NestedLogitModel10InsertNestEd(ptr noundef nonnull align 8 dereferenceable(40) %0, double noundef %28)
  %30 = add nuw nsw i32 %.016, 1
  %exitcond.not = icmp eq i32 %30, %1
  br i1 %exitcond.not, label %._crit_edge19, label %.lr.ph18.split, !llvm.loop !7
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt25uniform_real_distributionIdEC2Edd(ptr noundef nonnull align 8 dereferenceable(16), double noundef, double noundef) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEC2Em(ptr noundef nonnull align 8 dereferenceable(5000), i64 noundef) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef double @_ZNSt25uniform_real_distributionIdEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEdRT_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(5000)) local_unnamed_addr #2 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}


; Effective O3 passes: GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass