; LLVM IR from IOsonata/IOsonata :: ARM/Nordic/nRF52/nRF52840/exemples/BoschAppBoard/src (bmi323)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.bmi3_dev = type { i8, ptr, i8, i32, i8, i8, i8, i16, ptr, ptr, ptr, i16 }

; Function Attrs: nounwind uwtable
define dso_local signext i8 @bmi323_init(ptr noundef %0) #0 {
  %2 = alloca ptr, align 8
  %3 = alloca i8, align 1
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %3) #3
  %4 = load ptr, ptr %2, align 8, !tbaa !5
  %5 = call signext i8 @null_ptr_check(ptr noundef %4)
  store i8 %5, ptr %3, align 1, !tbaa !9
  %6 = load i8, ptr %3, align 1, !tbaa !9
  %7 = sext i8 %6 to i32
  %8 = icmp eq i32 %7, 0
  br i1 %8, label %9, label %12

9:                                                ; preds = %1
  %10 = load ptr, ptr %2, align 8, !tbaa !5
  %11 = call signext i8 @bmi3_init(ptr noundef %10)
  store i8 %11, ptr %3, align 1, !tbaa !9
  br label %12

12:                                               ; preds = %9, %1
  %13 = load i8, ptr %3, align 1, !tbaa !9
  %14 = sext i8 %13 to i32
  %15 = icmp eq i32 %14, 0
  br i1 %15, label %16, label %27

16:                                               ; preds = %12
  %17 = load ptr, ptr %2, align 8, !tbaa !5
  %18 = getelementptr inbounds %struct.bmi3_dev, ptr %17, i32 0, i32 0
  %19 = load i8, ptr %18, align 8, !tbaa !10
  %20 = zext i8 %19 to i32
  %21 = icmp eq i32 %20, 67
  br i1 %21, label %22, label %25

22:                                               ; preds = %16
  %23 = load ptr, ptr %2, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.bmi3_dev, ptr %23, i32 0, i32 6
  store i8 16, ptr %24, align 2, !tbaa !14
  br label %26

25:                                               ; preds = %16
  store i8 -3, ptr %3, align 1, !tbaa !9
  br label %26

26:                                               ; preds = %25, %22
  br label %27

27:                                               ; preds = %26, %12
  %28 = load i8, ptr %3, align 1, !tbaa !9
  %29 = sext i8 %28 to i32
  %30 = icmp eq i32 %29, 0
  br i1 %30, label %31, label %34

31:                                               ; preds = %27
  %32 = load ptr, ptr %2, align 8, !tbaa !5
  %33 = call signext i8 @bmi323_context_switch_selection(i8 noundef zeroext 1, ptr noundef %32)
  store i8 %33, ptr %3, align 1, !tbaa !9
  br label %34

34:                                               ; preds = %31, %27
  %35 = load i8, ptr %3, align 1, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 1, ptr %3) #3
  ret i8 %35
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare hidden signext i8 @null_ptr_check(ptr noundef) #0

declare signext i8 @bmi3_init(ptr noundef) #2

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi323_context_switch_selection(i8 noundef zeroext, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !7, i64 0}
!11 = !{!"bmi3_dev", !7, i64 0, !6, i64 8, !7, i64 16, !12, i64 20, !7, i64 24, !7, i64 25, !7, i64 26, !13, i64 28, !6, i64 32, !6, i64 40, !6, i64 48, !13, i64 56}
!12 = !{!"int", !7, i64 0}
!13 = !{!"short", !7, i64 0}
!14 = !{!11, !7, i64 26}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local signext i8 @bmi323_init(ptr noundef %0) local_unnamed_addr #0 {
  %2 = tail call signext i8 @null_ptr_check(ptr noundef %0)
  %3 = icmp eq i8 %2, 0
  br i1 %3, label %4, label %.thread9

4:                                                ; preds = %1
  %5 = tail call signext i8 @bmi3_init(ptr noundef %0) #2
  %6 = icmp eq i8 %5, 0
  br i1 %6, label %7, label %.thread9

7:                                                ; preds = %4
  %8 = load i8, ptr %0, align 8, !tbaa !5
  %9 = icmp eq i8 %8, 67
  br i1 %9, label %10, label %.thread9

10:                                               ; preds = %7
  %11 = getelementptr inbounds i8, ptr %0, i64 26
  store i8 16, ptr %11, align 2, !tbaa !12
  %12 = tail call signext i8 @bmi323_context_switch_selection(i8 noundef zeroext 1, ptr noundef nonnull %0)
  br label %.thread9

.thread9:                                         ; preds = %1, %7, %4, %10
  %.2 = phi i8 [ %12, %10 ], [ -3, %7 ], [ %5, %4 ], [ %2, %1 ]
  ret i8 %.2
}

; Function Attrs: nounwind uwtable
declare hidden signext i8 @null_ptr_check(ptr noundef) local_unnamed_addr #0

declare signext i8 @bmi3_init(ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi323_context_switch_selection(i8 noundef zeroext, ptr noundef) local_unnamed_addr #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"bmi3_dev", !7, i64 0, !9, i64 8, !7, i64 16, !10, i64 20, !7, i64 24, !7, i64 25, !7, i64 26, !11, i64 28, !9, i64 32, !9, i64 40, !9, i64 48, !11, i64 56}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!"any pointer", !7, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!"short", !7, i64 0}
!12 = !{!6, !7, i64 26}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,SROAPass,SimplifyCFGPass,TailCallElimPass