; LLVM IR from IOsonata/IOsonata :: src/miscdev (ledmx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @LedMxSetRam(ptr noundef %0, i32 noundef %1, i8 noundef signext %2, i32 noundef %3, i32 noundef %4) #1 {
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i8, align 1
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !9
  store i8 %2, ptr %8, align 1, !tbaa !11
  store i32 %3, ptr %9, align 4, !tbaa !9
  store i32 %4, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %14 = load i32, ptr %7, align 4, !tbaa !9
  %15 = icmp uge i32 %14, 64
  br i1 %15, label %16, label %17

16:                                               ; preds = %5
  store i32 1, ptr %13, align 4
  br label %64

17:                                               ; preds = %5
  br label %18

18:                                               ; preds = %26, %17
  %19 = load i32, ptr %7, align 4, !tbaa !9
  %20 = icmp ult i32 %19, 0
  br i1 %20, label %21, label %24

21:                                               ; preds = %18
  %22 = load i32, ptr %9, align 4, !tbaa !9
  %23 = icmp sgt i32 %22, 0
  br label %24

24:                                               ; preds = %21, %18
  %25 = phi i1 [ false, %18 ], [ %23, %21 ]
  br i1 %25, label %26, label %31

26:                                               ; preds = %24
  %27 = load i32, ptr %9, align 4, !tbaa !9
  %28 = add nsw i32 %27, -1
  store i32 %28, ptr %9, align 4, !tbaa !9
  %29 = load i32, ptr %7, align 4, !tbaa !9
  %30 = add i32 %29, 2
  store i32 %30, ptr %7, align 4, !tbaa !9
  br label %18, !llvm.loop !12

31:                                               ; preds = %24
  %32 = load i32, ptr %9, align 4, !tbaa !9
  %33 = icmp sle i32 %32, 0
  br i1 %33, label %34, label %35

34:                                               ; preds = %31
  store i32 1, ptr %13, align 4
  br label %64

35:                                               ; preds = %31
  %36 = load ptr, ptr %6, align 8, !tbaa !5
  %37 = load i32, ptr %10, align 4, !tbaa !9
  call void @LedMxStartTx(ptr noundef %36, i32 noundef %37)
  %38 = load i32, ptr %7, align 4, !tbaa !9
  %39 = and i32 %38, 127
  %40 = or i32 640, %39
  store i32 %40, ptr %11, align 4, !tbaa !9
  %41 = load ptr, ptr %6, align 8, !tbaa !5
  %42 = load i32, ptr %11, align 4, !tbaa !9
  call void @LedMxTxData(ptr noundef %41, i32 noundef %42, i32 noundef 10)
  store i32 0, ptr %12, align 4, !tbaa !9
  br label %43

43:                                               ; preds = %58, %35
  %44 = load i32, ptr %12, align 4, !tbaa !9
  %45 = load i32, ptr %9, align 4, !tbaa !9
  %46 = icmp slt i32 %44, %45
  br i1 %46, label %47, label %50

47:                                               ; preds = %43
  %48 = load i32, ptr %7, align 4, !tbaa !9
  %49 = icmp ult i32 %48, 64
  br label %50

50:                                               ; preds = %47, %43
  %51 = phi i1 [ false, %43 ], [ %49, %47 ]
  br i1 %51, label %52, label %61

52:                                               ; preds = %50
  %53 = load ptr, ptr %6, align 8, !tbaa !5
  %54 = load i8, ptr %8, align 1, !tbaa !11
  %55 = sext i8 %54 to i32
  call void @LedMxTxData(ptr noundef %53, i32 noundef %55, i32 noundef 8)
  %56 = load i32, ptr %7, align 4, !tbaa !9
  %57 = add i32 %56, 2
  store i32 %57, ptr %7, align 4, !tbaa !9
  br label %58

58:                                               ; preds = %52
  %59 = load i32, ptr %12, align 4, !tbaa !9
  %60 = add nsw i32 %59, 1
  store i32 %60, ptr %12, align 4, !tbaa !9
  br label %43, !llvm.loop !14

61:                                               ; preds = %50
  %62 = load ptr, ptr %6, align 8, !tbaa !5
  %63 = load i32, ptr %10, align 4, !tbaa !9
  call void @LedMxStopTx(ptr noundef %62, i32 noundef %63)
  store i32 0, ptr %13, align 4
  br label %64

64:                                               ; preds = %61, %34, %16
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  %65 = load i32, ptr %13, align 4
  switch i32 %65, label %67 [
    i32 0, label %66
    i32 1, label %66
  ]

66:                                               ; preds = %64, %64
  ret void

67:                                               ; preds = %64
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @LedMxStartTx(ptr noundef, i32 noundef) #2

declare void @LedMxTxData(ptr noundef, i32 noundef, i32 noundef) #2

declare void @LedMxStopTx(ptr noundef, i32 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @LedMxSetRam(ptr noundef %0, i32 noundef %1, i8 noundef signext %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #0 {
  %6 = icmp ugt i32 %1, 63
  %7 = icmp slt i32 %3, 1
  %or.cond = or i1 %6, %7
  br i1 %or.cond, label %18, label %8

8:                                                ; preds = %5
  tail call void @LedMxStartTx(ptr noundef %0, i32 noundef %4) #2
  %9 = or disjoint i32 %1, 640
  tail call void @LedMxTxData(ptr noundef %0, i32 noundef %9, i32 noundef 10) #2
  %10 = sext i8 %2 to i32
  br label %11

11:                                               ; preds = %8, %11
  %.023 = phi i32 [ 0, %8 ], [ %13, %11 ]
  %.122 = phi i32 [ %1, %8 ], [ %12, %11 ]
  tail call void @LedMxTxData(ptr noundef %0, i32 noundef %10, i32 noundef 8) #2
  %12 = add nuw nsw i32 %.122, 2
  %13 = add nuw nsw i32 %.023, 1
  %14 = icmp slt i32 %13, %3
  %15 = icmp ult i32 %.122, 62
  %16 = select i1 %14, i1 %15, i1 false
  br i1 %16, label %11, label %17, !llvm.loop !5

17:                                               ; preds = %11
  tail call void @LedMxStopTx(ptr noundef %0, i32 noundef %4) #2
  br label %18

18:                                               ; preds = %5, %17
  ret void
}

declare void @LedMxStartTx(ptr noundef, i32 noundef) local_unnamed_addr #1

declare void @LedMxTxData(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare void @LedMxStopTx(ptr noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,LICMPass,LoopRotatePass,SROAPass,SimplifyCFGPass,TailCallElimPass