; LLVM IR from IOsonata/IOsonata :: ARM/Nordic/nRF52/nRF52840/exemples/BoschAppBoard/src (bmi3)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.bmi3_gyr_dp_gain_offset = type { i16, i16, i16, i8, i8, i8 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_get_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local signext i8 @bmi3_get_gyro_dp_off_dgain(ptr noundef %0, ptr noundef %1) #1 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  %6 = alloca [12 x i8], align 1
  %7 = alloca i16, align 2
  %8 = alloca i16, align 2
  %9 = alloca i16, align 2
  %10 = alloca i8, align 1
  %11 = alloca i8, align 1
  %12 = alloca i8, align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #2
  call void @llvm.lifetime.start.p0(i64 12, ptr %6) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %7) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %8) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %9) #2
  call void @llvm.lifetime.start.p0(i64 1, ptr %10) #2
  call void @llvm.lifetime.start.p0(i64 1, ptr %11) #2
  call void @llvm.lifetime.start.p0(i64 1, ptr %12) #2
  %13 = load ptr, ptr %3, align 8, !tbaa !5
  %14 = icmp ne ptr %13, null
  br i1 %14, label %15, label %96

15:                                               ; preds = %2
  %16 = getelementptr inbounds [12 x i8], ptr %6, i64 0, i64 0
  %17 = load ptr, ptr %4, align 8, !tbaa !5
  %18 = call signext i8 @bmi3_get_regs(i8 noundef zeroext 102, ptr noundef %16, i16 noundef zeroext 12, ptr noundef %17)
  store i8 %18, ptr %5, align 1, !tbaa !9
  %19 = load i8, ptr %5, align 1, !tbaa !9
  %20 = sext i8 %19 to i32
  %21 = icmp eq i32 %20, 0
  br i1 %21, label %22, label %95

22:                                               ; preds = %15
  %23 = getelementptr inbounds [12 x i8], ptr %6, i64 0, i64 1
  %24 = load i8, ptr %23, align 1, !tbaa !9
  %25 = zext i8 %24 to i16
  %26 = zext i16 %25 to i32
  %27 = shl i32 %26, 8
  %28 = getelementptr inbounds [12 x i8], ptr %6, i64 0, i64 0
  %29 = load i8, ptr %28, align 1, !tbaa !9
  %30 = zext i8 %29 to i32
  %31 = or i32 %27, %30
  %32 = trunc i32 %31 to i16
  store i16 %32, ptr %7, align 2, !tbaa !10
  %33 = getelementptr inbounds [12 x i8], ptr %6, i64 0, i64 2
  %34 = load i8, ptr %33, align 1, !tbaa !9
  store i8 %34, ptr %10, align 1, !tbaa !9
  %35 = getelementptr inbounds [12 x i8], ptr %6, i64 0, i64 5
  %36 = load i8, ptr %35, align 1, !tbaa !9
  %37 = zext i8 %36 to i16
  %38 = zext i16 %37 to i32
  %39 = shl i32 %38, 8
  %40 = getelementptr inbounds [12 x i8], ptr %6, i64 0, i64 4
  %41 = load i8, ptr %40, align 1, !tbaa !9
  %42 = zext i8 %41 to i32
  %43 = or i32 %39, %42
  %44 = trunc i32 %43 to i16
  store i16 %44, ptr %8, align 2, !tbaa !10
  %45 = getelementptr inbounds [12 x i8], ptr %6, i64 0, i64 6
  %46 = load i8, ptr %45, align 1, !tbaa !9
  store i8 %46, ptr %11, align 1, !tbaa !9
  %47 = getelementptr inbounds [12 x i8], ptr %6, i64 0, i64 9
  %48 = load i8, ptr %47, align 1, !tbaa !9
  %49 = zext i8 %48 to i16
  %50 = zext i16 %49 to i32
  %51 = shl i32 %50, 8
  %52 = getelementptr inbounds [12 x i8], ptr %6, i64 0, i64 8
  %53 = load i8, ptr %52, align 1, !tbaa !9
  %54 = zext i8 %53 to i32
  %55 = or i32 %51, %54
  %56 = trunc i32 %55 to i16
  store i16 %56, ptr %9, align 2, !tbaa !10
  %57 = getelementptr inbounds [12 x i8], ptr %6, i64 0, i64 10
  %58 = load i8, ptr %57, align 1, !tbaa !9
  store i8 %58, ptr %12, align 1, !tbaa !9
  %59 = load i16, ptr %7, align 2, !tbaa !10
  %60 = zext i16 %59 to i32
  %61 = and i32 %60, 1023
  %62 = trunc i32 %61 to i16
  %63 = load ptr, ptr %3, align 8, !tbaa !5
  %64 = getelementptr inbounds %struct.bmi3_gyr_dp_gain_offset, ptr %63, i32 0, i32 0
  store i16 %62, ptr %64, align 2, !tbaa !12
  %65 = load i8, ptr %10, align 1, !tbaa !9
  %66 = zext i8 %65 to i32
  %67 = and i32 %66, 127
  %68 = trunc i32 %67 to i8
  %69 = load ptr, ptr %3, align 8, !tbaa !5
  %70 = getelementptr inbounds %struct.bmi3_gyr_dp_gain_offset, ptr %69, i32 0, i32 3
  store i8 %68, ptr %70, align 2, !tbaa !14
  %71 = load i16, ptr %8, align 2, !tbaa !10
  %72 = zext i16 %71 to i32
  %73 = and i32 %72, 1023
  %74 = trunc i32 %73 to i16
  %75 = load ptr, ptr %3, align 8, !tbaa !5
  %76 = getelementptr inbounds %struct.bmi3_gyr_dp_gain_offset, ptr %75, i32 0, i32 1
  store i16 %74, ptr %76, align 2, !tbaa !15
  %77 = load i8, ptr %11, align 1, !tbaa !9
  %78 = zext i8 %77 to i32
  %79 = and i32 %78, 127
  %80 = trunc i32 %79 to i8
  %81 = load ptr, ptr %3, align 8, !tbaa !5
  %82 = getelementptr inbounds %struct.bmi3_gyr_dp_gain_offset, ptr %81, i32 0, i32 4
  store i8 %80, ptr %82, align 1, !tbaa !16
  %83 = load i16, ptr %9, align 2, !tbaa !10
  %84 = zext i16 %83 to i32
  %85 = and i32 %84, 1023
  %86 = trunc i32 %85 to i16
  %87 = load ptr, ptr %3, align 8, !tbaa !5
  %88 = getelementptr inbounds %struct.bmi3_gyr_dp_gain_offset, ptr %87, i32 0, i32 2
  store i16 %86, ptr %88, align 2, !tbaa !17
  %89 = load i8, ptr %12, align 1, !tbaa !9
  %90 = zext i8 %89 to i32
  %91 = and i32 %90, 127
  %92 = trunc i32 %91 to i8
  %93 = load ptr, ptr %3, align 8, !tbaa !5
  %94 = getelementptr inbounds %struct.bmi3_gyr_dp_gain_offset, ptr %93, i32 0, i32 5
  store i8 %92, ptr %94, align 2, !tbaa !18
  br label %95

95:                                               ; preds = %22, %15
  br label %97

96:                                               ; preds = %2
  store i8 -1, ptr %5, align 1, !tbaa !9
  br label %97

97:                                               ; preds = %96, %95
  %98 = load i8, ptr %5, align 1, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 1, ptr %12) #2
  call void @llvm.lifetime.end.p0(i64 1, ptr %11) #2
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %9) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 12, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #2
  ret i8 %98
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"short", !7, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"bmi3_gyr_dp_gain_offset", !11, i64 0, !11, i64 2, !11, i64 4, !7, i64 6, !7, i64 7, !7, i64 8}
!14 = !{!13, !7, i64 6}
!15 = !{!13, !11, i64 2}
!16 = !{!13, !7, i64 7}
!17 = !{!13, !11, i64 4}
!18 = !{!13, !7, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_get_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local signext i8 @bmi3_get_gyro_dp_off_dgain(ptr noundef writeonly %0, ptr noundef %1) local_unnamed_addr #1 {
  %3 = alloca [12 x i8], align 1
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %3) #2
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %45, label %4

4:                                                ; preds = %2
  %5 = call signext i8 @bmi3_get_regs(i8 noundef zeroext 102, ptr noundef nonnull %3, i16 noundef zeroext 12, ptr noundef %1)
  %6 = icmp eq i8 %5, 0
  br i1 %6, label %7, label %45

7:                                                ; preds = %4
  %8 = getelementptr inbounds i8, ptr %3, i64 1
  %9 = load i8, ptr %8, align 1, !tbaa !5
  %10 = zext i8 %9 to i16
  %11 = shl nuw i16 %10, 8
  %12 = load i8, ptr %3, align 1, !tbaa !5
  %13 = zext i8 %12 to i16
  %14 = getelementptr inbounds i8, ptr %3, i64 2
  %15 = load i8, ptr %14, align 1, !tbaa !5
  %16 = getelementptr inbounds i8, ptr %3, i64 5
  %17 = load i8, ptr %16, align 1, !tbaa !5
  %18 = zext i8 %17 to i16
  %19 = shl nuw i16 %18, 8
  %20 = getelementptr inbounds i8, ptr %3, i64 4
  %21 = load i8, ptr %20, align 1, !tbaa !5
  %22 = zext i8 %21 to i16
  %23 = getelementptr inbounds i8, ptr %3, i64 6
  %24 = load i8, ptr %23, align 1, !tbaa !5
  %25 = getelementptr inbounds i8, ptr %3, i64 9
  %26 = load i8, ptr %25, align 1, !tbaa !5
  %27 = zext i8 %26 to i16
  %28 = shl nuw i16 %27, 8
  %29 = getelementptr inbounds i8, ptr %3, i64 8
  %30 = load i8, ptr %29, align 1, !tbaa !5
  %31 = zext i8 %30 to i16
  %32 = getelementptr inbounds i8, ptr %3, i64 10
  %33 = load i8, ptr %32, align 1, !tbaa !5
  %.masked = and i16 %11, 768
  %34 = or disjoint i16 %.masked, %13
  store i16 %34, ptr %0, align 2, !tbaa !8
  %35 = and i8 %15, 127
  %36 = getelementptr inbounds i8, ptr %0, i64 6
  store i8 %35, ptr %36, align 2, !tbaa !11
  %.masked16 = and i16 %19, 768
  %37 = or disjoint i16 %.masked16, %22
  %38 = getelementptr inbounds i8, ptr %0, i64 2
  store i16 %37, ptr %38, align 2, !tbaa !12
  %39 = and i8 %24, 127
  %40 = getelementptr inbounds i8, ptr %0, i64 7
  store i8 %39, ptr %40, align 1, !tbaa !13
  %.masked17 = and i16 %28, 768
  %41 = or disjoint i16 %.masked17, %31
  %42 = getelementptr inbounds i8, ptr %0, i64 4
  store i16 %41, ptr %42, align 2, !tbaa !14
  %43 = and i8 %33, 127
  %44 = getelementptr inbounds i8, ptr %0, i64 8
  store i8 %43, ptr %44, align 2, !tbaa !15
  br label %45

45:                                               ; preds = %2, %4, %7
  %.0 = phi i8 [ 0, %7 ], [ %5, %4 ], [ -1, %2 ]
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %3) #2
  ret i8 %.0
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !10, i64 0}
!9 = !{!"bmi3_gyr_dp_gain_offset", !10, i64 0, !10, i64 2, !10, i64 4, !6, i64 6, !6, i64 7, !6, i64 8}
!10 = !{!"short", !6, i64 0}
!11 = !{!9, !6, i64 6}
!12 = !{!9, !10, i64 2}
!13 = !{!9, !6, i64 7}
!14 = !{!9, !10, i64 4}
!15 = !{!9, !6, i64 8}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass