; LLVM IR from christo1030/ReaderWriter :: OS4 (writer)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%union.sem_t = type { i64, [24 x i8] }

@readCount = external dso_local global i32, align 4
@writeCount = external dso_local global i32, align 4
@requestWrite = external dso_local global i32, align 4
@sem = external dso_local global %union.sem_t, align 8
@.str.2 = external hidden unnamed_addr constant [41 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local ptr @writer(ptr noundef %0) #1 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  br label %4

4:                                                ; preds = %25, %1
  br label %5

5:                                                ; preds = %4
  store i32 1, ptr %3, align 4, !tbaa !9
  call void @databaseNonAccess()
  %6 = call i32 @sem_wait(ptr noundef @sem)
  %7 = load i32, ptr @readCount, align 4, !tbaa !9
  %8 = icmp eq i32 %7, 0
  br i1 %8, label %9, label %12

9:                                                ; preds = %5
  %10 = load i32, ptr @writeCount, align 4, !tbaa !9
  %11 = add nsw i32 %10, 1
  store i32 %11, ptr @writeCount, align 4, !tbaa !9
  br label %13

12:                                               ; preds = %5
  store i32 0, ptr %3, align 4, !tbaa !9
  store i32 1, ptr @requestWrite, align 4, !tbaa !9
  br label %13

13:                                               ; preds = %12, %9
  %14 = call i32 @sem_post(ptr noundef @sem) #4
  %15 = load i32, ptr %3, align 4, !tbaa !9
  %16 = icmp ne i32 %15, 0
  br i1 %16, label %17, label %25

17:                                               ; preds = %13
  call void @databaseAccess()
  %18 = load i32, ptr @readCount, align 4, !tbaa !9
  %19 = call i32 (ptr, ...) @printf(ptr noundef @.str.2, i32 noundef %18)
  %20 = call i32 @sleep(i32 noundef 1)
  %21 = call i32 @sem_wait(ptr noundef @sem)
  %22 = load i32, ptr @writeCount, align 4, !tbaa !9
  %23 = add nsw i32 %22, -1
  store i32 %23, ptr @writeCount, align 4, !tbaa !9
  store i32 0, ptr @requestWrite, align 4, !tbaa !9
  %24 = call i32 @sem_post(ptr noundef @sem) #4
  br label %25

25:                                               ; preds = %17, %13
  %26 = call i32 @sched_yield() #4
  br label %4
}

declare i32 @sem_wait(ptr noundef) #2

; Function Attrs: nounwind
declare i32 @sem_post(ptr noundef) #3

declare i32 @printf(ptr noundef, ...) #2

declare i32 @sleep(i32 noundef) #2

; Function Attrs: nounwind
declare i32 @sched_yield() #3

; Function Attrs: nounwind uwtable
declare dso_local void @databaseNonAccess() #1

; Function Attrs: nounwind uwtable
declare dso_local void @databaseAccess() #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%union.sem_t = type { i64, [24 x i8] }

@readCount = external dso_local local_unnamed_addr global i32, align 4
@writeCount = external dso_local local_unnamed_addr global i32, align 4
@requestWrite = external dso_local local_unnamed_addr global i32, align 4
@sem = external dso_local global %union.sem_t, align 8
@.str.2 = external hidden unnamed_addr constant [41 x i8], align 1

; Function Attrs: noreturn nounwind uwtable
define dso_local noalias noundef nonnull ptr @writer(ptr nocapture noundef readnone %0) local_unnamed_addr #0 {
  br label %2

2:                                                ; preds = %15, %1
  tail call void @databaseNonAccess()
  %3 = tail call i32 @sem_wait(ptr noundef nonnull @sem) #5
  %4 = load i32, ptr @readCount, align 4, !tbaa !5
  %.not = icmp eq i32 %4, 0
  br i1 %.not, label %5, label %15

5:                                                ; preds = %2
  %6 = load i32, ptr @writeCount, align 4, !tbaa !5
  %7 = add nsw i32 %6, 1
  store i32 %7, ptr @writeCount, align 4, !tbaa !5
  %8 = tail call i32 @sem_post(ptr noundef nonnull @sem) #5
  tail call void @databaseAccess()
  %9 = load i32, ptr @readCount, align 4, !tbaa !5
  %10 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.2, i32 noundef %9)
  %11 = tail call i32 @sleep(i32 noundef 1) #5
  %12 = tail call i32 @sem_wait(ptr noundef nonnull @sem) #5
  %13 = load i32, ptr @writeCount, align 4, !tbaa !5
  %14 = add nsw i32 %13, -1
  store i32 %14, ptr @writeCount, align 4, !tbaa !5
  br label %15

15:                                               ; preds = %2, %5
  %.sink = phi i32 [ 0, %5 ], [ 1, %2 ]
  store i32 %.sink, ptr @requestWrite, align 4, !tbaa !5
  %16 = tail call i32 @sem_post(ptr noundef nonnull @sem) #5
  %17 = tail call i32 @sched_yield() #5
  br label %2
}

declare i32 @sem_wait(ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind
declare i32 @sem_post(ptr noundef) local_unnamed_addr #2

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #3

declare i32 @sleep(i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind
declare i32 @sched_yield() local_unnamed_addr #2

; Function Attrs: nounwind uwtable
declare dso_local void @databaseNonAccess() local_unnamed_addr #4

; Function Attrs: nounwind uwtable
declare dso_local void @databaseAccess() local_unnamed_addr #4

attributes #0 = { noreturn nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass