; LLVM IR from VastoLorde95/Competitive-Programming :: CodeChef/LONG/JULY15/ADDMUL/A.ll (Z6updateiixiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.node = type { i64 }

@tree = external dso_local global [524288 x %struct.node], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4node7combineERS_S0_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z4upd1iiix(i32 noundef, i32 noundef, i32 noundef, i64 noundef) #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z4upd2iiix(i32 noundef, i32 noundef, i32 noundef, i64 noundef) #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z4upd3iiix(i32 noundef, i32 noundef, i32 noundef, i64 noundef) #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z5shiftiii(i32 noundef, i32 noundef, i32 noundef) #2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z6updateiixiiii(i32 noundef %0, i32 noundef %1, i64 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6) #2 {
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i64, align 8
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  store i32 %0, ptr %8, align 4, !tbaa !5
  store i32 %1, ptr %9, align 4, !tbaa !5
  store i64 %2, ptr %10, align 8, !tbaa !9
  store i32 %3, ptr %11, align 4, !tbaa !5
  store i32 %4, ptr %12, align 4, !tbaa !5
  store i32 %5, ptr %13, align 4, !tbaa !5
  store i32 %6, ptr %14, align 4, !tbaa !5
  %18 = load i32, ptr %8, align 4, !tbaa !5
  %19 = load i32, ptr %14, align 4, !tbaa !5
  %20 = icmp sge i32 %18, %19
  br i1 %20, label %25, label %21

21:                                               ; preds = %7
  %22 = load i32, ptr %13, align 4, !tbaa !5
  %23 = load i32, ptr %9, align 4, !tbaa !5
  %24 = icmp sge i32 %22, %23
  br i1 %24, label %25, label %26

25:                                               ; preds = %21, %7
  br label %96

26:                                               ; preds = %21
  %27 = load i32, ptr %8, align 4, !tbaa !5
  %28 = load i32, ptr %13, align 4, !tbaa !5
  %29 = icmp sle i32 %27, %28
  br i1 %29, label %30, label %61

30:                                               ; preds = %26
  %31 = load i32, ptr %14, align 4, !tbaa !5
  %32 = load i32, ptr %9, align 4, !tbaa !5
  %33 = icmp sle i32 %31, %32
  br i1 %33, label %34, label %61

34:                                               ; preds = %30
  %35 = load i32, ptr %11, align 4, !tbaa !5
  %36 = icmp eq i32 %35, 1
  br i1 %36, label %37, label %42

37:                                               ; preds = %34
  %38 = load i32, ptr %12, align 4, !tbaa !5
  %39 = load i32, ptr %13, align 4, !tbaa !5
  %40 = load i32, ptr %14, align 4, !tbaa !5
  %41 = load i64, ptr %10, align 8, !tbaa !9
  call void @_Z4upd1iiix(i32 noundef %38, i32 noundef %39, i32 noundef %40, i64 noundef %41)
  br label %60

42:                                               ; preds = %34
  %43 = load i32, ptr %11, align 4, !tbaa !5
  %44 = icmp eq i32 %43, 2
  br i1 %44, label %45, label %50

45:                                               ; preds = %42
  %46 = load i32, ptr %12, align 4, !tbaa !5
  %47 = load i32, ptr %13, align 4, !tbaa !5
  %48 = load i32, ptr %14, align 4, !tbaa !5
  %49 = load i64, ptr %10, align 8, !tbaa !9
  call void @_Z4upd2iiix(i32 noundef %46, i32 noundef %47, i32 noundef %48, i64 noundef %49)
  br label %59

50:                                               ; preds = %42
  %51 = load i32, ptr %11, align 4, !tbaa !5
  %52 = icmp eq i32 %51, 3
  br i1 %52, label %53, label %58

53:                                               ; preds = %50
  %54 = load i32, ptr %12, align 4, !tbaa !5
  %55 = load i32, ptr %13, align 4, !tbaa !5
  %56 = load i32, ptr %14, align 4, !tbaa !5
  %57 = load i64, ptr %10, align 8, !tbaa !9
  call void @_Z4upd3iiix(i32 noundef %54, i32 noundef %55, i32 noundef %56, i64 noundef %57)
  br label %58

58:                                               ; preds = %53, %50
  br label %59

59:                                               ; preds = %58, %45
  br label %60

60:                                               ; preds = %59, %37
  br label %96

61:                                               ; preds = %30, %26
  %62 = load i32, ptr %12, align 4, !tbaa !5
  %63 = load i32, ptr %13, align 4, !tbaa !5
  %64 = load i32, ptr %14, align 4, !tbaa !5
  call void @_Z5shiftiii(i32 noundef %62, i32 noundef %63, i32 noundef %64)
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  %65 = load i32, ptr %12, align 4, !tbaa !5
  %66 = shl i32 %65, 1
  store i32 %66, ptr %15, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #3
  %67 = load i32, ptr %15, align 4, !tbaa !5
  %68 = add nsw i32 %67, 1
  store i32 %68, ptr %16, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #3
  %69 = load i32, ptr %13, align 4, !tbaa !5
  %70 = load i32, ptr %14, align 4, !tbaa !5
  %71 = add nsw i32 %69, %70
  %72 = ashr i32 %71, 1
  store i32 %72, ptr %17, align 4, !tbaa !5
  %73 = load i32, ptr %8, align 4, !tbaa !5
  %74 = load i32, ptr %9, align 4, !tbaa !5
  %75 = load i64, ptr %10, align 8, !tbaa !9
  %76 = load i32, ptr %11, align 4, !tbaa !5
  %77 = load i32, ptr %15, align 4, !tbaa !5
  %78 = load i32, ptr %13, align 4, !tbaa !5
  %79 = load i32, ptr %17, align 4, !tbaa !5
  call void @_Z6updateiixiiii(i32 noundef %73, i32 noundef %74, i64 noundef %75, i32 noundef %76, i32 noundef %77, i32 noundef %78, i32 noundef %79)
  %80 = load i32, ptr %8, align 4, !tbaa !5
  %81 = load i32, ptr %9, align 4, !tbaa !5
  %82 = load i64, ptr %10, align 8, !tbaa !9
  %83 = load i32, ptr %11, align 4, !tbaa !5
  %84 = load i32, ptr %16, align 4, !tbaa !5
  %85 = load i32, ptr %17, align 4, !tbaa !5
  %86 = load i32, ptr %14, align 4, !tbaa !5
  call void @_Z6updateiixiiii(i32 noundef %80, i32 noundef %81, i64 noundef %82, i32 noundef %83, i32 noundef %84, i32 noundef %85, i32 noundef %86)
  %87 = load i32, ptr %12, align 4, !tbaa !5
  %88 = sext i32 %87 to i64
  %89 = getelementptr inbounds [524288 x %struct.node], ptr @tree, i64 0, i64 %88
  %90 = load i32, ptr %15, align 4, !tbaa !5
  %91 = sext i32 %90 to i64
  %92 = getelementptr inbounds [524288 x %struct.node], ptr @tree, i64 0, i64 %91
  %93 = load i32, ptr %16, align 4, !tbaa !5
  %94 = sext i32 %93 to i64
  %95 = getelementptr inbounds [524288 x %struct.node], ptr @tree, i64 0, i64 %94
  call void @_ZN4node7combineERS_S0_(ptr noundef nonnull align 8 dereferenceable(8) %89, ptr noundef nonnull align 8 dereferenceable(8) %92, ptr noundef nonnull align 8 dereferenceable(8) %95)
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  br label %96

96:                                               ; preds = %61, %60, %25
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.node = type { i64 }

@tree = external dso_local global [524288 x %struct.node], align 16

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4node7combineERS_S0_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z4upd1iiix(i32 noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z4upd2iiix(i32 noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z4upd3iiix(i32 noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z5shiftiii(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z6updateiixiiii(i32 noundef %0, i32 noundef %1, i64 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6) local_unnamed_addr #1 {
  %.not = icmp slt i32 %0, %6
  %.not51 = icmp slt i32 %5, %1
  %or.cond = and i1 %.not51, %.not
  br i1 %or.cond, label %8, label %common.ret55

8:                                                ; preds = %7
  %.not52 = icmp sgt i32 %0, %5
  %.not53 = icmp sgt i32 %6, %1
  %or.cond54 = or i1 %.not52, %.not53
  br i1 %or.cond54, label %13, label %9

9:                                                ; preds = %8
  switch i32 %3, label %common.ret55 [
    i32 1, label %10
    i32 2, label %11
    i32 3, label %12
  ]

10:                                               ; preds = %9
  tail call void @_Z4upd1iiix(i32 noundef %4, i32 noundef %5, i32 noundef %6, i64 noundef %2)
  br label %common.ret55

11:                                               ; preds = %9
  tail call void @_Z4upd2iiix(i32 noundef %4, i32 noundef %5, i32 noundef %6, i64 noundef %2)
  br label %common.ret55

12:                                               ; preds = %9
  tail call void @_Z4upd3iiix(i32 noundef %4, i32 noundef %5, i32 noundef %6, i64 noundef %2)
  br label %common.ret55

common.ret55:                                     ; preds = %9, %10, %12, %11, %7, %13
  ret void

13:                                               ; preds = %8
  tail call void @_Z5shiftiii(i32 noundef %4, i32 noundef %5, i32 noundef %6)
  %14 = shl i32 %4, 1
  %15 = or disjoint i32 %14, 1
  %16 = add nsw i32 %6, %5
  %17 = ashr i32 %16, 1
  tail call void @_Z6updateiixiiii(i32 noundef %0, i32 noundef %1, i64 noundef %2, i32 noundef %3, i32 noundef %14, i32 noundef %5, i32 noundef %17)
  tail call void @_Z6updateiixiiii(i32 noundef %0, i32 noundef %1, i64 noundef %2, i32 noundef %3, i32 noundef %15, i32 noundef %17, i32 noundef %6)
  %18 = sext i32 %4 to i64
  %19 = getelementptr inbounds [524288 x %struct.node], ptr @tree, i64 0, i64 %18
  %20 = sext i32 %14 to i64
  %21 = getelementptr inbounds [524288 x %struct.node], ptr @tree, i64 0, i64 %20
  %22 = sext i32 %15 to i64
  %23 = getelementptr inbounds [524288 x %struct.node], ptr @tree, i64 0, i64 %22
  tail call void @_ZN4node7combineERS_S0_(ptr noundef nonnull align 8 dereferenceable(8) %19, ptr noundef nonnull align 8 dereferenceable(8) %21, ptr noundef nonnull align 8 dereferenceable(8) %23)
  br label %common.ret55
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass