; LLVM IR from UtkarshPathrabe/Competitive-Coding :: Model Algorithms/Graphs (Find Number Of Islands)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::_Bit_reference" = type { ptr, i64 }

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z6isSafeRSt6vectorIS_IiSaIiEESaIS1_EERS_IS_IbSaIbEESaIS6_EEii(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24), i32 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(40) ptr @_ZNSt6vectorIS_IbSaIbEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3DFSRSt6vectorIS_IiSaIiEESaIS1_EERS_IS_IbSaIbEESaIS6_EEPiSA_ii(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef %2, ptr noundef %3, i32 noundef %4, i32 noundef %5) #0 {
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca %"struct.std::_Bit_reference", align 8
  %14 = alloca i32, align 4
  store ptr %0, ptr %7, align 8, !tbaa !5
  store ptr %1, ptr %8, align 8, !tbaa !5
  store ptr %2, ptr %9, align 8, !tbaa !5
  store ptr %3, ptr %10, align 8, !tbaa !5
  store i32 %4, ptr %11, align 4, !tbaa !9
  store i32 %5, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 16, ptr %13) #3
  %15 = load ptr, ptr %8, align 8, !tbaa !5
  %16 = load i32, ptr %11, align 4, !tbaa !9
  %17 = sext i32 %16 to i64
  %18 = call noundef nonnull align 8 dereferenceable(40) ptr @_ZNSt6vectorIS_IbSaIbEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %15, i64 noundef %17) #3
  %19 = load i32, ptr %12, align 4, !tbaa !9
  %20 = sext i32 %19 to i64
  %21 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %18, i64 noundef %20)
  %22 = getelementptr inbounds { ptr, i64 }, ptr %13, i32 0, i32 0
  %23 = extractvalue { ptr, i64 } %21, 0
  store ptr %23, ptr %22, align 8
  %24 = getelementptr inbounds { ptr, i64 }, ptr %13, i32 0, i32 1
  %25 = extractvalue { ptr, i64 } %21, 1
  store i64 %25, ptr %24, align 8
  %26 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16) %13, i1 noundef zeroext true) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr %13) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  store i32 0, ptr %14, align 4, !tbaa !9
  br label %27

27:                                               ; preds = %69, %6
  %28 = load i32, ptr %14, align 4, !tbaa !9
  %29 = icmp slt i32 %28, 8
  br i1 %29, label %31, label %30

30:                                               ; preds = %27
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  br label %72

31:                                               ; preds = %27
  %32 = load ptr, ptr %7, align 8, !tbaa !5
  %33 = load ptr, ptr %8, align 8, !tbaa !5
  %34 = load i32, ptr %11, align 4, !tbaa !9
  %35 = load ptr, ptr %9, align 8, !tbaa !5
  %36 = load i32, ptr %14, align 4, !tbaa !9
  %37 = sext i32 %36 to i64
  %38 = getelementptr inbounds i32, ptr %35, i64 %37
  %39 = load i32, ptr %38, align 4, !tbaa !9
  %40 = add nsw i32 %34, %39
  %41 = load i32, ptr %12, align 4, !tbaa !9
  %42 = load ptr, ptr %10, align 8, !tbaa !5
  %43 = load i32, ptr %14, align 4, !tbaa !9
  %44 = sext i32 %43 to i64
  %45 = getelementptr inbounds i32, ptr %42, i64 %44
  %46 = load i32, ptr %45, align 4, !tbaa !9
  %47 = add nsw i32 %41, %46
  %48 = call noundef zeroext i1 @_Z6isSafeRSt6vectorIS_IiSaIiEESaIS1_EERS_IS_IbSaIbEESaIS6_EEii(ptr noundef nonnull align 8 dereferenceable(24) %32, ptr noundef nonnull align 8 dereferenceable(24) %33, i32 noundef %40, i32 noundef %47)
  br i1 %48, label %49, label %68

49:                                               ; preds = %31
  %50 = load ptr, ptr %7, align 8, !tbaa !5
  %51 = load ptr, ptr %8, align 8, !tbaa !5
  %52 = load ptr, ptr %9, align 8, !tbaa !5
  %53 = load ptr, ptr %10, align 8, !tbaa !5
  %54 = load i32, ptr %11, align 4, !tbaa !9
  %55 = load ptr, ptr %9, align 8, !tbaa !5
  %56 = load i32, ptr %14, align 4, !tbaa !9
  %57 = sext i32 %56 to i64
  %58 = getelementptr inbounds i32, ptr %55, i64 %57
  %59 = load i32, ptr %58, align 4, !tbaa !9
  %60 = add nsw i32 %54, %59
  %61 = load i32, ptr %12, align 4, !tbaa !9
  %62 = load ptr, ptr %10, align 8, !tbaa !5
  %63 = load i32, ptr %14, align 4, !tbaa !9
  %64 = sext i32 %63 to i64
  %65 = getelementptr inbounds i32, ptr %62, i64 %64
  %66 = load i32, ptr %65, align 4, !tbaa !9
  %67 = add nsw i32 %61, %66
  call void @_Z3DFSRSt6vectorIS_IiSaIiEESaIS1_EERS_IS_IbSaIbEESaIS6_EEPiSA_ii(ptr noundef nonnull align 8 dereferenceable(24) %50, ptr noundef nonnull align 8 dereferenceable(24) %51, ptr noundef %52, ptr noundef %53, i32 noundef %60, i32 noundef %67)
  br label %68

68:                                               ; preds = %49, %31
  br label %69

69:                                               ; preds = %68
  %70 = load i32, ptr %14, align 4, !tbaa !9
  %71 = add nsw i32 %70, 1
  store i32 %71, ptr %14, align 4, !tbaa !9
  br label %27, !llvm.loop !11

72:                                               ; preds = %30
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16), i1 noundef zeroext) #2 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::_Bit_reference" = type { ptr, i64 }

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z6isSafeRSt6vectorIS_IiSaIiEESaIS1_EERS_IS_IbSaIbEESaIS6_EEii(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24), i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(40) ptr @_ZNSt6vectorIS_IbSaIbEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3DFSRSt6vectorIS_IiSaIiEESaIS1_EERS_IS_IbSaIbEESaIS6_EEPiSA_ii(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr nocapture noundef readonly %2, ptr nocapture noundef readonly %3, i32 noundef %4, i32 noundef %5) local_unnamed_addr #0 {
  %7 = alloca %"struct.std::_Bit_reference", align 8
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %7) #3
  %8 = sext i32 %4 to i64
  %9 = tail call noundef nonnull align 8 dereferenceable(40) ptr @_ZNSt6vectorIS_IbSaIbEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %8) #3
  %10 = sext i32 %5 to i64
  %11 = tail call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %9, i64 noundef %10)
  %12 = extractvalue { ptr, i64 } %11, 0
  store ptr %12, ptr %7, align 8
  %13 = getelementptr inbounds i8, ptr %7, i64 8
  %14 = extractvalue { ptr, i64 } %11, 1
  store i64 %14, ptr %13, align 8
  %15 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16) %7, i1 noundef zeroext true) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %7) #3
  %16 = load i32, ptr %2, align 4, !tbaa !5
  %17 = add nsw i32 %16, %4
  %18 = load i32, ptr %3, align 4, !tbaa !5
  %19 = add nsw i32 %18, %5
  %20 = call noundef zeroext i1 @_Z6isSafeRSt6vectorIS_IiSaIiEESaIS1_EERS_IS_IbSaIbEESaIS6_EEii(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %17, i32 noundef %19)
  br i1 %20, label %21, label %26

21:                                               ; preds = %6
  %22 = load i32, ptr %2, align 4, !tbaa !5
  %23 = add nsw i32 %22, %4
  %24 = load i32, ptr %3, align 4, !tbaa !5
  %25 = add nsw i32 %24, %5
  call void @_Z3DFSRSt6vectorIS_IiSaIiEESaIS1_EERS_IS_IbSaIbEESaIS6_EEPiSA_ii(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull %2, ptr noundef nonnull %3, i32 noundef %23, i32 noundef %25)
  br label %26

26:                                               ; preds = %6, %21
  %27 = getelementptr inbounds i8, ptr %2, i64 4
  %28 = load i32, ptr %27, align 4, !tbaa !5
  %29 = add nsw i32 %28, %4
  %30 = getelementptr inbounds i8, ptr %3, i64 4
  %31 = load i32, ptr %30, align 4, !tbaa !5
  %32 = add nsw i32 %31, %5
  %33 = call noundef zeroext i1 @_Z6isSafeRSt6vectorIS_IiSaIiEESaIS1_EERS_IS_IbSaIbEESaIS6_EEii(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %29, i32 noundef %32)
  br i1 %33, label %34, label %39

34:                                               ; preds = %26
  %35 = load i32, ptr %27, align 4, !tbaa !5
  %36 = add nsw i32 %35, %4
  %37 = load i32, ptr %30, align 4, !tbaa !5
  %38 = add nsw i32 %37, %5
  call void @_Z3DFSRSt6vectorIS_IiSaIiEESaIS1_EERS_IS_IbSaIbEESaIS6_EEPiSA_ii(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull %2, ptr noundef nonnull %3, i32 noundef %36, i32 noundef %38)
  br label %39

39:                                               ; preds = %34, %26
  %40 = getelementptr inbounds i8, ptr %2, i64 8
  %41 = load i32, ptr %40, align 4, !tbaa !5
  %42 = add nsw i32 %41, %4
  %43 = getelementptr inbounds i8, ptr %3, i64 8
  %44 = load i32, ptr %43, align 4, !tbaa !5
  %45 = add nsw i32 %44, %5
  %46 = call noundef zeroext i1 @_Z6isSafeRSt6vectorIS_IiSaIiEESaIS1_EERS_IS_IbSaIbEESaIS6_EEii(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %42, i32 noundef %45)
  br i1 %46, label %47, label %52

47:                                               ; preds = %39
  %48 = load i32, ptr %40, align 4, !tbaa !5
  %49 = add nsw i32 %48, %4
  %50 = load i32, ptr %43, align 4, !tbaa !5
  %51 = add nsw i32 %50, %5
  call void @_Z3DFSRSt6vectorIS_IiSaIiEESaIS1_EERS_IS_IbSaIbEESaIS6_EEPiSA_ii(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull %2, ptr noundef nonnull %3, i32 noundef %49, i32 noundef %51)
  br label %52

52:                                               ; preds = %47, %39
  %53 = getelementptr inbounds i8, ptr %2, i64 12
  %54 = load i32, ptr %53, align 4, !tbaa !5
  %55 = add nsw i32 %54, %4
  %56 = getelementptr inbounds i8, ptr %3, i64 12
  %57 = load i32, ptr %56, align 4, !tbaa !5
  %58 = add nsw i32 %57, %5
  %59 = call noundef zeroext i1 @_Z6isSafeRSt6vectorIS_IiSaIiEESaIS1_EERS_IS_IbSaIbEESaIS6_EEii(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %55, i32 noundef %58)
  br i1 %59, label %60, label %65

60:                                               ; preds = %52
  %61 = load i32, ptr %53, align 4, !tbaa !5
  %62 = add nsw i32 %61, %4
  %63 = load i32, ptr %56, align 4, !tbaa !5
  %64 = add nsw i32 %63, %5
  call void @_Z3DFSRSt6vectorIS_IiSaIiEESaIS1_EERS_IS_IbSaIbEESaIS6_EEPiSA_ii(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull %2, ptr noundef nonnull %3, i32 noundef %62, i32 noundef %64)
  br label %65

65:                                               ; preds = %60, %52
  %66 = getelementptr inbounds i8, ptr %2, i64 16
  %67 = load i32, ptr %66, align 4, !tbaa !5
  %68 = add nsw i32 %67, %4
  %69 = getelementptr inbounds i8, ptr %3, i64 16
  %70 = load i32, ptr %69, align 4, !tbaa !5
  %71 = add nsw i32 %70, %5
  %72 = call noundef zeroext i1 @_Z6isSafeRSt6vectorIS_IiSaIiEESaIS1_EERS_IS_IbSaIbEESaIS6_EEii(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %68, i32 noundef %71)
  br i1 %72, label %73, label %78

73:                                               ; preds = %65
  %74 = load i32, ptr %66, align 4, !tbaa !5
  %75 = add nsw i32 %74, %4
  %76 = load i32, ptr %69, align 4, !tbaa !5
  %77 = add nsw i32 %76, %5
  call void @_Z3DFSRSt6vectorIS_IiSaIiEESaIS1_EERS_IS_IbSaIbEESaIS6_EEPiSA_ii(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull %2, ptr noundef nonnull %3, i32 noundef %75, i32 noundef %77)
  br label %78

78:                                               ; preds = %73, %65
  %79 = getelementptr inbounds i8, ptr %2, i64 20
  %80 = load i32, ptr %79, align 4, !tbaa !5
  %81 = add nsw i32 %80, %4
  %82 = getelementptr inbounds i8, ptr %3, i64 20
  %83 = load i32, ptr %82, align 4, !tbaa !5
  %84 = add nsw i32 %83, %5
  %85 = call noundef zeroext i1 @_Z6isSafeRSt6vectorIS_IiSaIiEESaIS1_EERS_IS_IbSaIbEESaIS6_EEii(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %81, i32 noundef %84)
  br i1 %85, label %86, label %91

86:                                               ; preds = %78
  %87 = load i32, ptr %79, align 4, !tbaa !5
  %88 = add nsw i32 %87, %4
  %89 = load i32, ptr %82, align 4, !tbaa !5
  %90 = add nsw i32 %89, %5
  call void @_Z3DFSRSt6vectorIS_IiSaIiEESaIS1_EERS_IS_IbSaIbEESaIS6_EEPiSA_ii(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull %2, ptr noundef nonnull %3, i32 noundef %88, i32 noundef %90)
  br label %91

91:                                               ; preds = %86, %78
  %92 = getelementptr inbounds i8, ptr %2, i64 24
  %93 = load i32, ptr %92, align 4, !tbaa !5
  %94 = add nsw i32 %93, %4
  %95 = getelementptr inbounds i8, ptr %3, i64 24
  %96 = load i32, ptr %95, align 4, !tbaa !5
  %97 = add nsw i32 %96, %5
  %98 = call noundef zeroext i1 @_Z6isSafeRSt6vectorIS_IiSaIiEESaIS1_EERS_IS_IbSaIbEESaIS6_EEii(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %94, i32 noundef %97)
  br i1 %98, label %99, label %104

99:                                               ; preds = %91
  %100 = load i32, ptr %92, align 4, !tbaa !5
  %101 = add nsw i32 %100, %4
  %102 = load i32, ptr %95, align 4, !tbaa !5
  %103 = add nsw i32 %102, %5
  call void @_Z3DFSRSt6vectorIS_IiSaIiEESaIS1_EERS_IS_IbSaIbEESaIS6_EEPiSA_ii(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull %2, ptr noundef nonnull %3, i32 noundef %101, i32 noundef %103)
  br label %104

104:                                              ; preds = %99, %91
  %105 = getelementptr inbounds i8, ptr %2, i64 28
  %106 = load i32, ptr %105, align 4, !tbaa !5
  %107 = add nsw i32 %106, %4
  %108 = getelementptr inbounds i8, ptr %3, i64 28
  %109 = load i32, ptr %108, align 4, !tbaa !5
  %110 = add nsw i32 %109, %5
  %111 = call noundef zeroext i1 @_Z6isSafeRSt6vectorIS_IiSaIiEESaIS1_EERS_IS_IbSaIbEESaIS6_EEii(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %107, i32 noundef %110)
  br i1 %111, label %112, label %117

112:                                              ; preds = %104
  %113 = load i32, ptr %105, align 4, !tbaa !5
  %114 = add nsw i32 %113, %4
  %115 = load i32, ptr %108, align 4, !tbaa !5
  %116 = add nsw i32 %115, %5
  call void @_Z3DFSRSt6vectorIS_IiSaIiEESaIS1_EERS_IS_IbSaIbEESaIS6_EEPiSA_ii(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull %2, ptr noundef nonnull %3, i32 noundef %114, i32 noundef %116)
  br label %117

117:                                              ; preds = %112, %104
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16), i1 noundef zeroext) local_unnamed_addr #2 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LoopRotatePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass