; LLVM IR from VastoLorde95/Competitive-Programming :: Codeforces/298 Division 2/Problem B (B)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }

@v1 = external dso_local global i32, align 4
@v2 = external dso_local global i32, align 4
@t = external dso_local global i32, align 4
@d = external dso_local global i32, align 4
@res = external dso_local global i32, align 4
@v = external dso_local global i32, align 4
@.str = external hidden unnamed_addr constant [5 x i8], align 1
@_ZSt4cout = external global %"class.std::basic_ostream", align 8

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  %4 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef @v1, ptr noundef @v2)
  %5 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef @t, ptr noundef @d)
  %6 = load i32, ptr @v1, align 4, !tbaa !5
  store i32 %6, ptr @v, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #6
  store i32 1, ptr %2, align 4, !tbaa !5
  br label %7

7:                                                ; preds = %104, %0
  %8 = load i32, ptr %2, align 4, !tbaa !5
  %9 = load i32, ptr @t, align 4, !tbaa !5
  %10 = icmp slt i32 %8, %9
  br i1 %10, label %12, label %11

11:                                               ; preds = %7
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #6
  br label %107

12:                                               ; preds = %7
  %13 = load i32, ptr @v, align 4, !tbaa !5
  %14 = load i32, ptr @res, align 4, !tbaa !5
  %15 = add nsw i32 %14, %13
  store i32 %15, ptr @res, align 4, !tbaa !5
  %16 = load i32, ptr @v, align 4, !tbaa !5
  %17 = add nsw i32 %16, 1
  %18 = load i32, ptr @v2, align 4, !tbaa !5
  %19 = sub nsw i32 %17, %18
  %20 = sitofp i32 %19 to double
  %21 = load i32, ptr @t, align 4, !tbaa !5
  %22 = load i32, ptr %2, align 4, !tbaa !5
  %23 = add nsw i32 %22, 1
  %24 = sub nsw i32 %21, %23
  %25 = sitofp i32 %24 to double
  %26 = fdiv double %20, %25
  %27 = call double @llvm.ceil.f64(double %26)
  %28 = fptosi double %27 to i32
  %29 = load i32, ptr @d, align 4, !tbaa !5
  %30 = icmp sle i32 %28, %29
  br i1 %30, label %31, label %60

31:                                               ; preds = %12
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #6
  store i32 0, ptr %3, align 4, !tbaa !5
  br label %32

32:                                               ; preds = %54, %31
  %33 = load i32, ptr %3, align 4, !tbaa !5
  %34 = load i32, ptr @d, align 4, !tbaa !5
  %35 = icmp slt i32 %33, %34
  br i1 %35, label %36, label %52

36:                                               ; preds = %32
  %37 = load i32, ptr @v, align 4, !tbaa !5
  %38 = add nsw i32 %37, 1
  %39 = load i32, ptr @v2, align 4, !tbaa !5
  %40 = sub nsw i32 %38, %39
  %41 = sitofp i32 %40 to double
  %42 = load i32, ptr @t, align 4, !tbaa !5
  %43 = load i32, ptr %2, align 4, !tbaa !5
  %44 = add nsw i32 %43, 1
  %45 = sub nsw i32 %42, %44
  %46 = sitofp i32 %45 to double
  %47 = fdiv double %41, %46
  %48 = call double @llvm.ceil.f64(double %47)
  %49 = fptosi double %48 to i32
  %50 = load i32, ptr @d, align 4, !tbaa !5
  %51 = icmp sle i32 %49, %50
  br label %52

52:                                               ; preds = %36, %32
  %53 = phi i1 [ false, %32 ], [ %51, %36 ]
  br i1 %53, label %54, label %59

54:                                               ; preds = %52
  %55 = load i32, ptr @v, align 4, !tbaa !5
  %56 = add nsw i32 %55, 1
  store i32 %56, ptr @v, align 4, !tbaa !5
  %57 = load i32, ptr %3, align 4, !tbaa !5
  %58 = add nsw i32 %57, 1
  store i32 %58, ptr %3, align 4, !tbaa !5
  br label %32, !llvm.loop !9

59:                                               ; preds = %52
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #6
  br label %103

60:                                               ; preds = %12
  %61 = load i32, ptr @v, align 4, !tbaa !5
  %62 = load i32, ptr @v2, align 4, !tbaa !5
  %63 = sub nsw i32 %61, %62
  %64 = sitofp i32 %63 to double
  %65 = load i32, ptr @t, align 4, !tbaa !5
  %66 = load i32, ptr %2, align 4, !tbaa !5
  %67 = add nsw i32 %66, 1
  %68 = sub nsw i32 %65, %67
  %69 = sitofp i32 %68 to double
  %70 = fdiv double %64, %69
  %71 = call double @llvm.ceil.f64(double %70)
  %72 = fptosi double %71 to i32
  %73 = load i32, ptr @d, align 4, !tbaa !5
  %74 = icmp sle i32 %72, %73
  br i1 %74, label %75, label %76

75:                                               ; preds = %60
  br label %104

76:                                               ; preds = %60
  br label %77

77:                                               ; preds = %98, %76
  %78 = load i32, ptr @v, align 4, !tbaa !5
  %79 = load i32, ptr @v2, align 4, !tbaa !5
  %80 = sub nsw i32 %78, %79
  %81 = sitofp i32 %80 to double
  %82 = load i32, ptr @t, align 4, !tbaa !5
  %83 = load i32, ptr %2, align 4, !tbaa !5
  %84 = add nsw i32 %83, 1
  %85 = sub nsw i32 %82, %84
  %86 = sitofp i32 %85 to double
  %87 = fdiv double %81, %86
  %88 = call double @llvm.ceil.f64(double %87)
  %89 = fptosi double %88 to i32
  %90 = load i32, ptr @d, align 4, !tbaa !5
  %91 = icmp sgt i32 %89, %90
  br i1 %91, label %92, label %96

92:                                               ; preds = %77
  %93 = load i32, ptr @v, align 4, !tbaa !5
  %94 = load i32, ptr @v2, align 4, !tbaa !5
  %95 = icmp sge i32 %93, %94
  br label %96

96:                                               ; preds = %92, %77
  %97 = phi i1 [ false, %77 ], [ %95, %92 ]
  br i1 %97, label %98, label %101

98:                                               ; preds = %96
  %99 = load i32, ptr @v, align 4, !tbaa !5
  %100 = add nsw i32 %99, -1
  store i32 %100, ptr @v, align 4, !tbaa !5
  br label %77, !llvm.loop !11

101:                                              ; preds = %96
  br label %102

102:                                              ; preds = %101
  br label %103

103:                                              ; preds = %102, %59
  br label %104

104:                                              ; preds = %103, %75
  %105 = load i32, ptr %2, align 4, !tbaa !5
  %106 = add nsw i32 %105, 1
  store i32 %106, ptr %2, align 4, !tbaa !5
  br label %7, !llvm.loop !12

107:                                              ; preds = %11
  %108 = load i32, ptr @v2, align 4, !tbaa !5
  %109 = load i32, ptr @res, align 4, !tbaa !5
  %110 = add nsw i32 %109, %108
  store i32 %110, ptr @res, align 4, !tbaa !5
  %111 = load i32, ptr @res, align 4, !tbaa !5
  %112 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i32 noundef %111)
  %113 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %112, ptr noundef @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  ret i32 0
}

declare i32 @__isoc99_scanf(ptr noundef, ...) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.ceil.f64(double) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8), i32 noundef) #1

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) #4 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(8)) #5

attributes #0 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }

@v1 = external dso_local global i32, align 4
@v2 = external dso_local global i32, align 4
@t = external dso_local global i32, align 4
@d = external dso_local global i32, align 4
@res = external dso_local local_unnamed_addr global i32, align 4
@v = external dso_local local_unnamed_addr global i32, align 4
@.str = external hidden unnamed_addr constant [5 x i8], align 1
@_ZSt4cout = external global %"class.std::basic_ostream", align 8

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() local_unnamed_addr #0 {
  %1 = tail call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull @v1, ptr noundef nonnull @v2)
  %2 = tail call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull @t, ptr noundef nonnull @d)
  %3 = load i32, ptr @v1, align 4, !tbaa !5
  store i32 %3, ptr @v, align 4, !tbaa !5
  %4 = load i32, ptr @t, align 4, !tbaa !5
  %5 = icmp sgt i32 %4, 1
  %.pre = load i32, ptr @v2, align 4
  %res.promoted = load i32, ptr @res, align 4, !tbaa !5
  br i1 %5, label %.lr.ph31, label %._crit_edge

.lr.ph31:                                         ; preds = %0
  %6 = load i32, ptr @d, align 4, !tbaa !5
  %7 = icmp sgt i32 %6, 0
  br label %12

._crit_edge:                                      ; preds = %.critedge, %0
  %8 = phi i32 [ %res.promoted, %0 ], [ %14, %.critedge ]
  %9 = add nsw i32 %8, %.pre
  store i32 %9, ptr @res, align 4, !tbaa !5
  %10 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i32 noundef %9)
  %11 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %10, ptr noundef nonnull @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  ret i32 0

12:                                               ; preds = %.lr.ph31, %.critedge
  %.0830 = phi i32 [ 1, %.lr.ph31 ], [ %18, %.critedge ]
  %.lcssa2529 = phi i32 [ %3, %.lr.ph31 ], [ %.lcssa21, %.critedge ]
  %13 = phi i32 [ %res.promoted, %.lr.ph31 ], [ %14, %.critedge ]
  %14 = add nsw i32 %13, %.lcssa2529
  %15 = add nsw i32 %.lcssa2529, 1
  %16 = sub i32 %15, %.pre
  %17 = sitofp i32 %16 to double
  %18 = add nuw nsw i32 %.0830, 1
  %19 = sub nsw i32 %4, %18
  %20 = sitofp i32 %19 to double
  %21 = fdiv double %17, %20
  %22 = tail call double @llvm.ceil.f64(double %21)
  %23 = fptosi double %22 to i32
  %.not = icmp slt i32 %6, %23
  br i1 %.not, label %32, label %.preheader14

.preheader14:                                     ; preds = %12
  br i1 %7, label %.lr.ph, label %.critedge

.lr.ph:                                           ; preds = %.preheader14, %30
  %.lcssa23 = phi i32 [ %24, %30 ], [ %.lcssa2529, %.preheader14 ]
  %.016 = phi i32 [ %31, %30 ], [ 0, %.preheader14 ]
  %24 = add nsw i32 %.lcssa23, 1
  %25 = sub nsw i32 %24, %.pre
  %26 = sitofp i32 %25 to double
  %27 = fdiv double %26, %20
  %28 = tail call double @llvm.ceil.f64(double %27)
  %29 = fptosi double %28 to i32
  %.not13 = icmp slt i32 %6, %29
  br i1 %.not13, label %.critedge, label %30

30:                                               ; preds = %.lr.ph
  store i32 %24, ptr @v, align 4, !tbaa !5
  %31 = add nuw nsw i32 %.016, 1
  %exitcond.not = icmp eq i32 %31, %6
  br i1 %exitcond.not, label %.critedge, label %.lr.ph, !llvm.loop !9

32:                                               ; preds = %12
  %33 = sub nsw i32 %.lcssa2529, %.pre
  %34 = sitofp i32 %33 to double
  %35 = fdiv double %34, %20
  %36 = tail call double @llvm.ceil.f64(double %35)
  %37 = fptosi double %36 to i32
  %.not12 = icmp sge i32 %6, %37
  %.not37 = icmp slt i32 %.lcssa2529, %.pre
  %or.cond = select i1 %.not12, i1 true, i1 %.not37
  br i1 %or.cond, label %.critedge, label %.lr.ph19

.lr.ph19:                                         ; preds = %32, %.lr.ph19
  %38 = phi i32 [ %39, %.lr.ph19 ], [ %.lcssa2529, %32 ]
  %39 = add nsw i32 %38, -1
  %40 = sub nsw i32 %39, %.pre
  %41 = sitofp i32 %40 to double
  %42 = fdiv double %41, %20
  %43 = tail call double @llvm.ceil.f64(double %42)
  %44 = fptosi double %43 to i32
  %45 = icmp slt i32 %6, %44
  %46 = icmp sgt i32 %38, %.pre
  %47 = select i1 %45, i1 %46, i1 false
  br i1 %47, label %.lr.ph19, label %..critedge.loopexit_crit_edge, !llvm.loop !11

..critedge.loopexit_crit_edge:                    ; preds = %.lr.ph19
  store i32 %39, ptr @v, align 4, !tbaa !5
  br label %.critedge

.critedge:                                        ; preds = %30, %.lr.ph, %.preheader14, %..critedge.loopexit_crit_edge, %32
  %.lcssa21 = phi i32 [ %.lcssa2529, %32 ], [ %39, %..critedge.loopexit_crit_edge ], [ %.lcssa2529, %.preheader14 ], [ %24, %30 ], [ %.lcssa23, %.lr.ph ]
  %exitcond34.not = icmp eq i32 %18, %4
  br i1 %exitcond34.not, label %._crit_edge, label %12, !llvm.loop !12
}

; Function Attrs: nofree nounwind
declare noundef i32 @__isoc99_scanf(ptr nocapture noundef readonly, ...) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.ceil.f64(double) #2

declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8), i32 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) local_unnamed_addr #4 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(8)) #5

attributes #0 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Effective O3 passes: DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass