; LLVM IR from IOsonata/IOsonata :: src/bluetooth (bt_adv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__Bt_Uuid_Array = type <{ i8, i32, %union.anon }>
%union.anon = type { [1 x i32], [12 x i8] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local zeroext i1 @BtAdvDataAdd(ptr noundef, i8 noundef zeroext, ptr noundef, i32 noundef) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: mustprogress uwtable
define dso_local zeroext i1 @BtAdvDataAddUuid(ptr noundef %0, ptr noundef %1, i1 noundef zeroext %2) #1 {
  %4 = alloca i1, align 1
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i8, align 1
  %8 = alloca i32, align 4
  %9 = alloca i8, align 1
  %10 = alloca i8, align 1
  %11 = alloca ptr, align 8
  %12 = alloca i64, align 8
  %13 = alloca [16 x i8], align 16
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  %16 = zext i1 %2 to i8
  store i8 %16, ptr %7, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #5
  store i32 0, ptr %8, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #5
  store i8 0, ptr %9, align 1, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 1, ptr %10) #5
  %17 = load ptr, ptr %6, align 8, !tbaa !5
  %18 = getelementptr inbounds %struct.__Bt_Uuid_Array, ptr %17, i32 0, i32 1
  %19 = load i32, ptr %18, align 1, !tbaa !14
  %20 = zext i32 %19 to i64
  %21 = call ptr @llvm.stacksave.p0()
  store ptr %21, ptr %11, align 8
  %22 = alloca [16 x i8], i64 %20, align 16
  store i64 %20, ptr %12, align 8
  %23 = load ptr, ptr %6, align 8, !tbaa !5
  %24 = load i8, ptr %23, align 1
  %25 = and i8 %24, 63
  %26 = zext i8 %25 to i32
  %27 = icmp sgt i32 %26, 0
  br i1 %27, label %28, label %85

28:                                               ; preds = %3
  call void @llvm.lifetime.start.p0(i64 16, ptr %13) #5
  %29 = load ptr, ptr %6, align 8, !tbaa !5
  %30 = load i8, ptr %29, align 1
  %31 = and i8 %30, 63
  %32 = zext i8 %31 to i32
  %33 = getelementptr inbounds [16 x i8], ptr %13, i64 0, i64 0
  %34 = call zeroext i1 @BtUuidGetBase(i32 noundef %32, ptr noundef %33)
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #5
  store i32 0, ptr %14, align 4, !tbaa !11
  br label %35

35:                                               ; preds = %68, %28
  %36 = load i32, ptr %14, align 4, !tbaa !11
  %37 = load ptr, ptr %6, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.__Bt_Uuid_Array, ptr %37, i32 0, i32 1
  %39 = load i32, ptr %38, align 1, !tbaa !14
  %40 = icmp slt i32 %36, %39
  br i1 %40, label %42, label %41

41:                                               ; preds = %35
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #5
  br label %71

42:                                               ; preds = %35
  %43 = load ptr, ptr %6, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.__Bt_Uuid_Array, ptr %43, i32 0, i32 2
  %45 = load i32, ptr %14, align 4, !tbaa !11
  %46 = sext i32 %45 to i64
  %47 = getelementptr inbounds [1 x i16], ptr %44, i64 0, i64 %46
  %48 = load i16, ptr %47, align 1, !tbaa !13
  %49 = zext i16 %48 to i32
  %50 = and i32 %49, 255
  %51 = trunc i32 %50 to i8
  %52 = getelementptr inbounds [16 x i8], ptr %13, i64 0, i64 12
  store i8 %51, ptr %52, align 4, !tbaa !13
  %53 = load ptr, ptr %6, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.__Bt_Uuid_Array, ptr %53, i32 0, i32 2
  %55 = load i32, ptr %14, align 4, !tbaa !11
  %56 = sext i32 %55 to i64
  %57 = getelementptr inbounds [1 x i16], ptr %54, i64 0, i64 %56
  %58 = load i16, ptr %57, align 1, !tbaa !13
  %59 = zext i16 %58 to i32
  %60 = ashr i32 %59, 8
  %61 = trunc i32 %60 to i8
  %62 = getelementptr inbounds [16 x i8], ptr %13, i64 0, i64 13
  store i8 %61, ptr %62, align 1, !tbaa !13
  %63 = load i32, ptr %14, align 4, !tbaa !11
  %64 = sext i32 %63 to i64
  %65 = getelementptr inbounds [16 x i8], ptr %22, i64 %64
  %66 = getelementptr inbounds [16 x i8], ptr %65, i64 0, i64 0
  %67 = getelementptr inbounds [16 x i8], ptr %13, i64 0, i64 0
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %66, ptr align 16 %67, i64 16, i1 false)
  br label %68

68:                                               ; preds = %42
  %69 = load i32, ptr %14, align 4, !tbaa !11
  %70 = add nsw i32 %69, 1
  store i32 %70, ptr %14, align 4, !tbaa !11
  br label %35, !llvm.loop !17

71:                                               ; preds = %41
  %72 = load ptr, ptr %6, align 8, !tbaa !5
  %73 = getelementptr inbounds %struct.__Bt_Uuid_Array, ptr %72, i32 0, i32 1
  %74 = load i32, ptr %73, align 1, !tbaa !14
  %75 = mul nsw i32 16, %74
  store i32 %75, ptr %8, align 4, !tbaa !11
  %76 = load i8, ptr %7, align 1, !tbaa !9, !range !19, !noundef !20
  %77 = trunc i8 %76 to i1
  %78 = zext i1 %77 to i64
  %79 = select i1 %77, i32 7, i32 6
  %80 = trunc i32 %79 to i8
  store i8 %80, ptr %9, align 1, !tbaa !13
  %81 = load ptr, ptr %5, align 8, !tbaa !5
  %82 = load i8, ptr %9, align 1, !tbaa !13
  %83 = load i32, ptr %8, align 4, !tbaa !11
  %84 = call zeroext i1 @BtAdvDataAdd(ptr noundef %81, i8 noundef zeroext %82, ptr noundef %22, i32 noundef %83)
  store i1 %84, ptr %4, align 1
  store i32 1, ptr %15, align 4
  call void @llvm.lifetime.end.p0(i64 16, ptr %13) #5
  br label %130

85:                                               ; preds = %3
  %86 = load ptr, ptr %6, align 8, !tbaa !5
  %87 = load i8, ptr %86, align 1
  %88 = lshr i8 %87, 6
  %89 = zext i8 %88 to i32
  switch i32 %89, label %120 [
    i32 0, label %90
    i32 1, label %100
    i32 2, label %110
  ]

90:                                               ; preds = %85
  %91 = load i8, ptr %7, align 1, !tbaa !9, !range !19, !noundef !20
  %92 = trunc i8 %91 to i1
  %93 = zext i1 %92 to i64
  %94 = select i1 %92, i32 3, i32 2
  %95 = trunc i32 %94 to i8
  store i8 %95, ptr %9, align 1, !tbaa !13
  %96 = load ptr, ptr %6, align 8, !tbaa !5
  %97 = getelementptr inbounds %struct.__Bt_Uuid_Array, ptr %96, i32 0, i32 1
  %98 = load i32, ptr %97, align 1, !tbaa !14
  %99 = mul nsw i32 %98, 2
  store i32 %99, ptr %8, align 4, !tbaa !11
  br label %121

100:                                              ; preds = %85
  %101 = load i8, ptr %7, align 1, !tbaa !9, !range !19, !noundef !20
  %102 = trunc i8 %101 to i1
  %103 = zext i1 %102 to i64
  %104 = select i1 %102, i32 5, i32 4
  %105 = trunc i32 %104 to i8
  store i8 %105, ptr %9, align 1, !tbaa !13
  %106 = load ptr, ptr %6, align 8, !tbaa !5
  %107 = getelementptr inbounds %struct.__Bt_Uuid_Array, ptr %106, i32 0, i32 1
  %108 = load i32, ptr %107, align 1, !tbaa !14
  %109 = mul nsw i32 %108, 4
  store i32 %109, ptr %8, align 4, !tbaa !11
  br label %121

110:                                              ; preds = %85
  %111 = load i8, ptr %7, align 1, !tbaa !9, !range !19, !noundef !20
  %112 = trunc i8 %111 to i1
  %113 = zext i1 %112 to i64
  %114 = select i1 %112, i32 7, i32 6
  %115 = trunc i32 %114 to i8
  store i8 %115, ptr %9, align 1, !tbaa !13
  %116 = load ptr, ptr %6, align 8, !tbaa !5
  %117 = getelementptr inbounds %struct.__Bt_Uuid_Array, ptr %116, i32 0, i32 1
  %118 = load i32, ptr %117, align 1, !tbaa !14
  %119 = mul nsw i32 %118, 16
  store i32 %119, ptr %8, align 4, !tbaa !11
  br label %121

120:                                              ; preds = %85
  store i8 0, ptr %10, align 1, !tbaa !9
  br label %121

121:                                              ; preds = %120, %110, %100, %90
  br label %122

122:                                              ; preds = %121
  %123 = load ptr, ptr %5, align 8, !tbaa !5
  %124 = load i8, ptr %9, align 1, !tbaa !13
  %125 = load ptr, ptr %6, align 8, !tbaa !5
  %126 = getelementptr inbounds %struct.__Bt_Uuid_Array, ptr %125, i32 0, i32 2
  %127 = getelementptr inbounds [1 x i16], ptr %126, i64 0, i64 0
  %128 = load i32, ptr %8, align 4, !tbaa !11
  %129 = call zeroext i1 @BtAdvDataAdd(ptr noundef %123, i8 noundef zeroext %124, ptr noundef %127, i32 noundef %128)
  store i1 %129, ptr %4, align 1
  store i32 1, ptr %15, align 4
  br label %130

130:                                              ; preds = %122, %71
  %131 = load ptr, ptr %11, align 8
  call void @llvm.stackrestore.p0(ptr %131)
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #5
  %132 = load i1, ptr %4, align 1
  ret i1 %132
}

; Function Attrs: nocallback nofree nosync nounwind willreturn
declare ptr @llvm.stacksave.p0() #3

declare zeroext i1 @BtUuidGetBase(i32 noundef, ptr noundef) #4

; Function Attrs: nocallback nofree nosync nounwind willreturn
declare void @llvm.stackrestore.p0(ptr) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nocallback nofree nosync nounwind willreturn }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = !{!15, !12, i64 1}
!15 = !{!"_ZTS15__Bt_Uuid_Array", !7, i64 0, !16, i64 0, !12, i64 1, !7, i64 5}
!16 = !{!"_ZTS14__Bt_Uuid_Type", !7, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = !{i8 0, i8 2}
!20 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local zeroext i1 @BtAdvDataAdd(ptr noundef, i8 noundef zeroext, ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: mustprogress uwtable
define dso_local zeroext i1 @BtAdvDataAddUuid(ptr noundef %0, ptr noundef %1, i1 noundef zeroext %2) local_unnamed_addr #1 {
  %4 = alloca [16 x i8], align 16
  %5 = getelementptr inbounds i8, ptr %1, i64 1
  %6 = load i32, ptr %5, align 1, !tbaa !5
  %7 = zext i32 %6 to i64
  %8 = alloca [16 x i8], i64 %7, align 16
  %9 = load i8, ptr %1, align 1
  %10 = and i8 %9, 63
  %.not = icmp eq i8 %10, 0
  br i1 %.not, label %42, label %11

11:                                               ; preds = %3
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #4
  %12 = zext nneg i8 %10 to i32
  %13 = call zeroext i1 @BtUuidGetBase(i32 noundef %12, ptr noundef nonnull %4)
  %14 = load i32, ptr %5, align 1, !tbaa !5
  %15 = icmp sgt i32 %14, 0
  br i1 %15, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %11
  %16 = getelementptr inbounds i8, ptr %1, i64 5
  %17 = getelementptr inbounds i8, ptr %4, i64 12
  %18 = getelementptr inbounds i8, ptr %4, i64 13
  %wide.trip.count = zext nneg i32 %14 to i64
  %xtraiter = and i64 %wide.trip.count, 1
  %19 = icmp eq i32 %14, 1
  br i1 %19, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph.new

.lr.ph.new:                                       ; preds = %.lr.ph
  %unroll_iter = and i64 %wide.trip.count, 2147483646
  br label %29

._crit_edge.loopexit.unr-lcssa:                   ; preds = %29, %.lr.ph
  %indvars.iv.unr = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next.1, %29 ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge, label %._crit_edge.loopexit.epilog-lcssa

._crit_edge.loopexit.epilog-lcssa:                ; preds = %._crit_edge.loopexit.unr-lcssa
  %20 = getelementptr inbounds [1 x i16], ptr %16, i64 0, i64 %indvars.iv.unr
  %21 = load i16, ptr %20, align 1, !tbaa !11
  %22 = trunc i16 %21 to i8
  store i8 %22, ptr %17, align 4, !tbaa !11
  %23 = lshr i16 %21, 8
  %24 = trunc nuw i16 %23 to i8
  store i8 %24, ptr %18, align 1, !tbaa !11
  %25 = getelementptr inbounds [16 x i8], ptr %8, i64 %indvars.iv.unr
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(16) %25, ptr noundef nonnull align 16 dereferenceable(16) %4, i64 16, i1 false)
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit.epilog-lcssa, %._crit_edge.loopexit.unr-lcssa, %11
  %26 = shl nsw i32 %14, 4
  %27 = select i1 %2, i8 7, i8 6
  %28 = call zeroext i1 @BtAdvDataAdd(ptr noundef %0, i8 noundef zeroext %27, ptr noundef nonnull %8, i32 noundef %26)
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #4
  br label %56

29:                                               ; preds = %29, %.lr.ph.new
  %indvars.iv = phi i64 [ 0, %.lr.ph.new ], [ %indvars.iv.next.1, %29 ]
  %niter = phi i64 [ 0, %.lr.ph.new ], [ %niter.next.1, %29 ]
  %30 = getelementptr inbounds [1 x i16], ptr %16, i64 0, i64 %indvars.iv
  %31 = load i16, ptr %30, align 1, !tbaa !11
  %32 = trunc i16 %31 to i8
  store i8 %32, ptr %17, align 4, !tbaa !11
  %33 = lshr i16 %31, 8
  %34 = trunc nuw i16 %33 to i8
  store i8 %34, ptr %18, align 1, !tbaa !11
  %35 = getelementptr inbounds [16 x i8], ptr %8, i64 %indvars.iv
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(16) %35, ptr noundef nonnull align 16 dereferenceable(16) %4, i64 16, i1 false)
  %indvars.iv.next = or disjoint i64 %indvars.iv, 1
  %36 = getelementptr inbounds [1 x i16], ptr %16, i64 0, i64 %indvars.iv.next
  %37 = load i16, ptr %36, align 1, !tbaa !11
  %38 = trunc i16 %37 to i8
  store i8 %38, ptr %17, align 4, !tbaa !11
  %39 = lshr i16 %37, 8
  %40 = trunc nuw i16 %39 to i8
  store i8 %40, ptr %18, align 1, !tbaa !11
  %41 = getelementptr inbounds [16 x i8], ptr %8, i64 %indvars.iv.next
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(16) %41, ptr noundef nonnull align 16 dereferenceable(16) %4, i64 16, i1 false)
  %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2
  %niter.next.1 = add i64 %niter, 2
  %niter.ncmp.1 = icmp eq i64 %niter.next.1, %unroll_iter
  br i1 %niter.ncmp.1, label %._crit_edge.loopexit.unr-lcssa, label %29, !llvm.loop !12

42:                                               ; preds = %3
  %43 = lshr exact i8 %9, 6
  switch i8 %43, label %default.unreachable34 [
    i8 0, label %44
    i8 1, label %47
    i8 2, label %50
    i8 3, label %53
  ]

44:                                               ; preds = %42
  %45 = select i1 %2, i8 3, i8 2
  %46 = shl nsw i32 %6, 1
  br label %53

47:                                               ; preds = %42
  %48 = select i1 %2, i8 5, i8 4
  %49 = shl nsw i32 %6, 2
  br label %53

50:                                               ; preds = %42
  %51 = select i1 %2, i8 7, i8 6
  %52 = shl nsw i32 %6, 4
  br label %53

default.unreachable34:                            ; preds = %42
  unreachable

53:                                               ; preds = %42, %44, %47, %50
  %.030 = phi i8 [ %51, %50 ], [ %48, %47 ], [ %45, %44 ], [ 0, %42 ]
  %.029 = phi i32 [ %52, %50 ], [ %49, %47 ], [ %46, %44 ], [ 0, %42 ]
  %54 = getelementptr inbounds i8, ptr %1, i64 5
  %55 = tail call zeroext i1 @BtAdvDataAdd(ptr noundef %0, i8 noundef zeroext %.030, ptr noundef nonnull %54, i32 noundef %.029)
  br label %56

56:                                               ; preds = %53, %._crit_edge
  %.028 = phi i1 [ %28, %._crit_edge ], [ %55, %53 ]
  ret i1 %.028
}

declare zeroext i1 @BtUuidGetBase(i32 noundef, ptr noundef) local_unnamed_addr #3

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 1}
!6 = !{!"_ZTS15__Bt_Uuid_Array", !7, i64 0, !9, i64 0, !10, i64 1, !7, i64 5}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!"_ZTS14__Bt_Uuid_Type", !7, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass