; LLVM IR from IOsonata/IOsonata :: ARM/Nordic/nRF52/nRF52840/exemples/BoschAppBoard/src (bmi3)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.bmi3_acc_usr_gain_offset = type { i16, i16, i16, i8, i8, i8 }

@__const.bmi3_set_user_acc_off_dgain.base_addr = external hidden unnamed_addr constant [2 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_set_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

; Function Attrs: nounwind uwtable
define dso_local signext i8 @bmi3_set_user_acc_off_dgain(ptr noundef %0, ptr noundef %1) #2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  %6 = alloca i8, align 1
  %7 = alloca i8, align 1
  %8 = alloca i8, align 1
  %9 = alloca i16, align 2
  %10 = alloca i16, align 2
  %11 = alloca i16, align 2
  %12 = alloca i16, align 2
  %13 = alloca i16, align 2
  %14 = alloca i16, align 2
  %15 = alloca i16, align 2
  %16 = alloca i16, align 2
  %17 = alloca i16, align 2
  %18 = alloca [12 x i8], align 1
  %19 = alloca [12 x i8], align 1
  %20 = alloca [2 x i8], align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #4
  call void @llvm.lifetime.start.p0(i64 1, ptr %6) #4
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #4
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #4
  call void @llvm.lifetime.start.p0(i64 2, ptr %9) #4
  call void @llvm.lifetime.start.p0(i64 2, ptr %10) #4
  call void @llvm.lifetime.start.p0(i64 2, ptr %11) #4
  call void @llvm.lifetime.start.p0(i64 2, ptr %12) #4
  call void @llvm.lifetime.start.p0(i64 2, ptr %13) #4
  call void @llvm.lifetime.start.p0(i64 2, ptr %14) #4
  call void @llvm.lifetime.start.p0(i64 2, ptr %15) #4
  call void @llvm.lifetime.start.p0(i64 2, ptr %16) #4
  call void @llvm.lifetime.start.p0(i64 2, ptr %17) #4
  call void @llvm.lifetime.start.p0(i64 12, ptr %18) #4
  call void @llvm.memset.p0.i64(ptr align 1 %18, i8 0, i64 12, i1 false)
  call void @llvm.lifetime.start.p0(i64 12, ptr %19) #4
  call void @llvm.memset.p0.i64(ptr align 1 %19, i8 0, i64 12, i1 false)
  call void @llvm.lifetime.start.p0(i64 2, ptr %20) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 1 %20, ptr align 1 @__const.bmi3_set_user_acc_off_dgain.base_addr, i64 2, i1 false)
  %21 = load ptr, ptr %3, align 8, !tbaa !5
  %22 = icmp ne ptr %21, null
  br i1 %22, label %23, label %179

23:                                               ; preds = %2
  %24 = getelementptr inbounds [2 x i8], ptr %20, i64 0, i64 0
  %25 = load ptr, ptr %4, align 8, !tbaa !5
  %26 = call signext i8 @bmi3_set_regs(i8 noundef zeroext 65, ptr noundef %24, i16 noundef zeroext 2, ptr noundef %25)
  store i8 %26, ptr %5, align 1, !tbaa !9
  %27 = load i8, ptr %5, align 1, !tbaa !9
  %28 = sext i8 %27 to i32
  %29 = icmp eq i32 %28, 0
  br i1 %29, label %30, label %178

30:                                               ; preds = %23
  %31 = getelementptr inbounds [12 x i8], ptr %18, i64 0, i64 0
  %32 = load i8, ptr %31, align 1, !tbaa !9
  %33 = zext i8 %32 to i32
  %34 = and i32 %33, -16384
  %35 = load ptr, ptr %3, align 8, !tbaa !5
  %36 = getelementptr inbounds %struct.bmi3_acc_usr_gain_offset, ptr %35, i32 0, i32 0
  %37 = load i16, ptr %36, align 2, !tbaa !10
  %38 = zext i16 %37 to i32
  %39 = and i32 %38, 16383
  %40 = or i32 %34, %39
  %41 = trunc i32 %40 to i16
  store i16 %41, ptr %9, align 2, !tbaa !13
  %42 = getelementptr inbounds [12 x i8], ptr %18, i64 0, i64 1
  %43 = load i8, ptr %42, align 1, !tbaa !9
  %44 = zext i8 %43 to i16
  %45 = zext i16 %44 to i32
  %46 = shl i32 %45, 8
  %47 = trunc i32 %46 to i16
  store i16 %47, ptr %15, align 2, !tbaa !13
  %48 = load i16, ptr %15, align 2, !tbaa !13
  %49 = zext i16 %48 to i32
  %50 = and i32 %49, -16384
  %51 = load ptr, ptr %3, align 8, !tbaa !5
  %52 = getelementptr inbounds %struct.bmi3_acc_usr_gain_offset, ptr %51, i32 0, i32 0
  %53 = load i16, ptr %52, align 2, !tbaa !10
  %54 = zext i16 %53 to i32
  %55 = and i32 %54, 16383
  %56 = or i32 %50, %55
  %57 = trunc i32 %56 to i16
  store i16 %57, ptr %12, align 2, !tbaa !13
  %58 = getelementptr inbounds [12 x i8], ptr %18, i64 0, i64 2
  %59 = load i8, ptr %58, align 1, !tbaa !9
  %60 = zext i8 %59 to i32
  %61 = and i32 %60, -16384
  %62 = load ptr, ptr %3, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.bmi3_acc_usr_gain_offset, ptr %62, i32 0, i32 1
  %64 = load i16, ptr %63, align 2, !tbaa !14
  %65 = zext i16 %64 to i32
  %66 = and i32 %65, 16383
  %67 = or i32 %61, %66
  %68 = trunc i32 %67 to i16
  store i16 %68, ptr %10, align 2, !tbaa !13
  %69 = getelementptr inbounds [12 x i8], ptr %18, i64 0, i64 3
  %70 = load i8, ptr %69, align 1, !tbaa !9
  %71 = zext i8 %70 to i16
  %72 = zext i16 %71 to i32
  %73 = shl i32 %72, 8
  %74 = trunc i32 %73 to i16
  store i16 %74, ptr %16, align 2, !tbaa !13
  %75 = load i16, ptr %16, align 2, !tbaa !13
  %76 = zext i16 %75 to i32
  %77 = and i32 %76, -16384
  %78 = load ptr, ptr %3, align 8, !tbaa !5
  %79 = getelementptr inbounds %struct.bmi3_acc_usr_gain_offset, ptr %78, i32 0, i32 1
  %80 = load i16, ptr %79, align 2, !tbaa !14
  %81 = zext i16 %80 to i32
  %82 = and i32 %81, 16383
  %83 = or i32 %77, %82
  %84 = trunc i32 %83 to i16
  store i16 %84, ptr %13, align 2, !tbaa !13
  %85 = getelementptr inbounds [12 x i8], ptr %18, i64 0, i64 4
  %86 = load i8, ptr %85, align 1, !tbaa !9
  %87 = zext i8 %86 to i32
  %88 = and i32 %87, -16384
  %89 = load ptr, ptr %3, align 8, !tbaa !5
  %90 = getelementptr inbounds %struct.bmi3_acc_usr_gain_offset, ptr %89, i32 0, i32 2
  %91 = load i16, ptr %90, align 2, !tbaa !15
  %92 = zext i16 %91 to i32
  %93 = and i32 %92, 16383
  %94 = or i32 %88, %93
  %95 = trunc i32 %94 to i16
  store i16 %95, ptr %11, align 2, !tbaa !13
  %96 = getelementptr inbounds [12 x i8], ptr %18, i64 0, i64 5
  %97 = load i8, ptr %96, align 1, !tbaa !9
  %98 = zext i8 %97 to i16
  %99 = zext i16 %98 to i32
  %100 = shl i32 %99, 8
  %101 = trunc i32 %100 to i16
  store i16 %101, ptr %17, align 2, !tbaa !13
  %102 = load i16, ptr %17, align 2, !tbaa !13
  %103 = zext i16 %102 to i32
  %104 = and i32 %103, -16384
  %105 = load ptr, ptr %3, align 8, !tbaa !5
  %106 = getelementptr inbounds %struct.bmi3_acc_usr_gain_offset, ptr %105, i32 0, i32 2
  %107 = load i16, ptr %106, align 2, !tbaa !15
  %108 = zext i16 %107 to i32
  %109 = and i32 %108, 16383
  %110 = or i32 %104, %109
  %111 = trunc i32 %110 to i16
  store i16 %111, ptr %14, align 2, !tbaa !13
  %112 = getelementptr inbounds [12 x i8], ptr %18, i64 0, i64 6
  %113 = load i8, ptr %112, align 1, !tbaa !9
  %114 = zext i8 %113 to i32
  %115 = and i32 %114, -256
  %116 = load ptr, ptr %3, align 8, !tbaa !5
  %117 = getelementptr inbounds %struct.bmi3_acc_usr_gain_offset, ptr %116, i32 0, i32 3
  %118 = load i8, ptr %117, align 2, !tbaa !16
  %119 = zext i8 %118 to i32
  %120 = and i32 %119, 255
  %121 = or i32 %115, %120
  %122 = trunc i32 %121 to i8
  store i8 %122, ptr %6, align 1, !tbaa !9
  %123 = getelementptr inbounds [12 x i8], ptr %18, i64 0, i64 8
  %124 = load i8, ptr %123, align 1, !tbaa !9
  %125 = zext i8 %124 to i32
  %126 = and i32 %125, -256
  %127 = load ptr, ptr %3, align 8, !tbaa !5
  %128 = getelementptr inbounds %struct.bmi3_acc_usr_gain_offset, ptr %127, i32 0, i32 4
  %129 = load i8, ptr %128, align 1, !tbaa !17
  %130 = zext i8 %129 to i32
  %131 = and i32 %130, 255
  %132 = or i32 %126, %131
  %133 = trunc i32 %132 to i8
  store i8 %133, ptr %7, align 1, !tbaa !9
  %134 = getelementptr inbounds [12 x i8], ptr %18, i64 0, i64 10
  %135 = load i8, ptr %134, align 1, !tbaa !9
  %136 = zext i8 %135 to i32
  %137 = and i32 %136, -256
  %138 = load ptr, ptr %3, align 8, !tbaa !5
  %139 = getelementptr inbounds %struct.bmi3_acc_usr_gain_offset, ptr %138, i32 0, i32 5
  %140 = load i8, ptr %139, align 2, !tbaa !18
  %141 = zext i8 %140 to i32
  %142 = and i32 %141, 255
  %143 = or i32 %137, %142
  %144 = trunc i32 %143 to i8
  store i8 %144, ptr %8, align 1, !tbaa !9
  %145 = load i16, ptr %9, align 2, !tbaa !13
  %146 = trunc i16 %145 to i8
  %147 = getelementptr inbounds [12 x i8], ptr %19, i64 0, i64 0
  store i8 %146, ptr %147, align 1, !tbaa !9
  %148 = load i16, ptr %12, align 2, !tbaa !13
  %149 = zext i16 %148 to i32
  %150 = ashr i32 %149, 8
  %151 = trunc i32 %150 to i8
  %152 = getelementptr inbounds [12 x i8], ptr %19, i64 0, i64 1
  store i8 %151, ptr %152, align 1, !tbaa !9
  %153 = load i16, ptr %10, align 2, !tbaa !13
  %154 = trunc i16 %153 to i8
  %155 = getelementptr inbounds [12 x i8], ptr %19, i64 0, i64 2
  store i8 %154, ptr %155, align 1, !tbaa !9
  %156 = load i16, ptr %13, align 2, !tbaa !13
  %157 = zext i16 %156 to i32
  %158 = ashr i32 %157, 8
  %159 = trunc i32 %158 to i8
  %160 = getelementptr inbounds [12 x i8], ptr %19, i64 0, i64 3
  store i8 %159, ptr %160, align 1, !tbaa !9
  %161 = load i16, ptr %11, align 2, !tbaa !13
  %162 = trunc i16 %161 to i8
  %163 = getelementptr inbounds [12 x i8], ptr %19, i64 0, i64 4
  store i8 %162, ptr %163, align 1, !tbaa !9
  %164 = load i16, ptr %14, align 2, !tbaa !13
  %165 = zext i16 %164 to i32
  %166 = ashr i32 %165, 8
  %167 = trunc i32 %166 to i8
  %168 = getelementptr inbounds [12 x i8], ptr %19, i64 0, i64 5
  store i8 %167, ptr %168, align 1, !tbaa !9
  %169 = load i8, ptr %6, align 1, !tbaa !9
  %170 = getelementptr inbounds [12 x i8], ptr %19, i64 0, i64 6
  store i8 %169, ptr %170, align 1, !tbaa !9
  %171 = load i8, ptr %7, align 1, !tbaa !9
  %172 = getelementptr inbounds [12 x i8], ptr %19, i64 0, i64 8
  store i8 %171, ptr %172, align 1, !tbaa !9
  %173 = load i8, ptr %8, align 1, !tbaa !9
  %174 = getelementptr inbounds [12 x i8], ptr %19, i64 0, i64 10
  store i8 %173, ptr %174, align 1, !tbaa !9
  %175 = getelementptr inbounds [12 x i8], ptr %19, i64 0, i64 0
  %176 = load ptr, ptr %4, align 8, !tbaa !5
  %177 = call signext i8 @bmi3_set_regs(i8 noundef zeroext 66, ptr noundef %175, i16 noundef zeroext 12, ptr noundef %176)
  store i8 %177, ptr %5, align 1, !tbaa !9
  br label %178

178:                                              ; preds = %30, %23
  br label %180

179:                                              ; preds = %2
  store i8 -1, ptr %5, align 1, !tbaa !9
  br label %180

180:                                              ; preds = %179, %178
  %181 = load i8, ptr %5, align 1, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 2, ptr %20) #4
  call void @llvm.lifetime.end.p0(i64 12, ptr %19) #4
  call void @llvm.lifetime.end.p0(i64 12, ptr %18) #4
  call void @llvm.lifetime.end.p0(i64 2, ptr %17) #4
  call void @llvm.lifetime.end.p0(i64 2, ptr %16) #4
  call void @llvm.lifetime.end.p0(i64 2, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 2, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 2, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 2, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 2, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 2, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 2, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #4
  ret i8 %181
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !12, i64 0}
!11 = !{!"bmi3_acc_usr_gain_offset", !12, i64 0, !12, i64 2, !12, i64 4, !7, i64 6, !7, i64 7, !7, i64 8}
!12 = !{!"short", !7, i64 0}
!13 = !{!12, !12, i64 0}
!14 = !{!11, !12, i64 2}
!15 = !{!11, !12, i64 4}
!16 = !{!11, !7, i64 6}
!17 = !{!11, !7, i64 7}
!18 = !{!11, !7, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@__const.bmi3_set_user_acc_off_dgain.base_addr = external hidden unnamed_addr constant [2 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_set_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local signext i8 @bmi3_set_user_acc_off_dgain(ptr noundef readonly %0, ptr noundef %1) local_unnamed_addr #2 {
  %3 = alloca [12 x i8], align 1
  %4 = alloca [2 x i8], align 2
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %3) #3
  %5 = getelementptr inbounds i8, ptr %3, i64 7
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(12) %5, i8 0, i64 5, i1 false)
  call void @llvm.lifetime.start.p0(i64 2, ptr nonnull %4) #3
  %6 = load i16, ptr @__const.bmi3_set_user_acc_off_dgain.base_addr, align 1
  store i16 %6, ptr %4, align 2
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %43, label %7

7:                                                ; preds = %2
  %8 = call signext i8 @bmi3_set_regs(i8 noundef zeroext 65, ptr noundef nonnull %4, i16 noundef zeroext 2, ptr noundef %1)
  %9 = icmp eq i8 %8, 0
  br i1 %9, label %10, label %43

10:                                               ; preds = %7
  %11 = load i16, ptr %0, align 2, !tbaa !5
  %12 = getelementptr inbounds i8, ptr %0, i64 2
  %13 = load i16, ptr %12, align 2, !tbaa !10
  %14 = getelementptr inbounds i8, ptr %0, i64 4
  %15 = load i16, ptr %14, align 2, !tbaa !11
  %16 = getelementptr inbounds i8, ptr %0, i64 6
  %17 = load i8, ptr %16, align 2, !tbaa !12
  %18 = getelementptr inbounds i8, ptr %0, i64 7
  %19 = load i8, ptr %18, align 1, !tbaa !13
  %20 = getelementptr inbounds i8, ptr %0, i64 8
  %21 = load i8, ptr %20, align 2, !tbaa !14
  %22 = trunc i16 %11 to i8
  store i8 %22, ptr %3, align 1, !tbaa !15
  %23 = lshr i16 %11, 8
  %24 = trunc nuw i16 %23 to i8
  %25 = and i8 %24, 63
  %26 = getelementptr inbounds i8, ptr %3, i64 1
  store i8 %25, ptr %26, align 1, !tbaa !15
  %27 = trunc i16 %13 to i8
  %28 = getelementptr inbounds i8, ptr %3, i64 2
  store i8 %27, ptr %28, align 1, !tbaa !15
  %29 = lshr i16 %13, 8
  %30 = trunc nuw i16 %29 to i8
  %31 = and i8 %30, 63
  %32 = getelementptr inbounds i8, ptr %3, i64 3
  store i8 %31, ptr %32, align 1, !tbaa !15
  %33 = trunc i16 %15 to i8
  %34 = getelementptr inbounds i8, ptr %3, i64 4
  store i8 %33, ptr %34, align 1, !tbaa !15
  %35 = lshr i16 %15, 8
  %36 = trunc nuw i16 %35 to i8
  %37 = and i8 %36, 63
  %38 = getelementptr inbounds i8, ptr %3, i64 5
  store i8 %37, ptr %38, align 1, !tbaa !15
  %39 = getelementptr inbounds i8, ptr %3, i64 6
  store i8 %17, ptr %39, align 1, !tbaa !15
  %40 = getelementptr inbounds i8, ptr %3, i64 8
  store i8 %19, ptr %40, align 1, !tbaa !15
  %41 = getelementptr inbounds i8, ptr %3, i64 10
  store i8 %21, ptr %41, align 1, !tbaa !15
  %42 = call signext i8 @bmi3_set_regs(i8 noundef zeroext 66, ptr noundef nonnull %3, i16 noundef zeroext 12, ptr noundef %1)
  br label %43

43:                                               ; preds = %2, %7, %10
  %.0 = phi i8 [ %42, %10 ], [ %8, %7 ], [ -1, %2 ]
  call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %4) #3
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %3) #3
  ret i8 %.0
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"bmi3_acc_usr_gain_offset", !7, i64 0, !7, i64 2, !7, i64 4, !8, i64 6, !8, i64 7, !8, i64 8}
!7 = !{!"short", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 2}
!11 = !{!6, !7, i64 4}
!12 = !{!6, !8, i64 6}
!13 = !{!6, !8, i64 7}
!14 = !{!6, !8, i64 8}
!15 = !{!8, !8, i64 0}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass