; LLVM IR from IOsonata/IOsonata :: src (device_intrf)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__device_intrf = type <{ ptr, i32, ptr, %"struct.std::atomic_flag", [3 x i8], i32, %"struct.std::atomic", i32, i8, i8, %"struct.std::atomic.0", %"struct.std::atomic.0", i64, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr }>
%"struct.std::atomic_flag" = type { %"struct.std::__atomic_flag_base" }
%"struct.std::__atomic_flag_base" = type { i8 }
%"struct.std::atomic" = type { %"struct.std::__atomic_base" }
%"struct.std::__atomic_base" = type { i32 }
%"struct.std::atomic.0" = type { %"struct.std::__atomic_base.1" }
%"struct.std::__atomic_base.1" = type { i8 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNSt6atomicIbEaSEb(ptr noundef nonnull align 1 dereferenceable(1), i1 noundef zeroext) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress uwtable
declare hidden void @_ZL17DeviceIntrfStopTxP14__device_intrf(ptr noundef) #2

; Function Attrs: inlinehint mustprogress uwtable
declare hidden noundef zeroext i1 @_ZL18DeviceIntrfStartTxP14__device_intrfj(ptr noundef, i32 noundef) #2

; Function Attrs: mustprogress uwtable
define dso_local i32 @DeviceIntrfWrite(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3, ptr noundef %4, i32 noundef %5) #3 {
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca ptr, align 8
  %19 = alloca i64, align 8
  %20 = alloca i32, align 4
  store ptr %0, ptr %8, align 8, !tbaa !5
  store i32 %1, ptr %9, align 4, !tbaa !9
  store ptr %2, ptr %10, align 8, !tbaa !5
  store i32 %3, ptr %11, align 4, !tbaa !9
  store ptr %4, ptr %12, align 8, !tbaa !5
  store i32 %5, ptr %13, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #7
  store i32 0, ptr %14, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #7
  %21 = load i32, ptr %11, align 4, !tbaa !9
  store i32 %21, ptr %15, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #7
  %22 = load ptr, ptr %8, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.__device_intrf, ptr %22, i32 0, i32 5
  %24 = load i32, ptr %23, align 4, !tbaa !11
  store i32 %24, ptr %16, align 4, !tbaa !9
  %25 = load ptr, ptr %10, align 8, !tbaa !5
  %26 = icmp eq ptr %25, null
  br i1 %26, label %32, label %27

27:                                               ; preds = %6
  %28 = load i32, ptr %11, align 4, !tbaa !9
  %29 = load i32, ptr %13, align 4, !tbaa !9
  %30 = add nsw i32 %28, %29
  %31 = icmp sle i32 %30, 0
  br i1 %31, label %32, label %33

32:                                               ; preds = %27, %6
  store i32 0, ptr %7, align 4
  store i32 1, ptr %17, align 4
  br label %106

33:                                               ; preds = %27
  %34 = load i32, ptr %11, align 4, !tbaa !9
  %35 = load i32, ptr %13, align 4, !tbaa !9
  %36 = add nsw i32 %34, %35
  %37 = zext i32 %36 to i64
  %38 = call ptr @llvm.stacksave.p0()
  store ptr %38, ptr %18, align 8
  %39 = alloca i8, i64 %37, align 16
  store i64 %37, ptr %19, align 8
  %40 = load ptr, ptr %10, align 8, !tbaa !5
  %41 = load i32, ptr %11, align 4, !tbaa !9
  %42 = sext i32 %41 to i64
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %39, ptr align 1 %40, i64 %42, i1 false)
  %43 = load ptr, ptr %12, align 8, !tbaa !5
  %44 = icmp ne ptr %43, null
  br i1 %44, label %45, label %64

45:                                               ; preds = %33
  %46 = load i32, ptr %13, align 4, !tbaa !9
  %47 = icmp sgt i32 %46, 0
  br i1 %47, label %48, label %64

48:                                               ; preds = %45
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #7
  %49 = load i32, ptr %13, align 4, !tbaa !9
  %50 = load i32, ptr %11, align 4, !tbaa !9
  %51 = sext i32 %50 to i64
  %52 = sub i64 %37, %51
  %53 = trunc i64 %52 to i32
  %54 = call noundef i32 @_ZL3minii(i32 noundef %49, i32 noundef %53)
  store i32 %54, ptr %20, align 4, !tbaa !9
  %55 = load i32, ptr %11, align 4, !tbaa !9
  %56 = sext i32 %55 to i64
  %57 = getelementptr inbounds i8, ptr %39, i64 %56
  %58 = load ptr, ptr %12, align 8, !tbaa !5
  %59 = load i32, ptr %20, align 4, !tbaa !9
  %60 = sext i32 %59 to i64
  call void @llvm.memcpy.p0.p0.i64(ptr align 1 %57, ptr align 1 %58, i64 %60, i1 false)
  %61 = load i32, ptr %20, align 4, !tbaa !9
  %62 = load i32, ptr %15, align 4, !tbaa !9
  %63 = add nsw i32 %62, %61
  store i32 %63, ptr %15, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #7
  br label %64

64:                                               ; preds = %48, %45, %33
  br label %65

65:                                               ; preds = %92, %64
  %66 = load ptr, ptr %8, align 8, !tbaa !5
  %67 = load i32, ptr %9, align 4, !tbaa !9
  %68 = call noundef zeroext i1 @_ZL18DeviceIntrfStartTxP14__device_intrfj(ptr noundef %66, i32 noundef %67)
  br i1 %68, label %69, label %84

69:                                               ; preds = %65
  %70 = load ptr, ptr %8, align 8, !tbaa !5
  %71 = getelementptr inbounds %struct.__device_intrf, ptr %70, i32 0, i32 11
  %72 = call noundef zeroext i1 @_ZNSt6atomicIbEaSEb(ptr noundef nonnull align 1 dereferenceable(1) %71, i1 noundef zeroext false) #7
  %73 = load ptr, ptr %8, align 8, !tbaa !5
  %74 = getelementptr inbounds %struct.__device_intrf, ptr %73, i32 0, i32 21
  %75 = load ptr, ptr %74, align 4, !tbaa !22
  %76 = load ptr, ptr %8, align 8, !tbaa !5
  %77 = load i32, ptr %15, align 4, !tbaa !9
  %78 = call noundef i32 %75(ptr noundef %76, ptr noundef %39, i32 noundef %77)
  store i32 %78, ptr %14, align 4, !tbaa !9
  %79 = load i32, ptr %14, align 4, !tbaa !9
  %80 = icmp slt i32 %79, 0
  br i1 %80, label %81, label %82

81:                                               ; preds = %69
  br label %94

82:                                               ; preds = %69
  %83 = load ptr, ptr %8, align 8, !tbaa !5
  call void @_ZL17DeviceIntrfStopTxP14__device_intrf(ptr noundef %83)
  br label %84

84:                                               ; preds = %82, %65
  br label %85

85:                                               ; preds = %84
  %86 = load i32, ptr %14, align 4, !tbaa !9
  %87 = icmp sle i32 %86, 0
  br i1 %87, label %88, label %92

88:                                               ; preds = %85
  %89 = load i32, ptr %16, align 4, !tbaa !9
  %90 = add nsw i32 %89, -1
  store i32 %90, ptr %16, align 4, !tbaa !9
  %91 = icmp sgt i32 %89, 0
  br label %92

92:                                               ; preds = %88, %85
  %93 = phi i1 [ false, %85 ], [ %91, %88 ]
  br i1 %93, label %65, label %94, !llvm.loop !23

94:                                               ; preds = %92, %81
  %95 = load i32, ptr %14, align 4, !tbaa !9
  %96 = load i32, ptr %11, align 4, !tbaa !9
  %97 = icmp sge i32 %95, %96
  br i1 %97, label %98, label %102

98:                                               ; preds = %94
  %99 = load i32, ptr %11, align 4, !tbaa !9
  %100 = load i32, ptr %14, align 4, !tbaa !9
  %101 = sub nsw i32 %100, %99
  store i32 %101, ptr %14, align 4, !tbaa !9
  br label %103

102:                                              ; preds = %94
  store i32 0, ptr %14, align 4, !tbaa !9
  br label %103

103:                                              ; preds = %102, %98
  %104 = load i32, ptr %14, align 4, !tbaa !9
  store i32 %104, ptr %7, align 4
  store i32 1, ptr %17, align 4
  %105 = load ptr, ptr %18, align 8
  call void @llvm.stackrestore.p0(ptr %105)
  br label %106

106:                                              ; preds = %103, %32
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #7
  %107 = load i32, ptr %7, align 4
  ret i32 %107
}

; Function Attrs: nocallback nofree nosync nounwind willreturn
declare ptr @llvm.stacksave.p0() #4

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #5

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i32 @_ZL3minii(i32 noundef, i32 noundef) #6

; Function Attrs: nocallback nofree nosync nounwind willreturn
declare void @llvm.stackrestore.p0(ptr) #4

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind willreturn }
attributes #5 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #6 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 24}
!12 = !{!"_ZTS14__device_intrf", !6, i64 0, !10, i64 8, !6, i64 12, !13, i64 20, !10, i64 24, !16, i64 28, !18, i64 32, !15, i64 36, !15, i64 37, !19, i64 38, !19, i64 39, !21, i64 40, !6, i64 48, !6, i64 56, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !6, i64 120, !6, i64 128, !6, i64 136, !6, i64 144, !6, i64 152}
!13 = !{!"_ZTSSt11atomic_flag", !14, i64 0}
!14 = !{!"_ZTSSt18__atomic_flag_base", !15, i64 0}
!15 = !{!"bool", !7, i64 0}
!16 = !{!"_ZTSSt6atomicIiE", !17, i64 0}
!17 = !{!"_ZTSSt13__atomic_baseIiE", !10, i64 0}
!18 = !{!"_ZTS16__Dev_Intrf_Type", !7, i64 0}
!19 = !{!"_ZTSSt6atomicIbE", !20, i64 0}
!20 = !{!"_ZTSSt13__atomic_baseIbE", !15, i64 0}
!21 = !{!"long", !7, i64 0}
!22 = !{!12, !6, i64 112}
!23 = distinct !{!23, !24}
!24 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNSt6atomicIbEaSEb(ptr noundef nonnull align 1 dereferenceable(1), i1 noundef zeroext) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare hidden void @_ZL17DeviceIntrfStopTxP14__device_intrf(ptr noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress uwtable
declare hidden noundef zeroext i1 @_ZL18DeviceIntrfStartTxP14__device_intrfj(ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local i32 @DeviceIntrfWrite(ptr noundef %0, i32 noundef %1, ptr noundef readonly %2, i32 noundef %3, ptr noundef readonly %4, i32 noundef %5) local_unnamed_addr #2 {
  %7 = getelementptr inbounds i8, ptr %0, i64 24
  %8 = load i32, ptr %7, align 4, !tbaa !5
  %9 = icmp eq ptr %2, null
  br i1 %9, label %40, label %10

10:                                               ; preds = %6
  %11 = add nsw i32 %5, %3
  %12 = icmp slt i32 %11, 1
  br i1 %12, label %40, label %13

13:                                               ; preds = %10
  %14 = zext nneg i32 %11 to i64
  %15 = tail call ptr @llvm.stacksave.p0()
  %16 = alloca i8, i64 %14, align 16
  %17 = sext i32 %3 to i64
  call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 16 %16, ptr nonnull align 1 %2, i64 %17, i1 false)
  %18 = icmp ne ptr %4, null
  %19 = icmp sgt i32 %5, 0
  %or.cond = and i1 %18, %19
  br i1 %or.cond, label %20, label %25

20:                                               ; preds = %13
  %21 = tail call noundef i32 @_ZL3minii(i32 noundef %5, i32 noundef %5)
  %22 = getelementptr inbounds i8, ptr %16, i64 %17
  %23 = sext i32 %21 to i64
  call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 1 %22, ptr nonnull align 1 %4, i64 %23, i1 false)
  %24 = add nsw i32 %21, %3
  br label %25

25:                                               ; preds = %20, %13
  %.036 = phi i32 [ %24, %20 ], [ %3, %13 ]
  %26 = getelementptr inbounds i8, ptr %0, i64 39
  %27 = getelementptr inbounds i8, ptr %0, i64 112
  br label %28

28:                                               ; preds = %.thread, %25
  %.037 = phi i32 [ %8, %25 ], [ %37, %.thread ]
  %29 = call noundef zeroext i1 @_ZL18DeviceIntrfStartTxP14__device_intrfj(ptr noundef %0, i32 noundef %1)
  br i1 %29, label %30, label %.thread

30:                                               ; preds = %28
  %31 = call noundef zeroext i1 @_ZNSt6atomicIbEaSEb(ptr noundef nonnull align 1 dereferenceable(1) %26, i1 noundef zeroext false) #6
  %32 = load ptr, ptr %27, align 4, !tbaa !20
  %33 = call noundef i32 %32(ptr noundef %0, ptr noundef nonnull %16, i32 noundef %.036)
  %34 = icmp slt i32 %33, 0
  br i1 %34, label %.critedge, label %35

35:                                               ; preds = %30
  call void @_ZL17DeviceIntrfStopTxP14__device_intrf(ptr noundef nonnull %0)
  %36 = icmp eq i32 %33, 0
  br i1 %36, label %.thread, label %.critedge

.thread:                                          ; preds = %28, %35
  %37 = add nsw i32 %.037, -1
  %38 = icmp sgt i32 %.037, 0
  br i1 %38, label %28, label %.critedge, !llvm.loop !21

.critedge:                                        ; preds = %35, %30, %.thread
  %.2 = phi i32 [ %33, %30 ], [ 0, %.thread ], [ %33, %35 ]
  %.not = icmp slt i32 %.2, %3
  %39 = sub nsw i32 %.2, %3
  %.3 = select i1 %.not, i32 0, i32 %39
  call void @llvm.stackrestore.p0(ptr %15)
  br label %40

40:                                               ; preds = %6, %10, %.critedge
  %.0 = phi i32 [ %.3, %.critedge ], [ 0, %10 ], [ 0, %6 ]
  ret i32 %.0
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn
declare ptr @llvm.stacksave.p0() #3

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i32 @_ZL3minii(i32 noundef, i32 noundef) local_unnamed_addr #5

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn
declare void @llvm.stackrestore.p0(ptr) #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nosync nounwind willreturn }
attributes #4 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 24}
!6 = !{!"_ZTS14__device_intrf", !7, i64 0, !10, i64 8, !7, i64 12, !11, i64 20, !10, i64 24, !14, i64 28, !16, i64 32, !13, i64 36, !13, i64 37, !17, i64 38, !17, i64 39, !19, i64 40, !7, i64 48, !7, i64 56, !7, i64 64, !7, i64 72, !7, i64 80, !7, i64 88, !7, i64 96, !7, i64 104, !7, i64 112, !7, i64 120, !7, i64 128, !7, i64 136, !7, i64 144, !7, i64 152}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"_ZTSSt11atomic_flag", !12, i64 0}
!12 = !{!"_ZTSSt18__atomic_flag_base", !13, i64 0}
!13 = !{!"bool", !8, i64 0}
!14 = !{!"_ZTSSt6atomicIiE", !15, i64 0}
!15 = !{!"_ZTSSt13__atomic_baseIiE", !10, i64 0}
!16 = !{!"_ZTS16__Dev_Intrf_Type", !8, i64 0}
!17 = !{!"_ZTSSt6atomicIbE", !18, i64 0}
!18 = !{!"_ZTSSt13__atomic_baseIbE", !13, i64 0}
!19 = !{!"long", !8, i64 0}
!20 = !{!6, !7, i64 112}
!21 = distinct !{!21, !22}
!22 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopSimplifyPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass