; LLVM IR from IOsonata/IOsonata :: ARM/Nordic/nRF52/nRF52840/exemples/BoschAppBoard/src (bmi3)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@__const.bmi3_set_acc_gyr_off_gain_reset.base_addr = external hidden unnamed_addr constant [2 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_set_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

; Function Attrs: nounwind uwtable
define dso_local signext i8 @bmi3_set_acc_gyr_off_gain_reset(i8 noundef zeroext %0, i8 noundef zeroext %1, ptr noundef %2) #2 {
  %4 = alloca i8, align 1
  %5 = alloca i8, align 1
  %6 = alloca ptr, align 8
  %7 = alloca i8, align 1
  %8 = alloca [2 x i8], align 1
  %9 = alloca [2 x i8], align 1
  %10 = alloca [2 x i8], align 1
  store i8 %0, ptr %4, align 1, !tbaa !5
  store i8 %1, ptr %5, align 1, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !8
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #4
  call void @llvm.lifetime.start.p0(i64 2, ptr %8) #4
  call void @llvm.memset.p0.i64(ptr align 1 %8, i8 0, i64 2, i1 false)
  call void @llvm.lifetime.start.p0(i64 2, ptr %9) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 1 %9, ptr align 1 @__const.bmi3_set_acc_gyr_off_gain_reset.base_addr, i64 2, i1 false)
  call void @llvm.lifetime.start.p0(i64 2, ptr %10) #4
  call void @llvm.memset.p0.i64(ptr align 1 %10, i8 0, i64 2, i1 false)
  %11 = getelementptr inbounds [2 x i8], ptr %9, i64 0, i64 0
  %12 = load ptr, ptr %6, align 8, !tbaa !8
  %13 = call signext i8 @bmi3_set_regs(i8 noundef zeroext 65, ptr noundef %11, i16 noundef zeroext 2, ptr noundef %12)
  store i8 %13, ptr %7, align 1, !tbaa !5
  %14 = load i8, ptr %7, align 1, !tbaa !5
  %15 = sext i8 %14 to i32
  %16 = icmp eq i32 %15, 0
  br i1 %16, label %17, label %47

17:                                               ; preds = %3
  %18 = getelementptr inbounds [2 x i8], ptr %10, i64 0, i64 0
  %19 = load i8, ptr %18, align 1, !tbaa !5
  %20 = zext i8 %19 to i32
  %21 = and i32 %20, -2
  %22 = load i8, ptr %4, align 1, !tbaa !5
  %23 = zext i8 %22 to i32
  %24 = and i32 %23, 1
  %25 = or i32 %21, %24
  %26 = trunc i32 %25 to i8
  store i8 %26, ptr %4, align 1, !tbaa !5
  %27 = getelementptr inbounds [2 x i8], ptr %10, i64 0, i64 0
  %28 = load i8, ptr %27, align 1, !tbaa !5
  %29 = zext i8 %28 to i32
  %30 = and i32 %29, -3
  %31 = load i8, ptr %5, align 1, !tbaa !5
  %32 = zext i8 %31 to i32
  %33 = shl i32 %32, 1
  %34 = and i32 %33, 2
  %35 = or i32 %30, %34
  %36 = trunc i32 %35 to i8
  store i8 %36, ptr %5, align 1, !tbaa !5
  %37 = load i8, ptr %4, align 1, !tbaa !5
  %38 = zext i8 %37 to i32
  %39 = load i8, ptr %5, align 1, !tbaa !5
  %40 = zext i8 %39 to i32
  %41 = or i32 %38, %40
  %42 = trunc i32 %41 to i8
  %43 = getelementptr inbounds [2 x i8], ptr %8, i64 0, i64 0
  store i8 %42, ptr %43, align 1, !tbaa !5
  %44 = getelementptr inbounds [2 x i8], ptr %8, i64 0, i64 0
  %45 = load ptr, ptr %6, align 8, !tbaa !8
  %46 = call signext i8 @bmi3_set_regs(i8 noundef zeroext 66, ptr noundef %44, i16 noundef zeroext 2, ptr noundef %45)
  store i8 %46, ptr %7, align 1, !tbaa !5
  br label %47

47:                                               ; preds = %17, %3
  %48 = load i8, ptr %7, align 1, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 2, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 2, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 2, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #4
  ret i8 %48
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"any pointer", !6, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@__const.bmi3_set_acc_gyr_off_gain_reset.base_addr = external hidden unnamed_addr constant [2 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @bmi3_set_regs(i8 noundef zeroext, ptr noundef, i16 noundef zeroext, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local signext i8 @bmi3_set_acc_gyr_off_gain_reset(i8 noundef zeroext %0, i8 noundef zeroext %1, ptr noundef %2) local_unnamed_addr #1 {
  %4 = alloca [2 x i8], align 2
  %5 = alloca [2 x i8], align 2
  call void @llvm.lifetime.start.p0(i64 2, ptr nonnull %4) #2
  store i16 0, ptr %4, align 2
  call void @llvm.lifetime.start.p0(i64 2, ptr nonnull %5) #2
  %6 = load i16, ptr @__const.bmi3_set_acc_gyr_off_gain_reset.base_addr, align 1
  store i16 %6, ptr %5, align 2
  %7 = call signext i8 @bmi3_set_regs(i8 noundef zeroext 65, ptr noundef nonnull %5, i16 noundef zeroext 2, ptr noundef %2)
  %8 = icmp eq i8 %7, 0
  br i1 %8, label %9, label %15

9:                                                ; preds = %3
  %10 = and i8 %0, 1
  %11 = shl i8 %1, 1
  %12 = and i8 %11, 2
  %13 = or disjoint i8 %12, %10
  store i8 %13, ptr %4, align 2, !tbaa !5
  %14 = call signext i8 @bmi3_set_regs(i8 noundef zeroext 66, ptr noundef nonnull %4, i16 noundef zeroext 2, ptr noundef %2)
  br label %15

15:                                               ; preds = %9, %3
  %.0 = phi i8 [ %14, %9 ], [ %7, %3 ]
  call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %5) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %4) #2
  ret i8 %.0
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass