; LLVM IR from IOsonata/IOsonata :: src/miscdev (ledmx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @LedMxWriteRam(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3, i32 noundef %4) #1 {
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !9
  store ptr %2, ptr %8, align 8, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !9
  store i32 %4, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %14 = load i32, ptr %7, align 4, !tbaa !9
  %15 = icmp uge i32 %14, 64
  br i1 %15, label %16, label %17

16:                                               ; preds = %5
  store i32 1, ptr %13, align 4
  br label %69

17:                                               ; preds = %5
  br label %18

18:                                               ; preds = %26, %17
  %19 = load i32, ptr %7, align 4, !tbaa !9
  %20 = icmp ult i32 %19, 0
  br i1 %20, label %21, label %24

21:                                               ; preds = %18
  %22 = load i32, ptr %9, align 4, !tbaa !9
  %23 = icmp sgt i32 %22, 0
  br label %24

24:                                               ; preds = %21, %18
  %25 = phi i1 [ false, %18 ], [ %23, %21 ]
  br i1 %25, label %26, label %33

26:                                               ; preds = %24
  %27 = load ptr, ptr %8, align 8, !tbaa !5
  %28 = getelementptr inbounds i8, ptr %27, i32 1
  store ptr %28, ptr %8, align 8, !tbaa !5
  %29 = load i32, ptr %9, align 4, !tbaa !9
  %30 = add nsw i32 %29, -1
  store i32 %30, ptr %9, align 4, !tbaa !9
  %31 = load i32, ptr %7, align 4, !tbaa !9
  %32 = add i32 %31, 2
  store i32 %32, ptr %7, align 4, !tbaa !9
  br label %18, !llvm.loop !11

33:                                               ; preds = %24
  %34 = load i32, ptr %9, align 4, !tbaa !9
  %35 = icmp sle i32 %34, 0
  br i1 %35, label %36, label %37

36:                                               ; preds = %33
  store i32 1, ptr %13, align 4
  br label %69

37:                                               ; preds = %33
  %38 = load ptr, ptr %6, align 8, !tbaa !5
  %39 = load i32, ptr %10, align 4, !tbaa !9
  call void @LedMxStartTx(ptr noundef %38, i32 noundef %39)
  %40 = load i32, ptr %7, align 4, !tbaa !9
  %41 = and i32 %40, 127
  %42 = or i32 640, %41
  store i32 %42, ptr %11, align 4, !tbaa !9
  %43 = load ptr, ptr %6, align 8, !tbaa !5
  %44 = load i32, ptr %11, align 4, !tbaa !9
  call void @LedMxTxData(ptr noundef %43, i32 noundef %44, i32 noundef 10)
  store i32 0, ptr %12, align 4, !tbaa !9
  br label %45

45:                                               ; preds = %63, %37
  %46 = load i32, ptr %12, align 4, !tbaa !9
  %47 = load i32, ptr %9, align 4, !tbaa !9
  %48 = icmp slt i32 %46, %47
  br i1 %48, label %49, label %52

49:                                               ; preds = %45
  %50 = load i32, ptr %7, align 4, !tbaa !9
  %51 = icmp ult i32 %50, 64
  br label %52

52:                                               ; preds = %49, %45
  %53 = phi i1 [ false, %45 ], [ %51, %49 ]
  br i1 %53, label %54, label %66

54:                                               ; preds = %52
  %55 = load ptr, ptr %6, align 8, !tbaa !5
  %56 = load ptr, ptr %8, align 8, !tbaa !5
  %57 = load i8, ptr %56, align 1, !tbaa !13
  %58 = zext i8 %57 to i32
  call void @LedMxTxData(ptr noundef %55, i32 noundef %58, i32 noundef 8)
  %59 = load i32, ptr %7, align 4, !tbaa !9
  %60 = add i32 %59, 2
  store i32 %60, ptr %7, align 4, !tbaa !9
  %61 = load ptr, ptr %8, align 8, !tbaa !5
  %62 = getelementptr inbounds i8, ptr %61, i32 1
  store ptr %62, ptr %8, align 8, !tbaa !5
  br label %63

63:                                               ; preds = %54
  %64 = load i32, ptr %12, align 4, !tbaa !9
  %65 = add nsw i32 %64, 1
  store i32 %65, ptr %12, align 4, !tbaa !9
  br label %45, !llvm.loop !14

66:                                               ; preds = %52
  %67 = load ptr, ptr %6, align 8, !tbaa !5
  %68 = load i32, ptr %10, align 4, !tbaa !9
  call void @LedMxStopTx(ptr noundef %67, i32 noundef %68)
  store i32 0, ptr %13, align 4
  br label %69

69:                                               ; preds = %66, %36, %16
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  %70 = load i32, ptr %13, align 4
  switch i32 %70, label %72 [
    i32 0, label %71
    i32 1, label %71
  ]

71:                                               ; preds = %69, %69
  ret void

72:                                               ; preds = %69
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @LedMxStartTx(ptr noundef, i32 noundef) #2

declare void @LedMxTxData(ptr noundef, i32 noundef, i32 noundef) #2

declare void @LedMxStopTx(ptr noundef, i32 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @LedMxWriteRam(ptr noundef %0, i32 noundef %1, ptr nocapture noundef readonly %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #0 {
  %6 = icmp ugt i32 %1, 63
  %7 = icmp slt i32 %3, 1
  %or.cond = or i1 %6, %7
  br i1 %or.cond, label %20, label %8

8:                                                ; preds = %5
  tail call void @LedMxStartTx(ptr noundef %0, i32 noundef %4) #2
  %9 = or disjoint i32 %1, 640
  tail call void @LedMxTxData(ptr noundef %0, i32 noundef %9, i32 noundef 10) #2
  br label %10

10:                                               ; preds = %8, %10
  %.028 = phi i32 [ 0, %8 ], [ %15, %10 ]
  %.127 = phi i32 [ %1, %8 ], [ %13, %10 ]
  %.12326 = phi ptr [ %2, %8 ], [ %14, %10 ]
  %11 = load i8, ptr %.12326, align 1, !tbaa !5
  %12 = zext i8 %11 to i32
  tail call void @LedMxTxData(ptr noundef %0, i32 noundef %12, i32 noundef 8) #2
  %13 = add nuw nsw i32 %.127, 2
  %14 = getelementptr inbounds i8, ptr %.12326, i64 1
  %15 = add nuw nsw i32 %.028, 1
  %16 = icmp slt i32 %15, %3
  %17 = icmp ult i32 %.127, 62
  %18 = select i1 %16, i1 %17, i1 false
  br i1 %18, label %10, label %19, !llvm.loop !8

19:                                               ; preds = %10
  tail call void @LedMxStopTx(ptr noundef %0, i32 noundef %4) #2
  br label %20

20:                                               ; preds = %5, %19
  ret void
}

declare void @LedMxStartTx(ptr noundef, i32 noundef) local_unnamed_addr #1

declare void @LedMxTxData(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare void @LedMxStopTx(ptr noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,LoopRotatePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass