; LLVM IR from IOsonata/IOsonata :: ARM/Nordic/nRF52/nRF52840/exemples/BoschAppBoard/src (bmi3)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.bmi3_dev = type { i8, ptr, i8, i32, i8, i8, i8, i16, ptr, ptr, ptr, i16 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare hidden signext i8 @null_ptr_check(ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local signext i8 @bmi3_configure_enhanced_flexibility(ptr noundef %0) #1 {
  %2 = alloca ptr, align 8
  %3 = alloca i8, align 1
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %3) #2
  %4 = load ptr, ptr %2, align 8, !tbaa !5
  %5 = call signext i8 @null_ptr_check(ptr noundef %4)
  store i8 %5, ptr %3, align 1, !tbaa !9
  %6 = load i8, ptr %3, align 1, !tbaa !9
  %7 = sext i8 %6 to i32
  %8 = icmp eq i32 %7, 0
  br i1 %8, label %9, label %51

9:                                                ; preds = %1
  %10 = load ptr, ptr %2, align 8, !tbaa !5
  %11 = getelementptr inbounds %struct.bmi3_dev, ptr %10, i32 0, i32 7
  %12 = load i16, ptr %11, align 4, !tbaa !10
  %13 = zext i16 %12 to i32
  %14 = srem i32 %13, 2
  %15 = icmp ne i32 %14, 0
  br i1 %15, label %16, label %25

16:                                               ; preds = %9
  %17 = load ptr, ptr %2, align 8, !tbaa !5
  %18 = getelementptr inbounds %struct.bmi3_dev, ptr %17, i32 0, i32 7
  %19 = load i16, ptr %18, align 4, !tbaa !10
  %20 = zext i16 %19 to i32
  %21 = sub nsw i32 %20, 1
  %22 = trunc i32 %21 to i16
  %23 = load ptr, ptr %2, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.bmi3_dev, ptr %23, i32 0, i32 7
  store i16 %22, ptr %24, align 4, !tbaa !10
  br label %25

25:                                               ; preds = %16, %9
  %26 = load ptr, ptr %2, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.bmi3_dev, ptr %26, i32 0, i32 7
  %28 = load i16, ptr %27, align 4, !tbaa !10
  %29 = zext i16 %28 to i32
  %30 = icmp slt i32 %29, 2
  br i1 %30, label %31, label %34

31:                                               ; preds = %25
  %32 = load ptr, ptr %2, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.bmi3_dev, ptr %32, i32 0, i32 7
  store i16 2, ptr %33, align 4, !tbaa !10
  br label %34

34:                                               ; preds = %31, %25
  %35 = load ptr, ptr %2, align 8, !tbaa !5
  %36 = call signext i8 @config_array_set_command(ptr noundef %35)
  store i8 %36, ptr %3, align 1, !tbaa !9
  %37 = load i8, ptr %3, align 1, !tbaa !9
  %38 = sext i8 %37 to i32
  %39 = icmp eq i32 %38, 0
  br i1 %39, label %40, label %50

40:                                               ; preds = %34
  %41 = load ptr, ptr %2, align 8, !tbaa !5
  %42 = call signext i8 @config_array_set_value_one_page(ptr noundef %41)
  store i8 %42, ptr %3, align 1, !tbaa !9
  %43 = load i8, ptr %3, align 1, !tbaa !9
  %44 = sext i8 %43 to i32
  %45 = icmp eq i32 %44, 0
  br i1 %45, label %46, label %49

46:                                               ; preds = %40
  %47 = load ptr, ptr %2, align 8, !tbaa !5
  %48 = call signext i8 @write_config_array(ptr noundef %47)
  store i8 %48, ptr %3, align 1, !tbaa !9
  br label %49

49:                                               ; preds = %46, %40
  br label %50

50:                                               ; preds = %49, %34
  br label %51

51:                                               ; preds = %50, %1
  %52 = load i8, ptr %3, align 1, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 1, ptr %3) #2
  ret i8 %52
}

; Function Attrs: nounwind uwtable
declare hidden signext i8 @config_array_set_command(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare hidden signext i8 @config_array_set_value_one_page(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare hidden signext i8 @write_config_array(ptr noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !13, i64 28}
!11 = !{!"bmi3_dev", !7, i64 0, !6, i64 8, !7, i64 16, !12, i64 20, !7, i64 24, !7, i64 25, !7, i64 26, !13, i64 28, !6, i64 32, !6, i64 40, !6, i64 48, !13, i64 56}
!12 = !{!"int", !7, i64 0}
!13 = !{!"short", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare hidden signext i8 @null_ptr_check(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local signext i8 @bmi3_configure_enhanced_flexibility(ptr noundef %0) local_unnamed_addr #0 {
  %2 = tail call signext i8 @null_ptr_check(ptr noundef %0)
  %3 = icmp eq i8 %2, 0
  br i1 %3, label %4, label %21

4:                                                ; preds = %1
  %5 = getelementptr inbounds i8, ptr %0, i64 28
  %6 = load i16, ptr %5, align 4, !tbaa !5
  %7 = and i16 %6, 1
  %.not = icmp ne i16 %7, 0
  %8 = sext i1 %.not to i16
  %9 = add i16 %6, %8
  %10 = icmp ult i16 %9, 2
  %11 = or i1 %.not, %10
  br i1 %11, label %12, label %13

12:                                               ; preds = %4
  %simplifycfg.merge = tail call i16 @llvm.umax.i16(i16 %9, i16 2)
  store i16 %simplifycfg.merge, ptr %5, align 4, !tbaa !5
  br label %13

13:                                               ; preds = %4, %12
  %14 = tail call signext i8 @config_array_set_command(ptr noundef nonnull %0)
  %15 = icmp eq i8 %14, 0
  br i1 %15, label %16, label %21

16:                                               ; preds = %13
  %17 = tail call signext i8 @config_array_set_value_one_page(ptr noundef nonnull %0)
  %18 = icmp eq i8 %17, 0
  br i1 %18, label %19, label %21

19:                                               ; preds = %16
  %20 = tail call signext i8 @write_config_array(ptr noundef nonnull %0)
  br label %21

21:                                               ; preds = %13, %19, %16, %1
  %.0 = phi i8 [ %20, %19 ], [ %17, %16 ], [ %14, %13 ], [ %2, %1 ]
  ret i8 %.0
}

; Function Attrs: nounwind uwtable
declare hidden signext i8 @config_array_set_command(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare hidden signext i8 @config_array_set_value_one_page(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare hidden signext i8 @write_config_array(ptr noundef) local_unnamed_addr #0

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i16 @llvm.umax.i16(i16, i16) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 28}
!6 = !{!"bmi3_dev", !7, i64 0, !9, i64 8, !7, i64 16, !10, i64 20, !7, i64 24, !7, i64 25, !7, i64 26, !11, i64 28, !9, i64 32, !9, i64 40, !9, i64 48, !11, i64 56}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!"any pointer", !7, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!"short", !7, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass