; LLVM IR from VastoLorde95/Competitive-Programming :: Codeforces/149 Division 2/Problem E/E.ll (Z5queryiiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.node = type { [21 x i32] }

@tree = external dso_local global [262144 x %struct.node], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z5shiftiii(i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z5queryiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #2 {
  %6 = alloca i64, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  store i32 %0, ptr %7, align 4, !tbaa !5
  store i32 %1, ptr %8, align 4, !tbaa !5
  store i32 %2, ptr %9, align 4, !tbaa !5
  store i32 %3, ptr %10, align 4, !tbaa !5
  store i32 %4, ptr %11, align 4, !tbaa !5
  %15 = load i32, ptr %7, align 4, !tbaa !5
  %16 = load i32, ptr %11, align 4, !tbaa !5
  %17 = icmp sge i32 %15, %16
  br i1 %17, label %22, label %18

18:                                               ; preds = %5
  %19 = load i32, ptr %10, align 4, !tbaa !5
  %20 = load i32, ptr %8, align 4, !tbaa !5
  %21 = icmp sge i32 %19, %20
  br i1 %21, label %22, label %23

22:                                               ; preds = %18, %5
  store i64 0, ptr %6, align 8
  br label %61

23:                                               ; preds = %18
  %24 = load i32, ptr %7, align 4, !tbaa !5
  %25 = load i32, ptr %10, align 4, !tbaa !5
  %26 = icmp sle i32 %24, %25
  br i1 %26, label %27, label %36

27:                                               ; preds = %23
  %28 = load i32, ptr %11, align 4, !tbaa !5
  %29 = load i32, ptr %8, align 4, !tbaa !5
  %30 = icmp sle i32 %28, %29
  br i1 %30, label %31, label %36

31:                                               ; preds = %27
  %32 = load i32, ptr %9, align 4, !tbaa !5
  %33 = sext i32 %32 to i64
  %34 = getelementptr inbounds [262144 x %struct.node], ptr @tree, i64 0, i64 %33
  %35 = call noundef i64 @_ZN4node3valEv(ptr noundef nonnull align 4 dereferenceable(84) %34)
  store i64 %35, ptr %6, align 8
  br label %61

36:                                               ; preds = %27, %23
  %37 = load i32, ptr %9, align 4, !tbaa !5
  %38 = load i32, ptr %10, align 4, !tbaa !5
  %39 = load i32, ptr %11, align 4, !tbaa !5
  call void @_Z5shiftiii(i32 noundef %37, i32 noundef %38, i32 noundef %39)
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %40 = load i32, ptr %9, align 4, !tbaa !5
  %41 = shl i32 %40, 1
  store i32 %41, ptr %12, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  %42 = load i32, ptr %12, align 4, !tbaa !5
  %43 = add nsw i32 %42, 1
  store i32 %43, ptr %13, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  %44 = load i32, ptr %10, align 4, !tbaa !5
  %45 = load i32, ptr %11, align 4, !tbaa !5
  %46 = add nsw i32 %44, %45
  %47 = ashr i32 %46, 1
  store i32 %47, ptr %14, align 4, !tbaa !5
  %48 = load i32, ptr %7, align 4, !tbaa !5
  %49 = load i32, ptr %8, align 4, !tbaa !5
  %50 = load i32, ptr %12, align 4, !tbaa !5
  %51 = load i32, ptr %10, align 4, !tbaa !5
  %52 = load i32, ptr %14, align 4, !tbaa !5
  %53 = call noundef i64 @_Z5queryiiiii(i32 noundef %48, i32 noundef %49, i32 noundef %50, i32 noundef %51, i32 noundef %52)
  %54 = load i32, ptr %7, align 4, !tbaa !5
  %55 = load i32, ptr %8, align 4, !tbaa !5
  %56 = load i32, ptr %13, align 4, !tbaa !5
  %57 = load i32, ptr %14, align 4, !tbaa !5
  %58 = load i32, ptr %11, align 4, !tbaa !5
  %59 = call noundef i64 @_Z5queryiiiii(i32 noundef %54, i32 noundef %55, i32 noundef %56, i32 noundef %57, i32 noundef %58)
  %60 = add nsw i64 %53, %59
  store i64 %60, ptr %6, align 8
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  br label %61

61:                                               ; preds = %36, %31, %22
  %62 = load i64, ptr %6, align 8
  ret i64 %62
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4node3valEv(ptr noundef nonnull align 4 dereferenceable(84)) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.node = type { [21 x i32] }

@tree = external dso_local global [262144 x %struct.node], align 16

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z5shiftiii(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z5queryiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #0 {
  %.not = icmp slt i32 %0, %4
  %.not3142 = icmp slt i32 %3, %1
  %or.cond43 = and i1 %.not, %.not3142
  br i1 %or.cond43, label %.lr.ph, label %.loopexit

.lr.ph:                                           ; preds = %5
  %.not33 = icmp sgt i32 %4, %1
  br i1 %.not33, label %tailrecurse.us, label %.lr.ph.split.split

tailrecurse.us:                                   ; preds = %.lr.ph, %tailrecurse.us
  %.tr3746.us = phi i32 [ %9, %tailrecurse.us ], [ %3, %.lr.ph ]
  %.tr3645.us = phi i32 [ %7, %tailrecurse.us ], [ %2, %.lr.ph ]
  %accumulator.tr44.us = phi i64 [ %11, %tailrecurse.us ], [ 0, %.lr.ph ]
  tail call void @_Z5shiftiii(i32 noundef %.tr3645.us, i32 noundef %.tr3746.us, i32 noundef %4)
  %6 = shl i32 %.tr3645.us, 1
  %7 = or disjoint i32 %6, 1
  %8 = add nsw i32 %.tr3746.us, %4
  %9 = ashr i32 %8, 1
  %10 = tail call noundef i64 @_Z5queryiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %6, i32 noundef %.tr3746.us, i32 noundef %9)
  %11 = add nsw i64 %10, %accumulator.tr44.us
  %.not31.us = icmp slt i32 %9, %1
  br i1 %.not31.us, label %tailrecurse.us, label %.loopexit

.lr.ph.split.split:                               ; preds = %.lr.ph, %tailrecurse
  %.tr3746 = phi i32 [ %18, %tailrecurse ], [ %3, %.lr.ph ]
  %.tr3645 = phi i32 [ %16, %tailrecurse ], [ %2, %.lr.ph ]
  %accumulator.tr44 = phi i64 [ %20, %tailrecurse ], [ 0, %.lr.ph ]
  %.not32 = icmp slt i32 %.tr3746, %0
  br i1 %.not32, label %tailrecurse, label %.split.us

.split.us:                                        ; preds = %.lr.ph.split.split
  %12 = sext i32 %.tr3645 to i64
  %13 = getelementptr inbounds [262144 x %struct.node], ptr @tree, i64 0, i64 %12
  %14 = tail call noundef i64 @_ZN4node3valEv(ptr noundef nonnull align 4 dereferenceable(84) %13)
  br label %.loopexit

tailrecurse:                                      ; preds = %.lr.ph.split.split
  tail call void @_Z5shiftiii(i32 noundef %.tr3645, i32 noundef %.tr3746, i32 noundef %4)
  %15 = shl i32 %.tr3645, 1
  %16 = or disjoint i32 %15, 1
  %17 = add nsw i32 %.tr3746, %4
  %18 = ashr i32 %17, 1
  %19 = tail call noundef i64 @_Z5queryiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %15, i32 noundef %.tr3746, i32 noundef %18)
  %20 = add nsw i64 %19, %accumulator.tr44
  %.not31 = icmp slt i32 %18, %1
  br i1 %.not31, label %.lr.ph.split.split, label %.loopexit

.loopexit:                                        ; preds = %tailrecurse, %tailrecurse.us, %5, %.split.us
  %accumulator.tr41 = phi i64 [ %accumulator.tr44, %.split.us ], [ 0, %5 ], [ %11, %tailrecurse.us ], [ %20, %tailrecurse ]
  %.0 = phi i64 [ %14, %.split.us ], [ 0, %5 ], [ 0, %tailrecurse.us ], [ 0, %tailrecurse ]
  %accumulator.ret.tr = add nsw i64 %.0, %accumulator.tr41
  ret i64 %accumulator.ret.tr
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN4node3valEv(ptr noundef nonnull align 4 dereferenceable(84)) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass